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x86: drop Rex64 attribute
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
643bb870
JB		 12020-03-06 Jan Beulich <jbeulich@suse.com>
2
3 * config/tc-i386.c (md_assemble): Drop use of rex64.
4 (process_suffix): For REX.W for 64-bit CRC32.
5
a23b33b3
JB		 62020-03-06 Jan Beulich <jbeulich@suse.com>
7
8 * config/tc-i386.c (i386_addressing_mode): For 32-bit
9 addressing for MPX insns without base/index.
10 * testsuite/gas/i386/mpx-16bit.s,
11 * testsuite/gas/i386/mpx-16bit.d: New.
12 * testsuite/gas/i386/i386.exp: Run new test.
13
a0497384
JB		 142020-03-06 Jan Beulich <jbeulich@suse.com>
15
16 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
17 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
18 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
19 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
20 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
21 as well as a BSWAP one.
22 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
23 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
24 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
25 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
26 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
27 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
28 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
29 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
30 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
31 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
32 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
33 testsuite/gas/i386/vmx.d: Adjust expectations.
34
b630c145
JB		 352020-03-06 Jan Beulich <jbeulich@suse.com>
36
37 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
38 from having their operands swapped.
39 * testsuite/gas/i386/waitpkg.s,
40 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
41 3-operand cases as well as testing of 16-bit code generation.
42 * testsuite/gas/i386/waitpkg.d,
43 testsuite/gas/i386/waitpkg-intel.d,
44 testsuite/gas/i386/x86-64-waitpkg.d,
45 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
46
de48783e
NC		 472020-03-04 Nelson Chu <nelson.chu@sifive.com>
48
dee35d02
NC		 49 * config/tc-riscv.c (percent_op_utype): Support the modifier
50 %got_pcrel_hi.
51 * doc/c-riscv.texi: Add documentation.
52 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
53 modifier %got_pcrel_hi.
54 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
55 * testsuite/gas/riscv/relax-reloc.d: Likewise.
56 * testsuite/gas/riscv/relax-reloc.s: Likewise.
57
de48783e
NC		 58 * doc/c-riscv.texi (relocation modifiers): Add documentation.
59 (RISC-V-Formats): Update the section name from "Instruction Formats"
60 to "RISC-V Instruction Formats".
61
749479c8
AO		 622020-03-04 Alexandre Oliva <oliva@adacore.com>
63
64 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
65 detected in a section which does not have at least 4 byte
66 alignment.
67 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
68 * testsuite/gas/arm/ldr-t.s: Likewise.
69 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
70 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
71 disassembly, ignoring any NOPs that may have been inserted because
72 of section alignment.
73 * testsuite/gas/arm/ldr-t.d: Likewise.
74
a847e322
JB		 752020-03-04 Jan Beulich <jbeulich@suse.com>
76
77 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
78 * doc/c-i386.texi: Mention sev_es.
79 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
80 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
81 expectations.
82 * testsuite/gas/i386/arch-13-znver1.d,
83 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
84
3cd7f3e3
L		 852020-03-03 H.J. Lu <hongjiu.lu@intel.com>
86
87 * config/tc-i386.c (match_template): Replace ignoresize and
88 defaultsize with mnemonicsize.
89 (process_suffix): Likewise.
90
b8ba1385
SB		 912020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
92
93 PR 25627
94 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
95 instruction LD IY,(HL).
96 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
97 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
98 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
99 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
100
10d97a0f
L		 1012020-03-03 H.J. Lu <hongjiu.lu@intel.com>
102
103 PR gas/25622
104 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
105 x86-64-default-suffix-avx.
106 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
107 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
108 * testsuite/gas/i386/noreg64.d: Updated.
109 * testsuite/gas/i386/noreg64.l: Likewise.
110 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
111 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
112 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
113
8326546e
SB		 1142020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
115
116 PR 25604
117 * config/tc-z80.c (contains_register): Prevent an illegal memory
118 access when checking an expression for a register name.
119
e3e896e6
AM		 1202020-03-03 Alan Modra <amodra@gmail.com>
121
122 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
123 support.
124
a4dd6c97
AM		 1252020-03-02 Alan Modra <amodra@gmail.com>
126
127 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
128 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
129 and .sbss sections.
130 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
131 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
132 (s3_s_score_lcomm): Likewise.
133 * config/tc-score7.c: Similarly.
134 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
135
dec7b24b
YS		 1362020-02-28 YunQiang Su <syq@debian.org>
137
138 PR gas/25539
139 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
140 to handle multi-labels.
141 (has_label_name): New.
142
cceb53b8
MM		 1432020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
144
145 * config/tc-arm.c (enum pred_instruction_type): Remove
146 NEUTRAL_IT_NO_VPT_INSN predication type.
147 (cxn_handle_predication): Modify to require condition suffixes.
148 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
149 * testsuite/gas/arm/cde-scalar.s: Update test.
150 * testsuite/gas/arm/cde-warnings.l: Update test.
151 * testsuite/gas/arm/cde-warnings.s: Update test.
152
da3ec71f
AM		 1532020-02-26 Alan Modra <amodra@gmail.com>
154
155 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
156 N_() on empty string.
157
42135cad
AM		 1582020-02-26 Alan Modra <amodra@gmail.com>
159
160 * read.c (read_a_source_file): Call strncpy with length one
161 less than size of original_case_string.
162
dc1e8a47
AM		 1632020-02-26 Alan Modra <amodra@gmail.com>
164
165 * config/obj-elf.c: Indent labels correctly.
166 * config/obj-macho.c: Likewise.
167 * config/tc-aarch64.c: Likewise.
168 * config/tc-alpha.c: Likewise.
169 * config/tc-arm.c: Likewise.
170 * config/tc-cr16.c: Likewise.
171 * config/tc-crx.c: Likewise.
172 * config/tc-frv.c: Likewise.
173 * config/tc-i386-intel.c: Likewise.
174 * config/tc-i386.c: Likewise.
175 * config/tc-ia64.c: Likewise.
176 * config/tc-mn10200.c: Likewise.
177 * config/tc-mn10300.c: Likewise.
178 * config/tc-nds32.c: Likewise.
179 * config/tc-riscv.c: Likewise.
180 * config/tc-s12z.c: Likewise.
181 * config/tc-xtensa.c: Likewise.
182 * config/tc-z80.c: Likewise.
183 * read.c: Likewise.
184 * symbols.c: Likewise.
185 * write.c: Likewise.
186
bd0cf5a6
NC		 1872020-02-20 Nelson Chu <nelson.chu@sifive.com>
188
54b2aec1
NC		 189 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
190 we are assembling instruction with CSR. Call riscv_csr_read_only_check
191 after parsing all arguments.
192 (enum csr_insn_type): New enum is used to classify the CSR instruction.
193 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
194 are used to check if we write a read-only CSR by the CSR instruction.
195 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
196 all CSR for the read-only CSR checking.
197 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
198 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
199 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
200 all CSR instructions for the read-only CSR checking.
201 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
202 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
203
2ca89224
NC		 204 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
205 (riscv_opts): Initialize it.
206 (reg_lookup_internal): Check the `riscv_opts.csr_check`
207 before doing the CSR checking.
208 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
209 (md_longopts): Add mcsr-check and mno-csr-check.
210 (md_parse_option): Handle new enum option values.
211 (s_riscv_option): Handle new long options.
212 * doc/c-riscv.texi: Add description for the new .option and assembler
213 options.
214 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
215 the CSR checking.
216 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
217
bd0cf5a6
NC		 218 * config/tc-riscv.c (csr_extra_hash): New.
219 (enum riscv_csr_class): New enum. Used to decide
220 whether or not this CSR is legal in the current ISA string.
221 (struct riscv_csr_extra): New structure to hold all extra information
222 of CSR.
223 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
224 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
225 Call hash_reg_name to insert CSR address into reg_names_hash.
226 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
227 Decide whether the CSR is valid according to the csr_extra_hash.
228 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
229 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
230 not a boolean. This is same as riscv_init_csr_hash, so keep the
231 consistent usage.
232 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
233 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
234 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
235 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
236 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
237 f-ext CSR are not allowed.
238 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
239 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
240 source file is `priv-reg.s`, and the ISA is rv64if, so the
241 rv32-only CSR are not allowed.
242 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
243
10a95fcc
AM		 2442020-02-21 Alan Modra <amodra@gmail.com>
245
246 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
247 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
248
dda2980f
AM		 2492020-02-21 Alan Modra <amodra@gmail.com>
250
251 PR 25569
252 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
253 on section size adjustment, instead perform another write if
254 exec header size is larger than section size.
255
bd3380bc
NC		 2562020-02-19 Nelson Chu <nelson.chu@sifive.com>
257
258 * doc/c-riscv.texi: Add the doc entries for -march-attr/
259 -mno-arch-attr command line options.
260
fa164239
JW		 2612020-02-19 Nelson Chu <nelson.chu@sifive.com>
262
263 * testsuite/gas/riscv/c-add-addi.d: New testcase.
264 * testsuite/gas/riscv/c-add-addi.s: Likewise.
265
fcaaac0a
SB		 2662020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
267
268 PR 25576
269 * config/tc-z80.c (md_parse_option): Do not use an underscore
270 prefix for local labels in SDCC compatability mode.
271 (z80_start_line_hook): Remove SDCC dollar label support.
272 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
273 * testsuite/gas/z80/sdcc.s: Likewise.
274
2752020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
276
277 PR 25517
278 * config/tc-z80.c: Add -march option.
279 * doc/as.texi: Update Z80 documentation.
280 * doc/c-z80.texi: Likewise.
281 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
282 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
283 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
284 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
285 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
286 * testsuite/gas/z80/gbz80_all.d: Likewise.
287 * testsuite/gas/z80/r800_extra.d: Likewise.
288 * testsuite/gas/z80/r800_ii8.d: Likewise.
289 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
290 * testsuite/gas/z80/sdcc.d: Likewise.
291 * testsuite/gas/z80/z180.d: Likewise.
292 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
293 * testsuite/gas/z80/z80_doc.d: Likewise.
294 * testsuite/gas/z80/z80_ii8.d: Likewise.
295 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
296 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
297 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
298 * testsuite/gas/z80/z80_sli.d: Likewise.
299 * testsuite/gas/z80/z80n_all.d: Likewise.
300 * testsuite/gas/z80/z80n_reloc.d: Likewise.
301
a7e12755
L		 3022020-02-19 H.J. Lu <hongjiu.lu@intel.com>
303
304 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
305 with GNU_PROPERTY_X86_FEATURE_2_MMX.
306 * testsuite/gas/i386/i386.exp: Run property-3 and
307 x86-64-property-3.
308 * testsuite/gas/i386/property-3.d: New file.
309 * testsuite/gas/i386/property-3.s: Likewise.
310 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
311
272a84b1
L		 3122020-02-17 H.J. Lu <hongjiu.lu@intel.com>
313
314 * config/tc-i386.c (cpu_arch): Add .popcnt.
315 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
316 Add a tab before @samp{.sse4a}.
317
c8f8eebc
JB		 3182020-02-17 Jan Beulich <jbeulich@suse.com>
319
320 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
321 for AddrPrefixOpReg templates. Combine the two pieces of
322 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
323 mode.
324
eedb0f2c
JB		 3252020-02-17 Jan Beulich <jbeulich@suse.com>
326
327 PR gas/14439
328 * config/tc-i386.c (md_assemble): Also suppress operand
329 swapping for MONITOR{,X} and MWAIT{,X}.
330 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
331 Add Intel syntax monitor/mwait tests.
332 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
333 Adjust expectations.
334 *testsuite/gas/i386/sse3-intel.d,
335 testsuite/gas/i386/x86-64-sse3-intel.d: New.
336 * testsuite/gas/i386/i386.exp: Run new tests.
337
b9915cbc
JB		 3382020-02-17 Jan Beulich <jbeulich@suse.com>
339
340 PR gas/6518
341 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
342 [XYZ]MMWord memory operand ambiguity recognition logic (largely
343 re-indentation).
344 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
345 cases.
346 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
347 * testsuite/gas/i386/avx512dq-inval.l,
348 testsuite/gas/i386/inval-avx.l,
349 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
350 * testsuite/gas/i386/avx512vl-ambig.s,
351 testsuite/gas/i386/avx512vl-ambig.l: New.
352 * testsuite/gas/i386/i386.exp: Run new test.
353
af5c13b0
L		 3542020-02-16 H.J. Lu <hongjiu.lu@intel.com>
355
356 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
357 nosse4.
358 * doc/c-i386.texi: Document sse4a and nosse4a.
359
07d98387
L		 3602020-02-14 H.J. Lu <hongjiu.lu@intel.com>
361
362 * doc/c-i386.texi: Remove the old movsx and movzx documentation
363 for AT&T syntax.
364
65fca059
JB		 3652020-02-14 Jan Beulich <jbeulich@suse.com>
366
367 PR gas/25438
368 * config/tc-i386.c (md_assemble): Move movsx/movzx special
369 casing ...
370 (process_suffix): ... here. Consider just the first operand
371 initially.
372 (check_long_reg): Drop opcode 0x63 special case again.
373 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
374 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
375 Move ambiguous operand size tests ...
376 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
377 testsuite/gas/i386/noreg64.s: ... here.
378 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
379 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
380 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
381 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
382 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
383 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
384 testsuite/gas/i386/x86-64-movsxd.d,
385 testsuite/gas/i386/x86-64-movsxd-intel.d,
386 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
387 Adjust expectations.
388 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
389 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
390 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
391 * testsuite/gas/i386/i386.exp: Run new tests.
392
b6773884
JB		 3932020-02-14 Jan Beulich <jbeulich@suse.com>
394
395 * config/tc-i386.c (process_operands): Also skip segment
396 override prefix emission if it matches an already present one.
397 * testsuite/gas/i386/prefix32.s: Add double segment override
398 cases.
399 * testsuite/gas/i386/prefix32.l: Adjust expectations.
400
92334ad2
JB		 4012020-02-14 Jan Beulich <jbeulich@suse.com>
402
403 * config/tc-i386.c (process_operands): Drop ineffectual segment
404 overrides when optimizing.
405 * testsuite/gas/i386/lea-optimize.d: New.
406 * testsuite/gas/i386/i386.exp: Run new test.
407
4082020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB		 409
410 * config/tc-i386.c (process_operands): Also check insn prefix
411 for ineffectual segment override warning. Don't cover possible
412 VEX/EVEX encoded insns there.
413 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
414 testsuite/gas/i386/lea.e: New.
415 * testsuite/gas/i386/i386.exp: Run new test.
416
0e6724de
L		 4172020-02-14 H.J. Lu <hongjiu.lu@intel.com>
418
419 PR gas/25438
420 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
421 syntax.
422
292676c1
L		 4232020-02-13 Fangrui Song <maskray@google.com>
424 H.J. Lu <hongjiu.lu@intel.com>
425
426 PR gas/25551
427 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
428 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
429 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
430 * testsuite/gas/i386/relax-5.d: New file.
431 * testsuite/gas/i386/relax-5.s: Likewise.
432 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
433 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
434
7deea9aa
JB		 4352020-02-13 Jan Beulich <jbeulich@suse.com>
436
437 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
438 "nosse4" entry.
439
6c0946d0
JB		 4402020-02-12 Jan Beulich <jbeulich@suse.com>
441
442 * config/tc-i386.c (avx512): New (at file scope), moved from
443 (check_VecOperands): ... here.
444 (process_suffix): Add [XYZ]MMword operand size handling.
445 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
446 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
447 tests.
448 * testsuite/gas/i386/avx512dq-inval.l,
449 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
450
5990e377
JB		 4512020-02-12 Jan Beulich <jbeulich@suse.com>
452
453 PR gas/24546
454 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
455 code only.
456 * config/tc-i386-intel.c (i386_intel_operand): Also handle
457 CALL/JMP in O_tbyte_ptr case.
458 * doc/c-i386.texi: Mention far call and full pointer load ISA
459 differences.
460 * testsuite/gas/i386/x86-64-branch-3.s,
461 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
462 * testsuite/gas/i386/x86-64-branch-3.d,
463 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
464 * testsuite/gas/i386/x86-64-branch-5.l,
465 testsuite/gas/i386/x86-64-branch-5.s: New.
466 * testsuite/gas/i386/i386.exp: Run new test.
467
9706160a
JB		 4682020-02-12 Jan Beulich <jbeulich@suse.com>
469
470 PR gas/25438
471 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
472 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
473 64-bit-only warning.
474 (check_word_reg): Consistently error on mismatching register
475 size and suffix.
476 * testsuite/gas/i386/general.s: Replace dword GPR with word one
477 for movw. Replace suffix / GPR for orb.
478 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
479 byte GPRs as well as ones for inb/outb with a word accumulator.
480 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
481 testsuite/gas/i386/inval.l: Adjust expectations.
482
5de4d9ef
JB		 4832020-02-12 Jan Beulich <jbeulich@suse.com>
484
485 * config/tc-i386.c (operand_type_register_match): Also fall
486 through initial two if()-s when the template allows for a GPR
487 operand. Adjust comment.
488
50128d0c
JB		 4892020-02-11 Jan Beulich <jbeulich@suse.com>
490
491 (struct _i386_insn): New field "short_form".
492 (optimize_encoding): Drop setting of shortform field.
493 (process_suffix): Set i.short_form. Replace shortform use.
494 (process_operands): Replace shortform use.
495
1ed818b4
MM		 4962020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
497
498 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
499 loop initial declaration.
500
5aae9ae9
MM		 5012020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
502
503 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
504 instructions that can have 5 arguments.
505 (enum operand_parse_code): Add new operands.
506 (parse_operands): Account for new operands.
507 (S5): New macro.
508 (enum neon_shape_el): Introduce P suffixes for coprocessor.
509 (neon_select_shape): Account for P suffix.
510 (LOW1): Move macro to global position.
511 (HI4): Move macro to global position.
512 (vcx_assign_vec_d): New.
513 (vcx_assign_vec_m): New.
514 (vcx_assign_vec_n): New.
515 (enum vcx_reg_type): New.
516 (vcx_get_reg_type): New.
517 (vcx_size_pos): New.
518 (vcx_vec_pos): New.
519 (vcx_handle_shape): New.
520 (vcx_ensure_register_in_range): New.
521 (vcx_handle_register_arguments): New.
522 (vcx_handle_insn_block): New.
523 (vcx_handle_common_checks): New.
524 (do_vcx1): New.
525 (do_vcx2): New.
526 (do_vcx3): New.
527 * testsuite/gas/arm/cde-missing-fp.d: New test.
528 * testsuite/gas/arm/cde-missing-fp.l: New test.
529 * testsuite/gas/arm/cde-missing-mve.d: New test.
530 * testsuite/gas/arm/cde-missing-mve.l: New test.
531 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
532 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
533 * testsuite/gas/arm/cde-mve.s: New test.
534 * testsuite/gas/arm/cde-warnings.l:
535 * testsuite/gas/arm/cde-warnings.s:
536 * testsuite/gas/arm/cde.d:
537 * testsuite/gas/arm/cde.s:
538
4934a27c
MM		 5392020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
540 Matthew Malcomson <matthew.malcomson@arm.com>
541
542 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
543 CDE coprocessor that can be enabled.
544 (enum pred_instruction_type): New pred type.
545 (BAD_NO_VPT): New error message.
546 (BAD_CDE): New error message.
547 (BAD_CDE_COPROC): New error message.
548 (enum operand_parse_code): Add new immediate operands.
549 (parse_operands): Account for new immediate operands.
550 (check_cde_operand): New.
551 (cde_coproc_enabled): New.
552 (cde_coproc_pos): New.
553 (cde_handle_coproc): New.
554 (cxn_handle_predication): New.
555 (do_custom_instruction_1): New.
556 (do_custom_instruction_2): New.
557 (do_custom_instruction_3): New.
558 (do_cx1): New.
559 (do_cx1a): New.
560 (do_cx1d): New.
561 (do_cx1da): New.
562 (do_cx2): New.
563 (do_cx2a): New.
564 (do_cx2d): New.
565 (do_cx2da): New.
566 (do_cx3): New.
567 (do_cx3a): New.
568 (do_cx3d): New.
569 (do_cx3da): New.
570 (handle_pred_state): Define new IT block behaviour.
571 (insns): Add newn CX*{,d}{,a} instructions.
572 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
573 Define new cdecp extension strings.
574 * doc/c-arm.texi: Document new cdecp extension arguments.
575 * testsuite/gas/arm/cde-scalar.d: New test.
576 * testsuite/gas/arm/cde-scalar.s: New test.
577 * testsuite/gas/arm/cde-warnings.d: New test.
578 * testsuite/gas/arm/cde-warnings.l: New test.
579 * testsuite/gas/arm/cde-warnings.s: New test.
580 * testsuite/gas/arm/cde.d: New test.
581 * testsuite/gas/arm/cde.s: New test.
582
4b5aaf5f
L		 5832020-02-10 H.J. Lu <hongjiu.lu@intel.com>
584
585 PR gas/25516
586 * config/tc-i386.c (intel64): Renamed to ...
587 (isa64): This.
588 (match_template): Accept Intel64 only instruction by default.
589 (i386_displacement): Updated.
590 (md_parse_option): Updated.
591 * c-i386.texi: Update -mamd64/-mintel64 documentation.
592 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
593 -mamd64 to x86-64-sysenter-amd.
594 * testsuite/gas/i386/x86-64-sysenter.d: New file.
595
33176d91
AM		 5962020-02-10 Alan Modra <amodra@gmail.com>
597
598 * config/obj-elf.c (obj_elf_change_section): Error for section
599 type, attr or entsize changes in assembly.
600 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
601 * testsuite/gas/elf/section5.l: Update.
602
82194874
AM		 6032020-02-10 Alan Modra <amodra@gmail.com>
604
605 * output-file.c (output_file_close): Do a normal close when
606 flag_always_generate_output.
607 * write.c (write_object_file): Don't stop output when
608 flag_always_generate_output.
609
9fc0b501
SB		 6102020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
611
612 PR 25469
613 * config/tc-z80.c: Add -gbz80 command line option to generate code
614 for the GameBoy Z80. Add support for generating DWARF.
615 * config/tc-z80.h: Add support for DWARF debug information
616 generation.
617 * doc/c-z80.texi: Document new command line option.
618 * testsuite/gas/z80/gbz80_all.d: New file.
619 * testsuite/gas/z80/gbz80_all.s: New file.
620 * testsuite/gas/z80/z80.exp: Run the new tests.
621 * testsuite/gas/z80/z80n_all.d: New file.
622 * testsuite/gas/z80/z80n_all.s: New file.
623 * testsuite/gas/z80/z80n_reloc.d: New file.
624
b7d07216
L		 6252020-02-06 H.J. Lu <hongjiu.lu@intel.com>
626
627 PR gas/25381
628 * config/obj-elf.c (get_section): Also check
629 linked_to_symbol_name.
630 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
631 (obj_elf_parse_section_letters): Handle the 'o' flag.
632 (build_group_lists): Renamed to ...
633 (build_additional_section_info): This. Set elf_linked_to_section
634 from map_head.linked_to_symbol_name.
635 (elf_adjust_symtab): Updated.
636 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
637 * doc/as.texi: Document the 'o' flag.
638 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
639 * testsuite/gas/elf/section18.d: New file.
640 * testsuite/gas/elf/section18.s: Likewise.
641 * testsuite/gas/elf/section19.d: Likewise.
642 * testsuite/gas/elf/section19.s: Likewise.
643 * testsuite/gas/elf/section20.d: Likewise.
644 * testsuite/gas/elf/section20.s: Likewise.
645 * testsuite/gas/elf/section21.d: Likewise.
646 * testsuite/gas/elf/section21.l: Likewise.
647 * testsuite/gas/elf/section21.s: Likewise.
648
5eb617a7
L		 6492020-02-06 H.J. Lu <hongjiu.lu@intel.com>
650
651 * NEWS: Mention x86 assembler options to align branches for
652 binutils 2.34.
653
986ac314
L		 6542020-02-06 H.J. Lu <hongjiu.lu@intel.com>
655
656 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
657 only for ELF targets.
658 * testsuite/gas/i386/unique.d: Don't xfail.
659 * testsuite/gas/i386/x86-64-unique.d: Likewise.
660
19234a6d
AM		 6612020-02-06 Alan Modra <amodra@gmail.com>
662
663 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
664 * testsuite/gas/i386/x86-64-unique.d: Likewise.
665
02e0be69
AM		 6662020-02-06 Alan Modra <amodra@gmail.com>
667
668 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
669 xfail, and rename test.
670 * testsuite/gas/elf/section12b.d: Likewise.
671 * testsuite/gas/elf/section16a.d: Likewise.
672 * testsuite/gas/elf/section16b.d: Likewise.
673
a8c4d40b
L		 6742020-02-02 H.J. Lu <hongjiu.lu@intel.com>
675
676 PR gas/25380
677 * config/obj-elf.c (section_match): Removed.
678 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
679 section_id.
680 (obj_elf_change_section): Replace info and group_name arguments
681 with match_p. Also update the section ID and flags from match_p.
682 (obj_elf_section): Handle "unique,N". Update call to
683 obj_elf_change_section.
684 * config/obj-elf.h (elf_section_match): New.
685 (obj_elf_change_section): Updated.
686 * config/tc-arm.c (start_unwind_section): Update call to
687 obj_elf_change_section.
688 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
689 * config/tc-microblaze.c (microblaze_s_data): Likewise.
690 (microblaze_s_sdata): Likewise.
691 (microblaze_s_rdata): Likewise.
692 (microblaze_s_bss): Likewise.
693 * config/tc-mips.c (s_change_section): Likewise.
694 * config/tc-msp430.c (msp430_profiler): Likewise.
695 * config/tc-rx.c (parse_rx_section): Likewise.
696 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
697 * doc/as.texi: Document "unique,N" in .section directive.
698 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
699 * testsuite/gas/elf/section15.d: New file.
700 * testsuite/gas/elf/section15.s: Likewise.
701 * testsuite/gas/elf/section16.s: Likewise.
702 * testsuite/gas/elf/section16a.d: Likewise.
703 * testsuite/gas/elf/section16b.d: Likewise.
704 * testsuite/gas/elf/section17.d: Likewise.
705 * testsuite/gas/elf/section17.l: Likewise.
706 * testsuite/gas/elf/section17.s: Likewise.
707 * testsuite/gas/i386/unique.d: Likewise.
708 * testsuite/gas/i386/unique.s: Likewise.
709 * testsuite/gas/i386/x86-64-unique.d: Likewise.
710 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
711
575d37ae
L		 7122020-02-02 H.J. Lu <hongjiu.lu@intel.com>
713
714 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
715
2384096c
G		 7162020-02-01 Anthony Green <green@moxielogic.com>
717
718 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
719
95441c43
SL		 7202020-01-31 Sandra Loosemore <sandra@codesourcery.com>
721
722 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
723 %tls_ldo.
724
d465d695
AV		 7252020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
726
727 PR gas/25472
728 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
729 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
730 +mve.
731 * testsuite/gas/arm/mve_dsp.d: New test.
732
d26cc8a9
NC		 7332020-01-31 Nick Clifton <nickc@redhat.com>
734
735 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
736 rather than BFD_RELOC_NONE.
737
90e9955a
SP		 7382020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
739
740 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
741 to support VLDMIA instruction for MVE.
742 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
743 instruction for MVE.
744 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
745 instruction for MVE.
746 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
747 instruction for MVE.
748 * testsuite/gas/arm/mve-ldst.d: New test.
749 * testsuite/gas/arm/mve-ldst.s: Likewise.
750
53943f32
NC		 7512020-01-31 Nick Clifton <nickc@redhat.com>
752
753 * po/fr.po: Updated French translation.
754 * po/ru.po: Updated Russian translation.
755
c3036ed0
RS		 7562020-01-31 Richard Sandiford <richard.sandiford@arm.com>
757
758 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
759 .s for the movprfx.
760 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
761 * testsuite/gas/aarch64/sve-movprfx_28.d,
762 * testsuite/gas/aarch64/sve-movprfx_28.l,
763 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
764
2ae4c703
JB		 7652020-01-30 Jan Beulich <jbeulich@suse.com>
766
767 * config/tc-i386.c (output_disp): Tighten base_opcode check.
768 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
769 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
770 Adjust expectations.
771
bd434cc4
JM		 7722020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
773
774 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
775 * testsuite/gas/bpf/alu-be.d: Likewise.
776 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
777 * testsuite/gas/bpf/alu32-be.d: Likewise.
778
aeab2b26
JB		 7792020-01-30 Jan Beulich <jbeulich@suse.com>
780
781 * testsuite/gas/i386/x86-64-branch-2.s,
782 testsuite/gas/i386/x86-64-branch-4.s,
783 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
784 * testsuite/gas/i386/ilp32/x86-64-branch.d,
785 testsuite/gas/i386/x86-64-branch-2.d,
786 testsuite/gas/i386/x86-64-branch-4.l,
787 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
788
873494c8
JB		 7892020-01-30 Jan Beulich <jbeulich@suse.com>
790
791 * config/tc-i386.c (process_suffix): .
792 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
793 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
794 Add LRETQ case.
795 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
796 suffix.
797 testsuite/gas/i386/x86_64.s: Add RETF cases.
798 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
799 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
800 testsuite/gas/i386/x86-64-opcode.d,
801 testsuite/gas/i386/x86-64-suffix-intel.d,
802 testsuite/gas/i386/x86-64-suffix.d,
803 testsuite/gas/i386/x86_64-intel.d
804 testsuite/gas/i386/x86_64.d: Adjust expectations.
805 * testsuite/gas/i386/x86-64-suffix.e,
806 testsuite/gas/i386/x86_64.e: New.
807
62b3f548
JB		 8082020-01-30 Jan Beulich <jbeulich@suse.com>
809
810 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
811 special case.
812
bc31405e
L		 8132020-01-27 H.J. Lu <hongjiu.lu@intel.com>
814
815 PR binutils/25445
816 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
817 movsxd.
818 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
819 differences. Document movslq and movsxd.
820 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
821 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
822 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
823 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
824 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
825 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
826 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
827 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
828 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
829 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
830 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
831
e3696f67
AM		 8322020-01-27 Alan Modra <amodra@gmail.com>
833
834 * testsuite/gas/all/gas.exp: Replace case statements with switch
835 statements.
836 * testsuite/gas/elf/elf.exp: Likewise.
837 * testsuite/gas/macros/macros.exp: Likewise.
838 * testsuite/lib/gas-defs.exp: Likewise.
839
7568c93b
TC		 8402020-01-27 Tamar Christina <tamar.christina@arm.com>
841
842 PR 25403
843 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
844 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
845
403d1bd9
JW		 8462020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
847
848 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
849 s exts must be known, so rename *ok* to *fail*.
850 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
851 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
852 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
853 above change.
854 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
855 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
856
be4c5e58
L		 8572020-01-22 H.J. Lu <hongjiu.lu@intel.com>
858
859 PR gas/25438
860 * config/tc-i386.c (check_long_reg): Always disallow double word
861 suffix in mnemonic with word general register.
862 * testsuite/gas/i386/general.s: Replace word general register
863 with double word general register for movl.
864 * testsuite/gas/i386/inval.s: Add tests for movl with word general
865 register.
866 * testsuite/gas/i386/general.l: Updated.
867 * testsuite/gas/i386/inval.l: Likewise.
868
9e7028aa
AM		 8692020-01-22 Alan Modra <amodra@gmail.com>
870
871 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
872 __tls_get_addr_desc and __tls_get_addr_opt.
873
e3ed17f3
JB		 8742020-01-21 Jan Beulich <jbeulich@suse.com>
875
876 * testsuite/gas/i386/inval-crc32.s,
877 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
878 * testsuite/gas/i386/inval-crc32.l,
879 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
880
1a035124
JB		 8812020-01-21 Jan Beulich <jbeulich@suse.com>
882
883 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
884 generic code path. Deal with No_lSuf being set in a template.
885 * testsuite/gas/i386/inval-crc32.l,
886 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
887 instead of error(s) when operand size is ambiguous.
888 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
889 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
890 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
891 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
892 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
893 Adjust expectations.
894
c006a730
JB		 8952020-01-21 Jan Beulich <jbeulich@suse.com>
896
897 * config/tc-i386.c (process_suffix): Drop SYSRET special case
898 and an intel_syntax check. Re-write lack-of-suffix processing
899 logic.
900 * doc/c-i386.texi: Document operand size defaults for suffix-
901 less AT&T syntax insns.
902 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
903 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
904 testsuite/gas/i386/x86-64-avx-scalar.s,
905 testsuite/gas/i386/x86-64-avx.s,
906 testsuite/gas/i386/x86-64-bundle.s,
907 testsuite/gas/i386/x86-64-intel64.s,
908 testsuite/gas/i386/x86-64-lock-1.s,
909 testsuite/gas/i386/x86-64-opcode.s,
910 testsuite/gas/i386/x86-64-sse2avx.s,
911 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
912 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
913 testsuite/gas/i386/x86-64-nops.s,
914 testsuite/gas/i386/x86-64-ptwrite.s,
915 testsuite/gas/i386/x86-64-simd.s,
916 testsuite/gas/i386/x86-64-sse-noavx.s,
917 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
918 insns.
919 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
920 testsuite/gas/i386/noreg64.s: Add further tests.
921 * testsuite/gas/i386/ilp32/x86-64-nops.d,
922 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
923 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
924 testsuite/gas/i386/sse-noavx.d,
925 testsuite/gas/i386/x86-64-intel64.d,
926 testsuite/gas/i386/x86-64-nops.d,
927 testsuite/gas/i386/x86-64-opcode.d,
928 testsuite/gas/i386/x86-64-ptwrite-intel.d,
929 testsuite/gas/i386/x86-64-ptwrite.d,
930 testsuite/gas/i386/x86-64-simd-intel.d,
931 testsuite/gas/i386/x86-64-simd-suffix.d,
932 testsuite/gas/i386/x86-64-simd.d,
933 testsuite/gas/i386/x86-64-sse-noavx.d
934 testsuite/gas/i386/x86-64-suffix.d,
935 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
936 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
937 testsuite/gas/i386/noreg64.l: New.
938 * testsuite/gas/i386/i386.exp: Run new tests.
939
c906a69a
JB		 9402020-01-21 Jan Beulich <jbeulich@suse.com>
941
942 * testsuite/gas/i386/avx512_bf16_vl.s,
943 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
944 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
945 broadcast forms of VCVTNEPS2BF16.
946 * testsuite/gas/i386/avx512_bf16_vl.d,
947 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
948
26916852
NC		 9492020-01-20 Nick Clifton <nickc@redhat.com>
950
951 * po/uk.po: Updated Ukranian translation.
952
14470f07
L		 9532020-01-20 H.J. Lu <hongjiu.lu@intel.com>
954
955 PR ld/25416
956 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
957 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
958 x32 object.
959 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
960 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
961 R_X86_64_GOTPC32_TLSDESC relocation.
962
1b1bb2c6
NC		 9632020-01-18 Nick Clifton <nickc@redhat.com>
964
965 * configure: Regenerate.
966 * po/gas.pot: Regenerate.
967
ae774686
NC		 9682020-01-18 Nick Clifton <nickc@redhat.com>
969
970 Binutils 2.34 branch created.
971
42e04b36
L		 9722020-01-17 H.J. Lu <hongjiu.lu@intel.com>
973
974 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
975 with vex_encoding_vex.
976 (parse_insn): Likewise.
977 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
978 and {vex3} documentation.
979 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
980 {vex}.
981 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
982
2da2eaf4
AV		 9832020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
984
985 PR 25376
986 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
987 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
988 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
989 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
990 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
991 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
992
45a4bb20
JB		 9932020-01-16 Jan Beulich <jbeulich@suse.com>
994
995 * config/tc-i386.c (match_template): Drop found_cpu_match local
996 variable.
997
4814632e
JB		 9982020-01-16 Jan Beulich <jbeulich@suse.com>
999
1000 * testsuite/gas/i386/avx512dq-inval.l,
1001 testsuite/gas/i386/avx512dq-inval.s: New.
1002 * testsuite/gas/i386/i386.exp: Run new test.
1003
131cb553
JL		 10042020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1005
1006 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1007 relocations when the target is 430X, except when extracting part of an
1008 expression.
1009 (msp430_srcoperand): Adjust comment.
1010 Initialize the expp member of the msp430_operand_s struct as
1011 appropriate.
1012 (msp430_dstoperand): Likewise.
1013 * testsuite/gas/msp430/msp430.exp: Run new test.
1014 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1015 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1016
c24d0e8d
AM		 10172020-01-15 Alan Modra <amodra@gmail.com>
1018
1019 * configure.tgt: Add sparc-*-freebsd case.
1020
e44925ae
LC		 10212020-01-14 Lili Cui <lili.cui@intel.com>
1022
1023 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1024 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1025 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1026 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1027 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1028 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1029 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1030 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1031 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1032 * testsuite/gas/i386/align-branch-5.d: Likewise.
1033 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1034 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1035 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1036 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1037 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1038 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1039 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1040 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1041 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1042 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1043 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1044 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1045
7a6bf3be
SB		 10462020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1047
1048 PR 25377
1049 * config/tc-z80.c: Add support for half precision, single
1050 precision and double precision floating point values.
1051 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1052 * doc/as.texi: Add new z80 command line options.
1053 * doc/c-z80.texi: Document new z80 command line options.
1054 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1055 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1056 * testsuite/gas/z80/z80.exp: Run the new test.
1057 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1058 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1059 * testsuite/gas/z80/strings.d: Update expected output.
1060
82e9597c
MM		 10612020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1062
1063 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1064 dependency.
1065
5e4f7e05
CZ		 10662020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1067
1068 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1069 the CPU.
1070 * config/tc-arc.h: Add header if/defs.
1071 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1072
febda64f
AM		 10732020-01-13 Alan Modra <amodra@gmail.com>
1074
1075 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1076
5496abe1
AM		 10772020-01-13 Alan Modra <amodra@gmail.com>
1078
1079 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1080 insertion.
1081
ec4181f2
AM		 10822020-01-10 Alan Modra <amodra@gmail.com>
1083
1084 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1085 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1086
40c75bc8
SB		 10872020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1088
1089 PR 25224
1090 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1091 opcode byte values.
1092 (emit_ld_r_r): Likewise.
1093 (emit_ld_rr_m): Likewise.
1094 (emit_ld_rr_nn): Likewise.
1095
72aea328
JB		 10962020-01-09 Jan Beulich <jbeulich@suse.com>
1097
1098 * config/tc-i386.c (optimize_encoding): Add
1099 is_any_vex_encoding() invocations. Drop respective
1100 i.tm.extension_opcode == None checks.
1101
3f93af61
JB		 11022020-01-09 Jan Beulich <jbeulich@suse.com>
1103
1104 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1105 REX transformations. Correct comment indentation.
1106
7697afb6
JB		 11072020-01-09 Jan Beulich <jbeulich@suse.com>
1108
1109 * config/tc-i386.c (optimize_encoding): Generalize register
1110 transformation for TEST optimization.
1111
d835a58b
JB		 11122020-01-09 Jan Beulich <jbeulich@suse.com>
1113
1114 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1115 testsuite/gas/i386/x86-64-sysenter-amd.d,
1116 testsuite/gas/i386/x86-64-sysenter-amd.l,
1117 testsuite/gas/i386/x86-64-sysenter-intel.d,
1118 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1119 * testsuite/gas/i386/i386.exp: Run new tests.
1120
915808f6
NC		 11212020-01-08 Nick Clifton <nickc@redhat.com>
1122
1123 PR 25284
1124 * doc/as.texi (Align): Document the fact that all arguments can be
1125 omitted.
1126 (Balign): Likewise.
1127 (P2align): Likewise.
1128
f1f28025
NC		 11292020-01-08 Nick Clifton <nickc@redhat.com>
1130
1131 PR 14891
1132 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1133 already defined as a different symbol type.
1134 * testsuite/gas/elf/pr14891.s: New test source file.
1135 * testsuite/gas/elf/pr14891.d: New test driver.
1136 * testsuite/gas/elf/pr14891.s: New test expected error output.
1137 * testsuite/gas/elf/elf.exp: Run the new test.
1138
030a2e78
AM		 11392020-01-08 Alan Modra <amodra@gmail.com>
1140
1141 * config/tc-z8k.c (md_begin): Make idx unsigned.
1142 (get_specific): Likewise for this_index.
1143
2a1ebfb2
CZ		 11442020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1145
1146 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1147 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1148 (md_operand): Set X_md to absent.
1149 (arc_parse_name): Check for X_md.
1150
16d87673
SB		 11512020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1152
1153 PR 25311
1154 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1155 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1156 NO_STRING_ESCAPES.
1157 * read.c (next_char_of_string): Likewise.
1158 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1159 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1160
a2322019
NC		 11612020-01-03 Nick Clifton <nickc@redhat.com>
1162
1163 * po/sv.po: Updated Swedish translation.
1164
5437a02a
JB		 11652020-01-03 Jan Beulich <jbeulich@suse.com>
1166
1167 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1168 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1169
567dfba2
JB		 11702020-01-03 Jan Beulich <jbeulich@suse.com>
1171
1172 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1173 by-element usdot. Add 64-bit form tests for by-element sudot.
1174 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1175
8c45011a
JB		 11762020-01-03 Jan Beulich <jbeulich@suse.com>
1177
1178 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1179 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1180
f4950f76
JB		 11812020-01-03 Jan Beulich <jbeulich@suse.com>
1182
1183 * testsuite/gas/aarch64/f64mm.d,
1184 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1185
6655dba2
SB		 11862020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1187
1188 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1189 support for assembler code generated by SDCC. Add new relocation
1190 types. Add z80-elf target support.
1191 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1192 labels. Local labels starts from ".L".
1193 * NEWS: Mention the new support.
1194 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1195 * testsuite/gas/all/fwdexp.s: Likewise.
1196 * testsuite/gas/all/cond.l: Likewise.
1197 * testsuite/gas/all/cond.s: Likewise.
1198 * testsuite/gas/all/fwdexp.d: Likewise.
1199 * testsuite/gas/all/fwdexp.s: Likewise.
1200 * testsuite/gas/elf/section2.e-mips: Likewise.
1201 * testsuite/gas/elf/section2.l: Likewise.
1202 * testsuite/gas/elf/section2.s: Likewise.
1203 * testsuite/gas/macros/app1.d: Likewise.
1204 * testsuite/gas/macros/app1.s: Likewise.
1205 * testsuite/gas/macros/app2.d: Likewise.
1206 * testsuite/gas/macros/app2.s: Likewise.
1207 * testsuite/gas/macros/app3.d: Likewise.
1208 * testsuite/gas/macros/app3.s: Likewise.
1209 * testsuite/gas/macros/app4.d: Likewise.
1210 * testsuite/gas/macros/app4.s: Likewise.
1211 * testsuite/gas/macros/app4b.s: Likewise.
1212 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1213 * testsuite/gas/z80/z80.exp: Add new tests
1214 * testsuite/gas/z80/dollar.d: New file.
1215 * testsuite/gas/z80/dollar.s: New file.
1216 * testsuite/gas/z80/ez80_adl_all.d: New file.
1217 * testsuite/gas/z80/ez80_adl_all.s: New file.
1218 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1219 * testsuite/gas/z80/ez80_isuf.s: New file.
1220 * testsuite/gas/z80/ez80_z80_all.d: New file.
1221 * testsuite/gas/z80/ez80_z80_all.s: New file.
1222 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1223 * testsuite/gas/z80/r800_extra.d: New file.
1224 * testsuite/gas/z80/r800_extra.s: New file.
1225 * testsuite/gas/z80/r800_ii8.d: New file.
1226 * testsuite/gas/z80/r800_z80_doc.d: New file.
1227 * testsuite/gas/z80/z180.d: New file.
1228 * testsuite/gas/z80/z180.s: New file.
1229 * testsuite/gas/z80/z180_z80_doc.d: New file.
1230 * testsuite/gas/z80/z80_doc.d: New file.
1231 * testsuite/gas/z80/z80_doc.s: New file.
1232 * testsuite/gas/z80/z80_ii8.d: New file.
1233 * testsuite/gas/z80/z80_ii8.s: New file.
1234 * testsuite/gas/z80/z80_in_f_c.d: New file.
1235 * testsuite/gas/z80/z80_in_f_c.s: New file.
1236 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1237 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1238 * testsuite/gas/z80/z80_out_c_0.d: New file.
1239 * testsuite/gas/z80/z80_out_c_0.s: New file.
1240 * testsuite/gas/z80/z80_reloc.d: New file.
1241 * testsuite/gas/z80/z80_reloc.s: New file.
1242 * testsuite/gas/z80/z80_sli.d: New file.
1243 * testsuite/gas/z80/z80_sli.s: New file.
1244
a65b5de6
SN		 12452020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1246
1247 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1248 REGLIST_RN.
1249
b14ce8bf
AM		 12502020-01-01 Alan Modra <amodra@gmail.com>
1251
1252 Update year range in copyright notice of all files.
1253
0b114740 1254For older changes see ChangeLog-2019
3499769a 1255\f
0b114740 1256Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM		 1257
1258Copying and distribution of this file, with or without modification,
1259are permitted in any medium without royalty provided the copyright
1260notice and this notice are preserved.
1261
1262Local Variables:
1263mode: change-log
1264left-margin: 8
1265fill-column: 74
1266version-control: never
1267End:
GDB Binutils - Deliverables
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