2008-03-09 Paul Brook <paul@codesourcery.com>
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
b1cc4aeb
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12008-03-09 Paul Brook <paul@codesourcery.com>
2
3 * config/tc-arm.c (fpu_vfp_ext_d32): New vairable.
4 (parse_vfp_reg_list, encode_arm_vfp_reg): Use it.
5 (arm_option_cpu_value): Add vfpv3-d16, vfpv2 and vfpv3.
6 (aeabi_set_public_attributes): Handle Tag_VFP_arch=VFPV3-D16.
7 * doc/c-arm.texi: Document new ARM FPU variants.
8
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92008-03-07 Paul Brook <paul@codesourcery.com>
10
11 * config/tc-arm.c (md_apply_fix): Use correct offset range.
12
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132008-03-07 Alan Modra <amodra@bigpond.net.au>
14
15 * config/tc-ppc.c (ppc_setup_opcodes): Tidy. Add code to test
16 for strict ordering of powerpc_opcodes, but disable for now.
17
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182008-03-04 Paul Brook <paul@codesourcery.com>
19
20 * config/tc-arm.c (arm_ext_barrier, arm_ext_msr): New.
21 (arm_ext_v7m): Rename...
22 (arm_ext_m): ... to this. Include v6-M.
23 (do_t_add_sub): Allow narrow low-reg non flag setting adds.
24 (do_t_mrs, do_t_msr, aeabi_set_public_attributes): Use arm_ext_m.
25 (md_assemble): Allow wide msr instructions.
26 (insns): Add classifications for v6-m instructions.
27 (arm_cpu_option_table): Add cortex-m1.
28 (arm_arch_option_table): Add armv6-m.
29 (cpu_arch): Add ARM_ARCH_V6M. Fix numbering of other v6 variants.
30
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312008-03-03 Sterling Augustine <sterling@tensilica.com>
32 Bob Wilson <bob.wilson@acm.org>
33
34 * config/tc-xtensa.c (xtensa_num_pipe_stages): New.
35 (md_begin): Initialize it.
36 (resources_conflict): Use it.
37
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382008-03-03 Sterling Augustine <sterling@tensilica.com>
39
40 * config/tc-xtensa.h (RELAX_XTENSA_NONE): New.
41
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422008-03-03 Denys Vlasenko <vda.linux@googlemail.com>
43 H.J. Lu <hongjiu.lu@intel.com>
44
45 PR gas/5543
46 * read.c (pseudo_set): Don't allow global register symbol.
47
48 * symbols.c (S_SET_EXTERNAL): Don't allow register symbol
49 global.
50
512008-03-03 H.J. Lu <hongjiu.lu@intel.com>
52
53 PR gas/5543
54 * write.c (write_object_file): Don't allow symbols which were
55 equated to register. Stop if there is an error.
56
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572008-03-01 Alan Modra <amodra@bigpond.net.au>
58
59 * config/tc-ppc.h (struct _ppc_fix_extra): New.
60 (ppc_cpu): Declare.
61 (TC_FIX_TYPE, TC_INIT_FIX_DATA): Define.
62 * config/tc-ppc.c (ppu_cpu): Make global.
63 (ppc_insert_operand): Add ppu_cpu parameter.
64 (md_assemble): Adjust for above change.
65 (md_apply_fix): Pass tc_fix_data.ppc_cpu to ppc_insert_operand.
66
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672008-02-22 Nick Clifton <nickc@redhat.com>
68
69 * config/tc-arm.c (do_bx): Only test EF_ARM_EABI_VERSION on ELF
584206db 70 targeted ARM ports, otherwise just skip generating the reloc.
5ad34203 71
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722008-02-18 H.J. Lu <hongjiu.lu@intel.com>
73
74 * doc/c-i386.texi: Update -march= and .arch.
75
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762008-02-18 Nick Clifton <nickc@redhat.com>
77
78 * config/tc-mn10300.c (has_known_symbol_location): New function.
79 Do not regard weak symbols as having a known location.
80 (md_estimate_size_before_relax): Use new function.
81 (md_pcrel_from): Do not compute a pcrel against a weak symbol.
82
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832008-02-18 Jan Beulich <jbeulich@novell.com>
84
85 * config/tc-i386.c (match_template): Disallow 'l' suffix when
86 currently selected CPU has no 32-bit support.
87 (parse_real_register): Do not return registers not available on
88 currently selected CPU.
89
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902008-02-16 H.J. Lu <hongjiu.lu@intel.com>
91
92 * config/tc-i386.c (process_immext): Fix format.
93
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942008-02-16 H.J. Lu <hongjiu.lu@intel.com>
95
96 * config/tc-i386.c (inoutportreg): New.
97 (process_immext): New.
98 (md_assemble): Use it.
99 (update_imm): Use imm16 and imm32s.
100 (i386_att_operand): Use inoutportreg.
101
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1022008-02-14 H.J. Lu <hongjiu.lu@intel.com>
103
104 * config/tc-i386.c (operand_type_all_zero): New.
105 (operand_type_set): Likewise.
106 (operand_type_equal): Likewise.
107 (cpu_flags_all_zero): Likewise.
108 (cpu_flags_set): Likewise.
109 (cpu_flags_equal): Likewise.
110 (UINTS_ALL_ZERO): Removed.
111 (UINTS_SET): Likewise.
112 (UINTS_CLEAR): Likewise.
113 (UINTS_EQUAL): Likewise.
114 (cpu_flags_match): Updated.
115 (smallest_imm_type): Likewise.
116 (set_cpu_arch): Likewise.
117 (md_assemble): Likewise.
118 (optimize_imm): Likewise.
119 (match_template): Likewise.
120 (process_suffix): Likewise.
121 (update_imm): Likewise.
122 (process_drex): Likewise.
123 (process_operands): Likewise.
124 (build_modrm_byte): Likewise.
125 (i386_immediate): Likewise.
126 (i386_displacement): Likewise.
127 (i386_att_operand): Likewise.
128 (parse_real_register): Likewise.
129 (md_parse_option): Likewise.
130 (i386_target_format): Likewise.
131
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1322008-02-14 Dimitry Andric <dimitry@andric.com>
133
134 PR gas/5712
135 * config/tc-arm.c (s_arm_unwind_save): Advance the input line
136 pointer past the comma after parsing a floating point register
137 name.
138
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1392008-02-14 Hakan Ardo <hakan@debian.org>
140
141 PR gas/2626
142 * config/tc-avr.c (mcu_types): Change the ISA tyoe of the attiny26
143 to AVR_ISA_2xxe.
144 (avr_operand): Disallow post-increment addressing in the lpm
145 instruction for the attiny26.
146
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1472008-02-13 Jan Beulich <jbeulich@novell.com>
148
149 * config/tc-i386.c (parse_real_register): Don't return 'FLAT'
150 if not in Intel mode.
151 (i386_intel_operand): Ignore segment overrides in immediate and
152 offset operands.
153 (intel_e11): Range-check i.mem_operands before use as array
154 index. Filter out FLAT for uses other than as segment override.
155 (intel_get_token): Remove broken promotion of "FLAT:" to mean
156 "offset FLAT:".
157
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1582008-02-13 Jan Beulich <jbeulich@novell.com>
159
160 * config/tc-i386.c (intel_e09): Also special-case 'bound'.
161
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1622008-02-13 Jan Beulich <jbeulich@novell.com>
163
164 * config/tc-i386.c (allow_pseudo_reg): New.
165 (parse_real_register): Check for NULL just once. Allow all
166 register table entries when allow_pseudo_reg is non-zero.
167 Don't allow any registers without type when allow_pseudo_reg
168 is zero.
169 (tc_x86_regname_to_dw2regnum): Replace with ...
170 (tc_x86_parse_to_dw2regnum): ... this.
171 (tc_x86_frame_initial_instructions): Adjust for above change.
172 * config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
173 (tc_parse_to_dw2regnum): New.
174 (tc_x86_regname_to_dw2regnum): Replace with ...
175 (tc_x86_parse_to_dw2regnum): ... this.
176 * dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
177 (cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
178 error handling.
179
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1802008-02-12 Nick Clifton <nickc@redhat.com>
181
182 * config/tc-tic4x.c (tic4x_insn_insert): Add const qualifier to
183 argument.
184 (tic4x_insn_add): Likewise.
185 (md_begin): Drop cast that was discarding a const qualifier.
186 * config/tc-d30v.c (get_reloc): Add const qualifier to op
187 argument.
188 (build_insn): Drop cast that was discarding a const qualifier.
189
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1902008-02-11 H.J. Lu <hongjiu.lu@intel.com>
191
192 * config/tc-i386.c (cpu_arch): Add .xsave.
193 (md_show_usage): Add .xsave.
194
195 * doc/c-i386.texi: Add xsave to -march=.
196
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1972008-02-07 Alan Modra <amodra@bigpond.net.au>
198
199 * read.c (s_weakref): Don't pass unadorned NULL to concat.
200 * config/tc-i386.c (set_cpu_arch, md_parse_option): Likewise.
201
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2022008-02-05 Sterling Augustine <sterling@tensilica.com>
203
204 * config/tc-xtensa.c (relax_frag_immed): Change internal consistency
205 checks into assertions. When relaxation produces an operation that
206 does not fit in the current FLIX instruction, make sure that the
207 operation is relaxed as needed to account for being placed following
208 the current instruction.
209
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2102008-02-04 H.J. Lu <hongjiu.lu@intel.com>
211
212 PR 5715
213 * configure: Regenerated.
214
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2152008-02-04 Adam Nemet <anemet@caviumnetworks.com>
216
217 * config/tc-mips.c (mips_cpu_info_table): Add Octeon.
218
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2192008-01-31 Marc Gauthier <marc@tensilica.com>
220
221 * configure.tgt (xtensa*-*-*): Recognize processor variants.
222
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2232008-01-25 Kai Tietz <kai.tietz@onevision.com>
224
225 * read.c: (emit_expr): Correct for mingw use of printf size
226 specifier.
227
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2282008-01-24 Bob Wilson <bob.wilson@acm.org>
229
230 * doc/c-xtensa.texi (Xtensa Syntax): Clarify handling of opcodes that
231 can only be encoded in FLIX instructions but are not specified as such.
232 (Xtensa Automatic Alignment): Remove obsolete comment about debugging
233 labels.
234
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2352008-01-24 H.J. Lu <hongjiu.lu@intel.com>
236
237 * NEWS: Mention new command line options for x86 targets.
238
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2392008-01-23 H.J. Lu <hongjiu.lu@intel.com>
240
241 * config/tc-i386.c (md_show_usage): Replace tabs with spaces.
242
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2432008-01-23 Eric B. Weddington <eric.weddington@atmel.com>
244
245 * config/tc-avr.c (mcu_types): Change opcode set for at86rf401.
246
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2472008-01-23 H.J. Lu <hongjiu.lu@intel.com>
248
249 * config/tc-i386.c (md_show_usage): Show more processors for
250 -march=/-mtune=.
251
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2522008-01-22 H.J. Lu <hongjiu.lu@intel.com>
253
254 * config/tc-i386.c (i386_target_format): Remove cpummx2.
255
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2562008-01-22 H.J. Lu <hongjiu.lu@intel.com>
257
258 * config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h.
259 (XXX_MNEM_SUFFIX): Likewise.
260 (END_OF_INSN): Likewise.
261 (templates): Likewise.
262 (modrm_byte): Likewise.
263 (rex_byte): Likewise.
264 (DREX_XXX): Likewise.
265 (drex_byte): Likewise.
266 (sib_byte): Likewise.
267 (processor_type): Likewise.
268 (arch_entry): Likewise.
269 (cpu_sub_arch_name): Remove const.
270 (cpu_arch): Add .vmx and .smx.
271 (set_cpu_arch): Append cpu_sub_arch_name.
272 (md_parse_option): Support -march=CPU[,+EXTENSION...].
273 (md_show_usage): Updated.
274
275 * config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c.
276 (XXX_MNEM_SUFFIX): Likewise.
277 (END_OF_INSN): Likewise.
278 (templates): Likewise.
279 (modrm_byte): Likewise.
280 (rex_byte): Likewise.
281 (DREX_XXX): Likewise.
282 (drex_byte): Likewise.
283 (sib_byte): Likewise.
284 (processor_type): Likewise.
285 (arch_entry): Likewise.
286
287 * doc/as.texinfo: Update i386 -march option.
288
289 * doc/c-i386.texi: Update -march= for ISA.
290
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2912008-01-18 Bob Wilson <bob.wilson@acm.org>
292
293 * config/tc-xtensa.c (xtensa_leb128): New function.
294 (md_pseudo_table): Use it for sleb128 and uleb128.
295 (is_leb128_expr): New internal flag.
296 (xtensa_symbol_new_hook): Check new flag.
297
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2982008-01-16 Eric B. Weddington <eric.weddington@atmel.com>
299
300 * config/tc-avr.c (mcu_types): Change opcode set for avr3,
301 at90usb82, at90usb162.
302 * doc/c-avr.texi: Change architecture grouping for at90usb82,
303 at90usb162.
304 These changes support the new avr35 architecture group in gcc.
305
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3062008-01-15 H.J. Lu <hongjiu.lu@intel.com>
307
308 * config/tc-i386.c (md_assemble): Also zap movzx and movsx
309 suffix for AT&T syntax.
310
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3112008-01-14 H.J. Lu <hongjiu.lu@intel.com>
312
313 * config/tc-i386.c (match_reg_size): New.
314 (match_mem_size): Likewise.
315 (operand_size_match): Likewise.
316 (operand_type_match): Also clear all size fields.
317 (match_template): Skip Intel syntax when in AT&T syntax.
318 Call operand_size_match to check operand size.
319 (i386_att_operand): Set the mem field to 1 for memory
320 operand.
321 (i386_intel_operand): Likewise.
322
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3232008-01-12 H.J. Lu <hongjiu.lu@intel.com>
324
325 PR gas/5534
326 * config/tc-i386.c (_i386_insn): Update comment.
327 (operand_type_match): Also clear unspecified.
328 (operand_type_register_match): Likewise.
329 (parse_operands): Initialize unspecified.
330 (i386_intel_operand): Likewise.
331 (match_template): Check memory and accumulator operand size.
332 (i386_att_operand): Clear unspecified on register operand.
333 (intel_e11): Likewise.
334 (intel_e09): Set operand size and clean unspecified for
335 "XXX PTR".
336
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3372008-01-11 Andreas Schwab <schwab@suse.de>
338
339 * read.c (s_space): Declare `repeat' as offsetT.
340
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3412008-01-10 H.J. Lu <hongjiu.lu@intel.com>
342
343 * config/tc-i386.c (match_template): Check processor support
344 first.
345
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3462008-01-10 H.J. Lu <hongjiu.lu@intel.com>
347
348 * config/tc-i386.c (match_template): Continue if processor
349 doesn't match.
350
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3512008-01-09 Alexandre Oliva <aoliva@redhat.com>
352
353 * config/tc-ia64.c (ia64_convert_frag): Zero-initialize room for
354 unwind personality function address.
355
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3562008-01-09 Bob Wilson <bob.wilson@acm.org>
357
358 * dwarf2dbg.c (out_sleb128): Delete.
359 (size_fixed_inc_line_addr, emit_fixed_inc_line_addr): New.
360 (out_fixed_inc_line_addr): Delete.
361 (relax_inc_line_addr, dwarf2dbg_estimate_size_before_relax): Call new
362 size_fixed_inc_line_addr if DWARF2_USE_FIXED_ADVANCE_PC is set.
363 (dwarf2dbg_convert_frag): Likewise for emit_fixed_inc_line_addr.
364 (process_entries): Remove calls to out_fixed_inc_line_addr. When
365 DWARF2_USE_FIXED_ADVANCE_PC is set, call relax_inc_line_addr.
366 * read.h (emit_expr_fix): New prototype.
367 * read.c (emit_expr): Move code to emit_expr_fix and use it here.
368 (emit_expr_fix): New.
369
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3702008-01-09 H.J. Lu <hongjiu.lu@intel.com>
371
372 * config/tc-i386.c (match_template): Check register size
373 only when size of operands can be encoded the canonical way.
374
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3752008-01-08 H.J. Lu <hongjiu.lu@intel.com>
376
377 * config/tc-i386.c (i386_operand): Renamed to ...
378 (i386_att_operand): This.
379 (parse_operands): Updated.
380
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3812008-01-05 H.J. Lu <hongjiu.lu@intel.com>
382
383 * doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
384
385 * config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
386 only.
387 (md_assemble): Remove Intel mode workaround.
388 (match_template): Check support for old gcc, AT&T mnemonic
389 and Intel Syntax.
390 (md_parse_option): Don't set intel_mnemonic to 0 for
391 OPTION_MOLD_GCC.
392
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3932008-01-04 H.J. Lu <hongjiu.lu@intel.com>
394
395 * config/tc-i386.h: Update copyright to 2008.
396
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3972008-01-04 Nick Clifton <nickc@redhat.com>
398
399 * config/tc-ppc.c (parse_cpu): Preserve the settings of the
400 PPC_OPCODE_ALTIVEC and PPC_OPCODE_SPE flags.
401
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4022008-01-03 H.J. Lu <hongjiu.lu@intel.com>
403
404 * config/tc-i386.c (md_assemble): Use !intel_mnemonic instead
405 of SYSV386_COMPAT.
406
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4072008-01-03 H.J. Lu <hongjiu.lu@intel.com>
408
409 * gas/config/tc-i386.c (cpu_arch_flags_not): Removed.
410 (cpu_flags_not): Likewise.
411 (cpu_flags_match): Updated to check 64bit and arch.
412 (set_code_flag): Remove cpu_arch_flags_not.
413 (set_16bit_gcc_code_flag): Likewise.
414 (set_cpu_arch): Likewise.
415 (md_begin): Likewise.
416 (parse_insn): Call cpu_flags_match to check 64bit and arch.
417 (match_template): Likewise.
418
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4192008-01-03 Jakub Jelinek <jakub@redhat.com>
420
421 * config/tc-i386.c (process_drex): Initialize modrm_reg and
422 modrm_regmem to 0 instead of None.
423
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4242008-01-03 H.J. Lu <hongjiu.lu@intel.com>
425
426 * config/tc-i386.c (match_template): Use the xmmword field
427 instead of no_xsuf.
428
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4292008-01-02 H.J. Lu <hongjiu.lu@intel.com>
430
431 * config/tc-i386.c (process_suffix): Fix a typo.
432
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4332008-01-02 H.J. Lu <hongjiu.lu@intel.com>
434
435 PR gas/5534
436 * config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
437 Check memory size in Intel mode.
438 (process_suffix): Handle XMMWORD_MNEM_SUFFIX.
439 (intel_e09): Likewise.
440
441 * config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.
442
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4432008-01-02 Catherine Moore <clm@codesourcery.com>
444
445 * config/tc-mips.c (mips_ip): Check operands on jalr instruction.
446
6c7ac64e 447For older changes see ChangeLog-2007
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448\f
449Local Variables:
450mode: change-log
451left-margin: 8
452fill-column: 74
453version-control: never
454End:
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