projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
The "b" flag for COFF sections only unsets the LOAD attribute. It should also clear...
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
b7780957
J		 12020-03-25 J.W. Jagersma <jwjagersma@gmail.com>
2
3 * config/obj-coff.c (obj_coff_section): Set the bss flag on
4 sections with the "b" attribute.
5
d1023b5d
AM		 62020-03-22 Alan Modra <amodra@gmail.com>
7
8 * testsuite/gas/s12z/truncated.d: Update expected output.
9
0d832e7f
SB		 102020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
11
12 PR 25690
13 * config/tc-z80.c (md_pseudo_table): Add xdef anf xref pseudo ops.
14 * doc/c-z80.texi: Update documentation.
15
327ef784
NC		 162020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
17
18 PR 25641
19 PR 25668
20 PR 25633
21 Fix disassembling ED+A4/AC/B4/BC opcodes.
22 Fix assembling lines containing colonless label and instruction
23 with first operand inside parentheses.
24 Fix registration of unsupported by target CPU registers.
25 * config/tc-z80.c: See above.
26 * config/tc-z80.h: See above.
27 * testsuite/gas/z80/colonless.d: Update test.
28 * testsuite/gas/z80/colonless.s: Likewise.
29 * testsuite/gas/z80/ez80_adl_all.d: Likewise.
30 * testsuite/gas/z80/ez80_unsup_regs.d: Likewise.
31 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
32 * testsuite/gas/z80/gbz80_unsup_regs.d: Likewise.
33 * testsuite/gas/z80/r800_unsup_regs.d: Likewise.
34 * testsuite/gas/z80/unsup_regs.s: Likewise.
35 * testsuite/gas/z80/z180_unsup_regs.d: Likewise.
36 * testsuite/gas/z80/z80.exp: Likewise.
37 * testsuite/gas/z80/z80_strict_unsup_regs.d: Likewise.
38 * testsuite/gas/z80/z80_unsup_regs.d: Likewise.
39 * testsuite/gas/z80/z80n_unsup_regs.d: Likewise.
40
66d1f7cc
AV		 412020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
42
43 PR 25660
44 * config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
45 (parse_operands): Handle new operand codes.
46 (do_neon_dyadic_long): Make shape check accept the scalar variants.
47 (asm_opcode_insns): Fix operand codes for vaddl and vsubl.
48 * testsuite/gas/arm/mve-vaddsub-it.s: New test.
49 * testsuite/gas/arm/mve-vaddsub-it.d: New test.
50 * testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
51 * testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
52 * testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
53 * testsuite/gas/arm/nomve-vaddsub-it.d: New test.
54
9e8f1c90
L		 552020-03-11 H.J. Lu <hongjiu.lu@intel.com>
56
57 * NEWS: Mention x86 assembler options for CVE-2020-0551.
58
97b4a8f7
L		 592020-03-11 H.J. Lu <hongjiu.lu@intel.com>
60
61 * testsuite/gas/i386/i386.exp: Run new tests.
62 * testsuite/gas/i386/lfence-byte.d: New file.
63 * testsuite/gas/i386/lfence-byte.e: Likewise.
64 * testsuite/gas/i386/lfence-byte.s: Likewise.
65 * testsuite/gas/i386/lfence-indbr-a.d: Likewise.
66 * testsuite/gas/i386/lfence-indbr-b.d: Likewise.
67 * testsuite/gas/i386/lfence-indbr-c.d: Likewise.
68 * testsuite/gas/i386/lfence-indbr.e: Likewise.
69 * testsuite/gas/i386/lfence-indbr.s: Likewise.
70 * testsuite/gas/i386/lfence-load.d: Likewise.
71 * testsuite/gas/i386/lfence-load.s: Likewise.
72 * testsuite/gas/i386/lfence-ret-a.d: Likewise.
73 * testsuite/gas/i386/lfence-ret-b.d: Likewise.
74 * testsuite/gas/i386/lfence-ret.s: Likewise.
75 * testsuite/gas/i386/x86-64-lfence-byte.d: Likewise.
76 * testsuite/gas/i386/x86-64-lfence-byte.e: Likewise.
77 * testsuite/gas/i386/x86-64-lfence-byte.s: Likewise.
78 * testsuite/gas/i386/x86-64-lfence-indbr-a.d: Likewise.
79 * testsuite/gas/i386/x86-64-lfence-indbr-b.d: Likewise.
80 * testsuite/gas/i386/x86-64-lfence-indbr-c.d: Likewise.
81 * testsuite/gas/i386/x86-64-lfence-indbr.e: Likewise.
82 * testsuite/gas/i386/x86-64-lfence-indbr.s: Likewise.
83 * testsuite/gas/i386/x86-64-lfence-load.d: Likewise.
84 * testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
85 * testsuite/gas/i386/x86-64-lfence-ret-a.d: Likewise.
86 * testsuite/gas/i386/x86-64-lfence-ret-b.d: Likewise.
87
ae531041
L		 882020-03-11 H.J. Lu <hongjiu.lu@intel.com>
89
90 * config/tc-i386.c (lfence_after_load): New.
91 (lfence_before_indirect_branch_kind): New.
92 (lfence_before_indirect_branch): New.
93 (lfence_before_ret_kind): New.
94 (lfence_before_ret): New.
95 (last_insn): New.
96 (load_insn_p): New.
97 (insert_lfence_after): New.
98 (insert_lfence_before): New.
99 (md_assemble): Call insert_lfence_before and insert_lfence_after.
100 Set last_insn.
101 (OPTION_MLFENCE_AFTER_LOAD): New.
102 (OPTION_MLFENCE_BEFORE_INDIRECT_BRANCH): New.
103 (OPTION_MLFENCE_BEFORE_RET): New.
104 (md_longopts): Add -mlfence-after-load=,
105 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
106 (md_parse_option): Handle -mlfence-after-load=,
107 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
108 (md_show_usage): Display -mlfence-after-load=,
109 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
110 (i386_cons_align): New.
111 * config/tc-i386.h (i386_cons_align): New.
112 (md_cons_align): New.
113 * doc/c-i386.texi: Document -mlfence-after-load=,
114 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
115
5496f3c6
NC		 1162020-03-11 Nick Clifton <nickc@redhat.com>
117
118 PR 25611
119 PR 25614
120 * dwarf2dbg.c (DWARF2_FILE_TIME_NAME): Default to -1.
121 (DWARF2_FILE_SIZE_NAME): Default to -1.
122 (DWARF2_LINE_VERSION): Default to the current dwarf level or 3,
123 whichever is higher.
124 (DWARF2_LINE_MAX_OPS_PER_INSN): Provide a default value of 1.
125 (NUM_MD5_BYTES): Define.
126 (struct file entry): Add md5 field.
127 (get_filenum): Delete and replace with...
128 (get_basename): New function.
129 (get_directory_table_entry): New function.
130 (allocate_filenum): New function.
131 (allocate_filename_to_slot): New function.
132 (dwarf2_where): Use new functions.
133 (dwarf2_directive_filename): Add support for extended .file
134 pseudo-op.
135 (dwarf2_directive_loc): Allow the use of file number zero with
136 DWARF 5 or higher.
137 (out_file_list): Rename to...
138 (out_dir_and_file_list): Add DWARF 5 support.
139 (out_debug_line): Emit extra values into the section header for
140 DWARF 5.
141 (out_debug_str): Allow for file 0 to be used with DWARF 5.
142 * doc/as.texi (.file): Update the description of this pseudo-op.
143 * testsuite/gas/elf-dwarf-5-file0.s: Add more lines.
144 * testsuite/gas/elf-dwarf-5-file0.d: Update expected dump output.
145 * testsuite/gas/lns/lns-diag-1.l: Update expected error message.
146 * NEWS: Mention the new feature.
147
a6a1f5e0
AM		 1482020-03-10 Alan Modra <amodra@gmail.com>
149
150 * config/tc-csky.c (get_operand_value): Rewrite 1 << 31 expressions
151 to avoid signed overflow.
152 * config/tc-mcore.c (md_assemble): Likewise.
153 * config/tc-mips.c (gpr_read_mask, gpr_write_mask): Likewise.
154 * config/tc-nds32.c (SET_ADDEND): Likewise.
155 * config/tc-nios2.c (nios2_assemble_arg_R): Likewise.
156
3fabc179
JB		 1572020-03-09 Jan Beulich <jbeulich@suse.com>
158
159 * testsuite/gas/i386/avx.s: Add long-form VCMP[PS][SD] pseudos.
160 * testsuite/gas/i386/avx.d, testsuite/gas/i386/avx-16bit.d,
161 testsuite/gas/i386/avx-intel.d: Adjust expectations.
162
190e5fc8
AM		 1632020-03-07 Alan Modra <amodra@gmail.com>
164
165 * testsuite/gas/elf/dwarf-5-file0.s: Don't start directives in
166 first column.
167
84d9ab33
NC		 1682020-03-06 Nick Clifton <nickc@redhat.com>
169
170 PR 25614
171 * dwarf2dbg.c (dwarf2_directive_filename): Allow a file number of
172 0 if the dwarf_level is 5 or more. Complain if a filename follows
173 a file 0.
174 * testsuite/gas/elf/dwarf-5-file0.s: New test.
175 * testsuite/gas/elf/dwarf-5-file0.d: New test driver.
176 * testsuite/gas/elf/elf.exp: Run the new test.
177
178 PR 25612
179 * config/tc-ia64.h (DWARF2_VERISION): Fix typo.
180 * doc/as.texi: Fix another typo.
181
31bf1864
NC		 1822020-03-06 Nick Clifton <nickc@redhat.com>
183
184 PR 25612
185 * as.c (dwarf_level): Define.
186 (show_usage): Add --gdwarf-3, --gdwarf-4 and --gdwarf-5.
187 (parse_args): Add support for the new options.
188 as.h (dwarf_level): Prototype.
189 * dwarf2dbg.c (DWARF2_VERSION): Use dwarf_level as default version
190 value.
191 * config/tc-ia64.h (DWARF2_VERISION): Update definition.
192 (DWARF2_LINE_VERSION): Remove definition.
193 * doc/as.texi: Document the new options.
194
3c968de5
NC		 1952020-03-06 Nick Clifton <nickc@redhat.com>
196
197 PR 25572
198 * as.c (main): Allow matching input and outputs when they are
199 not regular files.
200
bc49bfd8
JB		 2012020-03-06 Jan Beulich <jbeulich@suse.com>
202
203 * config/tc-i386.c (match_mem_size): Generalize broadcast special
204 casing.
205 (check_VecOperands): Zap xmmword/ymmword/zmmword when more than
206 one of byte/word/dword/qword is set alongside a SIMD register in
207 a template's operand.
208
4873e243
JB		 2092020-03-06 Jan Beulich <jbeulich@suse.com>
210
211 * config/tc-i386.c (match_template): Extend code in logic
212 rejecting certain suffixes in certain modes to also cover mask
213 register use and VecSIB. Drop special casing of broadcast. Skip
214 immediates in the check.
215
e365e234
JB		 2162020-03-06 Jan Beulich <jbeulich@suse.com>
217
218 * config/tc-i386.c (match_template): Fold duplicate code in
219 logic rejecting certain suffixes in certain modes. Drop
220 pointless "else".
221
4ed21b58
JB		 2222020-03-06 Jan Beulich <jbeulich@suse.com>
223
224 * config/tc-i386.c (process_suffix): Exlucde !vexw insns
225 alongside !norex64 ones.
226 * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
227 with both 32- and 64-bit GPR operands.
228 * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
229 32- and 64-bit GPR operands.
230 * testsuite/gas/i386/x86-64-avx512bw-intel.d,
231 testsuite/gas/i386/x86-64-avx512bw.d,
232 testsuite/gas/i386/x86-64-avx512f-intel.d,
233 testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.
234
643bb870
JB		 2352020-03-06 Jan Beulich <jbeulich@suse.com>
236
237 * config/tc-i386.c (md_assemble): Drop use of rex64.
238 (process_suffix): For REX.W for 64-bit CRC32.
239
a23b33b3
JB		 2402020-03-06 Jan Beulich <jbeulich@suse.com>
241
242 * config/tc-i386.c (i386_addressing_mode): For 32-bit
243 addressing for MPX insns without base/index.
244 * testsuite/gas/i386/mpx-16bit.s,
245 * testsuite/gas/i386/mpx-16bit.d: New.
246 * testsuite/gas/i386/i386.exp: Run new test.
247
a0497384
JB		 2482020-03-06 Jan Beulich <jbeulich@suse.com>
249
250 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
251 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
252 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
253 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
254 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
255 as well as a BSWAP one.
256 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
257 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
258 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
259 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
260 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
261 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
262 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
263 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
264 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
265 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
266 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
267 testsuite/gas/i386/vmx.d: Adjust expectations.
268
b630c145
JB		 2692020-03-06 Jan Beulich <jbeulich@suse.com>
270
271 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
272 from having their operands swapped.
273 * testsuite/gas/i386/waitpkg.s,
274 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
275 3-operand cases as well as testing of 16-bit code generation.
276 * testsuite/gas/i386/waitpkg.d,
277 testsuite/gas/i386/waitpkg-intel.d,
278 testsuite/gas/i386/x86-64-waitpkg.d,
279 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
280
de48783e
NC		 2812020-03-04 Nelson Chu <nelson.chu@sifive.com>
282
dee35d02
NC		 283 * config/tc-riscv.c (percent_op_utype): Support the modifier
284 %got_pcrel_hi.
285 * doc/c-riscv.texi: Add documentation.
286 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
287 modifier %got_pcrel_hi.
288 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
289 * testsuite/gas/riscv/relax-reloc.d: Likewise.
290 * testsuite/gas/riscv/relax-reloc.s: Likewise.
291
de48783e
NC		 292 * doc/c-riscv.texi (relocation modifiers): Add documentation.
293 (RISC-V-Formats): Update the section name from "Instruction Formats"
294 to "RISC-V Instruction Formats".
295
749479c8
AO		 2962020-03-04 Alexandre Oliva <oliva@adacore.com>
297
298 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
299 detected in a section which does not have at least 4 byte
300 alignment.
301 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
302 * testsuite/gas/arm/ldr-t.s: Likewise.
303 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
304 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
305 disassembly, ignoring any NOPs that may have been inserted because
306 of section alignment.
307 * testsuite/gas/arm/ldr-t.d: Likewise.
308
a847e322
JB		 3092020-03-04 Jan Beulich <jbeulich@suse.com>
310
311 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
312 * doc/c-i386.texi: Mention sev_es.
313 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
314 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
315 expectations.
316 * testsuite/gas/i386/arch-13-znver1.d,
317 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
318
3cd7f3e3
L		 3192020-03-03 H.J. Lu <hongjiu.lu@intel.com>
320
321 * config/tc-i386.c (match_template): Replace ignoresize and
322 defaultsize with mnemonicsize.
323 (process_suffix): Likewise.
324
b8ba1385
SB		 3252020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
326
327 PR 25627
328 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
329 instruction LD IY,(HL).
330 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
331 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
332 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
333 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
334
10d97a0f
L		 3352020-03-03 H.J. Lu <hongjiu.lu@intel.com>
336
337 PR gas/25622
338 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
339 x86-64-default-suffix-avx.
340 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
341 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
342 * testsuite/gas/i386/noreg64.d: Updated.
343 * testsuite/gas/i386/noreg64.l: Likewise.
344 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
345 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
346 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
347
8326546e
SB		 3482020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
349
350 PR 25604
351 * config/tc-z80.c (contains_register): Prevent an illegal memory
352 access when checking an expression for a register name.
353
e3e896e6
AM		 3542020-03-03 Alan Modra <amodra@gmail.com>
355
356 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
357 support.
358
a4dd6c97
AM		 3592020-03-02 Alan Modra <amodra@gmail.com>
360
361 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
362 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
363 and .sbss sections.
364 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
365 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
366 (s3_s_score_lcomm): Likewise.
367 * config/tc-score7.c: Similarly.
368 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
369
dec7b24b
YS		 3702020-02-28 YunQiang Su <syq@debian.org>
371
372 PR gas/25539
373 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
374 to handle multi-labels.
375 (has_label_name): New.
376
cceb53b8
MM		 3772020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
378
379 * config/tc-arm.c (enum pred_instruction_type): Remove
380 NEUTRAL_IT_NO_VPT_INSN predication type.
381 (cxn_handle_predication): Modify to require condition suffixes.
382 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
383 * testsuite/gas/arm/cde-scalar.s: Update test.
384 * testsuite/gas/arm/cde-warnings.l: Update test.
385 * testsuite/gas/arm/cde-warnings.s: Update test.
386
da3ec71f
AM		 3872020-02-26 Alan Modra <amodra@gmail.com>
388
389 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
390 N_() on empty string.
391
42135cad
AM		 3922020-02-26 Alan Modra <amodra@gmail.com>
393
394 * read.c (read_a_source_file): Call strncpy with length one
395 less than size of original_case_string.
396
dc1e8a47
AM		 3972020-02-26 Alan Modra <amodra@gmail.com>
398
399 * config/obj-elf.c: Indent labels correctly.
400 * config/obj-macho.c: Likewise.
401 * config/tc-aarch64.c: Likewise.
402 * config/tc-alpha.c: Likewise.
403 * config/tc-arm.c: Likewise.
404 * config/tc-cr16.c: Likewise.
405 * config/tc-crx.c: Likewise.
406 * config/tc-frv.c: Likewise.
407 * config/tc-i386-intel.c: Likewise.
408 * config/tc-i386.c: Likewise.
409 * config/tc-ia64.c: Likewise.
410 * config/tc-mn10200.c: Likewise.
411 * config/tc-mn10300.c: Likewise.
412 * config/tc-nds32.c: Likewise.
413 * config/tc-riscv.c: Likewise.
414 * config/tc-s12z.c: Likewise.
415 * config/tc-xtensa.c: Likewise.
416 * config/tc-z80.c: Likewise.
417 * read.c: Likewise.
418 * symbols.c: Likewise.
419 * write.c: Likewise.
420
bd0cf5a6
NC		 4212020-02-20 Nelson Chu <nelson.chu@sifive.com>
422
54b2aec1
NC		 423 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
424 we are assembling instruction with CSR. Call riscv_csr_read_only_check
425 after parsing all arguments.
426 (enum csr_insn_type): New enum is used to classify the CSR instruction.
427 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
428 are used to check if we write a read-only CSR by the CSR instruction.
429 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
430 all CSR for the read-only CSR checking.
431 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
432 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
433 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
434 all CSR instructions for the read-only CSR checking.
435 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
436 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
437
2ca89224
NC		 438 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
439 (riscv_opts): Initialize it.
440 (reg_lookup_internal): Check the `riscv_opts.csr_check`
441 before doing the CSR checking.
442 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
443 (md_longopts): Add mcsr-check and mno-csr-check.
444 (md_parse_option): Handle new enum option values.
445 (s_riscv_option): Handle new long options.
446 * doc/c-riscv.texi: Add description for the new .option and assembler
447 options.
448 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
449 the CSR checking.
450 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
451
bd0cf5a6
NC		 452 * config/tc-riscv.c (csr_extra_hash): New.
453 (enum riscv_csr_class): New enum. Used to decide
454 whether or not this CSR is legal in the current ISA string.
455 (struct riscv_csr_extra): New structure to hold all extra information
456 of CSR.
457 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
458 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
459 Call hash_reg_name to insert CSR address into reg_names_hash.
460 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
461 Decide whether the CSR is valid according to the csr_extra_hash.
462 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
463 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
464 not a boolean. This is same as riscv_init_csr_hash, so keep the
465 consistent usage.
466 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
467 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
468 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
469 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
470 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
471 f-ext CSR are not allowed.
472 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
473 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
474 source file is `priv-reg.s`, and the ISA is rv64if, so the
475 rv32-only CSR are not allowed.
476 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
477
10a95fcc
AM		 4782020-02-21 Alan Modra <amodra@gmail.com>
479
480 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
481 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
482
dda2980f
AM		 4832020-02-21 Alan Modra <amodra@gmail.com>
484
485 PR 25569
486 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
487 on section size adjustment, instead perform another write if
488 exec header size is larger than section size.
489
bd3380bc
NC		 4902020-02-19 Nelson Chu <nelson.chu@sifive.com>
491
492 * doc/c-riscv.texi: Add the doc entries for -march-attr/
493 -mno-arch-attr command line options.
494
fa164239
JW		 4952020-02-19 Nelson Chu <nelson.chu@sifive.com>
496
497 * testsuite/gas/riscv/c-add-addi.d: New testcase.
498 * testsuite/gas/riscv/c-add-addi.s: Likewise.
499
fcaaac0a
SB		 5002020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
501
502 PR 25576
503 * config/tc-z80.c (md_parse_option): Do not use an underscore
504 prefix for local labels in SDCC compatability mode.
505 (z80_start_line_hook): Remove SDCC dollar label support.
506 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
507 * testsuite/gas/z80/sdcc.s: Likewise.
508
5092020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
510
511 PR 25517
512 * config/tc-z80.c: Add -march option.
513 * doc/as.texi: Update Z80 documentation.
514 * doc/c-z80.texi: Likewise.
515 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
516 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
517 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
518 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
519 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
520 * testsuite/gas/z80/gbz80_all.d: Likewise.
521 * testsuite/gas/z80/r800_extra.d: Likewise.
522 * testsuite/gas/z80/r800_ii8.d: Likewise.
523 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
524 * testsuite/gas/z80/sdcc.d: Likewise.
525 * testsuite/gas/z80/z180.d: Likewise.
526 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
527 * testsuite/gas/z80/z80_doc.d: Likewise.
528 * testsuite/gas/z80/z80_ii8.d: Likewise.
529 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
530 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
531 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
532 * testsuite/gas/z80/z80_sli.d: Likewise.
533 * testsuite/gas/z80/z80n_all.d: Likewise.
534 * testsuite/gas/z80/z80n_reloc.d: Likewise.
535
a7e12755
L		 5362020-02-19 H.J. Lu <hongjiu.lu@intel.com>
537
538 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
539 with GNU_PROPERTY_X86_FEATURE_2_MMX.
540 * testsuite/gas/i386/i386.exp: Run property-3 and
541 x86-64-property-3.
542 * testsuite/gas/i386/property-3.d: New file.
543 * testsuite/gas/i386/property-3.s: Likewise.
544 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
545
272a84b1
L		 5462020-02-17 H.J. Lu <hongjiu.lu@intel.com>
547
548 * config/tc-i386.c (cpu_arch): Add .popcnt.
549 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
550 Add a tab before @samp{.sse4a}.
551
c8f8eebc
JB		 5522020-02-17 Jan Beulich <jbeulich@suse.com>
553
554 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
555 for AddrPrefixOpReg templates. Combine the two pieces of
556 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
557 mode.
558
eedb0f2c
JB		 5592020-02-17 Jan Beulich <jbeulich@suse.com>
560
561 PR gas/14439
562 * config/tc-i386.c (md_assemble): Also suppress operand
563 swapping for MONITOR{,X} and MWAIT{,X}.
564 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
565 Add Intel syntax monitor/mwait tests.
566 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
567 Adjust expectations.
568 *testsuite/gas/i386/sse3-intel.d,
569 testsuite/gas/i386/x86-64-sse3-intel.d: New.
570 * testsuite/gas/i386/i386.exp: Run new tests.
571
b9915cbc
JB		 5722020-02-17 Jan Beulich <jbeulich@suse.com>
573
574 PR gas/6518
575 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
576 [XYZ]MMWord memory operand ambiguity recognition logic (largely
577 re-indentation).
578 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
579 cases.
580 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
581 * testsuite/gas/i386/avx512dq-inval.l,
582 testsuite/gas/i386/inval-avx.l,
583 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
584 * testsuite/gas/i386/avx512vl-ambig.s,
585 testsuite/gas/i386/avx512vl-ambig.l: New.
586 * testsuite/gas/i386/i386.exp: Run new test.
587
af5c13b0
L		 5882020-02-16 H.J. Lu <hongjiu.lu@intel.com>
589
590 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
591 nosse4.
592 * doc/c-i386.texi: Document sse4a and nosse4a.
593
07d98387
L		 5942020-02-14 H.J. Lu <hongjiu.lu@intel.com>
595
596 * doc/c-i386.texi: Remove the old movsx and movzx documentation
597 for AT&T syntax.
598
65fca059
JB		 5992020-02-14 Jan Beulich <jbeulich@suse.com>
600
601 PR gas/25438
602 * config/tc-i386.c (md_assemble): Move movsx/movzx special
603 casing ...
604 (process_suffix): ... here. Consider just the first operand
605 initially.
606 (check_long_reg): Drop opcode 0x63 special case again.
607 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
608 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
609 Move ambiguous operand size tests ...
610 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
611 testsuite/gas/i386/noreg64.s: ... here.
612 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
613 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
614 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
615 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
616 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
617 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
618 testsuite/gas/i386/x86-64-movsxd.d,
619 testsuite/gas/i386/x86-64-movsxd-intel.d,
620 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
621 Adjust expectations.
622 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
623 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
624 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
625 * testsuite/gas/i386/i386.exp: Run new tests.
626
b6773884
JB		 6272020-02-14 Jan Beulich <jbeulich@suse.com>
628
629 * config/tc-i386.c (process_operands): Also skip segment
630 override prefix emission if it matches an already present one.
631 * testsuite/gas/i386/prefix32.s: Add double segment override
632 cases.
633 * testsuite/gas/i386/prefix32.l: Adjust expectations.
634
92334ad2
JB		 6352020-02-14 Jan Beulich <jbeulich@suse.com>
636
637 * config/tc-i386.c (process_operands): Drop ineffectual segment
638 overrides when optimizing.
639 * testsuite/gas/i386/lea-optimize.d: New.
640 * testsuite/gas/i386/i386.exp: Run new test.
641
6422020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB		 643
644 * config/tc-i386.c (process_operands): Also check insn prefix
645 for ineffectual segment override warning. Don't cover possible
646 VEX/EVEX encoded insns there.
647 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
648 testsuite/gas/i386/lea.e: New.
649 * testsuite/gas/i386/i386.exp: Run new test.
650
0e6724de
L		 6512020-02-14 H.J. Lu <hongjiu.lu@intel.com>
652
653 PR gas/25438
654 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
655 syntax.
656
292676c1
L		 6572020-02-13 Fangrui Song <maskray@google.com>
658 H.J. Lu <hongjiu.lu@intel.com>
659
660 PR gas/25551
661 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
662 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
663 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
664 * testsuite/gas/i386/relax-5.d: New file.
665 * testsuite/gas/i386/relax-5.s: Likewise.
666 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
667 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
668
7deea9aa
JB		 6692020-02-13 Jan Beulich <jbeulich@suse.com>
670
671 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
672 "nosse4" entry.
673
6c0946d0
JB		 6742020-02-12 Jan Beulich <jbeulich@suse.com>
675
676 * config/tc-i386.c (avx512): New (at file scope), moved from
677 (check_VecOperands): ... here.
678 (process_suffix): Add [XYZ]MMword operand size handling.
679 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
680 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
681 tests.
682 * testsuite/gas/i386/avx512dq-inval.l,
683 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
684
5990e377
JB		 6852020-02-12 Jan Beulich <jbeulich@suse.com>
686
687 PR gas/24546
688 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
689 code only.
690 * config/tc-i386-intel.c (i386_intel_operand): Also handle
691 CALL/JMP in O_tbyte_ptr case.
692 * doc/c-i386.texi: Mention far call and full pointer load ISA
693 differences.
694 * testsuite/gas/i386/x86-64-branch-3.s,
695 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
696 * testsuite/gas/i386/x86-64-branch-3.d,
697 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
698 * testsuite/gas/i386/x86-64-branch-5.l,
699 testsuite/gas/i386/x86-64-branch-5.s: New.
700 * testsuite/gas/i386/i386.exp: Run new test.
701
9706160a
JB		 7022020-02-12 Jan Beulich <jbeulich@suse.com>
703
704 PR gas/25438
705 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
706 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
707 64-bit-only warning.
708 (check_word_reg): Consistently error on mismatching register
709 size and suffix.
710 * testsuite/gas/i386/general.s: Replace dword GPR with word one
711 for movw. Replace suffix / GPR for orb.
712 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
713 byte GPRs as well as ones for inb/outb with a word accumulator.
714 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
715 testsuite/gas/i386/inval.l: Adjust expectations.
716
5de4d9ef
JB		 7172020-02-12 Jan Beulich <jbeulich@suse.com>
718
719 * config/tc-i386.c (operand_type_register_match): Also fall
720 through initial two if()-s when the template allows for a GPR
721 operand. Adjust comment.
722
50128d0c
JB		 7232020-02-11 Jan Beulich <jbeulich@suse.com>
724
725 (struct _i386_insn): New field "short_form".
726 (optimize_encoding): Drop setting of shortform field.
727 (process_suffix): Set i.short_form. Replace shortform use.
728 (process_operands): Replace shortform use.
729
1ed818b4
MM		 7302020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
731
732 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
733 loop initial declaration.
734
5aae9ae9
MM		 7352020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
736
737 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
738 instructions that can have 5 arguments.
739 (enum operand_parse_code): Add new operands.
740 (parse_operands): Account for new operands.
741 (S5): New macro.
742 (enum neon_shape_el): Introduce P suffixes for coprocessor.
743 (neon_select_shape): Account for P suffix.
744 (LOW1): Move macro to global position.
745 (HI4): Move macro to global position.
746 (vcx_assign_vec_d): New.
747 (vcx_assign_vec_m): New.
748 (vcx_assign_vec_n): New.
749 (enum vcx_reg_type): New.
750 (vcx_get_reg_type): New.
751 (vcx_size_pos): New.
752 (vcx_vec_pos): New.
753 (vcx_handle_shape): New.
754 (vcx_ensure_register_in_range): New.
755 (vcx_handle_register_arguments): New.
756 (vcx_handle_insn_block): New.
757 (vcx_handle_common_checks): New.
758 (do_vcx1): New.
759 (do_vcx2): New.
760 (do_vcx3): New.
761 * testsuite/gas/arm/cde-missing-fp.d: New test.
762 * testsuite/gas/arm/cde-missing-fp.l: New test.
763 * testsuite/gas/arm/cde-missing-mve.d: New test.
764 * testsuite/gas/arm/cde-missing-mve.l: New test.
765 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
766 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
767 * testsuite/gas/arm/cde-mve.s: New test.
768 * testsuite/gas/arm/cde-warnings.l:
769 * testsuite/gas/arm/cde-warnings.s:
770 * testsuite/gas/arm/cde.d:
771 * testsuite/gas/arm/cde.s:
772
4934a27c
MM		 7732020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
774 Matthew Malcomson <matthew.malcomson@arm.com>
775
776 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
777 CDE coprocessor that can be enabled.
778 (enum pred_instruction_type): New pred type.
779 (BAD_NO_VPT): New error message.
780 (BAD_CDE): New error message.
781 (BAD_CDE_COPROC): New error message.
782 (enum operand_parse_code): Add new immediate operands.
783 (parse_operands): Account for new immediate operands.
784 (check_cde_operand): New.
785 (cde_coproc_enabled): New.
786 (cde_coproc_pos): New.
787 (cde_handle_coproc): New.
788 (cxn_handle_predication): New.
789 (do_custom_instruction_1): New.
790 (do_custom_instruction_2): New.
791 (do_custom_instruction_3): New.
792 (do_cx1): New.
793 (do_cx1a): New.
794 (do_cx1d): New.
795 (do_cx1da): New.
796 (do_cx2): New.
797 (do_cx2a): New.
798 (do_cx2d): New.
799 (do_cx2da): New.
800 (do_cx3): New.
801 (do_cx3a): New.
802 (do_cx3d): New.
803 (do_cx3da): New.
804 (handle_pred_state): Define new IT block behaviour.
805 (insns): Add newn CX*{,d}{,a} instructions.
806 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
807 Define new cdecp extension strings.
808 * doc/c-arm.texi: Document new cdecp extension arguments.
809 * testsuite/gas/arm/cde-scalar.d: New test.
810 * testsuite/gas/arm/cde-scalar.s: New test.
811 * testsuite/gas/arm/cde-warnings.d: New test.
812 * testsuite/gas/arm/cde-warnings.l: New test.
813 * testsuite/gas/arm/cde-warnings.s: New test.
814 * testsuite/gas/arm/cde.d: New test.
815 * testsuite/gas/arm/cde.s: New test.
816
4b5aaf5f
L		 8172020-02-10 H.J. Lu <hongjiu.lu@intel.com>
818
819 PR gas/25516
820 * config/tc-i386.c (intel64): Renamed to ...
821 (isa64): This.
822 (match_template): Accept Intel64 only instruction by default.
823 (i386_displacement): Updated.
824 (md_parse_option): Updated.
825 * c-i386.texi: Update -mamd64/-mintel64 documentation.
826 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
827 -mamd64 to x86-64-sysenter-amd.
828 * testsuite/gas/i386/x86-64-sysenter.d: New file.
829
33176d91
AM		 8302020-02-10 Alan Modra <amodra@gmail.com>
831
832 * config/obj-elf.c (obj_elf_change_section): Error for section
833 type, attr or entsize changes in assembly.
834 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
835 * testsuite/gas/elf/section5.l: Update.
836
82194874
AM		 8372020-02-10 Alan Modra <amodra@gmail.com>
838
839 * output-file.c (output_file_close): Do a normal close when
840 flag_always_generate_output.
841 * write.c (write_object_file): Don't stop output when
842 flag_always_generate_output.
843
9fc0b501
SB		 8442020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
845
846 PR 25469
847 * config/tc-z80.c: Add -gbz80 command line option to generate code
848 for the GameBoy Z80. Add support for generating DWARF.
849 * config/tc-z80.h: Add support for DWARF debug information
850 generation.
851 * doc/c-z80.texi: Document new command line option.
852 * testsuite/gas/z80/gbz80_all.d: New file.
853 * testsuite/gas/z80/gbz80_all.s: New file.
854 * testsuite/gas/z80/z80.exp: Run the new tests.
855 * testsuite/gas/z80/z80n_all.d: New file.
856 * testsuite/gas/z80/z80n_all.s: New file.
857 * testsuite/gas/z80/z80n_reloc.d: New file.
858
b7d07216
L		 8592020-02-06 H.J. Lu <hongjiu.lu@intel.com>
860
861 PR gas/25381
862 * config/obj-elf.c (get_section): Also check
863 linked_to_symbol_name.
864 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
865 (obj_elf_parse_section_letters): Handle the 'o' flag.
866 (build_group_lists): Renamed to ...
867 (build_additional_section_info): This. Set elf_linked_to_section
868 from map_head.linked_to_symbol_name.
869 (elf_adjust_symtab): Updated.
870 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
871 * doc/as.texi: Document the 'o' flag.
872 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
873 * testsuite/gas/elf/section18.d: New file.
874 * testsuite/gas/elf/section18.s: Likewise.
875 * testsuite/gas/elf/section19.d: Likewise.
876 * testsuite/gas/elf/section19.s: Likewise.
877 * testsuite/gas/elf/section20.d: Likewise.
878 * testsuite/gas/elf/section20.s: Likewise.
879 * testsuite/gas/elf/section21.d: Likewise.
880 * testsuite/gas/elf/section21.l: Likewise.
881 * testsuite/gas/elf/section21.s: Likewise.
882
5eb617a7
L		 8832020-02-06 H.J. Lu <hongjiu.lu@intel.com>
884
885 * NEWS: Mention x86 assembler options to align branches for
886 binutils 2.34.
887
986ac314
L		 8882020-02-06 H.J. Lu <hongjiu.lu@intel.com>
889
890 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
891 only for ELF targets.
892 * testsuite/gas/i386/unique.d: Don't xfail.
893 * testsuite/gas/i386/x86-64-unique.d: Likewise.
894
19234a6d
AM		 8952020-02-06 Alan Modra <amodra@gmail.com>
896
897 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
898 * testsuite/gas/i386/x86-64-unique.d: Likewise.
899
02e0be69
AM		 9002020-02-06 Alan Modra <amodra@gmail.com>
901
902 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
903 xfail, and rename test.
904 * testsuite/gas/elf/section12b.d: Likewise.
905 * testsuite/gas/elf/section16a.d: Likewise.
906 * testsuite/gas/elf/section16b.d: Likewise.
907
a8c4d40b
L		 9082020-02-02 H.J. Lu <hongjiu.lu@intel.com>
909
910 PR gas/25380
911 * config/obj-elf.c (section_match): Removed.
912 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
913 section_id.
914 (obj_elf_change_section): Replace info and group_name arguments
915 with match_p. Also update the section ID and flags from match_p.
916 (obj_elf_section): Handle "unique,N". Update call to
917 obj_elf_change_section.
918 * config/obj-elf.h (elf_section_match): New.
919 (obj_elf_change_section): Updated.
920 * config/tc-arm.c (start_unwind_section): Update call to
921 obj_elf_change_section.
922 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
923 * config/tc-microblaze.c (microblaze_s_data): Likewise.
924 (microblaze_s_sdata): Likewise.
925 (microblaze_s_rdata): Likewise.
926 (microblaze_s_bss): Likewise.
927 * config/tc-mips.c (s_change_section): Likewise.
928 * config/tc-msp430.c (msp430_profiler): Likewise.
929 * config/tc-rx.c (parse_rx_section): Likewise.
930 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
931 * doc/as.texi: Document "unique,N" in .section directive.
932 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
933 * testsuite/gas/elf/section15.d: New file.
934 * testsuite/gas/elf/section15.s: Likewise.
935 * testsuite/gas/elf/section16.s: Likewise.
936 * testsuite/gas/elf/section16a.d: Likewise.
937 * testsuite/gas/elf/section16b.d: Likewise.
938 * testsuite/gas/elf/section17.d: Likewise.
939 * testsuite/gas/elf/section17.l: Likewise.
940 * testsuite/gas/elf/section17.s: Likewise.
941 * testsuite/gas/i386/unique.d: Likewise.
942 * testsuite/gas/i386/unique.s: Likewise.
943 * testsuite/gas/i386/x86-64-unique.d: Likewise.
944 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
945
575d37ae
L		 9462020-02-02 H.J. Lu <hongjiu.lu@intel.com>
947
948 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
949
2384096c
G		 9502020-02-01 Anthony Green <green@moxielogic.com>
951
952 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
953
95441c43
SL		 9542020-01-31 Sandra Loosemore <sandra@codesourcery.com>
955
956 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
957 %tls_ldo.
958
d465d695
AV		 9592020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
960
961 PR gas/25472
962 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
963 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
964 +mve.
965 * testsuite/gas/arm/mve_dsp.d: New test.
966
d26cc8a9
NC		 9672020-01-31 Nick Clifton <nickc@redhat.com>
968
969 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
970 rather than BFD_RELOC_NONE.
971
90e9955a
SP		 9722020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
973
974 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
975 to support VLDMIA instruction for MVE.
976 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
977 instruction for MVE.
978 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
979 instruction for MVE.
980 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
981 instruction for MVE.
982 * testsuite/gas/arm/mve-ldst.d: New test.
983 * testsuite/gas/arm/mve-ldst.s: Likewise.
984
53943f32
NC		 9852020-01-31 Nick Clifton <nickc@redhat.com>
986
987 * po/fr.po: Updated French translation.
988 * po/ru.po: Updated Russian translation.
989
c3036ed0
RS		 9902020-01-31 Richard Sandiford <richard.sandiford@arm.com>
991
992 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
993 .s for the movprfx.
994 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
995 * testsuite/gas/aarch64/sve-movprfx_28.d,
996 * testsuite/gas/aarch64/sve-movprfx_28.l,
997 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
998
2ae4c703
JB		 9992020-01-30 Jan Beulich <jbeulich@suse.com>
1000
1001 * config/tc-i386.c (output_disp): Tighten base_opcode check.
1002 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
1003 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
1004 Adjust expectations.
1005
bd434cc4
JM		 10062020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
1007
1008 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
1009 * testsuite/gas/bpf/alu-be.d: Likewise.
1010 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
1011 * testsuite/gas/bpf/alu32-be.d: Likewise.
1012
aeab2b26
JB		 10132020-01-30 Jan Beulich <jbeulich@suse.com>
1014
1015 * testsuite/gas/i386/x86-64-branch-2.s,
1016 testsuite/gas/i386/x86-64-branch-4.s,
1017 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
1018 * testsuite/gas/i386/ilp32/x86-64-branch.d,
1019 testsuite/gas/i386/x86-64-branch-2.d,
1020 testsuite/gas/i386/x86-64-branch-4.l,
1021 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
1022
873494c8
JB		 10232020-01-30 Jan Beulich <jbeulich@suse.com>
1024
1025 * config/tc-i386.c (process_suffix): .
1026 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
1027 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
1028 Add LRETQ case.
1029 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
1030 suffix.
1031 testsuite/gas/i386/x86_64.s: Add RETF cases.
1032 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
1033 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
1034 testsuite/gas/i386/x86-64-opcode.d,
1035 testsuite/gas/i386/x86-64-suffix-intel.d,
1036 testsuite/gas/i386/x86-64-suffix.d,
1037 testsuite/gas/i386/x86_64-intel.d
1038 testsuite/gas/i386/x86_64.d: Adjust expectations.
1039 * testsuite/gas/i386/x86-64-suffix.e,
1040 testsuite/gas/i386/x86_64.e: New.
1041
62b3f548
JB		 10422020-01-30 Jan Beulich <jbeulich@suse.com>
1043
1044 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
1045 special case.
1046
bc31405e
L		 10472020-01-27 H.J. Lu <hongjiu.lu@intel.com>
1048
1049 PR binutils/25445
1050 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
1051 movsxd.
1052 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
1053 differences. Document movslq and movsxd.
1054 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
1055 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
1056 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
1057 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
1058 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
1059 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
1060 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
1061 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
1062 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
1063 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
1064 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
1065
e3696f67
AM		 10662020-01-27 Alan Modra <amodra@gmail.com>
1067
1068 * testsuite/gas/all/gas.exp: Replace case statements with switch
1069 statements.
1070 * testsuite/gas/elf/elf.exp: Likewise.
1071 * testsuite/gas/macros/macros.exp: Likewise.
1072 * testsuite/lib/gas-defs.exp: Likewise.
1073
7568c93b
TC		 10742020-01-27 Tamar Christina <tamar.christina@arm.com>
1075
1076 PR 25403
1077 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
1078 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
1079
403d1bd9
JW		 10802020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
1081
1082 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
1083 s exts must be known, so rename *ok* to *fail*.
1084 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
1085 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
1086 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
1087 above change.
1088 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
1089 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
1090
be4c5e58
L		 10912020-01-22 H.J. Lu <hongjiu.lu@intel.com>
1092
1093 PR gas/25438
1094 * config/tc-i386.c (check_long_reg): Always disallow double word
1095 suffix in mnemonic with word general register.
1096 * testsuite/gas/i386/general.s: Replace word general register
1097 with double word general register for movl.
1098 * testsuite/gas/i386/inval.s: Add tests for movl with word general
1099 register.
1100 * testsuite/gas/i386/general.l: Updated.
1101 * testsuite/gas/i386/inval.l: Likewise.
1102
9e7028aa
AM		 11032020-01-22 Alan Modra <amodra@gmail.com>
1104
1105 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
1106 __tls_get_addr_desc and __tls_get_addr_opt.
1107
e3ed17f3
JB		 11082020-01-21 Jan Beulich <jbeulich@suse.com>
1109
1110 * testsuite/gas/i386/inval-crc32.s,
1111 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
1112 * testsuite/gas/i386/inval-crc32.l,
1113 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
1114
1a035124
JB		 11152020-01-21 Jan Beulich <jbeulich@suse.com>
1116
1117 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
1118 generic code path. Deal with No_lSuf being set in a template.
1119 * testsuite/gas/i386/inval-crc32.l,
1120 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
1121 instead of error(s) when operand size is ambiguous.
1122 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1123 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
1124 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
1125 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
1126 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
1127 Adjust expectations.
1128
c006a730
JB		 11292020-01-21 Jan Beulich <jbeulich@suse.com>
1130
1131 * config/tc-i386.c (process_suffix): Drop SYSRET special case
1132 and an intel_syntax check. Re-write lack-of-suffix processing
1133 logic.
1134 * doc/c-i386.texi: Document operand size defaults for suffix-
1135 less AT&T syntax insns.
1136 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
1137 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
1138 testsuite/gas/i386/x86-64-avx-scalar.s,
1139 testsuite/gas/i386/x86-64-avx.s,
1140 testsuite/gas/i386/x86-64-bundle.s,
1141 testsuite/gas/i386/x86-64-intel64.s,
1142 testsuite/gas/i386/x86-64-lock-1.s,
1143 testsuite/gas/i386/x86-64-opcode.s,
1144 testsuite/gas/i386/x86-64-sse2avx.s,
1145 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
1146 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
1147 testsuite/gas/i386/x86-64-nops.s,
1148 testsuite/gas/i386/x86-64-ptwrite.s,
1149 testsuite/gas/i386/x86-64-simd.s,
1150 testsuite/gas/i386/x86-64-sse-noavx.s,
1151 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
1152 insns.
1153 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1154 testsuite/gas/i386/noreg64.s: Add further tests.
1155 * testsuite/gas/i386/ilp32/x86-64-nops.d,
1156 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
1157 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
1158 testsuite/gas/i386/sse-noavx.d,
1159 testsuite/gas/i386/x86-64-intel64.d,
1160 testsuite/gas/i386/x86-64-nops.d,
1161 testsuite/gas/i386/x86-64-opcode.d,
1162 testsuite/gas/i386/x86-64-ptwrite-intel.d,
1163 testsuite/gas/i386/x86-64-ptwrite.d,
1164 testsuite/gas/i386/x86-64-simd-intel.d,
1165 testsuite/gas/i386/x86-64-simd-suffix.d,
1166 testsuite/gas/i386/x86-64-simd.d,
1167 testsuite/gas/i386/x86-64-sse-noavx.d
1168 testsuite/gas/i386/x86-64-suffix.d,
1169 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
1170 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
1171 testsuite/gas/i386/noreg64.l: New.
1172 * testsuite/gas/i386/i386.exp: Run new tests.
1173
c906a69a
JB		 11742020-01-21 Jan Beulich <jbeulich@suse.com>
1175
1176 * testsuite/gas/i386/avx512_bf16_vl.s,
1177 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
1178 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
1179 broadcast forms of VCVTNEPS2BF16.
1180 * testsuite/gas/i386/avx512_bf16_vl.d,
1181 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
1182
26916852
NC		 11832020-01-20 Nick Clifton <nickc@redhat.com>
1184
1185 * po/uk.po: Updated Ukranian translation.
1186
14470f07
L		 11872020-01-20 H.J. Lu <hongjiu.lu@intel.com>
1188
1189 PR ld/25416
1190 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
1191 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
1192 x32 object.
1193 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
1194 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
1195 R_X86_64_GOTPC32_TLSDESC relocation.
1196
1b1bb2c6
NC		 11972020-01-18 Nick Clifton <nickc@redhat.com>
1198
1199 * configure: Regenerate.
1200 * po/gas.pot: Regenerate.
1201
ae774686
NC		 12022020-01-18 Nick Clifton <nickc@redhat.com>
1203
1204 Binutils 2.34 branch created.
1205
42e04b36
L		 12062020-01-17 H.J. Lu <hongjiu.lu@intel.com>
1207
1208 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
1209 with vex_encoding_vex.
1210 (parse_insn): Likewise.
1211 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
1212 and {vex3} documentation.
1213 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
1214 {vex}.
1215 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
1216
2da2eaf4
AV		 12172020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
1218
1219 PR 25376
1220 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
1221 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
1222 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
1223 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
1224 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
1225 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
1226
45a4bb20
JB		 12272020-01-16 Jan Beulich <jbeulich@suse.com>
1228
1229 * config/tc-i386.c (match_template): Drop found_cpu_match local
1230 variable.
1231
4814632e
JB		 12322020-01-16 Jan Beulich <jbeulich@suse.com>
1233
1234 * testsuite/gas/i386/avx512dq-inval.l,
1235 testsuite/gas/i386/avx512dq-inval.s: New.
1236 * testsuite/gas/i386/i386.exp: Run new test.
1237
131cb553
JL		 12382020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1239
1240 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1241 relocations when the target is 430X, except when extracting part of an
1242 expression.
1243 (msp430_srcoperand): Adjust comment.
1244 Initialize the expp member of the msp430_operand_s struct as
1245 appropriate.
1246 (msp430_dstoperand): Likewise.
1247 * testsuite/gas/msp430/msp430.exp: Run new test.
1248 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1249 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1250
c24d0e8d
AM		 12512020-01-15 Alan Modra <amodra@gmail.com>
1252
1253 * configure.tgt: Add sparc-*-freebsd case.
1254
e44925ae
LC		 12552020-01-14 Lili Cui <lili.cui@intel.com>
1256
1257 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1258 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1259 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1260 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1261 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1262 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1263 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1264 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1265 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1266 * testsuite/gas/i386/align-branch-5.d: Likewise.
1267 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1268 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1269 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1270 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1271 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1272 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1273 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1274 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1275 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1276 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1277 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1278 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1279
7a6bf3be
SB		 12802020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1281
1282 PR 25377
1283 * config/tc-z80.c: Add support for half precision, single
1284 precision and double precision floating point values.
1285 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1286 * doc/as.texi: Add new z80 command line options.
1287 * doc/c-z80.texi: Document new z80 command line options.
1288 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1289 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1290 * testsuite/gas/z80/z80.exp: Run the new test.
1291 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1292 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1293 * testsuite/gas/z80/strings.d: Update expected output.
1294
82e9597c
MM		 12952020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1296
1297 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1298 dependency.
1299
5e4f7e05
CZ		 13002020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1301
1302 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1303 the CPU.
1304 * config/tc-arc.h: Add header if/defs.
1305 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1306
febda64f
AM		 13072020-01-13 Alan Modra <amodra@gmail.com>
1308
1309 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1310
5496abe1
AM		 13112020-01-13 Alan Modra <amodra@gmail.com>
1312
1313 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1314 insertion.
1315
ec4181f2
AM		 13162020-01-10 Alan Modra <amodra@gmail.com>
1317
1318 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1319 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1320
40c75bc8
SB		 13212020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1322
1323 PR 25224
1324 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1325 opcode byte values.
1326 (emit_ld_r_r): Likewise.
1327 (emit_ld_rr_m): Likewise.
1328 (emit_ld_rr_nn): Likewise.
1329
72aea328
JB		 13302020-01-09 Jan Beulich <jbeulich@suse.com>
1331
1332 * config/tc-i386.c (optimize_encoding): Add
1333 is_any_vex_encoding() invocations. Drop respective
1334 i.tm.extension_opcode == None checks.
1335
3f93af61
JB		 13362020-01-09 Jan Beulich <jbeulich@suse.com>
1337
1338 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1339 REX transformations. Correct comment indentation.
1340
7697afb6
JB		 13412020-01-09 Jan Beulich <jbeulich@suse.com>
1342
1343 * config/tc-i386.c (optimize_encoding): Generalize register
1344 transformation for TEST optimization.
1345
d835a58b
JB		 13462020-01-09 Jan Beulich <jbeulich@suse.com>
1347
1348 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1349 testsuite/gas/i386/x86-64-sysenter-amd.d,
1350 testsuite/gas/i386/x86-64-sysenter-amd.l,
1351 testsuite/gas/i386/x86-64-sysenter-intel.d,
1352 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1353 * testsuite/gas/i386/i386.exp: Run new tests.
1354
915808f6
NC		 13552020-01-08 Nick Clifton <nickc@redhat.com>
1356
1357 PR 25284
1358 * doc/as.texi (Align): Document the fact that all arguments can be
1359 omitted.
1360 (Balign): Likewise.
1361 (P2align): Likewise.
1362
f1f28025
NC		 13632020-01-08 Nick Clifton <nickc@redhat.com>
1364
1365 PR 14891
1366 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1367 already defined as a different symbol type.
1368 * testsuite/gas/elf/pr14891.s: New test source file.
1369 * testsuite/gas/elf/pr14891.d: New test driver.
1370 * testsuite/gas/elf/pr14891.s: New test expected error output.
1371 * testsuite/gas/elf/elf.exp: Run the new test.
1372
030a2e78
AM		 13732020-01-08 Alan Modra <amodra@gmail.com>
1374
1375 * config/tc-z8k.c (md_begin): Make idx unsigned.
1376 (get_specific): Likewise for this_index.
1377
2a1ebfb2
CZ		 13782020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1379
1380 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1381 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1382 (md_operand): Set X_md to absent.
1383 (arc_parse_name): Check for X_md.
1384
16d87673
SB		 13852020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1386
1387 PR 25311
1388 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1389 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1390 NO_STRING_ESCAPES.
1391 * read.c (next_char_of_string): Likewise.
1392 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1393 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1394
a2322019
NC		 13952020-01-03 Nick Clifton <nickc@redhat.com>
1396
1397 * po/sv.po: Updated Swedish translation.
1398
5437a02a
JB		 13992020-01-03 Jan Beulich <jbeulich@suse.com>
1400
1401 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1402 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1403
567dfba2
JB		 14042020-01-03 Jan Beulich <jbeulich@suse.com>
1405
1406 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1407 by-element usdot. Add 64-bit form tests for by-element sudot.
1408 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1409
8c45011a
JB		 14102020-01-03 Jan Beulich <jbeulich@suse.com>
1411
1412 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1413 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1414
f4950f76
JB		 14152020-01-03 Jan Beulich <jbeulich@suse.com>
1416
1417 * testsuite/gas/aarch64/f64mm.d,
1418 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1419
6655dba2
SB		 14202020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1421
1422 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1423 support for assembler code generated by SDCC. Add new relocation
1424 types. Add z80-elf target support.
1425 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1426 labels. Local labels starts from ".L".
1427 * NEWS: Mention the new support.
1428 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1429 * testsuite/gas/all/fwdexp.s: Likewise.
1430 * testsuite/gas/all/cond.l: Likewise.
1431 * testsuite/gas/all/cond.s: Likewise.
1432 * testsuite/gas/all/fwdexp.d: Likewise.
1433 * testsuite/gas/all/fwdexp.s: Likewise.
1434 * testsuite/gas/elf/section2.e-mips: Likewise.
1435 * testsuite/gas/elf/section2.l: Likewise.
1436 * testsuite/gas/elf/section2.s: Likewise.
1437 * testsuite/gas/macros/app1.d: Likewise.
1438 * testsuite/gas/macros/app1.s: Likewise.
1439 * testsuite/gas/macros/app2.d: Likewise.
1440 * testsuite/gas/macros/app2.s: Likewise.
1441 * testsuite/gas/macros/app3.d: Likewise.
1442 * testsuite/gas/macros/app3.s: Likewise.
1443 * testsuite/gas/macros/app4.d: Likewise.
1444 * testsuite/gas/macros/app4.s: Likewise.
1445 * testsuite/gas/macros/app4b.s: Likewise.
1446 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1447 * testsuite/gas/z80/z80.exp: Add new tests
1448 * testsuite/gas/z80/dollar.d: New file.
1449 * testsuite/gas/z80/dollar.s: New file.
1450 * testsuite/gas/z80/ez80_adl_all.d: New file.
1451 * testsuite/gas/z80/ez80_adl_all.s: New file.
1452 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1453 * testsuite/gas/z80/ez80_isuf.s: New file.
1454 * testsuite/gas/z80/ez80_z80_all.d: New file.
1455 * testsuite/gas/z80/ez80_z80_all.s: New file.
1456 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1457 * testsuite/gas/z80/r800_extra.d: New file.
1458 * testsuite/gas/z80/r800_extra.s: New file.
1459 * testsuite/gas/z80/r800_ii8.d: New file.
1460 * testsuite/gas/z80/r800_z80_doc.d: New file.
1461 * testsuite/gas/z80/z180.d: New file.
1462 * testsuite/gas/z80/z180.s: New file.
1463 * testsuite/gas/z80/z180_z80_doc.d: New file.
1464 * testsuite/gas/z80/z80_doc.d: New file.
1465 * testsuite/gas/z80/z80_doc.s: New file.
1466 * testsuite/gas/z80/z80_ii8.d: New file.
1467 * testsuite/gas/z80/z80_ii8.s: New file.
1468 * testsuite/gas/z80/z80_in_f_c.d: New file.
1469 * testsuite/gas/z80/z80_in_f_c.s: New file.
1470 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1471 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1472 * testsuite/gas/z80/z80_out_c_0.d: New file.
1473 * testsuite/gas/z80/z80_out_c_0.s: New file.
1474 * testsuite/gas/z80/z80_reloc.d: New file.
1475 * testsuite/gas/z80/z80_reloc.s: New file.
1476 * testsuite/gas/z80/z80_sli.d: New file.
1477 * testsuite/gas/z80/z80_sli.s: New file.
1478
a65b5de6
SN		 14792020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1480
1481 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1482 REGLIST_RN.
1483
b14ce8bf
AM		 14842020-01-01 Alan Modra <amodra@gmail.com>
1485
1486 Update year range in copyright notice of all files.
1487
0b114740 1488For older changes see ChangeLog-2019
3499769a 1489\f
0b114740 1490Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM		 1491
1492Copying and distribution of this file, with or without modification,
1493are permitted in any medium without royalty provided the copyright
1494notice and this notice are preserved.
1495
1496Local Variables:
1497mode: change-log
1498left-margin: 8
1499fill-column: 74
1500version-control: never
1501End:
GDB Binutils - Deliverables
This page took 0.314485 seconds and 4 git commands to generate.