* breakpoint.c (fetch_watchpoint_value): New function.
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
783de163
AM
12008-03-01 Alan Modra <amodra@bigpond.net.au>
2
3 * config/tc-ppc.h (struct _ppc_fix_extra): New.
4 (ppc_cpu): Declare.
5 (TC_FIX_TYPE, TC_INIT_FIX_DATA): Define.
6 * config/tc-ppc.c (ppu_cpu): Make global.
7 (ppc_insert_operand): Add ppu_cpu parameter.
8 (md_assemble): Adjust for above change.
9 (md_apply_fix): Pass tc_fix_data.ppc_cpu to ppc_insert_operand.
10
5ad34203
NC
112008-02-22 Nick Clifton <nickc@redhat.com>
12
13 * config/tc-arm.c (do_bx): Only test EF_ARM_EABI_VERSION on ELF
584206db 14 targeted ARM ports, otherwise just skip generating the reloc.
5ad34203 15
1ceab344
L
162008-02-18 H.J. Lu <hongjiu.lu@intel.com>
17
18 * doc/c-i386.texi: Update -march= and .arch.
19
ca75ed2d
NC
202008-02-18 Nick Clifton <nickc@redhat.com>
21
22 * config/tc-mn10300.c (has_known_symbol_location): New function.
23 Do not regard weak symbols as having a known location.
24 (md_estimate_size_before_relax): Use new function.
25 (md_pcrel_from): Do not compute a pcrel against a weak symbol.
26
192dc9c6
JB
272008-02-18 Jan Beulich <jbeulich@novell.com>
28
29 * config/tc-i386.c (match_template): Disallow 'l' suffix when
30 currently selected CPU has no 32-bit support.
31 (parse_real_register): Do not return registers not available on
32 currently selected CPU.
33
1fed0ba1
L
342008-02-16 H.J. Lu <hongjiu.lu@intel.com>
35
36 * config/tc-i386.c (process_immext): Fix format.
37
65da13b5
L
382008-02-16 H.J. Lu <hongjiu.lu@intel.com>
39
40 * config/tc-i386.c (inoutportreg): New.
41 (process_immext): New.
42 (md_assemble): Use it.
43 (update_imm): Use imm16 and imm32s.
44 (i386_att_operand): Use inoutportreg.
45
0dfbf9d7
L
462008-02-14 H.J. Lu <hongjiu.lu@intel.com>
47
48 * config/tc-i386.c (operand_type_all_zero): New.
49 (operand_type_set): Likewise.
50 (operand_type_equal): Likewise.
51 (cpu_flags_all_zero): Likewise.
52 (cpu_flags_set): Likewise.
53 (cpu_flags_equal): Likewise.
54 (UINTS_ALL_ZERO): Removed.
55 (UINTS_SET): Likewise.
56 (UINTS_CLEAR): Likewise.
57 (UINTS_EQUAL): Likewise.
58 (cpu_flags_match): Updated.
59 (smallest_imm_type): Likewise.
60 (set_cpu_arch): Likewise.
61 (md_assemble): Likewise.
62 (optimize_imm): Likewise.
63 (match_template): Likewise.
64 (process_suffix): Likewise.
65 (update_imm): Likewise.
66 (process_drex): Likewise.
67 (process_operands): Likewise.
68 (build_modrm_byte): Likewise.
69 (i386_immediate): Likewise.
70 (i386_displacement): Likewise.
71 (i386_att_operand): Likewise.
72 (parse_real_register): Likewise.
73 (md_parse_option): Likewise.
74 (i386_target_format): Likewise.
75
93ac2687
NC
762008-02-14 Dimitry Andric <dimitry@andric.com>
77
78 PR gas/5712
79 * config/tc-arm.c (s_arm_unwind_save): Advance the input line
80 pointer past the comma after parsing a floating point register
81 name.
82
d669d37f
NC
832008-02-14 Hakan Ardo <hakan@debian.org>
84
85 PR gas/2626
86 * config/tc-avr.c (mcu_types): Change the ISA tyoe of the attiny26
87 to AVR_ISA_2xxe.
88 (avr_operand): Disallow post-increment addressing in the lpm
89 instruction for the attiny26.
90
b7240065
JB
912008-02-13 Jan Beulich <jbeulich@novell.com>
92
93 * config/tc-i386.c (parse_real_register): Don't return 'FLAT'
94 if not in Intel mode.
95 (i386_intel_operand): Ignore segment overrides in immediate and
96 offset operands.
97 (intel_e11): Range-check i.mem_operands before use as array
98 index. Filter out FLAT for uses other than as segment override.
99 (intel_get_token): Remove broken promotion of "FLAT:" to mean
100 "offset FLAT:".
101
34b772a6
JB
1022008-02-13 Jan Beulich <jbeulich@novell.com>
103
104 * config/tc-i386.c (intel_e09): Also special-case 'bound'.
105
a60de03c
JB
1062008-02-13 Jan Beulich <jbeulich@novell.com>
107
108 * config/tc-i386.c (allow_pseudo_reg): New.
109 (parse_real_register): Check for NULL just once. Allow all
110 register table entries when allow_pseudo_reg is non-zero.
111 Don't allow any registers without type when allow_pseudo_reg
112 is zero.
113 (tc_x86_regname_to_dw2regnum): Replace with ...
114 (tc_x86_parse_to_dw2regnum): ... this.
115 (tc_x86_frame_initial_instructions): Adjust for above change.
116 * config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
117 (tc_parse_to_dw2regnum): New.
118 (tc_x86_regname_to_dw2regnum): Replace with ...
119 (tc_x86_parse_to_dw2regnum): ... this.
120 * dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
121 (cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
122 error handling.
123
9c95b521
NC
1242008-02-12 Nick Clifton <nickc@redhat.com>
125
126 * config/tc-tic4x.c (tic4x_insn_insert): Add const qualifier to
127 argument.
128 (tic4x_insn_add): Likewise.
129 (md_begin): Drop cast that was discarding a const qualifier.
130 * config/tc-d30v.c (get_reloc): Add const qualifier to op
131 argument.
132 (build_insn): Drop cast that was discarding a const qualifier.
133
f03fe4c1
L
1342008-02-11 H.J. Lu <hongjiu.lu@intel.com>
135
136 * config/tc-i386.c (cpu_arch): Add .xsave.
137 (md_show_usage): Add .xsave.
138
139 * doc/c-i386.texi: Add xsave to -march=.
140
1bf57e9f
AM
1412008-02-07 Alan Modra <amodra@bigpond.net.au>
142
143 * read.c (s_weakref): Don't pass unadorned NULL to concat.
144 * config/tc-i386.c (set_cpu_arch, md_parse_option): Likewise.
145
2276bc20
BW
1462008-02-05 Sterling Augustine <sterling@tensilica.com>
147
148 * config/tc-xtensa.c (relax_frag_immed): Change internal consistency
149 checks into assertions. When relaxation produces an operation that
150 does not fit in the current FLIX instruction, make sure that the
151 operation is relaxed as needed to account for being placed following
152 the current instruction.
153
bb8541b9
L
1542008-02-04 H.J. Lu <hongjiu.lu@intel.com>
155
156 PR 5715
157 * configure: Regenerated.
158
967344c6
AN
1592008-02-04 Adam Nemet <anemet@caviumnetworks.com>
160
161 * config/tc-mips.c (mips_cpu_info_table): Add Octeon.
162
f8a52b59
BW
1632008-01-31 Marc Gauthier <marc@tensilica.com>
164
165 * configure.tgt (xtensa*-*-*): Recognize processor variants.
166
6e3d6dc1
NC
1672008-01-25 Kai Tietz <kai.tietz@onevision.com>
168
169 * read.c: (emit_expr): Correct for mingw use of printf size
170 specifier.
171
cec28c98
BW
1722008-01-24 Bob Wilson <bob.wilson@acm.org>
173
174 * doc/c-xtensa.texi (Xtensa Syntax): Clarify handling of opcodes that
175 can only be encoded in FLIX instructions but are not specified as such.
176 (Xtensa Automatic Alignment): Remove obsolete comment about debugging
177 labels.
178
ae40c993
L
1792008-01-24 H.J. Lu <hongjiu.lu@intel.com>
180
181 * NEWS: Mention new command line options for x86 targets.
182
599121aa
L
1832008-01-23 H.J. Lu <hongjiu.lu@intel.com>
184
185 * config/tc-i386.c (md_show_usage): Replace tabs with spaces.
186
2b1ed17b
EW
1872008-01-23 Eric B. Weddington <eric.weddington@atmel.com>
188
189 * config/tc-avr.c (mcu_types): Change opcode set for at86rf401.
190
2cb4f3d5
L
1912008-01-23 H.J. Lu <hongjiu.lu@intel.com>
192
193 * config/tc-i386.c (md_show_usage): Show more processors for
194 -march=/-mtune=.
195
115c7c25
L
1962008-01-22 H.J. Lu <hongjiu.lu@intel.com>
197
198 * config/tc-i386.c (i386_target_format): Remove cpummx2.
199
6305a203
L
2002008-01-22 H.J. Lu <hongjiu.lu@intel.com>
201
202 * config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h.
203 (XXX_MNEM_SUFFIX): Likewise.
204 (END_OF_INSN): Likewise.
205 (templates): Likewise.
206 (modrm_byte): Likewise.
207 (rex_byte): Likewise.
208 (DREX_XXX): Likewise.
209 (drex_byte): Likewise.
210 (sib_byte): Likewise.
211 (processor_type): Likewise.
212 (arch_entry): Likewise.
213 (cpu_sub_arch_name): Remove const.
214 (cpu_arch): Add .vmx and .smx.
215 (set_cpu_arch): Append cpu_sub_arch_name.
216 (md_parse_option): Support -march=CPU[,+EXTENSION...].
217 (md_show_usage): Updated.
218
219 * config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c.
220 (XXX_MNEM_SUFFIX): Likewise.
221 (END_OF_INSN): Likewise.
222 (templates): Likewise.
223 (modrm_byte): Likewise.
224 (rex_byte): Likewise.
225 (DREX_XXX): Likewise.
226 (drex_byte): Likewise.
227 (sib_byte): Likewise.
228 (processor_type): Likewise.
229 (arch_entry): Likewise.
230
231 * doc/as.texinfo: Update i386 -march option.
232
233 * doc/c-i386.texi: Update -march= for ISA.
234
fb227da0
BW
2352008-01-18 Bob Wilson <bob.wilson@acm.org>
236
237 * config/tc-xtensa.c (xtensa_leb128): New function.
238 (md_pseudo_table): Use it for sleb128 and uleb128.
239 (is_leb128_expr): New internal flag.
240 (xtensa_symbol_new_hook): Check new flag.
241
982b62a0
EW
2422008-01-16 Eric B. Weddington <eric.weddington@atmel.com>
243
244 * config/tc-avr.c (mcu_types): Change opcode set for avr3,
245 at90usb82, at90usb162.
246 * doc/c-avr.texi: Change architecture grouping for at90usb82,
247 at90usb162.
248 These changes support the new avr35 architecture group in gcc.
249
321fd21e
L
2502008-01-15 H.J. Lu <hongjiu.lu@intel.com>
251
252 * config/tc-i386.c (md_assemble): Also zap movzx and movsx
253 suffix for AT&T syntax.
254
5c07affc
L
2552008-01-14 H.J. Lu <hongjiu.lu@intel.com>
256
257 * config/tc-i386.c (match_reg_size): New.
258 (match_mem_size): Likewise.
259 (operand_size_match): Likewise.
260 (operand_type_match): Also clear all size fields.
261 (match_template): Skip Intel syntax when in AT&T syntax.
262 Call operand_size_match to check operand size.
263 (i386_att_operand): Set the mem field to 1 for memory
264 operand.
265 (i386_intel_operand): Likewise.
266
7d5e4556
L
2672008-01-12 H.J. Lu <hongjiu.lu@intel.com>
268
269 PR gas/5534
270 * config/tc-i386.c (_i386_insn): Update comment.
271 (operand_type_match): Also clear unspecified.
272 (operand_type_register_match): Likewise.
273 (parse_operands): Initialize unspecified.
274 (i386_intel_operand): Likewise.
275 (match_template): Check memory and accumulator operand size.
276 (i386_att_operand): Clear unspecified on register operand.
277 (intel_e11): Likewise.
278 (intel_e09): Set operand size and clean unspecified for
279 "XXX PTR".
280
a4a151e6
AS
2812008-01-11 Andreas Schwab <schwab@suse.de>
282
283 * read.c (s_space): Declare `repeat' as offsetT.
284
50aecf8c
L
2852008-01-10 H.J. Lu <hongjiu.lu@intel.com>
286
287 * config/tc-i386.c (match_template): Check processor support
288 first.
289
2dbab7d5
L
2902008-01-10 H.J. Lu <hongjiu.lu@intel.com>
291
292 * config/tc-i386.c (match_template): Continue if processor
293 doesn't match.
294
417c21b7
AO
2952008-01-09 Alexandre Oliva <aoliva@redhat.com>
296
297 * config/tc-ia64.c (ia64_convert_frag): Zero-initialize room for
298 unwind personality function address.
299
7ddd14de
BW
3002008-01-09 Bob Wilson <bob.wilson@acm.org>
301
302 * dwarf2dbg.c (out_sleb128): Delete.
303 (size_fixed_inc_line_addr, emit_fixed_inc_line_addr): New.
304 (out_fixed_inc_line_addr): Delete.
305 (relax_inc_line_addr, dwarf2dbg_estimate_size_before_relax): Call new
306 size_fixed_inc_line_addr if DWARF2_USE_FIXED_ADVANCE_PC is set.
307 (dwarf2dbg_convert_frag): Likewise for emit_fixed_inc_line_addr.
308 (process_entries): Remove calls to out_fixed_inc_line_addr. When
309 DWARF2_USE_FIXED_ADVANCE_PC is set, call relax_inc_line_addr.
310 * read.h (emit_expr_fix): New prototype.
311 * read.c (emit_expr): Move code to emit_expr_fix and use it here.
312 (emit_expr_fix): New.
313
45664ddb
L
3142008-01-09 H.J. Lu <hongjiu.lu@intel.com>
315
316 * config/tc-i386.c (match_template): Check register size
317 only when size of operands can be encoded the canonical way.
318
a7619375
L
3192008-01-08 H.J. Lu <hongjiu.lu@intel.com>
320
321 * config/tc-i386.c (i386_operand): Renamed to ...
322 (i386_att_operand): This.
323 (parse_operands): Updated.
324
e1d4d893
L
3252008-01-05 H.J. Lu <hongjiu.lu@intel.com>
326
327 * doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
328
329 * config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
330 only.
331 (md_assemble): Remove Intel mode workaround.
332 (match_template): Check support for old gcc, AT&T mnemonic
333 and Intel Syntax.
334 (md_parse_option): Don't set intel_mnemonic to 0 for
335 OPTION_MOLD_GCC.
336
23117009
L
3372008-01-04 H.J. Lu <hongjiu.lu@intel.com>
338
339 * config/tc-i386.h: Update copyright to 2008.
340
b0e34bfe
NC
3412008-01-04 Nick Clifton <nickc@redhat.com>
342
343 * config/tc-ppc.c (parse_cpu): Preserve the settings of the
344 PPC_OPCODE_ALTIVEC and PPC_OPCODE_SPE flags.
345
aacd03c3
L
3462008-01-03 H.J. Lu <hongjiu.lu@intel.com>
347
348 * config/tc-i386.c (md_assemble): Use !intel_mnemonic instead
349 of SYSV386_COMPAT.
350
3629bb00
L
3512008-01-03 H.J. Lu <hongjiu.lu@intel.com>
352
353 * gas/config/tc-i386.c (cpu_arch_flags_not): Removed.
354 (cpu_flags_not): Likewise.
355 (cpu_flags_match): Updated to check 64bit and arch.
356 (set_code_flag): Remove cpu_arch_flags_not.
357 (set_16bit_gcc_code_flag): Likewise.
358 (set_cpu_arch): Likewise.
359 (md_begin): Likewise.
360 (parse_insn): Call cpu_flags_match to check 64bit and arch.
361 (match_template): Likewise.
362
5dd15031
JJ
3632008-01-03 Jakub Jelinek <jakub@redhat.com>
364
365 * config/tc-i386.c (process_drex): Initialize modrm_reg and
366 modrm_regmem to 0 instead of None.
367
24995bd6
L
3682008-01-03 H.J. Lu <hongjiu.lu@intel.com>
369
370 * config/tc-i386.c (match_template): Use the xmmword field
371 instead of no_xsuf.
372
fc4adea1
L
3732008-01-02 H.J. Lu <hongjiu.lu@intel.com>
374
375 * config/tc-i386.c (process_suffix): Fix a typo.
376
582d5edd
L
3772008-01-02 H.J. Lu <hongjiu.lu@intel.com>
378
379 PR gas/5534
380 * config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
381 Check memory size in Intel mode.
382 (process_suffix): Handle XMMWORD_MNEM_SUFFIX.
383 (intel_e09): Likewise.
384
385 * config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.
386
e7c604dd
CM
3872008-01-02 Catherine Moore <clm@codesourcery.com>
388
389 * config/tc-mips.c (mips_ip): Check operands on jalr instruction.
390
6c7ac64e 391For older changes see ChangeLog-2007
08d56133
NC
392\f
393Local Variables:
394mode: change-log
395left-margin: 8
396fill-column: 74
397version-control: never
398End:
This page took 0.402891 seconds and 4 git commands to generate.