ChangeLog rotatation and copyright year update
[deliverable/binutils-gdb.git] / gas / cgen.c
CommitLineData
252b5132 1/* GAS interface for targets using CGEN: Cpu tools GENerator.
b90efa5b 2 Copyright (C) 1996-2015 Free Software Foundation, Inc.
252b5132 3
2ab1486e 4 This file is part of GAS, the GNU Assembler.
252b5132 5
2ab1486e
NC
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
ec2655a6 8 the Free Software Foundation; either version 3, or (at your option)
2ab1486e 9 any later version.
252b5132 10
ec2655a6
NC
11 GAS is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
252b5132 15
2ab1486e
NC
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free Software
4b4da160 18 Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132 19
ebd1c875 20#include "as.h"
df7b86aa 21#include <setjmp.h>
252b5132
RH
22#include "symcat.h"
23#include "cgen-desc.h"
252b5132
RH
24#include "subsegs.h"
25#include "cgen.h"
272d76e0 26#include "dwarf2dbg.h"
252b5132 27
280d71bf
DB
28#include "symbols.h"
29#include "struc-symbol.h"
30
31#ifdef OBJ_COMPLEX_RELC
32static expressionS * make_right_shifted_expr
33 (expressionS *, const int, const int);
34
35static unsigned long gas_cgen_encode_addend
36 (const unsigned long, const unsigned long, const unsigned long, \
37 const unsigned long, const unsigned long, const unsigned long, \
38 const unsigned long);
39
40static char * weak_operand_overflow_check
41 (const expressionS *, const CGEN_OPERAND *);
42
43static void queue_fixup_recursively
44 (const int, const int, expressionS *, \
45 const CGEN_MAYBE_MULTI_IFLD *, const int, const int);
46
47static int rightshift = 0;
48#endif
73ee5e4c 49static void queue_fixup (int, int, expressionS *);
0609eb57 50
252b5132
RH
51/* Opcode table descriptor, must be set by md_begin. */
52
53CGEN_CPU_DESC gas_cgen_cpu_desc;
54
55/* Callback to insert a register into the symbol table.
56 A target may choose to let GAS parse the registers.
57 ??? Not currently used. */
58
59void
60cgen_asm_record_register (name, number)
542d6675 61 char *name;
252b5132
RH
62 int number;
63{
64 /* Use symbol_create here instead of symbol_new so we don't try to
65 output registers into the object file's symbol table. */
66 symbol_table_insert (symbol_create (name, reg_section,
542d6675 67 number, &zero_address_frag));
252b5132
RH
68}
69
70/* We need to keep a list of fixups. We can't simply generate them as
71 we go, because that would require us to first create the frag, and
72 that would screw up references to ``.''.
73
74 This is used by cpu's with simple operands. It keeps knowledge of what
75 an `expressionS' is and what a `fixup' is out of CGEN which for the time
76 being is preferable.
77
78 OPINDEX is the index in the operand table.
79 OPINFO is something the caller chooses to help in reloc determination. */
80
2ab1486e
NC
81struct fixup
82{
252b5132
RH
83 int opindex;
84 int opinfo;
85 expressionS exp;
280d71bf
DB
86 struct cgen_maybe_multi_ifield * field;
87 int msb_field_p;
252b5132
RH
88};
89
542d6675 90static struct fixup fixups[GAS_CGEN_MAX_FIXUPS];
252b5132
RH
91static int num_fixups;
92
93/* Prepare to parse an instruction.
94 ??? May wish to make this static and delete calls in md_assemble. */
95
96void
97gas_cgen_init_parse ()
98{
99 num_fixups = 0;
100}
101
102/* Queue a fixup. */
103
104static void
105queue_fixup (opindex, opinfo, expP)
106 int opindex;
eabed1c0 107 int opinfo;
252b5132
RH
108 expressionS * expP;
109{
110 /* We need to generate a fixup for this expression. */
111 if (num_fixups >= GAS_CGEN_MAX_FIXUPS)
112 as_fatal (_("too many fixups"));
30a2b4ef 113 fixups[num_fixups].exp = *expP;
252b5132
RH
114 fixups[num_fixups].opindex = opindex;
115 fixups[num_fixups].opinfo = opinfo;
116 ++ num_fixups;
117}
118
002de68b
JH
119/* The following functions allow fixup chains to be stored, retrieved,
120 and swapped. They are a generalization of a pre-existing scheme
121 for storing, restoring and swapping fixup chains that was used by
122 the m32r port. The functionality is essentially the same, only
123 instead of only being able to store a single fixup chain, an entire
124 array of fixup chains can be stored. It is the user's responsibility
125 to keep track of how many fixup chains have been stored and which
126 elements of the array they are in.
127
d1a6c242
KH
128 The algorithms used are the same as in the old scheme. Other than the
129 "array-ness" of the whole thing, the functionality is identical to the
002de68b
JH
130 old scheme.
131
132 gas_cgen_initialize_saved_fixups_array():
133 Sets num_fixups_in_chain to 0 for each element. Call this from
134 md_begin() if you plan to use these functions and you want the
2ab1486e 135 fixup count in each element to be set to 0 initially. This is
002de68b
JH
136 not necessary, but it's included just in case. It performs
137 the same function for each element in the array of fixup chains
138 that gas_init_parse() performs for the current fixups.
139
140 gas_cgen_save_fixups (element):
141 element - element number of the array you wish to store the fixups
142 to. No mechanism is built in for tracking what element
143 was last stored to.
144
145 gas_cgen_restore_fixups (element):
146 element - element number of the array you wish to restore the fixups
147 from.
148
149 gas_cgen_swap_fixups(int element):
150 element - swap the current fixups with those in this element number.
151*/
152
2ab1486e
NC
153struct saved_fixups
154{
232431a0
NC
155 struct fixup fixup_chain[GAS_CGEN_MAX_FIXUPS];
156 int num_fixups_in_chain;
002de68b 157};
252b5132 158
002de68b 159static struct saved_fixups stored_fixups[MAX_SAVED_FIXUP_CHAINS];
252b5132 160
232431a0 161void
002de68b 162gas_cgen_initialize_saved_fixups_array ()
252b5132 163{
232431a0
NC
164 int i = 0;
165
166 while (i < MAX_SAVED_FIXUP_CHAINS)
167 stored_fixups[i++].num_fixups_in_chain = 0;
252b5132
RH
168}
169
232431a0
NC
170void
171gas_cgen_save_fixups (i)
172 int i;
252b5132 173{
232431a0
NC
174 if (i < 0 || i >= MAX_SAVED_FIXUP_CHAINS)
175 {
176 as_fatal ("index into stored_fixups[] out of bounds");
177 return;
178 }
179
180 stored_fixups[i].num_fixups_in_chain = num_fixups;
181 memcpy (stored_fixups[i].fixup_chain, fixups,
182 sizeof (fixups[0]) * num_fixups);
183 num_fixups = 0;
252b5132
RH
184}
185
232431a0
NC
186void
187gas_cgen_restore_fixups (i)
188 int i;
252b5132 189{
232431a0
NC
190 if (i < 0 || i >= MAX_SAVED_FIXUP_CHAINS)
191 {
192 as_fatal ("index into stored_fixups[] out of bounds");
193 return;
194 }
195
196 num_fixups = stored_fixups[i].num_fixups_in_chain;
d1a6c242 197 memcpy (fixups, stored_fixups[i].fixup_chain,
232431a0
NC
198 (sizeof (stored_fixups[i].fixup_chain[0])) * num_fixups);
199 stored_fixups[i].num_fixups_in_chain = 0;
002de68b 200}
252b5132 201
232431a0
NC
202void
203gas_cgen_swap_fixups (i)
204 int i;
002de68b 205{
232431a0
NC
206 if (i < 0 || i >= MAX_SAVED_FIXUP_CHAINS)
207 {
208 as_fatal ("index into stored_fixups[] out of bounds");
209 return;
210 }
211
212 if (num_fixups == 0)
213 gas_cgen_restore_fixups (i);
214
215 else if (stored_fixups[i].num_fixups_in_chain == 0)
216 gas_cgen_save_fixups (i);
217
218 else
219 {
220 int tmp;
221 struct fixup tmp_fixup;
222
223 tmp = stored_fixups[i].num_fixups_in_chain;
224 stored_fixups[i].num_fixups_in_chain = num_fixups;
225 num_fixups = tmp;
226
227 for (tmp = GAS_CGEN_MAX_FIXUPS; tmp--;)
228 {
229 tmp_fixup = stored_fixups[i].fixup_chain [tmp];
230 stored_fixups[i].fixup_chain[tmp] = fixups [tmp];
231 fixups [tmp] = tmp_fixup;
232 }
252b5132
RH
233 }
234}
235
236/* Default routine to record a fixup.
237 This is a cover function to fix_new.
238 It exists because we record INSN with the fixup.
239
240 FRAG and WHERE are their respective arguments to fix_new_exp.
241 LENGTH is in bits.
242 OPINFO is something the caller chooses to help in reloc determination.
243
244 At this point we do not use a bfd_reloc_code_real_type for
245 operands residing in the insn, but instead just use the
246 operand index. This lets us easily handle fixups for any
55cf6793 247 operand type. We pick a BFD reloc type in md_apply_fix. */
252b5132
RH
248
249fixS *
250gas_cgen_record_fixup (frag, where, insn, length, operand, opinfo, symbol, offset)
251 fragS * frag;
252 int where;
253 const CGEN_INSN * insn;
254 int length;
255 const CGEN_OPERAND * operand;
256 int opinfo;
257 symbolS * symbol;
258 offsetT offset;
259{
542d6675 260 fixS *fixP;
252b5132
RH
261
262 /* It may seem strange to use operand->attrs and not insn->attrs here,
263 but it is the operand that has a pc relative relocation. */
252b5132
RH
264 fixP = fix_new (frag, where, length / 8, symbol, offset,
265 CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR),
266 (bfd_reloc_code_real_type)
267 ((int) BFD_RELOC_UNUSED
268 + (int) operand->type));
269 fixP->fx_cgen.insn = insn;
270 fixP->fx_cgen.opinfo = opinfo;
280d71bf
DB
271 fixP->fx_cgen.field = NULL;
272 fixP->fx_cgen.msb_field_p = 0;
252b5132
RH
273
274 return fixP;
275}
276
277/* Default routine to record a fixup given an expression.
278 This is a cover function to fix_new_exp.
279 It exists because we record INSN with the fixup.
280
281 FRAG and WHERE are their respective arguments to fix_new_exp.
282 LENGTH is in bits.
283 OPINFO is something the caller chooses to help in reloc determination.
284
285 At this point we do not use a bfd_reloc_code_real_type for
286 operands residing in the insn, but instead just use the
287 operand index. This lets us easily handle fixups for any
55cf6793 288 operand type. We pick a BFD reloc type in md_apply_fix. */
252b5132
RH
289
290fixS *
291gas_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp)
292 fragS * frag;
293 int where;
294 const CGEN_INSN * insn;
295 int length;
296 const CGEN_OPERAND * operand;
297 int opinfo;
298 expressionS * exp;
299{
542d6675 300 fixS *fixP;
252b5132
RH
301
302 /* It may seem strange to use operand->attrs and not insn->attrs here,
303 but it is the operand that has a pc relative relocation. */
252b5132
RH
304 fixP = fix_new_exp (frag, where, length / 8, exp,
305 CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR),
306 (bfd_reloc_code_real_type)
307 ((int) BFD_RELOC_UNUSED
308 + (int) operand->type));
309 fixP->fx_cgen.insn = insn;
310 fixP->fx_cgen.opinfo = opinfo;
280d71bf
DB
311 fixP->fx_cgen.field = NULL;
312 fixP->fx_cgen.msb_field_p = 0;
252b5132
RH
313
314 return fixP;
315}
316
280d71bf
DB
317#ifdef OBJ_COMPLEX_RELC
318static symbolS *
319expr_build_binary (operatorT op, symbolS * s1, symbolS * s2)
320{
321 expressionS e;
322
323 e.X_op = op;
324 e.X_add_symbol = s1;
325 e.X_op_symbol = s2;
326 e.X_add_number = 0;
327 return make_expr_symbol (& e);
328}
329#endif
330
252b5132
RH
331/* Used for communication between the next two procedures. */
332static jmp_buf expr_jmp_buf;
680d2857 333static int expr_jmp_buf_p;
252b5132
RH
334
335/* Callback for cgen interface. Parse the expression at *STRP.
336 The result is an error message or NULL for success (in which case
337 *STRP is advanced past the parsed text).
338 WANT is an indication of what the caller is looking for.
339 If WANT == CGEN_ASM_PARSE_INIT the caller is beginning to try to match
340 a table entry with the insn, reset the queued fixups counter.
341 An enum cgen_parse_operand_result is stored in RESULTP.
342 OPINDEX is the operand's table entry index.
343 OPINFO is something the caller chooses to help in reloc determination.
344 The resulting value is stored in VALUEP. */
345
346const char *
347gas_cgen_parse_operand (cd, want, strP, opindex, opinfo, resultP, valueP)
280d71bf
DB
348
349#ifdef OBJ_COMPLEX_RELC
350 CGEN_CPU_DESC cd;
351#else
eabed1c0 352 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
280d71bf 353#endif
252b5132 354 enum cgen_parse_operand_type want;
542d6675 355 const char **strP;
252b5132
RH
356 int opindex;
357 int opinfo;
542d6675
KH
358 enum cgen_parse_operand_result *resultP;
359 bfd_vma *valueP;
252b5132
RH
360{
361#ifdef __STDC__
362 /* These are volatile to survive the setjmp. */
363 char * volatile hold;
364 enum cgen_parse_operand_result * volatile resultP_1;
199fea98 365 volatile int opinfo_1;
252b5132 366#else
542d6675
KH
367 static char *hold;
368 static enum cgen_parse_operand_result *resultP_1;
199fea98 369 int opinfo_1;
252b5132 370#endif
0609eb57 371 const char *errmsg;
252b5132
RH
372 expressionS exp;
373
280d71bf
DB
374#ifdef OBJ_COMPLEX_RELC
375 volatile int signed_p = 0;
376 symbolS * stmp = NULL;
377 bfd_reloc_code_real_type reloc_type;
378 const CGEN_OPERAND * operand;
379 fixS dummy_fixup;
380#endif
252b5132
RH
381 if (want == CGEN_PARSE_OPERAND_INIT)
382 {
383 gas_cgen_init_parse ();
384 return NULL;
385 }
386
387 resultP_1 = resultP;
388 hold = input_line_pointer;
542d6675 389 input_line_pointer = (char *) *strP;
199fea98 390 opinfo_1 = opinfo;
252b5132
RH
391
392 /* We rely on md_operand to longjmp back to us.
393 This is done via gas_cgen_md_operand. */
394 if (setjmp (expr_jmp_buf) != 0)
395 {
680d2857 396 expr_jmp_buf_p = 0;
252b5132 397 input_line_pointer = (char *) hold;
542d6675 398 *resultP_1 = CGEN_PARSE_OPERAND_RESULT_ERROR;
232431a0 399 return _("illegal operand");
252b5132
RH
400 }
401
680d2857 402 expr_jmp_buf_p = 1;
542d6675 403 expression (&exp);
680d2857 404 expr_jmp_buf_p = 0;
0609eb57 405 errmsg = NULL;
252b5132 406
542d6675 407 *strP = input_line_pointer;
252b5132
RH
408 input_line_pointer = hold;
409
097f809a 410#ifdef TC_CGEN_PARSE_FIX_EXP
3d063691 411 opinfo_1 = TC_CGEN_PARSE_FIX_EXP (opinfo_1, & exp);
fae0b242 412#endif
097f809a 413
252b5132
RH
414 /* FIXME: Need to check `want'. */
415
416 switch (exp.X_op)
417 {
542d6675 418 case O_illegal:
252b5132 419 errmsg = _("illegal operand");
542d6675 420 *resultP = CGEN_PARSE_OPERAND_RESULT_ERROR;
252b5132 421 break;
542d6675 422 case O_absent:
252b5132 423 errmsg = _("missing operand");
542d6675 424 *resultP = CGEN_PARSE_OPERAND_RESULT_ERROR;
252b5132 425 break;
542d6675 426 case O_constant:
90219bd0
AO
427 if (want == CGEN_PARSE_OPERAND_SYMBOLIC)
428 goto de_fault;
542d6675
KH
429 *valueP = exp.X_add_number;
430 *resultP = CGEN_PARSE_OPERAND_RESULT_NUMBER;
252b5132 431 break;
542d6675
KH
432 case O_register:
433 *valueP = exp.X_add_number;
434 *resultP = CGEN_PARSE_OPERAND_RESULT_REGISTER;
252b5132 435 break;
90219bd0 436 de_fault:
542d6675 437 default:
280d71bf
DB
438#ifdef OBJ_COMPLEX_RELC
439 /* Look up operand, check to see if there's an obvious
440 overflow (this helps disambiguate some insn parses). */
441 operand = cgen_operand_lookup_by_num (cd, opindex);
442 errmsg = weak_operand_overflow_check (& exp, operand);
443
444 if (! errmsg)
445 {
446 /* Fragment the expression as necessary, and queue a reloc. */
447 memset (& dummy_fixup, 0, sizeof (fixS));
448
449 reloc_type = md_cgen_lookup_reloc (0, operand, & dummy_fixup);
450
451 if (exp.X_op == O_symbol
452 && reloc_type == BFD_RELOC_RELC
453 && exp.X_add_symbol->sy_value.X_op == O_constant
77ca1325
DD
454 && (!exp.X_add_symbol->bsym
455 || (exp.X_add_symbol->bsym->section != expr_section
456 && exp.X_add_symbol->bsym->section != absolute_section
457 && exp.X_add_symbol->bsym->section != undefined_section)))
280d71bf
DB
458 {
459 /* Local labels will have been (eagerly) turned into constants
460 by now, due to the inappropriately deep insight of the
461 expression parser. Unfortunately make_expr_symbol
462 prematurely dives into the symbol evaluator, and in this
463 case it gets a bad answer, so we manually create the
464 expression symbol we want here. */
465 stmp = symbol_create (FAKE_LABEL_NAME, expr_section, 0,
466 & zero_address_frag);
467 symbol_set_value_expression (stmp, & exp);
fae0b242
DE
468 }
469 else
280d71bf
DB
470 stmp = make_expr_symbol (& exp);
471
472 /* If this is a pc-relative RELC operand, we
fae0b242 473 need to subtract "." from the expression. */
280d71bf
DB
474 if (reloc_type == BFD_RELOC_RELC
475 && CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_PCREL_ADDR))
fae0b242 476 stmp = expr_build_binary (O_subtract, stmp, expr_build_dot ());
280d71bf
DB
477
478 /* FIXME: this is not a perfect heuristic for figuring out
479 whether an operand is signed: it only works when the operand
480 is an immediate. it's not terribly likely that any other
481 values will be signed relocs, but it's possible. */
482 if (operand && (operand->hw_type == HW_H_SINT))
483 signed_p = 1;
fae0b242 484
9ad45734
NC
485 if (stmp->bsym && (stmp->bsym->section == expr_section)
486 && ! S_IS_LOCAL (stmp))
280d71bf
DB
487 {
488 if (signed_p)
489 stmp->bsym->flags |= BSF_SRELC;
490 else
491 stmp->bsym->flags |= BSF_RELC;
492 }
fae0b242 493
280d71bf
DB
494 /* Now package it all up for the fixup emitter. */
495 exp.X_op = O_symbol;
496 exp.X_op_symbol = 0;
497 exp.X_add_symbol = stmp;
498 exp.X_add_number = 0;
fae0b242 499
280d71bf
DB
500 /* Re-init rightshift quantity, just in case. */
501 rightshift = operand->length;
fae0b242 502 queue_fixup_recursively (opindex, opinfo_1, & exp,
280d71bf
DB
503 (reloc_type == BFD_RELOC_RELC) ?
504 & (operand->index_fields) : 0,
505 signed_p, -1);
506 }
507 * resultP = errmsg
508 ? CGEN_PARSE_OPERAND_RESULT_ERROR
509 : CGEN_PARSE_OPERAND_RESULT_QUEUED;
510 *valueP = 0;
511#else
199fea98 512 queue_fixup (opindex, opinfo_1, &exp);
542d6675
KH
513 *valueP = 0;
514 *resultP = CGEN_PARSE_OPERAND_RESULT_QUEUED;
fae0b242 515#endif
252b5132
RH
516 break;
517 }
518
519 return errmsg;
520}
521
522/* md_operand handler to catch unrecognized expressions and halt the
523 parsing process so the next entry can be tried.
524
525 ??? This could be done differently by adding code to `expression'. */
526
527void
528gas_cgen_md_operand (expressionP)
542d6675 529 expressionS *expressionP ATTRIBUTE_UNUSED;
252b5132 530{
680d2857
FCE
531 /* Don't longjmp if we're not called from within cgen_parse_operand(). */
532 if (expr_jmp_buf_p)
533 longjmp (expr_jmp_buf, 1);
252b5132
RH
534}
535
536/* Finish assembling instruction INSN.
537 BUF contains what we've built up so far.
538 LENGTH is the size of the insn in bits.
539 RELAX_P is non-zero if relaxable insns should be emitted as such.
540 Otherwise they're emitted in non-relaxable forms.
541 The "result" is stored in RESULT if non-NULL. */
542
543void
544gas_cgen_finish_insn (insn, buf, length, relax_p, result)
542d6675 545 const CGEN_INSN *insn;
252b5132
RH
546 CGEN_INSN_BYTES_PTR buf;
547 unsigned int length;
548 int relax_p;
542d6675 549 finished_insnS *result;
252b5132
RH
550{
551 int i;
552 int relax_operand;
542d6675 553 char *f;
252b5132
RH
554 unsigned int byte_len = length / 8;
555
556 /* ??? Target foo issues various warnings here, so one might want to provide
557 a hook here. However, our caller is defined in tc-foo.c so there
558 shouldn't be a need for a hook. */
559
560 /* Write out the instruction.
561 It is important to fetch enough space in one call to `frag_more'.
562 We use (f - frag_now->fr_literal) to compute where we are and we
563 don't want frag_now to change between calls.
564
565 Relaxable instructions: We need to ensure we allocate enough
566 space for the largest insn. */
567
b11dcf4e 568 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED))
542d6675
KH
569 /* These currently shouldn't get here. */
570 abort ();
252b5132
RH
571
572 /* Is there a relaxable insn with the relaxable operand needing a fixup? */
573
574 relax_operand = -1;
575 if (relax_p && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXABLE))
576 {
577 /* Scan the fixups for the operand affected by relaxing
578 (i.e. the branch address). */
579
542d6675 580 for (i = 0; i < num_fixups; ++i)
252b5132
RH
581 {
582 if (CGEN_OPERAND_ATTR_VALUE (cgen_operand_lookup_by_num (gas_cgen_cpu_desc, fixups[i].opindex),
583 CGEN_OPERAND_RELAX))
584 {
585 relax_operand = i;
586 break;
587 }
588 }
589 }
590
591 if (relax_operand != -1)
592 {
593 int max_len;
542d6675 594 fragS *old_frag;
2289f85d
AM
595 expressionS *exp;
596 symbolS *sym;
597 offsetT off;
252b5132
RH
598
599#ifdef TC_CGEN_MAX_RELAX
600 max_len = TC_CGEN_MAX_RELAX (insn, byte_len);
601#else
602 max_len = CGEN_MAX_INSN_SIZE;
603#endif
604 /* Ensure variable part and fixed part are in same fragment. */
605 /* FIXME: Having to do this seems like a hack. */
606 frag_grow (max_len);
607
608 /* Allocate space for the fixed part. */
609 f = frag_more (byte_len);
610
611 /* Create a relaxable fragment for this instruction. */
612 old_frag = frag_now;
613
2289f85d
AM
614 exp = &fixups[relax_operand].exp;
615 sym = exp->X_add_symbol;
616 off = exp->X_add_number;
617 if (exp->X_op != O_constant && exp->X_op != O_symbol)
618 {
619 /* Handle complex expressions. */
620 sym = make_expr_symbol (exp);
621 off = 0;
622 }
623
252b5132
RH
624 frag_var (rs_machine_dependent,
625 max_len - byte_len /* max chars */,
626 0 /* variable part already allocated */,
627 /* FIXME: When we machine generate the relax table,
628 machine generate a macro to compute subtype. */
629 1 /* subtype */,
2289f85d
AM
630 sym,
631 off,
252b5132
RH
632 f);
633
634 /* Record the operand number with the fragment so md_convert_frag
635 can use gas_cgen_md_record_fixup to record the appropriate reloc. */
636 old_frag->fr_cgen.insn = insn;
637 old_frag->fr_cgen.opindex = fixups[relax_operand].opindex;
638 old_frag->fr_cgen.opinfo = fixups[relax_operand].opinfo;
639 if (result)
640 result->frag = old_frag;
641 }
642 else
643 {
644 f = frag_more (byte_len);
645 if (result)
646 result->frag = frag_now;
647 }
648
649 /* If we're recording insns as numbers (rather than a string of bytes),
650 target byte order handling is deferred until now. */
651#if CGEN_INT_INSN_P
2132e3a3 652 cgen_put_insn_value (gas_cgen_cpu_desc, (unsigned char *) f, length, *buf);
252b5132
RH
653#else
654 memcpy (f, buf, byte_len);
655#endif
656
272d76e0
FCE
657 /* Emit DWARF2 debugging information. */
658 dwarf2_emit_insn (byte_len);
659
252b5132
RH
660 /* Create any fixups. */
661 for (i = 0; i < num_fixups; ++i)
662 {
663 fixS *fixP;
664 const CGEN_OPERAND *operand =
665 cgen_operand_lookup_by_num (gas_cgen_cpu_desc, fixups[i].opindex);
666
667 /* Don't create fixups for these. That's done during relaxation.
b11dcf4e 668 We don't need to test for CGEN_INSN_RELAXED as they can't get here
252b5132
RH
669 (see above). */
670 if (relax_p
671 && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXABLE)
672 && CGEN_OPERAND_ATTR_VALUE (operand, CGEN_OPERAND_RELAX))
673 continue;
674
675#ifndef md_cgen_record_fixup_exp
676#define md_cgen_record_fixup_exp gas_cgen_record_fixup_exp
677#endif
678
542d6675
KH
679 fixP = md_cgen_record_fixup_exp (frag_now, f - frag_now->fr_literal,
680 insn, length, operand,
681 fixups[i].opinfo,
682 &fixups[i].exp);
280d71bf
DB
683 fixP->fx_cgen.field = fixups[i].field;
684 fixP->fx_cgen.msb_field_p = fixups[i].msb_field_p;
542d6675
KH
685 if (result)
686 result->fixups[i] = fixP;
252b5132
RH
687 }
688
689 if (result)
690 {
691 result->num_fixups = num_fixups;
692 result->addr = f;
693 }
694}
695
280d71bf
DB
696#ifdef OBJ_COMPLEX_RELC
697/* Queue many fixups, recursively. If the field is a multi-ifield,
698 repeatedly queue its sub-parts, right shifted to fit into the field (we
699 assume here multi-fields represent a left-to-right, MSB0-LSB0
700 reading). */
701
702static void
703queue_fixup_recursively (const int opindex,
704 const int opinfo,
705 expressionS * expP,
706 const CGEN_MAYBE_MULTI_IFLD * field,
707 const int signed_p,
708 const int part_of_multi)
709{
710 if (field && field->count)
711 {
712 int i;
fae0b242 713
280d71bf 714 for (i = 0; i < field->count; ++ i)
fae0b242 715 queue_fixup_recursively (opindex, opinfo, expP,
280d71bf
DB
716 & (field->val.multi[i]), signed_p, i);
717 }
718 else
719 {
720 expressionS * new_exp = expP;
721
722#ifdef DEBUG
723 printf ("queueing fixup for field %s\n",
724 (field ? field->val.leaf->name : "??"));
725 print_symbol_value (expP->X_add_symbol);
726#endif
727 if (field && part_of_multi != -1)
728 {
729 rightshift -= field->val.leaf->length;
730
731 /* Shift reloc value by number of bits remaining after this
732 field. */
733 if (rightshift)
fae0b242 734 new_exp = make_right_shifted_expr (expP, rightshift, signed_p);
280d71bf 735 }
fae0b242 736
280d71bf
DB
737 /* Truncate reloc values to length, *after* leftmost one. */
738 fixups[num_fixups].msb_field_p = (part_of_multi <= 0);
739 fixups[num_fixups].field = (CGEN_MAYBE_MULTI_IFLD *) field;
fae0b242 740
280d71bf
DB
741 queue_fixup (opindex, opinfo, new_exp);
742 }
743}
744
745/* Encode the self-describing RELC reloc format's addend. */
746
fae0b242 747static unsigned long
280d71bf
DB
748gas_cgen_encode_addend (const unsigned long start, /* in bits */
749 const unsigned long len, /* in bits */
750 const unsigned long oplen, /* in bits */
751 const unsigned long wordsz, /* in bytes */
752 const unsigned long chunksz, /* in bytes */
753 const unsigned long signed_p,
754 const unsigned long trunc_p)
755{
756 unsigned long res = 0L;
757
758 res |= start & 0x3F;
759 res |= (oplen & 0x3F) << 6;
760 res |= (len & 0x3F) << 12;
761 res |= (wordsz & 0xF) << 18;
762 res |= (chunksz & 0xF) << 22;
763 res |= (CGEN_INSN_LSB0_P ? 1 : 0) << 27;
764 res |= signed_p << 28;
765 res |= trunc_p << 29;
766
767 return res;
768}
769
770/* Purpose: make a weak check that the expression doesn't overflow the
771 operand it's to be inserted into.
772
773 Rationale: some insns used to use %operators to disambiguate during a
774 parse. when these %operators are translated to expressions by the macro
775 expander, the ambiguity returns. we attempt to disambiguate by field
776 size.
fae0b242 777
280d71bf
DB
778 Method: check to see if the expression's top node is an O_and operator,
779 and the mask is larger than the operand length. This would be an
780 overflow, so signal it by returning an error string. Any other case is
781 ambiguous, so we assume it's OK and return NULL. */
782
783static char *
784weak_operand_overflow_check (const expressionS * exp,
785 const CGEN_OPERAND * operand)
786{
787 const unsigned long len = operand->length;
788 unsigned long mask;
789 unsigned long opmask = (((1L << (len - 1)) - 1) << 1) | 1;
790
791 if (!exp)
792 return NULL;
793
794 if (exp->X_op != O_bit_and)
795 {
796 /* Check for implicit overflow flag. */
fae0b242 797 if (CGEN_OPERAND_ATTR_VALUE
280d71bf
DB
798 (operand, CGEN_OPERAND_RELOC_IMPLIES_OVERFLOW))
799 return _("a reloc on this operand implies an overflow");
800 return NULL;
801 }
fae0b242 802
280d71bf
DB
803 mask = exp->X_add_number;
804
fae0b242
DE
805 if (exp->X_add_symbol
806 && exp->X_add_symbol->sy_value.X_op == O_constant)
280d71bf
DB
807 mask |= exp->X_add_symbol->sy_value.X_add_number;
808
fae0b242
DE
809 if (exp->X_op_symbol
810 && exp->X_op_symbol->sy_value.X_op == O_constant)
280d71bf
DB
811 mask |= exp->X_op_symbol->sy_value.X_add_number;
812
fae0b242 813 /* Want to know if mask covers more bits than opmask.
280d71bf
DB
814 this is the same as asking if mask has any bits not in opmask,
815 or whether (mask & ~opmask) is nonzero. */
816 if (mask && (mask & ~opmask))
817 {
818#ifdef DEBUG
819 printf ("overflow: (mask = %8.8x, ~opmask = %8.8x, AND = %8.8x)\n",
820 mask, ~opmask, (mask & ~opmask));
821#endif
822 return _("operand mask overflow");
823 }
824
fae0b242 825 return NULL;
280d71bf
DB
826}
827
280d71bf
DB
828static expressionS *
829make_right_shifted_expr (expressionS * exp,
830 const int amount,
831 const int signed_p)
832{
833 symbolS * stmp = 0;
834 expressionS * new_exp;
835
fae0b242 836 stmp = expr_build_binary (O_right_shift,
280d71bf
DB
837 make_expr_symbol (exp),
838 expr_build_uconstant (amount));
fae0b242 839
280d71bf
DB
840 if (signed_p)
841 stmp->bsym->flags |= BSF_SRELC;
842 else
843 stmp->bsym->flags |= BSF_RELC;
fae0b242 844
280d71bf
DB
845 /* Then wrap that in a "symbol expr" for good measure. */
846 new_exp = xmalloc (sizeof (expressionS));
847 memset (new_exp, 0, sizeof (expressionS));
848 new_exp->X_op = O_symbol;
849 new_exp->X_op_symbol = 0;
850 new_exp->X_add_symbol = stmp;
851 new_exp->X_add_number = 0;
fae0b242 852
280d71bf
DB
853 return new_exp;
854}
fae0b242 855
280d71bf 856#endif
fae0b242 857
252b5132
RH
858/* Apply a fixup to the object code. This is called for all the
859 fixups we generated by the call to fix_new_exp, above. In the call
860 above we used a reloc code which was the largest legal reloc code
861 plus the operand index. Here we undo that to recover the operand
862 index. At this point all symbol values should be fully resolved,
863 and we attempt to completely resolve the reloc. If we can not do
864 that, we determine the correct reloc code and put it back in the fixup. */
865
866/* FIXME: This function handles some of the fixups and bfd_install_relocation
867 handles the rest. bfd_install_relocation (or some other bfd function)
868 should handle them all. */
869
94f592af 870void
55cf6793 871gas_cgen_md_apply_fix (fixP, valP, seg)
252b5132 872 fixS * fixP;
94f592af 873 valueT * valP;
eabed1c0 874 segT seg ATTRIBUTE_UNUSED;
252b5132 875{
542d6675 876 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
94f592af 877 valueT value = * valP;
542d6675 878 /* Canonical name, since used a lot. */
252b5132 879 CGEN_CPU_DESC cd = gas_cgen_cpu_desc;
542d6675 880
252b5132 881 if (fixP->fx_addsy == (symbolS *) NULL)
94f592af
NC
882 fixP->fx_done = 1;
883
a161fe53
AM
884 /* We don't actually support subtracting a symbol. */
885 if (fixP->fx_subsy != (symbolS *) NULL)
886 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132
RH
887
888 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
889 {
890 int opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
891 const CGEN_OPERAND *operand = cgen_operand_lookup_by_num (cd, opindex);
892 const char *errmsg;
893 bfd_reloc_code_real_type reloc_type;
894 CGEN_FIELDS *fields = alloca (CGEN_CPU_SIZEOF_FIELDS (cd));
895 const CGEN_INSN *insn = fixP->fx_cgen.insn;
87975d2a 896#ifdef OBJ_COMPLEX_RELC
280d71bf
DB
897 int start;
898 int length;
899 int signed_p = 0;
900
901 if (fixP->fx_cgen.field)
fae0b242 902 {
280d71bf
DB
903 /* Use the twisty little pointer path
904 back to the ifield if it exists. */
905 start = fixP->fx_cgen.field->val.leaf->start;
906 length = fixP->fx_cgen.field->val.leaf->length;
907 }
908 else
909 {
910 /* Or the far less useful operand-size guesstimate. */
911 start = operand->start;
912 length = operand->length;
913 }
914
915 /* FIXME: this is not a perfect heuristic for figuring out
916 whether an operand is signed: it only works when the operand
917 is an immediate. it's not terribly likely that any other
918 values will be signed relocs, but it's possible. */
919 if (operand && (operand->hw_type == HW_H_SINT))
920 signed_p = 1;
87975d2a 921#endif
252b5132
RH
922
923 /* If the reloc has been fully resolved finish the operand here. */
924 /* FIXME: This duplicates the capabilities of code in BFD. */
925 if (fixP->fx_done
926 /* FIXME: If partial_inplace isn't set bfd_install_relocation won't
927 finish the job. Testing for pcrel is a temporary hack. */
928 || fixP->fx_pcrel)
929 {
930 CGEN_CPU_SET_FIELDS_BITSIZE (cd) (fields, CGEN_INSN_BITSIZE (insn));
931 CGEN_CPU_SET_VMA_OPERAND (cd) (cd, opindex, fields, (bfd_vma) value);
932
933#if CGEN_INT_INSN_P
934 {
935 CGEN_INSN_INT insn_value =
2132e3a3
AM
936 cgen_get_insn_value (cd, (unsigned char *) where,
937 CGEN_INSN_BITSIZE (insn));
252b5132 938
542d6675 939 /* ??? 0 is passed for `pc'. */
252b5132
RH
940 errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields,
941 &insn_value, (bfd_vma) 0);
2132e3a3
AM
942 cgen_put_insn_value (cd, (unsigned char *) where,
943 CGEN_INSN_BITSIZE (insn), insn_value);
252b5132
RH
944 }
945#else
542d6675 946 /* ??? 0 is passed for `pc'. */
2132e3a3
AM
947 errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields,
948 (unsigned char *) where,
542d6675 949 (bfd_vma) 0);
252b5132
RH
950#endif
951 if (errmsg)
952 as_bad_where (fixP->fx_file, fixP->fx_line, "%s", errmsg);
953 }
954
955 if (fixP->fx_done)
94f592af 956 return;
252b5132
RH
957
958 /* The operand isn't fully resolved. Determine a BFD reloc value
959 based on the operand information and leave it to
960 bfd_install_relocation. Note that this doesn't work when
961 partial_inplace == false. */
962
963 reloc_type = md_cgen_lookup_reloc (insn, operand, fixP);
280d71bf
DB
964#ifdef OBJ_COMPLEX_RELC
965 if (reloc_type == BFD_RELOC_RELC)
966 {
967 /* Change addend to "self-describing" form,
968 for BFD to handle in the linker. */
969 value = gas_cgen_encode_addend (start, operand->length,
fae0b242
DE
970 length, fixP->fx_size,
971 cd->insn_chunk_bitsize / 8,
972 signed_p,
280d71bf
DB
973 ! (fixP->fx_cgen.msb_field_p));
974 }
975#endif
94f592af 976
252b5132 977 if (reloc_type != BFD_RELOC_NONE)
94f592af 978 fixP->fx_r_type = reloc_type;
252b5132
RH
979 else
980 {
981 as_bad_where (fixP->fx_file, fixP->fx_line,
982 _("unresolved expression that must be resolved"));
983 fixP->fx_done = 1;
94f592af 984 return;
252b5132
RH
985 }
986 }
987 else if (fixP->fx_done)
988 {
989 /* We're finished with this fixup. Install it because
990 bfd_install_relocation won't be called to do it. */
991 switch (fixP->fx_r_type)
992 {
993 case BFD_RELOC_8:
994 md_number_to_chars (where, value, 1);
995 break;
996 case BFD_RELOC_16:
997 md_number_to_chars (where, value, 2);
998 break;
999 case BFD_RELOC_32:
1000 md_number_to_chars (where, value, 4);
1001 break;
363c574f
MG
1002 case BFD_RELOC_64:
1003 md_number_to_chars (where, value, 8);
1004 break;
252b5132
RH
1005 default:
1006 as_bad_where (fixP->fx_file, fixP->fx_line,
1007 _("internal error: can't install fix for reloc type %d (`%s')"),
1008 fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type));
1009 break;
1010 }
1011 }
232431a0
NC
1012 /* else
1013 bfd_install_relocation will be called to finish things up. */
252b5132
RH
1014
1015 /* Tuck `value' away for use by tc_gen_reloc.
1016 See the comment describing fx_addnumber in write.h.
1017 This field is misnamed (or misused :-). */
1018 fixP->fx_addnumber = value;
252b5132
RH
1019}
1020
32425e36
NC
1021bfd_reloc_code_real_type
1022gas_cgen_pcrel_r_type (bfd_reloc_code_real_type r)
1023{
1024 switch (r)
1025 {
1026 case BFD_RELOC_8: r = BFD_RELOC_8_PCREL; break;
1027 case BFD_RELOC_16: r = BFD_RELOC_16_PCREL; break;
1028 case BFD_RELOC_24: r = BFD_RELOC_24_PCREL; break;
1029 case BFD_RELOC_32: r = BFD_RELOC_32_PCREL; break;
1030 case BFD_RELOC_64: r = BFD_RELOC_64_PCREL; break;
1031 default:
1032 break;
1033 }
1034 return r;
1035}
1036
252b5132
RH
1037/* Translate internal representation of relocation info to BFD target format.
1038
1039 FIXME: To what extent can we get all relevant targets to use this? */
1040
1041arelent *
1042gas_cgen_tc_gen_reloc (section, fixP)
eabed1c0 1043 asection * section ATTRIBUTE_UNUSED;
252b5132
RH
1044 fixS * fixP;
1045{
32425e36 1046 bfd_reloc_code_real_type r_type = fixP->fx_r_type;
542d6675 1047 arelent *reloc;
32425e36 1048
252b5132
RH
1049 reloc = (arelent *) xmalloc (sizeof (arelent));
1050
32425e36
NC
1051#ifdef GAS_CGEN_PCREL_R_TYPE
1052 if (fixP->fx_pcrel)
1053 r_type = GAS_CGEN_PCREL_R_TYPE (r_type);
1054#endif
1055 reloc->howto = bfd_reloc_type_lookup (stdoutput, r_type);
1056
252b5132
RH
1057 if (reloc->howto == (reloc_howto_type *) NULL)
1058 {
1059 as_bad_where (fixP->fx_file, fixP->fx_line,
aaa4f6d9 1060 _("relocation is not supported"));
252b5132
RH
1061 return NULL;
1062 }
1063
9c2799c2 1064 gas_assert (!fixP->fx_pcrel == !reloc->howto->pc_relative);
252b5132 1065
080e41e6
ILT
1066 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1067 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
252b5132 1068
542d6675
KH
1069 /* Use fx_offset for these cases. */
1070 if (fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY
252b5132 1071 || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
542d6675 1072 reloc->addend = fixP->fx_offset;
252b5132 1073 else
542d6675 1074 reloc->addend = fixP->fx_addnumber;
252b5132
RH
1075
1076 reloc->address = fixP->fx_frag->fr_address + fixP->fx_where;
1077 return reloc;
1078}
9cc92a36
NC
1079
1080/* Perform any cgen specific initialisation.
1081 Called after gas_cgen_cpu_desc has been created. */
1082
1083void
1084gas_cgen_begin ()
1085{
1086 if (flag_signed_overflow_ok)
1087 cgen_set_signed_overflow_ok (gas_cgen_cpu_desc);
1088 else
1089 cgen_clear_signed_overflow_ok (gas_cgen_cpu_desc);
1090}
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