Locale changes from Bruno Haible <haible@clisp.cons.org>.
[deliverable/binutils-gdb.git] / gas / config / tc-avr.c
CommitLineData
adde6300
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1/* tc-avr.c -- Assembler code for the ATMEL AVR
2
3882b010 3 Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
adde6300
AM
4 Contributed by Denis Chertykov <denisc@overta.ru>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23#include <stdio.h>
adde6300 24#include "as.h"
3882b010 25#include "safe-ctype.h"
adde6300
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26#include "subsegs.h"
27
1188e082
DC
28struct avr_opcodes_s
29{
30 char *name;
31 char *constraints;
c6a7ab1f 32 int insn_size; /* In words. */
1188e082
DC
33 int isa;
34 unsigned int bin_opcode;
35};
36
37#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38{#NAME, CONSTR, SIZE, ISA, BIN},
39
40struct avr_opcodes_s avr_opcodes[] =
41{
42 #include "opcode/avr.h"
43 {NULL, NULL, 0, 0, 0}
44};
45
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46const char comment_chars[] = ";";
47const char line_comment_chars[] = "#";
48const char line_separator_chars[] = "$";
49
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50const char *md_shortopts = "m:";
51struct mcu_type_s
52{
53 char *name;
54 int isa;
55 int mach;
56};
57
58static struct mcu_type_s mcu_types[] =
59{
b170af93 60 {"avr1", AVR_ISA_TINY1, bfd_mach_avr1},
65aa24b6 61 {"avr2", AVR_ISA_2xxx, bfd_mach_avr2},
b170af93 62 {"avr3", AVR_ISA_M103, bfd_mach_avr3},
65aa24b6
NC
63 {"avr4", AVR_ISA_M83, bfd_mach_avr4},
64 {"avr5", AVR_ISA_ALL, bfd_mach_avr5},
adde6300 65 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
b170af93
DC
66 {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1},
67 {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1},
68 {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1},
69 {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1},
70 {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1},
adde6300
AM
71 {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2},
72 {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2},
73 {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2},
74 {"attiny22" , AVR_ISA_2xxx, bfd_mach_avr2},
75 {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2},
76 {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2},
77 {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2},
78 {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2},
65aa24b6
NC
79 {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2},
80 {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2},
81 {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2},
b170af93
DC
82 {"atmega603", AVR_ISA_M603, bfd_mach_avr3},
83 {"atmega103", AVR_ISA_M103, bfd_mach_avr3},
65aa24b6
NC
84 {"atmega83", AVR_ISA_M83, bfd_mach_avr4},
85 {"atmega85", AVR_ISA_M83, bfd_mach_avr4},
86 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
87 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
88 {"atmega32", AVR_ISA_M161, bfd_mach_avr5},
89 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
adde6300
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90 {NULL, 0, 0}
91};
92
adde6300
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93/* Current MCU type. */
94static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2};
95static struct mcu_type_s *avr_mcu = &default_mcu;
96
00d2865b
NC
97/* AVR target-specific switches. */
98struct avr_opt_s
99{
c6a7ab1f
NC
100 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes */
101 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns */
102 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around */
00d2865b
NC
103};
104
105static struct avr_opt_s avr_opt = { 0, 0, 0 };
106
adde6300
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107const char EXP_CHARS[] = "eE";
108const char FLT_CHARS[] = "dD";
109static void avr_set_arch (int dummy);
110
111/* The target specific pseudo-ops which we support. */
112const pseudo_typeS md_pseudo_table[] =
113{
114 {"arch", avr_set_arch, 0},
115 { NULL, NULL, 0}
116};
117
118#define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
adde6300 119
65b1d096
DC
120static void show_mcu_list PARAMS ((FILE *));
121static char *skip_space PARAMS ((char *));
122static char *extract_word PARAMS ((char *, char *, int));
123static unsigned int avr_operand PARAMS ((struct avr_opcodes_s *,
124 int, char *, char **));
125static unsigned int avr_operands PARAMS ((struct avr_opcodes_s *, char **));
126static unsigned int avr_get_constant PARAMS ((char *, int));
127static char *parse_exp PARAMS ((char *, expressionS *));
128static bfd_reloc_code_real_type avr_ldi_expression PARAMS ((expressionS *));
adde6300 129
adde6300
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130#define EXP_MOD_NAME(i) exp_mod[i].name
131#define EXP_MOD_RELOC(i) exp_mod[i].reloc
132#define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
133#define HAVE_PM_P(i) exp_mod[i].have_pm
134
135struct exp_mod_s
136{
c6a7ab1f 137 char *name;
adde6300
AM
138 bfd_reloc_code_real_type reloc;
139 bfd_reloc_code_real_type neg_reloc;
140 int have_pm;
141};
142
c6a7ab1f
NC
143static struct exp_mod_s exp_mod[] =
144{
adde6300
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145 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
146 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
147 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
148 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
149 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
150 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
151 {"hlo8", -BFD_RELOC_AVR_LO8_LDI, -BFD_RELOC_AVR_LO8_LDI_NEG, 0},
152 {"hhi8", -BFD_RELOC_AVR_HI8_LDI, -BFD_RELOC_AVR_HI8_LDI_NEG, 0},
153};
154
155/* Opcode hash table. */
156static struct hash_control *avr_hash;
157
158/* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
159static struct hash_control *avr_mod_hash;
160
00d2865b
NC
161#define OPTION_MMCU 'm'
162#define OPTION_ALL_OPCODES (OPTION_MD_BASE + 1)
163#define OPTION_NO_SKIP_BUG (OPTION_MD_BASE + 2)
164#define OPTION_NO_WRAP (OPTION_MD_BASE + 3)
adde6300 165
c6a7ab1f
NC
166struct option md_longopts[] =
167{
00d2865b
NC
168 { "mmcu", required_argument, NULL, OPTION_MMCU },
169 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
170 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
171 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
172 { NULL, no_argument, NULL, 0 }
adde6300 173};
adde6300 174
c6a7ab1f 175size_t md_longopts_size = sizeof (md_longopts);
00d2865b
NC
176
177/* Display nicely formatted list of known MCU names. */
c6a7ab1f 178
00d2865b 179static void
c6a7ab1f
NC
180show_mcu_list (stream)
181 FILE *stream;
00d2865b
NC
182{
183 int i, x;
184
185 fprintf (stream, _("Known MCU names:"));
186 x = 1000;
1dab94dd 187
00d2865b
NC
188 for (i = 0; mcu_types[i].name; i++)
189 {
190 int len = strlen (mcu_types[i].name);
1dab94dd 191
00d2865b 192 x += len + 1;
1dab94dd 193
00d2865b 194 if (x < 75)
c6a7ab1f 195 fprintf (stream, " %s", mcu_types[i].name);
00d2865b
NC
196 else
197 {
198 fprintf (stream, "\n %s", mcu_types[i].name);
199 x = len + 2;
200 }
201 }
1dab94dd 202
c6a7ab1f 203 fprintf (stream, "\n");
00d2865b
NC
204}
205
adde6300
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206static inline char *
207skip_space (s)
c6a7ab1f 208 char *s;
adde6300
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209{
210 while (*s == ' ' || *s == '\t')
211 ++s;
212 return s;
213}
214
215/* Extract one word from FROM and copy it to TO. */
c6a7ab1f 216
adde6300
AM
217static char *
218extract_word (char *from, char *to, int limit)
219{
220 char *op_start;
221 char *op_end;
222 int size = 0;
223
224 /* Drop leading whitespace. */
225 from = skip_space (from);
226 *to = 0;
c6a7ab1f 227
adde6300 228 /* Find the op code end. */
c6a7ab1f 229 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
adde6300
AM
230 {
231 to[size++] = *op_end++;
232 if (size + 1 >= limit)
233 break;
234 }
1dab94dd 235
adde6300
AM
236 to[size] = 0;
237 return op_end;
238}
239
240int
241md_estimate_size_before_relax (fragp, seg)
df136245
DC
242 fragS *fragp ATTRIBUTE_UNUSED;
243 asection *seg ATTRIBUTE_UNUSED;
adde6300
AM
244{
245 abort ();
246 return 0;
247}
248
249void
250md_show_usage (stream)
c6a7ab1f 251 FILE *stream;
adde6300 252{
00d2865b
NC
253 fprintf (stream,
254 _("AVR options:\n"
adde6300
AM
255 " -mmcu=[avr-name] select microcontroller variant\n"
256 " [avr-name] can be:\n"
65aa24b6
NC
257 " avr1 - AT90S1200, ATtiny1x, ATtiny28\n"
258 " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n"
259 " avr3 - ATmega103, ATmega603\n"
260 " avr4 - ATmega83, ATmega85\n"
261 " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n"
adde6300 262 " or immediate microcontroller name.\n"));
00d2865b
NC
263 fprintf (stream,
264 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
265 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
266 " (default for avr4, avr5)\n"
267 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
268 " (default for avr3, avr5)\n"));
269 show_mcu_list (stream);
adde6300
AM
270}
271
272static void
273avr_set_arch (dummy)
df136245 274 int dummy ATTRIBUTE_UNUSED;
adde6300 275{
c6a7ab1f 276 char *str;
1dab94dd 277
c6a7ab1f 278 str = (char *) alloca (20);
adde6300 279 input_line_pointer = extract_word (input_line_pointer, str, 20);
00d2865b 280 md_parse_option (OPTION_MMCU, str);
adde6300
AM
281 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
282}
283
284int
285md_parse_option (c, arg)
286 int c;
287 char *arg;
288{
00d2865b 289 switch (c)
adde6300 290 {
00d2865b
NC
291 case OPTION_MMCU:
292 {
293 int i;
294 char *s = alloca (strlen (arg) + 1);
adde6300 295
00d2865b
NC
296 {
297 char *t = s;
298 char *arg1 = arg;
299
300 do
3882b010 301 *t = TOLOWER (*arg1++);
00d2865b
NC
302 while (*t++);
303 }
304
305 for (i = 0; mcu_types[i].name; ++i)
306 if (strcmp (mcu_types[i].name, s) == 0)
307 break;
adde6300 308
00d2865b
NC
309 if (!mcu_types[i].name)
310 {
311 show_mcu_list (stderr);
312 as_fatal (_("unknown MCU: %s\n"), arg);
313 }
65aa24b6 314
00d2865b
NC
315 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
316 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
317 as .arch ... in the asm output at the same time. */
00d2865b
NC
318 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
319 avr_mcu = &mcu_types[i];
320 else
321 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
322 avr_mcu->name, mcu_types[i].name);
323 return 1;
324 }
325 case OPTION_ALL_OPCODES:
326 avr_opt.all_opcodes = 1;
327 return 1;
328 case OPTION_NO_SKIP_BUG:
329 avr_opt.no_skip_bug = 1;
330 return 1;
331 case OPTION_NO_WRAP:
332 avr_opt.no_wrap = 1;
adde6300
AM
333 return 1;
334 }
1dab94dd 335
adde6300
AM
336 return 0;
337}
338
339symbolS *
c6a7ab1f 340md_undefined_symbol (name)
df136245 341 char *name ATTRIBUTE_UNUSED;
adde6300
AM
342{
343 return 0;
344}
345
c6a7ab1f
NC
346/* Turn a string in input_line_pointer into a floating point constant
347 of type TYPE, and store the appropriate bytes in *LITP. The number
348 of LITTLENUMS emitted is stored in *SIZEP. An error message is
349 returned, or NULL on OK. */
350
adde6300
AM
351char *
352md_atof (type, litP, sizeP)
353 int type;
354 char *litP;
355 int *sizeP;
356{
357 int prec;
358 LITTLENUM_TYPE words[4];
359 LITTLENUM_TYPE *wordP;
360 char *t;
361
362 switch (type)
363 {
364 case 'f':
365 prec = 2;
366 break;
367 case 'd':
368 prec = 4;
369 break;
370 default:
371 *sizeP = 0;
372 return _("bad call to md_atof");
373 }
374
375 t = atof_ieee (input_line_pointer, type, words);
376 if (t)
377 input_line_pointer = t;
378
379 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1dab94dd 380
adde6300
AM
381 /* This loop outputs the LITTLENUMs in REVERSE order. */
382 for (wordP = words + prec - 1; prec--;)
383 {
384 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
385 litP += sizeof (LITTLENUM_TYPE);
386 }
1dab94dd 387
adde6300
AM
388 return NULL;
389}
390
391void
392md_convert_frag (abfd, sec, fragP)
c6a7ab1f
NC
393 bfd *abfd ATTRIBUTE_UNUSED;
394 asection *sec ATTRIBUTE_UNUSED;
395 fragS *fragP ATTRIBUTE_UNUSED;
adde6300
AM
396{
397 abort ();
398}
399
adde6300
AM
400void
401md_begin ()
402{
df136245 403 unsigned int i;
adde6300 404 struct avr_opcodes_s *opcode;
c6a7ab1f 405 avr_hash = hash_new ();
adde6300
AM
406
407 /* Insert unique names into hash table. This hash table then provides a
408 quick index to the first opcode with a particular name in the opcode
409 table. */
adde6300
AM
410 for (opcode = avr_opcodes; opcode->name; opcode++)
411 hash_insert (avr_hash, opcode->name, (char *) opcode);
412
413 avr_mod_hash = hash_new ();
414
415 for (i = 0; i < sizeof (exp_mod) / sizeof (exp_mod[0]); ++i)
c6a7ab1f
NC
416 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), (void *) (i + 10));
417
adde6300
AM
418 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
419}
420
df136245 421/* Resolve STR as a constant expression and return the result.
c6a7ab1f 422 If result greater than MAX then error. */
df136245
DC
423
424static unsigned int
425avr_get_constant (str, max)
c6a7ab1f 426 char *str;
df136245
DC
427 int max;
428{
429 expressionS ex;
430 str = skip_space (str);
431 input_line_pointer = str;
432 expression (&ex);
433
434 if (ex.X_op != O_constant)
435 as_bad (_("constant value required"));
436
437 if (ex.X_add_number > max || ex.X_add_number < 0)
c6a7ab1f 438 as_bad (_("number must be less than %d"), max + 1);
1dab94dd 439
df136245
DC
440 return ex.X_add_number;
441}
442
df136245 443/* Parse instruction operands.
c6a7ab1f 444 Return binary opcode. */
df136245 445
adde6300
AM
446static unsigned int
447avr_operands (opcode, line)
448 struct avr_opcodes_s *opcode;
449 char **line;
450{
451 char *op = opcode->constraints;
452 unsigned int bin = opcode->bin_opcode;
453 char *frag = frag_more (opcode->insn_size * 2);
454 char *str = *line;
455 int where = frag - frag_now->fr_literal;
c6a7ab1f 456 static unsigned int prev = 0; /* Previous opcode. */
adde6300
AM
457
458 /* Opcode have operands. */
459 if (*op)
460 {
461 unsigned int reg1 = 0;
462 unsigned int reg2 = 0;
463 int reg1_present = 0;
464 int reg2_present = 0;
465
466 /* Parse first operand. */
467 if (REGISTER_P (*op))
468 reg1_present = 1;
469 reg1 = avr_operand (opcode, where, op, &str);
470 ++op;
471
472 /* Parse second operand. */
473 if (*op)
474 {
475 if (*op == ',')
476 ++op;
1dab94dd 477
adde6300
AM
478 if (*op == '=')
479 {
480 reg2 = reg1;
481 reg2_present = 1;
482 }
483 else
484 {
485 if (REGISTER_P (*op))
486 reg2_present = 1;
487
488 str = skip_space (str);
489 if (*str++ != ',')
00d2865b 490 as_bad (_("`,' required"));
adde6300
AM
491 str = skip_space (str);
492
493 reg2 = avr_operand (opcode, where, op, &str);
494
495 }
1dab94dd 496
adde6300
AM
497 if (reg1_present && reg2_present)
498 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
499 else if (reg2_present)
500 reg2 <<= 4;
501 }
502 if (reg1_present)
503 reg1 <<= 4;
504 bin |= reg1 | reg2;
505 }
b170af93 506
65b1d096
DC
507 /* Detect undefined combinations (like ld r31,Z+). */
508 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
509 as_warn (_("undefined combination of operands"));
00d2865b 510
adde6300
AM
511 if (opcode->insn_size == 2)
512 {
00d2865b
NC
513 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
514 (AVR core bug, fixed in the newer devices). */
515
65b1d096
DC
516 if (!(avr_opt.no_skip_bug || (avr_mcu->isa & AVR_ISA_MUL))
517 && AVR_SKIP_P (prev))
518 as_warn (_("skipping two-word instruction"));
00d2865b 519
c6a7ab1f 520 bfd_putl32 ((bfd_vma) bin, frag);
adde6300
AM
521 }
522 else
c6a7ab1f 523 bfd_putl16 ((bfd_vma) bin, frag);
b170af93
DC
524
525 prev = bin;
adde6300
AM
526 *line = str;
527 return bin;
528}
529
df136245 530/* Parse one instruction operand.
c6a7ab1f
NC
531 Return operand bitmask. Also fixups can be generated. */
532
adde6300
AM
533static unsigned int
534avr_operand (opcode, where, op, line)
535 struct avr_opcodes_s *opcode;
536 int where;
537 char *op;
538 char **line;
539{
adde6300 540 expressionS op_expr;
df136245
DC
541 unsigned int op_mask = 0;
542 char *str = skip_space (*line);
adde6300 543
adde6300
AM
544 switch (*op)
545 {
546 /* Any register operand. */
547 case 'w':
548 case 'd':
549 case 'r':
b170af93
DC
550 case 'a':
551 case 'v':
c6a7ab1f
NC
552 if (*str == 'r' || *str == 'R')
553 {
554 char r_name[20];
1dab94dd 555
c6a7ab1f 556 str = extract_word (str, r_name, sizeof (r_name));
65b1d096 557 op_mask = 0xff;
3882b010 558 if (ISDIGIT (r_name[1]))
c6a7ab1f
NC
559 {
560 if (r_name[2] == '\0')
561 op_mask = r_name[1] - '0';
562 else if (r_name[1] != '0'
3882b010 563 && ISDIGIT (r_name[2])
c6a7ab1f
NC
564 && r_name[3] == '\0')
565 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
566 }
567 }
568 else
569 {
570 op_mask = avr_get_constant (str, 31);
571 str = input_line_pointer;
572 }
1dab94dd 573
c6a7ab1f
NC
574 if (op_mask <= 31)
575 {
576 switch (*op)
577 {
578 case 'a':
579 if (op_mask < 16 || op_mask > 23)
580 as_bad (_("register r16-r23 required"));
581 op_mask -= 16;
582 break;
1dab94dd 583
c6a7ab1f
NC
584 case 'd':
585 if (op_mask < 16)
586 as_bad (_("register number above 15 required"));
587 op_mask -= 16;
588 break;
1dab94dd 589
c6a7ab1f
NC
590 case 'v':
591 if (op_mask & 1)
592 as_bad (_("even register number required"));
593 op_mask >>= 1;
594 break;
1dab94dd 595
c6a7ab1f 596 case 'w':
65b1d096 597 if ((op_mask & 1) || op_mask < 24)
c6a7ab1f 598 as_bad (_("register r24, r26, r28 or r30 required"));
65b1d096 599 op_mask = (op_mask - 24) >> 1;
c6a7ab1f
NC
600 break;
601 }
602 break;
603 }
604 as_bad (_("register name or number from 0 to 31 required"));
adde6300
AM
605 break;
606
607 case 'e':
608 {
609 char c;
1dab94dd 610
adde6300
AM
611 if (*str == '-')
612 {
c6a7ab1f 613 str = skip_space (str + 1);
adde6300
AM
614 op_mask = 0x1002;
615 }
3882b010 616 c = TOLOWER (*str);
adde6300
AM
617 if (c == 'x')
618 op_mask |= 0x100c;
619 else if (c == 'y')
620 op_mask |= 0x8;
621 else if (c != 'z')
00d2865b 622 as_bad (_("pointer register (X, Y or Z) required"));
adde6300 623
c6a7ab1f 624 str = skip_space (str + 1);
adde6300
AM
625 if (*str == '+')
626 {
627 ++str;
628 if (op_mask & 2)
00d2865b 629 as_bad (_("cannot both predecrement and postincrement"));
adde6300
AM
630 op_mask |= 0x1001;
631 }
e38c9cc2 632
1188e082 633 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
e38c9cc2 634 registers, no predecrement, no postincrement. */
00d2865b
NC
635 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
636 && !(avr_mcu->isa & AVR_ISA_SRAM))
637 as_bad (_("addressing mode not supported"));
adde6300
AM
638 }
639 break;
640
b170af93 641 case 'z':
c6a7ab1f
NC
642 if (*str == '-')
643 as_bad (_("can't predecrement"));
1dab94dd 644
c6a7ab1f
NC
645 if (! (*str == 'z' || *str == 'Z'))
646 as_bad (_("pointer register Z required"));
1dab94dd 647
c6a7ab1f
NC
648 str = skip_space (str + 1);
649
650 if (*str == '+')
651 {
652 ++str;
653 op_mask |= 1;
654 }
b170af93
DC
655 break;
656
adde6300
AM
657 case 'b':
658 {
3882b010 659 char c = TOLOWER (*str++);
1dab94dd 660
adde6300
AM
661 if (c == 'y')
662 op_mask |= 0x8;
663 else if (c != 'z')
00d2865b 664 as_bad (_("pointer register (Y or Z) required"));
adde6300
AM
665 str = skip_space (str);
666 if (*str++ == '+')
667 {
668 unsigned int x;
669 x = avr_get_constant (str, 63);
670 str = input_line_pointer;
671 op_mask |= (x & 7) | ((x & (3 << 3)) << 7) | ((x & (1 << 5)) << 8);
672 }
673 }
674 break;
675
676 case 'h':
c6a7ab1f
NC
677 str = parse_exp (str, &op_expr);
678 fix_new_exp (frag_now, where, opcode->insn_size * 2,
679 &op_expr, false, BFD_RELOC_AVR_CALL);
adde6300
AM
680 break;
681
682 case 'L':
c6a7ab1f
NC
683 str = parse_exp (str, &op_expr);
684 fix_new_exp (frag_now, where, opcode->insn_size * 2,
685 &op_expr, true, BFD_RELOC_AVR_13_PCREL);
adde6300
AM
686 break;
687
688 case 'l':
c6a7ab1f
NC
689 str = parse_exp (str, &op_expr);
690 fix_new_exp (frag_now, where, opcode->insn_size * 2,
691 &op_expr, true, BFD_RELOC_AVR_7_PCREL);
adde6300
AM
692 break;
693
694 case 'i':
c6a7ab1f
NC
695 str = parse_exp (str, &op_expr);
696 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
697 &op_expr, false, BFD_RELOC_16);
adde6300
AM
698 break;
699
700 case 'M':
701 {
702 bfd_reloc_code_real_type r_type;
1dab94dd 703
c6a7ab1f
NC
704 input_line_pointer = str;
705 r_type = avr_ldi_expression (&op_expr);
706 str = input_line_pointer;
adde6300
AM
707 fix_new_exp (frag_now, where, 3,
708 &op_expr, false, r_type);
709 }
710 break;
711
712 case 'n':
713 {
714 unsigned int x;
1dab94dd 715
adde6300
AM
716 x = ~avr_get_constant (str, 255);
717 str = input_line_pointer;
718 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
719 }
720 break;
721
722 case 'K':
723 {
724 unsigned int x;
1dab94dd 725
adde6300
AM
726 x = avr_get_constant (str, 63);
727 str = input_line_pointer;
728 op_mask |= (x & 0xf) | ((x & 0x30) << 2);
729 }
730 break;
731
732 case 'S':
733 case 's':
734 {
735 unsigned int x;
1dab94dd 736
adde6300
AM
737 x = avr_get_constant (str, 7);
738 str = input_line_pointer;
739 if (*op == 'S')
740 x <<= 4;
741 op_mask |= x;
742 }
743 break;
744
745 case 'P':
746 {
747 unsigned int x;
1dab94dd 748
adde6300
AM
749 x = avr_get_constant (str, 63);
750 str = input_line_pointer;
751 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
752 }
753 break;
754
755 case 'p':
756 {
757 unsigned int x;
1dab94dd 758
adde6300
AM
759 x = avr_get_constant (str, 31);
760 str = input_line_pointer;
761 op_mask |= x << 3;
762 }
763 break;
1dab94dd 764
1188e082
DC
765 case '?':
766 break;
1dab94dd 767
adde6300 768 default:
00d2865b 769 as_bad (_("unknown constraint `%c'"), *op);
adde6300 770 }
1dab94dd 771
adde6300
AM
772 *line = str;
773 return op_mask;
774}
775
776/* GAS will call this function for each section at the end of the assembly,
777 to permit the CPU backend to adjust the alignment of a section. */
c6a7ab1f 778
adde6300
AM
779valueT
780md_section_align (seg, addr)
781 asection *seg;
782 valueT addr;
783{
784 int align = bfd_get_section_alignment (stdoutput, seg);
785 return ((addr + (1 << align) - 1) & (-1 << align));
786}
787
788/* If you define this macro, it should return the offset between the
789 address of a PC relative fixup and the position from which the PC
790 relative adjustment should be made. On many processors, the base
791 of a PC relative instruction is the next instruction, so this
792 macro would return the length of an instruction. */
c6a7ab1f 793
adde6300
AM
794long
795md_pcrel_from_section (fixp, sec)
796 fixS *fixp;
797 segT sec;
798{
c6a7ab1f 799 if (fixp->fx_addsy != (symbolS *) NULL
adde6300
AM
800 && (!S_IS_DEFINED (fixp->fx_addsy)
801 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
802 return 0;
1dab94dd 803
adde6300
AM
804 return fixp->fx_frag->fr_address + fixp->fx_where;
805}
806
807/* GAS will call this for each fixup. It should store the correct
c6a7ab1f
NC
808 value in the object file. */
809
adde6300
AM
810int
811md_apply_fix3 (fixp, valuep, seg)
812 fixS *fixp;
813 valueT *valuep;
814 segT seg;
815{
816 unsigned char *where;
817 unsigned long insn;
818 long value;
819
820 if (fixp->fx_addsy == (symbolS *) NULL)
821 {
822 value = *valuep;
823 fixp->fx_done = 1;
824 }
825 else if (fixp->fx_pcrel)
826 {
827 segT s = S_GET_SEGMENT (fixp->fx_addsy);
1dab94dd 828
adde6300
AM
829 if (fixp->fx_addsy && (s == seg || s == absolute_section))
830 {
831 value = S_GET_VALUE (fixp->fx_addsy) + *valuep;
832 fixp->fx_done = 1;
833 }
834 else
835 value = *valuep;
836 }
837 else
838 {
839 value = fixp->fx_offset;
1dab94dd 840
adde6300
AM
841 if (fixp->fx_subsy != (symbolS *) NULL)
842 {
843 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
844 {
845 value -= S_GET_VALUE (fixp->fx_subsy);
846 fixp->fx_done = 1;
847 }
848 else
849 {
850 /* We don't actually support subtracting a symbol. */
c6a7ab1f 851 as_bad_where (fixp->fx_file, fixp->fx_line,
00d2865b 852 _("expression too complex"));
adde6300
AM
853 }
854 }
855 }
1dab94dd 856
adde6300
AM
857 switch (fixp->fx_r_type)
858 {
859 default:
860 fixp->fx_no_overflow = 1;
861 break;
862 case BFD_RELOC_AVR_7_PCREL:
863 case BFD_RELOC_AVR_13_PCREL:
864 case BFD_RELOC_32:
865 case BFD_RELOC_16:
866 case BFD_RELOC_AVR_CALL:
867 break;
868 }
869
870 if (fixp->fx_done)
871 {
872 /* Fetch the instruction, insert the fully resolved operand
873 value, and stuff the instruction back again. */
874 where = fixp->fx_frag->fr_literal + fixp->fx_where;
875 insn = bfd_getl16 (where);
876
877 switch (fixp->fx_r_type)
878 {
879 case BFD_RELOC_AVR_7_PCREL:
880 if (value & 1)
881 as_bad_where (fixp->fx_file, fixp->fx_line,
882 _("odd address operand: %ld"), value);
1dab94dd 883
adde6300
AM
884 /* Instruction addresses are always right-shifted by 1. */
885 value >>= 1;
886 --value; /* Correct PC. */
1dab94dd 887
adde6300
AM
888 if (value < -64 || value > 63)
889 as_bad_where (fixp->fx_file, fixp->fx_line,
890 _("operand out of range: %ld"), value);
891 value = (value << 3) & 0x3f8;
892 bfd_putl16 ((bfd_vma) (value | insn), where);
893 break;
894
895 case BFD_RELOC_AVR_13_PCREL:
896 if (value & 1)
897 as_bad_where (fixp->fx_file, fixp->fx_line,
898 _("odd address operand: %ld"), value);
1dab94dd 899
adde6300
AM
900 /* Instruction addresses are always right-shifted by 1. */
901 value >>= 1;
902 --value; /* Correct PC. */
adde6300
AM
903
904 if (value < -2048 || value > 2047)
905 {
65aa24b6 906 /* No wrap for devices with >8K of program memory. */
00d2865b 907 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
adde6300
AM
908 as_bad_where (fixp->fx_file, fixp->fx_line,
909 _("operand out of range: %ld"), value);
910 }
911
912 value &= 0xfff;
913 bfd_putl16 ((bfd_vma) (value | insn), where);
914 break;
915
916 case BFD_RELOC_32:
917 bfd_putl16 ((bfd_vma) value, where);
918 break;
919
920 case BFD_RELOC_16:
921 bfd_putl16 ((bfd_vma) value, where);
922 break;
923
924 case BFD_RELOC_AVR_16_PM:
c6a7ab1f 925 bfd_putl16 ((bfd_vma) (value >> 1), where);
adde6300
AM
926 break;
927
928 case BFD_RELOC_AVR_LO8_LDI:
929 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
930 break;
931
932 case -BFD_RELOC_AVR_LO8_LDI:
933 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
934 break;
935
936 case BFD_RELOC_AVR_HI8_LDI:
937 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
938 break;
939
940 case -BFD_RELOC_AVR_HI8_LDI:
941 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
942 break;
943
944 case BFD_RELOC_AVR_HH8_LDI:
945 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
946 break;
947
948 case BFD_RELOC_AVR_LO8_LDI_NEG:
949 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
950 break;
951
952 case -BFD_RELOC_AVR_LO8_LDI_NEG:
953 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
954 break;
955
956 case BFD_RELOC_AVR_HI8_LDI_NEG:
957 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
958 break;
959
960 case -BFD_RELOC_AVR_HI8_LDI_NEG:
961 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
962 break;
963
964 case BFD_RELOC_AVR_HH8_LDI_NEG:
965 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
966 break;
967
968 case BFD_RELOC_AVR_LO8_LDI_PM:
969 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
970 break;
971
972 case BFD_RELOC_AVR_HI8_LDI_PM:
973 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
974 break;
975
976 case BFD_RELOC_AVR_HH8_LDI_PM:
977 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
978 break;
979
980 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
981 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
982 break;
983
984 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
985 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
986 break;
987
988 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
989 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
990 break;
991
992 case BFD_RELOC_AVR_CALL:
993 {
994 unsigned long x;
1dab94dd 995
adde6300
AM
996 x = bfd_getl16 (where);
997 if (value & 1)
998 as_bad_where (fixp->fx_file, fixp->fx_line,
999 _("odd address operand: %ld"), value);
1000 value >>= 1;
1001 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1002 bfd_putl16 ((bfd_vma) x, where);
c6a7ab1f 1003 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
adde6300
AM
1004 }
1005 break;
1006
1007 default:
c6a7ab1f
NC
1008 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1009 fixp->fx_line, fixp->fx_r_type);
adde6300
AM
1010 break;
1011 }
1012 }
1013 else
1014 {
1015 switch (fixp->fx_r_type)
1016 {
1017 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1018 case -BFD_RELOC_AVR_HI8_LDI:
1019 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1020 case -BFD_RELOC_AVR_LO8_LDI:
1021 as_bad_where (fixp->fx_file, fixp->fx_line,
1022 _("only constant expression allowed"));
1023 fixp->fx_done = 1;
1024 break;
1025 default:
1026 break;
1027 }
1028 fixp->fx_addnumber = value;
1029 }
1030 return 0;
1031}
1032
adde6300
AM
1033/* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS
1034 will pass the resulting reloc to `bfd_install_relocation'. This
1035 currently works poorly, as `bfd_install_relocation' often does the
1036 wrong thing, and instances of `tc_gen_reloc' have been written to
1037 work around the problems, which in turns makes it difficult to fix
c6a7ab1f 1038 `bfd_install_relocation'. */
adde6300
AM
1039
1040/* If while processing a fixup, a reloc really needs to be created
1041 then it is done here. */
1042
1043arelent *
1044tc_gen_reloc (seg, fixp)
df136245 1045 asection *seg ATTRIBUTE_UNUSED;
adde6300
AM
1046 fixS *fixp;
1047{
1048 arelent *reloc;
1049
1050 reloc = (arelent *) xmalloc (sizeof (arelent));
1051
1052 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1053 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1054
1055 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1056 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1057 if (reloc->howto == (reloc_howto_type *) NULL)
1058 {
1059 as_bad_where (fixp->fx_file, fixp->fx_line,
c6a7ab1f
NC
1060 _("reloc %d not supported by object file format"),
1061 (int) fixp->fx_r_type);
adde6300
AM
1062 return NULL;
1063 }
1064
1065 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1066 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1067 reloc->address = fixp->fx_offset;
1068
1069 reloc->addend = fixp->fx_offset;
1070
1071 return reloc;
1072}
1073
adde6300
AM
1074void
1075md_assemble (str)
1076 char *str;
1077{
c6a7ab1f 1078 struct avr_opcodes_s *opcode;
adde6300
AM
1079 char op[11];
1080
c6a7ab1f 1081 str = skip_space (extract_word (str, op, sizeof (op)));
adde6300
AM
1082
1083 if (!op[0])
00d2865b 1084 as_bad (_("can't find opcode "));
adde6300
AM
1085
1086 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1087
1088 if (opcode == NULL)
1089 {
00d2865b 1090 as_bad (_("unknown opcode `%s'"), op);
adde6300
AM
1091 return;
1092 }
1093
b170af93 1094 /* Special case for opcodes with optional operands (lpm, elpm) -
1188e082 1095 version with operands exists in avr_opcodes[] in the next entry. */
c6a7ab1f 1096
1188e082
DC
1097 if (*str && *opcode->constraints == '?')
1098 ++opcode;
b170af93 1099
00d2865b
NC
1100 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1101 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
adde6300
AM
1102
1103 /* We used to set input_line_pointer to the result of get_operands,
1104 but that is wrong. Our caller assumes we don't change it. */
1105 {
1106 char *t = input_line_pointer;
1107 avr_operands (opcode, &str);
b170af93 1108 if (*skip_space (str))
00d2865b 1109 as_bad (_("garbage at end of line"));
adde6300
AM
1110 input_line_pointer = t;
1111 }
1112}
1113
1114/* Parse ordinary expression. */
c6a7ab1f 1115
adde6300
AM
1116static char *
1117parse_exp (s, op)
1118 char *s;
c6a7ab1f 1119 expressionS *op;
adde6300
AM
1120{
1121 input_line_pointer = s;
1122 expression (op);
1123 if (op->X_op == O_absent)
1124 as_bad (_("missing operand"));
1125 return input_line_pointer;
1126}
1127
adde6300
AM
1128/* Parse special expressions (needed for LDI command):
1129 xx8 (address)
1130 xx8 (-address)
1131 pm_xx8 (address)
1132 pm_xx8 (-address)
c6a7ab1f
NC
1133 where xx is: hh, hi, lo. */
1134
adde6300
AM
1135static bfd_reloc_code_real_type
1136avr_ldi_expression (exp)
1137 expressionS *exp;
1138{
1139 char *str = input_line_pointer;
1140 char *tmp;
1141 char op[8];
1142 int mod;
1143 tmp = str;
1144
1145 str = extract_word (str, op, sizeof (op));
1dab94dd 1146
adde6300
AM
1147 if (op[0])
1148 {
1149 mod = (int) hash_find (avr_mod_hash, op);
1dab94dd 1150
adde6300
AM
1151 if (mod)
1152 {
1153 int closes = 0;
1dab94dd 1154
adde6300
AM
1155 mod -= 10;
1156 str = skip_space (str);
1dab94dd 1157
adde6300
AM
1158 if (*str == '(')
1159 {
1160 int neg_p = 0;
1dab94dd 1161
adde6300 1162 ++str;
1dab94dd 1163
adde6300
AM
1164 if (strncmp ("pm(", str, 3) == 0
1165 || strncmp ("-(pm(", str, 5) == 0)
1166 {
c6a7ab1f 1167 if (HAVE_PM_P (mod))
adde6300
AM
1168 {
1169 ++mod;
1170 ++closes;
1171 }
1172 else
00d2865b 1173 as_bad (_("illegal expression"));
1dab94dd 1174
adde6300
AM
1175 if (*str == '-')
1176 {
1177 neg_p = 1;
1178 ++closes;
1179 str += 5;
1180 }
1181 else
1182 str += 3;
1183 }
1dab94dd 1184
adde6300
AM
1185 if (*str == '-' && *(str + 1) == '(')
1186 {
1187 neg_p ^= 1;
1188 ++closes;
1189 str += 2;
1190 }
1dab94dd 1191
adde6300
AM
1192 input_line_pointer = str;
1193 expression (exp);
1dab94dd 1194
adde6300
AM
1195 do
1196 {
1197 if (*input_line_pointer != ')')
1198 {
00d2865b 1199 as_bad (_("`)' required"));
adde6300
AM
1200 break;
1201 }
1202 input_line_pointer++;
1203 }
1204 while (closes--);
1dab94dd 1205
adde6300
AM
1206 return neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
1207 }
1208 }
1209 }
1dab94dd 1210
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1211 input_line_pointer = tmp;
1212 expression (exp);
00d2865b 1213
c6a7ab1f 1214 /* Warn about expressions that fail to use lo8 (). */
00d2865b
NC
1215 if (exp->X_op == O_constant)
1216 {
1217 int x = exp->X_add_number;
1218 if (x < -255 || x > 255)
1219 as_warn (_("constant out of 8-bit range: %d"), x);
1220 }
1221 else
1222 as_warn (_("expression possibly out of 8-bit range"));
1223
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1224 return BFD_RELOC_AVR_LO8_LDI;
1225}
1226
1227/* Flag to pass `pm' mode between `avr_parse_cons_expression' and
c6a7ab1f 1228 `avr_cons_fix_new'. */
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1229static int exp_mod_pm = 0;
1230
1231/* Parse special CONS expression: pm (expression)
1232 which is used for addressing to a program memory.
c6a7ab1f
NC
1233 Relocation: BFD_RELOC_AVR_16_PM. */
1234
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1235void
1236avr_parse_cons_expression (exp, nbytes)
1237 expressionS *exp;
1238 int nbytes;
1239{
c6a7ab1f 1240 char *tmp;
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1241
1242 exp_mod_pm = 0;
1243
1244 tmp = input_line_pointer = skip_space (input_line_pointer);
1245
1246 if (nbytes == 2)
1247 {
c6a7ab1f 1248 char *pm_name = "pm";
adde6300 1249 int len = strlen (pm_name);
1dab94dd 1250
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1251 if (strncasecmp (input_line_pointer, pm_name, len) == 0)
1252 {
1253 input_line_pointer = skip_space (input_line_pointer + len);
1dab94dd 1254
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1255 if (*input_line_pointer == '(')
1256 {
1257 input_line_pointer = skip_space (input_line_pointer + 1);
1258 exp_mod_pm = 1;
1259 expression (exp);
1dab94dd 1260
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1261 if (*input_line_pointer == ')')
1262 ++input_line_pointer;
1263 else
1264 {
00d2865b 1265 as_bad (_("`)' required"));
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1266 exp_mod_pm = 0;
1267 }
1dab94dd 1268
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1269 return;
1270 }
1dab94dd 1271
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1272 input_line_pointer = tmp;
1273 }
1274 }
1dab94dd 1275
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1276 expression (exp);
1277}
1278
1279void
c6a7ab1f 1280avr_cons_fix_new (frag, where, nbytes, exp)
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1281 fragS *frag;
1282 int where;
1283 int nbytes;
1284 expressionS *exp;
1285{
1286 if (exp_mod_pm == 0)
1287 {
1288 if (nbytes == 2)
1289 fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_16);
1290 else if (nbytes == 4)
1291 fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_32);
1292 else
00d2865b 1293 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
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1294 }
1295 else
1296 {
1297 if (nbytes == 2)
1298 fix_new_exp (frag, where, nbytes, exp, false, BFD_RELOC_AVR_16_PM);
1299 else
00d2865b 1300 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
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1301 exp_mod_pm = 0;
1302 }
1303}
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