x86/Intel: drop pointless special casing of LxS
[deliverable/binutils-gdb.git] / gas / config / tc-i386-intel.c
CommitLineData
ee86248c 1/* tc-i386.c -- Assemble Intel syntax code for ix86/x86-64
82704155 2 Copyright (C) 2009-2019 Free Software Foundation, Inc.
ee86248c
JB
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19 02110-1301, USA. */
20
21static struct
22 {
23 operatorT op_modifier; /* Operand modifier. */
24 int is_mem; /* 1 if operand is memory reference. */
25303607 25 int is_indirect; /* 1 if operand is indirect reference. */
6cee4cda 26 int has_offset; /* 1 if operand has offset. */
ee86248c
JB
27 unsigned int in_offset; /* >=1 if processing operand of offset. */
28 unsigned int in_bracket; /* >=1 if processing operand in brackets. */
33eaf5de 29 unsigned int in_scale; /* >=1 if processing multiplication operand
ee86248c
JB
30 * in brackets. */
31 i386_operand_type reloc_types; /* Value obtained from lex_got(). */
32 const reg_entry *base; /* Base register (if any). */
33 const reg_entry *index; /* Index register (if any). */
34 offsetT scale_factor; /* Accumulated scale factor. */
35 symbolS *seg;
36 }
37intel_state;
38
39/* offset X_add_symbol */
40#define O_offset O_md32
7ac3eb25
L
41/* offset X_add_symbol */
42#define O_short O_md31
43/* near ptr X_add_symbol */
44#define O_near_ptr O_md30
45/* far ptr X_add_symbol */
46#define O_far_ptr O_md29
ee86248c 47/* byte ptr X_add_symbol */
7ac3eb25 48#define O_byte_ptr O_md28
ee86248c 49/* word ptr X_add_symbol */
7ac3eb25 50#define O_word_ptr O_md27
ee86248c 51/* dword ptr X_add_symbol */
7ac3eb25 52#define O_dword_ptr O_md26
ee86248c 53/* qword ptr X_add_symbol */
7ac3eb25 54#define O_qword_ptr O_md25
ee86248c 55/* oword ptr X_add_symbol */
7ac3eb25 56#define O_oword_ptr O_md24
ee86248c 57/* fword ptr X_add_symbol */
7ac3eb25 58#define O_fword_ptr O_md23
ee86248c 59/* tbyte ptr X_add_symbol */
7ac3eb25 60#define O_tbyte_ptr O_md22
ee86248c 61/* xmmword ptr X_add_symbol */
7ac3eb25 62#define O_xmmword_ptr O_md21
ee86248c 63/* ymmword ptr X_add_symbol */
7ac3eb25 64#define O_ymmword_ptr O_md20
43234a1e
L
65/* zmmword ptr X_add_symbol */
66#define O_zmmword_ptr O_md19
ee86248c
JB
67
68static struct
69 {
70 const char *name;
1e9cc1c2 71 operatorT op;
ee86248c
JB
72 unsigned int operands;
73 }
74const i386_operators[] =
75 {
76 { "and", O_bit_and, 2 },
77 { "eq", O_eq, 2 },
78 { "ge", O_ge, 2 },
79 { "gt", O_gt, 2 },
80 { "le", O_le, 2 },
81 { "lt", O_lt, 2 },
82 { "mod", O_modulus, 2 },
83 { "ne", O_ne, 2 },
84 { "not", O_bit_not, 1 },
85 { "offset", O_offset, 1 },
86 { "or", O_bit_inclusive_or, 2 },
87 { "shl", O_left_shift, 2 },
88 { "short", O_short, 1 },
89 { "shr", O_right_shift, 2 },
90 { "xor", O_bit_exclusive_or, 2 },
91 { NULL, O_illegal, 0 }
92 };
93
94static struct
95 {
96 const char *name;
1e9cc1c2 97 operatorT op;
ee86248c
JB
98 unsigned short sz[3];
99 }
100const i386_types[] =
101 {
102#define I386_TYPE(t, n) { #t, O_##t##_ptr, { n, n, n } }
103 I386_TYPE(byte, 1),
104 I386_TYPE(word, 2),
105 I386_TYPE(dword, 4),
106 I386_TYPE(fword, 6),
107 I386_TYPE(qword, 8),
108 I386_TYPE(tbyte, 10),
109 I386_TYPE(oword, 16),
110 I386_TYPE(xmmword, 16),
111 I386_TYPE(ymmword, 32),
43234a1e 112 I386_TYPE(zmmword, 64),
ee86248c
JB
113#undef I386_TYPE
114 { "near", O_near_ptr, { 0xff04, 0xff02, 0xff08 } },
115 { "far", O_far_ptr, { 0xff06, 0xff05, 0xff06 } },
116 { NULL, O_illegal, { 0, 0, 0 } }
117 };
118
119operatorT i386_operator (const char *name, unsigned int operands, char *pc)
120{
121 unsigned int j;
122
123 if (!intel_syntax)
124 return O_absent;
125
126 if (!name)
127 {
128 if (operands != 2)
129 return O_illegal;
130 switch (*input_line_pointer)
131 {
132 case ':':
133 ++input_line_pointer;
134 return O_full_ptr;
135 case '[':
136 ++input_line_pointer;
137 return O_index;
138 case '@':
139 if (this_operand >= 0 && i.reloc[this_operand] == NO_RELOC)
140 {
141 int adjust = 0;
142 char *gotfree_input_line = lex_got (&i.reloc[this_operand],
143 &adjust,
d258b828 144 &intel_state.reloc_types);
ee86248c
JB
145
146 if (!gotfree_input_line)
147 break;
148 free (gotfree_input_line);
149 *input_line_pointer++ = '+';
150 memset (input_line_pointer, '0', adjust - 1);
151 input_line_pointer[adjust - 1] = ' ';
152 return O_add;
153 }
154 break;
155 }
156 return O_illegal;
157 }
158
159 for (j = 0; i386_operators[j].name; ++j)
91d6fa6a 160 if (strcasecmp (i386_operators[j].name, name) == 0)
ee86248c
JB
161 {
162 if (i386_operators[j].operands
163 && i386_operators[j].operands != operands)
164 return O_illegal;
1e9cc1c2 165 return i386_operators[j].op;
ee86248c
JB
166 }
167
168 for (j = 0; i386_types[j].name; ++j)
91d6fa6a 169 if (strcasecmp (i386_types[j].name, name) == 0)
ee86248c 170 break;
d02603dc 171
ee86248c
JB
172 if (i386_types[j].name && *pc == ' ')
173 {
d02603dc
NC
174 char *pname;
175 char c;
176
177 ++input_line_pointer;
178 c = get_symbol_name (&pname);
ee86248c 179
91d6fa6a 180 if (strcasecmp (pname, "ptr") == 0)
ee86248c 181 {
d02603dc 182 /* FIXME: What if c == '"' ? */
91d6fa6a 183 pname[-1] = *pc;
ee86248c
JB
184 *pc = c;
185 if (intel_syntax > 0 || operands != 1)
186 return O_illegal;
1e9cc1c2 187 return i386_types[j].op;
ee86248c
JB
188 }
189
d02603dc 190 (void) restore_line_pointer (c);
91d6fa6a 191 input_line_pointer = pname - 1;
ee86248c
JB
192 }
193
194 return O_absent;
195}
196
197static int i386_intel_parse_name (const char *name, expressionS *e)
198{
91d6fa6a 199 unsigned int j;
ee86248c 200
b7adb16d
JB
201 if (! strcmp (name, "$"))
202 {
203 current_location (e);
204 return 1;
205 }
206
91d6fa6a
NC
207 for (j = 0; i386_types[j].name; ++j)
208 if (strcasecmp(i386_types[j].name, name) == 0)
ee86248c
JB
209 {
210 e->X_op = O_constant;
91d6fa6a 211 e->X_add_number = i386_types[j].sz[flag_code];
ee86248c
JB
212 e->X_add_symbol = NULL;
213 e->X_op_symbol = NULL;
214 return 1;
215 }
216
217 return 0;
218}
219
91d6fa6a 220static INLINE int i386_intel_check (const reg_entry *rreg,
ee86248c 221 const reg_entry *base,
91d6fa6a 222 const reg_entry *iindex)
ee86248c 223{
f09c1772
L
224 if ((this_operand >= 0
225 && rreg != i.op[this_operand].regs)
226 || base != intel_state.base
227 || iindex != intel_state.index)
ee86248c
JB
228 {
229 as_bad (_("invalid use of register"));
230 return 0;
231 }
232 return 1;
233}
234
235static INLINE void i386_intel_fold (expressionS *e, symbolS *sym)
236{
27dee630 237 expressionS *exp = symbol_get_value_expression (sym);
ee86248c
JB
238 if (S_GET_SEGMENT (sym) == absolute_section)
239 {
240 offsetT val = e->X_add_number;
241
27dee630 242 *e = *exp;
ee86248c
JB
243 e->X_add_number += val;
244 }
245 else
246 {
27dee630
L
247 if (exp->X_op == O_symbol
248 && strcmp (S_GET_NAME (exp->X_add_symbol),
249 GLOBAL_OFFSET_TABLE_NAME) == 0)
250 sym = exp->X_add_symbol;
ee86248c
JB
251 e->X_add_symbol = sym;
252 e->X_op_symbol = NULL;
253 e->X_op = O_symbol;
254 }
255}
256
3c7b9c2c
L
257static int
258i386_intel_simplify_register (expressionS *e)
259{
260 int reg_num;
261
262 if (this_operand < 0 || intel_state.in_offset)
263 {
264 as_bad (_("invalid use of register"));
265 return 0;
266 }
267
268 if (e->X_op == O_register)
269 reg_num = e->X_add_number;
270 else
271 reg_num = e->X_md - 1;
272
35015cd1
NC
273 if (reg_num < 0 || reg_num >= (int) i386_regtab_size)
274 {
275 as_bad (_("invalid register number"));
276 return 0;
277 }
278
3c7b9c2c
L
279 if (!intel_state.in_bracket)
280 {
281 if (i.op[this_operand].regs)
282 {
283 as_bad (_("invalid use of register"));
284 return 0;
285 }
00cee14f 286 if (i386_regtab[reg_num].reg_type.bitfield.class == SReg
3c7b9c2c
L
287 && i386_regtab[reg_num].reg_num == RegFlat)
288 {
289 as_bad (_("invalid use of pseudo-register"));
290 return 0;
291 }
292 i.op[this_operand].regs = i386_regtab + reg_num;
293 }
9e2934f7 294 else if (!intel_state.index
1b54b8d7
JB
295 && (i386_regtab[reg_num].reg_type.bitfield.xmmword
296 || i386_regtab[reg_num].reg_type.bitfield.ymmword
297 || i386_regtab[reg_num].reg_type.bitfield.zmmword
e968fc9b 298 || i386_regtab[reg_num].reg_num == RegIZ))
9e2934f7 299 intel_state.index = i386_regtab + reg_num;
3c7b9c2c
L
300 else if (!intel_state.base && !intel_state.in_scale)
301 intel_state.base = i386_regtab + reg_num;
302 else if (!intel_state.index)
9e2934f7
JB
303 {
304 if (intel_state.in_scale
47cd3fa7
JB
305 || current_templates->start->base_opcode == 0xf30f1b /* bndmk */
306 || (current_templates->start->base_opcode & ~1) == 0x0f1a /* bnd{ld,st}x */
9e2934f7
JB
307 || i386_regtab[reg_num].reg_type.bitfield.baseindex)
308 intel_state.index = i386_regtab + reg_num;
309 else
310 {
311 /* Convert base to index and make ESP/RSP the base. */
312 intel_state.index = intel_state.base;
313 intel_state.base = i386_regtab + reg_num;
314 }
315 }
3c7b9c2c
L
316 else
317 {
318 /* esp is invalid as index */
8280f326 319 intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM;
3c7b9c2c
L
320 }
321 return 2;
322}
323
ee86248c
JB
324static int i386_intel_simplify (expressionS *);
325
326static INLINE int i386_intel_simplify_symbol(symbolS *sym)
327{
328 int ret = i386_intel_simplify (symbol_get_value_expression (sym));
329
330 if (ret == 2)
331 {
332 S_SET_SEGMENT(sym, absolute_section);
333 ret = 1;
334 }
335 return ret;
336}
337
338static int i386_intel_simplify (expressionS *e)
339{
f09c1772
L
340 const reg_entry *the_reg = (this_operand >= 0
341 ? i.op[this_operand].regs : NULL);
ee86248c 342 const reg_entry *base = intel_state.base;
91d6fa6a 343 const reg_entry *state_index = intel_state.index;
ee86248c
JB
344 int ret;
345
346 if (!intel_syntax)
347 return 1;
348
349 switch (e->X_op)
350 {
351 case O_index:
352 if (e->X_add_symbol)
353 {
354 if (!i386_intel_simplify_symbol (e->X_add_symbol)
f09c1772
L
355 || !i386_intel_check(the_reg, intel_state.base,
356 intel_state.index))
5bb3703f 357 return 0;
ee86248c
JB
358 }
359 if (!intel_state.in_offset)
360 ++intel_state.in_bracket;
361 ret = i386_intel_simplify_symbol (e->X_op_symbol);
362 if (!intel_state.in_offset)
363 --intel_state.in_bracket;
364 if (!ret)
365 return 0;
366 if (e->X_add_symbol)
367 e->X_op = O_add;
368 else
369 i386_intel_fold (e, e->X_op_symbol);
370 break;
371
372 case O_offset:
6cee4cda 373 intel_state.has_offset = 1;
ee86248c
JB
374 ++intel_state.in_offset;
375 ret = i386_intel_simplify_symbol (e->X_add_symbol);
376 --intel_state.in_offset;
91d6fa6a 377 if (!ret || !i386_intel_check(the_reg, base, state_index))
ee86248c
JB
378 return 0;
379 i386_intel_fold (e, e->X_add_symbol);
380 return ret;
381
382 case O_byte_ptr:
383 case O_word_ptr:
384 case O_dword_ptr:
385 case O_fword_ptr:
386 case O_qword_ptr:
387 case O_tbyte_ptr:
388 case O_oword_ptr:
389 case O_xmmword_ptr:
390 case O_ymmword_ptr:
43234a1e 391 case O_zmmword_ptr:
ee86248c
JB
392 case O_near_ptr:
393 case O_far_ptr:
394 if (intel_state.op_modifier == O_absent)
395 intel_state.op_modifier = e->X_op;
396 /* FALLTHROUGH */
397 case O_short:
f09c1772
L
398 if (symbol_get_value_expression (e->X_add_symbol)->X_op
399 == O_register)
ee86248c
JB
400 {
401 as_bad (_("invalid use of register"));
402 return 0;
403 }
404 if (!i386_intel_simplify_symbol (e->X_add_symbol))
405 return 0;
406 i386_intel_fold (e, e->X_add_symbol);
407 break;
408
409 case O_full_ptr:
f09c1772
L
410 if (symbol_get_value_expression (e->X_op_symbol)->X_op
411 == O_register)
ee86248c
JB
412 {
413 as_bad (_("invalid use of register"));
414 return 0;
415 }
416 if (!i386_intel_simplify_symbol (e->X_op_symbol)
f09c1772
L
417 || !i386_intel_check(the_reg, intel_state.base,
418 intel_state.index))
ee86248c
JB
419 return 0;
420 if (!intel_state.in_offset)
fd4e0347
JB
421 {
422 if (!intel_state.seg)
423 intel_state.seg = e->X_add_symbol;
424 else
425 {
426 expressionS exp;
427
428 exp.X_op = O_full_ptr;
429 exp.X_add_symbol = e->X_add_symbol;
430 exp.X_op_symbol = intel_state.seg;
431 intel_state.seg = make_expr_symbol (&exp);
432 }
433 }
ee86248c
JB
434 i386_intel_fold (e, e->X_op_symbol);
435 break;
436
ee86248c
JB
437 case O_multiply:
438 if (this_operand >= 0 && intel_state.in_bracket)
439 {
440 expressionS *scale = NULL;
c2a5914e 441 int has_index = (intel_state.index != NULL);
ee86248c
JB
442
443 if (!intel_state.in_scale++)
444 intel_state.scale_factor = 1;
445
446 ret = i386_intel_simplify_symbol (e->X_add_symbol);
c2a5914e 447 if (ret && !has_index && intel_state.index)
ee86248c
JB
448 scale = symbol_get_value_expression (e->X_op_symbol);
449
450 if (ret)
451 ret = i386_intel_simplify_symbol (e->X_op_symbol);
c2a5914e 452 if (ret && !scale && !has_index && intel_state.index)
ee86248c
JB
453 scale = symbol_get_value_expression (e->X_add_symbol);
454
c2a5914e 455 if (ret && scale)
ee86248c
JB
456 {
457 resolve_expression (scale);
458 if (scale->X_op != O_constant
dc821c5f 459 || intel_state.index->reg_type.bitfield.word)
ee86248c
JB
460 scale->X_add_number = 0;
461 intel_state.scale_factor *= scale->X_add_number;
462 }
463
464 --intel_state.in_scale;
465 if (!ret)
466 return 0;
467
468 if (!intel_state.in_scale)
469 switch (intel_state.scale_factor)
470 {
471 case 1:
472 i.log2_scale_factor = 0;
473 break;
474 case 2:
475 i.log2_scale_factor = 1;
476 break;
477 case 4:
478 i.log2_scale_factor = 2;
479 break;
480 case 8:
481 i.log2_scale_factor = 3;
482 break;
483 default:
484 /* esp is invalid as index */
8280f326 485 intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM;
ee86248c
JB
486 break;
487 }
488
489 break;
490 }
92b4f90c 491 goto fallthrough;
3c7b9c2c
L
492
493 case O_register:
494 ret = i386_intel_simplify_register (e);
495 if (ret == 2)
496 {
497 gas_assert (e->X_add_number < (unsigned short) -1);
498 e->X_md = (unsigned short) e->X_add_number + 1;
499 e->X_op = O_constant;
500 e->X_add_number = 0;
501 }
502 return ret;
503
504 case O_constant:
505 if (e->X_md)
506 return i386_intel_simplify_register (e);
507
ee86248c
JB
508 /* FALLTHROUGH */
509 default:
92b4f90c 510fallthrough:
f09c1772
L
511 if (e->X_add_symbol
512 && !i386_intel_simplify_symbol (e->X_add_symbol))
ee86248c
JB
513 return 0;
514 if (e->X_op == O_add || e->X_op == O_subtract)
515 {
516 base = intel_state.base;
91d6fa6a 517 state_index = intel_state.index;
ee86248c 518 }
91d6fa6a 519 if (!i386_intel_check (the_reg, base, state_index)
f09c1772
L
520 || (e->X_op_symbol
521 && !i386_intel_simplify_symbol (e->X_op_symbol))
91d6fa6a 522 || !i386_intel_check (the_reg,
f09c1772
L
523 (e->X_op != O_add
524 ? base : intel_state.base),
525 (e->X_op != O_add
526 ? state_index : intel_state.index)))
ee86248c
JB
527 return 0;
528 break;
529 }
530
f09c1772
L
531 if (this_operand >= 0
532 && e->X_op == O_symbol
533 && !intel_state.in_offset)
ee86248c
JB
534 {
535 segT seg = S_GET_SEGMENT (e->X_add_symbol);
536
537 if (seg != absolute_section
538 && seg != reg_section
539 && seg != expr_section)
540 intel_state.is_mem |= 2 - !intel_state.in_bracket;
541 }
542
543 return 1;
544}
545
546int i386_need_index_operator (void)
547{
548 return intel_syntax < 0;
549}
550
551static int
552i386_intel_operand (char *operand_string, int got_a_float)
553{
554 char *saved_input_line_pointer, *buf;
555 segT exp_seg;
556 expressionS exp, *expP;
557 char suffix = 0;
558 int ret;
559
43234a1e
L
560 /* Handle vector immediates. */
561 if (RC_SAE_immediate (operand_string))
562 return 1;
563
ee86248c
JB
564 /* Initialize state structure. */
565 intel_state.op_modifier = O_absent;
566 intel_state.is_mem = 0;
25303607 567 intel_state.is_indirect = 0;
1acf546e 568 intel_state.has_offset = 0;
ee86248c
JB
569 intel_state.base = NULL;
570 intel_state.index = NULL;
571 intel_state.seg = NULL;
572 operand_type_set (&intel_state.reloc_types, ~0);
9c2799c2
NC
573 gas_assert (!intel_state.in_offset);
574 gas_assert (!intel_state.in_bracket);
575 gas_assert (!intel_state.in_scale);
ee86248c
JB
576
577 saved_input_line_pointer = input_line_pointer;
578 input_line_pointer = buf = xstrdup (operand_string);
579
580 intel_syntax = -1;
581 memset (&exp, 0, sizeof(exp));
582 exp_seg = expression (&exp);
583 ret = i386_intel_simplify (&exp);
584 intel_syntax = 1;
585
586 SKIP_WHITESPACE ();
43234a1e
L
587
588 /* Handle vector operations. */
589 if (*input_line_pointer == '{')
590 {
591 char *end = check_VecOperations (input_line_pointer, NULL);
592 if (end)
593 input_line_pointer = end;
594 else
595 ret = 0;
596 }
597
ee86248c
JB
598 if (!is_end_of_line[(unsigned char) *input_line_pointer])
599 {
38bf5113
JB
600 if (ret)
601 as_bad (_("junk `%s' after expression"), input_line_pointer);
ee86248c
JB
602 ret = 0;
603 }
604 else if (exp.X_op == O_illegal || exp.X_op == O_absent)
605 {
38bf5113
JB
606 if (ret)
607 as_bad (_("invalid expression"));
ee86248c
JB
608 ret = 0;
609 }
6cee4cda
L
610 else if (!intel_state.has_offset
611 && input_line_pointer > buf
612 && *(input_line_pointer - 1) == ']')
25303607
L
613 {
614 intel_state.is_mem |= 1;
615 intel_state.is_indirect = 1;
616 }
ee86248c
JB
617
618 input_line_pointer = saved_input_line_pointer;
619 free (buf);
620
9c2799c2
NC
621 gas_assert (!intel_state.in_offset);
622 gas_assert (!intel_state.in_bracket);
623 gas_assert (!intel_state.in_scale);
ee86248c
JB
624
625 if (!ret)
626 return 0;
627
628 if (intel_state.op_modifier != O_absent
629 && current_templates->start->base_opcode != 0x8d /* lea */)
630 {
631 i.types[this_operand].bitfield.unspecified = 0;
632
633 switch (intel_state.op_modifier)
634 {
635 case O_byte_ptr:
636 i.types[this_operand].bitfield.byte = 1;
637 suffix = BYTE_MNEM_SUFFIX;
638 break;
639
640 case O_word_ptr:
641 i.types[this_operand].bitfield.word = 1;
37404387 642 if (got_a_float == 2) /* "fi..." */
ee86248c
JB
643 suffix = SHORT_MNEM_SUFFIX;
644 else
645 suffix = WORD_MNEM_SUFFIX;
646 break;
647
648 case O_dword_ptr:
649 i.types[this_operand].bitfield.dword = 1;
650 if ((current_templates->start->name[0] == 'l'
651 && current_templates->start->name[2] == 's'
652 && current_templates->start->name[3] == 0)
653 || current_templates->start->base_opcode == 0x62 /* bound */)
654 suffix = WORD_MNEM_SUFFIX;
d488367a 655 else if (flag_code != CODE_32BIT
0cfa3eb3
JB
656 && (current_templates->start->opcode_modifier.jump == JUMP
657 || current_templates->start->opcode_modifier.jump
658 == JUMP_DWORD))
d488367a
JB
659 suffix = flag_code == CODE_16BIT ? LONG_DOUBLE_MNEM_SUFFIX
660 : WORD_MNEM_SUFFIX;
ee86248c
JB
661 else if (got_a_float == 1) /* "f..." */
662 suffix = SHORT_MNEM_SUFFIX;
663 else
664 suffix = LONG_MNEM_SUFFIX;
665 break;
666
667 case O_fword_ptr:
668 i.types[this_operand].bitfield.fword = 1;
669 if (current_templates->start->name[0] == 'l'
670 && current_templates->start->name[2] == 's'
671 && current_templates->start->name[3] == 0)
672 suffix = LONG_MNEM_SUFFIX;
673 else if (!got_a_float)
674 {
675 if (flag_code == CODE_16BIT)
676 add_prefix (DATA_PREFIX_OPCODE);
677 suffix = LONG_DOUBLE_MNEM_SUFFIX;
678 }
679 else
680 suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
681 break;
682
683 case O_qword_ptr:
684 i.types[this_operand].bitfield.qword = 1;
685 if (current_templates->start->base_opcode == 0x62 /* bound */
686 || got_a_float == 1) /* "f..." */
687 suffix = LONG_MNEM_SUFFIX;
688 else
689 suffix = QWORD_MNEM_SUFFIX;
690 break;
691
692 case O_tbyte_ptr:
693 i.types[this_operand].bitfield.tbyte = 1;
694 if (got_a_float == 1)
695 suffix = LONG_DOUBLE_MNEM_SUFFIX;
0ba59a29
JB
696 else if (current_templates->start->operand_types[0].bitfield.fword
697 || current_templates->start->operand_types[0].bitfield.tbyte)
698 {
699 /* l[defgs]s, [ls][gi]dt */
700 if (flag_code == CODE_64BIT)
701 suffix = QWORD_MNEM_SUFFIX;
702 else
703 i.types[this_operand].bitfield.byte = 1; /* cause an error */
704 }
ee86248c
JB
705 else
706 suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
707 break;
708
709 case O_oword_ptr:
710 case O_xmmword_ptr:
711 i.types[this_operand].bitfield.xmmword = 1;
ee86248c
JB
712 break;
713
714 case O_ymmword_ptr:
715 i.types[this_operand].bitfield.ymmword = 1;
ee86248c
JB
716 break;
717
43234a1e
L
718 case O_zmmword_ptr:
719 i.types[this_operand].bitfield.zmmword = 1;
43234a1e
L
720 break;
721
ee86248c
JB
722 case O_far_ptr:
723 suffix = LONG_DOUBLE_MNEM_SUFFIX;
724 /* FALLTHROUGH */
725 case O_near_ptr:
0cfa3eb3
JB
726 if (current_templates->start->opcode_modifier.jump != JUMP
727 && current_templates->start->opcode_modifier.jump != JUMP_DWORD)
ee86248c
JB
728 suffix = got_a_float /* so it will cause an error */
729 ? BYTE_MNEM_SUFFIX
730 : LONG_DOUBLE_MNEM_SUFFIX;
731 break;
732
733 default:
734 BAD_CASE (intel_state.op_modifier);
735 break;
736 }
737
738 if (!i.suffix)
739 i.suffix = suffix;
740 else if (i.suffix != suffix)
741 {
742 as_bad (_("conflicting operand size modifiers"));
743 return 0;
744 }
745 }
746
747 /* Operands for jump/call need special consideration. */
0cfa3eb3
JB
748 if (current_templates->start->opcode_modifier.jump == JUMP
749 || current_templates->start->opcode_modifier.jump == JUMP_DWORD
750 || current_templates->start->opcode_modifier.jump == JUMP_INTERSEGMENT)
ee86248c 751 {
6f2f06be
JB
752 bfd_boolean jumpabsolute = FALSE;
753
f09c1772
L
754 if (i.op[this_operand].regs
755 || intel_state.base
756 || intel_state.index
ee86248c 757 || intel_state.is_mem > 1)
6f2f06be 758 jumpabsolute = TRUE;
ee86248c
JB
759 else
760 switch (intel_state.op_modifier)
761 {
762 case O_near_ptr:
763 if (intel_state.seg)
6f2f06be 764 jumpabsolute = TRUE;
ee86248c
JB
765 else
766 intel_state.is_mem = 1;
767 break;
768 case O_far_ptr:
769 case O_absent:
770 if (!intel_state.seg)
771 {
772 intel_state.is_mem = 1;
773 if (intel_state.op_modifier == O_absent)
25303607
L
774 {
775 if (intel_state.is_indirect == 1)
6f2f06be 776 jumpabsolute = TRUE;
25303607
L
777 break;
778 }
ee86248c
JB
779 as_bad (_("cannot infer the segment part of the operand"));
780 return 0;
781 }
782 else if (S_GET_SEGMENT (intel_state.seg) == reg_section)
6f2f06be 783 jumpabsolute = TRUE;
ee86248c
JB
784 else
785 {
786 i386_operand_type types;
787
788 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
789 {
790 as_bad (_("at most %d immediate operands are allowed"),
791 MAX_IMMEDIATE_OPERANDS);
792 return 0;
793 }
794 expP = &im_expressions[i.imm_operands++];
795 memset (expP, 0, sizeof(*expP));
796 expP->X_op = O_symbol;
797 expP->X_add_symbol = intel_state.seg;
798 i.op[this_operand].imms = expP;
799
800 resolve_expression (expP);
801 operand_type_set (&types, ~0);
802 if (!i386_finalize_immediate (S_GET_SEGMENT (intel_state.seg),
803 expP, types, operand_string))
804 return 0;
805 if (i.operands < MAX_OPERANDS)
806 {
807 this_operand = i.operands++;
808 i.types[this_operand].bitfield.unspecified = 1;
809 }
810 if (suffix == LONG_DOUBLE_MNEM_SUFFIX)
811 i.suffix = 0;
812 intel_state.seg = NULL;
813 intel_state.is_mem = 0;
814 }
815 break;
816 default:
6f2f06be 817 jumpabsolute = TRUE;
ee86248c
JB
818 break;
819 }
6f2f06be
JB
820 if (jumpabsolute)
821 {
822 i.jumpabsolute = TRUE;
823 intel_state.is_mem |= 1;
824 }
ee86248c
JB
825 }
826 else if (intel_state.seg)
827 intel_state.is_mem |= 1;
828
829 if (i.op[this_operand].regs)
830 {
831 i386_operand_type temp;
832
833 /* Register operand. */
834 if (intel_state.base || intel_state.index || intel_state.seg)
835 {
836 as_bad (_("invalid operand"));
837 return 0;
838 }
839
840 temp = i.op[this_operand].regs->reg_type;
841 temp.bitfield.baseindex = 0;
f09c1772
L
842 i.types[this_operand] = operand_type_or (i.types[this_operand],
843 temp);
ee86248c
JB
844 i.types[this_operand].bitfield.unspecified = 0;
845 ++i.reg_operands;
846 }
f09c1772
L
847 else if (intel_state.base
848 || intel_state.index
849 || intel_state.seg
ee86248c
JB
850 || intel_state.is_mem)
851 {
852 /* Memory operand. */
8325cc63
JB
853 if (i.mem_operands == 1 && !maybe_adjust_templates ())
854 return 0;
faf786e6 855 if ((int) i.mem_operands
ee86248c
JB
856 >= 2 - !current_templates->start->opcode_modifier.isstring)
857 {
313c53d1
L
858 /* Handle
859
860 call 0x9090,0x90909090
861 lcall 0x9090,0x90909090
862 jmp 0x9090,0x90909090
863 ljmp 0x9090,0x90909090
864 */
865
0cfa3eb3
JB
866 if ((current_templates->start->opcode_modifier.jump == JUMP_INTERSEGMENT
867 || current_templates->start->opcode_modifier.jump == JUMP_DWORD
868 || current_templates->start->opcode_modifier.jump == JUMP)
313c53d1
L
869 && this_operand == 1
870 && intel_state.seg == NULL
871 && i.mem_operands == 1
872 && i.disp_operands == 1
873 && intel_state.op_modifier == O_absent)
874 {
875 /* Try to process the first operand as immediate, */
876 this_operand = 0;
877 if (i386_finalize_immediate (exp_seg, i.op[0].imms,
878 intel_state.reloc_types,
879 NULL))
880 {
881 this_operand = 1;
882 expP = &im_expressions[0];
883 i.op[this_operand].imms = expP;
884 *expP = exp;
885
886 /* Try to process the second operand as immediate, */
887 if (i386_finalize_immediate (exp_seg, expP,
888 intel_state.reloc_types,
889 NULL))
890 {
891 i.mem_operands = 0;
892 i.disp_operands = 0;
893 i.imm_operands = 2;
c48dadc9 894 i.flags[0] &= ~Operand_Mem;
313c53d1
L
895 i.types[0].bitfield.disp16 = 0;
896 i.types[0].bitfield.disp32 = 0;
897 i.types[0].bitfield.disp32s = 0;
898 return 1;
899 }
900 }
901 }
902
ee86248c
JB
903 as_bad (_("too many memory references for `%s'"),
904 current_templates->start->name);
905 return 0;
906 }
907
2abc2bec
JB
908 /* Swap base and index in 16-bit memory operands like
909 [si+bx]. Since i386_index_check is also used in AT&T
910 mode we have to do this here. */
911 if (intel_state.base
912 && intel_state.index
dc821c5f
JB
913 && intel_state.base->reg_type.bitfield.word
914 && intel_state.index->reg_type.bitfield.word
2abc2bec
JB
915 && intel_state.base->reg_num >= 6
916 && intel_state.index->reg_num < 6)
917 {
918 i.base_reg = intel_state.index;
919 i.index_reg = intel_state.base;
920 }
921 else
922 {
923 i.base_reg = intel_state.base;
924 i.index_reg = intel_state.index;
925 }
926
927 if (i.base_reg || i.index_reg)
928 i.types[this_operand].bitfield.baseindex = 1;
929
ee86248c
JB
930 expP = &disp_expressions[i.disp_operands];
931 memcpy (expP, &exp, sizeof(exp));
932 resolve_expression (expP);
933
f09c1772
L
934 if (expP->X_op != O_constant
935 || expP->X_add_number
2abc2bec 936 || !i.types[this_operand].bitfield.baseindex)
ee86248c
JB
937 {
938 i.op[this_operand].disps = expP;
939 i.disp_operands++;
940
2abc2bec
JB
941 i386_addressing_mode ();
942
ee86248c
JB
943 if (flag_code == CODE_64BIT)
944 {
945 i.types[this_operand].bitfield.disp32 = 1;
946 if (!i.prefix[ADDR_PREFIX])
947 {
948 i.types[this_operand].bitfield.disp64 = 1;
949 i.types[this_operand].bitfield.disp32s = 1;
950 }
951 }
952 else if (!i.prefix[ADDR_PREFIX] ^ (flag_code == CODE_16BIT))
953 i.types[this_operand].bitfield.disp32 = 1;
954 else
955 i.types[this_operand].bitfield.disp16 = 1;
956
957#if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)
958 /*
959 * exp_seg is used only for verification in
960 * i386_finalize_displacement, and we can end up seeing reg_section
961 * here - but we know we removed all registers from the expression
962 * (or error-ed on any remaining ones) in i386_intel_simplify. I
963 * consider the check in i386_finalize_displacement bogus anyway, in
964 * particular because it doesn't allow for expr_section, so I'd
965 * rather see that check (and the similar one in
966 * i386_finalize_immediate) use SEG_NORMAL(), but not being an a.out
967 * expert I can't really say whether that would have other bad side
968 * effects.
969 */
970 if (OUTPUT_FLAVOR == bfd_target_aout_flavour
971 && exp_seg == reg_section)
972 exp_seg = expP->X_op != O_constant ? undefined_section
973 : absolute_section;
974#endif
975
976 if (!i386_finalize_displacement (exp_seg, expP,
977 intel_state.reloc_types,
978 operand_string))
979 return 0;
980 }
981
ee86248c
JB
982 if (intel_state.seg)
983 {
fd4e0347 984 for (ret = check_none; ; ret = operand_check)
e21440ba
JB
985 {
986 expP = symbol_get_value_expression (intel_state.seg);
fd4e0347
JB
987 if (expP->X_op != O_full_ptr
988 || symbol_get_value_expression (expP->X_op_symbol)->X_op
989 != O_register)
e21440ba
JB
990 break;
991 intel_state.seg = expP->X_add_symbol;
992 }
0398aac5 993 if (expP->X_op != O_register)
ee86248c
JB
994 {
995 as_bad (_("segment register name expected"));
996 return 0;
997 }
00cee14f 998 if (i386_regtab[expP->X_add_number].reg_type.bitfield.class != SReg)
ee86248c
JB
999 {
1000 as_bad (_("invalid use of register"));
1001 return 0;
1002 }
fd4e0347
JB
1003 switch (ret)
1004 {
1005 case check_error:
1006 as_bad (_("redundant segment overrides"));
1007 return 0;
1008 case check_warning:
1009 as_warn (_("redundant segment overrides"));
1010 break;
1011 }
ee86248c
JB
1012 switch (i386_regtab[expP->X_add_number].reg_num)
1013 {
1014 case 0: i.seg[i.mem_operands] = &es; break;
1015 case 1: i.seg[i.mem_operands] = &cs; break;
1016 case 2: i.seg[i.mem_operands] = &ss; break;
1017 case 3: i.seg[i.mem_operands] = &ds; break;
1018 case 4: i.seg[i.mem_operands] = &fs; break;
1019 case 5: i.seg[i.mem_operands] = &gs; break;
1020 case RegFlat: i.seg[i.mem_operands] = NULL; break;
1021 }
1022 }
1023
ee86248c
JB
1024 if (!i386_index_check (operand_string))
1025 return 0;
1026
c48dadc9 1027 i.flags[this_operand] |= Operand_Mem;
8325cc63
JB
1028 if (i.mem_operands == 0)
1029 i.memop1_string = xstrdup (operand_string);
ee86248c
JB
1030 ++i.mem_operands;
1031 }
1032 else
1033 {
1034 /* Immediate. */
1035 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
1036 {
1037 as_bad (_("at most %d immediate operands are allowed"),
1038 MAX_IMMEDIATE_OPERANDS);
1039 return 0;
1040 }
1041
1042 expP = &im_expressions[i.imm_operands++];
1043 i.op[this_operand].imms = expP;
1044 *expP = exp;
1045
1046 return i386_finalize_immediate (exp_seg, expP, intel_state.reloc_types,
1047 operand_string);
1048 }
1049
1050 return 1;
1051}
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