ChangeLog rotatation and copyright year update
[deliverable/binutils-gdb.git] / gas / config / tc-i386-intel.c
CommitLineData
ee86248c 1/* tc-i386.c -- Assemble Intel syntax code for ix86/x86-64
b90efa5b 2 Copyright (C) 2009-2015 Free Software Foundation, Inc.
ee86248c
JB
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19 02110-1301, USA. */
20
21static struct
22 {
23 operatorT op_modifier; /* Operand modifier. */
24 int is_mem; /* 1 if operand is memory reference. */
25303607 25 int is_indirect; /* 1 if operand is indirect reference. */
6cee4cda 26 int has_offset; /* 1 if operand has offset. */
ee86248c
JB
27 unsigned int in_offset; /* >=1 if processing operand of offset. */
28 unsigned int in_bracket; /* >=1 if processing operand in brackets. */
29 unsigned int in_scale; /* >=1 if processing multipication operand
30 * in brackets. */
31 i386_operand_type reloc_types; /* Value obtained from lex_got(). */
32 const reg_entry *base; /* Base register (if any). */
33 const reg_entry *index; /* Index register (if any). */
34 offsetT scale_factor; /* Accumulated scale factor. */
35 symbolS *seg;
36 }
37intel_state;
38
39/* offset X_add_symbol */
40#define O_offset O_md32
7ac3eb25
L
41/* offset X_add_symbol */
42#define O_short O_md31
43/* near ptr X_add_symbol */
44#define O_near_ptr O_md30
45/* far ptr X_add_symbol */
46#define O_far_ptr O_md29
ee86248c 47/* byte ptr X_add_symbol */
7ac3eb25 48#define O_byte_ptr O_md28
ee86248c 49/* word ptr X_add_symbol */
7ac3eb25 50#define O_word_ptr O_md27
ee86248c 51/* dword ptr X_add_symbol */
7ac3eb25 52#define O_dword_ptr O_md26
ee86248c 53/* qword ptr X_add_symbol */
7ac3eb25 54#define O_qword_ptr O_md25
ee86248c 55/* oword ptr X_add_symbol */
7ac3eb25 56#define O_oword_ptr O_md24
ee86248c 57/* fword ptr X_add_symbol */
7ac3eb25 58#define O_fword_ptr O_md23
ee86248c 59/* tbyte ptr X_add_symbol */
7ac3eb25 60#define O_tbyte_ptr O_md22
ee86248c 61/* xmmword ptr X_add_symbol */
7ac3eb25 62#define O_xmmword_ptr O_md21
ee86248c 63/* ymmword ptr X_add_symbol */
7ac3eb25 64#define O_ymmword_ptr O_md20
43234a1e
L
65/* zmmword ptr X_add_symbol */
66#define O_zmmword_ptr O_md19
ee86248c
JB
67
68static struct
69 {
70 const char *name;
1e9cc1c2 71 operatorT op;
ee86248c
JB
72 unsigned int operands;
73 }
74const i386_operators[] =
75 {
76 { "and", O_bit_and, 2 },
77 { "eq", O_eq, 2 },
78 { "ge", O_ge, 2 },
79 { "gt", O_gt, 2 },
80 { "le", O_le, 2 },
81 { "lt", O_lt, 2 },
82 { "mod", O_modulus, 2 },
83 { "ne", O_ne, 2 },
84 { "not", O_bit_not, 1 },
85 { "offset", O_offset, 1 },
86 { "or", O_bit_inclusive_or, 2 },
87 { "shl", O_left_shift, 2 },
88 { "short", O_short, 1 },
89 { "shr", O_right_shift, 2 },
90 { "xor", O_bit_exclusive_or, 2 },
91 { NULL, O_illegal, 0 }
92 };
93
94static struct
95 {
96 const char *name;
1e9cc1c2 97 operatorT op;
ee86248c
JB
98 unsigned short sz[3];
99 }
100const i386_types[] =
101 {
102#define I386_TYPE(t, n) { #t, O_##t##_ptr, { n, n, n } }
103 I386_TYPE(byte, 1),
104 I386_TYPE(word, 2),
105 I386_TYPE(dword, 4),
106 I386_TYPE(fword, 6),
107 I386_TYPE(qword, 8),
108 I386_TYPE(tbyte, 10),
109 I386_TYPE(oword, 16),
110 I386_TYPE(xmmword, 16),
111 I386_TYPE(ymmword, 32),
43234a1e 112 I386_TYPE(zmmword, 64),
ee86248c
JB
113#undef I386_TYPE
114 { "near", O_near_ptr, { 0xff04, 0xff02, 0xff08 } },
115 { "far", O_far_ptr, { 0xff06, 0xff05, 0xff06 } },
116 { NULL, O_illegal, { 0, 0, 0 } }
117 };
118
119operatorT i386_operator (const char *name, unsigned int operands, char *pc)
120{
121 unsigned int j;
122
123 if (!intel_syntax)
124 return O_absent;
125
126 if (!name)
127 {
128 if (operands != 2)
129 return O_illegal;
130 switch (*input_line_pointer)
131 {
132 case ':':
133 ++input_line_pointer;
134 return O_full_ptr;
135 case '[':
136 ++input_line_pointer;
137 return O_index;
138 case '@':
139 if (this_operand >= 0 && i.reloc[this_operand] == NO_RELOC)
140 {
141 int adjust = 0;
142 char *gotfree_input_line = lex_got (&i.reloc[this_operand],
143 &adjust,
d258b828 144 &intel_state.reloc_types);
ee86248c
JB
145
146 if (!gotfree_input_line)
147 break;
148 free (gotfree_input_line);
149 *input_line_pointer++ = '+';
150 memset (input_line_pointer, '0', adjust - 1);
151 input_line_pointer[adjust - 1] = ' ';
152 return O_add;
153 }
154 break;
155 }
156 return O_illegal;
157 }
158
159 for (j = 0; i386_operators[j].name; ++j)
91d6fa6a 160 if (strcasecmp (i386_operators[j].name, name) == 0)
ee86248c
JB
161 {
162 if (i386_operators[j].operands
163 && i386_operators[j].operands != operands)
164 return O_illegal;
1e9cc1c2 165 return i386_operators[j].op;
ee86248c
JB
166 }
167
168 for (j = 0; i386_types[j].name; ++j)
91d6fa6a 169 if (strcasecmp (i386_types[j].name, name) == 0)
ee86248c
JB
170 break;
171 if (i386_types[j].name && *pc == ' ')
172 {
91d6fa6a 173 char *pname = ++input_line_pointer;
ee86248c
JB
174 char c = get_symbol_end ();
175
91d6fa6a 176 if (strcasecmp (pname, "ptr") == 0)
ee86248c 177 {
91d6fa6a 178 pname[-1] = *pc;
ee86248c
JB
179 *pc = c;
180 if (intel_syntax > 0 || operands != 1)
181 return O_illegal;
1e9cc1c2 182 return i386_types[j].op;
ee86248c
JB
183 }
184
185 *input_line_pointer = c;
91d6fa6a 186 input_line_pointer = pname - 1;
ee86248c
JB
187 }
188
189 return O_absent;
190}
191
192static int i386_intel_parse_name (const char *name, expressionS *e)
193{
91d6fa6a 194 unsigned int j;
ee86248c 195
b7adb16d
JB
196 if (! strcmp (name, "$"))
197 {
198 current_location (e);
199 return 1;
200 }
201
91d6fa6a
NC
202 for (j = 0; i386_types[j].name; ++j)
203 if (strcasecmp(i386_types[j].name, name) == 0)
ee86248c
JB
204 {
205 e->X_op = O_constant;
91d6fa6a 206 e->X_add_number = i386_types[j].sz[flag_code];
ee86248c
JB
207 e->X_add_symbol = NULL;
208 e->X_op_symbol = NULL;
209 return 1;
210 }
211
212 return 0;
213}
214
91d6fa6a 215static INLINE int i386_intel_check (const reg_entry *rreg,
ee86248c 216 const reg_entry *base,
91d6fa6a 217 const reg_entry *iindex)
ee86248c 218{
f09c1772
L
219 if ((this_operand >= 0
220 && rreg != i.op[this_operand].regs)
221 || base != intel_state.base
222 || iindex != intel_state.index)
ee86248c
JB
223 {
224 as_bad (_("invalid use of register"));
225 return 0;
226 }
227 return 1;
228}
229
230static INLINE void i386_intel_fold (expressionS *e, symbolS *sym)
231{
27dee630 232 expressionS *exp = symbol_get_value_expression (sym);
ee86248c
JB
233 if (S_GET_SEGMENT (sym) == absolute_section)
234 {
235 offsetT val = e->X_add_number;
236
27dee630 237 *e = *exp;
ee86248c
JB
238 e->X_add_number += val;
239 }
240 else
241 {
27dee630
L
242 if (exp->X_op == O_symbol
243 && strcmp (S_GET_NAME (exp->X_add_symbol),
244 GLOBAL_OFFSET_TABLE_NAME) == 0)
245 sym = exp->X_add_symbol;
ee86248c
JB
246 e->X_add_symbol = sym;
247 e->X_op_symbol = NULL;
248 e->X_op = O_symbol;
249 }
250}
251
3c7b9c2c
L
252static int
253i386_intel_simplify_register (expressionS *e)
254{
255 int reg_num;
256
257 if (this_operand < 0 || intel_state.in_offset)
258 {
259 as_bad (_("invalid use of register"));
260 return 0;
261 }
262
263 if (e->X_op == O_register)
264 reg_num = e->X_add_number;
265 else
266 reg_num = e->X_md - 1;
267
268 if (!intel_state.in_bracket)
269 {
270 if (i.op[this_operand].regs)
271 {
272 as_bad (_("invalid use of register"));
273 return 0;
274 }
275 if (i386_regtab[reg_num].reg_type.bitfield.sreg3
276 && i386_regtab[reg_num].reg_num == RegFlat)
277 {
278 as_bad (_("invalid use of pseudo-register"));
279 return 0;
280 }
281 i.op[this_operand].regs = i386_regtab + reg_num;
282 }
9e2934f7
JB
283 else if (!intel_state.index
284 && (i386_regtab[reg_num].reg_type.bitfield.regxmm
43234a1e
L
285 || i386_regtab[reg_num].reg_type.bitfield.regymm
286 || i386_regtab[reg_num].reg_type.bitfield.regzmm))
9e2934f7 287 intel_state.index = i386_regtab + reg_num;
3c7b9c2c
L
288 else if (!intel_state.base && !intel_state.in_scale)
289 intel_state.base = i386_regtab + reg_num;
290 else if (!intel_state.index)
9e2934f7
JB
291 {
292 if (intel_state.in_scale
47cd3fa7
JB
293 || current_templates->start->base_opcode == 0xf30f1b /* bndmk */
294 || (current_templates->start->base_opcode & ~1) == 0x0f1a /* bnd{ld,st}x */
9e2934f7
JB
295 || i386_regtab[reg_num].reg_type.bitfield.baseindex)
296 intel_state.index = i386_regtab + reg_num;
297 else
298 {
299 /* Convert base to index and make ESP/RSP the base. */
300 intel_state.index = intel_state.base;
301 intel_state.base = i386_regtab + reg_num;
302 }
303 }
3c7b9c2c
L
304 else
305 {
306 /* esp is invalid as index */
8280f326 307 intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM;
3c7b9c2c
L
308 }
309 return 2;
310}
311
ee86248c
JB
312static int i386_intel_simplify (expressionS *);
313
314static INLINE int i386_intel_simplify_symbol(symbolS *sym)
315{
316 int ret = i386_intel_simplify (symbol_get_value_expression (sym));
317
318 if (ret == 2)
319 {
320 S_SET_SEGMENT(sym, absolute_section);
321 ret = 1;
322 }
323 return ret;
324}
325
326static int i386_intel_simplify (expressionS *e)
327{
f09c1772
L
328 const reg_entry *the_reg = (this_operand >= 0
329 ? i.op[this_operand].regs : NULL);
ee86248c 330 const reg_entry *base = intel_state.base;
91d6fa6a 331 const reg_entry *state_index = intel_state.index;
ee86248c
JB
332 int ret;
333
334 if (!intel_syntax)
335 return 1;
336
337 switch (e->X_op)
338 {
339 case O_index:
340 if (e->X_add_symbol)
341 {
342 if (!i386_intel_simplify_symbol (e->X_add_symbol)
f09c1772
L
343 || !i386_intel_check(the_reg, intel_state.base,
344 intel_state.index))
5bb3703f 345 return 0;
ee86248c
JB
346 }
347 if (!intel_state.in_offset)
348 ++intel_state.in_bracket;
349 ret = i386_intel_simplify_symbol (e->X_op_symbol);
350 if (!intel_state.in_offset)
351 --intel_state.in_bracket;
352 if (!ret)
353 return 0;
354 if (e->X_add_symbol)
355 e->X_op = O_add;
356 else
357 i386_intel_fold (e, e->X_op_symbol);
358 break;
359
360 case O_offset:
6cee4cda 361 intel_state.has_offset = 1;
ee86248c
JB
362 ++intel_state.in_offset;
363 ret = i386_intel_simplify_symbol (e->X_add_symbol);
364 --intel_state.in_offset;
91d6fa6a 365 if (!ret || !i386_intel_check(the_reg, base, state_index))
ee86248c
JB
366 return 0;
367 i386_intel_fold (e, e->X_add_symbol);
368 return ret;
369
370 case O_byte_ptr:
371 case O_word_ptr:
372 case O_dword_ptr:
373 case O_fword_ptr:
374 case O_qword_ptr:
375 case O_tbyte_ptr:
376 case O_oword_ptr:
377 case O_xmmword_ptr:
378 case O_ymmword_ptr:
43234a1e 379 case O_zmmword_ptr:
ee86248c
JB
380 case O_near_ptr:
381 case O_far_ptr:
382 if (intel_state.op_modifier == O_absent)
383 intel_state.op_modifier = e->X_op;
384 /* FALLTHROUGH */
385 case O_short:
f09c1772
L
386 if (symbol_get_value_expression (e->X_add_symbol)->X_op
387 == O_register)
ee86248c
JB
388 {
389 as_bad (_("invalid use of register"));
390 return 0;
391 }
392 if (!i386_intel_simplify_symbol (e->X_add_symbol))
393 return 0;
394 i386_intel_fold (e, e->X_add_symbol);
395 break;
396
397 case O_full_ptr:
f09c1772
L
398 if (symbol_get_value_expression (e->X_op_symbol)->X_op
399 == O_register)
ee86248c
JB
400 {
401 as_bad (_("invalid use of register"));
402 return 0;
403 }
404 if (!i386_intel_simplify_symbol (e->X_op_symbol)
f09c1772
L
405 || !i386_intel_check(the_reg, intel_state.base,
406 intel_state.index))
ee86248c
JB
407 return 0;
408 if (!intel_state.in_offset)
409 intel_state.seg = e->X_add_symbol;
410 i386_intel_fold (e, e->X_op_symbol);
411 break;
412
ee86248c
JB
413 case O_multiply:
414 if (this_operand >= 0 && intel_state.in_bracket)
415 {
416 expressionS *scale = NULL;
c2a5914e 417 int has_index = (intel_state.index != NULL);
ee86248c
JB
418
419 if (!intel_state.in_scale++)
420 intel_state.scale_factor = 1;
421
422 ret = i386_intel_simplify_symbol (e->X_add_symbol);
c2a5914e 423 if (ret && !has_index && intel_state.index)
ee86248c
JB
424 scale = symbol_get_value_expression (e->X_op_symbol);
425
426 if (ret)
427 ret = i386_intel_simplify_symbol (e->X_op_symbol);
c2a5914e 428 if (ret && !scale && !has_index && intel_state.index)
ee86248c
JB
429 scale = symbol_get_value_expression (e->X_add_symbol);
430
c2a5914e 431 if (ret && scale)
ee86248c
JB
432 {
433 resolve_expression (scale);
434 if (scale->X_op != O_constant
435 || intel_state.index->reg_type.bitfield.reg16)
436 scale->X_add_number = 0;
437 intel_state.scale_factor *= scale->X_add_number;
438 }
439
440 --intel_state.in_scale;
441 if (!ret)
442 return 0;
443
444 if (!intel_state.in_scale)
445 switch (intel_state.scale_factor)
446 {
447 case 1:
448 i.log2_scale_factor = 0;
449 break;
450 case 2:
451 i.log2_scale_factor = 1;
452 break;
453 case 4:
454 i.log2_scale_factor = 2;
455 break;
456 case 8:
457 i.log2_scale_factor = 3;
458 break;
459 default:
460 /* esp is invalid as index */
8280f326 461 intel_state.index = i386_regtab + REGNAM_EAX + ESP_REG_NUM;
ee86248c
JB
462 break;
463 }
464
465 break;
466 }
92b4f90c 467 goto fallthrough;
3c7b9c2c
L
468
469 case O_register:
470 ret = i386_intel_simplify_register (e);
471 if (ret == 2)
472 {
473 gas_assert (e->X_add_number < (unsigned short) -1);
474 e->X_md = (unsigned short) e->X_add_number + 1;
475 e->X_op = O_constant;
476 e->X_add_number = 0;
477 }
478 return ret;
479
480 case O_constant:
481 if (e->X_md)
482 return i386_intel_simplify_register (e);
483
ee86248c
JB
484 /* FALLTHROUGH */
485 default:
92b4f90c 486fallthrough:
f09c1772
L
487 if (e->X_add_symbol
488 && !i386_intel_simplify_symbol (e->X_add_symbol))
ee86248c
JB
489 return 0;
490 if (e->X_op == O_add || e->X_op == O_subtract)
491 {
492 base = intel_state.base;
91d6fa6a 493 state_index = intel_state.index;
ee86248c 494 }
91d6fa6a 495 if (!i386_intel_check (the_reg, base, state_index)
f09c1772
L
496 || (e->X_op_symbol
497 && !i386_intel_simplify_symbol (e->X_op_symbol))
91d6fa6a 498 || !i386_intel_check (the_reg,
f09c1772
L
499 (e->X_op != O_add
500 ? base : intel_state.base),
501 (e->X_op != O_add
502 ? state_index : intel_state.index)))
ee86248c
JB
503 return 0;
504 break;
505 }
506
f09c1772
L
507 if (this_operand >= 0
508 && e->X_op == O_symbol
509 && !intel_state.in_offset)
ee86248c
JB
510 {
511 segT seg = S_GET_SEGMENT (e->X_add_symbol);
512
513 if (seg != absolute_section
514 && seg != reg_section
515 && seg != expr_section)
516 intel_state.is_mem |= 2 - !intel_state.in_bracket;
517 }
518
519 return 1;
520}
521
522int i386_need_index_operator (void)
523{
524 return intel_syntax < 0;
525}
526
527static int
528i386_intel_operand (char *operand_string, int got_a_float)
529{
530 char *saved_input_line_pointer, *buf;
531 segT exp_seg;
532 expressionS exp, *expP;
533 char suffix = 0;
534 int ret;
535
43234a1e
L
536 /* Handle vector immediates. */
537 if (RC_SAE_immediate (operand_string))
538 return 1;
539
ee86248c
JB
540 /* Initialize state structure. */
541 intel_state.op_modifier = O_absent;
542 intel_state.is_mem = 0;
25303607 543 intel_state.is_indirect = 0;
1acf546e 544 intel_state.has_offset = 0;
ee86248c
JB
545 intel_state.base = NULL;
546 intel_state.index = NULL;
547 intel_state.seg = NULL;
548 operand_type_set (&intel_state.reloc_types, ~0);
9c2799c2
NC
549 gas_assert (!intel_state.in_offset);
550 gas_assert (!intel_state.in_bracket);
551 gas_assert (!intel_state.in_scale);
ee86248c
JB
552
553 saved_input_line_pointer = input_line_pointer;
554 input_line_pointer = buf = xstrdup (operand_string);
555
556 intel_syntax = -1;
557 memset (&exp, 0, sizeof(exp));
558 exp_seg = expression (&exp);
559 ret = i386_intel_simplify (&exp);
560 intel_syntax = 1;
561
562 SKIP_WHITESPACE ();
43234a1e
L
563
564 /* Handle vector operations. */
565 if (*input_line_pointer == '{')
566 {
567 char *end = check_VecOperations (input_line_pointer, NULL);
568 if (end)
569 input_line_pointer = end;
570 else
571 ret = 0;
572 }
573
ee86248c
JB
574 if (!is_end_of_line[(unsigned char) *input_line_pointer])
575 {
576 as_bad (_("junk `%s' after expression"), input_line_pointer);
577 ret = 0;
578 }
579 else if (exp.X_op == O_illegal || exp.X_op == O_absent)
580 {
581 as_bad (_("invalid expression"));
582 ret = 0;
583 }
6cee4cda
L
584 else if (!intel_state.has_offset
585 && input_line_pointer > buf
586 && *(input_line_pointer - 1) == ']')
25303607
L
587 {
588 intel_state.is_mem |= 1;
589 intel_state.is_indirect = 1;
590 }
ee86248c
JB
591
592 input_line_pointer = saved_input_line_pointer;
593 free (buf);
594
9c2799c2
NC
595 gas_assert (!intel_state.in_offset);
596 gas_assert (!intel_state.in_bracket);
597 gas_assert (!intel_state.in_scale);
ee86248c
JB
598
599 if (!ret)
600 return 0;
601
602 if (intel_state.op_modifier != O_absent
603 && current_templates->start->base_opcode != 0x8d /* lea */)
604 {
605 i.types[this_operand].bitfield.unspecified = 0;
606
607 switch (intel_state.op_modifier)
608 {
609 case O_byte_ptr:
610 i.types[this_operand].bitfield.byte = 1;
611 suffix = BYTE_MNEM_SUFFIX;
612 break;
613
614 case O_word_ptr:
615 i.types[this_operand].bitfield.word = 1;
616 if ((current_templates->start->name[0] == 'l'
617 && current_templates->start->name[2] == 's'
618 && current_templates->start->name[3] == 0)
619 || current_templates->start->base_opcode == 0x62 /* bound */)
620 suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
621 else if (got_a_float == 2) /* "fi..." */
622 suffix = SHORT_MNEM_SUFFIX;
623 else
624 suffix = WORD_MNEM_SUFFIX;
625 break;
626
627 case O_dword_ptr:
628 i.types[this_operand].bitfield.dword = 1;
629 if ((current_templates->start->name[0] == 'l'
630 && current_templates->start->name[2] == 's'
631 && current_templates->start->name[3] == 0)
632 || current_templates->start->base_opcode == 0x62 /* bound */)
633 suffix = WORD_MNEM_SUFFIX;
634 else if (flag_code == CODE_16BIT
635 && (current_templates->start->opcode_modifier.jump
636 || current_templates->start->opcode_modifier.jumpdword))
637 suffix = LONG_DOUBLE_MNEM_SUFFIX;
638 else if (got_a_float == 1) /* "f..." */
639 suffix = SHORT_MNEM_SUFFIX;
640 else
641 suffix = LONG_MNEM_SUFFIX;
642 break;
643
644 case O_fword_ptr:
645 i.types[this_operand].bitfield.fword = 1;
646 if (current_templates->start->name[0] == 'l'
647 && current_templates->start->name[2] == 's'
648 && current_templates->start->name[3] == 0)
649 suffix = LONG_MNEM_SUFFIX;
650 else if (!got_a_float)
651 {
652 if (flag_code == CODE_16BIT)
653 add_prefix (DATA_PREFIX_OPCODE);
654 suffix = LONG_DOUBLE_MNEM_SUFFIX;
655 }
656 else
657 suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
658 break;
659
660 case O_qword_ptr:
661 i.types[this_operand].bitfield.qword = 1;
662 if (current_templates->start->base_opcode == 0x62 /* bound */
663 || got_a_float == 1) /* "f..." */
664 suffix = LONG_MNEM_SUFFIX;
665 else
666 suffix = QWORD_MNEM_SUFFIX;
667 break;
668
669 case O_tbyte_ptr:
670 i.types[this_operand].bitfield.tbyte = 1;
671 if (got_a_float == 1)
672 suffix = LONG_DOUBLE_MNEM_SUFFIX;
673 else
674 suffix = BYTE_MNEM_SUFFIX; /* so it will cause an error */
675 break;
676
677 case O_oword_ptr:
678 case O_xmmword_ptr:
679 i.types[this_operand].bitfield.xmmword = 1;
680 suffix = XMMWORD_MNEM_SUFFIX;
681 break;
682
683 case O_ymmword_ptr:
684 i.types[this_operand].bitfield.ymmword = 1;
685 suffix = YMMWORD_MNEM_SUFFIX;
686 break;
687
43234a1e
L
688 case O_zmmword_ptr:
689 i.types[this_operand].bitfield.zmmword = 1;
690 suffix = ZMMWORD_MNEM_SUFFIX;
691 break;
692
ee86248c
JB
693 case O_far_ptr:
694 suffix = LONG_DOUBLE_MNEM_SUFFIX;
695 /* FALLTHROUGH */
696 case O_near_ptr:
697 if (!current_templates->start->opcode_modifier.jump
698 && !current_templates->start->opcode_modifier.jumpdword)
699 suffix = got_a_float /* so it will cause an error */
700 ? BYTE_MNEM_SUFFIX
701 : LONG_DOUBLE_MNEM_SUFFIX;
702 break;
703
704 default:
705 BAD_CASE (intel_state.op_modifier);
706 break;
707 }
708
709 if (!i.suffix)
710 i.suffix = suffix;
711 else if (i.suffix != suffix)
712 {
713 as_bad (_("conflicting operand size modifiers"));
714 return 0;
715 }
716 }
717
718 /* Operands for jump/call need special consideration. */
719 if (current_templates->start->opcode_modifier.jump
720 || current_templates->start->opcode_modifier.jumpdword
721 || current_templates->start->opcode_modifier.jumpintersegment)
722 {
f09c1772
L
723 if (i.op[this_operand].regs
724 || intel_state.base
725 || intel_state.index
ee86248c
JB
726 || intel_state.is_mem > 1)
727 i.types[this_operand].bitfield.jumpabsolute = 1;
728 else
729 switch (intel_state.op_modifier)
730 {
731 case O_near_ptr:
732 if (intel_state.seg)
733 i.types[this_operand].bitfield.jumpabsolute = 1;
734 else
735 intel_state.is_mem = 1;
736 break;
737 case O_far_ptr:
738 case O_absent:
739 if (!intel_state.seg)
740 {
741 intel_state.is_mem = 1;
742 if (intel_state.op_modifier == O_absent)
25303607
L
743 {
744 if (intel_state.is_indirect == 1)
745 i.types[this_operand].bitfield.jumpabsolute = 1;
746 break;
747 }
ee86248c
JB
748 as_bad (_("cannot infer the segment part of the operand"));
749 return 0;
750 }
751 else if (S_GET_SEGMENT (intel_state.seg) == reg_section)
752 i.types[this_operand].bitfield.jumpabsolute = 1;
753 else
754 {
755 i386_operand_type types;
756
757 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
758 {
759 as_bad (_("at most %d immediate operands are allowed"),
760 MAX_IMMEDIATE_OPERANDS);
761 return 0;
762 }
763 expP = &im_expressions[i.imm_operands++];
764 memset (expP, 0, sizeof(*expP));
765 expP->X_op = O_symbol;
766 expP->X_add_symbol = intel_state.seg;
767 i.op[this_operand].imms = expP;
768
769 resolve_expression (expP);
770 operand_type_set (&types, ~0);
771 if (!i386_finalize_immediate (S_GET_SEGMENT (intel_state.seg),
772 expP, types, operand_string))
773 return 0;
774 if (i.operands < MAX_OPERANDS)
775 {
776 this_operand = i.operands++;
777 i.types[this_operand].bitfield.unspecified = 1;
778 }
779 if (suffix == LONG_DOUBLE_MNEM_SUFFIX)
780 i.suffix = 0;
781 intel_state.seg = NULL;
782 intel_state.is_mem = 0;
783 }
784 break;
785 default:
786 i.types[this_operand].bitfield.jumpabsolute = 1;
787 break;
788 }
789 if (i.types[this_operand].bitfield.jumpabsolute)
790 intel_state.is_mem |= 1;
791 }
792 else if (intel_state.seg)
793 intel_state.is_mem |= 1;
794
795 if (i.op[this_operand].regs)
796 {
797 i386_operand_type temp;
798
799 /* Register operand. */
800 if (intel_state.base || intel_state.index || intel_state.seg)
801 {
802 as_bad (_("invalid operand"));
803 return 0;
804 }
805
806 temp = i.op[this_operand].regs->reg_type;
807 temp.bitfield.baseindex = 0;
f09c1772
L
808 i.types[this_operand] = operand_type_or (i.types[this_operand],
809 temp);
ee86248c
JB
810 i.types[this_operand].bitfield.unspecified = 0;
811 ++i.reg_operands;
812 }
f09c1772
L
813 else if (intel_state.base
814 || intel_state.index
815 || intel_state.seg
ee86248c
JB
816 || intel_state.is_mem)
817 {
818 /* Memory operand. */
faf786e6 819 if ((int) i.mem_operands
ee86248c
JB
820 >= 2 - !current_templates->start->opcode_modifier.isstring)
821 {
313c53d1
L
822 /* Handle
823
824 call 0x9090,0x90909090
825 lcall 0x9090,0x90909090
826 jmp 0x9090,0x90909090
827 ljmp 0x9090,0x90909090
828 */
829
830 if ((current_templates->start->opcode_modifier.jumpintersegment
831 || current_templates->start->opcode_modifier.jumpdword
832 || current_templates->start->opcode_modifier.jump)
833 && this_operand == 1
834 && intel_state.seg == NULL
835 && i.mem_operands == 1
836 && i.disp_operands == 1
837 && intel_state.op_modifier == O_absent)
838 {
839 /* Try to process the first operand as immediate, */
840 this_operand = 0;
841 if (i386_finalize_immediate (exp_seg, i.op[0].imms,
842 intel_state.reloc_types,
843 NULL))
844 {
845 this_operand = 1;
846 expP = &im_expressions[0];
847 i.op[this_operand].imms = expP;
848 *expP = exp;
849
850 /* Try to process the second operand as immediate, */
851 if (i386_finalize_immediate (exp_seg, expP,
852 intel_state.reloc_types,
853 NULL))
854 {
855 i.mem_operands = 0;
856 i.disp_operands = 0;
857 i.imm_operands = 2;
858 i.types[0].bitfield.mem = 0;
859 i.types[0].bitfield.disp16 = 0;
860 i.types[0].bitfield.disp32 = 0;
861 i.types[0].bitfield.disp32s = 0;
862 return 1;
863 }
864 }
865 }
866
ee86248c
JB
867 as_bad (_("too many memory references for `%s'"),
868 current_templates->start->name);
869 return 0;
870 }
871
872 expP = &disp_expressions[i.disp_operands];
873 memcpy (expP, &exp, sizeof(exp));
874 resolve_expression (expP);
875
f09c1772
L
876 if (expP->X_op != O_constant
877 || expP->X_add_number
878 || (!intel_state.base
879 && !intel_state.index))
ee86248c
JB
880 {
881 i.op[this_operand].disps = expP;
882 i.disp_operands++;
883
884 if (flag_code == CODE_64BIT)
885 {
886 i.types[this_operand].bitfield.disp32 = 1;
887 if (!i.prefix[ADDR_PREFIX])
888 {
889 i.types[this_operand].bitfield.disp64 = 1;
890 i.types[this_operand].bitfield.disp32s = 1;
891 }
892 }
893 else if (!i.prefix[ADDR_PREFIX] ^ (flag_code == CODE_16BIT))
894 i.types[this_operand].bitfield.disp32 = 1;
895 else
896 i.types[this_operand].bitfield.disp16 = 1;
897
898#if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT)
899 /*
900 * exp_seg is used only for verification in
901 * i386_finalize_displacement, and we can end up seeing reg_section
902 * here - but we know we removed all registers from the expression
903 * (or error-ed on any remaining ones) in i386_intel_simplify. I
904 * consider the check in i386_finalize_displacement bogus anyway, in
905 * particular because it doesn't allow for expr_section, so I'd
906 * rather see that check (and the similar one in
907 * i386_finalize_immediate) use SEG_NORMAL(), but not being an a.out
908 * expert I can't really say whether that would have other bad side
909 * effects.
910 */
911 if (OUTPUT_FLAVOR == bfd_target_aout_flavour
912 && exp_seg == reg_section)
913 exp_seg = expP->X_op != O_constant ? undefined_section
914 : absolute_section;
915#endif
916
917 if (!i386_finalize_displacement (exp_seg, expP,
918 intel_state.reloc_types,
919 operand_string))
920 return 0;
921 }
922
923 if (intel_state.base || intel_state.index)
924 i.types[this_operand].bitfield.baseindex = 1;
925
926 if (intel_state.seg)
927 {
928 for (;;)
929 {
930 expP = symbol_get_value_expression (intel_state.seg);
931 if (expP->X_op != O_full_ptr)
932 break;
933 intel_state.seg = expP->X_add_symbol;
934 }
0398aac5 935 if (expP->X_op != O_register)
ee86248c
JB
936 {
937 as_bad (_("segment register name expected"));
938 return 0;
939 }
940 if (!i386_regtab[expP->X_add_number].reg_type.bitfield.sreg2
941 && !i386_regtab[expP->X_add_number].reg_type.bitfield.sreg3)
942 {
943 as_bad (_("invalid use of register"));
944 return 0;
945 }
946 switch (i386_regtab[expP->X_add_number].reg_num)
947 {
948 case 0: i.seg[i.mem_operands] = &es; break;
949 case 1: i.seg[i.mem_operands] = &cs; break;
950 case 2: i.seg[i.mem_operands] = &ss; break;
951 case 3: i.seg[i.mem_operands] = &ds; break;
952 case 4: i.seg[i.mem_operands] = &fs; break;
953 case 5: i.seg[i.mem_operands] = &gs; break;
954 case RegFlat: i.seg[i.mem_operands] = NULL; break;
955 }
956 }
957
958 /* Swap base and index in 16-bit memory operands like
959 [si+bx]. Since i386_index_check is also used in AT&T
960 mode we have to do that here. */
961 if (intel_state.base
962 && intel_state.index
963 && intel_state.base->reg_type.bitfield.reg16
964 && intel_state.index->reg_type.bitfield.reg16
965 && intel_state.base->reg_num >= 6
966 && intel_state.index->reg_num < 6)
967 {
968 i.base_reg = intel_state.index;
969 i.index_reg = intel_state.base;
970 }
971 else
972 {
973 i.base_reg = intel_state.base;
974 i.index_reg = intel_state.index;
975 }
976
977 if (!i386_index_check (operand_string))
978 return 0;
979
980 i.types[this_operand].bitfield.mem = 1;
981 ++i.mem_operands;
982 }
983 else
984 {
985 /* Immediate. */
986 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS)
987 {
988 as_bad (_("at most %d immediate operands are allowed"),
989 MAX_IMMEDIATE_OPERANDS);
990 return 0;
991 }
992
993 expP = &im_expressions[i.imm_operands++];
994 i.op[this_operand].imms = expP;
995 *expP = exp;
996
997 return i386_finalize_immediate (exp_seg, expP, intel_state.reloc_types,
998 operand_string);
999 }
1000
1001 return 1;
1002}
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