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800eeca4 | 1 | /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture. |
d6afba4b JJ |
2 | Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004 |
3 | Free Software Foundation, Inc. | |
800eeca4 JW |
4 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
5 | ||
6 | This file is part of GAS, the GNU Assembler. | |
7 | ||
8 | GAS is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GAS is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GAS; see the file COPYING. If not, write to | |
20 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
23 | /* | |
24 | TODO: | |
25 | ||
26 | - optional operands | |
27 | - directives: | |
800eeca4 JW |
28 | .eb |
29 | .estate | |
30 | .lb | |
31 | .popsection | |
32 | .previous | |
33 | .psr | |
34 | .pushsection | |
800eeca4 JW |
35 | - labels are wrong if automatic alignment is introduced |
36 | (e.g., checkout the second real10 definition in test-data.s) | |
37 | - DV-related stuff: | |
542d6675 KH |
38 | <reg>.safe_across_calls and any other DV-related directives I don't |
39 | have documentation for. | |
40 | verify mod-sched-brs reads/writes are checked/marked (and other | |
41 | notes) | |
800eeca4 JW |
42 | |
43 | */ | |
44 | ||
45 | #include "as.h" | |
3882b010 | 46 | #include "safe-ctype.h" |
800eeca4 JW |
47 | #include "dwarf2dbg.h" |
48 | #include "subsegs.h" | |
49 | ||
50 | #include "opcode/ia64.h" | |
51 | ||
52 | #include "elf/ia64.h" | |
53 | ||
54 | #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0]))) | |
55 | #define MIN(a,b) ((a) < (b) ? (a) : (b)) | |
56 | ||
57 | #define NUM_SLOTS 4 | |
58 | #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS] | |
59 | #define CURR_SLOT md.slot[md.curr_slot] | |
60 | ||
61 | #define O_pseudo_fixup (O_max + 1) | |
62 | ||
63 | enum special_section | |
64 | { | |
557debba | 65 | /* IA-64 ABI section pseudo-ops. */ |
800eeca4 JW |
66 | SPECIAL_SECTION_BSS = 0, |
67 | SPECIAL_SECTION_SBSS, | |
68 | SPECIAL_SECTION_SDATA, | |
69 | SPECIAL_SECTION_RODATA, | |
70 | SPECIAL_SECTION_COMMENT, | |
71 | SPECIAL_SECTION_UNWIND, | |
557debba JW |
72 | SPECIAL_SECTION_UNWIND_INFO, |
73 | /* HPUX specific section pseudo-ops. */ | |
74 | SPECIAL_SECTION_INIT_ARRAY, | |
75 | SPECIAL_SECTION_FINI_ARRAY, | |
800eeca4 JW |
76 | }; |
77 | ||
78 | enum reloc_func | |
79 | { | |
13ae64f3 JJ |
80 | FUNC_DTP_MODULE, |
81 | FUNC_DTP_RELATIVE, | |
800eeca4 JW |
82 | FUNC_FPTR_RELATIVE, |
83 | FUNC_GP_RELATIVE, | |
84 | FUNC_LT_RELATIVE, | |
fa2c7eff | 85 | FUNC_LT_RELATIVE_X, |
c67e42c9 | 86 | FUNC_PC_RELATIVE, |
800eeca4 JW |
87 | FUNC_PLT_RELATIVE, |
88 | FUNC_SEC_RELATIVE, | |
89 | FUNC_SEG_RELATIVE, | |
13ae64f3 | 90 | FUNC_TP_RELATIVE, |
800eeca4 JW |
91 | FUNC_LTV_RELATIVE, |
92 | FUNC_LT_FPTR_RELATIVE, | |
13ae64f3 JJ |
93 | FUNC_LT_DTP_MODULE, |
94 | FUNC_LT_DTP_RELATIVE, | |
95 | FUNC_LT_TP_RELATIVE, | |
3969b680 | 96 | FUNC_IPLT_RELOC, |
800eeca4 JW |
97 | }; |
98 | ||
99 | enum reg_symbol | |
100 | { | |
101 | REG_GR = 0, | |
102 | REG_FR = (REG_GR + 128), | |
103 | REG_AR = (REG_FR + 128), | |
104 | REG_CR = (REG_AR + 128), | |
105 | REG_P = (REG_CR + 128), | |
106 | REG_BR = (REG_P + 64), | |
107 | REG_IP = (REG_BR + 8), | |
108 | REG_CFM, | |
109 | REG_PR, | |
110 | REG_PR_ROT, | |
111 | REG_PSR, | |
112 | REG_PSR_L, | |
113 | REG_PSR_UM, | |
114 | /* The following are pseudo-registers for use by gas only. */ | |
115 | IND_CPUID, | |
116 | IND_DBR, | |
117 | IND_DTR, | |
118 | IND_ITR, | |
119 | IND_IBR, | |
120 | IND_MEM, | |
121 | IND_MSR, | |
122 | IND_PKR, | |
123 | IND_PMC, | |
124 | IND_PMD, | |
125 | IND_RR, | |
542d6675 | 126 | /* The following pseudo-registers are used for unwind directives only: */ |
e0c9811a JW |
127 | REG_PSP, |
128 | REG_PRIUNAT, | |
800eeca4 JW |
129 | REG_NUM |
130 | }; | |
131 | ||
132 | enum dynreg_type | |
133 | { | |
134 | DYNREG_GR = 0, /* dynamic general purpose register */ | |
135 | DYNREG_FR, /* dynamic floating point register */ | |
136 | DYNREG_PR, /* dynamic predicate register */ | |
137 | DYNREG_NUM_TYPES | |
138 | }; | |
139 | ||
87f8eb97 JW |
140 | enum operand_match_result |
141 | { | |
142 | OPERAND_MATCH, | |
143 | OPERAND_OUT_OF_RANGE, | |
144 | OPERAND_MISMATCH | |
145 | }; | |
146 | ||
800eeca4 JW |
147 | /* On the ia64, we can't know the address of a text label until the |
148 | instructions are packed into a bundle. To handle this, we keep | |
149 | track of the list of labels that appear in front of each | |
150 | instruction. */ | |
151 | struct label_fix | |
542d6675 KH |
152 | { |
153 | struct label_fix *next; | |
154 | struct symbol *sym; | |
155 | }; | |
800eeca4 | 156 | |
549f748d | 157 | /* This is the endianness of the current section. */ |
800eeca4 JW |
158 | extern int target_big_endian; |
159 | ||
549f748d JW |
160 | /* This is the default endianness. */ |
161 | static int default_big_endian = TARGET_BYTES_BIG_ENDIAN; | |
162 | ||
10a98291 L |
163 | void (*ia64_number_to_chars) PARAMS ((char *, valueT, int)); |
164 | ||
165 | static void ia64_float_to_chars_bigendian | |
166 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
167 | static void ia64_float_to_chars_littleendian | |
168 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
169 | static void (*ia64_float_to_chars) | |
170 | PARAMS ((char *, LITTLENUM_TYPE *, int)); | |
171 | ||
35f5df7f L |
172 | static struct hash_control *alias_hash; |
173 | static struct hash_control *alias_name_hash; | |
174 | static struct hash_control *secalias_hash; | |
175 | static struct hash_control *secalias_name_hash; | |
176 | ||
800eeca4 JW |
177 | /* Characters which always start a comment. */ |
178 | const char comment_chars[] = ""; | |
179 | ||
180 | /* Characters which start a comment at the beginning of a line. */ | |
181 | const char line_comment_chars[] = "#"; | |
182 | ||
183 | /* Characters which may be used to separate multiple commands on a | |
184 | single line. */ | |
185 | const char line_separator_chars[] = ";"; | |
186 | ||
187 | /* Characters which are used to indicate an exponent in a floating | |
188 | point number. */ | |
189 | const char EXP_CHARS[] = "eE"; | |
190 | ||
191 | /* Characters which mean that a number is a floating point constant, | |
192 | as in 0d1.0. */ | |
193 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
194 | ||
542d6675 | 195 | /* ia64-specific option processing: */ |
800eeca4 | 196 | |
44f5c83a | 197 | const char *md_shortopts = "m:N:x::"; |
800eeca4 JW |
198 | |
199 | struct option md_longopts[] = | |
200 | { | |
c43c2cc5 JW |
201 | #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1) |
202 | {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP}, | |
203 | #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2) | |
204 | {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC} | |
800eeca4 JW |
205 | }; |
206 | ||
207 | size_t md_longopts_size = sizeof (md_longopts); | |
208 | ||
209 | static struct | |
210 | { | |
211 | struct hash_control *pseudo_hash; /* pseudo opcode hash table */ | |
212 | struct hash_control *reg_hash; /* register name hash table */ | |
213 | struct hash_control *dynreg_hash; /* dynamic register hash table */ | |
214 | struct hash_control *const_hash; /* constant hash table */ | |
215 | struct hash_control *entry_hash; /* code entry hint hash table */ | |
216 | ||
217 | symbolS *regsym[REG_NUM]; | |
218 | ||
219 | /* If X_op is != O_absent, the registername for the instruction's | |
220 | qualifying predicate. If NULL, p0 is assumed for instructions | |
221 | that are predicatable. */ | |
222 | expressionS qp; | |
223 | ||
224 | unsigned int | |
197865e8 | 225 | manual_bundling : 1, |
800eeca4 JW |
226 | debug_dv: 1, |
227 | detect_dv: 1, | |
228 | explicit_mode : 1, /* which mode we're in */ | |
229 | default_explicit_mode : 1, /* which mode is the default */ | |
230 | mode_explicitly_set : 1, /* was the current mode explicitly set? */ | |
4d5a53ff JW |
231 | auto_align : 1, |
232 | keep_pending_output : 1; | |
800eeca4 JW |
233 | |
234 | /* Each bundle consists of up to three instructions. We keep | |
235 | track of four most recent instructions so we can correctly set | |
197865e8 | 236 | the end_of_insn_group for the last instruction in a bundle. */ |
800eeca4 JW |
237 | int curr_slot; |
238 | int num_slots_in_use; | |
239 | struct slot | |
240 | { | |
241 | unsigned int | |
242 | end_of_insn_group : 1, | |
243 | manual_bundling_on : 1, | |
244 | manual_bundling_off : 1; | |
245 | signed char user_template; /* user-selected template, if any */ | |
246 | unsigned char qp_regno; /* qualifying predicate */ | |
247 | /* This duplicates a good fraction of "struct fix" but we | |
248 | can't use a "struct fix" instead since we can't call | |
249 | fix_new_exp() until we know the address of the instruction. */ | |
250 | int num_fixups; | |
251 | struct insn_fix | |
252 | { | |
253 | bfd_reloc_code_real_type code; | |
254 | enum ia64_opnd opnd; /* type of operand in need of fix */ | |
255 | unsigned int is_pcrel : 1; /* is operand pc-relative? */ | |
256 | expressionS expr; /* the value to be inserted */ | |
257 | } | |
258 | fixup[2]; /* at most two fixups per insn */ | |
259 | struct ia64_opcode *idesc; | |
260 | struct label_fix *label_fixups; | |
f1bcba5b | 261 | struct label_fix *tag_fixups; |
800eeca4 JW |
262 | struct unw_rec_list *unwind_record; /* Unwind directive. */ |
263 | expressionS opnd[6]; | |
264 | char *src_file; | |
265 | unsigned int src_line; | |
266 | struct dwarf2_line_info debug_line; | |
267 | } | |
268 | slot[NUM_SLOTS]; | |
269 | ||
270 | segT last_text_seg; | |
271 | ||
272 | struct dynreg | |
273 | { | |
274 | struct dynreg *next; /* next dynamic register */ | |
275 | const char *name; | |
276 | unsigned short base; /* the base register number */ | |
277 | unsigned short num_regs; /* # of registers in this set */ | |
278 | } | |
279 | *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot; | |
280 | ||
281 | flagword flags; /* ELF-header flags */ | |
282 | ||
283 | struct mem_offset { | |
284 | unsigned hint:1; /* is this hint currently valid? */ | |
285 | bfd_vma offset; /* mem.offset offset */ | |
286 | bfd_vma base; /* mem.offset base */ | |
287 | } mem_offset; | |
288 | ||
289 | int path; /* number of alt. entry points seen */ | |
290 | const char **entry_labels; /* labels of all alternate paths in | |
542d6675 | 291 | the current DV-checking block. */ |
800eeca4 | 292 | int maxpaths; /* size currently allocated for |
542d6675 | 293 | entry_labels */ |
88be23ec BS |
294 | /* Support for hardware errata workarounds. */ |
295 | ||
296 | /* Record data about the last three insn groups. */ | |
297 | struct group | |
298 | { | |
299 | /* B-step workaround. | |
300 | For each predicate register, this is set if the corresponding insn | |
301 | group conditionally sets this register with one of the affected | |
302 | instructions. */ | |
303 | int p_reg_set[64]; | |
304 | /* B-step workaround. | |
305 | For each general register, this is set if the corresponding insn | |
306 | a) is conditional one one of the predicate registers for which | |
307 | P_REG_SET is 1 in the corresponding entry of the previous group, | |
308 | b) sets this general register with one of the affected | |
309 | instructions. */ | |
310 | int g_reg_set_conditionally[128]; | |
311 | } last_groups[3]; | |
312 | int group_idx; | |
557debba JW |
313 | |
314 | int pointer_size; /* size in bytes of a pointer */ | |
315 | int pointer_size_shift; /* shift size of a pointer for alignment */ | |
800eeca4 JW |
316 | } |
317 | md; | |
318 | ||
542d6675 | 319 | /* application registers: */ |
800eeca4 | 320 | |
e0c9811a JW |
321 | #define AR_K0 0 |
322 | #define AR_K7 7 | |
323 | #define AR_RSC 16 | |
324 | #define AR_BSP 17 | |
325 | #define AR_BSPSTORE 18 | |
326 | #define AR_RNAT 19 | |
327 | #define AR_UNAT 36 | |
328 | #define AR_FPSR 40 | |
329 | #define AR_ITC 44 | |
330 | #define AR_PFS 64 | |
331 | #define AR_LC 65 | |
800eeca4 JW |
332 | |
333 | static const struct | |
334 | { | |
335 | const char *name; | |
336 | int regnum; | |
337 | } | |
338 | ar[] = | |
339 | { | |
340 | {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3}, | |
341 | {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7}, | |
342 | {"ar.rsc", 16}, {"ar.bsp", 17}, | |
343 | {"ar.bspstore", 18}, {"ar.rnat", 19}, | |
344 | {"ar.fcr", 21}, {"ar.eflag", 24}, | |
345 | {"ar.csd", 25}, {"ar.ssd", 26}, | |
346 | {"ar.cflg", 27}, {"ar.fsr", 28}, | |
347 | {"ar.fir", 29}, {"ar.fdr", 30}, | |
348 | {"ar.ccv", 32}, {"ar.unat", 36}, | |
349 | {"ar.fpsr", 40}, {"ar.itc", 44}, | |
350 | {"ar.pfs", 64}, {"ar.lc", 65}, | |
197865e8 | 351 | {"ar.ec", 66}, |
800eeca4 JW |
352 | }; |
353 | ||
354 | #define CR_IPSR 16 | |
355 | #define CR_ISR 17 | |
356 | #define CR_IIP 19 | |
357 | #define CR_IFA 20 | |
358 | #define CR_ITIR 21 | |
359 | #define CR_IIPA 22 | |
360 | #define CR_IFS 23 | |
361 | #define CR_IIM 24 | |
362 | #define CR_IHA 25 | |
363 | #define CR_IVR 65 | |
364 | #define CR_TPR 66 | |
365 | #define CR_EOI 67 | |
366 | #define CR_IRR0 68 | |
367 | #define CR_IRR3 71 | |
368 | #define CR_LRR0 80 | |
369 | #define CR_LRR1 81 | |
370 | ||
542d6675 | 371 | /* control registers: */ |
800eeca4 JW |
372 | static const struct |
373 | { | |
374 | const char *name; | |
375 | int regnum; | |
376 | } | |
377 | cr[] = | |
378 | { | |
379 | {"cr.dcr", 0}, | |
380 | {"cr.itm", 1}, | |
381 | {"cr.iva", 2}, | |
382 | {"cr.pta", 8}, | |
383 | {"cr.gpta", 9}, | |
384 | {"cr.ipsr", 16}, | |
385 | {"cr.isr", 17}, | |
386 | {"cr.iip", 19}, | |
387 | {"cr.ifa", 20}, | |
388 | {"cr.itir", 21}, | |
389 | {"cr.iipa", 22}, | |
390 | {"cr.ifs", 23}, | |
391 | {"cr.iim", 24}, | |
392 | {"cr.iha", 25}, | |
393 | {"cr.lid", 64}, | |
394 | {"cr.ivr", 65}, | |
395 | {"cr.tpr", 66}, | |
396 | {"cr.eoi", 67}, | |
397 | {"cr.irr0", 68}, | |
398 | {"cr.irr1", 69}, | |
399 | {"cr.irr2", 70}, | |
400 | {"cr.irr3", 71}, | |
401 | {"cr.itv", 72}, | |
402 | {"cr.pmv", 73}, | |
403 | {"cr.cmcv", 74}, | |
404 | {"cr.lrr0", 80}, | |
405 | {"cr.lrr1", 81} | |
406 | }; | |
407 | ||
408 | #define PSR_MFL 4 | |
409 | #define PSR_IC 13 | |
410 | #define PSR_DFL 18 | |
411 | #define PSR_CPL 32 | |
412 | ||
413 | static const struct const_desc | |
414 | { | |
415 | const char *name; | |
416 | valueT value; | |
417 | } | |
418 | const_bits[] = | |
419 | { | |
542d6675 | 420 | /* PSR constant masks: */ |
800eeca4 JW |
421 | |
422 | /* 0: reserved */ | |
423 | {"psr.be", ((valueT) 1) << 1}, | |
424 | {"psr.up", ((valueT) 1) << 2}, | |
425 | {"psr.ac", ((valueT) 1) << 3}, | |
426 | {"psr.mfl", ((valueT) 1) << 4}, | |
427 | {"psr.mfh", ((valueT) 1) << 5}, | |
428 | /* 6-12: reserved */ | |
429 | {"psr.ic", ((valueT) 1) << 13}, | |
430 | {"psr.i", ((valueT) 1) << 14}, | |
431 | {"psr.pk", ((valueT) 1) << 15}, | |
432 | /* 16: reserved */ | |
433 | {"psr.dt", ((valueT) 1) << 17}, | |
434 | {"psr.dfl", ((valueT) 1) << 18}, | |
435 | {"psr.dfh", ((valueT) 1) << 19}, | |
436 | {"psr.sp", ((valueT) 1) << 20}, | |
437 | {"psr.pp", ((valueT) 1) << 21}, | |
438 | {"psr.di", ((valueT) 1) << 22}, | |
439 | {"psr.si", ((valueT) 1) << 23}, | |
440 | {"psr.db", ((valueT) 1) << 24}, | |
441 | {"psr.lp", ((valueT) 1) << 25}, | |
442 | {"psr.tb", ((valueT) 1) << 26}, | |
443 | {"psr.rt", ((valueT) 1) << 27}, | |
444 | /* 28-31: reserved */ | |
445 | /* 32-33: cpl (current privilege level) */ | |
446 | {"psr.is", ((valueT) 1) << 34}, | |
447 | {"psr.mc", ((valueT) 1) << 35}, | |
448 | {"psr.it", ((valueT) 1) << 36}, | |
449 | {"psr.id", ((valueT) 1) << 37}, | |
450 | {"psr.da", ((valueT) 1) << 38}, | |
451 | {"psr.dd", ((valueT) 1) << 39}, | |
452 | {"psr.ss", ((valueT) 1) << 40}, | |
453 | /* 41-42: ri (restart instruction) */ | |
454 | {"psr.ed", ((valueT) 1) << 43}, | |
455 | {"psr.bn", ((valueT) 1) << 44}, | |
456 | }; | |
457 | ||
542d6675 | 458 | /* indirect register-sets/memory: */ |
800eeca4 JW |
459 | |
460 | static const struct | |
461 | { | |
462 | const char *name; | |
463 | int regnum; | |
464 | } | |
465 | indirect_reg[] = | |
466 | { | |
467 | { "CPUID", IND_CPUID }, | |
468 | { "cpuid", IND_CPUID }, | |
469 | { "dbr", IND_DBR }, | |
470 | { "dtr", IND_DTR }, | |
471 | { "itr", IND_ITR }, | |
472 | { "ibr", IND_IBR }, | |
473 | { "msr", IND_MSR }, | |
474 | { "pkr", IND_PKR }, | |
475 | { "pmc", IND_PMC }, | |
476 | { "pmd", IND_PMD }, | |
477 | { "rr", IND_RR }, | |
478 | }; | |
479 | ||
480 | /* Pseudo functions used to indicate relocation types (these functions | |
481 | start with an at sign (@). */ | |
482 | static struct | |
483 | { | |
484 | const char *name; | |
485 | enum pseudo_type | |
486 | { | |
487 | PSEUDO_FUNC_NONE, | |
488 | PSEUDO_FUNC_RELOC, | |
489 | PSEUDO_FUNC_CONST, | |
e0c9811a | 490 | PSEUDO_FUNC_REG, |
800eeca4 JW |
491 | PSEUDO_FUNC_FLOAT |
492 | } | |
493 | type; | |
494 | union | |
495 | { | |
496 | unsigned long ival; | |
497 | symbolS *sym; | |
498 | } | |
499 | u; | |
500 | } | |
501 | pseudo_func[] = | |
502 | { | |
542d6675 | 503 | /* reloc pseudo functions (these must come first!): */ |
13ae64f3 JJ |
504 | { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } }, |
505 | { "dtprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
2434f565 JW |
506 | { "fptr", PSEUDO_FUNC_RELOC, { 0 } }, |
507 | { "gprel", PSEUDO_FUNC_RELOC, { 0 } }, | |
508 | { "ltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
fa2c7eff | 509 | { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
510 | { "pcrel", PSEUDO_FUNC_RELOC, { 0 } }, |
511 | { "pltoff", PSEUDO_FUNC_RELOC, { 0 } }, | |
512 | { "secrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
513 | { "segrel", PSEUDO_FUNC_RELOC, { 0 } }, | |
13ae64f3 | 514 | { "tprel", PSEUDO_FUNC_RELOC, { 0 } }, |
2434f565 JW |
515 | { "ltv", PSEUDO_FUNC_RELOC, { 0 } }, |
516 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */ | |
13ae64f3 JJ |
517 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */ |
518 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */ | |
519 | { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */ | |
3969b680 | 520 | { "iplt", PSEUDO_FUNC_RELOC, { 0 } }, |
800eeca4 | 521 | |
542d6675 | 522 | /* mbtype4 constants: */ |
800eeca4 JW |
523 | { "alt", PSEUDO_FUNC_CONST, { 0xa } }, |
524 | { "brcst", PSEUDO_FUNC_CONST, { 0x0 } }, | |
525 | { "mix", PSEUDO_FUNC_CONST, { 0x8 } }, | |
526 | { "rev", PSEUDO_FUNC_CONST, { 0xb } }, | |
527 | { "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, | |
528 | ||
542d6675 | 529 | /* fclass constants: */ |
bf3ca999 | 530 | { "nat", PSEUDO_FUNC_CONST, { 0x100 } }, |
800eeca4 JW |
531 | { "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, |
532 | { "snan", PSEUDO_FUNC_CONST, { 0x040 } }, | |
533 | { "pos", PSEUDO_FUNC_CONST, { 0x001 } }, | |
534 | { "neg", PSEUDO_FUNC_CONST, { 0x002 } }, | |
535 | { "zero", PSEUDO_FUNC_CONST, { 0x004 } }, | |
536 | { "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, | |
537 | { "norm", PSEUDO_FUNC_CONST, { 0x010 } }, | |
538 | { "inf", PSEUDO_FUNC_CONST, { 0x020 } }, | |
bf3ca999 TW |
539 | |
540 | { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */ | |
e0c9811a | 541 | |
c10d9d8f JW |
542 | /* hint constants: */ |
543 | { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, | |
544 | ||
542d6675 | 545 | /* unwind-related constants: */ |
041340ad JW |
546 | { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, |
547 | { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } }, | |
548 | { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */ | |
549 | { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } }, | |
550 | { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } }, | |
551 | { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } }, | |
552 | { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } }, | |
e0c9811a | 553 | |
542d6675 | 554 | /* unwind-related registers: */ |
e0c9811a | 555 | { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } } |
800eeca4 JW |
556 | }; |
557 | ||
542d6675 | 558 | /* 41-bit nop opcodes (one per unit): */ |
800eeca4 JW |
559 | static const bfd_vma nop[IA64_NUM_UNITS] = |
560 | { | |
561 | 0x0000000000LL, /* NIL => break 0 */ | |
562 | 0x0008000000LL, /* I-unit nop */ | |
563 | 0x0008000000LL, /* M-unit nop */ | |
564 | 0x4000000000LL, /* B-unit nop */ | |
565 | 0x0008000000LL, /* F-unit nop */ | |
566 | 0x0008000000LL, /* L-"unit" nop */ | |
567 | 0x0008000000LL, /* X-unit nop */ | |
568 | }; | |
569 | ||
570 | /* Can't be `const' as it's passed to input routines (which have the | |
571 | habit of setting temporary sentinels. */ | |
572 | static char special_section_name[][20] = | |
573 | { | |
574 | {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"}, | |
557debba JW |
575 | {".IA_64.unwind"}, {".IA_64.unwind_info"}, |
576 | {".init_array"}, {".fini_array"} | |
800eeca4 JW |
577 | }; |
578 | ||
579 | /* The best template for a particular sequence of up to three | |
580 | instructions: */ | |
581 | #define N IA64_NUM_TYPES | |
582 | static unsigned char best_template[N][N][N]; | |
583 | #undef N | |
584 | ||
585 | /* Resource dependencies currently in effect */ | |
586 | static struct rsrc { | |
587 | int depind; /* dependency index */ | |
588 | const struct ia64_dependency *dependency; /* actual dependency */ | |
589 | unsigned specific:1, /* is this a specific bit/regno? */ | |
590 | link_to_qp_branch:1; /* will a branch on the same QP clear it?*/ | |
591 | int index; /* specific regno/bit within dependency */ | |
592 | int note; /* optional qualifying note (0 if none) */ | |
593 | #define STATE_NONE 0 | |
594 | #define STATE_STOP 1 | |
595 | #define STATE_SRLZ 2 | |
596 | int insn_srlz; /* current insn serialization state */ | |
597 | int data_srlz; /* current data serialization state */ | |
598 | int qp_regno; /* qualifying predicate for this usage */ | |
599 | char *file; /* what file marked this dependency */ | |
2434f565 | 600 | unsigned int line; /* what line marked this dependency */ |
800eeca4 | 601 | struct mem_offset mem_offset; /* optional memory offset hint */ |
7484b8e6 | 602 | enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */ |
800eeca4 JW |
603 | int path; /* corresponding code entry index */ |
604 | } *regdeps = NULL; | |
605 | static int regdepslen = 0; | |
606 | static int regdepstotlen = 0; | |
607 | static const char *dv_mode[] = { "RAW", "WAW", "WAR" }; | |
608 | static const char *dv_sem[] = { "none", "implied", "impliedf", | |
139368c9 | 609 | "data", "instr", "specific", "stop", "other" }; |
7484b8e6 | 610 | static const char *dv_cmp_type[] = { "none", "OR", "AND" }; |
800eeca4 JW |
611 | |
612 | /* Current state of PR mutexation */ | |
613 | static struct qpmutex { | |
614 | valueT prmask; | |
615 | int path; | |
616 | } *qp_mutexes = NULL; /* QP mutex bitmasks */ | |
617 | static int qp_mutexeslen = 0; | |
618 | static int qp_mutexestotlen = 0; | |
197865e8 | 619 | static valueT qp_safe_across_calls = 0; |
800eeca4 JW |
620 | |
621 | /* Current state of PR implications */ | |
622 | static struct qp_imply { | |
623 | unsigned p1:6; | |
624 | unsigned p2:6; | |
625 | unsigned p2_branched:1; | |
626 | int path; | |
627 | } *qp_implies = NULL; | |
628 | static int qp_implieslen = 0; | |
629 | static int qp_impliestotlen = 0; | |
630 | ||
197865e8 KH |
631 | /* Keep track of static GR values so that indirect register usage can |
632 | sometimes be tracked. */ | |
800eeca4 JW |
633 | static struct gr { |
634 | unsigned known:1; | |
635 | int path; | |
636 | valueT value; | |
2434f565 | 637 | } gr_values[128] = {{ 1, 0, 0 }}; |
800eeca4 | 638 | |
9545c4ce L |
639 | /* Remember the alignment frag. */ |
640 | static fragS *align_frag; | |
641 | ||
800eeca4 JW |
642 | /* These are the routines required to output the various types of |
643 | unwind records. */ | |
644 | ||
f5a30c2e JW |
645 | /* A slot_number is a frag address plus the slot index (0-2). We use the |
646 | frag address here so that if there is a section switch in the middle of | |
647 | a function, then instructions emitted to a different section are not | |
648 | counted. Since there may be more than one frag for a function, this | |
649 | means we also need to keep track of which frag this address belongs to | |
650 | so we can compute inter-frag distances. This also nicely solves the | |
651 | problem with nops emitted for align directives, which can't easily be | |
652 | counted, but can easily be derived from frag sizes. */ | |
653 | ||
800eeca4 JW |
654 | typedef struct unw_rec_list { |
655 | unwind_record r; | |
e0c9811a | 656 | unsigned long slot_number; |
f5a30c2e | 657 | fragS *slot_frag; |
73f20958 L |
658 | unsigned long next_slot_number; |
659 | fragS *next_slot_frag; | |
800eeca4 JW |
660 | struct unw_rec_list *next; |
661 | } unw_rec_list; | |
662 | ||
2434f565 | 663 | #define SLOT_NUM_NOT_SET (unsigned)-1 |
800eeca4 | 664 | |
6290819d NC |
665 | /* Linked list of saved prologue counts. A very poor |
666 | implementation of a map from label numbers to prologue counts. */ | |
667 | typedef struct label_prologue_count | |
668 | { | |
669 | struct label_prologue_count *next; | |
670 | unsigned long label_number; | |
671 | unsigned int prologue_count; | |
672 | } label_prologue_count; | |
673 | ||
e0c9811a JW |
674 | static struct |
675 | { | |
e0c9811a JW |
676 | /* Maintain a list of unwind entries for the current function. */ |
677 | unw_rec_list *list; | |
678 | unw_rec_list *tail; | |
800eeca4 | 679 | |
e0c9811a JW |
680 | /* Any unwind entires that should be attached to the current slot |
681 | that an insn is being constructed for. */ | |
682 | unw_rec_list *current_entry; | |
800eeca4 | 683 | |
e0c9811a JW |
684 | /* These are used to create the unwind table entry for this function. */ |
685 | symbolS *proc_start; | |
686 | symbolS *proc_end; | |
687 | symbolS *info; /* pointer to unwind info */ | |
688 | symbolS *personality_routine; | |
91a2ae2a RH |
689 | segT saved_text_seg; |
690 | subsegT saved_text_subseg; | |
691 | unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */ | |
800eeca4 | 692 | |
e0c9811a JW |
693 | /* TRUE if processing unwind directives in a prologue region. */ |
694 | int prologue; | |
30d25259 | 695 | int prologue_mask; |
33d01f33 | 696 | unsigned int prologue_count; /* number of .prologues seen so far */ |
6290819d NC |
697 | /* Prologue counts at previous .label_state directives. */ |
698 | struct label_prologue_count * saved_prologue_counts; | |
e0c9811a | 699 | } unwind; |
800eeca4 | 700 | |
9f9a069e JW |
701 | /* The input value is a negated offset from psp, and specifies an address |
702 | psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we | |
703 | must add 16 and divide by 4 to get the encoded value. */ | |
704 | ||
705 | #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4) | |
706 | ||
800eeca4 JW |
707 | typedef void (*vbyte_func) PARAMS ((int, char *, char *)); |
708 | ||
0234cb7c | 709 | /* Forward declarations: */ |
800eeca4 JW |
710 | static void set_section PARAMS ((char *name)); |
711 | static unsigned int set_regstack PARAMS ((unsigned int, unsigned int, | |
712 | unsigned int, unsigned int)); | |
d9201763 | 713 | static void dot_align (int); |
800eeca4 JW |
714 | static void dot_radix PARAMS ((int)); |
715 | static void dot_special_section PARAMS ((int)); | |
716 | static void dot_proc PARAMS ((int)); | |
717 | static void dot_fframe PARAMS ((int)); | |
718 | static void dot_vframe PARAMS ((int)); | |
150f24a2 JW |
719 | static void dot_vframesp PARAMS ((int)); |
720 | static void dot_vframepsp PARAMS ((int)); | |
800eeca4 JW |
721 | static void dot_save PARAMS ((int)); |
722 | static void dot_restore PARAMS ((int)); | |
150f24a2 JW |
723 | static void dot_restorereg PARAMS ((int)); |
724 | static void dot_restorereg_p PARAMS ((int)); | |
800eeca4 JW |
725 | static void dot_handlerdata PARAMS ((int)); |
726 | static void dot_unwentry PARAMS ((int)); | |
727 | static void dot_altrp PARAMS ((int)); | |
e0c9811a | 728 | static void dot_savemem PARAMS ((int)); |
800eeca4 JW |
729 | static void dot_saveg PARAMS ((int)); |
730 | static void dot_savef PARAMS ((int)); | |
731 | static void dot_saveb PARAMS ((int)); | |
732 | static void dot_savegf PARAMS ((int)); | |
733 | static void dot_spill PARAMS ((int)); | |
150f24a2 JW |
734 | static void dot_spillreg PARAMS ((int)); |
735 | static void dot_spillmem PARAMS ((int)); | |
736 | static void dot_spillreg_p PARAMS ((int)); | |
737 | static void dot_spillmem_p PARAMS ((int)); | |
738 | static void dot_label_state PARAMS ((int)); | |
739 | static void dot_copy_state PARAMS ((int)); | |
800eeca4 JW |
740 | static void dot_unwabi PARAMS ((int)); |
741 | static void dot_personality PARAMS ((int)); | |
742 | static void dot_body PARAMS ((int)); | |
743 | static void dot_prologue PARAMS ((int)); | |
744 | static void dot_endp PARAMS ((int)); | |
745 | static void dot_template PARAMS ((int)); | |
746 | static void dot_regstk PARAMS ((int)); | |
747 | static void dot_rot PARAMS ((int)); | |
748 | static void dot_byteorder PARAMS ((int)); | |
749 | static void dot_psr PARAMS ((int)); | |
750 | static void dot_alias PARAMS ((int)); | |
751 | static void dot_ln PARAMS ((int)); | |
752 | static char *parse_section_name PARAMS ((void)); | |
753 | static void dot_xdata PARAMS ((int)); | |
754 | static void stmt_float_cons PARAMS ((int)); | |
755 | static void stmt_cons_ua PARAMS ((int)); | |
756 | static void dot_xfloat_cons PARAMS ((int)); | |
757 | static void dot_xstringer PARAMS ((int)); | |
758 | static void dot_xdata_ua PARAMS ((int)); | |
759 | static void dot_xfloat_cons_ua PARAMS ((int)); | |
150f24a2 | 760 | static void print_prmask PARAMS ((valueT mask)); |
800eeca4 JW |
761 | static void dot_pred_rel PARAMS ((int)); |
762 | static void dot_reg_val PARAMS ((int)); | |
5e819f9c | 763 | static void dot_serialize PARAMS ((int)); |
800eeca4 JW |
764 | static void dot_dv_mode PARAMS ((int)); |
765 | static void dot_entry PARAMS ((int)); | |
766 | static void dot_mem_offset PARAMS ((int)); | |
e0c9811a | 767 | static void add_unwind_entry PARAMS((unw_rec_list *ptr)); |
542d6675 | 768 | static symbolS *declare_register PARAMS ((const char *name, int regnum)); |
800eeca4 JW |
769 | static void declare_register_set PARAMS ((const char *, int, int)); |
770 | static unsigned int operand_width PARAMS ((enum ia64_opnd)); | |
87f8eb97 JW |
771 | static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc, |
772 | int index, | |
773 | expressionS *e)); | |
800eeca4 JW |
774 | static int parse_operand PARAMS ((expressionS *e)); |
775 | static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *)); | |
86cf98f3 | 776 | static int errata_nop_necessary_p PARAMS ((struct slot *, enum ia64_unit)); |
800eeca4 JW |
777 | static void build_insn PARAMS ((struct slot *, bfd_vma *)); |
778 | static void emit_one_bundle PARAMS ((void)); | |
779 | static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT)); | |
197865e8 | 780 | static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym, |
800eeca4 JW |
781 | bfd_reloc_code_real_type r_type)); |
782 | static void insn_group_break PARAMS ((int, int, int)); | |
150f24a2 JW |
783 | static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *, |
784 | struct rsrc *, int depind, int path)); | |
800eeca4 JW |
785 | static void add_qp_mutex PARAMS((valueT mask)); |
786 | static void add_qp_imply PARAMS((int p1, int p2)); | |
787 | static void clear_qp_branch_flag PARAMS((valueT mask)); | |
788 | static void clear_qp_mutex PARAMS((valueT mask)); | |
789 | static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask)); | |
cb5301b6 | 790 | static int has_suffix_p PARAMS((const char *, const char *)); |
800eeca4 JW |
791 | static void clear_register_values PARAMS ((void)); |
792 | static void print_dependency PARAMS ((const char *action, int depind)); | |
150f24a2 JW |
793 | static void instruction_serialization PARAMS ((void)); |
794 | static void data_serialization PARAMS ((void)); | |
795 | static void remove_marked_resource PARAMS ((struct rsrc *)); | |
800eeca4 | 796 | static int is_conditional_branch PARAMS ((struct ia64_opcode *)); |
150f24a2 | 797 | static int is_taken_branch PARAMS ((struct ia64_opcode *)); |
800eeca4 | 798 | static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *)); |
150f24a2 JW |
799 | static int depends_on PARAMS ((int, struct ia64_opcode *)); |
800 | static int specify_resource PARAMS ((const struct ia64_dependency *, | |
801 | struct ia64_opcode *, int, struct rsrc [], int, int)); | |
800eeca4 JW |
802 | static int check_dv PARAMS((struct ia64_opcode *idesc)); |
803 | static void check_dependencies PARAMS((struct ia64_opcode *)); | |
804 | static void mark_resources PARAMS((struct ia64_opcode *)); | |
805 | static void update_dependencies PARAMS((struct ia64_opcode *)); | |
806 | static void note_register_values PARAMS((struct ia64_opcode *)); | |
150f24a2 JW |
807 | static int qp_mutex PARAMS ((int, int, int)); |
808 | static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int)); | |
809 | static void output_vbyte_mem PARAMS ((int, char *, char *)); | |
810 | static void count_output PARAMS ((int, char *, char *)); | |
811 | static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int)); | |
812 | static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long)); | |
800eeca4 | 813 | static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); |
150f24a2 JW |
814 | static void output_P1_format PARAMS ((vbyte_func, int)); |
815 | static void output_P2_format PARAMS ((vbyte_func, int, int)); | |
816 | static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int)); | |
817 | static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long)); | |
818 | static void output_P5_format PARAMS ((vbyte_func, int, unsigned long)); | |
819 | static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int)); | |
820 | static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long)); | |
821 | static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
822 | static void output_P9_format PARAMS ((vbyte_func, int, int)); | |
823 | static void output_P10_format PARAMS ((vbyte_func, int, int)); | |
824 | static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
825 | static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long)); | |
800eeca4 JW |
826 | static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long)); |
827 | static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); | |
150f24a2 JW |
828 | static char format_ab_reg PARAMS ((int, int)); |
829 | static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long, | |
830 | unsigned long)); | |
831 | static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long)); | |
832 | static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long, | |
833 | unsigned long)); | |
834 | static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long)); | |
5738bc24 | 835 | static unw_rec_list *output_endp PARAMS ((void)); |
150f24a2 JW |
836 | static unw_rec_list *output_prologue PARAMS ((void)); |
837 | static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int)); | |
838 | static unw_rec_list *output_body PARAMS ((void)); | |
839 | static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int)); | |
840 | static unw_rec_list *output_mem_stack_v PARAMS ((void)); | |
841 | static unw_rec_list *output_psp_gr PARAMS ((unsigned int)); | |
842 | static unw_rec_list *output_psp_sprel PARAMS ((unsigned int)); | |
843 | static unw_rec_list *output_rp_when PARAMS ((void)); | |
844 | static unw_rec_list *output_rp_gr PARAMS ((unsigned int)); | |
845 | static unw_rec_list *output_rp_br PARAMS ((unsigned int)); | |
846 | static unw_rec_list *output_rp_psprel PARAMS ((unsigned int)); | |
847 | static unw_rec_list *output_rp_sprel PARAMS ((unsigned int)); | |
848 | static unw_rec_list *output_pfs_when PARAMS ((void)); | |
849 | static unw_rec_list *output_pfs_gr PARAMS ((unsigned int)); | |
850 | static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int)); | |
851 | static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int)); | |
852 | static unw_rec_list *output_preds_when PARAMS ((void)); | |
853 | static unw_rec_list *output_preds_gr PARAMS ((unsigned int)); | |
854 | static unw_rec_list *output_preds_psprel PARAMS ((unsigned int)); | |
855 | static unw_rec_list *output_preds_sprel PARAMS ((unsigned int)); | |
856 | static unw_rec_list *output_fr_mem PARAMS ((unsigned int)); | |
857 | static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int)); | |
858 | static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int)); | |
859 | static unw_rec_list *output_gr_mem PARAMS ((unsigned int)); | |
860 | static unw_rec_list *output_br_mem PARAMS ((unsigned int)); | |
861 | static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int)); | |
862 | static unw_rec_list *output_spill_base PARAMS ((unsigned int)); | |
863 | static unw_rec_list *output_unat_when PARAMS ((void)); | |
864 | static unw_rec_list *output_unat_gr PARAMS ((unsigned int)); | |
865 | static unw_rec_list *output_unat_psprel PARAMS ((unsigned int)); | |
866 | static unw_rec_list *output_unat_sprel PARAMS ((unsigned int)); | |
867 | static unw_rec_list *output_lc_when PARAMS ((void)); | |
868 | static unw_rec_list *output_lc_gr PARAMS ((unsigned int)); | |
869 | static unw_rec_list *output_lc_psprel PARAMS ((unsigned int)); | |
870 | static unw_rec_list *output_lc_sprel PARAMS ((unsigned int)); | |
871 | static unw_rec_list *output_fpsr_when PARAMS ((void)); | |
872 | static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int)); | |
873 | static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int)); | |
874 | static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int)); | |
875 | static unw_rec_list *output_priunat_when_gr PARAMS ((void)); | |
876 | static unw_rec_list *output_priunat_when_mem PARAMS ((void)); | |
877 | static unw_rec_list *output_priunat_gr PARAMS ((unsigned int)); | |
878 | static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int)); | |
879 | static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int)); | |
880 | static unw_rec_list *output_bsp_when PARAMS ((void)); | |
881 | static unw_rec_list *output_bsp_gr PARAMS ((unsigned int)); | |
882 | static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int)); | |
883 | static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int)); | |
884 | static unw_rec_list *output_bspstore_when PARAMS ((void)); | |
885 | static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int)); | |
886 | static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int)); | |
887 | static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int)); | |
888 | static unw_rec_list *output_rnat_when PARAMS ((void)); | |
889 | static unw_rec_list *output_rnat_gr PARAMS ((unsigned int)); | |
890 | static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int)); | |
891 | static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int)); | |
892 | static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long)); | |
893 | static unw_rec_list *output_epilogue PARAMS ((unsigned long)); | |
894 | static unw_rec_list *output_label_state PARAMS ((unsigned long)); | |
895 | static unw_rec_list *output_copy_state PARAMS ((unsigned long)); | |
896 | static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
897 | static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int)); | |
898 | static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
899 | unsigned int)); | |
900 | static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
901 | unsigned int)); | |
902 | static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int, | |
903 | unsigned int)); | |
904 | static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int, | |
905 | unsigned int, unsigned int)); | |
906 | static void process_one_record PARAMS ((unw_rec_list *, vbyte_func)); | |
907 | static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func)); | |
908 | static int calc_record_size PARAMS ((unw_rec_list *)); | |
909 | static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int)); | |
f5a30c2e | 910 | static unsigned long slot_index PARAMS ((unsigned long, fragS *, |
b5e0fabd JW |
911 | unsigned long, fragS *, |
912 | int)); | |
91a2ae2a | 913 | static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *)); |
b5e0fabd | 914 | static void fixup_unw_records PARAMS ((unw_rec_list *, int)); |
150f24a2 JW |
915 | static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); |
916 | static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); | |
6290819d NC |
917 | static unsigned int get_saved_prologue_count PARAMS ((unsigned long)); |
918 | static void save_prologue_count PARAMS ((unsigned long, unsigned int)); | |
919 | static void free_saved_prologue_counts PARAMS ((void)); | |
91a2ae2a | 920 | |
652ca075 | 921 | /* Determine if application register REGNUM resides only in the integer |
800eeca4 JW |
922 | unit (as opposed to the memory unit). */ |
923 | static int | |
652ca075 | 924 | ar_is_only_in_integer_unit (int reg) |
800eeca4 JW |
925 | { |
926 | reg -= REG_AR; | |
652ca075 L |
927 | return reg >= 64 && reg <= 111; |
928 | } | |
800eeca4 | 929 | |
652ca075 L |
930 | /* Determine if application register REGNUM resides only in the memory |
931 | unit (as opposed to the integer unit). */ | |
932 | static int | |
933 | ar_is_only_in_memory_unit (int reg) | |
934 | { | |
935 | reg -= REG_AR; | |
936 | return reg >= 0 && reg <= 47; | |
800eeca4 JW |
937 | } |
938 | ||
939 | /* Switch to section NAME and create section if necessary. It's | |
940 | rather ugly that we have to manipulate input_line_pointer but I | |
941 | don't see any other way to accomplish the same thing without | |
942 | changing obj-elf.c (which may be the Right Thing, in the end). */ | |
943 | static void | |
944 | set_section (name) | |
945 | char *name; | |
946 | { | |
947 | char *saved_input_line_pointer; | |
948 | ||
949 | saved_input_line_pointer = input_line_pointer; | |
950 | input_line_pointer = name; | |
951 | obj_elf_section (0); | |
952 | input_line_pointer = saved_input_line_pointer; | |
953 | } | |
954 | ||
d61a78a7 RH |
955 | /* Map 's' to SHF_IA_64_SHORT. */ |
956 | ||
957 | int | |
958 | ia64_elf_section_letter (letter, ptr_msg) | |
959 | int letter; | |
960 | char **ptr_msg; | |
961 | { | |
962 | if (letter == 's') | |
963 | return SHF_IA_64_SHORT; | |
711ef82f L |
964 | else if (letter == 'o') |
965 | return SHF_LINK_ORDER; | |
d61a78a7 | 966 | |
711ef82f L |
967 | *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string"); |
968 | return -1; | |
d61a78a7 RH |
969 | } |
970 | ||
800eeca4 JW |
971 | /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */ |
972 | ||
973 | flagword | |
974 | ia64_elf_section_flags (flags, attr, type) | |
975 | flagword flags; | |
2434f565 | 976 | int attr, type ATTRIBUTE_UNUSED; |
800eeca4 JW |
977 | { |
978 | if (attr & SHF_IA_64_SHORT) | |
979 | flags |= SEC_SMALL_DATA; | |
980 | return flags; | |
981 | } | |
982 | ||
91a2ae2a RH |
983 | int |
984 | ia64_elf_section_type (str, len) | |
40449e9f KH |
985 | const char *str; |
986 | size_t len; | |
91a2ae2a | 987 | { |
1cd8ff38 | 988 | #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0)) |
40449e9f | 989 | |
1cd8ff38 | 990 | if (STREQ (ELF_STRING_ia64_unwind_info)) |
91a2ae2a RH |
991 | return SHT_PROGBITS; |
992 | ||
1cd8ff38 | 993 | if (STREQ (ELF_STRING_ia64_unwind_info_once)) |
579f31ac JJ |
994 | return SHT_PROGBITS; |
995 | ||
1cd8ff38 | 996 | if (STREQ (ELF_STRING_ia64_unwind)) |
91a2ae2a RH |
997 | return SHT_IA_64_UNWIND; |
998 | ||
1cd8ff38 | 999 | if (STREQ (ELF_STRING_ia64_unwind_once)) |
579f31ac JJ |
1000 | return SHT_IA_64_UNWIND; |
1001 | ||
711ef82f L |
1002 | if (STREQ ("unwind")) |
1003 | return SHT_IA_64_UNWIND; | |
1004 | ||
91a2ae2a | 1005 | return -1; |
1cd8ff38 | 1006 | #undef STREQ |
91a2ae2a RH |
1007 | } |
1008 | ||
800eeca4 JW |
1009 | static unsigned int |
1010 | set_regstack (ins, locs, outs, rots) | |
1011 | unsigned int ins, locs, outs, rots; | |
1012 | { | |
542d6675 KH |
1013 | /* Size of frame. */ |
1014 | unsigned int sof; | |
800eeca4 JW |
1015 | |
1016 | sof = ins + locs + outs; | |
1017 | if (sof > 96) | |
1018 | { | |
1019 | as_bad ("Size of frame exceeds maximum of 96 registers"); | |
1020 | return 0; | |
1021 | } | |
1022 | if (rots > sof) | |
1023 | { | |
1024 | as_warn ("Size of rotating registers exceeds frame size"); | |
1025 | return 0; | |
1026 | } | |
1027 | md.in.base = REG_GR + 32; | |
1028 | md.loc.base = md.in.base + ins; | |
1029 | md.out.base = md.loc.base + locs; | |
1030 | ||
1031 | md.in.num_regs = ins; | |
1032 | md.loc.num_regs = locs; | |
1033 | md.out.num_regs = outs; | |
1034 | md.rot.num_regs = rots; | |
1035 | return sof; | |
1036 | } | |
1037 | ||
1038 | void | |
1039 | ia64_flush_insns () | |
1040 | { | |
1041 | struct label_fix *lfix; | |
1042 | segT saved_seg; | |
1043 | subsegT saved_subseg; | |
b44b1b85 | 1044 | unw_rec_list *ptr; |
800eeca4 JW |
1045 | |
1046 | if (!md.last_text_seg) | |
1047 | return; | |
1048 | ||
1049 | saved_seg = now_seg; | |
1050 | saved_subseg = now_subseg; | |
1051 | ||
1052 | subseg_set (md.last_text_seg, 0); | |
1053 | ||
1054 | while (md.num_slots_in_use > 0) | |
1055 | emit_one_bundle (); /* force out queued instructions */ | |
1056 | ||
1057 | /* In case there are labels following the last instruction, resolve | |
542d6675 | 1058 | those now: */ |
800eeca4 JW |
1059 | for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next) |
1060 | { | |
1061 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1062 | symbol_set_frag (lfix->sym, frag_now); | |
1063 | } | |
1064 | CURR_SLOT.label_fixups = 0; | |
f1bcba5b JW |
1065 | for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next) |
1066 | { | |
1067 | S_SET_VALUE (lfix->sym, frag_now_fix ()); | |
1068 | symbol_set_frag (lfix->sym, frag_now); | |
1069 | } | |
1070 | CURR_SLOT.tag_fixups = 0; | |
800eeca4 | 1071 | |
b44b1b85 | 1072 | /* In case there are unwind directives following the last instruction, |
5738bc24 JW |
1073 | resolve those now. We only handle prologue, body, and endp directives |
1074 | here. Give an error for others. */ | |
b44b1b85 JW |
1075 | for (ptr = unwind.current_entry; ptr; ptr = ptr->next) |
1076 | { | |
9c59842f | 1077 | switch (ptr->r.type) |
b44b1b85 | 1078 | { |
9c59842f JW |
1079 | case prologue: |
1080 | case prologue_gr: | |
1081 | case body: | |
1082 | case endp: | |
b44b1b85 JW |
1083 | ptr->slot_number = (unsigned long) frag_more (0); |
1084 | ptr->slot_frag = frag_now; | |
9c59842f JW |
1085 | break; |
1086 | ||
1087 | /* Allow any record which doesn't have a "t" field (i.e., | |
1088 | doesn't relate to a particular instruction). */ | |
1089 | case unwabi: | |
1090 | case br_gr: | |
1091 | case copy_state: | |
1092 | case fr_mem: | |
1093 | case frgr_mem: | |
1094 | case gr_gr: | |
1095 | case gr_mem: | |
1096 | case label_state: | |
1097 | case rp_br: | |
1098 | case spill_base: | |
1099 | case spill_mask: | |
1100 | /* nothing */ | |
1101 | break; | |
1102 | ||
1103 | default: | |
1104 | as_bad (_("Unwind directive not followed by an instruction.")); | |
1105 | break; | |
b44b1b85 | 1106 | } |
b44b1b85 JW |
1107 | } |
1108 | unwind.current_entry = NULL; | |
1109 | ||
800eeca4 | 1110 | subseg_set (saved_seg, saved_subseg); |
f1bcba5b JW |
1111 | |
1112 | if (md.qp.X_op == O_register) | |
1113 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
1114 | } |
1115 | ||
d9201763 L |
1116 | static void |
1117 | ia64_do_align (int nbytes) | |
800eeca4 JW |
1118 | { |
1119 | char *saved_input_line_pointer = input_line_pointer; | |
1120 | ||
1121 | input_line_pointer = ""; | |
1122 | s_align_bytes (nbytes); | |
1123 | input_line_pointer = saved_input_line_pointer; | |
1124 | } | |
1125 | ||
1126 | void | |
1127 | ia64_cons_align (nbytes) | |
1128 | int nbytes; | |
1129 | { | |
1130 | if (md.auto_align) | |
1131 | { | |
1132 | char *saved_input_line_pointer = input_line_pointer; | |
1133 | input_line_pointer = ""; | |
1134 | s_align_bytes (nbytes); | |
1135 | input_line_pointer = saved_input_line_pointer; | |
1136 | } | |
1137 | } | |
1138 | ||
1139 | /* Output COUNT bytes to a memory location. */ | |
1140 | static unsigned char *vbyte_mem_ptr = NULL; | |
1141 | ||
197865e8 | 1142 | void |
800eeca4 JW |
1143 | output_vbyte_mem (count, ptr, comment) |
1144 | int count; | |
1145 | char *ptr; | |
2434f565 | 1146 | char *comment ATTRIBUTE_UNUSED; |
800eeca4 JW |
1147 | { |
1148 | int x; | |
1149 | if (vbyte_mem_ptr == NULL) | |
1150 | abort (); | |
1151 | ||
1152 | if (count == 0) | |
1153 | return; | |
1154 | for (x = 0; x < count; x++) | |
1155 | *(vbyte_mem_ptr++) = ptr[x]; | |
1156 | } | |
1157 | ||
1158 | /* Count the number of bytes required for records. */ | |
1159 | static int vbyte_count = 0; | |
197865e8 | 1160 | void |
800eeca4 JW |
1161 | count_output (count, ptr, comment) |
1162 | int count; | |
2434f565 JW |
1163 | char *ptr ATTRIBUTE_UNUSED; |
1164 | char *comment ATTRIBUTE_UNUSED; | |
800eeca4 JW |
1165 | { |
1166 | vbyte_count += count; | |
1167 | } | |
1168 | ||
1169 | static void | |
1170 | output_R1_format (f, rtype, rlen) | |
1171 | vbyte_func f; | |
1172 | unw_record_type rtype; | |
1173 | int rlen; | |
1174 | { | |
e0c9811a | 1175 | int r = 0; |
800eeca4 JW |
1176 | char byte; |
1177 | if (rlen > 0x1f) | |
1178 | { | |
1179 | output_R3_format (f, rtype, rlen); | |
1180 | return; | |
1181 | } | |
197865e8 | 1182 | |
e0c9811a JW |
1183 | if (rtype == body) |
1184 | r = 1; | |
1185 | else if (rtype != prologue) | |
1186 | as_bad ("record type is not valid"); | |
1187 | ||
800eeca4 JW |
1188 | byte = UNW_R1 | (r << 5) | (rlen & 0x1f); |
1189 | (*f) (1, &byte, NULL); | |
1190 | } | |
1191 | ||
1192 | static void | |
1193 | output_R2_format (f, mask, grsave, rlen) | |
1194 | vbyte_func f; | |
1195 | int mask, grsave; | |
1196 | unsigned long rlen; | |
1197 | { | |
1198 | char bytes[20]; | |
1199 | int count = 2; | |
1200 | mask = (mask & 0x0f); | |
1201 | grsave = (grsave & 0x7f); | |
1202 | ||
1203 | bytes[0] = (UNW_R2 | (mask >> 1)); | |
1204 | bytes[1] = (((mask & 0x01) << 7) | grsave); | |
1205 | count += output_leb128 (bytes + 2, rlen, 0); | |
1206 | (*f) (count, bytes, NULL); | |
1207 | } | |
1208 | ||
1209 | static void | |
1210 | output_R3_format (f, rtype, rlen) | |
1211 | vbyte_func f; | |
1212 | unw_record_type rtype; | |
1213 | unsigned long rlen; | |
1214 | { | |
e0c9811a | 1215 | int r = 0, count; |
800eeca4 JW |
1216 | char bytes[20]; |
1217 | if (rlen <= 0x1f) | |
1218 | { | |
1219 | output_R1_format (f, rtype, rlen); | |
1220 | return; | |
1221 | } | |
197865e8 | 1222 | |
e0c9811a JW |
1223 | if (rtype == body) |
1224 | r = 1; | |
1225 | else if (rtype != prologue) | |
1226 | as_bad ("record type is not valid"); | |
800eeca4 JW |
1227 | bytes[0] = (UNW_R3 | r); |
1228 | count = output_leb128 (bytes + 1, rlen, 0); | |
1229 | (*f) (count + 1, bytes, NULL); | |
1230 | } | |
1231 | ||
1232 | static void | |
1233 | output_P1_format (f, brmask) | |
1234 | vbyte_func f; | |
1235 | int brmask; | |
1236 | { | |
1237 | char byte; | |
1238 | byte = UNW_P1 | (brmask & 0x1f); | |
1239 | (*f) (1, &byte, NULL); | |
1240 | } | |
1241 | ||
1242 | static void | |
1243 | output_P2_format (f, brmask, gr) | |
1244 | vbyte_func f; | |
1245 | int brmask; | |
1246 | int gr; | |
1247 | { | |
1248 | char bytes[2]; | |
1249 | brmask = (brmask & 0x1f); | |
1250 | bytes[0] = UNW_P2 | (brmask >> 1); | |
1251 | bytes[1] = (((brmask & 1) << 7) | gr); | |
1252 | (*f) (2, bytes, NULL); | |
1253 | } | |
1254 | ||
1255 | static void | |
1256 | output_P3_format (f, rtype, reg) | |
1257 | vbyte_func f; | |
1258 | unw_record_type rtype; | |
1259 | int reg; | |
1260 | { | |
1261 | char bytes[2]; | |
e0c9811a | 1262 | int r = 0; |
800eeca4 JW |
1263 | reg = (reg & 0x7f); |
1264 | switch (rtype) | |
542d6675 | 1265 | { |
800eeca4 JW |
1266 | case psp_gr: |
1267 | r = 0; | |
1268 | break; | |
1269 | case rp_gr: | |
1270 | r = 1; | |
1271 | break; | |
1272 | case pfs_gr: | |
1273 | r = 2; | |
1274 | break; | |
1275 | case preds_gr: | |
1276 | r = 3; | |
1277 | break; | |
1278 | case unat_gr: | |
1279 | r = 4; | |
1280 | break; | |
1281 | case lc_gr: | |
1282 | r = 5; | |
1283 | break; | |
1284 | case rp_br: | |
1285 | r = 6; | |
1286 | break; | |
1287 | case rnat_gr: | |
1288 | r = 7; | |
1289 | break; | |
1290 | case bsp_gr: | |
1291 | r = 8; | |
1292 | break; | |
1293 | case bspstore_gr: | |
1294 | r = 9; | |
1295 | break; | |
1296 | case fpsr_gr: | |
1297 | r = 10; | |
1298 | break; | |
1299 | case priunat_gr: | |
1300 | r = 11; | |
1301 | break; | |
1302 | default: | |
1303 | as_bad ("Invalid record type for P3 format."); | |
542d6675 | 1304 | } |
800eeca4 JW |
1305 | bytes[0] = (UNW_P3 | (r >> 1)); |
1306 | bytes[1] = (((r & 1) << 7) | reg); | |
1307 | (*f) (2, bytes, NULL); | |
1308 | } | |
1309 | ||
800eeca4 | 1310 | static void |
e0c9811a | 1311 | output_P4_format (f, imask, imask_size) |
800eeca4 | 1312 | vbyte_func f; |
e0c9811a JW |
1313 | unsigned char *imask; |
1314 | unsigned long imask_size; | |
800eeca4 | 1315 | { |
e0c9811a JW |
1316 | imask[0] = UNW_P4; |
1317 | (*f) (imask_size, imask, NULL); | |
800eeca4 JW |
1318 | } |
1319 | ||
1320 | static void | |
1321 | output_P5_format (f, grmask, frmask) | |
1322 | vbyte_func f; | |
1323 | int grmask; | |
1324 | unsigned long frmask; | |
1325 | { | |
1326 | char bytes[4]; | |
1327 | grmask = (grmask & 0x0f); | |
1328 | ||
1329 | bytes[0] = UNW_P5; | |
1330 | bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16)); | |
1331 | bytes[2] = ((frmask & 0x0000ff00) >> 8); | |
1332 | bytes[3] = (frmask & 0x000000ff); | |
1333 | (*f) (4, bytes, NULL); | |
1334 | } | |
1335 | ||
1336 | static void | |
1337 | output_P6_format (f, rtype, rmask) | |
1338 | vbyte_func f; | |
1339 | unw_record_type rtype; | |
1340 | int rmask; | |
1341 | { | |
1342 | char byte; | |
e0c9811a | 1343 | int r = 0; |
197865e8 | 1344 | |
e0c9811a JW |
1345 | if (rtype == gr_mem) |
1346 | r = 1; | |
1347 | else if (rtype != fr_mem) | |
1348 | as_bad ("Invalid record type for format P6"); | |
800eeca4 JW |
1349 | byte = (UNW_P6 | (r << 4) | (rmask & 0x0f)); |
1350 | (*f) (1, &byte, NULL); | |
1351 | } | |
1352 | ||
1353 | static void | |
1354 | output_P7_format (f, rtype, w1, w2) | |
1355 | vbyte_func f; | |
1356 | unw_record_type rtype; | |
1357 | unsigned long w1; | |
1358 | unsigned long w2; | |
1359 | { | |
1360 | char bytes[20]; | |
1361 | int count = 1; | |
e0c9811a | 1362 | int r = 0; |
800eeca4 JW |
1363 | count += output_leb128 (bytes + 1, w1, 0); |
1364 | switch (rtype) | |
1365 | { | |
542d6675 KH |
1366 | case mem_stack_f: |
1367 | r = 0; | |
1368 | count += output_leb128 (bytes + count, w2 >> 4, 0); | |
1369 | break; | |
1370 | case mem_stack_v: | |
1371 | r = 1; | |
1372 | break; | |
1373 | case spill_base: | |
1374 | r = 2; | |
1375 | break; | |
1376 | case psp_sprel: | |
1377 | r = 3; | |
1378 | break; | |
1379 | case rp_when: | |
1380 | r = 4; | |
1381 | break; | |
1382 | case rp_psprel: | |
1383 | r = 5; | |
1384 | break; | |
1385 | case pfs_when: | |
1386 | r = 6; | |
1387 | break; | |
1388 | case pfs_psprel: | |
1389 | r = 7; | |
1390 | break; | |
1391 | case preds_when: | |
1392 | r = 8; | |
1393 | break; | |
1394 | case preds_psprel: | |
1395 | r = 9; | |
1396 | break; | |
1397 | case lc_when: | |
1398 | r = 10; | |
1399 | break; | |
1400 | case lc_psprel: | |
1401 | r = 11; | |
1402 | break; | |
1403 | case unat_when: | |
1404 | r = 12; | |
1405 | break; | |
1406 | case unat_psprel: | |
1407 | r = 13; | |
1408 | break; | |
1409 | case fpsr_when: | |
1410 | r = 14; | |
1411 | break; | |
1412 | case fpsr_psprel: | |
1413 | r = 15; | |
1414 | break; | |
1415 | default: | |
1416 | break; | |
800eeca4 JW |
1417 | } |
1418 | bytes[0] = (UNW_P7 | r); | |
1419 | (*f) (count, bytes, NULL); | |
1420 | } | |
1421 | ||
1422 | static void | |
1423 | output_P8_format (f, rtype, t) | |
1424 | vbyte_func f; | |
1425 | unw_record_type rtype; | |
1426 | unsigned long t; | |
1427 | { | |
1428 | char bytes[20]; | |
e0c9811a | 1429 | int r = 0; |
800eeca4 JW |
1430 | int count = 2; |
1431 | bytes[0] = UNW_P8; | |
1432 | switch (rtype) | |
1433 | { | |
542d6675 KH |
1434 | case rp_sprel: |
1435 | r = 1; | |
1436 | break; | |
1437 | case pfs_sprel: | |
1438 | r = 2; | |
1439 | break; | |
1440 | case preds_sprel: | |
1441 | r = 3; | |
1442 | break; | |
1443 | case lc_sprel: | |
1444 | r = 4; | |
1445 | break; | |
1446 | case unat_sprel: | |
1447 | r = 5; | |
1448 | break; | |
1449 | case fpsr_sprel: | |
1450 | r = 6; | |
1451 | break; | |
1452 | case bsp_when: | |
1453 | r = 7; | |
1454 | break; | |
1455 | case bsp_psprel: | |
1456 | r = 8; | |
1457 | break; | |
1458 | case bsp_sprel: | |
1459 | r = 9; | |
1460 | break; | |
1461 | case bspstore_when: | |
1462 | r = 10; | |
1463 | break; | |
1464 | case bspstore_psprel: | |
1465 | r = 11; | |
1466 | break; | |
1467 | case bspstore_sprel: | |
1468 | r = 12; | |
1469 | break; | |
1470 | case rnat_when: | |
1471 | r = 13; | |
1472 | break; | |
1473 | case rnat_psprel: | |
1474 | r = 14; | |
1475 | break; | |
1476 | case rnat_sprel: | |
1477 | r = 15; | |
1478 | break; | |
1479 | case priunat_when_gr: | |
1480 | r = 16; | |
1481 | break; | |
1482 | case priunat_psprel: | |
1483 | r = 17; | |
1484 | break; | |
1485 | case priunat_sprel: | |
1486 | r = 18; | |
1487 | break; | |
1488 | case priunat_when_mem: | |
1489 | r = 19; | |
1490 | break; | |
1491 | default: | |
1492 | break; | |
800eeca4 JW |
1493 | } |
1494 | bytes[1] = r; | |
1495 | count += output_leb128 (bytes + 2, t, 0); | |
1496 | (*f) (count, bytes, NULL); | |
1497 | } | |
1498 | ||
1499 | static void | |
1500 | output_P9_format (f, grmask, gr) | |
1501 | vbyte_func f; | |
1502 | int grmask; | |
1503 | int gr; | |
1504 | { | |
1505 | char bytes[3]; | |
1506 | bytes[0] = UNW_P9; | |
1507 | bytes[1] = (grmask & 0x0f); | |
1508 | bytes[2] = (gr & 0x7f); | |
1509 | (*f) (3, bytes, NULL); | |
1510 | } | |
1511 | ||
1512 | static void | |
1513 | output_P10_format (f, abi, context) | |
1514 | vbyte_func f; | |
1515 | int abi; | |
1516 | int context; | |
1517 | { | |
1518 | char bytes[3]; | |
1519 | bytes[0] = UNW_P10; | |
1520 | bytes[1] = (abi & 0xff); | |
1521 | bytes[2] = (context & 0xff); | |
1522 | (*f) (3, bytes, NULL); | |
1523 | } | |
1524 | ||
1525 | static void | |
1526 | output_B1_format (f, rtype, label) | |
1527 | vbyte_func f; | |
1528 | unw_record_type rtype; | |
1529 | unsigned long label; | |
1530 | { | |
1531 | char byte; | |
e0c9811a | 1532 | int r = 0; |
197865e8 | 1533 | if (label > 0x1f) |
800eeca4 JW |
1534 | { |
1535 | output_B4_format (f, rtype, label); | |
1536 | return; | |
1537 | } | |
e0c9811a JW |
1538 | if (rtype == copy_state) |
1539 | r = 1; | |
1540 | else if (rtype != label_state) | |
1541 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1542 | |
1543 | byte = (UNW_B1 | (r << 5) | (label & 0x1f)); | |
1544 | (*f) (1, &byte, NULL); | |
1545 | } | |
1546 | ||
1547 | static void | |
1548 | output_B2_format (f, ecount, t) | |
1549 | vbyte_func f; | |
1550 | unsigned long ecount; | |
1551 | unsigned long t; | |
1552 | { | |
1553 | char bytes[20]; | |
1554 | int count = 1; | |
1555 | if (ecount > 0x1f) | |
1556 | { | |
1557 | output_B3_format (f, ecount, t); | |
1558 | return; | |
1559 | } | |
1560 | bytes[0] = (UNW_B2 | (ecount & 0x1f)); | |
1561 | count += output_leb128 (bytes + 1, t, 0); | |
1562 | (*f) (count, bytes, NULL); | |
1563 | } | |
1564 | ||
1565 | static void | |
1566 | output_B3_format (f, ecount, t) | |
1567 | vbyte_func f; | |
1568 | unsigned long ecount; | |
1569 | unsigned long t; | |
1570 | { | |
1571 | char bytes[20]; | |
1572 | int count = 1; | |
1573 | if (ecount <= 0x1f) | |
1574 | { | |
1575 | output_B2_format (f, ecount, t); | |
1576 | return; | |
1577 | } | |
1578 | bytes[0] = UNW_B3; | |
1579 | count += output_leb128 (bytes + 1, t, 0); | |
1580 | count += output_leb128 (bytes + count, ecount, 0); | |
1581 | (*f) (count, bytes, NULL); | |
1582 | } | |
1583 | ||
1584 | static void | |
1585 | output_B4_format (f, rtype, label) | |
1586 | vbyte_func f; | |
1587 | unw_record_type rtype; | |
1588 | unsigned long label; | |
1589 | { | |
1590 | char bytes[20]; | |
e0c9811a | 1591 | int r = 0; |
800eeca4 | 1592 | int count = 1; |
197865e8 | 1593 | if (label <= 0x1f) |
800eeca4 JW |
1594 | { |
1595 | output_B1_format (f, rtype, label); | |
1596 | return; | |
1597 | } | |
197865e8 | 1598 | |
e0c9811a JW |
1599 | if (rtype == copy_state) |
1600 | r = 1; | |
1601 | else if (rtype != label_state) | |
1602 | as_bad ("Invalid record type for format B1"); | |
800eeca4 JW |
1603 | |
1604 | bytes[0] = (UNW_B4 | (r << 3)); | |
1605 | count += output_leb128 (bytes + 1, label, 0); | |
1606 | (*f) (count, bytes, NULL); | |
1607 | } | |
1608 | ||
1609 | static char | |
e0c9811a | 1610 | format_ab_reg (ab, reg) |
542d6675 KH |
1611 | int ab; |
1612 | int reg; | |
800eeca4 JW |
1613 | { |
1614 | int ret; | |
e0c9811a | 1615 | ab = (ab & 3); |
800eeca4 | 1616 | reg = (reg & 0x1f); |
e0c9811a | 1617 | ret = (ab << 5) | reg; |
800eeca4 JW |
1618 | return ret; |
1619 | } | |
1620 | ||
1621 | static void | |
e0c9811a | 1622 | output_X1_format (f, rtype, ab, reg, t, w1) |
800eeca4 JW |
1623 | vbyte_func f; |
1624 | unw_record_type rtype; | |
e0c9811a | 1625 | int ab, reg; |
800eeca4 JW |
1626 | unsigned long t; |
1627 | unsigned long w1; | |
1628 | { | |
1629 | char bytes[20]; | |
e0c9811a | 1630 | int r = 0; |
800eeca4 JW |
1631 | int count = 2; |
1632 | bytes[0] = UNW_X1; | |
197865e8 | 1633 | |
e0c9811a JW |
1634 | if (rtype == spill_sprel) |
1635 | r = 1; | |
1636 | else if (rtype != spill_psprel) | |
1637 | as_bad ("Invalid record type for format X1"); | |
1638 | bytes[1] = ((r << 7) | format_ab_reg (ab, reg)); | |
800eeca4 JW |
1639 | count += output_leb128 (bytes + 2, t, 0); |
1640 | count += output_leb128 (bytes + count, w1, 0); | |
1641 | (*f) (count, bytes, NULL); | |
1642 | } | |
1643 | ||
1644 | static void | |
e0c9811a | 1645 | output_X2_format (f, ab, reg, x, y, treg, t) |
800eeca4 | 1646 | vbyte_func f; |
e0c9811a | 1647 | int ab, reg; |
800eeca4 JW |
1648 | int x, y, treg; |
1649 | unsigned long t; | |
1650 | { | |
1651 | char bytes[20]; | |
800eeca4 JW |
1652 | int count = 3; |
1653 | bytes[0] = UNW_X2; | |
e0c9811a | 1654 | bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1655 | bytes[2] = (((y & 1) << 7) | (treg & 0x7f)); |
1656 | count += output_leb128 (bytes + 3, t, 0); | |
1657 | (*f) (count, bytes, NULL); | |
1658 | } | |
1659 | ||
1660 | static void | |
e0c9811a | 1661 | output_X3_format (f, rtype, qp, ab, reg, t, w1) |
800eeca4 JW |
1662 | vbyte_func f; |
1663 | unw_record_type rtype; | |
1664 | int qp; | |
e0c9811a | 1665 | int ab, reg; |
800eeca4 JW |
1666 | unsigned long t; |
1667 | unsigned long w1; | |
1668 | { | |
1669 | char bytes[20]; | |
e0c9811a | 1670 | int r = 0; |
800eeca4 | 1671 | int count = 3; |
e0c9811a JW |
1672 | bytes[0] = UNW_X3; |
1673 | ||
1674 | if (rtype == spill_sprel_p) | |
1675 | r = 1; | |
1676 | else if (rtype != spill_psprel_p) | |
1677 | as_bad ("Invalid record type for format X3"); | |
800eeca4 | 1678 | bytes[1] = ((r << 7) | (qp & 0x3f)); |
e0c9811a | 1679 | bytes[2] = format_ab_reg (ab, reg); |
800eeca4 JW |
1680 | count += output_leb128 (bytes + 3, t, 0); |
1681 | count += output_leb128 (bytes + count, w1, 0); | |
1682 | (*f) (count, bytes, NULL); | |
1683 | } | |
1684 | ||
1685 | static void | |
e0c9811a | 1686 | output_X4_format (f, qp, ab, reg, x, y, treg, t) |
800eeca4 JW |
1687 | vbyte_func f; |
1688 | int qp; | |
e0c9811a | 1689 | int ab, reg; |
800eeca4 JW |
1690 | int x, y, treg; |
1691 | unsigned long t; | |
1692 | { | |
1693 | char bytes[20]; | |
800eeca4 | 1694 | int count = 4; |
e0c9811a | 1695 | bytes[0] = UNW_X4; |
800eeca4 | 1696 | bytes[1] = (qp & 0x3f); |
e0c9811a | 1697 | bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg)); |
800eeca4 JW |
1698 | bytes[3] = (((y & 1) << 7) | (treg & 0x7f)); |
1699 | count += output_leb128 (bytes + 4, t, 0); | |
1700 | (*f) (count, bytes, NULL); | |
1701 | } | |
1702 | ||
1703 | /* This function allocates a record list structure, and initializes fields. */ | |
542d6675 | 1704 | |
800eeca4 | 1705 | static unw_rec_list * |
197865e8 | 1706 | alloc_record (unw_record_type t) |
800eeca4 JW |
1707 | { |
1708 | unw_rec_list *ptr; | |
1709 | ptr = xmalloc (sizeof (*ptr)); | |
1710 | ptr->next = NULL; | |
1711 | ptr->slot_number = SLOT_NUM_NOT_SET; | |
1712 | ptr->r.type = t; | |
73f20958 L |
1713 | ptr->next_slot_number = 0; |
1714 | ptr->next_slot_frag = 0; | |
800eeca4 JW |
1715 | return ptr; |
1716 | } | |
1717 | ||
5738bc24 JW |
1718 | /* Dummy unwind record used for calculating the length of the last prologue or |
1719 | body region. */ | |
1720 | ||
1721 | static unw_rec_list * | |
1722 | output_endp () | |
1723 | { | |
1724 | unw_rec_list *ptr = alloc_record (endp); | |
1725 | return ptr; | |
1726 | } | |
1727 | ||
800eeca4 JW |
1728 | static unw_rec_list * |
1729 | output_prologue () | |
1730 | { | |
1731 | unw_rec_list *ptr = alloc_record (prologue); | |
e0c9811a | 1732 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
800eeca4 JW |
1733 | return ptr; |
1734 | } | |
1735 | ||
1736 | static unw_rec_list * | |
1737 | output_prologue_gr (saved_mask, reg) | |
1738 | unsigned int saved_mask; | |
1739 | unsigned int reg; | |
1740 | { | |
1741 | unw_rec_list *ptr = alloc_record (prologue_gr); | |
e0c9811a JW |
1742 | memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); |
1743 | ptr->r.record.r.grmask = saved_mask; | |
800eeca4 JW |
1744 | ptr->r.record.r.grsave = reg; |
1745 | return ptr; | |
1746 | } | |
1747 | ||
1748 | static unw_rec_list * | |
1749 | output_body () | |
1750 | { | |
1751 | unw_rec_list *ptr = alloc_record (body); | |
1752 | return ptr; | |
1753 | } | |
1754 | ||
1755 | static unw_rec_list * | |
1756 | output_mem_stack_f (size) | |
1757 | unsigned int size; | |
1758 | { | |
1759 | unw_rec_list *ptr = alloc_record (mem_stack_f); | |
1760 | ptr->r.record.p.size = size; | |
1761 | return ptr; | |
1762 | } | |
1763 | ||
1764 | static unw_rec_list * | |
1765 | output_mem_stack_v () | |
1766 | { | |
1767 | unw_rec_list *ptr = alloc_record (mem_stack_v); | |
1768 | return ptr; | |
1769 | } | |
1770 | ||
1771 | static unw_rec_list * | |
1772 | output_psp_gr (gr) | |
1773 | unsigned int gr; | |
1774 | { | |
1775 | unw_rec_list *ptr = alloc_record (psp_gr); | |
1776 | ptr->r.record.p.gr = gr; | |
1777 | return ptr; | |
1778 | } | |
1779 | ||
1780 | static unw_rec_list * | |
1781 | output_psp_sprel (offset) | |
1782 | unsigned int offset; | |
1783 | { | |
1784 | unw_rec_list *ptr = alloc_record (psp_sprel); | |
542d6675 | 1785 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1786 | return ptr; |
1787 | } | |
1788 | ||
1789 | static unw_rec_list * | |
1790 | output_rp_when () | |
1791 | { | |
1792 | unw_rec_list *ptr = alloc_record (rp_when); | |
1793 | return ptr; | |
1794 | } | |
1795 | ||
1796 | static unw_rec_list * | |
1797 | output_rp_gr (gr) | |
1798 | unsigned int gr; | |
1799 | { | |
1800 | unw_rec_list *ptr = alloc_record (rp_gr); | |
1801 | ptr->r.record.p.gr = gr; | |
1802 | return ptr; | |
1803 | } | |
1804 | ||
1805 | static unw_rec_list * | |
1806 | output_rp_br (br) | |
1807 | unsigned int br; | |
1808 | { | |
1809 | unw_rec_list *ptr = alloc_record (rp_br); | |
1810 | ptr->r.record.p.br = br; | |
1811 | return ptr; | |
1812 | } | |
1813 | ||
1814 | static unw_rec_list * | |
1815 | output_rp_psprel (offset) | |
1816 | unsigned int offset; | |
1817 | { | |
1818 | unw_rec_list *ptr = alloc_record (rp_psprel); | |
9f9a069e | 1819 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1820 | return ptr; |
1821 | } | |
1822 | ||
1823 | static unw_rec_list * | |
1824 | output_rp_sprel (offset) | |
1825 | unsigned int offset; | |
1826 | { | |
1827 | unw_rec_list *ptr = alloc_record (rp_sprel); | |
542d6675 | 1828 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1829 | return ptr; |
1830 | } | |
1831 | ||
1832 | static unw_rec_list * | |
1833 | output_pfs_when () | |
1834 | { | |
1835 | unw_rec_list *ptr = alloc_record (pfs_when); | |
1836 | return ptr; | |
1837 | } | |
1838 | ||
1839 | static unw_rec_list * | |
1840 | output_pfs_gr (gr) | |
1841 | unsigned int gr; | |
1842 | { | |
1843 | unw_rec_list *ptr = alloc_record (pfs_gr); | |
1844 | ptr->r.record.p.gr = gr; | |
1845 | return ptr; | |
1846 | } | |
1847 | ||
1848 | static unw_rec_list * | |
1849 | output_pfs_psprel (offset) | |
1850 | unsigned int offset; | |
1851 | { | |
1852 | unw_rec_list *ptr = alloc_record (pfs_psprel); | |
9f9a069e | 1853 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1854 | return ptr; |
1855 | } | |
1856 | ||
1857 | static unw_rec_list * | |
1858 | output_pfs_sprel (offset) | |
1859 | unsigned int offset; | |
1860 | { | |
1861 | unw_rec_list *ptr = alloc_record (pfs_sprel); | |
542d6675 | 1862 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1863 | return ptr; |
1864 | } | |
1865 | ||
1866 | static unw_rec_list * | |
1867 | output_preds_when () | |
1868 | { | |
1869 | unw_rec_list *ptr = alloc_record (preds_when); | |
1870 | return ptr; | |
1871 | } | |
1872 | ||
1873 | static unw_rec_list * | |
1874 | output_preds_gr (gr) | |
1875 | unsigned int gr; | |
1876 | { | |
1877 | unw_rec_list *ptr = alloc_record (preds_gr); | |
1878 | ptr->r.record.p.gr = gr; | |
1879 | return ptr; | |
1880 | } | |
1881 | ||
1882 | static unw_rec_list * | |
1883 | output_preds_psprel (offset) | |
1884 | unsigned int offset; | |
1885 | { | |
1886 | unw_rec_list *ptr = alloc_record (preds_psprel); | |
9f9a069e | 1887 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1888 | return ptr; |
1889 | } | |
1890 | ||
1891 | static unw_rec_list * | |
1892 | output_preds_sprel (offset) | |
1893 | unsigned int offset; | |
1894 | { | |
1895 | unw_rec_list *ptr = alloc_record (preds_sprel); | |
542d6675 | 1896 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1897 | return ptr; |
1898 | } | |
1899 | ||
1900 | static unw_rec_list * | |
1901 | output_fr_mem (mask) | |
1902 | unsigned int mask; | |
1903 | { | |
1904 | unw_rec_list *ptr = alloc_record (fr_mem); | |
1905 | ptr->r.record.p.rmask = mask; | |
1906 | return ptr; | |
1907 | } | |
1908 | ||
1909 | static unw_rec_list * | |
1910 | output_frgr_mem (gr_mask, fr_mask) | |
1911 | unsigned int gr_mask; | |
1912 | unsigned int fr_mask; | |
1913 | { | |
1914 | unw_rec_list *ptr = alloc_record (frgr_mem); | |
1915 | ptr->r.record.p.grmask = gr_mask; | |
1916 | ptr->r.record.p.frmask = fr_mask; | |
1917 | return ptr; | |
1918 | } | |
1919 | ||
1920 | static unw_rec_list * | |
1921 | output_gr_gr (mask, reg) | |
1922 | unsigned int mask; | |
1923 | unsigned int reg; | |
1924 | { | |
1925 | unw_rec_list *ptr = alloc_record (gr_gr); | |
1926 | ptr->r.record.p.grmask = mask; | |
1927 | ptr->r.record.p.gr = reg; | |
1928 | return ptr; | |
1929 | } | |
1930 | ||
1931 | static unw_rec_list * | |
1932 | output_gr_mem (mask) | |
1933 | unsigned int mask; | |
1934 | { | |
1935 | unw_rec_list *ptr = alloc_record (gr_mem); | |
1936 | ptr->r.record.p.rmask = mask; | |
1937 | return ptr; | |
1938 | } | |
1939 | ||
1940 | static unw_rec_list * | |
1941 | output_br_mem (unsigned int mask) | |
1942 | { | |
1943 | unw_rec_list *ptr = alloc_record (br_mem); | |
1944 | ptr->r.record.p.brmask = mask; | |
1945 | return ptr; | |
1946 | } | |
1947 | ||
1948 | static unw_rec_list * | |
1949 | output_br_gr (save_mask, reg) | |
1950 | unsigned int save_mask; | |
1951 | unsigned int reg; | |
1952 | { | |
1953 | unw_rec_list *ptr = alloc_record (br_gr); | |
1954 | ptr->r.record.p.brmask = save_mask; | |
1955 | ptr->r.record.p.gr = reg; | |
1956 | return ptr; | |
1957 | } | |
1958 | ||
1959 | static unw_rec_list * | |
1960 | output_spill_base (offset) | |
1961 | unsigned int offset; | |
1962 | { | |
1963 | unw_rec_list *ptr = alloc_record (spill_base); | |
9f9a069e | 1964 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1965 | return ptr; |
1966 | } | |
1967 | ||
1968 | static unw_rec_list * | |
1969 | output_unat_when () | |
1970 | { | |
1971 | unw_rec_list *ptr = alloc_record (unat_when); | |
1972 | return ptr; | |
1973 | } | |
1974 | ||
1975 | static unw_rec_list * | |
1976 | output_unat_gr (gr) | |
1977 | unsigned int gr; | |
1978 | { | |
1979 | unw_rec_list *ptr = alloc_record (unat_gr); | |
1980 | ptr->r.record.p.gr = gr; | |
1981 | return ptr; | |
1982 | } | |
1983 | ||
1984 | static unw_rec_list * | |
1985 | output_unat_psprel (offset) | |
1986 | unsigned int offset; | |
1987 | { | |
1988 | unw_rec_list *ptr = alloc_record (unat_psprel); | |
9f9a069e | 1989 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
1990 | return ptr; |
1991 | } | |
1992 | ||
1993 | static unw_rec_list * | |
1994 | output_unat_sprel (offset) | |
1995 | unsigned int offset; | |
1996 | { | |
1997 | unw_rec_list *ptr = alloc_record (unat_sprel); | |
542d6675 | 1998 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
1999 | return ptr; |
2000 | } | |
2001 | ||
2002 | static unw_rec_list * | |
2003 | output_lc_when () | |
2004 | { | |
2005 | unw_rec_list *ptr = alloc_record (lc_when); | |
2006 | return ptr; | |
2007 | } | |
2008 | ||
2009 | static unw_rec_list * | |
2010 | output_lc_gr (gr) | |
2011 | unsigned int gr; | |
2012 | { | |
2013 | unw_rec_list *ptr = alloc_record (lc_gr); | |
2014 | ptr->r.record.p.gr = gr; | |
2015 | return ptr; | |
2016 | } | |
2017 | ||
2018 | static unw_rec_list * | |
2019 | output_lc_psprel (offset) | |
2020 | unsigned int offset; | |
2021 | { | |
2022 | unw_rec_list *ptr = alloc_record (lc_psprel); | |
9f9a069e | 2023 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2024 | return ptr; |
2025 | } | |
2026 | ||
2027 | static unw_rec_list * | |
2028 | output_lc_sprel (offset) | |
2029 | unsigned int offset; | |
2030 | { | |
2031 | unw_rec_list *ptr = alloc_record (lc_sprel); | |
542d6675 | 2032 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2033 | return ptr; |
2034 | } | |
2035 | ||
2036 | static unw_rec_list * | |
2037 | output_fpsr_when () | |
2038 | { | |
2039 | unw_rec_list *ptr = alloc_record (fpsr_when); | |
2040 | return ptr; | |
2041 | } | |
2042 | ||
2043 | static unw_rec_list * | |
2044 | output_fpsr_gr (gr) | |
2045 | unsigned int gr; | |
2046 | { | |
2047 | unw_rec_list *ptr = alloc_record (fpsr_gr); | |
2048 | ptr->r.record.p.gr = gr; | |
2049 | return ptr; | |
2050 | } | |
2051 | ||
2052 | static unw_rec_list * | |
2053 | output_fpsr_psprel (offset) | |
2054 | unsigned int offset; | |
2055 | { | |
2056 | unw_rec_list *ptr = alloc_record (fpsr_psprel); | |
9f9a069e | 2057 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2058 | return ptr; |
2059 | } | |
2060 | ||
2061 | static unw_rec_list * | |
2062 | output_fpsr_sprel (offset) | |
2063 | unsigned int offset; | |
2064 | { | |
2065 | unw_rec_list *ptr = alloc_record (fpsr_sprel); | |
542d6675 | 2066 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2067 | return ptr; |
2068 | } | |
2069 | ||
2070 | static unw_rec_list * | |
2071 | output_priunat_when_gr () | |
2072 | { | |
2073 | unw_rec_list *ptr = alloc_record (priunat_when_gr); | |
2074 | return ptr; | |
2075 | } | |
2076 | ||
2077 | static unw_rec_list * | |
2078 | output_priunat_when_mem () | |
2079 | { | |
2080 | unw_rec_list *ptr = alloc_record (priunat_when_mem); | |
2081 | return ptr; | |
2082 | } | |
2083 | ||
2084 | static unw_rec_list * | |
2085 | output_priunat_gr (gr) | |
2086 | unsigned int gr; | |
2087 | { | |
2088 | unw_rec_list *ptr = alloc_record (priunat_gr); | |
2089 | ptr->r.record.p.gr = gr; | |
2090 | return ptr; | |
2091 | } | |
2092 | ||
2093 | static unw_rec_list * | |
2094 | output_priunat_psprel (offset) | |
2095 | unsigned int offset; | |
2096 | { | |
2097 | unw_rec_list *ptr = alloc_record (priunat_psprel); | |
9f9a069e | 2098 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2099 | return ptr; |
2100 | } | |
2101 | ||
2102 | static unw_rec_list * | |
2103 | output_priunat_sprel (offset) | |
2104 | unsigned int offset; | |
2105 | { | |
2106 | unw_rec_list *ptr = alloc_record (priunat_sprel); | |
542d6675 | 2107 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2108 | return ptr; |
2109 | } | |
2110 | ||
2111 | static unw_rec_list * | |
2112 | output_bsp_when () | |
2113 | { | |
2114 | unw_rec_list *ptr = alloc_record (bsp_when); | |
2115 | return ptr; | |
2116 | } | |
2117 | ||
2118 | static unw_rec_list * | |
2119 | output_bsp_gr (gr) | |
2120 | unsigned int gr; | |
2121 | { | |
2122 | unw_rec_list *ptr = alloc_record (bsp_gr); | |
2123 | ptr->r.record.p.gr = gr; | |
2124 | return ptr; | |
2125 | } | |
2126 | ||
2127 | static unw_rec_list * | |
2128 | output_bsp_psprel (offset) | |
2129 | unsigned int offset; | |
2130 | { | |
2131 | unw_rec_list *ptr = alloc_record (bsp_psprel); | |
9f9a069e | 2132 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2133 | return ptr; |
2134 | } | |
2135 | ||
2136 | static unw_rec_list * | |
2137 | output_bsp_sprel (offset) | |
2138 | unsigned int offset; | |
2139 | { | |
2140 | unw_rec_list *ptr = alloc_record (bsp_sprel); | |
542d6675 | 2141 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2142 | return ptr; |
2143 | } | |
2144 | ||
2145 | static unw_rec_list * | |
2146 | output_bspstore_when () | |
2147 | { | |
2148 | unw_rec_list *ptr = alloc_record (bspstore_when); | |
2149 | return ptr; | |
2150 | } | |
2151 | ||
2152 | static unw_rec_list * | |
2153 | output_bspstore_gr (gr) | |
2154 | unsigned int gr; | |
2155 | { | |
2156 | unw_rec_list *ptr = alloc_record (bspstore_gr); | |
2157 | ptr->r.record.p.gr = gr; | |
2158 | return ptr; | |
2159 | } | |
2160 | ||
2161 | static unw_rec_list * | |
2162 | output_bspstore_psprel (offset) | |
2163 | unsigned int offset; | |
2164 | { | |
2165 | unw_rec_list *ptr = alloc_record (bspstore_psprel); | |
9f9a069e | 2166 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2167 | return ptr; |
2168 | } | |
2169 | ||
2170 | static unw_rec_list * | |
2171 | output_bspstore_sprel (offset) | |
2172 | unsigned int offset; | |
2173 | { | |
2174 | unw_rec_list *ptr = alloc_record (bspstore_sprel); | |
542d6675 | 2175 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2176 | return ptr; |
2177 | } | |
2178 | ||
2179 | static unw_rec_list * | |
2180 | output_rnat_when () | |
2181 | { | |
2182 | unw_rec_list *ptr = alloc_record (rnat_when); | |
2183 | return ptr; | |
2184 | } | |
2185 | ||
2186 | static unw_rec_list * | |
2187 | output_rnat_gr (gr) | |
2188 | unsigned int gr; | |
2189 | { | |
2190 | unw_rec_list *ptr = alloc_record (rnat_gr); | |
2191 | ptr->r.record.p.gr = gr; | |
2192 | return ptr; | |
2193 | } | |
2194 | ||
2195 | static unw_rec_list * | |
2196 | output_rnat_psprel (offset) | |
2197 | unsigned int offset; | |
2198 | { | |
2199 | unw_rec_list *ptr = alloc_record (rnat_psprel); | |
9f9a069e | 2200 | ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2201 | return ptr; |
2202 | } | |
2203 | ||
2204 | static unw_rec_list * | |
2205 | output_rnat_sprel (offset) | |
2206 | unsigned int offset; | |
2207 | { | |
2208 | unw_rec_list *ptr = alloc_record (rnat_sprel); | |
542d6675 | 2209 | ptr->r.record.p.spoff = offset / 4; |
800eeca4 JW |
2210 | return ptr; |
2211 | } | |
2212 | ||
2213 | static unw_rec_list * | |
e0c9811a JW |
2214 | output_unwabi (abi, context) |
2215 | unsigned long abi; | |
2216 | unsigned long context; | |
800eeca4 | 2217 | { |
e0c9811a JW |
2218 | unw_rec_list *ptr = alloc_record (unwabi); |
2219 | ptr->r.record.p.abi = abi; | |
2220 | ptr->r.record.p.context = context; | |
800eeca4 JW |
2221 | return ptr; |
2222 | } | |
2223 | ||
2224 | static unw_rec_list * | |
e0c9811a | 2225 | output_epilogue (unsigned long ecount) |
800eeca4 | 2226 | { |
e0c9811a JW |
2227 | unw_rec_list *ptr = alloc_record (epilogue); |
2228 | ptr->r.record.b.ecount = ecount; | |
800eeca4 JW |
2229 | return ptr; |
2230 | } | |
2231 | ||
2232 | static unw_rec_list * | |
e0c9811a | 2233 | output_label_state (unsigned long label) |
800eeca4 | 2234 | { |
e0c9811a JW |
2235 | unw_rec_list *ptr = alloc_record (label_state); |
2236 | ptr->r.record.b.label = label; | |
800eeca4 JW |
2237 | return ptr; |
2238 | } | |
2239 | ||
2240 | static unw_rec_list * | |
e0c9811a JW |
2241 | output_copy_state (unsigned long label) |
2242 | { | |
2243 | unw_rec_list *ptr = alloc_record (copy_state); | |
2244 | ptr->r.record.b.label = label; | |
2245 | return ptr; | |
2246 | } | |
2247 | ||
2248 | static unw_rec_list * | |
2249 | output_spill_psprel (ab, reg, offset) | |
2250 | unsigned int ab; | |
800eeca4 JW |
2251 | unsigned int reg; |
2252 | unsigned int offset; | |
2253 | { | |
2254 | unw_rec_list *ptr = alloc_record (spill_psprel); | |
e0c9811a | 2255 | ptr->r.record.x.ab = ab; |
800eeca4 | 2256 | ptr->r.record.x.reg = reg; |
9f9a069e | 2257 | ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2258 | return ptr; |
2259 | } | |
2260 | ||
2261 | static unw_rec_list * | |
e0c9811a JW |
2262 | output_spill_sprel (ab, reg, offset) |
2263 | unsigned int ab; | |
800eeca4 JW |
2264 | unsigned int reg; |
2265 | unsigned int offset; | |
2266 | { | |
2267 | unw_rec_list *ptr = alloc_record (spill_sprel); | |
e0c9811a | 2268 | ptr->r.record.x.ab = ab; |
800eeca4 | 2269 | ptr->r.record.x.reg = reg; |
542d6675 | 2270 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2271 | return ptr; |
2272 | } | |
2273 | ||
2274 | static unw_rec_list * | |
e0c9811a JW |
2275 | output_spill_psprel_p (ab, reg, offset, predicate) |
2276 | unsigned int ab; | |
800eeca4 JW |
2277 | unsigned int reg; |
2278 | unsigned int offset; | |
2279 | unsigned int predicate; | |
2280 | { | |
2281 | unw_rec_list *ptr = alloc_record (spill_psprel_p); | |
e0c9811a | 2282 | ptr->r.record.x.ab = ab; |
800eeca4 | 2283 | ptr->r.record.x.reg = reg; |
9f9a069e | 2284 | ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset); |
800eeca4 JW |
2285 | ptr->r.record.x.qp = predicate; |
2286 | return ptr; | |
2287 | } | |
2288 | ||
2289 | static unw_rec_list * | |
e0c9811a JW |
2290 | output_spill_sprel_p (ab, reg, offset, predicate) |
2291 | unsigned int ab; | |
800eeca4 JW |
2292 | unsigned int reg; |
2293 | unsigned int offset; | |
2294 | unsigned int predicate; | |
2295 | { | |
2296 | unw_rec_list *ptr = alloc_record (spill_sprel_p); | |
e0c9811a | 2297 | ptr->r.record.x.ab = ab; |
800eeca4 | 2298 | ptr->r.record.x.reg = reg; |
542d6675 | 2299 | ptr->r.record.x.spoff = offset / 4; |
800eeca4 JW |
2300 | ptr->r.record.x.qp = predicate; |
2301 | return ptr; | |
2302 | } | |
2303 | ||
2304 | static unw_rec_list * | |
e0c9811a JW |
2305 | output_spill_reg (ab, reg, targ_reg, xy) |
2306 | unsigned int ab; | |
800eeca4 JW |
2307 | unsigned int reg; |
2308 | unsigned int targ_reg; | |
2309 | unsigned int xy; | |
2310 | { | |
2311 | unw_rec_list *ptr = alloc_record (spill_reg); | |
e0c9811a | 2312 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2313 | ptr->r.record.x.reg = reg; |
2314 | ptr->r.record.x.treg = targ_reg; | |
2315 | ptr->r.record.x.xy = xy; | |
2316 | return ptr; | |
2317 | } | |
2318 | ||
2319 | static unw_rec_list * | |
e0c9811a JW |
2320 | output_spill_reg_p (ab, reg, targ_reg, xy, predicate) |
2321 | unsigned int ab; | |
800eeca4 JW |
2322 | unsigned int reg; |
2323 | unsigned int targ_reg; | |
2324 | unsigned int xy; | |
2325 | unsigned int predicate; | |
2326 | { | |
2327 | unw_rec_list *ptr = alloc_record (spill_reg_p); | |
e0c9811a | 2328 | ptr->r.record.x.ab = ab; |
800eeca4 JW |
2329 | ptr->r.record.x.reg = reg; |
2330 | ptr->r.record.x.treg = targ_reg; | |
2331 | ptr->r.record.x.xy = xy; | |
2332 | ptr->r.record.x.qp = predicate; | |
2333 | return ptr; | |
2334 | } | |
2335 | ||
197865e8 | 2336 | /* Given a unw_rec_list process the correct format with the |
800eeca4 | 2337 | specified function. */ |
542d6675 | 2338 | |
800eeca4 JW |
2339 | static void |
2340 | process_one_record (ptr, f) | |
2341 | unw_rec_list *ptr; | |
2342 | vbyte_func f; | |
2343 | { | |
e0c9811a JW |
2344 | unsigned long fr_mask, gr_mask; |
2345 | ||
197865e8 | 2346 | switch (ptr->r.type) |
800eeca4 | 2347 | { |
5738bc24 JW |
2348 | /* This is a dummy record that takes up no space in the output. */ |
2349 | case endp: | |
2350 | break; | |
2351 | ||
542d6675 KH |
2352 | case gr_mem: |
2353 | case fr_mem: | |
2354 | case br_mem: | |
2355 | case frgr_mem: | |
2356 | /* These are taken care of by prologue/prologue_gr. */ | |
2357 | break; | |
e0c9811a | 2358 | |
542d6675 KH |
2359 | case prologue_gr: |
2360 | case prologue: | |
2361 | if (ptr->r.type == prologue_gr) | |
2362 | output_R2_format (f, ptr->r.record.r.grmask, | |
2363 | ptr->r.record.r.grsave, ptr->r.record.r.rlen); | |
2364 | else | |
800eeca4 | 2365 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); |
542d6675 KH |
2366 | |
2367 | /* Output descriptor(s) for union of register spills (if any). */ | |
2368 | gr_mask = ptr->r.record.r.mask.gr_mem; | |
2369 | fr_mask = ptr->r.record.r.mask.fr_mem; | |
2370 | if (fr_mask) | |
2371 | { | |
2372 | if ((fr_mask & ~0xfUL) == 0) | |
2373 | output_P6_format (f, fr_mem, fr_mask); | |
2374 | else | |
2375 | { | |
2376 | output_P5_format (f, gr_mask, fr_mask); | |
2377 | gr_mask = 0; | |
2378 | } | |
2379 | } | |
2380 | if (gr_mask) | |
2381 | output_P6_format (f, gr_mem, gr_mask); | |
2382 | if (ptr->r.record.r.mask.br_mem) | |
2383 | output_P1_format (f, ptr->r.record.r.mask.br_mem); | |
2384 | ||
2385 | /* output imask descriptor if necessary: */ | |
2386 | if (ptr->r.record.r.mask.i) | |
2387 | output_P4_format (f, ptr->r.record.r.mask.i, | |
2388 | ptr->r.record.r.imask_size); | |
2389 | break; | |
2390 | ||
2391 | case body: | |
2392 | output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); | |
2393 | break; | |
2394 | case mem_stack_f: | |
2395 | case mem_stack_v: | |
2396 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, | |
2397 | ptr->r.record.p.size); | |
2398 | break; | |
2399 | case psp_gr: | |
2400 | case rp_gr: | |
2401 | case pfs_gr: | |
2402 | case preds_gr: | |
2403 | case unat_gr: | |
2404 | case lc_gr: | |
2405 | case fpsr_gr: | |
2406 | case priunat_gr: | |
2407 | case bsp_gr: | |
2408 | case bspstore_gr: | |
2409 | case rnat_gr: | |
2410 | output_P3_format (f, ptr->r.type, ptr->r.record.p.gr); | |
2411 | break; | |
2412 | case rp_br: | |
2413 | output_P3_format (f, rp_br, ptr->r.record.p.br); | |
2414 | break; | |
2415 | case psp_sprel: | |
2416 | output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0); | |
2417 | break; | |
2418 | case rp_when: | |
2419 | case pfs_when: | |
2420 | case preds_when: | |
2421 | case unat_when: | |
2422 | case lc_when: | |
2423 | case fpsr_when: | |
2424 | output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0); | |
2425 | break; | |
2426 | case rp_psprel: | |
2427 | case pfs_psprel: | |
2428 | case preds_psprel: | |
2429 | case unat_psprel: | |
2430 | case lc_psprel: | |
2431 | case fpsr_psprel: | |
2432 | case spill_base: | |
2433 | output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0); | |
2434 | break; | |
2435 | case rp_sprel: | |
2436 | case pfs_sprel: | |
2437 | case preds_sprel: | |
2438 | case unat_sprel: | |
2439 | case lc_sprel: | |
2440 | case fpsr_sprel: | |
2441 | case priunat_sprel: | |
2442 | case bsp_sprel: | |
2443 | case bspstore_sprel: | |
2444 | case rnat_sprel: | |
2445 | output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff); | |
2446 | break; | |
2447 | case gr_gr: | |
2448 | output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr); | |
2449 | break; | |
2450 | case br_gr: | |
2451 | output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr); | |
2452 | break; | |
2453 | case spill_mask: | |
2454 | as_bad ("spill_mask record unimplemented."); | |
2455 | break; | |
2456 | case priunat_when_gr: | |
2457 | case priunat_when_mem: | |
2458 | case bsp_when: | |
2459 | case bspstore_when: | |
2460 | case rnat_when: | |
2461 | output_P8_format (f, ptr->r.type, ptr->r.record.p.t); | |
2462 | break; | |
2463 | case priunat_psprel: | |
2464 | case bsp_psprel: | |
2465 | case bspstore_psprel: | |
2466 | case rnat_psprel: | |
2467 | output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff); | |
2468 | break; | |
2469 | case unwabi: | |
2470 | output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context); | |
2471 | break; | |
2472 | case epilogue: | |
2473 | output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t); | |
2474 | break; | |
2475 | case label_state: | |
2476 | case copy_state: | |
2477 | output_B4_format (f, ptr->r.type, ptr->r.record.b.label); | |
2478 | break; | |
2479 | case spill_psprel: | |
2480 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2481 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2482 | ptr->r.record.x.pspoff); | |
2483 | break; | |
2484 | case spill_sprel: | |
2485 | output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, | |
2486 | ptr->r.record.x.reg, ptr->r.record.x.t, | |
2487 | ptr->r.record.x.spoff); | |
2488 | break; | |
2489 | case spill_reg: | |
2490 | output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2491 | ptr->r.record.x.xy >> 1, ptr->r.record.x.xy, | |
2492 | ptr->r.record.x.treg, ptr->r.record.x.t); | |
2493 | break; | |
2494 | case spill_psprel_p: | |
2495 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2496 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2497 | ptr->r.record.x.t, ptr->r.record.x.pspoff); | |
2498 | break; | |
2499 | case spill_sprel_p: | |
2500 | output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, | |
2501 | ptr->r.record.x.ab, ptr->r.record.x.reg, | |
2502 | ptr->r.record.x.t, ptr->r.record.x.spoff); | |
2503 | break; | |
2504 | case spill_reg_p: | |
2505 | output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab, | |
2506 | ptr->r.record.x.reg, ptr->r.record.x.xy >> 1, | |
2507 | ptr->r.record.x.xy, ptr->r.record.x.treg, | |
2508 | ptr->r.record.x.t); | |
2509 | break; | |
2510 | default: | |
2511 | as_bad ("record_type_not_valid"); | |
2512 | break; | |
800eeca4 JW |
2513 | } |
2514 | } | |
2515 | ||
197865e8 | 2516 | /* Given a unw_rec_list list, process all the records with |
800eeca4 JW |
2517 | the specified function. */ |
2518 | static void | |
2519 | process_unw_records (list, f) | |
2520 | unw_rec_list *list; | |
2521 | vbyte_func f; | |
2522 | { | |
2523 | unw_rec_list *ptr; | |
2524 | for (ptr = list; ptr; ptr = ptr->next) | |
2525 | process_one_record (ptr, f); | |
2526 | } | |
2527 | ||
2528 | /* Determine the size of a record list in bytes. */ | |
2529 | static int | |
2530 | calc_record_size (list) | |
2531 | unw_rec_list *list; | |
2532 | { | |
2533 | vbyte_count = 0; | |
2534 | process_unw_records (list, count_output); | |
2535 | return vbyte_count; | |
2536 | } | |
2537 | ||
e0c9811a JW |
2538 | /* Update IMASK bitmask to reflect the fact that one or more registers |
2539 | of type TYPE are saved starting at instruction with index T. If N | |
2540 | bits are set in REGMASK, it is assumed that instructions T through | |
2541 | T+N-1 save these registers. | |
2542 | ||
2543 | TYPE values: | |
2544 | 0: no save | |
2545 | 1: instruction saves next fp reg | |
2546 | 2: instruction saves next general reg | |
2547 | 3: instruction saves next branch reg */ | |
2548 | static void | |
2549 | set_imask (region, regmask, t, type) | |
2550 | unw_rec_list *region; | |
2551 | unsigned long regmask; | |
2552 | unsigned long t; | |
2553 | unsigned int type; | |
2554 | { | |
2555 | unsigned char *imask; | |
2556 | unsigned long imask_size; | |
2557 | unsigned int i; | |
2558 | int pos; | |
2559 | ||
2560 | imask = region->r.record.r.mask.i; | |
2561 | imask_size = region->r.record.r.imask_size; | |
2562 | if (!imask) | |
2563 | { | |
542d6675 | 2564 | imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1; |
e0c9811a JW |
2565 | imask = xmalloc (imask_size); |
2566 | memset (imask, 0, imask_size); | |
2567 | ||
2568 | region->r.record.r.imask_size = imask_size; | |
2569 | region->r.record.r.mask.i = imask; | |
2570 | } | |
2571 | ||
542d6675 KH |
2572 | i = (t / 4) + 1; |
2573 | pos = 2 * (3 - t % 4); | |
e0c9811a JW |
2574 | while (regmask) |
2575 | { | |
2576 | if (i >= imask_size) | |
2577 | { | |
2578 | as_bad ("Ignoring attempt to spill beyond end of region"); | |
2579 | return; | |
2580 | } | |
2581 | ||
2582 | imask[i] |= (type & 0x3) << pos; | |
197865e8 | 2583 | |
e0c9811a JW |
2584 | regmask &= (regmask - 1); |
2585 | pos -= 2; | |
2586 | if (pos < 0) | |
2587 | { | |
2588 | pos = 0; | |
2589 | ++i; | |
2590 | } | |
2591 | } | |
2592 | } | |
2593 | ||
f5a30c2e JW |
2594 | /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. |
2595 | SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag | |
b5e0fabd JW |
2596 | containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates |
2597 | for frag sizes. */ | |
f5a30c2e | 2598 | |
e0c9811a | 2599 | unsigned long |
b5e0fabd | 2600 | slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax) |
f5a30c2e JW |
2601 | unsigned long slot_addr; |
2602 | fragS *slot_frag; | |
2603 | unsigned long first_addr; | |
2604 | fragS *first_frag; | |
b5e0fabd | 2605 | int before_relax; |
e0c9811a | 2606 | { |
f5a30c2e JW |
2607 | unsigned long index = 0; |
2608 | ||
2609 | /* First time we are called, the initial address and frag are invalid. */ | |
2610 | if (first_addr == 0) | |
2611 | return 0; | |
2612 | ||
2613 | /* If the two addresses are in different frags, then we need to add in | |
2614 | the remaining size of this frag, and then the entire size of intermediate | |
2615 | frags. */ | |
2616 | while (slot_frag != first_frag) | |
2617 | { | |
2618 | unsigned long start_addr = (unsigned long) &first_frag->fr_literal; | |
2619 | ||
b5e0fabd | 2620 | if (! before_relax) |
73f20958 | 2621 | { |
b5e0fabd JW |
2622 | /* We can get the final addresses only during and after |
2623 | relaxation. */ | |
73f20958 L |
2624 | if (first_frag->fr_next && first_frag->fr_next->fr_address) |
2625 | index += 3 * ((first_frag->fr_next->fr_address | |
2626 | - first_frag->fr_address | |
2627 | - first_frag->fr_fix) >> 4); | |
2628 | } | |
2629 | else | |
2630 | /* We don't know what the final addresses will be. We try our | |
2631 | best to estimate. */ | |
2632 | switch (first_frag->fr_type) | |
2633 | { | |
2634 | default: | |
2635 | break; | |
2636 | ||
2637 | case rs_space: | |
2638 | as_fatal ("only constant space allocation is supported"); | |
2639 | break; | |
2640 | ||
2641 | case rs_align: | |
2642 | case rs_align_code: | |
2643 | case rs_align_test: | |
2644 | /* Take alignment into account. Assume the worst case | |
2645 | before relaxation. */ | |
2646 | index += 3 * ((1 << first_frag->fr_offset) >> 4); | |
2647 | break; | |
2648 | ||
2649 | case rs_org: | |
2650 | if (first_frag->fr_symbol) | |
2651 | { | |
2652 | as_fatal ("only constant offsets are supported"); | |
2653 | break; | |
2654 | } | |
2655 | case rs_fill: | |
2656 | index += 3 * (first_frag->fr_offset >> 4); | |
2657 | break; | |
2658 | } | |
2659 | ||
f5a30c2e JW |
2660 | /* Add in the full size of the frag converted to instruction slots. */ |
2661 | index += 3 * (first_frag->fr_fix >> 4); | |
2662 | /* Subtract away the initial part before first_addr. */ | |
2663 | index -= (3 * ((first_addr >> 4) - (start_addr >> 4)) | |
2664 | + ((first_addr & 0x3) - (start_addr & 0x3))); | |
e0c9811a | 2665 | |
f5a30c2e JW |
2666 | /* Move to the beginning of the next frag. */ |
2667 | first_frag = first_frag->fr_next; | |
2668 | first_addr = (unsigned long) &first_frag->fr_literal; | |
2669 | } | |
2670 | ||
2671 | /* Add in the used part of the last frag. */ | |
2672 | index += (3 * ((slot_addr >> 4) - (first_addr >> 4)) | |
2673 | + ((slot_addr & 0x3) - (first_addr & 0x3))); | |
2674 | return index; | |
2675 | } | |
4a1805b1 | 2676 | |
91a2ae2a RH |
2677 | /* Optimize unwind record directives. */ |
2678 | ||
2679 | static unw_rec_list * | |
2680 | optimize_unw_records (list) | |
2681 | unw_rec_list *list; | |
2682 | { | |
2683 | if (!list) | |
2684 | return NULL; | |
2685 | ||
2686 | /* If the only unwind record is ".prologue" or ".prologue" followed | |
2687 | by ".body", then we can optimize the unwind directives away. */ | |
2688 | if (list->r.type == prologue | |
5738bc24 JW |
2689 | && (list->next->r.type == endp |
2690 | || (list->next->r.type == body && list->next->next->r.type == endp))) | |
91a2ae2a RH |
2691 | return NULL; |
2692 | ||
2693 | return list; | |
2694 | } | |
2695 | ||
800eeca4 JW |
2696 | /* Given a complete record list, process any records which have |
2697 | unresolved fields, (ie length counts for a prologue). After | |
0234cb7c | 2698 | this has been run, all necessary information should be available |
800eeca4 | 2699 | within each record to generate an image. */ |
542d6675 | 2700 | |
800eeca4 | 2701 | static void |
b5e0fabd | 2702 | fixup_unw_records (list, before_relax) |
800eeca4 | 2703 | unw_rec_list *list; |
b5e0fabd | 2704 | int before_relax; |
800eeca4 | 2705 | { |
e0c9811a JW |
2706 | unw_rec_list *ptr, *region = 0; |
2707 | unsigned long first_addr = 0, rlen = 0, t; | |
f5a30c2e | 2708 | fragS *first_frag = 0; |
e0c9811a | 2709 | |
800eeca4 JW |
2710 | for (ptr = list; ptr; ptr = ptr->next) |
2711 | { | |
2712 | if (ptr->slot_number == SLOT_NUM_NOT_SET) | |
542d6675 | 2713 | as_bad (" Insn slot not set in unwind record."); |
f5a30c2e | 2714 | t = slot_index (ptr->slot_number, ptr->slot_frag, |
b5e0fabd | 2715 | first_addr, first_frag, before_relax); |
800eeca4 JW |
2716 | switch (ptr->r.type) |
2717 | { | |
542d6675 KH |
2718 | case prologue: |
2719 | case prologue_gr: | |
2720 | case body: | |
2721 | { | |
2722 | unw_rec_list *last; | |
5738bc24 JW |
2723 | int size; |
2724 | unsigned long last_addr = 0; | |
2725 | fragS *last_frag = NULL; | |
542d6675 KH |
2726 | |
2727 | first_addr = ptr->slot_number; | |
f5a30c2e | 2728 | first_frag = ptr->slot_frag; |
542d6675 | 2729 | /* Find either the next body/prologue start, or the end of |
5738bc24 | 2730 | the function, and determine the size of the region. */ |
542d6675 KH |
2731 | for (last = ptr->next; last != NULL; last = last->next) |
2732 | if (last->r.type == prologue || last->r.type == prologue_gr | |
5738bc24 | 2733 | || last->r.type == body || last->r.type == endp) |
542d6675 KH |
2734 | { |
2735 | last_addr = last->slot_number; | |
f5a30c2e | 2736 | last_frag = last->slot_frag; |
542d6675 KH |
2737 | break; |
2738 | } | |
b5e0fabd JW |
2739 | size = slot_index (last_addr, last_frag, first_addr, first_frag, |
2740 | before_relax); | |
542d6675 | 2741 | rlen = ptr->r.record.r.rlen = size; |
1e16b528 AS |
2742 | if (ptr->r.type == body) |
2743 | /* End of region. */ | |
2744 | region = 0; | |
2745 | else | |
2746 | region = ptr; | |
e0c9811a | 2747 | break; |
542d6675 KH |
2748 | } |
2749 | case epilogue: | |
2750 | ptr->r.record.b.t = rlen - 1 - t; | |
2751 | break; | |
e0c9811a | 2752 | |
542d6675 KH |
2753 | case mem_stack_f: |
2754 | case mem_stack_v: | |
2755 | case rp_when: | |
2756 | case pfs_when: | |
2757 | case preds_when: | |
2758 | case unat_when: | |
2759 | case lc_when: | |
2760 | case fpsr_when: | |
2761 | case priunat_when_gr: | |
2762 | case priunat_when_mem: | |
2763 | case bsp_when: | |
2764 | case bspstore_when: | |
2765 | case rnat_when: | |
2766 | ptr->r.record.p.t = t; | |
2767 | break; | |
e0c9811a | 2768 | |
542d6675 KH |
2769 | case spill_reg: |
2770 | case spill_sprel: | |
2771 | case spill_psprel: | |
2772 | case spill_reg_p: | |
2773 | case spill_sprel_p: | |
2774 | case spill_psprel_p: | |
2775 | ptr->r.record.x.t = t; | |
2776 | break; | |
e0c9811a | 2777 | |
542d6675 KH |
2778 | case frgr_mem: |
2779 | if (!region) | |
2780 | { | |
2781 | as_bad ("frgr_mem record before region record!\n"); | |
2782 | return; | |
2783 | } | |
2784 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; | |
2785 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; | |
2786 | set_imask (region, ptr->r.record.p.frmask, t, 1); | |
2787 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2788 | break; | |
2789 | case fr_mem: | |
2790 | if (!region) | |
2791 | { | |
2792 | as_bad ("fr_mem record before region record!\n"); | |
2793 | return; | |
2794 | } | |
2795 | region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask; | |
2796 | set_imask (region, ptr->r.record.p.rmask, t, 1); | |
2797 | break; | |
2798 | case gr_mem: | |
2799 | if (!region) | |
2800 | { | |
2801 | as_bad ("gr_mem record before region record!\n"); | |
2802 | return; | |
2803 | } | |
2804 | region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask; | |
2805 | set_imask (region, ptr->r.record.p.rmask, t, 2); | |
2806 | break; | |
2807 | case br_mem: | |
2808 | if (!region) | |
2809 | { | |
2810 | as_bad ("br_mem record before region record!\n"); | |
2811 | return; | |
2812 | } | |
2813 | region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask; | |
2814 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2815 | break; | |
e0c9811a | 2816 | |
542d6675 KH |
2817 | case gr_gr: |
2818 | if (!region) | |
2819 | { | |
2820 | as_bad ("gr_gr record before region record!\n"); | |
2821 | return; | |
2822 | } | |
2823 | set_imask (region, ptr->r.record.p.grmask, t, 2); | |
2824 | break; | |
2825 | case br_gr: | |
2826 | if (!region) | |
2827 | { | |
2828 | as_bad ("br_gr record before region record!\n"); | |
2829 | return; | |
2830 | } | |
2831 | set_imask (region, ptr->r.record.p.brmask, t, 3); | |
2832 | break; | |
e0c9811a | 2833 | |
542d6675 KH |
2834 | default: |
2835 | break; | |
800eeca4 JW |
2836 | } |
2837 | } | |
2838 | } | |
2839 | ||
b5e0fabd JW |
2840 | /* Estimate the size of a frag before relaxing. We only have one type of frag |
2841 | to handle here, which is the unwind info frag. */ | |
2842 | ||
2843 | int | |
2844 | ia64_estimate_size_before_relax (fragS *frag, | |
2845 | asection *segtype ATTRIBUTE_UNUSED) | |
2846 | { | |
2847 | unw_rec_list *list; | |
2848 | int len, size, pad; | |
2849 | ||
2850 | /* ??? This code is identical to the first part of ia64_convert_frag. */ | |
2851 | list = (unw_rec_list *) frag->fr_opcode; | |
2852 | fixup_unw_records (list, 0); | |
2853 | ||
2854 | len = calc_record_size (list); | |
2855 | /* pad to pointer-size boundary. */ | |
2856 | pad = len % md.pointer_size; | |
2857 | if (pad != 0) | |
2858 | len += md.pointer_size - pad; | |
2859 | /* Add 8 for the header + a pointer for the personality offset. */ | |
2860 | size = len + 8 + md.pointer_size; | |
2861 | ||
2862 | /* fr_var carries the max_chars that we created the fragment with. | |
2863 | We must, of course, have allocated enough memory earlier. */ | |
2864 | assert (frag->fr_var >= size); | |
2865 | ||
2866 | return frag->fr_fix + size; | |
2867 | } | |
2868 | ||
73f20958 L |
2869 | /* This function converts a rs_machine_dependent variant frag into a |
2870 | normal fill frag with the unwind image from the the record list. */ | |
2871 | void | |
2872 | ia64_convert_frag (fragS *frag) | |
557debba | 2873 | { |
73f20958 L |
2874 | unw_rec_list *list; |
2875 | int len, size, pad; | |
1cd8ff38 | 2876 | valueT flag_value; |
557debba | 2877 | |
b5e0fabd | 2878 | /* ??? This code is identical to ia64_estimate_size_before_relax. */ |
73f20958 | 2879 | list = (unw_rec_list *) frag->fr_opcode; |
b5e0fabd | 2880 | fixup_unw_records (list, 0); |
1cd8ff38 | 2881 | |
73f20958 L |
2882 | len = calc_record_size (list); |
2883 | /* pad to pointer-size boundary. */ | |
2884 | pad = len % md.pointer_size; | |
2885 | if (pad != 0) | |
2886 | len += md.pointer_size - pad; | |
2887 | /* Add 8 for the header + a pointer for the personality offset. */ | |
2888 | size = len + 8 + md.pointer_size; | |
2889 | ||
2890 | /* fr_var carries the max_chars that we created the fragment with. | |
2891 | We must, of course, have allocated enough memory earlier. */ | |
2892 | assert (frag->fr_var >= size); | |
2893 | ||
2894 | /* Initialize the header area. fr_offset is initialized with | |
2895 | unwind.personality_routine. */ | |
2896 | if (frag->fr_offset) | |
1cd8ff38 NC |
2897 | { |
2898 | if (md.flags & EF_IA_64_ABI64) | |
2899 | flag_value = (bfd_vma) 3 << 32; | |
2900 | else | |
2901 | /* 32-bit unwind info block. */ | |
2902 | flag_value = (bfd_vma) 0x1003 << 32; | |
2903 | } | |
2904 | else | |
2905 | flag_value = 0; | |
557debba | 2906 | |
73f20958 L |
2907 | md_number_to_chars (frag->fr_literal, |
2908 | (((bfd_vma) 1 << 48) /* Version. */ | |
2909 | | flag_value /* U & E handler flags. */ | |
2910 | | (len / md.pointer_size)), /* Length. */ | |
2911 | 8); | |
557debba | 2912 | |
73f20958 L |
2913 | /* Skip the header. */ |
2914 | vbyte_mem_ptr = frag->fr_literal + 8; | |
2915 | process_unw_records (list, output_vbyte_mem); | |
d6e78c11 JW |
2916 | |
2917 | /* Fill the padding bytes with zeros. */ | |
2918 | if (pad != 0) | |
2919 | md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0, | |
2920 | md.pointer_size - pad); | |
2921 | ||
73f20958 L |
2922 | frag->fr_fix += size; |
2923 | frag->fr_type = rs_fill; | |
2924 | frag->fr_var = 0; | |
2925 | frag->fr_offset = 0; | |
800eeca4 JW |
2926 | } |
2927 | ||
e0c9811a JW |
2928 | static int |
2929 | convert_expr_to_ab_reg (e, ab, regp) | |
2930 | expressionS *e; | |
2931 | unsigned int *ab; | |
2932 | unsigned int *regp; | |
2933 | { | |
2934 | unsigned int reg; | |
2935 | ||
2936 | if (e->X_op != O_register) | |
2937 | return 0; | |
2938 | ||
2939 | reg = e->X_add_number; | |
2434f565 | 2940 | if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7)) |
e0c9811a JW |
2941 | { |
2942 | *ab = 0; | |
2943 | *regp = reg - REG_GR; | |
2944 | } | |
2434f565 JW |
2945 | else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5)) |
2946 | || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31))) | |
e0c9811a JW |
2947 | { |
2948 | *ab = 1; | |
2949 | *regp = reg - REG_FR; | |
2950 | } | |
2434f565 | 2951 | else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5)) |
e0c9811a JW |
2952 | { |
2953 | *ab = 2; | |
2954 | *regp = reg - REG_BR; | |
2955 | } | |
2956 | else | |
2957 | { | |
2958 | *ab = 3; | |
2959 | switch (reg) | |
2960 | { | |
2961 | case REG_PR: *regp = 0; break; | |
2962 | case REG_PSP: *regp = 1; break; | |
2963 | case REG_PRIUNAT: *regp = 2; break; | |
2964 | case REG_BR + 0: *regp = 3; break; | |
2965 | case REG_AR + AR_BSP: *regp = 4; break; | |
2966 | case REG_AR + AR_BSPSTORE: *regp = 5; break; | |
2967 | case REG_AR + AR_RNAT: *regp = 6; break; | |
2968 | case REG_AR + AR_UNAT: *regp = 7; break; | |
2969 | case REG_AR + AR_FPSR: *regp = 8; break; | |
2970 | case REG_AR + AR_PFS: *regp = 9; break; | |
2971 | case REG_AR + AR_LC: *regp = 10; break; | |
2972 | ||
2973 | default: | |
2974 | return 0; | |
2975 | } | |
2976 | } | |
2977 | return 1; | |
197865e8 | 2978 | } |
e0c9811a JW |
2979 | |
2980 | static int | |
2981 | convert_expr_to_xy_reg (e, xy, regp) | |
2982 | expressionS *e; | |
2983 | unsigned int *xy; | |
2984 | unsigned int *regp; | |
2985 | { | |
2986 | unsigned int reg; | |
2987 | ||
2988 | if (e->X_op != O_register) | |
2989 | return 0; | |
2990 | ||
2991 | reg = e->X_add_number; | |
2992 | ||
2434f565 | 2993 | if (/* reg >= REG_GR && */ reg <= (REG_GR + 127)) |
e0c9811a JW |
2994 | { |
2995 | *xy = 0; | |
2996 | *regp = reg - REG_GR; | |
2997 | } | |
2434f565 | 2998 | else if (reg >= REG_FR && reg <= (REG_FR + 127)) |
e0c9811a JW |
2999 | { |
3000 | *xy = 1; | |
3001 | *regp = reg - REG_FR; | |
3002 | } | |
2434f565 | 3003 | else if (reg >= REG_BR && reg <= (REG_BR + 7)) |
e0c9811a JW |
3004 | { |
3005 | *xy = 2; | |
3006 | *regp = reg - REG_BR; | |
3007 | } | |
3008 | else | |
3009 | return -1; | |
3010 | return 1; | |
197865e8 | 3011 | } |
e0c9811a | 3012 | |
d9201763 L |
3013 | static void |
3014 | dot_align (int arg) | |
3015 | { | |
3016 | /* The current frag is an alignment frag. */ | |
3017 | align_frag = frag_now; | |
3018 | s_align_bytes (arg); | |
3019 | } | |
3020 | ||
800eeca4 JW |
3021 | static void |
3022 | dot_radix (dummy) | |
2434f565 | 3023 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3024 | { |
3025 | int radix; | |
3026 | ||
3027 | SKIP_WHITESPACE (); | |
3028 | radix = *input_line_pointer++; | |
3029 | ||
3030 | if (radix != 'C' && !is_end_of_line[(unsigned char) radix]) | |
3031 | { | |
3032 | as_bad ("Radix `%c' unsupported", *input_line_pointer); | |
542d6675 | 3033 | ignore_rest_of_line (); |
800eeca4 JW |
3034 | return; |
3035 | } | |
3036 | } | |
3037 | ||
3038 | /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */ | |
3039 | static void | |
3040 | dot_special_section (which) | |
3041 | int which; | |
3042 | { | |
3043 | set_section ((char *) special_section_name[which]); | |
3044 | } | |
3045 | ||
3046 | static void | |
3047 | add_unwind_entry (ptr) | |
3048 | unw_rec_list *ptr; | |
3049 | { | |
e0c9811a JW |
3050 | if (unwind.tail) |
3051 | unwind.tail->next = ptr; | |
800eeca4 | 3052 | else |
e0c9811a JW |
3053 | unwind.list = ptr; |
3054 | unwind.tail = ptr; | |
800eeca4 JW |
3055 | |
3056 | /* The current entry can in fact be a chain of unwind entries. */ | |
e0c9811a JW |
3057 | if (unwind.current_entry == NULL) |
3058 | unwind.current_entry = ptr; | |
800eeca4 JW |
3059 | } |
3060 | ||
197865e8 | 3061 | static void |
800eeca4 | 3062 | dot_fframe (dummy) |
2434f565 | 3063 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3064 | { |
3065 | expressionS e; | |
e0c9811a | 3066 | |
800eeca4 | 3067 | parse_operand (&e); |
197865e8 | 3068 | |
800eeca4 JW |
3069 | if (e.X_op != O_constant) |
3070 | as_bad ("Operand to .fframe must be a constant"); | |
3071 | else | |
e0c9811a JW |
3072 | add_unwind_entry (output_mem_stack_f (e.X_add_number)); |
3073 | } | |
3074 | ||
197865e8 | 3075 | static void |
e0c9811a | 3076 | dot_vframe (dummy) |
2434f565 | 3077 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3078 | { |
3079 | expressionS e; | |
3080 | unsigned reg; | |
3081 | ||
3082 | parse_operand (&e); | |
3083 | reg = e.X_add_number - REG_GR; | |
3084 | if (e.X_op == O_register && reg < 128) | |
800eeca4 | 3085 | { |
e0c9811a | 3086 | add_unwind_entry (output_mem_stack_v ()); |
30d25259 RH |
3087 | if (! (unwind.prologue_mask & 2)) |
3088 | add_unwind_entry (output_psp_gr (reg)); | |
800eeca4 | 3089 | } |
e0c9811a JW |
3090 | else |
3091 | as_bad ("First operand to .vframe must be a general register"); | |
800eeca4 JW |
3092 | } |
3093 | ||
197865e8 | 3094 | static void |
e0c9811a | 3095 | dot_vframesp (dummy) |
2434f565 | 3096 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3097 | { |
e0c9811a JW |
3098 | expressionS e; |
3099 | ||
3100 | parse_operand (&e); | |
3101 | if (e.X_op == O_constant) | |
3102 | { | |
3103 | add_unwind_entry (output_mem_stack_v ()); | |
3104 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3105 | } | |
3106 | else | |
69906a9b | 3107 | as_bad ("Operand to .vframesp must be a constant (sp-relative offset)"); |
e0c9811a JW |
3108 | } |
3109 | ||
197865e8 | 3110 | static void |
e0c9811a | 3111 | dot_vframepsp (dummy) |
2434f565 | 3112 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3113 | { |
3114 | expressionS e; | |
3115 | ||
3116 | parse_operand (&e); | |
3117 | if (e.X_op == O_constant) | |
3118 | { | |
3119 | add_unwind_entry (output_mem_stack_v ()); | |
3120 | add_unwind_entry (output_psp_sprel (e.X_add_number)); | |
3121 | } | |
3122 | else | |
69906a9b | 3123 | as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)"); |
800eeca4 JW |
3124 | } |
3125 | ||
197865e8 | 3126 | static void |
800eeca4 | 3127 | dot_save (dummy) |
2434f565 | 3128 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3129 | { |
3130 | expressionS e1, e2; | |
3131 | int sep; | |
3132 | int reg1, reg2; | |
3133 | ||
3134 | sep = parse_operand (&e1); | |
3135 | if (sep != ',') | |
3136 | as_bad ("No second operand to .save"); | |
3137 | sep = parse_operand (&e2); | |
3138 | ||
e0c9811a | 3139 | reg1 = e1.X_add_number; |
800eeca4 | 3140 | reg2 = e2.X_add_number - REG_GR; |
197865e8 | 3141 | |
800eeca4 | 3142 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3143 | if (e1.X_op == O_register) |
800eeca4 | 3144 | { |
542d6675 | 3145 | if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128) |
800eeca4 JW |
3146 | { |
3147 | switch (reg1) | |
3148 | { | |
542d6675 KH |
3149 | case REG_AR + AR_BSP: |
3150 | add_unwind_entry (output_bsp_when ()); | |
3151 | add_unwind_entry (output_bsp_gr (reg2)); | |
3152 | break; | |
3153 | case REG_AR + AR_BSPSTORE: | |
3154 | add_unwind_entry (output_bspstore_when ()); | |
3155 | add_unwind_entry (output_bspstore_gr (reg2)); | |
3156 | break; | |
3157 | case REG_AR + AR_RNAT: | |
3158 | add_unwind_entry (output_rnat_when ()); | |
3159 | add_unwind_entry (output_rnat_gr (reg2)); | |
3160 | break; | |
3161 | case REG_AR + AR_UNAT: | |
3162 | add_unwind_entry (output_unat_when ()); | |
3163 | add_unwind_entry (output_unat_gr (reg2)); | |
3164 | break; | |
3165 | case REG_AR + AR_FPSR: | |
3166 | add_unwind_entry (output_fpsr_when ()); | |
3167 | add_unwind_entry (output_fpsr_gr (reg2)); | |
3168 | break; | |
3169 | case REG_AR + AR_PFS: | |
3170 | add_unwind_entry (output_pfs_when ()); | |
3171 | if (! (unwind.prologue_mask & 4)) | |
3172 | add_unwind_entry (output_pfs_gr (reg2)); | |
3173 | break; | |
3174 | case REG_AR + AR_LC: | |
3175 | add_unwind_entry (output_lc_when ()); | |
3176 | add_unwind_entry (output_lc_gr (reg2)); | |
3177 | break; | |
3178 | case REG_BR: | |
3179 | add_unwind_entry (output_rp_when ()); | |
3180 | if (! (unwind.prologue_mask & 8)) | |
3181 | add_unwind_entry (output_rp_gr (reg2)); | |
3182 | break; | |
3183 | case REG_PR: | |
3184 | add_unwind_entry (output_preds_when ()); | |
3185 | if (! (unwind.prologue_mask & 1)) | |
3186 | add_unwind_entry (output_preds_gr (reg2)); | |
3187 | break; | |
3188 | case REG_PRIUNAT: | |
3189 | add_unwind_entry (output_priunat_when_gr ()); | |
3190 | add_unwind_entry (output_priunat_gr (reg2)); | |
3191 | break; | |
3192 | default: | |
3193 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3194 | } |
3195 | } | |
3196 | else | |
3197 | as_bad (" Second operand not a valid register"); | |
3198 | } | |
3199 | else | |
e0c9811a | 3200 | as_bad ("First operand not a register"); |
800eeca4 JW |
3201 | } |
3202 | ||
197865e8 | 3203 | static void |
800eeca4 | 3204 | dot_restore (dummy) |
2434f565 | 3205 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3206 | { |
e0c9811a | 3207 | expressionS e1, e2; |
33d01f33 | 3208 | unsigned long ecount; /* # of _additional_ regions to pop */ |
e0c9811a JW |
3209 | int sep; |
3210 | ||
3211 | sep = parse_operand (&e1); | |
3212 | if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12) | |
3213 | { | |
3214 | as_bad ("First operand to .restore must be stack pointer (sp)"); | |
3215 | return; | |
3216 | } | |
3217 | ||
3218 | if (sep == ',') | |
3219 | { | |
3220 | parse_operand (&e2); | |
33d01f33 | 3221 | if (e2.X_op != O_constant || e2.X_add_number < 0) |
e0c9811a | 3222 | { |
33d01f33 | 3223 | as_bad ("Second operand to .restore must be a constant >= 0"); |
e0c9811a JW |
3224 | return; |
3225 | } | |
33d01f33 | 3226 | ecount = e2.X_add_number; |
e0c9811a | 3227 | } |
33d01f33 JW |
3228 | else |
3229 | ecount = unwind.prologue_count - 1; | |
6290819d NC |
3230 | |
3231 | if (ecount >= unwind.prologue_count) | |
3232 | { | |
3233 | as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)", | |
3234 | ecount + 1, unwind.prologue_count); | |
3235 | return; | |
3236 | } | |
3237 | ||
e0c9811a | 3238 | add_unwind_entry (output_epilogue (ecount)); |
33d01f33 JW |
3239 | |
3240 | if (ecount < unwind.prologue_count) | |
3241 | unwind.prologue_count -= ecount + 1; | |
3242 | else | |
3243 | unwind.prologue_count = 0; | |
e0c9811a JW |
3244 | } |
3245 | ||
197865e8 | 3246 | static void |
e0c9811a | 3247 | dot_restorereg (dummy) |
2434f565 | 3248 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3249 | { |
3250 | unsigned int ab, reg; | |
3251 | expressionS e; | |
3252 | ||
3253 | parse_operand (&e); | |
3254 | ||
3255 | if (!convert_expr_to_ab_reg (&e, &ab, ®)) | |
3256 | { | |
3257 | as_bad ("First operand to .restorereg must be a preserved register"); | |
3258 | return; | |
3259 | } | |
3260 | add_unwind_entry (output_spill_reg (ab, reg, 0, 0)); | |
3261 | } | |
3262 | ||
197865e8 | 3263 | static void |
e0c9811a | 3264 | dot_restorereg_p (dummy) |
2434f565 | 3265 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3266 | { |
3267 | unsigned int qp, ab, reg; | |
3268 | expressionS e1, e2; | |
3269 | int sep; | |
3270 | ||
3271 | sep = parse_operand (&e1); | |
3272 | if (sep != ',') | |
3273 | { | |
3274 | as_bad ("No second operand to .restorereg.p"); | |
3275 | return; | |
3276 | } | |
3277 | ||
3278 | parse_operand (&e2); | |
3279 | ||
3280 | qp = e1.X_add_number - REG_P; | |
3281 | if (e1.X_op != O_register || qp > 63) | |
3282 | { | |
3283 | as_bad ("First operand to .restorereg.p must be a predicate"); | |
3284 | return; | |
3285 | } | |
3286 | ||
3287 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3288 | { | |
3289 | as_bad ("Second operand to .restorereg.p must be a preserved register"); | |
3290 | return; | |
3291 | } | |
3292 | add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp)); | |
800eeca4 JW |
3293 | } |
3294 | ||
2d6ed997 L |
3295 | static char *special_linkonce_name[] = |
3296 | { | |
3297 | ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi." | |
3298 | }; | |
3299 | ||
3300 | static void | |
d6afba4b | 3301 | start_unwind_section (const segT text_seg, int sec_index, int linkonce_empty) |
2d6ed997 L |
3302 | { |
3303 | /* | |
3304 | Use a slightly ugly scheme to derive the unwind section names from | |
3305 | the text section name: | |
3306 | ||
3307 | text sect. unwind table sect. | |
3308 | name: name: comments: | |
3309 | ---------- ----------------- -------------------------------- | |
3310 | .text .IA_64.unwind | |
3311 | .text.foo .IA_64.unwind.text.foo | |
3312 | .foo .IA_64.unwind.foo | |
3313 | .gnu.linkonce.t.foo | |
3314 | .gnu.linkonce.ia64unw.foo | |
3315 | _info .IA_64.unwind_info gas issues error message (ditto) | |
3316 | _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto) | |
3317 | ||
3318 | This mapping is done so that: | |
3319 | ||
3320 | (a) An object file with unwind info only in .text will use | |
3321 | unwind section names .IA_64.unwind and .IA_64.unwind_info. | |
3322 | This follows the letter of the ABI and also ensures backwards | |
3323 | compatibility with older toolchains. | |
3324 | ||
3325 | (b) An object file with unwind info in multiple text sections | |
3326 | will use separate unwind sections for each text section. | |
3327 | This allows us to properly set the "sh_info" and "sh_link" | |
3328 | fields in SHT_IA_64_UNWIND as required by the ABI and also | |
3329 | lets GNU ld support programs with multiple segments | |
3330 | containing unwind info (as might be the case for certain | |
3331 | embedded applications). | |
3332 | ||
3333 | (c) An error is issued if there would be a name clash. | |
3334 | */ | |
3335 | ||
3336 | const char *text_name, *sec_text_name; | |
3337 | char *sec_name; | |
3338 | const char *prefix = special_section_name [sec_index]; | |
3339 | const char *suffix; | |
3340 | size_t prefix_len, suffix_len, sec_name_len; | |
3341 | ||
3342 | sec_text_name = segment_name (text_seg); | |
3343 | text_name = sec_text_name; | |
3344 | if (strncmp (text_name, "_info", 5) == 0) | |
3345 | { | |
3346 | as_bad ("Illegal section name `%s' (causes unwind section name clash)", | |
3347 | text_name); | |
3348 | ignore_rest_of_line (); | |
3349 | return; | |
3350 | } | |
3351 | if (strcmp (text_name, ".text") == 0) | |
3352 | text_name = ""; | |
3353 | ||
3354 | /* Build the unwind section name by appending the (possibly stripped) | |
3355 | text section name to the unwind prefix. */ | |
3356 | suffix = text_name; | |
3357 | if (strncmp (text_name, ".gnu.linkonce.t.", | |
3358 | sizeof (".gnu.linkonce.t.") - 1) == 0) | |
3359 | { | |
3360 | prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND]; | |
3361 | suffix += sizeof (".gnu.linkonce.t.") - 1; | |
3362 | } | |
d6afba4b JJ |
3363 | else if (linkonce_empty) |
3364 | return; | |
2d6ed997 L |
3365 | |
3366 | prefix_len = strlen (prefix); | |
3367 | suffix_len = strlen (suffix); | |
3368 | sec_name_len = prefix_len + suffix_len; | |
3369 | sec_name = alloca (sec_name_len + 1); | |
3370 | memcpy (sec_name, prefix, prefix_len); | |
3371 | memcpy (sec_name + prefix_len, suffix, suffix_len); | |
3372 | sec_name [sec_name_len] = '\0'; | |
3373 | ||
3374 | /* Handle COMDAT group. */ | |
3375 | if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0) | |
3376 | { | |
3377 | char *section; | |
3378 | size_t len, group_name_len; | |
3379 | const char *group_name = elf_group_name (text_seg); | |
3380 | ||
3381 | if (group_name == NULL) | |
3382 | { | |
3383 | as_bad ("Group section `%s' has no group signature", | |
3384 | sec_text_name); | |
3385 | ignore_rest_of_line (); | |
3386 | return; | |
3387 | } | |
3388 | /* We have to construct a fake section directive. */ | |
3389 | group_name_len = strlen (group_name); | |
3390 | len = (sec_name_len | |
3391 | + 16 /* ,"aG",@progbits, */ | |
3392 | + group_name_len /* ,group_name */ | |
3393 | + 7); /* ,comdat */ | |
3394 | ||
3395 | section = alloca (len + 1); | |
3396 | memcpy (section, sec_name, sec_name_len); | |
3397 | memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16); | |
3398 | memcpy (section + sec_name_len + 16, group_name, group_name_len); | |
3399 | memcpy (section + len - 7, ",comdat", 7); | |
3400 | section [len] = '\0'; | |
3401 | set_section (section); | |
3402 | } | |
3403 | else | |
3404 | { | |
3405 | set_section (sec_name); | |
3406 | bfd_set_section_flags (stdoutput, now_seg, | |
3407 | SEC_LOAD | SEC_ALLOC | SEC_READONLY); | |
3408 | } | |
38ce5b11 L |
3409 | |
3410 | elf_linked_to_section (now_seg) = text_seg; | |
2d6ed997 L |
3411 | } |
3412 | ||
73f20958 | 3413 | static void |
2d6ed997 | 3414 | generate_unwind_image (const segT text_seg) |
800eeca4 | 3415 | { |
73f20958 L |
3416 | int size, pad; |
3417 | unw_rec_list *list; | |
800eeca4 | 3418 | |
c97b7ef6 JW |
3419 | /* Mark the end of the unwind info, so that we can compute the size of the |
3420 | last unwind region. */ | |
3421 | add_unwind_entry (output_endp ()); | |
3422 | ||
10850f29 JW |
3423 | /* Force out pending instructions, to make sure all unwind records have |
3424 | a valid slot_number field. */ | |
3425 | ia64_flush_insns (); | |
3426 | ||
800eeca4 | 3427 | /* Generate the unwind record. */ |
73f20958 | 3428 | list = optimize_unw_records (unwind.list); |
b5e0fabd | 3429 | fixup_unw_records (list, 1); |
73f20958 L |
3430 | size = calc_record_size (list); |
3431 | ||
3432 | if (size > 0 || unwind.force_unwind_entry) | |
3433 | { | |
3434 | unwind.force_unwind_entry = 0; | |
3435 | /* pad to pointer-size boundary. */ | |
3436 | pad = size % md.pointer_size; | |
3437 | if (pad != 0) | |
3438 | size += md.pointer_size - pad; | |
3439 | /* Add 8 for the header + a pointer for the personality | |
3440 | offset. */ | |
3441 | size += 8 + md.pointer_size; | |
3442 | } | |
6290819d | 3443 | |
800eeca4 JW |
3444 | /* If there are unwind records, switch sections, and output the info. */ |
3445 | if (size != 0) | |
3446 | { | |
800eeca4 | 3447 | expressionS exp; |
1cd8ff38 | 3448 | bfd_reloc_code_real_type reloc; |
91a2ae2a | 3449 | |
d6afba4b | 3450 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 0); |
800eeca4 | 3451 | |
557debba JW |
3452 | /* Make sure the section has 4 byte alignment for ILP32 and |
3453 | 8 byte alignment for LP64. */ | |
3454 | frag_align (md.pointer_size_shift, 0, 0); | |
3455 | record_alignment (now_seg, md.pointer_size_shift); | |
5e7474a7 | 3456 | |
800eeca4 | 3457 | /* Set expression which points to start of unwind descriptor area. */ |
e0c9811a | 3458 | unwind.info = expr_build_dot (); |
73f20958 L |
3459 | |
3460 | frag_var (rs_machine_dependent, size, size, 0, 0, | |
652ca075 L |
3461 | (offsetT) (long) unwind.personality_routine, |
3462 | (char *) list); | |
91a2ae2a | 3463 | |
800eeca4 | 3464 | /* Add the personality address to the image. */ |
e0c9811a | 3465 | if (unwind.personality_routine != 0) |
542d6675 | 3466 | { |
40449e9f | 3467 | exp.X_op = O_symbol; |
e0c9811a | 3468 | exp.X_add_symbol = unwind.personality_routine; |
800eeca4 | 3469 | exp.X_add_number = 0; |
1cd8ff38 NC |
3470 | |
3471 | if (md.flags & EF_IA_64_BE) | |
3472 | { | |
3473 | if (md.flags & EF_IA_64_ABI64) | |
3474 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB; | |
3475 | else | |
3476 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB; | |
3477 | } | |
40449e9f | 3478 | else |
1cd8ff38 NC |
3479 | { |
3480 | if (md.flags & EF_IA_64_ABI64) | |
3481 | reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB; | |
3482 | else | |
3483 | reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB; | |
3484 | } | |
3485 | ||
3486 | fix_new_exp (frag_now, frag_now_fix () - md.pointer_size, | |
40449e9f | 3487 | md.pointer_size, &exp, 0, reloc); |
e0c9811a | 3488 | unwind.personality_routine = 0; |
542d6675 | 3489 | } |
800eeca4 | 3490 | } |
d6afba4b JJ |
3491 | else |
3492 | start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 1); | |
800eeca4 | 3493 | |
6290819d | 3494 | free_saved_prologue_counts (); |
e0c9811a | 3495 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
800eeca4 JW |
3496 | } |
3497 | ||
197865e8 | 3498 | static void |
542d6675 | 3499 | dot_handlerdata (dummy) |
2434f565 | 3500 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3501 | { |
91a2ae2a RH |
3502 | unwind.force_unwind_entry = 1; |
3503 | ||
3504 | /* Remember which segment we're in so we can switch back after .endp */ | |
3505 | unwind.saved_text_seg = now_seg; | |
3506 | unwind.saved_text_subseg = now_subseg; | |
3507 | ||
3508 | /* Generate unwind info into unwind-info section and then leave that | |
3509 | section as the currently active one so dataXX directives go into | |
3510 | the language specific data area of the unwind info block. */ | |
2d6ed997 | 3511 | generate_unwind_image (now_seg); |
e0c9811a | 3512 | demand_empty_rest_of_line (); |
800eeca4 JW |
3513 | } |
3514 | ||
197865e8 | 3515 | static void |
800eeca4 | 3516 | dot_unwentry (dummy) |
2434f565 | 3517 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3518 | { |
91a2ae2a | 3519 | unwind.force_unwind_entry = 1; |
e0c9811a | 3520 | demand_empty_rest_of_line (); |
800eeca4 JW |
3521 | } |
3522 | ||
197865e8 | 3523 | static void |
800eeca4 | 3524 | dot_altrp (dummy) |
2434f565 | 3525 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3526 | { |
e0c9811a JW |
3527 | expressionS e; |
3528 | unsigned reg; | |
3529 | ||
3530 | parse_operand (&e); | |
3531 | reg = e.X_add_number - REG_BR; | |
3532 | if (e.X_op == O_register && reg < 8) | |
3533 | add_unwind_entry (output_rp_br (reg)); | |
3534 | else | |
3535 | as_bad ("First operand not a valid branch register"); | |
800eeca4 JW |
3536 | } |
3537 | ||
197865e8 | 3538 | static void |
e0c9811a JW |
3539 | dot_savemem (psprel) |
3540 | int psprel; | |
800eeca4 JW |
3541 | { |
3542 | expressionS e1, e2; | |
3543 | int sep; | |
3544 | int reg1, val; | |
3545 | ||
3546 | sep = parse_operand (&e1); | |
3547 | if (sep != ',') | |
e0c9811a | 3548 | as_bad ("No second operand to .save%ssp", psprel ? "p" : ""); |
800eeca4 JW |
3549 | sep = parse_operand (&e2); |
3550 | ||
e0c9811a | 3551 | reg1 = e1.X_add_number; |
800eeca4 | 3552 | val = e2.X_add_number; |
197865e8 | 3553 | |
800eeca4 | 3554 | /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ |
e0c9811a | 3555 | if (e1.X_op == O_register) |
800eeca4 JW |
3556 | { |
3557 | if (e2.X_op == O_constant) | |
3558 | { | |
3559 | switch (reg1) | |
3560 | { | |
542d6675 KH |
3561 | case REG_AR + AR_BSP: |
3562 | add_unwind_entry (output_bsp_when ()); | |
3563 | add_unwind_entry ((psprel | |
3564 | ? output_bsp_psprel | |
3565 | : output_bsp_sprel) (val)); | |
3566 | break; | |
3567 | case REG_AR + AR_BSPSTORE: | |
3568 | add_unwind_entry (output_bspstore_when ()); | |
3569 | add_unwind_entry ((psprel | |
3570 | ? output_bspstore_psprel | |
3571 | : output_bspstore_sprel) (val)); | |
3572 | break; | |
3573 | case REG_AR + AR_RNAT: | |
3574 | add_unwind_entry (output_rnat_when ()); | |
3575 | add_unwind_entry ((psprel | |
3576 | ? output_rnat_psprel | |
3577 | : output_rnat_sprel) (val)); | |
3578 | break; | |
3579 | case REG_AR + AR_UNAT: | |
3580 | add_unwind_entry (output_unat_when ()); | |
3581 | add_unwind_entry ((psprel | |
3582 | ? output_unat_psprel | |
3583 | : output_unat_sprel) (val)); | |
3584 | break; | |
3585 | case REG_AR + AR_FPSR: | |
3586 | add_unwind_entry (output_fpsr_when ()); | |
3587 | add_unwind_entry ((psprel | |
3588 | ? output_fpsr_psprel | |
3589 | : output_fpsr_sprel) (val)); | |
3590 | break; | |
3591 | case REG_AR + AR_PFS: | |
3592 | add_unwind_entry (output_pfs_when ()); | |
3593 | add_unwind_entry ((psprel | |
3594 | ? output_pfs_psprel | |
3595 | : output_pfs_sprel) (val)); | |
3596 | break; | |
3597 | case REG_AR + AR_LC: | |
3598 | add_unwind_entry (output_lc_when ()); | |
3599 | add_unwind_entry ((psprel | |
3600 | ? output_lc_psprel | |
3601 | : output_lc_sprel) (val)); | |
3602 | break; | |
3603 | case REG_BR: | |
3604 | add_unwind_entry (output_rp_when ()); | |
3605 | add_unwind_entry ((psprel | |
3606 | ? output_rp_psprel | |
3607 | : output_rp_sprel) (val)); | |
3608 | break; | |
3609 | case REG_PR: | |
3610 | add_unwind_entry (output_preds_when ()); | |
3611 | add_unwind_entry ((psprel | |
3612 | ? output_preds_psprel | |
3613 | : output_preds_sprel) (val)); | |
3614 | break; | |
3615 | case REG_PRIUNAT: | |
3616 | add_unwind_entry (output_priunat_when_mem ()); | |
3617 | add_unwind_entry ((psprel | |
3618 | ? output_priunat_psprel | |
3619 | : output_priunat_sprel) (val)); | |
3620 | break; | |
3621 | default: | |
3622 | as_bad ("First operand not a valid register"); | |
800eeca4 JW |
3623 | } |
3624 | } | |
3625 | else | |
3626 | as_bad (" Second operand not a valid constant"); | |
3627 | } | |
3628 | else | |
e0c9811a | 3629 | as_bad ("First operand not a register"); |
800eeca4 JW |
3630 | } |
3631 | ||
197865e8 | 3632 | static void |
800eeca4 | 3633 | dot_saveg (dummy) |
2434f565 | 3634 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3635 | { |
3636 | expressionS e1, e2; | |
3637 | int sep; | |
3638 | sep = parse_operand (&e1); | |
3639 | if (sep == ',') | |
3640 | parse_operand (&e2); | |
197865e8 | 3641 | |
800eeca4 JW |
3642 | if (e1.X_op != O_constant) |
3643 | as_bad ("First operand to .save.g must be a constant."); | |
3644 | else | |
3645 | { | |
3646 | int grmask = e1.X_add_number; | |
3647 | if (sep != ',') | |
3648 | add_unwind_entry (output_gr_mem (grmask)); | |
3649 | else | |
542d6675 | 3650 | { |
800eeca4 | 3651 | int reg = e2.X_add_number - REG_GR; |
542d6675 | 3652 | if (e2.X_op == O_register && reg >= 0 && reg < 128) |
800eeca4 JW |
3653 | add_unwind_entry (output_gr_gr (grmask, reg)); |
3654 | else | |
3655 | as_bad ("Second operand is an invalid register."); | |
3656 | } | |
3657 | } | |
3658 | } | |
3659 | ||
197865e8 | 3660 | static void |
800eeca4 | 3661 | dot_savef (dummy) |
2434f565 | 3662 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3663 | { |
e0c9811a | 3664 | expressionS e1; |
800eeca4 JW |
3665 | int sep; |
3666 | sep = parse_operand (&e1); | |
197865e8 | 3667 | |
800eeca4 JW |
3668 | if (e1.X_op != O_constant) |
3669 | as_bad ("Operand to .save.f must be a constant."); | |
3670 | else | |
e0c9811a | 3671 | add_unwind_entry (output_fr_mem (e1.X_add_number)); |
800eeca4 JW |
3672 | } |
3673 | ||
197865e8 | 3674 | static void |
800eeca4 | 3675 | dot_saveb (dummy) |
2434f565 | 3676 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 3677 | { |
e0c9811a JW |
3678 | expressionS e1, e2; |
3679 | unsigned int reg; | |
3680 | unsigned char sep; | |
3681 | int brmask; | |
3682 | ||
800eeca4 | 3683 | sep = parse_operand (&e1); |
800eeca4 | 3684 | if (e1.X_op != O_constant) |
800eeca4 | 3685 | { |
e0c9811a JW |
3686 | as_bad ("First operand to .save.b must be a constant."); |
3687 | return; | |
800eeca4 | 3688 | } |
e0c9811a JW |
3689 | brmask = e1.X_add_number; |
3690 | ||
3691 | if (sep == ',') | |
3692 | { | |
3693 | sep = parse_operand (&e2); | |
3694 | reg = e2.X_add_number - REG_GR; | |
3695 | if (e2.X_op != O_register || reg > 127) | |
3696 | { | |
3697 | as_bad ("Second operand to .save.b must be a general register."); | |
3698 | return; | |
3699 | } | |
3700 | add_unwind_entry (output_br_gr (brmask, e2.X_add_number)); | |
3701 | } | |
3702 | else | |
3703 | add_unwind_entry (output_br_mem (brmask)); | |
3704 | ||
3705 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 3706 | demand_empty_rest_of_line (); |
800eeca4 JW |
3707 | } |
3708 | ||
197865e8 | 3709 | static void |
800eeca4 | 3710 | dot_savegf (dummy) |
2434f565 | 3711 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3712 | { |
3713 | expressionS e1, e2; | |
3714 | int sep; | |
3715 | sep = parse_operand (&e1); | |
3716 | if (sep == ',') | |
3717 | parse_operand (&e2); | |
197865e8 | 3718 | |
800eeca4 JW |
3719 | if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant) |
3720 | as_bad ("Both operands of .save.gf must be constants."); | |
3721 | else | |
3722 | { | |
3723 | int grmask = e1.X_add_number; | |
3724 | int frmask = e2.X_add_number; | |
3725 | add_unwind_entry (output_frgr_mem (grmask, frmask)); | |
3726 | } | |
3727 | } | |
3728 | ||
197865e8 | 3729 | static void |
800eeca4 | 3730 | dot_spill (dummy) |
2434f565 | 3731 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
3732 | { |
3733 | expressionS e; | |
e0c9811a JW |
3734 | unsigned char sep; |
3735 | ||
3736 | sep = parse_operand (&e); | |
3737 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 3738 | demand_empty_rest_of_line (); |
197865e8 | 3739 | |
800eeca4 JW |
3740 | if (e.X_op != O_constant) |
3741 | as_bad ("Operand to .spill must be a constant"); | |
3742 | else | |
e0c9811a JW |
3743 | add_unwind_entry (output_spill_base (e.X_add_number)); |
3744 | } | |
3745 | ||
3746 | static void | |
3747 | dot_spillreg (dummy) | |
2434f565 | 3748 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3749 | { |
3750 | int sep, ab, xy, reg, treg; | |
3751 | expressionS e1, e2; | |
3752 | ||
3753 | sep = parse_operand (&e1); | |
3754 | if (sep != ',') | |
3755 | { | |
3756 | as_bad ("No second operand to .spillreg"); | |
3757 | return; | |
3758 | } | |
3759 | ||
3760 | parse_operand (&e2); | |
3761 | ||
3762 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
800eeca4 | 3763 | { |
e0c9811a JW |
3764 | as_bad ("First operand to .spillreg must be a preserved register"); |
3765 | return; | |
800eeca4 | 3766 | } |
e0c9811a JW |
3767 | |
3768 | if (!convert_expr_to_xy_reg (&e2, &xy, &treg)) | |
3769 | { | |
3770 | as_bad ("Second operand to .spillreg must be a register"); | |
3771 | return; | |
3772 | } | |
3773 | ||
3774 | add_unwind_entry (output_spill_reg (ab, reg, treg, xy)); | |
3775 | } | |
3776 | ||
3777 | static void | |
3778 | dot_spillmem (psprel) | |
3779 | int psprel; | |
3780 | { | |
3781 | expressionS e1, e2; | |
3782 | int sep, ab, reg; | |
3783 | ||
3784 | sep = parse_operand (&e1); | |
3785 | if (sep != ',') | |
3786 | { | |
3787 | as_bad ("Second operand missing"); | |
3788 | return; | |
3789 | } | |
3790 | ||
3791 | parse_operand (&e2); | |
3792 | ||
3793 | if (!convert_expr_to_ab_reg (&e1, &ab, ®)) | |
3794 | { | |
3795 | as_bad ("First operand to .spill%s must be a preserved register", | |
3796 | psprel ? "psp" : "sp"); | |
3797 | return; | |
3798 | } | |
3799 | ||
3800 | if (e2.X_op != O_constant) | |
3801 | { | |
3802 | as_bad ("Second operand to .spill%s must be a constant", | |
3803 | psprel ? "psp" : "sp"); | |
3804 | return; | |
3805 | } | |
3806 | ||
3807 | if (psprel) | |
3808 | add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number)); | |
3809 | else | |
3810 | add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number)); | |
3811 | } | |
3812 | ||
3813 | static void | |
3814 | dot_spillreg_p (dummy) | |
2434f565 | 3815 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3816 | { |
3817 | int sep, ab, xy, reg, treg; | |
3818 | expressionS e1, e2, e3; | |
3819 | unsigned int qp; | |
3820 | ||
3821 | sep = parse_operand (&e1); | |
3822 | if (sep != ',') | |
3823 | { | |
3824 | as_bad ("No second and third operand to .spillreg.p"); | |
3825 | return; | |
3826 | } | |
3827 | ||
3828 | sep = parse_operand (&e2); | |
3829 | if (sep != ',') | |
3830 | { | |
3831 | as_bad ("No third operand to .spillreg.p"); | |
3832 | return; | |
3833 | } | |
3834 | ||
3835 | parse_operand (&e3); | |
3836 | ||
3837 | qp = e1.X_add_number - REG_P; | |
3838 | ||
3839 | if (e1.X_op != O_register || qp > 63) | |
3840 | { | |
3841 | as_bad ("First operand to .spillreg.p must be a predicate"); | |
3842 | return; | |
3843 | } | |
3844 | ||
3845 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3846 | { | |
3847 | as_bad ("Second operand to .spillreg.p must be a preserved register"); | |
3848 | return; | |
3849 | } | |
3850 | ||
3851 | if (!convert_expr_to_xy_reg (&e3, &xy, &treg)) | |
3852 | { | |
3853 | as_bad ("Third operand to .spillreg.p must be a register"); | |
3854 | return; | |
3855 | } | |
3856 | ||
3857 | add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp)); | |
3858 | } | |
3859 | ||
3860 | static void | |
3861 | dot_spillmem_p (psprel) | |
3862 | int psprel; | |
3863 | { | |
3864 | expressionS e1, e2, e3; | |
3865 | int sep, ab, reg; | |
3866 | unsigned int qp; | |
3867 | ||
3868 | sep = parse_operand (&e1); | |
3869 | if (sep != ',') | |
3870 | { | |
3871 | as_bad ("Second operand missing"); | |
3872 | return; | |
3873 | } | |
3874 | ||
3875 | parse_operand (&e2); | |
3876 | if (sep != ',') | |
3877 | { | |
3878 | as_bad ("Second operand missing"); | |
3879 | return; | |
3880 | } | |
3881 | ||
3882 | parse_operand (&e3); | |
3883 | ||
3884 | qp = e1.X_add_number - REG_P; | |
3885 | if (e1.X_op != O_register || qp > 63) | |
3886 | { | |
3887 | as_bad ("First operand to .spill%s_p must be a predicate", | |
3888 | psprel ? "psp" : "sp"); | |
3889 | return; | |
3890 | } | |
3891 | ||
3892 | if (!convert_expr_to_ab_reg (&e2, &ab, ®)) | |
3893 | { | |
3894 | as_bad ("Second operand to .spill%s_p must be a preserved register", | |
3895 | psprel ? "psp" : "sp"); | |
3896 | return; | |
3897 | } | |
3898 | ||
3899 | if (e3.X_op != O_constant) | |
3900 | { | |
3901 | as_bad ("Third operand to .spill%s_p must be a constant", | |
3902 | psprel ? "psp" : "sp"); | |
3903 | return; | |
3904 | } | |
3905 | ||
3906 | if (psprel) | |
fa7fda74 | 3907 | add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a | 3908 | else |
fa7fda74 | 3909 | add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp)); |
e0c9811a JW |
3910 | } |
3911 | ||
6290819d NC |
3912 | static unsigned int |
3913 | get_saved_prologue_count (lbl) | |
3914 | unsigned long lbl; | |
3915 | { | |
3916 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
3917 | ||
3918 | while (lpc != NULL && lpc->label_number != lbl) | |
3919 | lpc = lpc->next; | |
3920 | ||
3921 | if (lpc != NULL) | |
3922 | return lpc->prologue_count; | |
3923 | ||
3924 | as_bad ("Missing .label_state %ld", lbl); | |
3925 | return 1; | |
3926 | } | |
3927 | ||
3928 | static void | |
3929 | save_prologue_count (lbl, count) | |
3930 | unsigned long lbl; | |
3931 | unsigned int count; | |
3932 | { | |
3933 | label_prologue_count *lpc = unwind.saved_prologue_counts; | |
3934 | ||
3935 | while (lpc != NULL && lpc->label_number != lbl) | |
3936 | lpc = lpc->next; | |
3937 | ||
3938 | if (lpc != NULL) | |
3939 | lpc->prologue_count = count; | |
3940 | else | |
3941 | { | |
40449e9f | 3942 | label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc)); |
6290819d NC |
3943 | |
3944 | new_lpc->next = unwind.saved_prologue_counts; | |
3945 | new_lpc->label_number = lbl; | |
3946 | new_lpc->prologue_count = count; | |
3947 | unwind.saved_prologue_counts = new_lpc; | |
3948 | } | |
3949 | } | |
3950 | ||
3951 | static void | |
3952 | free_saved_prologue_counts () | |
3953 | { | |
40449e9f KH |
3954 | label_prologue_count *lpc = unwind.saved_prologue_counts; |
3955 | label_prologue_count *next; | |
6290819d NC |
3956 | |
3957 | while (lpc != NULL) | |
3958 | { | |
3959 | next = lpc->next; | |
3960 | free (lpc); | |
3961 | lpc = next; | |
3962 | } | |
3963 | ||
3964 | unwind.saved_prologue_counts = NULL; | |
3965 | } | |
3966 | ||
e0c9811a JW |
3967 | static void |
3968 | dot_label_state (dummy) | |
2434f565 | 3969 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3970 | { |
3971 | expressionS e; | |
3972 | ||
3973 | parse_operand (&e); | |
3974 | if (e.X_op != O_constant) | |
3975 | { | |
3976 | as_bad ("Operand to .label_state must be a constant"); | |
3977 | return; | |
3978 | } | |
3979 | add_unwind_entry (output_label_state (e.X_add_number)); | |
6290819d | 3980 | save_prologue_count (e.X_add_number, unwind.prologue_count); |
e0c9811a JW |
3981 | } |
3982 | ||
3983 | static void | |
3984 | dot_copy_state (dummy) | |
2434f565 | 3985 | int dummy ATTRIBUTE_UNUSED; |
e0c9811a JW |
3986 | { |
3987 | expressionS e; | |
3988 | ||
3989 | parse_operand (&e); | |
3990 | if (e.X_op != O_constant) | |
3991 | { | |
3992 | as_bad ("Operand to .copy_state must be a constant"); | |
3993 | return; | |
3994 | } | |
3995 | add_unwind_entry (output_copy_state (e.X_add_number)); | |
6290819d | 3996 | unwind.prologue_count = get_saved_prologue_count (e.X_add_number); |
800eeca4 JW |
3997 | } |
3998 | ||
197865e8 | 3999 | static void |
800eeca4 | 4000 | dot_unwabi (dummy) |
2434f565 | 4001 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4002 | { |
e0c9811a JW |
4003 | expressionS e1, e2; |
4004 | unsigned char sep; | |
4005 | ||
4006 | sep = parse_operand (&e1); | |
4007 | if (sep != ',') | |
4008 | { | |
4009 | as_bad ("Second operand to .unwabi missing"); | |
4010 | return; | |
4011 | } | |
4012 | sep = parse_operand (&e2); | |
4013 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) | |
c95b35a9 | 4014 | demand_empty_rest_of_line (); |
e0c9811a JW |
4015 | |
4016 | if (e1.X_op != O_constant) | |
4017 | { | |
4018 | as_bad ("First operand to .unwabi must be a constant"); | |
4019 | return; | |
4020 | } | |
4021 | ||
4022 | if (e2.X_op != O_constant) | |
4023 | { | |
4024 | as_bad ("Second operand to .unwabi must be a constant"); | |
4025 | return; | |
4026 | } | |
4027 | ||
4028 | add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number)); | |
800eeca4 JW |
4029 | } |
4030 | ||
197865e8 | 4031 | static void |
800eeca4 | 4032 | dot_personality (dummy) |
2434f565 | 4033 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4034 | { |
4035 | char *name, *p, c; | |
4036 | SKIP_WHITESPACE (); | |
4037 | name = input_line_pointer; | |
4038 | c = get_symbol_end (); | |
4039 | p = input_line_pointer; | |
e0c9811a | 4040 | unwind.personality_routine = symbol_find_or_make (name); |
91a2ae2a | 4041 | unwind.force_unwind_entry = 1; |
800eeca4 JW |
4042 | *p = c; |
4043 | SKIP_WHITESPACE (); | |
4044 | demand_empty_rest_of_line (); | |
4045 | } | |
4046 | ||
4047 | static void | |
4048 | dot_proc (dummy) | |
2434f565 | 4049 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4050 | { |
4051 | char *name, *p, c; | |
4052 | symbolS *sym; | |
4053 | ||
e0c9811a JW |
4054 | unwind.proc_start = expr_build_dot (); |
4055 | /* Parse names of main and alternate entry points and mark them as | |
542d6675 | 4056 | function symbols: */ |
800eeca4 JW |
4057 | while (1) |
4058 | { | |
4059 | SKIP_WHITESPACE (); | |
4060 | name = input_line_pointer; | |
4061 | c = get_symbol_end (); | |
4062 | p = input_line_pointer; | |
4063 | sym = symbol_find_or_make (name); | |
e0c9811a | 4064 | if (unwind.proc_start == 0) |
542d6675 | 4065 | { |
e0c9811a | 4066 | unwind.proc_start = sym; |
800eeca4 JW |
4067 | } |
4068 | symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; | |
4069 | *p = c; | |
4070 | SKIP_WHITESPACE (); | |
4071 | if (*input_line_pointer != ',') | |
4072 | break; | |
4073 | ++input_line_pointer; | |
4074 | } | |
4075 | demand_empty_rest_of_line (); | |
4076 | ia64_do_align (16); | |
4077 | ||
33d01f33 | 4078 | unwind.prologue_count = 0; |
e0c9811a JW |
4079 | unwind.list = unwind.tail = unwind.current_entry = NULL; |
4080 | unwind.personality_routine = 0; | |
800eeca4 JW |
4081 | } |
4082 | ||
4083 | static void | |
4084 | dot_body (dummy) | |
2434f565 | 4085 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4086 | { |
e0c9811a | 4087 | unwind.prologue = 0; |
30d25259 RH |
4088 | unwind.prologue_mask = 0; |
4089 | ||
800eeca4 | 4090 | add_unwind_entry (output_body ()); |
e0c9811a | 4091 | demand_empty_rest_of_line (); |
800eeca4 JW |
4092 | } |
4093 | ||
4094 | static void | |
4095 | dot_prologue (dummy) | |
2434f565 | 4096 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 | 4097 | { |
e0c9811a | 4098 | unsigned char sep; |
2434f565 | 4099 | int mask = 0, grsave = 0; |
e0c9811a | 4100 | |
e0c9811a | 4101 | if (!is_it_end_of_statement ()) |
800eeca4 JW |
4102 | { |
4103 | expressionS e1, e2; | |
800eeca4 JW |
4104 | sep = parse_operand (&e1); |
4105 | if (sep != ',') | |
4106 | as_bad ("No second operand to .prologue"); | |
4107 | sep = parse_operand (&e2); | |
e0c9811a | 4108 | if (!is_end_of_line[sep] && !is_it_end_of_statement ()) |
c95b35a9 | 4109 | demand_empty_rest_of_line (); |
800eeca4 JW |
4110 | |
4111 | if (e1.X_op == O_constant) | |
542d6675 | 4112 | { |
30d25259 RH |
4113 | mask = e1.X_add_number; |
4114 | ||
800eeca4 | 4115 | if (e2.X_op == O_constant) |
30d25259 RH |
4116 | grsave = e2.X_add_number; |
4117 | else if (e2.X_op == O_register | |
4118 | && (grsave = e2.X_add_number - REG_GR) < 128) | |
4119 | ; | |
800eeca4 | 4120 | else |
30d25259 RH |
4121 | as_bad ("Second operand not a constant or general register"); |
4122 | ||
4123 | add_unwind_entry (output_prologue_gr (mask, grsave)); | |
800eeca4 JW |
4124 | } |
4125 | else | |
4126 | as_bad ("First operand not a constant"); | |
4127 | } | |
4128 | else | |
4129 | add_unwind_entry (output_prologue ()); | |
30d25259 RH |
4130 | |
4131 | unwind.prologue = 1; | |
4132 | unwind.prologue_mask = mask; | |
33d01f33 | 4133 | ++unwind.prologue_count; |
800eeca4 JW |
4134 | } |
4135 | ||
4136 | static void | |
4137 | dot_endp (dummy) | |
2434f565 | 4138 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4139 | { |
4140 | expressionS e; | |
4141 | unsigned char *ptr; | |
44f5c83a | 4142 | int bytes_per_address; |
800eeca4 JW |
4143 | long where; |
4144 | segT saved_seg; | |
4145 | subsegT saved_subseg; | |
c538998c JJ |
4146 | char *name, *p, c; |
4147 | symbolS *sym; | |
800eeca4 | 4148 | |
91a2ae2a RH |
4149 | if (unwind.saved_text_seg) |
4150 | { | |
4151 | saved_seg = unwind.saved_text_seg; | |
4152 | saved_subseg = unwind.saved_text_subseg; | |
4153 | unwind.saved_text_seg = NULL; | |
4154 | } | |
4155 | else | |
4156 | { | |
4157 | saved_seg = now_seg; | |
4158 | saved_subseg = now_subseg; | |
4159 | } | |
4160 | ||
800eeca4 | 4161 | insn_group_break (1, 0, 0); |
800eeca4 | 4162 | |
91a2ae2a RH |
4163 | /* If there wasn't a .handlerdata, we haven't generated an image yet. */ |
4164 | if (!unwind.info) | |
2d6ed997 | 4165 | generate_unwind_image (saved_seg); |
800eeca4 | 4166 | |
91a2ae2a RH |
4167 | if (unwind.info || unwind.force_unwind_entry) |
4168 | { | |
4169 | subseg_set (md.last_text_seg, 0); | |
4170 | unwind.proc_end = expr_build_dot (); | |
5e7474a7 | 4171 | |
d6afba4b | 4172 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 0); |
5e7474a7 | 4173 | |
557debba JW |
4174 | /* Make sure that section has 4 byte alignment for ILP32 and |
4175 | 8 byte alignment for LP64. */ | |
4176 | record_alignment (now_seg, md.pointer_size_shift); | |
800eeca4 | 4177 | |
557debba JW |
4178 | /* Need space for 3 pointers for procedure start, procedure end, |
4179 | and unwind info. */ | |
4180 | ptr = frag_more (3 * md.pointer_size); | |
4181 | where = frag_now_fix () - (3 * md.pointer_size); | |
91a2ae2a | 4182 | bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8; |
800eeca4 | 4183 | |
40449e9f | 4184 | /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */ |
91a2ae2a RH |
4185 | e.X_op = O_pseudo_fixup; |
4186 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4187 | e.X_add_number = 0; | |
4188 | e.X_add_symbol = unwind.proc_start; | |
4189 | ia64_cons_fix_new (frag_now, where, bytes_per_address, &e); | |
800eeca4 | 4190 | |
800eeca4 JW |
4191 | e.X_op = O_pseudo_fixup; |
4192 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4193 | e.X_add_number = 0; | |
91a2ae2a RH |
4194 | e.X_add_symbol = unwind.proc_end; |
4195 | ia64_cons_fix_new (frag_now, where + bytes_per_address, | |
4196 | bytes_per_address, &e); | |
4197 | ||
4198 | if (unwind.info) | |
4199 | { | |
4200 | e.X_op = O_pseudo_fixup; | |
4201 | e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; | |
4202 | e.X_add_number = 0; | |
4203 | e.X_add_symbol = unwind.info; | |
4204 | ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2), | |
4205 | bytes_per_address, &e); | |
4206 | } | |
4207 | else | |
4208 | md_number_to_chars (ptr + (bytes_per_address * 2), 0, | |
4209 | bytes_per_address); | |
800eeca4 | 4210 | |
91a2ae2a | 4211 | } |
d6afba4b JJ |
4212 | else |
4213 | start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 1); | |
4214 | ||
800eeca4 | 4215 | subseg_set (saved_seg, saved_subseg); |
c538998c JJ |
4216 | |
4217 | /* Parse names of main and alternate entry points and set symbol sizes. */ | |
4218 | while (1) | |
4219 | { | |
4220 | SKIP_WHITESPACE (); | |
4221 | name = input_line_pointer; | |
4222 | c = get_symbol_end (); | |
4223 | p = input_line_pointer; | |
4224 | sym = symbol_find (name); | |
4225 | if (sym && unwind.proc_start | |
4226 | && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION) | |
4227 | && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL) | |
4228 | { | |
4229 | fragS *fr = symbol_get_frag (unwind.proc_start); | |
4230 | fragS *frag = symbol_get_frag (sym); | |
4231 | ||
4232 | /* Check whether the function label is at or beyond last | |
4233 | .proc directive. */ | |
4234 | while (fr && fr != frag) | |
4235 | fr = fr->fr_next; | |
4236 | if (fr) | |
4237 | { | |
4238 | if (frag == frag_now && SEG_NORMAL (now_seg)) | |
4239 | S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym)); | |
4240 | else | |
4241 | { | |
4242 | symbol_get_obj (sym)->size = | |
4243 | (expressionS *) xmalloc (sizeof (expressionS)); | |
4244 | symbol_get_obj (sym)->size->X_op = O_subtract; | |
4245 | symbol_get_obj (sym)->size->X_add_symbol | |
4246 | = symbol_new (FAKE_LABEL_NAME, now_seg, | |
4247 | frag_now_fix (), frag_now); | |
4248 | symbol_get_obj (sym)->size->X_op_symbol = sym; | |
4249 | symbol_get_obj (sym)->size->X_add_number = 0; | |
4250 | } | |
4251 | } | |
4252 | } | |
4253 | *p = c; | |
4254 | SKIP_WHITESPACE (); | |
4255 | if (*input_line_pointer != ',') | |
4256 | break; | |
4257 | ++input_line_pointer; | |
4258 | } | |
4259 | demand_empty_rest_of_line (); | |
e0c9811a | 4260 | unwind.proc_start = unwind.proc_end = unwind.info = 0; |
800eeca4 JW |
4261 | } |
4262 | ||
4263 | static void | |
4264 | dot_template (template) | |
4265 | int template; | |
4266 | { | |
4267 | CURR_SLOT.user_template = template; | |
4268 | } | |
4269 | ||
4270 | static void | |
4271 | dot_regstk (dummy) | |
2434f565 | 4272 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4273 | { |
4274 | int ins, locs, outs, rots; | |
4275 | ||
4276 | if (is_it_end_of_statement ()) | |
4277 | ins = locs = outs = rots = 0; | |
4278 | else | |
4279 | { | |
4280 | ins = get_absolute_expression (); | |
4281 | if (*input_line_pointer++ != ',') | |
4282 | goto err; | |
4283 | locs = get_absolute_expression (); | |
4284 | if (*input_line_pointer++ != ',') | |
4285 | goto err; | |
4286 | outs = get_absolute_expression (); | |
4287 | if (*input_line_pointer++ != ',') | |
4288 | goto err; | |
4289 | rots = get_absolute_expression (); | |
4290 | } | |
4291 | set_regstack (ins, locs, outs, rots); | |
4292 | return; | |
4293 | ||
4294 | err: | |
4295 | as_bad ("Comma expected"); | |
4296 | ignore_rest_of_line (); | |
4297 | } | |
4298 | ||
4299 | static void | |
4300 | dot_rot (type) | |
4301 | int type; | |
4302 | { | |
4303 | unsigned num_regs, num_alloced = 0; | |
4304 | struct dynreg **drpp, *dr; | |
4305 | int ch, base_reg = 0; | |
4306 | char *name, *start; | |
4307 | size_t len; | |
4308 | ||
4309 | switch (type) | |
4310 | { | |
4311 | case DYNREG_GR: base_reg = REG_GR + 32; break; | |
4312 | case DYNREG_FR: base_reg = REG_FR + 32; break; | |
4313 | case DYNREG_PR: base_reg = REG_P + 16; break; | |
4314 | default: break; | |
4315 | } | |
4316 | ||
542d6675 | 4317 | /* First, remove existing names from hash table. */ |
800eeca4 JW |
4318 | for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next) |
4319 | { | |
4320 | hash_delete (md.dynreg_hash, dr->name); | |
4321 | dr->num_regs = 0; | |
4322 | } | |
4323 | ||
4324 | drpp = &md.dynreg[type]; | |
4325 | while (1) | |
4326 | { | |
4327 | start = input_line_pointer; | |
4328 | ch = get_symbol_end (); | |
4329 | *input_line_pointer = ch; | |
4330 | len = (input_line_pointer - start); | |
4331 | ||
4332 | SKIP_WHITESPACE (); | |
4333 | if (*input_line_pointer != '[') | |
4334 | { | |
4335 | as_bad ("Expected '['"); | |
4336 | goto err; | |
4337 | } | |
4338 | ++input_line_pointer; /* skip '[' */ | |
4339 | ||
4340 | num_regs = get_absolute_expression (); | |
4341 | ||
4342 | if (*input_line_pointer++ != ']') | |
4343 | { | |
4344 | as_bad ("Expected ']'"); | |
4345 | goto err; | |
4346 | } | |
4347 | SKIP_WHITESPACE (); | |
4348 | ||
4349 | num_alloced += num_regs; | |
4350 | switch (type) | |
4351 | { | |
4352 | case DYNREG_GR: | |
4353 | if (num_alloced > md.rot.num_regs) | |
4354 | { | |
4355 | as_bad ("Used more than the declared %d rotating registers", | |
4356 | md.rot.num_regs); | |
4357 | goto err; | |
4358 | } | |
4359 | break; | |
4360 | case DYNREG_FR: | |
4361 | if (num_alloced > 96) | |
4362 | { | |
4363 | as_bad ("Used more than the available 96 rotating registers"); | |
4364 | goto err; | |
4365 | } | |
4366 | break; | |
4367 | case DYNREG_PR: | |
4368 | if (num_alloced > 48) | |
4369 | { | |
4370 | as_bad ("Used more than the available 48 rotating registers"); | |
4371 | goto err; | |
4372 | } | |
4373 | break; | |
4374 | ||
4375 | default: | |
4376 | break; | |
4377 | } | |
4378 | ||
4379 | name = obstack_alloc (¬es, len + 1); | |
4380 | memcpy (name, start, len); | |
4381 | name[len] = '\0'; | |
4382 | ||
4383 | if (!*drpp) | |
4384 | { | |
4385 | *drpp = obstack_alloc (¬es, sizeof (*dr)); | |
4386 | memset (*drpp, 0, sizeof (*dr)); | |
4387 | } | |
4388 | ||
4389 | dr = *drpp; | |
4390 | dr->name = name; | |
4391 | dr->num_regs = num_regs; | |
4392 | dr->base = base_reg; | |
4393 | drpp = &dr->next; | |
4394 | base_reg += num_regs; | |
4395 | ||
4396 | if (hash_insert (md.dynreg_hash, name, dr)) | |
4397 | { | |
4398 | as_bad ("Attempt to redefine register set `%s'", name); | |
4399 | goto err; | |
4400 | } | |
4401 | ||
4402 | if (*input_line_pointer != ',') | |
4403 | break; | |
4404 | ++input_line_pointer; /* skip comma */ | |
4405 | SKIP_WHITESPACE (); | |
4406 | } | |
4407 | demand_empty_rest_of_line (); | |
4408 | return; | |
4409 | ||
4410 | err: | |
4411 | ignore_rest_of_line (); | |
4412 | } | |
4413 | ||
4414 | static void | |
4415 | dot_byteorder (byteorder) | |
4416 | int byteorder; | |
4417 | { | |
10a98291 L |
4418 | segment_info_type *seginfo = seg_info (now_seg); |
4419 | ||
4420 | if (byteorder == -1) | |
4421 | { | |
4422 | if (seginfo->tc_segment_info_data.endian == 0) | |
549f748d | 4423 | seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2; |
10a98291 L |
4424 | byteorder = seginfo->tc_segment_info_data.endian == 1; |
4425 | } | |
4426 | else | |
4427 | seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2; | |
4428 | ||
4429 | if (target_big_endian != byteorder) | |
4430 | { | |
4431 | target_big_endian = byteorder; | |
4432 | if (target_big_endian) | |
4433 | { | |
4434 | ia64_number_to_chars = number_to_chars_bigendian; | |
4435 | ia64_float_to_chars = ia64_float_to_chars_bigendian; | |
4436 | } | |
4437 | else | |
4438 | { | |
4439 | ia64_number_to_chars = number_to_chars_littleendian; | |
4440 | ia64_float_to_chars = ia64_float_to_chars_littleendian; | |
4441 | } | |
4442 | } | |
800eeca4 JW |
4443 | } |
4444 | ||
4445 | static void | |
4446 | dot_psr (dummy) | |
2434f565 | 4447 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4448 | { |
4449 | char *option; | |
4450 | int ch; | |
4451 | ||
4452 | while (1) | |
4453 | { | |
4454 | option = input_line_pointer; | |
4455 | ch = get_symbol_end (); | |
4456 | if (strcmp (option, "lsb") == 0) | |
4457 | md.flags &= ~EF_IA_64_BE; | |
4458 | else if (strcmp (option, "msb") == 0) | |
4459 | md.flags |= EF_IA_64_BE; | |
4460 | else if (strcmp (option, "abi32") == 0) | |
4461 | md.flags &= ~EF_IA_64_ABI64; | |
4462 | else if (strcmp (option, "abi64") == 0) | |
4463 | md.flags |= EF_IA_64_ABI64; | |
4464 | else | |
4465 | as_bad ("Unknown psr option `%s'", option); | |
4466 | *input_line_pointer = ch; | |
4467 | ||
4468 | SKIP_WHITESPACE (); | |
4469 | if (*input_line_pointer != ',') | |
4470 | break; | |
4471 | ||
4472 | ++input_line_pointer; | |
4473 | SKIP_WHITESPACE (); | |
4474 | } | |
4475 | demand_empty_rest_of_line (); | |
4476 | } | |
4477 | ||
800eeca4 JW |
4478 | static void |
4479 | dot_ln (dummy) | |
2434f565 | 4480 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4481 | { |
4482 | new_logical_line (0, get_absolute_expression ()); | |
4483 | demand_empty_rest_of_line (); | |
4484 | } | |
4485 | ||
542d6675 | 4486 | static char * |
800eeca4 JW |
4487 | parse_section_name () |
4488 | { | |
4489 | char *name; | |
4490 | int len; | |
4491 | ||
4492 | SKIP_WHITESPACE (); | |
4493 | if (*input_line_pointer != '"') | |
4494 | { | |
4495 | as_bad ("Missing section name"); | |
4496 | ignore_rest_of_line (); | |
4497 | return 0; | |
4498 | } | |
4499 | name = demand_copy_C_string (&len); | |
4500 | if (!name) | |
4501 | { | |
4502 | ignore_rest_of_line (); | |
4503 | return 0; | |
4504 | } | |
4505 | SKIP_WHITESPACE (); | |
4506 | if (*input_line_pointer != ',') | |
4507 | { | |
4508 | as_bad ("Comma expected after section name"); | |
4509 | ignore_rest_of_line (); | |
4510 | return 0; | |
4511 | } | |
4512 | ++input_line_pointer; /* skip comma */ | |
4513 | return name; | |
4514 | } | |
4515 | ||
4516 | static void | |
4517 | dot_xdata (size) | |
4518 | int size; | |
4519 | { | |
4520 | char *name = parse_section_name (); | |
4521 | if (!name) | |
4522 | return; | |
4523 | ||
4d5a53ff | 4524 | md.keep_pending_output = 1; |
800eeca4 JW |
4525 | set_section (name); |
4526 | cons (size); | |
4527 | obj_elf_previous (0); | |
4d5a53ff | 4528 | md.keep_pending_output = 0; |
800eeca4 JW |
4529 | } |
4530 | ||
4531 | /* Why doesn't float_cons() call md_cons_align() the way cons() does? */ | |
542d6675 | 4532 | |
800eeca4 JW |
4533 | static void |
4534 | stmt_float_cons (kind) | |
4535 | int kind; | |
4536 | { | |
165a7f90 | 4537 | size_t alignment; |
800eeca4 JW |
4538 | |
4539 | switch (kind) | |
4540 | { | |
165a7f90 L |
4541 | case 'd': |
4542 | alignment = 8; | |
4543 | break; | |
4544 | ||
4545 | case 'x': | |
4546 | case 'X': | |
4547 | alignment = 16; | |
4548 | break; | |
800eeca4 JW |
4549 | |
4550 | case 'f': | |
4551 | default: | |
165a7f90 | 4552 | alignment = 4; |
800eeca4 JW |
4553 | break; |
4554 | } | |
165a7f90 | 4555 | ia64_do_align (alignment); |
800eeca4 JW |
4556 | float_cons (kind); |
4557 | } | |
4558 | ||
4559 | static void | |
4560 | stmt_cons_ua (size) | |
4561 | int size; | |
4562 | { | |
4563 | int saved_auto_align = md.auto_align; | |
4564 | ||
4565 | md.auto_align = 0; | |
4566 | cons (size); | |
4567 | md.auto_align = saved_auto_align; | |
4568 | } | |
4569 | ||
4570 | static void | |
4571 | dot_xfloat_cons (kind) | |
4572 | int kind; | |
4573 | { | |
4574 | char *name = parse_section_name (); | |
4575 | if (!name) | |
4576 | return; | |
4577 | ||
4d5a53ff | 4578 | md.keep_pending_output = 1; |
800eeca4 JW |
4579 | set_section (name); |
4580 | stmt_float_cons (kind); | |
4581 | obj_elf_previous (0); | |
4d5a53ff | 4582 | md.keep_pending_output = 0; |
800eeca4 JW |
4583 | } |
4584 | ||
4585 | static void | |
4586 | dot_xstringer (zero) | |
4587 | int zero; | |
4588 | { | |
4589 | char *name = parse_section_name (); | |
4590 | if (!name) | |
4591 | return; | |
4592 | ||
4d5a53ff | 4593 | md.keep_pending_output = 1; |
800eeca4 JW |
4594 | set_section (name); |
4595 | stringer (zero); | |
4596 | obj_elf_previous (0); | |
4d5a53ff | 4597 | md.keep_pending_output = 0; |
800eeca4 JW |
4598 | } |
4599 | ||
4600 | static void | |
4601 | dot_xdata_ua (size) | |
4602 | int size; | |
4603 | { | |
4604 | int saved_auto_align = md.auto_align; | |
4605 | char *name = parse_section_name (); | |
4606 | if (!name) | |
4607 | return; | |
4608 | ||
4d5a53ff | 4609 | md.keep_pending_output = 1; |
800eeca4 JW |
4610 | set_section (name); |
4611 | md.auto_align = 0; | |
4612 | cons (size); | |
4613 | md.auto_align = saved_auto_align; | |
4614 | obj_elf_previous (0); | |
4d5a53ff | 4615 | md.keep_pending_output = 0; |
800eeca4 JW |
4616 | } |
4617 | ||
4618 | static void | |
4619 | dot_xfloat_cons_ua (kind) | |
4620 | int kind; | |
4621 | { | |
4622 | int saved_auto_align = md.auto_align; | |
4623 | char *name = parse_section_name (); | |
4624 | if (!name) | |
4625 | return; | |
4626 | ||
4d5a53ff | 4627 | md.keep_pending_output = 1; |
800eeca4 JW |
4628 | set_section (name); |
4629 | md.auto_align = 0; | |
4630 | stmt_float_cons (kind); | |
4631 | md.auto_align = saved_auto_align; | |
4632 | obj_elf_previous (0); | |
4d5a53ff | 4633 | md.keep_pending_output = 0; |
800eeca4 JW |
4634 | } |
4635 | ||
4636 | /* .reg.val <regname>,value */ | |
542d6675 | 4637 | |
800eeca4 JW |
4638 | static void |
4639 | dot_reg_val (dummy) | |
2434f565 | 4640 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4641 | { |
4642 | expressionS reg; | |
4643 | ||
4644 | expression (®); | |
4645 | if (reg.X_op != O_register) | |
4646 | { | |
4647 | as_bad (_("Register name expected")); | |
4648 | ignore_rest_of_line (); | |
4649 | } | |
4650 | else if (*input_line_pointer++ != ',') | |
4651 | { | |
4652 | as_bad (_("Comma expected")); | |
4653 | ignore_rest_of_line (); | |
4654 | } | |
197865e8 | 4655 | else |
800eeca4 JW |
4656 | { |
4657 | valueT value = get_absolute_expression (); | |
4658 | int regno = reg.X_add_number; | |
542d6675 KH |
4659 | if (regno < REG_GR || regno > REG_GR + 128) |
4660 | as_warn (_("Register value annotation ignored")); | |
800eeca4 | 4661 | else |
542d6675 KH |
4662 | { |
4663 | gr_values[regno - REG_GR].known = 1; | |
4664 | gr_values[regno - REG_GR].value = value; | |
4665 | gr_values[regno - REG_GR].path = md.path; | |
4666 | } | |
800eeca4 JW |
4667 | } |
4668 | demand_empty_rest_of_line (); | |
4669 | } | |
4670 | ||
5e819f9c JW |
4671 | /* |
4672 | .serialize.data | |
4673 | .serialize.instruction | |
4674 | */ | |
4675 | static void | |
4676 | dot_serialize (type) | |
4677 | int type; | |
4678 | { | |
4679 | insn_group_break (0, 0, 0); | |
4680 | if (type) | |
4681 | instruction_serialization (); | |
4682 | else | |
4683 | data_serialization (); | |
4684 | insn_group_break (0, 0, 0); | |
4685 | demand_empty_rest_of_line (); | |
4686 | } | |
4687 | ||
197865e8 | 4688 | /* select dv checking mode |
800eeca4 JW |
4689 | .auto |
4690 | .explicit | |
4691 | .default | |
4692 | ||
197865e8 | 4693 | A stop is inserted when changing modes |
800eeca4 | 4694 | */ |
542d6675 | 4695 | |
800eeca4 JW |
4696 | static void |
4697 | dot_dv_mode (type) | |
542d6675 | 4698 | int type; |
800eeca4 JW |
4699 | { |
4700 | if (md.manual_bundling) | |
4701 | as_warn (_("Directive invalid within a bundle")); | |
4702 | ||
4703 | if (type == 'E' || type == 'A') | |
4704 | md.mode_explicitly_set = 0; | |
4705 | else | |
4706 | md.mode_explicitly_set = 1; | |
4707 | ||
4708 | md.detect_dv = 1; | |
4709 | switch (type) | |
4710 | { | |
4711 | case 'A': | |
4712 | case 'a': | |
4713 | if (md.explicit_mode) | |
542d6675 | 4714 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4715 | md.explicit_mode = 0; |
4716 | break; | |
4717 | case 'E': | |
4718 | case 'e': | |
4719 | if (!md.explicit_mode) | |
542d6675 | 4720 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4721 | md.explicit_mode = 1; |
4722 | break; | |
4723 | default: | |
4724 | case 'd': | |
4725 | if (md.explicit_mode != md.default_explicit_mode) | |
542d6675 | 4726 | insn_group_break (1, 0, 0); |
800eeca4 JW |
4727 | md.explicit_mode = md.default_explicit_mode; |
4728 | md.mode_explicitly_set = 0; | |
4729 | break; | |
4730 | } | |
4731 | } | |
4732 | ||
4733 | static void | |
4734 | print_prmask (mask) | |
542d6675 | 4735 | valueT mask; |
800eeca4 JW |
4736 | { |
4737 | int regno; | |
4738 | char *comma = ""; | |
542d6675 | 4739 | for (regno = 0; regno < 64; regno++) |
800eeca4 | 4740 | { |
542d6675 KH |
4741 | if (mask & ((valueT) 1 << regno)) |
4742 | { | |
4743 | fprintf (stderr, "%s p%d", comma, regno); | |
4744 | comma = ","; | |
4745 | } | |
800eeca4 JW |
4746 | } |
4747 | } | |
4748 | ||
4749 | /* | |
4750 | .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear") | |
4751 | .pred.rel.imply p1, p2 (also .pred.rel "imply") | |
4752 | .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex") | |
4753 | .pred.safe_across_calls p1 [, p2 [,...]] | |
4754 | */ | |
542d6675 | 4755 | |
800eeca4 JW |
4756 | static void |
4757 | dot_pred_rel (type) | |
542d6675 | 4758 | int type; |
800eeca4 JW |
4759 | { |
4760 | valueT mask = 0; | |
4761 | int count = 0; | |
4762 | int p1 = -1, p2 = -1; | |
4763 | ||
4764 | if (type == 0) | |
4765 | { | |
4766 | if (*input_line_pointer != '"') | |
542d6675 KH |
4767 | { |
4768 | as_bad (_("Missing predicate relation type")); | |
4769 | ignore_rest_of_line (); | |
4770 | return; | |
4771 | } | |
197865e8 | 4772 | else |
542d6675 KH |
4773 | { |
4774 | int len; | |
4775 | char *form = demand_copy_C_string (&len); | |
4776 | if (strcmp (form, "mutex") == 0) | |
4777 | type = 'm'; | |
4778 | else if (strcmp (form, "clear") == 0) | |
4779 | type = 'c'; | |
4780 | else if (strcmp (form, "imply") == 0) | |
4781 | type = 'i'; | |
4782 | else | |
4783 | { | |
4784 | as_bad (_("Unrecognized predicate relation type")); | |
4785 | ignore_rest_of_line (); | |
4786 | return; | |
4787 | } | |
4788 | } | |
800eeca4 | 4789 | if (*input_line_pointer == ',') |
542d6675 | 4790 | ++input_line_pointer; |
800eeca4 JW |
4791 | SKIP_WHITESPACE (); |
4792 | } | |
4793 | ||
4794 | SKIP_WHITESPACE (); | |
4795 | while (1) | |
4796 | { | |
4797 | valueT bit = 1; | |
4798 | int regno; | |
197865e8 | 4799 | |
3882b010 | 4800 | if (TOUPPER (*input_line_pointer) != 'P' |
542d6675 KH |
4801 | || (regno = atoi (++input_line_pointer)) < 0 |
4802 | || regno > 63) | |
4803 | { | |
4804 | as_bad (_("Predicate register expected")); | |
4805 | ignore_rest_of_line (); | |
4806 | return; | |
4807 | } | |
3882b010 | 4808 | while (ISDIGIT (*input_line_pointer)) |
542d6675 | 4809 | ++input_line_pointer; |
800eeca4 | 4810 | if (p1 == -1) |
542d6675 | 4811 | p1 = regno; |
800eeca4 | 4812 | else if (p2 == -1) |
542d6675 | 4813 | p2 = regno; |
800eeca4 JW |
4814 | bit <<= regno; |
4815 | if (mask & bit) | |
542d6675 KH |
4816 | as_warn (_("Duplicate predicate register ignored")); |
4817 | mask |= bit; | |
4818 | count++; | |
4819 | /* See if it's a range. */ | |
800eeca4 | 4820 | if (*input_line_pointer == '-') |
542d6675 KH |
4821 | { |
4822 | valueT stop = 1; | |
4823 | ++input_line_pointer; | |
4824 | ||
3882b010 | 4825 | if (TOUPPER (*input_line_pointer) != 'P' |
542d6675 KH |
4826 | || (regno = atoi (++input_line_pointer)) < 0 |
4827 | || regno > 63) | |
4828 | { | |
4829 | as_bad (_("Predicate register expected")); | |
4830 | ignore_rest_of_line (); | |
4831 | return; | |
4832 | } | |
3882b010 | 4833 | while (ISDIGIT (*input_line_pointer)) |
542d6675 KH |
4834 | ++input_line_pointer; |
4835 | stop <<= regno; | |
4836 | if (bit >= stop) | |
4837 | { | |
4838 | as_bad (_("Bad register range")); | |
4839 | ignore_rest_of_line (); | |
4840 | return; | |
4841 | } | |
4842 | while (bit < stop) | |
4843 | { | |
4844 | bit <<= 1; | |
4845 | mask |= bit; | |
4846 | count++; | |
4847 | } | |
4848 | SKIP_WHITESPACE (); | |
4849 | } | |
800eeca4 | 4850 | if (*input_line_pointer != ',') |
542d6675 | 4851 | break; |
800eeca4 JW |
4852 | ++input_line_pointer; |
4853 | SKIP_WHITESPACE (); | |
4854 | } | |
4855 | ||
4856 | switch (type) | |
4857 | { | |
4858 | case 'c': | |
4859 | if (count == 0) | |
542d6675 | 4860 | mask = ~(valueT) 0; |
800eeca4 | 4861 | clear_qp_mutex (mask); |
197865e8 | 4862 | clear_qp_implies (mask, (valueT) 0); |
800eeca4 JW |
4863 | break; |
4864 | case 'i': | |
4865 | if (count != 2 || p1 == -1 || p2 == -1) | |
542d6675 | 4866 | as_bad (_("Predicate source and target required")); |
800eeca4 | 4867 | else if (p1 == 0 || p2 == 0) |
542d6675 | 4868 | as_bad (_("Use of p0 is not valid in this context")); |
800eeca4 | 4869 | else |
542d6675 | 4870 | add_qp_imply (p1, p2); |
800eeca4 JW |
4871 | break; |
4872 | case 'm': | |
4873 | if (count < 2) | |
542d6675 KH |
4874 | { |
4875 | as_bad (_("At least two PR arguments expected")); | |
4876 | break; | |
4877 | } | |
800eeca4 | 4878 | else if (mask & 1) |
542d6675 KH |
4879 | { |
4880 | as_bad (_("Use of p0 is not valid in this context")); | |
4881 | break; | |
4882 | } | |
800eeca4 JW |
4883 | add_qp_mutex (mask); |
4884 | break; | |
4885 | case 's': | |
4886 | /* note that we don't override any existing relations */ | |
4887 | if (count == 0) | |
542d6675 KH |
4888 | { |
4889 | as_bad (_("At least one PR argument expected")); | |
4890 | break; | |
4891 | } | |
800eeca4 | 4892 | if (md.debug_dv) |
542d6675 KH |
4893 | { |
4894 | fprintf (stderr, "Safe across calls: "); | |
4895 | print_prmask (mask); | |
4896 | fprintf (stderr, "\n"); | |
4897 | } | |
800eeca4 JW |
4898 | qp_safe_across_calls = mask; |
4899 | break; | |
4900 | } | |
4901 | demand_empty_rest_of_line (); | |
4902 | } | |
4903 | ||
4904 | /* .entry label [, label [, ...]] | |
4905 | Hint to DV code that the given labels are to be considered entry points. | |
542d6675 KH |
4906 | Otherwise, only global labels are considered entry points. */ |
4907 | ||
800eeca4 JW |
4908 | static void |
4909 | dot_entry (dummy) | |
2434f565 | 4910 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4911 | { |
4912 | const char *err; | |
4913 | char *name; | |
4914 | int c; | |
4915 | symbolS *symbolP; | |
4916 | ||
4917 | do | |
4918 | { | |
4919 | name = input_line_pointer; | |
4920 | c = get_symbol_end (); | |
4921 | symbolP = symbol_find_or_make (name); | |
4922 | ||
4923 | err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP); | |
4924 | if (err) | |
542d6675 KH |
4925 | as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"), |
4926 | name, err); | |
800eeca4 JW |
4927 | |
4928 | *input_line_pointer = c; | |
4929 | SKIP_WHITESPACE (); | |
4930 | c = *input_line_pointer; | |
4931 | if (c == ',') | |
4932 | { | |
4933 | input_line_pointer++; | |
4934 | SKIP_WHITESPACE (); | |
4935 | if (*input_line_pointer == '\n') | |
4936 | c = '\n'; | |
4937 | } | |
4938 | } | |
4939 | while (c == ','); | |
4940 | ||
4941 | demand_empty_rest_of_line (); | |
4942 | } | |
4943 | ||
197865e8 | 4944 | /* .mem.offset offset, base |
542d6675 KH |
4945 | "base" is used to distinguish between offsets from a different base. */ |
4946 | ||
800eeca4 JW |
4947 | static void |
4948 | dot_mem_offset (dummy) | |
2434f565 | 4949 | int dummy ATTRIBUTE_UNUSED; |
800eeca4 JW |
4950 | { |
4951 | md.mem_offset.hint = 1; | |
4952 | md.mem_offset.offset = get_absolute_expression (); | |
4953 | if (*input_line_pointer != ',') | |
4954 | { | |
4955 | as_bad (_("Comma expected")); | |
4956 | ignore_rest_of_line (); | |
4957 | return; | |
4958 | } | |
4959 | ++input_line_pointer; | |
4960 | md.mem_offset.base = get_absolute_expression (); | |
4961 | demand_empty_rest_of_line (); | |
4962 | } | |
4963 | ||
542d6675 | 4964 | /* ia64-specific pseudo-ops: */ |
800eeca4 JW |
4965 | const pseudo_typeS md_pseudo_table[] = |
4966 | { | |
4967 | { "radix", dot_radix, 0 }, | |
4968 | { "lcomm", s_lcomm_bytes, 1 }, | |
4969 | { "bss", dot_special_section, SPECIAL_SECTION_BSS }, | |
4970 | { "sbss", dot_special_section, SPECIAL_SECTION_SBSS }, | |
4971 | { "sdata", dot_special_section, SPECIAL_SECTION_SDATA }, | |
4972 | { "rodata", dot_special_section, SPECIAL_SECTION_RODATA }, | |
4973 | { "comment", dot_special_section, SPECIAL_SECTION_COMMENT }, | |
4974 | { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND }, | |
4975 | { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO }, | |
557debba JW |
4976 | { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY }, |
4977 | { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY }, | |
800eeca4 JW |
4978 | { "proc", dot_proc, 0 }, |
4979 | { "body", dot_body, 0 }, | |
4980 | { "prologue", dot_prologue, 0 }, | |
2434f565 | 4981 | { "endp", dot_endp, 0 }, |
2434f565 JW |
4982 | |
4983 | { "fframe", dot_fframe, 0 }, | |
4984 | { "vframe", dot_vframe, 0 }, | |
4985 | { "vframesp", dot_vframesp, 0 }, | |
4986 | { "vframepsp", dot_vframepsp, 0 }, | |
4987 | { "save", dot_save, 0 }, | |
4988 | { "restore", dot_restore, 0 }, | |
4989 | { "restorereg", dot_restorereg, 0 }, | |
4990 | { "restorereg.p", dot_restorereg_p, 0 }, | |
4991 | { "handlerdata", dot_handlerdata, 0 }, | |
4992 | { "unwentry", dot_unwentry, 0 }, | |
4993 | { "altrp", dot_altrp, 0 }, | |
e0c9811a JW |
4994 | { "savesp", dot_savemem, 0 }, |
4995 | { "savepsp", dot_savemem, 1 }, | |
2434f565 JW |
4996 | { "save.g", dot_saveg, 0 }, |
4997 | { "save.f", dot_savef, 0 }, | |
4998 | { "save.b", dot_saveb, 0 }, | |
4999 | { "save.gf", dot_savegf, 0 }, | |
5000 | { "spill", dot_spill, 0 }, | |
5001 | { "spillreg", dot_spillreg, 0 }, | |
e0c9811a JW |
5002 | { "spillsp", dot_spillmem, 0 }, |
5003 | { "spillpsp", dot_spillmem, 1 }, | |
2434f565 | 5004 | { "spillreg.p", dot_spillreg_p, 0 }, |
e0c9811a JW |
5005 | { "spillsp.p", dot_spillmem_p, 0 }, |
5006 | { "spillpsp.p", dot_spillmem_p, 1 }, | |
2434f565 JW |
5007 | { "label_state", dot_label_state, 0 }, |
5008 | { "copy_state", dot_copy_state, 0 }, | |
5009 | { "unwabi", dot_unwabi, 0 }, | |
5010 | { "personality", dot_personality, 0 }, | |
800eeca4 | 5011 | #if 0 |
2434f565 | 5012 | { "estate", dot_estate, 0 }, |
800eeca4 JW |
5013 | #endif |
5014 | { "mii", dot_template, 0x0 }, | |
5015 | { "mli", dot_template, 0x2 }, /* old format, for compatibility */ | |
5016 | { "mlx", dot_template, 0x2 }, | |
5017 | { "mmi", dot_template, 0x4 }, | |
5018 | { "mfi", dot_template, 0x6 }, | |
5019 | { "mmf", dot_template, 0x7 }, | |
5020 | { "mib", dot_template, 0x8 }, | |
5021 | { "mbb", dot_template, 0x9 }, | |
5022 | { "bbb", dot_template, 0xb }, | |
5023 | { "mmb", dot_template, 0xc }, | |
5024 | { "mfb", dot_template, 0xe }, | |
5025 | #if 0 | |
5026 | { "lb", dot_scope, 0 }, | |
5027 | { "le", dot_scope, 1 }, | |
5028 | #endif | |
d9201763 | 5029 | { "align", dot_align, 0 }, |
800eeca4 JW |
5030 | { "regstk", dot_regstk, 0 }, |
5031 | { "rotr", dot_rot, DYNREG_GR }, | |
5032 | { "rotf", dot_rot, DYNREG_FR }, | |
5033 | { "rotp", dot_rot, DYNREG_PR }, | |
5034 | { "lsb", dot_byteorder, 0 }, | |
5035 | { "msb", dot_byteorder, 1 }, | |
5036 | { "psr", dot_psr, 0 }, | |
5037 | { "alias", dot_alias, 0 }, | |
35f5df7f | 5038 | { "secalias", dot_alias, 1 }, |
800eeca4 JW |
5039 | { "ln", dot_ln, 0 }, /* source line info (for debugging) */ |
5040 | ||
5041 | { "xdata1", dot_xdata, 1 }, | |
5042 | { "xdata2", dot_xdata, 2 }, | |
5043 | { "xdata4", dot_xdata, 4 }, | |
5044 | { "xdata8", dot_xdata, 8 }, | |
5045 | { "xreal4", dot_xfloat_cons, 'f' }, | |
5046 | { "xreal8", dot_xfloat_cons, 'd' }, | |
5047 | { "xreal10", dot_xfloat_cons, 'x' }, | |
165a7f90 | 5048 | { "xreal16", dot_xfloat_cons, 'X' }, |
800eeca4 JW |
5049 | { "xstring", dot_xstringer, 0 }, |
5050 | { "xstringz", dot_xstringer, 1 }, | |
5051 | ||
542d6675 | 5052 | /* unaligned versions: */ |
800eeca4 JW |
5053 | { "xdata2.ua", dot_xdata_ua, 2 }, |
5054 | { "xdata4.ua", dot_xdata_ua, 4 }, | |
5055 | { "xdata8.ua", dot_xdata_ua, 8 }, | |
5056 | { "xreal4.ua", dot_xfloat_cons_ua, 'f' }, | |
5057 | { "xreal8.ua", dot_xfloat_cons_ua, 'd' }, | |
5058 | { "xreal10.ua", dot_xfloat_cons_ua, 'x' }, | |
165a7f90 | 5059 | { "xreal16.ua", dot_xfloat_cons_ua, 'X' }, |
800eeca4 JW |
5060 | |
5061 | /* annotations/DV checking support */ | |
5062 | { "entry", dot_entry, 0 }, | |
2434f565 | 5063 | { "mem.offset", dot_mem_offset, 0 }, |
800eeca4 JW |
5064 | { "pred.rel", dot_pred_rel, 0 }, |
5065 | { "pred.rel.clear", dot_pred_rel, 'c' }, | |
5066 | { "pred.rel.imply", dot_pred_rel, 'i' }, | |
5067 | { "pred.rel.mutex", dot_pred_rel, 'm' }, | |
5068 | { "pred.safe_across_calls", dot_pred_rel, 's' }, | |
2434f565 | 5069 | { "reg.val", dot_reg_val, 0 }, |
5e819f9c JW |
5070 | { "serialize.data", dot_serialize, 0 }, |
5071 | { "serialize.instruction", dot_serialize, 1 }, | |
800eeca4 JW |
5072 | { "auto", dot_dv_mode, 'a' }, |
5073 | { "explicit", dot_dv_mode, 'e' }, | |
5074 | { "default", dot_dv_mode, 'd' }, | |
5075 | ||
87885043 JW |
5076 | /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work. |
5077 | IA-64 aligns data allocation pseudo-ops by default, so we have to | |
5078 | tell it that these ones are supposed to be unaligned. Long term, | |
5079 | should rewrite so that only IA-64 specific data allocation pseudo-ops | |
5080 | are aligned by default. */ | |
5081 | {"2byte", stmt_cons_ua, 2}, | |
5082 | {"4byte", stmt_cons_ua, 4}, | |
5083 | {"8byte", stmt_cons_ua, 8}, | |
5084 | ||
800eeca4 JW |
5085 | { NULL, 0, 0 } |
5086 | }; | |
5087 | ||
5088 | static const struct pseudo_opcode | |
5089 | { | |
5090 | const char *name; | |
5091 | void (*handler) (int); | |
5092 | int arg; | |
5093 | } | |
5094 | pseudo_opcode[] = | |
5095 | { | |
5096 | /* these are more like pseudo-ops, but don't start with a dot */ | |
5097 | { "data1", cons, 1 }, | |
5098 | { "data2", cons, 2 }, | |
5099 | { "data4", cons, 4 }, | |
5100 | { "data8", cons, 8 }, | |
3969b680 | 5101 | { "data16", cons, 16 }, |
800eeca4 JW |
5102 | { "real4", stmt_float_cons, 'f' }, |
5103 | { "real8", stmt_float_cons, 'd' }, | |
5104 | { "real10", stmt_float_cons, 'x' }, | |
165a7f90 | 5105 | { "real16", stmt_float_cons, 'X' }, |
800eeca4 JW |
5106 | { "string", stringer, 0 }, |
5107 | { "stringz", stringer, 1 }, | |
5108 | ||
542d6675 | 5109 | /* unaligned versions: */ |
800eeca4 JW |
5110 | { "data2.ua", stmt_cons_ua, 2 }, |
5111 | { "data4.ua", stmt_cons_ua, 4 }, | |
5112 | { "data8.ua", stmt_cons_ua, 8 }, | |
3969b680 | 5113 | { "data16.ua", stmt_cons_ua, 16 }, |
800eeca4 JW |
5114 | { "real4.ua", float_cons, 'f' }, |
5115 | { "real8.ua", float_cons, 'd' }, | |
5116 | { "real10.ua", float_cons, 'x' }, | |
165a7f90 | 5117 | { "real16.ua", float_cons, 'X' }, |
800eeca4 JW |
5118 | }; |
5119 | ||
5120 | /* Declare a register by creating a symbol for it and entering it in | |
5121 | the symbol table. */ | |
542d6675 KH |
5122 | |
5123 | static symbolS * | |
800eeca4 JW |
5124 | declare_register (name, regnum) |
5125 | const char *name; | |
5126 | int regnum; | |
5127 | { | |
5128 | const char *err; | |
5129 | symbolS *sym; | |
5130 | ||
5131 | sym = symbol_new (name, reg_section, regnum, &zero_address_frag); | |
5132 | ||
5133 | err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym); | |
5134 | if (err) | |
5135 | as_fatal ("Inserting \"%s\" into register table failed: %s", | |
5136 | name, err); | |
5137 | ||
5138 | return sym; | |
5139 | } | |
5140 | ||
5141 | static void | |
5142 | declare_register_set (prefix, num_regs, base_regnum) | |
5143 | const char *prefix; | |
5144 | int num_regs; | |
5145 | int base_regnum; | |
5146 | { | |
5147 | char name[8]; | |
5148 | int i; | |
5149 | ||
5150 | for (i = 0; i < num_regs; ++i) | |
5151 | { | |
5152 | sprintf (name, "%s%u", prefix, i); | |
5153 | declare_register (name, base_regnum + i); | |
5154 | } | |
5155 | } | |
5156 | ||
5157 | static unsigned int | |
5158 | operand_width (opnd) | |
5159 | enum ia64_opnd opnd; | |
5160 | { | |
5161 | const struct ia64_operand *odesc = &elf64_ia64_operands[opnd]; | |
5162 | unsigned int bits = 0; | |
5163 | int i; | |
5164 | ||
5165 | bits = 0; | |
5166 | for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i) | |
5167 | bits += odesc->field[i].bits; | |
5168 | ||
5169 | return bits; | |
5170 | } | |
5171 | ||
87f8eb97 | 5172 | static enum operand_match_result |
800eeca4 JW |
5173 | operand_match (idesc, index, e) |
5174 | const struct ia64_opcode *idesc; | |
5175 | int index; | |
5176 | expressionS *e; | |
5177 | { | |
5178 | enum ia64_opnd opnd = idesc->operands[index]; | |
5179 | int bits, relocatable = 0; | |
5180 | struct insn_fix *fix; | |
5181 | bfd_signed_vma val; | |
5182 | ||
5183 | switch (opnd) | |
5184 | { | |
542d6675 | 5185 | /* constants: */ |
800eeca4 JW |
5186 | |
5187 | case IA64_OPND_AR_CCV: | |
5188 | if (e->X_op == O_register && e->X_add_number == REG_AR + 32) | |
87f8eb97 | 5189 | return OPERAND_MATCH; |
800eeca4 JW |
5190 | break; |
5191 | ||
c10d9d8f JW |
5192 | case IA64_OPND_AR_CSD: |
5193 | if (e->X_op == O_register && e->X_add_number == REG_AR + 25) | |
5194 | return OPERAND_MATCH; | |
5195 | break; | |
5196 | ||
800eeca4 JW |
5197 | case IA64_OPND_AR_PFS: |
5198 | if (e->X_op == O_register && e->X_add_number == REG_AR + 64) | |
87f8eb97 | 5199 | return OPERAND_MATCH; |
800eeca4 JW |
5200 | break; |
5201 | ||
5202 | case IA64_OPND_GR0: | |
5203 | if (e->X_op == O_register && e->X_add_number == REG_GR + 0) | |
87f8eb97 | 5204 | return OPERAND_MATCH; |
800eeca4 JW |
5205 | break; |
5206 | ||
5207 | case IA64_OPND_IP: | |
5208 | if (e->X_op == O_register && e->X_add_number == REG_IP) | |
87f8eb97 | 5209 | return OPERAND_MATCH; |
800eeca4 JW |
5210 | break; |
5211 | ||
5212 | case IA64_OPND_PR: | |
5213 | if (e->X_op == O_register && e->X_add_number == REG_PR) | |
87f8eb97 | 5214 | return OPERAND_MATCH; |
800eeca4 JW |
5215 | break; |
5216 | ||
5217 | case IA64_OPND_PR_ROT: | |
5218 | if (e->X_op == O_register && e->X_add_number == REG_PR_ROT) | |
87f8eb97 | 5219 | return OPERAND_MATCH; |
800eeca4 JW |
5220 | break; |
5221 | ||
5222 | case IA64_OPND_PSR: | |
5223 | if (e->X_op == O_register && e->X_add_number == REG_PSR) | |
87f8eb97 | 5224 | return OPERAND_MATCH; |
800eeca4 JW |
5225 | break; |
5226 | ||
5227 | case IA64_OPND_PSR_L: | |
5228 | if (e->X_op == O_register && e->X_add_number == REG_PSR_L) | |
87f8eb97 | 5229 | return OPERAND_MATCH; |
800eeca4 JW |
5230 | break; |
5231 | ||
5232 | case IA64_OPND_PSR_UM: | |
5233 | if (e->X_op == O_register && e->X_add_number == REG_PSR_UM) | |
87f8eb97 | 5234 | return OPERAND_MATCH; |
800eeca4 JW |
5235 | break; |
5236 | ||
5237 | case IA64_OPND_C1: | |
87f8eb97 JW |
5238 | if (e->X_op == O_constant) |
5239 | { | |
5240 | if (e->X_add_number == 1) | |
5241 | return OPERAND_MATCH; | |
5242 | else | |
5243 | return OPERAND_OUT_OF_RANGE; | |
5244 | } | |
800eeca4 JW |
5245 | break; |
5246 | ||
5247 | case IA64_OPND_C8: | |
87f8eb97 JW |
5248 | if (e->X_op == O_constant) |
5249 | { | |
5250 | if (e->X_add_number == 8) | |
5251 | return OPERAND_MATCH; | |
5252 | else | |
5253 | return OPERAND_OUT_OF_RANGE; | |
5254 | } | |
800eeca4 JW |
5255 | break; |
5256 | ||
5257 | case IA64_OPND_C16: | |
87f8eb97 JW |
5258 | if (e->X_op == O_constant) |
5259 | { | |
5260 | if (e->X_add_number == 16) | |
5261 | return OPERAND_MATCH; | |
5262 | else | |
5263 | return OPERAND_OUT_OF_RANGE; | |
5264 | } | |
800eeca4 JW |
5265 | break; |
5266 | ||
542d6675 | 5267 | /* register operands: */ |
800eeca4 JW |
5268 | |
5269 | case IA64_OPND_AR3: | |
5270 | if (e->X_op == O_register && e->X_add_number >= REG_AR | |
5271 | && e->X_add_number < REG_AR + 128) | |
87f8eb97 | 5272 | return OPERAND_MATCH; |
800eeca4 JW |
5273 | break; |
5274 | ||
5275 | case IA64_OPND_B1: | |
5276 | case IA64_OPND_B2: | |
5277 | if (e->X_op == O_register && e->X_add_number >= REG_BR | |
5278 | && e->X_add_number < REG_BR + 8) | |
87f8eb97 | 5279 | return OPERAND_MATCH; |
800eeca4 JW |
5280 | break; |
5281 | ||
5282 | case IA64_OPND_CR3: | |
5283 | if (e->X_op == O_register && e->X_add_number >= REG_CR | |
5284 | && e->X_add_number < REG_CR + 128) | |
87f8eb97 | 5285 | return OPERAND_MATCH; |
800eeca4 JW |
5286 | break; |
5287 | ||
5288 | case IA64_OPND_F1: | |
5289 | case IA64_OPND_F2: | |
5290 | case IA64_OPND_F3: | |
5291 | case IA64_OPND_F4: | |
5292 | if (e->X_op == O_register && e->X_add_number >= REG_FR | |
5293 | && e->X_add_number < REG_FR + 128) | |
87f8eb97 | 5294 | return OPERAND_MATCH; |
800eeca4 JW |
5295 | break; |
5296 | ||
5297 | case IA64_OPND_P1: | |
5298 | case IA64_OPND_P2: | |
5299 | if (e->X_op == O_register && e->X_add_number >= REG_P | |
5300 | && e->X_add_number < REG_P + 64) | |
87f8eb97 | 5301 | return OPERAND_MATCH; |
800eeca4 JW |
5302 | break; |
5303 | ||
5304 | case IA64_OPND_R1: | |
5305 | case IA64_OPND_R2: | |
5306 | case IA64_OPND_R3: | |
5307 | if (e->X_op == O_register && e->X_add_number >= REG_GR | |
5308 | && e->X_add_number < REG_GR + 128) | |
87f8eb97 | 5309 | return OPERAND_MATCH; |
800eeca4 JW |
5310 | break; |
5311 | ||
5312 | case IA64_OPND_R3_2: | |
87f8eb97 | 5313 | if (e->X_op == O_register && e->X_add_number >= REG_GR) |
40449e9f | 5314 | { |
87f8eb97 JW |
5315 | if (e->X_add_number < REG_GR + 4) |
5316 | return OPERAND_MATCH; | |
5317 | else if (e->X_add_number < REG_GR + 128) | |
5318 | return OPERAND_OUT_OF_RANGE; | |
5319 | } | |
800eeca4 JW |
5320 | break; |
5321 | ||
542d6675 | 5322 | /* indirect operands: */ |
800eeca4 JW |
5323 | case IA64_OPND_CPUID_R3: |
5324 | case IA64_OPND_DBR_R3: | |
5325 | case IA64_OPND_DTR_R3: | |
5326 | case IA64_OPND_ITR_R3: | |
5327 | case IA64_OPND_IBR_R3: | |
5328 | case IA64_OPND_MSR_R3: | |
5329 | case IA64_OPND_PKR_R3: | |
5330 | case IA64_OPND_PMC_R3: | |
5331 | case IA64_OPND_PMD_R3: | |
5332 | case IA64_OPND_RR_R3: | |
5333 | if (e->X_op == O_index && e->X_op_symbol | |
5334 | && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID | |
5335 | == opnd - IA64_OPND_CPUID_R3)) | |
87f8eb97 | 5336 | return OPERAND_MATCH; |
800eeca4 JW |
5337 | break; |
5338 | ||
5339 | case IA64_OPND_MR3: | |
5340 | if (e->X_op == O_index && !e->X_op_symbol) | |
87f8eb97 | 5341 | return OPERAND_MATCH; |
800eeca4 JW |
5342 | break; |
5343 | ||
542d6675 | 5344 | /* immediate operands: */ |
800eeca4 JW |
5345 | case IA64_OPND_CNT2a: |
5346 | case IA64_OPND_LEN4: | |
5347 | case IA64_OPND_LEN6: | |
5348 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5349 | if (e->X_op == O_constant) |
5350 | { | |
5351 | if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits)) | |
5352 | return OPERAND_MATCH; | |
5353 | else | |
5354 | return OPERAND_OUT_OF_RANGE; | |
5355 | } | |
800eeca4 JW |
5356 | break; |
5357 | ||
5358 | case IA64_OPND_CNT2b: | |
87f8eb97 JW |
5359 | if (e->X_op == O_constant) |
5360 | { | |
5361 | if ((bfd_vma) (e->X_add_number - 1) < 3) | |
5362 | return OPERAND_MATCH; | |
5363 | else | |
5364 | return OPERAND_OUT_OF_RANGE; | |
5365 | } | |
800eeca4 JW |
5366 | break; |
5367 | ||
5368 | case IA64_OPND_CNT2c: | |
5369 | val = e->X_add_number; | |
87f8eb97 JW |
5370 | if (e->X_op == O_constant) |
5371 | { | |
5372 | if ((val == 0 || val == 7 || val == 15 || val == 16)) | |
5373 | return OPERAND_MATCH; | |
5374 | else | |
5375 | return OPERAND_OUT_OF_RANGE; | |
5376 | } | |
800eeca4 JW |
5377 | break; |
5378 | ||
5379 | case IA64_OPND_SOR: | |
5380 | /* SOR must be an integer multiple of 8 */ | |
87f8eb97 JW |
5381 | if (e->X_op == O_constant && e->X_add_number & 0x7) |
5382 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5383 | case IA64_OPND_SOF: |
5384 | case IA64_OPND_SOL: | |
87f8eb97 JW |
5385 | if (e->X_op == O_constant) |
5386 | { | |
5387 | if ((bfd_vma) e->X_add_number <= 96) | |
5388 | return OPERAND_MATCH; | |
5389 | else | |
5390 | return OPERAND_OUT_OF_RANGE; | |
5391 | } | |
800eeca4 JW |
5392 | break; |
5393 | ||
5394 | case IA64_OPND_IMMU62: | |
5395 | if (e->X_op == O_constant) | |
542d6675 | 5396 | { |
800eeca4 | 5397 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62)) |
87f8eb97 JW |
5398 | return OPERAND_MATCH; |
5399 | else | |
5400 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5401 | } |
197865e8 | 5402 | else |
542d6675 KH |
5403 | { |
5404 | /* FIXME -- need 62-bit relocation type */ | |
5405 | as_bad (_("62-bit relocation not yet implemented")); | |
5406 | } | |
800eeca4 JW |
5407 | break; |
5408 | ||
5409 | case IA64_OPND_IMMU64: | |
5410 | if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup | |
5411 | || e->X_op == O_subtract) | |
5412 | { | |
5413 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5414 | fix->code = BFD_RELOC_IA64_IMM64; | |
5415 | if (e->X_op != O_subtract) | |
5416 | { | |
5417 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5418 | if (e->X_op == O_pseudo_fixup) | |
5419 | e->X_op = O_symbol; | |
5420 | } | |
5421 | ||
5422 | fix->opnd = idesc->operands[index]; | |
5423 | fix->expr = *e; | |
5424 | fix->is_pcrel = 0; | |
5425 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5426 | return OPERAND_MATCH; |
800eeca4 JW |
5427 | } |
5428 | else if (e->X_op == O_constant) | |
87f8eb97 | 5429 | return OPERAND_MATCH; |
800eeca4 JW |
5430 | break; |
5431 | ||
5432 | case IA64_OPND_CCNT5: | |
5433 | case IA64_OPND_CNT5: | |
5434 | case IA64_OPND_CNT6: | |
5435 | case IA64_OPND_CPOS6a: | |
5436 | case IA64_OPND_CPOS6b: | |
5437 | case IA64_OPND_CPOS6c: | |
5438 | case IA64_OPND_IMMU2: | |
5439 | case IA64_OPND_IMMU7a: | |
5440 | case IA64_OPND_IMMU7b: | |
800eeca4 JW |
5441 | case IA64_OPND_IMMU21: |
5442 | case IA64_OPND_IMMU24: | |
5443 | case IA64_OPND_MBTYPE4: | |
5444 | case IA64_OPND_MHTYPE8: | |
5445 | case IA64_OPND_POS6: | |
5446 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 JW |
5447 | if (e->X_op == O_constant) |
5448 | { | |
5449 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) | |
5450 | return OPERAND_MATCH; | |
5451 | else | |
5452 | return OPERAND_OUT_OF_RANGE; | |
5453 | } | |
800eeca4 JW |
5454 | break; |
5455 | ||
bf3ca999 TW |
5456 | case IA64_OPND_IMMU9: |
5457 | bits = operand_width (idesc->operands[index]); | |
87f8eb97 | 5458 | if (e->X_op == O_constant) |
542d6675 | 5459 | { |
87f8eb97 JW |
5460 | if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) |
5461 | { | |
5462 | int lobits = e->X_add_number & 0x3; | |
5463 | if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0) | |
5464 | e->X_add_number |= (bfd_vma) 0x3; | |
5465 | return OPERAND_MATCH; | |
5466 | } | |
5467 | else | |
5468 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5469 | } |
bf3ca999 TW |
5470 | break; |
5471 | ||
800eeca4 JW |
5472 | case IA64_OPND_IMM44: |
5473 | /* least 16 bits must be zero */ | |
5474 | if ((e->X_add_number & 0xffff) != 0) | |
87f8eb97 JW |
5475 | /* XXX technically, this is wrong: we should not be issuing warning |
5476 | messages until we're sure this instruction pattern is going to | |
5477 | be used! */ | |
542d6675 | 5478 | as_warn (_("lower 16 bits of mask ignored")); |
800eeca4 | 5479 | |
87f8eb97 | 5480 | if (e->X_op == O_constant) |
542d6675 | 5481 | { |
87f8eb97 JW |
5482 | if (((e->X_add_number >= 0 |
5483 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44)) | |
5484 | || (e->X_add_number < 0 | |
5485 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44)))) | |
542d6675 | 5486 | { |
87f8eb97 JW |
5487 | /* sign-extend */ |
5488 | if (e->X_add_number >= 0 | |
5489 | && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0) | |
5490 | { | |
5491 | e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1); | |
5492 | } | |
5493 | return OPERAND_MATCH; | |
542d6675 | 5494 | } |
87f8eb97 JW |
5495 | else |
5496 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5497 | } |
800eeca4 JW |
5498 | break; |
5499 | ||
5500 | case IA64_OPND_IMM17: | |
5501 | /* bit 0 is a don't care (pr0 is hardwired to 1) */ | |
87f8eb97 | 5502 | if (e->X_op == O_constant) |
542d6675 | 5503 | { |
87f8eb97 JW |
5504 | if (((e->X_add_number >= 0 |
5505 | && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17)) | |
5506 | || (e->X_add_number < 0 | |
5507 | && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17)))) | |
542d6675 | 5508 | { |
87f8eb97 JW |
5509 | /* sign-extend */ |
5510 | if (e->X_add_number >= 0 | |
5511 | && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0) | |
5512 | { | |
5513 | e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1); | |
5514 | } | |
5515 | return OPERAND_MATCH; | |
542d6675 | 5516 | } |
87f8eb97 JW |
5517 | else |
5518 | return OPERAND_OUT_OF_RANGE; | |
542d6675 | 5519 | } |
800eeca4 JW |
5520 | break; |
5521 | ||
5522 | case IA64_OPND_IMM14: | |
5523 | case IA64_OPND_IMM22: | |
5524 | relocatable = 1; | |
5525 | case IA64_OPND_IMM1: | |
5526 | case IA64_OPND_IMM8: | |
5527 | case IA64_OPND_IMM8U4: | |
5528 | case IA64_OPND_IMM8M1: | |
5529 | case IA64_OPND_IMM8M1U4: | |
5530 | case IA64_OPND_IMM8M1U8: | |
5531 | case IA64_OPND_IMM9a: | |
5532 | case IA64_OPND_IMM9b: | |
5533 | bits = operand_width (idesc->operands[index]); | |
5534 | if (relocatable && (e->X_op == O_symbol | |
5535 | || e->X_op == O_subtract | |
5536 | || e->X_op == O_pseudo_fixup)) | |
5537 | { | |
5538 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5539 | ||
5540 | if (idesc->operands[index] == IA64_OPND_IMM14) | |
5541 | fix->code = BFD_RELOC_IA64_IMM14; | |
5542 | else | |
5543 | fix->code = BFD_RELOC_IA64_IMM22; | |
5544 | ||
5545 | if (e->X_op != O_subtract) | |
5546 | { | |
5547 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
5548 | if (e->X_op == O_pseudo_fixup) | |
5549 | e->X_op = O_symbol; | |
5550 | } | |
5551 | ||
5552 | fix->opnd = idesc->operands[index]; | |
5553 | fix->expr = *e; | |
5554 | fix->is_pcrel = 0; | |
5555 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5556 | return OPERAND_MATCH; |
800eeca4 JW |
5557 | } |
5558 | else if (e->X_op != O_constant | |
5559 | && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8)) | |
87f8eb97 | 5560 | return OPERAND_MISMATCH; |
800eeca4 JW |
5561 | |
5562 | if (opnd == IA64_OPND_IMM8M1U4) | |
5563 | { | |
5564 | /* Zero is not valid for unsigned compares that take an adjusted | |
5565 | constant immediate range. */ | |
5566 | if (e->X_add_number == 0) | |
87f8eb97 | 5567 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5568 | |
5569 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5570 | checks will work. */ | |
5571 | val = e->X_add_number; | |
197865e8 KH |
5572 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5573 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5574 | val = ((val << 32) >> 32); |
5575 | ||
5576 | /* Check for 0x100000000. This is valid because | |
5577 | 0x100000000-1 is the same as ((uint32_t) -1). */ | |
5578 | if (val == ((bfd_signed_vma) 1 << 32)) | |
87f8eb97 | 5579 | return OPERAND_MATCH; |
800eeca4 JW |
5580 | |
5581 | val = val - 1; | |
5582 | } | |
5583 | else if (opnd == IA64_OPND_IMM8M1U8) | |
5584 | { | |
5585 | /* Zero is not valid for unsigned compares that take an adjusted | |
5586 | constant immediate range. */ | |
5587 | if (e->X_add_number == 0) | |
87f8eb97 | 5588 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5589 | |
5590 | /* Check for 0x10000000000000000. */ | |
5591 | if (e->X_op == O_big) | |
5592 | { | |
5593 | if (generic_bignum[0] == 0 | |
5594 | && generic_bignum[1] == 0 | |
5595 | && generic_bignum[2] == 0 | |
5596 | && generic_bignum[3] == 0 | |
5597 | && generic_bignum[4] == 1) | |
87f8eb97 | 5598 | return OPERAND_MATCH; |
800eeca4 | 5599 | else |
87f8eb97 | 5600 | return OPERAND_OUT_OF_RANGE; |
800eeca4 JW |
5601 | } |
5602 | else | |
5603 | val = e->X_add_number - 1; | |
5604 | } | |
5605 | else if (opnd == IA64_OPND_IMM8M1) | |
5606 | val = e->X_add_number - 1; | |
5607 | else if (opnd == IA64_OPND_IMM8U4) | |
5608 | { | |
5609 | /* Sign-extend 32-bit unsigned numbers, so that the following range | |
5610 | checks will work. */ | |
5611 | val = e->X_add_number; | |
197865e8 KH |
5612 | if (((val & (~(bfd_vma) 0 << 32)) == 0) |
5613 | && ((val & ((bfd_vma) 1 << 31)) != 0)) | |
800eeca4 JW |
5614 | val = ((val << 32) >> 32); |
5615 | } | |
5616 | else | |
5617 | val = e->X_add_number; | |
5618 | ||
2434f565 JW |
5619 | if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1))) |
5620 | || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1)))) | |
87f8eb97 JW |
5621 | return OPERAND_MATCH; |
5622 | else | |
5623 | return OPERAND_OUT_OF_RANGE; | |
800eeca4 JW |
5624 | |
5625 | case IA64_OPND_INC3: | |
5626 | /* +/- 1, 4, 8, 16 */ | |
5627 | val = e->X_add_number; | |
5628 | if (val < 0) | |
5629 | val = -val; | |
87f8eb97 JW |
5630 | if (e->X_op == O_constant) |
5631 | { | |
5632 | if ((val == 1 || val == 4 || val == 8 || val == 16)) | |
5633 | return OPERAND_MATCH; | |
5634 | else | |
5635 | return OPERAND_OUT_OF_RANGE; | |
5636 | } | |
800eeca4 JW |
5637 | break; |
5638 | ||
5639 | case IA64_OPND_TGT25: | |
5640 | case IA64_OPND_TGT25b: | |
5641 | case IA64_OPND_TGT25c: | |
5642 | case IA64_OPND_TGT64: | |
5643 | if (e->X_op == O_symbol) | |
5644 | { | |
5645 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5646 | if (opnd == IA64_OPND_TGT25) | |
5647 | fix->code = BFD_RELOC_IA64_PCREL21F; | |
5648 | else if (opnd == IA64_OPND_TGT25b) | |
5649 | fix->code = BFD_RELOC_IA64_PCREL21M; | |
5650 | else if (opnd == IA64_OPND_TGT25c) | |
5651 | fix->code = BFD_RELOC_IA64_PCREL21B; | |
542d6675 | 5652 | else if (opnd == IA64_OPND_TGT64) |
c67e42c9 RH |
5653 | fix->code = BFD_RELOC_IA64_PCREL60B; |
5654 | else | |
5655 | abort (); | |
5656 | ||
800eeca4 JW |
5657 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); |
5658 | fix->opnd = idesc->operands[index]; | |
5659 | fix->expr = *e; | |
5660 | fix->is_pcrel = 1; | |
5661 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5662 | return OPERAND_MATCH; |
800eeca4 JW |
5663 | } |
5664 | case IA64_OPND_TAG13: | |
5665 | case IA64_OPND_TAG13b: | |
5666 | switch (e->X_op) | |
5667 | { | |
5668 | case O_constant: | |
87f8eb97 | 5669 | return OPERAND_MATCH; |
800eeca4 JW |
5670 | |
5671 | case O_symbol: | |
5672 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
fa1cb89c JW |
5673 | /* There are no external relocs for TAG13/TAG13b fields, so we |
5674 | create a dummy reloc. This will not live past md_apply_fix3. */ | |
5675 | fix->code = BFD_RELOC_UNUSED; | |
5676 | fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); | |
800eeca4 JW |
5677 | fix->opnd = idesc->operands[index]; |
5678 | fix->expr = *e; | |
5679 | fix->is_pcrel = 1; | |
5680 | ++CURR_SLOT.num_fixups; | |
87f8eb97 | 5681 | return OPERAND_MATCH; |
800eeca4 JW |
5682 | |
5683 | default: | |
5684 | break; | |
5685 | } | |
5686 | break; | |
5687 | ||
a823923b RH |
5688 | case IA64_OPND_LDXMOV: |
5689 | fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; | |
5690 | fix->code = BFD_RELOC_IA64_LDXMOV; | |
5691 | fix->opnd = idesc->operands[index]; | |
5692 | fix->expr = *e; | |
5693 | fix->is_pcrel = 0; | |
5694 | ++CURR_SLOT.num_fixups; | |
5695 | return OPERAND_MATCH; | |
5696 | ||
800eeca4 JW |
5697 | default: |
5698 | break; | |
5699 | } | |
87f8eb97 | 5700 | return OPERAND_MISMATCH; |
800eeca4 JW |
5701 | } |
5702 | ||
5703 | static int | |
5704 | parse_operand (e) | |
5705 | expressionS *e; | |
5706 | { | |
5707 | int sep = '\0'; | |
5708 | ||
5709 | memset (e, 0, sizeof (*e)); | |
5710 | e->X_op = O_absent; | |
5711 | SKIP_WHITESPACE (); | |
5712 | if (*input_line_pointer != '}') | |
5713 | expression (e); | |
5714 | sep = *input_line_pointer++; | |
5715 | ||
5716 | if (sep == '}') | |
5717 | { | |
5718 | if (!md.manual_bundling) | |
5719 | as_warn ("Found '}' when manual bundling is off"); | |
5720 | else | |
5721 | CURR_SLOT.manual_bundling_off = 1; | |
5722 | md.manual_bundling = 0; | |
5723 | sep = '\0'; | |
5724 | } | |
5725 | return sep; | |
5726 | } | |
5727 | ||
5728 | /* Returns the next entry in the opcode table that matches the one in | |
5729 | IDESC, and frees the entry in IDESC. If no matching entry is | |
197865e8 | 5730 | found, NULL is returned instead. */ |
800eeca4 JW |
5731 | |
5732 | static struct ia64_opcode * | |
5733 | get_next_opcode (struct ia64_opcode *idesc) | |
5734 | { | |
5735 | struct ia64_opcode *next = ia64_find_next_opcode (idesc); | |
5736 | ia64_free_opcode (idesc); | |
5737 | return next; | |
5738 | } | |
5739 | ||
5740 | /* Parse the operands for the opcode and find the opcode variant that | |
5741 | matches the specified operands, or NULL if no match is possible. */ | |
542d6675 KH |
5742 | |
5743 | static struct ia64_opcode * | |
800eeca4 JW |
5744 | parse_operands (idesc) |
5745 | struct ia64_opcode *idesc; | |
5746 | { | |
5747 | int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0; | |
87f8eb97 | 5748 | int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0; |
800eeca4 | 5749 | enum ia64_opnd expected_operand = IA64_OPND_NIL; |
87f8eb97 | 5750 | enum operand_match_result result; |
800eeca4 JW |
5751 | char mnemonic[129]; |
5752 | char *first_arg = 0, *end, *saved_input_pointer; | |
5753 | unsigned int sof; | |
5754 | ||
5755 | assert (strlen (idesc->name) <= 128); | |
5756 | ||
5757 | strcpy (mnemonic, idesc->name); | |
5758 | if (idesc->operands[2] == IA64_OPND_SOF) | |
5759 | { | |
5760 | /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we | |
5761 | can't parse the first operand until we have parsed the | |
5762 | remaining operands of the "alloc" instruction. */ | |
5763 | SKIP_WHITESPACE (); | |
5764 | first_arg = input_line_pointer; | |
5765 | end = strchr (input_line_pointer, '='); | |
5766 | if (!end) | |
5767 | { | |
5768 | as_bad ("Expected separator `='"); | |
5769 | return 0; | |
5770 | } | |
5771 | input_line_pointer = end + 1; | |
5772 | ++i; | |
5773 | ++num_outputs; | |
5774 | } | |
5775 | ||
5776 | for (; i < NELEMS (CURR_SLOT.opnd); ++i) | |
5777 | { | |
5778 | sep = parse_operand (CURR_SLOT.opnd + i); | |
5779 | if (CURR_SLOT.opnd[i].X_op == O_absent) | |
5780 | break; | |
5781 | ||
5782 | ++num_operands; | |
5783 | ||
5784 | if (sep != '=' && sep != ',') | |
5785 | break; | |
5786 | ||
5787 | if (sep == '=') | |
5788 | { | |
5789 | if (num_outputs > 0) | |
5790 | as_bad ("Duplicate equal sign (=) in instruction"); | |
5791 | else | |
5792 | num_outputs = i + 1; | |
5793 | } | |
5794 | } | |
5795 | if (sep != '\0') | |
5796 | { | |
5797 | as_bad ("Illegal operand separator `%c'", sep); | |
5798 | return 0; | |
5799 | } | |
197865e8 | 5800 | |
800eeca4 JW |
5801 | if (idesc->operands[2] == IA64_OPND_SOF) |
5802 | { | |
5803 | /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */ | |
5804 | know (strcmp (idesc->name, "alloc") == 0); | |
5805 | if (num_operands == 5 /* first_arg not included in this count! */ | |
5806 | && CURR_SLOT.opnd[2].X_op == O_constant | |
5807 | && CURR_SLOT.opnd[3].X_op == O_constant | |
5808 | && CURR_SLOT.opnd[4].X_op == O_constant | |
5809 | && CURR_SLOT.opnd[5].X_op == O_constant) | |
5810 | { | |
5811 | sof = set_regstack (CURR_SLOT.opnd[2].X_add_number, | |
5812 | CURR_SLOT.opnd[3].X_add_number, | |
5813 | CURR_SLOT.opnd[4].X_add_number, | |
5814 | CURR_SLOT.opnd[5].X_add_number); | |
5815 | ||
542d6675 | 5816 | /* now we can parse the first arg: */ |
800eeca4 JW |
5817 | saved_input_pointer = input_line_pointer; |
5818 | input_line_pointer = first_arg; | |
5819 | sep = parse_operand (CURR_SLOT.opnd + 0); | |
5820 | if (sep != '=') | |
5821 | --num_outputs; /* force error */ | |
5822 | input_line_pointer = saved_input_pointer; | |
5823 | ||
5824 | CURR_SLOT.opnd[2].X_add_number = sof; | |
5825 | CURR_SLOT.opnd[3].X_add_number | |
5826 | = sof - CURR_SLOT.opnd[4].X_add_number; | |
5827 | CURR_SLOT.opnd[4] = CURR_SLOT.opnd[5]; | |
5828 | } | |
5829 | } | |
5830 | ||
5831 | highest_unmatched_operand = 0; | |
87f8eb97 JW |
5832 | curr_out_of_range_pos = -1; |
5833 | error_pos = 0; | |
800eeca4 JW |
5834 | expected_operand = idesc->operands[0]; |
5835 | for (; idesc; idesc = get_next_opcode (idesc)) | |
5836 | { | |
5837 | if (num_outputs != idesc->num_outputs) | |
5838 | continue; /* mismatch in # of outputs */ | |
5839 | ||
5840 | CURR_SLOT.num_fixups = 0; | |
87f8eb97 JW |
5841 | |
5842 | /* Try to match all operands. If we see an out-of-range operand, | |
5843 | then continue trying to match the rest of the operands, since if | |
5844 | the rest match, then this idesc will give the best error message. */ | |
5845 | ||
5846 | out_of_range_pos = -1; | |
800eeca4 | 5847 | for (i = 0; i < num_operands && idesc->operands[i]; ++i) |
87f8eb97 JW |
5848 | { |
5849 | result = operand_match (idesc, i, CURR_SLOT.opnd + i); | |
5850 | if (result != OPERAND_MATCH) | |
5851 | { | |
5852 | if (result != OPERAND_OUT_OF_RANGE) | |
5853 | break; | |
5854 | if (out_of_range_pos < 0) | |
5855 | /* remember position of the first out-of-range operand: */ | |
5856 | out_of_range_pos = i; | |
5857 | } | |
5858 | } | |
800eeca4 | 5859 | |
87f8eb97 JW |
5860 | /* If we did not match all operands, or if at least one operand was |
5861 | out-of-range, then this idesc does not match. Keep track of which | |
5862 | idesc matched the most operands before failing. If we have two | |
5863 | idescs that failed at the same position, and one had an out-of-range | |
5864 | operand, then prefer the out-of-range operand. Thus if we have | |
5865 | "add r0=0x1000000,r1" we get an error saying the constant is out | |
5866 | of range instead of an error saying that the constant should have been | |
5867 | a register. */ | |
5868 | ||
5869 | if (i != num_operands || out_of_range_pos >= 0) | |
800eeca4 | 5870 | { |
87f8eb97 JW |
5871 | if (i > highest_unmatched_operand |
5872 | || (i == highest_unmatched_operand | |
5873 | && out_of_range_pos > curr_out_of_range_pos)) | |
800eeca4 JW |
5874 | { |
5875 | highest_unmatched_operand = i; | |
87f8eb97 JW |
5876 | if (out_of_range_pos >= 0) |
5877 | { | |
5878 | expected_operand = idesc->operands[out_of_range_pos]; | |
5879 | error_pos = out_of_range_pos; | |
5880 | } | |
5881 | else | |
5882 | { | |
5883 | expected_operand = idesc->operands[i]; | |
5884 | error_pos = i; | |
5885 | } | |
5886 | curr_out_of_range_pos = out_of_range_pos; | |
800eeca4 JW |
5887 | } |
5888 | continue; | |
5889 | } | |
5890 | ||
5891 | if (num_operands < NELEMS (idesc->operands) | |
5892 | && idesc->operands[num_operands]) | |
5893 | continue; /* mismatch in number of arguments */ | |
5894 | ||
5895 | break; | |
5896 | } | |
5897 | if (!idesc) | |
5898 | { | |
5899 | if (expected_operand) | |
5900 | as_bad ("Operand %u of `%s' should be %s", | |
87f8eb97 | 5901 | error_pos + 1, mnemonic, |
800eeca4 JW |
5902 | elf64_ia64_operands[expected_operand].desc); |
5903 | else | |
5904 | as_bad ("Operand mismatch"); | |
5905 | return 0; | |
5906 | } | |
5907 | return idesc; | |
5908 | } | |
5909 | ||
88be23ec BS |
5910 | /* Keep track of state necessary to determine whether a NOP is necessary |
5911 | to avoid an erratum in A and B step Itanium chips, and return 1 if we | |
5912 | detect a case where additional NOPs may be necessary. */ | |
5913 | static int | |
5914 | errata_nop_necessary_p (slot, insn_unit) | |
5915 | struct slot *slot; | |
5916 | enum ia64_unit insn_unit; | |
5917 | { | |
5918 | int i; | |
5919 | struct group *this_group = md.last_groups + md.group_idx; | |
5920 | struct group *prev_group = md.last_groups + (md.group_idx + 2) % 3; | |
5921 | struct ia64_opcode *idesc = slot->idesc; | |
5922 | ||
5923 | /* Test whether this could be the first insn in a problematic sequence. */ | |
5924 | if (insn_unit == IA64_UNIT_F) | |
5925 | { | |
5926 | for (i = 0; i < idesc->num_outputs; i++) | |
5927 | if (idesc->operands[i] == IA64_OPND_P1 | |
5928 | || idesc->operands[i] == IA64_OPND_P2) | |
5929 | { | |
5930 | int regno = slot->opnd[i].X_add_number - REG_P; | |
3557da92 | 5931 | /* Ignore invalid operands; they generate errors elsewhere. */ |
ca683b78 | 5932 | if (regno >= 64) |
3557da92 | 5933 | return 0; |
88be23ec BS |
5934 | this_group->p_reg_set[regno] = 1; |
5935 | } | |
5936 | } | |
5937 | ||
5938 | /* Test whether this could be the second insn in a problematic sequence. */ | |
5939 | if (insn_unit == IA64_UNIT_M && slot->qp_regno > 0 | |
5940 | && prev_group->p_reg_set[slot->qp_regno]) | |
5941 | { | |
5942 | for (i = 0; i < idesc->num_outputs; i++) | |
5943 | if (idesc->operands[i] == IA64_OPND_R1 | |
5944 | || idesc->operands[i] == IA64_OPND_R2 | |
5945 | || idesc->operands[i] == IA64_OPND_R3) | |
5946 | { | |
5947 | int regno = slot->opnd[i].X_add_number - REG_GR; | |
3557da92 | 5948 | /* Ignore invalid operands; they generate errors elsewhere. */ |
ca683b78 | 5949 | if (regno >= 128) |
3557da92 | 5950 | return 0; |
88be23ec BS |
5951 | if (strncmp (idesc->name, "add", 3) != 0 |
5952 | && strncmp (idesc->name, "sub", 3) != 0 | |
5953 | && strncmp (idesc->name, "shladd", 6) != 0 | |
5954 | && (idesc->flags & IA64_OPCODE_POSTINC) == 0) | |
5955 | this_group->g_reg_set_conditionally[regno] = 1; | |
5956 | } | |
5957 | } | |
5958 | ||
5959 | /* Test whether this could be the third insn in a problematic sequence. */ | |
5960 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++) | |
5961 | { | |
5962 | if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */ | |
5963 | idesc->operands[i] == IA64_OPND_R3 | |
5964 | /* For mov indirect. */ | |
5965 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
5966 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
5967 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
5968 | || idesc->operands[i] == IA64_OPND_PKR_R3 | |
5969 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
5970 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
5971 | || idesc->operands[i] == IA64_OPND_MSR_R3 | |
5972 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
5973 | /* For itr. */ | |
5974 | || idesc->operands[i] == IA64_OPND_ITR_R3 | |
5975 | || idesc->operands[i] == IA64_OPND_DTR_R3 | |
5976 | /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */ | |
5977 | || idesc->operands[i] == IA64_OPND_MR3) | |
5978 | { | |
5979 | int regno = slot->opnd[i].X_add_number - REG_GR; | |
3557da92 | 5980 | /* Ignore invalid operands; they generate errors elsewhere. */ |
ca683b78 | 5981 | if (regno >= 128) |
3557da92 | 5982 | return 0; |
88be23ec BS |
5983 | if (idesc->operands[i] == IA64_OPND_R3) |
5984 | { | |
5985 | if (strcmp (idesc->name, "fc") != 0 | |
5986 | && strcmp (idesc->name, "tak") != 0 | |
5987 | && strcmp (idesc->name, "thash") != 0 | |
5988 | && strcmp (idesc->name, "tpa") != 0 | |
5989 | && strcmp (idesc->name, "ttag") != 0 | |
5990 | && strncmp (idesc->name, "ptr", 3) != 0 | |
5991 | && strncmp (idesc->name, "ptc", 3) != 0 | |
5992 | && strncmp (idesc->name, "probe", 5) != 0) | |
40449e9f | 5993 | return 0; |
88be23ec | 5994 | } |
bc805888 | 5995 | if (prev_group->g_reg_set_conditionally[regno]) |
88be23ec BS |
5996 | return 1; |
5997 | } | |
5998 | } | |
5999 | return 0; | |
6000 | } | |
6001 | ||
800eeca4 JW |
6002 | static void |
6003 | build_insn (slot, insnp) | |
6004 | struct slot *slot; | |
6005 | bfd_vma *insnp; | |
6006 | { | |
6007 | const struct ia64_operand *odesc, *o2desc; | |
6008 | struct ia64_opcode *idesc = slot->idesc; | |
6009 | bfd_signed_vma insn, val; | |
6010 | const char *err; | |
6011 | int i; | |
6012 | ||
6013 | insn = idesc->opcode | slot->qp_regno; | |
6014 | ||
6015 | for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i) | |
6016 | { | |
c67e42c9 RH |
6017 | if (slot->opnd[i].X_op == O_register |
6018 | || slot->opnd[i].X_op == O_constant | |
6019 | || slot->opnd[i].X_op == O_index) | |
6020 | val = slot->opnd[i].X_add_number; | |
6021 | else if (slot->opnd[i].X_op == O_big) | |
800eeca4 | 6022 | { |
c67e42c9 RH |
6023 | /* This must be the value 0x10000000000000000. */ |
6024 | assert (idesc->operands[i] == IA64_OPND_IMM8M1U8); | |
6025 | val = 0; | |
6026 | } | |
6027 | else | |
6028 | val = 0; | |
6029 | ||
6030 | switch (idesc->operands[i]) | |
6031 | { | |
6032 | case IA64_OPND_IMMU64: | |
800eeca4 JW |
6033 | *insnp++ = (val >> 22) & 0x1ffffffffffLL; |
6034 | insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27) | |
6035 | | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21) | |
6036 | | (((val >> 63) & 0x1) << 36)); | |
c67e42c9 RH |
6037 | continue; |
6038 | ||
6039 | case IA64_OPND_IMMU62: | |
542d6675 KH |
6040 | val &= 0x3fffffffffffffffULL; |
6041 | if (val != slot->opnd[i].X_add_number) | |
6042 | as_warn (_("Value truncated to 62 bits")); | |
6043 | *insnp++ = (val >> 21) & 0x1ffffffffffLL; | |
6044 | insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36)); | |
c67e42c9 | 6045 | continue; |
800eeca4 | 6046 | |
c67e42c9 RH |
6047 | case IA64_OPND_TGT64: |
6048 | val >>= 4; | |
6049 | *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2; | |
6050 | insn |= ((((val >> 59) & 0x1) << 36) | |
6051 | | (((val >> 0) & 0xfffff) << 13)); | |
6052 | continue; | |
800eeca4 | 6053 | |
c67e42c9 RH |
6054 | case IA64_OPND_AR3: |
6055 | val -= REG_AR; | |
6056 | break; | |
6057 | ||
6058 | case IA64_OPND_B1: | |
6059 | case IA64_OPND_B2: | |
6060 | val -= REG_BR; | |
6061 | break; | |
6062 | ||
6063 | case IA64_OPND_CR3: | |
6064 | val -= REG_CR; | |
6065 | break; | |
6066 | ||
6067 | case IA64_OPND_F1: | |
6068 | case IA64_OPND_F2: | |
6069 | case IA64_OPND_F3: | |
6070 | case IA64_OPND_F4: | |
6071 | val -= REG_FR; | |
6072 | break; | |
6073 | ||
6074 | case IA64_OPND_P1: | |
6075 | case IA64_OPND_P2: | |
6076 | val -= REG_P; | |
6077 | break; | |
6078 | ||
6079 | case IA64_OPND_R1: | |
6080 | case IA64_OPND_R2: | |
6081 | case IA64_OPND_R3: | |
6082 | case IA64_OPND_R3_2: | |
6083 | case IA64_OPND_CPUID_R3: | |
6084 | case IA64_OPND_DBR_R3: | |
6085 | case IA64_OPND_DTR_R3: | |
6086 | case IA64_OPND_ITR_R3: | |
6087 | case IA64_OPND_IBR_R3: | |
6088 | case IA64_OPND_MR3: | |
6089 | case IA64_OPND_MSR_R3: | |
6090 | case IA64_OPND_PKR_R3: | |
6091 | case IA64_OPND_PMC_R3: | |
6092 | case IA64_OPND_PMD_R3: | |
197865e8 | 6093 | case IA64_OPND_RR_R3: |
c67e42c9 RH |
6094 | val -= REG_GR; |
6095 | break; | |
6096 | ||
6097 | default: | |
6098 | break; | |
6099 | } | |
6100 | ||
6101 | odesc = elf64_ia64_operands + idesc->operands[i]; | |
6102 | err = (*odesc->insert) (odesc, val, &insn); | |
6103 | if (err) | |
6104 | as_bad_where (slot->src_file, slot->src_line, | |
6105 | "Bad operand value: %s", err); | |
6106 | if (idesc->flags & IA64_OPCODE_PSEUDO) | |
6107 | { | |
6108 | if ((idesc->flags & IA64_OPCODE_F2_EQ_F3) | |
6109 | && odesc == elf64_ia64_operands + IA64_OPND_F3) | |
6110 | { | |
6111 | o2desc = elf64_ia64_operands + IA64_OPND_F2; | |
6112 | (*o2desc->insert) (o2desc, val, &insn); | |
800eeca4 | 6113 | } |
c67e42c9 RH |
6114 | if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT) |
6115 | && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a | |
6116 | || odesc == elf64_ia64_operands + IA64_OPND_POS6)) | |
800eeca4 | 6117 | { |
c67e42c9 RH |
6118 | o2desc = elf64_ia64_operands + IA64_OPND_LEN6; |
6119 | (*o2desc->insert) (o2desc, 64 - val, &insn); | |
800eeca4 JW |
6120 | } |
6121 | } | |
6122 | } | |
6123 | *insnp = insn; | |
6124 | } | |
6125 | ||
6126 | static void | |
6127 | emit_one_bundle () | |
6128 | { | |
6129 | unsigned int manual_bundling_on = 0, manual_bundling_off = 0; | |
6130 | unsigned int manual_bundling = 0; | |
6131 | enum ia64_unit required_unit, insn_unit = 0; | |
6132 | enum ia64_insn_type type[3], insn_type; | |
6133 | unsigned int template, orig_template; | |
542d6675 | 6134 | bfd_vma insn[3] = { -1, -1, -1 }; |
800eeca4 JW |
6135 | struct ia64_opcode *idesc; |
6136 | int end_of_insn_group = 0, user_template = -1; | |
6137 | int n, i, j, first, curr; | |
d6e78c11 | 6138 | unw_rec_list *ptr, *last_ptr, *end_ptr; |
800eeca4 JW |
6139 | bfd_vma t0 = 0, t1 = 0; |
6140 | struct label_fix *lfix; | |
6141 | struct insn_fix *ifix; | |
6142 | char mnemonic[16]; | |
6143 | fixS *fix; | |
6144 | char *f; | |
5a9ff93d | 6145 | int addr_mod; |
800eeca4 JW |
6146 | |
6147 | first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; | |
6148 | know (first >= 0 & first < NUM_SLOTS); | |
6149 | n = MIN (3, md.num_slots_in_use); | |
6150 | ||
6151 | /* Determine template: user user_template if specified, best match | |
542d6675 | 6152 | otherwise: */ |
800eeca4 JW |
6153 | |
6154 | if (md.slot[first].user_template >= 0) | |
6155 | user_template = template = md.slot[first].user_template; | |
6156 | else | |
6157 | { | |
032efc85 | 6158 | /* Auto select appropriate template. */ |
800eeca4 JW |
6159 | memset (type, 0, sizeof (type)); |
6160 | curr = first; | |
6161 | for (i = 0; i < n; ++i) | |
6162 | { | |
032efc85 RH |
6163 | if (md.slot[curr].label_fixups && i != 0) |
6164 | break; | |
800eeca4 JW |
6165 | type[i] = md.slot[curr].idesc->type; |
6166 | curr = (curr + 1) % NUM_SLOTS; | |
6167 | } | |
6168 | template = best_template[type[0]][type[1]][type[2]]; | |
6169 | } | |
6170 | ||
542d6675 | 6171 | /* initialize instructions with appropriate nops: */ |
800eeca4 JW |
6172 | for (i = 0; i < 3; ++i) |
6173 | insn[i] = nop[ia64_templ_desc[template].exec_unit[i]]; | |
6174 | ||
6175 | f = frag_more (16); | |
6176 | ||
5a9ff93d JW |
6177 | /* Check to see if this bundle is at an offset that is a multiple of 16-bytes |
6178 | from the start of the frag. */ | |
6179 | addr_mod = frag_now_fix () & 15; | |
6180 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) | |
6181 | as_bad (_("instruction address is not a multiple of 16")); | |
6182 | frag_now->insn_addr = addr_mod; | |
6183 | frag_now->has_code = 1; | |
6184 | ||
542d6675 | 6185 | /* now fill in slots with as many insns as possible: */ |
800eeca4 JW |
6186 | curr = first; |
6187 | idesc = md.slot[curr].idesc; | |
6188 | end_of_insn_group = 0; | |
6189 | for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) | |
6190 | { | |
d6e78c11 JW |
6191 | /* If we have unwind records, we may need to update some now. */ |
6192 | ptr = md.slot[curr].unwind_record; | |
6193 | if (ptr) | |
6194 | { | |
6195 | /* Find the last prologue/body record in the list for the current | |
6196 | insn, and set the slot number for all records up to that point. | |
6197 | This needs to be done now, because prologue/body records refer to | |
6198 | the current point, not the point after the instruction has been | |
6199 | issued. This matters because there may have been nops emitted | |
6200 | meanwhile. Any non-prologue non-body record followed by a | |
6201 | prologue/body record must also refer to the current point. */ | |
6202 | last_ptr = NULL; | |
6203 | end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record; | |
6204 | for (; ptr != end_ptr; ptr = ptr->next) | |
6205 | if (ptr->r.type == prologue || ptr->r.type == prologue_gr | |
6206 | || ptr->r.type == body) | |
6207 | last_ptr = ptr; | |
6208 | if (last_ptr) | |
6209 | { | |
6210 | /* Make last_ptr point one after the last prologue/body | |
6211 | record. */ | |
6212 | last_ptr = last_ptr->next; | |
6213 | for (ptr = md.slot[curr].unwind_record; ptr != last_ptr; | |
6214 | ptr = ptr->next) | |
6215 | { | |
6216 | ptr->slot_number = (unsigned long) f + i; | |
6217 | ptr->slot_frag = frag_now; | |
6218 | } | |
6219 | /* Remove the initialized records, so that we won't accidentally | |
6220 | update them again if we insert a nop and continue. */ | |
6221 | md.slot[curr].unwind_record = last_ptr; | |
6222 | } | |
6223 | } | |
e0c9811a | 6224 | |
800eeca4 JW |
6225 | if (idesc->flags & IA64_OPCODE_SLOT2) |
6226 | { | |
6227 | if (manual_bundling && i != 2) | |
6228 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6229 | "`%s' must be last in bundle", idesc->name); | |
6230 | else | |
6231 | i = 2; | |
6232 | } | |
6233 | if (idesc->flags & IA64_OPCODE_LAST) | |
6234 | { | |
2434f565 JW |
6235 | int required_slot; |
6236 | unsigned int required_template; | |
800eeca4 JW |
6237 | |
6238 | /* If we need a stop bit after an M slot, our only choice is | |
6239 | template 5 (M;;MI). If we need a stop bit after a B | |
6240 | slot, our only choice is to place it at the end of the | |
6241 | bundle, because the only available templates are MIB, | |
6242 | MBB, BBB, MMB, and MFB. We don't handle anything other | |
6243 | than M and B slots because these are the only kind of | |
6244 | instructions that can have the IA64_OPCODE_LAST bit set. */ | |
6245 | required_template = template; | |
6246 | switch (idesc->type) | |
6247 | { | |
6248 | case IA64_TYPE_M: | |
6249 | required_slot = 0; | |
6250 | required_template = 5; | |
6251 | break; | |
6252 | ||
6253 | case IA64_TYPE_B: | |
6254 | required_slot = 2; | |
6255 | break; | |
6256 | ||
6257 | default: | |
6258 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6259 | "Internal error: don't know how to force %s to end" | |
6260 | "of instruction group", idesc->name); | |
6261 | required_slot = i; | |
6262 | break; | |
6263 | } | |
6264 | if (manual_bundling && i != required_slot) | |
6265 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6266 | "`%s' must be last in instruction group", | |
6267 | idesc->name); | |
6268 | if (required_slot < i) | |
6269 | /* Can't fit this instruction. */ | |
6270 | break; | |
6271 | ||
6272 | i = required_slot; | |
6273 | if (required_template != template) | |
6274 | { | |
6275 | /* If we switch the template, we need to reset the NOPs | |
6276 | after slot i. The slot-types of the instructions ahead | |
6277 | of i never change, so we don't need to worry about | |
6278 | changing NOPs in front of this slot. */ | |
6279 | for (j = i; j < 3; ++j) | |
6280 | insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]]; | |
6281 | } | |
6282 | template = required_template; | |
6283 | } | |
6284 | if (curr != first && md.slot[curr].label_fixups) | |
6285 | { | |
6286 | if (manual_bundling_on) | |
6287 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6288 | "Label must be first in a bundle"); | |
6289 | /* This insn must go into the first slot of a bundle. */ | |
6290 | break; | |
6291 | } | |
6292 | ||
6293 | manual_bundling_on = md.slot[curr].manual_bundling_on; | |
6294 | manual_bundling_off = md.slot[curr].manual_bundling_off; | |
6295 | ||
6296 | if (manual_bundling_on) | |
6297 | { | |
6298 | if (curr == first) | |
6299 | manual_bundling = 1; | |
6300 | else | |
6301 | break; /* need to start a new bundle */ | |
6302 | } | |
6303 | ||
6304 | if (end_of_insn_group && md.num_slots_in_use >= 1) | |
6305 | { | |
6306 | /* We need an instruction group boundary in the middle of a | |
6307 | bundle. See if we can switch to an other template with | |
6308 | an appropriate boundary. */ | |
6309 | ||
6310 | orig_template = template; | |
6311 | if (i == 1 && (user_template == 4 | |
6312 | || (user_template < 0 | |
6313 | && (ia64_templ_desc[template].exec_unit[0] | |
6314 | == IA64_UNIT_M)))) | |
6315 | { | |
6316 | template = 5; | |
6317 | end_of_insn_group = 0; | |
6318 | } | |
6319 | else if (i == 2 && (user_template == 0 | |
6320 | || (user_template < 0 | |
6321 | && (ia64_templ_desc[template].exec_unit[1] | |
6322 | == IA64_UNIT_I))) | |
6323 | /* This test makes sure we don't switch the template if | |
6324 | the next instruction is one that needs to be first in | |
6325 | an instruction group. Since all those instructions are | |
6326 | in the M group, there is no way such an instruction can | |
6327 | fit in this bundle even if we switch the template. The | |
6328 | reason we have to check for this is that otherwise we | |
6329 | may end up generating "MI;;I M.." which has the deadly | |
6330 | effect that the second M instruction is no longer the | |
6331 | first in the bundle! --davidm 99/12/16 */ | |
6332 | && (idesc->flags & IA64_OPCODE_FIRST) == 0) | |
6333 | { | |
6334 | template = 1; | |
6335 | end_of_insn_group = 0; | |
6336 | } | |
6337 | else if (curr != first) | |
6338 | /* can't fit this insn */ | |
6339 | break; | |
6340 | ||
6341 | if (template != orig_template) | |
6342 | /* if we switch the template, we need to reset the NOPs | |
6343 | after slot i. The slot-types of the instructions ahead | |
6344 | of i never change, so we don't need to worry about | |
6345 | changing NOPs in front of this slot. */ | |
6346 | for (j = i; j < 3; ++j) | |
6347 | insn[j] = nop[ia64_templ_desc[template].exec_unit[j]]; | |
6348 | } | |
6349 | required_unit = ia64_templ_desc[template].exec_unit[i]; | |
6350 | ||
c10d9d8f | 6351 | /* resolve dynamic opcodes such as "break", "hint", and "nop": */ |
800eeca4 JW |
6352 | if (idesc->type == IA64_TYPE_DYN) |
6353 | { | |
6354 | if ((strcmp (idesc->name, "nop") == 0) | |
c10d9d8f | 6355 | || (strcmp (idesc->name, "hint") == 0) |
800eeca4 JW |
6356 | || (strcmp (idesc->name, "break") == 0)) |
6357 | insn_unit = required_unit; | |
6358 | else if (strcmp (idesc->name, "chk.s") == 0) | |
6359 | { | |
6360 | insn_unit = IA64_UNIT_M; | |
6361 | if (required_unit == IA64_UNIT_I) | |
6362 | insn_unit = IA64_UNIT_I; | |
6363 | } | |
6364 | else | |
6365 | as_fatal ("emit_one_bundle: unexpected dynamic op"); | |
6366 | ||
6367 | sprintf (mnemonic, "%s.%c", idesc->name, "?imbf??"[insn_unit]); | |
3d56ab85 | 6368 | ia64_free_opcode (idesc); |
800eeca4 JW |
6369 | md.slot[curr].idesc = idesc = ia64_find_opcode (mnemonic); |
6370 | #if 0 | |
6371 | know (!idesc->next); /* no resolved dynamic ops have collisions */ | |
6372 | #endif | |
6373 | } | |
6374 | else | |
6375 | { | |
6376 | insn_type = idesc->type; | |
6377 | insn_unit = IA64_UNIT_NIL; | |
6378 | switch (insn_type) | |
6379 | { | |
6380 | case IA64_TYPE_A: | |
6381 | if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M) | |
6382 | insn_unit = required_unit; | |
6383 | break; | |
542d6675 | 6384 | case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break; |
800eeca4 JW |
6385 | case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break; |
6386 | case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break; | |
6387 | case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break; | |
6388 | case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break; | |
6389 | default: break; | |
6390 | } | |
6391 | } | |
6392 | ||
6393 | if (insn_unit != required_unit) | |
6394 | { | |
6395 | if (required_unit == IA64_UNIT_L | |
542d6675 | 6396 | && insn_unit == IA64_UNIT_I |
800eeca4 JW |
6397 | && !(idesc->flags & IA64_OPCODE_X_IN_MLX)) |
6398 | { | |
6399 | /* we got ourselves an MLX template but the current | |
197865e8 | 6400 | instruction isn't an X-unit, or an I-unit instruction |
800eeca4 JW |
6401 | that can go into the X slot of an MLX template. Duh. */ |
6402 | if (md.num_slots_in_use >= NUM_SLOTS) | |
6403 | { | |
6404 | as_bad_where (md.slot[curr].src_file, | |
6405 | md.slot[curr].src_line, | |
6406 | "`%s' can't go in X slot of " | |
6407 | "MLX template", idesc->name); | |
542d6675 | 6408 | /* drop this insn so we don't livelock: */ |
800eeca4 JW |
6409 | --md.num_slots_in_use; |
6410 | } | |
6411 | break; | |
6412 | } | |
6413 | continue; /* try next slot */ | |
6414 | } | |
6415 | ||
40449e9f KH |
6416 | { |
6417 | bfd_vma addr; | |
800eeca4 | 6418 | |
40449e9f KH |
6419 | addr = frag_now->fr_address + frag_now_fix () - 16 + i; |
6420 | dwarf2_gen_line_info (addr, &md.slot[curr].debug_line); | |
6421 | } | |
800eeca4 | 6422 | |
88be23ec BS |
6423 | if (errata_nop_necessary_p (md.slot + curr, insn_unit)) |
6424 | as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata")); | |
6425 | ||
800eeca4 JW |
6426 | build_insn (md.slot + curr, insn + i); |
6427 | ||
d6e78c11 JW |
6428 | ptr = md.slot[curr].unwind_record; |
6429 | if (ptr) | |
6430 | { | |
6431 | /* Set slot numbers for all remaining unwind records belonging to the | |
6432 | current insn. There can not be any prologue/body unwind records | |
6433 | here. */ | |
6434 | end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record; | |
6435 | for (; ptr != end_ptr; ptr = ptr->next) | |
6436 | { | |
6437 | ptr->slot_number = (unsigned long) f + i; | |
6438 | ptr->slot_frag = frag_now; | |
6439 | } | |
6440 | md.slot[curr].unwind_record = NULL; | |
6441 | } | |
10850f29 | 6442 | |
800eeca4 JW |
6443 | if (required_unit == IA64_UNIT_L) |
6444 | { | |
6445 | know (i == 1); | |
6446 | /* skip one slot for long/X-unit instructions */ | |
6447 | ++i; | |
6448 | } | |
6449 | --md.num_slots_in_use; | |
6450 | ||
542d6675 | 6451 | /* now is a good time to fix up the labels for this insn: */ |
800eeca4 JW |
6452 | for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next) |
6453 | { | |
6454 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16); | |
6455 | symbol_set_frag (lfix->sym, frag_now); | |
6456 | } | |
f1bcba5b JW |
6457 | /* and fix up the tags also. */ |
6458 | for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next) | |
6459 | { | |
6460 | S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i); | |
6461 | symbol_set_frag (lfix->sym, frag_now); | |
6462 | } | |
800eeca4 JW |
6463 | |
6464 | for (j = 0; j < md.slot[curr].num_fixups; ++j) | |
6465 | { | |
6466 | ifix = md.slot[curr].fixup + j; | |
5a080f89 | 6467 | fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8, |
800eeca4 JW |
6468 | &ifix->expr, ifix->is_pcrel, ifix->code); |
6469 | fix->tc_fix_data.opnd = ifix->opnd; | |
6470 | fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22); | |
6471 | fix->fx_file = md.slot[curr].src_file; | |
6472 | fix->fx_line = md.slot[curr].src_line; | |
6473 | } | |
6474 | ||
6475 | end_of_insn_group = md.slot[curr].end_of_insn_group; | |
6476 | ||
88be23ec BS |
6477 | if (end_of_insn_group) |
6478 | { | |
6479 | md.group_idx = (md.group_idx + 1) % 3; | |
6480 | memset (md.last_groups + md.group_idx, 0, sizeof md.last_groups[0]); | |
6481 | } | |
6482 | ||
542d6675 | 6483 | /* clear slot: */ |
800eeca4 JW |
6484 | ia64_free_opcode (md.slot[curr].idesc); |
6485 | memset (md.slot + curr, 0, sizeof (md.slot[curr])); | |
6486 | md.slot[curr].user_template = -1; | |
6487 | ||
6488 | if (manual_bundling_off) | |
6489 | { | |
6490 | manual_bundling = 0; | |
6491 | break; | |
6492 | } | |
6493 | curr = (curr + 1) % NUM_SLOTS; | |
6494 | idesc = md.slot[curr].idesc; | |
6495 | } | |
6496 | if (manual_bundling) | |
6497 | { | |
6498 | if (md.num_slots_in_use > 0) | |
ac025970 L |
6499 | { |
6500 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6501 | "`%s' does not fit into %s template", | |
6502 | idesc->name, ia64_templ_desc[template].name); | |
6503 | --md.num_slots_in_use; | |
6504 | } | |
800eeca4 JW |
6505 | else |
6506 | as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, | |
6507 | "Missing '}' at end of file"); | |
6508 | } | |
6509 | know (md.num_slots_in_use < NUM_SLOTS); | |
6510 | ||
6511 | t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46); | |
6512 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
6513 | ||
44f5c83a JW |
6514 | number_to_chars_littleendian (f + 0, t0, 8); |
6515 | number_to_chars_littleendian (f + 8, t1, 8); | |
f5a30c2e | 6516 | |
73f20958 L |
6517 | if (unwind.list) |
6518 | { | |
127cab00 L |
6519 | unwind.list->next_slot_number = (unsigned long) f + 16; |
6520 | unwind.list->next_slot_frag = frag_now; | |
73f20958 | 6521 | } |
800eeca4 JW |
6522 | } |
6523 | ||
6524 | int | |
6525 | md_parse_option (c, arg) | |
6526 | int c; | |
6527 | char *arg; | |
6528 | { | |
7463c317 | 6529 | |
800eeca4 JW |
6530 | switch (c) |
6531 | { | |
c43c2cc5 | 6532 | /* Switches from the Intel assembler. */ |
44f5c83a | 6533 | case 'm': |
800eeca4 JW |
6534 | if (strcmp (arg, "ilp64") == 0 |
6535 | || strcmp (arg, "lp64") == 0 | |
6536 | || strcmp (arg, "p64") == 0) | |
6537 | { | |
6538 | md.flags |= EF_IA_64_ABI64; | |
6539 | } | |
6540 | else if (strcmp (arg, "ilp32") == 0) | |
6541 | { | |
6542 | md.flags &= ~EF_IA_64_ABI64; | |
6543 | } | |
6544 | else if (strcmp (arg, "le") == 0) | |
6545 | { | |
6546 | md.flags &= ~EF_IA_64_BE; | |
549f748d | 6547 | default_big_endian = 0; |
800eeca4 JW |
6548 | } |
6549 | else if (strcmp (arg, "be") == 0) | |
6550 | { | |
6551 | md.flags |= EF_IA_64_BE; | |
549f748d | 6552 | default_big_endian = 1; |
800eeca4 JW |
6553 | } |
6554 | else | |
6555 | return 0; | |
6556 | break; | |
6557 | ||
6558 | case 'N': | |
6559 | if (strcmp (arg, "so") == 0) | |
6560 | { | |
542d6675 | 6561 | /* Suppress signon message. */ |
800eeca4 JW |
6562 | } |
6563 | else if (strcmp (arg, "pi") == 0) | |
6564 | { | |
6565 | /* Reject privileged instructions. FIXME */ | |
6566 | } | |
6567 | else if (strcmp (arg, "us") == 0) | |
6568 | { | |
6569 | /* Allow union of signed and unsigned range. FIXME */ | |
6570 | } | |
6571 | else if (strcmp (arg, "close_fcalls") == 0) | |
6572 | { | |
6573 | /* Do not resolve global function calls. */ | |
6574 | } | |
6575 | else | |
6576 | return 0; | |
6577 | break; | |
6578 | ||
6579 | case 'C': | |
6580 | /* temp[="prefix"] Insert temporary labels into the object file | |
6581 | symbol table prefixed by "prefix". | |
6582 | Default prefix is ":temp:". | |
6583 | */ | |
6584 | break; | |
6585 | ||
6586 | case 'a': | |
800eeca4 JW |
6587 | /* indirect=<tgt> Assume unannotated indirect branches behavior |
6588 | according to <tgt> -- | |
6589 | exit: branch out from the current context (default) | |
6590 | labels: all labels in context may be branch targets | |
6591 | */ | |
85b40035 L |
6592 | if (strncmp (arg, "indirect=", 9) != 0) |
6593 | return 0; | |
800eeca4 JW |
6594 | break; |
6595 | ||
6596 | case 'x': | |
6597 | /* -X conflicts with an ignored option, use -x instead */ | |
6598 | md.detect_dv = 1; | |
6599 | if (!arg || strcmp (arg, "explicit") == 0) | |
542d6675 KH |
6600 | { |
6601 | /* set default mode to explicit */ | |
6602 | md.default_explicit_mode = 1; | |
6603 | break; | |
6604 | } | |
800eeca4 | 6605 | else if (strcmp (arg, "auto") == 0) |
542d6675 KH |
6606 | { |
6607 | md.default_explicit_mode = 0; | |
6608 | } | |
800eeca4 | 6609 | else if (strcmp (arg, "debug") == 0) |
542d6675 KH |
6610 | { |
6611 | md.debug_dv = 1; | |
6612 | } | |
800eeca4 | 6613 | else if (strcmp (arg, "debugx") == 0) |
542d6675 KH |
6614 | { |
6615 | md.default_explicit_mode = 1; | |
6616 | md.debug_dv = 1; | |
6617 | } | |
800eeca4 | 6618 | else |
542d6675 KH |
6619 | { |
6620 | as_bad (_("Unrecognized option '-x%s'"), arg); | |
6621 | } | |
800eeca4 JW |
6622 | break; |
6623 | ||
6624 | case 'S': | |
6625 | /* nops Print nops statistics. */ | |
6626 | break; | |
6627 | ||
c43c2cc5 JW |
6628 | /* GNU specific switches for gcc. */ |
6629 | case OPTION_MCONSTANT_GP: | |
6630 | md.flags |= EF_IA_64_CONS_GP; | |
6631 | break; | |
6632 | ||
6633 | case OPTION_MAUTO_PIC: | |
6634 | md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; | |
6635 | break; | |
6636 | ||
800eeca4 JW |
6637 | default: |
6638 | return 0; | |
6639 | } | |
6640 | ||
6641 | return 1; | |
6642 | } | |
6643 | ||
6644 | void | |
6645 | md_show_usage (stream) | |
6646 | FILE *stream; | |
6647 | { | |
542d6675 | 6648 | fputs (_("\ |
800eeca4 | 6649 | IA-64 options:\n\ |
6290819d NC |
6650 | --mconstant-gp mark output file as using the constant-GP model\n\ |
6651 | (sets ELF header flag EF_IA_64_CONS_GP)\n\ | |
6652 | --mauto-pic mark output file as using the constant-GP model\n\ | |
6653 | without function descriptors (sets ELF header flag\n\ | |
6654 | EF_IA_64_NOFUNCDESC_CONS_GP)\n\ | |
44f5c83a JW |
6655 | -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\ |
6656 | -mle | -mbe select little- or big-endian byte order (default -mle)\n\ | |
800eeca4 JW |
6657 | -x | -xexplicit turn on dependency violation checking (default)\n\ |
6658 | -xauto automagically remove dependency violations\n\ | |
6659 | -xdebug debug dependency violation checker\n"), | |
6660 | stream); | |
6661 | } | |
6662 | ||
acebd4ce AS |
6663 | void |
6664 | ia64_after_parse_args () | |
6665 | { | |
6666 | if (debug_type == DEBUG_STABS) | |
6667 | as_fatal (_("--gstabs is not supported for ia64")); | |
6668 | } | |
6669 | ||
44576e1f RH |
6670 | /* Return true if TYPE fits in TEMPL at SLOT. */ |
6671 | ||
6672 | static int | |
800eeca4 JW |
6673 | match (int templ, int type, int slot) |
6674 | { | |
6675 | enum ia64_unit unit; | |
6676 | int result; | |
6677 | ||
6678 | unit = ia64_templ_desc[templ].exec_unit[slot]; | |
6679 | switch (type) | |
6680 | { | |
6681 | case IA64_TYPE_DYN: result = 1; break; /* for nop and break */ | |
6682 | case IA64_TYPE_A: | |
6683 | result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M); | |
6684 | break; | |
6685 | case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break; | |
6686 | case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break; | |
6687 | case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break; | |
6688 | case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break; | |
6689 | case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break; | |
6690 | default: result = 0; break; | |
6691 | } | |
6692 | return result; | |
6693 | } | |
6694 | ||
44576e1f RH |
6695 | /* Add a bit of extra goodness if a nop of type F or B would fit |
6696 | in TEMPL at SLOT. */ | |
6697 | ||
6698 | static inline int | |
6699 | extra_goodness (int templ, int slot) | |
6700 | { | |
ebeeafe6 | 6701 | if (slot == 1 && match (templ, IA64_TYPE_F, slot)) |
44576e1f | 6702 | return 2; |
ebeeafe6 | 6703 | if (slot == 2 && match (templ, IA64_TYPE_B, slot)) |
44576e1f RH |
6704 | return 1; |
6705 | return 0; | |
6706 | } | |
6707 | ||
800eeca4 JW |
6708 | /* This function is called once, at assembler startup time. It sets |
6709 | up all the tables, etc. that the MD part of the assembler will need | |
6710 | that can be determined before arguments are parsed. */ | |
6711 | void | |
6712 | md_begin () | |
6713 | { | |
44f5c83a | 6714 | int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok; |
800eeca4 JW |
6715 | const char *err; |
6716 | char name[8]; | |
6717 | ||
6718 | md.auto_align = 1; | |
6719 | md.explicit_mode = md.default_explicit_mode; | |
6720 | ||
6721 | bfd_set_section_alignment (stdoutput, text_section, 4); | |
6722 | ||
0234cb7c | 6723 | /* Make sure function pointers get initialized. */ |
10a98291 | 6724 | target_big_endian = -1; |
549f748d | 6725 | dot_byteorder (default_big_endian); |
10a98291 | 6726 | |
35f5df7f L |
6727 | alias_hash = hash_new (); |
6728 | alias_name_hash = hash_new (); | |
6729 | secalias_hash = hash_new (); | |
6730 | secalias_name_hash = hash_new (); | |
6731 | ||
13ae64f3 JJ |
6732 | pseudo_func[FUNC_DTP_MODULE].u.sym = |
6733 | symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE, | |
6734 | &zero_address_frag); | |
6735 | ||
6736 | pseudo_func[FUNC_DTP_RELATIVE].u.sym = | |
6737 | symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE, | |
6738 | &zero_address_frag); | |
6739 | ||
800eeca4 | 6740 | pseudo_func[FUNC_FPTR_RELATIVE].u.sym = |
542d6675 KH |
6741 | symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE, |
6742 | &zero_address_frag); | |
800eeca4 JW |
6743 | |
6744 | pseudo_func[FUNC_GP_RELATIVE].u.sym = | |
542d6675 KH |
6745 | symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE, |
6746 | &zero_address_frag); | |
800eeca4 JW |
6747 | |
6748 | pseudo_func[FUNC_LT_RELATIVE].u.sym = | |
542d6675 KH |
6749 | symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE, |
6750 | &zero_address_frag); | |
800eeca4 | 6751 | |
fa2c7eff RH |
6752 | pseudo_func[FUNC_LT_RELATIVE_X].u.sym = |
6753 | symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X, | |
6754 | &zero_address_frag); | |
6755 | ||
c67e42c9 | 6756 | pseudo_func[FUNC_PC_RELATIVE].u.sym = |
542d6675 KH |
6757 | symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE, |
6758 | &zero_address_frag); | |
c67e42c9 | 6759 | |
800eeca4 | 6760 | pseudo_func[FUNC_PLT_RELATIVE].u.sym = |
542d6675 KH |
6761 | symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE, |
6762 | &zero_address_frag); | |
800eeca4 JW |
6763 | |
6764 | pseudo_func[FUNC_SEC_RELATIVE].u.sym = | |
542d6675 KH |
6765 | symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE, |
6766 | &zero_address_frag); | |
800eeca4 JW |
6767 | |
6768 | pseudo_func[FUNC_SEG_RELATIVE].u.sym = | |
542d6675 KH |
6769 | symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE, |
6770 | &zero_address_frag); | |
800eeca4 | 6771 | |
13ae64f3 JJ |
6772 | pseudo_func[FUNC_TP_RELATIVE].u.sym = |
6773 | symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE, | |
6774 | &zero_address_frag); | |
6775 | ||
800eeca4 | 6776 | pseudo_func[FUNC_LTV_RELATIVE].u.sym = |
542d6675 KH |
6777 | symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE, |
6778 | &zero_address_frag); | |
800eeca4 JW |
6779 | |
6780 | pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym = | |
542d6675 KH |
6781 | symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE, |
6782 | &zero_address_frag); | |
800eeca4 | 6783 | |
13ae64f3 JJ |
6784 | pseudo_func[FUNC_LT_DTP_MODULE].u.sym = |
6785 | symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE, | |
6786 | &zero_address_frag); | |
6787 | ||
6788 | pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym = | |
6789 | symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE, | |
6790 | &zero_address_frag); | |
6791 | ||
6792 | pseudo_func[FUNC_LT_TP_RELATIVE].u.sym = | |
6793 | symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE, | |
6794 | &zero_address_frag); | |
6795 | ||
3969b680 RH |
6796 | pseudo_func[FUNC_IPLT_RELOC].u.sym = |
6797 | symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC, | |
6798 | &zero_address_frag); | |
6799 | ||
197865e8 | 6800 | /* Compute the table of best templates. We compute goodness as a |
44576e1f RH |
6801 | base 4 value, in which each match counts for 3, each F counts |
6802 | for 2, each B counts for 1. This should maximize the number of | |
6803 | F and B nops in the chosen bundles, which is good because these | |
6804 | pipelines are least likely to be overcommitted. */ | |
800eeca4 JW |
6805 | for (i = 0; i < IA64_NUM_TYPES; ++i) |
6806 | for (j = 0; j < IA64_NUM_TYPES; ++j) | |
6807 | for (k = 0; k < IA64_NUM_TYPES; ++k) | |
6808 | { | |
6809 | best = 0; | |
6810 | for (t = 0; t < NELEMS (ia64_templ_desc); ++t) | |
6811 | { | |
6812 | goodness = 0; | |
6813 | if (match (t, i, 0)) | |
6814 | { | |
6815 | if (match (t, j, 1)) | |
6816 | { | |
6817 | if (match (t, k, 2)) | |
44576e1f | 6818 | goodness = 3 + 3 + 3; |
800eeca4 | 6819 | else |
44576e1f | 6820 | goodness = 3 + 3 + extra_goodness (t, 2); |
800eeca4 JW |
6821 | } |
6822 | else if (match (t, j, 2)) | |
44576e1f | 6823 | goodness = 3 + 3 + extra_goodness (t, 1); |
800eeca4 | 6824 | else |
44576e1f RH |
6825 | { |
6826 | goodness = 3; | |
6827 | goodness += extra_goodness (t, 1); | |
6828 | goodness += extra_goodness (t, 2); | |
6829 | } | |
800eeca4 JW |
6830 | } |
6831 | else if (match (t, i, 1)) | |
6832 | { | |
6833 | if (match (t, j, 2)) | |
44576e1f | 6834 | goodness = 3 + 3; |
800eeca4 | 6835 | else |
44576e1f | 6836 | goodness = 3 + extra_goodness (t, 2); |
800eeca4 JW |
6837 | } |
6838 | else if (match (t, i, 2)) | |
44576e1f | 6839 | goodness = 3 + extra_goodness (t, 1); |
800eeca4 JW |
6840 | |
6841 | if (goodness > best) | |
6842 | { | |
6843 | best = goodness; | |
6844 | best_template[i][j][k] = t; | |
6845 | } | |
6846 | } | |
6847 | } | |
6848 | ||
6849 | for (i = 0; i < NUM_SLOTS; ++i) | |
6850 | md.slot[i].user_template = -1; | |
6851 | ||
6852 | md.pseudo_hash = hash_new (); | |
6853 | for (i = 0; i < NELEMS (pseudo_opcode); ++i) | |
6854 | { | |
6855 | err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name, | |
6856 | (void *) (pseudo_opcode + i)); | |
6857 | if (err) | |
6858 | as_fatal ("ia64.md_begin: can't hash `%s': %s", | |
6859 | pseudo_opcode[i].name, err); | |
6860 | } | |
6861 | ||
6862 | md.reg_hash = hash_new (); | |
6863 | md.dynreg_hash = hash_new (); | |
6864 | md.const_hash = hash_new (); | |
6865 | md.entry_hash = hash_new (); | |
6866 | ||
542d6675 | 6867 | /* general registers: */ |
800eeca4 JW |
6868 | |
6869 | total = 128; | |
6870 | for (i = 0; i < total; ++i) | |
6871 | { | |
6872 | sprintf (name, "r%d", i - REG_GR); | |
6873 | md.regsym[i] = declare_register (name, i); | |
6874 | } | |
6875 | ||
542d6675 | 6876 | /* floating point registers: */ |
800eeca4 JW |
6877 | total += 128; |
6878 | for (; i < total; ++i) | |
6879 | { | |
6880 | sprintf (name, "f%d", i - REG_FR); | |
6881 | md.regsym[i] = declare_register (name, i); | |
6882 | } | |
6883 | ||
542d6675 | 6884 | /* application registers: */ |
800eeca4 JW |
6885 | total += 128; |
6886 | ar_base = i; | |
6887 | for (; i < total; ++i) | |
6888 | { | |
6889 | sprintf (name, "ar%d", i - REG_AR); | |
6890 | md.regsym[i] = declare_register (name, i); | |
6891 | } | |
6892 | ||
542d6675 | 6893 | /* control registers: */ |
800eeca4 JW |
6894 | total += 128; |
6895 | cr_base = i; | |
6896 | for (; i < total; ++i) | |
6897 | { | |
6898 | sprintf (name, "cr%d", i - REG_CR); | |
6899 | md.regsym[i] = declare_register (name, i); | |
6900 | } | |
6901 | ||
542d6675 | 6902 | /* predicate registers: */ |
800eeca4 JW |
6903 | total += 64; |
6904 | for (; i < total; ++i) | |
6905 | { | |
6906 | sprintf (name, "p%d", i - REG_P); | |
6907 | md.regsym[i] = declare_register (name, i); | |
6908 | } | |
6909 | ||
542d6675 | 6910 | /* branch registers: */ |
800eeca4 JW |
6911 | total += 8; |
6912 | for (; i < total; ++i) | |
6913 | { | |
6914 | sprintf (name, "b%d", i - REG_BR); | |
6915 | md.regsym[i] = declare_register (name, i); | |
6916 | } | |
6917 | ||
6918 | md.regsym[REG_IP] = declare_register ("ip", REG_IP); | |
6919 | md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM); | |
6920 | md.regsym[REG_PR] = declare_register ("pr", REG_PR); | |
6921 | md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT); | |
6922 | md.regsym[REG_PSR] = declare_register ("psr", REG_PSR); | |
6923 | md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L); | |
6924 | md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM); | |
6925 | ||
6926 | for (i = 0; i < NELEMS (indirect_reg); ++i) | |
6927 | { | |
6928 | regnum = indirect_reg[i].regnum; | |
6929 | md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum); | |
6930 | } | |
6931 | ||
542d6675 | 6932 | /* define synonyms for application registers: */ |
800eeca4 JW |
6933 | for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i) |
6934 | md.regsym[i] = declare_register (ar[i - REG_AR].name, | |
6935 | REG_AR + ar[i - REG_AR].regnum); | |
6936 | ||
542d6675 | 6937 | /* define synonyms for control registers: */ |
800eeca4 JW |
6938 | for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i) |
6939 | md.regsym[i] = declare_register (cr[i - REG_CR].name, | |
6940 | REG_CR + cr[i - REG_CR].regnum); | |
6941 | ||
6942 | declare_register ("gp", REG_GR + 1); | |
6943 | declare_register ("sp", REG_GR + 12); | |
6944 | declare_register ("rp", REG_BR + 0); | |
6945 | ||
542d6675 | 6946 | /* pseudo-registers used to specify unwind info: */ |
e0c9811a JW |
6947 | declare_register ("psp", REG_PSP); |
6948 | ||
800eeca4 JW |
6949 | declare_register_set ("ret", 4, REG_GR + 8); |
6950 | declare_register_set ("farg", 8, REG_FR + 8); | |
6951 | declare_register_set ("fret", 8, REG_FR + 8); | |
6952 | ||
6953 | for (i = 0; i < NELEMS (const_bits); ++i) | |
6954 | { | |
6955 | err = hash_insert (md.const_hash, const_bits[i].name, | |
6956 | (PTR) (const_bits + i)); | |
6957 | if (err) | |
6958 | as_fatal ("Inserting \"%s\" into constant hash table failed: %s", | |
6959 | name, err); | |
6960 | } | |
6961 | ||
44f5c83a JW |
6962 | /* Set the architecture and machine depending on defaults and command line |
6963 | options. */ | |
6964 | if (md.flags & EF_IA_64_ABI64) | |
6965 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64); | |
6966 | else | |
6967 | ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32); | |
6968 | ||
6969 | if (! ok) | |
6970 | as_warn (_("Could not set architecture and machine")); | |
800eeca4 | 6971 | |
557debba JW |
6972 | /* Set the pointer size and pointer shift size depending on md.flags */ |
6973 | ||
6974 | if (md.flags & EF_IA_64_ABI64) | |
6975 | { | |
6976 | md.pointer_size = 8; /* pointers are 8 bytes */ | |
6977 | md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */ | |
6978 | } | |
6979 | else | |
6980 | { | |
6981 | md.pointer_size = 4; /* pointers are 4 bytes */ | |
6982 | md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */ | |
6983 | } | |
6984 | ||
800eeca4 JW |
6985 | md.mem_offset.hint = 0; |
6986 | md.path = 0; | |
6987 | md.maxpaths = 0; | |
6988 | md.entry_labels = NULL; | |
6989 | } | |
6990 | ||
44f5c83a JW |
6991 | /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin |
6992 | because that is called after md_parse_option which is where we do the | |
6993 | dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the | |
6994 | default endianness. */ | |
6995 | ||
6996 | void | |
6997 | ia64_init (argc, argv) | |
2434f565 JW |
6998 | int argc ATTRIBUTE_UNUSED; |
6999 | char **argv ATTRIBUTE_UNUSED; | |
44f5c83a | 7000 | { |
1cd8ff38 | 7001 | md.flags = MD_FLAGS_DEFAULT; |
44f5c83a JW |
7002 | } |
7003 | ||
7004 | /* Return a string for the target object file format. */ | |
7005 | ||
7006 | const char * | |
7007 | ia64_target_format () | |
7008 | { | |
7009 | if (OUTPUT_FLAVOR == bfd_target_elf_flavour) | |
7010 | { | |
72a76794 JW |
7011 | if (md.flags & EF_IA_64_BE) |
7012 | { | |
7013 | if (md.flags & EF_IA_64_ABI64) | |
1cd8ff38 | 7014 | #if defined(TE_AIX50) |
7463c317 | 7015 | return "elf64-ia64-aix-big"; |
1cd8ff38 NC |
7016 | #elif defined(TE_HPUX) |
7017 | return "elf64-ia64-hpux-big"; | |
7463c317 | 7018 | #else |
72a76794 | 7019 | return "elf64-ia64-big"; |
7463c317 | 7020 | #endif |
72a76794 | 7021 | else |
1cd8ff38 | 7022 | #if defined(TE_AIX50) |
7463c317 | 7023 | return "elf32-ia64-aix-big"; |
1cd8ff38 NC |
7024 | #elif defined(TE_HPUX) |
7025 | return "elf32-ia64-hpux-big"; | |
7463c317 | 7026 | #else |
72a76794 | 7027 | return "elf32-ia64-big"; |
7463c317 | 7028 | #endif |
72a76794 | 7029 | } |
44f5c83a | 7030 | else |
72a76794 JW |
7031 | { |
7032 | if (md.flags & EF_IA_64_ABI64) | |
7463c317 TW |
7033 | #ifdef TE_AIX50 |
7034 | return "elf64-ia64-aix-little"; | |
7035 | #else | |
72a76794 | 7036 | return "elf64-ia64-little"; |
7463c317 | 7037 | #endif |
72a76794 | 7038 | else |
7463c317 TW |
7039 | #ifdef TE_AIX50 |
7040 | return "elf32-ia64-aix-little"; | |
7041 | #else | |
72a76794 | 7042 | return "elf32-ia64-little"; |
7463c317 | 7043 | #endif |
72a76794 | 7044 | } |
44f5c83a JW |
7045 | } |
7046 | else | |
7047 | return "unknown-format"; | |
7048 | } | |
7049 | ||
800eeca4 JW |
7050 | void |
7051 | ia64_end_of_source () | |
7052 | { | |
542d6675 | 7053 | /* terminate insn group upon reaching end of file: */ |
800eeca4 JW |
7054 | insn_group_break (1, 0, 0); |
7055 | ||
542d6675 | 7056 | /* emits slots we haven't written yet: */ |
800eeca4 JW |
7057 | ia64_flush_insns (); |
7058 | ||
7059 | bfd_set_private_flags (stdoutput, md.flags); | |
7060 | ||
800eeca4 JW |
7061 | md.mem_offset.hint = 0; |
7062 | } | |
7063 | ||
7064 | void | |
7065 | ia64_start_line () | |
7066 | { | |
f1bcba5b JW |
7067 | if (md.qp.X_op == O_register) |
7068 | as_bad ("qualifying predicate not followed by instruction"); | |
800eeca4 JW |
7069 | md.qp.X_op = O_absent; |
7070 | ||
7071 | if (ignore_input ()) | |
7072 | return; | |
7073 | ||
7074 | if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';') | |
7075 | { | |
7076 | if (md.detect_dv && !md.explicit_mode) | |
542d6675 | 7077 | as_warn (_("Explicit stops are ignored in auto mode")); |
800eeca4 | 7078 | else |
542d6675 | 7079 | insn_group_break (1, 0, 0); |
800eeca4 JW |
7080 | } |
7081 | } | |
7082 | ||
f1bcba5b JW |
7083 | /* This is a hook for ia64_frob_label, so that it can distinguish tags from |
7084 | labels. */ | |
7085 | static int defining_tag = 0; | |
7086 | ||
800eeca4 JW |
7087 | int |
7088 | ia64_unrecognized_line (ch) | |
7089 | int ch; | |
7090 | { | |
7091 | switch (ch) | |
7092 | { | |
7093 | case '(': | |
7094 | expression (&md.qp); | |
7095 | if (*input_line_pointer++ != ')') | |
7096 | { | |
7097 | as_bad ("Expected ')'"); | |
7098 | return 0; | |
7099 | } | |
7100 | if (md.qp.X_op != O_register) | |
7101 | { | |
7102 | as_bad ("Qualifying predicate expected"); | |
7103 | return 0; | |
7104 | } | |
7105 | if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64) | |
7106 | { | |
7107 | as_bad ("Predicate register expected"); | |
7108 | return 0; | |
7109 | } | |
7110 | return 1; | |
7111 | ||
7112 | case '{': | |
7113 | if (md.manual_bundling) | |
7114 | as_warn ("Found '{' when manual bundling is already turned on"); | |
7115 | else | |
7116 | CURR_SLOT.manual_bundling_on = 1; | |
7117 | md.manual_bundling = 1; | |
7118 | ||
542d6675 KH |
7119 | /* Bundling is only acceptable in explicit mode |
7120 | or when in default automatic mode. */ | |
800eeca4 | 7121 | if (md.detect_dv && !md.explicit_mode) |
542d6675 KH |
7122 | { |
7123 | if (!md.mode_explicitly_set | |
7124 | && !md.default_explicit_mode) | |
7125 | dot_dv_mode ('E'); | |
7126 | else | |
7127 | as_warn (_("Found '{' after explicit switch to automatic mode")); | |
7128 | } | |
800eeca4 JW |
7129 | return 1; |
7130 | ||
7131 | case '}': | |
7132 | if (!md.manual_bundling) | |
7133 | as_warn ("Found '}' when manual bundling is off"); | |
7134 | else | |
7135 | PREV_SLOT.manual_bundling_off = 1; | |
7136 | md.manual_bundling = 0; | |
7137 | ||
7138 | /* switch back to automatic mode, if applicable */ | |
197865e8 | 7139 | if (md.detect_dv |
542d6675 KH |
7140 | && md.explicit_mode |
7141 | && !md.mode_explicitly_set | |
7142 | && !md.default_explicit_mode) | |
7143 | dot_dv_mode ('A'); | |
800eeca4 JW |
7144 | |
7145 | /* Allow '{' to follow on the same line. We also allow ";;", but that | |
7146 | happens automatically because ';' is an end of line marker. */ | |
7147 | SKIP_WHITESPACE (); | |
7148 | if (input_line_pointer[0] == '{') | |
7149 | { | |
7150 | input_line_pointer++; | |
7151 | return ia64_unrecognized_line ('{'); | |
7152 | } | |
7153 | ||
7154 | demand_empty_rest_of_line (); | |
7155 | return 1; | |
7156 | ||
f1bcba5b JW |
7157 | case '[': |
7158 | { | |
7159 | char *s; | |
7160 | char c; | |
7161 | symbolS *tag; | |
4d5a53ff | 7162 | int temp; |
f1bcba5b JW |
7163 | |
7164 | if (md.qp.X_op == O_register) | |
7165 | { | |
7166 | as_bad ("Tag must come before qualifying predicate."); | |
7167 | return 0; | |
7168 | } | |
4d5a53ff JW |
7169 | |
7170 | /* This implements just enough of read_a_source_file in read.c to | |
7171 | recognize labels. */ | |
7172 | if (is_name_beginner (*input_line_pointer)) | |
7173 | { | |
7174 | s = input_line_pointer; | |
7175 | c = get_symbol_end (); | |
7176 | } | |
7177 | else if (LOCAL_LABELS_FB | |
3882b010 | 7178 | && ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7179 | { |
7180 | temp = 0; | |
3882b010 | 7181 | while (ISDIGIT (*input_line_pointer)) |
4d5a53ff JW |
7182 | temp = (temp * 10) + *input_line_pointer++ - '0'; |
7183 | fb_label_instance_inc (temp); | |
7184 | s = fb_label_name (temp, 0); | |
7185 | c = *input_line_pointer; | |
7186 | } | |
7187 | else | |
7188 | { | |
7189 | s = NULL; | |
7190 | c = '\0'; | |
7191 | } | |
f1bcba5b JW |
7192 | if (c != ':') |
7193 | { | |
7194 | /* Put ':' back for error messages' sake. */ | |
7195 | *input_line_pointer++ = ':'; | |
7196 | as_bad ("Expected ':'"); | |
7197 | return 0; | |
7198 | } | |
4d5a53ff | 7199 | |
f1bcba5b JW |
7200 | defining_tag = 1; |
7201 | tag = colon (s); | |
7202 | defining_tag = 0; | |
7203 | /* Put ':' back for error messages' sake. */ | |
7204 | *input_line_pointer++ = ':'; | |
7205 | if (*input_line_pointer++ != ']') | |
7206 | { | |
7207 | as_bad ("Expected ']'"); | |
7208 | return 0; | |
7209 | } | |
7210 | if (! tag) | |
7211 | { | |
7212 | as_bad ("Tag name expected"); | |
7213 | return 0; | |
7214 | } | |
7215 | return 1; | |
7216 | } | |
7217 | ||
800eeca4 JW |
7218 | default: |
7219 | break; | |
7220 | } | |
542d6675 KH |
7221 | |
7222 | /* Not a valid line. */ | |
7223 | return 0; | |
800eeca4 JW |
7224 | } |
7225 | ||
7226 | void | |
7227 | ia64_frob_label (sym) | |
7228 | struct symbol *sym; | |
7229 | { | |
7230 | struct label_fix *fix; | |
7231 | ||
f1bcba5b JW |
7232 | /* Tags need special handling since they are not bundle breaks like |
7233 | labels. */ | |
7234 | if (defining_tag) | |
7235 | { | |
7236 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7237 | fix->sym = sym; | |
7238 | fix->next = CURR_SLOT.tag_fixups; | |
7239 | CURR_SLOT.tag_fixups = fix; | |
7240 | ||
7241 | return; | |
7242 | } | |
7243 | ||
800eeca4 JW |
7244 | if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) |
7245 | { | |
7246 | md.last_text_seg = now_seg; | |
7247 | fix = obstack_alloc (¬es, sizeof (*fix)); | |
7248 | fix->sym = sym; | |
7249 | fix->next = CURR_SLOT.label_fixups; | |
7250 | CURR_SLOT.label_fixups = fix; | |
7251 | ||
542d6675 | 7252 | /* Keep track of how many code entry points we've seen. */ |
800eeca4 | 7253 | if (md.path == md.maxpaths) |
542d6675 KH |
7254 | { |
7255 | md.maxpaths += 20; | |
7256 | md.entry_labels = (const char **) | |
7257 | xrealloc ((void *) md.entry_labels, | |
7258 | md.maxpaths * sizeof (char *)); | |
7259 | } | |
800eeca4 JW |
7260 | md.entry_labels[md.path++] = S_GET_NAME (sym); |
7261 | } | |
7262 | } | |
7263 | ||
936cf02e JW |
7264 | #ifdef TE_HPUX |
7265 | /* The HP-UX linker will give unresolved symbol errors for symbols | |
7266 | that are declared but unused. This routine removes declared, | |
7267 | unused symbols from an object. */ | |
7268 | int | |
7269 | ia64_frob_symbol (sym) | |
7270 | struct symbol *sym; | |
7271 | { | |
7272 | if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) && | |
7273 | ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT) | |
7274 | || (S_GET_SEGMENT (sym) == &bfd_abs_section | |
7275 | && ! S_IS_EXTERNAL (sym))) | |
7276 | return 1; | |
7277 | return 0; | |
7278 | } | |
7279 | #endif | |
7280 | ||
800eeca4 JW |
7281 | void |
7282 | ia64_flush_pending_output () | |
7283 | { | |
4d5a53ff JW |
7284 | if (!md.keep_pending_output |
7285 | && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) | |
800eeca4 JW |
7286 | { |
7287 | /* ??? This causes many unnecessary stop bits to be emitted. | |
7288 | Unfortunately, it isn't clear if it is safe to remove this. */ | |
7289 | insn_group_break (1, 0, 0); | |
7290 | ia64_flush_insns (); | |
7291 | } | |
7292 | } | |
7293 | ||
7294 | /* Do ia64-specific expression optimization. All that's done here is | |
7295 | to transform index expressions that are either due to the indexing | |
7296 | of rotating registers or due to the indexing of indirect register | |
7297 | sets. */ | |
7298 | int | |
7299 | ia64_optimize_expr (l, op, r) | |
7300 | expressionS *l; | |
7301 | operatorT op; | |
7302 | expressionS *r; | |
7303 | { | |
7304 | unsigned num_regs; | |
7305 | ||
7306 | if (op == O_index) | |
7307 | { | |
7308 | if (l->X_op == O_register && r->X_op == O_constant) | |
7309 | { | |
7310 | num_regs = (l->X_add_number >> 16); | |
7311 | if ((unsigned) r->X_add_number >= num_regs) | |
7312 | { | |
7313 | if (!num_regs) | |
7314 | as_bad ("No current frame"); | |
7315 | else | |
7316 | as_bad ("Index out of range 0..%u", num_regs - 1); | |
7317 | r->X_add_number = 0; | |
7318 | } | |
7319 | l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number; | |
7320 | return 1; | |
7321 | } | |
7322 | else if (l->X_op == O_register && r->X_op == O_register) | |
7323 | { | |
7324 | if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR | |
7325 | || l->X_add_number == IND_MEM) | |
7326 | { | |
7327 | as_bad ("Indirect register set name expected"); | |
7328 | l->X_add_number = IND_CPUID; | |
7329 | } | |
7330 | l->X_op = O_index; | |
7331 | l->X_op_symbol = md.regsym[l->X_add_number]; | |
7332 | l->X_add_number = r->X_add_number; | |
7333 | return 1; | |
7334 | } | |
7335 | } | |
7336 | return 0; | |
7337 | } | |
7338 | ||
7339 | int | |
7340 | ia64_parse_name (name, e) | |
7341 | char *name; | |
7342 | expressionS *e; | |
7343 | { | |
7344 | struct const_desc *cdesc; | |
7345 | struct dynreg *dr = 0; | |
7346 | unsigned int regnum; | |
7347 | struct symbol *sym; | |
7348 | char *end; | |
7349 | ||
542d6675 | 7350 | /* first see if NAME is a known register name: */ |
800eeca4 JW |
7351 | sym = hash_find (md.reg_hash, name); |
7352 | if (sym) | |
7353 | { | |
7354 | e->X_op = O_register; | |
7355 | e->X_add_number = S_GET_VALUE (sym); | |
7356 | return 1; | |
7357 | } | |
7358 | ||
7359 | cdesc = hash_find (md.const_hash, name); | |
7360 | if (cdesc) | |
7361 | { | |
7362 | e->X_op = O_constant; | |
7363 | e->X_add_number = cdesc->value; | |
7364 | return 1; | |
7365 | } | |
7366 | ||
542d6675 | 7367 | /* check for inN, locN, or outN: */ |
800eeca4 JW |
7368 | switch (name[0]) |
7369 | { | |
7370 | case 'i': | |
3882b010 | 7371 | if (name[1] == 'n' && ISDIGIT (name[2])) |
800eeca4 JW |
7372 | { |
7373 | dr = &md.in; | |
7374 | name += 2; | |
7375 | } | |
7376 | break; | |
7377 | ||
7378 | case 'l': | |
3882b010 | 7379 | if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3])) |
800eeca4 JW |
7380 | { |
7381 | dr = &md.loc; | |
7382 | name += 3; | |
7383 | } | |
7384 | break; | |
7385 | ||
7386 | case 'o': | |
3882b010 | 7387 | if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3])) |
800eeca4 JW |
7388 | { |
7389 | dr = &md.out; | |
7390 | name += 3; | |
7391 | } | |
7392 | break; | |
7393 | ||
7394 | default: | |
7395 | break; | |
7396 | } | |
7397 | ||
7398 | if (dr) | |
7399 | { | |
542d6675 | 7400 | /* The name is inN, locN, or outN; parse the register number. */ |
800eeca4 JW |
7401 | regnum = strtoul (name, &end, 10); |
7402 | if (end > name && *end == '\0') | |
7403 | { | |
7404 | if ((unsigned) regnum >= dr->num_regs) | |
7405 | { | |
7406 | if (!dr->num_regs) | |
7407 | as_bad ("No current frame"); | |
7408 | else | |
542d6675 KH |
7409 | as_bad ("Register number out of range 0..%u", |
7410 | dr->num_regs - 1); | |
800eeca4 JW |
7411 | regnum = 0; |
7412 | } | |
7413 | e->X_op = O_register; | |
7414 | e->X_add_number = dr->base + regnum; | |
7415 | return 1; | |
7416 | } | |
7417 | } | |
7418 | ||
7419 | if ((dr = hash_find (md.dynreg_hash, name))) | |
7420 | { | |
7421 | /* We've got ourselves the name of a rotating register set. | |
542d6675 KH |
7422 | Store the base register number in the low 16 bits of |
7423 | X_add_number and the size of the register set in the top 16 | |
7424 | bits. */ | |
800eeca4 JW |
7425 | e->X_op = O_register; |
7426 | e->X_add_number = dr->base | (dr->num_regs << 16); | |
7427 | return 1; | |
7428 | } | |
7429 | return 0; | |
7430 | } | |
7431 | ||
7432 | /* Remove the '#' suffix that indicates a symbol as opposed to a register. */ | |
7433 | ||
7434 | char * | |
7435 | ia64_canonicalize_symbol_name (name) | |
7436 | char *name; | |
7437 | { | |
542d6675 KH |
7438 | size_t len = strlen (name); |
7439 | if (len > 1 && name[len - 1] == '#') | |
7440 | name[len - 1] = '\0'; | |
800eeca4 JW |
7441 | return name; |
7442 | } | |
7443 | ||
3e37788f JW |
7444 | /* Return true if idesc is a conditional branch instruction. This excludes |
7445 | the modulo scheduled branches, and br.ia. Mod-sched branches are excluded | |
7446 | because they always read/write resources regardless of the value of the | |
7447 | qualifying predicate. br.ia must always use p0, and hence is always | |
7448 | taken. Thus this function returns true for branches which can fall | |
7449 | through, and which use no resources if they do fall through. */ | |
1deb8127 | 7450 | |
800eeca4 JW |
7451 | static int |
7452 | is_conditional_branch (idesc) | |
542d6675 | 7453 | struct ia64_opcode *idesc; |
800eeca4 | 7454 | { |
1deb8127 | 7455 | /* br is a conditional branch. Everything that starts with br. except |
3e37788f JW |
7456 | br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch. |
7457 | Everything that starts with brl is a conditional branch. */ | |
1deb8127 JW |
7458 | return (idesc->name[0] == 'b' && idesc->name[1] == 'r' |
7459 | && (idesc->name[2] == '\0' | |
3e37788f JW |
7460 | || (idesc->name[2] == '.' && idesc->name[3] != 'i' |
7461 | && idesc->name[3] != 'c' && idesc->name[3] != 'w') | |
7462 | || idesc->name[2] == 'l' | |
7463 | /* br.cond, br.call, br.clr */ | |
7464 | || (idesc->name[2] == '.' && idesc->name[3] == 'c' | |
7465 | && (idesc->name[4] == 'a' || idesc->name[4] == 'o' | |
7466 | || (idesc->name[4] == 'l' && idesc->name[5] == 'r'))))); | |
800eeca4 JW |
7467 | } |
7468 | ||
7469 | /* Return whether the given opcode is a taken branch. If there's any doubt, | |
542d6675 KH |
7470 | returns zero. */ |
7471 | ||
800eeca4 JW |
7472 | static int |
7473 | is_taken_branch (idesc) | |
542d6675 | 7474 | struct ia64_opcode *idesc; |
800eeca4 JW |
7475 | { |
7476 | return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0) | |
542d6675 | 7477 | || strncmp (idesc->name, "br.ia", 5) == 0); |
800eeca4 JW |
7478 | } |
7479 | ||
7480 | /* Return whether the given opcode is an interruption or rfi. If there's any | |
542d6675 KH |
7481 | doubt, returns zero. */ |
7482 | ||
800eeca4 JW |
7483 | static int |
7484 | is_interruption_or_rfi (idesc) | |
542d6675 | 7485 | struct ia64_opcode *idesc; |
800eeca4 JW |
7486 | { |
7487 | if (strcmp (idesc->name, "rfi") == 0) | |
7488 | return 1; | |
7489 | return 0; | |
7490 | } | |
7491 | ||
7492 | /* Returns the index of the given dependency in the opcode's list of chks, or | |
7493 | -1 if there is no dependency. */ | |
542d6675 | 7494 | |
800eeca4 JW |
7495 | static int |
7496 | depends_on (depind, idesc) | |
542d6675 KH |
7497 | int depind; |
7498 | struct ia64_opcode *idesc; | |
800eeca4 JW |
7499 | { |
7500 | int i; | |
7501 | const struct ia64_opcode_dependency *dep = idesc->dependencies; | |
542d6675 | 7502 | for (i = 0; i < dep->nchks; i++) |
800eeca4 | 7503 | { |
542d6675 KH |
7504 | if (depind == DEP (dep->chks[i])) |
7505 | return i; | |
800eeca4 JW |
7506 | } |
7507 | return -1; | |
7508 | } | |
7509 | ||
7510 | /* Determine a set of specific resources used for a particular resource | |
7511 | class. Returns the number of specific resources identified For those | |
7512 | cases which are not determinable statically, the resource returned is | |
197865e8 | 7513 | marked nonspecific. |
800eeca4 JW |
7514 | |
7515 | Meanings of value in 'NOTE': | |
7516 | 1) only read/write when the register number is explicitly encoded in the | |
7517 | insn. | |
7518 | 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only | |
197865e8 | 7519 | accesses CFM when qualifying predicate is in the rotating region. |
800eeca4 JW |
7520 | 3) general register value is used to specify an indirect register; not |
7521 | determinable statically. | |
7522 | 4) only read the given resource when bits 7:0 of the indirect index | |
7523 | register value does not match the register number of the resource; not | |
7524 | determinable statically. | |
7525 | 5) all rules are implementation specific. | |
7526 | 6) only when both the index specified by the reader and the index specified | |
7527 | by the writer have the same value in bits 63:61; not determinable | |
197865e8 | 7528 | statically. |
800eeca4 | 7529 | 7) only access the specified resource when the corresponding mask bit is |
197865e8 | 7530 | set |
800eeca4 JW |
7531 | 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is |
7532 | only read when these insns reference FR2-31 | |
7533 | 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only | |
7534 | written when these insns write FR32-127 | |
7535 | 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the | |
7536 | instruction | |
7537 | 11) The target predicates are written independently of PR[qp], but source | |
7538 | registers are only read if PR[qp] is true. Since the state of PR[qp] | |
7539 | cannot statically be determined, all source registers are marked used. | |
7540 | 12) This insn only reads the specified predicate register when that | |
7541 | register is the PR[qp]. | |
7542 | 13) This reference to ld-c only applies to teh GR whose value is loaded | |
197865e8 | 7543 | with data returned from memory, not the post-incremented address register. |
800eeca4 JW |
7544 | 14) The RSE resource includes the implementation-specific RSE internal |
7545 | state resources. At least one (and possibly more) of these resources are | |
7546 | read by each instruction listed in IC:rse-readers. At least one (and | |
7547 | possibly more) of these resources are written by each insn listed in | |
197865e8 | 7548 | IC:rse-writers. |
800eeca4 | 7549 | 15+16) Represents reserved instructions, which the assembler does not |
197865e8 | 7550 | generate. |
800eeca4 JW |
7551 | |
7552 | Memory resources (i.e. locations in memory) are *not* marked or tracked by | |
7553 | this code; there are no dependency violations based on memory access. | |
800eeca4 JW |
7554 | */ |
7555 | ||
7556 | #define MAX_SPECS 256 | |
7557 | #define DV_CHK 1 | |
7558 | #define DV_REG 0 | |
7559 | ||
7560 | static int | |
7561 | specify_resource (dep, idesc, type, specs, note, path) | |
542d6675 KH |
7562 | const struct ia64_dependency *dep; |
7563 | struct ia64_opcode *idesc; | |
7564 | int type; /* is this a DV chk or a DV reg? */ | |
7565 | struct rsrc specs[MAX_SPECS]; /* returned specific resources */ | |
7566 | int note; /* resource note for this insn's usage */ | |
7567 | int path; /* which execution path to examine */ | |
800eeca4 JW |
7568 | { |
7569 | int count = 0; | |
7570 | int i; | |
7571 | int rsrc_write = 0; | |
7572 | struct rsrc tmpl; | |
197865e8 | 7573 | |
800eeca4 JW |
7574 | if (dep->mode == IA64_DV_WAW |
7575 | || (dep->mode == IA64_DV_RAW && type == DV_REG) | |
7576 | || (dep->mode == IA64_DV_WAR && type == DV_CHK)) | |
7577 | rsrc_write = 1; | |
7578 | ||
7579 | /* template for any resources we identify */ | |
7580 | tmpl.dependency = dep; | |
7581 | tmpl.note = note; | |
7582 | tmpl.insn_srlz = tmpl.data_srlz = 0; | |
7583 | tmpl.qp_regno = CURR_SLOT.qp_regno; | |
7584 | tmpl.link_to_qp_branch = 1; | |
7585 | tmpl.mem_offset.hint = 0; | |
7586 | tmpl.specific = 1; | |
7587 | tmpl.index = 0; | |
7484b8e6 | 7588 | tmpl.cmp_type = CMP_NONE; |
800eeca4 JW |
7589 | |
7590 | #define UNHANDLED \ | |
7591 | as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \ | |
7592 | dep->name, idesc->name, (rsrc_write?"write":"read"), note) | |
7593 | #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path) | |
7594 | ||
7595 | /* we don't need to track these */ | |
7596 | if (dep->semantics == IA64_DVS_NONE) | |
7597 | return 0; | |
7598 | ||
7599 | switch (dep->specifier) | |
7600 | { | |
7601 | case IA64_RS_AR_K: | |
7602 | if (note == 1) | |
542d6675 KH |
7603 | { |
7604 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7605 | { | |
7606 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7607 | if (regno >= 0 && regno <= 7) | |
7608 | { | |
7609 | specs[count] = tmpl; | |
7610 | specs[count++].index = regno; | |
7611 | } | |
7612 | } | |
7613 | } | |
800eeca4 | 7614 | else if (note == 0) |
542d6675 KH |
7615 | { |
7616 | for (i = 0; i < 8; i++) | |
7617 | { | |
7618 | specs[count] = tmpl; | |
7619 | specs[count++].index = i; | |
7620 | } | |
7621 | } | |
800eeca4 | 7622 | else |
542d6675 KH |
7623 | { |
7624 | UNHANDLED; | |
7625 | } | |
800eeca4 JW |
7626 | break; |
7627 | ||
7628 | case IA64_RS_AR_UNAT: | |
7629 | /* This is a mov =AR or mov AR= instruction. */ | |
7630 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7631 | { | |
7632 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7633 | if (regno == AR_UNAT) | |
7634 | { | |
7635 | specs[count++] = tmpl; | |
7636 | } | |
7637 | } | |
7638 | else | |
7639 | { | |
7640 | /* This is a spill/fill, or other instruction that modifies the | |
7641 | unat register. */ | |
7642 | ||
7643 | /* Unless we can determine the specific bits used, mark the whole | |
7644 | thing; bits 8:3 of the memory address indicate the bit used in | |
7645 | UNAT. The .mem.offset hint may be used to eliminate a small | |
7646 | subset of conflicts. */ | |
7647 | specs[count] = tmpl; | |
7648 | if (md.mem_offset.hint) | |
7649 | { | |
542d6675 KH |
7650 | if (md.debug_dv) |
7651 | fprintf (stderr, " Using hint for spill/fill\n"); | |
7652 | /* The index isn't actually used, just set it to something | |
7653 | approximating the bit index. */ | |
800eeca4 JW |
7654 | specs[count].index = (md.mem_offset.offset >> 3) & 0x3F; |
7655 | specs[count].mem_offset.hint = 1; | |
7656 | specs[count].mem_offset.offset = md.mem_offset.offset; | |
7657 | specs[count++].mem_offset.base = md.mem_offset.base; | |
7658 | } | |
7659 | else | |
7660 | { | |
7661 | specs[count++].specific = 0; | |
7662 | } | |
7663 | } | |
7664 | break; | |
7665 | ||
7666 | case IA64_RS_AR: | |
7667 | if (note == 1) | |
542d6675 KH |
7668 | { |
7669 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7670 | { | |
7671 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7672 | if ((regno >= 8 && regno <= 15) | |
7673 | || (regno >= 20 && regno <= 23) | |
7674 | || (regno >= 31 && regno <= 39) | |
7675 | || (regno >= 41 && regno <= 47) | |
7676 | || (regno >= 67 && regno <= 111)) | |
7677 | { | |
7678 | specs[count] = tmpl; | |
7679 | specs[count++].index = regno; | |
7680 | } | |
7681 | } | |
7682 | } | |
800eeca4 | 7683 | else |
542d6675 KH |
7684 | { |
7685 | UNHANDLED; | |
7686 | } | |
800eeca4 JW |
7687 | break; |
7688 | ||
7689 | case IA64_RS_ARb: | |
7690 | if (note == 1) | |
542d6675 KH |
7691 | { |
7692 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
7693 | { | |
7694 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
7695 | if ((regno >= 48 && regno <= 63) | |
7696 | || (regno >= 112 && regno <= 127)) | |
7697 | { | |
7698 | specs[count] = tmpl; | |
7699 | specs[count++].index = regno; | |
7700 | } | |
7701 | } | |
7702 | } | |
800eeca4 | 7703 | else if (note == 0) |
542d6675 KH |
7704 | { |
7705 | for (i = 48; i < 64; i++) | |
7706 | { | |
7707 | specs[count] = tmpl; | |
7708 | specs[count++].index = i; | |
7709 | } | |
7710 | for (i = 112; i < 128; i++) | |
7711 | { | |
7712 | specs[count] = tmpl; | |
7713 | specs[count++].index = i; | |
7714 | } | |
7715 | } | |
197865e8 | 7716 | else |
542d6675 KH |
7717 | { |
7718 | UNHANDLED; | |
7719 | } | |
800eeca4 JW |
7720 | break; |
7721 | ||
7722 | case IA64_RS_BR: | |
7723 | if (note != 1) | |
542d6675 KH |
7724 | { |
7725 | UNHANDLED; | |
7726 | } | |
800eeca4 | 7727 | else |
542d6675 KH |
7728 | { |
7729 | if (rsrc_write) | |
7730 | { | |
7731 | for (i = 0; i < idesc->num_outputs; i++) | |
7732 | if (idesc->operands[i] == IA64_OPND_B1 | |
7733 | || idesc->operands[i] == IA64_OPND_B2) | |
7734 | { | |
7735 | specs[count] = tmpl; | |
7736 | specs[count++].index = | |
7737 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
7738 | } | |
7739 | } | |
7740 | else | |
7741 | { | |
40449e9f | 7742 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) |
542d6675 KH |
7743 | if (idesc->operands[i] == IA64_OPND_B1 |
7744 | || idesc->operands[i] == IA64_OPND_B2) | |
7745 | { | |
7746 | specs[count] = tmpl; | |
7747 | specs[count++].index = | |
7748 | CURR_SLOT.opnd[i].X_add_number - REG_BR; | |
7749 | } | |
7750 | } | |
7751 | } | |
800eeca4 JW |
7752 | break; |
7753 | ||
7754 | case IA64_RS_CPUID: /* four or more registers */ | |
7755 | if (note == 3) | |
542d6675 KH |
7756 | { |
7757 | if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3) | |
7758 | { | |
7759 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7760 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7761 | && KNOWN (regno)) | |
7762 | { | |
7763 | specs[count] = tmpl; | |
7764 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7765 | } | |
7766 | else | |
7767 | { | |
7768 | specs[count] = tmpl; | |
7769 | specs[count++].specific = 0; | |
7770 | } | |
7771 | } | |
7772 | } | |
800eeca4 | 7773 | else |
542d6675 KH |
7774 | { |
7775 | UNHANDLED; | |
7776 | } | |
800eeca4 JW |
7777 | break; |
7778 | ||
7779 | case IA64_RS_DBR: /* four or more registers */ | |
7780 | if (note == 3) | |
542d6675 KH |
7781 | { |
7782 | if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3) | |
7783 | { | |
7784 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7785 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7786 | && KNOWN (regno)) | |
7787 | { | |
7788 | specs[count] = tmpl; | |
7789 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7790 | } | |
7791 | else | |
7792 | { | |
7793 | specs[count] = tmpl; | |
7794 | specs[count++].specific = 0; | |
7795 | } | |
7796 | } | |
7797 | } | |
800eeca4 | 7798 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
7799 | { |
7800 | specs[count] = tmpl; | |
7801 | specs[count++].specific = 0; | |
7802 | } | |
800eeca4 | 7803 | else |
542d6675 KH |
7804 | { |
7805 | UNHANDLED; | |
7806 | } | |
800eeca4 JW |
7807 | break; |
7808 | ||
7809 | case IA64_RS_IBR: /* four or more registers */ | |
7810 | if (note == 3) | |
542d6675 KH |
7811 | { |
7812 | if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3) | |
7813 | { | |
7814 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7815 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7816 | && KNOWN (regno)) | |
7817 | { | |
7818 | specs[count] = tmpl; | |
7819 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7820 | } | |
7821 | else | |
7822 | { | |
7823 | specs[count] = tmpl; | |
7824 | specs[count++].specific = 0; | |
7825 | } | |
7826 | } | |
7827 | } | |
800eeca4 | 7828 | else |
542d6675 KH |
7829 | { |
7830 | UNHANDLED; | |
7831 | } | |
800eeca4 JW |
7832 | break; |
7833 | ||
7834 | case IA64_RS_MSR: | |
7835 | if (note == 5) | |
7836 | { | |
7837 | /* These are implementation specific. Force all references to | |
7838 | conflict with all other references. */ | |
7839 | specs[count] = tmpl; | |
7840 | specs[count++].specific = 0; | |
7841 | } | |
7842 | else | |
7843 | { | |
7844 | UNHANDLED; | |
7845 | } | |
7846 | break; | |
7847 | ||
7848 | case IA64_RS_PKR: /* 16 or more registers */ | |
7849 | if (note == 3 || note == 4) | |
542d6675 KH |
7850 | { |
7851 | if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3) | |
7852 | { | |
7853 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7854 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7855 | && KNOWN (regno)) | |
7856 | { | |
7857 | if (note == 3) | |
7858 | { | |
7859 | specs[count] = tmpl; | |
7860 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7861 | } | |
7862 | else | |
7863 | for (i = 0; i < NELEMS (gr_values); i++) | |
7864 | { | |
7865 | /* Uses all registers *except* the one in R3. */ | |
2434f565 | 7866 | if ((unsigned)i != (gr_values[regno].value & 0xFF)) |
542d6675 KH |
7867 | { |
7868 | specs[count] = tmpl; | |
7869 | specs[count++].index = i; | |
7870 | } | |
7871 | } | |
7872 | } | |
7873 | else | |
7874 | { | |
7875 | specs[count] = tmpl; | |
7876 | specs[count++].specific = 0; | |
7877 | } | |
7878 | } | |
7879 | } | |
7880 | else if (note == 0) | |
7881 | { | |
7882 | /* probe et al. */ | |
7883 | specs[count] = tmpl; | |
7884 | specs[count++].specific = 0; | |
7885 | } | |
7886 | break; | |
7887 | ||
7888 | case IA64_RS_PMC: /* four or more registers */ | |
7889 | if (note == 3) | |
7890 | { | |
7891 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3 | |
7892 | || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3)) | |
7893 | ||
7894 | { | |
7895 | int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write) | |
7896 | ? 1 : !rsrc_write); | |
7897 | int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR; | |
7898 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7899 | && KNOWN (regno)) | |
7900 | { | |
7901 | specs[count] = tmpl; | |
7902 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7903 | } | |
7904 | else | |
7905 | { | |
7906 | specs[count] = tmpl; | |
7907 | specs[count++].specific = 0; | |
7908 | } | |
7909 | } | |
7910 | } | |
7911 | else | |
7912 | { | |
7913 | UNHANDLED; | |
7914 | } | |
800eeca4 JW |
7915 | break; |
7916 | ||
7917 | case IA64_RS_PMD: /* four or more registers */ | |
7918 | if (note == 3) | |
542d6675 KH |
7919 | { |
7920 | if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3) | |
7921 | { | |
7922 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7923 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7924 | && KNOWN (regno)) | |
7925 | { | |
7926 | specs[count] = tmpl; | |
7927 | specs[count++].index = gr_values[regno].value & 0xFF; | |
7928 | } | |
7929 | else | |
7930 | { | |
7931 | specs[count] = tmpl; | |
7932 | specs[count++].specific = 0; | |
7933 | } | |
7934 | } | |
7935 | } | |
800eeca4 | 7936 | else |
542d6675 KH |
7937 | { |
7938 | UNHANDLED; | |
7939 | } | |
800eeca4 JW |
7940 | break; |
7941 | ||
7942 | case IA64_RS_RR: /* eight registers */ | |
7943 | if (note == 6) | |
542d6675 KH |
7944 | { |
7945 | if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3) | |
7946 | { | |
7947 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; | |
7948 | if (regno >= 0 && regno < NELEMS (gr_values) | |
7949 | && KNOWN (regno)) | |
7950 | { | |
7951 | specs[count] = tmpl; | |
7952 | specs[count++].index = (gr_values[regno].value >> 61) & 0x7; | |
7953 | } | |
7954 | else | |
7955 | { | |
7956 | specs[count] = tmpl; | |
7957 | specs[count++].specific = 0; | |
7958 | } | |
7959 | } | |
7960 | } | |
800eeca4 | 7961 | else if (note == 0 && !rsrc_write) |
542d6675 KH |
7962 | { |
7963 | specs[count] = tmpl; | |
7964 | specs[count++].specific = 0; | |
7965 | } | |
197865e8 | 7966 | else |
542d6675 KH |
7967 | { |
7968 | UNHANDLED; | |
7969 | } | |
800eeca4 JW |
7970 | break; |
7971 | ||
7972 | case IA64_RS_CR_IRR: | |
197865e8 | 7973 | if (note == 0) |
542d6675 KH |
7974 | { |
7975 | /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */ | |
7976 | int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR; | |
7977 | if (rsrc_write | |
7978 | && idesc->operands[1] == IA64_OPND_CR3 | |
7979 | && regno == CR_IVR) | |
7980 | { | |
7981 | for (i = 0; i < 4; i++) | |
7982 | { | |
7983 | specs[count] = tmpl; | |
7984 | specs[count++].index = CR_IRR0 + i; | |
7985 | } | |
7986 | } | |
7987 | } | |
800eeca4 | 7988 | else if (note == 1) |
542d6675 KH |
7989 | { |
7990 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
7991 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
7992 | && regno >= CR_IRR0 | |
7993 | && regno <= CR_IRR3) | |
7994 | { | |
7995 | specs[count] = tmpl; | |
7996 | specs[count++].index = regno; | |
7997 | } | |
7998 | } | |
800eeca4 | 7999 | else |
542d6675 KH |
8000 | { |
8001 | UNHANDLED; | |
8002 | } | |
800eeca4 JW |
8003 | break; |
8004 | ||
8005 | case IA64_RS_CR_LRR: | |
8006 | if (note != 1) | |
542d6675 KH |
8007 | { |
8008 | UNHANDLED; | |
8009 | } | |
197865e8 | 8010 | else |
542d6675 KH |
8011 | { |
8012 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8013 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 | |
8014 | && (regno == CR_LRR0 || regno == CR_LRR1)) | |
8015 | { | |
8016 | specs[count] = tmpl; | |
8017 | specs[count++].index = regno; | |
8018 | } | |
8019 | } | |
800eeca4 JW |
8020 | break; |
8021 | ||
8022 | case IA64_RS_CR: | |
8023 | if (note == 1) | |
542d6675 KH |
8024 | { |
8025 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8026 | { | |
8027 | specs[count] = tmpl; | |
8028 | specs[count++].index = | |
8029 | CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8030 | } | |
8031 | } | |
800eeca4 | 8032 | else |
542d6675 KH |
8033 | { |
8034 | UNHANDLED; | |
8035 | } | |
800eeca4 JW |
8036 | break; |
8037 | ||
8038 | case IA64_RS_FR: | |
8039 | case IA64_RS_FRb: | |
8040 | if (note != 1) | |
542d6675 KH |
8041 | { |
8042 | UNHANDLED; | |
8043 | } | |
800eeca4 | 8044 | else if (rsrc_write) |
542d6675 KH |
8045 | { |
8046 | if (dep->specifier == IA64_RS_FRb | |
8047 | && idesc->operands[0] == IA64_OPND_F1) | |
8048 | { | |
8049 | specs[count] = tmpl; | |
8050 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR; | |
8051 | } | |
8052 | } | |
800eeca4 | 8053 | else |
542d6675 KH |
8054 | { |
8055 | for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) | |
8056 | { | |
8057 | if (idesc->operands[i] == IA64_OPND_F2 | |
8058 | || idesc->operands[i] == IA64_OPND_F3 | |
8059 | || idesc->operands[i] == IA64_OPND_F4) | |
8060 | { | |
8061 | specs[count] = tmpl; | |
8062 | specs[count++].index = | |
8063 | CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8064 | } | |
8065 | } | |
8066 | } | |
800eeca4 JW |
8067 | break; |
8068 | ||
8069 | case IA64_RS_GR: | |
8070 | if (note == 13) | |
542d6675 KH |
8071 | { |
8072 | /* This reference applies only to the GR whose value is loaded with | |
8073 | data returned from memory. */ | |
8074 | specs[count] = tmpl; | |
8075 | specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
8076 | } | |
800eeca4 | 8077 | else if (note == 1) |
542d6675 KH |
8078 | { |
8079 | if (rsrc_write) | |
8080 | { | |
8081 | for (i = 0; i < idesc->num_outputs; i++) | |
50b81f19 JW |
8082 | if (idesc->operands[i] == IA64_OPND_R1 |
8083 | || idesc->operands[i] == IA64_OPND_R2 | |
8084 | || idesc->operands[i] == IA64_OPND_R3) | |
8085 | { | |
8086 | specs[count] = tmpl; | |
197865e8 | 8087 | specs[count++].index = |
50b81f19 JW |
8088 | CURR_SLOT.opnd[i].X_add_number - REG_GR; |
8089 | } | |
8090 | if (idesc->flags & IA64_OPCODE_POSTINC) | |
8091 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8092 | if (idesc->operands[i] == IA64_OPND_MR3) | |
8093 | { | |
8094 | specs[count] = tmpl; | |
8095 | specs[count++].index = | |
8096 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8097 | } | |
542d6675 KH |
8098 | } |
8099 | else | |
8100 | { | |
8101 | /* Look for anything that reads a GR. */ | |
8102 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8103 | { | |
8104 | if (idesc->operands[i] == IA64_OPND_MR3 | |
8105 | || idesc->operands[i] == IA64_OPND_CPUID_R3 | |
8106 | || idesc->operands[i] == IA64_OPND_DBR_R3 | |
8107 | || idesc->operands[i] == IA64_OPND_IBR_R3 | |
800eeca4 | 8108 | || idesc->operands[i] == IA64_OPND_MSR_R3 |
542d6675 KH |
8109 | || idesc->operands[i] == IA64_OPND_PKR_R3 |
8110 | || idesc->operands[i] == IA64_OPND_PMC_R3 | |
8111 | || idesc->operands[i] == IA64_OPND_PMD_R3 | |
8112 | || idesc->operands[i] == IA64_OPND_RR_R3 | |
8113 | || ((i >= idesc->num_outputs) | |
8114 | && (idesc->operands[i] == IA64_OPND_R1 | |
8115 | || idesc->operands[i] == IA64_OPND_R2 | |
8116 | || idesc->operands[i] == IA64_OPND_R3 | |
50b81f19 JW |
8117 | /* addl source register. */ |
8118 | || idesc->operands[i] == IA64_OPND_R3_2))) | |
542d6675 KH |
8119 | { |
8120 | specs[count] = tmpl; | |
8121 | specs[count++].index = | |
8122 | CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8123 | } | |
8124 | } | |
8125 | } | |
8126 | } | |
197865e8 | 8127 | else |
542d6675 KH |
8128 | { |
8129 | UNHANDLED; | |
8130 | } | |
800eeca4 JW |
8131 | break; |
8132 | ||
139368c9 JW |
8133 | /* This is the same as IA64_RS_PRr, except that the register range is |
8134 | from 1 - 15, and there are no rotating register reads/writes here. */ | |
800eeca4 JW |
8135 | case IA64_RS_PR: |
8136 | if (note == 0) | |
542d6675 | 8137 | { |
139368c9 | 8138 | for (i = 1; i < 16; i++) |
542d6675 | 8139 | { |
139368c9 JW |
8140 | specs[count] = tmpl; |
8141 | specs[count++].index = i; | |
8142 | } | |
8143 | } | |
8144 | else if (note == 7) | |
8145 | { | |
8146 | valueT mask = 0; | |
8147 | /* Mark only those registers indicated by the mask. */ | |
8148 | if (rsrc_write) | |
8149 | { | |
8150 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8151 | for (i = 1; i < 16; i++) | |
8152 | if (mask & ((valueT) 1 << i)) | |
8153 | { | |
8154 | specs[count] = tmpl; | |
8155 | specs[count++].index = i; | |
8156 | } | |
8157 | } | |
8158 | else | |
8159 | { | |
8160 | UNHANDLED; | |
8161 | } | |
8162 | } | |
8163 | else if (note == 11) /* note 11 implies note 1 as well */ | |
8164 | { | |
8165 | if (rsrc_write) | |
8166 | { | |
8167 | for (i = 0; i < idesc->num_outputs; i++) | |
8168 | { | |
8169 | if (idesc->operands[i] == IA64_OPND_P1 | |
8170 | || idesc->operands[i] == IA64_OPND_P2) | |
8171 | { | |
8172 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8173 | if (regno >= 1 && regno < 16) | |
8174 | { | |
8175 | specs[count] = tmpl; | |
8176 | specs[count++].index = regno; | |
8177 | } | |
8178 | } | |
8179 | } | |
8180 | } | |
8181 | else | |
8182 | { | |
8183 | UNHANDLED; | |
8184 | } | |
8185 | } | |
8186 | else if (note == 12) | |
8187 | { | |
8188 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) | |
8189 | { | |
8190 | specs[count] = tmpl; | |
8191 | specs[count++].index = CURR_SLOT.qp_regno; | |
8192 | } | |
8193 | } | |
8194 | else if (note == 1) | |
8195 | { | |
8196 | if (rsrc_write) | |
8197 | { | |
8198 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8199 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8200 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8201 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
139368c9 JW |
8202 | |
8203 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8204 | || idesc->operands[0] == IA64_OPND_P2) | |
8205 | && p1 >= 1 && p1 < 16) | |
542d6675 KH |
8206 | { |
8207 | specs[count] = tmpl; | |
139368c9 JW |
8208 | specs[count].cmp_type = |
8209 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); | |
8210 | specs[count++].index = p1; | |
8211 | } | |
8212 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8213 | || idesc->operands[1] == IA64_OPND_P2) | |
8214 | && p2 >= 1 && p2 < 16) | |
8215 | { | |
8216 | specs[count] = tmpl; | |
8217 | specs[count].cmp_type = | |
8218 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); | |
8219 | specs[count++].index = p2; | |
542d6675 KH |
8220 | } |
8221 | } | |
8222 | else | |
8223 | { | |
139368c9 | 8224 | if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) |
542d6675 KH |
8225 | { |
8226 | specs[count] = tmpl; | |
139368c9 JW |
8227 | specs[count++].index = CURR_SLOT.qp_regno; |
8228 | } | |
8229 | if (idesc->operands[1] == IA64_OPND_PR) | |
8230 | { | |
8231 | for (i = 1; i < 16; i++) | |
8232 | { | |
8233 | specs[count] = tmpl; | |
8234 | specs[count++].index = i; | |
8235 | } | |
542d6675 KH |
8236 | } |
8237 | } | |
8238 | } | |
139368c9 JW |
8239 | else |
8240 | { | |
8241 | UNHANDLED; | |
8242 | } | |
8243 | break; | |
8244 | ||
8245 | /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are | |
8246 | simplified cases of this. */ | |
8247 | case IA64_RS_PRr: | |
8248 | if (note == 0) | |
8249 | { | |
8250 | for (i = 16; i < 63; i++) | |
8251 | { | |
8252 | specs[count] = tmpl; | |
8253 | specs[count++].index = i; | |
8254 | } | |
8255 | } | |
800eeca4 | 8256 | else if (note == 7) |
542d6675 KH |
8257 | { |
8258 | valueT mask = 0; | |
8259 | /* Mark only those registers indicated by the mask. */ | |
8260 | if (rsrc_write | |
8261 | && idesc->operands[0] == IA64_OPND_PR) | |
8262 | { | |
8263 | mask = CURR_SLOT.opnd[2].X_add_number; | |
40449e9f | 8264 | if (mask & ((valueT) 1 << 16)) |
139368c9 JW |
8265 | for (i = 16; i < 63; i++) |
8266 | { | |
8267 | specs[count] = tmpl; | |
8268 | specs[count++].index = i; | |
8269 | } | |
542d6675 KH |
8270 | } |
8271 | else if (rsrc_write | |
8272 | && idesc->operands[0] == IA64_OPND_PR_ROT) | |
8273 | { | |
8274 | for (i = 16; i < 63; i++) | |
8275 | { | |
8276 | specs[count] = tmpl; | |
8277 | specs[count++].index = i; | |
8278 | } | |
8279 | } | |
8280 | else | |
8281 | { | |
8282 | UNHANDLED; | |
8283 | } | |
8284 | } | |
800eeca4 | 8285 | else if (note == 11) /* note 11 implies note 1 as well */ |
542d6675 KH |
8286 | { |
8287 | if (rsrc_write) | |
8288 | { | |
8289 | for (i = 0; i < idesc->num_outputs; i++) | |
8290 | { | |
8291 | if (idesc->operands[i] == IA64_OPND_P1 | |
8292 | || idesc->operands[i] == IA64_OPND_P2) | |
8293 | { | |
8294 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
139368c9 | 8295 | if (regno >= 16 && regno < 63) |
542d6675 KH |
8296 | { |
8297 | specs[count] = tmpl; | |
8298 | specs[count++].index = regno; | |
8299 | } | |
8300 | } | |
8301 | } | |
8302 | } | |
8303 | else | |
8304 | { | |
8305 | UNHANDLED; | |
8306 | } | |
8307 | } | |
800eeca4 | 8308 | else if (note == 12) |
542d6675 | 8309 | { |
139368c9 | 8310 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8311 | { |
8312 | specs[count] = tmpl; | |
8313 | specs[count++].index = CURR_SLOT.qp_regno; | |
8314 | } | |
8315 | } | |
800eeca4 | 8316 | else if (note == 1) |
542d6675 KH |
8317 | { |
8318 | if (rsrc_write) | |
8319 | { | |
8320 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
8321 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8322 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8323 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 8324 | |
542d6675 KH |
8325 | if ((idesc->operands[0] == IA64_OPND_P1 |
8326 | || idesc->operands[0] == IA64_OPND_P2) | |
139368c9 | 8327 | && p1 >= 16 && p1 < 63) |
542d6675 KH |
8328 | { |
8329 | specs[count] = tmpl; | |
4a4f25cf | 8330 | specs[count].cmp_type = |
7484b8e6 | 8331 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
542d6675 KH |
8332 | specs[count++].index = p1; |
8333 | } | |
8334 | if ((idesc->operands[1] == IA64_OPND_P1 | |
8335 | || idesc->operands[1] == IA64_OPND_P2) | |
139368c9 | 8336 | && p2 >= 16 && p2 < 63) |
542d6675 KH |
8337 | { |
8338 | specs[count] = tmpl; | |
4a4f25cf | 8339 | specs[count].cmp_type = |
7484b8e6 | 8340 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
542d6675 KH |
8341 | specs[count++].index = p2; |
8342 | } | |
8343 | } | |
8344 | else | |
8345 | { | |
139368c9 | 8346 | if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) |
542d6675 KH |
8347 | { |
8348 | specs[count] = tmpl; | |
8349 | specs[count++].index = CURR_SLOT.qp_regno; | |
8350 | } | |
8351 | if (idesc->operands[1] == IA64_OPND_PR) | |
8352 | { | |
139368c9 | 8353 | for (i = 16; i < 63; i++) |
542d6675 KH |
8354 | { |
8355 | specs[count] = tmpl; | |
8356 | specs[count++].index = i; | |
8357 | } | |
8358 | } | |
8359 | } | |
8360 | } | |
197865e8 | 8361 | else |
542d6675 KH |
8362 | { |
8363 | UNHANDLED; | |
8364 | } | |
800eeca4 JW |
8365 | break; |
8366 | ||
8367 | case IA64_RS_PSR: | |
197865e8 | 8368 | /* Verify that the instruction is using the PSR bit indicated in |
542d6675 | 8369 | dep->regindex. */ |
800eeca4 | 8370 | if (note == 0) |
542d6675 KH |
8371 | { |
8372 | if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM) | |
8373 | { | |
8374 | if (dep->regindex < 6) | |
8375 | { | |
8376 | specs[count++] = tmpl; | |
8377 | } | |
8378 | } | |
8379 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR) | |
8380 | { | |
8381 | if (dep->regindex < 32 | |
8382 | || dep->regindex == 35 | |
8383 | || dep->regindex == 36 | |
8384 | || (!rsrc_write && dep->regindex == PSR_CPL)) | |
8385 | { | |
8386 | specs[count++] = tmpl; | |
8387 | } | |
8388 | } | |
8389 | else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L) | |
8390 | { | |
8391 | if (dep->regindex < 32 | |
8392 | || dep->regindex == 35 | |
8393 | || dep->regindex == 36 | |
8394 | || (rsrc_write && dep->regindex == PSR_CPL)) | |
8395 | { | |
8396 | specs[count++] = tmpl; | |
8397 | } | |
8398 | } | |
8399 | else | |
8400 | { | |
8401 | /* Several PSR bits have very specific dependencies. */ | |
8402 | switch (dep->regindex) | |
8403 | { | |
8404 | default: | |
8405 | specs[count++] = tmpl; | |
8406 | break; | |
8407 | case PSR_IC: | |
8408 | if (rsrc_write) | |
8409 | { | |
8410 | specs[count++] = tmpl; | |
8411 | } | |
8412 | else | |
8413 | { | |
8414 | /* Only certain CR accesses use PSR.ic */ | |
8415 | if (idesc->operands[0] == IA64_OPND_CR3 | |
8416 | || idesc->operands[1] == IA64_OPND_CR3) | |
8417 | { | |
8418 | int index = | |
8419 | ((idesc->operands[0] == IA64_OPND_CR3) | |
8420 | ? 0 : 1); | |
8421 | int regno = | |
8422 | CURR_SLOT.opnd[index].X_add_number - REG_CR; | |
8423 | ||
8424 | switch (regno) | |
8425 | { | |
8426 | default: | |
8427 | break; | |
8428 | case CR_ITIR: | |
8429 | case CR_IFS: | |
8430 | case CR_IIM: | |
8431 | case CR_IIP: | |
8432 | case CR_IPSR: | |
8433 | case CR_ISR: | |
8434 | case CR_IFA: | |
8435 | case CR_IHA: | |
8436 | case CR_IIPA: | |
8437 | specs[count++] = tmpl; | |
8438 | break; | |
8439 | } | |
8440 | } | |
8441 | } | |
8442 | break; | |
8443 | case PSR_CPL: | |
8444 | if (rsrc_write) | |
8445 | { | |
8446 | specs[count++] = tmpl; | |
8447 | } | |
8448 | else | |
8449 | { | |
8450 | /* Only some AR accesses use cpl */ | |
8451 | if (idesc->operands[0] == IA64_OPND_AR3 | |
8452 | || idesc->operands[1] == IA64_OPND_AR3) | |
8453 | { | |
8454 | int index = | |
8455 | ((idesc->operands[0] == IA64_OPND_AR3) | |
8456 | ? 0 : 1); | |
8457 | int regno = | |
8458 | CURR_SLOT.opnd[index].X_add_number - REG_AR; | |
8459 | ||
8460 | if (regno == AR_ITC | |
8461 | || (index == 0 | |
8462 | && (regno == AR_ITC | |
8463 | || regno == AR_RSC | |
8464 | || (regno >= AR_K0 | |
8465 | && regno <= AR_K7)))) | |
8466 | { | |
8467 | specs[count++] = tmpl; | |
8468 | } | |
8469 | } | |
8470 | else | |
8471 | { | |
8472 | specs[count++] = tmpl; | |
8473 | } | |
8474 | break; | |
8475 | } | |
8476 | } | |
8477 | } | |
8478 | } | |
800eeca4 | 8479 | else if (note == 7) |
542d6675 KH |
8480 | { |
8481 | valueT mask = 0; | |
8482 | if (idesc->operands[0] == IA64_OPND_IMMU24) | |
8483 | { | |
8484 | mask = CURR_SLOT.opnd[0].X_add_number; | |
8485 | } | |
8486 | else | |
8487 | { | |
8488 | UNHANDLED; | |
8489 | } | |
8490 | if (mask & ((valueT) 1 << dep->regindex)) | |
8491 | { | |
8492 | specs[count++] = tmpl; | |
8493 | } | |
8494 | } | |
800eeca4 | 8495 | else if (note == 8) |
542d6675 KH |
8496 | { |
8497 | int min = dep->regindex == PSR_DFL ? 2 : 32; | |
8498 | int max = dep->regindex == PSR_DFL ? 31 : 127; | |
8499 | /* dfh is read on FR32-127; dfl is read on FR2-31 */ | |
8500 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8501 | { | |
8502 | if (idesc->operands[i] == IA64_OPND_F1 | |
8503 | || idesc->operands[i] == IA64_OPND_F2 | |
8504 | || idesc->operands[i] == IA64_OPND_F3 | |
8505 | || idesc->operands[i] == IA64_OPND_F4) | |
8506 | { | |
8507 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8508 | if (reg >= min && reg <= max) | |
8509 | { | |
8510 | specs[count++] = tmpl; | |
8511 | } | |
8512 | } | |
8513 | } | |
8514 | } | |
800eeca4 | 8515 | else if (note == 9) |
542d6675 KH |
8516 | { |
8517 | int min = dep->regindex == PSR_MFL ? 2 : 32; | |
8518 | int max = dep->regindex == PSR_MFL ? 31 : 127; | |
8519 | /* mfh is read on writes to FR32-127; mfl is read on writes to | |
8520 | FR2-31 */ | |
8521 | for (i = 0; i < idesc->num_outputs; i++) | |
8522 | { | |
8523 | if (idesc->operands[i] == IA64_OPND_F1) | |
8524 | { | |
8525 | int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8526 | if (reg >= min && reg <= max) | |
8527 | { | |
8528 | specs[count++] = tmpl; | |
8529 | } | |
8530 | } | |
8531 | } | |
8532 | } | |
800eeca4 | 8533 | else if (note == 10) |
542d6675 KH |
8534 | { |
8535 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8536 | { | |
8537 | if (idesc->operands[i] == IA64_OPND_R1 | |
8538 | || idesc->operands[i] == IA64_OPND_R2 | |
8539 | || idesc->operands[i] == IA64_OPND_R3) | |
8540 | { | |
8541 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8542 | if (regno >= 16 && regno <= 31) | |
8543 | { | |
8544 | specs[count++] = tmpl; | |
8545 | } | |
8546 | } | |
8547 | } | |
8548 | } | |
800eeca4 | 8549 | else |
542d6675 KH |
8550 | { |
8551 | UNHANDLED; | |
8552 | } | |
800eeca4 JW |
8553 | break; |
8554 | ||
8555 | case IA64_RS_AR_FPSR: | |
8556 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) | |
542d6675 KH |
8557 | { |
8558 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8559 | if (regno == AR_FPSR) | |
8560 | { | |
8561 | specs[count++] = tmpl; | |
8562 | } | |
8563 | } | |
800eeca4 | 8564 | else |
542d6675 KH |
8565 | { |
8566 | specs[count++] = tmpl; | |
8567 | } | |
800eeca4 JW |
8568 | break; |
8569 | ||
197865e8 | 8570 | case IA64_RS_ARX: |
800eeca4 JW |
8571 | /* Handle all AR[REG] resources */ |
8572 | if (note == 0 || note == 1) | |
542d6675 KH |
8573 | { |
8574 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; | |
8575 | if (idesc->operands[!rsrc_write] == IA64_OPND_AR3 | |
8576 | && regno == dep->regindex) | |
8577 | { | |
8578 | specs[count++] = tmpl; | |
8579 | } | |
8580 | /* other AR[REG] resources may be affected by AR accesses */ | |
8581 | else if (idesc->operands[0] == IA64_OPND_AR3) | |
8582 | { | |
8583 | /* AR[] writes */ | |
8584 | regno = CURR_SLOT.opnd[0].X_add_number - REG_AR; | |
8585 | switch (dep->regindex) | |
8586 | { | |
8587 | default: | |
8588 | break; | |
8589 | case AR_BSP: | |
8590 | case AR_RNAT: | |
8591 | if (regno == AR_BSPSTORE) | |
8592 | { | |
8593 | specs[count++] = tmpl; | |
8594 | } | |
8595 | case AR_RSC: | |
8596 | if (!rsrc_write && | |
8597 | (regno == AR_BSPSTORE | |
8598 | || regno == AR_RNAT)) | |
8599 | { | |
8600 | specs[count++] = tmpl; | |
8601 | } | |
8602 | break; | |
8603 | } | |
8604 | } | |
8605 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
8606 | { | |
8607 | /* AR[] reads */ | |
8608 | regno = CURR_SLOT.opnd[1].X_add_number - REG_AR; | |
8609 | switch (dep->regindex) | |
8610 | { | |
8611 | default: | |
8612 | break; | |
8613 | case AR_RSC: | |
8614 | if (regno == AR_BSPSTORE || regno == AR_RNAT) | |
8615 | { | |
8616 | specs[count++] = tmpl; | |
8617 | } | |
8618 | break; | |
8619 | } | |
8620 | } | |
8621 | else | |
8622 | { | |
8623 | specs[count++] = tmpl; | |
8624 | } | |
8625 | } | |
800eeca4 | 8626 | else |
542d6675 KH |
8627 | { |
8628 | UNHANDLED; | |
8629 | } | |
800eeca4 JW |
8630 | break; |
8631 | ||
8632 | case IA64_RS_CRX: | |
8633 | /* Handle all CR[REG] resources */ | |
8634 | if (note == 0 || note == 1) | |
542d6675 KH |
8635 | { |
8636 | if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) | |
8637 | { | |
8638 | int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; | |
8639 | if (regno == dep->regindex) | |
8640 | { | |
8641 | specs[count++] = tmpl; | |
8642 | } | |
8643 | else if (!rsrc_write) | |
8644 | { | |
8645 | /* Reads from CR[IVR] affect other resources. */ | |
8646 | if (regno == CR_IVR) | |
8647 | { | |
8648 | if ((dep->regindex >= CR_IRR0 | |
8649 | && dep->regindex <= CR_IRR3) | |
8650 | || dep->regindex == CR_TPR) | |
8651 | { | |
8652 | specs[count++] = tmpl; | |
8653 | } | |
8654 | } | |
8655 | } | |
8656 | } | |
8657 | else | |
8658 | { | |
8659 | specs[count++] = tmpl; | |
8660 | } | |
8661 | } | |
800eeca4 | 8662 | else |
542d6675 KH |
8663 | { |
8664 | UNHANDLED; | |
8665 | } | |
800eeca4 JW |
8666 | break; |
8667 | ||
8668 | case IA64_RS_INSERVICE: | |
8669 | /* look for write of EOI (67) or read of IVR (65) */ | |
8670 | if ((idesc->operands[0] == IA64_OPND_CR3 | |
542d6675 KH |
8671 | && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI) |
8672 | || (idesc->operands[1] == IA64_OPND_CR3 | |
8673 | && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR)) | |
8674 | { | |
8675 | specs[count++] = tmpl; | |
8676 | } | |
800eeca4 JW |
8677 | break; |
8678 | ||
8679 | case IA64_RS_GR0: | |
8680 | if (note == 1) | |
542d6675 KH |
8681 | { |
8682 | specs[count++] = tmpl; | |
8683 | } | |
800eeca4 | 8684 | else |
542d6675 KH |
8685 | { |
8686 | UNHANDLED; | |
8687 | } | |
800eeca4 JW |
8688 | break; |
8689 | ||
8690 | case IA64_RS_CFM: | |
8691 | if (note != 2) | |
542d6675 KH |
8692 | { |
8693 | specs[count++] = tmpl; | |
8694 | } | |
800eeca4 | 8695 | else |
542d6675 KH |
8696 | { |
8697 | /* Check if any of the registers accessed are in the rotating region. | |
8698 | mov to/from pr accesses CFM only when qp_regno is in the rotating | |
8699 | region */ | |
8700 | for (i = 0; i < NELEMS (idesc->operands); i++) | |
8701 | { | |
8702 | if (idesc->operands[i] == IA64_OPND_R1 | |
8703 | || idesc->operands[i] == IA64_OPND_R2 | |
8704 | || idesc->operands[i] == IA64_OPND_R3) | |
8705 | { | |
8706 | int num = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
8707 | /* Assumes that md.rot.num_regs is always valid */ | |
8708 | if (md.rot.num_regs > 0 | |
8709 | && num > 31 | |
8710 | && num < 31 + md.rot.num_regs) | |
8711 | { | |
8712 | specs[count] = tmpl; | |
8713 | specs[count++].specific = 0; | |
8714 | } | |
8715 | } | |
8716 | else if (idesc->operands[i] == IA64_OPND_F1 | |
8717 | || idesc->operands[i] == IA64_OPND_F2 | |
8718 | || idesc->operands[i] == IA64_OPND_F3 | |
8719 | || idesc->operands[i] == IA64_OPND_F4) | |
8720 | { | |
8721 | int num = CURR_SLOT.opnd[i].X_add_number - REG_FR; | |
8722 | if (num > 31) | |
8723 | { | |
8724 | specs[count] = tmpl; | |
8725 | specs[count++].specific = 0; | |
8726 | } | |
8727 | } | |
8728 | else if (idesc->operands[i] == IA64_OPND_P1 | |
8729 | || idesc->operands[i] == IA64_OPND_P2) | |
8730 | { | |
8731 | int num = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
8732 | if (num > 15) | |
8733 | { | |
8734 | specs[count] = tmpl; | |
8735 | specs[count++].specific = 0; | |
8736 | } | |
8737 | } | |
8738 | } | |
8739 | if (CURR_SLOT.qp_regno > 15) | |
8740 | { | |
8741 | specs[count] = tmpl; | |
8742 | specs[count++].specific = 0; | |
8743 | } | |
8744 | } | |
800eeca4 JW |
8745 | break; |
8746 | ||
139368c9 JW |
8747 | /* This is the same as IA64_RS_PRr, except simplified to account for |
8748 | the fact that there is only one register. */ | |
800eeca4 JW |
8749 | case IA64_RS_PR63: |
8750 | if (note == 0) | |
542d6675 KH |
8751 | { |
8752 | specs[count++] = tmpl; | |
8753 | } | |
139368c9 | 8754 | else if (note == 7) |
40449e9f KH |
8755 | { |
8756 | valueT mask = 0; | |
8757 | if (idesc->operands[2] == IA64_OPND_IMM17) | |
8758 | mask = CURR_SLOT.opnd[2].X_add_number; | |
8759 | if (mask & ((valueT) 1 << 63)) | |
139368c9 | 8760 | specs[count++] = tmpl; |
40449e9f | 8761 | } |
800eeca4 | 8762 | else if (note == 11) |
542d6675 KH |
8763 | { |
8764 | if ((idesc->operands[0] == IA64_OPND_P1 | |
8765 | && CURR_SLOT.opnd[0].X_add_number - REG_P == 63) | |
8766 | || (idesc->operands[1] == IA64_OPND_P2 | |
8767 | && CURR_SLOT.opnd[1].X_add_number - REG_P == 63)) | |
8768 | { | |
8769 | specs[count++] = tmpl; | |
8770 | } | |
8771 | } | |
800eeca4 | 8772 | else if (note == 12) |
542d6675 KH |
8773 | { |
8774 | if (CURR_SLOT.qp_regno == 63) | |
8775 | { | |
8776 | specs[count++] = tmpl; | |
8777 | } | |
8778 | } | |
800eeca4 | 8779 | else if (note == 1) |
542d6675 KH |
8780 | { |
8781 | if (rsrc_write) | |
8782 | { | |
40449e9f KH |
8783 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; |
8784 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; | |
07726851 KH |
8785 | int or_andcm = strstr (idesc->name, "or.andcm") != NULL; |
8786 | int and_orcm = strstr (idesc->name, "and.orcm") != NULL; | |
7484b8e6 | 8787 | |
4a4f25cf | 8788 | if (p1 == 63 |
7484b8e6 TW |
8789 | && (idesc->operands[0] == IA64_OPND_P1 |
8790 | || idesc->operands[0] == IA64_OPND_P2)) | |
8791 | { | |
40449e9f | 8792 | specs[count] = tmpl; |
4a4f25cf | 8793 | specs[count++].cmp_type = |
7484b8e6 TW |
8794 | (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); |
8795 | } | |
8796 | if (p2 == 63 | |
8797 | && (idesc->operands[1] == IA64_OPND_P1 | |
8798 | || idesc->operands[1] == IA64_OPND_P2)) | |
8799 | { | |
40449e9f | 8800 | specs[count] = tmpl; |
4a4f25cf | 8801 | specs[count++].cmp_type = |
7484b8e6 TW |
8802 | (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); |
8803 | } | |
542d6675 KH |
8804 | } |
8805 | else | |
8806 | { | |
8807 | if (CURR_SLOT.qp_regno == 63) | |
8808 | { | |
8809 | specs[count++] = tmpl; | |
8810 | } | |
8811 | } | |
8812 | } | |
800eeca4 | 8813 | else |
542d6675 KH |
8814 | { |
8815 | UNHANDLED; | |
8816 | } | |
800eeca4 JW |
8817 | break; |
8818 | ||
8819 | case IA64_RS_RSE: | |
8820 | /* FIXME we can identify some individual RSE written resources, but RSE | |
542d6675 KH |
8821 | read resources have not yet been completely identified, so for now |
8822 | treat RSE as a single resource */ | |
800eeca4 | 8823 | if (strncmp (idesc->name, "mov", 3) == 0) |
542d6675 KH |
8824 | { |
8825 | if (rsrc_write) | |
8826 | { | |
8827 | if (idesc->operands[0] == IA64_OPND_AR3 | |
8828 | && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE) | |
8829 | { | |
8830 | specs[count] = tmpl; | |
8831 | specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */ | |
8832 | } | |
8833 | } | |
8834 | else | |
8835 | { | |
8836 | if (idesc->operands[0] == IA64_OPND_AR3) | |
8837 | { | |
8838 | if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE | |
8839 | || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT) | |
8840 | { | |
8841 | specs[count++] = tmpl; | |
8842 | } | |
8843 | } | |
8844 | else if (idesc->operands[1] == IA64_OPND_AR3) | |
8845 | { | |
8846 | if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP | |
8847 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE | |
8848 | || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT) | |
8849 | { | |
8850 | specs[count++] = tmpl; | |
8851 | } | |
8852 | } | |
8853 | } | |
8854 | } | |
197865e8 | 8855 | else |
542d6675 KH |
8856 | { |
8857 | specs[count++] = tmpl; | |
8858 | } | |
800eeca4 JW |
8859 | break; |
8860 | ||
8861 | case IA64_RS_ANY: | |
8862 | /* FIXME -- do any of these need to be non-specific? */ | |
8863 | specs[count++] = tmpl; | |
8864 | break; | |
8865 | ||
8866 | default: | |
8867 | as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier); | |
8868 | break; | |
8869 | } | |
8870 | ||
8871 | return count; | |
8872 | } | |
8873 | ||
8874 | /* Clear branch flags on marked resources. This breaks the link between the | |
542d6675 KH |
8875 | QP of the marking instruction and a subsequent branch on the same QP. */ |
8876 | ||
800eeca4 JW |
8877 | static void |
8878 | clear_qp_branch_flag (mask) | |
542d6675 | 8879 | valueT mask; |
800eeca4 JW |
8880 | { |
8881 | int i; | |
542d6675 | 8882 | for (i = 0; i < regdepslen; i++) |
800eeca4 | 8883 | { |
197865e8 | 8884 | valueT bit = ((valueT) 1 << regdeps[i].qp_regno); |
800eeca4 | 8885 | if ((bit & mask) != 0) |
542d6675 KH |
8886 | { |
8887 | regdeps[i].link_to_qp_branch = 0; | |
8888 | } | |
800eeca4 JW |
8889 | } |
8890 | } | |
8891 | ||
5e2f6673 L |
8892 | /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove |
8893 | any mutexes which contain one of the PRs and create new ones when | |
8894 | needed. */ | |
8895 | ||
8896 | static int | |
8897 | update_qp_mutex (valueT mask) | |
8898 | { | |
8899 | int i; | |
8900 | int add = 0; | |
8901 | ||
8902 | i = 0; | |
8903 | while (i < qp_mutexeslen) | |
8904 | { | |
8905 | if ((qp_mutexes[i].prmask & mask) != 0) | |
8906 | { | |
8907 | /* If it destroys and creates the same mutex, do nothing. */ | |
8908 | if (qp_mutexes[i].prmask == mask | |
8909 | && qp_mutexes[i].path == md.path) | |
8910 | { | |
8911 | i++; | |
8912 | add = -1; | |
8913 | } | |
8914 | else | |
8915 | { | |
8916 | int keep = 0; | |
8917 | ||
8918 | if (md.debug_dv) | |
8919 | { | |
8920 | fprintf (stderr, " Clearing mutex relation"); | |
8921 | print_prmask (qp_mutexes[i].prmask); | |
8922 | fprintf (stderr, "\n"); | |
8923 | } | |
8924 | ||
8925 | /* Deal with the old mutex with more than 3+ PRs only if | |
8926 | the new mutex on the same execution path with it. | |
8927 | ||
8928 | FIXME: The 3+ mutex support is incomplete. | |
8929 | dot_pred_rel () may be a better place to fix it. */ | |
8930 | if (qp_mutexes[i].path == md.path) | |
8931 | { | |
8932 | /* If it is a proper subset of the mutex, create a | |
8933 | new mutex. */ | |
8934 | if (add == 0 | |
8935 | && (qp_mutexes[i].prmask & mask) == mask) | |
8936 | add = 1; | |
8937 | ||
8938 | qp_mutexes[i].prmask &= ~mask; | |
8939 | if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1)) | |
8940 | { | |
8941 | /* Modify the mutex if there are more than one | |
8942 | PR left. */ | |
8943 | keep = 1; | |
8944 | i++; | |
8945 | } | |
8946 | } | |
8947 | ||
8948 | if (keep == 0) | |
8949 | /* Remove the mutex. */ | |
8950 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
8951 | } | |
8952 | } | |
8953 | else | |
8954 | ++i; | |
8955 | } | |
8956 | ||
8957 | if (add == 1) | |
8958 | add_qp_mutex (mask); | |
8959 | ||
8960 | return add; | |
8961 | } | |
8962 | ||
197865e8 | 8963 | /* Remove any mutexes which contain any of the PRs indicated in the mask. |
800eeca4 | 8964 | |
542d6675 KH |
8965 | Any changes to a PR clears the mutex relations which include that PR. */ |
8966 | ||
800eeca4 JW |
8967 | static void |
8968 | clear_qp_mutex (mask) | |
542d6675 | 8969 | valueT mask; |
800eeca4 JW |
8970 | { |
8971 | int i; | |
8972 | ||
8973 | i = 0; | |
8974 | while (i < qp_mutexeslen) | |
8975 | { | |
8976 | if ((qp_mutexes[i].prmask & mask) != 0) | |
542d6675 KH |
8977 | { |
8978 | if (md.debug_dv) | |
8979 | { | |
8980 | fprintf (stderr, " Clearing mutex relation"); | |
8981 | print_prmask (qp_mutexes[i].prmask); | |
8982 | fprintf (stderr, "\n"); | |
8983 | } | |
8984 | qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; | |
8985 | } | |
800eeca4 | 8986 | else |
542d6675 | 8987 | ++i; |
800eeca4 JW |
8988 | } |
8989 | } | |
8990 | ||
8991 | /* Clear implies relations which contain PRs in the given masks. | |
8992 | P1_MASK indicates the source of the implies relation, while P2_MASK | |
542d6675 KH |
8993 | indicates the implied PR. */ |
8994 | ||
800eeca4 JW |
8995 | static void |
8996 | clear_qp_implies (p1_mask, p2_mask) | |
542d6675 KH |
8997 | valueT p1_mask; |
8998 | valueT p2_mask; | |
800eeca4 JW |
8999 | { |
9000 | int i; | |
9001 | ||
9002 | i = 0; | |
9003 | while (i < qp_implieslen) | |
9004 | { | |
197865e8 | 9005 | if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0 |
542d6675 KH |
9006 | || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0) |
9007 | { | |
9008 | if (md.debug_dv) | |
9009 | fprintf (stderr, "Clearing implied relation PR%d->PR%d\n", | |
9010 | qp_implies[i].p1, qp_implies[i].p2); | |
9011 | qp_implies[i] = qp_implies[--qp_implieslen]; | |
9012 | } | |
197865e8 | 9013 | else |
542d6675 | 9014 | ++i; |
800eeca4 JW |
9015 | } |
9016 | } | |
9017 | ||
542d6675 KH |
9018 | /* Add the PRs specified to the list of implied relations. */ |
9019 | ||
800eeca4 JW |
9020 | static void |
9021 | add_qp_imply (p1, p2) | |
542d6675 | 9022 | int p1, p2; |
800eeca4 JW |
9023 | { |
9024 | valueT mask; | |
9025 | valueT bit; | |
9026 | int i; | |
9027 | ||
542d6675 | 9028 | /* p0 is not meaningful here. */ |
800eeca4 JW |
9029 | if (p1 == 0 || p2 == 0) |
9030 | abort (); | |
9031 | ||
9032 | if (p1 == p2) | |
9033 | return; | |
9034 | ||
542d6675 KH |
9035 | /* If it exists already, ignore it. */ |
9036 | for (i = 0; i < qp_implieslen; i++) | |
800eeca4 | 9037 | { |
197865e8 | 9038 | if (qp_implies[i].p1 == p1 |
542d6675 KH |
9039 | && qp_implies[i].p2 == p2 |
9040 | && qp_implies[i].path == md.path | |
9041 | && !qp_implies[i].p2_branched) | |
9042 | return; | |
800eeca4 JW |
9043 | } |
9044 | ||
9045 | if (qp_implieslen == qp_impliestotlen) | |
9046 | { | |
9047 | qp_impliestotlen += 20; | |
9048 | qp_implies = (struct qp_imply *) | |
542d6675 KH |
9049 | xrealloc ((void *) qp_implies, |
9050 | qp_impliestotlen * sizeof (struct qp_imply)); | |
800eeca4 JW |
9051 | } |
9052 | if (md.debug_dv) | |
9053 | fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2); | |
9054 | qp_implies[qp_implieslen].p1 = p1; | |
9055 | qp_implies[qp_implieslen].p2 = p2; | |
9056 | qp_implies[qp_implieslen].path = md.path; | |
9057 | qp_implies[qp_implieslen++].p2_branched = 0; | |
9058 | ||
9059 | /* Add in the implied transitive relations; for everything that p2 implies, | |
9060 | make p1 imply that, too; for everything that implies p1, make it imply p2 | |
197865e8 | 9061 | as well. */ |
542d6675 | 9062 | for (i = 0; i < qp_implieslen; i++) |
800eeca4 JW |
9063 | { |
9064 | if (qp_implies[i].p1 == p2) | |
542d6675 | 9065 | add_qp_imply (p1, qp_implies[i].p2); |
800eeca4 | 9066 | if (qp_implies[i].p2 == p1) |
542d6675 | 9067 | add_qp_imply (qp_implies[i].p1, p2); |
800eeca4 JW |
9068 | } |
9069 | /* Add in mutex relations implied by this implies relation; for each mutex | |
197865e8 KH |
9070 | relation containing p2, duplicate it and replace p2 with p1. */ |
9071 | bit = (valueT) 1 << p1; | |
9072 | mask = (valueT) 1 << p2; | |
542d6675 | 9073 | for (i = 0; i < qp_mutexeslen; i++) |
800eeca4 JW |
9074 | { |
9075 | if (qp_mutexes[i].prmask & mask) | |
542d6675 | 9076 | add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit); |
800eeca4 JW |
9077 | } |
9078 | } | |
9079 | ||
800eeca4 JW |
9080 | /* Add the PRs specified in the mask to the mutex list; this means that only |
9081 | one of the PRs can be true at any time. PR0 should never be included in | |
9082 | the mask. */ | |
542d6675 | 9083 | |
800eeca4 JW |
9084 | static void |
9085 | add_qp_mutex (mask) | |
542d6675 | 9086 | valueT mask; |
800eeca4 JW |
9087 | { |
9088 | if (mask & 0x1) | |
9089 | abort (); | |
9090 | ||
9091 | if (qp_mutexeslen == qp_mutexestotlen) | |
9092 | { | |
9093 | qp_mutexestotlen += 20; | |
9094 | qp_mutexes = (struct qpmutex *) | |
542d6675 KH |
9095 | xrealloc ((void *) qp_mutexes, |
9096 | qp_mutexestotlen * sizeof (struct qpmutex)); | |
800eeca4 JW |
9097 | } |
9098 | if (md.debug_dv) | |
9099 | { | |
9100 | fprintf (stderr, " Registering mutex on"); | |
9101 | print_prmask (mask); | |
9102 | fprintf (stderr, "\n"); | |
9103 | } | |
9104 | qp_mutexes[qp_mutexeslen].path = md.path; | |
9105 | qp_mutexes[qp_mutexeslen++].prmask = mask; | |
9106 | } | |
9107 | ||
cb5301b6 RH |
9108 | static int |
9109 | has_suffix_p (name, suffix) | |
40449e9f KH |
9110 | const char *name; |
9111 | const char *suffix; | |
cb5301b6 RH |
9112 | { |
9113 | size_t namelen = strlen (name); | |
9114 | size_t sufflen = strlen (suffix); | |
9115 | ||
9116 | if (namelen <= sufflen) | |
9117 | return 0; | |
9118 | return strcmp (name + namelen - sufflen, suffix) == 0; | |
9119 | } | |
9120 | ||
800eeca4 JW |
9121 | static void |
9122 | clear_register_values () | |
9123 | { | |
9124 | int i; | |
9125 | if (md.debug_dv) | |
9126 | fprintf (stderr, " Clearing register values\n"); | |
542d6675 | 9127 | for (i = 1; i < NELEMS (gr_values); i++) |
800eeca4 JW |
9128 | gr_values[i].known = 0; |
9129 | } | |
9130 | ||
9131 | /* Keep track of register values/changes which affect DV tracking. | |
9132 | ||
9133 | optimization note: should add a flag to classes of insns where otherwise we | |
542d6675 | 9134 | have to examine a group of strings to identify them. */ |
800eeca4 | 9135 | |
800eeca4 JW |
9136 | static void |
9137 | note_register_values (idesc) | |
542d6675 | 9138 | struct ia64_opcode *idesc; |
800eeca4 JW |
9139 | { |
9140 | valueT qp_changemask = 0; | |
9141 | int i; | |
9142 | ||
542d6675 KH |
9143 | /* Invalidate values for registers being written to. */ |
9144 | for (i = 0; i < idesc->num_outputs; i++) | |
800eeca4 | 9145 | { |
197865e8 | 9146 | if (idesc->operands[i] == IA64_OPND_R1 |
542d6675 KH |
9147 | || idesc->operands[i] == IA64_OPND_R2 |
9148 | || idesc->operands[i] == IA64_OPND_R3) | |
9149 | { | |
9150 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9151 | if (regno > 0 && regno < NELEMS (gr_values)) | |
9152 | gr_values[regno].known = 0; | |
9153 | } | |
50b81f19 JW |
9154 | else if (idesc->operands[i] == IA64_OPND_R3_2) |
9155 | { | |
9156 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; | |
9157 | if (regno > 0 && regno < 4) | |
9158 | gr_values[regno].known = 0; | |
9159 | } | |
197865e8 | 9160 | else if (idesc->operands[i] == IA64_OPND_P1 |
542d6675 KH |
9161 | || idesc->operands[i] == IA64_OPND_P2) |
9162 | { | |
9163 | int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; | |
9164 | qp_changemask |= (valueT) 1 << regno; | |
9165 | } | |
800eeca4 | 9166 | else if (idesc->operands[i] == IA64_OPND_PR) |
542d6675 KH |
9167 | { |
9168 | if (idesc->operands[2] & (valueT) 0x10000) | |
9169 | qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2]; | |
9170 | else | |
9171 | qp_changemask = idesc->operands[2]; | |
9172 | break; | |
9173 | } | |
800eeca4 | 9174 | else if (idesc->operands[i] == IA64_OPND_PR_ROT) |
542d6675 KH |
9175 | { |
9176 | if (idesc->operands[1] & ((valueT) 1 << 43)) | |
6344efa4 | 9177 | qp_changemask = -((valueT) 1 << 44) | idesc->operands[1]; |
542d6675 KH |
9178 | else |
9179 | qp_changemask = idesc->operands[1]; | |
9180 | qp_changemask &= ~(valueT) 0xFFFF; | |
9181 | break; | |
9182 | } | |
9183 | } | |
9184 | ||
9185 | /* Always clear qp branch flags on any PR change. */ | |
9186 | /* FIXME there may be exceptions for certain compares. */ | |
800eeca4 JW |
9187 | clear_qp_branch_flag (qp_changemask); |
9188 | ||
542d6675 | 9189 | /* Invalidate rotating registers on insns which affect RRBs in CFM. */ |
800eeca4 JW |
9190 | if (idesc->flags & IA64_OPCODE_MOD_RRBS) |
9191 | { | |
197865e8 | 9192 | qp_changemask |= ~(valueT) 0xFFFF; |
800eeca4 | 9193 | if (strcmp (idesc->name, "clrrrb.pr") != 0) |
542d6675 KH |
9194 | { |
9195 | for (i = 32; i < 32 + md.rot.num_regs; i++) | |
9196 | gr_values[i].known = 0; | |
9197 | } | |
800eeca4 JW |
9198 | clear_qp_mutex (qp_changemask); |
9199 | clear_qp_implies (qp_changemask, qp_changemask); | |
9200 | } | |
542d6675 KH |
9201 | /* After a call, all register values are undefined, except those marked |
9202 | as "safe". */ | |
800eeca4 | 9203 | else if (strncmp (idesc->name, "br.call", 6) == 0 |
542d6675 | 9204 | || strncmp (idesc->name, "brl.call", 7) == 0) |
800eeca4 | 9205 | { |
56d27c17 | 9206 | /* FIXME keep GR values which are marked as "safe_across_calls" */ |
800eeca4 JW |
9207 | clear_register_values (); |
9208 | clear_qp_mutex (~qp_safe_across_calls); | |
9209 | clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls); | |
9210 | clear_qp_branch_flag (~qp_safe_across_calls); | |
9211 | } | |
e9718fe1 | 9212 | else if (is_interruption_or_rfi (idesc) |
542d6675 | 9213 | || is_taken_branch (idesc)) |
e9718fe1 TW |
9214 | { |
9215 | clear_register_values (); | |
197865e8 KH |
9216 | clear_qp_mutex (~(valueT) 0); |
9217 | clear_qp_implies (~(valueT) 0, ~(valueT) 0); | |
e9718fe1 | 9218 | } |
542d6675 | 9219 | /* Look for mutex and implies relations. */ |
197865e8 | 9220 | else if ((idesc->operands[0] == IA64_OPND_P1 |
542d6675 KH |
9221 | || idesc->operands[0] == IA64_OPND_P2) |
9222 | && (idesc->operands[1] == IA64_OPND_P1 | |
9223 | || idesc->operands[1] == IA64_OPND_P2)) | |
800eeca4 JW |
9224 | { |
9225 | int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; | |
197865e8 | 9226 | int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; |
5e2f6673 L |
9227 | valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0; |
9228 | valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0; | |
800eeca4 | 9229 | |
5e2f6673 L |
9230 | /* If both PRs are PR0, we can't really do anything. */ |
9231 | if (p1 == 0 && p2 == 0) | |
542d6675 KH |
9232 | { |
9233 | if (md.debug_dv) | |
9234 | fprintf (stderr, " Ignoring PRs due to inclusion of p0\n"); | |
9235 | } | |
800eeca4 | 9236 | /* In general, clear mutexes and implies which include P1 or P2, |
542d6675 | 9237 | with the following exceptions. */ |
cb5301b6 RH |
9238 | else if (has_suffix_p (idesc->name, ".or.andcm") |
9239 | || has_suffix_p (idesc->name, ".and.orcm")) | |
542d6675 | 9240 | { |
542d6675 KH |
9241 | clear_qp_implies (p2mask, p1mask); |
9242 | } | |
cb5301b6 RH |
9243 | else if (has_suffix_p (idesc->name, ".andcm") |
9244 | || has_suffix_p (idesc->name, ".and")) | |
542d6675 KH |
9245 | { |
9246 | clear_qp_implies (0, p1mask | p2mask); | |
9247 | } | |
cb5301b6 RH |
9248 | else if (has_suffix_p (idesc->name, ".orcm") |
9249 | || has_suffix_p (idesc->name, ".or")) | |
542d6675 KH |
9250 | { |
9251 | clear_qp_mutex (p1mask | p2mask); | |
9252 | clear_qp_implies (p1mask | p2mask, 0); | |
9253 | } | |
800eeca4 | 9254 | else |
542d6675 | 9255 | { |
5e2f6673 L |
9256 | int added = 0; |
9257 | ||
542d6675 | 9258 | clear_qp_implies (p1mask | p2mask, p1mask | p2mask); |
5e2f6673 L |
9259 | |
9260 | /* If one of the PRs is PR0, we call clear_qp_mutex. */ | |
9261 | if (p1 == 0 || p2 == 0) | |
9262 | clear_qp_mutex (p1mask | p2mask); | |
9263 | else | |
9264 | added = update_qp_mutex (p1mask | p2mask); | |
9265 | ||
9266 | if (CURR_SLOT.qp_regno == 0 | |
9267 | || has_suffix_p (idesc->name, ".unc")) | |
542d6675 | 9268 | { |
5e2f6673 L |
9269 | if (added == 0 && p1 && p2) |
9270 | add_qp_mutex (p1mask | p2mask); | |
542d6675 KH |
9271 | if (CURR_SLOT.qp_regno != 0) |
9272 | { | |
5e2f6673 L |
9273 | if (p1) |
9274 | add_qp_imply (p1, CURR_SLOT.qp_regno); | |
9275 | if (p2) | |
9276 | add_qp_imply (p2, CURR_SLOT.qp_regno); | |
542d6675 KH |
9277 | } |
9278 | } | |
542d6675 KH |
9279 | } |
9280 | } | |
9281 | /* Look for mov imm insns into GRs. */ | |
800eeca4 | 9282 | else if (idesc->operands[0] == IA64_OPND_R1 |
542d6675 KH |
9283 | && (idesc->operands[1] == IA64_OPND_IMM22 |
9284 | || idesc->operands[1] == IA64_OPND_IMMU64) | |
9285 | && (strcmp (idesc->name, "mov") == 0 | |
9286 | || strcmp (idesc->name, "movl") == 0)) | |
800eeca4 JW |
9287 | { |
9288 | int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; | |
542d6675 KH |
9289 | if (regno > 0 && regno < NELEMS (gr_values)) |
9290 | { | |
9291 | gr_values[regno].known = 1; | |
9292 | gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number; | |
9293 | gr_values[regno].path = md.path; | |
9294 | if (md.debug_dv) | |
2434f565 JW |
9295 | { |
9296 | fprintf (stderr, " Know gr%d = ", regno); | |
9297 | fprintf_vma (stderr, gr_values[regno].value); | |
9298 | fputs ("\n", stderr); | |
9299 | } | |
542d6675 | 9300 | } |
800eeca4 | 9301 | } |
197865e8 | 9302 | else |
800eeca4 JW |
9303 | { |
9304 | clear_qp_mutex (qp_changemask); | |
9305 | clear_qp_implies (qp_changemask, qp_changemask); | |
9306 | } | |
9307 | } | |
9308 | ||
542d6675 KH |
9309 | /* Return whether the given predicate registers are currently mutex. */ |
9310 | ||
800eeca4 JW |
9311 | static int |
9312 | qp_mutex (p1, p2, path) | |
542d6675 KH |
9313 | int p1; |
9314 | int p2; | |
9315 | int path; | |
800eeca4 JW |
9316 | { |
9317 | int i; | |
9318 | valueT mask; | |
9319 | ||
9320 | if (p1 != p2) | |
9321 | { | |
542d6675 KH |
9322 | mask = ((valueT) 1 << p1) | (valueT) 1 << p2; |
9323 | for (i = 0; i < qp_mutexeslen; i++) | |
9324 | { | |
9325 | if (qp_mutexes[i].path >= path | |
9326 | && (qp_mutexes[i].prmask & mask) == mask) | |
9327 | return 1; | |
9328 | } | |
800eeca4 JW |
9329 | } |
9330 | return 0; | |
9331 | } | |
9332 | ||
9333 | /* Return whether the given resource is in the given insn's list of chks | |
9334 | Return 1 if the conflict is absolutely determined, 2 if it's a potential | |
542d6675 KH |
9335 | conflict. */ |
9336 | ||
800eeca4 JW |
9337 | static int |
9338 | resources_match (rs, idesc, note, qp_regno, path) | |
542d6675 KH |
9339 | struct rsrc *rs; |
9340 | struct ia64_opcode *idesc; | |
9341 | int note; | |
9342 | int qp_regno; | |
9343 | int path; | |
800eeca4 JW |
9344 | { |
9345 | struct rsrc specs[MAX_SPECS]; | |
9346 | int count; | |
9347 | ||
9348 | /* If the marked resource's qp_regno and the given qp_regno are mutex, | |
9349 | we don't need to check. One exception is note 11, which indicates that | |
9350 | target predicates are written regardless of PR[qp]. */ | |
197865e8 | 9351 | if (qp_mutex (rs->qp_regno, qp_regno, path) |
800eeca4 JW |
9352 | && note != 11) |
9353 | return 0; | |
9354 | ||
9355 | count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path); | |
9356 | while (count-- > 0) | |
9357 | { | |
9358 | /* UNAT checking is a bit more specific than other resources */ | |
9359 | if (rs->dependency->specifier == IA64_RS_AR_UNAT | |
542d6675 KH |
9360 | && specs[count].mem_offset.hint |
9361 | && rs->mem_offset.hint) | |
9362 | { | |
9363 | if (rs->mem_offset.base == specs[count].mem_offset.base) | |
9364 | { | |
9365 | if (((rs->mem_offset.offset >> 3) & 0x3F) == | |
9366 | ((specs[count].mem_offset.offset >> 3) & 0x3F)) | |
9367 | return 1; | |
9368 | else | |
9369 | continue; | |
9370 | } | |
9371 | } | |
800eeca4 | 9372 | |
7484b8e6 | 9373 | /* Skip apparent PR write conflicts where both writes are an AND or both |
4a4f25cf | 9374 | writes are an OR. */ |
7484b8e6 | 9375 | if (rs->dependency->specifier == IA64_RS_PR |
afa680f8 | 9376 | || rs->dependency->specifier == IA64_RS_PRr |
7484b8e6 TW |
9377 | || rs->dependency->specifier == IA64_RS_PR63) |
9378 | { | |
9379 | if (specs[count].cmp_type != CMP_NONE | |
9380 | && specs[count].cmp_type == rs->cmp_type) | |
9381 | { | |
9382 | if (md.debug_dv) | |
9383 | fprintf (stderr, " %s on parallel compare allowed (PR%d)\n", | |
9384 | dv_mode[rs->dependency->mode], | |
afa680f8 | 9385 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 TW |
9386 | specs[count].index : 63); |
9387 | continue; | |
9388 | } | |
9389 | if (md.debug_dv) | |
4a4f25cf | 9390 | fprintf (stderr, |
7484b8e6 TW |
9391 | " %s on parallel compare conflict %s vs %s on PR%d\n", |
9392 | dv_mode[rs->dependency->mode], | |
4a4f25cf | 9393 | dv_cmp_type[rs->cmp_type], |
7484b8e6 | 9394 | dv_cmp_type[specs[count].cmp_type], |
afa680f8 | 9395 | rs->dependency->specifier != IA64_RS_PR63 ? |
7484b8e6 | 9396 | specs[count].index : 63); |
4a4f25cf | 9397 | |
7484b8e6 TW |
9398 | } |
9399 | ||
800eeca4 | 9400 | /* If either resource is not specific, conservatively assume a conflict |
197865e8 | 9401 | */ |
800eeca4 | 9402 | if (!specs[count].specific || !rs->specific) |
542d6675 | 9403 | return 2; |
800eeca4 | 9404 | else if (specs[count].index == rs->index) |
542d6675 | 9405 | return 1; |
800eeca4 JW |
9406 | } |
9407 | #if 0 | |
9408 | if (md.debug_dv) | |
9409 | fprintf (stderr, " No %s conflicts\n", rs->dependency->name); | |
9410 | #endif | |
9411 | ||
9412 | return 0; | |
9413 | } | |
9414 | ||
9415 | /* Indicate an instruction group break; if INSERT_STOP is non-zero, then | |
9416 | insert a stop to create the break. Update all resource dependencies | |
9417 | appropriately. If QP_REGNO is non-zero, only apply the break to resources | |
9418 | which use the same QP_REGNO and have the link_to_qp_branch flag set. | |
9419 | If SAVE_CURRENT is non-zero, don't affect resources marked by the current | |
542d6675 | 9420 | instruction. */ |
800eeca4 JW |
9421 | |
9422 | static void | |
9423 | insn_group_break (insert_stop, qp_regno, save_current) | |
542d6675 KH |
9424 | int insert_stop; |
9425 | int qp_regno; | |
9426 | int save_current; | |
800eeca4 JW |
9427 | { |
9428 | int i; | |
9429 | ||
9430 | if (insert_stop && md.num_slots_in_use > 0) | |
9431 | PREV_SLOT.end_of_insn_group = 1; | |
9432 | ||
9433 | if (md.debug_dv) | |
9434 | { | |
197865e8 | 9435 | fprintf (stderr, " Insn group break%s", |
542d6675 | 9436 | (insert_stop ? " (w/stop)" : "")); |
800eeca4 | 9437 | if (qp_regno != 0) |
542d6675 | 9438 | fprintf (stderr, " effective for QP=%d", qp_regno); |
800eeca4 JW |
9439 | fprintf (stderr, "\n"); |
9440 | } | |
9441 | ||
9442 | i = 0; | |
9443 | while (i < regdepslen) | |
9444 | { | |
9445 | const struct ia64_dependency *dep = regdeps[i].dependency; | |
9446 | ||
9447 | if (qp_regno != 0 | |
542d6675 KH |
9448 | && regdeps[i].qp_regno != qp_regno) |
9449 | { | |
9450 | ++i; | |
9451 | continue; | |
9452 | } | |
800eeca4 JW |
9453 | |
9454 | if (save_current | |
542d6675 KH |
9455 | && CURR_SLOT.src_file == regdeps[i].file |
9456 | && CURR_SLOT.src_line == regdeps[i].line) | |
9457 | { | |
9458 | ++i; | |
9459 | continue; | |
9460 | } | |
800eeca4 JW |
9461 | |
9462 | /* clear dependencies which are automatically cleared by a stop, or | |
542d6675 | 9463 | those that have reached the appropriate state of insn serialization */ |
800eeca4 | 9464 | if (dep->semantics == IA64_DVS_IMPLIED |
542d6675 KH |
9465 | || dep->semantics == IA64_DVS_IMPLIEDF |
9466 | || regdeps[i].insn_srlz == STATE_SRLZ) | |
9467 | { | |
9468 | print_dependency ("Removing", i); | |
9469 | regdeps[i] = regdeps[--regdepslen]; | |
9470 | } | |
800eeca4 | 9471 | else |
542d6675 KH |
9472 | { |
9473 | if (dep->semantics == IA64_DVS_DATA | |
9474 | || dep->semantics == IA64_DVS_INSTR | |
800eeca4 | 9475 | || dep->semantics == IA64_DVS_SPECIFIC) |
542d6675 KH |
9476 | { |
9477 | if (regdeps[i].insn_srlz == STATE_NONE) | |
9478 | regdeps[i].insn_srlz = STATE_STOP; | |
9479 | if (regdeps[i].data_srlz == STATE_NONE) | |
9480 | regdeps[i].data_srlz = STATE_STOP; | |
9481 | } | |
9482 | ++i; | |
9483 | } | |
800eeca4 JW |
9484 | } |
9485 | } | |
9486 | ||
542d6675 KH |
9487 | /* Add the given resource usage spec to the list of active dependencies. */ |
9488 | ||
197865e8 | 9489 | static void |
800eeca4 | 9490 | mark_resource (idesc, dep, spec, depind, path) |
2434f565 JW |
9491 | struct ia64_opcode *idesc ATTRIBUTE_UNUSED; |
9492 | const struct ia64_dependency *dep ATTRIBUTE_UNUSED; | |
542d6675 KH |
9493 | struct rsrc *spec; |
9494 | int depind; | |
9495 | int path; | |
800eeca4 JW |
9496 | { |
9497 | if (regdepslen == regdepstotlen) | |
9498 | { | |
9499 | regdepstotlen += 20; | |
9500 | regdeps = (struct rsrc *) | |
542d6675 | 9501 | xrealloc ((void *) regdeps, |
bc805888 | 9502 | regdepstotlen * sizeof (struct rsrc)); |
800eeca4 JW |
9503 | } |
9504 | ||
9505 | regdeps[regdepslen] = *spec; | |
9506 | regdeps[regdepslen].depind = depind; | |
9507 | regdeps[regdepslen].path = path; | |
9508 | regdeps[regdepslen].file = CURR_SLOT.src_file; | |
9509 | regdeps[regdepslen].line = CURR_SLOT.src_line; | |
9510 | ||
9511 | print_dependency ("Adding", regdepslen); | |
9512 | ||
9513 | ++regdepslen; | |
9514 | } | |
9515 | ||
9516 | static void | |
9517 | print_dependency (action, depind) | |
542d6675 KH |
9518 | const char *action; |
9519 | int depind; | |
800eeca4 JW |
9520 | { |
9521 | if (md.debug_dv) | |
9522 | { | |
197865e8 | 9523 | fprintf (stderr, " %s %s '%s'", |
542d6675 KH |
9524 | action, dv_mode[(regdeps[depind].dependency)->mode], |
9525 | (regdeps[depind].dependency)->name); | |
800eeca4 | 9526 | if (regdeps[depind].specific && regdeps[depind].index != 0) |
542d6675 | 9527 | fprintf (stderr, " (%d)", regdeps[depind].index); |
800eeca4 | 9528 | if (regdeps[depind].mem_offset.hint) |
2434f565 JW |
9529 | { |
9530 | fputs (" ", stderr); | |
9531 | fprintf_vma (stderr, regdeps[depind].mem_offset.base); | |
9532 | fputs ("+", stderr); | |
9533 | fprintf_vma (stderr, regdeps[depind].mem_offset.offset); | |
9534 | } | |
800eeca4 JW |
9535 | fprintf (stderr, "\n"); |
9536 | } | |
9537 | } | |
9538 | ||
9539 | static void | |
9540 | instruction_serialization () | |
9541 | { | |
9542 | int i; | |
9543 | if (md.debug_dv) | |
9544 | fprintf (stderr, " Instruction serialization\n"); | |
542d6675 | 9545 | for (i = 0; i < regdepslen; i++) |
800eeca4 JW |
9546 | if (regdeps[i].insn_srlz == STATE_STOP) |
9547 | regdeps[i].insn_srlz = STATE_SRLZ; | |
9548 | } | |
9549 | ||
9550 | static void | |
9551 | data_serialization () | |
9552 | { | |
9553 | int i = 0; | |
9554 | if (md.debug_dv) | |
9555 | fprintf (stderr, " Data serialization\n"); | |
9556 | while (i < regdepslen) | |
9557 | { | |
9558 | if (regdeps[i].data_srlz == STATE_STOP | |
542d6675 KH |
9559 | /* Note: as of 991210, all "other" dependencies are cleared by a |
9560 | data serialization. This might change with new tables */ | |
9561 | || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER) | |
9562 | { | |
9563 | print_dependency ("Removing", i); | |
9564 | regdeps[i] = regdeps[--regdepslen]; | |
9565 | } | |
800eeca4 | 9566 | else |
542d6675 | 9567 | ++i; |
800eeca4 JW |
9568 | } |
9569 | } | |
9570 | ||
542d6675 KH |
9571 | /* Insert stops and serializations as needed to avoid DVs. */ |
9572 | ||
800eeca4 JW |
9573 | static void |
9574 | remove_marked_resource (rs) | |
542d6675 | 9575 | struct rsrc *rs; |
800eeca4 JW |
9576 | { |
9577 | switch (rs->dependency->semantics) | |
9578 | { | |
9579 | case IA64_DVS_SPECIFIC: | |
9580 | if (md.debug_dv) | |
9581 | fprintf (stderr, "Implementation-specific, assume worst case...\n"); | |
197865e8 | 9582 | /* ...fall through... */ |
800eeca4 JW |
9583 | case IA64_DVS_INSTR: |
9584 | if (md.debug_dv) | |
542d6675 | 9585 | fprintf (stderr, "Inserting instr serialization\n"); |
800eeca4 | 9586 | if (rs->insn_srlz < STATE_STOP) |
542d6675 | 9587 | insn_group_break (1, 0, 0); |
800eeca4 | 9588 | if (rs->insn_srlz < STATE_SRLZ) |
542d6675 | 9589 | { |
888a75be | 9590 | struct slot oldslot = CURR_SLOT; |
542d6675 | 9591 | /* Manually jam a srlz.i insn into the stream */ |
888a75be | 9592 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
542d6675 KH |
9593 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.i"); |
9594 | instruction_serialization (); | |
9595 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
9596 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
9597 | emit_one_bundle (); | |
888a75be | 9598 | CURR_SLOT = oldslot; |
542d6675 | 9599 | } |
800eeca4 JW |
9600 | insn_group_break (1, 0, 0); |
9601 | break; | |
9602 | case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all | |
542d6675 KH |
9603 | "other" types of DV are eliminated |
9604 | by a data serialization */ | |
800eeca4 JW |
9605 | case IA64_DVS_DATA: |
9606 | if (md.debug_dv) | |
542d6675 | 9607 | fprintf (stderr, "Inserting data serialization\n"); |
800eeca4 | 9608 | if (rs->data_srlz < STATE_STOP) |
542d6675 | 9609 | insn_group_break (1, 0, 0); |
800eeca4 | 9610 | { |
888a75be | 9611 | struct slot oldslot = CURR_SLOT; |
542d6675 | 9612 | /* Manually jam a srlz.d insn into the stream */ |
888a75be | 9613 | memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); |
542d6675 KH |
9614 | CURR_SLOT.idesc = ia64_find_opcode ("srlz.d"); |
9615 | data_serialization (); | |
9616 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
9617 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
9618 | emit_one_bundle (); | |
888a75be | 9619 | CURR_SLOT = oldslot; |
800eeca4 JW |
9620 | } |
9621 | break; | |
9622 | case IA64_DVS_IMPLIED: | |
9623 | case IA64_DVS_IMPLIEDF: | |
9624 | if (md.debug_dv) | |
542d6675 | 9625 | fprintf (stderr, "Inserting stop\n"); |
800eeca4 JW |
9626 | insn_group_break (1, 0, 0); |
9627 | break; | |
9628 | default: | |
9629 | break; | |
9630 | } | |
9631 | } | |
9632 | ||
9633 | /* Check the resources used by the given opcode against the current dependency | |
197865e8 | 9634 | list. |
800eeca4 JW |
9635 | |
9636 | The check is run once for each execution path encountered. In this case, | |
9637 | a unique execution path is the sequence of instructions following a code | |
9638 | entry point, e.g. the following has three execution paths, one starting | |
9639 | at L0, one at L1, and one at L2. | |
197865e8 | 9640 | |
800eeca4 JW |
9641 | L0: nop |
9642 | L1: add | |
9643 | L2: add | |
197865e8 | 9644 | br.ret |
800eeca4 | 9645 | */ |
542d6675 | 9646 | |
800eeca4 JW |
9647 | static void |
9648 | check_dependencies (idesc) | |
542d6675 | 9649 | struct ia64_opcode *idesc; |
800eeca4 JW |
9650 | { |
9651 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
9652 | int path; | |
9653 | int i; | |
9654 | ||
9655 | /* Note that the number of marked resources may change within the | |
197865e8 | 9656 | loop if in auto mode. */ |
800eeca4 JW |
9657 | i = 0; |
9658 | while (i < regdepslen) | |
9659 | { | |
9660 | struct rsrc *rs = ®deps[i]; | |
9661 | const struct ia64_dependency *dep = rs->dependency; | |
9662 | int chkind; | |
9663 | int note; | |
9664 | int start_over = 0; | |
9665 | ||
9666 | if (dep->semantics == IA64_DVS_NONE | |
542d6675 KH |
9667 | || (chkind = depends_on (rs->depind, idesc)) == -1) |
9668 | { | |
9669 | ++i; | |
9670 | continue; | |
9671 | } | |
9672 | ||
9673 | note = NOTE (opdeps->chks[chkind]); | |
9674 | ||
9675 | /* Check this resource against each execution path seen thus far. */ | |
9676 | for (path = 0; path <= md.path; path++) | |
9677 | { | |
9678 | int matchtype; | |
9679 | ||
9680 | /* If the dependency wasn't on the path being checked, ignore it. */ | |
9681 | if (rs->path < path) | |
9682 | continue; | |
9683 | ||
9684 | /* If the QP for this insn implies a QP which has branched, don't | |
9685 | bother checking. Ed. NOTE: I don't think this check is terribly | |
9686 | useful; what's the point of generating code which will only be | |
9687 | reached if its QP is zero? | |
9688 | This code was specifically inserted to handle the following code, | |
9689 | based on notes from Intel's DV checking code, where p1 implies p2. | |
9690 | ||
9691 | mov r4 = 2 | |
9692 | (p2) br.cond L | |
9693 | (p1) mov r4 = 7 | |
9694 | */ | |
9695 | if (CURR_SLOT.qp_regno != 0) | |
9696 | { | |
9697 | int skip = 0; | |
9698 | int implies; | |
9699 | for (implies = 0; implies < qp_implieslen; implies++) | |
9700 | { | |
9701 | if (qp_implies[implies].path >= path | |
9702 | && qp_implies[implies].p1 == CURR_SLOT.qp_regno | |
9703 | && qp_implies[implies].p2_branched) | |
9704 | { | |
9705 | skip = 1; | |
9706 | break; | |
9707 | } | |
9708 | } | |
9709 | if (skip) | |
9710 | continue; | |
9711 | } | |
9712 | ||
9713 | if ((matchtype = resources_match (rs, idesc, note, | |
9714 | CURR_SLOT.qp_regno, path)) != 0) | |
9715 | { | |
9716 | char msg[1024]; | |
9717 | char pathmsg[256] = ""; | |
9718 | char indexmsg[256] = ""; | |
9719 | int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0); | |
9720 | ||
9721 | if (path != 0) | |
9722 | sprintf (pathmsg, " when entry is at label '%s'", | |
9723 | md.entry_labels[path - 1]); | |
9724 | if (rs->specific && rs->index != 0) | |
9725 | sprintf (indexmsg, ", specific resource number is %d", | |
9726 | rs->index); | |
9727 | sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s", | |
9728 | idesc->name, | |
9729 | (certain ? "violates" : "may violate"), | |
9730 | dv_mode[dep->mode], dep->name, | |
9731 | dv_sem[dep->semantics], | |
9732 | pathmsg, indexmsg); | |
9733 | ||
9734 | if (md.explicit_mode) | |
9735 | { | |
9736 | as_warn ("%s", msg); | |
9737 | if (path < md.path) | |
9738 | as_warn (_("Only the first path encountering the conflict " | |
9739 | "is reported")); | |
9740 | as_warn_where (rs->file, rs->line, | |
9741 | _("This is the location of the " | |
9742 | "conflicting usage")); | |
9743 | /* Don't bother checking other paths, to avoid duplicating | |
9744 | the same warning */ | |
9745 | break; | |
9746 | } | |
9747 | else | |
9748 | { | |
9749 | if (md.debug_dv) | |
9750 | fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line); | |
9751 | ||
9752 | remove_marked_resource (rs); | |
9753 | ||
9754 | /* since the set of dependencies has changed, start over */ | |
9755 | /* FIXME -- since we're removing dvs as we go, we | |
9756 | probably don't really need to start over... */ | |
9757 | start_over = 1; | |
9758 | break; | |
9759 | } | |
9760 | } | |
9761 | } | |
800eeca4 | 9762 | if (start_over) |
542d6675 | 9763 | i = 0; |
800eeca4 | 9764 | else |
542d6675 | 9765 | ++i; |
800eeca4 JW |
9766 | } |
9767 | } | |
9768 | ||
542d6675 KH |
9769 | /* Register new dependencies based on the given opcode. */ |
9770 | ||
800eeca4 JW |
9771 | static void |
9772 | mark_resources (idesc) | |
542d6675 | 9773 | struct ia64_opcode *idesc; |
800eeca4 JW |
9774 | { |
9775 | int i; | |
9776 | const struct ia64_opcode_dependency *opdeps = idesc->dependencies; | |
9777 | int add_only_qp_reads = 0; | |
9778 | ||
9779 | /* A conditional branch only uses its resources if it is taken; if it is | |
9780 | taken, we stop following that path. The other branch types effectively | |
9781 | *always* write their resources. If it's not taken, register only QP | |
197865e8 | 9782 | reads. */ |
800eeca4 JW |
9783 | if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc)) |
9784 | { | |
9785 | add_only_qp_reads = 1; | |
9786 | } | |
9787 | ||
9788 | if (md.debug_dv) | |
9789 | fprintf (stderr, "Registering '%s' resource usage\n", idesc->name); | |
9790 | ||
542d6675 | 9791 | for (i = 0; i < opdeps->nregs; i++) |
800eeca4 JW |
9792 | { |
9793 | const struct ia64_dependency *dep; | |
9794 | struct rsrc specs[MAX_SPECS]; | |
9795 | int note; | |
9796 | int path; | |
9797 | int count; | |
197865e8 | 9798 | |
800eeca4 | 9799 | dep = ia64_find_dependency (opdeps->regs[i]); |
542d6675 | 9800 | note = NOTE (opdeps->regs[i]); |
800eeca4 JW |
9801 | |
9802 | if (add_only_qp_reads | |
542d6675 KH |
9803 | && !(dep->mode == IA64_DV_WAR |
9804 | && (dep->specifier == IA64_RS_PR | |
139368c9 | 9805 | || dep->specifier == IA64_RS_PRr |
542d6675 KH |
9806 | || dep->specifier == IA64_RS_PR63))) |
9807 | continue; | |
800eeca4 JW |
9808 | |
9809 | count = specify_resource (dep, idesc, DV_REG, specs, note, md.path); | |
9810 | ||
9811 | #if 0 | |
9812 | if (md.debug_dv && !count) | |
542d6675 KH |
9813 | fprintf (stderr, " No %s %s usage found (path %d)\n", |
9814 | dv_mode[dep->mode], dep->name, md.path); | |
800eeca4 | 9815 | #endif |
197865e8 | 9816 | |
800eeca4 | 9817 | while (count-- > 0) |
542d6675 KH |
9818 | { |
9819 | mark_resource (idesc, dep, &specs[count], | |
9820 | DEP (opdeps->regs[i]), md.path); | |
9821 | } | |
800eeca4 JW |
9822 | |
9823 | /* The execution path may affect register values, which may in turn | |
542d6675 | 9824 | affect which indirect-access resources are accessed. */ |
800eeca4 | 9825 | switch (dep->specifier) |
542d6675 KH |
9826 | { |
9827 | default: | |
9828 | break; | |
9829 | case IA64_RS_CPUID: | |
9830 | case IA64_RS_DBR: | |
9831 | case IA64_RS_IBR: | |
800eeca4 | 9832 | case IA64_RS_MSR: |
542d6675 KH |
9833 | case IA64_RS_PKR: |
9834 | case IA64_RS_PMC: | |
9835 | case IA64_RS_PMD: | |
9836 | case IA64_RS_RR: | |
9837 | for (path = 0; path < md.path; path++) | |
9838 | { | |
9839 | count = specify_resource (dep, idesc, DV_REG, specs, note, path); | |
9840 | while (count-- > 0) | |
9841 | mark_resource (idesc, dep, &specs[count], | |
9842 | DEP (opdeps->regs[i]), path); | |
9843 | } | |
9844 | break; | |
9845 | } | |
9846 | } | |
9847 | } | |
9848 | ||
9849 | /* Remove dependencies when they no longer apply. */ | |
9850 | ||
800eeca4 JW |
9851 | static void |
9852 | update_dependencies (idesc) | |
542d6675 | 9853 | struct ia64_opcode *idesc; |
800eeca4 JW |
9854 | { |
9855 | int i; | |
9856 | ||
9857 | if (strcmp (idesc->name, "srlz.i") == 0) | |
9858 | { | |
9859 | instruction_serialization (); | |
9860 | } | |
9861 | else if (strcmp (idesc->name, "srlz.d") == 0) | |
9862 | { | |
9863 | data_serialization (); | |
9864 | } | |
9865 | else if (is_interruption_or_rfi (idesc) | |
542d6675 | 9866 | || is_taken_branch (idesc)) |
800eeca4 | 9867 | { |
542d6675 KH |
9868 | /* Although technically the taken branch doesn't clear dependencies |
9869 | which require a srlz.[id], we don't follow the branch; the next | |
9870 | instruction is assumed to start with a clean slate. */ | |
800eeca4 | 9871 | regdepslen = 0; |
800eeca4 JW |
9872 | md.path = 0; |
9873 | } | |
9874 | else if (is_conditional_branch (idesc) | |
542d6675 | 9875 | && CURR_SLOT.qp_regno != 0) |
800eeca4 JW |
9876 | { |
9877 | int is_call = strstr (idesc->name, ".call") != NULL; | |
9878 | ||
542d6675 KH |
9879 | for (i = 0; i < qp_implieslen; i++) |
9880 | { | |
9881 | /* If the conditional branch's predicate is implied by the predicate | |
9882 | in an existing dependency, remove that dependency. */ | |
9883 | if (qp_implies[i].p2 == CURR_SLOT.qp_regno) | |
9884 | { | |
9885 | int depind = 0; | |
9886 | /* Note that this implied predicate takes a branch so that if | |
9887 | a later insn generates a DV but its predicate implies this | |
9888 | one, we can avoid the false DV warning. */ | |
9889 | qp_implies[i].p2_branched = 1; | |
9890 | while (depind < regdepslen) | |
9891 | { | |
9892 | if (regdeps[depind].qp_regno == qp_implies[i].p1) | |
9893 | { | |
9894 | print_dependency ("Removing", depind); | |
9895 | regdeps[depind] = regdeps[--regdepslen]; | |
9896 | } | |
9897 | else | |
9898 | ++depind; | |
9899 | } | |
9900 | } | |
9901 | } | |
800eeca4 | 9902 | /* Any marked resources which have this same predicate should be |
542d6675 KH |
9903 | cleared, provided that the QP hasn't been modified between the |
9904 | marking instruction and the branch. */ | |
800eeca4 | 9905 | if (is_call) |
542d6675 KH |
9906 | { |
9907 | insn_group_break (0, CURR_SLOT.qp_regno, 1); | |
9908 | } | |
800eeca4 | 9909 | else |
542d6675 KH |
9910 | { |
9911 | i = 0; | |
9912 | while (i < regdepslen) | |
9913 | { | |
9914 | if (regdeps[i].qp_regno == CURR_SLOT.qp_regno | |
9915 | && regdeps[i].link_to_qp_branch | |
9916 | && (regdeps[i].file != CURR_SLOT.src_file | |
9917 | || regdeps[i].line != CURR_SLOT.src_line)) | |
9918 | { | |
9919 | /* Treat like a taken branch */ | |
9920 | print_dependency ("Removing", i); | |
9921 | regdeps[i] = regdeps[--regdepslen]; | |
9922 | } | |
9923 | else | |
9924 | ++i; | |
9925 | } | |
9926 | } | |
800eeca4 JW |
9927 | } |
9928 | } | |
9929 | ||
9930 | /* Examine the current instruction for dependency violations. */ | |
542d6675 | 9931 | |
800eeca4 JW |
9932 | static int |
9933 | check_dv (idesc) | |
542d6675 | 9934 | struct ia64_opcode *idesc; |
800eeca4 JW |
9935 | { |
9936 | if (md.debug_dv) | |
9937 | { | |
197865e8 | 9938 | fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n", |
542d6675 KH |
9939 | idesc->name, CURR_SLOT.src_line, |
9940 | idesc->dependencies->nchks, | |
9941 | idesc->dependencies->nregs); | |
800eeca4 JW |
9942 | } |
9943 | ||
197865e8 | 9944 | /* Look through the list of currently marked resources; if the current |
800eeca4 | 9945 | instruction has the dependency in its chks list which uses that resource, |
542d6675 | 9946 | check against the specific resources used. */ |
800eeca4 JW |
9947 | check_dependencies (idesc); |
9948 | ||
542d6675 KH |
9949 | /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads), |
9950 | then add them to the list of marked resources. */ | |
800eeca4 JW |
9951 | mark_resources (idesc); |
9952 | ||
9953 | /* There are several types of dependency semantics, and each has its own | |
197865e8 KH |
9954 | requirements for being cleared |
9955 | ||
800eeca4 JW |
9956 | Instruction serialization (insns separated by interruption, rfi, or |
9957 | writer + srlz.i + reader, all in separate groups) clears DVS_INSTR. | |
9958 | ||
9959 | Data serialization (instruction serialization, or writer + srlz.d + | |
9960 | reader, where writer and srlz.d are in separate groups) clears | |
9961 | DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to | |
9962 | always be the case). | |
9963 | ||
9964 | Instruction group break (groups separated by stop, taken branch, | |
9965 | interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF. | |
9966 | */ | |
9967 | update_dependencies (idesc); | |
9968 | ||
9969 | /* Sometimes, knowing a register value allows us to avoid giving a false DV | |
197865e8 | 9970 | warning. Keep track of as many as possible that are useful. */ |
800eeca4 JW |
9971 | note_register_values (idesc); |
9972 | ||
197865e8 | 9973 | /* We don't need or want this anymore. */ |
800eeca4 JW |
9974 | md.mem_offset.hint = 0; |
9975 | ||
9976 | return 0; | |
9977 | } | |
9978 | ||
9979 | /* Translate one line of assembly. Pseudo ops and labels do not show | |
9980 | here. */ | |
9981 | void | |
9982 | md_assemble (str) | |
9983 | char *str; | |
9984 | { | |
9985 | char *saved_input_line_pointer, *mnemonic; | |
9986 | const struct pseudo_opcode *pdesc; | |
9987 | struct ia64_opcode *idesc; | |
9988 | unsigned char qp_regno; | |
9989 | unsigned int flags; | |
9990 | int ch; | |
9991 | ||
9992 | saved_input_line_pointer = input_line_pointer; | |
9993 | input_line_pointer = str; | |
9994 | ||
542d6675 | 9995 | /* extract the opcode (mnemonic): */ |
800eeca4 JW |
9996 | |
9997 | mnemonic = input_line_pointer; | |
9998 | ch = get_symbol_end (); | |
9999 | pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); | |
10000 | if (pdesc) | |
10001 | { | |
10002 | *input_line_pointer = ch; | |
10003 | (*pdesc->handler) (pdesc->arg); | |
10004 | goto done; | |
10005 | } | |
10006 | ||
542d6675 | 10007 | /* Find the instruction descriptor matching the arguments. */ |
800eeca4 JW |
10008 | |
10009 | idesc = ia64_find_opcode (mnemonic); | |
10010 | *input_line_pointer = ch; | |
10011 | if (!idesc) | |
10012 | { | |
10013 | as_bad ("Unknown opcode `%s'", mnemonic); | |
10014 | goto done; | |
10015 | } | |
10016 | ||
10017 | idesc = parse_operands (idesc); | |
10018 | if (!idesc) | |
10019 | goto done; | |
10020 | ||
542d6675 | 10021 | /* Handle the dynamic ops we can handle now: */ |
800eeca4 JW |
10022 | if (idesc->type == IA64_TYPE_DYN) |
10023 | { | |
10024 | if (strcmp (idesc->name, "add") == 0) | |
10025 | { | |
10026 | if (CURR_SLOT.opnd[2].X_op == O_register | |
10027 | && CURR_SLOT.opnd[2].X_add_number < 4) | |
10028 | mnemonic = "addl"; | |
10029 | else | |
10030 | mnemonic = "adds"; | |
3d56ab85 | 10031 | ia64_free_opcode (idesc); |
800eeca4 JW |
10032 | idesc = ia64_find_opcode (mnemonic); |
10033 | #if 0 | |
10034 | know (!idesc->next); | |
10035 | #endif | |
10036 | } | |
10037 | else if (strcmp (idesc->name, "mov") == 0) | |
10038 | { | |
10039 | enum ia64_opnd opnd1, opnd2; | |
10040 | int rop; | |
10041 | ||
10042 | opnd1 = idesc->operands[0]; | |
10043 | opnd2 = idesc->operands[1]; | |
10044 | if (opnd1 == IA64_OPND_AR3) | |
10045 | rop = 0; | |
10046 | else if (opnd2 == IA64_OPND_AR3) | |
10047 | rop = 1; | |
10048 | else | |
10049 | abort (); | |
652ca075 L |
10050 | if (CURR_SLOT.opnd[rop].X_op == O_register) |
10051 | { | |
10052 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10053 | mnemonic = "mov.i"; | |
10054 | else | |
10055 | mnemonic = "mov.m"; | |
10056 | } | |
800eeca4 | 10057 | else |
652ca075 | 10058 | abort (); |
3d56ab85 | 10059 | ia64_free_opcode (idesc); |
800eeca4 JW |
10060 | idesc = ia64_find_opcode (mnemonic); |
10061 | while (idesc != NULL | |
10062 | && (idesc->operands[0] != opnd1 | |
10063 | || idesc->operands[1] != opnd2)) | |
10064 | idesc = get_next_opcode (idesc); | |
10065 | } | |
10066 | } | |
652ca075 L |
10067 | else if (strcmp (idesc->name, "mov.i") == 0 |
10068 | || strcmp (idesc->name, "mov.m") == 0) | |
10069 | { | |
10070 | enum ia64_opnd opnd1, opnd2; | |
10071 | int rop; | |
10072 | ||
10073 | opnd1 = idesc->operands[0]; | |
10074 | opnd2 = idesc->operands[1]; | |
10075 | if (opnd1 == IA64_OPND_AR3) | |
10076 | rop = 0; | |
10077 | else if (opnd2 == IA64_OPND_AR3) | |
10078 | rop = 1; | |
10079 | else | |
10080 | abort (); | |
10081 | if (CURR_SLOT.opnd[rop].X_op == O_register) | |
10082 | { | |
10083 | char unit = 'a'; | |
10084 | if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10085 | unit = 'i'; | |
10086 | else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) | |
10087 | unit = 'm'; | |
10088 | if (unit != 'a' && unit != idesc->name [4]) | |
10089 | as_bad ("AR %d cannot be accessed by %c-unit", | |
10090 | (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR), | |
10091 | TOUPPER (unit)); | |
10092 | } | |
10093 | } | |
800eeca4 JW |
10094 | |
10095 | qp_regno = 0; | |
10096 | if (md.qp.X_op == O_register) | |
f1bcba5b JW |
10097 | { |
10098 | qp_regno = md.qp.X_add_number - REG_P; | |
10099 | md.qp.X_op = O_absent; | |
10100 | } | |
800eeca4 JW |
10101 | |
10102 | flags = idesc->flags; | |
10103 | ||
10104 | if ((flags & IA64_OPCODE_FIRST) != 0) | |
9545c4ce L |
10105 | { |
10106 | /* The alignment frag has to end with a stop bit only if the | |
10107 | next instruction after the alignment directive has to be | |
10108 | the first instruction in an instruction group. */ | |
10109 | if (align_frag) | |
10110 | { | |
10111 | while (align_frag->fr_type != rs_align_code) | |
10112 | { | |
10113 | align_frag = align_frag->fr_next; | |
bae25f19 L |
10114 | if (!align_frag) |
10115 | break; | |
9545c4ce | 10116 | } |
bae25f19 L |
10117 | /* align_frag can be NULL if there are directives in |
10118 | between. */ | |
10119 | if (align_frag && align_frag->fr_next == frag_now) | |
9545c4ce L |
10120 | align_frag->tc_frag_data = 1; |
10121 | } | |
10122 | ||
10123 | insn_group_break (1, 0, 0); | |
10124 | } | |
10125 | align_frag = NULL; | |
800eeca4 JW |
10126 | |
10127 | if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) | |
10128 | { | |
10129 | as_bad ("`%s' cannot be predicated", idesc->name); | |
10130 | goto done; | |
10131 | } | |
10132 | ||
542d6675 | 10133 | /* Build the instruction. */ |
800eeca4 JW |
10134 | CURR_SLOT.qp_regno = qp_regno; |
10135 | CURR_SLOT.idesc = idesc; | |
10136 | as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line); | |
4dc7ead9 | 10137 | dwarf2_where (&CURR_SLOT.debug_line); |
800eeca4 JW |
10138 | |
10139 | /* Add unwind entry, if there is one. */ | |
e0c9811a | 10140 | if (unwind.current_entry) |
800eeca4 | 10141 | { |
e0c9811a JW |
10142 | CURR_SLOT.unwind_record = unwind.current_entry; |
10143 | unwind.current_entry = NULL; | |
800eeca4 JW |
10144 | } |
10145 | ||
542d6675 | 10146 | /* Check for dependency violations. */ |
800eeca4 | 10147 | if (md.detect_dv) |
542d6675 | 10148 | check_dv (idesc); |
800eeca4 JW |
10149 | |
10150 | md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; | |
10151 | if (++md.num_slots_in_use >= NUM_SLOTS) | |
10152 | emit_one_bundle (); | |
10153 | ||
10154 | if ((flags & IA64_OPCODE_LAST) != 0) | |
10155 | insn_group_break (1, 0, 0); | |
10156 | ||
10157 | md.last_text_seg = now_seg; | |
10158 | ||
10159 | done: | |
10160 | input_line_pointer = saved_input_line_pointer; | |
10161 | } | |
10162 | ||
10163 | /* Called when symbol NAME cannot be found in the symbol table. | |
10164 | Should be used for dynamic valued symbols only. */ | |
542d6675 KH |
10165 | |
10166 | symbolS * | |
800eeca4 | 10167 | md_undefined_symbol (name) |
2434f565 | 10168 | char *name ATTRIBUTE_UNUSED; |
800eeca4 JW |
10169 | { |
10170 | return 0; | |
10171 | } | |
10172 | ||
10173 | /* Called for any expression that can not be recognized. When the | |
10174 | function is called, `input_line_pointer' will point to the start of | |
10175 | the expression. */ | |
542d6675 | 10176 | |
800eeca4 JW |
10177 | void |
10178 | md_operand (e) | |
10179 | expressionS *e; | |
10180 | { | |
10181 | enum pseudo_type pseudo_type; | |
e0c9811a | 10182 | const char *name; |
800eeca4 JW |
10183 | size_t len; |
10184 | int ch, i; | |
10185 | ||
10186 | switch (*input_line_pointer) | |
10187 | { | |
10188 | case '@': | |
542d6675 | 10189 | /* Find what relocation pseudo-function we're dealing with. */ |
800eeca4 JW |
10190 | pseudo_type = 0; |
10191 | ch = *++input_line_pointer; | |
10192 | for (i = 0; i < NELEMS (pseudo_func); ++i) | |
10193 | if (pseudo_func[i].name && pseudo_func[i].name[0] == ch) | |
10194 | { | |
10195 | len = strlen (pseudo_func[i].name); | |
10196 | if (strncmp (pseudo_func[i].name + 1, | |
10197 | input_line_pointer + 1, len - 1) == 0 | |
10198 | && !is_part_of_name (input_line_pointer[len])) | |
10199 | { | |
10200 | input_line_pointer += len; | |
10201 | pseudo_type = pseudo_func[i].type; | |
10202 | break; | |
10203 | } | |
10204 | } | |
10205 | switch (pseudo_type) | |
10206 | { | |
10207 | case PSEUDO_FUNC_RELOC: | |
10208 | SKIP_WHITESPACE (); | |
10209 | if (*input_line_pointer != '(') | |
10210 | { | |
10211 | as_bad ("Expected '('"); | |
10212 | goto err; | |
10213 | } | |
542d6675 KH |
10214 | /* Skip '('. */ |
10215 | ++input_line_pointer; | |
800eeca4 JW |
10216 | expression (e); |
10217 | if (*input_line_pointer++ != ')') | |
10218 | { | |
10219 | as_bad ("Missing ')'"); | |
10220 | goto err; | |
10221 | } | |
10222 | if (e->X_op != O_symbol) | |
10223 | { | |
10224 | if (e->X_op != O_pseudo_fixup) | |
10225 | { | |
10226 | as_bad ("Not a symbolic expression"); | |
10227 | goto err; | |
10228 | } | |
13ae64f3 JJ |
10229 | if (i != FUNC_LT_RELATIVE) |
10230 | { | |
10231 | as_bad ("Illegal combination of relocation functions"); | |
10232 | goto err; | |
10233 | } | |
10234 | switch (S_GET_VALUE (e->X_op_symbol)) | |
800eeca4 | 10235 | { |
13ae64f3 JJ |
10236 | case FUNC_FPTR_RELATIVE: |
10237 | i = FUNC_LT_FPTR_RELATIVE; break; | |
10238 | case FUNC_DTP_MODULE: | |
10239 | i = FUNC_LT_DTP_MODULE; break; | |
10240 | case FUNC_DTP_RELATIVE: | |
10241 | i = FUNC_LT_DTP_RELATIVE; break; | |
10242 | case FUNC_TP_RELATIVE: | |
10243 | i = FUNC_LT_TP_RELATIVE; break; | |
10244 | default: | |
800eeca4 JW |
10245 | as_bad ("Illegal combination of relocation functions"); |
10246 | goto err; | |
10247 | } | |
10248 | } | |
542d6675 KH |
10249 | /* Make sure gas doesn't get rid of local symbols that are used |
10250 | in relocs. */ | |
800eeca4 JW |
10251 | e->X_op = O_pseudo_fixup; |
10252 | e->X_op_symbol = pseudo_func[i].u.sym; | |
10253 | break; | |
10254 | ||
10255 | case PSEUDO_FUNC_CONST: | |
10256 | e->X_op = O_constant; | |
10257 | e->X_add_number = pseudo_func[i].u.ival; | |
10258 | break; | |
10259 | ||
e0c9811a JW |
10260 | case PSEUDO_FUNC_REG: |
10261 | e->X_op = O_register; | |
10262 | e->X_add_number = pseudo_func[i].u.ival; | |
10263 | break; | |
10264 | ||
800eeca4 | 10265 | default: |
e0c9811a JW |
10266 | name = input_line_pointer - 1; |
10267 | get_symbol_end (); | |
10268 | as_bad ("Unknown pseudo function `%s'", name); | |
800eeca4 JW |
10269 | goto err; |
10270 | } | |
10271 | break; | |
10272 | ||
10273 | case '[': | |
10274 | ++input_line_pointer; | |
10275 | expression (e); | |
10276 | if (*input_line_pointer != ']') | |
10277 | { | |
10278 | as_bad ("Closing bracket misssing"); | |
10279 | goto err; | |
10280 | } | |
10281 | else | |
10282 | { | |
10283 | if (e->X_op != O_register) | |
10284 | as_bad ("Register expected as index"); | |
10285 | ||
10286 | ++input_line_pointer; | |
10287 | e->X_op = O_index; | |
10288 | } | |
10289 | break; | |
10290 | ||
10291 | default: | |
10292 | break; | |
10293 | } | |
10294 | return; | |
10295 | ||
10296 | err: | |
10297 | ignore_rest_of_line (); | |
10298 | } | |
10299 | ||
10300 | /* Return 1 if it's OK to adjust a reloc by replacing the symbol with | |
10301 | a section symbol plus some offset. For relocs involving @fptr(), | |
10302 | directives we don't want such adjustments since we need to have the | |
10303 | original symbol's name in the reloc. */ | |
10304 | int | |
10305 | ia64_fix_adjustable (fix) | |
10306 | fixS *fix; | |
10307 | { | |
10308 | /* Prevent all adjustments to global symbols */ | |
10309 | if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy)) | |
10310 | return 0; | |
10311 | ||
10312 | switch (fix->fx_r_type) | |
10313 | { | |
10314 | case BFD_RELOC_IA64_FPTR64I: | |
10315 | case BFD_RELOC_IA64_FPTR32MSB: | |
10316 | case BFD_RELOC_IA64_FPTR32LSB: | |
10317 | case BFD_RELOC_IA64_FPTR64MSB: | |
10318 | case BFD_RELOC_IA64_FPTR64LSB: | |
10319 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10320 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10321 | return 0; | |
10322 | default: | |
10323 | break; | |
10324 | } | |
10325 | ||
10326 | return 1; | |
10327 | } | |
10328 | ||
10329 | int | |
10330 | ia64_force_relocation (fix) | |
10331 | fixS *fix; | |
10332 | { | |
10333 | switch (fix->fx_r_type) | |
10334 | { | |
10335 | case BFD_RELOC_IA64_FPTR64I: | |
10336 | case BFD_RELOC_IA64_FPTR32MSB: | |
10337 | case BFD_RELOC_IA64_FPTR32LSB: | |
10338 | case BFD_RELOC_IA64_FPTR64MSB: | |
10339 | case BFD_RELOC_IA64_FPTR64LSB: | |
10340 | ||
10341 | case BFD_RELOC_IA64_LTOFF22: | |
10342 | case BFD_RELOC_IA64_LTOFF64I: | |
10343 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10344 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10345 | case BFD_RELOC_IA64_PLTOFF22: | |
10346 | case BFD_RELOC_IA64_PLTOFF64I: | |
10347 | case BFD_RELOC_IA64_PLTOFF64MSB: | |
10348 | case BFD_RELOC_IA64_PLTOFF64LSB: | |
fa2c7eff RH |
10349 | |
10350 | case BFD_RELOC_IA64_LTOFF22X: | |
10351 | case BFD_RELOC_IA64_LDXMOV: | |
800eeca4 JW |
10352 | return 1; |
10353 | ||
10354 | default: | |
a161fe53 | 10355 | break; |
800eeca4 | 10356 | } |
a161fe53 | 10357 | |
ae6063d4 | 10358 | return generic_force_reloc (fix); |
800eeca4 JW |
10359 | } |
10360 | ||
10361 | /* Decide from what point a pc-relative relocation is relative to, | |
10362 | relative to the pc-relative fixup. Er, relatively speaking. */ | |
10363 | long | |
10364 | ia64_pcrel_from_section (fix, sec) | |
10365 | fixS *fix; | |
10366 | segT sec; | |
10367 | { | |
10368 | unsigned long off = fix->fx_frag->fr_address + fix->fx_where; | |
197865e8 | 10369 | |
800eeca4 JW |
10370 | if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE) |
10371 | off &= ~0xfUL; | |
10372 | ||
10373 | return off; | |
10374 | } | |
10375 | ||
6174d9c8 RH |
10376 | |
10377 | /* Used to emit section-relative relocs for the dwarf2 debug data. */ | |
10378 | void | |
10379 | ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size) | |
10380 | { | |
10381 | expressionS expr; | |
10382 | ||
10383 | expr.X_op = O_pseudo_fixup; | |
10384 | expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym; | |
10385 | expr.X_add_number = 0; | |
10386 | expr.X_add_symbol = symbol; | |
10387 | emit_expr (&expr, size); | |
10388 | } | |
10389 | ||
800eeca4 JW |
10390 | /* This is called whenever some data item (not an instruction) needs a |
10391 | fixup. We pick the right reloc code depending on the byteorder | |
10392 | currently in effect. */ | |
10393 | void | |
10394 | ia64_cons_fix_new (f, where, nbytes, exp) | |
10395 | fragS *f; | |
10396 | int where; | |
10397 | int nbytes; | |
10398 | expressionS *exp; | |
10399 | { | |
10400 | bfd_reloc_code_real_type code; | |
10401 | fixS *fix; | |
10402 | ||
10403 | switch (nbytes) | |
10404 | { | |
10405 | /* There are no reloc for 8 and 16 bit quantities, but we allow | |
10406 | them here since they will work fine as long as the expression | |
10407 | is fully defined at the end of the pass over the source file. */ | |
10408 | case 1: code = BFD_RELOC_8; break; | |
10409 | case 2: code = BFD_RELOC_16; break; | |
10410 | case 4: | |
10411 | if (target_big_endian) | |
10412 | code = BFD_RELOC_IA64_DIR32MSB; | |
10413 | else | |
10414 | code = BFD_RELOC_IA64_DIR32LSB; | |
10415 | break; | |
10416 | ||
10417 | case 8: | |
40449e9f | 10418 | /* In 32-bit mode, data8 could mean function descriptors too. */ |
5f44c186 | 10419 | if (exp->X_op == O_pseudo_fixup |
40449e9f KH |
10420 | && exp->X_op_symbol |
10421 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC | |
10422 | && !(md.flags & EF_IA_64_ABI64)) | |
10423 | { | |
10424 | if (target_big_endian) | |
10425 | code = BFD_RELOC_IA64_IPLTMSB; | |
10426 | else | |
10427 | code = BFD_RELOC_IA64_IPLTLSB; | |
10428 | exp->X_op = O_symbol; | |
10429 | break; | |
10430 | } | |
10431 | else | |
10432 | { | |
10433 | if (target_big_endian) | |
10434 | code = BFD_RELOC_IA64_DIR64MSB; | |
10435 | else | |
10436 | code = BFD_RELOC_IA64_DIR64LSB; | |
10437 | break; | |
10438 | } | |
800eeca4 | 10439 | |
3969b680 RH |
10440 | case 16: |
10441 | if (exp->X_op == O_pseudo_fixup | |
10442 | && exp->X_op_symbol | |
10443 | && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC) | |
10444 | { | |
10445 | if (target_big_endian) | |
10446 | code = BFD_RELOC_IA64_IPLTMSB; | |
10447 | else | |
10448 | code = BFD_RELOC_IA64_IPLTLSB; | |
3969b680 RH |
10449 | exp->X_op = O_symbol; |
10450 | break; | |
10451 | } | |
10452 | /* FALLTHRU */ | |
10453 | ||
800eeca4 JW |
10454 | default: |
10455 | as_bad ("Unsupported fixup size %d", nbytes); | |
10456 | ignore_rest_of_line (); | |
10457 | return; | |
10458 | } | |
6174d9c8 | 10459 | |
800eeca4 JW |
10460 | if (exp->X_op == O_pseudo_fixup) |
10461 | { | |
800eeca4 JW |
10462 | exp->X_op = O_symbol; |
10463 | code = ia64_gen_real_reloc_type (exp->X_op_symbol, code); | |
6174d9c8 | 10464 | /* ??? If code unchanged, unsupported. */ |
800eeca4 | 10465 | } |
3969b680 | 10466 | |
800eeca4 JW |
10467 | fix = fix_new_exp (f, where, nbytes, exp, 0, code); |
10468 | /* We need to store the byte order in effect in case we're going | |
10469 | to fix an 8 or 16 bit relocation (for which there no real | |
94f592af | 10470 | relocs available). See md_apply_fix3(). */ |
800eeca4 JW |
10471 | fix->tc_fix_data.bigendian = target_big_endian; |
10472 | } | |
10473 | ||
10474 | /* Return the actual relocation we wish to associate with the pseudo | |
10475 | reloc described by SYM and R_TYPE. SYM should be one of the | |
197865e8 | 10476 | symbols in the pseudo_func array, or NULL. */ |
800eeca4 JW |
10477 | |
10478 | static bfd_reloc_code_real_type | |
10479 | ia64_gen_real_reloc_type (sym, r_type) | |
10480 | struct symbol *sym; | |
10481 | bfd_reloc_code_real_type r_type; | |
10482 | { | |
10483 | bfd_reloc_code_real_type new = 0; | |
10484 | ||
10485 | if (sym == NULL) | |
10486 | { | |
10487 | return r_type; | |
10488 | } | |
10489 | ||
10490 | switch (S_GET_VALUE (sym)) | |
10491 | { | |
10492 | case FUNC_FPTR_RELATIVE: | |
10493 | switch (r_type) | |
10494 | { | |
10495 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break; | |
10496 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break; | |
10497 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break; | |
10498 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break; | |
10499 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break; | |
10500 | default: break; | |
10501 | } | |
10502 | break; | |
10503 | ||
10504 | case FUNC_GP_RELATIVE: | |
10505 | switch (r_type) | |
10506 | { | |
10507 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break; | |
10508 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break; | |
10509 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break; | |
10510 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break; | |
10511 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break; | |
10512 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break; | |
10513 | default: break; | |
10514 | } | |
10515 | break; | |
10516 | ||
10517 | case FUNC_LT_RELATIVE: | |
10518 | switch (r_type) | |
10519 | { | |
10520 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break; | |
10521 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break; | |
10522 | default: break; | |
10523 | } | |
10524 | break; | |
10525 | ||
fa2c7eff RH |
10526 | case FUNC_LT_RELATIVE_X: |
10527 | switch (r_type) | |
10528 | { | |
10529 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break; | |
10530 | default: break; | |
10531 | } | |
10532 | break; | |
10533 | ||
c67e42c9 RH |
10534 | case FUNC_PC_RELATIVE: |
10535 | switch (r_type) | |
10536 | { | |
10537 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break; | |
10538 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break; | |
10539 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break; | |
10540 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break; | |
10541 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break; | |
10542 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break; | |
10543 | default: break; | |
10544 | } | |
10545 | break; | |
10546 | ||
800eeca4 JW |
10547 | case FUNC_PLT_RELATIVE: |
10548 | switch (r_type) | |
10549 | { | |
10550 | case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break; | |
10551 | case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break; | |
10552 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break; | |
10553 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break; | |
10554 | default: break; | |
10555 | } | |
10556 | break; | |
10557 | ||
10558 | case FUNC_SEC_RELATIVE: | |
10559 | switch (r_type) | |
10560 | { | |
10561 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break; | |
10562 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break; | |
10563 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break; | |
10564 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break; | |
10565 | default: break; | |
10566 | } | |
10567 | break; | |
10568 | ||
10569 | case FUNC_SEG_RELATIVE: | |
10570 | switch (r_type) | |
10571 | { | |
10572 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break; | |
10573 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break; | |
10574 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break; | |
10575 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break; | |
10576 | default: break; | |
10577 | } | |
10578 | break; | |
10579 | ||
10580 | case FUNC_LTV_RELATIVE: | |
10581 | switch (r_type) | |
10582 | { | |
10583 | case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break; | |
10584 | case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break; | |
10585 | case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break; | |
10586 | case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break; | |
10587 | default: break; | |
10588 | } | |
10589 | break; | |
10590 | ||
10591 | case FUNC_LT_FPTR_RELATIVE: | |
10592 | switch (r_type) | |
10593 | { | |
10594 | case BFD_RELOC_IA64_IMM22: | |
10595 | new = BFD_RELOC_IA64_LTOFF_FPTR22; break; | |
10596 | case BFD_RELOC_IA64_IMM64: | |
10597 | new = BFD_RELOC_IA64_LTOFF_FPTR64I; break; | |
10598 | default: | |
10599 | break; | |
10600 | } | |
10601 | break; | |
3969b680 | 10602 | |
13ae64f3 JJ |
10603 | case FUNC_TP_RELATIVE: |
10604 | switch (r_type) | |
10605 | { | |
10606 | case BFD_RELOC_IA64_IMM14: | |
10607 | new = BFD_RELOC_IA64_TPREL14; break; | |
10608 | case BFD_RELOC_IA64_IMM22: | |
10609 | new = BFD_RELOC_IA64_TPREL22; break; | |
10610 | case BFD_RELOC_IA64_IMM64: | |
10611 | new = BFD_RELOC_IA64_TPREL64I; break; | |
10612 | default: | |
10613 | break; | |
10614 | } | |
10615 | break; | |
10616 | ||
10617 | case FUNC_LT_TP_RELATIVE: | |
10618 | switch (r_type) | |
10619 | { | |
10620 | case BFD_RELOC_IA64_IMM22: | |
10621 | new = BFD_RELOC_IA64_LTOFF_TPREL22; break; | |
10622 | default: | |
10623 | break; | |
10624 | } | |
10625 | break; | |
10626 | ||
10627 | case FUNC_LT_DTP_MODULE: | |
10628 | switch (r_type) | |
10629 | { | |
10630 | case BFD_RELOC_IA64_IMM22: | |
10631 | new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break; | |
10632 | default: | |
10633 | break; | |
10634 | } | |
10635 | break; | |
10636 | ||
10637 | case FUNC_DTP_RELATIVE: | |
10638 | switch (r_type) | |
10639 | { | |
6174d9c8 RH |
10640 | case BFD_RELOC_IA64_DIR64MSB: |
10641 | new = BFD_RELOC_IA64_DTPREL64MSB; break; | |
10642 | case BFD_RELOC_IA64_DIR64LSB: | |
10643 | new = BFD_RELOC_IA64_DTPREL64LSB; break; | |
13ae64f3 JJ |
10644 | case BFD_RELOC_IA64_IMM14: |
10645 | new = BFD_RELOC_IA64_DTPREL14; break; | |
10646 | case BFD_RELOC_IA64_IMM22: | |
10647 | new = BFD_RELOC_IA64_DTPREL22; break; | |
10648 | case BFD_RELOC_IA64_IMM64: | |
10649 | new = BFD_RELOC_IA64_DTPREL64I; break; | |
10650 | default: | |
10651 | break; | |
10652 | } | |
10653 | break; | |
10654 | ||
10655 | case FUNC_LT_DTP_RELATIVE: | |
10656 | switch (r_type) | |
10657 | { | |
10658 | case BFD_RELOC_IA64_IMM22: | |
10659 | new = BFD_RELOC_IA64_LTOFF_DTPREL22; break; | |
10660 | default: | |
10661 | break; | |
10662 | } | |
10663 | break; | |
10664 | ||
40449e9f KH |
10665 | case FUNC_IPLT_RELOC: |
10666 | break; | |
1cd8ff38 | 10667 | |
800eeca4 JW |
10668 | default: |
10669 | abort (); | |
10670 | } | |
6174d9c8 | 10671 | |
800eeca4 JW |
10672 | /* Hmmmm. Should this ever occur? */ |
10673 | if (new) | |
10674 | return new; | |
10675 | else | |
10676 | return r_type; | |
10677 | } | |
10678 | ||
10679 | /* Here is where generate the appropriate reloc for pseudo relocation | |
10680 | functions. */ | |
10681 | void | |
10682 | ia64_validate_fix (fix) | |
10683 | fixS *fix; | |
10684 | { | |
10685 | switch (fix->fx_r_type) | |
10686 | { | |
10687 | case BFD_RELOC_IA64_FPTR64I: | |
10688 | case BFD_RELOC_IA64_FPTR32MSB: | |
10689 | case BFD_RELOC_IA64_FPTR64LSB: | |
10690 | case BFD_RELOC_IA64_LTOFF_FPTR22: | |
10691 | case BFD_RELOC_IA64_LTOFF_FPTR64I: | |
10692 | if (fix->fx_offset != 0) | |
10693 | as_bad_where (fix->fx_file, fix->fx_line, | |
10694 | "No addend allowed in @fptr() relocation"); | |
10695 | break; | |
10696 | default: | |
10697 | break; | |
10698 | } | |
800eeca4 JW |
10699 | } |
10700 | ||
10701 | static void | |
10702 | fix_insn (fix, odesc, value) | |
10703 | fixS *fix; | |
10704 | const struct ia64_operand *odesc; | |
10705 | valueT value; | |
10706 | { | |
10707 | bfd_vma insn[3], t0, t1, control_bits; | |
10708 | const char *err; | |
10709 | char *fixpos; | |
10710 | long slot; | |
10711 | ||
10712 | slot = fix->fx_where & 0x3; | |
10713 | fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot); | |
10714 | ||
c67e42c9 | 10715 | /* Bundles are always in little-endian byte order */ |
800eeca4 JW |
10716 | t0 = bfd_getl64 (fixpos); |
10717 | t1 = bfd_getl64 (fixpos + 8); | |
10718 | control_bits = t0 & 0x1f; | |
10719 | insn[0] = (t0 >> 5) & 0x1ffffffffffLL; | |
10720 | insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); | |
10721 | insn[2] = (t1 >> 23) & 0x1ffffffffffLL; | |
10722 | ||
c67e42c9 RH |
10723 | err = NULL; |
10724 | if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) | |
800eeca4 | 10725 | { |
c67e42c9 RH |
10726 | insn[1] = (value >> 22) & 0x1ffffffffffLL; |
10727 | insn[2] |= (((value & 0x7f) << 13) | |
10728 | | (((value >> 7) & 0x1ff) << 27) | |
10729 | | (((value >> 16) & 0x1f) << 22) | |
10730 | | (((value >> 21) & 0x1) << 21) | |
10731 | | (((value >> 63) & 0x1) << 36)); | |
800eeca4 | 10732 | } |
c67e42c9 RH |
10733 | else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) |
10734 | { | |
10735 | if (value & ~0x3fffffffffffffffULL) | |
10736 | err = "integer operand out of range"; | |
10737 | insn[1] = (value >> 21) & 0x1ffffffffffLL; | |
10738 | insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36)); | |
10739 | } | |
10740 | else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) | |
10741 | { | |
10742 | value >>= 4; | |
10743 | insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2; | |
10744 | insn[2] |= ((((value >> 59) & 0x1) << 36) | |
10745 | | (((value >> 0) & 0xfffff) << 13)); | |
10746 | } | |
10747 | else | |
10748 | err = (*odesc->insert) (odesc, value, insn + slot); | |
10749 | ||
10750 | if (err) | |
10751 | as_bad_where (fix->fx_file, fix->fx_line, err); | |
800eeca4 JW |
10752 | |
10753 | t0 = control_bits | (insn[0] << 5) | (insn[1] << 46); | |
10754 | t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); | |
44f5c83a JW |
10755 | number_to_chars_littleendian (fixpos + 0, t0, 8); |
10756 | number_to_chars_littleendian (fixpos + 8, t1, 8); | |
800eeca4 JW |
10757 | } |
10758 | ||
10759 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
10760 | ignored; perhaps it was once meaningful, but now it is historical. | |
10761 | To indicate that a fixup has been eliminated, set FIXP->FX_DONE. | |
10762 | ||
10763 | If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry | |
197865e8 | 10764 | (if possible). */ |
94f592af NC |
10765 | |
10766 | void | |
10767 | md_apply_fix3 (fix, valP, seg) | |
800eeca4 | 10768 | fixS *fix; |
40449e9f | 10769 | valueT *valP; |
2434f565 | 10770 | segT seg ATTRIBUTE_UNUSED; |
800eeca4 JW |
10771 | { |
10772 | char *fixpos; | |
40449e9f | 10773 | valueT value = *valP; |
800eeca4 JW |
10774 | |
10775 | fixpos = fix->fx_frag->fr_literal + fix->fx_where; | |
10776 | ||
10777 | if (fix->fx_pcrel) | |
10778 | { | |
10779 | switch (fix->fx_r_type) | |
10780 | { | |
10781 | case BFD_RELOC_IA64_DIR32MSB: | |
10782 | fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB; | |
800eeca4 JW |
10783 | break; |
10784 | ||
10785 | case BFD_RELOC_IA64_DIR32LSB: | |
10786 | fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB; | |
800eeca4 JW |
10787 | break; |
10788 | ||
10789 | case BFD_RELOC_IA64_DIR64MSB: | |
10790 | fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB; | |
800eeca4 JW |
10791 | break; |
10792 | ||
10793 | case BFD_RELOC_IA64_DIR64LSB: | |
10794 | fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB; | |
800eeca4 JW |
10795 | break; |
10796 | ||
10797 | default: | |
10798 | break; | |
10799 | } | |
10800 | } | |
10801 | if (fix->fx_addsy) | |
10802 | { | |
00f7efb6 | 10803 | switch (fix->fx_r_type) |
800eeca4 | 10804 | { |
00f7efb6 | 10805 | case BFD_RELOC_UNUSED: |
fa1cb89c JW |
10806 | /* This must be a TAG13 or TAG13b operand. There are no external |
10807 | relocs defined for them, so we must give an error. */ | |
800eeca4 JW |
10808 | as_bad_where (fix->fx_file, fix->fx_line, |
10809 | "%s must have a constant value", | |
10810 | elf64_ia64_operands[fix->tc_fix_data.opnd].desc); | |
fa1cb89c | 10811 | fix->fx_done = 1; |
94f592af | 10812 | return; |
00f7efb6 JJ |
10813 | |
10814 | case BFD_RELOC_IA64_TPREL14: | |
10815 | case BFD_RELOC_IA64_TPREL22: | |
10816 | case BFD_RELOC_IA64_TPREL64I: | |
10817 | case BFD_RELOC_IA64_LTOFF_TPREL22: | |
10818 | case BFD_RELOC_IA64_LTOFF_DTPMOD22: | |
10819 | case BFD_RELOC_IA64_DTPREL14: | |
10820 | case BFD_RELOC_IA64_DTPREL22: | |
10821 | case BFD_RELOC_IA64_DTPREL64I: | |
10822 | case BFD_RELOC_IA64_LTOFF_DTPREL22: | |
10823 | S_SET_THREAD_LOCAL (fix->fx_addsy); | |
10824 | break; | |
7925dd68 JJ |
10825 | |
10826 | default: | |
10827 | break; | |
800eeca4 | 10828 | } |
800eeca4 JW |
10829 | } |
10830 | else if (fix->tc_fix_data.opnd == IA64_OPND_NIL) | |
10831 | { | |
10832 | if (fix->tc_fix_data.bigendian) | |
10833 | number_to_chars_bigendian (fixpos, value, fix->fx_size); | |
10834 | else | |
10835 | number_to_chars_littleendian (fixpos, value, fix->fx_size); | |
10836 | fix->fx_done = 1; | |
800eeca4 JW |
10837 | } |
10838 | else | |
10839 | { | |
10840 | fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value); | |
10841 | fix->fx_done = 1; | |
800eeca4 | 10842 | } |
800eeca4 JW |
10843 | } |
10844 | ||
10845 | /* Generate the BFD reloc to be stuck in the object file from the | |
10846 | fixup used internally in the assembler. */ | |
542d6675 KH |
10847 | |
10848 | arelent * | |
800eeca4 | 10849 | tc_gen_reloc (sec, fixp) |
2434f565 | 10850 | asection *sec ATTRIBUTE_UNUSED; |
800eeca4 JW |
10851 | fixS *fixp; |
10852 | { | |
10853 | arelent *reloc; | |
10854 | ||
10855 | reloc = xmalloc (sizeof (*reloc)); | |
10856 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); | |
10857 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
10858 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
10859 | reloc->addend = fixp->fx_offset; | |
10860 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
10861 | ||
10862 | if (!reloc->howto) | |
10863 | { | |
10864 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
10865 | "Cannot represent %s relocation in object file", | |
10866 | bfd_get_reloc_code_name (fixp->fx_r_type)); | |
10867 | } | |
10868 | return reloc; | |
10869 | } | |
10870 | ||
10871 | /* Turn a string in input_line_pointer into a floating point constant | |
bc0d738a NC |
10872 | of type TYPE, and store the appropriate bytes in *LIT. The number |
10873 | of LITTLENUMS emitted is stored in *SIZE. An error message is | |
800eeca4 JW |
10874 | returned, or NULL on OK. */ |
10875 | ||
10876 | #define MAX_LITTLENUMS 5 | |
10877 | ||
542d6675 | 10878 | char * |
800eeca4 JW |
10879 | md_atof (type, lit, size) |
10880 | int type; | |
10881 | char *lit; | |
10882 | int *size; | |
10883 | { | |
10884 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
800eeca4 JW |
10885 | char *t; |
10886 | int prec; | |
10887 | ||
10888 | switch (type) | |
10889 | { | |
10890 | /* IEEE floats */ | |
10891 | case 'f': | |
10892 | case 'F': | |
10893 | case 's': | |
10894 | case 'S': | |
10895 | prec = 2; | |
10896 | break; | |
10897 | ||
10898 | case 'd': | |
10899 | case 'D': | |
10900 | case 'r': | |
10901 | case 'R': | |
10902 | prec = 4; | |
10903 | break; | |
10904 | ||
10905 | case 'x': | |
10906 | case 'X': | |
10907 | case 'p': | |
10908 | case 'P': | |
10909 | prec = 5; | |
10910 | break; | |
10911 | ||
10912 | default: | |
10913 | *size = 0; | |
10914 | return "Bad call to MD_ATOF()"; | |
10915 | } | |
10916 | t = atof_ieee (input_line_pointer, type, words); | |
10917 | if (t) | |
10918 | input_line_pointer = t; | |
800eeca4 | 10919 | |
10a98291 L |
10920 | (*ia64_float_to_chars) (lit, words, prec); |
10921 | ||
165a7f90 L |
10922 | if (type == 'X') |
10923 | { | |
10924 | /* It is 10 byte floating point with 6 byte padding. */ | |
10a98291 | 10925 | memset (&lit [10], 0, 6); |
165a7f90 L |
10926 | *size = 8 * sizeof (LITTLENUM_TYPE); |
10927 | } | |
10a98291 L |
10928 | else |
10929 | *size = prec * sizeof (LITTLENUM_TYPE); | |
10930 | ||
800eeca4 JW |
10931 | return 0; |
10932 | } | |
10933 | ||
800eeca4 JW |
10934 | /* Handle ia64 specific semantics of the align directive. */ |
10935 | ||
0a9ef439 | 10936 | void |
800eeca4 | 10937 | ia64_md_do_align (n, fill, len, max) |
91a2ae2a RH |
10938 | int n ATTRIBUTE_UNUSED; |
10939 | const char *fill ATTRIBUTE_UNUSED; | |
2434f565 | 10940 | int len ATTRIBUTE_UNUSED; |
91a2ae2a | 10941 | int max ATTRIBUTE_UNUSED; |
800eeca4 | 10942 | { |
0a9ef439 | 10943 | if (subseg_text_p (now_seg)) |
800eeca4 | 10944 | ia64_flush_insns (); |
0a9ef439 | 10945 | } |
800eeca4 | 10946 | |
0a9ef439 RH |
10947 | /* This is called from HANDLE_ALIGN in write.c. Fill in the contents |
10948 | of an rs_align_code fragment. */ | |
800eeca4 | 10949 | |
0a9ef439 RH |
10950 | void |
10951 | ia64_handle_align (fragp) | |
10952 | fragS *fragp; | |
10953 | { | |
10954 | /* Use mfi bundle of nops with no stop bits. */ | |
0a9ef439 RH |
10955 | static const unsigned char le_nop[] |
10956 | = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
10957 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00}; | |
9545c4ce L |
10958 | static const unsigned char le_nop_stop[] |
10959 | = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, | |
10960 | 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00}; | |
0a9ef439 RH |
10961 | |
10962 | int bytes; | |
10963 | char *p; | |
9545c4ce | 10964 | const unsigned char *nop; |
0a9ef439 RH |
10965 | |
10966 | if (fragp->fr_type != rs_align_code) | |
10967 | return; | |
10968 | ||
9545c4ce L |
10969 | /* Check if this frag has to end with a stop bit. */ |
10970 | nop = fragp->tc_frag_data ? le_nop_stop : le_nop; | |
10971 | ||
0a9ef439 RH |
10972 | bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; |
10973 | p = fragp->fr_literal + fragp->fr_fix; | |
10974 | ||
d9201763 L |
10975 | /* If no paddings are needed, we check if we need a stop bit. */ |
10976 | if (!bytes && fragp->tc_frag_data) | |
10977 | { | |
10978 | if (fragp->fr_fix < 16) | |
bae25f19 L |
10979 | #if 1 |
10980 | /* FIXME: It won't work with | |
10981 | .align 16 | |
10982 | alloc r32=ar.pfs,1,2,4,0 | |
10983 | */ | |
10984 | ; | |
10985 | #else | |
d9201763 L |
10986 | as_bad_where (fragp->fr_file, fragp->fr_line, |
10987 | _("Can't add stop bit to mark end of instruction group")); | |
bae25f19 | 10988 | #endif |
d9201763 L |
10989 | else |
10990 | /* Bundles are always in little-endian byte order. Make sure | |
10991 | the previous bundle has the stop bit. */ | |
10992 | *(p - 16) |= 1; | |
10993 | } | |
10994 | ||
0a9ef439 RH |
10995 | /* Make sure we are on a 16-byte boundary, in case someone has been |
10996 | putting data into a text section. */ | |
10997 | if (bytes & 15) | |
10998 | { | |
10999 | int fix = bytes & 15; | |
11000 | memset (p, 0, fix); | |
11001 | p += fix; | |
11002 | bytes -= fix; | |
11003 | fragp->fr_fix += fix; | |
800eeca4 JW |
11004 | } |
11005 | ||
012a452b | 11006 | /* Instruction bundles are always little-endian. */ |
9545c4ce | 11007 | memcpy (p, nop, 16); |
0a9ef439 | 11008 | fragp->fr_var = 16; |
800eeca4 | 11009 | } |
10a98291 L |
11010 | |
11011 | static void | |
11012 | ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words, | |
11013 | int prec) | |
11014 | { | |
11015 | while (prec--) | |
11016 | { | |
11017 | number_to_chars_bigendian (lit, (long) (*words++), | |
11018 | sizeof (LITTLENUM_TYPE)); | |
11019 | lit += sizeof (LITTLENUM_TYPE); | |
11020 | } | |
11021 | } | |
11022 | ||
11023 | static void | |
11024 | ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words, | |
11025 | int prec) | |
11026 | { | |
11027 | while (prec--) | |
11028 | { | |
11029 | number_to_chars_littleendian (lit, (long) (words[prec]), | |
11030 | sizeof (LITTLENUM_TYPE)); | |
11031 | lit += sizeof (LITTLENUM_TYPE); | |
11032 | } | |
11033 | } | |
11034 | ||
11035 | void | |
11036 | ia64_elf_section_change_hook (void) | |
11037 | { | |
38ce5b11 L |
11038 | if (elf_section_type (now_seg) == SHT_IA_64_UNWIND |
11039 | && elf_linked_to_section (now_seg) == NULL) | |
11040 | elf_linked_to_section (now_seg) = text_section; | |
10a98291 L |
11041 | dot_byteorder (-1); |
11042 | } | |
a645d1eb L |
11043 | |
11044 | /* Check if a label should be made global. */ | |
11045 | void | |
11046 | ia64_check_label (symbolS *label) | |
11047 | { | |
11048 | if (*input_line_pointer == ':') | |
11049 | { | |
11050 | S_SET_EXTERNAL (label); | |
11051 | input_line_pointer++; | |
11052 | } | |
11053 | } | |
35f5df7f L |
11054 | |
11055 | /* Used to remember where .alias and .secalias directives are seen. We | |
11056 | will rename symbol and section names when we are about to output | |
11057 | the relocatable file. */ | |
11058 | struct alias | |
11059 | { | |
11060 | char *file; /* The file where the directive is seen. */ | |
11061 | unsigned int line; /* The line number the directive is at. */ | |
11062 | const char *name; /* The orignale name of the symbol. */ | |
11063 | }; | |
11064 | ||
11065 | /* Called for .alias and .secalias directives. If SECTION is 1, it is | |
11066 | .secalias. Otherwise, it is .alias. */ | |
11067 | static void | |
11068 | dot_alias (int section) | |
11069 | { | |
11070 | char *name, *alias; | |
11071 | char delim; | |
11072 | char *end_name; | |
11073 | int len; | |
11074 | const char *error_string; | |
11075 | struct alias *h; | |
11076 | const char *a; | |
11077 | struct hash_control *ahash, *nhash; | |
11078 | const char *kind; | |
11079 | ||
11080 | name = input_line_pointer; | |
11081 | delim = get_symbol_end (); | |
11082 | end_name = input_line_pointer; | |
11083 | *end_name = delim; | |
11084 | ||
11085 | if (name == end_name) | |
11086 | { | |
11087 | as_bad (_("expected symbol name")); | |
11088 | discard_rest_of_line (); | |
11089 | return; | |
11090 | } | |
11091 | ||
11092 | SKIP_WHITESPACE (); | |
11093 | ||
11094 | if (*input_line_pointer != ',') | |
11095 | { | |
11096 | *end_name = 0; | |
11097 | as_bad (_("expected comma after \"%s\""), name); | |
11098 | *end_name = delim; | |
11099 | ignore_rest_of_line (); | |
11100 | return; | |
11101 | } | |
11102 | ||
11103 | input_line_pointer++; | |
11104 | *end_name = 0; | |
11105 | ||
11106 | /* We call demand_copy_C_string to check if alias string is valid. | |
11107 | There should be a closing `"' and no `\0' in the string. */ | |
11108 | alias = demand_copy_C_string (&len); | |
11109 | if (alias == NULL) | |
11110 | { | |
11111 | ignore_rest_of_line (); | |
11112 | return; | |
11113 | } | |
11114 | ||
11115 | /* Make a copy of name string. */ | |
11116 | len = strlen (name) + 1; | |
11117 | obstack_grow (¬es, name, len); | |
11118 | name = obstack_finish (¬es); | |
11119 | ||
11120 | if (section) | |
11121 | { | |
11122 | kind = "section"; | |
11123 | ahash = secalias_hash; | |
11124 | nhash = secalias_name_hash; | |
11125 | } | |
11126 | else | |
11127 | { | |
11128 | kind = "symbol"; | |
11129 | ahash = alias_hash; | |
11130 | nhash = alias_name_hash; | |
11131 | } | |
11132 | ||
11133 | /* Check if alias has been used before. */ | |
11134 | h = (struct alias *) hash_find (ahash, alias); | |
11135 | if (h) | |
11136 | { | |
11137 | if (strcmp (h->name, name)) | |
11138 | as_bad (_("`%s' is already the alias of %s `%s'"), | |
11139 | alias, kind, h->name); | |
11140 | goto out; | |
11141 | } | |
11142 | ||
11143 | /* Check if name already has an alias. */ | |
11144 | a = (const char *) hash_find (nhash, name); | |
11145 | if (a) | |
11146 | { | |
11147 | if (strcmp (a, alias)) | |
11148 | as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a); | |
11149 | goto out; | |
11150 | } | |
11151 | ||
11152 | h = (struct alias *) xmalloc (sizeof (struct alias)); | |
11153 | as_where (&h->file, &h->line); | |
11154 | h->name = name; | |
11155 | ||
11156 | error_string = hash_jam (ahash, alias, (PTR) h); | |
11157 | if (error_string) | |
11158 | { | |
11159 | as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"), | |
11160 | alias, kind, error_string); | |
11161 | goto out; | |
11162 | } | |
11163 | ||
11164 | error_string = hash_jam (nhash, name, (PTR) alias); | |
11165 | if (error_string) | |
11166 | { | |
11167 | as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"), | |
11168 | alias, kind, error_string); | |
11169 | out: | |
11170 | obstack_free (¬es, name); | |
11171 | obstack_free (¬es, alias); | |
11172 | } | |
11173 | ||
11174 | demand_empty_rest_of_line (); | |
11175 | } | |
11176 | ||
11177 | /* It renames the original symbol name to its alias. */ | |
11178 | static void | |
11179 | do_alias (const char *alias, PTR value) | |
11180 | { | |
11181 | struct alias *h = (struct alias *) value; | |
11182 | symbolS *sym = symbol_find (h->name); | |
11183 | ||
11184 | if (sym == NULL) | |
11185 | as_warn_where (h->file, h->line, | |
11186 | _("symbol `%s' aliased to `%s' is not used"), | |
11187 | h->name, alias); | |
11188 | else | |
11189 | S_SET_NAME (sym, (char *) alias); | |
11190 | } | |
11191 | ||
11192 | /* Called from write_object_file. */ | |
11193 | void | |
11194 | ia64_adjust_symtab (void) | |
11195 | { | |
11196 | hash_traverse (alias_hash, do_alias); | |
11197 | } | |
11198 | ||
11199 | /* It renames the original section name to its alias. */ | |
11200 | static void | |
11201 | do_secalias (const char *alias, PTR value) | |
11202 | { | |
11203 | struct alias *h = (struct alias *) value; | |
11204 | segT sec = bfd_get_section_by_name (stdoutput, h->name); | |
11205 | ||
11206 | if (sec == NULL) | |
11207 | as_warn_where (h->file, h->line, | |
11208 | _("section `%s' aliased to `%s' is not used"), | |
11209 | h->name, alias); | |
11210 | else | |
11211 | sec->name = alias; | |
11212 | } | |
11213 | ||
11214 | /* Called from write_object_file. */ | |
11215 | void | |
11216 | ia64_frob_file (void) | |
11217 | { | |
11218 | hash_traverse (secalias_hash, do_secalias); | |
11219 | } |