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[deliverable/binutils-gdb.git] / gas / config / tc-ia64.c
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800eeca4 1/* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
d6afba4b
JJ		 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
800eeca4
JW		 4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23/*
24 TODO:
25
26 - optional operands
27 - directives:
800eeca4
JW		 28 .eb
29 .estate
30 .lb
31 .popsection
32 .previous
33 .psr
34 .pushsection
800eeca4
JW		 35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
37 - DV-related stuff:
542d6675
KH		 38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
41 notes)
800eeca4
JW		 42
43 */
44
45#include "as.h"
3882b010 46#include "safe-ctype.h"
800eeca4
JW		 47#include "dwarf2dbg.h"
48#include "subsegs.h"
49
50#include "opcode/ia64.h"
51
52#include "elf/ia64.h"
53
54#define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
55#define MIN(a,b) ((a) < (b) ? (a) : (b))
56
57#define NUM_SLOTS 4
58#define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
59#define CURR_SLOT md.slot[md.curr_slot]
60
61#define O_pseudo_fixup (O_max + 1)
62
63enum special_section
64 {
557debba 65 /* IA-64 ABI section pseudo-ops. */
800eeca4
JW		 66 SPECIAL_SECTION_BSS = 0,
67 SPECIAL_SECTION_SBSS,
68 SPECIAL_SECTION_SDATA,
69 SPECIAL_SECTION_RODATA,
70 SPECIAL_SECTION_COMMENT,
71 SPECIAL_SECTION_UNWIND,
557debba
JW		 72 SPECIAL_SECTION_UNWIND_INFO,
73 /* HPUX specific section pseudo-ops. */
74 SPECIAL_SECTION_INIT_ARRAY,
75 SPECIAL_SECTION_FINI_ARRAY,
800eeca4
JW		 76 };
77
78enum reloc_func
79 {
13ae64f3
JJ		 80 FUNC_DTP_MODULE,
81 FUNC_DTP_RELATIVE,
800eeca4
JW		 82 FUNC_FPTR_RELATIVE,
83 FUNC_GP_RELATIVE,
84 FUNC_LT_RELATIVE,
fa2c7eff 85 FUNC_LT_RELATIVE_X,
c67e42c9 86 FUNC_PC_RELATIVE,
800eeca4
JW		 87 FUNC_PLT_RELATIVE,
88 FUNC_SEC_RELATIVE,
89 FUNC_SEG_RELATIVE,
13ae64f3 90 FUNC_TP_RELATIVE,
800eeca4
JW		 91 FUNC_LTV_RELATIVE,
92 FUNC_LT_FPTR_RELATIVE,
13ae64f3
JJ		 93 FUNC_LT_DTP_MODULE,
94 FUNC_LT_DTP_RELATIVE,
95 FUNC_LT_TP_RELATIVE,
3969b680 96 FUNC_IPLT_RELOC,
800eeca4
JW		 97 };
98
99enum reg_symbol
100 {
101 REG_GR = 0,
102 REG_FR = (REG_GR + 128),
103 REG_AR = (REG_FR + 128),
104 REG_CR = (REG_AR + 128),
105 REG_P = (REG_CR + 128),
106 REG_BR = (REG_P + 64),
107 REG_IP = (REG_BR + 8),
108 REG_CFM,
109 REG_PR,
110 REG_PR_ROT,
111 REG_PSR,
112 REG_PSR_L,
113 REG_PSR_UM,
114 /* The following are pseudo-registers for use by gas only. */
115 IND_CPUID,
116 IND_DBR,
117 IND_DTR,
118 IND_ITR,
119 IND_IBR,
120 IND_MEM,
121 IND_MSR,
122 IND_PKR,
123 IND_PMC,
124 IND_PMD,
125 IND_RR,
542d6675 126 /* The following pseudo-registers are used for unwind directives only: */
e0c9811a
JW		 127 REG_PSP,
128 REG_PRIUNAT,
800eeca4
JW		 129 REG_NUM
130 };
131
132enum dynreg_type
133 {
134 DYNREG_GR = 0, /* dynamic general purpose register */
135 DYNREG_FR, /* dynamic floating point register */
136 DYNREG_PR, /* dynamic predicate register */
137 DYNREG_NUM_TYPES
138 };
139
87f8eb97
JW		 140enum operand_match_result
141 {
142 OPERAND_MATCH,
143 OPERAND_OUT_OF_RANGE,
144 OPERAND_MISMATCH
145 };
146
800eeca4
JW		 147/* On the ia64, we can't know the address of a text label until the
148 instructions are packed into a bundle. To handle this, we keep
149 track of the list of labels that appear in front of each
150 instruction. */
151struct label_fix
542d6675
KH		 152{
153 struct label_fix *next;
154 struct symbol *sym;
155};
800eeca4 156
549f748d 157/* This is the endianness of the current section. */
800eeca4
JW		 158extern int target_big_endian;
159
549f748d
JW		 160/* This is the default endianness. */
161static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
162
10a98291
L		 163void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
164
165static void ia64_float_to_chars_bigendian
166 PARAMS ((char *, LITTLENUM_TYPE *, int));
167static void ia64_float_to_chars_littleendian
168 PARAMS ((char *, LITTLENUM_TYPE *, int));
169static void (*ia64_float_to_chars)
170 PARAMS ((char *, LITTLENUM_TYPE *, int));
171
35f5df7f
L		 172static struct hash_control *alias_hash;
173static struct hash_control *alias_name_hash;
174static struct hash_control *secalias_hash;
175static struct hash_control *secalias_name_hash;
176
800eeca4
JW		 177/* Characters which always start a comment. */
178const char comment_chars[] = "";
179
180/* Characters which start a comment at the beginning of a line. */
181const char line_comment_chars[] = "#";
182
183/* Characters which may be used to separate multiple commands on a
184 single line. */
185const char line_separator_chars[] = ";";
186
187/* Characters which are used to indicate an exponent in a floating
188 point number. */
189const char EXP_CHARS[] = "eE";
190
191/* Characters which mean that a number is a floating point constant,
192 as in 0d1.0. */
193const char FLT_CHARS[] = "rRsSfFdDxXpP";
194
542d6675 195/* ia64-specific option processing: */
800eeca4 196
44f5c83a 197const char *md_shortopts = "m:N:x::";
800eeca4
JW		 198
199struct option md_longopts[] =
200 {
c43c2cc5
JW		 201#define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
202 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
203#define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
204 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
800eeca4
JW		 205 };
206
207size_t md_longopts_size = sizeof (md_longopts);
208
209static struct
210 {
211 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
212 struct hash_control *reg_hash; /* register name hash table */
213 struct hash_control *dynreg_hash; /* dynamic register hash table */
214 struct hash_control *const_hash; /* constant hash table */
215 struct hash_control *entry_hash; /* code entry hint hash table */
216
217 symbolS *regsym[REG_NUM];
218
219 /* If X_op is != O_absent, the registername for the instruction's
220 qualifying predicate. If NULL, p0 is assumed for instructions
221 that are predicatable. */
222 expressionS qp;
223
224 unsigned int
197865e8 225 manual_bundling : 1,
800eeca4
JW		 226 debug_dv: 1,
227 detect_dv: 1,
228 explicit_mode : 1, /* which mode we're in */
229 default_explicit_mode : 1, /* which mode is the default */
230 mode_explicitly_set : 1, /* was the current mode explicitly set? */
4d5a53ff
JW		 231 auto_align : 1,
232 keep_pending_output : 1;
800eeca4
JW		 233
234 /* Each bundle consists of up to three instructions. We keep
235 track of four most recent instructions so we can correctly set
197865e8 236 the end_of_insn_group for the last instruction in a bundle. */
800eeca4
JW		 237 int curr_slot;
238 int num_slots_in_use;
239 struct slot
240 {
241 unsigned int
242 end_of_insn_group : 1,
243 manual_bundling_on : 1,
196e8040
JW		 244 manual_bundling_off : 1,
245 loc_directive_seen : 1;
800eeca4
JW		 246 signed char user_template; /* user-selected template, if any */
247 unsigned char qp_regno; /* qualifying predicate */
248 /* This duplicates a good fraction of "struct fix" but we
249 can't use a "struct fix" instead since we can't call
250 fix_new_exp() until we know the address of the instruction. */
251 int num_fixups;
252 struct insn_fix
253 {
254 bfd_reloc_code_real_type code;
255 enum ia64_opnd opnd; /* type of operand in need of fix */
256 unsigned int is_pcrel : 1; /* is operand pc-relative? */
257 expressionS expr; /* the value to be inserted */
258 }
259 fixup[2]; /* at most two fixups per insn */
260 struct ia64_opcode *idesc;
261 struct label_fix *label_fixups;
f1bcba5b 262 struct label_fix *tag_fixups;
800eeca4
JW		 263 struct unw_rec_list *unwind_record; /* Unwind directive. */
264 expressionS opnd[6];
265 char *src_file;
266 unsigned int src_line;
267 struct dwarf2_line_info debug_line;
268 }
269 slot[NUM_SLOTS];
270
271 segT last_text_seg;
272
273 struct dynreg
274 {
275 struct dynreg *next; /* next dynamic register */
276 const char *name;
277 unsigned short base; /* the base register number */
278 unsigned short num_regs; /* # of registers in this set */
279 }
280 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
281
282 flagword flags; /* ELF-header flags */
283
284 struct mem_offset {
285 unsigned hint:1; /* is this hint currently valid? */
286 bfd_vma offset; /* mem.offset offset */
287 bfd_vma base; /* mem.offset base */
288 } mem_offset;
289
290 int path; /* number of alt. entry points seen */
291 const char **entry_labels; /* labels of all alternate paths in
542d6675 292 the current DV-checking block. */
800eeca4 293 int maxpaths; /* size currently allocated for
542d6675 294 entry_labels */
88be23ec
BS		 295 /* Support for hardware errata workarounds. */
296
297 /* Record data about the last three insn groups. */
298 struct group
299 {
300 /* B-step workaround.
301 For each predicate register, this is set if the corresponding insn
302 group conditionally sets this register with one of the affected
303 instructions. */
304 int p_reg_set[64];
305 /* B-step workaround.
306 For each general register, this is set if the corresponding insn
307 a) is conditional one one of the predicate registers for which
308 P_REG_SET is 1 in the corresponding entry of the previous group,
309 b) sets this general register with one of the affected
310 instructions. */
311 int g_reg_set_conditionally[128];
312 } last_groups[3];
313 int group_idx;
557debba
JW		 314
315 int pointer_size; /* size in bytes of a pointer */
316 int pointer_size_shift; /* shift size of a pointer for alignment */
800eeca4
JW		 317 }
318md;
319
542d6675 320/* application registers: */
800eeca4 321
e0c9811a
JW		 322#define AR_K0 0
323#define AR_K7 7
324#define AR_RSC 16
325#define AR_BSP 17
326#define AR_BSPSTORE 18
327#define AR_RNAT 19
328#define AR_UNAT 36
329#define AR_FPSR 40
330#define AR_ITC 44
331#define AR_PFS 64
332#define AR_LC 65
800eeca4
JW		 333
334static const struct
335 {
336 const char *name;
337 int regnum;
338 }
339ar[] =
340 {
341 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
342 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
343 {"ar.rsc", 16}, {"ar.bsp", 17},
344 {"ar.bspstore", 18}, {"ar.rnat", 19},
345 {"ar.fcr", 21}, {"ar.eflag", 24},
346 {"ar.csd", 25}, {"ar.ssd", 26},
347 {"ar.cflg", 27}, {"ar.fsr", 28},
348 {"ar.fir", 29}, {"ar.fdr", 30},
349 {"ar.ccv", 32}, {"ar.unat", 36},
350 {"ar.fpsr", 40}, {"ar.itc", 44},
351 {"ar.pfs", 64}, {"ar.lc", 65},
197865e8 352 {"ar.ec", 66},
800eeca4
JW		 353 };
354
355#define CR_IPSR 16
356#define CR_ISR 17
357#define CR_IIP 19
358#define CR_IFA 20
359#define CR_ITIR 21
360#define CR_IIPA 22
361#define CR_IFS 23
362#define CR_IIM 24
363#define CR_IHA 25
364#define CR_IVR 65
365#define CR_TPR 66
366#define CR_EOI 67
367#define CR_IRR0 68
368#define CR_IRR3 71
369#define CR_LRR0 80
370#define CR_LRR1 81
371
542d6675 372/* control registers: */
800eeca4
JW		 373static const struct
374 {
375 const char *name;
376 int regnum;
377 }
378cr[] =
379 {
380 {"cr.dcr", 0},
381 {"cr.itm", 1},
382 {"cr.iva", 2},
383 {"cr.pta", 8},
384 {"cr.gpta", 9},
385 {"cr.ipsr", 16},
386 {"cr.isr", 17},
387 {"cr.iip", 19},
388 {"cr.ifa", 20},
389 {"cr.itir", 21},
390 {"cr.iipa", 22},
391 {"cr.ifs", 23},
392 {"cr.iim", 24},
393 {"cr.iha", 25},
394 {"cr.lid", 64},
395 {"cr.ivr", 65},
396 {"cr.tpr", 66},
397 {"cr.eoi", 67},
398 {"cr.irr0", 68},
399 {"cr.irr1", 69},
400 {"cr.irr2", 70},
401 {"cr.irr3", 71},
402 {"cr.itv", 72},
403 {"cr.pmv", 73},
404 {"cr.cmcv", 74},
405 {"cr.lrr0", 80},
406 {"cr.lrr1", 81}
407 };
408
409#define PSR_MFL 4
410#define PSR_IC 13
411#define PSR_DFL 18
412#define PSR_CPL 32
413
414static const struct const_desc
415 {
416 const char *name;
417 valueT value;
418 }
419const_bits[] =
420 {
542d6675 421 /* PSR constant masks: */
800eeca4
JW		 422
423 /* 0: reserved */
424 {"psr.be", ((valueT) 1) << 1},
425 {"psr.up", ((valueT) 1) << 2},
426 {"psr.ac", ((valueT) 1) << 3},
427 {"psr.mfl", ((valueT) 1) << 4},
428 {"psr.mfh", ((valueT) 1) << 5},
429 /* 6-12: reserved */
430 {"psr.ic", ((valueT) 1) << 13},
431 {"psr.i", ((valueT) 1) << 14},
432 {"psr.pk", ((valueT) 1) << 15},
433 /* 16: reserved */
434 {"psr.dt", ((valueT) 1) << 17},
435 {"psr.dfl", ((valueT) 1) << 18},
436 {"psr.dfh", ((valueT) 1) << 19},
437 {"psr.sp", ((valueT) 1) << 20},
438 {"psr.pp", ((valueT) 1) << 21},
439 {"psr.di", ((valueT) 1) << 22},
440 {"psr.si", ((valueT) 1) << 23},
441 {"psr.db", ((valueT) 1) << 24},
442 {"psr.lp", ((valueT) 1) << 25},
443 {"psr.tb", ((valueT) 1) << 26},
444 {"psr.rt", ((valueT) 1) << 27},
445 /* 28-31: reserved */
446 /* 32-33: cpl (current privilege level) */
447 {"psr.is", ((valueT) 1) << 34},
448 {"psr.mc", ((valueT) 1) << 35},
449 {"psr.it", ((valueT) 1) << 36},
450 {"psr.id", ((valueT) 1) << 37},
451 {"psr.da", ((valueT) 1) << 38},
452 {"psr.dd", ((valueT) 1) << 39},
453 {"psr.ss", ((valueT) 1) << 40},
454 /* 41-42: ri (restart instruction) */
455 {"psr.ed", ((valueT) 1) << 43},
456 {"psr.bn", ((valueT) 1) << 44},
457 };
458
542d6675 459/* indirect register-sets/memory: */
800eeca4
JW		 460
461static const struct
462 {
463 const char *name;
464 int regnum;
465 }
466indirect_reg[] =
467 {
468 { "CPUID", IND_CPUID },
469 { "cpuid", IND_CPUID },
470 { "dbr", IND_DBR },
471 { "dtr", IND_DTR },
472 { "itr", IND_ITR },
473 { "ibr", IND_IBR },
474 { "msr", IND_MSR },
475 { "pkr", IND_PKR },
476 { "pmc", IND_PMC },
477 { "pmd", IND_PMD },
478 { "rr", IND_RR },
479 };
480
481/* Pseudo functions used to indicate relocation types (these functions
482 start with an at sign (@). */
483static struct
484 {
485 const char *name;
486 enum pseudo_type
487 {
488 PSEUDO_FUNC_NONE,
489 PSEUDO_FUNC_RELOC,
490 PSEUDO_FUNC_CONST,
e0c9811a 491 PSEUDO_FUNC_REG,
800eeca4
JW		 492 PSEUDO_FUNC_FLOAT
493 }
494 type;
495 union
496 {
497 unsigned long ival;
498 symbolS *sym;
499 }
500 u;
501 }
502pseudo_func[] =
503 {
542d6675 504 /* reloc pseudo functions (these must come first!): */
13ae64f3
JJ		 505 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
506 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 507 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
508 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
509 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
fa2c7eff 510 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 511 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
512 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
513 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
514 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
13ae64f3 515 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
2434f565
JW		 516 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
517 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
13ae64f3
JJ		 518 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
519 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
520 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
3969b680 521 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
800eeca4 522
542d6675 523 /* mbtype4 constants: */
800eeca4
JW		 524 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
525 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
526 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
527 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
528 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
529
542d6675 530 /* fclass constants: */
bf3ca999 531 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
800eeca4
JW		 532 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
533 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
534 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
535 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
536 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
537 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
538 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
539 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
bf3ca999
TW		 540
541 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
e0c9811a 542
c10d9d8f
JW		 543 /* hint constants: */
544 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
545
542d6675 546 /* unwind-related constants: */
041340ad
JW		 547 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
548 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
549 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
550 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
551 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
552 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
553 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
e0c9811a 554
542d6675 555 /* unwind-related registers: */
e0c9811a 556 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
800eeca4
JW		 557 };
558
542d6675 559/* 41-bit nop opcodes (one per unit): */
800eeca4
JW		 560static const bfd_vma nop[IA64_NUM_UNITS] =
561 {
562 0x0000000000LL, /* NIL => break 0 */
563 0x0008000000LL, /* I-unit nop */
564 0x0008000000LL, /* M-unit nop */
565 0x4000000000LL, /* B-unit nop */
566 0x0008000000LL, /* F-unit nop */
567 0x0008000000LL, /* L-"unit" nop */
568 0x0008000000LL, /* X-unit nop */
569 };
570
571/* Can't be `const' as it's passed to input routines (which have the
572 habit of setting temporary sentinels. */
573static char special_section_name[][20] =
574 {
575 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
557debba
JW		 576 {".IA_64.unwind"}, {".IA_64.unwind_info"},
577 {".init_array"}, {".fini_array"}
800eeca4
JW		 578 };
579
580/* The best template for a particular sequence of up to three
581 instructions: */
582#define N IA64_NUM_TYPES
583static unsigned char best_template[N][N][N];
584#undef N
585
586/* Resource dependencies currently in effect */
587static struct rsrc {
588 int depind; /* dependency index */
589 const struct ia64_dependency *dependency; /* actual dependency */
590 unsigned specific:1, /* is this a specific bit/regno? */
591 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
592 int index; /* specific regno/bit within dependency */
593 int note; /* optional qualifying note (0 if none) */
594#define STATE_NONE 0
595#define STATE_STOP 1
596#define STATE_SRLZ 2
597 int insn_srlz; /* current insn serialization state */
598 int data_srlz; /* current data serialization state */
599 int qp_regno; /* qualifying predicate for this usage */
600 char *file; /* what file marked this dependency */
2434f565 601 unsigned int line; /* what line marked this dependency */
800eeca4 602 struct mem_offset mem_offset; /* optional memory offset hint */
7484b8e6 603 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
800eeca4
JW		 604 int path; /* corresponding code entry index */
605} *regdeps = NULL;
606static int regdepslen = 0;
607static int regdepstotlen = 0;
608static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
609static const char *dv_sem[] = { "none", "implied", "impliedf",
139368c9 610 "data", "instr", "specific", "stop", "other" };
7484b8e6 611static const char *dv_cmp_type[] = { "none", "OR", "AND" };
800eeca4
JW		 612
613/* Current state of PR mutexation */
614static struct qpmutex {
615 valueT prmask;
616 int path;
617} *qp_mutexes = NULL; /* QP mutex bitmasks */
618static int qp_mutexeslen = 0;
619static int qp_mutexestotlen = 0;
197865e8 620static valueT qp_safe_across_calls = 0;
800eeca4
JW		 621
622/* Current state of PR implications */
623static struct qp_imply {
624 unsigned p1:6;
625 unsigned p2:6;
626 unsigned p2_branched:1;
627 int path;
628} *qp_implies = NULL;
629static int qp_implieslen = 0;
630static int qp_impliestotlen = 0;
631
197865e8
KH		 632/* Keep track of static GR values so that indirect register usage can
633 sometimes be tracked. */
800eeca4
JW		 634static struct gr {
635 unsigned known:1;
636 int path;
637 valueT value;
2434f565 638} gr_values[128] = {{ 1, 0, 0 }};
800eeca4 639
9545c4ce
L		 640/* Remember the alignment frag. */
641static fragS *align_frag;
642
800eeca4
JW		 643/* These are the routines required to output the various types of
644 unwind records. */
645
f5a30c2e
JW		 646/* A slot_number is a frag address plus the slot index (0-2). We use the
647 frag address here so that if there is a section switch in the middle of
648 a function, then instructions emitted to a different section are not
649 counted. Since there may be more than one frag for a function, this
650 means we also need to keep track of which frag this address belongs to
651 so we can compute inter-frag distances. This also nicely solves the
652 problem with nops emitted for align directives, which can't easily be
653 counted, but can easily be derived from frag sizes. */
654
800eeca4
JW		 655typedef struct unw_rec_list {
656 unwind_record r;
e0c9811a 657 unsigned long slot_number;
f5a30c2e 658 fragS *slot_frag;
73f20958
L		 659 unsigned long next_slot_number;
660 fragS *next_slot_frag;
800eeca4
JW		 661 struct unw_rec_list *next;
662} unw_rec_list;
663
2434f565 664#define SLOT_NUM_NOT_SET (unsigned)-1
800eeca4 665
6290819d
NC		 666/* Linked list of saved prologue counts. A very poor
667 implementation of a map from label numbers to prologue counts. */
668typedef struct label_prologue_count
669{
670 struct label_prologue_count *next;
671 unsigned long label_number;
672 unsigned int prologue_count;
673} label_prologue_count;
674
e0c9811a
JW		 675static struct
676{
e0c9811a
JW		 677 /* Maintain a list of unwind entries for the current function. */
678 unw_rec_list *list;
679 unw_rec_list *tail;
800eeca4 680
e0c9811a
JW		 681 /* Any unwind entires that should be attached to the current slot
682 that an insn is being constructed for. */
683 unw_rec_list *current_entry;
800eeca4 684
e0c9811a
JW		 685 /* These are used to create the unwind table entry for this function. */
686 symbolS *proc_start;
687 symbolS *proc_end;
688 symbolS *info; /* pointer to unwind info */
689 symbolS *personality_routine;
91a2ae2a
RH		 690 segT saved_text_seg;
691 subsegT saved_text_subseg;
692 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
800eeca4 693
e0c9811a
JW		 694 /* TRUE if processing unwind directives in a prologue region. */
695 int prologue;
30d25259 696 int prologue_mask;
33d01f33 697 unsigned int prologue_count; /* number of .prologues seen so far */
6290819d
NC		 698 /* Prologue counts at previous .label_state directives. */
699 struct label_prologue_count * saved_prologue_counts;
e0c9811a 700} unwind;
800eeca4 701
9f9a069e
JW		 702/* The input value is a negated offset from psp, and specifies an address
703 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
704 must add 16 and divide by 4 to get the encoded value. */
705
706#define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
707
800eeca4
JW		 708typedef void (*vbyte_func) PARAMS ((int, char *, char *));
709
0234cb7c 710/* Forward declarations: */
800eeca4
JW		 711static void set_section PARAMS ((char *name));
712static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
713 unsigned int, unsigned int));
d9201763 714static void dot_align (int);
800eeca4
JW		 715static void dot_radix PARAMS ((int));
716static void dot_special_section PARAMS ((int));
717static void dot_proc PARAMS ((int));
718static void dot_fframe PARAMS ((int));
719static void dot_vframe PARAMS ((int));
150f24a2
JW		 720static void dot_vframesp PARAMS ((int));
721static void dot_vframepsp PARAMS ((int));
800eeca4
JW		 722static void dot_save PARAMS ((int));
723static void dot_restore PARAMS ((int));
150f24a2
JW		 724static void dot_restorereg PARAMS ((int));
725static void dot_restorereg_p PARAMS ((int));
800eeca4
JW		 726static void dot_handlerdata PARAMS ((int));
727static void dot_unwentry PARAMS ((int));
728static void dot_altrp PARAMS ((int));
e0c9811a 729static void dot_savemem PARAMS ((int));
800eeca4
JW		 730static void dot_saveg PARAMS ((int));
731static void dot_savef PARAMS ((int));
732static void dot_saveb PARAMS ((int));
733static void dot_savegf PARAMS ((int));
734static void dot_spill PARAMS ((int));
150f24a2
JW		 735static void dot_spillreg PARAMS ((int));
736static void dot_spillmem PARAMS ((int));
737static void dot_spillreg_p PARAMS ((int));
738static void dot_spillmem_p PARAMS ((int));
739static void dot_label_state PARAMS ((int));
740static void dot_copy_state PARAMS ((int));
800eeca4
JW		 741static void dot_unwabi PARAMS ((int));
742static void dot_personality PARAMS ((int));
743static void dot_body PARAMS ((int));
744static void dot_prologue PARAMS ((int));
745static void dot_endp PARAMS ((int));
746static void dot_template PARAMS ((int));
747static void dot_regstk PARAMS ((int));
748static void dot_rot PARAMS ((int));
749static void dot_byteorder PARAMS ((int));
750static void dot_psr PARAMS ((int));
751static void dot_alias PARAMS ((int));
752static void dot_ln PARAMS ((int));
753static char *parse_section_name PARAMS ((void));
754static void dot_xdata PARAMS ((int));
755static void stmt_float_cons PARAMS ((int));
756static void stmt_cons_ua PARAMS ((int));
757static void dot_xfloat_cons PARAMS ((int));
758static void dot_xstringer PARAMS ((int));
759static void dot_xdata_ua PARAMS ((int));
760static void dot_xfloat_cons_ua PARAMS ((int));
150f24a2 761static void print_prmask PARAMS ((valueT mask));
800eeca4
JW		 762static void dot_pred_rel PARAMS ((int));
763static void dot_reg_val PARAMS ((int));
5e819f9c 764static void dot_serialize PARAMS ((int));
800eeca4
JW		 765static void dot_dv_mode PARAMS ((int));
766static void dot_entry PARAMS ((int));
767static void dot_mem_offset PARAMS ((int));
e0c9811a 768static void add_unwind_entry PARAMS((unw_rec_list *ptr));
542d6675 769static symbolS *declare_register PARAMS ((const char *name, int regnum));
800eeca4
JW		 770static void declare_register_set PARAMS ((const char *, int, int));
771static unsigned int operand_width PARAMS ((enum ia64_opnd));
87f8eb97
JW		 772static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
773 int index,
774 expressionS *e));
800eeca4
JW		 775static int parse_operand PARAMS ((expressionS *e));
776static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
86cf98f3 777static int errata_nop_necessary_p PARAMS ((struct slot *, enum ia64_unit));
800eeca4
JW		 778static void build_insn PARAMS ((struct slot *, bfd_vma *));
779static void emit_one_bundle PARAMS ((void));
780static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
197865e8 781static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
800eeca4
JW		 782 bfd_reloc_code_real_type r_type));
783static void insn_group_break PARAMS ((int, int, int));
150f24a2
JW		 784static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
785 struct rsrc *, int depind, int path));
800eeca4
JW		 786static void add_qp_mutex PARAMS((valueT mask));
787static void add_qp_imply PARAMS((int p1, int p2));
788static void clear_qp_branch_flag PARAMS((valueT mask));
789static void clear_qp_mutex PARAMS((valueT mask));
790static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
cb5301b6 791static int has_suffix_p PARAMS((const char *, const char *));
800eeca4
JW		 792static void clear_register_values PARAMS ((void));
793static void print_dependency PARAMS ((const char *action, int depind));
150f24a2
JW		 794static void instruction_serialization PARAMS ((void));
795static void data_serialization PARAMS ((void));
796static void remove_marked_resource PARAMS ((struct rsrc *));
800eeca4 797static int is_conditional_branch PARAMS ((struct ia64_opcode *));
150f24a2 798static int is_taken_branch PARAMS ((struct ia64_opcode *));
800eeca4 799static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
150f24a2
JW		 800static int depends_on PARAMS ((int, struct ia64_opcode *));
801static int specify_resource PARAMS ((const struct ia64_dependency *,
802 struct ia64_opcode *, int, struct rsrc [], int, int));
800eeca4
JW		 803static int check_dv PARAMS((struct ia64_opcode *idesc));
804static void check_dependencies PARAMS((struct ia64_opcode *));
805static void mark_resources PARAMS((struct ia64_opcode *));
806static void update_dependencies PARAMS((struct ia64_opcode *));
807static void note_register_values PARAMS((struct ia64_opcode *));
150f24a2
JW		 808static int qp_mutex PARAMS ((int, int, int));
809static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
810static void output_vbyte_mem PARAMS ((int, char *, char *));
811static void count_output PARAMS ((int, char *, char *));
812static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
813static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
800eeca4 814static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 815static void output_P1_format PARAMS ((vbyte_func, int));
816static void output_P2_format PARAMS ((vbyte_func, int, int));
817static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
818static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
819static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
820static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
821static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
822static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
823static void output_P9_format PARAMS ((vbyte_func, int, int));
824static void output_P10_format PARAMS ((vbyte_func, int, int));
825static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
826static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
800eeca4
JW		 827static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
828static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
150f24a2
JW		 829static char format_ab_reg PARAMS ((int, int));
830static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
831 unsigned long));
832static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
833static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
834 unsigned long));
835static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
5738bc24 836static unw_rec_list *output_endp PARAMS ((void));
150f24a2
JW		 837static unw_rec_list *output_prologue PARAMS ((void));
838static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
839static unw_rec_list *output_body PARAMS ((void));
840static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
841static unw_rec_list *output_mem_stack_v PARAMS ((void));
842static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
843static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
844static unw_rec_list *output_rp_when PARAMS ((void));
845static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
846static unw_rec_list *output_rp_br PARAMS ((unsigned int));
847static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
848static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
849static unw_rec_list *output_pfs_when PARAMS ((void));
850static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
851static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
852static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
853static unw_rec_list *output_preds_when PARAMS ((void));
854static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
855static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
856static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
857static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
858static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
859static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
860static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
861static unw_rec_list *output_br_mem PARAMS ((unsigned int));
862static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
863static unw_rec_list *output_spill_base PARAMS ((unsigned int));
864static unw_rec_list *output_unat_when PARAMS ((void));
865static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
866static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
867static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
868static unw_rec_list *output_lc_when PARAMS ((void));
869static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
870static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
871static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
872static unw_rec_list *output_fpsr_when PARAMS ((void));
873static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
874static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
875static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
876static unw_rec_list *output_priunat_when_gr PARAMS ((void));
877static unw_rec_list *output_priunat_when_mem PARAMS ((void));
878static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
879static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
880static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
881static unw_rec_list *output_bsp_when PARAMS ((void));
882static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
883static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
884static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
885static unw_rec_list *output_bspstore_when PARAMS ((void));
886static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
887static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
888static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
889static unw_rec_list *output_rnat_when PARAMS ((void));
890static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
891static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
892static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
893static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
894static unw_rec_list *output_epilogue PARAMS ((unsigned long));
895static unw_rec_list *output_label_state PARAMS ((unsigned long));
896static unw_rec_list *output_copy_state PARAMS ((unsigned long));
897static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
898static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
899static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
900 unsigned int));
901static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
902 unsigned int));
903static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
904 unsigned int));
905static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
906 unsigned int, unsigned int));
907static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
908static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
909static int calc_record_size PARAMS ((unw_rec_list *));
910static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
f5a30c2e 911static unsigned long slot_index PARAMS ((unsigned long, fragS *,
b5e0fabd
JW		 912 unsigned long, fragS *,
913 int));
91a2ae2a 914static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
b5e0fabd 915static void fixup_unw_records PARAMS ((unw_rec_list *, int));
150f24a2
JW		 916static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
917static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
6290819d
NC		 918static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
919static void save_prologue_count PARAMS ((unsigned long, unsigned int));
920static void free_saved_prologue_counts PARAMS ((void));
91a2ae2a 921
652ca075 922/* Determine if application register REGNUM resides only in the integer
800eeca4
JW		 923 unit (as opposed to the memory unit). */
924static int
652ca075 925ar_is_only_in_integer_unit (int reg)
800eeca4
JW		 926{
927 reg -= REG_AR;
652ca075
L		 928 return reg >= 64 && reg <= 111;
929}
800eeca4 930
652ca075
L		 931/* Determine if application register REGNUM resides only in the memory
932 unit (as opposed to the integer unit). */
933static int
934ar_is_only_in_memory_unit (int reg)
935{
936 reg -= REG_AR;
937 return reg >= 0 && reg <= 47;
800eeca4
JW		 938}
939
940/* Switch to section NAME and create section if necessary. It's
941 rather ugly that we have to manipulate input_line_pointer but I
942 don't see any other way to accomplish the same thing without
943 changing obj-elf.c (which may be the Right Thing, in the end). */
944static void
945set_section (name)
946 char *name;
947{
948 char *saved_input_line_pointer;
949
950 saved_input_line_pointer = input_line_pointer;
951 input_line_pointer = name;
952 obj_elf_section (0);
953 input_line_pointer = saved_input_line_pointer;
954}
955
d61a78a7
RH		 956/* Map 's' to SHF_IA_64_SHORT. */
957
958int
959ia64_elf_section_letter (letter, ptr_msg)
960 int letter;
961 char **ptr_msg;
962{
963 if (letter == 's')
964 return SHF_IA_64_SHORT;
711ef82f
L		 965 else if (letter == 'o')
966 return SHF_LINK_ORDER;
d61a78a7 967
711ef82f
L		 968 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
969 return -1;
d61a78a7
RH		 970}
971
800eeca4
JW		 972/* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
973
974flagword
975ia64_elf_section_flags (flags, attr, type)
976 flagword flags;
2434f565 977 int attr, type ATTRIBUTE_UNUSED;
800eeca4
JW		 978{
979 if (attr & SHF_IA_64_SHORT)
980 flags |= SEC_SMALL_DATA;
981 return flags;
982}
983
91a2ae2a
RH		 984int
985ia64_elf_section_type (str, len)
40449e9f
KH		 986 const char *str;
987 size_t len;
91a2ae2a 988{
1cd8ff38 989#define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
40449e9f 990
1cd8ff38 991 if (STREQ (ELF_STRING_ia64_unwind_info))
91a2ae2a
RH		 992 return SHT_PROGBITS;
993
1cd8ff38 994 if (STREQ (ELF_STRING_ia64_unwind_info_once))
579f31ac
JJ		 995 return SHT_PROGBITS;
996
1cd8ff38 997 if (STREQ (ELF_STRING_ia64_unwind))
91a2ae2a
RH		 998 return SHT_IA_64_UNWIND;
999
1cd8ff38 1000 if (STREQ (ELF_STRING_ia64_unwind_once))
579f31ac
JJ		 1001 return SHT_IA_64_UNWIND;
1002
711ef82f
L		 1003 if (STREQ ("unwind"))
1004 return SHT_IA_64_UNWIND;
1005
91a2ae2a 1006 return -1;
1cd8ff38 1007#undef STREQ
91a2ae2a
RH		 1008}
1009
800eeca4
JW		 1010static unsigned int
1011set_regstack (ins, locs, outs, rots)
1012 unsigned int ins, locs, outs, rots;
1013{
542d6675
KH		 1014 /* Size of frame. */
1015 unsigned int sof;
800eeca4
JW		 1016
1017 sof = ins + locs + outs;
1018 if (sof > 96)
1019 {
1020 as_bad ("Size of frame exceeds maximum of 96 registers");
1021 return 0;
1022 }
1023 if (rots > sof)
1024 {
1025 as_warn ("Size of rotating registers exceeds frame size");
1026 return 0;
1027 }
1028 md.in.base = REG_GR + 32;
1029 md.loc.base = md.in.base + ins;
1030 md.out.base = md.loc.base + locs;
1031
1032 md.in.num_regs = ins;
1033 md.loc.num_regs = locs;
1034 md.out.num_regs = outs;
1035 md.rot.num_regs = rots;
1036 return sof;
1037}
1038
1039void
1040ia64_flush_insns ()
1041{
1042 struct label_fix *lfix;
1043 segT saved_seg;
1044 subsegT saved_subseg;
b44b1b85 1045 unw_rec_list *ptr;
800eeca4
JW		 1046
1047 if (!md.last_text_seg)
1048 return;
1049
1050 saved_seg = now_seg;
1051 saved_subseg = now_subseg;
1052
1053 subseg_set (md.last_text_seg, 0);
1054
1055 while (md.num_slots_in_use > 0)
1056 emit_one_bundle (); /* force out queued instructions */
1057
1058 /* In case there are labels following the last instruction, resolve
542d6675 1059 those now: */
800eeca4
JW		 1060 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1061 {
1062 S_SET_VALUE (lfix->sym, frag_now_fix ());
1063 symbol_set_frag (lfix->sym, frag_now);
1064 }
1065 CURR_SLOT.label_fixups = 0;
f1bcba5b
JW		 1066 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1067 {
1068 S_SET_VALUE (lfix->sym, frag_now_fix ());
1069 symbol_set_frag (lfix->sym, frag_now);
1070 }
1071 CURR_SLOT.tag_fixups = 0;
800eeca4 1072
b44b1b85 1073 /* In case there are unwind directives following the last instruction,
5738bc24
JW		 1074 resolve those now. We only handle prologue, body, and endp directives
1075 here. Give an error for others. */
b44b1b85
JW		 1076 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1077 {
9c59842f 1078 switch (ptr->r.type)
b44b1b85 1079 {
9c59842f
JW		 1080 case prologue:
1081 case prologue_gr:
1082 case body:
1083 case endp:
b44b1b85
JW		 1084 ptr->slot_number = (unsigned long) frag_more (0);
1085 ptr->slot_frag = frag_now;
9c59842f
JW		 1086 break;
1087
1088 /* Allow any record which doesn't have a "t" field (i.e.,
1089 doesn't relate to a particular instruction). */
1090 case unwabi:
1091 case br_gr:
1092 case copy_state:
1093 case fr_mem:
1094 case frgr_mem:
1095 case gr_gr:
1096 case gr_mem:
1097 case label_state:
1098 case rp_br:
1099 case spill_base:
1100 case spill_mask:
1101 /* nothing */
1102 break;
1103
1104 default:
1105 as_bad (_("Unwind directive not followed by an instruction."));
1106 break;
b44b1b85 1107 }
b44b1b85
JW		 1108 }
1109 unwind.current_entry = NULL;
1110
800eeca4 1111 subseg_set (saved_seg, saved_subseg);
f1bcba5b
JW		 1112
1113 if (md.qp.X_op == O_register)
1114 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 1115}
1116
d9201763
L		 1117static void
1118ia64_do_align (int nbytes)
800eeca4
JW		 1119{
1120 char *saved_input_line_pointer = input_line_pointer;
1121
1122 input_line_pointer = "";
1123 s_align_bytes (nbytes);
1124 input_line_pointer = saved_input_line_pointer;
1125}
1126
1127void
1128ia64_cons_align (nbytes)
1129 int nbytes;
1130{
1131 if (md.auto_align)
1132 {
1133 char *saved_input_line_pointer = input_line_pointer;
1134 input_line_pointer = "";
1135 s_align_bytes (nbytes);
1136 input_line_pointer = saved_input_line_pointer;
1137 }
1138}
1139
1140/* Output COUNT bytes to a memory location. */
1141static unsigned char *vbyte_mem_ptr = NULL;
1142
197865e8 1143void
800eeca4
JW		 1144output_vbyte_mem (count, ptr, comment)
1145 int count;
1146 char *ptr;
2434f565 1147 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1148{
1149 int x;
1150 if (vbyte_mem_ptr == NULL)
1151 abort ();
1152
1153 if (count == 0)
1154 return;
1155 for (x = 0; x < count; x++)
1156 *(vbyte_mem_ptr++) = ptr[x];
1157}
1158
1159/* Count the number of bytes required for records. */
1160static int vbyte_count = 0;
197865e8 1161void
800eeca4
JW		 1162count_output (count, ptr, comment)
1163 int count;
2434f565
JW		 1164 char *ptr ATTRIBUTE_UNUSED;
1165 char *comment ATTRIBUTE_UNUSED;
800eeca4
JW		 1166{
1167 vbyte_count += count;
1168}
1169
1170static void
1171output_R1_format (f, rtype, rlen)
1172 vbyte_func f;
1173 unw_record_type rtype;
1174 int rlen;
1175{
e0c9811a 1176 int r = 0;
800eeca4
JW		 1177 char byte;
1178 if (rlen > 0x1f)
1179 {
1180 output_R3_format (f, rtype, rlen);
1181 return;
1182 }
197865e8 1183
e0c9811a
JW		 1184 if (rtype == body)
1185 r = 1;
1186 else if (rtype != prologue)
1187 as_bad ("record type is not valid");
1188
800eeca4
JW		 1189 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1190 (*f) (1, &byte, NULL);
1191}
1192
1193static void
1194output_R2_format (f, mask, grsave, rlen)
1195 vbyte_func f;
1196 int mask, grsave;
1197 unsigned long rlen;
1198{
1199 char bytes[20];
1200 int count = 2;
1201 mask = (mask & 0x0f);
1202 grsave = (grsave & 0x7f);
1203
1204 bytes[0] = (UNW_R2 | (mask >> 1));
1205 bytes[1] = (((mask & 0x01) << 7) | grsave);
1206 count += output_leb128 (bytes + 2, rlen, 0);
1207 (*f) (count, bytes, NULL);
1208}
1209
1210static void
1211output_R3_format (f, rtype, rlen)
1212 vbyte_func f;
1213 unw_record_type rtype;
1214 unsigned long rlen;
1215{
e0c9811a 1216 int r = 0, count;
800eeca4
JW		 1217 char bytes[20];
1218 if (rlen <= 0x1f)
1219 {
1220 output_R1_format (f, rtype, rlen);
1221 return;
1222 }
197865e8 1223
e0c9811a
JW		 1224 if (rtype == body)
1225 r = 1;
1226 else if (rtype != prologue)
1227 as_bad ("record type is not valid");
800eeca4
JW		 1228 bytes[0] = (UNW_R3 | r);
1229 count = output_leb128 (bytes + 1, rlen, 0);
1230 (*f) (count + 1, bytes, NULL);
1231}
1232
1233static void
1234output_P1_format (f, brmask)
1235 vbyte_func f;
1236 int brmask;
1237{
1238 char byte;
1239 byte = UNW_P1 | (brmask & 0x1f);
1240 (*f) (1, &byte, NULL);
1241}
1242
1243static void
1244output_P2_format (f, brmask, gr)
1245 vbyte_func f;
1246 int brmask;
1247 int gr;
1248{
1249 char bytes[2];
1250 brmask = (brmask & 0x1f);
1251 bytes[0] = UNW_P2 | (brmask >> 1);
1252 bytes[1] = (((brmask & 1) << 7) | gr);
1253 (*f) (2, bytes, NULL);
1254}
1255
1256static void
1257output_P3_format (f, rtype, reg)
1258 vbyte_func f;
1259 unw_record_type rtype;
1260 int reg;
1261{
1262 char bytes[2];
e0c9811a 1263 int r = 0;
800eeca4
JW		 1264 reg = (reg & 0x7f);
1265 switch (rtype)
542d6675 1266 {
800eeca4
JW		 1267 case psp_gr:
1268 r = 0;
1269 break;
1270 case rp_gr:
1271 r = 1;
1272 break;
1273 case pfs_gr:
1274 r = 2;
1275 break;
1276 case preds_gr:
1277 r = 3;
1278 break;
1279 case unat_gr:
1280 r = 4;
1281 break;
1282 case lc_gr:
1283 r = 5;
1284 break;
1285 case rp_br:
1286 r = 6;
1287 break;
1288 case rnat_gr:
1289 r = 7;
1290 break;
1291 case bsp_gr:
1292 r = 8;
1293 break;
1294 case bspstore_gr:
1295 r = 9;
1296 break;
1297 case fpsr_gr:
1298 r = 10;
1299 break;
1300 case priunat_gr:
1301 r = 11;
1302 break;
1303 default:
1304 as_bad ("Invalid record type for P3 format.");
542d6675 1305 }
800eeca4
JW		 1306 bytes[0] = (UNW_P3 | (r >> 1));
1307 bytes[1] = (((r & 1) << 7) | reg);
1308 (*f) (2, bytes, NULL);
1309}
1310
800eeca4 1311static void
e0c9811a 1312output_P4_format (f, imask, imask_size)
800eeca4 1313 vbyte_func f;
e0c9811a
JW		 1314 unsigned char *imask;
1315 unsigned long imask_size;
800eeca4 1316{
e0c9811a
JW		 1317 imask[0] = UNW_P4;
1318 (*f) (imask_size, imask, NULL);
800eeca4
JW		 1319}
1320
1321static void
1322output_P5_format (f, grmask, frmask)
1323 vbyte_func f;
1324 int grmask;
1325 unsigned long frmask;
1326{
1327 char bytes[4];
1328 grmask = (grmask & 0x0f);
1329
1330 bytes[0] = UNW_P5;
1331 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1332 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1333 bytes[3] = (frmask & 0x000000ff);
1334 (*f) (4, bytes, NULL);
1335}
1336
1337static void
1338output_P6_format (f, rtype, rmask)
1339 vbyte_func f;
1340 unw_record_type rtype;
1341 int rmask;
1342{
1343 char byte;
e0c9811a 1344 int r = 0;
197865e8 1345
e0c9811a
JW		 1346 if (rtype == gr_mem)
1347 r = 1;
1348 else if (rtype != fr_mem)
1349 as_bad ("Invalid record type for format P6");
800eeca4
JW		 1350 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1351 (*f) (1, &byte, NULL);
1352}
1353
1354static void
1355output_P7_format (f, rtype, w1, w2)
1356 vbyte_func f;
1357 unw_record_type rtype;
1358 unsigned long w1;
1359 unsigned long w2;
1360{
1361 char bytes[20];
1362 int count = 1;
e0c9811a 1363 int r = 0;
800eeca4
JW		 1364 count += output_leb128 (bytes + 1, w1, 0);
1365 switch (rtype)
1366 {
542d6675
KH		 1367 case mem_stack_f:
1368 r = 0;
1369 count += output_leb128 (bytes + count, w2 >> 4, 0);
1370 break;
1371 case mem_stack_v:
1372 r = 1;
1373 break;
1374 case spill_base:
1375 r = 2;
1376 break;
1377 case psp_sprel:
1378 r = 3;
1379 break;
1380 case rp_when:
1381 r = 4;
1382 break;
1383 case rp_psprel:
1384 r = 5;
1385 break;
1386 case pfs_when:
1387 r = 6;
1388 break;
1389 case pfs_psprel:
1390 r = 7;
1391 break;
1392 case preds_when:
1393 r = 8;
1394 break;
1395 case preds_psprel:
1396 r = 9;
1397 break;
1398 case lc_when:
1399 r = 10;
1400 break;
1401 case lc_psprel:
1402 r = 11;
1403 break;
1404 case unat_when:
1405 r = 12;
1406 break;
1407 case unat_psprel:
1408 r = 13;
1409 break;
1410 case fpsr_when:
1411 r = 14;
1412 break;
1413 case fpsr_psprel:
1414 r = 15;
1415 break;
1416 default:
1417 break;
800eeca4
JW		 1418 }
1419 bytes[0] = (UNW_P7 | r);
1420 (*f) (count, bytes, NULL);
1421}
1422
1423static void
1424output_P8_format (f, rtype, t)
1425 vbyte_func f;
1426 unw_record_type rtype;
1427 unsigned long t;
1428{
1429 char bytes[20];
e0c9811a 1430 int r = 0;
800eeca4
JW		 1431 int count = 2;
1432 bytes[0] = UNW_P8;
1433 switch (rtype)
1434 {
542d6675
KH		 1435 case rp_sprel:
1436 r = 1;
1437 break;
1438 case pfs_sprel:
1439 r = 2;
1440 break;
1441 case preds_sprel:
1442 r = 3;
1443 break;
1444 case lc_sprel:
1445 r = 4;
1446 break;
1447 case unat_sprel:
1448 r = 5;
1449 break;
1450 case fpsr_sprel:
1451 r = 6;
1452 break;
1453 case bsp_when:
1454 r = 7;
1455 break;
1456 case bsp_psprel:
1457 r = 8;
1458 break;
1459 case bsp_sprel:
1460 r = 9;
1461 break;
1462 case bspstore_when:
1463 r = 10;
1464 break;
1465 case bspstore_psprel:
1466 r = 11;
1467 break;
1468 case bspstore_sprel:
1469 r = 12;
1470 break;
1471 case rnat_when:
1472 r = 13;
1473 break;
1474 case rnat_psprel:
1475 r = 14;
1476 break;
1477 case rnat_sprel:
1478 r = 15;
1479 break;
1480 case priunat_when_gr:
1481 r = 16;
1482 break;
1483 case priunat_psprel:
1484 r = 17;
1485 break;
1486 case priunat_sprel:
1487 r = 18;
1488 break;
1489 case priunat_when_mem:
1490 r = 19;
1491 break;
1492 default:
1493 break;
800eeca4
JW		 1494 }
1495 bytes[1] = r;
1496 count += output_leb128 (bytes + 2, t, 0);
1497 (*f) (count, bytes, NULL);
1498}
1499
1500static void
1501output_P9_format (f, grmask, gr)
1502 vbyte_func f;
1503 int grmask;
1504 int gr;
1505{
1506 char bytes[3];
1507 bytes[0] = UNW_P9;
1508 bytes[1] = (grmask & 0x0f);
1509 bytes[2] = (gr & 0x7f);
1510 (*f) (3, bytes, NULL);
1511}
1512
1513static void
1514output_P10_format (f, abi, context)
1515 vbyte_func f;
1516 int abi;
1517 int context;
1518{
1519 char bytes[3];
1520 bytes[0] = UNW_P10;
1521 bytes[1] = (abi & 0xff);
1522 bytes[2] = (context & 0xff);
1523 (*f) (3, bytes, NULL);
1524}
1525
1526static void
1527output_B1_format (f, rtype, label)
1528 vbyte_func f;
1529 unw_record_type rtype;
1530 unsigned long label;
1531{
1532 char byte;
e0c9811a 1533 int r = 0;
197865e8 1534 if (label > 0x1f)
800eeca4
JW		 1535 {
1536 output_B4_format (f, rtype, label);
1537 return;
1538 }
e0c9811a
JW		 1539 if (rtype == copy_state)
1540 r = 1;
1541 else if (rtype != label_state)
1542 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1543
1544 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1545 (*f) (1, &byte, NULL);
1546}
1547
1548static void
1549output_B2_format (f, ecount, t)
1550 vbyte_func f;
1551 unsigned long ecount;
1552 unsigned long t;
1553{
1554 char bytes[20];
1555 int count = 1;
1556 if (ecount > 0x1f)
1557 {
1558 output_B3_format (f, ecount, t);
1559 return;
1560 }
1561 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1562 count += output_leb128 (bytes + 1, t, 0);
1563 (*f) (count, bytes, NULL);
1564}
1565
1566static void
1567output_B3_format (f, ecount, t)
1568 vbyte_func f;
1569 unsigned long ecount;
1570 unsigned long t;
1571{
1572 char bytes[20];
1573 int count = 1;
1574 if (ecount <= 0x1f)
1575 {
1576 output_B2_format (f, ecount, t);
1577 return;
1578 }
1579 bytes[0] = UNW_B3;
1580 count += output_leb128 (bytes + 1, t, 0);
1581 count += output_leb128 (bytes + count, ecount, 0);
1582 (*f) (count, bytes, NULL);
1583}
1584
1585static void
1586output_B4_format (f, rtype, label)
1587 vbyte_func f;
1588 unw_record_type rtype;
1589 unsigned long label;
1590{
1591 char bytes[20];
e0c9811a 1592 int r = 0;
800eeca4 1593 int count = 1;
197865e8 1594 if (label <= 0x1f)
800eeca4
JW		 1595 {
1596 output_B1_format (f, rtype, label);
1597 return;
1598 }
197865e8 1599
e0c9811a
JW		 1600 if (rtype == copy_state)
1601 r = 1;
1602 else if (rtype != label_state)
1603 as_bad ("Invalid record type for format B1");
800eeca4
JW		 1604
1605 bytes[0] = (UNW_B4 | (r << 3));
1606 count += output_leb128 (bytes + 1, label, 0);
1607 (*f) (count, bytes, NULL);
1608}
1609
1610static char
e0c9811a 1611format_ab_reg (ab, reg)
542d6675
KH		 1612 int ab;
1613 int reg;
800eeca4
JW		 1614{
1615 int ret;
e0c9811a 1616 ab = (ab & 3);
800eeca4 1617 reg = (reg & 0x1f);
e0c9811a 1618 ret = (ab << 5) | reg;
800eeca4
JW		 1619 return ret;
1620}
1621
1622static void
e0c9811a 1623output_X1_format (f, rtype, ab, reg, t, w1)
800eeca4
JW		 1624 vbyte_func f;
1625 unw_record_type rtype;
e0c9811a 1626 int ab, reg;
800eeca4
JW		 1627 unsigned long t;
1628 unsigned long w1;
1629{
1630 char bytes[20];
e0c9811a 1631 int r = 0;
800eeca4
JW		 1632 int count = 2;
1633 bytes[0] = UNW_X1;
197865e8 1634
e0c9811a
JW		 1635 if (rtype == spill_sprel)
1636 r = 1;
1637 else if (rtype != spill_psprel)
1638 as_bad ("Invalid record type for format X1");
1639 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1640 count += output_leb128 (bytes + 2, t, 0);
1641 count += output_leb128 (bytes + count, w1, 0);
1642 (*f) (count, bytes, NULL);
1643}
1644
1645static void
e0c9811a 1646output_X2_format (f, ab, reg, x, y, treg, t)
800eeca4 1647 vbyte_func f;
e0c9811a 1648 int ab, reg;
800eeca4
JW		 1649 int x, y, treg;
1650 unsigned long t;
1651{
1652 char bytes[20];
800eeca4
JW		 1653 int count = 3;
1654 bytes[0] = UNW_X2;
e0c9811a 1655 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1656 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1657 count += output_leb128 (bytes + 3, t, 0);
1658 (*f) (count, bytes, NULL);
1659}
1660
1661static void
e0c9811a 1662output_X3_format (f, rtype, qp, ab, reg, t, w1)
800eeca4
JW		 1663 vbyte_func f;
1664 unw_record_type rtype;
1665 int qp;
e0c9811a 1666 int ab, reg;
800eeca4
JW		 1667 unsigned long t;
1668 unsigned long w1;
1669{
1670 char bytes[20];
e0c9811a 1671 int r = 0;
800eeca4 1672 int count = 3;
e0c9811a
JW		 1673 bytes[0] = UNW_X3;
1674
1675 if (rtype == spill_sprel_p)
1676 r = 1;
1677 else if (rtype != spill_psprel_p)
1678 as_bad ("Invalid record type for format X3");
800eeca4 1679 bytes[1] = ((r << 7) | (qp & 0x3f));
e0c9811a 1680 bytes[2] = format_ab_reg (ab, reg);
800eeca4
JW		 1681 count += output_leb128 (bytes + 3, t, 0);
1682 count += output_leb128 (bytes + count, w1, 0);
1683 (*f) (count, bytes, NULL);
1684}
1685
1686static void
e0c9811a 1687output_X4_format (f, qp, ab, reg, x, y, treg, t)
800eeca4
JW		 1688 vbyte_func f;
1689 int qp;
e0c9811a 1690 int ab, reg;
800eeca4
JW		 1691 int x, y, treg;
1692 unsigned long t;
1693{
1694 char bytes[20];
800eeca4 1695 int count = 4;
e0c9811a 1696 bytes[0] = UNW_X4;
800eeca4 1697 bytes[1] = (qp & 0x3f);
e0c9811a 1698 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
800eeca4
JW		 1699 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1700 count += output_leb128 (bytes + 4, t, 0);
1701 (*f) (count, bytes, NULL);
1702}
1703
1704/* This function allocates a record list structure, and initializes fields. */
542d6675 1705
800eeca4 1706static unw_rec_list *
197865e8 1707alloc_record (unw_record_type t)
800eeca4
JW		 1708{
1709 unw_rec_list *ptr;
1710 ptr = xmalloc (sizeof (*ptr));
1711 ptr->next = NULL;
1712 ptr->slot_number = SLOT_NUM_NOT_SET;
1713 ptr->r.type = t;
73f20958
L		 1714 ptr->next_slot_number = 0;
1715 ptr->next_slot_frag = 0;
800eeca4
JW		 1716 return ptr;
1717}
1718
5738bc24
JW		 1719/* Dummy unwind record used for calculating the length of the last prologue or
1720 body region. */
1721
1722static unw_rec_list *
1723output_endp ()
1724{
1725 unw_rec_list *ptr = alloc_record (endp);
1726 return ptr;
1727}
1728
800eeca4
JW		 1729static unw_rec_list *
1730output_prologue ()
1731{
1732 unw_rec_list *ptr = alloc_record (prologue);
e0c9811a 1733 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
800eeca4
JW		 1734 return ptr;
1735}
1736
1737static unw_rec_list *
1738output_prologue_gr (saved_mask, reg)
1739 unsigned int saved_mask;
1740 unsigned int reg;
1741{
1742 unw_rec_list *ptr = alloc_record (prologue_gr);
e0c9811a
JW		 1743 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1744 ptr->r.record.r.grmask = saved_mask;
800eeca4
JW		 1745 ptr->r.record.r.grsave = reg;
1746 return ptr;
1747}
1748
1749static unw_rec_list *
1750output_body ()
1751{
1752 unw_rec_list *ptr = alloc_record (body);
1753 return ptr;
1754}
1755
1756static unw_rec_list *
1757output_mem_stack_f (size)
1758 unsigned int size;
1759{
1760 unw_rec_list *ptr = alloc_record (mem_stack_f);
1761 ptr->r.record.p.size = size;
1762 return ptr;
1763}
1764
1765static unw_rec_list *
1766output_mem_stack_v ()
1767{
1768 unw_rec_list *ptr = alloc_record (mem_stack_v);
1769 return ptr;
1770}
1771
1772static unw_rec_list *
1773output_psp_gr (gr)
1774 unsigned int gr;
1775{
1776 unw_rec_list *ptr = alloc_record (psp_gr);
1777 ptr->r.record.p.gr = gr;
1778 return ptr;
1779}
1780
1781static unw_rec_list *
1782output_psp_sprel (offset)
1783 unsigned int offset;
1784{
1785 unw_rec_list *ptr = alloc_record (psp_sprel);
542d6675 1786 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1787 return ptr;
1788}
1789
1790static unw_rec_list *
1791output_rp_when ()
1792{
1793 unw_rec_list *ptr = alloc_record (rp_when);
1794 return ptr;
1795}
1796
1797static unw_rec_list *
1798output_rp_gr (gr)
1799 unsigned int gr;
1800{
1801 unw_rec_list *ptr = alloc_record (rp_gr);
1802 ptr->r.record.p.gr = gr;
1803 return ptr;
1804}
1805
1806static unw_rec_list *
1807output_rp_br (br)
1808 unsigned int br;
1809{
1810 unw_rec_list *ptr = alloc_record (rp_br);
1811 ptr->r.record.p.br = br;
1812 return ptr;
1813}
1814
1815static unw_rec_list *
1816output_rp_psprel (offset)
1817 unsigned int offset;
1818{
1819 unw_rec_list *ptr = alloc_record (rp_psprel);
9f9a069e 1820 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1821 return ptr;
1822}
1823
1824static unw_rec_list *
1825output_rp_sprel (offset)
1826 unsigned int offset;
1827{
1828 unw_rec_list *ptr = alloc_record (rp_sprel);
542d6675 1829 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1830 return ptr;
1831}
1832
1833static unw_rec_list *
1834output_pfs_when ()
1835{
1836 unw_rec_list *ptr = alloc_record (pfs_when);
1837 return ptr;
1838}
1839
1840static unw_rec_list *
1841output_pfs_gr (gr)
1842 unsigned int gr;
1843{
1844 unw_rec_list *ptr = alloc_record (pfs_gr);
1845 ptr->r.record.p.gr = gr;
1846 return ptr;
1847}
1848
1849static unw_rec_list *
1850output_pfs_psprel (offset)
1851 unsigned int offset;
1852{
1853 unw_rec_list *ptr = alloc_record (pfs_psprel);
9f9a069e 1854 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1855 return ptr;
1856}
1857
1858static unw_rec_list *
1859output_pfs_sprel (offset)
1860 unsigned int offset;
1861{
1862 unw_rec_list *ptr = alloc_record (pfs_sprel);
542d6675 1863 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1864 return ptr;
1865}
1866
1867static unw_rec_list *
1868output_preds_when ()
1869{
1870 unw_rec_list *ptr = alloc_record (preds_when);
1871 return ptr;
1872}
1873
1874static unw_rec_list *
1875output_preds_gr (gr)
1876 unsigned int gr;
1877{
1878 unw_rec_list *ptr = alloc_record (preds_gr);
1879 ptr->r.record.p.gr = gr;
1880 return ptr;
1881}
1882
1883static unw_rec_list *
1884output_preds_psprel (offset)
1885 unsigned int offset;
1886{
1887 unw_rec_list *ptr = alloc_record (preds_psprel);
9f9a069e 1888 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1889 return ptr;
1890}
1891
1892static unw_rec_list *
1893output_preds_sprel (offset)
1894 unsigned int offset;
1895{
1896 unw_rec_list *ptr = alloc_record (preds_sprel);
542d6675 1897 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 1898 return ptr;
1899}
1900
1901static unw_rec_list *
1902output_fr_mem (mask)
1903 unsigned int mask;
1904{
1905 unw_rec_list *ptr = alloc_record (fr_mem);
1906 ptr->r.record.p.rmask = mask;
1907 return ptr;
1908}
1909
1910static unw_rec_list *
1911output_frgr_mem (gr_mask, fr_mask)
1912 unsigned int gr_mask;
1913 unsigned int fr_mask;
1914{
1915 unw_rec_list *ptr = alloc_record (frgr_mem);
1916 ptr->r.record.p.grmask = gr_mask;
1917 ptr->r.record.p.frmask = fr_mask;
1918 return ptr;
1919}
1920
1921static unw_rec_list *
1922output_gr_gr (mask, reg)
1923 unsigned int mask;
1924 unsigned int reg;
1925{
1926 unw_rec_list *ptr = alloc_record (gr_gr);
1927 ptr->r.record.p.grmask = mask;
1928 ptr->r.record.p.gr = reg;
1929 return ptr;
1930}
1931
1932static unw_rec_list *
1933output_gr_mem (mask)
1934 unsigned int mask;
1935{
1936 unw_rec_list *ptr = alloc_record (gr_mem);
1937 ptr->r.record.p.rmask = mask;
1938 return ptr;
1939}
1940
1941static unw_rec_list *
1942output_br_mem (unsigned int mask)
1943{
1944 unw_rec_list *ptr = alloc_record (br_mem);
1945 ptr->r.record.p.brmask = mask;
1946 return ptr;
1947}
1948
1949static unw_rec_list *
1950output_br_gr (save_mask, reg)
1951 unsigned int save_mask;
1952 unsigned int reg;
1953{
1954 unw_rec_list *ptr = alloc_record (br_gr);
1955 ptr->r.record.p.brmask = save_mask;
1956 ptr->r.record.p.gr = reg;
1957 return ptr;
1958}
1959
1960static unw_rec_list *
1961output_spill_base (offset)
1962 unsigned int offset;
1963{
1964 unw_rec_list *ptr = alloc_record (spill_base);
9f9a069e 1965 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1966 return ptr;
1967}
1968
1969static unw_rec_list *
1970output_unat_when ()
1971{
1972 unw_rec_list *ptr = alloc_record (unat_when);
1973 return ptr;
1974}
1975
1976static unw_rec_list *
1977output_unat_gr (gr)
1978 unsigned int gr;
1979{
1980 unw_rec_list *ptr = alloc_record (unat_gr);
1981 ptr->r.record.p.gr = gr;
1982 return ptr;
1983}
1984
1985static unw_rec_list *
1986output_unat_psprel (offset)
1987 unsigned int offset;
1988{
1989 unw_rec_list *ptr = alloc_record (unat_psprel);
9f9a069e 1990 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 1991 return ptr;
1992}
1993
1994static unw_rec_list *
1995output_unat_sprel (offset)
1996 unsigned int offset;
1997{
1998 unw_rec_list *ptr = alloc_record (unat_sprel);
542d6675 1999 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2000 return ptr;
2001}
2002
2003static unw_rec_list *
2004output_lc_when ()
2005{
2006 unw_rec_list *ptr = alloc_record (lc_when);
2007 return ptr;
2008}
2009
2010static unw_rec_list *
2011output_lc_gr (gr)
2012 unsigned int gr;
2013{
2014 unw_rec_list *ptr = alloc_record (lc_gr);
2015 ptr->r.record.p.gr = gr;
2016 return ptr;
2017}
2018
2019static unw_rec_list *
2020output_lc_psprel (offset)
2021 unsigned int offset;
2022{
2023 unw_rec_list *ptr = alloc_record (lc_psprel);
9f9a069e 2024 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2025 return ptr;
2026}
2027
2028static unw_rec_list *
2029output_lc_sprel (offset)
2030 unsigned int offset;
2031{
2032 unw_rec_list *ptr = alloc_record (lc_sprel);
542d6675 2033 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2034 return ptr;
2035}
2036
2037static unw_rec_list *
2038output_fpsr_when ()
2039{
2040 unw_rec_list *ptr = alloc_record (fpsr_when);
2041 return ptr;
2042}
2043
2044static unw_rec_list *
2045output_fpsr_gr (gr)
2046 unsigned int gr;
2047{
2048 unw_rec_list *ptr = alloc_record (fpsr_gr);
2049 ptr->r.record.p.gr = gr;
2050 return ptr;
2051}
2052
2053static unw_rec_list *
2054output_fpsr_psprel (offset)
2055 unsigned int offset;
2056{
2057 unw_rec_list *ptr = alloc_record (fpsr_psprel);
9f9a069e 2058 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2059 return ptr;
2060}
2061
2062static unw_rec_list *
2063output_fpsr_sprel (offset)
2064 unsigned int offset;
2065{
2066 unw_rec_list *ptr = alloc_record (fpsr_sprel);
542d6675 2067 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2068 return ptr;
2069}
2070
2071static unw_rec_list *
2072output_priunat_when_gr ()
2073{
2074 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2075 return ptr;
2076}
2077
2078static unw_rec_list *
2079output_priunat_when_mem ()
2080{
2081 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2082 return ptr;
2083}
2084
2085static unw_rec_list *
2086output_priunat_gr (gr)
2087 unsigned int gr;
2088{
2089 unw_rec_list *ptr = alloc_record (priunat_gr);
2090 ptr->r.record.p.gr = gr;
2091 return ptr;
2092}
2093
2094static unw_rec_list *
2095output_priunat_psprel (offset)
2096 unsigned int offset;
2097{
2098 unw_rec_list *ptr = alloc_record (priunat_psprel);
9f9a069e 2099 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2100 return ptr;
2101}
2102
2103static unw_rec_list *
2104output_priunat_sprel (offset)
2105 unsigned int offset;
2106{
2107 unw_rec_list *ptr = alloc_record (priunat_sprel);
542d6675 2108 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2109 return ptr;
2110}
2111
2112static unw_rec_list *
2113output_bsp_when ()
2114{
2115 unw_rec_list *ptr = alloc_record (bsp_when);
2116 return ptr;
2117}
2118
2119static unw_rec_list *
2120output_bsp_gr (gr)
2121 unsigned int gr;
2122{
2123 unw_rec_list *ptr = alloc_record (bsp_gr);
2124 ptr->r.record.p.gr = gr;
2125 return ptr;
2126}
2127
2128static unw_rec_list *
2129output_bsp_psprel (offset)
2130 unsigned int offset;
2131{
2132 unw_rec_list *ptr = alloc_record (bsp_psprel);
9f9a069e 2133 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2134 return ptr;
2135}
2136
2137static unw_rec_list *
2138output_bsp_sprel (offset)
2139 unsigned int offset;
2140{
2141 unw_rec_list *ptr = alloc_record (bsp_sprel);
542d6675 2142 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2143 return ptr;
2144}
2145
2146static unw_rec_list *
2147output_bspstore_when ()
2148{
2149 unw_rec_list *ptr = alloc_record (bspstore_when);
2150 return ptr;
2151}
2152
2153static unw_rec_list *
2154output_bspstore_gr (gr)
2155 unsigned int gr;
2156{
2157 unw_rec_list *ptr = alloc_record (bspstore_gr);
2158 ptr->r.record.p.gr = gr;
2159 return ptr;
2160}
2161
2162static unw_rec_list *
2163output_bspstore_psprel (offset)
2164 unsigned int offset;
2165{
2166 unw_rec_list *ptr = alloc_record (bspstore_psprel);
9f9a069e 2167 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2168 return ptr;
2169}
2170
2171static unw_rec_list *
2172output_bspstore_sprel (offset)
2173 unsigned int offset;
2174{
2175 unw_rec_list *ptr = alloc_record (bspstore_sprel);
542d6675 2176 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2177 return ptr;
2178}
2179
2180static unw_rec_list *
2181output_rnat_when ()
2182{
2183 unw_rec_list *ptr = alloc_record (rnat_when);
2184 return ptr;
2185}
2186
2187static unw_rec_list *
2188output_rnat_gr (gr)
2189 unsigned int gr;
2190{
2191 unw_rec_list *ptr = alloc_record (rnat_gr);
2192 ptr->r.record.p.gr = gr;
2193 return ptr;
2194}
2195
2196static unw_rec_list *
2197output_rnat_psprel (offset)
2198 unsigned int offset;
2199{
2200 unw_rec_list *ptr = alloc_record (rnat_psprel);
9f9a069e 2201 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2202 return ptr;
2203}
2204
2205static unw_rec_list *
2206output_rnat_sprel (offset)
2207 unsigned int offset;
2208{
2209 unw_rec_list *ptr = alloc_record (rnat_sprel);
542d6675 2210 ptr->r.record.p.spoff = offset / 4;
800eeca4
JW		 2211 return ptr;
2212}
2213
2214static unw_rec_list *
e0c9811a
JW		 2215output_unwabi (abi, context)
2216 unsigned long abi;
2217 unsigned long context;
800eeca4 2218{
e0c9811a
JW		 2219 unw_rec_list *ptr = alloc_record (unwabi);
2220 ptr->r.record.p.abi = abi;
2221 ptr->r.record.p.context = context;
800eeca4
JW		 2222 return ptr;
2223}
2224
2225static unw_rec_list *
e0c9811a 2226output_epilogue (unsigned long ecount)
800eeca4 2227{
e0c9811a
JW		 2228 unw_rec_list *ptr = alloc_record (epilogue);
2229 ptr->r.record.b.ecount = ecount;
800eeca4
JW		 2230 return ptr;
2231}
2232
2233static unw_rec_list *
e0c9811a 2234output_label_state (unsigned long label)
800eeca4 2235{
e0c9811a
JW		 2236 unw_rec_list *ptr = alloc_record (label_state);
2237 ptr->r.record.b.label = label;
800eeca4
JW		 2238 return ptr;
2239}
2240
2241static unw_rec_list *
e0c9811a
JW		 2242output_copy_state (unsigned long label)
2243{
2244 unw_rec_list *ptr = alloc_record (copy_state);
2245 ptr->r.record.b.label = label;
2246 return ptr;
2247}
2248
2249static unw_rec_list *
2250output_spill_psprel (ab, reg, offset)
2251 unsigned int ab;
800eeca4
JW		 2252 unsigned int reg;
2253 unsigned int offset;
2254{
2255 unw_rec_list *ptr = alloc_record (spill_psprel);
e0c9811a 2256 ptr->r.record.x.ab = ab;
800eeca4 2257 ptr->r.record.x.reg = reg;
9f9a069e 2258 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2259 return ptr;
2260}
2261
2262static unw_rec_list *
e0c9811a
JW		 2263output_spill_sprel (ab, reg, offset)
2264 unsigned int ab;
800eeca4
JW		 2265 unsigned int reg;
2266 unsigned int offset;
2267{
2268 unw_rec_list *ptr = alloc_record (spill_sprel);
e0c9811a 2269 ptr->r.record.x.ab = ab;
800eeca4 2270 ptr->r.record.x.reg = reg;
542d6675 2271 ptr->r.record.x.spoff = offset / 4;
800eeca4
JW		 2272 return ptr;
2273}
2274
2275static unw_rec_list *
e0c9811a
JW		 2276output_spill_psprel_p (ab, reg, offset, predicate)
2277 unsigned int ab;
800eeca4
JW		 2278 unsigned int reg;
2279 unsigned int offset;
2280 unsigned int predicate;
2281{
2282 unw_rec_list *ptr = alloc_record (spill_psprel_p);
e0c9811a 2283 ptr->r.record.x.ab = ab;
800eeca4 2284 ptr->r.record.x.reg = reg;
9f9a069e 2285 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
800eeca4
JW		 2286 ptr->r.record.x.qp = predicate;
2287 return ptr;
2288}
2289
2290static unw_rec_list *
e0c9811a
JW		 2291output_spill_sprel_p (ab, reg, offset, predicate)
2292 unsigned int ab;
800eeca4
JW		 2293 unsigned int reg;
2294 unsigned int offset;
2295 unsigned int predicate;
2296{
2297 unw_rec_list *ptr = alloc_record (spill_sprel_p);
e0c9811a 2298 ptr->r.record.x.ab = ab;
800eeca4 2299 ptr->r.record.x.reg = reg;
542d6675 2300 ptr->r.record.x.spoff = offset / 4;
800eeca4
JW		 2301 ptr->r.record.x.qp = predicate;
2302 return ptr;
2303}
2304
2305static unw_rec_list *
e0c9811a
JW		 2306output_spill_reg (ab, reg, targ_reg, xy)
2307 unsigned int ab;
800eeca4
JW		 2308 unsigned int reg;
2309 unsigned int targ_reg;
2310 unsigned int xy;
2311{
2312 unw_rec_list *ptr = alloc_record (spill_reg);
e0c9811a 2313 ptr->r.record.x.ab = ab;
800eeca4
JW		 2314 ptr->r.record.x.reg = reg;
2315 ptr->r.record.x.treg = targ_reg;
2316 ptr->r.record.x.xy = xy;
2317 return ptr;
2318}
2319
2320static unw_rec_list *
e0c9811a
JW		 2321output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2322 unsigned int ab;
800eeca4
JW		 2323 unsigned int reg;
2324 unsigned int targ_reg;
2325 unsigned int xy;
2326 unsigned int predicate;
2327{
2328 unw_rec_list *ptr = alloc_record (spill_reg_p);
e0c9811a 2329 ptr->r.record.x.ab = ab;
800eeca4
JW		 2330 ptr->r.record.x.reg = reg;
2331 ptr->r.record.x.treg = targ_reg;
2332 ptr->r.record.x.xy = xy;
2333 ptr->r.record.x.qp = predicate;
2334 return ptr;
2335}
2336
197865e8 2337/* Given a unw_rec_list process the correct format with the
800eeca4 2338 specified function. */
542d6675 2339
800eeca4
JW		 2340static void
2341process_one_record (ptr, f)
2342 unw_rec_list *ptr;
2343 vbyte_func f;
2344{
e0c9811a
JW		 2345 unsigned long fr_mask, gr_mask;
2346
197865e8 2347 switch (ptr->r.type)
800eeca4 2348 {
5738bc24
JW		 2349 /* This is a dummy record that takes up no space in the output. */
2350 case endp:
2351 break;
2352
542d6675
KH		 2353 case gr_mem:
2354 case fr_mem:
2355 case br_mem:
2356 case frgr_mem:
2357 /* These are taken care of by prologue/prologue_gr. */
2358 break;
e0c9811a 2359
542d6675
KH		 2360 case prologue_gr:
2361 case prologue:
2362 if (ptr->r.type == prologue_gr)
2363 output_R2_format (f, ptr->r.record.r.grmask,
2364 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2365 else
800eeca4 2366 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
542d6675
KH		 2367
2368 /* Output descriptor(s) for union of register spills (if any). */
2369 gr_mask = ptr->r.record.r.mask.gr_mem;
2370 fr_mask = ptr->r.record.r.mask.fr_mem;
2371 if (fr_mask)
2372 {
2373 if ((fr_mask & ~0xfUL) == 0)
2374 output_P6_format (f, fr_mem, fr_mask);
2375 else
2376 {
2377 output_P5_format (f, gr_mask, fr_mask);
2378 gr_mask = 0;
2379 }
2380 }
2381 if (gr_mask)
2382 output_P6_format (f, gr_mem, gr_mask);
2383 if (ptr->r.record.r.mask.br_mem)
2384 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2385
2386 /* output imask descriptor if necessary: */
2387 if (ptr->r.record.r.mask.i)
2388 output_P4_format (f, ptr->r.record.r.mask.i,
2389 ptr->r.record.r.imask_size);
2390 break;
2391
2392 case body:
2393 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2394 break;
2395 case mem_stack_f:
2396 case mem_stack_v:
2397 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2398 ptr->r.record.p.size);
2399 break;
2400 case psp_gr:
2401 case rp_gr:
2402 case pfs_gr:
2403 case preds_gr:
2404 case unat_gr:
2405 case lc_gr:
2406 case fpsr_gr:
2407 case priunat_gr:
2408 case bsp_gr:
2409 case bspstore_gr:
2410 case rnat_gr:
2411 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2412 break;
2413 case rp_br:
2414 output_P3_format (f, rp_br, ptr->r.record.p.br);
2415 break;
2416 case psp_sprel:
2417 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2418 break;
2419 case rp_when:
2420 case pfs_when:
2421 case preds_when:
2422 case unat_when:
2423 case lc_when:
2424 case fpsr_when:
2425 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2426 break;
2427 case rp_psprel:
2428 case pfs_psprel:
2429 case preds_psprel:
2430 case unat_psprel:
2431 case lc_psprel:
2432 case fpsr_psprel:
2433 case spill_base:
2434 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2435 break;
2436 case rp_sprel:
2437 case pfs_sprel:
2438 case preds_sprel:
2439 case unat_sprel:
2440 case lc_sprel:
2441 case fpsr_sprel:
2442 case priunat_sprel:
2443 case bsp_sprel:
2444 case bspstore_sprel:
2445 case rnat_sprel:
2446 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2447 break;
2448 case gr_gr:
2449 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2450 break;
2451 case br_gr:
2452 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2453 break;
2454 case spill_mask:
2455 as_bad ("spill_mask record unimplemented.");
2456 break;
2457 case priunat_when_gr:
2458 case priunat_when_mem:
2459 case bsp_when:
2460 case bspstore_when:
2461 case rnat_when:
2462 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2463 break;
2464 case priunat_psprel:
2465 case bsp_psprel:
2466 case bspstore_psprel:
2467 case rnat_psprel:
2468 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2469 break;
2470 case unwabi:
2471 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2472 break;
2473 case epilogue:
2474 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2475 break;
2476 case label_state:
2477 case copy_state:
2478 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2479 break;
2480 case spill_psprel:
2481 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2482 ptr->r.record.x.reg, ptr->r.record.x.t,
2483 ptr->r.record.x.pspoff);
2484 break;
2485 case spill_sprel:
2486 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2487 ptr->r.record.x.reg, ptr->r.record.x.t,
2488 ptr->r.record.x.spoff);
2489 break;
2490 case spill_reg:
2491 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2492 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2493 ptr->r.record.x.treg, ptr->r.record.x.t);
2494 break;
2495 case spill_psprel_p:
2496 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2497 ptr->r.record.x.ab, ptr->r.record.x.reg,
2498 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2499 break;
2500 case spill_sprel_p:
2501 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2502 ptr->r.record.x.ab, ptr->r.record.x.reg,
2503 ptr->r.record.x.t, ptr->r.record.x.spoff);
2504 break;
2505 case spill_reg_p:
2506 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2507 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2508 ptr->r.record.x.xy, ptr->r.record.x.treg,
2509 ptr->r.record.x.t);
2510 break;
2511 default:
2512 as_bad ("record_type_not_valid");
2513 break;
800eeca4
JW		 2514 }
2515}
2516
197865e8 2517/* Given a unw_rec_list list, process all the records with
800eeca4
JW		 2518 the specified function. */
2519static void
2520process_unw_records (list, f)
2521 unw_rec_list *list;
2522 vbyte_func f;
2523{
2524 unw_rec_list *ptr;
2525 for (ptr = list; ptr; ptr = ptr->next)
2526 process_one_record (ptr, f);
2527}
2528
2529/* Determine the size of a record list in bytes. */
2530static int
2531calc_record_size (list)
2532 unw_rec_list *list;
2533{
2534 vbyte_count = 0;
2535 process_unw_records (list, count_output);
2536 return vbyte_count;
2537}
2538
e0c9811a
JW		 2539/* Update IMASK bitmask to reflect the fact that one or more registers
2540 of type TYPE are saved starting at instruction with index T. If N
2541 bits are set in REGMASK, it is assumed that instructions T through
2542 T+N-1 save these registers.
2543
2544 TYPE values:
2545 0: no save
2546 1: instruction saves next fp reg
2547 2: instruction saves next general reg
2548 3: instruction saves next branch reg */
2549static void
2550set_imask (region, regmask, t, type)
2551 unw_rec_list *region;
2552 unsigned long regmask;
2553 unsigned long t;
2554 unsigned int type;
2555{
2556 unsigned char *imask;
2557 unsigned long imask_size;
2558 unsigned int i;
2559 int pos;
2560
2561 imask = region->r.record.r.mask.i;
2562 imask_size = region->r.record.r.imask_size;
2563 if (!imask)
2564 {
542d6675 2565 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
e0c9811a
JW		 2566 imask = xmalloc (imask_size);
2567 memset (imask, 0, imask_size);
2568
2569 region->r.record.r.imask_size = imask_size;
2570 region->r.record.r.mask.i = imask;
2571 }
2572
542d6675
KH		 2573 i = (t / 4) + 1;
2574 pos = 2 * (3 - t % 4);
e0c9811a
JW		 2575 while (regmask)
2576 {
2577 if (i >= imask_size)
2578 {
2579 as_bad ("Ignoring attempt to spill beyond end of region");
2580 return;
2581 }
2582
2583 imask[i] |= (type & 0x3) << pos;
197865e8 2584
e0c9811a
JW		 2585 regmask &= (regmask - 1);
2586 pos -= 2;
2587 if (pos < 0)
2588 {
2589 pos = 0;
2590 ++i;
2591 }
2592 }
2593}
2594
f5a30c2e
JW		 2595/* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2596 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
b5e0fabd
JW		 2597 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2598 for frag sizes. */
f5a30c2e 2599
e0c9811a 2600unsigned long
b5e0fabd 2601slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
f5a30c2e
JW		 2602 unsigned long slot_addr;
2603 fragS *slot_frag;
2604 unsigned long first_addr;
2605 fragS *first_frag;
b5e0fabd 2606 int before_relax;
e0c9811a 2607{
f5a30c2e
JW		 2608 unsigned long index = 0;
2609
2610 /* First time we are called, the initial address and frag are invalid. */
2611 if (first_addr == 0)
2612 return 0;
2613
2614 /* If the two addresses are in different frags, then we need to add in
2615 the remaining size of this frag, and then the entire size of intermediate
2616 frags. */
2617 while (slot_frag != first_frag)
2618 {
2619 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2620
b5e0fabd 2621 if (! before_relax)
73f20958 2622 {
b5e0fabd
JW		 2623 /* We can get the final addresses only during and after
2624 relaxation. */
73f20958
L		 2625 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2626 index += 3 * ((first_frag->fr_next->fr_address
2627 - first_frag->fr_address
2628 - first_frag->fr_fix) >> 4);
2629 }
2630 else
2631 /* We don't know what the final addresses will be. We try our
2632 best to estimate. */
2633 switch (first_frag->fr_type)
2634 {
2635 default:
2636 break;
2637
2638 case rs_space:
2639 as_fatal ("only constant space allocation is supported");
2640 break;
2641
2642 case rs_align:
2643 case rs_align_code:
2644 case rs_align_test:
2645 /* Take alignment into account. Assume the worst case
2646 before relaxation. */
2647 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2648 break;
2649
2650 case rs_org:
2651 if (first_frag->fr_symbol)
2652 {
2653 as_fatal ("only constant offsets are supported");
2654 break;
2655 }
2656 case rs_fill:
2657 index += 3 * (first_frag->fr_offset >> 4);
2658 break;
2659 }
2660
f5a30c2e
JW		 2661 /* Add in the full size of the frag converted to instruction slots. */
2662 index += 3 * (first_frag->fr_fix >> 4);
2663 /* Subtract away the initial part before first_addr. */
2664 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2665 + ((first_addr & 0x3) - (start_addr & 0x3)));
e0c9811a 2666
f5a30c2e
JW		 2667 /* Move to the beginning of the next frag. */
2668 first_frag = first_frag->fr_next;
2669 first_addr = (unsigned long) &first_frag->fr_literal;
2670 }
2671
2672 /* Add in the used part of the last frag. */
2673 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2674 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2675 return index;
2676}
4a1805b1 2677
91a2ae2a
RH		 2678/* Optimize unwind record directives. */
2679
2680static unw_rec_list *
2681optimize_unw_records (list)
2682 unw_rec_list *list;
2683{
2684 if (!list)
2685 return NULL;
2686
2687 /* If the only unwind record is ".prologue" or ".prologue" followed
2688 by ".body", then we can optimize the unwind directives away. */
2689 if (list->r.type == prologue
5738bc24
JW		 2690 && (list->next->r.type == endp
2691 || (list->next->r.type == body && list->next->next->r.type == endp)))
91a2ae2a
RH		 2692 return NULL;
2693
2694 return list;
2695}
2696
800eeca4
JW		 2697/* Given a complete record list, process any records which have
2698 unresolved fields, (ie length counts for a prologue). After
0234cb7c 2699 this has been run, all necessary information should be available
800eeca4 2700 within each record to generate an image. */
542d6675 2701
800eeca4 2702static void
b5e0fabd 2703fixup_unw_records (list, before_relax)
800eeca4 2704 unw_rec_list *list;
b5e0fabd 2705 int before_relax;
800eeca4 2706{
e0c9811a
JW		 2707 unw_rec_list *ptr, *region = 0;
2708 unsigned long first_addr = 0, rlen = 0, t;
f5a30c2e 2709 fragS *first_frag = 0;
e0c9811a 2710
800eeca4
JW		 2711 for (ptr = list; ptr; ptr = ptr->next)
2712 {
2713 if (ptr->slot_number == SLOT_NUM_NOT_SET)
542d6675 2714 as_bad (" Insn slot not set in unwind record.");
f5a30c2e 2715 t = slot_index (ptr->slot_number, ptr->slot_frag,
b5e0fabd 2716 first_addr, first_frag, before_relax);
800eeca4
JW		 2717 switch (ptr->r.type)
2718 {
542d6675
KH		 2719 case prologue:
2720 case prologue_gr:
2721 case body:
2722 {
2723 unw_rec_list *last;
5738bc24
JW		 2724 int size;
2725 unsigned long last_addr = 0;
2726 fragS *last_frag = NULL;
542d6675
KH		 2727
2728 first_addr = ptr->slot_number;
f5a30c2e 2729 first_frag = ptr->slot_frag;
542d6675 2730 /* Find either the next body/prologue start, or the end of
5738bc24 2731 the function, and determine the size of the region. */
542d6675
KH		 2732 for (last = ptr->next; last != NULL; last = last->next)
2733 if (last->r.type == prologue || last->r.type == prologue_gr
5738bc24 2734 || last->r.type == body || last->r.type == endp)
542d6675
KH		 2735 {
2736 last_addr = last->slot_number;
f5a30c2e 2737 last_frag = last->slot_frag;
542d6675
KH		 2738 break;
2739 }
b5e0fabd
JW		 2740 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2741 before_relax);
542d6675 2742 rlen = ptr->r.record.r.rlen = size;
1e16b528
AS		 2743 if (ptr->r.type == body)
2744 /* End of region. */
2745 region = 0;
2746 else
2747 region = ptr;
e0c9811a 2748 break;
542d6675
KH		 2749 }
2750 case epilogue:
ed7af9f9
L		 2751 if (t < rlen)
2752 ptr->r.record.b.t = rlen - 1 - t;
2753 else
2754 /* This happens when a memory-stack-less procedure uses a
2755 ".restore sp" directive at the end of a region to pop
2756 the frame state. */
2757 ptr->r.record.b.t = 0;
542d6675 2758 break;
e0c9811a 2759
542d6675
KH		 2760 case mem_stack_f:
2761 case mem_stack_v:
2762 case rp_when:
2763 case pfs_when:
2764 case preds_when:
2765 case unat_when:
2766 case lc_when:
2767 case fpsr_when:
2768 case priunat_when_gr:
2769 case priunat_when_mem:
2770 case bsp_when:
2771 case bspstore_when:
2772 case rnat_when:
2773 ptr->r.record.p.t = t;
2774 break;
e0c9811a 2775
542d6675
KH		 2776 case spill_reg:
2777 case spill_sprel:
2778 case spill_psprel:
2779 case spill_reg_p:
2780 case spill_sprel_p:
2781 case spill_psprel_p:
2782 ptr->r.record.x.t = t;
2783 break;
e0c9811a 2784
542d6675
KH		 2785 case frgr_mem:
2786 if (!region)
2787 {
2788 as_bad ("frgr_mem record before region record!\n");
2789 return;
2790 }
2791 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2792 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2793 set_imask (region, ptr->r.record.p.frmask, t, 1);
2794 set_imask (region, ptr->r.record.p.grmask, t, 2);
2795 break;
2796 case fr_mem:
2797 if (!region)
2798 {
2799 as_bad ("fr_mem record before region record!\n");
2800 return;
2801 }
2802 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2803 set_imask (region, ptr->r.record.p.rmask, t, 1);
2804 break;
2805 case gr_mem:
2806 if (!region)
2807 {
2808 as_bad ("gr_mem record before region record!\n");
2809 return;
2810 }
2811 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2812 set_imask (region, ptr->r.record.p.rmask, t, 2);
2813 break;
2814 case br_mem:
2815 if (!region)
2816 {
2817 as_bad ("br_mem record before region record!\n");
2818 return;
2819 }
2820 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2821 set_imask (region, ptr->r.record.p.brmask, t, 3);
2822 break;
e0c9811a 2823
542d6675
KH		 2824 case gr_gr:
2825 if (!region)
2826 {
2827 as_bad ("gr_gr record before region record!\n");
2828 return;
2829 }
2830 set_imask (region, ptr->r.record.p.grmask, t, 2);
2831 break;
2832 case br_gr:
2833 if (!region)
2834 {
2835 as_bad ("br_gr record before region record!\n");
2836 return;
2837 }
2838 set_imask (region, ptr->r.record.p.brmask, t, 3);
2839 break;
e0c9811a 2840
542d6675
KH		 2841 default:
2842 break;
800eeca4
JW		 2843 }
2844 }
2845}
2846
b5e0fabd
JW		 2847/* Estimate the size of a frag before relaxing. We only have one type of frag
2848 to handle here, which is the unwind info frag. */
2849
2850int
2851ia64_estimate_size_before_relax (fragS *frag,
2852 asection *segtype ATTRIBUTE_UNUSED)
2853{
2854 unw_rec_list *list;
2855 int len, size, pad;
2856
2857 /* ??? This code is identical to the first part of ia64_convert_frag. */
2858 list = (unw_rec_list *) frag->fr_opcode;
2859 fixup_unw_records (list, 0);
2860
2861 len = calc_record_size (list);
2862 /* pad to pointer-size boundary. */
2863 pad = len % md.pointer_size;
2864 if (pad != 0)
2865 len += md.pointer_size - pad;
f7e323d5
JB		 2866 /* Add 8 for the header. */
2867 size = len + 8;
2868 /* Add a pointer for the personality offset. */
2869 if (frag->fr_offset)
2870 size += md.pointer_size;
b5e0fabd
JW		 2871
2872 /* fr_var carries the max_chars that we created the fragment with.
2873 We must, of course, have allocated enough memory earlier. */
2874 assert (frag->fr_var >= size);
2875
2876 return frag->fr_fix + size;
2877}
2878
73f20958
L		 2879/* This function converts a rs_machine_dependent variant frag into a
2880 normal fill frag with the unwind image from the the record list. */
2881void
2882ia64_convert_frag (fragS *frag)
557debba 2883{
73f20958
L		 2884 unw_rec_list *list;
2885 int len, size, pad;
1cd8ff38 2886 valueT flag_value;
557debba 2887
b5e0fabd 2888 /* ??? This code is identical to ia64_estimate_size_before_relax. */
73f20958 2889 list = (unw_rec_list *) frag->fr_opcode;
b5e0fabd 2890 fixup_unw_records (list, 0);
1cd8ff38 2891
73f20958
L		 2892 len = calc_record_size (list);
2893 /* pad to pointer-size boundary. */
2894 pad = len % md.pointer_size;
2895 if (pad != 0)
2896 len += md.pointer_size - pad;
f7e323d5
JB		 2897 /* Add 8 for the header. */
2898 size = len + 8;
2899 /* Add a pointer for the personality offset. */
2900 if (frag->fr_offset)
2901 size += md.pointer_size;
73f20958
L		 2902
2903 /* fr_var carries the max_chars that we created the fragment with.
2904 We must, of course, have allocated enough memory earlier. */
2905 assert (frag->fr_var >= size);
2906
2907 /* Initialize the header area. fr_offset is initialized with
2908 unwind.personality_routine. */
2909 if (frag->fr_offset)
1cd8ff38
NC		 2910 {
2911 if (md.flags & EF_IA_64_ABI64)
2912 flag_value = (bfd_vma) 3 << 32;
2913 else
2914 /* 32-bit unwind info block. */
2915 flag_value = (bfd_vma) 0x1003 << 32;
2916 }
2917 else
2918 flag_value = 0;
557debba 2919
73f20958
L		 2920 md_number_to_chars (frag->fr_literal,
2921 (((bfd_vma) 1 << 48) /* Version. */
2922 | flag_value /* U & E handler flags. */
2923 | (len / md.pointer_size)), /* Length. */
2924 8);
557debba 2925
73f20958
L		 2926 /* Skip the header. */
2927 vbyte_mem_ptr = frag->fr_literal + 8;
2928 process_unw_records (list, output_vbyte_mem);
d6e78c11
JW		 2929
2930 /* Fill the padding bytes with zeros. */
2931 if (pad != 0)
2932 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2933 md.pointer_size - pad);
2934
73f20958
L		 2935 frag->fr_fix += size;
2936 frag->fr_type = rs_fill;
2937 frag->fr_var = 0;
2938 frag->fr_offset = 0;
800eeca4
JW		 2939}
2940
e0c9811a
JW		 2941static int
2942convert_expr_to_ab_reg (e, ab, regp)
2943 expressionS *e;
2944 unsigned int *ab;
2945 unsigned int *regp;
2946{
2947 unsigned int reg;
2948
2949 if (e->X_op != O_register)
2950 return 0;
2951
2952 reg = e->X_add_number;
2434f565 2953 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
e0c9811a
JW		 2954 {
2955 *ab = 0;
2956 *regp = reg - REG_GR;
2957 }
2434f565
JW		 2958 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2959 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
e0c9811a
JW		 2960 {
2961 *ab = 1;
2962 *regp = reg - REG_FR;
2963 }
2434f565 2964 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
e0c9811a
JW		 2965 {
2966 *ab = 2;
2967 *regp = reg - REG_BR;
2968 }
2969 else
2970 {
2971 *ab = 3;
2972 switch (reg)
2973 {
2974 case REG_PR: *regp = 0; break;
2975 case REG_PSP: *regp = 1; break;
2976 case REG_PRIUNAT: *regp = 2; break;
2977 case REG_BR + 0: *regp = 3; break;
2978 case REG_AR + AR_BSP: *regp = 4; break;
2979 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2980 case REG_AR + AR_RNAT: *regp = 6; break;
2981 case REG_AR + AR_UNAT: *regp = 7; break;
2982 case REG_AR + AR_FPSR: *regp = 8; break;
2983 case REG_AR + AR_PFS: *regp = 9; break;
2984 case REG_AR + AR_LC: *regp = 10; break;
2985
2986 default:
2987 return 0;
2988 }
2989 }
2990 return 1;
197865e8 2991}
e0c9811a
JW		 2992
2993static int
2994convert_expr_to_xy_reg (e, xy, regp)
2995 expressionS *e;
2996 unsigned int *xy;
2997 unsigned int *regp;
2998{
2999 unsigned int reg;
3000
3001 if (e->X_op != O_register)
3002 return 0;
3003
3004 reg = e->X_add_number;
3005
2434f565 3006 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
e0c9811a
JW		 3007 {
3008 *xy = 0;
3009 *regp = reg - REG_GR;
3010 }
2434f565 3011 else if (reg >= REG_FR && reg <= (REG_FR + 127))
e0c9811a
JW		 3012 {
3013 *xy = 1;
3014 *regp = reg - REG_FR;
3015 }
2434f565 3016 else if (reg >= REG_BR && reg <= (REG_BR + 7))
e0c9811a
JW		 3017 {
3018 *xy = 2;
3019 *regp = reg - REG_BR;
3020 }
3021 else
3022 return -1;
3023 return 1;
197865e8 3024}
e0c9811a 3025
d9201763
L		 3026static void
3027dot_align (int arg)
3028{
3029 /* The current frag is an alignment frag. */
3030 align_frag = frag_now;
3031 s_align_bytes (arg);
3032}
3033
800eeca4
JW		 3034static void
3035dot_radix (dummy)
2434f565 3036 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3037{
3038 int radix;
3039
3040 SKIP_WHITESPACE ();
3041 radix = *input_line_pointer++;
3042
3043 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3044 {
3045 as_bad ("Radix `%c' unsupported", *input_line_pointer);
542d6675 3046 ignore_rest_of_line ();
800eeca4
JW		 3047 return;
3048 }
3049}
3050
196e8040
JW		 3051/* Helper function for .loc directives. If the assembler is not generating
3052 line number info, then we need to remember which instructions have a .loc
3053 directive, and only call dwarf2_gen_line_info for those instructions. */
3054
3055static void
3056dot_loc (int x)
3057{
3058 CURR_SLOT.loc_directive_seen = 1;
3059 dwarf2_directive_loc (x);
3060}
3061
800eeca4
JW		 3062/* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3063static void
3064dot_special_section (which)
3065 int which;
3066{
3067 set_section ((char *) special_section_name[which]);
3068}
3069
3070static void
3071add_unwind_entry (ptr)
3072 unw_rec_list *ptr;
3073{
e0c9811a
JW		 3074 if (unwind.tail)
3075 unwind.tail->next = ptr;
800eeca4 3076 else
e0c9811a
JW		 3077 unwind.list = ptr;
3078 unwind.tail = ptr;
800eeca4
JW		 3079
3080 /* The current entry can in fact be a chain of unwind entries. */
e0c9811a
JW		 3081 if (unwind.current_entry == NULL)
3082 unwind.current_entry = ptr;
800eeca4
JW		 3083}
3084
197865e8 3085static void
800eeca4 3086dot_fframe (dummy)
2434f565 3087 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3088{
3089 expressionS e;
e0c9811a 3090
800eeca4 3091 parse_operand (&e);
197865e8 3092
800eeca4
JW		 3093 if (e.X_op != O_constant)
3094 as_bad ("Operand to .fframe must be a constant");
3095 else
e0c9811a
JW		 3096 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3097}
3098
197865e8 3099static void
e0c9811a 3100dot_vframe (dummy)
2434f565 3101 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3102{
3103 expressionS e;
3104 unsigned reg;
3105
3106 parse_operand (&e);
3107 reg = e.X_add_number - REG_GR;
3108 if (e.X_op == O_register && reg < 128)
800eeca4 3109 {
e0c9811a 3110 add_unwind_entry (output_mem_stack_v ());
30d25259
RH		 3111 if (! (unwind.prologue_mask & 2))
3112 add_unwind_entry (output_psp_gr (reg));
800eeca4 3113 }
e0c9811a
JW		 3114 else
3115 as_bad ("First operand to .vframe must be a general register");
800eeca4
JW		 3116}
3117
197865e8 3118static void
e0c9811a 3119dot_vframesp (dummy)
2434f565 3120 int dummy ATTRIBUTE_UNUSED;
800eeca4 3121{
e0c9811a
JW		 3122 expressionS e;
3123
3124 parse_operand (&e);
3125 if (e.X_op == O_constant)
3126 {
3127 add_unwind_entry (output_mem_stack_v ());
3128 add_unwind_entry (output_psp_sprel (e.X_add_number));
3129 }
3130 else
69906a9b 3131 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
e0c9811a
JW		 3132}
3133
197865e8 3134static void
e0c9811a 3135dot_vframepsp (dummy)
2434f565 3136 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3137{
3138 expressionS e;
3139
3140 parse_operand (&e);
3141 if (e.X_op == O_constant)
3142 {
3143 add_unwind_entry (output_mem_stack_v ());
3144 add_unwind_entry (output_psp_sprel (e.X_add_number));
3145 }
3146 else
69906a9b 3147 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
800eeca4
JW		 3148}
3149
197865e8 3150static void
800eeca4 3151dot_save (dummy)
2434f565 3152 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3153{
3154 expressionS e1, e2;
3155 int sep;
3156 int reg1, reg2;
3157
3158 sep = parse_operand (&e1);
3159 if (sep != ',')
3160 as_bad ("No second operand to .save");
3161 sep = parse_operand (&e2);
3162
e0c9811a 3163 reg1 = e1.X_add_number;
800eeca4 3164 reg2 = e2.X_add_number - REG_GR;
197865e8 3165
800eeca4 3166 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e0c9811a 3167 if (e1.X_op == O_register)
800eeca4 3168 {
542d6675 3169 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
800eeca4
JW		 3170 {
3171 switch (reg1)
3172 {
542d6675
KH		 3173 case REG_AR + AR_BSP:
3174 add_unwind_entry (output_bsp_when ());
3175 add_unwind_entry (output_bsp_gr (reg2));
3176 break;
3177 case REG_AR + AR_BSPSTORE:
3178 add_unwind_entry (output_bspstore_when ());
3179 add_unwind_entry (output_bspstore_gr (reg2));
3180 break;
3181 case REG_AR + AR_RNAT:
3182 add_unwind_entry (output_rnat_when ());
3183 add_unwind_entry (output_rnat_gr (reg2));
3184 break;
3185 case REG_AR + AR_UNAT:
3186 add_unwind_entry (output_unat_when ());
3187 add_unwind_entry (output_unat_gr (reg2));
3188 break;
3189 case REG_AR + AR_FPSR:
3190 add_unwind_entry (output_fpsr_when ());
3191 add_unwind_entry (output_fpsr_gr (reg2));
3192 break;
3193 case REG_AR + AR_PFS:
3194 add_unwind_entry (output_pfs_when ());
3195 if (! (unwind.prologue_mask & 4))
3196 add_unwind_entry (output_pfs_gr (reg2));
3197 break;
3198 case REG_AR + AR_LC:
3199 add_unwind_entry (output_lc_when ());
3200 add_unwind_entry (output_lc_gr (reg2));
3201 break;
3202 case REG_BR:
3203 add_unwind_entry (output_rp_when ());
3204 if (! (unwind.prologue_mask & 8))
3205 add_unwind_entry (output_rp_gr (reg2));
3206 break;
3207 case REG_PR:
3208 add_unwind_entry (output_preds_when ());
3209 if (! (unwind.prologue_mask & 1))
3210 add_unwind_entry (output_preds_gr (reg2));
3211 break;
3212 case REG_PRIUNAT:
3213 add_unwind_entry (output_priunat_when_gr ());
3214 add_unwind_entry (output_priunat_gr (reg2));
3215 break;
3216 default:
3217 as_bad ("First operand not a valid register");
800eeca4
JW		 3218 }
3219 }
3220 else
3221 as_bad (" Second operand not a valid register");
3222 }
3223 else
e0c9811a 3224 as_bad ("First operand not a register");
800eeca4
JW		 3225}
3226
197865e8 3227static void
800eeca4 3228dot_restore (dummy)
2434f565 3229 int dummy ATTRIBUTE_UNUSED;
800eeca4 3230{
e0c9811a 3231 expressionS e1, e2;
33d01f33 3232 unsigned long ecount; /* # of _additional_ regions to pop */
e0c9811a
JW		 3233 int sep;
3234
3235 sep = parse_operand (&e1);
3236 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3237 {
3238 as_bad ("First operand to .restore must be stack pointer (sp)");
3239 return;
3240 }
3241
3242 if (sep == ',')
3243 {
3244 parse_operand (&e2);
33d01f33 3245 if (e2.X_op != O_constant || e2.X_add_number < 0)
e0c9811a 3246 {
33d01f33 3247 as_bad ("Second operand to .restore must be a constant >= 0");
e0c9811a
JW		 3248 return;
3249 }
33d01f33 3250 ecount = e2.X_add_number;
e0c9811a 3251 }
33d01f33
JW		 3252 else
3253 ecount = unwind.prologue_count - 1;
6290819d
NC		 3254
3255 if (ecount >= unwind.prologue_count)
3256 {
3257 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3258 ecount + 1, unwind.prologue_count);
3259 return;
3260 }
3261
e0c9811a 3262 add_unwind_entry (output_epilogue (ecount));
33d01f33
JW		 3263
3264 if (ecount < unwind.prologue_count)
3265 unwind.prologue_count -= ecount + 1;
3266 else
3267 unwind.prologue_count = 0;
e0c9811a
JW		 3268}
3269
197865e8 3270static void
e0c9811a 3271dot_restorereg (dummy)
2434f565 3272 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3273{
3274 unsigned int ab, reg;
3275 expressionS e;
3276
3277 parse_operand (&e);
3278
3279 if (!convert_expr_to_ab_reg (&e, &ab, &reg))
3280 {
3281 as_bad ("First operand to .restorereg must be a preserved register");
3282 return;
3283 }
3284 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3285}
3286
197865e8 3287static void
e0c9811a 3288dot_restorereg_p (dummy)
2434f565 3289 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3290{
3291 unsigned int qp, ab, reg;
3292 expressionS e1, e2;
3293 int sep;
3294
3295 sep = parse_operand (&e1);
3296 if (sep != ',')
3297 {
3298 as_bad ("No second operand to .restorereg.p");
3299 return;
3300 }
3301
3302 parse_operand (&e2);
3303
3304 qp = e1.X_add_number - REG_P;
3305 if (e1.X_op != O_register || qp > 63)
3306 {
3307 as_bad ("First operand to .restorereg.p must be a predicate");
3308 return;
3309 }
3310
3311 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
3312 {
3313 as_bad ("Second operand to .restorereg.p must be a preserved register");
3314 return;
3315 }
3316 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
800eeca4
JW		 3317}
3318
2d6ed997
L		 3319static char *special_linkonce_name[] =
3320 {
3321 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3322 };
3323
3324static void
d6afba4b 3325start_unwind_section (const segT text_seg, int sec_index, int linkonce_empty)
2d6ed997
L		 3326{
3327 /*
3328 Use a slightly ugly scheme to derive the unwind section names from
3329 the text section name:
3330
3331 text sect. unwind table sect.
3332 name: name: comments:
3333 ---------- ----------------- --------------------------------
3334 .text .IA_64.unwind
3335 .text.foo .IA_64.unwind.text.foo
3336 .foo .IA_64.unwind.foo
3337 .gnu.linkonce.t.foo
3338 .gnu.linkonce.ia64unw.foo
3339 _info .IA_64.unwind_info gas issues error message (ditto)
3340 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3341
3342 This mapping is done so that:
3343
3344 (a) An object file with unwind info only in .text will use
3345 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3346 This follows the letter of the ABI and also ensures backwards
3347 compatibility with older toolchains.
3348
3349 (b) An object file with unwind info in multiple text sections
3350 will use separate unwind sections for each text section.
3351 This allows us to properly set the "sh_info" and "sh_link"
3352 fields in SHT_IA_64_UNWIND as required by the ABI and also
3353 lets GNU ld support programs with multiple segments
3354 containing unwind info (as might be the case for certain
3355 embedded applications).
3356
3357 (c) An error is issued if there would be a name clash.
3358 */
3359
3360 const char *text_name, *sec_text_name;
3361 char *sec_name;
3362 const char *prefix = special_section_name [sec_index];
3363 const char *suffix;
3364 size_t prefix_len, suffix_len, sec_name_len;
3365
3366 sec_text_name = segment_name (text_seg);
3367 text_name = sec_text_name;
3368 if (strncmp (text_name, "_info", 5) == 0)
3369 {
3370 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3371 text_name);
3372 ignore_rest_of_line ();
3373 return;
3374 }
3375 if (strcmp (text_name, ".text") == 0)
3376 text_name = "";
3377
3378 /* Build the unwind section name by appending the (possibly stripped)
3379 text section name to the unwind prefix. */
3380 suffix = text_name;
3381 if (strncmp (text_name, ".gnu.linkonce.t.",
3382 sizeof (".gnu.linkonce.t.") - 1) == 0)
3383 {
3384 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3385 suffix += sizeof (".gnu.linkonce.t.") - 1;
3386 }
d6afba4b
JJ		 3387 else if (linkonce_empty)
3388 return;
2d6ed997
L		 3389
3390 prefix_len = strlen (prefix);
3391 suffix_len = strlen (suffix);
3392 sec_name_len = prefix_len + suffix_len;
3393 sec_name = alloca (sec_name_len + 1);
3394 memcpy (sec_name, prefix, prefix_len);
3395 memcpy (sec_name + prefix_len, suffix, suffix_len);
3396 sec_name [sec_name_len] = '\0';
3397
3398 /* Handle COMDAT group. */
3399 if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0)
3400 {
3401 char *section;
3402 size_t len, group_name_len;
3403 const char *group_name = elf_group_name (text_seg);
3404
3405 if (group_name == NULL)
3406 {
3407 as_bad ("Group section `%s' has no group signature",
3408 sec_text_name);
3409 ignore_rest_of_line ();
3410 return;
3411 }
3412 /* We have to construct a fake section directive. */
3413 group_name_len = strlen (group_name);
3414 len = (sec_name_len
3415 + 16 /* ,"aG",@progbits, */
3416 + group_name_len /* ,group_name */
3417 + 7); /* ,comdat */
3418
3419 section = alloca (len + 1);
3420 memcpy (section, sec_name, sec_name_len);
3421 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3422 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3423 memcpy (section + len - 7, ",comdat", 7);
3424 section [len] = '\0';
3425 set_section (section);
3426 }
3427 else
3428 {
3429 set_section (sec_name);
3430 bfd_set_section_flags (stdoutput, now_seg,
3431 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3432 }
38ce5b11
L		 3433
3434 elf_linked_to_section (now_seg) = text_seg;
2d6ed997
L		 3435}
3436
73f20958 3437static void
2d6ed997 3438generate_unwind_image (const segT text_seg)
800eeca4 3439{
73f20958
L		 3440 int size, pad;
3441 unw_rec_list *list;
800eeca4 3442
c97b7ef6
JW		 3443 /* Mark the end of the unwind info, so that we can compute the size of the
3444 last unwind region. */
3445 add_unwind_entry (output_endp ());
3446
10850f29
JW		 3447 /* Force out pending instructions, to make sure all unwind records have
3448 a valid slot_number field. */
3449 ia64_flush_insns ();
3450
800eeca4 3451 /* Generate the unwind record. */
73f20958 3452 list = optimize_unw_records (unwind.list);
b5e0fabd 3453 fixup_unw_records (list, 1);
73f20958
L		 3454 size = calc_record_size (list);
3455
3456 if (size > 0 || unwind.force_unwind_entry)
3457 {
3458 unwind.force_unwind_entry = 0;
3459 /* pad to pointer-size boundary. */
3460 pad = size % md.pointer_size;
3461 if (pad != 0)
3462 size += md.pointer_size - pad;
f7e323d5
JB		 3463 /* Add 8 for the header. */
3464 size += 8;
3465 /* Add a pointer for the personality offset. */
3466 if (unwind.personality_routine)
3467 size += md.pointer_size;
73f20958 3468 }
6290819d 3469
800eeca4
JW		 3470 /* If there are unwind records, switch sections, and output the info. */
3471 if (size != 0)
3472 {
800eeca4 3473 expressionS exp;
1cd8ff38 3474 bfd_reloc_code_real_type reloc;
91a2ae2a 3475
d6afba4b 3476 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 0);
800eeca4 3477
557debba
JW		 3478 /* Make sure the section has 4 byte alignment for ILP32 and
3479 8 byte alignment for LP64. */
3480 frag_align (md.pointer_size_shift, 0, 0);
3481 record_alignment (now_seg, md.pointer_size_shift);
5e7474a7 3482
800eeca4 3483 /* Set expression which points to start of unwind descriptor area. */
e0c9811a 3484 unwind.info = expr_build_dot ();
73f20958
L		 3485
3486 frag_var (rs_machine_dependent, size, size, 0, 0,
652ca075
L		 3487 (offsetT) (long) unwind.personality_routine,
3488 (char *) list);
91a2ae2a 3489
800eeca4 3490 /* Add the personality address to the image. */
e0c9811a 3491 if (unwind.personality_routine != 0)
542d6675 3492 {
40449e9f 3493 exp.X_op = O_symbol;
e0c9811a 3494 exp.X_add_symbol = unwind.personality_routine;
800eeca4 3495 exp.X_add_number = 0;
1cd8ff38
NC		 3496
3497 if (md.flags & EF_IA_64_BE)
3498 {
3499 if (md.flags & EF_IA_64_ABI64)
3500 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3501 else
3502 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3503 }
40449e9f 3504 else
1cd8ff38
NC		 3505 {
3506 if (md.flags & EF_IA_64_ABI64)
3507 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3508 else
3509 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3510 }
3511
3512 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
40449e9f 3513 md.pointer_size, &exp, 0, reloc);
e0c9811a 3514 unwind.personality_routine = 0;
542d6675 3515 }
800eeca4 3516 }
d6afba4b
JJ		 3517 else
3518 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 1);
800eeca4 3519
6290819d 3520 free_saved_prologue_counts ();
e0c9811a 3521 unwind.list = unwind.tail = unwind.current_entry = NULL;
800eeca4
JW		 3522}
3523
197865e8 3524static void
542d6675 3525dot_handlerdata (dummy)
2434f565 3526 int dummy ATTRIBUTE_UNUSED;
800eeca4 3527{
91a2ae2a
RH		 3528 unwind.force_unwind_entry = 1;
3529
3530 /* Remember which segment we're in so we can switch back after .endp */
3531 unwind.saved_text_seg = now_seg;
3532 unwind.saved_text_subseg = now_subseg;
3533
3534 /* Generate unwind info into unwind-info section and then leave that
3535 section as the currently active one so dataXX directives go into
3536 the language specific data area of the unwind info block. */
2d6ed997 3537 generate_unwind_image (now_seg);
e0c9811a 3538 demand_empty_rest_of_line ();
800eeca4
JW		 3539}
3540
197865e8 3541static void
800eeca4 3542dot_unwentry (dummy)
2434f565 3543 int dummy ATTRIBUTE_UNUSED;
800eeca4 3544{
91a2ae2a 3545 unwind.force_unwind_entry = 1;
e0c9811a 3546 demand_empty_rest_of_line ();
800eeca4
JW		 3547}
3548
197865e8 3549static void
800eeca4 3550dot_altrp (dummy)
2434f565 3551 int dummy ATTRIBUTE_UNUSED;
800eeca4 3552{
e0c9811a
JW		 3553 expressionS e;
3554 unsigned reg;
3555
3556 parse_operand (&e);
3557 reg = e.X_add_number - REG_BR;
3558 if (e.X_op == O_register && reg < 8)
3559 add_unwind_entry (output_rp_br (reg));
3560 else
3561 as_bad ("First operand not a valid branch register");
800eeca4
JW		 3562}
3563
197865e8 3564static void
e0c9811a
JW		 3565dot_savemem (psprel)
3566 int psprel;
800eeca4
JW		 3567{
3568 expressionS e1, e2;
3569 int sep;
3570 int reg1, val;
3571
3572 sep = parse_operand (&e1);
3573 if (sep != ',')
e0c9811a 3574 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
800eeca4
JW		 3575 sep = parse_operand (&e2);
3576
e0c9811a 3577 reg1 = e1.X_add_number;
800eeca4 3578 val = e2.X_add_number;
197865e8 3579
800eeca4 3580 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
e0c9811a 3581 if (e1.X_op == O_register)
800eeca4
JW		 3582 {
3583 if (e2.X_op == O_constant)
3584 {
3585 switch (reg1)
3586 {
542d6675
KH		 3587 case REG_AR + AR_BSP:
3588 add_unwind_entry (output_bsp_when ());
3589 add_unwind_entry ((psprel
3590 ? output_bsp_psprel
3591 : output_bsp_sprel) (val));
3592 break;
3593 case REG_AR + AR_BSPSTORE:
3594 add_unwind_entry (output_bspstore_when ());
3595 add_unwind_entry ((psprel
3596 ? output_bspstore_psprel
3597 : output_bspstore_sprel) (val));
3598 break;
3599 case REG_AR + AR_RNAT:
3600 add_unwind_entry (output_rnat_when ());
3601 add_unwind_entry ((psprel
3602 ? output_rnat_psprel
3603 : output_rnat_sprel) (val));
3604 break;
3605 case REG_AR + AR_UNAT:
3606 add_unwind_entry (output_unat_when ());
3607 add_unwind_entry ((psprel
3608 ? output_unat_psprel
3609 : output_unat_sprel) (val));
3610 break;
3611 case REG_AR + AR_FPSR:
3612 add_unwind_entry (output_fpsr_when ());
3613 add_unwind_entry ((psprel
3614 ? output_fpsr_psprel
3615 : output_fpsr_sprel) (val));
3616 break;
3617 case REG_AR + AR_PFS:
3618 add_unwind_entry (output_pfs_when ());
3619 add_unwind_entry ((psprel
3620 ? output_pfs_psprel
3621 : output_pfs_sprel) (val));
3622 break;
3623 case REG_AR + AR_LC:
3624 add_unwind_entry (output_lc_when ());
3625 add_unwind_entry ((psprel
3626 ? output_lc_psprel
3627 : output_lc_sprel) (val));
3628 break;
3629 case REG_BR:
3630 add_unwind_entry (output_rp_when ());
3631 add_unwind_entry ((psprel
3632 ? output_rp_psprel
3633 : output_rp_sprel) (val));
3634 break;
3635 case REG_PR:
3636 add_unwind_entry (output_preds_when ());
3637 add_unwind_entry ((psprel
3638 ? output_preds_psprel
3639 : output_preds_sprel) (val));
3640 break;
3641 case REG_PRIUNAT:
3642 add_unwind_entry (output_priunat_when_mem ());
3643 add_unwind_entry ((psprel
3644 ? output_priunat_psprel
3645 : output_priunat_sprel) (val));
3646 break;
3647 default:
3648 as_bad ("First operand not a valid register");
800eeca4
JW		 3649 }
3650 }
3651 else
3652 as_bad (" Second operand not a valid constant");
3653 }
3654 else
e0c9811a 3655 as_bad ("First operand not a register");
800eeca4
JW		 3656}
3657
197865e8 3658static void
800eeca4 3659dot_saveg (dummy)
2434f565 3660 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3661{
3662 expressionS e1, e2;
3663 int sep;
3664 sep = parse_operand (&e1);
3665 if (sep == ',')
3666 parse_operand (&e2);
197865e8 3667
800eeca4
JW		 3668 if (e1.X_op != O_constant)
3669 as_bad ("First operand to .save.g must be a constant.");
3670 else
3671 {
3672 int grmask = e1.X_add_number;
3673 if (sep != ',')
3674 add_unwind_entry (output_gr_mem (grmask));
3675 else
542d6675 3676 {
800eeca4 3677 int reg = e2.X_add_number - REG_GR;
542d6675 3678 if (e2.X_op == O_register && reg >= 0 && reg < 128)
800eeca4
JW		 3679 add_unwind_entry (output_gr_gr (grmask, reg));
3680 else
3681 as_bad ("Second operand is an invalid register.");
3682 }
3683 }
3684}
3685
197865e8 3686static void
800eeca4 3687dot_savef (dummy)
2434f565 3688 int dummy ATTRIBUTE_UNUSED;
800eeca4 3689{
e0c9811a 3690 expressionS e1;
800eeca4
JW		 3691 int sep;
3692 sep = parse_operand (&e1);
197865e8 3693
800eeca4
JW		 3694 if (e1.X_op != O_constant)
3695 as_bad ("Operand to .save.f must be a constant.");
3696 else
e0c9811a 3697 add_unwind_entry (output_fr_mem (e1.X_add_number));
800eeca4
JW		 3698}
3699
197865e8 3700static void
800eeca4 3701dot_saveb (dummy)
2434f565 3702 int dummy ATTRIBUTE_UNUSED;
800eeca4 3703{
e0c9811a
JW		 3704 expressionS e1, e2;
3705 unsigned int reg;
3706 unsigned char sep;
3707 int brmask;
3708
800eeca4 3709 sep = parse_operand (&e1);
800eeca4 3710 if (e1.X_op != O_constant)
800eeca4 3711 {
e0c9811a
JW		 3712 as_bad ("First operand to .save.b must be a constant.");
3713 return;
800eeca4 3714 }
e0c9811a
JW		 3715 brmask = e1.X_add_number;
3716
3717 if (sep == ',')
3718 {
3719 sep = parse_operand (&e2);
3720 reg = e2.X_add_number - REG_GR;
3721 if (e2.X_op != O_register || reg > 127)
3722 {
3723 as_bad ("Second operand to .save.b must be a general register.");
3724 return;
3725 }
3726 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3727 }
3728 else
3729 add_unwind_entry (output_br_mem (brmask));
3730
3731 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 3732 demand_empty_rest_of_line ();
800eeca4
JW		 3733}
3734
197865e8 3735static void
800eeca4 3736dot_savegf (dummy)
2434f565 3737 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3738{
3739 expressionS e1, e2;
3740 int sep;
3741 sep = parse_operand (&e1);
3742 if (sep == ',')
3743 parse_operand (&e2);
197865e8 3744
800eeca4
JW		 3745 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3746 as_bad ("Both operands of .save.gf must be constants.");
3747 else
3748 {
3749 int grmask = e1.X_add_number;
3750 int frmask = e2.X_add_number;
3751 add_unwind_entry (output_frgr_mem (grmask, frmask));
3752 }
3753}
3754
197865e8 3755static void
800eeca4 3756dot_spill (dummy)
2434f565 3757 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 3758{
3759 expressionS e;
e0c9811a
JW		 3760 unsigned char sep;
3761
3762 sep = parse_operand (&e);
3763 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 3764 demand_empty_rest_of_line ();
197865e8 3765
800eeca4
JW		 3766 if (e.X_op != O_constant)
3767 as_bad ("Operand to .spill must be a constant");
3768 else
e0c9811a
JW		 3769 add_unwind_entry (output_spill_base (e.X_add_number));
3770}
3771
3772static void
3773dot_spillreg (dummy)
2434f565 3774 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3775{
3776 int sep, ab, xy, reg, treg;
3777 expressionS e1, e2;
3778
3779 sep = parse_operand (&e1);
3780 if (sep != ',')
3781 {
3782 as_bad ("No second operand to .spillreg");
3783 return;
3784 }
3785
3786 parse_operand (&e2);
3787
3788 if (!convert_expr_to_ab_reg (&e1, &ab, &reg))
800eeca4 3789 {
e0c9811a
JW		 3790 as_bad ("First operand to .spillreg must be a preserved register");
3791 return;
800eeca4 3792 }
e0c9811a
JW		 3793
3794 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3795 {
3796 as_bad ("Second operand to .spillreg must be a register");
3797 return;
3798 }
3799
3800 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3801}
3802
3803static void
3804dot_spillmem (psprel)
3805 int psprel;
3806{
3807 expressionS e1, e2;
3808 int sep, ab, reg;
3809
3810 sep = parse_operand (&e1);
3811 if (sep != ',')
3812 {
3813 as_bad ("Second operand missing");
3814 return;
3815 }
3816
3817 parse_operand (&e2);
3818
3819 if (!convert_expr_to_ab_reg (&e1, &ab, &reg))
3820 {
3821 as_bad ("First operand to .spill%s must be a preserved register",
3822 psprel ? "psp" : "sp");
3823 return;
3824 }
3825
3826 if (e2.X_op != O_constant)
3827 {
3828 as_bad ("Second operand to .spill%s must be a constant",
3829 psprel ? "psp" : "sp");
3830 return;
3831 }
3832
3833 if (psprel)
3834 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3835 else
3836 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3837}
3838
3839static void
3840dot_spillreg_p (dummy)
2434f565 3841 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3842{
3843 int sep, ab, xy, reg, treg;
3844 expressionS e1, e2, e3;
3845 unsigned int qp;
3846
3847 sep = parse_operand (&e1);
3848 if (sep != ',')
3849 {
3850 as_bad ("No second and third operand to .spillreg.p");
3851 return;
3852 }
3853
3854 sep = parse_operand (&e2);
3855 if (sep != ',')
3856 {
3857 as_bad ("No third operand to .spillreg.p");
3858 return;
3859 }
3860
3861 parse_operand (&e3);
3862
3863 qp = e1.X_add_number - REG_P;
3864
3865 if (e1.X_op != O_register || qp > 63)
3866 {
3867 as_bad ("First operand to .spillreg.p must be a predicate");
3868 return;
3869 }
3870
3871 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
3872 {
3873 as_bad ("Second operand to .spillreg.p must be a preserved register");
3874 return;
3875 }
3876
3877 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
3878 {
3879 as_bad ("Third operand to .spillreg.p must be a register");
3880 return;
3881 }
3882
3883 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
3884}
3885
3886static void
3887dot_spillmem_p (psprel)
3888 int psprel;
3889{
3890 expressionS e1, e2, e3;
3891 int sep, ab, reg;
3892 unsigned int qp;
3893
3894 sep = parse_operand (&e1);
3895 if (sep != ',')
3896 {
3897 as_bad ("Second operand missing");
3898 return;
3899 }
3900
3901 parse_operand (&e2);
3902 if (sep != ',')
3903 {
3904 as_bad ("Second operand missing");
3905 return;
3906 }
3907
3908 parse_operand (&e3);
3909
3910 qp = e1.X_add_number - REG_P;
3911 if (e1.X_op != O_register || qp > 63)
3912 {
3913 as_bad ("First operand to .spill%s_p must be a predicate",
3914 psprel ? "psp" : "sp");
3915 return;
3916 }
3917
3918 if (!convert_expr_to_ab_reg (&e2, &ab, &reg))
3919 {
3920 as_bad ("Second operand to .spill%s_p must be a preserved register",
3921 psprel ? "psp" : "sp");
3922 return;
3923 }
3924
3925 if (e3.X_op != O_constant)
3926 {
3927 as_bad ("Third operand to .spill%s_p must be a constant",
3928 psprel ? "psp" : "sp");
3929 return;
3930 }
3931
3932 if (psprel)
fa7fda74 3933 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
e0c9811a 3934 else
fa7fda74 3935 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
e0c9811a
JW		 3936}
3937
6290819d
NC		 3938static unsigned int
3939get_saved_prologue_count (lbl)
3940 unsigned long lbl;
3941{
3942 label_prologue_count *lpc = unwind.saved_prologue_counts;
3943
3944 while (lpc != NULL && lpc->label_number != lbl)
3945 lpc = lpc->next;
3946
3947 if (lpc != NULL)
3948 return lpc->prologue_count;
3949
3950 as_bad ("Missing .label_state %ld", lbl);
3951 return 1;
3952}
3953
3954static void
3955save_prologue_count (lbl, count)
3956 unsigned long lbl;
3957 unsigned int count;
3958{
3959 label_prologue_count *lpc = unwind.saved_prologue_counts;
3960
3961 while (lpc != NULL && lpc->label_number != lbl)
3962 lpc = lpc->next;
3963
3964 if (lpc != NULL)
3965 lpc->prologue_count = count;
3966 else
3967 {
40449e9f 3968 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
6290819d
NC		 3969
3970 new_lpc->next = unwind.saved_prologue_counts;
3971 new_lpc->label_number = lbl;
3972 new_lpc->prologue_count = count;
3973 unwind.saved_prologue_counts = new_lpc;
3974 }
3975}
3976
3977static void
3978free_saved_prologue_counts ()
3979{
40449e9f
KH		 3980 label_prologue_count *lpc = unwind.saved_prologue_counts;
3981 label_prologue_count *next;
6290819d
NC		 3982
3983 while (lpc != NULL)
3984 {
3985 next = lpc->next;
3986 free (lpc);
3987 lpc = next;
3988 }
3989
3990 unwind.saved_prologue_counts = NULL;
3991}
3992
e0c9811a
JW		 3993static void
3994dot_label_state (dummy)
2434f565 3995 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 3996{
3997 expressionS e;
3998
3999 parse_operand (&e);
4000 if (e.X_op != O_constant)
4001 {
4002 as_bad ("Operand to .label_state must be a constant");
4003 return;
4004 }
4005 add_unwind_entry (output_label_state (e.X_add_number));
6290819d 4006 save_prologue_count (e.X_add_number, unwind.prologue_count);
e0c9811a
JW		 4007}
4008
4009static void
4010dot_copy_state (dummy)
2434f565 4011 int dummy ATTRIBUTE_UNUSED;
e0c9811a
JW		 4012{
4013 expressionS e;
4014
4015 parse_operand (&e);
4016 if (e.X_op != O_constant)
4017 {
4018 as_bad ("Operand to .copy_state must be a constant");
4019 return;
4020 }
4021 add_unwind_entry (output_copy_state (e.X_add_number));
6290819d 4022 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
800eeca4
JW		 4023}
4024
197865e8 4025static void
800eeca4 4026dot_unwabi (dummy)
2434f565 4027 int dummy ATTRIBUTE_UNUSED;
800eeca4 4028{
e0c9811a
JW		 4029 expressionS e1, e2;
4030 unsigned char sep;
4031
4032 sep = parse_operand (&e1);
4033 if (sep != ',')
4034 {
4035 as_bad ("Second operand to .unwabi missing");
4036 return;
4037 }
4038 sep = parse_operand (&e2);
4039 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 4040 demand_empty_rest_of_line ();
e0c9811a
JW		 4041
4042 if (e1.X_op != O_constant)
4043 {
4044 as_bad ("First operand to .unwabi must be a constant");
4045 return;
4046 }
4047
4048 if (e2.X_op != O_constant)
4049 {
4050 as_bad ("Second operand to .unwabi must be a constant");
4051 return;
4052 }
4053
4054 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
800eeca4
JW		 4055}
4056
197865e8 4057static void
800eeca4 4058dot_personality (dummy)
2434f565 4059 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4060{
4061 char *name, *p, c;
4062 SKIP_WHITESPACE ();
4063 name = input_line_pointer;
4064 c = get_symbol_end ();
4065 p = input_line_pointer;
e0c9811a 4066 unwind.personality_routine = symbol_find_or_make (name);
91a2ae2a 4067 unwind.force_unwind_entry = 1;
800eeca4
JW		 4068 *p = c;
4069 SKIP_WHITESPACE ();
4070 demand_empty_rest_of_line ();
4071}
4072
4073static void
4074dot_proc (dummy)
2434f565 4075 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4076{
4077 char *name, *p, c;
4078 symbolS *sym;
4079
e0c9811a
JW		 4080 unwind.proc_start = expr_build_dot ();
4081 /* Parse names of main and alternate entry points and mark them as
542d6675 4082 function symbols: */
800eeca4
JW		 4083 while (1)
4084 {
4085 SKIP_WHITESPACE ();
4086 name = input_line_pointer;
4087 c = get_symbol_end ();
4088 p = input_line_pointer;
4089 sym = symbol_find_or_make (name);
e0c9811a 4090 if (unwind.proc_start == 0)
542d6675 4091 {
e0c9811a 4092 unwind.proc_start = sym;
800eeca4
JW		 4093 }
4094 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4095 *p = c;
4096 SKIP_WHITESPACE ();
4097 if (*input_line_pointer != ',')
4098 break;
4099 ++input_line_pointer;
4100 }
4101 demand_empty_rest_of_line ();
4102 ia64_do_align (16);
4103
33d01f33 4104 unwind.prologue_count = 0;
e0c9811a
JW		 4105 unwind.list = unwind.tail = unwind.current_entry = NULL;
4106 unwind.personality_routine = 0;
800eeca4
JW		 4107}
4108
4109static void
4110dot_body (dummy)
2434f565 4111 int dummy ATTRIBUTE_UNUSED;
800eeca4 4112{
e0c9811a 4113 unwind.prologue = 0;
30d25259
RH		 4114 unwind.prologue_mask = 0;
4115
800eeca4 4116 add_unwind_entry (output_body ());
e0c9811a 4117 demand_empty_rest_of_line ();
800eeca4
JW		 4118}
4119
4120static void
4121dot_prologue (dummy)
2434f565 4122 int dummy ATTRIBUTE_UNUSED;
800eeca4 4123{
e0c9811a 4124 unsigned char sep;
2434f565 4125 int mask = 0, grsave = 0;
e0c9811a 4126
e0c9811a 4127 if (!is_it_end_of_statement ())
800eeca4
JW		 4128 {
4129 expressionS e1, e2;
800eeca4
JW		 4130 sep = parse_operand (&e1);
4131 if (sep != ',')
4132 as_bad ("No second operand to .prologue");
4133 sep = parse_operand (&e2);
e0c9811a 4134 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
c95b35a9 4135 demand_empty_rest_of_line ();
800eeca4
JW		 4136
4137 if (e1.X_op == O_constant)
542d6675 4138 {
30d25259
RH		 4139 mask = e1.X_add_number;
4140
800eeca4 4141 if (e2.X_op == O_constant)
30d25259
RH		 4142 grsave = e2.X_add_number;
4143 else if (e2.X_op == O_register
4144 && (grsave = e2.X_add_number - REG_GR) < 128)
4145 ;
800eeca4 4146 else
30d25259
RH		 4147 as_bad ("Second operand not a constant or general register");
4148
4149 add_unwind_entry (output_prologue_gr (mask, grsave));
800eeca4
JW		 4150 }
4151 else
4152 as_bad ("First operand not a constant");
4153 }
4154 else
4155 add_unwind_entry (output_prologue ());
30d25259
RH		 4156
4157 unwind.prologue = 1;
4158 unwind.prologue_mask = mask;
33d01f33 4159 ++unwind.prologue_count;
800eeca4
JW		 4160}
4161
4162static void
4163dot_endp (dummy)
2434f565 4164 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4165{
4166 expressionS e;
4167 unsigned char *ptr;
44f5c83a 4168 int bytes_per_address;
800eeca4
JW		 4169 long where;
4170 segT saved_seg;
4171 subsegT saved_subseg;
c538998c
JJ		 4172 char *name, *p, c;
4173 symbolS *sym;
800eeca4 4174
91a2ae2a
RH		 4175 if (unwind.saved_text_seg)
4176 {
4177 saved_seg = unwind.saved_text_seg;
4178 saved_subseg = unwind.saved_text_subseg;
4179 unwind.saved_text_seg = NULL;
4180 }
4181 else
4182 {
4183 saved_seg = now_seg;
4184 saved_subseg = now_subseg;
4185 }
4186
800eeca4 4187 insn_group_break (1, 0, 0);
800eeca4 4188
91a2ae2a
RH		 4189 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4190 if (!unwind.info)
2d6ed997 4191 generate_unwind_image (saved_seg);
800eeca4 4192
91a2ae2a
RH		 4193 if (unwind.info || unwind.force_unwind_entry)
4194 {
4195 subseg_set (md.last_text_seg, 0);
4196 unwind.proc_end = expr_build_dot ();
5e7474a7 4197
d6afba4b 4198 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 0);
5e7474a7 4199
557debba
JW		 4200 /* Make sure that section has 4 byte alignment for ILP32 and
4201 8 byte alignment for LP64. */
4202 record_alignment (now_seg, md.pointer_size_shift);
800eeca4 4203
557debba
JW		 4204 /* Need space for 3 pointers for procedure start, procedure end,
4205 and unwind info. */
4206 ptr = frag_more (3 * md.pointer_size);
4207 where = frag_now_fix () - (3 * md.pointer_size);
91a2ae2a 4208 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
800eeca4 4209
40449e9f 4210 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
91a2ae2a
RH		 4211 e.X_op = O_pseudo_fixup;
4212 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4213 e.X_add_number = 0;
4214 e.X_add_symbol = unwind.proc_start;
4215 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
800eeca4 4216
800eeca4
JW		 4217 e.X_op = O_pseudo_fixup;
4218 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4219 e.X_add_number = 0;
91a2ae2a
RH		 4220 e.X_add_symbol = unwind.proc_end;
4221 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4222 bytes_per_address, &e);
4223
4224 if (unwind.info)
4225 {
4226 e.X_op = O_pseudo_fixup;
4227 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4228 e.X_add_number = 0;
4229 e.X_add_symbol = unwind.info;
4230 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4231 bytes_per_address, &e);
4232 }
4233 else
4234 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4235 bytes_per_address);
800eeca4 4236
91a2ae2a 4237 }
d6afba4b
JJ		 4238 else
4239 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 1);
4240
800eeca4 4241 subseg_set (saved_seg, saved_subseg);
c538998c
JJ		 4242
4243 /* Parse names of main and alternate entry points and set symbol sizes. */
4244 while (1)
4245 {
4246 SKIP_WHITESPACE ();
4247 name = input_line_pointer;
4248 c = get_symbol_end ();
4249 p = input_line_pointer;
4250 sym = symbol_find (name);
4251 if (sym && unwind.proc_start
4252 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4253 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4254 {
4255 fragS *fr = symbol_get_frag (unwind.proc_start);
4256 fragS *frag = symbol_get_frag (sym);
4257
4258 /* Check whether the function label is at or beyond last
4259 .proc directive. */
4260 while (fr && fr != frag)
4261 fr = fr->fr_next;
4262 if (fr)
4263 {
4264 if (frag == frag_now && SEG_NORMAL (now_seg))
4265 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4266 else
4267 {
4268 symbol_get_obj (sym)->size =
4269 (expressionS *) xmalloc (sizeof (expressionS));
4270 symbol_get_obj (sym)->size->X_op = O_subtract;
4271 symbol_get_obj (sym)->size->X_add_symbol
4272 = symbol_new (FAKE_LABEL_NAME, now_seg,
4273 frag_now_fix (), frag_now);
4274 symbol_get_obj (sym)->size->X_op_symbol = sym;
4275 symbol_get_obj (sym)->size->X_add_number = 0;
4276 }
4277 }
4278 }
4279 *p = c;
4280 SKIP_WHITESPACE ();
4281 if (*input_line_pointer != ',')
4282 break;
4283 ++input_line_pointer;
4284 }
4285 demand_empty_rest_of_line ();
e0c9811a 4286 unwind.proc_start = unwind.proc_end = unwind.info = 0;
800eeca4
JW		 4287}
4288
4289static void
4290dot_template (template)
4291 int template;
4292{
4293 CURR_SLOT.user_template = template;
4294}
4295
4296static void
4297dot_regstk (dummy)
2434f565 4298 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4299{
4300 int ins, locs, outs, rots;
4301
4302 if (is_it_end_of_statement ())
4303 ins = locs = outs = rots = 0;
4304 else
4305 {
4306 ins = get_absolute_expression ();
4307 if (*input_line_pointer++ != ',')
4308 goto err;
4309 locs = get_absolute_expression ();
4310 if (*input_line_pointer++ != ',')
4311 goto err;
4312 outs = get_absolute_expression ();
4313 if (*input_line_pointer++ != ',')
4314 goto err;
4315 rots = get_absolute_expression ();
4316 }
4317 set_regstack (ins, locs, outs, rots);
4318 return;
4319
4320 err:
4321 as_bad ("Comma expected");
4322 ignore_rest_of_line ();
4323}
4324
4325static void
4326dot_rot (type)
4327 int type;
4328{
4329 unsigned num_regs, num_alloced = 0;
4330 struct dynreg **drpp, *dr;
4331 int ch, base_reg = 0;
4332 char *name, *start;
4333 size_t len;
4334
4335 switch (type)
4336 {
4337 case DYNREG_GR: base_reg = REG_GR + 32; break;
4338 case DYNREG_FR: base_reg = REG_FR + 32; break;
4339 case DYNREG_PR: base_reg = REG_P + 16; break;
4340 default: break;
4341 }
4342
542d6675 4343 /* First, remove existing names from hash table. */
800eeca4
JW		 4344 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4345 {
4346 hash_delete (md.dynreg_hash, dr->name);
4347 dr->num_regs = 0;
4348 }
4349
4350 drpp = &md.dynreg[type];
4351 while (1)
4352 {
4353 start = input_line_pointer;
4354 ch = get_symbol_end ();
4355 *input_line_pointer = ch;
4356 len = (input_line_pointer - start);
4357
4358 SKIP_WHITESPACE ();
4359 if (*input_line_pointer != '[')
4360 {
4361 as_bad ("Expected '['");
4362 goto err;
4363 }
4364 ++input_line_pointer; /* skip '[' */
4365
4366 num_regs = get_absolute_expression ();
4367
4368 if (*input_line_pointer++ != ']')
4369 {
4370 as_bad ("Expected ']'");
4371 goto err;
4372 }
4373 SKIP_WHITESPACE ();
4374
4375 num_alloced += num_regs;
4376 switch (type)
4377 {
4378 case DYNREG_GR:
4379 if (num_alloced > md.rot.num_regs)
4380 {
4381 as_bad ("Used more than the declared %d rotating registers",
4382 md.rot.num_regs);
4383 goto err;
4384 }
4385 break;
4386 case DYNREG_FR:
4387 if (num_alloced > 96)
4388 {
4389 as_bad ("Used more than the available 96 rotating registers");
4390 goto err;
4391 }
4392 break;
4393 case DYNREG_PR:
4394 if (num_alloced > 48)
4395 {
4396 as_bad ("Used more than the available 48 rotating registers");
4397 goto err;
4398 }
4399 break;
4400
4401 default:
4402 break;
4403 }
4404
4405 name = obstack_alloc (&notes, len + 1);
4406 memcpy (name, start, len);
4407 name[len] = '\0';
4408
4409 if (!*drpp)
4410 {
4411 *drpp = obstack_alloc (&notes, sizeof (*dr));
4412 memset (*drpp, 0, sizeof (*dr));
4413 }
4414
4415 dr = *drpp;
4416 dr->name = name;
4417 dr->num_regs = num_regs;
4418 dr->base = base_reg;
4419 drpp = &dr->next;
4420 base_reg += num_regs;
4421
4422 if (hash_insert (md.dynreg_hash, name, dr))
4423 {
4424 as_bad ("Attempt to redefine register set `%s'", name);
4425 goto err;
4426 }
4427
4428 if (*input_line_pointer != ',')
4429 break;
4430 ++input_line_pointer; /* skip comma */
4431 SKIP_WHITESPACE ();
4432 }
4433 demand_empty_rest_of_line ();
4434 return;
4435
4436 err:
4437 ignore_rest_of_line ();
4438}
4439
4440static void
4441dot_byteorder (byteorder)
4442 int byteorder;
4443{
10a98291
L		 4444 segment_info_type *seginfo = seg_info (now_seg);
4445
4446 if (byteorder == -1)
4447 {
4448 if (seginfo->tc_segment_info_data.endian == 0)
549f748d 4449 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
10a98291
L		 4450 byteorder = seginfo->tc_segment_info_data.endian == 1;
4451 }
4452 else
4453 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4454
4455 if (target_big_endian != byteorder)
4456 {
4457 target_big_endian = byteorder;
4458 if (target_big_endian)
4459 {
4460 ia64_number_to_chars = number_to_chars_bigendian;
4461 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4462 }
4463 else
4464 {
4465 ia64_number_to_chars = number_to_chars_littleendian;
4466 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4467 }
4468 }
800eeca4
JW		 4469}
4470
4471static void
4472dot_psr (dummy)
2434f565 4473 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4474{
4475 char *option;
4476 int ch;
4477
4478 while (1)
4479 {
4480 option = input_line_pointer;
4481 ch = get_symbol_end ();
4482 if (strcmp (option, "lsb") == 0)
4483 md.flags &= ~EF_IA_64_BE;
4484 else if (strcmp (option, "msb") == 0)
4485 md.flags |= EF_IA_64_BE;
4486 else if (strcmp (option, "abi32") == 0)
4487 md.flags &= ~EF_IA_64_ABI64;
4488 else if (strcmp (option, "abi64") == 0)
4489 md.flags |= EF_IA_64_ABI64;
4490 else
4491 as_bad ("Unknown psr option `%s'", option);
4492 *input_line_pointer = ch;
4493
4494 SKIP_WHITESPACE ();
4495 if (*input_line_pointer != ',')
4496 break;
4497
4498 ++input_line_pointer;
4499 SKIP_WHITESPACE ();
4500 }
4501 demand_empty_rest_of_line ();
4502}
4503
800eeca4
JW		 4504static void
4505dot_ln (dummy)
2434f565 4506 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4507{
4508 new_logical_line (0, get_absolute_expression ());
4509 demand_empty_rest_of_line ();
4510}
4511
542d6675 4512static char *
800eeca4
JW		 4513parse_section_name ()
4514{
4515 char *name;
4516 int len;
4517
4518 SKIP_WHITESPACE ();
4519 if (*input_line_pointer != '"')
4520 {
4521 as_bad ("Missing section name");
4522 ignore_rest_of_line ();
4523 return 0;
4524 }
4525 name = demand_copy_C_string (&len);
4526 if (!name)
4527 {
4528 ignore_rest_of_line ();
4529 return 0;
4530 }
4531 SKIP_WHITESPACE ();
4532 if (*input_line_pointer != ',')
4533 {
4534 as_bad ("Comma expected after section name");
4535 ignore_rest_of_line ();
4536 return 0;
4537 }
4538 ++input_line_pointer; /* skip comma */
4539 return name;
4540}
4541
4542static void
4543dot_xdata (size)
4544 int size;
4545{
4546 char *name = parse_section_name ();
4547 if (!name)
4548 return;
4549
4d5a53ff 4550 md.keep_pending_output = 1;
800eeca4
JW		 4551 set_section (name);
4552 cons (size);
4553 obj_elf_previous (0);
4d5a53ff 4554 md.keep_pending_output = 0;
800eeca4
JW		 4555}
4556
4557/* Why doesn't float_cons() call md_cons_align() the way cons() does? */
542d6675 4558
800eeca4
JW		 4559static void
4560stmt_float_cons (kind)
4561 int kind;
4562{
165a7f90 4563 size_t alignment;
800eeca4
JW		 4564
4565 switch (kind)
4566 {
165a7f90
L		 4567 case 'd':
4568 alignment = 8;
4569 break;
4570
4571 case 'x':
4572 case 'X':
4573 alignment = 16;
4574 break;
800eeca4
JW		 4575
4576 case 'f':
4577 default:
165a7f90 4578 alignment = 4;
800eeca4
JW		 4579 break;
4580 }
165a7f90 4581 ia64_do_align (alignment);
800eeca4
JW		 4582 float_cons (kind);
4583}
4584
4585static void
4586stmt_cons_ua (size)
4587 int size;
4588{
4589 int saved_auto_align = md.auto_align;
4590
4591 md.auto_align = 0;
4592 cons (size);
4593 md.auto_align = saved_auto_align;
4594}
4595
4596static void
4597dot_xfloat_cons (kind)
4598 int kind;
4599{
4600 char *name = parse_section_name ();
4601 if (!name)
4602 return;
4603
4d5a53ff 4604 md.keep_pending_output = 1;
800eeca4
JW		 4605 set_section (name);
4606 stmt_float_cons (kind);
4607 obj_elf_previous (0);
4d5a53ff 4608 md.keep_pending_output = 0;
800eeca4
JW		 4609}
4610
4611static void
4612dot_xstringer (zero)
4613 int zero;
4614{
4615 char *name = parse_section_name ();
4616 if (!name)
4617 return;
4618
4d5a53ff 4619 md.keep_pending_output = 1;
800eeca4
JW		 4620 set_section (name);
4621 stringer (zero);
4622 obj_elf_previous (0);
4d5a53ff 4623 md.keep_pending_output = 0;
800eeca4
JW		 4624}
4625
4626static void
4627dot_xdata_ua (size)
4628 int size;
4629{
4630 int saved_auto_align = md.auto_align;
4631 char *name = parse_section_name ();
4632 if (!name)
4633 return;
4634
4d5a53ff 4635 md.keep_pending_output = 1;
800eeca4
JW		 4636 set_section (name);
4637 md.auto_align = 0;
4638 cons (size);
4639 md.auto_align = saved_auto_align;
4640 obj_elf_previous (0);
4d5a53ff 4641 md.keep_pending_output = 0;
800eeca4
JW		 4642}
4643
4644static void
4645dot_xfloat_cons_ua (kind)
4646 int kind;
4647{
4648 int saved_auto_align = md.auto_align;
4649 char *name = parse_section_name ();
4650 if (!name)
4651 return;
4652
4d5a53ff 4653 md.keep_pending_output = 1;
800eeca4
JW		 4654 set_section (name);
4655 md.auto_align = 0;
4656 stmt_float_cons (kind);
4657 md.auto_align = saved_auto_align;
4658 obj_elf_previous (0);
4d5a53ff 4659 md.keep_pending_output = 0;
800eeca4
JW		 4660}
4661
4662/* .reg.val <regname>,value */
542d6675 4663
800eeca4
JW		 4664static void
4665dot_reg_val (dummy)
2434f565 4666 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4667{
4668 expressionS reg;
4669
4670 expression (&reg);
4671 if (reg.X_op != O_register)
4672 {
4673 as_bad (_("Register name expected"));
4674 ignore_rest_of_line ();
4675 }
4676 else if (*input_line_pointer++ != ',')
4677 {
4678 as_bad (_("Comma expected"));
4679 ignore_rest_of_line ();
4680 }
197865e8 4681 else
800eeca4
JW		 4682 {
4683 valueT value = get_absolute_expression ();
4684 int regno = reg.X_add_number;
542d6675
KH		 4685 if (regno < REG_GR || regno > REG_GR + 128)
4686 as_warn (_("Register value annotation ignored"));
800eeca4 4687 else
542d6675
KH		 4688 {
4689 gr_values[regno - REG_GR].known = 1;
4690 gr_values[regno - REG_GR].value = value;
4691 gr_values[regno - REG_GR].path = md.path;
4692 }
800eeca4
JW		 4693 }
4694 demand_empty_rest_of_line ();
4695}
4696
5e819f9c
JW		 4697/*
4698 .serialize.data
4699 .serialize.instruction
4700 */
4701static void
4702dot_serialize (type)
4703 int type;
4704{
4705 insn_group_break (0, 0, 0);
4706 if (type)
4707 instruction_serialization ();
4708 else
4709 data_serialization ();
4710 insn_group_break (0, 0, 0);
4711 demand_empty_rest_of_line ();
4712}
4713
197865e8 4714/* select dv checking mode
800eeca4
JW		 4715 .auto
4716 .explicit
4717 .default
4718
197865e8 4719 A stop is inserted when changing modes
800eeca4 4720 */
542d6675 4721
800eeca4
JW		 4722static void
4723dot_dv_mode (type)
542d6675 4724 int type;
800eeca4
JW		 4725{
4726 if (md.manual_bundling)
4727 as_warn (_("Directive invalid within a bundle"));
4728
4729 if (type == 'E' || type == 'A')
4730 md.mode_explicitly_set = 0;
4731 else
4732 md.mode_explicitly_set = 1;
4733
4734 md.detect_dv = 1;
4735 switch (type)
4736 {
4737 case 'A':
4738 case 'a':
4739 if (md.explicit_mode)
542d6675 4740 insn_group_break (1, 0, 0);
800eeca4
JW		 4741 md.explicit_mode = 0;
4742 break;
4743 case 'E':
4744 case 'e':
4745 if (!md.explicit_mode)
542d6675 4746 insn_group_break (1, 0, 0);
800eeca4
JW		 4747 md.explicit_mode = 1;
4748 break;
4749 default:
4750 case 'd':
4751 if (md.explicit_mode != md.default_explicit_mode)
542d6675 4752 insn_group_break (1, 0, 0);
800eeca4
JW		 4753 md.explicit_mode = md.default_explicit_mode;
4754 md.mode_explicitly_set = 0;
4755 break;
4756 }
4757}
4758
4759static void
4760print_prmask (mask)
542d6675 4761 valueT mask;
800eeca4
JW		 4762{
4763 int regno;
4764 char *comma = "";
542d6675 4765 for (regno = 0; regno < 64; regno++)
800eeca4 4766 {
542d6675
KH		 4767 if (mask & ((valueT) 1 << regno))
4768 {
4769 fprintf (stderr, "%s p%d", comma, regno);
4770 comma = ",";
4771 }
800eeca4
JW		 4772 }
4773}
4774
4775/*
4776 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4777 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4778 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4779 .pred.safe_across_calls p1 [, p2 [,...]]
4780 */
542d6675 4781
800eeca4
JW		 4782static void
4783dot_pred_rel (type)
542d6675 4784 int type;
800eeca4
JW		 4785{
4786 valueT mask = 0;
4787 int count = 0;
4788 int p1 = -1, p2 = -1;
4789
4790 if (type == 0)
4791 {
4792 if (*input_line_pointer != '"')
542d6675
KH		 4793 {
4794 as_bad (_("Missing predicate relation type"));
4795 ignore_rest_of_line ();
4796 return;
4797 }
197865e8 4798 else
542d6675
KH		 4799 {
4800 int len;
4801 char *form = demand_copy_C_string (&len);
4802 if (strcmp (form, "mutex") == 0)
4803 type = 'm';
4804 else if (strcmp (form, "clear") == 0)
4805 type = 'c';
4806 else if (strcmp (form, "imply") == 0)
4807 type = 'i';
4808 else
4809 {
4810 as_bad (_("Unrecognized predicate relation type"));
4811 ignore_rest_of_line ();
4812 return;
4813 }
4814 }
800eeca4 4815 if (*input_line_pointer == ',')
542d6675 4816 ++input_line_pointer;
800eeca4
JW		 4817 SKIP_WHITESPACE ();
4818 }
4819
4820 SKIP_WHITESPACE ();
4821 while (1)
4822 {
4823 valueT bit = 1;
4824 int regno;
197865e8 4825
3882b010 4826 if (TOUPPER (*input_line_pointer) != 'P'
542d6675
KH		 4827 || (regno = atoi (++input_line_pointer)) < 0
4828 || regno > 63)
4829 {
4830 as_bad (_("Predicate register expected"));
4831 ignore_rest_of_line ();
4832 return;
4833 }
3882b010 4834 while (ISDIGIT (*input_line_pointer))
542d6675 4835 ++input_line_pointer;
800eeca4 4836 if (p1 == -1)
542d6675 4837 p1 = regno;
800eeca4 4838 else if (p2 == -1)
542d6675 4839 p2 = regno;
800eeca4
JW		 4840 bit <<= regno;
4841 if (mask & bit)
542d6675
KH		 4842 as_warn (_("Duplicate predicate register ignored"));
4843 mask |= bit;
4844 count++;
4845 /* See if it's a range. */
800eeca4 4846 if (*input_line_pointer == '-')
542d6675
KH		 4847 {
4848 valueT stop = 1;
4849 ++input_line_pointer;
4850
3882b010 4851 if (TOUPPER (*input_line_pointer) != 'P'
542d6675
KH		 4852 || (regno = atoi (++input_line_pointer)) < 0
4853 || regno > 63)
4854 {
4855 as_bad (_("Predicate register expected"));
4856 ignore_rest_of_line ();
4857 return;
4858 }
3882b010 4859 while (ISDIGIT (*input_line_pointer))
542d6675
KH		 4860 ++input_line_pointer;
4861 stop <<= regno;
4862 if (bit >= stop)
4863 {
4864 as_bad (_("Bad register range"));
4865 ignore_rest_of_line ();
4866 return;
4867 }
4868 while (bit < stop)
4869 {
4870 bit <<= 1;
4871 mask |= bit;
4872 count++;
4873 }
4874 SKIP_WHITESPACE ();
4875 }
800eeca4 4876 if (*input_line_pointer != ',')
542d6675 4877 break;
800eeca4
JW		 4878 ++input_line_pointer;
4879 SKIP_WHITESPACE ();
4880 }
4881
4882 switch (type)
4883 {
4884 case 'c':
4885 if (count == 0)
542d6675 4886 mask = ~(valueT) 0;
800eeca4 4887 clear_qp_mutex (mask);
197865e8 4888 clear_qp_implies (mask, (valueT) 0);
800eeca4
JW		 4889 break;
4890 case 'i':
4891 if (count != 2 || p1 == -1 || p2 == -1)
542d6675 4892 as_bad (_("Predicate source and target required"));
800eeca4 4893 else if (p1 == 0 || p2 == 0)
542d6675 4894 as_bad (_("Use of p0 is not valid in this context"));
800eeca4 4895 else
542d6675 4896 add_qp_imply (p1, p2);
800eeca4
JW		 4897 break;
4898 case 'm':
4899 if (count < 2)
542d6675
KH		 4900 {
4901 as_bad (_("At least two PR arguments expected"));
4902 break;
4903 }
800eeca4 4904 else if (mask & 1)
542d6675
KH		 4905 {
4906 as_bad (_("Use of p0 is not valid in this context"));
4907 break;
4908 }
800eeca4
JW		 4909 add_qp_mutex (mask);
4910 break;
4911 case 's':
4912 /* note that we don't override any existing relations */
4913 if (count == 0)
542d6675
KH		 4914 {
4915 as_bad (_("At least one PR argument expected"));
4916 break;
4917 }
800eeca4 4918 if (md.debug_dv)
542d6675
KH		 4919 {
4920 fprintf (stderr, "Safe across calls: ");
4921 print_prmask (mask);
4922 fprintf (stderr, "\n");
4923 }
800eeca4
JW		 4924 qp_safe_across_calls = mask;
4925 break;
4926 }
4927 demand_empty_rest_of_line ();
4928}
4929
4930/* .entry label [, label [, ...]]
4931 Hint to DV code that the given labels are to be considered entry points.
542d6675
KH		 4932 Otherwise, only global labels are considered entry points. */
4933
800eeca4
JW		 4934static void
4935dot_entry (dummy)
2434f565 4936 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4937{
4938 const char *err;
4939 char *name;
4940 int c;
4941 symbolS *symbolP;
4942
4943 do
4944 {
4945 name = input_line_pointer;
4946 c = get_symbol_end ();
4947 symbolP = symbol_find_or_make (name);
4948
4949 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
4950 if (err)
542d6675
KH		 4951 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4952 name, err);
800eeca4
JW		 4953
4954 *input_line_pointer = c;
4955 SKIP_WHITESPACE ();
4956 c = *input_line_pointer;
4957 if (c == ',')
4958 {
4959 input_line_pointer++;
4960 SKIP_WHITESPACE ();
4961 if (*input_line_pointer == '\n')
4962 c = '\n';
4963 }
4964 }
4965 while (c == ',');
4966
4967 demand_empty_rest_of_line ();
4968}
4969
197865e8 4970/* .mem.offset offset, base
542d6675
KH		 4971 "base" is used to distinguish between offsets from a different base. */
4972
800eeca4
JW		 4973static void
4974dot_mem_offset (dummy)
2434f565 4975 int dummy ATTRIBUTE_UNUSED;
800eeca4
JW		 4976{
4977 md.mem_offset.hint = 1;
4978 md.mem_offset.offset = get_absolute_expression ();
4979 if (*input_line_pointer != ',')
4980 {
4981 as_bad (_("Comma expected"));
4982 ignore_rest_of_line ();
4983 return;
4984 }
4985 ++input_line_pointer;
4986 md.mem_offset.base = get_absolute_expression ();
4987 demand_empty_rest_of_line ();
4988}
4989
542d6675 4990/* ia64-specific pseudo-ops: */
800eeca4
JW		 4991const pseudo_typeS md_pseudo_table[] =
4992 {
4993 { "radix", dot_radix, 0 },
4994 { "lcomm", s_lcomm_bytes, 1 },
196e8040 4995 { "loc", dot_loc, 0 },
800eeca4
JW		 4996 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
4997 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
4998 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
4999 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5000 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5001 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5002 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
557debba
JW		 5003 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5004 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
800eeca4
JW		 5005 { "proc", dot_proc, 0 },
5006 { "body", dot_body, 0 },
5007 { "prologue", dot_prologue, 0 },
2434f565 5008 { "endp", dot_endp, 0 },
2434f565
JW		 5009
5010 { "fframe", dot_fframe, 0 },
5011 { "vframe", dot_vframe, 0 },
5012 { "vframesp", dot_vframesp, 0 },
5013 { "vframepsp", dot_vframepsp, 0 },
5014 { "save", dot_save, 0 },
5015 { "restore", dot_restore, 0 },
5016 { "restorereg", dot_restorereg, 0 },
5017 { "restorereg.p", dot_restorereg_p, 0 },
5018 { "handlerdata", dot_handlerdata, 0 },
5019 { "unwentry", dot_unwentry, 0 },
5020 { "altrp", dot_altrp, 0 },
e0c9811a
JW		 5021 { "savesp", dot_savemem, 0 },
5022 { "savepsp", dot_savemem, 1 },
2434f565
JW		 5023 { "save.g", dot_saveg, 0 },
5024 { "save.f", dot_savef, 0 },
5025 { "save.b", dot_saveb, 0 },
5026 { "save.gf", dot_savegf, 0 },
5027 { "spill", dot_spill, 0 },
5028 { "spillreg", dot_spillreg, 0 },
e0c9811a
JW		 5029 { "spillsp", dot_spillmem, 0 },
5030 { "spillpsp", dot_spillmem, 1 },
2434f565 5031 { "spillreg.p", dot_spillreg_p, 0 },
e0c9811a
JW		 5032 { "spillsp.p", dot_spillmem_p, 0 },
5033 { "spillpsp.p", dot_spillmem_p, 1 },
2434f565
JW		 5034 { "label_state", dot_label_state, 0 },
5035 { "copy_state", dot_copy_state, 0 },
5036 { "unwabi", dot_unwabi, 0 },
5037 { "personality", dot_personality, 0 },
800eeca4 5038#if 0
2434f565 5039 { "estate", dot_estate, 0 },
800eeca4
JW		 5040#endif
5041 { "mii", dot_template, 0x0 },
5042 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5043 { "mlx", dot_template, 0x2 },
5044 { "mmi", dot_template, 0x4 },
5045 { "mfi", dot_template, 0x6 },
5046 { "mmf", dot_template, 0x7 },
5047 { "mib", dot_template, 0x8 },
5048 { "mbb", dot_template, 0x9 },
5049 { "bbb", dot_template, 0xb },
5050 { "mmb", dot_template, 0xc },
5051 { "mfb", dot_template, 0xe },
5052#if 0
5053 { "lb", dot_scope, 0 },
5054 { "le", dot_scope, 1 },
5055#endif
d9201763 5056 { "align", dot_align, 0 },
800eeca4
JW		 5057 { "regstk", dot_regstk, 0 },
5058 { "rotr", dot_rot, DYNREG_GR },
5059 { "rotf", dot_rot, DYNREG_FR },
5060 { "rotp", dot_rot, DYNREG_PR },
5061 { "lsb", dot_byteorder, 0 },
5062 { "msb", dot_byteorder, 1 },
5063 { "psr", dot_psr, 0 },
5064 { "alias", dot_alias, 0 },
35f5df7f 5065 { "secalias", dot_alias, 1 },
800eeca4
JW		 5066 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5067
5068 { "xdata1", dot_xdata, 1 },
5069 { "xdata2", dot_xdata, 2 },
5070 { "xdata4", dot_xdata, 4 },
5071 { "xdata8", dot_xdata, 8 },
5072 { "xreal4", dot_xfloat_cons, 'f' },
5073 { "xreal8", dot_xfloat_cons, 'd' },
5074 { "xreal10", dot_xfloat_cons, 'x' },
165a7f90 5075 { "xreal16", dot_xfloat_cons, 'X' },
800eeca4
JW		 5076 { "xstring", dot_xstringer, 0 },
5077 { "xstringz", dot_xstringer, 1 },
5078
542d6675 5079 /* unaligned versions: */
800eeca4
JW		 5080 { "xdata2.ua", dot_xdata_ua, 2 },
5081 { "xdata4.ua", dot_xdata_ua, 4 },
5082 { "xdata8.ua", dot_xdata_ua, 8 },
5083 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5084 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5085 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
165a7f90 5086 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
800eeca4
JW		 5087
5088 /* annotations/DV checking support */
5089 { "entry", dot_entry, 0 },
2434f565 5090 { "mem.offset", dot_mem_offset, 0 },
800eeca4
JW		 5091 { "pred.rel", dot_pred_rel, 0 },
5092 { "pred.rel.clear", dot_pred_rel, 'c' },
5093 { "pred.rel.imply", dot_pred_rel, 'i' },
5094 { "pred.rel.mutex", dot_pred_rel, 'm' },
5095 { "pred.safe_across_calls", dot_pred_rel, 's' },
2434f565 5096 { "reg.val", dot_reg_val, 0 },
5e819f9c
JW		 5097 { "serialize.data", dot_serialize, 0 },
5098 { "serialize.instruction", dot_serialize, 1 },
800eeca4
JW		 5099 { "auto", dot_dv_mode, 'a' },
5100 { "explicit", dot_dv_mode, 'e' },
5101 { "default", dot_dv_mode, 'd' },
5102
87885043
JW		 5103 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5104 IA-64 aligns data allocation pseudo-ops by default, so we have to
5105 tell it that these ones are supposed to be unaligned. Long term,
5106 should rewrite so that only IA-64 specific data allocation pseudo-ops
5107 are aligned by default. */
5108 {"2byte", stmt_cons_ua, 2},
5109 {"4byte", stmt_cons_ua, 4},
5110 {"8byte", stmt_cons_ua, 8},
5111
800eeca4
JW		 5112 { NULL, 0, 0 }
5113 };
5114
5115static const struct pseudo_opcode
5116 {
5117 const char *name;
5118 void (*handler) (int);
5119 int arg;
5120 }
5121pseudo_opcode[] =
5122 {
5123 /* these are more like pseudo-ops, but don't start with a dot */
5124 { "data1", cons, 1 },
5125 { "data2", cons, 2 },
5126 { "data4", cons, 4 },
5127 { "data8", cons, 8 },
3969b680 5128 { "data16", cons, 16 },
800eeca4
JW		 5129 { "real4", stmt_float_cons, 'f' },
5130 { "real8", stmt_float_cons, 'd' },
5131 { "real10", stmt_float_cons, 'x' },
165a7f90 5132 { "real16", stmt_float_cons, 'X' },
800eeca4
JW		 5133 { "string", stringer, 0 },
5134 { "stringz", stringer, 1 },
5135
542d6675 5136 /* unaligned versions: */
800eeca4
JW		 5137 { "data2.ua", stmt_cons_ua, 2 },
5138 { "data4.ua", stmt_cons_ua, 4 },
5139 { "data8.ua", stmt_cons_ua, 8 },
3969b680 5140 { "data16.ua", stmt_cons_ua, 16 },
800eeca4
JW		 5141 { "real4.ua", float_cons, 'f' },
5142 { "real8.ua", float_cons, 'd' },
5143 { "real10.ua", float_cons, 'x' },
165a7f90 5144 { "real16.ua", float_cons, 'X' },
800eeca4
JW		 5145 };
5146
5147/* Declare a register by creating a symbol for it and entering it in
5148 the symbol table. */
542d6675
KH		 5149
5150static symbolS *
800eeca4
JW		 5151declare_register (name, regnum)
5152 const char *name;
5153 int regnum;
5154{
5155 const char *err;
5156 symbolS *sym;
5157
5158 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5159
5160 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5161 if (err)
5162 as_fatal ("Inserting \"%s\" into register table failed: %s",
5163 name, err);
5164
5165 return sym;
5166}
5167
5168static void
5169declare_register_set (prefix, num_regs, base_regnum)
5170 const char *prefix;
5171 int num_regs;
5172 int base_regnum;
5173{
5174 char name[8];
5175 int i;
5176
5177 for (i = 0; i < num_regs; ++i)
5178 {
5179 sprintf (name, "%s%u", prefix, i);
5180 declare_register (name, base_regnum + i);
5181 }
5182}
5183
5184static unsigned int
5185operand_width (opnd)
5186 enum ia64_opnd opnd;
5187{
5188 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5189 unsigned int bits = 0;
5190 int i;
5191
5192 bits = 0;
5193 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5194 bits += odesc->field[i].bits;
5195
5196 return bits;
5197}
5198
87f8eb97 5199static enum operand_match_result
800eeca4
JW		 5200operand_match (idesc, index, e)
5201 const struct ia64_opcode *idesc;
5202 int index;
5203 expressionS *e;
5204{
5205 enum ia64_opnd opnd = idesc->operands[index];
5206 int bits, relocatable = 0;
5207 struct insn_fix *fix;
5208 bfd_signed_vma val;
5209
5210 switch (opnd)
5211 {
542d6675 5212 /* constants: */
800eeca4
JW		 5213
5214 case IA64_OPND_AR_CCV:
5215 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
87f8eb97 5216 return OPERAND_MATCH;
800eeca4
JW		 5217 break;
5218
c10d9d8f
JW		 5219 case IA64_OPND_AR_CSD:
5220 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5221 return OPERAND_MATCH;
5222 break;
5223
800eeca4
JW		 5224 case IA64_OPND_AR_PFS:
5225 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
87f8eb97 5226 return OPERAND_MATCH;
800eeca4
JW		 5227 break;
5228
5229 case IA64_OPND_GR0:
5230 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
87f8eb97 5231 return OPERAND_MATCH;
800eeca4
JW		 5232 break;
5233
5234 case IA64_OPND_IP:
5235 if (e->X_op == O_register && e->X_add_number == REG_IP)
87f8eb97 5236 return OPERAND_MATCH;
800eeca4
JW		 5237 break;
5238
5239 case IA64_OPND_PR:
5240 if (e->X_op == O_register && e->X_add_number == REG_PR)
87f8eb97 5241 return OPERAND_MATCH;
800eeca4
JW		 5242 break;
5243
5244 case IA64_OPND_PR_ROT:
5245 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
87f8eb97 5246 return OPERAND_MATCH;
800eeca4
JW		 5247 break;
5248
5249 case IA64_OPND_PSR:
5250 if (e->X_op == O_register && e->X_add_number == REG_PSR)
87f8eb97 5251 return OPERAND_MATCH;
800eeca4
JW		 5252 break;
5253
5254 case IA64_OPND_PSR_L:
5255 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
87f8eb97 5256 return OPERAND_MATCH;
800eeca4
JW		 5257 break;
5258
5259 case IA64_OPND_PSR_UM:
5260 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
87f8eb97 5261 return OPERAND_MATCH;
800eeca4
JW		 5262 break;
5263
5264 case IA64_OPND_C1:
87f8eb97
JW		 5265 if (e->X_op == O_constant)
5266 {
5267 if (e->X_add_number == 1)
5268 return OPERAND_MATCH;
5269 else
5270 return OPERAND_OUT_OF_RANGE;
5271 }
800eeca4
JW		 5272 break;
5273
5274 case IA64_OPND_C8:
87f8eb97
JW		 5275 if (e->X_op == O_constant)
5276 {
5277 if (e->X_add_number == 8)
5278 return OPERAND_MATCH;
5279 else
5280 return OPERAND_OUT_OF_RANGE;
5281 }
800eeca4
JW		 5282 break;
5283
5284 case IA64_OPND_C16:
87f8eb97
JW		 5285 if (e->X_op == O_constant)
5286 {
5287 if (e->X_add_number == 16)
5288 return OPERAND_MATCH;
5289 else
5290 return OPERAND_OUT_OF_RANGE;
5291 }
800eeca4
JW		 5292 break;
5293
542d6675 5294 /* register operands: */
800eeca4
JW		 5295
5296 case IA64_OPND_AR3:
5297 if (e->X_op == O_register && e->X_add_number >= REG_AR
5298 && e->X_add_number < REG_AR + 128)
87f8eb97 5299 return OPERAND_MATCH;
800eeca4
JW		 5300 break;
5301
5302 case IA64_OPND_B1:
5303 case IA64_OPND_B2:
5304 if (e->X_op == O_register && e->X_add_number >= REG_BR
5305 && e->X_add_number < REG_BR + 8)
87f8eb97 5306 return OPERAND_MATCH;
800eeca4
JW		 5307 break;
5308
5309 case IA64_OPND_CR3:
5310 if (e->X_op == O_register && e->X_add_number >= REG_CR
5311 && e->X_add_number < REG_CR + 128)
87f8eb97 5312 return OPERAND_MATCH;
800eeca4
JW		 5313 break;
5314
5315 case IA64_OPND_F1:
5316 case IA64_OPND_F2:
5317 case IA64_OPND_F3:
5318 case IA64_OPND_F4:
5319 if (e->X_op == O_register && e->X_add_number >= REG_FR
5320 && e->X_add_number < REG_FR + 128)
87f8eb97 5321 return OPERAND_MATCH;
800eeca4
JW		 5322 break;
5323
5324 case IA64_OPND_P1:
5325 case IA64_OPND_P2:
5326 if (e->X_op == O_register && e->X_add_number >= REG_P
5327 && e->X_add_number < REG_P + 64)
87f8eb97 5328 return OPERAND_MATCH;
800eeca4
JW		 5329 break;
5330
5331 case IA64_OPND_R1:
5332 case IA64_OPND_R2:
5333 case IA64_OPND_R3:
5334 if (e->X_op == O_register && e->X_add_number >= REG_GR
5335 && e->X_add_number < REG_GR + 128)
87f8eb97 5336 return OPERAND_MATCH;
800eeca4
JW		 5337 break;
5338
5339 case IA64_OPND_R3_2:
87f8eb97 5340 if (e->X_op == O_register && e->X_add_number >= REG_GR)
40449e9f 5341 {
87f8eb97
JW		 5342 if (e->X_add_number < REG_GR + 4)
5343 return OPERAND_MATCH;
5344 else if (e->X_add_number < REG_GR + 128)
5345 return OPERAND_OUT_OF_RANGE;
5346 }
800eeca4
JW		 5347 break;
5348
542d6675 5349 /* indirect operands: */
800eeca4
JW		 5350 case IA64_OPND_CPUID_R3:
5351 case IA64_OPND_DBR_R3:
5352 case IA64_OPND_DTR_R3:
5353 case IA64_OPND_ITR_R3:
5354 case IA64_OPND_IBR_R3:
5355 case IA64_OPND_MSR_R3:
5356 case IA64_OPND_PKR_R3:
5357 case IA64_OPND_PMC_R3:
5358 case IA64_OPND_PMD_R3:
5359 case IA64_OPND_RR_R3:
5360 if (e->X_op == O_index && e->X_op_symbol
5361 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5362 == opnd - IA64_OPND_CPUID_R3))
87f8eb97 5363 return OPERAND_MATCH;
800eeca4
JW		 5364 break;
5365
5366 case IA64_OPND_MR3:
5367 if (e->X_op == O_index && !e->X_op_symbol)
87f8eb97 5368 return OPERAND_MATCH;
800eeca4
JW		 5369 break;
5370
542d6675 5371 /* immediate operands: */
800eeca4
JW		 5372 case IA64_OPND_CNT2a:
5373 case IA64_OPND_LEN4:
5374 case IA64_OPND_LEN6:
5375 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5376 if (e->X_op == O_constant)
5377 {
5378 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5379 return OPERAND_MATCH;
5380 else
5381 return OPERAND_OUT_OF_RANGE;
5382 }
800eeca4
JW		 5383 break;
5384
5385 case IA64_OPND_CNT2b:
87f8eb97
JW		 5386 if (e->X_op == O_constant)
5387 {
5388 if ((bfd_vma) (e->X_add_number - 1) < 3)
5389 return OPERAND_MATCH;
5390 else
5391 return OPERAND_OUT_OF_RANGE;
5392 }
800eeca4
JW		 5393 break;
5394
5395 case IA64_OPND_CNT2c:
5396 val = e->X_add_number;
87f8eb97
JW		 5397 if (e->X_op == O_constant)
5398 {
5399 if ((val == 0 || val == 7 || val == 15 || val == 16))
5400 return OPERAND_MATCH;
5401 else
5402 return OPERAND_OUT_OF_RANGE;
5403 }
800eeca4
JW		 5404 break;
5405
5406 case IA64_OPND_SOR:
5407 /* SOR must be an integer multiple of 8 */
87f8eb97
JW		 5408 if (e->X_op == O_constant && e->X_add_number & 0x7)
5409 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5410 case IA64_OPND_SOF:
5411 case IA64_OPND_SOL:
87f8eb97
JW		 5412 if (e->X_op == O_constant)
5413 {
5414 if ((bfd_vma) e->X_add_number <= 96)
5415 return OPERAND_MATCH;
5416 else
5417 return OPERAND_OUT_OF_RANGE;
5418 }
800eeca4
JW		 5419 break;
5420
5421 case IA64_OPND_IMMU62:
5422 if (e->X_op == O_constant)
542d6675 5423 {
800eeca4 5424 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
87f8eb97
JW		 5425 return OPERAND_MATCH;
5426 else
5427 return OPERAND_OUT_OF_RANGE;
542d6675 5428 }
197865e8 5429 else
542d6675
KH		 5430 {
5431 /* FIXME -- need 62-bit relocation type */
5432 as_bad (_("62-bit relocation not yet implemented"));
5433 }
800eeca4
JW		 5434 break;
5435
5436 case IA64_OPND_IMMU64:
5437 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5438 || e->X_op == O_subtract)
5439 {
5440 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5441 fix->code = BFD_RELOC_IA64_IMM64;
5442 if (e->X_op != O_subtract)
5443 {
5444 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5445 if (e->X_op == O_pseudo_fixup)
5446 e->X_op = O_symbol;
5447 }
5448
5449 fix->opnd = idesc->operands[index];
5450 fix->expr = *e;
5451 fix->is_pcrel = 0;
5452 ++CURR_SLOT.num_fixups;
87f8eb97 5453 return OPERAND_MATCH;
800eeca4
JW		 5454 }
5455 else if (e->X_op == O_constant)
87f8eb97 5456 return OPERAND_MATCH;
800eeca4
JW		 5457 break;
5458
5459 case IA64_OPND_CCNT5:
5460 case IA64_OPND_CNT5:
5461 case IA64_OPND_CNT6:
5462 case IA64_OPND_CPOS6a:
5463 case IA64_OPND_CPOS6b:
5464 case IA64_OPND_CPOS6c:
5465 case IA64_OPND_IMMU2:
5466 case IA64_OPND_IMMU7a:
5467 case IA64_OPND_IMMU7b:
800eeca4
JW		 5468 case IA64_OPND_IMMU21:
5469 case IA64_OPND_IMMU24:
5470 case IA64_OPND_MBTYPE4:
5471 case IA64_OPND_MHTYPE8:
5472 case IA64_OPND_POS6:
5473 bits = operand_width (idesc->operands[index]);
87f8eb97
JW		 5474 if (e->X_op == O_constant)
5475 {
5476 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5477 return OPERAND_MATCH;
5478 else
5479 return OPERAND_OUT_OF_RANGE;
5480 }
800eeca4
JW		 5481 break;
5482
bf3ca999
TW		 5483 case IA64_OPND_IMMU9:
5484 bits = operand_width (idesc->operands[index]);
87f8eb97 5485 if (e->X_op == O_constant)
542d6675 5486 {
87f8eb97
JW		 5487 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5488 {
5489 int lobits = e->X_add_number & 0x3;
5490 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5491 e->X_add_number |= (bfd_vma) 0x3;
5492 return OPERAND_MATCH;
5493 }
5494 else
5495 return OPERAND_OUT_OF_RANGE;
542d6675 5496 }
bf3ca999
TW		 5497 break;
5498
800eeca4
JW		 5499 case IA64_OPND_IMM44:
5500 /* least 16 bits must be zero */
5501 if ((e->X_add_number & 0xffff) != 0)
87f8eb97
JW		 5502 /* XXX technically, this is wrong: we should not be issuing warning
5503 messages until we're sure this instruction pattern is going to
5504 be used! */
542d6675 5505 as_warn (_("lower 16 bits of mask ignored"));
800eeca4 5506
87f8eb97 5507 if (e->X_op == O_constant)
542d6675 5508 {
87f8eb97
JW		 5509 if (((e->X_add_number >= 0
5510 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5511 || (e->X_add_number < 0
5512 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
542d6675 5513 {
87f8eb97
JW		 5514 /* sign-extend */
5515 if (e->X_add_number >= 0
5516 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5517 {
5518 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5519 }
5520 return OPERAND_MATCH;
542d6675 5521 }
87f8eb97
JW		 5522 else
5523 return OPERAND_OUT_OF_RANGE;
542d6675 5524 }
800eeca4
JW		 5525 break;
5526
5527 case IA64_OPND_IMM17:
5528 /* bit 0 is a don't care (pr0 is hardwired to 1) */
87f8eb97 5529 if (e->X_op == O_constant)
542d6675 5530 {
87f8eb97
JW		 5531 if (((e->X_add_number >= 0
5532 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5533 || (e->X_add_number < 0
5534 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
542d6675 5535 {
87f8eb97
JW		 5536 /* sign-extend */
5537 if (e->X_add_number >= 0
5538 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5539 {
5540 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5541 }
5542 return OPERAND_MATCH;
542d6675 5543 }
87f8eb97
JW		 5544 else
5545 return OPERAND_OUT_OF_RANGE;
542d6675 5546 }
800eeca4
JW		 5547 break;
5548
5549 case IA64_OPND_IMM14:
5550 case IA64_OPND_IMM22:
5551 relocatable = 1;
5552 case IA64_OPND_IMM1:
5553 case IA64_OPND_IMM8:
5554 case IA64_OPND_IMM8U4:
5555 case IA64_OPND_IMM8M1:
5556 case IA64_OPND_IMM8M1U4:
5557 case IA64_OPND_IMM8M1U8:
5558 case IA64_OPND_IMM9a:
5559 case IA64_OPND_IMM9b:
5560 bits = operand_width (idesc->operands[index]);
5561 if (relocatable && (e->X_op == O_symbol
5562 || e->X_op == O_subtract
5563 || e->X_op == O_pseudo_fixup))
5564 {
5565 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5566
5567 if (idesc->operands[index] == IA64_OPND_IMM14)
5568 fix->code = BFD_RELOC_IA64_IMM14;
5569 else
5570 fix->code = BFD_RELOC_IA64_IMM22;
5571
5572 if (e->X_op != O_subtract)
5573 {
5574 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5575 if (e->X_op == O_pseudo_fixup)
5576 e->X_op = O_symbol;
5577 }
5578
5579 fix->opnd = idesc->operands[index];
5580 fix->expr = *e;
5581 fix->is_pcrel = 0;
5582 ++CURR_SLOT.num_fixups;
87f8eb97 5583 return OPERAND_MATCH;
800eeca4
JW		 5584 }
5585 else if (e->X_op != O_constant
5586 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
87f8eb97 5587 return OPERAND_MISMATCH;
800eeca4
JW		 5588
5589 if (opnd == IA64_OPND_IMM8M1U4)
5590 {
5591 /* Zero is not valid for unsigned compares that take an adjusted
5592 constant immediate range. */
5593 if (e->X_add_number == 0)
87f8eb97 5594 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5595
5596 /* Sign-extend 32-bit unsigned numbers, so that the following range
5597 checks will work. */
5598 val = e->X_add_number;
197865e8
KH		 5599 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5600 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 5601 val = ((val << 32) >> 32);
5602
5603 /* Check for 0x100000000. This is valid because
5604 0x100000000-1 is the same as ((uint32_t) -1). */
5605 if (val == ((bfd_signed_vma) 1 << 32))
87f8eb97 5606 return OPERAND_MATCH;
800eeca4
JW		 5607
5608 val = val - 1;
5609 }
5610 else if (opnd == IA64_OPND_IMM8M1U8)
5611 {
5612 /* Zero is not valid for unsigned compares that take an adjusted
5613 constant immediate range. */
5614 if (e->X_add_number == 0)
87f8eb97 5615 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5616
5617 /* Check for 0x10000000000000000. */
5618 if (e->X_op == O_big)
5619 {
5620 if (generic_bignum[0] == 0
5621 && generic_bignum[1] == 0
5622 && generic_bignum[2] == 0
5623 && generic_bignum[3] == 0
5624 && generic_bignum[4] == 1)
87f8eb97 5625 return OPERAND_MATCH;
800eeca4 5626 else
87f8eb97 5627 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5628 }
5629 else
5630 val = e->X_add_number - 1;
5631 }
5632 else if (opnd == IA64_OPND_IMM8M1)
5633 val = e->X_add_number - 1;
5634 else if (opnd == IA64_OPND_IMM8U4)
5635 {
5636 /* Sign-extend 32-bit unsigned numbers, so that the following range
5637 checks will work. */
5638 val = e->X_add_number;
197865e8
KH		 5639 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5640 && ((val & ((bfd_vma) 1 << 31)) != 0))
800eeca4
JW		 5641 val = ((val << 32) >> 32);
5642 }
5643 else
5644 val = e->X_add_number;
5645
2434f565
JW		 5646 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5647 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
87f8eb97
JW		 5648 return OPERAND_MATCH;
5649 else
5650 return OPERAND_OUT_OF_RANGE;
800eeca4
JW		 5651
5652 case IA64_OPND_INC3:
5653 /* +/- 1, 4, 8, 16 */
5654 val = e->X_add_number;
5655 if (val < 0)
5656 val = -val;
87f8eb97
JW		 5657 if (e->X_op == O_constant)
5658 {
5659 if ((val == 1 || val == 4 || val == 8 || val == 16))
5660 return OPERAND_MATCH;
5661 else
5662 return OPERAND_OUT_OF_RANGE;
5663 }
800eeca4
JW		 5664 break;
5665
5666 case IA64_OPND_TGT25:
5667 case IA64_OPND_TGT25b:
5668 case IA64_OPND_TGT25c:
5669 case IA64_OPND_TGT64:
5670 if (e->X_op == O_symbol)
5671 {
5672 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5673 if (opnd == IA64_OPND_TGT25)
5674 fix->code = BFD_RELOC_IA64_PCREL21F;
5675 else if (opnd == IA64_OPND_TGT25b)
5676 fix->code = BFD_RELOC_IA64_PCREL21M;
5677 else if (opnd == IA64_OPND_TGT25c)
5678 fix->code = BFD_RELOC_IA64_PCREL21B;
542d6675 5679 else if (opnd == IA64_OPND_TGT64)
c67e42c9
RH		 5680 fix->code = BFD_RELOC_IA64_PCREL60B;
5681 else
5682 abort ();
5683
800eeca4
JW		 5684 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5685 fix->opnd = idesc->operands[index];
5686 fix->expr = *e;
5687 fix->is_pcrel = 1;
5688 ++CURR_SLOT.num_fixups;
87f8eb97 5689 return OPERAND_MATCH;
800eeca4
JW		 5690 }
5691 case IA64_OPND_TAG13:
5692 case IA64_OPND_TAG13b:
5693 switch (e->X_op)
5694 {
5695 case O_constant:
87f8eb97 5696 return OPERAND_MATCH;
800eeca4
JW		 5697
5698 case O_symbol:
5699 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
fa1cb89c
JW		 5700 /* There are no external relocs for TAG13/TAG13b fields, so we
5701 create a dummy reloc. This will not live past md_apply_fix3. */
5702 fix->code = BFD_RELOC_UNUSED;
5703 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
800eeca4
JW		 5704 fix->opnd = idesc->operands[index];
5705 fix->expr = *e;
5706 fix->is_pcrel = 1;
5707 ++CURR_SLOT.num_fixups;
87f8eb97 5708 return OPERAND_MATCH;
800eeca4
JW		 5709
5710 default:
5711 break;
5712 }
5713 break;
5714
a823923b
RH		 5715 case IA64_OPND_LDXMOV:
5716 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5717 fix->code = BFD_RELOC_IA64_LDXMOV;
5718 fix->opnd = idesc->operands[index];
5719 fix->expr = *e;
5720 fix->is_pcrel = 0;
5721 ++CURR_SLOT.num_fixups;
5722 return OPERAND_MATCH;
5723
800eeca4
JW		 5724 default:
5725 break;
5726 }
87f8eb97 5727 return OPERAND_MISMATCH;
800eeca4
JW		 5728}
5729
5730static int
5731parse_operand (e)
5732 expressionS *e;
5733{
5734 int sep = '\0';
5735
5736 memset (e, 0, sizeof (*e));
5737 e->X_op = O_absent;
5738 SKIP_WHITESPACE ();
5739 if (*input_line_pointer != '}')
5740 expression (e);
5741 sep = *input_line_pointer++;
5742
5743 if (sep == '}')
5744 {
5745 if (!md.manual_bundling)
5746 as_warn ("Found '}' when manual bundling is off");
5747 else
5748 CURR_SLOT.manual_bundling_off = 1;
5749 md.manual_bundling = 0;
5750 sep = '\0';
5751 }
5752 return sep;
5753}
5754
5755/* Returns the next entry in the opcode table that matches the one in
5756 IDESC, and frees the entry in IDESC. If no matching entry is
197865e8 5757 found, NULL is returned instead. */
800eeca4
JW		 5758
5759static struct ia64_opcode *
5760get_next_opcode (struct ia64_opcode *idesc)
5761{
5762 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
5763 ia64_free_opcode (idesc);
5764 return next;
5765}
5766
5767/* Parse the operands for the opcode and find the opcode variant that
5768 matches the specified operands, or NULL if no match is possible. */
542d6675
KH		 5769
5770static struct ia64_opcode *
800eeca4
JW		 5771parse_operands (idesc)
5772 struct ia64_opcode *idesc;
5773{
5774 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
87f8eb97 5775 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
800eeca4 5776 enum ia64_opnd expected_operand = IA64_OPND_NIL;
87f8eb97 5777 enum operand_match_result result;
800eeca4
JW		 5778 char mnemonic[129];
5779 char *first_arg = 0, *end, *saved_input_pointer;
5780 unsigned int sof;
5781
5782 assert (strlen (idesc->name) <= 128);
5783
5784 strcpy (mnemonic, idesc->name);
60b9a617
JB		 5785 if (idesc->operands[2] == IA64_OPND_SOF
5786 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4
JW		 5787 {
5788 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5789 can't parse the first operand until we have parsed the
5790 remaining operands of the "alloc" instruction. */
5791 SKIP_WHITESPACE ();
5792 first_arg = input_line_pointer;
5793 end = strchr (input_line_pointer, '=');
5794 if (!end)
5795 {
5796 as_bad ("Expected separator `='");
5797 return 0;
5798 }
5799 input_line_pointer = end + 1;
5800 ++i;
5801 ++num_outputs;
5802 }
5803
5804 for (; i < NELEMS (CURR_SLOT.opnd); ++i)
5805 {
5806 sep = parse_operand (CURR_SLOT.opnd + i);
5807 if (CURR_SLOT.opnd[i].X_op == O_absent)
5808 break;
5809
5810 ++num_operands;
5811
5812 if (sep != '=' && sep != ',')
5813 break;
5814
5815 if (sep == '=')
5816 {
5817 if (num_outputs > 0)
5818 as_bad ("Duplicate equal sign (=) in instruction");
5819 else
5820 num_outputs = i + 1;
5821 }
5822 }
5823 if (sep != '\0')
5824 {
5825 as_bad ("Illegal operand separator `%c'", sep);
5826 return 0;
5827 }
197865e8 5828
60b9a617
JB		 5829 if (idesc->operands[2] == IA64_OPND_SOF
5830 || idesc->operands[1] == IA64_OPND_SOF)
800eeca4
JW		 5831 {
5832 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5833 know (strcmp (idesc->name, "alloc") == 0);
60b9a617
JB		 5834 i = (CURR_SLOT.opnd[1].X_op == O_register
5835 && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1;
5836 if (num_operands == i + 3 /* first_arg not included in this count! */
5837 && CURR_SLOT.opnd[i].X_op == O_constant
5838 && CURR_SLOT.opnd[i + 1].X_op == O_constant
5839 && CURR_SLOT.opnd[i + 2].X_op == O_constant
5840 && CURR_SLOT.opnd[i + 3].X_op == O_constant)
800eeca4 5841 {
60b9a617
JB		 5842 sof = set_regstack (CURR_SLOT.opnd[i].X_add_number,
5843 CURR_SLOT.opnd[i + 1].X_add_number,
5844 CURR_SLOT.opnd[i + 2].X_add_number,
5845 CURR_SLOT.opnd[i + 3].X_add_number);
800eeca4 5846
542d6675 5847 /* now we can parse the first arg: */
800eeca4
JW		 5848 saved_input_pointer = input_line_pointer;
5849 input_line_pointer = first_arg;
5850 sep = parse_operand (CURR_SLOT.opnd + 0);
5851 if (sep != '=')
5852 --num_outputs; /* force error */
5853 input_line_pointer = saved_input_pointer;
5854
60b9a617
JB		 5855 CURR_SLOT.opnd[i].X_add_number = sof;
5856 CURR_SLOT.opnd[i + 1].X_add_number
5857 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
5858 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
800eeca4
JW		 5859 }
5860 }
5861
5862 highest_unmatched_operand = 0;
87f8eb97
JW		 5863 curr_out_of_range_pos = -1;
5864 error_pos = 0;
800eeca4
JW		 5865 expected_operand = idesc->operands[0];
5866 for (; idesc; idesc = get_next_opcode (idesc))
5867 {
5868 if (num_outputs != idesc->num_outputs)
5869 continue; /* mismatch in # of outputs */
5870
5871 CURR_SLOT.num_fixups = 0;
87f8eb97
JW		 5872
5873 /* Try to match all operands. If we see an out-of-range operand,
5874 then continue trying to match the rest of the operands, since if
5875 the rest match, then this idesc will give the best error message. */
5876
5877 out_of_range_pos = -1;
800eeca4 5878 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
87f8eb97
JW		 5879 {
5880 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
5881 if (result != OPERAND_MATCH)
5882 {
5883 if (result != OPERAND_OUT_OF_RANGE)
5884 break;
5885 if (out_of_range_pos < 0)
5886 /* remember position of the first out-of-range operand: */
5887 out_of_range_pos = i;
5888 }
5889 }
800eeca4 5890
87f8eb97
JW		 5891 /* If we did not match all operands, or if at least one operand was
5892 out-of-range, then this idesc does not match. Keep track of which
5893 idesc matched the most operands before failing. If we have two
5894 idescs that failed at the same position, and one had an out-of-range
5895 operand, then prefer the out-of-range operand. Thus if we have
5896 "add r0=0x1000000,r1" we get an error saying the constant is out
5897 of range instead of an error saying that the constant should have been
5898 a register. */
5899
5900 if (i != num_operands || out_of_range_pos >= 0)
800eeca4 5901 {
87f8eb97
JW		 5902 if (i > highest_unmatched_operand
5903 || (i == highest_unmatched_operand
5904 && out_of_range_pos > curr_out_of_range_pos))
800eeca4
JW		 5905 {
5906 highest_unmatched_operand = i;
87f8eb97
JW		 5907 if (out_of_range_pos >= 0)
5908 {
5909 expected_operand = idesc->operands[out_of_range_pos];
5910 error_pos = out_of_range_pos;
5911 }
5912 else
5913 {
5914 expected_operand = idesc->operands[i];
5915 error_pos = i;
5916 }
5917 curr_out_of_range_pos = out_of_range_pos;
800eeca4
JW		 5918 }
5919 continue;
5920 }
5921
5922 if (num_operands < NELEMS (idesc->operands)
5923 && idesc->operands[num_operands])
5924 continue; /* mismatch in number of arguments */
5925
5926 break;
5927 }
5928 if (!idesc)
5929 {
5930 if (expected_operand)
5931 as_bad ("Operand %u of `%s' should be %s",
87f8eb97 5932 error_pos + 1, mnemonic,
800eeca4
JW		 5933 elf64_ia64_operands[expected_operand].desc);
5934 else
5935 as_bad ("Operand mismatch");
5936 return 0;
5937 }
5938 return idesc;
5939}
5940
88be23ec
BS		 5941/* Keep track of state necessary to determine whether a NOP is necessary
5942 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5943 detect a case where additional NOPs may be necessary. */
5944static int
5945errata_nop_necessary_p (slot, insn_unit)
5946 struct slot *slot;
5947 enum ia64_unit insn_unit;
5948{
5949 int i;
5950 struct group *this_group = md.last_groups + md.group_idx;
5951 struct group *prev_group = md.last_groups + (md.group_idx + 2) % 3;
5952 struct ia64_opcode *idesc = slot->idesc;
5953
5954 /* Test whether this could be the first insn in a problematic sequence. */
5955 if (insn_unit == IA64_UNIT_F)
5956 {
5957 for (i = 0; i < idesc->num_outputs; i++)
5958 if (idesc->operands[i] == IA64_OPND_P1
5959 || idesc->operands[i] == IA64_OPND_P2)
5960 {
5961 int regno = slot->opnd[i].X_add_number - REG_P;
3557da92 5962 /* Ignore invalid operands; they generate errors elsewhere. */
ca683b78 5963 if (regno >= 64)
3557da92 5964 return 0;
88be23ec
BS		 5965 this_group->p_reg_set[regno] = 1;
5966 }
5967 }
5968
5969 /* Test whether this could be the second insn in a problematic sequence. */
5970 if (insn_unit == IA64_UNIT_M && slot->qp_regno > 0
5971 && prev_group->p_reg_set[slot->qp_regno])
5972 {
5973 for (i = 0; i < idesc->num_outputs; i++)
5974 if (idesc->operands[i] == IA64_OPND_R1
5975 || idesc->operands[i] == IA64_OPND_R2
5976 || idesc->operands[i] == IA64_OPND_R3)
5977 {
5978 int regno = slot->opnd[i].X_add_number - REG_GR;
3557da92 5979 /* Ignore invalid operands; they generate errors elsewhere. */
ca683b78 5980 if (regno >= 128)
3557da92 5981 return 0;
88be23ec
BS		 5982 if (strncmp (idesc->name, "add", 3) != 0
5983 && strncmp (idesc->name, "sub", 3) != 0
5984 && strncmp (idesc->name, "shladd", 6) != 0
5985 && (idesc->flags & IA64_OPCODE_POSTINC) == 0)
5986 this_group->g_reg_set_conditionally[regno] = 1;
5987 }
5988 }
5989
5990 /* Test whether this could be the third insn in a problematic sequence. */
5991 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++)
5992 {
5993 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5994 idesc->operands[i] == IA64_OPND_R3
5995 /* For mov indirect. */
5996 || idesc->operands[i] == IA64_OPND_RR_R3
5997 || idesc->operands[i] == IA64_OPND_DBR_R3
5998 || idesc->operands[i] == IA64_OPND_IBR_R3
5999 || idesc->operands[i] == IA64_OPND_PKR_R3
6000 || idesc->operands[i] == IA64_OPND_PMC_R3
6001 || idesc->operands[i] == IA64_OPND_PMD_R3
6002 || idesc->operands[i] == IA64_OPND_MSR_R3
6003 || idesc->operands[i] == IA64_OPND_CPUID_R3
6004 /* For itr. */
6005 || idesc->operands[i] == IA64_OPND_ITR_R3
6006 || idesc->operands[i] == IA64_OPND_DTR_R3
6007 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
6008 || idesc->operands[i] == IA64_OPND_MR3)
6009 {
6010 int regno = slot->opnd[i].X_add_number - REG_GR;
3557da92 6011 /* Ignore invalid operands; they generate errors elsewhere. */
ca683b78 6012 if (regno >= 128)
3557da92 6013 return 0;
88be23ec
BS		 6014 if (idesc->operands[i] == IA64_OPND_R3)
6015 {
6016 if (strcmp (idesc->name, "fc") != 0
6017 && strcmp (idesc->name, "tak") != 0
6018 && strcmp (idesc->name, "thash") != 0
6019 && strcmp (idesc->name, "tpa") != 0
6020 && strcmp (idesc->name, "ttag") != 0
6021 && strncmp (idesc->name, "ptr", 3) != 0
6022 && strncmp (idesc->name, "ptc", 3) != 0
6023 && strncmp (idesc->name, "probe", 5) != 0)
40449e9f 6024 return 0;
88be23ec 6025 }
bc805888 6026 if (prev_group->g_reg_set_conditionally[regno])
88be23ec
BS		 6027 return 1;
6028 }
6029 }
6030 return 0;
6031}
6032
800eeca4
JW		 6033static void
6034build_insn (slot, insnp)
6035 struct slot *slot;
6036 bfd_vma *insnp;
6037{
6038 const struct ia64_operand *odesc, *o2desc;
6039 struct ia64_opcode *idesc = slot->idesc;
6040 bfd_signed_vma insn, val;
6041 const char *err;
6042 int i;
6043
6044 insn = idesc->opcode | slot->qp_regno;
6045
6046 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6047 {
c67e42c9
RH		 6048 if (slot->opnd[i].X_op == O_register
6049 || slot->opnd[i].X_op == O_constant
6050 || slot->opnd[i].X_op == O_index)
6051 val = slot->opnd[i].X_add_number;
6052 else if (slot->opnd[i].X_op == O_big)
800eeca4 6053 {
c67e42c9
RH		 6054 /* This must be the value 0x10000000000000000. */
6055 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6056 val = 0;
6057 }
6058 else
6059 val = 0;
6060
6061 switch (idesc->operands[i])
6062 {
6063 case IA64_OPND_IMMU64:
800eeca4
JW		 6064 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6065 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6066 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6067 | (((val >> 63) & 0x1) << 36));
c67e42c9
RH		 6068 continue;
6069
6070 case IA64_OPND_IMMU62:
542d6675
KH		 6071 val &= 0x3fffffffffffffffULL;
6072 if (val != slot->opnd[i].X_add_number)
6073 as_warn (_("Value truncated to 62 bits"));
6074 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6075 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
c67e42c9 6076 continue;
800eeca4 6077
c67e42c9
RH		 6078 case IA64_OPND_TGT64:
6079 val >>= 4;
6080 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6081 insn |= ((((val >> 59) & 0x1) << 36)
6082 | (((val >> 0) & 0xfffff) << 13));
6083 continue;
800eeca4 6084
c67e42c9
RH		 6085 case IA64_OPND_AR3:
6086 val -= REG_AR;
6087 break;
6088
6089 case IA64_OPND_B1:
6090 case IA64_OPND_B2:
6091 val -= REG_BR;
6092 break;
6093
6094 case IA64_OPND_CR3:
6095 val -= REG_CR;
6096 break;
6097
6098 case IA64_OPND_F1:
6099 case IA64_OPND_F2:
6100 case IA64_OPND_F3:
6101 case IA64_OPND_F4:
6102 val -= REG_FR;
6103 break;
6104
6105 case IA64_OPND_P1:
6106 case IA64_OPND_P2:
6107 val -= REG_P;
6108 break;
6109
6110 case IA64_OPND_R1:
6111 case IA64_OPND_R2:
6112 case IA64_OPND_R3:
6113 case IA64_OPND_R3_2:
6114 case IA64_OPND_CPUID_R3:
6115 case IA64_OPND_DBR_R3:
6116 case IA64_OPND_DTR_R3:
6117 case IA64_OPND_ITR_R3:
6118 case IA64_OPND_IBR_R3:
6119 case IA64_OPND_MR3:
6120 case IA64_OPND_MSR_R3:
6121 case IA64_OPND_PKR_R3:
6122 case IA64_OPND_PMC_R3:
6123 case IA64_OPND_PMD_R3:
197865e8 6124 case IA64_OPND_RR_R3:
c67e42c9
RH		 6125 val -= REG_GR;
6126 break;
6127
6128 default:
6129 break;
6130 }
6131
6132 odesc = elf64_ia64_operands + idesc->operands[i];
6133 err = (*odesc->insert) (odesc, val, &insn);
6134 if (err)
6135 as_bad_where (slot->src_file, slot->src_line,
6136 "Bad operand value: %s", err);
6137 if (idesc->flags & IA64_OPCODE_PSEUDO)
6138 {
6139 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6140 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6141 {
6142 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6143 (*o2desc->insert) (o2desc, val, &insn);
800eeca4 6144 }
c67e42c9
RH		 6145 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6146 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6147 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
800eeca4 6148 {
c67e42c9
RH		 6149 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6150 (*o2desc->insert) (o2desc, 64 - val, &insn);
800eeca4
JW		 6151 }
6152 }
6153 }
6154 *insnp = insn;
6155}
6156
6157static void
6158emit_one_bundle ()
6159{
f4660e2c 6160 int manual_bundling_off = 0, manual_bundling = 0;
800eeca4
JW		 6161 enum ia64_unit required_unit, insn_unit = 0;
6162 enum ia64_insn_type type[3], insn_type;
6163 unsigned int template, orig_template;
542d6675 6164 bfd_vma insn[3] = { -1, -1, -1 };
800eeca4
JW		 6165 struct ia64_opcode *idesc;
6166 int end_of_insn_group = 0, user_template = -1;
6167 int n, i, j, first, curr;
d6e78c11 6168 unw_rec_list *ptr, *last_ptr, *end_ptr;
800eeca4
JW		 6169 bfd_vma t0 = 0, t1 = 0;
6170 struct label_fix *lfix;
6171 struct insn_fix *ifix;
6172 char mnemonic[16];
6173 fixS *fix;
6174 char *f;
5a9ff93d 6175 int addr_mod;
800eeca4
JW		 6176
6177 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6178 know (first >= 0 & first < NUM_SLOTS);
6179 n = MIN (3, md.num_slots_in_use);
6180
6181 /* Determine template: user user_template if specified, best match
542d6675 6182 otherwise: */
800eeca4
JW		 6183
6184 if (md.slot[first].user_template >= 0)
6185 user_template = template = md.slot[first].user_template;
6186 else
6187 {
032efc85 6188 /* Auto select appropriate template. */
800eeca4
JW		 6189 memset (type, 0, sizeof (type));
6190 curr = first;
6191 for (i = 0; i < n; ++i)
6192 {
032efc85
RH		 6193 if (md.slot[curr].label_fixups && i != 0)
6194 break;
800eeca4
JW		 6195 type[i] = md.slot[curr].idesc->type;
6196 curr = (curr + 1) % NUM_SLOTS;
6197 }
6198 template = best_template[type[0]][type[1]][type[2]];
6199 }
6200
542d6675 6201 /* initialize instructions with appropriate nops: */
800eeca4
JW		 6202 for (i = 0; i < 3; ++i)
6203 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6204
6205 f = frag_more (16);
6206
5a9ff93d
JW		 6207 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6208 from the start of the frag. */
6209 addr_mod = frag_now_fix () & 15;
6210 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6211 as_bad (_("instruction address is not a multiple of 16"));
6212 frag_now->insn_addr = addr_mod;
6213 frag_now->has_code = 1;
6214
542d6675 6215 /* now fill in slots with as many insns as possible: */
800eeca4
JW		 6216 curr = first;
6217 idesc = md.slot[curr].idesc;
6218 end_of_insn_group = 0;
6219 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6220 {
d6e78c11
JW		 6221 /* If we have unwind records, we may need to update some now. */
6222 ptr = md.slot[curr].unwind_record;
6223 if (ptr)
6224 {
6225 /* Find the last prologue/body record in the list for the current
6226 insn, and set the slot number for all records up to that point.
6227 This needs to be done now, because prologue/body records refer to
6228 the current point, not the point after the instruction has been
6229 issued. This matters because there may have been nops emitted
6230 meanwhile. Any non-prologue non-body record followed by a
6231 prologue/body record must also refer to the current point. */
6232 last_ptr = NULL;
6233 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6234 for (; ptr != end_ptr; ptr = ptr->next)
6235 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6236 || ptr->r.type == body)
6237 last_ptr = ptr;
6238 if (last_ptr)
6239 {
6240 /* Make last_ptr point one after the last prologue/body
6241 record. */
6242 last_ptr = last_ptr->next;
6243 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6244 ptr = ptr->next)
6245 {
6246 ptr->slot_number = (unsigned long) f + i;
6247 ptr->slot_frag = frag_now;
6248 }
6249 /* Remove the initialized records, so that we won't accidentally
6250 update them again if we insert a nop and continue. */
6251 md.slot[curr].unwind_record = last_ptr;
6252 }
6253 }
e0c9811a 6254
f4660e2c
JB		 6255 manual_bundling_off = md.slot[curr].manual_bundling_off;
6256 if (md.slot[curr].manual_bundling_on)
800eeca4 6257 {
f4660e2c
JB		 6258 if (curr == first)
6259 manual_bundling = 1;
800eeca4 6260 else
f4660e2c
JB		 6261 break; /* Need to start a new bundle. */
6262 }
6263
6264 if (idesc->flags & IA64_OPCODE_SLOT2)
6265 {
6266 if (manual_bundling && !manual_bundling_off)
6267 {
6268 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6269 "`%s' must be last in bundle", idesc->name);
6270 if (i < 2)
6271 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6272 }
6273 i = 2;
800eeca4
JW		 6274 }
6275 if (idesc->flags & IA64_OPCODE_LAST)
6276 {
2434f565
JW		 6277 int required_slot;
6278 unsigned int required_template;
800eeca4
JW		 6279
6280 /* If we need a stop bit after an M slot, our only choice is
6281 template 5 (M;;MI). If we need a stop bit after a B
6282 slot, our only choice is to place it at the end of the
6283 bundle, because the only available templates are MIB,
6284 MBB, BBB, MMB, and MFB. We don't handle anything other
6285 than M and B slots because these are the only kind of
6286 instructions that can have the IA64_OPCODE_LAST bit set. */
6287 required_template = template;
6288 switch (idesc->type)
6289 {
6290 case IA64_TYPE_M:
6291 required_slot = 0;
6292 required_template = 5;
6293 break;
6294
6295 case IA64_TYPE_B:
6296 required_slot = 2;
6297 break;
6298
6299 default:
6300 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6301 "Internal error: don't know how to force %s to end"
6302 "of instruction group", idesc->name);
6303 required_slot = i;
6304 break;
6305 }
f4660e2c
JB		 6306 if (manual_bundling
6307 && (i > required_slot
6308 || (required_slot == 2 && !manual_bundling_off)
6309 || (user_template >= 0
6310 /* Changing from MMI to M;MI is OK. */
6311 && (template ^ required_template) > 1)))
6312 {
6313 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6314 "`%s' must be last in instruction group",
6315 idesc->name);
6316 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6317 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6318 }
800eeca4
JW		 6319 if (required_slot < i)
6320 /* Can't fit this instruction. */
6321 break;
6322
6323 i = required_slot;
6324 if (required_template != template)
6325 {
6326 /* If we switch the template, we need to reset the NOPs
6327 after slot i. The slot-types of the instructions ahead
6328 of i never change, so we don't need to worry about
6329 changing NOPs in front of this slot. */
6330 for (j = i; j < 3; ++j)
6331 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6332 }
6333 template = required_template;
6334 }
6335 if (curr != first && md.slot[curr].label_fixups)
6336 {
f4660e2c
JB		 6337 if (manual_bundling)
6338 {
6339 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
800eeca4 6340 "Label must be first in a bundle");
f4660e2c
JB		 6341 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6342 }
800eeca4
JW		 6343 /* This insn must go into the first slot of a bundle. */
6344 break;
6345 }
6346
800eeca4
JW		 6347 if (end_of_insn_group && md.num_slots_in_use >= 1)
6348 {
6349 /* We need an instruction group boundary in the middle of a
6350 bundle. See if we can switch to an other template with
6351 an appropriate boundary. */
6352
6353 orig_template = template;
6354 if (i == 1 && (user_template == 4
6355 || (user_template < 0
6356 && (ia64_templ_desc[template].exec_unit[0]
6357 == IA64_UNIT_M))))
6358 {
6359 template = 5;
6360 end_of_insn_group = 0;
6361 }
6362 else if (i == 2 && (user_template == 0
6363 || (user_template < 0
6364 && (ia64_templ_desc[template].exec_unit[1]
6365 == IA64_UNIT_I)))
6366 /* This test makes sure we don't switch the template if
6367 the next instruction is one that needs to be first in
6368 an instruction group. Since all those instructions are
6369 in the M group, there is no way such an instruction can
6370 fit in this bundle even if we switch the template. The
6371 reason we have to check for this is that otherwise we
6372 may end up generating "MI;;I M.." which has the deadly
6373 effect that the second M instruction is no longer the
f4660e2c 6374 first in the group! --davidm 99/12/16 */
800eeca4
JW		 6375 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6376 {
6377 template = 1;
6378 end_of_insn_group = 0;
6379 }
f4660e2c
JB		 6380 else if (i == 1
6381 && user_template == 0
6382 && !(idesc->flags & IA64_OPCODE_FIRST))
6383 /* Use the next slot. */
6384 continue;
800eeca4
JW		 6385 else if (curr != first)
6386 /* can't fit this insn */
6387 break;
6388
6389 if (template != orig_template)
6390 /* if we switch the template, we need to reset the NOPs
6391 after slot i. The slot-types of the instructions ahead
6392 of i never change, so we don't need to worry about
6393 changing NOPs in front of this slot. */
6394 for (j = i; j < 3; ++j)
6395 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6396 }
6397 required_unit = ia64_templ_desc[template].exec_unit[i];
6398
c10d9d8f 6399 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
800eeca4
JW		 6400 if (idesc->type == IA64_TYPE_DYN)
6401 {
97762d08
JB		 6402 enum ia64_opnd opnd1, opnd2;
6403
800eeca4 6404 if ((strcmp (idesc->name, "nop") == 0)
c10d9d8f 6405 || (strcmp (idesc->name, "hint") == 0)
800eeca4
JW		 6406 || (strcmp (idesc->name, "break") == 0))
6407 insn_unit = required_unit;
97762d08
JB		 6408 else if (strcmp (idesc->name, "chk.s") == 0
6409 || strcmp (idesc->name, "mov") == 0)
800eeca4
JW		 6410 {
6411 insn_unit = IA64_UNIT_M;
97762d08
JB		 6412 if (required_unit == IA64_UNIT_I
6413 || (required_unit == IA64_UNIT_F && template == 6))
800eeca4
JW		 6414 insn_unit = IA64_UNIT_I;
6415 }
6416 else
6417 as_fatal ("emit_one_bundle: unexpected dynamic op");
6418
09124b3f 6419 sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]);
97762d08
JB		 6420 opnd1 = idesc->operands[0];
6421 opnd2 = idesc->operands[1];
3d56ab85 6422 ia64_free_opcode (idesc);
97762d08
JB		 6423 idesc = ia64_find_opcode (mnemonic);
6424 /* moves to/from ARs have collisions */
6425 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6426 {
6427 while (idesc != NULL
6428 && (idesc->operands[0] != opnd1
6429 || idesc->operands[1] != opnd2))
6430 idesc = get_next_opcode (idesc);
6431 }
800eeca4 6432#if 0
97762d08
JB		 6433 else
6434 /* no other resolved dynamic ops have collisions */
6435 know (!get_next_opcode (idesc));
800eeca4 6436#endif
97762d08 6437 md.slot[curr].idesc = idesc;
800eeca4
JW		 6438 }
6439 else
6440 {
6441 insn_type = idesc->type;
6442 insn_unit = IA64_UNIT_NIL;
6443 switch (insn_type)
6444 {
6445 case IA64_TYPE_A:
6446 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6447 insn_unit = required_unit;
6448 break;
542d6675 6449 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
800eeca4
JW		 6450 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6451 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6452 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6453 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6454 default: break;
6455 }
6456 }
6457
6458 if (insn_unit != required_unit)
6459 {
6460 if (required_unit == IA64_UNIT_L
542d6675 6461 && insn_unit == IA64_UNIT_I
800eeca4
JW		 6462 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6463 {
6464 /* we got ourselves an MLX template but the current
197865e8 6465 instruction isn't an X-unit, or an I-unit instruction
800eeca4
JW		 6466 that can go into the X slot of an MLX template. Duh. */
6467 if (md.num_slots_in_use >= NUM_SLOTS)
6468 {
6469 as_bad_where (md.slot[curr].src_file,
6470 md.slot[curr].src_line,
6471 "`%s' can't go in X slot of "
6472 "MLX template", idesc->name);
542d6675 6473 /* drop this insn so we don't livelock: */
800eeca4
JW		 6474 --md.num_slots_in_use;
6475 }
6476 break;
6477 }
6478 continue; /* try next slot */
6479 }
6480
196e8040
JW		 6481 if (debug_type == DEBUG_DWARF2 || md.slot[curr].loc_directive_seen)
6482 {
6483 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
800eeca4 6484
196e8040
JW		 6485 md.slot[curr].loc_directive_seen = 0;
6486 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6487 }
800eeca4 6488
88be23ec
BS		 6489 if (errata_nop_necessary_p (md.slot + curr, insn_unit))
6490 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6491
800eeca4
JW		 6492 build_insn (md.slot + curr, insn + i);
6493
d6e78c11
JW		 6494 ptr = md.slot[curr].unwind_record;
6495 if (ptr)
6496 {
6497 /* Set slot numbers for all remaining unwind records belonging to the
6498 current insn. There can not be any prologue/body unwind records
6499 here. */
6500 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6501 for (; ptr != end_ptr; ptr = ptr->next)
6502 {
6503 ptr->slot_number = (unsigned long) f + i;
6504 ptr->slot_frag = frag_now;
6505 }
6506 md.slot[curr].unwind_record = NULL;
6507 }
10850f29 6508
800eeca4
JW		 6509 if (required_unit == IA64_UNIT_L)
6510 {
6511 know (i == 1);
6512 /* skip one slot for long/X-unit instructions */
6513 ++i;
6514 }
6515 --md.num_slots_in_use;
6516
542d6675 6517 /* now is a good time to fix up the labels for this insn: */
800eeca4
JW		 6518 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6519 {
6520 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6521 symbol_set_frag (lfix->sym, frag_now);
6522 }
f1bcba5b
JW		 6523 /* and fix up the tags also. */
6524 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6525 {
6526 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6527 symbol_set_frag (lfix->sym, frag_now);
6528 }
800eeca4
JW		 6529
6530 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6531 {
6532 ifix = md.slot[curr].fixup + j;
5a080f89 6533 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
800eeca4
JW		 6534 &ifix->expr, ifix->is_pcrel, ifix->code);
6535 fix->tc_fix_data.opnd = ifix->opnd;
6536 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6537 fix->fx_file = md.slot[curr].src_file;
6538 fix->fx_line = md.slot[curr].src_line;
6539 }
6540
6541 end_of_insn_group = md.slot[curr].end_of_insn_group;
6542
88be23ec
BS		 6543 if (end_of_insn_group)
6544 {
6545 md.group_idx = (md.group_idx + 1) % 3;
6546 memset (md.last_groups + md.group_idx, 0, sizeof md.last_groups[0]);
6547 }
6548
542d6675 6549 /* clear slot: */
800eeca4
JW		 6550 ia64_free_opcode (md.slot[curr].idesc);
6551 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6552 md.slot[curr].user_template = -1;
6553
6554 if (manual_bundling_off)
6555 {
6556 manual_bundling = 0;
6557 break;
6558 }
6559 curr = (curr + 1) % NUM_SLOTS;
6560 idesc = md.slot[curr].idesc;
6561 }
f4660e2c 6562 if (manual_bundling > 0)
800eeca4
JW		 6563 {
6564 if (md.num_slots_in_use > 0)
ac025970
L		 6565 {
6566 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6567 "`%s' does not fit into %s template",
6568 idesc->name, ia64_templ_desc[template].name);
6569 --md.num_slots_in_use;
6570 }
800eeca4
JW		 6571 else
6572 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6573 "Missing '}' at end of file");
6574 }
6575 know (md.num_slots_in_use < NUM_SLOTS);
6576
6577 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6578 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6579
44f5c83a
JW		 6580 number_to_chars_littleendian (f + 0, t0, 8);
6581 number_to_chars_littleendian (f + 8, t1, 8);
f5a30c2e 6582
73f20958
L		 6583 if (unwind.list)
6584 {
127cab00
L		 6585 unwind.list->next_slot_number = (unsigned long) f + 16;
6586 unwind.list->next_slot_frag = frag_now;
73f20958 6587 }
800eeca4
JW		 6588}
6589
6590int
6591md_parse_option (c, arg)
6592 int c;
6593 char *arg;
6594{
7463c317 6595
800eeca4
JW		 6596 switch (c)
6597 {
c43c2cc5 6598 /* Switches from the Intel assembler. */
44f5c83a 6599 case 'm':
800eeca4
JW		 6600 if (strcmp (arg, "ilp64") == 0
6601 || strcmp (arg, "lp64") == 0
6602 || strcmp (arg, "p64") == 0)
6603 {
6604 md.flags |= EF_IA_64_ABI64;
6605 }
6606 else if (strcmp (arg, "ilp32") == 0)
6607 {
6608 md.flags &= ~EF_IA_64_ABI64;
6609 }
6610 else if (strcmp (arg, "le") == 0)
6611 {
6612 md.flags &= ~EF_IA_64_BE;
549f748d 6613 default_big_endian = 0;
800eeca4
JW		 6614 }
6615 else if (strcmp (arg, "be") == 0)
6616 {
6617 md.flags |= EF_IA_64_BE;
549f748d 6618 default_big_endian = 1;
800eeca4
JW		 6619 }
6620 else
6621 return 0;
6622 break;
6623
6624 case 'N':
6625 if (strcmp (arg, "so") == 0)
6626 {
542d6675 6627 /* Suppress signon message. */
800eeca4
JW		 6628 }
6629 else if (strcmp (arg, "pi") == 0)
6630 {
6631 /* Reject privileged instructions. FIXME */
6632 }
6633 else if (strcmp (arg, "us") == 0)
6634 {
6635 /* Allow union of signed and unsigned range. FIXME */
6636 }
6637 else if (strcmp (arg, "close_fcalls") == 0)
6638 {
6639 /* Do not resolve global function calls. */
6640 }
6641 else
6642 return 0;
6643 break;
6644
6645 case 'C':
6646 /* temp[="prefix"] Insert temporary labels into the object file
6647 symbol table prefixed by "prefix".
6648 Default prefix is ":temp:".
6649 */
6650 break;
6651
6652 case 'a':
800eeca4
JW		 6653 /* indirect=<tgt> Assume unannotated indirect branches behavior
6654 according to <tgt> --
6655 exit: branch out from the current context (default)
6656 labels: all labels in context may be branch targets
6657 */
85b40035
L		 6658 if (strncmp (arg, "indirect=", 9) != 0)
6659 return 0;
800eeca4
JW		 6660 break;
6661
6662 case 'x':
6663 /* -X conflicts with an ignored option, use -x instead */
6664 md.detect_dv = 1;
6665 if (!arg || strcmp (arg, "explicit") == 0)
542d6675
KH		 6666 {
6667 /* set default mode to explicit */
6668 md.default_explicit_mode = 1;
6669 break;
6670 }
800eeca4 6671 else if (strcmp (arg, "auto") == 0)
542d6675
KH		 6672 {
6673 md.default_explicit_mode = 0;
6674 }
800eeca4 6675 else if (strcmp (arg, "debug") == 0)
542d6675
KH		 6676 {
6677 md.debug_dv = 1;
6678 }
800eeca4 6679 else if (strcmp (arg, "debugx") == 0)
542d6675
KH		 6680 {
6681 md.default_explicit_mode = 1;
6682 md.debug_dv = 1;
6683 }
800eeca4 6684 else
542d6675
KH		 6685 {
6686 as_bad (_("Unrecognized option '-x%s'"), arg);
6687 }
800eeca4
JW		 6688 break;
6689
6690 case 'S':
6691 /* nops Print nops statistics. */
6692 break;
6693
c43c2cc5
JW		 6694 /* GNU specific switches for gcc. */
6695 case OPTION_MCONSTANT_GP:
6696 md.flags |= EF_IA_64_CONS_GP;
6697 break;
6698
6699 case OPTION_MAUTO_PIC:
6700 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
6701 break;
6702
800eeca4
JW		 6703 default:
6704 return 0;
6705 }
6706
6707 return 1;
6708}
6709
6710void
6711md_show_usage (stream)
6712 FILE *stream;
6713{
542d6675 6714 fputs (_("\
800eeca4 6715IA-64 options:\n\
6290819d
NC		 6716 --mconstant-gp mark output file as using the constant-GP model\n\
6717 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6718 --mauto-pic mark output file as using the constant-GP model\n\
6719 without function descriptors (sets ELF header flag\n\
6720 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
44f5c83a
JW		 6721 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6722 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
800eeca4
JW		 6723 -x | -xexplicit turn on dependency violation checking (default)\n\
6724 -xauto automagically remove dependency violations\n\
6725 -xdebug debug dependency violation checker\n"),
6726 stream);
6727}
6728
acebd4ce
AS		 6729void
6730ia64_after_parse_args ()
6731{
6732 if (debug_type == DEBUG_STABS)
6733 as_fatal (_("--gstabs is not supported for ia64"));
6734}
6735
44576e1f
RH		 6736/* Return true if TYPE fits in TEMPL at SLOT. */
6737
6738static int
800eeca4
JW		 6739match (int templ, int type, int slot)
6740{
6741 enum ia64_unit unit;
6742 int result;
6743
6744 unit = ia64_templ_desc[templ].exec_unit[slot];
6745 switch (type)
6746 {
6747 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
6748 case IA64_TYPE_A:
6749 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
6750 break;
6751 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
6752 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
6753 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
6754 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
6755 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
6756 default: result = 0; break;
6757 }
6758 return result;
6759}
6760
44576e1f
RH		 6761/* Add a bit of extra goodness if a nop of type F or B would fit
6762 in TEMPL at SLOT. */
6763
6764static inline int
6765extra_goodness (int templ, int slot)
6766{
ebeeafe6 6767 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
44576e1f 6768 return 2;
ebeeafe6 6769 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
44576e1f
RH		 6770 return 1;
6771 return 0;
6772}
6773
800eeca4
JW		 6774/* This function is called once, at assembler startup time. It sets
6775 up all the tables, etc. that the MD part of the assembler will need
6776 that can be determined before arguments are parsed. */
6777void
6778md_begin ()
6779{
44f5c83a 6780 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
800eeca4
JW		 6781 const char *err;
6782 char name[8];
6783
6784 md.auto_align = 1;
6785 md.explicit_mode = md.default_explicit_mode;
6786
6787 bfd_set_section_alignment (stdoutput, text_section, 4);
6788
0234cb7c 6789 /* Make sure function pointers get initialized. */
10a98291 6790 target_big_endian = -1;
549f748d 6791 dot_byteorder (default_big_endian);
10a98291 6792
35f5df7f
L		 6793 alias_hash = hash_new ();
6794 alias_name_hash = hash_new ();
6795 secalias_hash = hash_new ();
6796 secalias_name_hash = hash_new ();
6797
13ae64f3
JJ		 6798 pseudo_func[FUNC_DTP_MODULE].u.sym =
6799 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
6800 &zero_address_frag);
6801
6802 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
6803 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
6804 &zero_address_frag);
6805
800eeca4 6806 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
542d6675
KH		 6807 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
6808 &zero_address_frag);
800eeca4
JW		 6809
6810 pseudo_func[FUNC_GP_RELATIVE].u.sym =
542d6675
KH		 6811 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
6812 &zero_address_frag);
800eeca4
JW		 6813
6814 pseudo_func[FUNC_LT_RELATIVE].u.sym =
542d6675
KH		 6815 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
6816 &zero_address_frag);
800eeca4 6817
fa2c7eff
RH		 6818 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
6819 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
6820 &zero_address_frag);
6821
c67e42c9 6822 pseudo_func[FUNC_PC_RELATIVE].u.sym =
542d6675
KH		 6823 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
6824 &zero_address_frag);
c67e42c9 6825
800eeca4 6826 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
542d6675
KH		 6827 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
6828 &zero_address_frag);
800eeca4
JW		 6829
6830 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
542d6675
KH		 6831 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
6832 &zero_address_frag);
800eeca4
JW		 6833
6834 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
542d6675
KH		 6835 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
6836 &zero_address_frag);
800eeca4 6837
13ae64f3
JJ		 6838 pseudo_func[FUNC_TP_RELATIVE].u.sym =
6839 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
6840 &zero_address_frag);
6841
800eeca4 6842 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
542d6675
KH		 6843 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
6844 &zero_address_frag);
800eeca4
JW		 6845
6846 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
542d6675
KH		 6847 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
6848 &zero_address_frag);
800eeca4 6849
13ae64f3
JJ		 6850 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
6851 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
6852 &zero_address_frag);
6853
6854 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
6855 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
6856 &zero_address_frag);
6857
6858 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
6859 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
6860 &zero_address_frag);
6861
3969b680
RH		 6862 pseudo_func[FUNC_IPLT_RELOC].u.sym =
6863 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
6864 &zero_address_frag);
6865
197865e8 6866 /* Compute the table of best templates. We compute goodness as a
44576e1f
RH		 6867 base 4 value, in which each match counts for 3, each F counts
6868 for 2, each B counts for 1. This should maximize the number of
6869 F and B nops in the chosen bundles, which is good because these
6870 pipelines are least likely to be overcommitted. */
800eeca4
JW		 6871 for (i = 0; i < IA64_NUM_TYPES; ++i)
6872 for (j = 0; j < IA64_NUM_TYPES; ++j)
6873 for (k = 0; k < IA64_NUM_TYPES; ++k)
6874 {
6875 best = 0;
6876 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
6877 {
6878 goodness = 0;
6879 if (match (t, i, 0))
6880 {
6881 if (match (t, j, 1))
6882 {
6883 if (match (t, k, 2))
44576e1f 6884 goodness = 3 + 3 + 3;
800eeca4 6885 else
44576e1f 6886 goodness = 3 + 3 + extra_goodness (t, 2);
800eeca4
JW		 6887 }
6888 else if (match (t, j, 2))
44576e1f 6889 goodness = 3 + 3 + extra_goodness (t, 1);
800eeca4 6890 else
44576e1f
RH		 6891 {
6892 goodness = 3;
6893 goodness += extra_goodness (t, 1);
6894 goodness += extra_goodness (t, 2);
6895 }
800eeca4
JW		 6896 }
6897 else if (match (t, i, 1))
6898 {
6899 if (match (t, j, 2))
44576e1f 6900 goodness = 3 + 3;
800eeca4 6901 else
44576e1f 6902 goodness = 3 + extra_goodness (t, 2);
800eeca4
JW		 6903 }
6904 else if (match (t, i, 2))
44576e1f 6905 goodness = 3 + extra_goodness (t, 1);
800eeca4
JW		 6906
6907 if (goodness > best)
6908 {
6909 best = goodness;
6910 best_template[i][j][k] = t;
6911 }
6912 }
6913 }
6914
6915 for (i = 0; i < NUM_SLOTS; ++i)
6916 md.slot[i].user_template = -1;
6917
6918 md.pseudo_hash = hash_new ();
6919 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
6920 {
6921 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
6922 (void *) (pseudo_opcode + i));
6923 if (err)
6924 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6925 pseudo_opcode[i].name, err);
6926 }
6927
6928 md.reg_hash = hash_new ();
6929 md.dynreg_hash = hash_new ();
6930 md.const_hash = hash_new ();
6931 md.entry_hash = hash_new ();
6932
542d6675 6933 /* general registers: */
800eeca4
JW		 6934
6935 total = 128;
6936 for (i = 0; i < total; ++i)
6937 {
6938 sprintf (name, "r%d", i - REG_GR);
6939 md.regsym[i] = declare_register (name, i);
6940 }
6941
542d6675 6942 /* floating point registers: */
800eeca4
JW		 6943 total += 128;
6944 for (; i < total; ++i)
6945 {
6946 sprintf (name, "f%d", i - REG_FR);
6947 md.regsym[i] = declare_register (name, i);
6948 }
6949
542d6675 6950 /* application registers: */
800eeca4
JW		 6951 total += 128;
6952 ar_base = i;
6953 for (; i < total; ++i)
6954 {
6955 sprintf (name, "ar%d", i - REG_AR);
6956 md.regsym[i] = declare_register (name, i);
6957 }
6958
542d6675 6959 /* control registers: */
800eeca4
JW		 6960 total += 128;
6961 cr_base = i;
6962 for (; i < total; ++i)
6963 {
6964 sprintf (name, "cr%d", i - REG_CR);
6965 md.regsym[i] = declare_register (name, i);
6966 }
6967
542d6675 6968 /* predicate registers: */
800eeca4
JW		 6969 total += 64;
6970 for (; i < total; ++i)
6971 {
6972 sprintf (name, "p%d", i - REG_P);
6973 md.regsym[i] = declare_register (name, i);
6974 }
6975
542d6675 6976 /* branch registers: */
800eeca4
JW		 6977 total += 8;
6978 for (; i < total; ++i)
6979 {
6980 sprintf (name, "b%d", i - REG_BR);
6981 md.regsym[i] = declare_register (name, i);
6982 }
6983
6984 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
6985 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
6986 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
6987 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
6988 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
6989 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
6990 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
6991
6992 for (i = 0; i < NELEMS (indirect_reg); ++i)
6993 {
6994 regnum = indirect_reg[i].regnum;
6995 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
6996 }
6997
542d6675 6998 /* define synonyms for application registers: */
800eeca4
JW		 6999 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
7000 md.regsym[i] = declare_register (ar[i - REG_AR].name,
7001 REG_AR + ar[i - REG_AR].regnum);
7002
542d6675 7003 /* define synonyms for control registers: */
800eeca4
JW		 7004 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
7005 md.regsym[i] = declare_register (cr[i - REG_CR].name,
7006 REG_CR + cr[i - REG_CR].regnum);
7007
7008 declare_register ("gp", REG_GR + 1);
7009 declare_register ("sp", REG_GR + 12);
7010 declare_register ("rp", REG_BR + 0);
7011
542d6675 7012 /* pseudo-registers used to specify unwind info: */
e0c9811a
JW		 7013 declare_register ("psp", REG_PSP);
7014
800eeca4
JW		 7015 declare_register_set ("ret", 4, REG_GR + 8);
7016 declare_register_set ("farg", 8, REG_FR + 8);
7017 declare_register_set ("fret", 8, REG_FR + 8);
7018
7019 for (i = 0; i < NELEMS (const_bits); ++i)
7020 {
7021 err = hash_insert (md.const_hash, const_bits[i].name,
7022 (PTR) (const_bits + i));
7023 if (err)
7024 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7025 name, err);
7026 }
7027
44f5c83a
JW		 7028 /* Set the architecture and machine depending on defaults and command line
7029 options. */
7030 if (md.flags & EF_IA_64_ABI64)
7031 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7032 else
7033 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7034
7035 if (! ok)
7036 as_warn (_("Could not set architecture and machine"));
800eeca4 7037
557debba
JW		 7038 /* Set the pointer size and pointer shift size depending on md.flags */
7039
7040 if (md.flags & EF_IA_64_ABI64)
7041 {
7042 md.pointer_size = 8; /* pointers are 8 bytes */
7043 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7044 }
7045 else
7046 {
7047 md.pointer_size = 4; /* pointers are 4 bytes */
7048 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7049 }
7050
800eeca4
JW		 7051 md.mem_offset.hint = 0;
7052 md.path = 0;
7053 md.maxpaths = 0;
7054 md.entry_labels = NULL;
7055}
7056
44f5c83a
JW		 7057/* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
7058 because that is called after md_parse_option which is where we do the
7059 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
7060 default endianness. */
7061
7062void
7063ia64_init (argc, argv)
2434f565
JW		 7064 int argc ATTRIBUTE_UNUSED;
7065 char **argv ATTRIBUTE_UNUSED;
44f5c83a 7066{
1cd8ff38 7067 md.flags = MD_FLAGS_DEFAULT;
44f5c83a
JW		 7068}
7069
7070/* Return a string for the target object file format. */
7071
7072const char *
7073ia64_target_format ()
7074{
7075 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7076 {
72a76794
JW		 7077 if (md.flags & EF_IA_64_BE)
7078 {
7079 if (md.flags & EF_IA_64_ABI64)
1cd8ff38 7080#if defined(TE_AIX50)
7463c317 7081 return "elf64-ia64-aix-big";
1cd8ff38
NC		 7082#elif defined(TE_HPUX)
7083 return "elf64-ia64-hpux-big";
7463c317 7084#else
72a76794 7085 return "elf64-ia64-big";
7463c317 7086#endif
72a76794 7087 else
1cd8ff38 7088#if defined(TE_AIX50)
7463c317 7089 return "elf32-ia64-aix-big";
1cd8ff38
NC		 7090#elif defined(TE_HPUX)
7091 return "elf32-ia64-hpux-big";
7463c317 7092#else
72a76794 7093 return "elf32-ia64-big";
7463c317 7094#endif
72a76794 7095 }
44f5c83a 7096 else
72a76794
JW		 7097 {
7098 if (md.flags & EF_IA_64_ABI64)
7463c317
TW		 7099#ifdef TE_AIX50
7100 return "elf64-ia64-aix-little";
7101#else
72a76794 7102 return "elf64-ia64-little";
7463c317 7103#endif
72a76794 7104 else
7463c317
TW		 7105#ifdef TE_AIX50
7106 return "elf32-ia64-aix-little";
7107#else
72a76794 7108 return "elf32-ia64-little";
7463c317 7109#endif
72a76794 7110 }
44f5c83a
JW		 7111 }
7112 else
7113 return "unknown-format";
7114}
7115
800eeca4
JW		 7116void
7117ia64_end_of_source ()
7118{
542d6675 7119 /* terminate insn group upon reaching end of file: */
800eeca4
JW		 7120 insn_group_break (1, 0, 0);
7121
542d6675 7122 /* emits slots we haven't written yet: */
800eeca4
JW		 7123 ia64_flush_insns ();
7124
7125 bfd_set_private_flags (stdoutput, md.flags);
7126
800eeca4
JW		 7127 md.mem_offset.hint = 0;
7128}
7129
7130void
7131ia64_start_line ()
7132{
f1bcba5b
JW		 7133 if (md.qp.X_op == O_register)
7134 as_bad ("qualifying predicate not followed by instruction");
800eeca4
JW		 7135 md.qp.X_op = O_absent;
7136
7137 if (ignore_input ())
7138 return;
7139
7140 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7141 {
7142 if (md.detect_dv && !md.explicit_mode)
542d6675 7143 as_warn (_("Explicit stops are ignored in auto mode"));
800eeca4 7144 else
542d6675 7145 insn_group_break (1, 0, 0);
800eeca4
JW		 7146 }
7147}
7148
f1bcba5b
JW		 7149/* This is a hook for ia64_frob_label, so that it can distinguish tags from
7150 labels. */
7151static int defining_tag = 0;
7152
800eeca4
JW		 7153int
7154ia64_unrecognized_line (ch)
7155 int ch;
7156{
7157 switch (ch)
7158 {
7159 case '(':
7160 expression (&md.qp);
7161 if (*input_line_pointer++ != ')')
7162 {
7163 as_bad ("Expected ')'");
7164 return 0;
7165 }
7166 if (md.qp.X_op != O_register)
7167 {
7168 as_bad ("Qualifying predicate expected");
7169 return 0;
7170 }
7171 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7172 {
7173 as_bad ("Predicate register expected");
7174 return 0;
7175 }
7176 return 1;
7177
7178 case '{':
7179 if (md.manual_bundling)
7180 as_warn ("Found '{' when manual bundling is already turned on");
7181 else
7182 CURR_SLOT.manual_bundling_on = 1;
7183 md.manual_bundling = 1;
7184
542d6675
KH		 7185 /* Bundling is only acceptable in explicit mode
7186 or when in default automatic mode. */
800eeca4 7187 if (md.detect_dv && !md.explicit_mode)
542d6675
KH		 7188 {
7189 if (!md.mode_explicitly_set
7190 && !md.default_explicit_mode)
7191 dot_dv_mode ('E');
7192 else
7193 as_warn (_("Found '{' after explicit switch to automatic mode"));
7194 }
800eeca4
JW		 7195 return 1;
7196
7197 case '}':
7198 if (!md.manual_bundling)
7199 as_warn ("Found '}' when manual bundling is off");
7200 else
7201 PREV_SLOT.manual_bundling_off = 1;
7202 md.manual_bundling = 0;
7203
7204 /* switch back to automatic mode, if applicable */
197865e8 7205 if (md.detect_dv
542d6675
KH		 7206 && md.explicit_mode
7207 && !md.mode_explicitly_set
7208 && !md.default_explicit_mode)
7209 dot_dv_mode ('A');
800eeca4
JW		 7210
7211 /* Allow '{' to follow on the same line. We also allow ";;", but that
7212 happens automatically because ';' is an end of line marker. */
7213 SKIP_WHITESPACE ();
7214 if (input_line_pointer[0] == '{')
7215 {
7216 input_line_pointer++;
7217 return ia64_unrecognized_line ('{');
7218 }
7219
7220 demand_empty_rest_of_line ();
7221 return 1;
7222
f1bcba5b
JW		 7223 case '[':
7224 {
7225 char *s;
7226 char c;
7227 symbolS *tag;
4d5a53ff 7228 int temp;
f1bcba5b
JW		 7229
7230 if (md.qp.X_op == O_register)
7231 {
7232 as_bad ("Tag must come before qualifying predicate.");
7233 return 0;
7234 }
4d5a53ff
JW		 7235
7236 /* This implements just enough of read_a_source_file in read.c to
7237 recognize labels. */
7238 if (is_name_beginner (*input_line_pointer))
7239 {
7240 s = input_line_pointer;
7241 c = get_symbol_end ();
7242 }
7243 else if (LOCAL_LABELS_FB
3882b010 7244 && ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7245 {
7246 temp = 0;
3882b010 7247 while (ISDIGIT (*input_line_pointer))
4d5a53ff
JW		 7248 temp = (temp * 10) + *input_line_pointer++ - '0';
7249 fb_label_instance_inc (temp);
7250 s = fb_label_name (temp, 0);
7251 c = *input_line_pointer;
7252 }
7253 else
7254 {
7255 s = NULL;
7256 c = '\0';
7257 }
f1bcba5b
JW		 7258 if (c != ':')
7259 {
7260 /* Put ':' back for error messages' sake. */
7261 *input_line_pointer++ = ':';
7262 as_bad ("Expected ':'");
7263 return 0;
7264 }
4d5a53ff 7265
f1bcba5b
JW		 7266 defining_tag = 1;
7267 tag = colon (s);
7268 defining_tag = 0;
7269 /* Put ':' back for error messages' sake. */
7270 *input_line_pointer++ = ':';
7271 if (*input_line_pointer++ != ']')
7272 {
7273 as_bad ("Expected ']'");
7274 return 0;
7275 }
7276 if (! tag)
7277 {
7278 as_bad ("Tag name expected");
7279 return 0;
7280 }
7281 return 1;
7282 }
7283
800eeca4
JW		 7284 default:
7285 break;
7286 }
542d6675
KH		 7287
7288 /* Not a valid line. */
7289 return 0;
800eeca4
JW		 7290}
7291
7292void
7293ia64_frob_label (sym)
7294 struct symbol *sym;
7295{
7296 struct label_fix *fix;
7297
f1bcba5b
JW		 7298 /* Tags need special handling since they are not bundle breaks like
7299 labels. */
7300 if (defining_tag)
7301 {
7302 fix = obstack_alloc (&notes, sizeof (*fix));
7303 fix->sym = sym;
7304 fix->next = CURR_SLOT.tag_fixups;
7305 CURR_SLOT.tag_fixups = fix;
7306
7307 return;
7308 }
7309
800eeca4
JW		 7310 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7311 {
7312 md.last_text_seg = now_seg;
7313 fix = obstack_alloc (&notes, sizeof (*fix));
7314 fix->sym = sym;
7315 fix->next = CURR_SLOT.label_fixups;
7316 CURR_SLOT.label_fixups = fix;
7317
542d6675 7318 /* Keep track of how many code entry points we've seen. */
800eeca4 7319 if (md.path == md.maxpaths)
542d6675
KH		 7320 {
7321 md.maxpaths += 20;
7322 md.entry_labels = (const char **)
7323 xrealloc ((void *) md.entry_labels,
7324 md.maxpaths * sizeof (char *));
7325 }
800eeca4
JW		 7326 md.entry_labels[md.path++] = S_GET_NAME (sym);
7327 }
7328}
7329
936cf02e
JW		 7330#ifdef TE_HPUX
7331/* The HP-UX linker will give unresolved symbol errors for symbols
7332 that are declared but unused. This routine removes declared,
7333 unused symbols from an object. */
7334int
7335ia64_frob_symbol (sym)
7336 struct symbol *sym;
7337{
7338 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7339 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7340 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7341 && ! S_IS_EXTERNAL (sym)))
7342 return 1;
7343 return 0;
7344}
7345#endif
7346
800eeca4
JW		 7347void
7348ia64_flush_pending_output ()
7349{
4d5a53ff
JW		 7350 if (!md.keep_pending_output
7351 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
800eeca4
JW		 7352 {
7353 /* ??? This causes many unnecessary stop bits to be emitted.
7354 Unfortunately, it isn't clear if it is safe to remove this. */
7355 insn_group_break (1, 0, 0);
7356 ia64_flush_insns ();
7357 }
7358}
7359
7360/* Do ia64-specific expression optimization. All that's done here is
7361 to transform index expressions that are either due to the indexing
7362 of rotating registers or due to the indexing of indirect register
7363 sets. */
7364int
7365ia64_optimize_expr (l, op, r)
7366 expressionS *l;
7367 operatorT op;
7368 expressionS *r;
7369{
7370 unsigned num_regs;
7371
7372 if (op == O_index)
7373 {
7374 if (l->X_op == O_register && r->X_op == O_constant)
7375 {
7376 num_regs = (l->X_add_number >> 16);
7377 if ((unsigned) r->X_add_number >= num_regs)
7378 {
7379 if (!num_regs)
7380 as_bad ("No current frame");
7381 else
7382 as_bad ("Index out of range 0..%u", num_regs - 1);
7383 r->X_add_number = 0;
7384 }
7385 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7386 return 1;
7387 }
7388 else if (l->X_op == O_register && r->X_op == O_register)
7389 {
7390 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7391 || l->X_add_number == IND_MEM)
7392 {
7393 as_bad ("Indirect register set name expected");
7394 l->X_add_number = IND_CPUID;
7395 }
7396 l->X_op = O_index;
7397 l->X_op_symbol = md.regsym[l->X_add_number];
7398 l->X_add_number = r->X_add_number;
7399 return 1;
7400 }
7401 }
7402 return 0;
7403}
7404
7405int
7406ia64_parse_name (name, e)
7407 char *name;
7408 expressionS *e;
7409{
7410 struct const_desc *cdesc;
7411 struct dynreg *dr = 0;
7412 unsigned int regnum;
7413 struct symbol *sym;
7414 char *end;
7415
542d6675 7416 /* first see if NAME is a known register name: */
800eeca4
JW		 7417 sym = hash_find (md.reg_hash, name);
7418 if (sym)
7419 {
7420 e->X_op = O_register;
7421 e->X_add_number = S_GET_VALUE (sym);
7422 return 1;
7423 }
7424
7425 cdesc = hash_find (md.const_hash, name);
7426 if (cdesc)
7427 {
7428 e->X_op = O_constant;
7429 e->X_add_number = cdesc->value;
7430 return 1;
7431 }
7432
542d6675 7433 /* check for inN, locN, or outN: */
800eeca4
JW		 7434 switch (name[0])
7435 {
7436 case 'i':
3882b010 7437 if (name[1] == 'n' && ISDIGIT (name[2]))
800eeca4
JW		 7438 {
7439 dr = &md.in;
7440 name += 2;
7441 }
7442 break;
7443
7444 case 'l':
3882b010 7445 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
800eeca4
JW		 7446 {
7447 dr = &md.loc;
7448 name += 3;
7449 }
7450 break;
7451
7452 case 'o':
3882b010 7453 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
800eeca4
JW		 7454 {
7455 dr = &md.out;
7456 name += 3;
7457 }
7458 break;
7459
7460 default:
7461 break;
7462 }
7463
7464 if (dr)
7465 {
542d6675 7466 /* The name is inN, locN, or outN; parse the register number. */
800eeca4
JW		 7467 regnum = strtoul (name, &end, 10);
7468 if (end > name && *end == '\0')
7469 {
7470 if ((unsigned) regnum >= dr->num_regs)
7471 {
7472 if (!dr->num_regs)
7473 as_bad ("No current frame");
7474 else
542d6675
KH		 7475 as_bad ("Register number out of range 0..%u",
7476 dr->num_regs - 1);
800eeca4
JW		 7477 regnum = 0;
7478 }
7479 e->X_op = O_register;
7480 e->X_add_number = dr->base + regnum;
7481 return 1;
7482 }
7483 }
7484
7485 if ((dr = hash_find (md.dynreg_hash, name)))
7486 {
7487 /* We've got ourselves the name of a rotating register set.
542d6675
KH		 7488 Store the base register number in the low 16 bits of
7489 X_add_number and the size of the register set in the top 16
7490 bits. */
800eeca4
JW		 7491 e->X_op = O_register;
7492 e->X_add_number = dr->base | (dr->num_regs << 16);
7493 return 1;
7494 }
7495 return 0;
7496}
7497
7498/* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7499
7500char *
7501ia64_canonicalize_symbol_name (name)
7502 char *name;
7503{
542d6675
KH		 7504 size_t len = strlen (name);
7505 if (len > 1 && name[len - 1] == '#')
7506 name[len - 1] = '\0';
800eeca4
JW		 7507 return name;
7508}
7509
3e37788f
JW		 7510/* Return true if idesc is a conditional branch instruction. This excludes
7511 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7512 because they always read/write resources regardless of the value of the
7513 qualifying predicate. br.ia must always use p0, and hence is always
7514 taken. Thus this function returns true for branches which can fall
7515 through, and which use no resources if they do fall through. */
1deb8127 7516
800eeca4
JW		 7517static int
7518is_conditional_branch (idesc)
542d6675 7519 struct ia64_opcode *idesc;
800eeca4 7520{
1deb8127 7521 /* br is a conditional branch. Everything that starts with br. except
3e37788f
JW		 7522 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7523 Everything that starts with brl is a conditional branch. */
1deb8127
JW		 7524 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7525 && (idesc->name[2] == '\0'
3e37788f
JW		 7526 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7527 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7528 || idesc->name[2] == 'l'
7529 /* br.cond, br.call, br.clr */
7530 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7531 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7532 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
800eeca4
JW		 7533}
7534
7535/* Return whether the given opcode is a taken branch. If there's any doubt,
542d6675
KH		 7536 returns zero. */
7537
800eeca4
JW		 7538static int
7539is_taken_branch (idesc)
542d6675 7540 struct ia64_opcode *idesc;
800eeca4
JW		 7541{
7542 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
542d6675 7543 || strncmp (idesc->name, "br.ia", 5) == 0);
800eeca4
JW		 7544}
7545
7546/* Return whether the given opcode is an interruption or rfi. If there's any
542d6675
KH		 7547 doubt, returns zero. */
7548
800eeca4
JW		 7549static int
7550is_interruption_or_rfi (idesc)
542d6675 7551 struct ia64_opcode *idesc;
800eeca4
JW		 7552{
7553 if (strcmp (idesc->name, "rfi") == 0)
7554 return 1;
7555 return 0;
7556}
7557
7558/* Returns the index of the given dependency in the opcode's list of chks, or
7559 -1 if there is no dependency. */
542d6675 7560
800eeca4
JW		 7561static int
7562depends_on (depind, idesc)
542d6675
KH		 7563 int depind;
7564 struct ia64_opcode *idesc;
800eeca4
JW		 7565{
7566 int i;
7567 const struct ia64_opcode_dependency *dep = idesc->dependencies;
542d6675 7568 for (i = 0; i < dep->nchks; i++)
800eeca4 7569 {
542d6675
KH		 7570 if (depind == DEP (dep->chks[i]))
7571 return i;
800eeca4
JW		 7572 }
7573 return -1;
7574}
7575
7576/* Determine a set of specific resources used for a particular resource
7577 class. Returns the number of specific resources identified For those
7578 cases which are not determinable statically, the resource returned is
197865e8 7579 marked nonspecific.
800eeca4
JW		 7580
7581 Meanings of value in 'NOTE':
7582 1) only read/write when the register number is explicitly encoded in the
7583 insn.
7584 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
197865e8 7585 accesses CFM when qualifying predicate is in the rotating region.
800eeca4
JW		 7586 3) general register value is used to specify an indirect register; not
7587 determinable statically.
7588 4) only read the given resource when bits 7:0 of the indirect index
7589 register value does not match the register number of the resource; not
7590 determinable statically.
7591 5) all rules are implementation specific.
7592 6) only when both the index specified by the reader and the index specified
7593 by the writer have the same value in bits 63:61; not determinable
197865e8 7594 statically.
800eeca4 7595 7) only access the specified resource when the corresponding mask bit is
197865e8 7596 set
800eeca4
JW		 7597 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7598 only read when these insns reference FR2-31
7599 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7600 written when these insns write FR32-127
7601 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7602 instruction
7603 11) The target predicates are written independently of PR[qp], but source
7604 registers are only read if PR[qp] is true. Since the state of PR[qp]
7605 cannot statically be determined, all source registers are marked used.
7606 12) This insn only reads the specified predicate register when that
7607 register is the PR[qp].
7608 13) This reference to ld-c only applies to teh GR whose value is loaded
197865e8 7609 with data returned from memory, not the post-incremented address register.
800eeca4
JW		 7610 14) The RSE resource includes the implementation-specific RSE internal
7611 state resources. At least one (and possibly more) of these resources are
7612 read by each instruction listed in IC:rse-readers. At least one (and
7613 possibly more) of these resources are written by each insn listed in
197865e8 7614 IC:rse-writers.
800eeca4 7615 15+16) Represents reserved instructions, which the assembler does not
197865e8 7616 generate.
800eeca4
JW		 7617
7618 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7619 this code; there are no dependency violations based on memory access.
800eeca4
JW		 7620*/
7621
7622#define MAX_SPECS 256
7623#define DV_CHK 1
7624#define DV_REG 0
7625
7626static int
7627specify_resource (dep, idesc, type, specs, note, path)
542d6675
KH		 7628 const struct ia64_dependency *dep;
7629 struct ia64_opcode *idesc;
7630 int type; /* is this a DV chk or a DV reg? */
7631 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
7632 int note; /* resource note for this insn's usage */
7633 int path; /* which execution path to examine */
800eeca4
JW		 7634{
7635 int count = 0;
7636 int i;
7637 int rsrc_write = 0;
7638 struct rsrc tmpl;
197865e8 7639
800eeca4
JW		 7640 if (dep->mode == IA64_DV_WAW
7641 || (dep->mode == IA64_DV_RAW && type == DV_REG)
7642 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
7643 rsrc_write = 1;
7644
7645 /* template for any resources we identify */
7646 tmpl.dependency = dep;
7647 tmpl.note = note;
7648 tmpl.insn_srlz = tmpl.data_srlz = 0;
7649 tmpl.qp_regno = CURR_SLOT.qp_regno;
7650 tmpl.link_to_qp_branch = 1;
7651 tmpl.mem_offset.hint = 0;
7652 tmpl.specific = 1;
7653 tmpl.index = 0;
7484b8e6 7654 tmpl.cmp_type = CMP_NONE;
800eeca4
JW		 7655
7656#define UNHANDLED \
7657as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7658dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7659#define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7660
7661 /* we don't need to track these */
7662 if (dep->semantics == IA64_DVS_NONE)
7663 return 0;
7664
7665 switch (dep->specifier)
7666 {
7667 case IA64_RS_AR_K:
7668 if (note == 1)
542d6675
KH		 7669 {
7670 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7671 {
7672 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7673 if (regno >= 0 && regno <= 7)
7674 {
7675 specs[count] = tmpl;
7676 specs[count++].index = regno;
7677 }
7678 }
7679 }
800eeca4 7680 else if (note == 0)
542d6675
KH		 7681 {
7682 for (i = 0; i < 8; i++)
7683 {
7684 specs[count] = tmpl;
7685 specs[count++].index = i;
7686 }
7687 }
800eeca4 7688 else
542d6675
KH		 7689 {
7690 UNHANDLED;
7691 }
800eeca4
JW		 7692 break;
7693
7694 case IA64_RS_AR_UNAT:
7695 /* This is a mov =AR or mov AR= instruction. */
7696 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7697 {
7698 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7699 if (regno == AR_UNAT)
7700 {
7701 specs[count++] = tmpl;
7702 }
7703 }
7704 else
7705 {
7706 /* This is a spill/fill, or other instruction that modifies the
7707 unat register. */
7708
7709 /* Unless we can determine the specific bits used, mark the whole
7710 thing; bits 8:3 of the memory address indicate the bit used in
7711 UNAT. The .mem.offset hint may be used to eliminate a small
7712 subset of conflicts. */
7713 specs[count] = tmpl;
7714 if (md.mem_offset.hint)
7715 {
542d6675
KH		 7716 if (md.debug_dv)
7717 fprintf (stderr, " Using hint for spill/fill\n");
7718 /* The index isn't actually used, just set it to something
7719 approximating the bit index. */
800eeca4
JW		 7720 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
7721 specs[count].mem_offset.hint = 1;
7722 specs[count].mem_offset.offset = md.mem_offset.offset;
7723 specs[count++].mem_offset.base = md.mem_offset.base;
7724 }
7725 else
7726 {
7727 specs[count++].specific = 0;
7728 }
7729 }
7730 break;
7731
7732 case IA64_RS_AR:
7733 if (note == 1)
542d6675
KH		 7734 {
7735 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7736 {
7737 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7738 if ((regno >= 8 && regno <= 15)
7739 || (regno >= 20 && regno <= 23)
7740 || (regno >= 31 && regno <= 39)
7741 || (regno >= 41 && regno <= 47)
7742 || (regno >= 67 && regno <= 111))
7743 {
7744 specs[count] = tmpl;
7745 specs[count++].index = regno;
7746 }
7747 }
7748 }
800eeca4 7749 else
542d6675
KH		 7750 {
7751 UNHANDLED;
7752 }
800eeca4
JW		 7753 break;
7754
7755 case IA64_RS_ARb:
7756 if (note == 1)
542d6675
KH		 7757 {
7758 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7759 {
7760 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7761 if ((regno >= 48 && regno <= 63)
7762 || (regno >= 112 && regno <= 127))
7763 {
7764 specs[count] = tmpl;
7765 specs[count++].index = regno;
7766 }
7767 }
7768 }
800eeca4 7769 else if (note == 0)
542d6675
KH		 7770 {
7771 for (i = 48; i < 64; i++)
7772 {
7773 specs[count] = tmpl;
7774 specs[count++].index = i;
7775 }
7776 for (i = 112; i < 128; i++)
7777 {
7778 specs[count] = tmpl;
7779 specs[count++].index = i;
7780 }
7781 }
197865e8 7782 else
542d6675
KH		 7783 {
7784 UNHANDLED;
7785 }
800eeca4
JW		 7786 break;
7787
7788 case IA64_RS_BR:
7789 if (note != 1)
542d6675
KH		 7790 {
7791 UNHANDLED;
7792 }
800eeca4 7793 else
542d6675
KH		 7794 {
7795 if (rsrc_write)
7796 {
7797 for (i = 0; i < idesc->num_outputs; i++)
7798 if (idesc->operands[i] == IA64_OPND_B1
7799 || idesc->operands[i] == IA64_OPND_B2)
7800 {
7801 specs[count] = tmpl;
7802 specs[count++].index =
7803 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7804 }
7805 }
7806 else
7807 {
40449e9f 7808 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
542d6675
KH		 7809 if (idesc->operands[i] == IA64_OPND_B1
7810 || idesc->operands[i] == IA64_OPND_B2)
7811 {
7812 specs[count] = tmpl;
7813 specs[count++].index =
7814 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7815 }
7816 }
7817 }
800eeca4
JW		 7818 break;
7819
7820 case IA64_RS_CPUID: /* four or more registers */
7821 if (note == 3)
542d6675
KH		 7822 {
7823 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
7824 {
7825 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7826 if (regno >= 0 && regno < NELEMS (gr_values)
7827 && KNOWN (regno))
7828 {
7829 specs[count] = tmpl;
7830 specs[count++].index = gr_values[regno].value & 0xFF;
7831 }
7832 else
7833 {
7834 specs[count] = tmpl;
7835 specs[count++].specific = 0;
7836 }
7837 }
7838 }
800eeca4 7839 else
542d6675
KH		 7840 {
7841 UNHANDLED;
7842 }
800eeca4
JW		 7843 break;
7844
7845 case IA64_RS_DBR: /* four or more registers */
7846 if (note == 3)
542d6675
KH		 7847 {
7848 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
7849 {
7850 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7851 if (regno >= 0 && regno < NELEMS (gr_values)
7852 && KNOWN (regno))
7853 {
7854 specs[count] = tmpl;
7855 specs[count++].index = gr_values[regno].value & 0xFF;
7856 }
7857 else
7858 {
7859 specs[count] = tmpl;
7860 specs[count++].specific = 0;
7861 }
7862 }
7863 }
800eeca4 7864 else if (note == 0 && !rsrc_write)
542d6675
KH		 7865 {
7866 specs[count] = tmpl;
7867 specs[count++].specific = 0;
7868 }
800eeca4 7869 else
542d6675
KH		 7870 {
7871 UNHANDLED;
7872 }
800eeca4
JW		 7873 break;
7874
7875 case IA64_RS_IBR: /* four or more registers */
7876 if (note == 3)
542d6675
KH		 7877 {
7878 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
7879 {
7880 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7881 if (regno >= 0 && regno < NELEMS (gr_values)
7882 && KNOWN (regno))
7883 {
7884 specs[count] = tmpl;
7885 specs[count++].index = gr_values[regno].value & 0xFF;
7886 }
7887 else
7888 {
7889 specs[count] = tmpl;
7890 specs[count++].specific = 0;
7891 }
7892 }
7893 }
800eeca4 7894 else
542d6675
KH		 7895 {
7896 UNHANDLED;
7897 }
800eeca4
JW		 7898 break;
7899
7900 case IA64_RS_MSR:
7901 if (note == 5)
7902 {
7903 /* These are implementation specific. Force all references to
7904 conflict with all other references. */
7905 specs[count] = tmpl;
7906 specs[count++].specific = 0;
7907 }
7908 else
7909 {
7910 UNHANDLED;
7911 }
7912 break;
7913
7914 case IA64_RS_PKR: /* 16 or more registers */
7915 if (note == 3 || note == 4)
542d6675
KH		 7916 {
7917 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
7918 {
7919 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7920 if (regno >= 0 && regno < NELEMS (gr_values)
7921 && KNOWN (regno))
7922 {
7923 if (note == 3)
7924 {
7925 specs[count] = tmpl;
7926 specs[count++].index = gr_values[regno].value & 0xFF;
7927 }
7928 else
7929 for (i = 0; i < NELEMS (gr_values); i++)
7930 {
7931 /* Uses all registers *except* the one in R3. */
2434f565 7932 if ((unsigned)i != (gr_values[regno].value & 0xFF))
542d6675
KH		 7933 {
7934 specs[count] = tmpl;
7935 specs[count++].index = i;
7936 }
7937 }
7938 }
7939 else
7940 {
7941 specs[count] = tmpl;
7942 specs[count++].specific = 0;
7943 }
7944 }
7945 }
7946 else if (note == 0)
7947 {
7948 /* probe et al. */
7949 specs[count] = tmpl;
7950 specs[count++].specific = 0;
7951 }
7952 break;
7953
7954 case IA64_RS_PMC: /* four or more registers */
7955 if (note == 3)
7956 {
7957 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
7958 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
7959
7960 {
7961 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
7962 ? 1 : !rsrc_write);
7963 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
7964 if (regno >= 0 && regno < NELEMS (gr_values)
7965 && KNOWN (regno))
7966 {
7967 specs[count] = tmpl;
7968 specs[count++].index = gr_values[regno].value & 0xFF;
7969 }
7970 else
7971 {
7972 specs[count] = tmpl;
7973 specs[count++].specific = 0;
7974 }
7975 }
7976 }
7977 else
7978 {
7979 UNHANDLED;
7980 }
800eeca4
JW		 7981 break;
7982
7983 case IA64_RS_PMD: /* four or more registers */
7984 if (note == 3)
542d6675
KH		 7985 {
7986 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
7987 {
7988 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7989 if (regno >= 0 && regno < NELEMS (gr_values)
7990 && KNOWN (regno))
7991 {
7992 specs[count] = tmpl;
7993 specs[count++].index = gr_values[regno].value & 0xFF;
7994 }
7995 else
7996 {
7997 specs[count] = tmpl;
7998 specs[count++].specific = 0;
7999 }
8000 }
8001 }
800eeca4 8002 else
542d6675
KH		 8003 {
8004 UNHANDLED;
8005 }
800eeca4
JW		 8006 break;
8007
8008 case IA64_RS_RR: /* eight registers */
8009 if (note == 6)
542d6675
KH		 8010 {
8011 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8012 {
8013 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8014 if (regno >= 0 && regno < NELEMS (gr_values)
8015 && KNOWN (regno))
8016 {
8017 specs[count] = tmpl;
8018 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8019 }
8020 else
8021 {
8022 specs[count] = tmpl;
8023 specs[count++].specific = 0;
8024 }
8025 }
8026 }
800eeca4 8027 else if (note == 0 && !rsrc_write)
542d6675
KH		 8028 {
8029 specs[count] = tmpl;
8030 specs[count++].specific = 0;
8031 }
197865e8 8032 else
542d6675
KH		 8033 {
8034 UNHANDLED;
8035 }
800eeca4
JW		 8036 break;
8037
8038 case IA64_RS_CR_IRR:
197865e8 8039 if (note == 0)
542d6675
KH		 8040 {
8041 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8042 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8043 if (rsrc_write
8044 && idesc->operands[1] == IA64_OPND_CR3
8045 && regno == CR_IVR)
8046 {
8047 for (i = 0; i < 4; i++)
8048 {
8049 specs[count] = tmpl;
8050 specs[count++].index = CR_IRR0 + i;
8051 }
8052 }
8053 }
800eeca4 8054 else if (note == 1)
542d6675
KH		 8055 {
8056 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8057 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8058 && regno >= CR_IRR0
8059 && regno <= CR_IRR3)
8060 {
8061 specs[count] = tmpl;
8062 specs[count++].index = regno;
8063 }
8064 }
800eeca4 8065 else
542d6675
KH		 8066 {
8067 UNHANDLED;
8068 }
800eeca4
JW		 8069 break;
8070
8071 case IA64_RS_CR_LRR:
8072 if (note != 1)
542d6675
KH		 8073 {
8074 UNHANDLED;
8075 }
197865e8 8076 else
542d6675
KH		 8077 {
8078 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8079 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8080 && (regno == CR_LRR0 || regno == CR_LRR1))
8081 {
8082 specs[count] = tmpl;
8083 specs[count++].index = regno;
8084 }
8085 }
800eeca4
JW		 8086 break;
8087
8088 case IA64_RS_CR:
8089 if (note == 1)
542d6675
KH		 8090 {
8091 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8092 {
8093 specs[count] = tmpl;
8094 specs[count++].index =
8095 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8096 }
8097 }
800eeca4 8098 else
542d6675
KH		 8099 {
8100 UNHANDLED;
8101 }
800eeca4
JW		 8102 break;
8103
8104 case IA64_RS_FR:
8105 case IA64_RS_FRb:
8106 if (note != 1)
542d6675
KH		 8107 {
8108 UNHANDLED;
8109 }
800eeca4 8110 else if (rsrc_write)
542d6675
KH		 8111 {
8112 if (dep->specifier == IA64_RS_FRb
8113 && idesc->operands[0] == IA64_OPND_F1)
8114 {
8115 specs[count] = tmpl;
8116 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8117 }
8118 }
800eeca4 8119 else
542d6675
KH		 8120 {
8121 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8122 {
8123 if (idesc->operands[i] == IA64_OPND_F2
8124 || idesc->operands[i] == IA64_OPND_F3
8125 || idesc->operands[i] == IA64_OPND_F4)
8126 {
8127 specs[count] = tmpl;
8128 specs[count++].index =
8129 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8130 }
8131 }
8132 }
800eeca4
JW		 8133 break;
8134
8135 case IA64_RS_GR:
8136 if (note == 13)
542d6675
KH		 8137 {
8138 /* This reference applies only to the GR whose value is loaded with
8139 data returned from memory. */
8140 specs[count] = tmpl;
8141 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8142 }
800eeca4 8143 else if (note == 1)
542d6675
KH		 8144 {
8145 if (rsrc_write)
8146 {
8147 for (i = 0; i < idesc->num_outputs; i++)
50b81f19
JW		 8148 if (idesc->operands[i] == IA64_OPND_R1
8149 || idesc->operands[i] == IA64_OPND_R2
8150 || idesc->operands[i] == IA64_OPND_R3)
8151 {
8152 specs[count] = tmpl;
197865e8 8153 specs[count++].index =
50b81f19
JW		 8154 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8155 }
8156 if (idesc->flags & IA64_OPCODE_POSTINC)
8157 for (i = 0; i < NELEMS (idesc->operands); i++)
8158 if (idesc->operands[i] == IA64_OPND_MR3)
8159 {
8160 specs[count] = tmpl;
8161 specs[count++].index =
8162 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8163 }
542d6675
KH		 8164 }
8165 else
8166 {
8167 /* Look for anything that reads a GR. */
8168 for (i = 0; i < NELEMS (idesc->operands); i++)
8169 {
8170 if (idesc->operands[i] == IA64_OPND_MR3
8171 || idesc->operands[i] == IA64_OPND_CPUID_R3
8172 || idesc->operands[i] == IA64_OPND_DBR_R3
8173 || idesc->operands[i] == IA64_OPND_IBR_R3
800eeca4 8174 || idesc->operands[i] == IA64_OPND_MSR_R3
542d6675
KH		 8175 || idesc->operands[i] == IA64_OPND_PKR_R3
8176 || idesc->operands[i] == IA64_OPND_PMC_R3
8177 || idesc->operands[i] == IA64_OPND_PMD_R3
8178 || idesc->operands[i] == IA64_OPND_RR_R3
8179 || ((i >= idesc->num_outputs)
8180 && (idesc->operands[i] == IA64_OPND_R1
8181 || idesc->operands[i] == IA64_OPND_R2
8182 || idesc->operands[i] == IA64_OPND_R3
50b81f19
JW		 8183 /* addl source register. */
8184 || idesc->operands[i] == IA64_OPND_R3_2)))
542d6675
KH		 8185 {
8186 specs[count] = tmpl;
8187 specs[count++].index =
8188 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8189 }
8190 }
8191 }
8192 }
197865e8 8193 else
542d6675
KH		 8194 {
8195 UNHANDLED;
8196 }
800eeca4
JW		 8197 break;
8198
139368c9
JW		 8199 /* This is the same as IA64_RS_PRr, except that the register range is
8200 from 1 - 15, and there are no rotating register reads/writes here. */
800eeca4
JW		 8201 case IA64_RS_PR:
8202 if (note == 0)
542d6675 8203 {
139368c9 8204 for (i = 1; i < 16; i++)
542d6675 8205 {
139368c9
JW		 8206 specs[count] = tmpl;
8207 specs[count++].index = i;
8208 }
8209 }
8210 else if (note == 7)
8211 {
8212 valueT mask = 0;
8213 /* Mark only those registers indicated by the mask. */
8214 if (rsrc_write)
8215 {
8216 mask = CURR_SLOT.opnd[2].X_add_number;
8217 for (i = 1; i < 16; i++)
8218 if (mask & ((valueT) 1 << i))
8219 {
8220 specs[count] = tmpl;
8221 specs[count++].index = i;
8222 }
8223 }
8224 else
8225 {
8226 UNHANDLED;
8227 }
8228 }
8229 else if (note == 11) /* note 11 implies note 1 as well */
8230 {
8231 if (rsrc_write)
8232 {
8233 for (i = 0; i < idesc->num_outputs; i++)
8234 {
8235 if (idesc->operands[i] == IA64_OPND_P1
8236 || idesc->operands[i] == IA64_OPND_P2)
8237 {
8238 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8239 if (regno >= 1 && regno < 16)
8240 {
8241 specs[count] = tmpl;
8242 specs[count++].index = regno;
8243 }
8244 }
8245 }
8246 }
8247 else
8248 {
8249 UNHANDLED;
8250 }
8251 }
8252 else if (note == 12)
8253 {
8254 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8255 {
8256 specs[count] = tmpl;
8257 specs[count++].index = CURR_SLOT.qp_regno;
8258 }
8259 }
8260 else if (note == 1)
8261 {
8262 if (rsrc_write)
8263 {
8264 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8265 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8266 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8267 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
139368c9
JW		 8268
8269 if ((idesc->operands[0] == IA64_OPND_P1
8270 || idesc->operands[0] == IA64_OPND_P2)
8271 && p1 >= 1 && p1 < 16)
542d6675
KH		 8272 {
8273 specs[count] = tmpl;
139368c9
JW		 8274 specs[count].cmp_type =
8275 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8276 specs[count++].index = p1;
8277 }
8278 if ((idesc->operands[1] == IA64_OPND_P1
8279 || idesc->operands[1] == IA64_OPND_P2)
8280 && p2 >= 1 && p2 < 16)
8281 {
8282 specs[count] = tmpl;
8283 specs[count].cmp_type =
8284 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8285 specs[count++].index = p2;
542d6675
KH		 8286 }
8287 }
8288 else
8289 {
139368c9 8290 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
542d6675
KH		 8291 {
8292 specs[count] = tmpl;
139368c9
JW		 8293 specs[count++].index = CURR_SLOT.qp_regno;
8294 }
8295 if (idesc->operands[1] == IA64_OPND_PR)
8296 {
8297 for (i = 1; i < 16; i++)
8298 {
8299 specs[count] = tmpl;
8300 specs[count++].index = i;
8301 }
542d6675
KH		 8302 }
8303 }
8304 }
139368c9
JW		 8305 else
8306 {
8307 UNHANDLED;
8308 }
8309 break;
8310
8311 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8312 simplified cases of this. */
8313 case IA64_RS_PRr:
8314 if (note == 0)
8315 {
8316 for (i = 16; i < 63; i++)
8317 {
8318 specs[count] = tmpl;
8319 specs[count++].index = i;
8320 }
8321 }
800eeca4 8322 else if (note == 7)
542d6675
KH		 8323 {
8324 valueT mask = 0;
8325 /* Mark only those registers indicated by the mask. */
8326 if (rsrc_write
8327 && idesc->operands[0] == IA64_OPND_PR)
8328 {
8329 mask = CURR_SLOT.opnd[2].X_add_number;
40449e9f 8330 if (mask & ((valueT) 1 << 16))
139368c9
JW		 8331 for (i = 16; i < 63; i++)
8332 {
8333 specs[count] = tmpl;
8334 specs[count++].index = i;
8335 }
542d6675
KH		 8336 }
8337 else if (rsrc_write
8338 && idesc->operands[0] == IA64_OPND_PR_ROT)
8339 {
8340 for (i = 16; i < 63; i++)
8341 {
8342 specs[count] = tmpl;
8343 specs[count++].index = i;
8344 }
8345 }
8346 else
8347 {
8348 UNHANDLED;
8349 }
8350 }
800eeca4 8351 else if (note == 11) /* note 11 implies note 1 as well */
542d6675
KH		 8352 {
8353 if (rsrc_write)
8354 {
8355 for (i = 0; i < idesc->num_outputs; i++)
8356 {
8357 if (idesc->operands[i] == IA64_OPND_P1
8358 || idesc->operands[i] == IA64_OPND_P2)
8359 {
8360 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
139368c9 8361 if (regno >= 16 && regno < 63)
542d6675
KH		 8362 {
8363 specs[count] = tmpl;
8364 specs[count++].index = regno;
8365 }
8366 }
8367 }
8368 }
8369 else
8370 {
8371 UNHANDLED;
8372 }
8373 }
800eeca4 8374 else if (note == 12)
542d6675 8375 {
139368c9 8376 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 8377 {
8378 specs[count] = tmpl;
8379 specs[count++].index = CURR_SLOT.qp_regno;
8380 }
8381 }
800eeca4 8382 else if (note == 1)
542d6675
KH		 8383 {
8384 if (rsrc_write)
8385 {
8386 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8387 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8388 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8389 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 8390
542d6675
KH		 8391 if ((idesc->operands[0] == IA64_OPND_P1
8392 || idesc->operands[0] == IA64_OPND_P2)
139368c9 8393 && p1 >= 16 && p1 < 63)
542d6675
KH		 8394 {
8395 specs[count] = tmpl;
4a4f25cf 8396 specs[count].cmp_type =
7484b8e6 8397 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
542d6675
KH		 8398 specs[count++].index = p1;
8399 }
8400 if ((idesc->operands[1] == IA64_OPND_P1
8401 || idesc->operands[1] == IA64_OPND_P2)
139368c9 8402 && p2 >= 16 && p2 < 63)
542d6675
KH		 8403 {
8404 specs[count] = tmpl;
4a4f25cf 8405 specs[count].cmp_type =
7484b8e6 8406 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
542d6675
KH		 8407 specs[count++].index = p2;
8408 }
8409 }
8410 else
8411 {
139368c9 8412 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
542d6675
KH		 8413 {
8414 specs[count] = tmpl;
8415 specs[count++].index = CURR_SLOT.qp_regno;
8416 }
8417 if (idesc->operands[1] == IA64_OPND_PR)
8418 {
139368c9 8419 for (i = 16; i < 63; i++)
542d6675
KH		 8420 {
8421 specs[count] = tmpl;
8422 specs[count++].index = i;
8423 }
8424 }
8425 }
8426 }
197865e8 8427 else
542d6675
KH		 8428 {
8429 UNHANDLED;
8430 }
800eeca4
JW		 8431 break;
8432
8433 case IA64_RS_PSR:
197865e8 8434 /* Verify that the instruction is using the PSR bit indicated in
542d6675 8435 dep->regindex. */
800eeca4 8436 if (note == 0)
542d6675
KH		 8437 {
8438 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8439 {
8440 if (dep->regindex < 6)
8441 {
8442 specs[count++] = tmpl;
8443 }
8444 }
8445 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8446 {
8447 if (dep->regindex < 32
8448 || dep->regindex == 35
8449 || dep->regindex == 36
8450 || (!rsrc_write && dep->regindex == PSR_CPL))
8451 {
8452 specs[count++] = tmpl;
8453 }
8454 }
8455 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8456 {
8457 if (dep->regindex < 32
8458 || dep->regindex == 35
8459 || dep->regindex == 36
8460 || (rsrc_write && dep->regindex == PSR_CPL))
8461 {
8462 specs[count++] = tmpl;
8463 }
8464 }
8465 else
8466 {
8467 /* Several PSR bits have very specific dependencies. */
8468 switch (dep->regindex)
8469 {
8470 default:
8471 specs[count++] = tmpl;
8472 break;
8473 case PSR_IC:
8474 if (rsrc_write)
8475 {
8476 specs[count++] = tmpl;
8477 }
8478 else
8479 {
8480 /* Only certain CR accesses use PSR.ic */
8481 if (idesc->operands[0] == IA64_OPND_CR3
8482 || idesc->operands[1] == IA64_OPND_CR3)
8483 {
8484 int index =
8485 ((idesc->operands[0] == IA64_OPND_CR3)
8486 ? 0 : 1);
8487 int regno =
8488 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8489
8490 switch (regno)
8491 {
8492 default:
8493 break;
8494 case CR_ITIR:
8495 case CR_IFS:
8496 case CR_IIM:
8497 case CR_IIP:
8498 case CR_IPSR:
8499 case CR_ISR:
8500 case CR_IFA:
8501 case CR_IHA:
8502 case CR_IIPA:
8503 specs[count++] = tmpl;
8504 break;
8505 }
8506 }
8507 }
8508 break;
8509 case PSR_CPL:
8510 if (rsrc_write)
8511 {
8512 specs[count++] = tmpl;
8513 }
8514 else
8515 {
8516 /* Only some AR accesses use cpl */
8517 if (idesc->operands[0] == IA64_OPND_AR3
8518 || idesc->operands[1] == IA64_OPND_AR3)
8519 {
8520 int index =
8521 ((idesc->operands[0] == IA64_OPND_AR3)
8522 ? 0 : 1);
8523 int regno =
8524 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8525
8526 if (regno == AR_ITC
8527 || (index == 0
8528 && (regno == AR_ITC
8529 || regno == AR_RSC
8530 || (regno >= AR_K0
8531 && regno <= AR_K7))))
8532 {
8533 specs[count++] = tmpl;
8534 }
8535 }
8536 else
8537 {
8538 specs[count++] = tmpl;
8539 }
8540 break;
8541 }
8542 }
8543 }
8544 }
800eeca4 8545 else if (note == 7)
542d6675
KH		 8546 {
8547 valueT mask = 0;
8548 if (idesc->operands[0] == IA64_OPND_IMMU24)
8549 {
8550 mask = CURR_SLOT.opnd[0].X_add_number;
8551 }
8552 else
8553 {
8554 UNHANDLED;
8555 }
8556 if (mask & ((valueT) 1 << dep->regindex))
8557 {
8558 specs[count++] = tmpl;
8559 }
8560 }
800eeca4 8561 else if (note == 8)
542d6675
KH		 8562 {
8563 int min = dep->regindex == PSR_DFL ? 2 : 32;
8564 int max = dep->regindex == PSR_DFL ? 31 : 127;
8565 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8566 for (i = 0; i < NELEMS (idesc->operands); i++)
8567 {
8568 if (idesc->operands[i] == IA64_OPND_F1
8569 || idesc->operands[i] == IA64_OPND_F2
8570 || idesc->operands[i] == IA64_OPND_F3
8571 || idesc->operands[i] == IA64_OPND_F4)
8572 {
8573 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8574 if (reg >= min && reg <= max)
8575 {
8576 specs[count++] = tmpl;
8577 }
8578 }
8579 }
8580 }
800eeca4 8581 else if (note == 9)
542d6675
KH		 8582 {
8583 int min = dep->regindex == PSR_MFL ? 2 : 32;
8584 int max = dep->regindex == PSR_MFL ? 31 : 127;
8585 /* mfh is read on writes to FR32-127; mfl is read on writes to
8586 FR2-31 */
8587 for (i = 0; i < idesc->num_outputs; i++)
8588 {
8589 if (idesc->operands[i] == IA64_OPND_F1)
8590 {
8591 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8592 if (reg >= min && reg <= max)
8593 {
8594 specs[count++] = tmpl;
8595 }
8596 }
8597 }
8598 }
800eeca4 8599 else if (note == 10)
542d6675
KH		 8600 {
8601 for (i = 0; i < NELEMS (idesc->operands); i++)
8602 {
8603 if (idesc->operands[i] == IA64_OPND_R1
8604 || idesc->operands[i] == IA64_OPND_R2
8605 || idesc->operands[i] == IA64_OPND_R3)
8606 {
8607 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8608 if (regno >= 16 && regno <= 31)
8609 {
8610 specs[count++] = tmpl;
8611 }
8612 }
8613 }
8614 }
800eeca4 8615 else
542d6675
KH		 8616 {
8617 UNHANDLED;
8618 }
800eeca4
JW		 8619 break;
8620
8621 case IA64_RS_AR_FPSR:
8622 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
542d6675
KH		 8623 {
8624 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8625 if (regno == AR_FPSR)
8626 {
8627 specs[count++] = tmpl;
8628 }
8629 }
800eeca4 8630 else
542d6675
KH		 8631 {
8632 specs[count++] = tmpl;
8633 }
800eeca4
JW		 8634 break;
8635
197865e8 8636 case IA64_RS_ARX:
800eeca4
JW		 8637 /* Handle all AR[REG] resources */
8638 if (note == 0 || note == 1)
542d6675
KH		 8639 {
8640 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8641 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
8642 && regno == dep->regindex)
8643 {
8644 specs[count++] = tmpl;
8645 }
8646 /* other AR[REG] resources may be affected by AR accesses */
8647 else if (idesc->operands[0] == IA64_OPND_AR3)
8648 {
8649 /* AR[] writes */
8650 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
8651 switch (dep->regindex)
8652 {
8653 default:
8654 break;
8655 case AR_BSP:
8656 case AR_RNAT:
8657 if (regno == AR_BSPSTORE)
8658 {
8659 specs[count++] = tmpl;
8660 }
8661 case AR_RSC:
8662 if (!rsrc_write &&
8663 (regno == AR_BSPSTORE
8664 || regno == AR_RNAT))
8665 {
8666 specs[count++] = tmpl;
8667 }
8668 break;
8669 }
8670 }
8671 else if (idesc->operands[1] == IA64_OPND_AR3)
8672 {
8673 /* AR[] reads */
8674 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
8675 switch (dep->regindex)
8676 {
8677 default:
8678 break;
8679 case AR_RSC:
8680 if (regno == AR_BSPSTORE || regno == AR_RNAT)
8681 {
8682 specs[count++] = tmpl;
8683 }
8684 break;
8685 }
8686 }
8687 else
8688 {
8689 specs[count++] = tmpl;
8690 }
8691 }
800eeca4 8692 else
542d6675
KH		 8693 {
8694 UNHANDLED;
8695 }
800eeca4
JW		 8696 break;
8697
8698 case IA64_RS_CRX:
8699 /* Handle all CR[REG] resources */
8700 if (note == 0 || note == 1)
542d6675
KH		 8701 {
8702 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8703 {
8704 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8705 if (regno == dep->regindex)
8706 {
8707 specs[count++] = tmpl;
8708 }
8709 else if (!rsrc_write)
8710 {
8711 /* Reads from CR[IVR] affect other resources. */
8712 if (regno == CR_IVR)
8713 {
8714 if ((dep->regindex >= CR_IRR0
8715 && dep->regindex <= CR_IRR3)
8716 || dep->regindex == CR_TPR)
8717 {
8718 specs[count++] = tmpl;
8719 }
8720 }
8721 }
8722 }
8723 else
8724 {
8725 specs[count++] = tmpl;
8726 }
8727 }
800eeca4 8728 else
542d6675
KH		 8729 {
8730 UNHANDLED;
8731 }
800eeca4
JW		 8732 break;
8733
8734 case IA64_RS_INSERVICE:
8735 /* look for write of EOI (67) or read of IVR (65) */
8736 if ((idesc->operands[0] == IA64_OPND_CR3
542d6675
KH		 8737 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
8738 || (idesc->operands[1] == IA64_OPND_CR3
8739 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
8740 {
8741 specs[count++] = tmpl;
8742 }
800eeca4
JW		 8743 break;
8744
8745 case IA64_RS_GR0:
8746 if (note == 1)
542d6675
KH		 8747 {
8748 specs[count++] = tmpl;
8749 }
800eeca4 8750 else
542d6675
KH		 8751 {
8752 UNHANDLED;
8753 }
800eeca4
JW		 8754 break;
8755
8756 case IA64_RS_CFM:
8757 if (note != 2)
542d6675
KH		 8758 {
8759 specs[count++] = tmpl;
8760 }
800eeca4 8761 else
542d6675
KH		 8762 {
8763 /* Check if any of the registers accessed are in the rotating region.
8764 mov to/from pr accesses CFM only when qp_regno is in the rotating
8765 region */
8766 for (i = 0; i < NELEMS (idesc->operands); i++)
8767 {
8768 if (idesc->operands[i] == IA64_OPND_R1
8769 || idesc->operands[i] == IA64_OPND_R2
8770 || idesc->operands[i] == IA64_OPND_R3)
8771 {
8772 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8773 /* Assumes that md.rot.num_regs is always valid */
8774 if (md.rot.num_regs > 0
8775 && num > 31
8776 && num < 31 + md.rot.num_regs)
8777 {
8778 specs[count] = tmpl;
8779 specs[count++].specific = 0;
8780 }
8781 }
8782 else if (idesc->operands[i] == IA64_OPND_F1
8783 || idesc->operands[i] == IA64_OPND_F2
8784 || idesc->operands[i] == IA64_OPND_F3
8785 || idesc->operands[i] == IA64_OPND_F4)
8786 {
8787 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8788 if (num > 31)
8789 {
8790 specs[count] = tmpl;
8791 specs[count++].specific = 0;
8792 }
8793 }
8794 else if (idesc->operands[i] == IA64_OPND_P1
8795 || idesc->operands[i] == IA64_OPND_P2)
8796 {
8797 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
8798 if (num > 15)
8799 {
8800 specs[count] = tmpl;
8801 specs[count++].specific = 0;
8802 }
8803 }
8804 }
8805 if (CURR_SLOT.qp_regno > 15)
8806 {
8807 specs[count] = tmpl;
8808 specs[count++].specific = 0;
8809 }
8810 }
800eeca4
JW		 8811 break;
8812
139368c9
JW		 8813 /* This is the same as IA64_RS_PRr, except simplified to account for
8814 the fact that there is only one register. */
800eeca4
JW		 8815 case IA64_RS_PR63:
8816 if (note == 0)
542d6675
KH		 8817 {
8818 specs[count++] = tmpl;
8819 }
139368c9 8820 else if (note == 7)
40449e9f
KH		 8821 {
8822 valueT mask = 0;
8823 if (idesc->operands[2] == IA64_OPND_IMM17)
8824 mask = CURR_SLOT.opnd[2].X_add_number;
8825 if (mask & ((valueT) 1 << 63))
139368c9 8826 specs[count++] = tmpl;
40449e9f 8827 }
800eeca4 8828 else if (note == 11)
542d6675
KH		 8829 {
8830 if ((idesc->operands[0] == IA64_OPND_P1
8831 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
8832 || (idesc->operands[1] == IA64_OPND_P2
8833 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
8834 {
8835 specs[count++] = tmpl;
8836 }
8837 }
800eeca4 8838 else if (note == 12)
542d6675
KH		 8839 {
8840 if (CURR_SLOT.qp_regno == 63)
8841 {
8842 specs[count++] = tmpl;
8843 }
8844 }
800eeca4 8845 else if (note == 1)
542d6675
KH		 8846 {
8847 if (rsrc_write)
8848 {
40449e9f
KH		 8849 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8850 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
07726851
KH		 8851 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8852 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
7484b8e6 8853
4a4f25cf 8854 if (p1 == 63
7484b8e6
TW		 8855 && (idesc->operands[0] == IA64_OPND_P1
8856 || idesc->operands[0] == IA64_OPND_P2))
8857 {
40449e9f 8858 specs[count] = tmpl;
4a4f25cf 8859 specs[count++].cmp_type =
7484b8e6
TW		 8860 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8861 }
8862 if (p2 == 63
8863 && (idesc->operands[1] == IA64_OPND_P1
8864 || idesc->operands[1] == IA64_OPND_P2))
8865 {
40449e9f 8866 specs[count] = tmpl;
4a4f25cf 8867 specs[count++].cmp_type =
7484b8e6
TW		 8868 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8869 }
542d6675
KH		 8870 }
8871 else
8872 {
8873 if (CURR_SLOT.qp_regno == 63)
8874 {
8875 specs[count++] = tmpl;
8876 }
8877 }
8878 }
800eeca4 8879 else
542d6675
KH		 8880 {
8881 UNHANDLED;
8882 }
800eeca4
JW		 8883 break;
8884
8885 case IA64_RS_RSE:
8886 /* FIXME we can identify some individual RSE written resources, but RSE
542d6675
KH		 8887 read resources have not yet been completely identified, so for now
8888 treat RSE as a single resource */
800eeca4 8889 if (strncmp (idesc->name, "mov", 3) == 0)
542d6675
KH		 8890 {
8891 if (rsrc_write)
8892 {
8893 if (idesc->operands[0] == IA64_OPND_AR3
8894 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
8895 {
8896 specs[count] = tmpl;
8897 specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8898 }
8899 }
8900 else
8901 {
8902 if (idesc->operands[0] == IA64_OPND_AR3)
8903 {
8904 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
8905 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
8906 {
8907 specs[count++] = tmpl;
8908 }
8909 }
8910 else if (idesc->operands[1] == IA64_OPND_AR3)
8911 {
8912 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
8913 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
8914 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
8915 {
8916 specs[count++] = tmpl;
8917 }
8918 }
8919 }
8920 }
197865e8 8921 else
542d6675
KH		 8922 {
8923 specs[count++] = tmpl;
8924 }
800eeca4
JW		 8925 break;
8926
8927 case IA64_RS_ANY:
8928 /* FIXME -- do any of these need to be non-specific? */
8929 specs[count++] = tmpl;
8930 break;
8931
8932 default:
8933 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
8934 break;
8935 }
8936
8937 return count;
8938}
8939
8940/* Clear branch flags on marked resources. This breaks the link between the
542d6675
KH		 8941 QP of the marking instruction and a subsequent branch on the same QP. */
8942
800eeca4
JW		 8943static void
8944clear_qp_branch_flag (mask)
542d6675 8945 valueT mask;
800eeca4
JW		 8946{
8947 int i;
542d6675 8948 for (i = 0; i < regdepslen; i++)
800eeca4 8949 {
197865e8 8950 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
800eeca4 8951 if ((bit & mask) != 0)
542d6675
KH		 8952 {
8953 regdeps[i].link_to_qp_branch = 0;
8954 }
800eeca4
JW		 8955 }
8956}
8957
5e2f6673
L		 8958/* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
8959 any mutexes which contain one of the PRs and create new ones when
8960 needed. */
8961
8962static int
8963update_qp_mutex (valueT mask)
8964{
8965 int i;
8966 int add = 0;
8967
8968 i = 0;
8969 while (i < qp_mutexeslen)
8970 {
8971 if ((qp_mutexes[i].prmask & mask) != 0)
8972 {
8973 /* If it destroys and creates the same mutex, do nothing. */
8974 if (qp_mutexes[i].prmask == mask
8975 && qp_mutexes[i].path == md.path)
8976 {
8977 i++;
8978 add = -1;
8979 }
8980 else
8981 {
8982 int keep = 0;
8983
8984 if (md.debug_dv)
8985 {
8986 fprintf (stderr, " Clearing mutex relation");
8987 print_prmask (qp_mutexes[i].prmask);
8988 fprintf (stderr, "\n");
8989 }
8990
8991 /* Deal with the old mutex with more than 3+ PRs only if
8992 the new mutex on the same execution path with it.
8993
8994 FIXME: The 3+ mutex support is incomplete.
8995 dot_pred_rel () may be a better place to fix it. */
8996 if (qp_mutexes[i].path == md.path)
8997 {
8998 /* If it is a proper subset of the mutex, create a
8999 new mutex. */
9000 if (add == 0
9001 && (qp_mutexes[i].prmask & mask) == mask)
9002 add = 1;
9003
9004 qp_mutexes[i].prmask &= ~mask;
9005 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9006 {
9007 /* Modify the mutex if there are more than one
9008 PR left. */
9009 keep = 1;
9010 i++;
9011 }
9012 }
9013
9014 if (keep == 0)
9015 /* Remove the mutex. */
9016 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9017 }
9018 }
9019 else
9020 ++i;
9021 }
9022
9023 if (add == 1)
9024 add_qp_mutex (mask);
9025
9026 return add;
9027}
9028
197865e8 9029/* Remove any mutexes which contain any of the PRs indicated in the mask.
800eeca4 9030
542d6675
KH		 9031 Any changes to a PR clears the mutex relations which include that PR. */
9032
800eeca4
JW		 9033static void
9034clear_qp_mutex (mask)
542d6675 9035 valueT mask;
800eeca4
JW		 9036{
9037 int i;
9038
9039 i = 0;
9040 while (i < qp_mutexeslen)
9041 {
9042 if ((qp_mutexes[i].prmask & mask) != 0)
542d6675
KH		 9043 {
9044 if (md.debug_dv)
9045 {
9046 fprintf (stderr, " Clearing mutex relation");
9047 print_prmask (qp_mutexes[i].prmask);
9048 fprintf (stderr, "\n");
9049 }
9050 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9051 }
800eeca4 9052 else
542d6675 9053 ++i;
800eeca4
JW		 9054 }
9055}
9056
9057/* Clear implies relations which contain PRs in the given masks.
9058 P1_MASK indicates the source of the implies relation, while P2_MASK
542d6675
KH		 9059 indicates the implied PR. */
9060
800eeca4
JW		 9061static void
9062clear_qp_implies (p1_mask, p2_mask)
542d6675
KH		 9063 valueT p1_mask;
9064 valueT p2_mask;
800eeca4
JW		 9065{
9066 int i;
9067
9068 i = 0;
9069 while (i < qp_implieslen)
9070 {
197865e8 9071 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
542d6675
KH		 9072 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9073 {
9074 if (md.debug_dv)
9075 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9076 qp_implies[i].p1, qp_implies[i].p2);
9077 qp_implies[i] = qp_implies[--qp_implieslen];
9078 }
197865e8 9079 else
542d6675 9080 ++i;
800eeca4
JW		 9081 }
9082}
9083
542d6675
KH		 9084/* Add the PRs specified to the list of implied relations. */
9085
800eeca4
JW		 9086static void
9087add_qp_imply (p1, p2)
542d6675 9088 int p1, p2;
800eeca4
JW		 9089{
9090 valueT mask;
9091 valueT bit;
9092 int i;
9093
542d6675 9094 /* p0 is not meaningful here. */
800eeca4
JW		 9095 if (p1 == 0 || p2 == 0)
9096 abort ();
9097
9098 if (p1 == p2)
9099 return;
9100
542d6675
KH		 9101 /* If it exists already, ignore it. */
9102 for (i = 0; i < qp_implieslen; i++)
800eeca4 9103 {
197865e8 9104 if (qp_implies[i].p1 == p1
542d6675
KH		 9105 && qp_implies[i].p2 == p2
9106 && qp_implies[i].path == md.path
9107 && !qp_implies[i].p2_branched)
9108 return;
800eeca4
JW		 9109 }
9110
9111 if (qp_implieslen == qp_impliestotlen)
9112 {
9113 qp_impliestotlen += 20;
9114 qp_implies = (struct qp_imply *)
542d6675
KH		 9115 xrealloc ((void *) qp_implies,
9116 qp_impliestotlen * sizeof (struct qp_imply));
800eeca4
JW		 9117 }
9118 if (md.debug_dv)
9119 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9120 qp_implies[qp_implieslen].p1 = p1;
9121 qp_implies[qp_implieslen].p2 = p2;
9122 qp_implies[qp_implieslen].path = md.path;
9123 qp_implies[qp_implieslen++].p2_branched = 0;
9124
9125 /* Add in the implied transitive relations; for everything that p2 implies,
9126 make p1 imply that, too; for everything that implies p1, make it imply p2
197865e8 9127 as well. */
542d6675 9128 for (i = 0; i < qp_implieslen; i++)
800eeca4
JW		 9129 {
9130 if (qp_implies[i].p1 == p2)
542d6675 9131 add_qp_imply (p1, qp_implies[i].p2);
800eeca4 9132 if (qp_implies[i].p2 == p1)
542d6675 9133 add_qp_imply (qp_implies[i].p1, p2);
800eeca4
JW		 9134 }
9135 /* Add in mutex relations implied by this implies relation; for each mutex
197865e8
KH		 9136 relation containing p2, duplicate it and replace p2 with p1. */
9137 bit = (valueT) 1 << p1;
9138 mask = (valueT) 1 << p2;
542d6675 9139 for (i = 0; i < qp_mutexeslen; i++)
800eeca4
JW		 9140 {
9141 if (qp_mutexes[i].prmask & mask)
542d6675 9142 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
800eeca4
JW		 9143 }
9144}
9145
800eeca4
JW		 9146/* Add the PRs specified in the mask to the mutex list; this means that only
9147 one of the PRs can be true at any time. PR0 should never be included in
9148 the mask. */
542d6675 9149
800eeca4
JW		 9150static void
9151add_qp_mutex (mask)
542d6675 9152 valueT mask;
800eeca4
JW		 9153{
9154 if (mask & 0x1)
9155 abort ();
9156
9157 if (qp_mutexeslen == qp_mutexestotlen)
9158 {
9159 qp_mutexestotlen += 20;
9160 qp_mutexes = (struct qpmutex *)
542d6675
KH		 9161 xrealloc ((void *) qp_mutexes,
9162 qp_mutexestotlen * sizeof (struct qpmutex));
800eeca4
JW		 9163 }
9164 if (md.debug_dv)
9165 {
9166 fprintf (stderr, " Registering mutex on");
9167 print_prmask (mask);
9168 fprintf (stderr, "\n");
9169 }
9170 qp_mutexes[qp_mutexeslen].path = md.path;
9171 qp_mutexes[qp_mutexeslen++].prmask = mask;
9172}
9173
cb5301b6
RH		 9174static int
9175has_suffix_p (name, suffix)
40449e9f
KH		 9176 const char *name;
9177 const char *suffix;
cb5301b6
RH		 9178{
9179 size_t namelen = strlen (name);
9180 size_t sufflen = strlen (suffix);
9181
9182 if (namelen <= sufflen)
9183 return 0;
9184 return strcmp (name + namelen - sufflen, suffix) == 0;
9185}
9186
800eeca4
JW		 9187static void
9188clear_register_values ()
9189{
9190 int i;
9191 if (md.debug_dv)
9192 fprintf (stderr, " Clearing register values\n");
542d6675 9193 for (i = 1; i < NELEMS (gr_values); i++)
800eeca4
JW		 9194 gr_values[i].known = 0;
9195}
9196
9197/* Keep track of register values/changes which affect DV tracking.
9198
9199 optimization note: should add a flag to classes of insns where otherwise we
542d6675 9200 have to examine a group of strings to identify them. */
800eeca4 9201
800eeca4
JW		 9202static void
9203note_register_values (idesc)
542d6675 9204 struct ia64_opcode *idesc;
800eeca4
JW		 9205{
9206 valueT qp_changemask = 0;
9207 int i;
9208
542d6675
KH		 9209 /* Invalidate values for registers being written to. */
9210 for (i = 0; i < idesc->num_outputs; i++)
800eeca4 9211 {
197865e8 9212 if (idesc->operands[i] == IA64_OPND_R1
542d6675
KH		 9213 || idesc->operands[i] == IA64_OPND_R2
9214 || idesc->operands[i] == IA64_OPND_R3)
9215 {
9216 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9217 if (regno > 0 && regno < NELEMS (gr_values))
9218 gr_values[regno].known = 0;
9219 }
50b81f19
JW		 9220 else if (idesc->operands[i] == IA64_OPND_R3_2)
9221 {
9222 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9223 if (regno > 0 && regno < 4)
9224 gr_values[regno].known = 0;
9225 }
197865e8 9226 else if (idesc->operands[i] == IA64_OPND_P1
542d6675
KH		 9227 || idesc->operands[i] == IA64_OPND_P2)
9228 {
9229 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9230 qp_changemask |= (valueT) 1 << regno;
9231 }
800eeca4 9232 else if (idesc->operands[i] == IA64_OPND_PR)
542d6675
KH		 9233 {
9234 if (idesc->operands[2] & (valueT) 0x10000)
9235 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9236 else
9237 qp_changemask = idesc->operands[2];
9238 break;
9239 }
800eeca4 9240 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
542d6675
KH		 9241 {
9242 if (idesc->operands[1] & ((valueT) 1 << 43))
6344efa4 9243 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
542d6675
KH		 9244 else
9245 qp_changemask = idesc->operands[1];
9246 qp_changemask &= ~(valueT) 0xFFFF;
9247 break;
9248 }
9249 }
9250
9251 /* Always clear qp branch flags on any PR change. */
9252 /* FIXME there may be exceptions for certain compares. */
800eeca4
JW		 9253 clear_qp_branch_flag (qp_changemask);
9254
542d6675 9255 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
800eeca4
JW		 9256 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9257 {
197865e8 9258 qp_changemask |= ~(valueT) 0xFFFF;
800eeca4 9259 if (strcmp (idesc->name, "clrrrb.pr") != 0)
542d6675
KH		 9260 {
9261 for (i = 32; i < 32 + md.rot.num_regs; i++)
9262 gr_values[i].known = 0;
9263 }
800eeca4
JW		 9264 clear_qp_mutex (qp_changemask);
9265 clear_qp_implies (qp_changemask, qp_changemask);
9266 }
542d6675
KH		 9267 /* After a call, all register values are undefined, except those marked
9268 as "safe". */
800eeca4 9269 else if (strncmp (idesc->name, "br.call", 6) == 0
542d6675 9270 || strncmp (idesc->name, "brl.call", 7) == 0)
800eeca4 9271 {
56d27c17 9272 /* FIXME keep GR values which are marked as "safe_across_calls" */
800eeca4
JW		 9273 clear_register_values ();
9274 clear_qp_mutex (~qp_safe_across_calls);
9275 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9276 clear_qp_branch_flag (~qp_safe_across_calls);
9277 }
e9718fe1 9278 else if (is_interruption_or_rfi (idesc)
542d6675 9279 || is_taken_branch (idesc))
e9718fe1
TW		 9280 {
9281 clear_register_values ();
197865e8
KH		 9282 clear_qp_mutex (~(valueT) 0);
9283 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
e9718fe1 9284 }
542d6675 9285 /* Look for mutex and implies relations. */
197865e8 9286 else if ((idesc->operands[0] == IA64_OPND_P1
542d6675
KH		 9287 || idesc->operands[0] == IA64_OPND_P2)
9288 && (idesc->operands[1] == IA64_OPND_P1
9289 || idesc->operands[1] == IA64_OPND_P2))
800eeca4
JW		 9290 {
9291 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
197865e8 9292 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
5e2f6673
L		 9293 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9294 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
800eeca4 9295
5e2f6673
L		 9296 /* If both PRs are PR0, we can't really do anything. */
9297 if (p1 == 0 && p2 == 0)
542d6675
KH		 9298 {
9299 if (md.debug_dv)
9300 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9301 }
800eeca4 9302 /* In general, clear mutexes and implies which include P1 or P2,
542d6675 9303 with the following exceptions. */
cb5301b6
RH		 9304 else if (has_suffix_p (idesc->name, ".or.andcm")
9305 || has_suffix_p (idesc->name, ".and.orcm"))
542d6675 9306 {
542d6675
KH		 9307 clear_qp_implies (p2mask, p1mask);
9308 }
cb5301b6
RH		 9309 else if (has_suffix_p (idesc->name, ".andcm")
9310 || has_suffix_p (idesc->name, ".and"))
542d6675
KH		 9311 {
9312 clear_qp_implies (0, p1mask | p2mask);
9313 }
cb5301b6
RH		 9314 else if (has_suffix_p (idesc->name, ".orcm")
9315 || has_suffix_p (idesc->name, ".or"))
542d6675
KH		 9316 {
9317 clear_qp_mutex (p1mask | p2mask);
9318 clear_qp_implies (p1mask | p2mask, 0);
9319 }
800eeca4 9320 else
542d6675 9321 {
5e2f6673
L		 9322 int added = 0;
9323
542d6675 9324 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
5e2f6673
L		 9325
9326 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9327 if (p1 == 0 || p2 == 0)
9328 clear_qp_mutex (p1mask | p2mask);
9329 else
9330 added = update_qp_mutex (p1mask | p2mask);
9331
9332 if (CURR_SLOT.qp_regno == 0
9333 || has_suffix_p (idesc->name, ".unc"))
542d6675 9334 {
5e2f6673
L		 9335 if (added == 0 && p1 && p2)
9336 add_qp_mutex (p1mask | p2mask);
542d6675
KH		 9337 if (CURR_SLOT.qp_regno != 0)
9338 {
5e2f6673
L		 9339 if (p1)
9340 add_qp_imply (p1, CURR_SLOT.qp_regno);
9341 if (p2)
9342 add_qp_imply (p2, CURR_SLOT.qp_regno);
542d6675
KH		 9343 }
9344 }
542d6675
KH		 9345 }
9346 }
9347 /* Look for mov imm insns into GRs. */
800eeca4 9348 else if (idesc->operands[0] == IA64_OPND_R1
542d6675
KH		 9349 && (idesc->operands[1] == IA64_OPND_IMM22
9350 || idesc->operands[1] == IA64_OPND_IMMU64)
9351 && (strcmp (idesc->name, "mov") == 0
9352 || strcmp (idesc->name, "movl") == 0))
800eeca4
JW		 9353 {
9354 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
542d6675
KH		 9355 if (regno > 0 && regno < NELEMS (gr_values))
9356 {
9357 gr_values[regno].known = 1;
9358 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9359 gr_values[regno].path = md.path;
9360 if (md.debug_dv)
2434f565
JW		 9361 {
9362 fprintf (stderr, " Know gr%d = ", regno);
9363 fprintf_vma (stderr, gr_values[regno].value);
9364 fputs ("\n", stderr);
9365 }
542d6675 9366 }
800eeca4 9367 }
197865e8 9368 else
800eeca4
JW		 9369 {
9370 clear_qp_mutex (qp_changemask);
9371 clear_qp_implies (qp_changemask, qp_changemask);
9372 }
9373}
9374
542d6675
KH		 9375/* Return whether the given predicate registers are currently mutex. */
9376
800eeca4
JW		 9377static int
9378qp_mutex (p1, p2, path)
542d6675
KH		 9379 int p1;
9380 int p2;
9381 int path;
800eeca4
JW		 9382{
9383 int i;
9384 valueT mask;
9385
9386 if (p1 != p2)
9387 {
542d6675
KH		 9388 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9389 for (i = 0; i < qp_mutexeslen; i++)
9390 {
9391 if (qp_mutexes[i].path >= path
9392 && (qp_mutexes[i].prmask & mask) == mask)
9393 return 1;
9394 }
800eeca4
JW		 9395 }
9396 return 0;
9397}
9398
9399/* Return whether the given resource is in the given insn's list of chks
9400 Return 1 if the conflict is absolutely determined, 2 if it's a potential
542d6675
KH		 9401 conflict. */
9402
800eeca4
JW		 9403static int
9404resources_match (rs, idesc, note, qp_regno, path)
542d6675
KH		 9405 struct rsrc *rs;
9406 struct ia64_opcode *idesc;
9407 int note;
9408 int qp_regno;
9409 int path;
800eeca4
JW		 9410{
9411 struct rsrc specs[MAX_SPECS];
9412 int count;
9413
9414 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9415 we don't need to check. One exception is note 11, which indicates that
9416 target predicates are written regardless of PR[qp]. */
197865e8 9417 if (qp_mutex (rs->qp_regno, qp_regno, path)
800eeca4
JW		 9418 && note != 11)
9419 return 0;
9420
9421 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9422 while (count-- > 0)
9423 {
9424 /* UNAT checking is a bit more specific than other resources */
9425 if (rs->dependency->specifier == IA64_RS_AR_UNAT
542d6675
KH		 9426 && specs[count].mem_offset.hint
9427 && rs->mem_offset.hint)
9428 {
9429 if (rs->mem_offset.base == specs[count].mem_offset.base)
9430 {
9431 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9432 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9433 return 1;
9434 else
9435 continue;
9436 }
9437 }
800eeca4 9438
7484b8e6 9439 /* Skip apparent PR write conflicts where both writes are an AND or both
4a4f25cf 9440 writes are an OR. */
7484b8e6 9441 if (rs->dependency->specifier == IA64_RS_PR
afa680f8 9442 || rs->dependency->specifier == IA64_RS_PRr
7484b8e6
TW		 9443 || rs->dependency->specifier == IA64_RS_PR63)
9444 {
9445 if (specs[count].cmp_type != CMP_NONE
9446 && specs[count].cmp_type == rs->cmp_type)
9447 {
9448 if (md.debug_dv)
9449 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9450 dv_mode[rs->dependency->mode],
afa680f8 9451 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6
TW		 9452 specs[count].index : 63);
9453 continue;
9454 }
9455 if (md.debug_dv)
4a4f25cf 9456 fprintf (stderr,
7484b8e6
TW		 9457 " %s on parallel compare conflict %s vs %s on PR%d\n",
9458 dv_mode[rs->dependency->mode],
4a4f25cf 9459 dv_cmp_type[rs->cmp_type],
7484b8e6 9460 dv_cmp_type[specs[count].cmp_type],
afa680f8 9461 rs->dependency->specifier != IA64_RS_PR63 ?
7484b8e6 9462 specs[count].index : 63);
4a4f25cf 9463
7484b8e6
TW		 9464 }
9465
800eeca4 9466 /* If either resource is not specific, conservatively assume a conflict
197865e8 9467 */
800eeca4 9468 if (!specs[count].specific || !rs->specific)
542d6675 9469 return 2;
800eeca4 9470 else if (specs[count].index == rs->index)
542d6675 9471 return 1;
800eeca4
JW		 9472 }
9473#if 0
9474 if (md.debug_dv)
9475 fprintf (stderr, " No %s conflicts\n", rs->dependency->name);
9476#endif
9477
9478 return 0;
9479}
9480
9481/* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9482 insert a stop to create the break. Update all resource dependencies
9483 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9484 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9485 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
542d6675 9486 instruction. */
800eeca4
JW		 9487
9488static void
9489insn_group_break (insert_stop, qp_regno, save_current)
542d6675
KH		 9490 int insert_stop;
9491 int qp_regno;
9492 int save_current;
800eeca4
JW		 9493{
9494 int i;
9495
9496 if (insert_stop && md.num_slots_in_use > 0)
9497 PREV_SLOT.end_of_insn_group = 1;
9498
9499 if (md.debug_dv)
9500 {
197865e8 9501 fprintf (stderr, " Insn group break%s",
542d6675 9502 (insert_stop ? " (w/stop)" : ""));
800eeca4 9503 if (qp_regno != 0)
542d6675 9504 fprintf (stderr, " effective for QP=%d", qp_regno);
800eeca4
JW		 9505 fprintf (stderr, "\n");
9506 }
9507
9508 i = 0;
9509 while (i < regdepslen)
9510 {
9511 const struct ia64_dependency *dep = regdeps[i].dependency;
9512
9513 if (qp_regno != 0
542d6675
KH		 9514 && regdeps[i].qp_regno != qp_regno)
9515 {
9516 ++i;
9517 continue;
9518 }
800eeca4
JW		 9519
9520 if (save_current
542d6675
KH		 9521 && CURR_SLOT.src_file == regdeps[i].file
9522 && CURR_SLOT.src_line == regdeps[i].line)
9523 {
9524 ++i;
9525 continue;
9526 }
800eeca4
JW		 9527
9528 /* clear dependencies which are automatically cleared by a stop, or
542d6675 9529 those that have reached the appropriate state of insn serialization */
800eeca4 9530 if (dep->semantics == IA64_DVS_IMPLIED
542d6675
KH		 9531 || dep->semantics == IA64_DVS_IMPLIEDF
9532 || regdeps[i].insn_srlz == STATE_SRLZ)
9533 {
9534 print_dependency ("Removing", i);
9535 regdeps[i] = regdeps[--regdepslen];
9536 }
800eeca4 9537 else
542d6675
KH		 9538 {
9539 if (dep->semantics == IA64_DVS_DATA
9540 || dep->semantics == IA64_DVS_INSTR
800eeca4 9541 || dep->semantics == IA64_DVS_SPECIFIC)
542d6675
KH		 9542 {
9543 if (regdeps[i].insn_srlz == STATE_NONE)
9544 regdeps[i].insn_srlz = STATE_STOP;
9545 if (regdeps[i].data_srlz == STATE_NONE)
9546 regdeps[i].data_srlz = STATE_STOP;
9547 }
9548 ++i;
9549 }
800eeca4
JW		 9550 }
9551}
9552
542d6675
KH		 9553/* Add the given resource usage spec to the list of active dependencies. */
9554
197865e8 9555static void
800eeca4 9556mark_resource (idesc, dep, spec, depind, path)
2434f565
JW		 9557 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
9558 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
542d6675
KH		 9559 struct rsrc *spec;
9560 int depind;
9561 int path;
800eeca4
JW		 9562{
9563 if (regdepslen == regdepstotlen)
9564 {
9565 regdepstotlen += 20;
9566 regdeps = (struct rsrc *)
542d6675 9567 xrealloc ((void *) regdeps,
bc805888 9568 regdepstotlen * sizeof (struct rsrc));
800eeca4
JW		 9569 }
9570
9571 regdeps[regdepslen] = *spec;
9572 regdeps[regdepslen].depind = depind;
9573 regdeps[regdepslen].path = path;
9574 regdeps[regdepslen].file = CURR_SLOT.src_file;
9575 regdeps[regdepslen].line = CURR_SLOT.src_line;
9576
9577 print_dependency ("Adding", regdepslen);
9578
9579 ++regdepslen;
9580}
9581
9582static void
9583print_dependency (action, depind)
542d6675
KH		 9584 const char *action;
9585 int depind;
800eeca4
JW		 9586{
9587 if (md.debug_dv)
9588 {
197865e8 9589 fprintf (stderr, " %s %s '%s'",
542d6675
KH		 9590 action, dv_mode[(regdeps[depind].dependency)->mode],
9591 (regdeps[depind].dependency)->name);
800eeca4 9592 if (regdeps[depind].specific && regdeps[depind].index != 0)
542d6675 9593 fprintf (stderr, " (%d)", regdeps[depind].index);
800eeca4 9594 if (regdeps[depind].mem_offset.hint)
2434f565
JW		 9595 {
9596 fputs (" ", stderr);
9597 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
9598 fputs ("+", stderr);
9599 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
9600 }
800eeca4
JW		 9601 fprintf (stderr, "\n");
9602 }
9603}
9604
9605static void
9606instruction_serialization ()
9607{
9608 int i;
9609 if (md.debug_dv)
9610 fprintf (stderr, " Instruction serialization\n");
542d6675 9611 for (i = 0; i < regdepslen; i++)
800eeca4
JW		 9612 if (regdeps[i].insn_srlz == STATE_STOP)
9613 regdeps[i].insn_srlz = STATE_SRLZ;
9614}
9615
9616static void
9617data_serialization ()
9618{
9619 int i = 0;
9620 if (md.debug_dv)
9621 fprintf (stderr, " Data serialization\n");
9622 while (i < regdepslen)
9623 {
9624 if (regdeps[i].data_srlz == STATE_STOP
542d6675
KH		 9625 /* Note: as of 991210, all "other" dependencies are cleared by a
9626 data serialization. This might change with new tables */
9627 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
9628 {
9629 print_dependency ("Removing", i);
9630 regdeps[i] = regdeps[--regdepslen];
9631 }
800eeca4 9632 else
542d6675 9633 ++i;
800eeca4
JW		 9634 }
9635}
9636
542d6675
KH		 9637/* Insert stops and serializations as needed to avoid DVs. */
9638
800eeca4
JW		 9639static void
9640remove_marked_resource (rs)
542d6675 9641 struct rsrc *rs;
800eeca4
JW		 9642{
9643 switch (rs->dependency->semantics)
9644 {
9645 case IA64_DVS_SPECIFIC:
9646 if (md.debug_dv)
9647 fprintf (stderr, "Implementation-specific, assume worst case...\n");
197865e8 9648 /* ...fall through... */
800eeca4
JW		 9649 case IA64_DVS_INSTR:
9650 if (md.debug_dv)
542d6675 9651 fprintf (stderr, "Inserting instr serialization\n");
800eeca4 9652 if (rs->insn_srlz < STATE_STOP)
542d6675 9653 insn_group_break (1, 0, 0);
800eeca4 9654 if (rs->insn_srlz < STATE_SRLZ)
542d6675 9655 {
888a75be 9656 struct slot oldslot = CURR_SLOT;
542d6675 9657 /* Manually jam a srlz.i insn into the stream */
888a75be 9658 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
542d6675
KH		 9659 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
9660 instruction_serialization ();
9661 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9662 if (++md.num_slots_in_use >= NUM_SLOTS)
9663 emit_one_bundle ();
888a75be 9664 CURR_SLOT = oldslot;
542d6675 9665 }
800eeca4
JW		 9666 insn_group_break (1, 0, 0);
9667 break;
9668 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
542d6675
KH		 9669 "other" types of DV are eliminated
9670 by a data serialization */
800eeca4
JW		 9671 case IA64_DVS_DATA:
9672 if (md.debug_dv)
542d6675 9673 fprintf (stderr, "Inserting data serialization\n");
800eeca4 9674 if (rs->data_srlz < STATE_STOP)
542d6675 9675 insn_group_break (1, 0, 0);
800eeca4 9676 {
888a75be 9677 struct slot oldslot = CURR_SLOT;
542d6675 9678 /* Manually jam a srlz.d insn into the stream */
888a75be 9679 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
542d6675
KH		 9680 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
9681 data_serialization ();
9682 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9683 if (++md.num_slots_in_use >= NUM_SLOTS)
9684 emit_one_bundle ();
888a75be 9685 CURR_SLOT = oldslot;
800eeca4
JW		 9686 }
9687 break;
9688 case IA64_DVS_IMPLIED:
9689 case IA64_DVS_IMPLIEDF:
9690 if (md.debug_dv)
542d6675 9691 fprintf (stderr, "Inserting stop\n");
800eeca4
JW		 9692 insn_group_break (1, 0, 0);
9693 break;
9694 default:
9695 break;
9696 }
9697}
9698
9699/* Check the resources used by the given opcode against the current dependency
197865e8 9700 list.
800eeca4
JW		 9701
9702 The check is run once for each execution path encountered. In this case,
9703 a unique execution path is the sequence of instructions following a code
9704 entry point, e.g. the following has three execution paths, one starting
9705 at L0, one at L1, and one at L2.
197865e8 9706
800eeca4
JW		 9707 L0: nop
9708 L1: add
9709 L2: add
197865e8 9710 br.ret
800eeca4 9711*/
542d6675 9712
800eeca4
JW		 9713static void
9714check_dependencies (idesc)
542d6675 9715 struct ia64_opcode *idesc;
800eeca4
JW		 9716{
9717 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9718 int path;
9719 int i;
9720
9721 /* Note that the number of marked resources may change within the
197865e8 9722 loop if in auto mode. */
800eeca4
JW		 9723 i = 0;
9724 while (i < regdepslen)
9725 {
9726 struct rsrc *rs = &regdeps[i];
9727 const struct ia64_dependency *dep = rs->dependency;
9728 int chkind;
9729 int note;
9730 int start_over = 0;
9731
9732 if (dep->semantics == IA64_DVS_NONE
542d6675
KH		 9733 || (chkind = depends_on (rs->depind, idesc)) == -1)
9734 {
9735 ++i;
9736 continue;
9737 }
9738
9739 note = NOTE (opdeps->chks[chkind]);
9740
9741 /* Check this resource against each execution path seen thus far. */
9742 for (path = 0; path <= md.path; path++)
9743 {
9744 int matchtype;
9745
9746 /* If the dependency wasn't on the path being checked, ignore it. */
9747 if (rs->path < path)
9748 continue;
9749
9750 /* If the QP for this insn implies a QP which has branched, don't
9751 bother checking. Ed. NOTE: I don't think this check is terribly
9752 useful; what's the point of generating code which will only be
9753 reached if its QP is zero?
9754 This code was specifically inserted to handle the following code,
9755 based on notes from Intel's DV checking code, where p1 implies p2.
9756
9757 mov r4 = 2
9758 (p2) br.cond L
9759 (p1) mov r4 = 7
9760 */
9761 if (CURR_SLOT.qp_regno != 0)
9762 {
9763 int skip = 0;
9764 int implies;
9765 for (implies = 0; implies < qp_implieslen; implies++)
9766 {
9767 if (qp_implies[implies].path >= path
9768 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
9769 && qp_implies[implies].p2_branched)
9770 {
9771 skip = 1;
9772 break;
9773 }
9774 }
9775 if (skip)
9776 continue;
9777 }
9778
9779 if ((matchtype = resources_match (rs, idesc, note,
9780 CURR_SLOT.qp_regno, path)) != 0)
9781 {
9782 char msg[1024];
9783 char pathmsg[256] = "";
9784 char indexmsg[256] = "";
9785 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
9786
9787 if (path != 0)
9788 sprintf (pathmsg, " when entry is at label '%s'",
9789 md.entry_labels[path - 1]);
9790 if (rs->specific && rs->index != 0)
9791 sprintf (indexmsg, ", specific resource number is %d",
9792 rs->index);
9793 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9794 idesc->name,
9795 (certain ? "violates" : "may violate"),
9796 dv_mode[dep->mode], dep->name,
9797 dv_sem[dep->semantics],
9798 pathmsg, indexmsg);
9799
9800 if (md.explicit_mode)
9801 {
9802 as_warn ("%s", msg);
9803 if (path < md.path)
9804 as_warn (_("Only the first path encountering the conflict "
9805 "is reported"));
9806 as_warn_where (rs->file, rs->line,
9807 _("This is the location of the "
9808 "conflicting usage"));
9809 /* Don't bother checking other paths, to avoid duplicating
9810 the same warning */
9811 break;
9812 }
9813 else
9814 {
9815 if (md.debug_dv)
9816 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
9817
9818 remove_marked_resource (rs);
9819
9820 /* since the set of dependencies has changed, start over */
9821 /* FIXME -- since we're removing dvs as we go, we
9822 probably don't really need to start over... */
9823 start_over = 1;
9824 break;
9825 }
9826 }
9827 }
800eeca4 9828 if (start_over)
542d6675 9829 i = 0;
800eeca4 9830 else
542d6675 9831 ++i;
800eeca4
JW		 9832 }
9833}
9834
542d6675
KH		 9835/* Register new dependencies based on the given opcode. */
9836
800eeca4
JW		 9837static void
9838mark_resources (idesc)
542d6675 9839 struct ia64_opcode *idesc;
800eeca4
JW		 9840{
9841 int i;
9842 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9843 int add_only_qp_reads = 0;
9844
9845 /* A conditional branch only uses its resources if it is taken; if it is
9846 taken, we stop following that path. The other branch types effectively
9847 *always* write their resources. If it's not taken, register only QP
197865e8 9848 reads. */
800eeca4
JW		 9849 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
9850 {
9851 add_only_qp_reads = 1;
9852 }
9853
9854 if (md.debug_dv)
9855 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
9856
542d6675 9857 for (i = 0; i < opdeps->nregs; i++)
800eeca4
JW		 9858 {
9859 const struct ia64_dependency *dep;
9860 struct rsrc specs[MAX_SPECS];
9861 int note;
9862 int path;
9863 int count;
197865e8 9864
800eeca4 9865 dep = ia64_find_dependency (opdeps->regs[i]);
542d6675 9866 note = NOTE (opdeps->regs[i]);
800eeca4
JW		 9867
9868 if (add_only_qp_reads
542d6675
KH		 9869 && !(dep->mode == IA64_DV_WAR
9870 && (dep->specifier == IA64_RS_PR
139368c9 9871 || dep->specifier == IA64_RS_PRr
542d6675
KH		 9872 || dep->specifier == IA64_RS_PR63)))
9873 continue;
800eeca4
JW		 9874
9875 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
9876
9877#if 0
9878 if (md.debug_dv && !count)
542d6675
KH		 9879 fprintf (stderr, " No %s %s usage found (path %d)\n",
9880 dv_mode[dep->mode], dep->name, md.path);
800eeca4 9881#endif
197865e8 9882
800eeca4 9883 while (count-- > 0)
542d6675
KH		 9884 {
9885 mark_resource (idesc, dep, &specs[count],
9886 DEP (opdeps->regs[i]), md.path);
9887 }
800eeca4
JW		 9888
9889 /* The execution path may affect register values, which may in turn
542d6675 9890 affect which indirect-access resources are accessed. */
800eeca4 9891 switch (dep->specifier)
542d6675
KH		 9892 {
9893 default:
9894 break;
9895 case IA64_RS_CPUID:
9896 case IA64_RS_DBR:
9897 case IA64_RS_IBR:
800eeca4 9898 case IA64_RS_MSR:
542d6675
KH		 9899 case IA64_RS_PKR:
9900 case IA64_RS_PMC:
9901 case IA64_RS_PMD:
9902 case IA64_RS_RR:
9903 for (path = 0; path < md.path; path++)
9904 {
9905 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
9906 while (count-- > 0)
9907 mark_resource (idesc, dep, &specs[count],
9908 DEP (opdeps->regs[i]), path);
9909 }
9910 break;
9911 }
9912 }
9913}
9914
9915/* Remove dependencies when they no longer apply. */
9916
800eeca4
JW		 9917static void
9918update_dependencies (idesc)
542d6675 9919 struct ia64_opcode *idesc;
800eeca4
JW		 9920{
9921 int i;
9922
9923 if (strcmp (idesc->name, "srlz.i") == 0)
9924 {
9925 instruction_serialization ();
9926 }
9927 else if (strcmp (idesc->name, "srlz.d") == 0)
9928 {
9929 data_serialization ();
9930 }
9931 else if (is_interruption_or_rfi (idesc)
542d6675 9932 || is_taken_branch (idesc))
800eeca4 9933 {
542d6675
KH		 9934 /* Although technically the taken branch doesn't clear dependencies
9935 which require a srlz.[id], we don't follow the branch; the next
9936 instruction is assumed to start with a clean slate. */
800eeca4 9937 regdepslen = 0;
800eeca4
JW		 9938 md.path = 0;
9939 }
9940 else if (is_conditional_branch (idesc)
542d6675 9941 && CURR_SLOT.qp_regno != 0)
800eeca4
JW		 9942 {
9943 int is_call = strstr (idesc->name, ".call") != NULL;
9944
542d6675
KH		 9945 for (i = 0; i < qp_implieslen; i++)
9946 {
9947 /* If the conditional branch's predicate is implied by the predicate
9948 in an existing dependency, remove that dependency. */
9949 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
9950 {
9951 int depind = 0;
9952 /* Note that this implied predicate takes a branch so that if
9953 a later insn generates a DV but its predicate implies this
9954 one, we can avoid the false DV warning. */
9955 qp_implies[i].p2_branched = 1;
9956 while (depind < regdepslen)
9957 {
9958 if (regdeps[depind].qp_regno == qp_implies[i].p1)
9959 {
9960 print_dependency ("Removing", depind);
9961 regdeps[depind] = regdeps[--regdepslen];
9962 }
9963 else
9964 ++depind;
9965 }
9966 }
9967 }
800eeca4 9968 /* Any marked resources which have this same predicate should be
542d6675
KH		 9969 cleared, provided that the QP hasn't been modified between the
9970 marking instruction and the branch. */
800eeca4 9971 if (is_call)
542d6675
KH		 9972 {
9973 insn_group_break (0, CURR_SLOT.qp_regno, 1);
9974 }
800eeca4 9975 else
542d6675
KH		 9976 {
9977 i = 0;
9978 while (i < regdepslen)
9979 {
9980 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
9981 && regdeps[i].link_to_qp_branch
9982 && (regdeps[i].file != CURR_SLOT.src_file
9983 || regdeps[i].line != CURR_SLOT.src_line))
9984 {
9985 /* Treat like a taken branch */
9986 print_dependency ("Removing", i);
9987 regdeps[i] = regdeps[--regdepslen];
9988 }
9989 else
9990 ++i;
9991 }
9992 }
800eeca4
JW		 9993 }
9994}
9995
9996/* Examine the current instruction for dependency violations. */
542d6675 9997
800eeca4
JW		 9998static int
9999check_dv (idesc)
542d6675 10000 struct ia64_opcode *idesc;
800eeca4
JW		 10001{
10002 if (md.debug_dv)
10003 {
197865e8 10004 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
542d6675
KH		 10005 idesc->name, CURR_SLOT.src_line,
10006 idesc->dependencies->nchks,
10007 idesc->dependencies->nregs);
800eeca4
JW		 10008 }
10009
197865e8 10010 /* Look through the list of currently marked resources; if the current
800eeca4 10011 instruction has the dependency in its chks list which uses that resource,
542d6675 10012 check against the specific resources used. */
800eeca4
JW		 10013 check_dependencies (idesc);
10014
542d6675
KH		 10015 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10016 then add them to the list of marked resources. */
800eeca4
JW		 10017 mark_resources (idesc);
10018
10019 /* There are several types of dependency semantics, and each has its own
197865e8
KH		 10020 requirements for being cleared
10021
800eeca4
JW		 10022 Instruction serialization (insns separated by interruption, rfi, or
10023 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10024
10025 Data serialization (instruction serialization, or writer + srlz.d +
10026 reader, where writer and srlz.d are in separate groups) clears
10027 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10028 always be the case).
10029
10030 Instruction group break (groups separated by stop, taken branch,
10031 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10032 */
10033 update_dependencies (idesc);
10034
10035 /* Sometimes, knowing a register value allows us to avoid giving a false DV
197865e8 10036 warning. Keep track of as many as possible that are useful. */
800eeca4
JW		 10037 note_register_values (idesc);
10038
197865e8 10039 /* We don't need or want this anymore. */
800eeca4
JW		 10040 md.mem_offset.hint = 0;
10041
10042 return 0;
10043}
10044
10045/* Translate one line of assembly. Pseudo ops and labels do not show
10046 here. */
10047void
10048md_assemble (str)
10049 char *str;
10050{
10051 char *saved_input_line_pointer, *mnemonic;
10052 const struct pseudo_opcode *pdesc;
10053 struct ia64_opcode *idesc;
10054 unsigned char qp_regno;
10055 unsigned int flags;
10056 int ch;
10057
10058 saved_input_line_pointer = input_line_pointer;
10059 input_line_pointer = str;
10060
542d6675 10061 /* extract the opcode (mnemonic): */
800eeca4
JW		 10062
10063 mnemonic = input_line_pointer;
10064 ch = get_symbol_end ();
10065 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10066 if (pdesc)
10067 {
10068 *input_line_pointer = ch;
10069 (*pdesc->handler) (pdesc->arg);
10070 goto done;
10071 }
10072
542d6675 10073 /* Find the instruction descriptor matching the arguments. */
800eeca4
JW		 10074
10075 idesc = ia64_find_opcode (mnemonic);
10076 *input_line_pointer = ch;
10077 if (!idesc)
10078 {
10079 as_bad ("Unknown opcode `%s'", mnemonic);
10080 goto done;
10081 }
10082
10083 idesc = parse_operands (idesc);
10084 if (!idesc)
10085 goto done;
10086
542d6675 10087 /* Handle the dynamic ops we can handle now: */
800eeca4
JW		 10088 if (idesc->type == IA64_TYPE_DYN)
10089 {
10090 if (strcmp (idesc->name, "add") == 0)
10091 {
10092 if (CURR_SLOT.opnd[2].X_op == O_register
10093 && CURR_SLOT.opnd[2].X_add_number < 4)
10094 mnemonic = "addl";
10095 else
10096 mnemonic = "adds";
3d56ab85 10097 ia64_free_opcode (idesc);
800eeca4
JW		 10098 idesc = ia64_find_opcode (mnemonic);
10099#if 0
10100 know (!idesc->next);
10101#endif
10102 }
10103 else if (strcmp (idesc->name, "mov") == 0)
10104 {
10105 enum ia64_opnd opnd1, opnd2;
10106 int rop;
10107
10108 opnd1 = idesc->operands[0];
10109 opnd2 = idesc->operands[1];
10110 if (opnd1 == IA64_OPND_AR3)
10111 rop = 0;
10112 else if (opnd2 == IA64_OPND_AR3)
10113 rop = 1;
10114 else
10115 abort ();
652ca075
L		 10116 if (CURR_SLOT.opnd[rop].X_op == O_register)
10117 {
10118 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10119 mnemonic = "mov.i";
97762d08 10120 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
652ca075 10121 mnemonic = "mov.m";
97762d08
JB		 10122 else
10123 rop = -1;
652ca075 10124 }
800eeca4 10125 else
652ca075 10126 abort ();
97762d08
JB		 10127 if (rop >= 0)
10128 {
10129 ia64_free_opcode (idesc);
10130 idesc = ia64_find_opcode (mnemonic);
10131 while (idesc != NULL
10132 && (idesc->operands[0] != opnd1
10133 || idesc->operands[1] != opnd2))
10134 idesc = get_next_opcode (idesc);
10135 }
800eeca4
JW		 10136 }
10137 }
652ca075
L		 10138 else if (strcmp (idesc->name, "mov.i") == 0
10139 || strcmp (idesc->name, "mov.m") == 0)
10140 {
10141 enum ia64_opnd opnd1, opnd2;
10142 int rop;
10143
10144 opnd1 = idesc->operands[0];
10145 opnd2 = idesc->operands[1];
10146 if (opnd1 == IA64_OPND_AR3)
10147 rop = 0;
10148 else if (opnd2 == IA64_OPND_AR3)
10149 rop = 1;
10150 else
10151 abort ();
10152 if (CURR_SLOT.opnd[rop].X_op == O_register)
10153 {
10154 char unit = 'a';
10155 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10156 unit = 'i';
10157 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10158 unit = 'm';
10159 if (unit != 'a' && unit != idesc->name [4])
10160 as_bad ("AR %d cannot be accessed by %c-unit",
10161 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10162 TOUPPER (unit));
10163 }
10164 }
800eeca4
JW		 10165
10166 qp_regno = 0;
10167 if (md.qp.X_op == O_register)
f1bcba5b
JW		 10168 {
10169 qp_regno = md.qp.X_add_number - REG_P;
10170 md.qp.X_op = O_absent;
10171 }
800eeca4
JW		 10172
10173 flags = idesc->flags;
10174
10175 if ((flags & IA64_OPCODE_FIRST) != 0)
9545c4ce
L		 10176 {
10177 /* The alignment frag has to end with a stop bit only if the
10178 next instruction after the alignment directive has to be
10179 the first instruction in an instruction group. */
10180 if (align_frag)
10181 {
10182 while (align_frag->fr_type != rs_align_code)
10183 {
10184 align_frag = align_frag->fr_next;
bae25f19
L		 10185 if (!align_frag)
10186 break;
9545c4ce 10187 }
bae25f19
L		 10188 /* align_frag can be NULL if there are directives in
10189 between. */
10190 if (align_frag && align_frag->fr_next == frag_now)
9545c4ce
L		 10191 align_frag->tc_frag_data = 1;
10192 }
10193
10194 insn_group_break (1, 0, 0);
10195 }
10196 align_frag = NULL;
800eeca4
JW		 10197
10198 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10199 {
10200 as_bad ("`%s' cannot be predicated", idesc->name);
10201 goto done;
10202 }
10203
542d6675 10204 /* Build the instruction. */
800eeca4
JW		 10205 CURR_SLOT.qp_regno = qp_regno;
10206 CURR_SLOT.idesc = idesc;
10207 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
4dc7ead9 10208 dwarf2_where (&CURR_SLOT.debug_line);
800eeca4
JW		 10209
10210 /* Add unwind entry, if there is one. */
e0c9811a 10211 if (unwind.current_entry)
800eeca4 10212 {
e0c9811a
JW		 10213 CURR_SLOT.unwind_record = unwind.current_entry;
10214 unwind.current_entry = NULL;
800eeca4
JW		 10215 }
10216
542d6675 10217 /* Check for dependency violations. */
800eeca4 10218 if (md.detect_dv)
542d6675 10219 check_dv (idesc);
800eeca4
JW		 10220
10221 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10222 if (++md.num_slots_in_use >= NUM_SLOTS)
10223 emit_one_bundle ();
10224
10225 if ((flags & IA64_OPCODE_LAST) != 0)
10226 insn_group_break (1, 0, 0);
10227
10228 md.last_text_seg = now_seg;
10229
10230 done:
10231 input_line_pointer = saved_input_line_pointer;
10232}
10233
10234/* Called when symbol NAME cannot be found in the symbol table.
10235 Should be used for dynamic valued symbols only. */
542d6675
KH		 10236
10237symbolS *
800eeca4 10238md_undefined_symbol (name)
2434f565 10239 char *name ATTRIBUTE_UNUSED;
800eeca4
JW		 10240{
10241 return 0;
10242}
10243
10244/* Called for any expression that can not be recognized. When the
10245 function is called, `input_line_pointer' will point to the start of
10246 the expression. */
542d6675 10247
800eeca4
JW		 10248void
10249md_operand (e)
10250 expressionS *e;
10251{
10252 enum pseudo_type pseudo_type;
e0c9811a 10253 const char *name;
800eeca4
JW		 10254 size_t len;
10255 int ch, i;
10256
10257 switch (*input_line_pointer)
10258 {
10259 case '@':
542d6675 10260 /* Find what relocation pseudo-function we're dealing with. */
800eeca4
JW		 10261 pseudo_type = 0;
10262 ch = *++input_line_pointer;
10263 for (i = 0; i < NELEMS (pseudo_func); ++i)
10264 if (pseudo_func[i].name && pseudo_func[i].name[0] == ch)
10265 {
10266 len = strlen (pseudo_func[i].name);
10267 if (strncmp (pseudo_func[i].name + 1,
10268 input_line_pointer + 1, len - 1) == 0
10269 && !is_part_of_name (input_line_pointer[len]))
10270 {
10271 input_line_pointer += len;
10272 pseudo_type = pseudo_func[i].type;
10273 break;
10274 }
10275 }
10276 switch (pseudo_type)
10277 {
10278 case PSEUDO_FUNC_RELOC:
10279 SKIP_WHITESPACE ();
10280 if (*input_line_pointer != '(')
10281 {
10282 as_bad ("Expected '('");
10283 goto err;
10284 }
542d6675
KH		 10285 /* Skip '('. */
10286 ++input_line_pointer;
800eeca4
JW		 10287 expression (e);
10288 if (*input_line_pointer++ != ')')
10289 {
10290 as_bad ("Missing ')'");
10291 goto err;
10292 }
10293 if (e->X_op != O_symbol)
10294 {
10295 if (e->X_op != O_pseudo_fixup)
10296 {
10297 as_bad ("Not a symbolic expression");
10298 goto err;
10299 }
13ae64f3
JJ		 10300 if (i != FUNC_LT_RELATIVE)
10301 {
10302 as_bad ("Illegal combination of relocation functions");
10303 goto err;
10304 }
10305 switch (S_GET_VALUE (e->X_op_symbol))
800eeca4 10306 {
13ae64f3
JJ		 10307 case FUNC_FPTR_RELATIVE:
10308 i = FUNC_LT_FPTR_RELATIVE; break;
10309 case FUNC_DTP_MODULE:
10310 i = FUNC_LT_DTP_MODULE; break;
10311 case FUNC_DTP_RELATIVE:
10312 i = FUNC_LT_DTP_RELATIVE; break;
10313 case FUNC_TP_RELATIVE:
10314 i = FUNC_LT_TP_RELATIVE; break;
10315 default:
800eeca4
JW		 10316 as_bad ("Illegal combination of relocation functions");
10317 goto err;
10318 }
10319 }
542d6675
KH		 10320 /* Make sure gas doesn't get rid of local symbols that are used
10321 in relocs. */
800eeca4
JW		 10322 e->X_op = O_pseudo_fixup;
10323 e->X_op_symbol = pseudo_func[i].u.sym;
10324 break;
10325
10326 case PSEUDO_FUNC_CONST:
10327 e->X_op = O_constant;
10328 e->X_add_number = pseudo_func[i].u.ival;
10329 break;
10330
e0c9811a
JW		 10331 case PSEUDO_FUNC_REG:
10332 e->X_op = O_register;
10333 e->X_add_number = pseudo_func[i].u.ival;
10334 break;
10335
800eeca4 10336 default:
e0c9811a
JW		 10337 name = input_line_pointer - 1;
10338 get_symbol_end ();
10339 as_bad ("Unknown pseudo function `%s'", name);
800eeca4
JW		 10340 goto err;
10341 }
10342 break;
10343
10344 case '[':
10345 ++input_line_pointer;
10346 expression (e);
10347 if (*input_line_pointer != ']')
10348 {
10349 as_bad ("Closing bracket misssing");
10350 goto err;
10351 }
10352 else
10353 {
10354 if (e->X_op != O_register)
10355 as_bad ("Register expected as index");
10356
10357 ++input_line_pointer;
10358 e->X_op = O_index;
10359 }
10360 break;
10361
10362 default:
10363 break;
10364 }
10365 return;
10366
10367 err:
10368 ignore_rest_of_line ();
10369}
10370
10371/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10372 a section symbol plus some offset. For relocs involving @fptr(),
10373 directives we don't want such adjustments since we need to have the
10374 original symbol's name in the reloc. */
10375int
10376ia64_fix_adjustable (fix)
10377 fixS *fix;
10378{
10379 /* Prevent all adjustments to global symbols */
10380 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10381 return 0;
10382
10383 switch (fix->fx_r_type)
10384 {
10385 case BFD_RELOC_IA64_FPTR64I:
10386 case BFD_RELOC_IA64_FPTR32MSB:
10387 case BFD_RELOC_IA64_FPTR32LSB:
10388 case BFD_RELOC_IA64_FPTR64MSB:
10389 case BFD_RELOC_IA64_FPTR64LSB:
10390 case BFD_RELOC_IA64_LTOFF_FPTR22:
10391 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10392 return 0;
10393 default:
10394 break;
10395 }
10396
10397 return 1;
10398}
10399
10400int
10401ia64_force_relocation (fix)
10402 fixS *fix;
10403{
10404 switch (fix->fx_r_type)
10405 {
10406 case BFD_RELOC_IA64_FPTR64I:
10407 case BFD_RELOC_IA64_FPTR32MSB:
10408 case BFD_RELOC_IA64_FPTR32LSB:
10409 case BFD_RELOC_IA64_FPTR64MSB:
10410 case BFD_RELOC_IA64_FPTR64LSB:
10411
10412 case BFD_RELOC_IA64_LTOFF22:
10413 case BFD_RELOC_IA64_LTOFF64I:
10414 case BFD_RELOC_IA64_LTOFF_FPTR22:
10415 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10416 case BFD_RELOC_IA64_PLTOFF22:
10417 case BFD_RELOC_IA64_PLTOFF64I:
10418 case BFD_RELOC_IA64_PLTOFF64MSB:
10419 case BFD_RELOC_IA64_PLTOFF64LSB:
fa2c7eff
RH		 10420
10421 case BFD_RELOC_IA64_LTOFF22X:
10422 case BFD_RELOC_IA64_LDXMOV:
800eeca4
JW		 10423 return 1;
10424
10425 default:
a161fe53 10426 break;
800eeca4 10427 }
a161fe53 10428
ae6063d4 10429 return generic_force_reloc (fix);
800eeca4
JW		 10430}
10431
10432/* Decide from what point a pc-relative relocation is relative to,
10433 relative to the pc-relative fixup. Er, relatively speaking. */
10434long
10435ia64_pcrel_from_section (fix, sec)
10436 fixS *fix;
10437 segT sec;
10438{
10439 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
197865e8 10440
800eeca4
JW		 10441 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10442 off &= ~0xfUL;
10443
10444 return off;
10445}
10446
6174d9c8
RH		 10447
10448/* Used to emit section-relative relocs for the dwarf2 debug data. */
10449void
10450ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10451{
10452 expressionS expr;
10453
10454 expr.X_op = O_pseudo_fixup;
10455 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10456 expr.X_add_number = 0;
10457 expr.X_add_symbol = symbol;
10458 emit_expr (&expr, size);
10459}
10460
800eeca4
JW		 10461/* This is called whenever some data item (not an instruction) needs a
10462 fixup. We pick the right reloc code depending on the byteorder
10463 currently in effect. */
10464void
10465ia64_cons_fix_new (f, where, nbytes, exp)
10466 fragS *f;
10467 int where;
10468 int nbytes;
10469 expressionS *exp;
10470{
10471 bfd_reloc_code_real_type code;
10472 fixS *fix;
10473
10474 switch (nbytes)
10475 {
10476 /* There are no reloc for 8 and 16 bit quantities, but we allow
10477 them here since they will work fine as long as the expression
10478 is fully defined at the end of the pass over the source file. */
10479 case 1: code = BFD_RELOC_8; break;
10480 case 2: code = BFD_RELOC_16; break;
10481 case 4:
10482 if (target_big_endian)
10483 code = BFD_RELOC_IA64_DIR32MSB;
10484 else
10485 code = BFD_RELOC_IA64_DIR32LSB;
10486 break;
10487
10488 case 8:
40449e9f 10489 /* In 32-bit mode, data8 could mean function descriptors too. */
5f44c186 10490 if (exp->X_op == O_pseudo_fixup
40449e9f
KH		 10491 && exp->X_op_symbol
10492 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10493 && !(md.flags & EF_IA_64_ABI64))
10494 {
10495 if (target_big_endian)
10496 code = BFD_RELOC_IA64_IPLTMSB;
10497 else
10498 code = BFD_RELOC_IA64_IPLTLSB;
10499 exp->X_op = O_symbol;
10500 break;
10501 }
10502 else
10503 {
10504 if (target_big_endian)
10505 code = BFD_RELOC_IA64_DIR64MSB;
10506 else
10507 code = BFD_RELOC_IA64_DIR64LSB;
10508 break;
10509 }
800eeca4 10510
3969b680
RH		 10511 case 16:
10512 if (exp->X_op == O_pseudo_fixup
10513 && exp->X_op_symbol
10514 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10515 {
10516 if (target_big_endian)
10517 code = BFD_RELOC_IA64_IPLTMSB;
10518 else
10519 code = BFD_RELOC_IA64_IPLTLSB;
3969b680
RH		 10520 exp->X_op = O_symbol;
10521 break;
10522 }
10523 /* FALLTHRU */
10524
800eeca4
JW		 10525 default:
10526 as_bad ("Unsupported fixup size %d", nbytes);
10527 ignore_rest_of_line ();
10528 return;
10529 }
6174d9c8 10530
800eeca4
JW		 10531 if (exp->X_op == O_pseudo_fixup)
10532 {
800eeca4
JW		 10533 exp->X_op = O_symbol;
10534 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
6174d9c8 10535 /* ??? If code unchanged, unsupported. */
800eeca4 10536 }
3969b680 10537
800eeca4
JW		 10538 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10539 /* We need to store the byte order in effect in case we're going
10540 to fix an 8 or 16 bit relocation (for which there no real
94f592af 10541 relocs available). See md_apply_fix3(). */
800eeca4
JW		 10542 fix->tc_fix_data.bigendian = target_big_endian;
10543}
10544
10545/* Return the actual relocation we wish to associate with the pseudo
10546 reloc described by SYM and R_TYPE. SYM should be one of the
197865e8 10547 symbols in the pseudo_func array, or NULL. */
800eeca4
JW		 10548
10549static bfd_reloc_code_real_type
10550ia64_gen_real_reloc_type (sym, r_type)
10551 struct symbol *sym;
10552 bfd_reloc_code_real_type r_type;
10553{
10554 bfd_reloc_code_real_type new = 0;
10555
10556 if (sym == NULL)
10557 {
10558 return r_type;
10559 }
10560
10561 switch (S_GET_VALUE (sym))
10562 {
10563 case FUNC_FPTR_RELATIVE:
10564 switch (r_type)
10565 {
10566 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10567 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10568 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10569 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10570 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10571 default: break;
10572 }
10573 break;
10574
10575 case FUNC_GP_RELATIVE:
10576 switch (r_type)
10577 {
10578 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10579 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10580 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10581 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10582 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10583 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10584 default: break;
10585 }
10586 break;
10587
10588 case FUNC_LT_RELATIVE:
10589 switch (r_type)
10590 {
10591 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10592 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10593 default: break;
10594 }
10595 break;
10596
fa2c7eff
RH		 10597 case FUNC_LT_RELATIVE_X:
10598 switch (r_type)
10599 {
10600 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10601 default: break;
10602 }
10603 break;
10604
c67e42c9
RH		 10605 case FUNC_PC_RELATIVE:
10606 switch (r_type)
10607 {
10608 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10609 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10610 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10611 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10612 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10613 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10614 default: break;
10615 }
10616 break;
10617
800eeca4
JW		 10618 case FUNC_PLT_RELATIVE:
10619 switch (r_type)
10620 {
10621 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10622 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10623 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10624 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10625 default: break;
10626 }
10627 break;
10628
10629 case FUNC_SEC_RELATIVE:
10630 switch (r_type)
10631 {
10632 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10633 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10634 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10635 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10636 default: break;
10637 }
10638 break;
10639
10640 case FUNC_SEG_RELATIVE:
10641 switch (r_type)
10642 {
10643 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10644 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10645 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10646 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10647 default: break;
10648 }
10649 break;
10650
10651 case FUNC_LTV_RELATIVE:
10652 switch (r_type)
10653 {
10654 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
10655 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
10656 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
10657 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
10658 default: break;
10659 }
10660 break;
10661
10662 case FUNC_LT_FPTR_RELATIVE:
10663 switch (r_type)
10664 {
10665 case BFD_RELOC_IA64_IMM22:
10666 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
10667 case BFD_RELOC_IA64_IMM64:
10668 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
10669 default:
10670 break;
10671 }
10672 break;
3969b680 10673
13ae64f3
JJ		 10674 case FUNC_TP_RELATIVE:
10675 switch (r_type)
10676 {
10677 case BFD_RELOC_IA64_IMM14:
10678 new = BFD_RELOC_IA64_TPREL14; break;
10679 case BFD_RELOC_IA64_IMM22:
10680 new = BFD_RELOC_IA64_TPREL22; break;
10681 case BFD_RELOC_IA64_IMM64:
10682 new = BFD_RELOC_IA64_TPREL64I; break;
10683 default:
10684 break;
10685 }
10686 break;
10687
10688 case FUNC_LT_TP_RELATIVE:
10689 switch (r_type)
10690 {
10691 case BFD_RELOC_IA64_IMM22:
10692 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
10693 default:
10694 break;
10695 }
10696 break;
10697
10698 case FUNC_LT_DTP_MODULE:
10699 switch (r_type)
10700 {
10701 case BFD_RELOC_IA64_IMM22:
10702 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
10703 default:
10704 break;
10705 }
10706 break;
10707
10708 case FUNC_DTP_RELATIVE:
10709 switch (r_type)
10710 {
6174d9c8
RH		 10711 case BFD_RELOC_IA64_DIR64MSB:
10712 new = BFD_RELOC_IA64_DTPREL64MSB; break;
10713 case BFD_RELOC_IA64_DIR64LSB:
10714 new = BFD_RELOC_IA64_DTPREL64LSB; break;
13ae64f3
JJ		 10715 case BFD_RELOC_IA64_IMM14:
10716 new = BFD_RELOC_IA64_DTPREL14; break;
10717 case BFD_RELOC_IA64_IMM22:
10718 new = BFD_RELOC_IA64_DTPREL22; break;
10719 case BFD_RELOC_IA64_IMM64:
10720 new = BFD_RELOC_IA64_DTPREL64I; break;
10721 default:
10722 break;
10723 }
10724 break;
10725
10726 case FUNC_LT_DTP_RELATIVE:
10727 switch (r_type)
10728 {
10729 case BFD_RELOC_IA64_IMM22:
10730 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
10731 default:
10732 break;
10733 }
10734 break;
10735
40449e9f
KH		 10736 case FUNC_IPLT_RELOC:
10737 break;
1cd8ff38 10738
800eeca4
JW		 10739 default:
10740 abort ();
10741 }
6174d9c8 10742
800eeca4
JW		 10743 /* Hmmmm. Should this ever occur? */
10744 if (new)
10745 return new;
10746 else
10747 return r_type;
10748}
10749
10750/* Here is where generate the appropriate reloc for pseudo relocation
10751 functions. */
10752void
10753ia64_validate_fix (fix)
10754 fixS *fix;
10755{
10756 switch (fix->fx_r_type)
10757 {
10758 case BFD_RELOC_IA64_FPTR64I:
10759 case BFD_RELOC_IA64_FPTR32MSB:
10760 case BFD_RELOC_IA64_FPTR64LSB:
10761 case BFD_RELOC_IA64_LTOFF_FPTR22:
10762 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10763 if (fix->fx_offset != 0)
10764 as_bad_where (fix->fx_file, fix->fx_line,
10765 "No addend allowed in @fptr() relocation");
10766 break;
10767 default:
10768 break;
10769 }
800eeca4
JW		 10770}
10771
10772static void
10773fix_insn (fix, odesc, value)
10774 fixS *fix;
10775 const struct ia64_operand *odesc;
10776 valueT value;
10777{
10778 bfd_vma insn[3], t0, t1, control_bits;
10779 const char *err;
10780 char *fixpos;
10781 long slot;
10782
10783 slot = fix->fx_where & 0x3;
10784 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
10785
c67e42c9 10786 /* Bundles are always in little-endian byte order */
800eeca4
JW		 10787 t0 = bfd_getl64 (fixpos);
10788 t1 = bfd_getl64 (fixpos + 8);
10789 control_bits = t0 & 0x1f;
10790 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
10791 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
10792 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
10793
c67e42c9
RH		 10794 err = NULL;
10795 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
800eeca4 10796 {
c67e42c9
RH		 10797 insn[1] = (value >> 22) & 0x1ffffffffffLL;
10798 insn[2] |= (((value & 0x7f) << 13)
10799 | (((value >> 7) & 0x1ff) << 27)
10800 | (((value >> 16) & 0x1f) << 22)
10801 | (((value >> 21) & 0x1) << 21)
10802 | (((value >> 63) & 0x1) << 36));
800eeca4 10803 }
c67e42c9
RH		 10804 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
10805 {
10806 if (value & ~0x3fffffffffffffffULL)
10807 err = "integer operand out of range";
10808 insn[1] = (value >> 21) & 0x1ffffffffffLL;
10809 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
10810 }
10811 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
10812 {
10813 value >>= 4;
10814 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
10815 insn[2] |= ((((value >> 59) & 0x1) << 36)
10816 | (((value >> 0) & 0xfffff) << 13));
10817 }
10818 else
10819 err = (*odesc->insert) (odesc, value, insn + slot);
10820
10821 if (err)
10822 as_bad_where (fix->fx_file, fix->fx_line, err);
800eeca4
JW		 10823
10824 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
10825 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
44f5c83a
JW		 10826 number_to_chars_littleendian (fixpos + 0, t0, 8);
10827 number_to_chars_littleendian (fixpos + 8, t1, 8);
800eeca4
JW		 10828}
10829
10830/* Attempt to simplify or even eliminate a fixup. The return value is
10831 ignored; perhaps it was once meaningful, but now it is historical.
10832 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10833
10834 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
197865e8 10835 (if possible). */
94f592af
NC		 10836
10837void
10838md_apply_fix3 (fix, valP, seg)
800eeca4 10839 fixS *fix;
40449e9f 10840 valueT *valP;
2434f565 10841 segT seg ATTRIBUTE_UNUSED;
800eeca4
JW		 10842{
10843 char *fixpos;
40449e9f 10844 valueT value = *valP;
800eeca4
JW		 10845
10846 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
10847
10848 if (fix->fx_pcrel)
10849 {
10850 switch (fix->fx_r_type)
10851 {
10852 case BFD_RELOC_IA64_DIR32MSB:
10853 fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
800eeca4
JW		 10854 break;
10855
10856 case BFD_RELOC_IA64_DIR32LSB:
10857 fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
800eeca4
JW		 10858 break;
10859
10860 case BFD_RELOC_IA64_DIR64MSB:
10861 fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
800eeca4
JW		 10862 break;
10863
10864 case BFD_RELOC_IA64_DIR64LSB:
10865 fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
800eeca4
JW		 10866 break;
10867
10868 default:
10869 break;
10870 }
10871 }
10872 if (fix->fx_addsy)
10873 {
00f7efb6 10874 switch (fix->fx_r_type)
800eeca4 10875 {
00f7efb6 10876 case BFD_RELOC_UNUSED:
fa1cb89c
JW		 10877 /* This must be a TAG13 or TAG13b operand. There are no external
10878 relocs defined for them, so we must give an error. */
800eeca4
JW		 10879 as_bad_where (fix->fx_file, fix->fx_line,
10880 "%s must have a constant value",
10881 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
fa1cb89c 10882 fix->fx_done = 1;
94f592af 10883 return;
00f7efb6
JJ		 10884
10885 case BFD_RELOC_IA64_TPREL14:
10886 case BFD_RELOC_IA64_TPREL22:
10887 case BFD_RELOC_IA64_TPREL64I:
10888 case BFD_RELOC_IA64_LTOFF_TPREL22:
10889 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
10890 case BFD_RELOC_IA64_DTPREL14:
10891 case BFD_RELOC_IA64_DTPREL22:
10892 case BFD_RELOC_IA64_DTPREL64I:
10893 case BFD_RELOC_IA64_LTOFF_DTPREL22:
10894 S_SET_THREAD_LOCAL (fix->fx_addsy);
10895 break;
7925dd68
JJ		 10896
10897 default:
10898 break;
800eeca4 10899 }
800eeca4
JW		 10900 }
10901 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
10902 {
10903 if (fix->tc_fix_data.bigendian)
10904 number_to_chars_bigendian (fixpos, value, fix->fx_size);
10905 else
10906 number_to_chars_littleendian (fixpos, value, fix->fx_size);
10907 fix->fx_done = 1;
800eeca4
JW		 10908 }
10909 else
10910 {
10911 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
10912 fix->fx_done = 1;
800eeca4 10913 }
800eeca4
JW		 10914}
10915
10916/* Generate the BFD reloc to be stuck in the object file from the
10917 fixup used internally in the assembler. */
542d6675
KH		 10918
10919arelent *
800eeca4 10920tc_gen_reloc (sec, fixp)
2434f565 10921 asection *sec ATTRIBUTE_UNUSED;
800eeca4
JW		 10922 fixS *fixp;
10923{
10924 arelent *reloc;
10925
10926 reloc = xmalloc (sizeof (*reloc));
10927 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
10928 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
10929 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
10930 reloc->addend = fixp->fx_offset;
10931 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
10932
10933 if (!reloc->howto)
10934 {
10935 as_bad_where (fixp->fx_file, fixp->fx_line,
10936 "Cannot represent %s relocation in object file",
10937 bfd_get_reloc_code_name (fixp->fx_r_type));
10938 }
10939 return reloc;
10940}
10941
10942/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 10943 of type TYPE, and store the appropriate bytes in *LIT. The number
10944 of LITTLENUMS emitted is stored in *SIZE. An error message is
800eeca4
JW		 10945 returned, or NULL on OK. */
10946
10947#define MAX_LITTLENUMS 5
10948
542d6675 10949char *
800eeca4
JW		 10950md_atof (type, lit, size)
10951 int type;
10952 char *lit;
10953 int *size;
10954{
10955 LITTLENUM_TYPE words[MAX_LITTLENUMS];
800eeca4
JW		 10956 char *t;
10957 int prec;
10958
10959 switch (type)
10960 {
10961 /* IEEE floats */
10962 case 'f':
10963 case 'F':
10964 case 's':
10965 case 'S':
10966 prec = 2;
10967 break;
10968
10969 case 'd':
10970 case 'D':
10971 case 'r':
10972 case 'R':
10973 prec = 4;
10974 break;
10975
10976 case 'x':
10977 case 'X':
10978 case 'p':
10979 case 'P':
10980 prec = 5;
10981 break;
10982
10983 default:
10984 *size = 0;
10985 return "Bad call to MD_ATOF()";
10986 }
10987 t = atof_ieee (input_line_pointer, type, words);
10988 if (t)
10989 input_line_pointer = t;
800eeca4 10990
10a98291
L		 10991 (*ia64_float_to_chars) (lit, words, prec);
10992
165a7f90
L		 10993 if (type == 'X')
10994 {
10995 /* It is 10 byte floating point with 6 byte padding. */
10a98291 10996 memset (&lit [10], 0, 6);
165a7f90
L		 10997 *size = 8 * sizeof (LITTLENUM_TYPE);
10998 }
10a98291
L		 10999 else
11000 *size = prec * sizeof (LITTLENUM_TYPE);
11001
800eeca4
JW		 11002 return 0;
11003}
11004
800eeca4
JW		 11005/* Handle ia64 specific semantics of the align directive. */
11006
0a9ef439 11007void
800eeca4 11008ia64_md_do_align (n, fill, len, max)
91a2ae2a
RH		 11009 int n ATTRIBUTE_UNUSED;
11010 const char *fill ATTRIBUTE_UNUSED;
2434f565 11011 int len ATTRIBUTE_UNUSED;
91a2ae2a 11012 int max ATTRIBUTE_UNUSED;
800eeca4 11013{
0a9ef439 11014 if (subseg_text_p (now_seg))
800eeca4 11015 ia64_flush_insns ();
0a9ef439 11016}
800eeca4 11017
0a9ef439
RH		 11018/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11019 of an rs_align_code fragment. */
800eeca4 11020
0a9ef439
RH		 11021void
11022ia64_handle_align (fragp)
11023 fragS *fragp;
11024{
11025 /* Use mfi bundle of nops with no stop bits. */
0a9ef439
RH		 11026 static const unsigned char le_nop[]
11027 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11028 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
9545c4ce
L		 11029 static const unsigned char le_nop_stop[]
11030 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11031 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
0a9ef439
RH		 11032
11033 int bytes;
11034 char *p;
9545c4ce 11035 const unsigned char *nop;
0a9ef439
RH		 11036
11037 if (fragp->fr_type != rs_align_code)
11038 return;
11039
9545c4ce
L		 11040 /* Check if this frag has to end with a stop bit. */
11041 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11042
0a9ef439
RH		 11043 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11044 p = fragp->fr_literal + fragp->fr_fix;
11045
d9201763
L		 11046 /* If no paddings are needed, we check if we need a stop bit. */
11047 if (!bytes && fragp->tc_frag_data)
11048 {
11049 if (fragp->fr_fix < 16)
bae25f19
L		 11050#if 1
11051 /* FIXME: It won't work with
11052 .align 16
11053 alloc r32=ar.pfs,1,2,4,0
11054 */
11055 ;
11056#else
d9201763
L		 11057 as_bad_where (fragp->fr_file, fragp->fr_line,
11058 _("Can't add stop bit to mark end of instruction group"));
bae25f19 11059#endif
d9201763
L		 11060 else
11061 /* Bundles are always in little-endian byte order. Make sure
11062 the previous bundle has the stop bit. */
11063 *(p - 16) |= 1;
11064 }
11065
0a9ef439
RH		 11066 /* Make sure we are on a 16-byte boundary, in case someone has been
11067 putting data into a text section. */
11068 if (bytes & 15)
11069 {
11070 int fix = bytes & 15;
11071 memset (p, 0, fix);
11072 p += fix;
11073 bytes -= fix;
11074 fragp->fr_fix += fix;
800eeca4
JW		 11075 }
11076
012a452b 11077 /* Instruction bundles are always little-endian. */
9545c4ce 11078 memcpy (p, nop, 16);
0a9ef439 11079 fragp->fr_var = 16;
800eeca4 11080}
10a98291
L		 11081
11082static void
11083ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11084 int prec)
11085{
11086 while (prec--)
11087 {
11088 number_to_chars_bigendian (lit, (long) (*words++),
11089 sizeof (LITTLENUM_TYPE));
11090 lit += sizeof (LITTLENUM_TYPE);
11091 }
11092}
11093
11094static void
11095ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11096 int prec)
11097{
11098 while (prec--)
11099 {
11100 number_to_chars_littleendian (lit, (long) (words[prec]),
11101 sizeof (LITTLENUM_TYPE));
11102 lit += sizeof (LITTLENUM_TYPE);
11103 }
11104}
11105
11106void
11107ia64_elf_section_change_hook (void)
11108{
38ce5b11
L		 11109 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11110 && elf_linked_to_section (now_seg) == NULL)
11111 elf_linked_to_section (now_seg) = text_section;
10a98291
L		 11112 dot_byteorder (-1);
11113}
a645d1eb
L		 11114
11115/* Check if a label should be made global. */
11116void
11117ia64_check_label (symbolS *label)
11118{
11119 if (*input_line_pointer == ':')
11120 {
11121 S_SET_EXTERNAL (label);
11122 input_line_pointer++;
11123 }
11124}
35f5df7f
L		 11125
11126/* Used to remember where .alias and .secalias directives are seen. We
11127 will rename symbol and section names when we are about to output
11128 the relocatable file. */
11129struct alias
11130{
11131 char *file; /* The file where the directive is seen. */
11132 unsigned int line; /* The line number the directive is at. */
11133 const char *name; /* The orignale name of the symbol. */
11134};
11135
11136/* Called for .alias and .secalias directives. If SECTION is 1, it is
11137 .secalias. Otherwise, it is .alias. */
11138static void
11139dot_alias (int section)
11140{
11141 char *name, *alias;
11142 char delim;
11143 char *end_name;
11144 int len;
11145 const char *error_string;
11146 struct alias *h;
11147 const char *a;
11148 struct hash_control *ahash, *nhash;
11149 const char *kind;
11150
11151 name = input_line_pointer;
11152 delim = get_symbol_end ();
11153 end_name = input_line_pointer;
11154 *end_name = delim;
11155
11156 if (name == end_name)
11157 {
11158 as_bad (_("expected symbol name"));
11159 discard_rest_of_line ();
11160 return;
11161 }
11162
11163 SKIP_WHITESPACE ();
11164
11165 if (*input_line_pointer != ',')
11166 {
11167 *end_name = 0;
11168 as_bad (_("expected comma after \"%s\""), name);
11169 *end_name = delim;
11170 ignore_rest_of_line ();
11171 return;
11172 }
11173
11174 input_line_pointer++;
11175 *end_name = 0;
11176
11177 /* We call demand_copy_C_string to check if alias string is valid.
11178 There should be a closing `"' and no `\0' in the string. */
11179 alias = demand_copy_C_string (&len);
11180 if (alias == NULL)
11181 {
11182 ignore_rest_of_line ();
11183 return;
11184 }
11185
11186 /* Make a copy of name string. */
11187 len = strlen (name) + 1;
11188 obstack_grow (&notes, name, len);
11189 name = obstack_finish (&notes);
11190
11191 if (section)
11192 {
11193 kind = "section";
11194 ahash = secalias_hash;
11195 nhash = secalias_name_hash;
11196 }
11197 else
11198 {
11199 kind = "symbol";
11200 ahash = alias_hash;
11201 nhash = alias_name_hash;
11202 }
11203
11204 /* Check if alias has been used before. */
11205 h = (struct alias *) hash_find (ahash, alias);
11206 if (h)
11207 {
11208 if (strcmp (h->name, name))
11209 as_bad (_("`%s' is already the alias of %s `%s'"),
11210 alias, kind, h->name);
11211 goto out;
11212 }
11213
11214 /* Check if name already has an alias. */
11215 a = (const char *) hash_find (nhash, name);
11216 if (a)
11217 {
11218 if (strcmp (a, alias))
11219 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11220 goto out;
11221 }
11222
11223 h = (struct alias *) xmalloc (sizeof (struct alias));
11224 as_where (&h->file, &h->line);
11225 h->name = name;
11226
11227 error_string = hash_jam (ahash, alias, (PTR) h);
11228 if (error_string)
11229 {
11230 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11231 alias, kind, error_string);
11232 goto out;
11233 }
11234
11235 error_string = hash_jam (nhash, name, (PTR) alias);
11236 if (error_string)
11237 {
11238 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11239 alias, kind, error_string);
11240out:
11241 obstack_free (&notes, name);
11242 obstack_free (&notes, alias);
11243 }
11244
11245 demand_empty_rest_of_line ();
11246}
11247
11248/* It renames the original symbol name to its alias. */
11249static void
11250do_alias (const char *alias, PTR value)
11251{
11252 struct alias *h = (struct alias *) value;
11253 symbolS *sym = symbol_find (h->name);
11254
11255 if (sym == NULL)
11256 as_warn_where (h->file, h->line,
11257 _("symbol `%s' aliased to `%s' is not used"),
11258 h->name, alias);
11259 else
11260 S_SET_NAME (sym, (char *) alias);
11261}
11262
11263/* Called from write_object_file. */
11264void
11265ia64_adjust_symtab (void)
11266{
11267 hash_traverse (alias_hash, do_alias);
11268}
11269
11270/* It renames the original section name to its alias. */
11271static void
11272do_secalias (const char *alias, PTR value)
11273{
11274 struct alias *h = (struct alias *) value;
11275 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11276
11277 if (sec == NULL)
11278 as_warn_where (h->file, h->line,
11279 _("section `%s' aliased to `%s' is not used"),
11280 h->name, alias);
11281 else
11282 sec->name = alias;
11283}
11284
11285/* Called from write_object_file. */
11286void
11287ia64_frob_file (void)
11288{
11289 hash_traverse (secalias_hash, do_secalias);
11290}
GDB Binutils - Deliverables
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