Update year range in copyright notice of binutils files
[deliverable/binutils-gdb.git] / gas / config / tc-ns32k.c
CommitLineData
252b5132 1/* ns32k.c -- Assemble on the National Semiconductor 32k series
b3adc24a 2 Copyright (C) 1987-2020 Free Software Foundation, Inc.
252b5132
RH
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
ec2655a6 8 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19 02110-1301, USA. */
252b5132 20
c6a7ab1f 21/*#define SHOW_NUM 1*//* Uncomment for debugging. */
252b5132 22
252b5132
RH
23#include "as.h"
24#include "opcode/ns32k.h"
25
26#include "obstack.h"
27
c6a7ab1f
NC
28/* Macros. */
29#define IIF_ENTRIES 13 /* Number of entries in iif. */
30#define PRIVATE_SIZE 256 /* Size of my garbage memory. */
252b5132
RH
31#define MAX_ARGS 4
32#define DEFAULT -1 /* addr_mode returns this value when
33 plain constant or label is
c6a7ab1f 34 encountered. */
252b5132
RH
35
36#define IIF(ptr,a1,c1,e1,g1,i1,k1,m1,o1,q1,s1,u1) \
ea1562b3
NC
37 iif.iifP[ptr].type = a1; \
38 iif.iifP[ptr].size = c1; \
39 iif.iifP[ptr].object = e1; \
40 iif.iifP[ptr].object_adjust = g1; \
41 iif.iifP[ptr].pcrel = i1; \
42 iif.iifP[ptr].pcrel_adjust = k1; \
43 iif.iifP[ptr].im_disp = m1; \
44 iif.iifP[ptr].relax_substate = o1; \
45 iif.iifP[ptr].bit_fixP = q1; \
46 iif.iifP[ptr].addr_mode = s1; \
47 iif.iifP[ptr].bsr = u1;
252b5132
RH
48
49#ifdef SEQUENT_COMPATABILITY
50#define LINE_COMMENT_CHARS "|"
51#define ABSOLUTE_PREFIX '@'
52#define IMMEDIATE_PREFIX '#'
53#endif
54
55#ifndef LINE_COMMENT_CHARS
56#define LINE_COMMENT_CHARS "#"
57#endif
58
59const char comment_chars[] = "#";
60const char line_comment_chars[] = LINE_COMMENT_CHARS;
63a0b638 61const char line_separator_chars[] = ";";
4eb6b71c 62static int default_disp_size = 4; /* Displacement size for external refs. */
c6a7ab1f 63
252b5132 64#if !defined(ABSOLUTE_PREFIX) && !defined(IMMEDIATE_PREFIX)
4eb6b71c 65#define ABSOLUTE_PREFIX '@' /* One or the other MUST be defined. */
252b5132
RH
66#endif
67
68struct addr_mode
ea1562b3
NC
69{
70 signed char mode; /* Addressing mode of operand (0-31). */
71 signed char scaled_mode; /* Mode combined with scaled mode. */
72 char scaled_reg; /* Register used in scaled+1 (1-8). */
73 char float_flag; /* Set if R0..R7 was F0..F7 ie a
4eb6b71c 74 floating-point-register. */
ea1562b3 75 char am_size; /* Estimated max size of general addr-mode
4eb6b71c 76 parts. */
ea1562b3
NC
77 char im_disp; /* If im_disp==1 we have a displacement. */
78 char pcrel; /* 1 if pcrel, this is really redundant info. */
79 char disp_suffix[2]; /* Length of displacement(s), 0=undefined. */
80 char *disp[2]; /* Pointer(s) at displacement(s)
4eb6b71c 81 or immediates(s) (ascii). */
ea1562b3
NC
82 char index_byte; /* Index byte. */
83};
252b5132
RH
84typedef struct addr_mode addr_modeS;
85
c6a7ab1f 86char *freeptr, *freeptr_static; /* Points at some number of free bytes. */
252b5132
RH
87struct hash_control *inst_hash_handle;
88
c6a7ab1f 89struct ns32k_opcode *desc; /* Pointer at description of instruction. */
252b5132
RH
90addr_modeS addr_modeP;
91const char EXP_CHARS[] = "eE";
c6a7ab1f
NC
92const char FLT_CHARS[] = "fd"; /* We don't want to support lowercase,
93 do we? */
252b5132
RH
94
95/* UPPERCASE denotes live names when an instruction is built, IIF is
4eb6b71c
NC
96 used as an intermediate form to store the actual parts of the
97 instruction. A ns32k machine instruction can be divided into a
98 couple of sub PARTs. When an instruction is assembled the
99 appropriate PART get an assignment. When an IIF has been completed
100 it is converted to a FRAGment as specified in AS.H. */
252b5132 101
c6a7ab1f 102/* Internal structs. */
252b5132 103struct ns32k_option
c6a7ab1f 104{
e0471c16 105 const char *pattern;
c6a7ab1f
NC
106 unsigned long or;
107 unsigned long and;
108};
252b5132
RH
109
110typedef struct
ea1562b3
NC
111{
112 int type; /* How to interpret object. */
113 int size; /* Estimated max size of object. */
114 unsigned long object; /* Binary data. */
115 int object_adjust; /* Number added to object. */
116 int pcrel; /* True if object is pcrel. */
117 int pcrel_adjust; /* Length in bytes from the instruction
4eb6b71c 118 start to the displacement. */
ea1562b3
NC
119 int im_disp; /* True if the object is a displacement. */
120 relax_substateT relax_substate;/*Initial relaxsubstate. */
121 bit_fixS *bit_fixP; /* Pointer at bit_fix struct. */
122 int addr_mode; /* What addrmode do we associate with this
4eb6b71c 123 iif-entry. */
ea1562b3
NC
124 char bsr; /* Sequent hack. */
125} iif_entryT; /* Internal Instruction Format. */
252b5132
RH
126
127struct int_ins_form
ea1562b3
NC
128{
129 int instr_size; /* Max size of instruction in bytes. */
130 iif_entryT iifP[IIF_ENTRIES + 1];
131};
c6a7ab1f 132
252b5132
RH
133struct int_ins_form iif;
134expressionS exprP;
c6a7ab1f
NC
135
136/* Description of the PARTs in IIF
137 object[n]:
138 0 total length in bytes of entries in iif
139 1 opcode
140 2 index_byte_a
141 3 index_byte_b
142 4 disp_a_1
143 5 disp_a_2
144 6 disp_b_1
145 7 disp_b_2
146 8 imm_a
147 9 imm_b
148 10 implied1
149 11 implied2
0b7410c4 150
33eaf5de
NC
151 For every entry there is a data length in bytes. This is stored in size[n].
152 0, the object length is not explicitly given by the instruction
c6a7ab1f
NC
153 and the operand is undefined. This is a case for relaxation.
154 Reserve 4 bytes for the final object.
0b7410c4 155
c6a7ab1f
NC
156 1, the entry contains one byte
157 2, the entry contains two bytes
158 3, the entry contains three bytes
159 4, the entry contains four bytes
160 etc
0b7410c4 161
c6a7ab1f 162 Furthermore, every entry has a data type identifier in type[n].
0b7410c4 163
c6a7ab1f
NC
164 0, the entry is void, ignore it.
165 1, the entry is a binary number.
166 2, the entry is a pointer at an expression.
167 Where expression may be as simple as a single '1',
168 and as complicated as foo-bar+12,
169 foo and bar may be undefined but suffixed by :{b|w|d} to
170 control the length of the object.
0b7410c4 171
c6a7ab1f 172 3, the entry is a pointer at a bignum struct
0b7410c4 173
67c1ffbe 174 The low-order-byte corresponds to low physical memory.
c6a7ab1f 175 Obviously a FRAGment must be created for each valid disp in PART whose
33eaf5de 176 data length is undefined (to bad) .
c6a7ab1f 177 The case where just the expression is undefined is less severe and is
33eaf5de 178 handled by fix. Here the number of bytes in the object file is known.
c6a7ab1f
NC
179 With this representation we simplify the assembly and separates the
180 machine dependent/independent parts in a more clean way (said OE). */
252b5132 181\f
4eb6b71c 182struct ns32k_option opt1[] = /* restore, exit. */
252b5132
RH
183{
184 {"r0", 0x80, 0xff},
185 {"r1", 0x40, 0xff},
186 {"r2", 0x20, 0xff},
187 {"r3", 0x10, 0xff},
188 {"r4", 0x08, 0xff},
189 {"r5", 0x04, 0xff},
190 {"r6", 0x02, 0xff},
191 {"r7", 0x01, 0xff},
192 {0, 0x00, 0xff}
193};
4eb6b71c 194struct ns32k_option opt2[] = /* save, enter. */
252b5132
RH
195{
196 {"r0", 0x01, 0xff},
197 {"r1", 0x02, 0xff},
198 {"r2", 0x04, 0xff},
199 {"r3", 0x08, 0xff},
200 {"r4", 0x10, 0xff},
201 {"r5", 0x20, 0xff},
202 {"r6", 0x40, 0xff},
203 {"r7", 0x80, 0xff},
204 {0, 0x00, 0xff}
205};
4eb6b71c 206struct ns32k_option opt3[] = /* setcfg. */
252b5132
RH
207{
208 {"c", 0x8, 0xff},
209 {"m", 0x4, 0xff},
210 {"f", 0x2, 0xff},
211 {"i", 0x1, 0xff},
212 {0, 0x0, 0xff}
213};
4eb6b71c 214struct ns32k_option opt4[] = /* cinv. */
252b5132
RH
215{
216 {"a", 0x4, 0xff},
217 {"i", 0x2, 0xff},
218 {"d", 0x1, 0xff},
219 {0, 0x0, 0xff}
220};
4eb6b71c 221struct ns32k_option opt5[] = /* String inst. */
252b5132
RH
222{
223 {"b", 0x2, 0xff},
224 {"u", 0xc, 0xff},
225 {"w", 0x4, 0xff},
226 {0, 0x0, 0xff}
227};
4eb6b71c 228struct ns32k_option opt6[] = /* Plain reg ext,cvtp etc. */
252b5132
RH
229{
230 {"r0", 0x00, 0xff},
231 {"r1", 0x01, 0xff},
232 {"r2", 0x02, 0xff},
233 {"r3", 0x03, 0xff},
234 {"r4", 0x04, 0xff},
235 {"r5", 0x05, 0xff},
236 {"r6", 0x06, 0xff},
237 {"r7", 0x07, 0xff},
238 {0, 0x00, 0xff}
239};
240
241#if !defined(NS32032) && !defined(NS32532)
242#define NS32532
243#endif
244
4eb6b71c 245struct ns32k_option cpureg_532[] = /* lpr spr. */
252b5132
RH
246{
247 {"us", 0x0, 0xff},
248 {"dcr", 0x1, 0xff},
249 {"bpc", 0x2, 0xff},
250 {"dsr", 0x3, 0xff},
251 {"car", 0x4, 0xff},
252 {"fp", 0x8, 0xff},
253 {"sp", 0x9, 0xff},
254 {"sb", 0xa, 0xff},
255 {"usp", 0xb, 0xff},
256 {"cfg", 0xc, 0xff},
257 {"psr", 0xd, 0xff},
258 {"intbase", 0xe, 0xff},
259 {"mod", 0xf, 0xff},
260 {0, 0x00, 0xff}
261};
4eb6b71c 262struct ns32k_option mmureg_532[] = /* lmr smr. */
252b5132
RH
263{
264 {"mcr", 0x9, 0xff},
265 {"msr", 0xa, 0xff},
266 {"tear", 0xb, 0xff},
267 {"ptb0", 0xc, 0xff},
268 {"ptb1", 0xd, 0xff},
269 {"ivar0", 0xe, 0xff},
270 {"ivar1", 0xf, 0xff},
271 {0, 0x0, 0xff}
272};
273
4eb6b71c 274struct ns32k_option cpureg_032[] = /* lpr spr. */
252b5132
RH
275{
276 {"upsr", 0x0, 0xff},
277 {"fp", 0x8, 0xff},
278 {"sp", 0x9, 0xff},
279 {"sb", 0xa, 0xff},
280 {"psr", 0xd, 0xff},
281 {"intbase", 0xe, 0xff},
282 {"mod", 0xf, 0xff},
283 {0, 0x0, 0xff}
284};
4eb6b71c 285struct ns32k_option mmureg_032[] = /* lmr smr. */
252b5132
RH
286{
287 {"bpr0", 0x0, 0xff},
288 {"bpr1", 0x1, 0xff},
289 {"pf0", 0x4, 0xff},
290 {"pf1", 0x5, 0xff},
291 {"sc", 0x8, 0xff},
292 {"msr", 0xa, 0xff},
293 {"bcnt", 0xb, 0xff},
294 {"ptb0", 0xc, 0xff},
295 {"ptb1", 0xd, 0xff},
296 {"eia", 0xf, 0xff},
297 {0, 0x0, 0xff}
298};
299
300#if defined(NS32532)
301struct ns32k_option *cpureg = cpureg_532;
302struct ns32k_option *mmureg = mmureg_532;
303#else
304struct ns32k_option *cpureg = cpureg_032;
305struct ns32k_option *mmureg = mmureg_032;
306#endif
307\f
308
309const pseudo_typeS md_pseudo_table[] =
c6a7ab1f 310{ /* So far empty. */
252b5132
RH
311 {0, 0, 0}
312};
313
314#define IND(x,y) (((x)<<2)+(y))
315
c6a7ab1f 316/* Those are index's to relax groups in md_relax_table ie it must be
252b5132 317 multiplied by 4 to point at a group start. Viz IND(x,y) Se function
c6a7ab1f 318 relax_segment in write.c for more info. */
252b5132
RH
319
320#define BRANCH 1
321#define PCREL 2
322
c6a7ab1f 323/* Those are index's to entries in a relax group. */
252b5132
RH
324
325#define BYTE 0
326#define WORD 1
327#define DOUBLE 2
328#define UNDEF 3
329/* Those limits are calculated from the displacement start in memory.
67c1ffbe 330 The ns32k uses the beginning of the instruction as displacement
252b5132
RH
331 base. This type of displacements could be handled here by moving
332 the limit window up or down. I choose to use an internal
333 displacement base-adjust as there are other routines that must
334 consider this. Also, as we have two various offset-adjusts in the
335 ns32k (acb versus br/brs/jsr/bcond), two set of limits would have
2b0f3761 336 had to be used. Now we don't have to think about that. */
252b5132
RH
337
338const relax_typeS md_relax_table[] =
339{
340 {1, 1, 0, 0},
341 {1, 1, 0, 0},
342 {1, 1, 0, 0},
343 {1, 1, 0, 0},
344
345 {(63), (-64), 1, IND (BRANCH, WORD)},
346 {(8192), (-8192), 2, IND (BRANCH, DOUBLE)},
347 {0, 0, 4, 0},
348 {1, 1, 0, 0}
349};
350
351/* Array used to test if mode contains displacements.
c6a7ab1f 352 Value is true if mode contains displacement. */
252b5132
RH
353
354char disp_test[] =
355{0, 0, 0, 0, 0, 0, 0, 0,
356 1, 1, 1, 1, 1, 1, 1, 1,
357 1, 1, 1, 0, 0, 1, 1, 0,
358 1, 1, 1, 1, 1, 1, 1, 1};
359
c6a7ab1f 360/* Array used to calculate max size of displacements. */
252b5132
RH
361
362char disp_size[] =
363{4, 1, 2, 0, 4};
364\f
33eaf5de 365/* Parse a general operand into an addressing mode struct
c6a7ab1f
NC
366
367 In: pointer at operand in ascii form
368 pointer at addr_mode struct for result
369 the level of recursion. (always 0 or 1)
252b5132 370
c6a7ab1f 371 Out: data in addr_mode struct. */
252b5132 372
4eb6b71c 373static int
ea1562b3 374addr_mode (char *operand,
91d6fa6a 375 addr_modeS *addrmodeP,
ea1562b3 376 int recursive_level)
252b5132 377{
4eb6b71c
NC
378 char *str;
379 int i;
380 int strl;
381 int mode;
252b5132 382 int j;
0b7410c4 383
4eb6b71c 384 mode = DEFAULT; /* Default. */
91d6fa6a
NC
385 addrmodeP->scaled_mode = 0; /* Why not. */
386 addrmodeP->scaled_reg = 0; /* If 0, not scaled index. */
387 addrmodeP->float_flag = 0;
388 addrmodeP->am_size = 0;
389 addrmodeP->im_disp = 0;
390 addrmodeP->pcrel = 0; /* Not set in this function. */
391 addrmodeP->disp_suffix[0] = 0;
392 addrmodeP->disp_suffix[1] = 0;
393 addrmodeP->disp[0] = NULL;
394 addrmodeP->disp[1] = NULL;
252b5132 395 str = operand;
0b7410c4 396
252b5132 397 if (str[0] == 0)
c6a7ab1f
NC
398 return 0;
399
252b5132 400 strl = strlen (str);
0b7410c4 401
252b5132
RH
402 switch (str[0])
403 {
c6a7ab1f
NC
404 /* The following three case statements controls the mode-chars
405 this is the place to ed if you want to change them. */
252b5132
RH
406#ifdef ABSOLUTE_PREFIX
407 case ABSOLUTE_PREFIX:
408 if (str[strl - 1] == ']')
409 break;
91d6fa6a
NC
410 addrmodeP->mode = 21; /* absolute */
411 addrmodeP->disp[0] = str + 1;
c6a7ab1f 412 return -1;
252b5132
RH
413#endif
414#ifdef IMMEDIATE_PREFIX
415 case IMMEDIATE_PREFIX:
416 if (str[strl - 1] == ']')
417 break;
91d6fa6a
NC
418 addrmodeP->mode = 20; /* immediate */
419 addrmodeP->disp[0] = str + 1;
c6a7ab1f 420 return -1;
252b5132
RH
421#endif
422 case '.':
423 if (str[strl - 1] != ']')
424 {
425 switch (str[1])
426 {
427 case '-':
428 case '+':
429 if (str[2] != '\000')
430 {
91d6fa6a
NC
431 addrmodeP->mode = 27; /* pc-relative */
432 addrmodeP->disp[0] = str + 2;
c6a7ab1f 433 return -1;
252b5132 434 }
1a0670f3 435 /* Fall through. */
252b5132 436 default:
4eb6b71c 437 as_bad (_("Invalid syntax in PC-relative addressing mode"));
c6a7ab1f 438 return 0;
252b5132
RH
439 }
440 }
441 break;
442 case 'e':
443 if (str[strl - 1] != ']')
444 {
445 if ((!strncmp (str, "ext(", 4)) && strl > 7)
446 { /* external */
91d6fa6a 447 addrmodeP->disp[0] = str + 4;
252b5132
RH
448 i = 0;
449 j = 2;
450 do
4eb6b71c 451 { /* disp[0]'s termination point. */
252b5132
RH
452 j += 1;
453 if (str[j] == '(')
454 i++;
455 if (str[j] == ')')
456 i--;
457 }
458 while (j < strl && i != 0);
459 if (i != 0 || !(str[j + 1] == '-' || str[j + 1] == '+'))
460 {
4eb6b71c 461 as_bad (_("Invalid syntax in External addressing mode"));
252b5132
RH
462 return (0);
463 }
464 str[j] = '\000'; /* null terminate disp[0] */
91d6fa6a
NC
465 addrmodeP->disp[1] = str + j + 2;
466 addrmodeP->mode = 22;
c6a7ab1f 467 return -1;
252b5132
RH
468 }
469 }
470 break;
0b7410c4 471
c6a7ab1f
NC
472 default:
473 ;
252b5132 474 }
0b7410c4 475
252b5132 476 strl = strlen (str);
0b7410c4 477
252b5132
RH
478 switch (strl)
479 {
480 case 2:
481 switch (str[0])
482 {
483 case 'f':
91d6fa6a 484 addrmodeP->float_flag = 1;
1a0670f3 485 /* Fall through. */
252b5132
RH
486 case 'r':
487 if (str[1] >= '0' && str[1] < '8')
488 {
91d6fa6a 489 addrmodeP->mode = str[1] - '0';
c6a7ab1f 490 return -1;
252b5132 491 }
c6a7ab1f
NC
492 break;
493 default:
494 break;
252b5132 495 }
f03fb292 496 /* Fall through. */
0b7410c4 497
252b5132
RH
498 case 3:
499 if (!strncmp (str, "tos", 3))
500 {
91d6fa6a 501 addrmodeP->mode = 23; /* TopOfStack */
c6a7ab1f 502 return -1;
252b5132 503 }
c6a7ab1f 504 break;
0b7410c4 505
c6a7ab1f
NC
506 default:
507 break;
252b5132 508 }
0b7410c4 509
252b5132
RH
510 if (strl > 4)
511 {
512 if (str[strl - 1] == ')')
513 {
514 if (str[strl - 2] == ')')
515 {
516 if (!strncmp (&str[strl - 5], "(fp", 3))
c6a7ab1f
NC
517 mode = 16; /* Memory Relative. */
518 else if (!strncmp (&str[strl - 5], "(sp", 3))
519 mode = 17;
520 else if (!strncmp (&str[strl - 5], "(sb", 3))
521 mode = 18;
522
252b5132 523 if (mode != DEFAULT)
4eb6b71c
NC
524 {
525 /* Memory relative. */
91d6fa6a 526 addrmodeP->mode = mode;
c6a7ab1f 527 j = strl - 5; /* Temp for end of disp[0]. */
252b5132 528 i = 0;
0b7410c4 529
252b5132
RH
530 do
531 {
532 strl -= 1;
533 if (str[strl] == ')')
534 i++;
535 if (str[strl] == '(')
536 i--;
537 }
538 while (strl > -1 && i != 0);
0b7410c4 539
252b5132
RH
540 if (i != 0)
541 {
4eb6b71c 542 as_bad (_("Invalid syntax in Memory Relative addressing mode"));
252b5132
RH
543 return (0);
544 }
0b7410c4 545
91d6fa6a
NC
546 addrmodeP->disp[1] = str;
547 addrmodeP->disp[0] = str + strl + 1;
0b7410c4 548 str[j] = '\000'; /* Null terminate disp[0] . */
c6a7ab1f 549 str[strl] = '\000'; /* Null terminate disp[1]. */
0b7410c4 550
c6a7ab1f 551 return -1;
252b5132
RH
552 }
553 }
0b7410c4 554
252b5132
RH
555 switch (str[strl - 3])
556 {
557 case 'r':
558 case 'R':
559 if (str[strl - 2] >= '0'
560 && str[strl - 2] < '8'
561 && str[strl - 4] == '(')
562 {
91d6fa6a
NC
563 addrmodeP->mode = str[strl - 2] - '0' + 8;
564 addrmodeP->disp[0] = str;
252b5132 565 str[strl - 4] = 0;
c6a7ab1f 566 return -1; /* reg rel */
252b5132 567 }
1a0670f3 568 /* Fall through. */
0b7410c4 569
252b5132
RH
570 default:
571 if (!strncmp (&str[strl - 4], "(fp", 3))
c6a7ab1f
NC
572 mode = 24;
573 else if (!strncmp (&str[strl - 4], "(sp", 3))
574 mode = 25;
575 else if (!strncmp (&str[strl - 4], "(sb", 3))
576 mode = 26;
577 else if (!strncmp (&str[strl - 4], "(pc", 3))
578 mode = 27;
0b7410c4 579
252b5132
RH
580 if (mode != DEFAULT)
581 {
91d6fa6a
NC
582 addrmodeP->mode = mode;
583 addrmodeP->disp[0] = str;
252b5132 584 str[strl - 4] = '\0';
0b7410c4 585
c6a7ab1f 586 return -1; /* Memory space. */
252b5132
RH
587 }
588 }
589 }
0b7410c4 590
c6a7ab1f 591 /* No trailing ')' do we have a ']' ? */
252b5132
RH
592 if (str[strl - 1] == ']')
593 {
594 switch (str[strl - 2])
595 {
596 case 'b':
597 mode = 28;
598 break;
599 case 'w':
600 mode = 29;
601 break;
602 case 'd':
603 mode = 30;
604 break;
605 case 'q':
606 mode = 31;
607 break;
c6a7ab1f 608 default:
4eb6b71c 609 as_bad (_("Invalid scaled-indexed mode, use (b,w,d,q)"));
0b7410c4 610
252b5132
RH
611 if (str[strl - 3] != ':' || str[strl - 6] != '['
612 || str[strl - 5] == 'r' || str[strl - 4] < '0'
613 || str[strl - 4] > '7')
4eb6b71c 614 as_bad (_("Syntax in scaled-indexed mode, use [Rn:m] where n=[0..7] m={b,w,d,q}"));
c6a7ab1f
NC
615 } /* Scaled index. */
616
617 if (recursive_level > 0)
618 {
4eb6b71c 619 as_bad (_("Scaled-indexed addressing mode combined with scaled-index"));
c6a7ab1f
NC
620 return 0;
621 }
0b7410c4 622
91d6fa6a 623 addrmodeP->am_size += 1; /* scaled index byte. */
4eb6b71c 624 j = str[strl - 4] - '0'; /* store temporary. */
33eaf5de 625 str[strl - 6] = '\000'; /* null terminate for recursive call. */
91d6fa6a 626 i = addr_mode (str, addrmodeP, 1);
0b7410c4 627
91d6fa6a 628 if (!i || addrmodeP->mode == 20)
c6a7ab1f 629 {
4eb6b71c 630 as_bad (_("Invalid or illegal addressing mode combined with scaled-index"));
c6a7ab1f
NC
631 return 0;
632 }
0b7410c4 633
91d6fa6a
NC
634 addrmodeP->scaled_mode = addrmodeP->mode; /* Store the inferior mode. */
635 addrmodeP->mode = mode;
636 addrmodeP->scaled_reg = j + 1;
0b7410c4 637
c6a7ab1f 638 return -1;
252b5132
RH
639 }
640 }
0b7410c4 641
91d6fa6a
NC
642 addrmodeP->mode = DEFAULT; /* Default to whatever. */
643 addrmodeP->disp[0] = str;
0b7410c4 644
c6a7ab1f 645 return -1;
252b5132
RH
646}
647\f
ea1562b3
NC
648static void
649evaluate_expr (expressionS *resultP, char *ptr)
650{
651 char *tmp_line;
652
653 tmp_line = input_line_pointer;
654 input_line_pointer = ptr;
655 expression (resultP);
656 input_line_pointer = tmp_line;
657}
658
252b5132
RH
659/* ptr points at string addr_modeP points at struct with result This
660 routine calls addr_mode to determine the general addr.mode of the
661 operand. When this is ready it parses the displacements for size
662 specifying suffixes and determines size of immediate mode via
663 ns32k-opcode. Also builds index bytes if needed. */
c6a7ab1f 664
4eb6b71c 665static int
91d6fa6a 666get_addr_mode (char *ptr, addr_modeS *addrmodeP)
252b5132
RH
667{
668 int tmp;
0b7410c4 669
91d6fa6a 670 addr_mode (ptr, addrmodeP, 0);
0b7410c4 671
91d6fa6a 672 if (addrmodeP->mode == DEFAULT || addrmodeP->scaled_mode == -1)
252b5132 673 {
67c1ffbe 674 /* Resolve ambiguous operands, this shouldn't be necessary if
252b5132 675 one uses standard NSC operand syntax. But the sequent
67c1ffbe 676 compiler doesn't!!! This finds a proper addressing mode
c6a7ab1f
NC
677 if it is implicitly stated. See ns32k-opcode.h. */
678 (void) evaluate_expr (&exprP, ptr); /* This call takes time Sigh! */
0b7410c4 679
91d6fa6a 680 if (addrmodeP->mode == DEFAULT)
252b5132
RH
681 {
682 if (exprP.X_add_symbol || exprP.X_op_symbol)
91d6fa6a 683 addrmodeP->mode = desc->default_model; /* We have a label. */
252b5132 684 else
91d6fa6a 685 addrmodeP->mode = desc->default_modec; /* We have a constant. */
252b5132
RH
686 }
687 else
688 {
689 if (exprP.X_add_symbol || exprP.X_op_symbol)
91d6fa6a 690 addrmodeP->scaled_mode = desc->default_model;
252b5132 691 else
91d6fa6a 692 addrmodeP->scaled_mode = desc->default_modec;
252b5132 693 }
0b7410c4 694
c6a7ab1f
NC
695 /* Must put this mess down in addr_mode to handle the scaled
696 case better. */
252b5132 697 }
0b7410c4 698
252b5132
RH
699 /* It appears as the sequent compiler wants an absolute when we have
700 a label without @. Constants becomes immediates besides the addr
701 case. Think it does so with local labels too, not optimum, pcrel
702 is better. When I have time I will make gas check this and
703 select pcrel when possible Actually that is trivial. */
91d6fa6a 704 if ((tmp = addrmodeP->scaled_reg))
c6a7ab1f
NC
705 { /* Build indexbyte. */
706 tmp--; /* Remember regnumber comes incremented for
33eaf5de 707 flag purpose. */
91d6fa6a
NC
708 tmp |= addrmodeP->scaled_mode << 3;
709 addrmodeP->index_byte = (char) tmp;
710 addrmodeP->am_size += 1;
252b5132 711 }
0b7410c4 712
3739860c 713 gas_assert (addrmodeP->mode >= 0);
91d6fa6a 714 if (disp_test[(unsigned int) addrmodeP->mode])
c6a7ab1f 715 {
4eb6b71c
NC
716 char c;
717 char suffix;
718 char suffix_sub;
719 int i;
720 char *toP;
721 char *fromP;
c6a7ab1f
NC
722
723 /* There was a displacement, probe for length specifying suffix. */
91d6fa6a 724 addrmodeP->pcrel = 0;
0b7410c4 725
91d6fa6a
NC
726 gas_assert (addrmodeP->mode >= 0);
727 if (disp_test[(unsigned int) addrmodeP->mode])
c6a7ab1f
NC
728 {
729 /* There is a displacement. */
91d6fa6a 730 if (addrmodeP->mode == 27 || addrmodeP->scaled_mode == 27)
c6a7ab1f 731 /* Do we have pcrel. mode. */
91d6fa6a 732 addrmodeP->pcrel = 1;
0b7410c4 733
91d6fa6a 734 addrmodeP->im_disp = 1;
0b7410c4 735
c6a7ab1f
NC
736 for (i = 0; i < 2; i++)
737 {
738 suffix_sub = suffix = 0;
0b7410c4 739
91d6fa6a 740 if ((toP = addrmodeP->disp[i]))
c6a7ab1f
NC
741 {
742 /* Suffix of expression, the largest size rules. */
743 fromP = toP;
0b7410c4 744
4eb6b71c 745 while ((c = *fromP++))
c6a7ab1f
NC
746 {
747 *toP++ = c;
748 if (c == ':')
749 {
750 switch (*fromP)
751 {
752 case '\0':
753 as_warn (_("Premature end of suffix -- Defaulting to d"));
754 suffix = 4;
755 continue;
756 case 'b':
757 suffix_sub = 1;
758 break;
759 case 'w':
760 suffix_sub = 2;
761 break;
762 case 'd':
763 suffix_sub = 4;
764 break;
765 default:
766 as_warn (_("Bad suffix after ':' use {b|w|d} Defaulting to d"));
767 suffix = 4;
768 }
0b7410c4 769
c6a7ab1f
NC
770 fromP ++;
771 toP --; /* So we write over the ':' */
0b7410c4 772
c6a7ab1f
NC
773 if (suffix < suffix_sub)
774 suffix = suffix_sub;
775 }
776 }
0b7410c4 777
c6a7ab1f 778 *toP = '\0'; /* Terminate properly. */
91d6fa6a
NC
779 addrmodeP->disp_suffix[i] = suffix;
780 addrmodeP->am_size += suffix ? suffix : 4;
c6a7ab1f
NC
781 }
782 }
783 }
252b5132
RH
784 }
785 else
786 {
91d6fa6a 787 if (addrmodeP->mode == 20)
c6a7ab1f
NC
788 {
789 /* Look in ns32k_opcode for size. */
91d6fa6a
NC
790 addrmodeP->disp_suffix[0] = addrmodeP->am_size = desc->im_size;
791 addrmodeP->im_disp = 0;
252b5132
RH
792 }
793 }
0b7410c4 794
91d6fa6a 795 return addrmodeP->mode;
252b5132
RH
796}
797
33eaf5de 798/* Read an option list. */
252b5132 799
4eb6b71c 800static void
ea1562b3
NC
801optlist (char *str, /* The string to extract options from. */
802 struct ns32k_option *optionP, /* How to search the string. */
803 unsigned long *default_map) /* Default pattern and output. */
252b5132 804{
4eb6b71c 805 int i, j, k, strlen1, strlen2;
e0471c16 806 const char *patternP, *strP;
0b7410c4 807
252b5132 808 strlen1 = strlen (str);
0b7410c4 809
252b5132 810 if (strlen1 < 1)
c6a7ab1f 811 as_fatal (_("Very short instr to option, ie you can't do it on a NULLstr"));
0b7410c4 812
252b5132
RH
813 for (i = 0; optionP[i].pattern != 0; i++)
814 {
815 strlen2 = strlen (optionP[i].pattern);
0b7410c4 816
252b5132
RH
817 for (j = 0; j < strlen1; j++)
818 {
819 patternP = optionP[i].pattern;
820 strP = &str[j];
0b7410c4 821
252b5132
RH
822 for (k = 0; k < strlen2; k++)
823 {
824 if (*(strP++) != *(patternP++))
825 break;
826 }
0b7410c4 827
252b5132
RH
828 if (k == strlen2)
829 { /* match */
830 *default_map |= optionP[i].or;
831 *default_map &= optionP[i].and;
832 }
833 }
834 }
835}
836
c6a7ab1f 837/* Search struct for symbols.
252b5132
RH
838 This function is used to get the short integer form of reg names in
839 the instructions lmr, smr, lpr, spr return true if str is found in
c6a7ab1f 840 list. */
252b5132 841
4eb6b71c 842static int
ea1562b3
NC
843list_search (char *str, /* The string to match. */
844 struct ns32k_option *optionP, /* List to search. */
845 unsigned long *default_map) /* Default pattern and output. */
252b5132 846{
4eb6b71c 847 int i;
0b7410c4 848
252b5132
RH
849 for (i = 0; optionP[i].pattern != 0; i++)
850 {
851 if (!strncmp (optionP[i].pattern, str, 20))
c6a7ab1f
NC
852 {
853 /* Use strncmp to be safe. */
252b5132
RH
854 *default_map |= optionP[i].or;
855 *default_map &= optionP[i].and;
0b7410c4 856
252b5132
RH
857 return -1;
858 }
859 }
0b7410c4 860
4eb6b71c 861 as_bad (_("No such entry in list. (cpu/mmu register)"));
252b5132
RH
862 return 0;
863}
ea1562b3
NC
864\f
865/* Create a bit_fixS in obstack 'notes'.
866 This struct is used to profile the normal fix. If the bit_fixP is a
867 valid pointer (not NULL) the bit_fix data will be used to format
868 the fix. */
252b5132 869
ea1562b3
NC
870static bit_fixS *
871bit_fix_new (int size, /* Length of bitfield. */
872 int offset, /* Bit offset to bitfield. */
873 long min, /* Signextended min for bitfield. */
874 long max, /* Signextended max for bitfield. */
875 long add, /* Add mask, used for huffman prefix. */
876 long base_type, /* 0 or 1, if 1 it's exploded to opcode ptr. */
877 long base_adj)
252b5132 878{
ea1562b3 879 bit_fixS *bit_fixP;
252b5132 880
5e429f4c 881 bit_fixP = XOBNEW (&notes, bit_fixS);
ea1562b3
NC
882
883 bit_fixP->fx_bit_size = size;
884 bit_fixP->fx_bit_offset = offset;
885 bit_fixP->fx_bit_base = base_type;
886 bit_fixP->fx_bit_base_adj = base_adj;
887 bit_fixP->fx_bit_max = max;
888 bit_fixP->fx_bit_min = min;
889 bit_fixP->fx_bit_add = add;
890
891 return bit_fixP;
252b5132 892}
ea1562b3 893
252b5132
RH
894/* Convert operands to iif-format and adds bitfields to the opcode.
895 Operands are parsed in such an order that the opcode is updated from
896 its most significant bit, that is when the operand need to alter the
897 opcode.
67c1ffbe 898 Be careful not to put to objects in the same iif-slot. */
252b5132 899
4eb6b71c 900static void
ea1562b3
NC
901encode_operand (int argc,
902 char **argv,
903 const char *operandsP,
904 const char *suffixP,
905 char im_size ATTRIBUTE_UNUSED,
906 char opcode_bit_ptr)
252b5132 907{
4eb6b71c 908 int i, j;
252b5132 909 char d;
4eb6b71c
NC
910 int pcrel, b, loop, pcrel_adjust;
911 unsigned long tmp;
0b7410c4 912
252b5132
RH
913 for (loop = 0; loop < argc; loop++)
914 {
c6a7ab1f
NC
915 /* What operand are we supposed to work on. */
916 i = operandsP[loop << 1] - '1';
252b5132
RH
917 if (i > 3)
918 as_fatal (_("Internal consistency error. check ns32k-opcode.h"));
0b7410c4 919
252b5132
RH
920 pcrel = 0;
921 pcrel_adjust = 0;
922 tmp = 0;
0b7410c4 923
252b5132
RH
924 switch ((d = operandsP[(loop << 1) + 1]))
925 {
4eb6b71c 926 case 'f': /* Operand of sfsr turns out to be a nasty
33eaf5de 927 special-case. */
252b5132 928 opcode_bit_ptr -= 5;
1a0670f3 929 /* Fall through. */
4eb6b71c
NC
930 case 'Z': /* Float not immediate. */
931 case 'F': /* 32 bit float general form. */
932 case 'L': /* 64 bit float. */
933 case 'I': /* Integer not immediate. */
934 case 'B': /* Byte */
935 case 'W': /* Word */
936 case 'D': /* Double-word. */
937 case 'A': /* Double-word gen-address-form ie no regs
938 allowed. */
252b5132 939 get_addr_mode (argv[i], &addr_modeP);
0b7410c4 940
c6a7ab1f
NC
941 if ((addr_modeP.mode == 20) &&
942 (d == 'I' || d == 'Z' || d == 'A'))
943 as_fatal (d == 'A'? _("Address of immediate operand"):
944 _("Invalid immediate write operand."));
252b5132
RH
945
946 if (opcode_bit_ptr == desc->opcode_size)
947 b = 4;
948 else
949 b = 6;
0b7410c4 950
252b5132
RH
951 for (j = b; j < (b + 2); j++)
952 {
953 if (addr_modeP.disp[j - b])
954 {
955 IIF (j,
956 2,
957 addr_modeP.disp_suffix[j - b],
958 (unsigned long) addr_modeP.disp[j - b],
959 0,
960 addr_modeP.pcrel,
961 iif.instr_size,
962 addr_modeP.im_disp,
963 IND (BRANCH, BYTE),
964 NULL,
965 (addr_modeP.scaled_reg ? addr_modeP.scaled_mode
966 : addr_modeP.mode),
967 0);
968 }
969 }
0b7410c4 970
252b5132
RH
971 opcode_bit_ptr -= 5;
972 iif.iifP[1].object |= ((long) addr_modeP.mode) << opcode_bit_ptr;
0b7410c4 973
252b5132
RH
974 if (addr_modeP.scaled_reg)
975 {
976 j = b / 2;
977 IIF (j, 1, 1, (unsigned long) addr_modeP.index_byte,
978 0, 0, 0, 0, 0, NULL, -1, 0);
979 }
980 break;
0b7410c4 981
4eb6b71c
NC
982 case 'b': /* Multiple instruction disp. */
983 freeptr++; /* OVE:this is an useful hack. */
984 sprintf (freeptr, "((%s-1)*%d)", argv[i], desc->im_size);
252b5132 985 argv[i] = freeptr;
67c1ffbe 986 pcrel -= 1; /* Make pcrel 0 in spite of what case 'p':
4eb6b71c 987 wants. */
2b0f3761 988 /* fallthru */
4eb6b71c 989 case 'p': /* Displacement - pc relative addressing. */
252b5132 990 pcrel += 1;
2b0f3761 991 /* fallthru */
4eb6b71c 992 case 'd': /* Displacement. */
252b5132
RH
993 iif.instr_size += suffixP[i] ? suffixP[i] : 4;
994 IIF (12, 2, suffixP[i], (unsigned long) argv[i], 0,
995 pcrel, pcrel_adjust, 1, IND (BRANCH, BYTE), NULL, -1, 0);
996 break;
4eb6b71c
NC
997 case 'H': /* Sequent-hack: the linker wants a bit set
998 when bsr. */
252b5132
RH
999 pcrel = 1;
1000 iif.instr_size += suffixP[i] ? suffixP[i] : 4;
1001 IIF (12, 2, suffixP[i], (unsigned long) argv[i], 0,
1002 pcrel, pcrel_adjust, 1, IND (BRANCH, BYTE), NULL, -1, 1);
1003 break;
1004 case 'q': /* quick */
1005 opcode_bit_ptr -= 4;
1006 IIF (11, 2, 42, (unsigned long) argv[i], 0, 0, 0, 0, 0,
1007 bit_fix_new (4, opcode_bit_ptr, -8, 7, 0, 1, 0), -1, 0);
1008 break;
4eb6b71c 1009 case 'r': /* Register number (3 bits). */
252b5132
RH
1010 list_search (argv[i], opt6, &tmp);
1011 opcode_bit_ptr -= 3;
1012 iif.iifP[1].object |= tmp << opcode_bit_ptr;
1013 break;
33eaf5de 1014 case 'O': /* Setcfg instruction options list. */
252b5132
RH
1015 optlist (argv[i], opt3, &tmp);
1016 opcode_bit_ptr -= 4;
1017 iif.iifP[1].object |= tmp << 15;
1018 break;
33eaf5de 1019 case 'C': /* Cinv instruction options list. */
252b5132
RH
1020 optlist (argv[i], opt4, &tmp);
1021 opcode_bit_ptr -= 4;
4eb6b71c 1022 iif.iifP[1].object |= tmp << 15; /* Insert the regtype in opcode. */
252b5132 1023 break;
4eb6b71c 1024 case 'S': /* String instruction options list. */
252b5132
RH
1025 optlist (argv[i], opt5, &tmp);
1026 opcode_bit_ptr -= 4;
1027 iif.iifP[1].object |= tmp << 15;
1028 break;
1029 case 'u':
4eb6b71c 1030 case 'U': /* Register list. */
252b5132
RH
1031 IIF (10, 1, 1, 0, 0, 0, 0, 0, 0, NULL, -1, 0);
1032 switch (operandsP[(i << 1) + 1])
1033 {
4eb6b71c 1034 case 'u': /* Restore, exit. */
252b5132
RH
1035 optlist (argv[i], opt1, &iif.iifP[10].object);
1036 break;
4eb6b71c 1037 case 'U': /* Save, enter. */
252b5132
RH
1038 optlist (argv[i], opt2, &iif.iifP[10].object);
1039 break;
1040 }
1041 iif.instr_size += 1;
1042 break;
4eb6b71c 1043 case 'M': /* MMU register. */
252b5132
RH
1044 list_search (argv[i], mmureg, &tmp);
1045 opcode_bit_ptr -= 4;
1046 iif.iifP[1].object |= tmp << opcode_bit_ptr;
1047 break;
4eb6b71c 1048 case 'P': /* CPU register. */
252b5132
RH
1049 list_search (argv[i], cpureg, &tmp);
1050 opcode_bit_ptr -= 4;
1051 iif.iifP[1].object |= tmp << opcode_bit_ptr;
1052 break;
4eb6b71c
NC
1053 case 'g': /* Inss exts. */
1054 iif.instr_size += 1; /* 1 byte is allocated after the opcode. */
252b5132 1055 IIF (10, 2, 1,
4eb6b71c 1056 (unsigned long) argv[i], /* i always 2 here. */
252b5132 1057 0, 0, 0, 0, 0,
4eb6b71c
NC
1058 bit_fix_new (3, 5, 0, 7, 0, 0, 0), /* A bit_fix is targeted to
1059 the byte. */
252b5132
RH
1060 -1, 0);
1061 break;
1062 case 'G':
1063 IIF (11, 2, 42,
4eb6b71c 1064 (unsigned long) argv[i], /* i always 3 here. */
252b5132
RH
1065 0, 0, 0, 0, 0,
1066 bit_fix_new (5, 0, 1, 32, -1, 0, -1), -1, 0);
1067 break;
1068 case 'i':
1069 iif.instr_size += 1;
4eb6b71c 1070 b = 2 + i; /* Put the extension byte after opcode. */
252b5132
RH
1071 IIF (b, 2, 1, 0, 0, 0, 0, 0, 0, 0, -1, 0);
1072 break;
1073 default:
1074 as_fatal (_("Bad opcode-table-option, check in file ns32k-opcode.h"));
1075 }
1076 }
1077}
1078\f
1079/* in: instruction line
1080 out: internal structure of instruction
1081 that has been prepared for direct conversion to fragment(s) and
1082 fixes in a systematical fashion
4eb6b71c 1083 Return-value = recursive_level. */
c6a7ab1f
NC
1084/* Build iif of one assembly text line. */
1085
4eb6b71c 1086static int
ea1562b3 1087parse (const char *line, int recursive_level)
252b5132 1088{
4cd62c96
AM
1089 const char *lineptr;
1090 char c, suffix_separator;
4eb6b71c
NC
1091 int i;
1092 unsigned int argc;
1093 int arg_type;
252b5132 1094 char sqr, sep;
c6a7ab1f 1095 char suffix[MAX_ARGS], *argv[MAX_ARGS]; /* No more than 4 operands. */
0b7410c4 1096
252b5132 1097 if (recursive_level <= 0)
c6a7ab1f
NC
1098 {
1099 /* Called from md_assemble. */
1100 for (lineptr = line; (*lineptr) != '\0' && (*lineptr) != ' '; lineptr++)
1101 continue;
0b7410c4 1102
252b5132 1103 c = *lineptr;
4cd62c96 1104 *(char *) lineptr = '\0';
0b7410c4 1105
252b5132 1106 if (!(desc = (struct ns32k_opcode *) hash_find (inst_hash_handle, line)))
c6a7ab1f
NC
1107 as_fatal (_("No such opcode"));
1108
4cd62c96 1109 *(char *) lineptr = c;
252b5132
RH
1110 }
1111 else
ea1562b3 1112 lineptr = line;
0b7410c4 1113
252b5132 1114 argc = 0;
0b7410c4 1115
252b5132
RH
1116 if (*desc->operands)
1117 {
1118 if (*lineptr++ != '\0')
1119 {
1120 sqr = '[';
1121 sep = ',';
0b7410c4 1122
252b5132
RH
1123 while (*lineptr != '\0')
1124 {
1125 if (desc->operands[argc << 1])
1126 {
1127 suffix[argc] = 0;
1128 arg_type = desc->operands[(argc << 1) + 1];
0b7410c4 1129
252b5132
RH
1130 switch (arg_type)
1131 {
1132 case 'd':
1133 case 'b':
1134 case 'p':
c6a7ab1f
NC
1135 case 'H':
1136 /* The operand is supposed to be a displacement. */
252b5132 1137 /* Hackwarning: do not forget to update the 4
c6a7ab1f 1138 cases above when editing ns32k-opcode.h. */
252b5132
RH
1139 suffix_separator = ':';
1140 break;
1141 default:
c6a7ab1f
NC
1142 /* If this char occurs we loose. */
1143 suffix_separator = '\255';
1144 break;
252b5132 1145 }
0b7410c4 1146
4eb6b71c 1147 suffix[argc] = 0; /* 0 when no ':' is encountered. */
252b5132
RH
1148 argv[argc] = freeptr;
1149 *freeptr = '\0';
0b7410c4 1150
252b5132
RH
1151 while ((c = *lineptr) != '\0' && c != sep)
1152 {
1153 if (c == sqr)
1154 {
1155 if (sqr == '[')
1156 {
1157 sqr = ']';
1158 sep = '\0';
1159 }
1160 else
1161 {
1162 sqr = '[';
1163 sep = ',';
1164 }
1165 }
0b7410c4 1166
252b5132 1167 if (c == suffix_separator)
c6a7ab1f
NC
1168 {
1169 /* ':' - label/suffix separator. */
252b5132
RH
1170 switch (lineptr[1])
1171 {
1172 case 'b':
1173 suffix[argc] = 1;
1174 break;
1175 case 'w':
1176 suffix[argc] = 2;
1177 break;
1178 case 'd':
1179 suffix[argc] = 4;
1180 break;
1181 default:
1182 as_warn (_("Bad suffix, defaulting to d"));
1183 suffix[argc] = 4;
1184 if (lineptr[1] == '\0' || lineptr[1] == sep)
1185 {
1186 lineptr += 1;
1187 continue;
1188 }
c6a7ab1f 1189 break;
252b5132 1190 }
0b7410c4 1191
252b5132
RH
1192 lineptr += 2;
1193 continue;
1194 }
0b7410c4 1195
252b5132
RH
1196 *freeptr++ = c;
1197 lineptr++;
1198 }
0b7410c4 1199
252b5132
RH
1200 *freeptr++ = '\0';
1201 argc += 1;
0b7410c4 1202
252b5132
RH
1203 if (*lineptr == '\0')
1204 continue;
0b7410c4 1205
252b5132
RH
1206 lineptr += 1;
1207 }
1208 else
ea1562b3 1209 as_fatal (_("Too many operands passed to instruction"));
252b5132
RH
1210 }
1211 }
1212 }
0b7410c4 1213
252b5132
RH
1214 if (argc != strlen (desc->operands) / 2)
1215 {
1216 if (strlen (desc->default_args))
c6a7ab1f
NC
1217 {
1218 /* We can apply default, don't goof. */
252b5132 1219 if (parse (desc->default_args, 1) != 1)
c6a7ab1f
NC
1220 /* Check error in default. */
1221 as_fatal (_("Wrong numbers of operands in default, check ns32k-opcodes.h"));
252b5132
RH
1222 }
1223 else
ea1562b3 1224 as_fatal (_("Wrong number of operands"));
252b5132 1225 }
0b7410c4 1226
252b5132 1227 for (i = 0; i < IIF_ENTRIES; i++)
c6a7ab1f
NC
1228 /* Mark all entries as void. */
1229 iif.iifP[i].type = 0;
252b5132 1230
c6a7ab1f 1231 /* Build opcode iif-entry. */
252b5132
RH
1232 iif.instr_size = desc->opcode_size / 8;
1233 IIF (1, 1, iif.instr_size, desc->opcode_seed, 0, 0, 0, 0, 0, 0, -1, 0);
1234
c6a7ab1f 1235 /* This call encodes operands to iif format. */
252b5132 1236 if (argc)
ea1562b3
NC
1237 encode_operand (argc, argv, &desc->operands[0],
1238 &suffix[0], desc->im_size, desc->opcode_size);
1239
252b5132
RH
1240 return recursive_level;
1241}
1242\f
ea1562b3 1243/* This functionality should really be in the bfd library. */
252b5132 1244
ea1562b3
NC
1245static bfd_reloc_code_real_type
1246reloc (int size, int pcrel, int type)
252b5132 1247{
91d6fa6a 1248 int length, rel_index;
ea1562b3
NC
1249 bfd_reloc_code_real_type relocs[] =
1250 {
1251 BFD_RELOC_NS32K_IMM_8,
1252 BFD_RELOC_NS32K_IMM_16,
1253 BFD_RELOC_NS32K_IMM_32,
1254 BFD_RELOC_NS32K_IMM_8_PCREL,
1255 BFD_RELOC_NS32K_IMM_16_PCREL,
1256 BFD_RELOC_NS32K_IMM_32_PCREL,
252b5132 1257
ea1562b3
NC
1258 /* ns32k displacements. */
1259 BFD_RELOC_NS32K_DISP_8,
1260 BFD_RELOC_NS32K_DISP_16,
1261 BFD_RELOC_NS32K_DISP_32,
1262 BFD_RELOC_NS32K_DISP_8_PCREL,
1263 BFD_RELOC_NS32K_DISP_16_PCREL,
1264 BFD_RELOC_NS32K_DISP_32_PCREL,
252b5132 1265
ea1562b3
NC
1266 /* Normal 2's complement. */
1267 BFD_RELOC_8,
1268 BFD_RELOC_16,
1269 BFD_RELOC_32,
1270 BFD_RELOC_8_PCREL,
1271 BFD_RELOC_16_PCREL,
1272 BFD_RELOC_32_PCREL
1273 };
1274
1275 switch (size)
252b5132 1276 {
ea1562b3
NC
1277 case 1:
1278 length = 0;
1279 break;
1280 case 2:
1281 length = 1;
1282 break;
1283 case 4:
1284 length = 2;
1285 break;
1286 default:
1287 length = -1;
1288 break;
1289 }
0b7410c4 1290
91d6fa6a 1291 rel_index = length + 3 * pcrel + 6 * type;
0b7410c4 1292
91d6fa6a
NC
1293 if (rel_index >= 0 && (unsigned int) rel_index < sizeof (relocs) / sizeof (relocs[0]))
1294 return relocs[rel_index];
0b7410c4 1295
ea1562b3
NC
1296 if (pcrel)
1297 as_bad (_("Can not do %d byte pc-relative relocation for storage type %d"),
1298 size, type);
1299 else
1300 as_bad (_("Can not do %d byte relocation for storage type %d"),
1301 size, type);
0b7410c4 1302
ea1562b3 1303 return BFD_RELOC_NONE;
0b7410c4 1304
ea1562b3 1305}
252b5132 1306
ea1562b3
NC
1307static void
1308fix_new_ns32k (fragS *frag, /* Which frag? */
1309 int where, /* Where in that frag? */
1310 int size, /* 1, 2 or 4 usually. */
1311 symbolS *add_symbol, /* X_add_symbol. */
1312 long offset, /* X_add_number. */
1313 int pcrel, /* True if PC-relative relocation. */
1314 char im_disp, /* True if the value to write is a
1315 displacement. */
1316 bit_fixS *bit_fixP, /* Pointer at struct of bit_fix's, ignored if
1317 NULL. */
1318 char bsr, /* Sequent-linker-hack: 1 when relocobject is
1319 a bsr. */
1320 fragS *opcode_frag,
1321 unsigned int opcode_offset)
1322{
1323 fixS *fixP = fix_new (frag, where, size, add_symbol,
1324 offset, pcrel,
ea1562b3 1325 bit_fixP ? NO_RELOC : reloc (size, pcrel, im_disp)
ea1562b3
NC
1326 );
1327
1328 fix_opcode_frag (fixP) = opcode_frag;
1329 fix_opcode_offset (fixP) = opcode_offset;
1330 fix_im_disp (fixP) = im_disp;
1331 fix_bsr (fixP) = bsr;
1332 fix_bit_fixP (fixP) = bit_fixP;
1333 /* We have a MD overflow check for displacements. */
5bc11336 1334 fixP->fx_no_overflow = im_disp != 0 || bit_fixP != NULL;
ea1562b3
NC
1335}
1336
1337static void
1338fix_new_ns32k_exp (fragS *frag, /* Which frag? */
1339 int where, /* Where in that frag? */
1340 int size, /* 1, 2 or 4 usually. */
1341 expressionS *exp, /* Expression. */
1342 int pcrel, /* True if PC-relative relocation. */
1343 char im_disp, /* True if the value to write is a
1344 displacement. */
1345 bit_fixS *bit_fixP, /* Pointer at struct of bit_fix's, ignored if
1346 NULL. */
1347 char bsr, /* Sequent-linker-hack: 1 when relocobject is
1348 a bsr. */
1349 fragS *opcode_frag,
1350 unsigned int opcode_offset)
1351{
1352 fixS *fixP = fix_new_exp (frag, where, size, exp, pcrel,
ea1562b3 1353 bit_fixP ? NO_RELOC : reloc (size, pcrel, im_disp)
ea1562b3
NC
1354 );
1355
1356 fix_opcode_frag (fixP) = opcode_frag;
1357 fix_opcode_offset (fixP) = opcode_offset;
1358 fix_im_disp (fixP) = im_disp;
1359 fix_bsr (fixP) = bsr;
1360 fix_bit_fixP (fixP) = bit_fixP;
1361 /* We have a MD overflow check for displacements. */
5bc11336 1362 fixP->fx_no_overflow = im_disp != 0 || bit_fixP != NULL;
ea1562b3
NC
1363}
1364
1365/* Convert number to chars in correct order. */
1366
1367void
1368md_number_to_chars (char *buf, valueT value, int nbytes)
1369{
1370 number_to_chars_littleendian (buf, value, nbytes);
1371}
1372
33eaf5de 1373/* This is a variant of md_numbers_to_chars. The reason for its
ea1562b3
NC
1374 existence is the fact that ns32k uses Huffman coded
1375 displacements. This implies that the bit order is reversed in
1376 displacements and that they are prefixed with a size-tag.
1377
1378 binary: msb -> lsb
1379 0xxxxxxx byte
1380 10xxxxxx xxxxxxxx word
1381 11xxxxxx xxxxxxxx xxxxxxxx xxxxxxxx double word
1382
1383 This must be taken care of and we do it here! */
1384
1385static void
1386md_number_to_disp (char *buf, long val, int n)
1387{
1388 switch (n)
1389 {
1390 case 1:
1391 if (val < -64 || val > 63)
1392 as_bad (_("value of %ld out of byte displacement range."), val);
1393 val &= 0x7f;
1394#ifdef SHOW_NUM
1395 printf ("%x ", val & 0xff);
1396#endif
1397 *buf++ = val;
1398 break;
1399
1400 case 2:
1401 if (val < -8192 || val > 8191)
1402 as_bad (_("value of %ld out of word displacement range."), val);
1403 val &= 0x3fff;
1404 val |= 0x8000;
1405#ifdef SHOW_NUM
1406 printf ("%x ", val >> 8 & 0xff);
1407#endif
1408 *buf++ = (val >> 8);
1409#ifdef SHOW_NUM
1410 printf ("%x ", val & 0xff);
1411#endif
1412 *buf++ = val;
1413 break;
1414
1415 case 4:
1416 if (val < -0x20000000 || val >= 0x20000000)
1417 as_bad (_("value of %ld out of double word displacement range."), val);
1418 val |= 0xc0000000;
1419#ifdef SHOW_NUM
1420 printf ("%x ", val >> 24 & 0xff);
1421#endif
1422 *buf++ = (val >> 24);
1423#ifdef SHOW_NUM
1424 printf ("%x ", val >> 16 & 0xff);
1425#endif
1426 *buf++ = (val >> 16);
1427#ifdef SHOW_NUM
1428 printf ("%x ", val >> 8 & 0xff);
1429#endif
1430 *buf++ = (val >> 8);
1431#ifdef SHOW_NUM
1432 printf ("%x ", val & 0xff);
1433#endif
1434 *buf++ = val;
1435 break;
1436
1437 default:
33eaf5de 1438 as_fatal (_("Internal logic error. Line %d, file: \"%s\""),
ea1562b3
NC
1439 __LINE__, __FILE__);
1440 }
1441}
1442
1443static void
1444md_number_to_imm (char *buf, long val, int n)
1445{
1446 switch (n)
1447 {
1448 case 1:
1449#ifdef SHOW_NUM
1450 printf ("%x ", val & 0xff);
1451#endif
1452 *buf++ = val;
1453 break;
1454
1455 case 2:
1456#ifdef SHOW_NUM
1457 printf ("%x ", val >> 8 & 0xff);
1458#endif
1459 *buf++ = (val >> 8);
1460#ifdef SHOW_NUM
1461 printf ("%x ", val & 0xff);
1462#endif
1463 *buf++ = val;
1464 break;
1465
1466 case 4:
1467#ifdef SHOW_NUM
1468 printf ("%x ", val >> 24 & 0xff);
1469#endif
1470 *buf++ = (val >> 24);
1471#ifdef SHOW_NUM
1472 printf ("%x ", val >> 16 & 0xff);
1473#endif
1474 *buf++ = (val >> 16);
1475#ifdef SHOW_NUM
1476 printf ("%x ", val >> 8 & 0xff);
1477#endif
1478 *buf++ = (val >> 8);
1479#ifdef SHOW_NUM
1480 printf ("%x ", val & 0xff);
1481#endif
1482 *buf++ = val;
1483 break;
1484
1485 default:
1486 as_fatal (_("Internal logic error. line %d, file \"%s\""),
1487 __LINE__, __FILE__);
1488 }
1489}
1490
1491/* Fast bitfiddling support. */
1492/* Mask used to zero bitfield before oring in the true field. */
1493
1494static unsigned long l_mask[] =
1495{
1496 0xffffffff, 0xfffffffe, 0xfffffffc, 0xfffffff8,
1497 0xfffffff0, 0xffffffe0, 0xffffffc0, 0xffffff80,
1498 0xffffff00, 0xfffffe00, 0xfffffc00, 0xfffff800,
1499 0xfffff000, 0xffffe000, 0xffffc000, 0xffff8000,
1500 0xffff0000, 0xfffe0000, 0xfffc0000, 0xfff80000,
1501 0xfff00000, 0xffe00000, 0xffc00000, 0xff800000,
1502 0xff000000, 0xfe000000, 0xfc000000, 0xf8000000,
1503 0xf0000000, 0xe0000000, 0xc0000000, 0x80000000,
1504};
1505static unsigned long r_mask[] =
1506{
1507 0x00000000, 0x00000001, 0x00000003, 0x00000007,
1508 0x0000000f, 0x0000001f, 0x0000003f, 0x0000007f,
1509 0x000000ff, 0x000001ff, 0x000003ff, 0x000007ff,
1510 0x00000fff, 0x00001fff, 0x00003fff, 0x00007fff,
1511 0x0000ffff, 0x0001ffff, 0x0003ffff, 0x0007ffff,
1512 0x000fffff, 0x001fffff, 0x003fffff, 0x007fffff,
1513 0x00ffffff, 0x01ffffff, 0x03ffffff, 0x07ffffff,
1514 0x0fffffff, 0x1fffffff, 0x3fffffff, 0x7fffffff,
1515};
1516#define MASK_BITS 31
1517/* Insert bitfield described by field_ptr and val at buf
1518 This routine is written for modification of the first 4 bytes pointed
1519 to by buf, to yield speed.
1520 The ifdef stuff is for selection between a ns32k-dependent routine
1521 and a general version. (My advice: use the general version!). */
1522
1523static void
1524md_number_to_field (char *buf, long val, bit_fixS *field_ptr)
1525{
1526 unsigned long object;
1527 unsigned long mask;
1528 /* Define ENDIAN on a ns32k machine. */
1529#ifdef ENDIAN
1530 unsigned long *mem_ptr;
1531#else
1532 char *mem_ptr;
1533#endif
1534
1535 if (field_ptr->fx_bit_min <= val && val <= field_ptr->fx_bit_max)
1536 {
1537#ifdef ENDIAN
1538 if (field_ptr->fx_bit_base)
1539 /* Override buf. */
1540 mem_ptr = (unsigned long *) field_ptr->fx_bit_base;
1541 else
1542 mem_ptr = (unsigned long *) buf;
1543
1544 mem_ptr = ((unsigned long *)
1545 ((char *) mem_ptr + field_ptr->fx_bit_base_adj));
1546#else
1547 if (field_ptr->fx_bit_base)
1548 mem_ptr = (char *) field_ptr->fx_bit_base;
1549 else
1550 mem_ptr = buf;
1551
1552 mem_ptr += field_ptr->fx_bit_base_adj;
1553#endif
1554#ifdef ENDIAN
1555 /* We have a nice ns32k machine with lowbyte at low-physical mem. */
1556 object = *mem_ptr; /* get some bytes */
1557#else /* OVE Goof! the machine is a m68k or dito. */
1558 /* That takes more byte fiddling. */
1559 object = 0;
1560 object |= mem_ptr[3] & 0xff;
1561 object <<= 8;
1562 object |= mem_ptr[2] & 0xff;
1563 object <<= 8;
1564 object |= mem_ptr[1] & 0xff;
1565 object <<= 8;
1566 object |= mem_ptr[0] & 0xff;
1567#endif
1568 mask = 0;
1569 mask |= (r_mask[field_ptr->fx_bit_offset]);
1570 mask |= (l_mask[field_ptr->fx_bit_offset + field_ptr->fx_bit_size]);
1571 object &= mask;
1572 val += field_ptr->fx_bit_add;
1573 object |= ((val << field_ptr->fx_bit_offset) & (mask ^ 0xffffffff));
1574#ifdef ENDIAN
1575 *mem_ptr = object;
1576#else
1577 mem_ptr[0] = (char) object;
1578 object >>= 8;
1579 mem_ptr[1] = (char) object;
1580 object >>= 8;
1581 mem_ptr[2] = (char) object;
1582 object >>= 8;
1583 mem_ptr[3] = (char) object;
1584#endif
1585 }
1586 else
1587 as_bad (_("Bit field out of range"));
1588}
1589
1590/* Convert iif to fragments. From this point we start to dribble with
1591 functions in other files than this one.(Except hash.c) So, if it's
1592 possible to make an iif for an other CPU, you don't need to know
1593 what frags, relax, obstacks, etc is in order to port this
1594 assembler. You only need to know if it's possible to reduce your
1595 cpu-instruction to iif-format (takes some work) and adopt the other
1596 md_? parts according to given instructions Note that iif was
1597 invented for the clean ns32k`s architecture. */
1598
1599/* GAS for the ns32k has a problem. PC relative displacements are
1600 relative to the address of the opcode, not the address of the
1601 operand. We used to keep track of the offset between the operand
1602 and the opcode in pcrel_adjust for each frag and each fix. However,
1603 we get into trouble where there are two or more pc-relative
1604 operands and the size of the first one can't be determined. Then in
1605 the relax phase, the size of the first operand will change and
1606 pcrel_adjust will no longer be correct. The current solution is
1607 keep a pointer to the frag with the opcode in it and the offset in
1608 that frag for each frag and each fix. Then, when needed, we can
1609 always figure out how far it is between the opcode and the pcrel
1610 object. See also md_pcrel_adjust and md_fix_pcrel_adjust. For
1611 objects not part of an instruction, the pointer to the opcode frag
1612 is always zero. */
1613
1614static void
1615convert_iif (void)
1616{
1617 int i;
1618 bit_fixS *j;
1619 fragS *inst_frag;
1620 unsigned int inst_offset;
1621 char *inst_opcode;
1622 char *memP;
1623 int l;
1624 int k;
1625 char type;
1626 char size = 0;
1627
1628 frag_grow (iif.instr_size); /* This is important. */
1629 memP = frag_more (0);
1630 inst_opcode = memP;
1631 inst_offset = (memP - frag_now->fr_literal);
1632 inst_frag = frag_now;
1633
1634 for (i = 0; i < IIF_ENTRIES; i++)
1635 {
1636 if ((type = iif.iifP[i].type))
1637 {
1638 /* The object exist, so handle it. */
1639 switch (size = iif.iifP[i].size)
1640 {
1641 case 42:
1642 size = 0;
1643 /* It's a bitfix that operates on an existing object. */
1644 if (iif.iifP[i].bit_fixP->fx_bit_base)
1645 /* Expand fx_bit_base to point at opcode. */
1646 iif.iifP[i].bit_fixP->fx_bit_base = (long) inst_opcode;
1647 /* Fall through. */
1648
1649 case 8: /* bignum or doublefloat. */
1650 case 1:
1651 case 2:
1652 case 3:
1653 case 4:
1654 /* The final size in objectmemory is known. */
1655 memP = frag_more (size);
1656 j = iif.iifP[i].bit_fixP;
1657
1658 switch (type)
1659 {
1660 case 1: /* The object is pure binary. */
1661 if (j)
1662 md_number_to_field (memP, exprP.X_add_number, j);
1663
1664 else if (iif.iifP[i].pcrel)
1665 fix_new_ns32k (frag_now,
1666 (long) (memP - frag_now->fr_literal),
1667 size,
1668 0,
1669 iif.iifP[i].object,
1670 iif.iifP[i].pcrel,
1671 iif.iifP[i].im_disp,
1672 0,
1673 iif.iifP[i].bsr, /* Sequent hack. */
1674 inst_frag, inst_offset);
1675 else
1676 {
1677 /* Good, just put them bytes out. */
1678 switch (iif.iifP[i].im_disp)
1679 {
1680 case 0:
1681 md_number_to_chars (memP, iif.iifP[i].object, size);
1682 break;
1683 case 1:
1684 md_number_to_disp (memP, iif.iifP[i].object, size);
1685 break;
1686 default:
1687 as_fatal (_("iif convert internal pcrel/binary"));
1688 }
1689 }
1690 break;
1691
1692 case 2:
1693 /* The object is a pointer at an expression, so
1694 unpack it, note that bignums may result from the
1695 expression. */
1696 evaluate_expr (&exprP, (char *) iif.iifP[i].object);
1697 if (exprP.X_op == O_big || size == 8)
1698 {
1699 if ((k = exprP.X_add_number) > 0)
1700 {
1701 /* We have a bignum ie a quad. This can only
1702 happens in a long suffixed instruction. */
1703 if (k * 2 > size)
1704 as_bad (_("Bignum too big for long"));
1705
1706 if (k == 3)
1707 memP += 2;
1708
1709 for (l = 0; k > 0; k--, l += 2)
1710 md_number_to_chars (memP + l,
1711 generic_bignum[l >> 1],
1712 sizeof (LITTLENUM_TYPE));
1713 }
1714 else
1715 {
1716 /* flonum. */
1717 LITTLENUM_TYPE words[4];
1718
1719 switch (size)
1720 {
1721 case 4:
1722 gen_to_words (words, 2, 8);
1723 md_number_to_imm (memP, (long) words[0],
1724 sizeof (LITTLENUM_TYPE));
1725 md_number_to_imm (memP + sizeof (LITTLENUM_TYPE),
1726 (long) words[1],
1727 sizeof (LITTLENUM_TYPE));
1728 break;
1729 case 8:
1730 gen_to_words (words, 4, 11);
1731 md_number_to_imm (memP, (long) words[0],
1732 sizeof (LITTLENUM_TYPE));
1733 md_number_to_imm (memP + sizeof (LITTLENUM_TYPE),
1734 (long) words[1],
1735 sizeof (LITTLENUM_TYPE));
1736 md_number_to_imm ((memP + 2
1737 * sizeof (LITTLENUM_TYPE)),
1738 (long) words[2],
1739 sizeof (LITTLENUM_TYPE));
1740 md_number_to_imm ((memP + 3
1741 * sizeof (LITTLENUM_TYPE)),
1742 (long) words[3],
1743 sizeof (LITTLENUM_TYPE));
1744 break;
1745 }
1746 }
1747 break;
1748 }
1749 if (exprP.X_add_symbol ||
1750 exprP.X_op_symbol ||
1751 iif.iifP[i].pcrel)
252b5132
RH
1752 {
1753 /* The expression was undefined due to an
1754 undefined label. Create a fix so we can fix
c6a7ab1f 1755 the object later. */
252b5132
RH
1756 exprP.X_add_number += iif.iifP[i].object_adjust;
1757 fix_new_ns32k_exp (frag_now,
1758 (long) (memP - frag_now->fr_literal),
1759 size,
1760 &exprP,
1761 iif.iifP[i].pcrel,
1762 iif.iifP[i].im_disp,
1763 j,
1764 iif.iifP[i].bsr,
1765 inst_frag, inst_offset);
1766 }
4eb6b71c 1767 else if (j)
ea1562b3 1768 md_number_to_field (memP, exprP.X_add_number, j);
252b5132
RH
1769 else
1770 {
c6a7ab1f 1771 /* Good, just put them bytes out. */
252b5132
RH
1772 switch (iif.iifP[i].im_disp)
1773 {
1774 case 0:
1775 md_number_to_imm (memP, exprP.X_add_number, size);
1776 break;
1777 case 1:
1778 md_number_to_disp (memP, exprP.X_add_number, size);
1779 break;
1780 default:
1781 as_fatal (_("iif convert internal pcrel/pointer"));
1782 }
1783 }
1784 break;
1785 default:
1786 as_fatal (_("Internal logic error in iif.iifP[n].type"));
1787 }
1788 break;
0b7410c4 1789
252b5132 1790 case 0:
c6a7ab1f 1791 /* Too bad, the object may be undefined as far as its
252b5132
RH
1792 final nsize in object memory is concerned. The size
1793 of the object in objectmemory is not explicitly
1794 given. If the object is defined its length can be
c6a7ab1f 1795 determined and a fix can replace the frag. */
252b5132
RH
1796 {
1797 evaluate_expr (&exprP, (char *) iif.iifP[i].object);
0b7410c4 1798
252b5132
RH
1799 if ((exprP.X_add_symbol || exprP.X_op_symbol) &&
1800 !iif.iifP[i].pcrel)
1801 {
4eb6b71c
NC
1802 /* Size is unknown until link time so have to default. */
1803 size = default_disp_size; /* Normally 4 bytes. */
07726851 1804 memP = frag_more (size);
252b5132
RH
1805 fix_new_ns32k_exp (frag_now,
1806 (long) (memP - frag_now->fr_literal),
1807 size,
1808 &exprP,
1809 0, /* never iif.iifP[i].pcrel, */
1810 1, /* always iif.iifP[i].im_disp */
1811 (bit_fixS *) 0, 0,
1812 inst_frag,
1813 inst_offset);
4eb6b71c 1814 break; /* Exit this absolute hack. */
252b5132
RH
1815 }
1816
1817 if (exprP.X_add_symbol || exprP.X_op_symbol)
c6a7ab1f
NC
1818 {
1819 /* Frag it. */
252b5132 1820 if (exprP.X_op_symbol)
2b0f3761 1821 /* We can't relax this case. */
ea1562b3 1822 as_fatal (_("Can't relax difference"));
252b5132
RH
1823 else
1824 {
c6a7ab1f
NC
1825 /* Size is not important. This gets fixed by
1826 relax, but we assume 0 in what follows. */
07726851 1827 memP = frag_more (4); /* Max size. */
252b5132
RH
1828 size = 0;
1829
1830 {
1831 fragS *old_frag = frag_now;
1832 frag_variant (rs_machine_dependent,
c6a7ab1f
NC
1833 4, /* Max size. */
1834 0, /* Size. */
1835 IND (BRANCH, UNDEF), /* Expecting
1836 the worst. */
252b5132
RH
1837 exprP.X_add_symbol,
1838 exprP.X_add_number,
1839 inst_opcode);
c6a7ab1f
NC
1840 frag_opcode_frag (old_frag) = inst_frag;
1841 frag_opcode_offset (old_frag) = inst_offset;
1842 frag_bsr (old_frag) = iif.iifP[i].bsr;
252b5132
RH
1843 }
1844 }
1845 }
1846 else
1847 {
c6a7ab1f 1848 /* This duplicates code in md_number_to_disp. */
252b5132 1849 if (-64 <= exprP.X_add_number && exprP.X_add_number <= 63)
ea1562b3 1850 size = 1;
252b5132
RH
1851 else
1852 {
1853 if (-8192 <= exprP.X_add_number
1854 && exprP.X_add_number <= 8191)
ea1562b3 1855 size = 2;
252b5132
RH
1856 else
1857 {
c6a7ab1f
NC
1858 if (-0x20000000 <= exprP.X_add_number
1859 && exprP.X_add_number<=0x1fffffff)
ea1562b3 1860 size = 4;
252b5132
RH
1861 else
1862 {
5091343a 1863 as_bad (_("Displacement too large for :d"));
252b5132
RH
1864 size = 4;
1865 }
1866 }
1867 }
0b7410c4 1868
c6a7ab1f 1869 memP = frag_more (size);
252b5132
RH
1870 md_number_to_disp (memP, exprP.X_add_number, size);
1871 }
1872 }
1873 break;
0b7410c4 1874
252b5132
RH
1875 default:
1876 as_fatal (_("Internal logic error in iif.iifP[].type"));
1877 }
1878 }
ea1562b3
NC
1879 }
1880}
1881\f
1882void
1883md_assemble (char *line)
1884{
1885 freeptr = freeptr_static;
1886 parse (line, 0); /* Explode line to more fix form in iif. */
1887 convert_iif (); /* Convert iif to frags, fix's etc. */
252b5132 1888#ifdef SHOW_NUM
ea1562b3 1889 printf (" \t\t\t%s\n", line);
252b5132 1890#endif
252b5132
RH
1891}
1892
ea1562b3
NC
1893void
1894md_begin (void)
252b5132 1895{
ea1562b3
NC
1896 /* Build a hashtable of the instructions. */
1897 const struct ns32k_opcode *ptr;
dfc4b250 1898 const char *status;
ea1562b3
NC
1899 const struct ns32k_opcode *endop;
1900
1901 inst_hash_handle = hash_new ();
1902
1903 endop = ns32k_opcodes + sizeof (ns32k_opcodes) / sizeof (ns32k_opcodes[0]);
1904 for (ptr = ns32k_opcodes; ptr < endop; ptr++)
252b5132 1905 {
dfc4b250 1906 if ((status = hash_insert (inst_hash_handle, ptr->name, (char *) ptr)))
ea1562b3 1907 /* Fatal. */
dfc4b250 1908 as_fatal (_("Can't hash %s: %s"), ptr->name, status);
252b5132 1909 }
ea1562b3
NC
1910
1911 /* Some private space please! */
325801bd 1912 freeptr_static = XNEWVEC (char, PRIVATE_SIZE);
252b5132
RH
1913}
1914
ea1562b3
NC
1915/* Turn the string pointed to by litP into a floating point constant
1916 of type TYPE, and emit the appropriate bytes. The number of
1917 LITTLENUMS emitted is stored in *SIZEP. An error message is
1918 returned, or NULL on OK. */
252b5132 1919
6d4af3c2 1920const char *
ea1562b3 1921md_atof (int type, char *litP, int *sizeP)
252b5132 1922{
499ac353 1923 return ieee_md_atof (type, litP, sizeP, FALSE);
ea1562b3
NC
1924}
1925\f
c6a7ab1f 1926int
ea1562b3 1927md_pcrel_adjust (fragS *fragP)
252b5132
RH
1928{
1929 fragS *opcode_frag;
1930 addressT opcode_address;
1931 unsigned int offset;
0b7410c4 1932
c6a7ab1f 1933 opcode_frag = frag_opcode_frag (fragP);
252b5132
RH
1934 if (opcode_frag == 0)
1935 return 0;
0b7410c4 1936
c6a7ab1f 1937 offset = frag_opcode_offset (fragP);
252b5132 1938 opcode_address = offset + opcode_frag->fr_address;
0b7410c4 1939
252b5132
RH
1940 return fragP->fr_address + fragP->fr_fix - opcode_address;
1941}
1942
4eb6b71c 1943static int
ea1562b3 1944md_fix_pcrel_adjust (fixS *fixP)
252b5132 1945{
252b5132
RH
1946 fragS *opcode_frag;
1947 addressT opcode_address;
1948 unsigned int offset;
0b7410c4 1949
c6a7ab1f 1950 opcode_frag = fix_opcode_frag (fixP);
252b5132
RH
1951 if (opcode_frag == 0)
1952 return 0;
0b7410c4 1953
c6a7ab1f 1954 offset = fix_opcode_offset (fixP);
252b5132 1955 opcode_address = offset + opcode_frag->fr_address;
0b7410c4 1956
252b5132
RH
1957 return fixP->fx_where + fixP->fx_frag->fr_address - opcode_address;
1958}
1959
1960/* Apply a fixS (fixup of an instruction or data that we didn't have
1961 enough info to complete immediately) to the data in a frag.
1962
1963 On the ns32k, everything is in a different format, so we have broken
1964 out separate functions for each kind of thing we could be fixing.
1965 They all get called from here. */
1966
252b5132 1967void
55cf6793 1968md_apply_fix (fixS *fixP, valueT * valP, segT seg ATTRIBUTE_UNUSED)
252b5132 1969{
94f592af 1970 long val = * (long *) valP;
252b5132
RH
1971 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
1972
c6a7ab1f 1973 if (fix_bit_fixP (fixP))
ea1562b3
NC
1974 /* Bitfields to fix, sigh. */
1975 md_number_to_field (buf, val, fix_bit_fixP (fixP));
94f592af
NC
1976 else switch (fix_im_disp (fixP))
1977 {
1978 case 0:
1979 /* Immediate field. */
1980 md_number_to_imm (buf, val, fixP->fx_size);
1981 break;
252b5132 1982
94f592af
NC
1983 case 1:
1984 /* Displacement field. */
4eb6b71c 1985 /* Calculate offset. */
94f592af
NC
1986 md_number_to_disp (buf,
1987 (fixP->fx_pcrel ? val + md_fix_pcrel_adjust (fixP)
1988 : val), fixP->fx_size);
1989 break;
1990
1991 case 2:
1992 /* Pointer in a data object. */
1993 md_number_to_chars (buf, val, fixP->fx_size);
1994 break;
1995 }
1996
1997 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
1998 fixP->fx_done = 1;
252b5132
RH
1999}
2000\f
4eb6b71c 2001/* Convert a relaxed displacement to ditto in final output. */
252b5132 2002
252b5132 2003void
ea1562b3
NC
2004md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
2005 segT sec ATTRIBUTE_UNUSED,
2006 fragS *fragP)
252b5132
RH
2007{
2008 long disp;
2009 long ext = 0;
252b5132 2010 /* Address in gas core of the place to store the displacement. */
4eb6b71c 2011 char *buffer_address = fragP->fr_fix + fragP->fr_literal;
252b5132
RH
2012 /* Address in object code of the displacement. */
2013 int object_address;
2014
252b5132
RH
2015 switch (fragP->fr_subtype)
2016 {
2017 case IND (BRANCH, BYTE):
2018 ext = 1;
2019 break;
2020 case IND (BRANCH, WORD):
2021 ext = 2;
2022 break;
2023 case IND (BRANCH, DOUBLE):
2024 ext = 4;
2025 break;
2026 }
2027
c6a7ab1f 2028 if (ext == 0)
252b5132
RH
2029 return;
2030
2031 know (fragP->fr_symbol);
2032
2033 object_address = fragP->fr_fix + fragP->fr_address;
0b7410c4 2034
252b5132
RH
2035 /* The displacement of the address, from current location. */
2036 disp = (S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset) - object_address;
c6a7ab1f 2037 disp += md_pcrel_adjust (fragP);
252b5132
RH
2038
2039 md_number_to_disp (buffer_address, (long) disp, (int) ext);
2040 fragP->fr_fix += ext;
2041}
2042
2043/* This function returns the estimated size a variable object will occupy,
2044 one can say that we tries to guess the size of the objects before we
c6a7ab1f 2045 actually know it. */
252b5132
RH
2046
2047int
ea1562b3 2048md_estimate_size_before_relax (fragS *fragP, segT segment)
252b5132 2049{
606ab118 2050 if (fragP->fr_subtype == IND (BRANCH, UNDEF))
252b5132 2051 {
606ab118 2052 if (S_GET_SEGMENT (fragP->fr_symbol) != segment)
252b5132 2053 {
606ab118 2054 /* We don't relax symbols defined in another segment. The
c6a7ab1f 2055 thing to do is to assume the object will occupy 4 bytes. */
252b5132
RH
2056 fix_new_ns32k (fragP,
2057 (int) (fragP->fr_fix),
2058 4,
2059 fragP->fr_symbol,
2060 fragP->fr_offset,
2061 1,
2062 1,
2063 0,
4eb6b71c 2064 frag_bsr(fragP), /* Sequent hack. */
c6a7ab1f
NC
2065 frag_opcode_frag (fragP),
2066 frag_opcode_offset (fragP));
252b5132 2067 fragP->fr_fix += 4;
252b5132 2068 frag_wane (fragP);
606ab118 2069 return 4;
252b5132 2070 }
93c2a809 2071
606ab118
AM
2072 /* Relaxable case. Set up the initial guess for the variable
2073 part of the frag. */
2074 fragP->fr_subtype = IND (BRANCH, BYTE);
252b5132 2075 }
0b7410c4 2076
606ab118
AM
2077 if (fragP->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2078 abort ();
2079
2080 /* Return the size of the variable part of the frag. */
2081 return md_relax_table[fragP->fr_subtype].rlx_length;
252b5132
RH
2082}
2083
2084int md_short_jump_size = 3;
2085int md_long_jump_size = 5;
252b5132
RH
2086
2087void
ea1562b3
NC
2088md_create_short_jump (char *ptr,
2089 addressT from_addr,
2090 addressT to_addr,
2091 fragS *frag ATTRIBUTE_UNUSED,
2092 symbolS *to_symbol ATTRIBUTE_UNUSED)
252b5132
RH
2093{
2094 valueT offset;
2095
2096 offset = to_addr - from_addr;
2097 md_number_to_chars (ptr, (valueT) 0xEA, 1);
2098 md_number_to_disp (ptr + 1, (valueT) offset, 2);
2099}
2100
2101void
ea1562b3
NC
2102md_create_long_jump (char *ptr,
2103 addressT from_addr,
2104 addressT to_addr,
2105 fragS *frag ATTRIBUTE_UNUSED,
2106 symbolS *to_symbol ATTRIBUTE_UNUSED)
252b5132
RH
2107{
2108 valueT offset;
2109
2110 offset = to_addr - from_addr;
2111 md_number_to_chars (ptr, (valueT) 0xEA, 1);
2112 md_number_to_disp (ptr + 1, (valueT) offset, 4);
2113}
2114\f
5a38dc70 2115const char *md_shortopts = "m:";
c6a7ab1f
NC
2116
2117struct option md_longopts[] =
2118{
4eb6b71c
NC
2119#define OPTION_DISP_SIZE (OPTION_MD_BASE)
2120 {"disp-size-default", required_argument , NULL, OPTION_DISP_SIZE},
252b5132
RH
2121 {NULL, no_argument, NULL, 0}
2122};
c6a7ab1f
NC
2123
2124size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
2125
2126int
17b9d67d 2127md_parse_option (int c, const char *arg)
252b5132
RH
2128{
2129 switch (c)
2130 {
2131 case 'm':
2132 if (!strcmp (arg, "32032"))
2133 {
2134 cpureg = cpureg_032;
2135 mmureg = mmureg_032;
2136 }
2137 else if (!strcmp (arg, "32532"))
2138 {
2139 cpureg = cpureg_532;
2140 mmureg = mmureg_532;
2141 }
2142 else
2143 {
4eb6b71c 2144 as_warn (_("invalid architecture option -m%s, ignored"), arg);
252b5132
RH
2145 return 0;
2146 }
2147 break;
4eb6b71c
NC
2148 case OPTION_DISP_SIZE:
2149 {
2150 int size = atoi(arg);
2151 switch (size)
2152 {
2153 case 1: case 2: case 4:
2154 default_disp_size = size;
2155 break;
2156 default:
2157 as_warn (_("invalid default displacement size \"%s\". Defaulting to %d."),
2158 arg, default_disp_size);
2159 }
2160 break;
2161 }
252b5132
RH
2162
2163 default:
2164 return 0;
2165 }
2166
2167 return 1;
2168}
2169
2170void
ea1562b3 2171md_show_usage (FILE *stream)
252b5132 2172{
c6a7ab1f 2173 fprintf (stream, _("\
252b5132 2174NS32K options:\n\
4eb6b71c
NC
2175-m32032 | -m32532 select variant of NS32K architecture\n\
2176--disp-size-default=<1|2|4>\n"));
252b5132 2177}
252b5132 2178\f
252b5132
RH
2179/* This is TC_CONS_FIX_NEW, called by emit_expr in read.c. */
2180
2181void
ea1562b3
NC
2182cons_fix_new_ns32k (fragS *frag, /* Which frag? */
2183 int where, /* Where in that frag? */
2184 int size, /* 1, 2 or 4 usually. */
62ebcb5c
AM
2185 expressionS *exp, /* Expression. */
2186 bfd_reloc_code_real_type r ATTRIBUTE_UNUSED)
252b5132
RH
2187{
2188 fix_new_ns32k_exp (frag, where, size, exp,
2189 0, 2, 0, 0, 0, 0);
2190}
2191
2192/* We have no need to default values of symbols. */
2193
2194symbolS *
ea1562b3 2195md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH
2196{
2197 return 0;
2198}
2199
2200/* Round up a section size to the appropriate boundary. */
c6a7ab1f 2201
252b5132 2202valueT
ea1562b3 2203md_section_align (segT segment ATTRIBUTE_UNUSED, valueT size)
252b5132 2204{
c6a7ab1f 2205 return size; /* Byte alignment is fine. */
252b5132
RH
2206}
2207
2208/* Exactly what point is a PC-relative offset relative TO? On the
c6a7ab1f
NC
2209 ns32k, they're relative to the start of the instruction. */
2210
252b5132 2211long
ea1562b3 2212md_pcrel_from (fixS *fixP)
252b5132
RH
2213{
2214 long res;
4eb6b71c 2215
252b5132
RH
2216 res = fixP->fx_where + fixP->fx_frag->fr_address;
2217#ifdef SEQUENT_COMPATABILITY
c6a7ab1f
NC
2218 if (frag_bsr (fixP->fx_frag))
2219 res += 0x12 /* FOO Kludge alert! */
252b5132
RH
2220#endif
2221 return res;
2222}
2223
252b5132 2224arelent *
ea1562b3 2225tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH
2226{
2227 arelent *rel;
2228 bfd_reloc_code_real_type code;
2229
c6a7ab1f 2230 code = reloc (fixp->fx_size, fixp->fx_pcrel, fix_im_disp (fixp));
252b5132 2231
325801bd
TS
2232 rel = XNEW (arelent);
2233 rel->sym_ptr_ptr = XNEW (asymbol *);
310b5aa2 2234 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
2235 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
2236 if (fixp->fx_pcrel)
2237 rel->addend = fixp->fx_addnumber;
2238 else
2239 rel->addend = 0;
2240
2241 rel->howto = bfd_reloc_type_lookup (stdoutput, code);
2242 if (!rel->howto)
2243 {
2244 const char *name;
2245
2246 name = S_GET_NAME (fixp->fx_addsy);
2247 if (name == NULL)
2248 name = _("<unknown>");
2249 as_fatal (_("Cannot find relocation type for symbol %s, code %d"),
2250 name, (int) code);
2251 }
2252
2253 return rel;
2254}
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