* config/tc-hppa.c: Fix comment typos.
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
ae6063d4 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
2c1c4c62 3 Free Software Foundation, Inc.
252b5132
RH
4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
81d4177b 21 02111-1307, USA. */
252b5132
RH
22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH
28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH
33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH
53#endif
54#endif
55
0baf16f2
AM
56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM
69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM
72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM
76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM
79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM
81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM
83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH
89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM
95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH
97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM
99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH
101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
931e13a6 114static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH
115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH
134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
5ce8663f
NC
185
186/* '+' and '-' can be used as postfix predicate predictors for conditional
187 branches. So they need to be accepted as symbol characters. */
188const char ppc_symbol_chars[] = "+-";
75e21f08
JJ
189
190/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
191int ppc_cie_data_alignment;
252b5132
RH
192\f
193/* The target specific pseudo-ops which we support. */
194
195const pseudo_typeS md_pseudo_table[] =
196{
197 /* Pseudo-ops which must be overridden. */
198 { "byte", ppc_byte, 0 },
199
200#ifdef OBJ_XCOFF
201 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
202 legitimately belong in the obj-*.c file. However, XCOFF is based
203 on COFF, and is only implemented for the RS/6000. We just use
204 obj-coff.c, and add what we need here. */
205 { "comm", ppc_comm, 0 },
206 { "lcomm", ppc_comm, 1 },
207 { "bb", ppc_bb, 0 },
208 { "bc", ppc_bc, 0 },
209 { "bf", ppc_bf, 0 },
210 { "bi", ppc_biei, 0 },
211 { "bs", ppc_bs, 0 },
212 { "csect", ppc_csect, 0 },
213 { "data", ppc_section, 'd' },
214 { "eb", ppc_eb, 0 },
215 { "ec", ppc_ec, 0 },
216 { "ef", ppc_ef, 0 },
217 { "ei", ppc_biei, 1 },
218 { "es", ppc_es, 0 },
219 { "extern", ppc_extern, 0 },
220 { "function", ppc_function, 0 },
221 { "lglobl", ppc_lglobl, 0 },
222 { "rename", ppc_rename, 0 },
223 { "section", ppc_named_section, 0 },
224 { "stabx", ppc_stabx, 0 },
225 { "text", ppc_section, 't' },
226 { "toc", ppc_toc, 0 },
227 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 228 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH
229 { "word", ppc_xcoff_cons, 1 },
230 { "short", ppc_xcoff_cons, 1 },
231 { "vbyte", ppc_vbyte, 0 },
232#endif
233
234#ifdef OBJ_ELF
0baf16f2
AM
235 { "llong", ppc_elf_cons, 8 },
236 { "quad", ppc_elf_cons, 8 },
252b5132
RH
237 { "long", ppc_elf_cons, 4 },
238 { "word", ppc_elf_cons, 2 },
239 { "short", ppc_elf_cons, 2 },
240 { "rdata", ppc_elf_rdata, 0 },
241 { "rodata", ppc_elf_rdata, 0 },
242 { "lcomm", ppc_elf_lcomm, 0 },
243#endif
244
245#ifdef TE_PE
99a814a1 246 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH
247 { "previous", ppc_previous, 0 },
248 { "pdata", ppc_pdata, 0 },
249 { "ydata", ppc_ydata, 0 },
250 { "reldata", ppc_reldata, 0 },
251 { "rdata", ppc_rdata, 0 },
252 { "ualong", ppc_ualong, 0 },
253 { "znop", ppc_znop, 0 },
254 { "comm", ppc_pe_comm, 0 },
255 { "lcomm", ppc_pe_comm, 1 },
256 { "section", ppc_pe_section, 0 },
257 { "function", ppc_pe_function,0 },
258 { "tocd", ppc_pe_tocd, 0 },
259#endif
260
0baf16f2 261#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 262 { "tc", ppc_tc, 0 },
0baf16f2
AM
263 { "machine", ppc_machine, 0 },
264#endif
252b5132
RH
265
266 { NULL, NULL, 0 }
267};
268
269\f
99a814a1
AM
270/* Predefined register names if -mregnames (or default for Windows NT).
271 In general, there are lots of them, in an attempt to be compatible
272 with a number of other Windows NT assemblers. */
252b5132
RH
273
274/* Structure to hold information about predefined registers. */
275struct pd_reg
276 {
277 char *name;
278 int value;
279 };
280
281/* List of registers that are pre-defined:
282
283 Each general register has predefined names of the form:
284 1. r<reg_num> which has the value <reg_num>.
285 2. r.<reg_num> which has the value <reg_num>.
286
252b5132
RH
287 Each floating point register has predefined names of the form:
288 1. f<reg_num> which has the value <reg_num>.
289 2. f.<reg_num> which has the value <reg_num>.
290
7a899fff
C
291 Each vector unit register has predefined names of the form:
292 1. v<reg_num> which has the value <reg_num>.
293 2. v.<reg_num> which has the value <reg_num>.
294
252b5132
RH
295 Each condition register has predefined names of the form:
296 1. cr<reg_num> which has the value <reg_num>.
297 2. cr.<reg_num> which has the value <reg_num>.
298
299 There are individual registers as well:
300 sp or r.sp has the value 1
301 rtoc or r.toc has the value 2
302 fpscr has the value 0
303 xer has the value 1
304 lr has the value 8
305 ctr has the value 9
306 pmr has the value 0
307 dar has the value 19
308 dsisr has the value 18
309 dec has the value 22
310 sdr1 has the value 25
311 srr0 has the value 26
312 srr1 has the value 27
313
81d4177b 314 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH
315
316static const struct pd_reg pre_defined_registers[] =
317{
318 { "cr.0", 0 }, /* Condition Registers */
319 { "cr.1", 1 },
320 { "cr.2", 2 },
321 { "cr.3", 3 },
322 { "cr.4", 4 },
323 { "cr.5", 5 },
324 { "cr.6", 6 },
325 { "cr.7", 7 },
326
327 { "cr0", 0 },
328 { "cr1", 1 },
329 { "cr2", 2 },
330 { "cr3", 3 },
331 { "cr4", 4 },
332 { "cr5", 5 },
333 { "cr6", 6 },
334 { "cr7", 7 },
335
336 { "ctr", 9 },
337
338 { "dar", 19 }, /* Data Access Register */
339 { "dec", 22 }, /* Decrementer */
340 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
341
342 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH
343 { "f.1", 1 },
344 { "f.10", 10 },
345 { "f.11", 11 },
346 { "f.12", 12 },
347 { "f.13", 13 },
348 { "f.14", 14 },
349 { "f.15", 15 },
350 { "f.16", 16 },
351 { "f.17", 17 },
352 { "f.18", 18 },
353 { "f.19", 19 },
354 { "f.2", 2 },
355 { "f.20", 20 },
356 { "f.21", 21 },
357 { "f.22", 22 },
358 { "f.23", 23 },
359 { "f.24", 24 },
360 { "f.25", 25 },
361 { "f.26", 26 },
362 { "f.27", 27 },
363 { "f.28", 28 },
364 { "f.29", 29 },
365 { "f.3", 3 },
252b5132
RH
366 { "f.30", 30 },
367 { "f.31", 31 },
81d4177b
KH
368 { "f.4", 4 },
369 { "f.5", 5 },
370 { "f.6", 6 },
371 { "f.7", 7 },
372 { "f.8", 8 },
373 { "f.9", 9 },
374
375 { "f0", 0 },
376 { "f1", 1 },
377 { "f10", 10 },
378 { "f11", 11 },
379 { "f12", 12 },
380 { "f13", 13 },
381 { "f14", 14 },
382 { "f15", 15 },
383 { "f16", 16 },
384 { "f17", 17 },
385 { "f18", 18 },
386 { "f19", 19 },
387 { "f2", 2 },
388 { "f20", 20 },
389 { "f21", 21 },
390 { "f22", 22 },
391 { "f23", 23 },
392 { "f24", 24 },
393 { "f25", 25 },
394 { "f26", 26 },
395 { "f27", 27 },
396 { "f28", 28 },
397 { "f29", 29 },
398 { "f3", 3 },
252b5132
RH
399 { "f30", 30 },
400 { "f31", 31 },
81d4177b
KH
401 { "f4", 4 },
402 { "f5", 5 },
403 { "f6", 6 },
404 { "f7", 7 },
405 { "f8", 8 },
406 { "f9", 9 },
252b5132
RH
407
408 { "fpscr", 0 },
409
410 { "lr", 8 }, /* Link Register */
411
412 { "pmr", 0 },
413
414 { "r.0", 0 }, /* General Purpose Registers */
415 { "r.1", 1 },
416 { "r.10", 10 },
417 { "r.11", 11 },
418 { "r.12", 12 },
419 { "r.13", 13 },
420 { "r.14", 14 },
421 { "r.15", 15 },
422 { "r.16", 16 },
423 { "r.17", 17 },
424 { "r.18", 18 },
425 { "r.19", 19 },
426 { "r.2", 2 },
427 { "r.20", 20 },
428 { "r.21", 21 },
429 { "r.22", 22 },
430 { "r.23", 23 },
431 { "r.24", 24 },
432 { "r.25", 25 },
433 { "r.26", 26 },
434 { "r.27", 27 },
435 { "r.28", 28 },
436 { "r.29", 29 },
437 { "r.3", 3 },
438 { "r.30", 30 },
439 { "r.31", 31 },
440 { "r.4", 4 },
441 { "r.5", 5 },
442 { "r.6", 6 },
443 { "r.7", 7 },
444 { "r.8", 8 },
445 { "r.9", 9 },
446
447 { "r.sp", 1 }, /* Stack Pointer */
448
449 { "r.toc", 2 }, /* Pointer to the table of contents */
450
451 { "r0", 0 }, /* More general purpose registers */
452 { "r1", 1 },
453 { "r10", 10 },
454 { "r11", 11 },
455 { "r12", 12 },
456 { "r13", 13 },
457 { "r14", 14 },
458 { "r15", 15 },
459 { "r16", 16 },
460 { "r17", 17 },
461 { "r18", 18 },
462 { "r19", 19 },
463 { "r2", 2 },
464 { "r20", 20 },
465 { "r21", 21 },
466 { "r22", 22 },
467 { "r23", 23 },
468 { "r24", 24 },
469 { "r25", 25 },
470 { "r26", 26 },
471 { "r27", 27 },
472 { "r28", 28 },
473 { "r29", 29 },
474 { "r3", 3 },
475 { "r30", 30 },
476 { "r31", 31 },
477 { "r4", 4 },
478 { "r5", 5 },
479 { "r6", 6 },
480 { "r7", 7 },
481 { "r8", 8 },
482 { "r9", 9 },
483
484 { "rtoc", 2 }, /* Table of contents */
485
486 { "sdr1", 25 }, /* Storage Description Register 1 */
487
488 { "sp", 1 },
489
490 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
491 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 492
7a899fff 493 { "v.0", 0 }, /* Vector registers */
81d4177b
KH
494 { "v.1", 1 },
495 { "v.10", 10 },
496 { "v.11", 11 },
497 { "v.12", 12 },
498 { "v.13", 13 },
499 { "v.14", 14 },
500 { "v.15", 15 },
501 { "v.16", 16 },
502 { "v.17", 17 },
503 { "v.18", 18 },
504 { "v.19", 19 },
505 { "v.2", 2 },
506 { "v.20", 20 },
507 { "v.21", 21 },
508 { "v.22", 22 },
509 { "v.23", 23 },
510 { "v.24", 24 },
511 { "v.25", 25 },
512 { "v.26", 26 },
513 { "v.27", 27 },
514 { "v.28", 28 },
515 { "v.29", 29 },
516 { "v.3", 3 },
7a899fff
C
517 { "v.30", 30 },
518 { "v.31", 31 },
81d4177b
KH
519 { "v.4", 4 },
520 { "v.5", 5 },
521 { "v.6", 6 },
522 { "v.7", 7 },
523 { "v.8", 8 },
524 { "v.9", 9 },
7a899fff
C
525
526 { "v0", 0 },
81d4177b
KH
527 { "v1", 1 },
528 { "v10", 10 },
529 { "v11", 11 },
530 { "v12", 12 },
531 { "v13", 13 },
532 { "v14", 14 },
533 { "v15", 15 },
534 { "v16", 16 },
535 { "v17", 17 },
536 { "v18", 18 },
537 { "v19", 19 },
538 { "v2", 2 },
539 { "v20", 20 },
540 { "v21", 21 },
541 { "v22", 22 },
542 { "v23", 23 },
543 { "v24", 24 },
544 { "v25", 25 },
545 { "v26", 26 },
546 { "v27", 27 },
547 { "v28", 28 },
548 { "v29", 29 },
549 { "v3", 3 },
7a899fff
C
550 { "v30", 30 },
551 { "v31", 31 },
81d4177b
KH
552 { "v4", 4 },
553 { "v5", 5 },
554 { "v6", 6 },
555 { "v7", 7 },
556 { "v8", 8 },
7a899fff 557 { "v9", 9 },
252b5132
RH
558
559 { "xer", 1 },
560
561};
562
bc805888 563#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH
564
565/* Given NAME, find the register number associated with that name, return
566 the integer value associated with the given name or -1 on failure. */
567
568static int reg_name_search
569 PARAMS ((const struct pd_reg *, int, const char * name));
570
571static int
572reg_name_search (regs, regcount, name)
573 const struct pd_reg *regs;
574 int regcount;
575 const char *name;
576{
577 int middle, low, high;
578 int cmp;
579
580 low = 0;
581 high = regcount - 1;
582
583 do
584 {
585 middle = (low + high) / 2;
586 cmp = strcasecmp (name, regs[middle].name);
587 if (cmp < 0)
588 high = middle - 1;
589 else if (cmp > 0)
590 low = middle + 1;
591 else
592 return regs[middle].value;
593 }
594 while (low <= high);
595
596 return -1;
597}
598
599/*
99a814a1 600 * Summary of register_name.
252b5132
RH
601 *
602 * in: Input_line_pointer points to 1st char of operand.
603 *
604 * out: A expressionS.
605 * The operand may have been a register: in this case, X_op == O_register,
606 * X_add_number is set to the register number, and truth is returned.
607 * Input_line_pointer->(next non-blank) char after operand, or is in its
608 * original state.
609 */
610
b34976b6 611static bfd_boolean
252b5132
RH
612register_name (expressionP)
613 expressionS *expressionP;
614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH
623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH
627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM
631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH
636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH
641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM
645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH
649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH
657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
680ppc_parse_name (name, expr)
681 const char *name;
682 expressionS *expr;
683{
684 int val;
685
686 if (! cr_operand)
687 return 0;
688
689 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
690 name);
691 if (val < 0)
692 return 0;
693
694 expr->X_op = O_constant;
695 expr->X_add_number = val;
696
697 return 1;
698}
699\f
700/* Local variables. */
701
702/* The type of processor we are assembling for. This is one or more
703 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 704static unsigned long ppc_cpu = 0;
252b5132 705
2b3c4602
AM
706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH
709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH
720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH
727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH
730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH
789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ
796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM
804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ
806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH
810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH
818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
821
822int
823md_parse_option (c, arg)
824 int c;
825 char *arg;
826{
827 switch (c)
828 {
829 case 'u':
830 /* -u means that any undefined symbols should be treated as
831 external, which is the default for gas anyhow. */
832 break;
833
834#ifdef OBJ_ELF
835 case 'l':
836 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 837 sake, recognize -be also. */
252b5132
RH
838 if (strcmp (arg, "e") == 0)
839 {
840 target_big_endian = 0;
841 set_target_endian = 1;
842 }
843 else
844 return 0;
845
846 break;
847
848 case 'b':
849 if (strcmp (arg, "e") == 0)
850 {
851 target_big_endian = 1;
852 set_target_endian = 1;
853 }
854 else
855 return 0;
856
857 break;
858
859 case 'K':
99a814a1 860 /* Recognize -K PIC. */
252b5132
RH
861 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
862 {
863 shlib = SHLIB_PIC;
864 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
865 }
866 else
867 return 0;
868
869 break;
870#endif
871
7f6d05e8
CP
872 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
873 case 'a':
874 if (strcmp (arg, "64") == 0)
2a98c3a6
AM
875 {
876#ifdef BFD64
877 ppc_obj64 = 1;
878#else
879 as_fatal (_("%s unsupported"), "-a64");
880#endif
881 }
7f6d05e8 882 else if (strcmp (arg, "32") == 0)
2b3c4602 883 ppc_obj64 = 0;
7f6d05e8
CP
884 else
885 return 0;
886 break;
81d4177b 887
252b5132
RH
888 case 'm':
889 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
99a814a1 890 (RIOS2). */
252b5132 891 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
2b3c4602 892 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
252b5132
RH
893 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
894 else if (strcmp (arg, "pwr") == 0)
2b3c4602 895 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
23e1d84c 896 /* -m601 means to assemble for the PowerPC 601, which includes
99a814a1 897 instructions that are holdovers from the Power. */
252b5132 898 else if (strcmp (arg, "601") == 0)
b34976b6
AM
899 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
900 | PPC_OPCODE_601 | PPC_OPCODE_32);
252b5132 901 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
23e1d84c 902 PowerPC 603/604. */
252b5132
RH
903 else if (strcmp (arg, "ppc") == 0
904 || strcmp (arg, "ppc32") == 0
252b5132
RH
905 || strcmp (arg, "603") == 0
906 || strcmp (arg, "604") == 0)
6a0c61b7 907 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
23e1d84c 908 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
418c1742 909 else if (strcmp (arg, "403") == 0
b34976b6
AM
910 || strcmp (arg, "405") == 0)
911 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
912 | PPC_OPCODE_403 | PPC_OPCODE_32);
3d8aea2f
AM
913 else if (strcmp (arg, "440") == 0)
914 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
55257f50 915 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
418c1742 916 else if (strcmp (arg, "7400") == 0
b34976b6
AM
917 || strcmp (arg, "7410") == 0
918 || strcmp (arg, "7450") == 0
919 || strcmp (arg, "7455") == 0)
920 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
921 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
418c1742 922 else if (strcmp (arg, "altivec") == 0)
b34976b6
AM
923 {
924 if (ppc_cpu == 0)
925 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
926 else
927 ppc_cpu |= PPC_OPCODE_ALTIVEC;
928 }
6a0c61b7
EZ
929 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
930 {
b34976b6
AM
931 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
932 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
933 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
934 | PPC_OPCODE_RFMCI);
935 }
6a0c61b7
EZ
936 else if (strcmp (arg, "spe") == 0)
937 {
938 if (ppc_cpu == 0)
939 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
940 else
941 ppc_cpu |= PPC_OPCODE_SPE;
942 }
252b5132 943 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
99a814a1 944 620. */
252b5132
RH
945 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
946 {
6a0c61b7 947 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
252b5132 948 }
d0e9a01c
RH
949 else if (strcmp (arg, "ppc64bridge") == 0)
950 {
b34976b6
AM
951 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
952 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
418c1742
MG
953 }
954 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
955 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
6a0c61b7
EZ
956 {
957 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
958 }
418c1742
MG
959 /* -mbooke64 means enable 64-bit BookE support. */
960 else if (strcmp (arg, "booke64") == 0)
961 {
b34976b6
AM
962 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
963 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
d0e9a01c 964 }
23e1d84c
AM
965 else if (strcmp (arg, "power4") == 0)
966 {
b34976b6
AM
967 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
968 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
23e1d84c 969 }
252b5132
RH
970 /* -mcom means assemble for the common intersection between Power
971 and PowerPC. At present, we just allow the union, rather
972 than the intersection. */
973 else if (strcmp (arg, "com") == 0)
2b3c4602 974 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132
RH
975 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
976 else if (strcmp (arg, "any") == 0)
3c9030c1 977 ppc_cpu |= PPC_OPCODE_ANY;
252b5132
RH
978
979 else if (strcmp (arg, "regnames") == 0)
b34976b6 980 reg_names_p = TRUE;
252b5132
RH
981
982 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 983 reg_names_p = FALSE;
252b5132
RH
984
985#ifdef OBJ_ELF
99a814a1
AM
986 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
987 that require relocation. */
252b5132
RH
988 else if (strcmp (arg, "relocatable") == 0)
989 {
5d6f4f16 990 shlib = SHLIB_MRELOCATABLE;
252b5132
RH
991 ppc_flags |= EF_PPC_RELOCATABLE;
992 }
993
994 else if (strcmp (arg, "relocatable-lib") == 0)
995 {
5d6f4f16 996 shlib = SHLIB_MRELOCATABLE;
252b5132
RH
997 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
998 }
999
99a814a1 1000 /* -memb, set embedded bit. */
252b5132
RH
1001 else if (strcmp (arg, "emb") == 0)
1002 ppc_flags |= EF_PPC_EMB;
1003
99a814a1
AM
1004 /* -mlittle/-mbig set the endianess. */
1005 else if (strcmp (arg, "little") == 0
1006 || strcmp (arg, "little-endian") == 0)
252b5132
RH
1007 {
1008 target_big_endian = 0;
1009 set_target_endian = 1;
1010 }
1011
1012 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1013 {
1014 target_big_endian = 1;
1015 set_target_endian = 1;
1016 }
1017
1018 else if (strcmp (arg, "solaris") == 0)
1019 {
b34976b6 1020 msolaris = TRUE;
252b5132
RH
1021 ppc_comment_chars = ppc_solaris_comment_chars;
1022 }
1023
1024 else if (strcmp (arg, "no-solaris") == 0)
1025 {
b34976b6 1026 msolaris = FALSE;
252b5132
RH
1027 ppc_comment_chars = ppc_eabi_comment_chars;
1028 }
1029#endif
1030 else
1031 {
1032 as_bad (_("invalid switch -m%s"), arg);
1033 return 0;
1034 }
1035 break;
1036
1037#ifdef OBJ_ELF
1038 /* -V: SVR4 argument to print version ID. */
1039 case 'V':
1040 print_version_id ();
1041 break;
1042
1043 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1044 should be emitted or not. FIXME: Not implemented. */
1045 case 'Q':
1046 break;
1047
1048 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1049 rather than .stabs.excl, which is ignored by the linker.
1050 FIXME: Not implemented. */
1051 case 's':
1052 if (arg)
1053 return 0;
1054
1055 break;
1056#endif
1057
1058 default:
1059 return 0;
1060 }
1061
1062 return 1;
1063}
1064
1065void
1066md_show_usage (stream)
1067 FILE *stream;
1068{
bc805888 1069 fprintf (stream, _("\
252b5132 1070PowerPC options:\n\
df12615d
AM
1071-a32 generate ELF32/XCOFF32\n\
1072-a64 generate ELF64/XCOFF64\n\
252b5132 1073-u ignored\n\
23e1d84c
AM
1074-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1075-mpwr generate code for POWER (RIOS1)\n\
1076-m601 generate code for PowerPC 601\n\
418c1742 1077-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1078 generate code for PowerPC 603/604\n\
df12615d 1079-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1080-m440 generate code for PowerPC 440\n\
f5c120c5 1081-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM
1082 generate code For PowerPC 7400/7410/7450/7455\n"));
1083 fprintf (stream, _("\
23e1d84c 1084-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1085-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG
1086-mbooke64 generate code for 64-bit PowerPC BookE\n\
1087-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1088-mpower4 generate code for Power4 architecture\n\
252b5132 1089-mcom generate code Power/PowerPC common instructions\n\
df12615d 1090-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1091 fprintf (stream, _("\
df12615d 1092-maltivec generate code for AltiVec\n\
6a0c61b7 1093-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM
1094-mspe generate code for Motorola SPE instructions\n\
1095-mregnames Allow symbolic names for registers\n\
1096-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1097#ifdef OBJ_ELF
bc805888 1098 fprintf (stream, _("\
252b5132
RH
1099-mrelocatable support for GCC's -mrelocatble option\n\
1100-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1101-memb set PPC_EMB bit in ELF flags\n\
df12615d 1102-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1103 generate code for a little endian machine\n\
df12615d
AM
1104-mbig, -mbig-endian, -b, -be\n\
1105 generate code for a big endian machine\n\
252b5132
RH
1106-msolaris generate code for Solaris\n\
1107-mno-solaris do not generate code for Solaris\n\
1108-V print assembler version number\n\
1109-Qy, -Qn ignored\n"));
1110#endif
1111}
1112\f
1113/* Set ppc_cpu if it is not already set. */
1114
1115static void
1116ppc_set_cpu ()
1117{
1118 const char *default_os = TARGET_OS;
1119 const char *default_cpu = TARGET_CPU;
1120
3c9030c1 1121 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1122 {
2a98c3a6 1123 if (ppc_obj64)
3c9030c1 1124 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM
1125 else if (strncmp (default_os, "aix", 3) == 0
1126 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1127 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1128 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1129 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1130 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1131 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1132 else if (strncmp (default_cpu, "powerpc", 7) == 0)
b34976b6
AM
1133 {
1134 if (default_cpu[7] == '6' && default_cpu[8] == '4')
3c9030c1 1135 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
b34976b6 1136 else
3c9030c1 1137 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
b34976b6 1138 }
252b5132 1139 else
99a814a1
AM
1140 as_fatal (_("Unknown default cpu = %s, os = %s"),
1141 default_cpu, default_os);
252b5132
RH
1142 }
1143}
1144
1145/* Figure out the BFD architecture to use. */
1146
1147enum bfd_architecture
1148ppc_arch ()
1149{
1150 const char *default_cpu = TARGET_CPU;
1151 ppc_set_cpu ();
1152
1153 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1154 return bfd_arch_powerpc;
1155 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1156 return bfd_arch_rs6000;
1157 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1158 {
1159 if (strcmp (default_cpu, "rs6000") == 0)
1160 return bfd_arch_rs6000;
0baf16f2 1161 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH
1162 return bfd_arch_powerpc;
1163 }
1164
1165 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1166 return bfd_arch_unknown;
1167}
1168
7f6d05e8
CP
1169unsigned long
1170ppc_mach ()
1171{
2a98c3a6
AM
1172 if (ppc_obj64)
1173 return bfd_mach_ppc64;
1174 else if (ppc_arch () == bfd_arch_rs6000)
1175 return bfd_mach_rs6k;
1176 else
1177 return bfd_mach_ppc;
7f6d05e8
CP
1178}
1179
81d4177b 1180extern char*
99a814a1 1181ppc_target_format ()
7f6d05e8
CP
1182{
1183#ifdef OBJ_COFF
1184#ifdef TE_PE
99a814a1 1185 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1186#elif TE_POWERMAC
0baf16f2 1187 return "xcoff-powermac";
7f6d05e8 1188#else
eb1e0e80 1189# ifdef TE_AIX5
2b3c4602 1190 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1191# else
2b3c4602 1192 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1193# endif
7f6d05e8 1194#endif
7f6d05e8
CP
1195#endif
1196#ifdef OBJ_ELF
0baf16f2 1197 return (target_big_endian
2b3c4602
AM
1198 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1199 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
7f6d05e8
CP
1200#endif
1201}
1202
252b5132
RH
1203/* This function is called when the assembler starts up. It is called
1204 after the options have been parsed and the output file has been
1205 opened. */
1206
1207void
1208md_begin ()
1209{
1210 register const struct powerpc_opcode *op;
1211 const struct powerpc_opcode *op_end;
1212 const struct powerpc_macro *macro;
1213 const struct powerpc_macro *macro_end;
b34976b6 1214 bfd_boolean dup_insn = FALSE;
252b5132
RH
1215
1216 ppc_set_cpu ();
1217
75e21f08
JJ
1218 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1219
252b5132 1220#ifdef OBJ_ELF
81d4177b 1221 /* Set the ELF flags if desired. */
252b5132
RH
1222 if (ppc_flags && !msolaris)
1223 bfd_set_private_flags (stdoutput, ppc_flags);
1224#endif
1225
1226 /* Insert the opcodes into a hash table. */
1227 ppc_hash = hash_new ();
1228
1229 op_end = powerpc_opcodes + powerpc_num_opcodes;
1230 for (op = powerpc_opcodes; op < op_end; op++)
1231 {
1232 know ((op->opcode & op->mask) == op->opcode);
1233
2b3c4602 1234 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1235 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM
1236 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1237 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1238 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC
1239 /* Certain instructions (eg: extsw) do not exist in the
1240 32-bit BookE instruction set, but they do exist in the
1241 64-bit BookE instruction set, and other PPC instruction
1242 sets. Check to see if the opcode has the BOOKE64 flag set.
1243 If it does make sure that the target CPU is not the BookE32. */
1244 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1245 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1246 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM
1247 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1248 || ((op->flags & PPC_OPCODE_POWER4)
1249 == (ppc_cpu & PPC_OPCODE_POWER4))))
252b5132
RH
1250 {
1251 const char *retval;
1252
1253 retval = hash_insert (ppc_hash, op->name, (PTR) op);
1254 if (retval != (const char *) NULL)
1255 {
99a814a1 1256 /* Ignore Power duplicates for -m601. */
252b5132
RH
1257 if ((ppc_cpu & PPC_OPCODE_601) != 0
1258 && (op->flags & PPC_OPCODE_POWER) != 0)
1259 continue;
1260
99a814a1
AM
1261 as_bad (_("Internal assembler error for instruction %s"),
1262 op->name);
b34976b6 1263 dup_insn = TRUE;
252b5132
RH
1264 }
1265 }
1266 }
1267
3c9030c1
AM
1268 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1269 for (op = powerpc_opcodes; op < op_end; op++)
1270 hash_insert (ppc_hash, op->name, (PTR) op);
1271
252b5132
RH
1272 /* Insert the macros into a hash table. */
1273 ppc_macro_hash = hash_new ();
1274
1275 macro_end = powerpc_macros + powerpc_num_macros;
1276 for (macro = powerpc_macros; macro < macro_end; macro++)
1277 {
1278 if ((macro->flags & ppc_cpu) != 0)
1279 {
1280 const char *retval;
1281
1282 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1283 if (retval != (const char *) NULL)
1284 {
1285 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1286 dup_insn = TRUE;
252b5132
RH
1287 }
1288 }
1289 }
1290
1291 if (dup_insn)
1292 abort ();
1293
99a814a1
AM
1294 /* Tell the main code what the endianness is if it is not overidden
1295 by the user. */
252b5132
RH
1296 if (!set_target_endian)
1297 {
1298 set_target_endian = 1;
1299 target_big_endian = PPC_BIG_ENDIAN;
1300 }
1301
1302#ifdef OBJ_XCOFF
1303 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1304
1305 /* Create dummy symbols to serve as initial csects. This forces the
1306 text csects to precede the data csects. These symbols will not
1307 be output. */
1308 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1309 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1310 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1311 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH
1312#endif
1313
1314#ifdef TE_PE
1315
1316 ppc_current_section = text_section;
81d4177b 1317 ppc_previous_section = 0;
252b5132
RH
1318
1319#endif
1320}
1321
6a0c61b7
EZ
1322void
1323ppc_cleanup ()
1324{
dc1d03fc 1325#ifdef OBJ_ELF
6a0c61b7
EZ
1326 if (ppc_apuinfo_list == NULL)
1327 return;
1328
1329 /* Ok, so write the section info out. We have this layout:
1330
1331 byte data what
1332 ---- ---- ----
1333 0 8 length of "APUinfo\0"
1334 4 (n*4) number of APU's (4 bytes each)
1335 8 2 note type 2
1336 12 "APUinfo\0" name
1337 20 APU#1 first APU's info
1338 24 APU#2 second APU's info
1339 ... ...
1340 */
1341 {
1342 char *p;
1343 asection *seg = now_seg;
1344 subsegT subseg = now_subseg;
1345 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1346 unsigned int i;
6a0c61b7
EZ
1347
1348 /* Create the .PPC.EMB.apuinfo section. */
1349 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1350 bfd_set_section_flags (stdoutput,
1351 apuinfo_secp,
e1a9cb8e 1352 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ
1353
1354 p = frag_more (4);
1355 md_number_to_chars (p, (valueT) 8, 4);
1356
1357 p = frag_more (4);
e98d298c 1358 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ
1359
1360 p = frag_more (4);
1361 md_number_to_chars (p, (valueT) 2, 4);
1362
1363 p = frag_more (8);
1364 strcpy (p, "APUinfo");
1365
1366 for (i = 0; i < ppc_apuinfo_num; i++)
1367 {
b34976b6
AM
1368 p = frag_more (4);
1369 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ
1370 }
1371
1372 frag_align (2, 0, 0);
1373
1374 /* We probably can't restore the current segment, for there likely
1375 isn't one yet... */
1376 if (seg && subseg)
1377 subseg_set (seg, subseg);
1378 }
dc1d03fc 1379#endif
6a0c61b7
EZ
1380}
1381
252b5132
RH
1382/* Insert an operand value into an instruction. */
1383
1384static unsigned long
1385ppc_insert_operand (insn, operand, val, file, line)
1386 unsigned long insn;
1387 const struct powerpc_operand *operand;
1388 offsetT val;
1389 char *file;
1390 unsigned int line;
1391{
1392 if (operand->bits != 32)
1393 {
1394 long min, max;
1395 offsetT test;
1396
1397 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1398 {
d0e9a01c 1399 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH
1400 max = (1 << operand->bits) - 1;
1401 else
1402 max = (1 << (operand->bits - 1)) - 1;
1403 min = - (1 << (operand->bits - 1));
1404
2b3c4602 1405 if (!ppc_obj64)
252b5132
RH
1406 {
1407 /* Some people write 32 bit hex constants with the sign
1408 extension done by hand. This shouldn't really be
1409 valid, but, to permit this code to assemble on a 64
1410 bit host, we sign extend the 32 bit value. */
1411 if (val > 0
92161534
ILT
1412 && (val & (offsetT) 0x80000000) != 0
1413 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH
1414 {
1415 val -= 0x80000000;
1416 val -= 0x80000000;
1417 }
1418 }
1419 }
1420 else
1421 {
1422 max = (1 << operand->bits) - 1;
1423 min = 0;
1424 }
1425
1426 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1427 test = - val;
1428 else
1429 test = val;
1430
1431 if (test < (offsetT) min || test > (offsetT) max)
1432 {
1433 const char *err =
1434 _("operand out of range (%s not between %ld and %ld)");
1435 char buf[100];
1436
1437 sprint_value (buf, test);
0baf16f2 1438 as_bad_where (file, line, err, buf, min, max);
252b5132
RH
1439 }
1440 }
1441
1442 if (operand->insert)
1443 {
1444 const char *errmsg;
1445
1446 errmsg = NULL;
2b3c4602 1447 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1448 if (errmsg != (const char *) NULL)
0baf16f2 1449 as_bad_where (file, line, errmsg);
252b5132
RH
1450 }
1451 else
1452 insn |= (((long) val & ((1 << operand->bits) - 1))
1453 << operand->shift);
1454
1455 return insn;
1456}
1457
1458\f
1459#ifdef OBJ_ELF
1460/* Parse @got, etc. and return the desired relocation. */
1461static bfd_reloc_code_real_type
1462ppc_elf_suffix (str_p, exp_p)
1463 char **str_p;
1464 expressionS *exp_p;
1465{
1466 struct map_bfd {
1467 char *string;
1468 int length;
15c1449b 1469 int reloc;
252b5132
RH
1470 };
1471
1472 char ident[20];
1473 char *str = *str_p;
1474 char *str2;
1475 int ch;
1476 int len;
15c1449b 1477 const struct map_bfd *ptr;
252b5132 1478
bc805888 1479#define MAP(str,reloc) { str, sizeof (str)-1, reloc }
252b5132 1480
15c1449b 1481 static const struct map_bfd mapping[] = {
cdba85ec
AM
1482 MAP ("l", (int) BFD_RELOC_LO16),
1483 MAP ("h", (int) BFD_RELOC_HI16),
1484 MAP ("ha", (int) BFD_RELOC_HI16_S),
1485 MAP ("brtaken", (int) BFD_RELOC_PPC_B16_BRTAKEN),
1486 MAP ("brntaken", (int) BFD_RELOC_PPC_B16_BRNTAKEN),
1487 MAP ("got", (int) BFD_RELOC_16_GOTOFF),
1488 MAP ("got@l", (int) BFD_RELOC_LO16_GOTOFF),
1489 MAP ("got@h", (int) BFD_RELOC_HI16_GOTOFF),
1490 MAP ("got@ha", (int) BFD_RELOC_HI16_S_GOTOFF),
1491 MAP ("fixup", (int) BFD_RELOC_CTOR),
1492 MAP ("plt", (int) BFD_RELOC_24_PLT_PCREL),
1493 MAP ("pltrel24", (int) BFD_RELOC_24_PLT_PCREL),
1494 MAP ("copy", (int) BFD_RELOC_PPC_COPY),
1495 MAP ("globdat", (int) BFD_RELOC_PPC_GLOB_DAT),
1496 MAP ("local24pc", (int) BFD_RELOC_PPC_LOCAL24PC),
1497 MAP ("local", (int) BFD_RELOC_PPC_LOCAL24PC),
1498 MAP ("pltrel", (int) BFD_RELOC_32_PLT_PCREL),
1499 MAP ("plt@l", (int) BFD_RELOC_LO16_PLTOFF),
1500 MAP ("plt@h", (int) BFD_RELOC_HI16_PLTOFF),
1501 MAP ("plt@ha", (int) BFD_RELOC_HI16_S_PLTOFF),
1502 MAP ("sdarel", (int) BFD_RELOC_GPREL16),
1503 MAP ("sectoff", (int) BFD_RELOC_16_BASEREL),
1504 MAP ("sectoff@l", (int) BFD_RELOC_LO16_BASEREL),
1505 MAP ("sectoff@h", (int) BFD_RELOC_HI16_BASEREL),
1506 MAP ("sectoff@ha", (int) BFD_RELOC_HI16_S_BASEREL),
1507 MAP ("naddr", (int) BFD_RELOC_PPC_EMB_NADDR32),
1508 MAP ("naddr16", (int) BFD_RELOC_PPC_EMB_NADDR16),
1509 MAP ("naddr@l", (int) BFD_RELOC_PPC_EMB_NADDR16_LO),
1510 MAP ("naddr@h", (int) BFD_RELOC_PPC_EMB_NADDR16_HI),
1511 MAP ("naddr@ha", (int) BFD_RELOC_PPC_EMB_NADDR16_HA),
1512 MAP ("sdai16", (int) BFD_RELOC_PPC_EMB_SDAI16),
1513 MAP ("sda2rel", (int) BFD_RELOC_PPC_EMB_SDA2REL),
1514 MAP ("sda2i16", (int) BFD_RELOC_PPC_EMB_SDA2I16),
1515 MAP ("sda21", (int) BFD_RELOC_PPC_EMB_SDA21),
1516 MAP ("mrkref", (int) BFD_RELOC_PPC_EMB_MRKREF),
1517 MAP ("relsect", (int) BFD_RELOC_PPC_EMB_RELSEC16),
1518 MAP ("relsect@l", (int) BFD_RELOC_PPC_EMB_RELST_LO),
1519 MAP ("relsect@h", (int) BFD_RELOC_PPC_EMB_RELST_HI),
1520 MAP ("relsect@ha", (int) BFD_RELOC_PPC_EMB_RELST_HA),
1521 MAP ("bitfld", (int) BFD_RELOC_PPC_EMB_BIT_FLD),
1522 MAP ("relsda", (int) BFD_RELOC_PPC_EMB_RELSDA),
1523 MAP ("xgot", (int) BFD_RELOC_PPC_TOC16),
1524 MAP ("tls", (int) BFD_RELOC_PPC_TLS),
1525 MAP ("dtpmod", (int) BFD_RELOC_PPC_DTPMOD),
1526 MAP ("dtprel", (int) BFD_RELOC_PPC_DTPREL),
1527 MAP ("dtprel@l", (int) BFD_RELOC_PPC_DTPREL16_LO),
1528 MAP ("dtprel@h", (int) BFD_RELOC_PPC_DTPREL16_HI),
1529 MAP ("dtprel@ha", (int) BFD_RELOC_PPC_DTPREL16_HA),
1530 MAP ("tprel", (int) BFD_RELOC_PPC_TPREL),
1531 MAP ("tprel@l", (int) BFD_RELOC_PPC_TPREL16_LO),
1532 MAP ("tprel@h", (int) BFD_RELOC_PPC_TPREL16_HI),
1533 MAP ("tprel@ha", (int) BFD_RELOC_PPC_TPREL16_HA),
1534 MAP ("got@tlsgd", (int) BFD_RELOC_PPC_GOT_TLSGD16),
1535 MAP ("got@tlsgd@l", (int) BFD_RELOC_PPC_GOT_TLSGD16_LO),
1536 MAP ("got@tlsgd@h", (int) BFD_RELOC_PPC_GOT_TLSGD16_HI),
1537 MAP ("got@tlsgd@ha", (int) BFD_RELOC_PPC_GOT_TLSGD16_HA),
1538 MAP ("got@tlsld", (int) BFD_RELOC_PPC_GOT_TLSLD16),
1539 MAP ("got@tlsld@l", (int) BFD_RELOC_PPC_GOT_TLSLD16_LO),
1540 MAP ("got@tlsld@h", (int) BFD_RELOC_PPC_GOT_TLSLD16_HI),
1541 MAP ("got@tlsld@ha", (int) BFD_RELOC_PPC_GOT_TLSLD16_HA),
1542 MAP ("got@dtprel", (int) BFD_RELOC_PPC_GOT_DTPREL16),
1543 MAP ("got@dtprel@l", (int) BFD_RELOC_PPC_GOT_DTPREL16_LO),
1544 MAP ("got@dtprel@h", (int) BFD_RELOC_PPC_GOT_DTPREL16_HI),
1545 MAP ("got@dtprel@ha", (int) BFD_RELOC_PPC_GOT_DTPREL16_HA),
1546 MAP ("got@tprel", (int) BFD_RELOC_PPC_GOT_TPREL16),
1547 MAP ("got@tprel@l", (int) BFD_RELOC_PPC_GOT_TPREL16_LO),
1548 MAP ("got@tprel@h", (int) BFD_RELOC_PPC_GOT_TPREL16_HI),
1549 MAP ("got@tprel@ha", (int) BFD_RELOC_PPC_GOT_TPREL16_HA),
2b3c4602
AM
1550 /* The following are only valid for ppc64. Negative values are
1551 used instead of a flag. */
cdba85ec
AM
1552 MAP ("higher", - (int) BFD_RELOC_PPC64_HIGHER),
1553 MAP ("highera", - (int) BFD_RELOC_PPC64_HIGHER_S),
1554 MAP ("highest", - (int) BFD_RELOC_PPC64_HIGHEST),
1555 MAP ("highesta", - (int) BFD_RELOC_PPC64_HIGHEST_S),
1556 MAP ("tocbase", - (int) BFD_RELOC_PPC64_TOC),
1557 MAP ("toc", - (int) BFD_RELOC_PPC_TOC16),
1558 MAP ("toc@l", - (int) BFD_RELOC_PPC64_TOC16_LO),
1559 MAP ("toc@h", - (int) BFD_RELOC_PPC64_TOC16_HI),
1560 MAP ("toc@ha", - (int) BFD_RELOC_PPC64_TOC16_HA),
1561 MAP ("dtprel@higher", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHER),
1562 MAP ("dtprel@highera", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1563 MAP ("dtprel@highest", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1564 MAP ("dtprel@highesta", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1565 MAP ("tprel@higher", - (int) BFD_RELOC_PPC64_TPREL16_HIGHER),
1566 MAP ("tprel@highera", - (int) BFD_RELOC_PPC64_TPREL16_HIGHERA),
1567 MAP ("tprel@highest", - (int) BFD_RELOC_PPC64_TPREL16_HIGHEST),
1568 MAP ("tprel@highesta", - (int) BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1569 { (char *) 0, 0, (int) BFD_RELOC_UNUSED }
252b5132
RH
1570 };
1571
1572 if (*str++ != '@')
1573 return BFD_RELOC_UNUSED;
1574
1575 for (ch = *str, str2 = ident;
1576 (str2 < ident + sizeof (ident) - 1
3882b010 1577 && (ISALNUM (ch) || ch == '@'));
252b5132
RH
1578 ch = *++str)
1579 {
3882b010 1580 *str2++ = TOLOWER (ch);
252b5132
RH
1581 }
1582
1583 *str2 = '\0';
1584 len = str2 - ident;
1585
1586 ch = ident[0];
1587 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1588 if (ch == ptr->string[0]
1589 && len == ptr->length
1590 && memcmp (ident, ptr->string, ptr->length) == 0)
1591 {
15c1449b
AM
1592 int reloc = ptr->reloc;
1593
2b3c4602 1594 if (reloc < 0)
15c1449b 1595 {
2b3c4602 1596 if (!ppc_obj64)
15c1449b
AM
1597 return BFD_RELOC_UNUSED;
1598 reloc = -reloc;
1599 }
1600
cdba85ec 1601 if (!ppc_obj64)
5f6db75a
AM
1602 if (exp_p->X_add_number != 0
1603 && (reloc == (int) BFD_RELOC_16_GOTOFF
1604 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1605 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1606 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1607 as_warn (_("identifier+constant@got means identifier@got+constant"));
1608
1609 /* Now check for identifier@suffix+constant. */
1610 if (*str == '-' || *str == '+')
252b5132 1611 {
5f6db75a
AM
1612 char *orig_line = input_line_pointer;
1613 expressionS new_exp;
1614
1615 input_line_pointer = str;
1616 expression (&new_exp);
1617 if (new_exp.X_op == O_constant)
252b5132 1618 {
5f6db75a
AM
1619 exp_p->X_add_number += new_exp.X_add_number;
1620 str = input_line_pointer;
252b5132 1621 }
5f6db75a
AM
1622
1623 if (&input_line_pointer != str_p)
1624 input_line_pointer = orig_line;
252b5132 1625 }
252b5132 1626 *str_p = str;
0baf16f2 1627
2b3c4602 1628 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM
1629 && exp_p->X_op == O_symbol
1630 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1631 {
9f2b53d7
AM
1632 /* Change the symbol so that the dummy .TOC. symbol can be
1633 omitted from the object file. */
0baf16f2
AM
1634 exp_p->X_add_symbol = &abs_symbol;
1635 }
1636
15c1449b 1637 return (bfd_reloc_code_real_type) reloc;
252b5132
RH
1638 }
1639
1640 return BFD_RELOC_UNUSED;
1641}
1642
99a814a1
AM
1643/* Like normal .long/.short/.word, except support @got, etc.
1644 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH
1645static void
1646ppc_elf_cons (nbytes)
0baf16f2 1647 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH
1648{
1649 expressionS exp;
1650 bfd_reloc_code_real_type reloc;
1651
1652 if (is_it_end_of_statement ())
1653 {
1654 demand_empty_rest_of_line ();
1655 return;
1656 }
1657
1658 do
1659 {
1660 expression (&exp);
1661 if (exp.X_op == O_symbol
1662 && *input_line_pointer == '@'
99a814a1
AM
1663 && (reloc = ppc_elf_suffix (&input_line_pointer,
1664 &exp)) != BFD_RELOC_UNUSED)
252b5132 1665 {
99a814a1
AM
1666 reloc_howto_type *reloc_howto;
1667 int size;
1668
1669 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1670 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH
1671
1672 if (size > nbytes)
0baf16f2
AM
1673 {
1674 as_bad (_("%s relocations do not fit in %d bytes\n"),
1675 reloc_howto->name, nbytes);
1676 }
252b5132
RH
1677 else
1678 {
0baf16f2
AM
1679 char *p;
1680 int offset;
252b5132 1681
0baf16f2
AM
1682 p = frag_more (nbytes);
1683 offset = 0;
1684 if (target_big_endian)
1685 offset = nbytes - size;
99a814a1
AM
1686 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1687 &exp, 0, reloc);
252b5132
RH
1688 }
1689 }
1690 else
1691 emit_expr (&exp, (unsigned int) nbytes);
1692 }
1693 while (*input_line_pointer++ == ',');
1694
99a814a1
AM
1695 /* Put terminator back into stream. */
1696 input_line_pointer--;
252b5132
RH
1697 demand_empty_rest_of_line ();
1698}
1699
1700/* Solaris pseduo op to change to the .rodata section. */
1701static void
1702ppc_elf_rdata (xxx)
1703 int xxx;
1704{
1705 char *save_line = input_line_pointer;
1706 static char section[] = ".rodata\n";
1707
99a814a1 1708 /* Just pretend this is .section .rodata */
252b5132
RH
1709 input_line_pointer = section;
1710 obj_elf_section (xxx);
1711
1712 input_line_pointer = save_line;
1713}
1714
99a814a1 1715/* Pseudo op to make file scope bss items. */
252b5132 1716static void
99a814a1 1717ppc_elf_lcomm (xxx)
92161534 1718 int xxx ATTRIBUTE_UNUSED;
252b5132
RH
1719{
1720 register char *name;
1721 register char c;
1722 register char *p;
1723 offsetT size;
1724 register symbolS *symbolP;
1725 offsetT align;
1726 segT old_sec;
1727 int old_subsec;
1728 char *pfrag;
1729 int align2;
1730
1731 name = input_line_pointer;
1732 c = get_symbol_end ();
1733
99a814a1 1734 /* just after name is now '\0'. */
252b5132
RH
1735 p = input_line_pointer;
1736 *p = c;
1737 SKIP_WHITESPACE ();
1738 if (*input_line_pointer != ',')
1739 {
1740 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1741 ignore_rest_of_line ();
1742 return;
1743 }
1744
1745 input_line_pointer++; /* skip ',' */
1746 if ((size = get_absolute_expression ()) < 0)
1747 {
1748 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1749 ignore_rest_of_line ();
1750 return;
1751 }
1752
1753 /* The third argument to .lcomm is the alignment. */
1754 if (*input_line_pointer != ',')
1755 align = 8;
1756 else
1757 {
1758 ++input_line_pointer;
1759 align = get_absolute_expression ();
1760 if (align <= 0)
1761 {
1762 as_warn (_("ignoring bad alignment"));
1763 align = 8;
1764 }
1765 }
1766
1767 *p = 0;
1768 symbolP = symbol_find_or_make (name);
1769 *p = c;
1770
1771 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1772 {
1773 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1774 S_GET_NAME (symbolP));
1775 ignore_rest_of_line ();
1776 return;
1777 }
1778
1779 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1780 {
1781 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1782 S_GET_NAME (symbolP),
1783 (long) S_GET_VALUE (symbolP),
1784 (long) size);
1785
1786 ignore_rest_of_line ();
1787 return;
1788 }
1789
99a814a1 1790 /* Allocate_bss. */
252b5132
RH
1791 old_sec = now_seg;
1792 old_subsec = now_subseg;
1793 if (align)
1794 {
99a814a1 1795 /* Convert to a power of 2 alignment. */
252b5132
RH
1796 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1797 if (align != 1)
1798 {
1799 as_bad (_("Common alignment not a power of 2"));
1800 ignore_rest_of_line ();
1801 return;
1802 }
1803 }
1804 else
1805 align2 = 0;
1806
1807 record_alignment (bss_section, align2);
1808 subseg_set (bss_section, 0);
1809 if (align2)
1810 frag_align (align2, 0, 0);
1811 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT
1812 symbol_get_frag (symbolP)->fr_symbol = 0;
1813 symbol_set_frag (symbolP, frag_now);
252b5132
RH
1814 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1815 (char *) 0);
1816 *pfrag = 0;
1817 S_SET_SIZE (symbolP, size);
1818 S_SET_SEGMENT (symbolP, bss_section);
1819 subseg_set (old_sec, old_subsec);
1820 demand_empty_rest_of_line ();
1821}
1822
1823/* Validate any relocations emitted for -mrelocatable, possibly adding
1824 fixups for word relocations in writable segments, so we can adjust
1825 them at runtime. */
1826static void
1827ppc_elf_validate_fix (fixp, seg)
1828 fixS *fixp;
1829 segT seg;
1830{
1831 if (fixp->fx_done || fixp->fx_pcrel)
1832 return;
1833
1834 switch (shlib)
1835 {
1836 case SHLIB_NONE:
1837 case SHLIB_PIC:
1838 return;
1839
5d6f4f16 1840 case SHLIB_MRELOCATABLE:
252b5132
RH
1841 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1842 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1843 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1844 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1845 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1846 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH
1847 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1848 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1849 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1850 && (seg->flags & SEC_LOAD) != 0
252b5132
RH
1851 && strcmp (segment_name (seg), ".got2") != 0
1852 && strcmp (segment_name (seg), ".dtors") != 0
1853 && strcmp (segment_name (seg), ".ctors") != 0
1854 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH
1855 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1856 && strcmp (segment_name (seg), ".eh_frame") != 0
1857 && strcmp (segment_name (seg), ".ex_shared") != 0)
1858 {
1859 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1860 || fixp->fx_r_type != BFD_RELOC_CTOR)
1861 {
1862 as_bad_where (fixp->fx_file, fixp->fx_line,
1863 _("Relocation cannot be done when using -mrelocatable"));
1864 }
1865 }
1866 return;
1867 }
1868}
0baf16f2 1869
7e8d4ab4
AM
1870/* Prevent elf_frob_file_before_adjust removing a weak undefined
1871 function descriptor sym if the corresponding code sym is used. */
1872
1873void
1874ppc_frob_file_before_adjust ()
0baf16f2 1875{
7e8d4ab4 1876 symbolS *symp;
0baf16f2 1877
7e8d4ab4
AM
1878 if (!ppc_obj64)
1879 return;
1880
1881 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1882 {
7e8d4ab4
AM
1883 const char *name;
1884 char *dotname;
1885 symbolS *dotsym;
1886 size_t len;
1887
1888 name = S_GET_NAME (symp);
1889 if (name[0] == '.')
1890 continue;
1891
1892 if (! S_IS_WEAK (symp)
1893 || S_IS_DEFINED (symp))
1894 continue;
1895
1896 len = strlen (name) + 1;
1897 dotname = xmalloc (len + 1);
1898 dotname[0] = '.';
1899 memcpy (dotname + 1, name, len);
1900 dotsym = symbol_find (dotname);
1901 free (dotname);
1902 if (dotsym != NULL && (symbol_used_p (dotsym)
1903 || symbol_used_in_reloc_p (dotsym)))
1904 {
1905 symbol_mark_used (symp);
1906 }
0baf16f2
AM
1907 }
1908
7e8d4ab4
AM
1909 /* Don't emit .TOC. symbol. */
1910 symp = symbol_find (".TOC.");
1911 if (symp != NULL)
1912 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1913}
252b5132
RH
1914#endif /* OBJ_ELF */
1915\f
1916#ifdef TE_PE
1917
1918/*
99a814a1 1919 * Summary of parse_toc_entry.
252b5132
RH
1920 *
1921 * in: Input_line_pointer points to the '[' in one of:
1922 *
1923 * [toc] [tocv] [toc32] [toc64]
1924 *
1925 * Anything else is an error of one kind or another.
1926 *
81d4177b 1927 * out:
252b5132
RH
1928 * return value: success or failure
1929 * toc_kind: kind of toc reference
1930 * input_line_pointer:
1931 * success: first char after the ']'
1932 * failure: unchanged
1933 *
1934 * settings:
1935 *
1936 * [toc] - rv == success, toc_kind = default_toc
1937 * [tocv] - rv == success, toc_kind = data_in_toc
1938 * [toc32] - rv == success, toc_kind = must_be_32
1939 * [toc64] - rv == success, toc_kind = must_be_64
1940 *
1941 */
1942
81d4177b
KH
1943enum toc_size_qualifier
1944{
252b5132
RH
1945 default_toc, /* The toc cell constructed should be the system default size */
1946 data_in_toc, /* This is a direct reference to a toc cell */
1947 must_be_32, /* The toc cell constructed must be 32 bits wide */
1948 must_be_64 /* The toc cell constructed must be 64 bits wide */
1949};
1950
1951static int
99a814a1 1952parse_toc_entry (toc_kind)
252b5132
RH
1953 enum toc_size_qualifier *toc_kind;
1954{
1955 char *start;
1956 char *toc_spec;
1957 char c;
1958 enum toc_size_qualifier t;
1959
99a814a1 1960 /* Save the input_line_pointer. */
252b5132
RH
1961 start = input_line_pointer;
1962
99a814a1 1963 /* Skip over the '[' , and whitespace. */
252b5132
RH
1964 ++input_line_pointer;
1965 SKIP_WHITESPACE ();
81d4177b 1966
99a814a1 1967 /* Find the spelling of the operand. */
252b5132
RH
1968 toc_spec = input_line_pointer;
1969 c = get_symbol_end ();
1970
99a814a1 1971 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH
1972 {
1973 t = default_toc;
1974 }
99a814a1 1975 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH
1976 {
1977 t = data_in_toc;
1978 }
99a814a1 1979 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH
1980 {
1981 t = must_be_32;
1982 }
99a814a1 1983 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH
1984 {
1985 t = must_be_64;
1986 }
1987 else
1988 {
1989 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM
1990 *input_line_pointer = c;
1991 input_line_pointer = start;
252b5132
RH
1992 return 0;
1993 }
1994
99a814a1
AM
1995 /* Now find the ']'. */
1996 *input_line_pointer = c;
252b5132 1997
81d4177b
KH
1998 SKIP_WHITESPACE (); /* leading whitespace could be there. */
1999 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH
2000
2001 if (c != ']')
2002 {
2003 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2004 input_line_pointer = start;
252b5132
RH
2005 return 0;
2006 }
2007
99a814a1 2008 *toc_kind = t;
252b5132
RH
2009 return 1;
2010}
2011#endif
2012\f
2013
dc1d03fc 2014#ifdef OBJ_ELF
6a0c61b7
EZ
2015#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2016static void
dc1d03fc 2017ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ
2018 unsigned int apu, version;
2019{
2020 unsigned int i;
2021
2022 /* Check we don't already exist. */
2023 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2024 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2025 return;
b34976b6 2026
6a0c61b7
EZ
2027 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2028 {
2029 if (ppc_apuinfo_num_alloc == 0)
2030 {
2031 ppc_apuinfo_num_alloc = 4;
2032 ppc_apuinfo_list = (unsigned long *)
2033 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2034 }
2035 else
2036 {
2037 ppc_apuinfo_num_alloc += 4;
2038 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2039 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2040 }
2041 }
dc1d03fc 2042 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ
2043}
2044#undef APUID
dc1d03fc 2045#endif
6a0c61b7
EZ
2046\f
2047
252b5132
RH
2048/* We need to keep a list of fixups. We can't simply generate them as
2049 we go, because that would require us to first create the frag, and
2050 that would screw up references to ``.''. */
2051
2052struct ppc_fixup
2053{
2054 expressionS exp;
2055 int opindex;
2056 bfd_reloc_code_real_type reloc;
2057};
2058
2059#define MAX_INSN_FIXUPS (5)
2060
2061/* This routine is called for each instruction to be assembled. */
2062
2063void
2064md_assemble (str)
2065 char *str;
2066{
2067 char *s;
2068 const struct powerpc_opcode *opcode;
2069 unsigned long insn;
2070 const unsigned char *opindex_ptr;
2071 int skip_optional;
2072 int need_paren;
2073 int next_opindex;
2074 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2075 int fc;
2076 char *f;
2077 int i;
2078#ifdef OBJ_ELF
2079 bfd_reloc_code_real_type reloc;
2080#endif
2081
2082 /* Get the opcode. */
3882b010 2083 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH
2084 ;
2085 if (*s != '\0')
2086 *s++ = '\0';
2087
2088 /* Look up the opcode in the hash table. */
2089 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2090 if (opcode == (const struct powerpc_opcode *) NULL)
2091 {
2092 const struct powerpc_macro *macro;
2093
2094 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2095 if (macro == (const struct powerpc_macro *) NULL)
2096 as_bad (_("Unrecognized opcode: `%s'"), str);
2097 else
2098 ppc_macro (s, macro);
2099
2100 return;
2101 }
2102
2103 insn = opcode->opcode;
2104
2105 str = s;
3882b010 2106 while (ISSPACE (*str))
252b5132
RH
2107 ++str;
2108
2109 /* PowerPC operands are just expressions. The only real issue is
2110 that a few operand types are optional. All cases which might use
2111 an optional operand separate the operands only with commas (in
2112 some cases parentheses are used, as in ``lwz 1,0(1)'' but such
2113 cases never have optional operands). There is never more than
2114 one optional operand for an instruction. So, before we start
2115 seriously parsing the operands, we check to see if we have an
2116 optional operand, and, if we do, we count the number of commas to
2117 see whether the operand should be omitted. */
2118 skip_optional = 0;
2119 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2120 {
2121 const struct powerpc_operand *operand;
2122
2123 operand = &powerpc_operands[*opindex_ptr];
2124 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2125 {
2126 unsigned int opcount;
7fe9cf6b
NC
2127 unsigned int num_operands_expected;
2128 unsigned int i;
252b5132
RH
2129
2130 /* There is an optional operand. Count the number of
2131 commas in the input line. */
2132 if (*str == '\0')
2133 opcount = 0;
2134 else
2135 {
2136 opcount = 1;
2137 s = str;
2138 while ((s = strchr (s, ',')) != (char *) NULL)
2139 {
2140 ++opcount;
2141 ++s;
2142 }
2143 }
2144
7fe9cf6b
NC
2145 /* Compute the number of expected operands.
2146 Do not count fake operands. */
2147 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2148 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2149 ++ num_operands_expected;
2150
252b5132
RH
2151 /* If there are fewer operands in the line then are called
2152 for by the instruction, we want to skip the optional
2153 operand. */
7fe9cf6b 2154 if (opcount < num_operands_expected)
252b5132
RH
2155 skip_optional = 1;
2156
2157 break;
2158 }
2159 }
2160
2161 /* Gather the operands. */
2162 need_paren = 0;
2163 next_opindex = 0;
2164 fc = 0;
2165 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2166 {
2167 const struct powerpc_operand *operand;
2168 const char *errmsg;
2169 char *hold;
2170 expressionS ex;
2171 char endc;
2172
2173 if (next_opindex == 0)
2174 operand = &powerpc_operands[*opindex_ptr];
2175 else
2176 {
2177 operand = &powerpc_operands[next_opindex];
2178 next_opindex = 0;
2179 }
252b5132
RH
2180 errmsg = NULL;
2181
2182 /* If this is a fake operand, then we do not expect anything
2183 from the input. */
2184 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2185 {
2b3c4602 2186 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH
2187 if (errmsg != (const char *) NULL)
2188 as_bad (errmsg);
2189 continue;
2190 }
2191
2192 /* If this is an optional operand, and we are skipping it, just
2193 insert a zero. */
2194 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2195 && skip_optional)
2196 {
2197 if (operand->insert)
2198 {
2b3c4602 2199 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH
2200 if (errmsg != (const char *) NULL)
2201 as_bad (errmsg);
2202 }
2203 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2204 next_opindex = *opindex_ptr + 1;
2205 continue;
2206 }
2207
2208 /* Gather the operand. */
2209 hold = input_line_pointer;
2210 input_line_pointer = str;
2211
2212#ifdef TE_PE
81d4177b 2213 if (*input_line_pointer == '[')
252b5132
RH
2214 {
2215 /* We are expecting something like the second argument here:
99a814a1
AM
2216 *
2217 * lwz r4,[toc].GS.0.static_int(rtoc)
2218 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2219 * The argument following the `]' must be a symbol name, and the
2220 * register must be the toc register: 'rtoc' or '2'
2221 *
2222 * The effect is to 0 as the displacement field
2223 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2224 * the appropriate variation) reloc against it based on the symbol.
2225 * The linker will build the toc, and insert the resolved toc offset.
2226 *
2227 * Note:
2228 * o The size of the toc entry is currently assumed to be
2229 * 32 bits. This should not be assumed to be a hard coded
2230 * number.
2231 * o In an effort to cope with a change from 32 to 64 bits,
2232 * there are also toc entries that are specified to be
2233 * either 32 or 64 bits:
2234 * lwz r4,[toc32].GS.0.static_int(rtoc)
2235 * lwz r4,[toc64].GS.0.static_int(rtoc)
2236 * These demand toc entries of the specified size, and the
2237 * instruction probably requires it.
2238 */
252b5132
RH
2239
2240 int valid_toc;
2241 enum toc_size_qualifier toc_kind;
2242 bfd_reloc_code_real_type toc_reloc;
2243
99a814a1
AM
2244 /* Go parse off the [tocXX] part. */
2245 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2246
81d4177b 2247 if (!valid_toc)
252b5132 2248 {
99a814a1
AM
2249 /* Note: message has already been issued.
2250 FIXME: what sort of recovery should we do?
2251 demand_rest_of_line (); return; ? */
252b5132
RH
2252 }
2253
99a814a1
AM
2254 /* Now get the symbol following the ']'. */
2255 expression (&ex);
252b5132
RH
2256
2257 switch (toc_kind)
2258 {
2259 case default_toc:
99a814a1
AM
2260 /* In this case, we may not have seen the symbol yet,
2261 since it is allowed to appear on a .extern or .globl
2262 or just be a label in the .data section. */
252b5132
RH
2263 toc_reloc = BFD_RELOC_PPC_TOC16;
2264 break;
2265 case data_in_toc:
99a814a1
AM
2266 /* 1. The symbol must be defined and either in the toc
2267 section, or a global.
2268 2. The reloc generated must have the TOCDEFN flag set
2269 in upper bit mess of the reloc type.
2270 FIXME: It's a little confusing what the tocv
2271 qualifier can be used for. At the very least, I've
2272 seen three uses, only one of which I'm sure I can
2273 explain. */
81d4177b
KH
2274 if (ex.X_op == O_symbol)
2275 {
252b5132 2276 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT
2277 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2278 != tocdata_section)
252b5132 2279 {
99a814a1 2280 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH
2281 }
2282 }
2283
2284 toc_reloc = BFD_RELOC_PPC_TOC16;
2285 break;
2286 case must_be_32:
99a814a1
AM
2287 /* FIXME: these next two specifically specify 32/64 bit
2288 toc entries. We don't support them today. Is this
2289 the right way to say that? */
252b5132
RH
2290 toc_reloc = BFD_RELOC_UNUSED;
2291 as_bad (_("Unimplemented toc32 expression modifier"));
2292 break;
2293 case must_be_64:
99a814a1 2294 /* FIXME: see above. */
252b5132
RH
2295 toc_reloc = BFD_RELOC_UNUSED;
2296 as_bad (_("Unimplemented toc64 expression modifier"));
2297 break;
2298 default:
bc805888 2299 fprintf (stderr,
99a814a1
AM
2300 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2301 toc_kind);
bc805888 2302 abort ();
252b5132
RH
2303 break;
2304 }
2305
2306 /* We need to generate a fixup for this expression. */
2307 if (fc >= MAX_INSN_FIXUPS)
2308 as_fatal (_("too many fixups"));
2309
2310 fixups[fc].reloc = toc_reloc;
2311 fixups[fc].exp = ex;
2312 fixups[fc].opindex = *opindex_ptr;
2313 ++fc;
2314
99a814a1
AM
2315 /* Ok. We've set up the fixup for the instruction. Now make it
2316 look like the constant 0 was found here. */
252b5132
RH
2317 ex.X_unsigned = 1;
2318 ex.X_op = O_constant;
2319 ex.X_add_number = 0;
2320 ex.X_add_symbol = NULL;
2321 ex.X_op_symbol = NULL;
2322 }
2323
2324 else
2325#endif /* TE_PE */
2326 {
2327 if (! register_name (&ex))
2328 {
2329 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2330 cr_operand = TRUE;
252b5132 2331 expression (&ex);
b34976b6 2332 cr_operand = FALSE;
252b5132
RH
2333 }
2334 }
2335
2336 str = input_line_pointer;
2337 input_line_pointer = hold;
2338
2339 if (ex.X_op == O_illegal)
2340 as_bad (_("illegal operand"));
2341 else if (ex.X_op == O_absent)
2342 as_bad (_("missing operand"));
2343 else if (ex.X_op == O_register)
2344 {
2345 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2346 (char *) NULL, 0);
2347 }
2348 else if (ex.X_op == O_constant)
2349 {
2350#ifdef OBJ_ELF
81d4177b 2351 /* Allow @HA, @L, @H on constants. */
252b5132
RH
2352 char *orig_str = str;
2353
2354 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2355 switch (reloc)
2356 {
2357 default:
2358 str = orig_str;
2359 break;
2360
2361 case BFD_RELOC_LO16:
2362 /* X_unsigned is the default, so if the user has done
0baf16f2
AM
2363 something which cleared it, we always produce a
2364 signed value. */
2365 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH
2366 ex.X_add_number &= 0xffff;
2367 else
0baf16f2 2368 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH
2369 break;
2370
2371 case BFD_RELOC_HI16:
0baf16f2
AM
2372 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2373 ex.X_add_number = PPC_HI (ex.X_add_number);
2374 else
2375 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH
2376 break;
2377
2378 case BFD_RELOC_HI16_S:
0baf16f2
AM
2379 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2380 ex.X_add_number = PPC_HA (ex.X_add_number);
2381 else
2382 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2383 break;
2384
0baf16f2
AM
2385 case BFD_RELOC_PPC64_HIGHER:
2386 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2387 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2388 else
2389 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2390 break;
2391
2392 case BFD_RELOC_PPC64_HIGHER_S:
2393 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2394 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2395 else
2396 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2397 break;
0baf16f2
AM
2398
2399 case BFD_RELOC_PPC64_HIGHEST:
2400 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2401 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2402 else
2403 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2404 break;
2405
2406 case BFD_RELOC_PPC64_HIGHEST_S:
2407 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2408 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2409 else
2410 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2411 break;
252b5132 2412 }
0baf16f2 2413#endif /* OBJ_ELF */
252b5132
RH
2414 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2415 (char *) NULL, 0);
2416 }
2417#ifdef OBJ_ELF
2418 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2419 {
cdba85ec
AM
2420 /* Some TLS tweaks. */
2421 switch (reloc)
2422 {
2423 default:
2424 break;
2425 case BFD_RELOC_PPC_TLS:
2426 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2427 (char *) NULL, 0);
2428 break;
2429 /* We'll only use the 32 (or 64) bit form of these relocations
2430 in constants. Instructions get the 16 bit form. */
2431 case BFD_RELOC_PPC_DTPREL:
2432 reloc = BFD_RELOC_PPC_DTPREL16;
2433 break;
2434 case BFD_RELOC_PPC_TPREL:
2435 reloc = BFD_RELOC_PPC_TPREL16;
2436 break;
2437 }
2438
99a814a1
AM
2439 /* For the absolute forms of branches, convert the PC
2440 relative form back into the absolute. */
252b5132
RH
2441 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2442 {
2443 switch (reloc)
2444 {
2445 case BFD_RELOC_PPC_B26:
2446 reloc = BFD_RELOC_PPC_BA26;
2447 break;
2448 case BFD_RELOC_PPC_B16:
2449 reloc = BFD_RELOC_PPC_BA16;
2450 break;
2451 case BFD_RELOC_PPC_B16_BRTAKEN:
2452 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2453 break;
2454 case BFD_RELOC_PPC_B16_BRNTAKEN:
2455 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2456 break;
2457 default:
2458 break;
2459 }
2460 }
2461
2b3c4602 2462 if (ppc_obj64
adadcc0c 2463 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM
2464 {
2465 switch (reloc)
2466 {
2467 case BFD_RELOC_16:
2468 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2469 break;
2470 case BFD_RELOC_LO16:
2471 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2472 break;
2473 case BFD_RELOC_16_GOTOFF:
2474 reloc = BFD_RELOC_PPC64_GOT16_DS;
2475 break;
2476 case BFD_RELOC_LO16_GOTOFF:
2477 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2478 break;
2479 case BFD_RELOC_LO16_PLTOFF:
2480 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2481 break;
1cfc59d5 2482 case BFD_RELOC_16_BASEREL:
0baf16f2
AM
2483 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2484 break;
2485 case BFD_RELOC_LO16_BASEREL:
2486 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2487 break;
2488 case BFD_RELOC_PPC_TOC16:
2489 reloc = BFD_RELOC_PPC64_TOC16_DS;
2490 break;
2491 case BFD_RELOC_PPC64_TOC16_LO:
2492 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2493 break;
2494 case BFD_RELOC_PPC64_PLTGOT16:
2495 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2496 break;
2497 case BFD_RELOC_PPC64_PLTGOT16_LO:
2498 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2499 break;
cdba85ec
AM
2500 case BFD_RELOC_PPC_DTPREL16:
2501 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2502 break;
2503 case BFD_RELOC_PPC_DTPREL16_LO:
2504 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2505 break;
2506 case BFD_RELOC_PPC_TPREL16:
2507 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2508 break;
2509 case BFD_RELOC_PPC_TPREL16_LO:
2510 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2511 break;
2512 case BFD_RELOC_PPC_GOT_DTPREL16:
2513 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2514 case BFD_RELOC_PPC_GOT_TPREL16:
2515 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2516 break;
0baf16f2
AM
2517 default:
2518 as_bad (_("unsupported relocation for DS offset field"));
2519 break;
2520 }
2521 }
2522
252b5132
RH
2523 /* We need to generate a fixup for this expression. */
2524 if (fc >= MAX_INSN_FIXUPS)
2525 as_fatal (_("too many fixups"));
2526 fixups[fc].exp = ex;
2527 fixups[fc].opindex = 0;
2528 fixups[fc].reloc = reloc;
2529 ++fc;
2530 }
2531#endif /* OBJ_ELF */
2532
2533 else
2534 {
2535 /* We need to generate a fixup for this expression. */
2536 if (fc >= MAX_INSN_FIXUPS)
2537 as_fatal (_("too many fixups"));
2538 fixups[fc].exp = ex;
2539 fixups[fc].opindex = *opindex_ptr;
2540 fixups[fc].reloc = BFD_RELOC_UNUSED;
2541 ++fc;
2542 }
2543
2544 if (need_paren)
2545 {
2546 endc = ')';
2547 need_paren = 0;
2548 }
2549 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2550 {
2551 endc = '(';
2552 need_paren = 1;
2553 }
2554 else
2555 endc = ',';
2556
2557 /* The call to expression should have advanced str past any
2558 whitespace. */
2559 if (*str != endc
2560 && (endc != ',' || *str != '\0'))
2561 {
2562 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2563 break;
2564 }
2565
2566 if (*str != '\0')
2567 ++str;
2568 }
2569
3882b010 2570 while (ISSPACE (*str))
252b5132
RH
2571 ++str;
2572
2573 if (*str != '\0')
2574 as_bad (_("junk at end of line: `%s'"), str);
2575
dc1d03fc 2576#ifdef OBJ_ELF
6a0c61b7
EZ
2577 /* Do we need/want a APUinfo section? */
2578 if (ppc_cpu & (PPC_OPCODE_SPE
2579 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2580 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2581 | PPC_OPCODE_RFMCI))
2582 {
2583 /* These are all version "1". */
2584 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2585 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2586 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2587 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2588 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2589 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2590 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2591 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2592 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2593 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2594 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2595 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2596 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2597 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2598 }
dc1d03fc 2599#endif
6a0c61b7 2600
252b5132
RH
2601 /* Write out the instruction. */
2602 f = frag_more (4);
2603 md_number_to_chars (f, insn, 4);
2604
5d6f4f16
GK
2605#ifdef OBJ_ELF
2606 dwarf2_emit_insn (4);
2607#endif
2608
252b5132
RH
2609 /* Create any fixups. At this point we do not use a
2610 bfd_reloc_code_real_type, but instead just use the
2611 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2612 handle fixups for any operand type, although that is admittedly
2613 not a very exciting feature. We pick a BFD reloc type in
94f592af 2614 md_apply_fix3. */
252b5132
RH
2615 for (i = 0; i < fc; i++)
2616 {
2617 const struct powerpc_operand *operand;
2618
2619 operand = &powerpc_operands[fixups[i].opindex];
2620 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2621 {
99a814a1 2622 reloc_howto_type *reloc_howto;
252b5132
RH
2623 int size;
2624 int offset;
2625 fixS *fixP;
2626
99a814a1 2627 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH
2628 if (!reloc_howto)
2629 abort ();
2630
2631 size = bfd_get_reloc_size (reloc_howto);
2632 offset = target_big_endian ? (4 - size) : 0;
2633
2634 if (size < 1 || size > 4)
bc805888 2635 abort ();
252b5132 2636
99a814a1
AM
2637 fixP = fix_new_exp (frag_now,
2638 f - frag_now->fr_literal + offset,
2639 size,
2640 &fixups[i].exp,
2641 reloc_howto->pc_relative,
252b5132
RH
2642 fixups[i].reloc);
2643
2644 /* Turn off complaints that the addend is too large for things like
2645 foo+100000@ha. */
2646 switch (fixups[i].reloc)
2647 {
2648 case BFD_RELOC_16_GOTOFF:
2649 case BFD_RELOC_PPC_TOC16:
2650 case BFD_RELOC_LO16:
2651 case BFD_RELOC_HI16:
2652 case BFD_RELOC_HI16_S:
0baf16f2 2653#ifdef OBJ_ELF
0baf16f2
AM
2654 case BFD_RELOC_PPC64_HIGHER:
2655 case BFD_RELOC_PPC64_HIGHER_S:
2656 case BFD_RELOC_PPC64_HIGHEST:
2657 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2658#endif
252b5132
RH
2659 fixP->fx_no_overflow = 1;
2660 break;
2661 default:
2662 break;
2663 }
2664 }
2665 else
99a814a1
AM
2666 fix_new_exp (frag_now,
2667 f - frag_now->fr_literal,
2668 4,
252b5132
RH
2669 &fixups[i].exp,
2670 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2671 ((bfd_reloc_code_real_type)
99a814a1 2672 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH
2673 }
2674}
2675
2676/* Handle a macro. Gather all the operands, transform them as
2677 described by the macro, and call md_assemble recursively. All the
2678 operands are separated by commas; we don't accept parentheses
2679 around operands here. */
2680
2681static void
2682ppc_macro (str, macro)
2683 char *str;
2684 const struct powerpc_macro *macro;
2685{
2686 char *operands[10];
2687 unsigned int count;
2688 char *s;
2689 unsigned int len;
2690 const char *format;
2691 int arg;
2692 char *send;
2693 char *complete;
2694
2695 /* Gather the users operands into the operands array. */
2696 count = 0;
2697 s = str;
2698 while (1)
2699 {
2700 if (count >= sizeof operands / sizeof operands[0])
2701 break;
2702 operands[count++] = s;
2703 s = strchr (s, ',');
2704 if (s == (char *) NULL)
2705 break;
2706 *s++ = '\0';
81d4177b 2707 }
252b5132
RH
2708
2709 if (count != macro->operands)
2710 {
2711 as_bad (_("wrong number of operands"));
2712 return;
2713 }
2714
2715 /* Work out how large the string must be (the size is unbounded
2716 because it includes user input). */
2717 len = 0;
2718 format = macro->format;
2719 while (*format != '\0')
2720 {
2721 if (*format != '%')
2722 {
2723 ++len;
2724 ++format;
2725 }
2726 else
2727 {
2728 arg = strtol (format + 1, &send, 10);
2729 know (send != format && arg >= 0 && arg < count);
2730 len += strlen (operands[arg]);
2731 format = send;
2732 }
2733 }
2734
2735 /* Put the string together. */
2736 complete = s = (char *) alloca (len + 1);
2737 format = macro->format;
2738 while (*format != '\0')
2739 {
2740 if (*format != '%')
2741 *s++ = *format++;
2742 else
2743 {
2744 arg = strtol (format + 1, &send, 10);
2745 strcpy (s, operands[arg]);
2746 s += strlen (s);
2747 format = send;
2748 }
2749 }
2750 *s = '\0';
2751
2752 /* Assemble the constructed instruction. */
2753 md_assemble (complete);
81d4177b 2754}
252b5132
RH
2755\f
2756#ifdef OBJ_ELF
99a814a1 2757/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH
2758
2759int
2760ppc_section_letter (letter, ptr_msg)
2761 int letter;
2762 char **ptr_msg;
2763{
2764 if (letter == 'e')
2765 return SHF_EXCLUDE;
2766
13ae64f3 2767 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2768 return -1;
252b5132
RH
2769}
2770
2771int
9de8d8f1
RH
2772ppc_section_word (str, len)
2773 char *str;
2774 size_t len;
252b5132 2775{
9de8d8f1
RH
2776 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2777 return SHF_EXCLUDE;
252b5132 2778
9de8d8f1 2779 return -1;
252b5132
RH
2780}
2781
2782int
9de8d8f1
RH
2783ppc_section_type (str, len)
2784 char *str;
2785 size_t len;
252b5132 2786{
9de8d8f1
RH
2787 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2788 return SHT_ORDERED;
252b5132 2789
9de8d8f1 2790 return -1;
252b5132
RH
2791}
2792
2793int
2794ppc_section_flags (flags, attr, type)
2795 int flags;
2796 int attr;
2797 int type;
2798{
2799 if (type == SHT_ORDERED)
2800 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2801
2802 if (attr & SHF_EXCLUDE)
2803 flags |= SEC_EXCLUDE;
2804
2805 return flags;
2806}
2807#endif /* OBJ_ELF */
2808
2809\f
2810/* Pseudo-op handling. */
2811
2812/* The .byte pseudo-op. This is similar to the normal .byte
2813 pseudo-op, but it can also take a single ASCII string. */
2814
2815static void
2816ppc_byte (ignore)
92161534 2817 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
2818{
2819 if (*input_line_pointer != '\"')
2820 {
2821 cons (1);
2822 return;
2823 }
2824
2825 /* Gather characters. A real double quote is doubled. Unusual
2826 characters are not permitted. */
2827 ++input_line_pointer;
2828 while (1)
2829 {
2830 char c;
2831
2832 c = *input_line_pointer++;
2833
2834 if (c == '\"')
2835 {
2836 if (*input_line_pointer != '\"')
2837 break;
2838 ++input_line_pointer;
2839 }
2840
2841 FRAG_APPEND_1_CHAR (c);
2842 }
2843
2844 demand_empty_rest_of_line ();
2845}
2846\f
2847#ifdef OBJ_XCOFF
2848
2849/* XCOFF specific pseudo-op handling. */
2850
2851/* This is set if we are creating a .stabx symbol, since we don't want
2852 to handle symbol suffixes for such symbols. */
b34976b6 2853static bfd_boolean ppc_stab_symbol;
252b5132
RH
2854
2855/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2856 symbols in the .bss segment as though they were local common
1ad63b2f
TR
2857 symbols, and uses a different smclas. The native Aix 4.3.3 assember
2858 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH
2859
2860static void
2861ppc_comm (lcomm)
2862 int lcomm;
2863{
2864 asection *current_seg = now_seg;
2865 subsegT current_subseg = now_subseg;
2866 char *name;
2867 char endc;
2868 char *end_name;
2869 offsetT size;
2870 offsetT align;
2871 symbolS *lcomm_sym = NULL;
2872 symbolS *sym;
2873 char *pfrag;
2874
2875 name = input_line_pointer;
2876 endc = get_symbol_end ();
2877 end_name = input_line_pointer;
2878 *end_name = endc;
2879
2880 if (*input_line_pointer != ',')
2881 {
2882 as_bad (_("missing size"));
2883 ignore_rest_of_line ();
2884 return;
2885 }
2886 ++input_line_pointer;
2887
2888 size = get_absolute_expression ();
2889 if (size < 0)
2890 {
2891 as_bad (_("negative size"));
2892 ignore_rest_of_line ();
2893 return;
2894 }
2895
2896 if (! lcomm)
2897 {
2898 /* The third argument to .comm is the alignment. */
2899 if (*input_line_pointer != ',')
1ad63b2f 2900 align = 2;
252b5132
RH
2901 else
2902 {
2903 ++input_line_pointer;
2904 align = get_absolute_expression ();
2905 if (align <= 0)
2906 {
2907 as_warn (_("ignoring bad alignment"));
1ad63b2f 2908 align = 2;
252b5132
RH
2909 }
2910 }
2911 }
2912 else
2913 {
2914 char *lcomm_name;
2915 char lcomm_endc;
2916
1ad63b2f 2917 if (size <= 4)
252b5132
RH
2918 align = 2;
2919 else
2920 align = 3;
2921
2922 /* The third argument to .lcomm appears to be the real local
2923 common symbol to create. References to the symbol named in
2924 the first argument are turned into references to the third
2925 argument. */
2926 if (*input_line_pointer != ',')
2927 {
2928 as_bad (_("missing real symbol name"));
2929 ignore_rest_of_line ();
2930 return;
2931 }
2932 ++input_line_pointer;
2933
2934 lcomm_name = input_line_pointer;
2935 lcomm_endc = get_symbol_end ();
81d4177b 2936
252b5132
RH
2937 lcomm_sym = symbol_find_or_make (lcomm_name);
2938
2939 *input_line_pointer = lcomm_endc;
2940 }
2941
2942 *end_name = '\0';
2943 sym = symbol_find_or_make (name);
2944 *end_name = endc;
2945
2946 if (S_IS_DEFINED (sym)
2947 || S_GET_VALUE (sym) != 0)
2948 {
2949 as_bad (_("attempt to redefine symbol"));
2950 ignore_rest_of_line ();
2951 return;
2952 }
81d4177b 2953
252b5132 2954 record_alignment (bss_section, align);
81d4177b 2955
252b5132
RH
2956 if (! lcomm
2957 || ! S_IS_DEFINED (lcomm_sym))
2958 {
2959 symbolS *def_sym;
2960 offsetT def_size;
2961
2962 if (! lcomm)
2963 {
2964 def_sym = sym;
2965 def_size = size;
2966 S_SET_EXTERNAL (sym);
2967 }
2968 else
2969 {
809ffe0d 2970 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH
2971 def_sym = lcomm_sym;
2972 def_size = 0;
2973 }
2974
2975 subseg_set (bss_section, 1);
2976 frag_align (align, 0, 0);
81d4177b 2977
809ffe0d 2978 symbol_set_frag (def_sym, frag_now);
252b5132
RH
2979 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
2980 def_size, (char *) NULL);
2981 *pfrag = 0;
2982 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 2983 symbol_get_tc (def_sym)->align = align;
252b5132
RH
2984 }
2985 else if (lcomm)
2986 {
2987 /* Align the size of lcomm_sym. */
809ffe0d
ILT
2988 symbol_get_frag (lcomm_sym)->fr_offset =
2989 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 2990 &~ ((1 << align) - 1));
809ffe0d
ILT
2991 if (align > symbol_get_tc (lcomm_sym)->align)
2992 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH
2993 }
2994
2995 if (lcomm)
2996 {
2997 /* Make sym an offset from lcomm_sym. */
2998 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT
2999 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3000 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3001 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH
3002 }
3003
3004 subseg_set (current_seg, current_subseg);
3005
3006 demand_empty_rest_of_line ();
3007}
3008
3009/* The .csect pseudo-op. This switches us into a different
3010 subsegment. The first argument is a symbol whose value is the
3011 start of the .csect. In COFF, csect symbols get special aux
3012 entries defined by the x_csect field of union internal_auxent. The
3013 optional second argument is the alignment (the default is 2). */
3014
3015static void
3016ppc_csect (ignore)
5480ccf3 3017 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3018{
3019 char *name;
3020 char endc;
3021 symbolS *sym;
931e13a6 3022 offsetT align;
252b5132
RH
3023
3024 name = input_line_pointer;
3025 endc = get_symbol_end ();
81d4177b 3026
252b5132
RH
3027 sym = symbol_find_or_make (name);
3028
3029 *input_line_pointer = endc;
3030
3031 if (S_GET_NAME (sym)[0] == '\0')
3032 {
3033 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3034 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH
3035 }
3036
931e13a6 3037 align = 2;
252b5132
RH
3038 if (*input_line_pointer == ',')
3039 {
3040 ++input_line_pointer;
931e13a6 3041 align = get_absolute_expression ();
252b5132
RH
3042 }
3043
931e13a6
AM
3044 ppc_change_csect (sym, align);
3045
252b5132
RH
3046 demand_empty_rest_of_line ();
3047}
3048
3049/* Change to a different csect. */
3050
3051static void
931e13a6 3052ppc_change_csect (sym, align)
252b5132 3053 symbolS *sym;
931e13a6 3054 offsetT align;
252b5132
RH
3055{
3056 if (S_IS_DEFINED (sym))
809ffe0d 3057 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH
3058 else
3059 {
3060 symbolS **list_ptr;
3061 int after_toc;
3062 int hold_chunksize;
3063 symbolS *list;
931e13a6
AM
3064 int is_code;
3065 segT sec;
252b5132
RH
3066
3067 /* This is a new csect. We need to look at the symbol class to
3068 figure out whether it should go in the text section or the
3069 data section. */
3070 after_toc = 0;
931e13a6 3071 is_code = 0;
809ffe0d 3072 switch (symbol_get_tc (sym)->class)
252b5132
RH
3073 {
3074 case XMC_PR:
3075 case XMC_RO:
3076 case XMC_DB:
3077 case XMC_GL:
3078 case XMC_XO:
3079 case XMC_SV:
3080 case XMC_TI:
3081 case XMC_TB:
3082 S_SET_SEGMENT (sym, text_section);
809ffe0d 3083 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH
3084 ++ppc_text_subsegment;
3085 list_ptr = &ppc_text_csects;
931e13a6 3086 is_code = 1;
252b5132
RH
3087 break;
3088 case XMC_RW:
3089 case XMC_TC0:
3090 case XMC_TC:
3091 case XMC_DS:
3092 case XMC_UA:
3093 case XMC_BS:
3094 case XMC_UC:
3095 if (ppc_toc_csect != NULL
809ffe0d
ILT
3096 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3097 == ppc_data_subsegment))
252b5132
RH
3098 after_toc = 1;
3099 S_SET_SEGMENT (sym, data_section);
809ffe0d 3100 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH
3101 ++ppc_data_subsegment;
3102 list_ptr = &ppc_data_csects;
3103 break;
3104 default:
3105 abort ();
3106 }
3107
3108 /* We set the obstack chunk size to a small value before
99a814a1
AM
3109 changing subsegments, so that we don't use a lot of memory
3110 space for what may be a small section. */
252b5132
RH
3111 hold_chunksize = chunksize;
3112 chunksize = 64;
3113
931e13a6
AM
3114 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3115 symbol_get_tc (sym)->subseg);
252b5132
RH
3116
3117 chunksize = hold_chunksize;
3118
3119 if (after_toc)
3120 ppc_after_toc_frag = frag_now;
3121
931e13a6
AM
3122 record_alignment (sec, align);
3123 if (is_code)
3124 frag_align_code (align, 0);
3125 else
3126 frag_align (align, 0, 0);
3127
809ffe0d 3128 symbol_set_frag (sym, frag_now);
252b5132
RH
3129 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3130
931e13a6 3131 symbol_get_tc (sym)->align = align;
809ffe0d
ILT
3132 symbol_get_tc (sym)->output = 1;
3133 symbol_get_tc (sym)->within = sym;
81d4177b 3134
252b5132 3135 for (list = *list_ptr;
809ffe0d
ILT
3136 symbol_get_tc (list)->next != (symbolS *) NULL;
3137 list = symbol_get_tc (list)->next)
252b5132 3138 ;
809ffe0d 3139 symbol_get_tc (list)->next = sym;
81d4177b 3140
252b5132 3141 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
3142 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3143 &symbol_lastP);
252b5132
RH
3144 }
3145
3146 ppc_current_csect = sym;
3147}
3148
3149/* This function handles the .text and .data pseudo-ops. These
3150 pseudo-ops aren't really used by XCOFF; we implement them for the
3151 convenience of people who aren't used to XCOFF. */
3152
3153static void
3154ppc_section (type)
3155 int type;
3156{
3157 const char *name;
3158 symbolS *sym;
3159
3160 if (type == 't')
3161 name = ".text[PR]";
3162 else if (type == 'd')
3163 name = ".data[RW]";
3164 else
3165 abort ();
3166
3167 sym = symbol_find_or_make (name);
3168
931e13a6 3169 ppc_change_csect (sym, 2);
252b5132
RH
3170
3171 demand_empty_rest_of_line ();
3172}
3173
3174/* This function handles the .section pseudo-op. This is mostly to
3175 give an error, since XCOFF only supports .text, .data and .bss, but
3176 we do permit the user to name the text or data section. */
3177
3178static void
3179ppc_named_section (ignore)
5480ccf3 3180 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3181{
3182 char *user_name;
3183 const char *real_name;
3184 char c;
3185 symbolS *sym;
3186
3187 user_name = input_line_pointer;
3188 c = get_symbol_end ();
3189
3190 if (strcmp (user_name, ".text") == 0)
3191 real_name = ".text[PR]";
3192 else if (strcmp (user_name, ".data") == 0)
3193 real_name = ".data[RW]";
3194 else
3195 {
3196 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3197 *input_line_pointer = c;
3198 ignore_rest_of_line ();
3199 return;
3200 }
3201
3202 *input_line_pointer = c;
3203
3204 sym = symbol_find_or_make (real_name);
3205
931e13a6 3206 ppc_change_csect (sym, 2);
252b5132
RH
3207
3208 demand_empty_rest_of_line ();
3209}
3210
3211/* The .extern pseudo-op. We create an undefined symbol. */
3212
3213static void
3214ppc_extern (ignore)
5480ccf3 3215 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3216{
3217 char *name;
3218 char endc;
3219
3220 name = input_line_pointer;
3221 endc = get_symbol_end ();
3222
3223 (void) symbol_find_or_make (name);
3224
3225 *input_line_pointer = endc;
3226
3227 demand_empty_rest_of_line ();
3228}
3229
3230/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3231
3232static void
3233ppc_lglobl (ignore)
5480ccf3 3234 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3235{
3236 char *name;
3237 char endc;
3238 symbolS *sym;
3239
3240 name = input_line_pointer;
3241 endc = get_symbol_end ();
3242
3243 sym = symbol_find_or_make (name);
3244
3245 *input_line_pointer = endc;
3246
809ffe0d 3247 symbol_get_tc (sym)->output = 1;
252b5132
RH
3248
3249 demand_empty_rest_of_line ();
3250}
3251
3252/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3253 although I don't know why it bothers. */
3254
3255static void
3256ppc_rename (ignore)
5480ccf3 3257 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3258{
3259 char *name;
3260 char endc;
3261 symbolS *sym;
3262 int len;
3263
3264 name = input_line_pointer;
3265 endc = get_symbol_end ();
3266
3267 sym = symbol_find_or_make (name);
3268
3269 *input_line_pointer = endc;
3270
3271 if (*input_line_pointer != ',')
3272 {
3273 as_bad (_("missing rename string"));
3274 ignore_rest_of_line ();
3275 return;
3276 }
3277 ++input_line_pointer;
3278
809ffe0d 3279 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH
3280
3281 demand_empty_rest_of_line ();
3282}
3283
3284/* The .stabx pseudo-op. This is similar to a normal .stabs
3285 pseudo-op, but slightly different. A sample is
3286 .stabx "main:F-1",.main,142,0
3287 The first argument is the symbol name to create. The second is the
3288 value, and the third is the storage class. The fourth seems to be
3289 always zero, and I am assuming it is the type. */
3290
3291static void
3292ppc_stabx (ignore)
5480ccf3 3293 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3294{
3295 char *name;
3296 int len;
3297 symbolS *sym;
3298 expressionS exp;
3299
3300 name = demand_copy_C_string (&len);
3301
3302 if (*input_line_pointer != ',')
3303 {
3304 as_bad (_("missing value"));
3305 return;
3306 }
3307 ++input_line_pointer;
3308
b34976b6 3309 ppc_stab_symbol = TRUE;
252b5132 3310 sym = symbol_make (name);
b34976b6 3311 ppc_stab_symbol = FALSE;
252b5132 3312
809ffe0d 3313 symbol_get_tc (sym)->real_name = name;
252b5132
RH
3314
3315 (void) expression (&exp);
3316
3317 switch (exp.X_op)
3318 {
3319 case O_illegal:
3320 case O_absent:
3321 case O_big:
3322 as_bad (_("illegal .stabx expression; zero assumed"));
3323 exp.X_add_number = 0;
3324 /* Fall through. */
3325 case O_constant:
3326 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3327 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH
3328 break;
3329
3330 case O_symbol:
3331 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3332 symbol_set_value_expression (sym, &exp);
252b5132
RH
3333 else
3334 {
3335 S_SET_VALUE (sym,
3336 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3337 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH
3338 }
3339 break;
3340
3341 default:
3342 /* The value is some complex expression. This will probably
99a814a1
AM
3343 fail at some later point, but this is probably the right
3344 thing to do here. */
809ffe0d 3345 symbol_set_value_expression (sym, &exp);
252b5132
RH
3346 break;
3347 }
3348
3349 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3350 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3351
3352 if (*input_line_pointer != ',')
3353 {
3354 as_bad (_("missing class"));
3355 return;
3356 }
3357 ++input_line_pointer;
3358
3359 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3360
3361 if (*input_line_pointer != ',')
3362 {
3363 as_bad (_("missing type"));
3364 return;
3365 }
3366 ++input_line_pointer;
3367
3368 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3369
809ffe0d 3370 symbol_get_tc (sym)->output = 1;
252b5132 3371
6877bb43 3372 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3373
809ffe0d 3374 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3375
41ea10b1 3376 /* In this case :
99a814a1 3377
41ea10b1
TR
3378 .bs name
3379 .stabx "z",arrays_,133,0
3380 .es
99a814a1 3381
41ea10b1 3382 .comm arrays_,13768,3
99a814a1 3383
41ea10b1
TR
3384 resolve_symbol_value will copy the exp's "within" into sym's when the
3385 offset is 0. Since this seems to be corner case problem,
3386 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3387 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM
3388
3389 if (exp.X_op == O_symbol)
41ea10b1
TR
3390 {
3391 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3392 }
6877bb43 3393 }
99a814a1 3394
252b5132
RH
3395 if (exp.X_op != O_symbol
3396 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3397 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3398 ppc_frob_label (sym);
3399 else
3400 {
3401 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3402 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
3403 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3404 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH
3405 }
3406
3407 demand_empty_rest_of_line ();
3408}
3409
3410/* The .function pseudo-op. This takes several arguments. The first
3411 argument seems to be the external name of the symbol. The second
3412 argment seems to be the label for the start of the function. gcc
3413 uses the same name for both. I have no idea what the third and
3414 fourth arguments are meant to be. The optional fifth argument is
3415 an expression for the size of the function. In COFF this symbol
3416 gets an aux entry like that used for a csect. */
3417
3418static void
3419ppc_function (ignore)
5480ccf3 3420 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3421{
3422 char *name;
3423 char endc;
3424 char *s;
3425 symbolS *ext_sym;
3426 symbolS *lab_sym;
3427
3428 name = input_line_pointer;
3429 endc = get_symbol_end ();
3430
3431 /* Ignore any [PR] suffix. */
3432 name = ppc_canonicalize_symbol_name (name);
3433 s = strchr (name, '[');
3434 if (s != (char *) NULL
3435 && strcmp (s + 1, "PR]") == 0)
3436 *s = '\0';
3437
3438 ext_sym = symbol_find_or_make (name);
3439
3440 *input_line_pointer = endc;
3441
3442 if (*input_line_pointer != ',')
3443 {
3444 as_bad (_("missing symbol name"));
3445 ignore_rest_of_line ();
3446 return;
3447 }
3448 ++input_line_pointer;
3449
3450 name = input_line_pointer;
3451 endc = get_symbol_end ();
3452
3453 lab_sym = symbol_find_or_make (name);
3454
3455 *input_line_pointer = endc;
3456
3457 if (ext_sym != lab_sym)
3458 {
809ffe0d
ILT
3459 expressionS exp;
3460
3461 exp.X_op = O_symbol;
3462 exp.X_add_symbol = lab_sym;
3463 exp.X_op_symbol = NULL;
3464 exp.X_add_number = 0;
3465 exp.X_unsigned = 0;
3466 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH
3467 }
3468
809ffe0d
ILT
3469 if (symbol_get_tc (ext_sym)->class == -1)
3470 symbol_get_tc (ext_sym)->class = XMC_PR;
3471 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH
3472
3473 if (*input_line_pointer == ',')
3474 {
3475 expressionS ignore;
3476
3477 /* Ignore the third argument. */
3478 ++input_line_pointer;
3479 expression (&ignore);
3480 if (*input_line_pointer == ',')
3481 {
3482 /* Ignore the fourth argument. */
3483 ++input_line_pointer;
3484 expression (&ignore);
3485 if (*input_line_pointer == ',')
3486 {
3487 /* The fifth argument is the function size. */
3488 ++input_line_pointer;
809ffe0d
ILT
3489 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3490 absolute_section,
3491 (valueT) 0,
3492 &zero_address_frag);
3493 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH
3494 }
3495 }
3496 }
3497
3498 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3499 SF_SET_FUNCTION (ext_sym);
3500 SF_SET_PROCESS (ext_sym);
3501 coff_add_linesym (ext_sym);
3502
3503 demand_empty_rest_of_line ();
3504}
3505
3506/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR
3507 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3508 with the correct line number */
5d6255fe 3509
8642cce8 3510static symbolS *saved_bi_sym = 0;
252b5132
RH
3511
3512static void
3513ppc_bf (ignore)
5480ccf3 3514 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3515{
3516 symbolS *sym;
3517
3518 sym = symbol_make (".bf");
3519 S_SET_SEGMENT (sym, text_section);
809ffe0d 3520 symbol_set_frag (sym, frag_now);
252b5132
RH
3521 S_SET_VALUE (sym, frag_now_fix ());
3522 S_SET_STORAGE_CLASS (sym, C_FCN);
3523
3524 coff_line_base = get_absolute_expression ();
3525
3526 S_SET_NUMBER_AUXILIARY (sym, 1);
3527 SA_SET_SYM_LNNO (sym, coff_line_base);
3528
8642cce8 3529 /* Line number for bi. */
5d6255fe 3530 if (saved_bi_sym)
8642cce8
TR
3531 {
3532 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3533 saved_bi_sym = 0;
3534 }
5d6255fe 3535
8642cce8 3536
809ffe0d 3537 symbol_get_tc (sym)->output = 1;
252b5132
RH
3538
3539 ppc_frob_label (sym);
3540
3541 demand_empty_rest_of_line ();
3542}
3543
3544/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3545 ".ef", except that the line number is absolute, not relative to the
3546 most recent ".bf" symbol. */
3547
3548static void
3549ppc_ef (ignore)
5480ccf3 3550 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3551{
3552 symbolS *sym;
3553
3554 sym = symbol_make (".ef");
3555 S_SET_SEGMENT (sym, text_section);
809ffe0d 3556 symbol_set_frag (sym, frag_now);
252b5132
RH
3557 S_SET_VALUE (sym, frag_now_fix ());
3558 S_SET_STORAGE_CLASS (sym, C_FCN);
3559 S_SET_NUMBER_AUXILIARY (sym, 1);
3560 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3561 symbol_get_tc (sym)->output = 1;
252b5132
RH
3562
3563 ppc_frob_label (sym);
3564
3565 demand_empty_rest_of_line ();
3566}
3567
3568/* The .bi and .ei pseudo-ops. These take a string argument and
3569 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR
3570 the symbol list. The value of .bi will be know when the next .bf
3571 is encountered. */
252b5132
RH
3572
3573static void
3574ppc_biei (ei)
3575 int ei;
3576{
3577 static symbolS *last_biei;
3578
3579 char *name;
3580 int len;
3581 symbolS *sym;
3582 symbolS *look;
3583
3584 name = demand_copy_C_string (&len);
3585
3586 /* The value of these symbols is actually file offset. Here we set
3587 the value to the index into the line number entries. In
3588 ppc_frob_symbols we set the fix_line field, which will cause BFD
3589 to do the right thing. */
3590
3591 sym = symbol_make (name);
3592 /* obj-coff.c currently only handles line numbers correctly in the
3593 .text section. */
3594 S_SET_SEGMENT (sym, text_section);
3595 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3596 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3597
3598 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3599 symbol_get_tc (sym)->output = 1;
81d4177b 3600
8642cce8 3601 /* Save bi. */
5d6255fe 3602 if (ei)
8642cce8
TR
3603 saved_bi_sym = 0;
3604 else
3605 saved_bi_sym = sym;
3606
252b5132
RH
3607 for (look = last_biei ? last_biei : symbol_rootP;
3608 (look != (symbolS *) NULL
3609 && (S_GET_STORAGE_CLASS (look) == C_FILE
3610 || S_GET_STORAGE_CLASS (look) == C_BINCL
3611 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3612 look = symbol_next (look))
3613 ;
3614 if (look != (symbolS *) NULL)
3615 {
3616 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3617 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3618 last_biei = sym;
3619 }
3620
3621 demand_empty_rest_of_line ();
3622}
3623
3624/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3625 There is one argument, which is a csect symbol. The value of the
3626 .bs symbol is the index of this csect symbol. */
3627
3628static void
3629ppc_bs (ignore)
5480ccf3 3630 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3631{
3632 char *name;
3633 char endc;
3634 symbolS *csect;
3635 symbolS *sym;
3636
3637 if (ppc_current_block != NULL)
3638 as_bad (_("nested .bs blocks"));
3639
3640 name = input_line_pointer;
3641 endc = get_symbol_end ();
3642
3643 csect = symbol_find_or_make (name);
3644
3645 *input_line_pointer = endc;
3646
3647 sym = symbol_make (".bs");
3648 S_SET_SEGMENT (sym, now_seg);
3649 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT
3650 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3651 symbol_get_tc (sym)->output = 1;
252b5132 3652
809ffe0d 3653 symbol_get_tc (sym)->within = csect;
252b5132
RH
3654
3655 ppc_frob_label (sym);
3656
3657 ppc_current_block = sym;
3658
3659 demand_empty_rest_of_line ();
3660}
3661
3662/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3663
3664static void
3665ppc_es (ignore)
5480ccf3 3666 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3667{
3668 symbolS *sym;
3669
3670 if (ppc_current_block == NULL)
3671 as_bad (_(".es without preceding .bs"));
3672
3673 sym = symbol_make (".es");
3674 S_SET_SEGMENT (sym, now_seg);
3675 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT
3676 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3677 symbol_get_tc (sym)->output = 1;
252b5132
RH
3678
3679 ppc_frob_label (sym);
3680
3681 ppc_current_block = NULL;
3682
3683 demand_empty_rest_of_line ();
3684}
3685
3686/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3687 line number. */
3688
3689static void
3690ppc_bb (ignore)
5480ccf3 3691 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3692{
3693 symbolS *sym;
3694
3695 sym = symbol_make (".bb");
3696 S_SET_SEGMENT (sym, text_section);
809ffe0d 3697 symbol_set_frag (sym, frag_now);
252b5132
RH
3698 S_SET_VALUE (sym, frag_now_fix ());
3699 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3700
3701 S_SET_NUMBER_AUXILIARY (sym, 1);
3702 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3703
809ffe0d 3704 symbol_get_tc (sym)->output = 1;
252b5132
RH
3705
3706 SF_SET_PROCESS (sym);
3707
3708 ppc_frob_label (sym);
3709
3710 demand_empty_rest_of_line ();
3711}
3712
3713/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3714 line number. */
3715
3716static void
3717ppc_eb (ignore)
5480ccf3 3718 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3719{
3720 symbolS *sym;
3721
3722 sym = symbol_make (".eb");
3723 S_SET_SEGMENT (sym, text_section);
809ffe0d 3724 symbol_set_frag (sym, frag_now);
252b5132
RH
3725 S_SET_VALUE (sym, frag_now_fix ());
3726 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3727 S_SET_NUMBER_AUXILIARY (sym, 1);
3728 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3729 symbol_get_tc (sym)->output = 1;
252b5132
RH
3730
3731 SF_SET_PROCESS (sym);
3732
3733 ppc_frob_label (sym);
3734
3735 demand_empty_rest_of_line ();
3736}
3737
3738/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3739 specified name. */
3740
3741static void
3742ppc_bc (ignore)
5480ccf3 3743 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3744{
3745 char *name;
3746 int len;
3747 symbolS *sym;
3748
3749 name = demand_copy_C_string (&len);
3750 sym = symbol_make (name);
3751 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3752 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3753 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3754 S_SET_VALUE (sym, 0);
809ffe0d 3755 symbol_get_tc (sym)->output = 1;
252b5132
RH
3756
3757 ppc_frob_label (sym);
3758
3759 demand_empty_rest_of_line ();
3760}
3761
3762/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3763
3764static void
3765ppc_ec (ignore)
5480ccf3 3766 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3767{
3768 symbolS *sym;
3769
3770 sym = symbol_make (".ec");
3771 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3772 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3773 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3774 S_SET_VALUE (sym, 0);
809ffe0d 3775 symbol_get_tc (sym)->output = 1;
252b5132
RH
3776
3777 ppc_frob_label (sym);
3778
3779 demand_empty_rest_of_line ();
3780}
3781
3782/* The .toc pseudo-op. Switch to the .toc subsegment. */
3783
3784static void
3785ppc_toc (ignore)
5480ccf3 3786 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3787{
3788 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3789 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH
3790 else
3791 {
3792 subsegT subseg;
3793 symbolS *sym;
3794 symbolS *list;
81d4177b 3795
252b5132
RH
3796 subseg = ppc_data_subsegment;
3797 ++ppc_data_subsegment;
3798
3799 subseg_new (segment_name (data_section), subseg);
3800 ppc_toc_frag = frag_now;
3801
3802 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3803 symbol_set_frag (sym, frag_now);
252b5132
RH
3804 S_SET_SEGMENT (sym, data_section);
3805 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT
3806 symbol_get_tc (sym)->subseg = subseg;
3807 symbol_get_tc (sym)->output = 1;
3808 symbol_get_tc (sym)->within = sym;
252b5132
RH
3809
3810 ppc_toc_csect = sym;
81d4177b 3811
252b5132 3812 for (list = ppc_data_csects;
809ffe0d
ILT
3813 symbol_get_tc (list)->next != (symbolS *) NULL;
3814 list = symbol_get_tc (list)->next)
252b5132 3815 ;
809ffe0d 3816 symbol_get_tc (list)->next = sym;
252b5132
RH
3817
3818 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
3819 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3820 &symbol_lastP);
252b5132
RH
3821 }
3822
3823 ppc_current_csect = ppc_toc_csect;
3824
3825 demand_empty_rest_of_line ();
3826}
3827
3828/* The AIX assembler automatically aligns the operands of a .long or
3829 .short pseudo-op, and we want to be compatible. */
3830
3831static void
3832ppc_xcoff_cons (log_size)
3833 int log_size;
3834{
3835 frag_align (log_size, 0, 0);
3836 record_alignment (now_seg, log_size);
3837 cons (1 << log_size);
3838}
3839
3840static void
3841ppc_vbyte (dummy)
5480ccf3 3842 int dummy ATTRIBUTE_UNUSED;
252b5132
RH
3843{
3844 expressionS exp;
3845 int byte_count;
3846
3847 (void) expression (&exp);
3848
3849 if (exp.X_op != O_constant)
3850 {
3851 as_bad (_("non-constant byte count"));
3852 return;
3853 }
3854
3855 byte_count = exp.X_add_number;
3856
3857 if (*input_line_pointer != ',')
3858 {
3859 as_bad (_("missing value"));
3860 return;
3861 }
3862
3863 ++input_line_pointer;
3864 cons (byte_count);
3865}
3866
3867#endif /* OBJ_XCOFF */
0baf16f2 3868#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH
3869\f
3870/* The .tc pseudo-op. This is used when generating either XCOFF or
3871 ELF. This takes two or more arguments.
3872
3873 When generating XCOFF output, the first argument is the name to
3874 give to this location in the toc; this will be a symbol with class
0baf16f2 3875 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3876 this location in the TOC; often there is just one more argument, a
1049f94e 3877 relocatable symbol reference. The size of the value to store
0baf16f2
AM
3878 depends on target word size. A 32-bit target uses 4-byte values, a
3879 64-bit target uses 8-byte values.
252b5132
RH
3880
3881 When not generating XCOFF output, the arguments are the same, but
3882 the first argument is simply ignored. */
3883
3884static void
3885ppc_tc (ignore)
92161534 3886 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3887{
3888#ifdef OBJ_XCOFF
3889
3890 /* Define the TOC symbol name. */
3891 {
3892 char *name;
3893 char endc;
3894 symbolS *sym;
3895
3896 if (ppc_toc_csect == (symbolS *) NULL
3897 || ppc_toc_csect != ppc_current_csect)
3898 {
3899 as_bad (_(".tc not in .toc section"));
3900 ignore_rest_of_line ();
3901 return;
3902 }
3903
3904 name = input_line_pointer;
3905 endc = get_symbol_end ();
3906
3907 sym = symbol_find_or_make (name);
3908
3909 *input_line_pointer = endc;
3910
3911 if (S_IS_DEFINED (sym))
3912 {
3913 symbolS *label;
3914
809ffe0d
ILT
3915 label = symbol_get_tc (ppc_current_csect)->within;
3916 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH
3917 {
3918 as_bad (_(".tc with no label"));
3919 ignore_rest_of_line ();
3920 return;
3921 }
3922
3923 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3924 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH
3925 S_SET_VALUE (label, S_GET_VALUE (sym));
3926
3927 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3928 ++input_line_pointer;
3929
3930 return;
3931 }
3932
3933 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3934 symbol_set_frag (sym, frag_now);
252b5132 3935 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT
3936 symbol_get_tc (sym)->class = XMC_TC;
3937 symbol_get_tc (sym)->output = 1;
252b5132
RH
3938
3939 ppc_frob_label (sym);
3940 }
3941
0baf16f2
AM
3942#endif /* OBJ_XCOFF */
3943#ifdef OBJ_ELF
9c7977b3 3944 int align;
252b5132
RH
3945
3946 /* Skip the TOC symbol name. */
3947 while (is_part_of_name (*input_line_pointer)
3948 || *input_line_pointer == '['
3949 || *input_line_pointer == ']'
3950 || *input_line_pointer == '{'
3951 || *input_line_pointer == '}')
3952 ++input_line_pointer;
3953
0baf16f2 3954 /* Align to a four/eight byte boundary. */
2b3c4602 3955 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM
3956 frag_align (align, 0, 0);
3957 record_alignment (now_seg, align);
0baf16f2 3958#endif /* OBJ_ELF */
252b5132
RH
3959
3960 if (*input_line_pointer != ',')
3961 demand_empty_rest_of_line ();
3962 else
3963 {
3964 ++input_line_pointer;
2b3c4602 3965 cons (ppc_obj64 ? 8 : 4);
252b5132
RH
3966 }
3967}
0baf16f2
AM
3968
3969/* Pseudo-op .machine. */
15c1449b 3970/* FIXME: `.machine' is a nop for the moment. It would be nice to
2b3c4602 3971 accept this directive on the first line of input and set ppc_obj64
15c1449b
AM
3972 and the target format accordingly. Unfortunately, the target
3973 format is selected in output-file.c:output_file_create before we
3974 even get to md_begin, so it's not possible without changing
3975 as.c:main. */
0baf16f2
AM
3976
3977static void
3978ppc_machine (ignore)
3979 int ignore ATTRIBUTE_UNUSED;
3980{
3981 discard_rest_of_line ();
3982}
3983
3984/* See whether a symbol is in the TOC section. */
3985
3986static int
3987ppc_is_toc_sym (sym)
3988 symbolS *sym;
3989{
3990#ifdef OBJ_XCOFF
3991 return symbol_get_tc (sym)->class == XMC_TC;
3992#endif
3993#ifdef OBJ_ELF
3994 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 3995 if (ppc_obj64)
0baf16f2
AM
3996 return strcmp (sname, ".toc") == 0;
3997 else
3998 return strcmp (sname, ".got") == 0;
3999#endif
4000}
4001#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH
4002\f
4003#ifdef TE_PE
4004
99a814a1 4005/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH
4006
4007/* Set the current section. */
4008static void
4009ppc_set_current_section (new)
4010 segT new;
4011{
4012 ppc_previous_section = ppc_current_section;
4013 ppc_current_section = new;
4014}
4015
4016/* pseudo-op: .previous
4017 behaviour: toggles the current section with the previous section.
4018 errors: None
99a814a1
AM
4019 warnings: "No previous section" */
4020
252b5132 4021static void
99a814a1 4022ppc_previous (ignore)
5480ccf3 4023 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4024{
4025 symbolS *tmp;
4026
81d4177b 4027 if (ppc_previous_section == NULL)
252b5132 4028 {
99a814a1 4029 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH
4030 return;
4031 }
4032
99a814a1 4033 subseg_set (ppc_previous_section, 0);
252b5132 4034
99a814a1 4035 ppc_set_current_section (ppc_previous_section);
252b5132
RH
4036}
4037
4038/* pseudo-op: .pdata
4039 behaviour: predefined read only data section
b34976b6 4040 double word aligned
252b5132
RH
4041 errors: None
4042 warnings: None
4043 initial: .section .pdata "adr3"
b34976b6 4044 a - don't know -- maybe a misprint
252b5132
RH
4045 d - initialized data
4046 r - readable
4047 3 - double word aligned (that would be 4 byte boundary)
4048
4049 commentary:
4050 Tag index tables (also known as the function table) for exception
99a814a1 4051 handling, debugging, etc. */
252b5132 4052
252b5132 4053static void
99a814a1 4054ppc_pdata (ignore)
5480ccf3 4055 int ignore ATTRIBUTE_UNUSED;
252b5132 4056{
81d4177b 4057 if (pdata_section == 0)
252b5132
RH
4058 {
4059 pdata_section = subseg_new (".pdata", 0);
81d4177b 4060
252b5132
RH
4061 bfd_set_section_flags (stdoutput, pdata_section,
4062 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4063 | SEC_READONLY | SEC_DATA ));
81d4177b 4064
252b5132
RH
4065 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4066 }
4067 else
4068 {
99a814a1 4069 pdata_section = subseg_new (".pdata", 0);
252b5132 4070 }
99a814a1 4071 ppc_set_current_section (pdata_section);
252b5132
RH
4072}
4073
4074/* pseudo-op: .ydata
4075 behaviour: predefined read only data section
b34976b6 4076 double word aligned
252b5132
RH
4077 errors: None
4078 warnings: None
4079 initial: .section .ydata "drw3"
b34976b6 4080 a - don't know -- maybe a misprint
252b5132
RH
4081 d - initialized data
4082 r - readable
4083 3 - double word aligned (that would be 4 byte boundary)
4084 commentary:
4085 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM
4086 debugging, etc. */
4087
252b5132 4088static void
99a814a1 4089ppc_ydata (ignore)
5480ccf3 4090 int ignore ATTRIBUTE_UNUSED;
252b5132 4091{
81d4177b 4092 if (ydata_section == 0)
252b5132
RH
4093 {
4094 ydata_section = subseg_new (".ydata", 0);
4095 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM
4096 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4097 | SEC_READONLY | SEC_DATA ));
252b5132
RH
4098
4099 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4100 }
4101 else
4102 {
4103 ydata_section = subseg_new (".ydata", 0);
4104 }
99a814a1 4105 ppc_set_current_section (ydata_section);
252b5132
RH
4106}
4107
4108/* pseudo-op: .reldata
4109 behaviour: predefined read write data section
b34976b6 4110 double word aligned (4-byte)
252b5132
RH
4111 FIXME: relocation is applied to it
4112 FIXME: what's the difference between this and .data?
4113 errors: None
4114 warnings: None
4115 initial: .section .reldata "drw3"
4116 d - initialized data
4117 r - readable
4118 w - writeable
4119 3 - double word aligned (that would be 8 byte boundary)
4120
4121 commentary:
4122 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM
4123 function descriptors, etc. */
4124
252b5132 4125static void
99a814a1 4126ppc_reldata (ignore)
5480ccf3 4127 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4128{
4129 if (reldata_section == 0)
4130 {
4131 reldata_section = subseg_new (".reldata", 0);
4132
4133 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM
4134 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4135 | SEC_DATA));
252b5132
RH
4136
4137 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4138 }
4139 else
4140 {
4141 reldata_section = subseg_new (".reldata", 0);
4142 }
99a814a1 4143 ppc_set_current_section (reldata_section);
252b5132
RH
4144}
4145
4146/* pseudo-op: .rdata
4147 behaviour: predefined read only data section
b34976b6 4148 double word aligned
252b5132
RH
4149 errors: None
4150 warnings: None
4151 initial: .section .rdata "dr3"
4152 d - initialized data
4153 r - readable
99a814a1
AM
4154 3 - double word aligned (that would be 4 byte boundary) */
4155
252b5132 4156static void
99a814a1 4157ppc_rdata (ignore)
5480ccf3 4158 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4159{
4160 if (rdata_section == 0)
4161 {
4162 rdata_section = subseg_new (".rdata", 0);
4163 bfd_set_section_flags (stdoutput, rdata_section,
4164 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4165 | SEC_READONLY | SEC_DATA ));
4166
4167 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4168 }
4169 else
4170 {
4171 rdata_section = subseg_new (".rdata", 0);
4172 }
99a814a1 4173 ppc_set_current_section (rdata_section);
252b5132
RH
4174}
4175
4176/* pseudo-op: .ualong
81d4177b 4177 behaviour: much like .int, with the exception that no alignment is
b34976b6 4178 performed.
252b5132
RH
4179 FIXME: test the alignment statement
4180 errors: None
99a814a1
AM
4181 warnings: None */
4182
252b5132 4183static void
99a814a1 4184ppc_ualong (ignore)
5480ccf3 4185 int ignore ATTRIBUTE_UNUSED;
252b5132 4186{
99a814a1
AM
4187 /* Try for long. */
4188 cons (4);
252b5132
RH
4189}
4190
4191/* pseudo-op: .znop <symbol name>
4192 behaviour: Issue a nop instruction
b34976b6 4193 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH
4194 the supplied symbol name.
4195 errors: None
99a814a1
AM
4196 warnings: Missing symbol name */
4197
252b5132 4198static void
99a814a1 4199ppc_znop (ignore)
5480ccf3 4200 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4201{
4202 unsigned long insn;
4203 const struct powerpc_opcode *opcode;
4204 expressionS ex;
4205 char *f;
252b5132 4206 symbolS *sym;
252b5132
RH
4207 char *symbol_name;
4208 char c;
4209 char *name;
4210 unsigned int exp;
4211 flagword flags;
4212 asection *sec;
4213
99a814a1 4214 /* Strip out the symbol name. */
252b5132
RH
4215 symbol_name = input_line_pointer;
4216 c = get_symbol_end ();
4217
4218 name = xmalloc (input_line_pointer - symbol_name + 1);
4219 strcpy (name, symbol_name);
4220
4221 sym = symbol_find_or_make (name);
4222
4223 *input_line_pointer = c;
4224
4225 SKIP_WHITESPACE ();
4226
4227 /* Look up the opcode in the hash table. */
4228 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4229
99a814a1 4230 /* Stick in the nop. */
252b5132
RH
4231 insn = opcode->opcode;
4232
4233 /* Write out the instruction. */
4234 f = frag_more (4);
4235 md_number_to_chars (f, insn, 4);
4236 fix_new (frag_now,
4237 f - frag_now->fr_literal,
4238 4,
4239 sym,
4240 0,
4241 0,
4242 BFD_RELOC_16_GOT_PCREL);
4243
4244}
4245
81d4177b
KH
4246/* pseudo-op:
4247 behaviour:
4248 errors:
99a814a1
AM
4249 warnings: */
4250
252b5132 4251static void
99a814a1 4252ppc_pe_comm (lcomm)
252b5132
RH
4253 int lcomm;
4254{
4255 register char *name;
4256 register char c;
4257 register char *p;
4258 offsetT temp;
4259 register symbolS *symbolP;
4260 offsetT align;
4261
4262 name = input_line_pointer;
4263 c = get_symbol_end ();
4264
99a814a1 4265 /* just after name is now '\0'. */
252b5132
RH
4266 p = input_line_pointer;
4267 *p = c;
4268 SKIP_WHITESPACE ();
4269 if (*input_line_pointer != ',')
4270 {
4271 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4272 ignore_rest_of_line ();
4273 return;
4274 }
4275
4276 input_line_pointer++; /* skip ',' */
4277 if ((temp = get_absolute_expression ()) < 0)
4278 {
4279 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4280 ignore_rest_of_line ();
4281 return;
4282 }
4283
4284 if (! lcomm)
4285 {
4286 /* The third argument to .comm is the alignment. */
4287 if (*input_line_pointer != ',')
4288 align = 3;
4289 else
4290 {
4291 ++input_line_pointer;
4292 align = get_absolute_expression ();
4293 if (align <= 0)
4294 {
4295 as_warn (_("ignoring bad alignment"));
4296 align = 3;
4297 }
4298 }
4299 }
4300
4301 *p = 0;
4302 symbolP = symbol_find_or_make (name);
4303
4304 *p = c;
4305 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4306 {
4307 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4308 S_GET_NAME (symbolP));
4309 ignore_rest_of_line ();
4310 return;
4311 }
4312
4313 if (S_GET_VALUE (symbolP))
4314 {
4315 if (S_GET_VALUE (symbolP) != (valueT) temp)
4316 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4317 S_GET_NAME (symbolP),
4318 (long) S_GET_VALUE (symbolP),
4319 (long) temp);
4320 }
4321 else
4322 {
4323 S_SET_VALUE (symbolP, (valueT) temp);
4324 S_SET_EXTERNAL (symbolP);
4325 }
4326
4327 demand_empty_rest_of_line ();
4328}
4329
4330/*
4331 * implement the .section pseudo op:
4332 * .section name {, "flags"}
4333 * ^ ^
4334 * | +--- optional flags: 'b' for bss
4335 * | 'i' for info
4336 * +-- section name 'l' for lib
4337 * 'n' for noload
4338 * 'o' for over
4339 * 'w' for data
4340 * 'd' (apparently m88k for data)
4341 * 'x' for text
4342 * But if the argument is not a quoted string, treat it as a
4343 * subsegment number.
4344 *
4345 * FIXME: this is a copy of the section processing from obj-coff.c, with
4346 * additions/changes for the moto-pas assembler support. There are three
4347 * categories:
4348 *
81d4177b 4349 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH
4350 * setting bits that bfd probably neither understands or uses. The
4351 * correct approach (?) will have to incorporate extra fields attached
4352 * to the section to hold the system specific stuff. (krk)
4353 *
4354 * Section Contents:
4355 * 'a' - unknown - referred to in documentation, but no definition supplied
4356 * 'c' - section has code
4357 * 'd' - section has initialized data
4358 * 'u' - section has uninitialized data
4359 * 'i' - section contains directives (info)
4360 * 'n' - section can be discarded
4361 * 'R' - remove section at link time
4362 *
4363 * Section Protection:
4364 * 'r' - section is readable
4365 * 'w' - section is writeable
4366 * 'x' - section is executable
4367 * 's' - section is sharable
4368 *
4369 * Section Alignment:
4370 * '0' - align to byte boundary
4371 * '1' - align to halfword undary
4372 * '2' - align to word boundary
4373 * '3' - align to doubleword boundary
4374 * '4' - align to quadword boundary
4375 * '5' - align to 32 byte boundary
4376 * '6' - align to 64 byte boundary
4377 *
4378 */
4379
4380void
4381ppc_pe_section (ignore)
5480ccf3 4382 int ignore ATTRIBUTE_UNUSED;
252b5132 4383{
99a814a1 4384 /* Strip out the section name. */
252b5132
RH
4385 char *section_name;
4386 char c;
4387 char *name;
4388 unsigned int exp;
4389 flagword flags;
4390 segT sec;
4391 int align;
4392
4393 section_name = input_line_pointer;
4394 c = get_symbol_end ();
4395
4396 name = xmalloc (input_line_pointer - section_name + 1);
4397 strcpy (name, section_name);
4398
4399 *input_line_pointer = c;
4400
4401 SKIP_WHITESPACE ();
4402
4403 exp = 0;
4404 flags = SEC_NO_FLAGS;
4405
4406 if (strcmp (name, ".idata$2") == 0)
4407 {
4408 align = 0;
4409 }
4410 else if (strcmp (name, ".idata$3") == 0)
4411 {
4412 align = 0;
4413 }
4414 else if (strcmp (name, ".idata$4") == 0)
4415 {
4416 align = 2;
4417 }
4418 else if (strcmp (name, ".idata$5") == 0)
4419 {
4420 align = 2;
4421 }
4422 else if (strcmp (name, ".idata$6") == 0)
4423 {
4424 align = 1;
4425 }
4426 else
99a814a1
AM
4427 /* Default alignment to 16 byte boundary. */
4428 align = 4;
252b5132
RH
4429
4430 if (*input_line_pointer == ',')
4431 {
4432 ++input_line_pointer;
4433 SKIP_WHITESPACE ();
4434 if (*input_line_pointer != '"')
4435 exp = get_absolute_expression ();
4436 else
4437 {
4438 ++input_line_pointer;
4439 while (*input_line_pointer != '"'
4440 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4441 {
4442 switch (*input_line_pointer)
4443 {
4444 /* Section Contents */
4445 case 'a': /* unknown */
4446 as_bad (_("Unsupported section attribute -- 'a'"));
4447 break;
4448 case 'c': /* code section */
81d4177b 4449 flags |= SEC_CODE;
252b5132
RH
4450 break;
4451 case 'd': /* section has initialized data */
4452 flags |= SEC_DATA;
4453 break;
4454 case 'u': /* section has uninitialized data */
4455 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4456 in winnt.h */
4457 flags |= SEC_ROM;
4458 break;
4459 case 'i': /* section contains directives (info) */
4460 /* FIXME: This is IMAGE_SCN_LNK_INFO
4461 in winnt.h */
4462 flags |= SEC_HAS_CONTENTS;
4463 break;
4464 case 'n': /* section can be discarded */
81d4177b 4465 flags &=~ SEC_LOAD;
252b5132
RH
4466 break;
4467 case 'R': /* Remove section at link time */
4468 flags |= SEC_NEVER_LOAD;
4469 break;
4470
4471 /* Section Protection */
4472 case 'r': /* section is readable */
4473 flags |= IMAGE_SCN_MEM_READ;
4474 break;
4475 case 'w': /* section is writeable */
4476 flags |= IMAGE_SCN_MEM_WRITE;
4477 break;
4478 case 'x': /* section is executable */
4479 flags |= IMAGE_SCN_MEM_EXECUTE;
4480 break;
4481 case 's': /* section is sharable */
4482 flags |= IMAGE_SCN_MEM_SHARED;
4483 break;
4484
4485 /* Section Alignment */
4486 case '0': /* align to byte boundary */
4487 flags |= IMAGE_SCN_ALIGN_1BYTES;
4488 align = 0;
4489 break;
4490 case '1': /* align to halfword boundary */
4491 flags |= IMAGE_SCN_ALIGN_2BYTES;
4492 align = 1;
4493 break;
4494 case '2': /* align to word boundary */
4495 flags |= IMAGE_SCN_ALIGN_4BYTES;
4496 align = 2;
4497 break;
4498 case '3': /* align to doubleword boundary */
4499 flags |= IMAGE_SCN_ALIGN_8BYTES;
4500 align = 3;
4501 break;
4502 case '4': /* align to quadword boundary */
4503 flags |= IMAGE_SCN_ALIGN_16BYTES;
4504 align = 4;
4505 break;
4506 case '5': /* align to 32 byte boundary */
4507 flags |= IMAGE_SCN_ALIGN_32BYTES;
4508 align = 5;
4509 break;
4510 case '6': /* align to 64 byte boundary */
4511 flags |= IMAGE_SCN_ALIGN_64BYTES;
4512 align = 6;
4513 break;
4514
4515 default:
99a814a1
AM
4516 as_bad (_("unknown section attribute '%c'"),
4517 *input_line_pointer);
252b5132
RH
4518 break;
4519 }
4520 ++input_line_pointer;
4521 }
4522 if (*input_line_pointer == '"')
4523 ++input_line_pointer;
4524 }
4525 }
4526
4527 sec = subseg_new (name, (subsegT) exp);
4528
99a814a1 4529 ppc_set_current_section (sec);
252b5132
RH
4530
4531 if (flags != SEC_NO_FLAGS)
4532 {
4533 if (! bfd_set_section_flags (stdoutput, sec, flags))
4534 as_bad (_("error setting flags for \"%s\": %s"),
4535 bfd_section_name (stdoutput, sec),
4536 bfd_errmsg (bfd_get_error ()));
4537 }
4538
99a814a1 4539 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH
4540
4541}
4542
4543static void
4544ppc_pe_function (ignore)
5480ccf3 4545 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4546{
4547 char *name;
4548 char endc;
4549 symbolS *ext_sym;
4550
4551 name = input_line_pointer;
4552 endc = get_symbol_end ();
4553
4554 ext_sym = symbol_find_or_make (name);
4555
4556 *input_line_pointer = endc;
4557
4558 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4559 SF_SET_FUNCTION (ext_sym);
4560 SF_SET_PROCESS (ext_sym);
4561 coff_add_linesym (ext_sym);
4562
4563 demand_empty_rest_of_line ();
4564}
4565
4566static void
4567ppc_pe_tocd (ignore)
5480ccf3 4568 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4569{
4570 if (tocdata_section == 0)
4571 {
4572 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4573 /* FIXME: section flags won't work. */
252b5132
RH
4574 bfd_set_section_flags (stdoutput, tocdata_section,
4575 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4576 | SEC_READONLY | SEC_DATA));
252b5132
RH
4577
4578 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4579 }
4580 else
4581 {
4582 rdata_section = subseg_new (".tocd", 0);
4583 }
4584
99a814a1 4585 ppc_set_current_section (tocdata_section);
252b5132
RH
4586
4587 demand_empty_rest_of_line ();
4588}
4589
4590/* Don't adjust TOC relocs to use the section symbol. */
4591
4592int
4593ppc_pe_fix_adjustable (fix)
4594 fixS *fix;
4595{
4596 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4597}
4598
4599#endif
4600\f
4601#ifdef OBJ_XCOFF
4602
4603/* XCOFF specific symbol and file handling. */
4604
4605/* Canonicalize the symbol name. We use the to force the suffix, if
4606 any, to use square brackets, and to be in upper case. */
4607
4608char *
4609ppc_canonicalize_symbol_name (name)
4610 char *name;
4611{
4612 char *s;
4613
4614 if (ppc_stab_symbol)
4615 return name;
4616
4617 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4618 ;
4619 if (*s != '\0')
4620 {
4621 char brac;
4622
4623 if (*s == '[')
4624 brac = ']';
4625 else
4626 {
4627 *s = '[';
4628 brac = '}';
4629 }
4630
4631 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4632 *s = TOUPPER (*s);
252b5132
RH
4633
4634 if (*s == '\0' || s[1] != '\0')
4635 as_bad (_("bad symbol suffix"));
4636
4637 *s = ']';
4638 }
4639
4640 return name;
4641}
4642
4643/* Set the class of a symbol based on the suffix, if any. This is
4644 called whenever a new symbol is created. */
4645
4646void
4647ppc_symbol_new_hook (sym)
4648 symbolS *sym;
4649{
809ffe0d 4650 struct ppc_tc_sy *tc;
252b5132
RH
4651 const char *s;
4652
809ffe0d
ILT
4653 tc = symbol_get_tc (sym);
4654 tc->next = NULL;
4655 tc->output = 0;
4656 tc->class = -1;
4657 tc->real_name = NULL;
4658 tc->subseg = 0;
4659 tc->align = 0;
4660 tc->size = NULL;
4661 tc->within = NULL;
252b5132
RH
4662
4663 if (ppc_stab_symbol)
4664 return;
4665
4666 s = strchr (S_GET_NAME (sym), '[');
4667 if (s == (const char *) NULL)
4668 {
4669 /* There is no suffix. */
4670 return;
4671 }
4672
4673 ++s;
4674
4675 switch (s[0])
4676 {
4677 case 'B':
4678 if (strcmp (s, "BS]") == 0)
809ffe0d 4679 tc->class = XMC_BS;
252b5132
RH
4680 break;
4681 case 'D':
4682 if (strcmp (s, "DB]") == 0)
809ffe0d 4683 tc->class = XMC_DB;
252b5132 4684 else if (strcmp (s, "DS]") == 0)
809ffe0d 4685 tc->class = XMC_DS;
252b5132
RH
4686 break;
4687 case 'G':
4688 if (strcmp (s, "GL]") == 0)
809ffe0d 4689 tc->class = XMC_GL;
252b5132
RH
4690 break;
4691 case 'P':
4692 if (strcmp (s, "PR]") == 0)
809ffe0d 4693 tc->class = XMC_PR;
252b5132
RH
4694 break;
4695 case 'R':
4696 if (strcmp (s, "RO]") == 0)
809ffe0d 4697 tc->class = XMC_RO;
252b5132 4698 else if (strcmp (s, "RW]") == 0)
809ffe0d 4699 tc->class = XMC_RW;
252b5132
RH
4700 break;
4701 case 'S':
4702 if (strcmp (s, "SV]") == 0)
809ffe0d 4703 tc->class = XMC_SV;
252b5132
RH
4704 break;
4705 case 'T':
4706 if (strcmp (s, "TC]") == 0)
809ffe0d 4707 tc->class = XMC_TC;
252b5132 4708 else if (strcmp (s, "TI]") == 0)
809ffe0d 4709 tc->class = XMC_TI;
252b5132 4710 else if (strcmp (s, "TB]") == 0)
809ffe0d 4711 tc->class = XMC_TB;
252b5132 4712 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4713 tc->class = XMC_TC0;
252b5132
RH
4714 break;
4715 case 'U':
4716 if (strcmp (s, "UA]") == 0)
809ffe0d 4717 tc->class = XMC_UA;
252b5132 4718 else if (strcmp (s, "UC]") == 0)
809ffe0d 4719 tc->class = XMC_UC;
252b5132
RH
4720 break;
4721 case 'X':
4722 if (strcmp (s, "XO]") == 0)
809ffe0d 4723 tc->class = XMC_XO;
252b5132
RH
4724 break;
4725 }
4726
809ffe0d 4727 if (tc->class == -1)
252b5132
RH
4728 as_bad (_("Unrecognized symbol suffix"));
4729}
4730
4731/* Set the class of a label based on where it is defined. This
4732 handles symbols without suffixes. Also, move the symbol so that it
4733 follows the csect symbol. */
4734
4735void
4736ppc_frob_label (sym)
4737 symbolS *sym;
4738{
4739 if (ppc_current_csect != (symbolS *) NULL)
4740 {
809ffe0d
ILT
4741 if (symbol_get_tc (sym)->class == -1)
4742 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH
4743
4744 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
4745 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4746 &symbol_rootP, &symbol_lastP);
4747 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH
4748 }
4749}
4750
4751/* This variable is set by ppc_frob_symbol if any absolute symbols are
4752 seen. It tells ppc_adjust_symtab whether it needs to look through
4753 the symbols. */
4754
b34976b6 4755static bfd_boolean ppc_saw_abs;
252b5132
RH
4756
4757/* Change the name of a symbol just before writing it out. Set the
4758 real name if the .rename pseudo-op was used. Otherwise, remove any
4759 class suffix. Return 1 if the symbol should not be included in the
4760 symbol table. */
4761
4762int
4763ppc_frob_symbol (sym)
4764 symbolS *sym;
4765{
4766 static symbolS *ppc_last_function;
4767 static symbolS *set_end;
4768
4769 /* Discard symbols that should not be included in the output symbol
4770 table. */
809ffe0d
ILT
4771 if (! symbol_used_in_reloc_p (sym)
4772 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
252b5132 4773 || (! S_IS_EXTERNAL (sym)
809ffe0d 4774 && ! symbol_get_tc (sym)->output
252b5132
RH
4775 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4776 return 1;
4777
a161fe53
AM
4778 /* This one will disappear anyway. Don't make a csect sym for it. */
4779 if (sym == abs_section_sym)
4780 return 1;
4781
809ffe0d
ILT
4782 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4783 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH
4784 else
4785 {
4786 const char *name;
4787 const char *s;
4788
4789 name = S_GET_NAME (sym);
4790 s = strchr (name, '[');
4791 if (s != (char *) NULL)
4792 {
4793 unsigned int len;
4794 char *snew;
4795
4796 len = s - name;
4797 snew = xmalloc (len + 1);
4798 memcpy (snew, name, len);
4799 snew[len] = '\0';
4800
4801 S_SET_NAME (sym, snew);
4802 }
4803 }
4804
4805 if (set_end != (symbolS *) NULL)
4806 {
4807 SA_SET_SYM_ENDNDX (set_end, sym);
4808 set_end = NULL;
4809 }
4810
4811 if (SF_GET_FUNCTION (sym))
4812 {
4813 if (ppc_last_function != (symbolS *) NULL)
4814 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4815 ppc_last_function = sym;
809ffe0d 4816 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4817 {
6386f3a7 4818 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT
4819 SA_SET_SYM_FSIZE (sym,
4820 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH
4821 }
4822 }
4823 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4824 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4825 {
4826 if (ppc_last_function == (symbolS *) NULL)
4827 as_bad (_(".ef with no preceding .function"));
4828 else
4829 {
4830 set_end = ppc_last_function;
4831 ppc_last_function = NULL;
4832
4833 /* We don't have a C_EFCN symbol, but we need to force the
4834 COFF backend to believe that it has seen one. */
4835 coff_last_function = NULL;
4836 }
4837 }
4838
4839 if (! S_IS_EXTERNAL (sym)
809ffe0d 4840 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH
4841 && S_GET_STORAGE_CLASS (sym) != C_FILE
4842 && S_GET_STORAGE_CLASS (sym) != C_FCN
4843 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4844 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4845 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4846 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4847 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4848 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4849 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4850
4851 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4852 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4853 {
4854 int i;
4855 union internal_auxent *a;
4856
4857 /* Create a csect aux. */
4858 i = S_GET_NUMBER_AUXILIARY (sym);
4859 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT
4860 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4861 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH
4862 {
4863 /* This is the TOC table. */
4864 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4865 a->x_csect.x_scnlen.l = 0;
4866 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4867 }
809ffe0d 4868 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH
4869 {
4870 /* This is a csect symbol. x_scnlen is the size of the
4871 csect. */
809ffe0d 4872 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH
4873 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4874 S_GET_SEGMENT (sym))
4875 - S_GET_VALUE (sym));
4876 else
4877 {
6386f3a7 4878 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4879 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH
4880 - S_GET_VALUE (sym));
4881 }
809ffe0d 4882 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH
4883 }
4884 else if (S_GET_SEGMENT (sym) == bss_section)
4885 {
4886 /* This is a common symbol. */
809ffe0d
ILT
4887 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4888 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4889 if (S_IS_EXTERNAL (sym))
809ffe0d 4890 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4891 else
809ffe0d 4892 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH
4893 }
4894 else if (S_GET_SEGMENT (sym) == absolute_section)
4895 {
4896 /* This is an absolute symbol. The csect will be created by
99a814a1 4897 ppc_adjust_symtab. */
b34976b6 4898 ppc_saw_abs = TRUE;
252b5132 4899 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT
4900 if (symbol_get_tc (sym)->class == -1)
4901 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH
4902 }
4903 else if (! S_IS_DEFINED (sym))
4904 {
4905 /* This is an external symbol. */
4906 a->x_csect.x_scnlen.l = 0;
4907 a->x_csect.x_smtyp = XTY_ER;
4908 }
809ffe0d 4909 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH
4910 {
4911 symbolS *next;
4912
4913 /* This is a TOC definition. x_scnlen is the size of the
4914 TOC entry. */
4915 next = symbol_next (sym);
809ffe0d 4916 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH
4917 next = symbol_next (next);
4918 if (next == (symbolS *) NULL
809ffe0d 4919 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH
4920 {
4921 if (ppc_after_toc_frag == (fragS *) NULL)
4922 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4923 data_section)
4924 - S_GET_VALUE (sym));
4925 else
4926 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
4927 - S_GET_VALUE (sym));
4928 }
4929 else
4930 {
6386f3a7 4931 resolve_symbol_value (next);
252b5132
RH
4932 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
4933 - S_GET_VALUE (sym));
4934 }
4935 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4936 }
4937 else
4938 {
4939 symbolS *csect;
4940
4941 /* This is a normal symbol definition. x_scnlen is the
4942 symbol index of the containing csect. */
4943 if (S_GET_SEGMENT (sym) == text_section)
4944 csect = ppc_text_csects;
4945 else if (S_GET_SEGMENT (sym) == data_section)
4946 csect = ppc_data_csects;
4947 else
4948 abort ();
4949
4950 /* Skip the initial dummy symbol. */
809ffe0d 4951 csect = symbol_get_tc (csect)->next;
252b5132
RH
4952
4953 if (csect == (symbolS *) NULL)
4954 {
4955 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
4956 a->x_csect.x_scnlen.l = 0;
4957 }
4958 else
4959 {
809ffe0d 4960 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 4961 {
6386f3a7 4962 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT
4963 if (S_GET_VALUE (symbol_get_tc (csect)->next)
4964 > S_GET_VALUE (sym))
252b5132 4965 break;
809ffe0d 4966 csect = symbol_get_tc (csect)->next;
252b5132
RH
4967 }
4968
809ffe0d
ILT
4969 a->x_csect.x_scnlen.p =
4970 coffsymbol (symbol_get_bfdsym (csect))->native;
4971 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
4972 1;
252b5132
RH
4973 }
4974 a->x_csect.x_smtyp = XTY_LD;
4975 }
81d4177b 4976
252b5132
RH
4977 a->x_csect.x_parmhash = 0;
4978 a->x_csect.x_snhash = 0;
809ffe0d 4979 if (symbol_get_tc (sym)->class == -1)
252b5132
RH
4980 a->x_csect.x_smclas = XMC_PR;
4981 else
809ffe0d 4982 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH
4983 a->x_csect.x_stab = 0;
4984 a->x_csect.x_snstab = 0;
4985
4986 /* Don't let the COFF backend resort these symbols. */
809ffe0d 4987 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH
4988 }
4989 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
4990 {
4991 /* We want the value to be the symbol index of the referenced
4992 csect symbol. BFD will do that for us if we set the right
4993 flags. */
b782de16
AM
4994 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
4995 combined_entry_type *c = coffsymbol (bsym)->native;
4996
4997 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 4998 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH
4999 }
5000 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5001 {
5002 symbolS *block;
5003 symbolS *csect;
5004
5005 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT
5006 block = symbol_get_tc (sym)->within;
5007 csect = symbol_get_tc (block)->within;
6386f3a7 5008 resolve_symbol_value (csect);
252b5132
RH
5009 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5010 }
5011 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5012 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5013 {
5014 /* We want the value to be a file offset into the line numbers.
99a814a1
AM
5015 BFD will do that for us if we set the right flags. We have
5016 already set the value correctly. */
809ffe0d 5017 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH
5018 }
5019
5020 return 0;
5021}
5022
5023/* Adjust the symbol table. This creates csect symbols for all
5024 absolute symbols. */
5025
5026void
5027ppc_adjust_symtab ()
5028{
5029 symbolS *sym;
5030
5031 if (! ppc_saw_abs)
5032 return;
5033
5034 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5035 {
5036 symbolS *csect;
5037 int i;
5038 union internal_auxent *a;
5039
5040 if (S_GET_SEGMENT (sym) != absolute_section)
5041 continue;
5042
5043 csect = symbol_create (".abs[XO]", absolute_section,
5044 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5045 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH
5046 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5047 i = S_GET_NUMBER_AUXILIARY (csect);
5048 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5049 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH
5050 a->x_csect.x_scnlen.l = 0;
5051 a->x_csect.x_smtyp = XTY_SD;
5052 a->x_csect.x_parmhash = 0;
5053 a->x_csect.x_snhash = 0;
5054 a->x_csect.x_smclas = XMC_XO;
5055 a->x_csect.x_stab = 0;
5056 a->x_csect.x_snstab = 0;
5057
5058 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5059
5060 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT
5061 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5062 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5063 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH
5064 }
5065
b34976b6 5066 ppc_saw_abs = FALSE;
252b5132
RH
5067}
5068
5069/* Set the VMA for a section. This is called on all the sections in
5070 turn. */
5071
5072void
5073ppc_frob_section (sec)
5074 asection *sec;
5075{
931e13a6 5076 static bfd_vma vma = 0;
252b5132 5077
931e13a6 5078 vma = md_section_align (sec, vma);
252b5132
RH
5079 bfd_set_section_vma (stdoutput, sec, vma);
5080 vma += bfd_section_size (stdoutput, sec);
5081}
5082
5083#endif /* OBJ_XCOFF */
5084\f
5085/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC
5086 of type TYPE, and store the appropriate bytes in *LITP. The number
5087 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH
5088 returned, or NULL on OK. */
5089
5090char *
5091md_atof (type, litp, sizep)
5092 int type;
5093 char *litp;
5094 int *sizep;
5095{
5096 int prec;
5097 LITTLENUM_TYPE words[4];
5098 char *t;
5099 int i;
5100
5101 switch (type)
5102 {
5103 case 'f':
5104 prec = 2;
5105 break;
5106
5107 case 'd':
5108 prec = 4;
5109 break;
5110
5111 default:
5112 *sizep = 0;
5113 return _("bad call to md_atof");
5114 }
5115
5116 t = atof_ieee (input_line_pointer, type, words);
5117 if (t)
5118 input_line_pointer = t;
5119
5120 *sizep = prec * 2;
5121
5122 if (target_big_endian)
5123 {
5124 for (i = 0; i < prec; i++)
5125 {
5126 md_number_to_chars (litp, (valueT) words[i], 2);
5127 litp += 2;
5128 }
5129 }
5130 else
5131 {
5132 for (i = prec - 1; i >= 0; i--)
5133 {
5134 md_number_to_chars (litp, (valueT) words[i], 2);
5135 litp += 2;
5136 }
5137 }
81d4177b 5138
252b5132
RH
5139 return NULL;
5140}
5141
5142/* Write a value out to the object file, using the appropriate
5143 endianness. */
5144
5145void
5146md_number_to_chars (buf, val, n)
5147 char *buf;
5148 valueT val;
5149 int n;
5150{
5151 if (target_big_endian)
5152 number_to_chars_bigendian (buf, val, n);
5153 else
5154 number_to_chars_littleendian (buf, val, n);
5155}
5156
5157/* Align a section (I don't know why this is machine dependent). */
5158
5159valueT
5160md_section_align (seg, addr)
5161 asection *seg;
5162 valueT addr;
5163{
5164 int align = bfd_get_section_alignment (stdoutput, seg);
5165
5166 return ((addr + (1 << align) - 1) & (-1 << align));
5167}
5168
5169/* We don't have any form of relaxing. */
5170
5171int
5172md_estimate_size_before_relax (fragp, seg)
92161534
ILT
5173 fragS *fragp ATTRIBUTE_UNUSED;
5174 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
5175{
5176 abort ();
5177 return 0;
5178}
5179
5180/* Convert a machine dependent frag. We never generate these. */
5181
5182void
5183md_convert_frag (abfd, sec, fragp)
92161534
ILT
5184 bfd *abfd ATTRIBUTE_UNUSED;
5185 asection *sec ATTRIBUTE_UNUSED;
5186 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH
5187{
5188 abort ();
5189}
5190
5191/* We have no need to default values of symbols. */
5192
252b5132
RH
5193symbolS *
5194md_undefined_symbol (name)
92161534 5195 char *name ATTRIBUTE_UNUSED;
252b5132
RH
5196{
5197 return 0;
5198}
5199\f
5200/* Functions concerning relocs. */
5201
5202/* The location from which a PC relative jump should be calculated,
5203 given a PC relative reloc. */
5204
5205long
5206md_pcrel_from_section (fixp, sec)
5207 fixS *fixp;
92161534 5208 segT sec ATTRIBUTE_UNUSED;
252b5132
RH
5209{
5210 return fixp->fx_frag->fr_address + fixp->fx_where;
5211}
5212
5213#ifdef OBJ_XCOFF
5214
5215/* This is called to see whether a fixup should be adjusted to use a
5216 section symbol. We take the opportunity to change a fixup against
5217 a symbol in the TOC subsegment into a reloc against the
5218 corresponding .tc symbol. */
5219
5220int
5221ppc_fix_adjustable (fix)
5222 fixS *fix;
5223{
b782de16
AM
5224 valueT val = resolve_symbol_value (fix->fx_addsy);
5225 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5226 TC_SYMFIELD_TYPE *tc;
5227
5228 if (symseg == absolute_section)
5229 return 0;
252b5132 5230
252b5132 5231 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5232 && fix->fx_addsy != ppc_toc_csect
b782de16 5233 && symseg == data_section
252b5132
RH
5234 && val >= ppc_toc_frag->fr_address
5235 && (ppc_after_toc_frag == (fragS *) NULL
5236 || val < ppc_after_toc_frag->fr_address))
5237 {
5238 symbolS *sy;
5239
5240 for (sy = symbol_next (ppc_toc_csect);
5241 sy != (symbolS *) NULL;
5242 sy = symbol_next (sy))
5243 {
b782de16
AM
5244 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5245
5246 if (sy_tc->class == XMC_TC0)
252b5132 5247 continue;
b782de16 5248 if (sy_tc->class != XMC_TC)
252b5132 5249 break;
b782de16 5250 if (val == resolve_symbol_value (sy))
252b5132
RH
5251 {
5252 fix->fx_addsy = sy;
5253 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5254 return 0;
5255 }
5256 }
5257
5258 as_bad_where (fix->fx_file, fix->fx_line,
5259 _("symbol in .toc does not match any .tc"));
5260 }
5261
5262 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM
5263 tc = symbol_get_tc (fix->fx_addsy);
5264 if (tc->subseg == 0
5265 && tc->class != XMC_TC0
5266 && tc->class != XMC_TC
5267 && symseg != bss_section
252b5132 5268 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5269 && (symseg != data_section
252b5132
RH
5270 || ppc_toc_csect == NULL
5271 || val < ppc_toc_frag->fr_address
5272 || (ppc_after_toc_frag != NULL
5273 && val >= ppc_after_toc_frag->fr_address)))
5274 {
5275 symbolS *csect;
b782de16 5276 symbolS *next_csect;
252b5132 5277
b782de16 5278 if (symseg == text_section)
252b5132 5279 csect = ppc_text_csects;
b782de16 5280 else if (symseg == data_section)
252b5132
RH
5281 csect = ppc_data_csects;
5282 else
5283 abort ();
5284
5285 /* Skip the initial dummy symbol. */
809ffe0d 5286 csect = symbol_get_tc (csect)->next;
252b5132
RH
5287
5288 if (csect != (symbolS *) NULL)
5289 {
b782de16
AM
5290 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5291 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH
5292 {
5293 /* If the csect address equals the symbol value, then we
99a814a1
AM
5294 have to look through the full symbol table to see
5295 whether this is the csect we want. Note that we will
5296 only get here if the csect has zero length. */
b782de16
AM
5297 if (symbol_get_frag (csect)->fr_address == val
5298 && S_GET_VALUE (csect) == val)
252b5132
RH
5299 {
5300 symbolS *scan;
5301
809ffe0d 5302 for (scan = symbol_next (csect);
252b5132 5303 scan != NULL;
809ffe0d 5304 scan = symbol_next (scan))
252b5132 5305 {
809ffe0d 5306 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH
5307 break;
5308 if (scan == fix->fx_addsy)
5309 break;
5310 }
5311
5312 /* If we found the symbol before the next csect
99a814a1 5313 symbol, then this is the csect we want. */
252b5132
RH
5314 if (scan == fix->fx_addsy)
5315 break;
5316 }
5317
b782de16 5318 csect = next_csect;
252b5132
RH
5319 }
5320
b782de16 5321 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH
5322 fix->fx_addsy = csect;
5323 }
b782de16 5324 return 0;
252b5132
RH
5325 }
5326
5327 /* Adjust a reloc against a .lcomm symbol to be against the base
5328 .lcomm. */
b782de16 5329 if (symseg == bss_section
252b5132
RH
5330 && ! S_IS_EXTERNAL (fix->fx_addsy))
5331 {
b782de16
AM
5332 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5333
5334 fix->fx_offset += val - resolve_symbol_value (sy);
5335 fix->fx_addsy = sy;
252b5132
RH
5336 }
5337
5338 return 0;
5339}
5340
5341/* A reloc from one csect to another must be kept. The assembler
5342 will, of course, keep relocs between sections, and it will keep
5343 absolute relocs, but we need to force it to keep PC relative relocs
5344 between two csects in the same section. */
5345
5346int
5347ppc_force_relocation (fix)
5348 fixS *fix;
5349{
5350 /* At this point fix->fx_addsy should already have been converted to
5351 a csect symbol. If the csect does not include the fragment, then
5352 we need to force the relocation. */
5353 if (fix->fx_pcrel
5354 && fix->fx_addsy != NULL
809ffe0d
ILT
5355 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5356 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5357 > fix->fx_frag->fr_address)
5358 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5359 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH
5360 <= fix->fx_frag->fr_address))))
5361 return 1;
5362
ae6063d4 5363 return generic_force_reloc (fix);
252b5132
RH
5364}
5365
5366#endif /* OBJ_XCOFF */
5367
0baf16f2 5368#ifdef OBJ_ELF
a161fe53
AM
5369/* If this function returns non-zero, it guarantees that a relocation
5370 will be emitted for a fixup. */
5371
5372int
5373ppc_force_relocation (fix)
5374 fixS *fix;
5375{
5376 /* Branch prediction relocations must force a relocation, as must
5377 the vtable description relocs. */
5378 switch (fix->fx_r_type)
5379 {
5380 case BFD_RELOC_PPC_B16_BRTAKEN:
5381 case BFD_RELOC_PPC_B16_BRNTAKEN:
5382 case BFD_RELOC_PPC_BA16_BRTAKEN:
5383 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5384 case BFD_RELOC_PPC64_TOC:
a161fe53
AM
5385 return 1;
5386 default:
5387 break;
5388 }
5389
cdba85ec
AM
5390 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5391 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5392 return 1;
5393
ae6063d4 5394 return generic_force_reloc (fix);
a161fe53
AM
5395}
5396
0baf16f2
AM
5397int
5398ppc_fix_adjustable (fix)
5399 fixS *fix;
252b5132 5400{
0baf16f2
AM
5401 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5402 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5403 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5404 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5405 && fix->fx_r_type != BFD_RELOC_GPREL16
5406 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5407 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec
AM
5408 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5409 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
0baf16f2
AM
5410 && (fix->fx_pcrel
5411 || (fix->fx_subsy != NULL
5412 && (S_GET_SEGMENT (fix->fx_subsy)
5413 == S_GET_SEGMENT (fix->fx_addsy)))
5414 || S_IS_LOCAL (fix->fx_addsy)));
252b5132 5415}
0baf16f2 5416#endif
252b5132
RH
5417
5418/* Apply a fixup to the object code. This is called for all the
5419 fixups we generated by the call to fix_new_exp, above. In the call
5420 above we used a reloc code which was the largest legal reloc code
5421 plus the operand index. Here we undo that to recover the operand
5422 index. At this point all symbol values should be fully resolved,
5423 and we attempt to completely resolve the reloc. If we can not do
5424 that, we determine the correct reloc code and put it back in the
5425 fixup. */
5426
94f592af
NC
5427void
5428md_apply_fix3 (fixP, valP, seg)
5429 fixS *fixP;
5430 valueT * valP;
0baf16f2 5431 segT seg ATTRIBUTE_UNUSED;
252b5132 5432{
94f592af 5433 valueT value = * valP;
252b5132
RH
5434
5435#ifdef OBJ_ELF
94f592af 5436 if (fixP->fx_addsy != NULL)
252b5132 5437 {
a161fe53 5438 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC
5439 if (fixP->fx_pcrel)
5440 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH
5441 }
5442 else
94f592af 5443 fixP->fx_done = 1;
252b5132 5444#else
a161fe53 5445 /* FIXME FIXME FIXME: The value we are passed in *valP includes
252b5132
RH
5446 the symbol values. Since we are using BFD_ASSEMBLER, if we are
5447 doing this relocation the code in write.c is going to call
5448 bfd_install_relocation, which is also going to use the symbol
5449 value. That means that if the reloc is fully resolved we want to
a161fe53 5450 use *valP since bfd_install_relocation is not being used.
252b5132 5451 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM
5452 *valP, and must use fx_offset instead. However, if the reloc
5453 is PC relative, we do want to use *valP since it includes the
252b5132 5454 result of md_pcrel_from. This is confusing. */
94f592af
NC
5455 if (fixP->fx_addsy == (symbolS *) NULL)
5456 fixP->fx_done = 1;
5457
5458 else if (fixP->fx_pcrel)
5459 ;
5460
252b5132 5461 else
a161fe53
AM
5462 value = fixP->fx_offset;
5463#endif
5464
5465 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5466 {
a161fe53
AM
5467 /* We can't actually support subtracting a symbol. */
5468 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5469 }
252b5132 5470
94f592af 5471 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH
5472 {
5473 int opindex;
5474 const struct powerpc_operand *operand;
5475 char *where;
5476 unsigned long insn;
5477
94f592af 5478 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH
5479
5480 operand = &powerpc_operands[opindex];
5481
5482#ifdef OBJ_XCOFF
0baf16f2
AM
5483 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5484 does not generate a reloc. It uses the offset of `sym' within its
5485 csect. Other usages, such as `.long sym', generate relocs. This
5486 is the documented behaviour of non-TOC symbols. */
252b5132
RH
5487 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5488 && operand->bits == 16
5489 && operand->shift == 0
2b3c4602 5490 && (operand->insert == NULL || ppc_obj64)
94f592af
NC
5491 && fixP->fx_addsy != NULL
5492 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5493 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5494 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5495 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5496 {
94f592af
NC
5497 value = fixP->fx_offset;
5498 fixP->fx_done = 1;
252b5132
RH
5499 }
5500#endif
5501
5502 /* Fetch the instruction, insert the fully resolved operand
5503 value, and stuff the instruction back again. */
94f592af 5504 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH
5505 if (target_big_endian)
5506 insn = bfd_getb32 ((unsigned char *) where);
5507 else
5508 insn = bfd_getl32 ((unsigned char *) where);
5509 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5510 fixP->fx_file, fixP->fx_line);
252b5132
RH
5511 if (target_big_endian)
5512 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5513 else
5514 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5515
94f592af
NC
5516 if (fixP->fx_done)
5517 /* Nothing else to do here. */
5518 return;
252b5132 5519
94f592af 5520 assert (fixP->fx_addsy != NULL);
0baf16f2 5521
252b5132
RH
5522 /* Determine a BFD reloc value based on the operand information.
5523 We are only prepared to turn a few of the operands into
0baf16f2 5524 relocs. */
11b37b7b
AM
5525 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5526 && operand->bits == 26
5527 && operand->shift == 0)
94f592af 5528 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM
5529 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5530 && operand->bits == 16
5531 && operand->shift == 0)
95210096
AM
5532 {
5533 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5534#ifdef OBJ_XCOFF
5535 fixP->fx_size = 2;
5536 if (target_big_endian)
5537 fixP->fx_where += 2;
5538#endif
5539 }
11b37b7b
AM
5540 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5541 && operand->bits == 26
5542 && operand->shift == 0)
94f592af 5543 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM
5544 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5545 && operand->bits == 16
5546 && operand->shift == 0)
95210096
AM
5547 {
5548 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5549#ifdef OBJ_XCOFF
5550 fixP->fx_size = 2;
5551 if (target_big_endian)
5552 fixP->fx_where += 2;
5553#endif
5554 }
0baf16f2 5555#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM
5556 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5557 && operand->bits == 16
a7fc733f 5558 && operand->shift == 0)
11b37b7b 5559 {
a7fc733f
AM
5560 if (ppc_is_toc_sym (fixP->fx_addsy))
5561 {
5562 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5563#ifdef OBJ_ELF
a7fc733f
AM
5564 if (ppc_obj64
5565 && (operand->flags & PPC_OPERAND_DS) != 0)
5566 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5567#endif
5568 }
5569 else
5570 {
5571 fixP->fx_r_type = BFD_RELOC_16;
5572#ifdef OBJ_ELF
5573 if (ppc_obj64
5574 && (operand->flags & PPC_OPERAND_DS) != 0)
5575 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5576#endif
a7fc733f 5577 }
94f592af 5578 fixP->fx_size = 2;
11b37b7b 5579 if (target_big_endian)
94f592af 5580 fixP->fx_where += 2;
11b37b7b 5581 }
0baf16f2 5582#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5583 else
252b5132
RH
5584 {
5585 char *sfile;
5586 unsigned int sline;
5587
5588 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5589 symbol. */
94f592af
NC
5590 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5591 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH
5592 _("unresolved expression that must be resolved"));
5593 else
94f592af 5594 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5595 _("unsupported relocation against %s"),
94f592af
NC
5596 S_GET_NAME (fixP->fx_addsy));
5597 fixP->fx_done = 1;
5598 return;
252b5132
RH
5599 }
5600 }
5601 else
5602 {
5603#ifdef OBJ_ELF
94f592af 5604 ppc_elf_validate_fix (fixP, seg);
252b5132 5605#endif
94f592af 5606 switch (fixP->fx_r_type)
252b5132 5607 {
252b5132 5608 case BFD_RELOC_CTOR:
2b3c4602 5609 if (ppc_obj64)
9c7977b3
AM
5610 goto ctor64;
5611 /* fall through */
5612
0baf16f2 5613 case BFD_RELOC_32:
94f592af
NC
5614 if (fixP->fx_pcrel)
5615 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5616 /* fall through */
252b5132
RH
5617
5618 case BFD_RELOC_RVA:
5619 case BFD_RELOC_32_PCREL:
252b5132 5620 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5621 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH
5622 value, 4);
5623 break;
5624
7f6d05e8 5625 case BFD_RELOC_64:
9c7977b3 5626 ctor64:
94f592af
NC
5627 if (fixP->fx_pcrel)
5628 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5629 /* fall through */
0baf16f2 5630
7f6d05e8 5631 case BFD_RELOC_64_PCREL:
94f592af 5632 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5633 value, 8);
81d4177b 5634 break;
0baf16f2 5635
252b5132
RH
5636 case BFD_RELOC_LO16:
5637 case BFD_RELOC_16:
5638 case BFD_RELOC_GPREL16:
5639 case BFD_RELOC_16_GOT_PCREL:
5640 case BFD_RELOC_16_GOTOFF:
5641 case BFD_RELOC_LO16_GOTOFF:
5642 case BFD_RELOC_HI16_GOTOFF:
5643 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5644 case BFD_RELOC_16_BASEREL:
252b5132
RH
5645 case BFD_RELOC_LO16_BASEREL:
5646 case BFD_RELOC_HI16_BASEREL:
5647 case BFD_RELOC_HI16_S_BASEREL:
5648 case BFD_RELOC_PPC_EMB_NADDR16:
5649 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5650 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5651 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5652 case BFD_RELOC_PPC_EMB_SDAI16:
5653 case BFD_RELOC_PPC_EMB_SDA2REL:
5654 case BFD_RELOC_PPC_EMB_SDA2I16:
5655 case BFD_RELOC_PPC_EMB_RELSEC16:
5656 case BFD_RELOC_PPC_EMB_RELST_LO:
5657 case BFD_RELOC_PPC_EMB_RELST_HI:
5658 case BFD_RELOC_PPC_EMB_RELST_HA:
5659 case BFD_RELOC_PPC_EMB_RELSDA:
5660 case BFD_RELOC_PPC_TOC16:
0baf16f2 5661#ifdef OBJ_ELF
0baf16f2
AM
5662 case BFD_RELOC_PPC64_TOC16_LO:
5663 case BFD_RELOC_PPC64_TOC16_HI:
5664 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5665#endif
94f592af 5666 if (fixP->fx_pcrel)
252b5132 5667 {
94f592af
NC
5668 if (fixP->fx_addsy != NULL)
5669 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5670 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC
5671 bfd_get_reloc_code_name (fixP->fx_r_type),
5672 S_GET_NAME (fixP->fx_addsy));
252b5132 5673 else
94f592af 5674 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5675 _("cannot emit PC relative %s relocation"),
94f592af 5676 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH
5677 }
5678
94f592af 5679 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH
5680 value, 2);
5681 break;
5682
5683 /* This case happens when you write, for example,
5684 lis %r3,(L1-L2)@ha
5685 where L1 and L2 are defined later. */
5686 case BFD_RELOC_HI16:
94f592af 5687 if (fixP->fx_pcrel)
252b5132 5688 abort ();
94f592af 5689 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5690 PPC_HI (value), 2);
252b5132 5691 break;
0baf16f2 5692
252b5132 5693 case BFD_RELOC_HI16_S:
94f592af 5694 if (fixP->fx_pcrel)
252b5132 5695 abort ();
94f592af 5696 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5697 PPC_HA (value), 2);
5698 break;
5699
5700#ifdef OBJ_ELF
0baf16f2 5701 case BFD_RELOC_PPC64_HIGHER:
94f592af 5702 if (fixP->fx_pcrel)
0baf16f2 5703 abort ();
94f592af 5704 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5705 PPC_HIGHER (value), 2);
252b5132
RH
5706 break;
5707
0baf16f2 5708 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5709 if (fixP->fx_pcrel)
0baf16f2 5710 abort ();
94f592af 5711 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5712 PPC_HIGHERA (value), 2);
5713 break;
5714
5715 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5716 if (fixP->fx_pcrel)
0baf16f2 5717 abort ();
94f592af 5718 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5719 PPC_HIGHEST (value), 2);
5720 break;
5721
5722 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5723 if (fixP->fx_pcrel)
0baf16f2 5724 abort ();
94f592af 5725 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5726 PPC_HIGHESTA (value), 2);
5727 break;
5728
5729 case BFD_RELOC_PPC64_ADDR16_DS:
5730 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5731 case BFD_RELOC_PPC64_GOT16_DS:
5732 case BFD_RELOC_PPC64_GOT16_LO_DS:
5733 case BFD_RELOC_PPC64_PLT16_LO_DS:
5734 case BFD_RELOC_PPC64_SECTOFF_DS:
5735 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5736 case BFD_RELOC_PPC64_TOC16_DS:
5737 case BFD_RELOC_PPC64_TOC16_LO_DS:
5738 case BFD_RELOC_PPC64_PLTGOT16_DS:
5739 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5740 if (fixP->fx_pcrel)
0baf16f2
AM
5741 abort ();
5742 {
94f592af 5743 unsigned char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5744 unsigned long val, mask;
0baf16f2
AM
5745
5746 if (target_big_endian)
adadcc0c 5747 val = bfd_getb32 (where - 2);
0baf16f2 5748 else
adadcc0c
AM
5749 val = bfd_getl32 (where);
5750 mask = 0xfffc;
5751 /* lq insns reserve the four lsbs. */
5752 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5753 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM
5754 mask = 0xfff0;
5755 val |= value & mask;
0baf16f2
AM
5756 if (target_big_endian)
5757 bfd_putb16 ((bfd_vma) val, where);
5758 else
5759 bfd_putl16 ((bfd_vma) val, where);
5760 }
5761 break;
cdba85ec 5762
ba0b2174
AM
5763 case BFD_RELOC_PPC_B16_BRTAKEN:
5764 case BFD_RELOC_PPC_B16_BRNTAKEN:
5765 case BFD_RELOC_PPC_BA16_BRTAKEN:
5766 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5767 break;
5768
cdba85ec
AM
5769 case BFD_RELOC_PPC_TLS:
5770 case BFD_RELOC_PPC_DTPMOD:
5771 case BFD_RELOC_PPC_TPREL16:
5772 case BFD_RELOC_PPC_TPREL16_LO:
5773 case BFD_RELOC_PPC_TPREL16_HI:
5774 case BFD_RELOC_PPC_TPREL16_HA:
5775 case BFD_RELOC_PPC_TPREL:
5776 case BFD_RELOC_PPC_DTPREL16:
5777 case BFD_RELOC_PPC_DTPREL16_LO:
5778 case BFD_RELOC_PPC_DTPREL16_HI:
5779 case BFD_RELOC_PPC_DTPREL16_HA:
5780 case BFD_RELOC_PPC_DTPREL:
5781 case BFD_RELOC_PPC_GOT_TLSGD16:
5782 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5783 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5784 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5785 case BFD_RELOC_PPC_GOT_TLSLD16:
5786 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5787 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5788 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5789 case BFD_RELOC_PPC_GOT_TPREL16:
5790 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5791 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5792 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5793 case BFD_RELOC_PPC_GOT_DTPREL16:
5794 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5795 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5796 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5797 case BFD_RELOC_PPC64_TPREL16_DS:
5798 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5799 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5800 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5801 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5802 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5803 case BFD_RELOC_PPC64_DTPREL16_DS:
5804 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5805 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5806 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5807 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5808 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
5809 break;
0baf16f2 5810#endif
252b5132 5811 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5812 bytes, rather than 2, so offset it here appropriately. */
252b5132 5813 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5814 if (fixP->fx_pcrel)
252b5132
RH
5815 abort ();
5816
94f592af 5817 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH
5818 + ((target_big_endian) ? 2 : 0),
5819 value, 2);
5820 break;
5821
5822 case BFD_RELOC_8:
94f592af 5823 if (fixP->fx_pcrel)
252b5132
RH
5824 abort ();
5825
94f592af 5826 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH
5827 value, 1);
5828 break;
5829
5830 case BFD_RELOC_24_PLT_PCREL:
5831 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5832 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH
5833 abort ();
5834
94f592af 5835 if (fixP->fx_done)
99a814a1
AM
5836 {
5837 char *where;
5838 unsigned long insn;
5839
5840 /* Fetch the instruction, insert the fully resolved operand
5841 value, and stuff the instruction back again. */
94f592af 5842 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM
5843 if (target_big_endian)
5844 insn = bfd_getb32 ((unsigned char *) where);
5845 else
5846 insn = bfd_getl32 ((unsigned char *) where);
5847 if ((value & 3) != 0)
94f592af 5848 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM
5849 _("must branch to an address a multiple of 4"));
5850 if ((offsetT) value < -0x40000000
5851 || (offsetT) value >= 0x40000000)
94f592af 5852 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM
5853 _("@local or @plt branch destination is too far away, %ld bytes"),
5854 (long) value);
5855 insn = insn | (value & 0x03fffffc);
5856 if (target_big_endian)
5857 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5858 else
5859 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5860 }
252b5132
RH
5861 break;
5862
5863 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC
5864 fixP->fx_done = 0;
5865 if (fixP->fx_addsy
5866 && !S_IS_DEFINED (fixP->fx_addsy)
5867 && !S_IS_WEAK (fixP->fx_addsy))
5868 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH
5869 break;
5870
5871 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5872 fixP->fx_done = 0;
252b5132
RH
5873 break;
5874
0baf16f2 5875#ifdef OBJ_ELF
0baf16f2
AM
5876 /* Generated by reference to `sym@tocbase'. The sym is
5877 ignored by the linker. */
5878 case BFD_RELOC_PPC64_TOC:
94f592af 5879 fixP->fx_done = 0;
0baf16f2 5880 break;
0baf16f2 5881#endif
252b5132 5882 default:
bc805888 5883 fprintf (stderr,
94f592af 5884 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 5885 fflush (stderr);
252b5132
RH
5886 abort ();
5887 }
5888 }
5889
5890#ifdef OBJ_ELF
94f592af 5891 fixP->fx_addnumber = value;
252b5132 5892#else
94f592af
NC
5893 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
5894 fixP->fx_addnumber = 0;
252b5132
RH
5895 else
5896 {
5897#ifdef TE_PE
94f592af 5898 fixP->fx_addnumber = 0;
252b5132
RH
5899#else
5900 /* We want to use the offset within the data segment of the
5901 symbol, not the actual VMA of the symbol. */
94f592af
NC
5902 fixP->fx_addnumber =
5903 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH
5904#endif
5905 }
5906#endif
252b5132
RH
5907}
5908
5909/* Generate a reloc for a fixup. */
5910
5911arelent *
5912tc_gen_reloc (seg, fixp)
92161534 5913 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
5914 fixS *fixp;
5915{
5916 arelent *reloc;
5917
5918 reloc = (arelent *) xmalloc (sizeof (arelent));
5919
49309057
ILT
5920 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
5921 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
5922 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
5923 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
5924 if (reloc->howto == (reloc_howto_type *) NULL)
5925 {
5926 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM
5927 _("reloc %d not supported by object file format"),
5928 (int) fixp->fx_r_type);
252b5132
RH
5929 return NULL;
5930 }
5931 reloc->addend = fixp->fx_addnumber;
5932
5933 return reloc;
5934}
75e21f08
JJ
5935
5936void
5937ppc_cfi_frame_initial_instructions ()
5938{
5939 cfi_add_CFA_def_cfa (1, 0);
5940}
5941
5942int
5943tc_ppc_regname_to_dw2regnum (const char *regname)
5944{
5945 unsigned int regnum = -1;
5946 unsigned int i;
5947 const char *p;
5948 char *q;
5949 static struct { char *name; int dw2regnum; } regnames[] =
5950 {
5951 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
5952 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
5953 { "cc", 68 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
5954 { "spe_acc", 111 }, { "spefscr", 112 }
5955 };
5956
5957 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
5958 if (strcmp (regnames[i].name, regname) == 0)
5959 return regnames[i].dw2regnum;
5960
5961 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
5962 {
5963 p = regname + 1 + (regname[1] == '.');
5964 regnum = strtoul (p, &q, 10);
5965 if (p == q || *q || regnum >= 32)
5966 return -1;
5967 if (regname[0] == 'f')
5968 regnum += 32;
5969 else if (regname[0] == 'v')
5970 regnum += 77;
5971 }
5972 else if (regname[0] == 'c' && regname[1] == 'r')
5973 {
5974 p = regname + 2 + (regname[2] == '.');
5975 if (p[0] < '0' || p[0] > '7' || p[1])
5976 return -1;
5977 regnum = p[0] - '0' + 68;
5978 }
5979 return regnum;
5980}
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