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[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
ed84b57b 3 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
783de163
AM		 181
182/* The type of processor we are assembling for. This is one or more
183 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 184ppc_cpu_t ppc_cpu = 0;
252b5132
RH		 185\f
186/* The target specific pseudo-ops which we support. */
187
188const pseudo_typeS md_pseudo_table[] =
189{
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193#ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 221 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225#endif
226
227#ifdef OBJ_ELF
0baf16f2
AM		 228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
236#endif
237
238#ifdef TE_PE
99a814a1 239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 240 { "previous", ppc_previous, 0 },
241 { "pdata", ppc_pdata, 0 },
242 { "ydata", ppc_ydata, 0 },
243 { "reldata", ppc_reldata, 0 },
244 { "rdata", ppc_rdata, 0 },
245 { "ualong", ppc_ualong, 0 },
246 { "znop", ppc_znop, 0 },
247 { "comm", ppc_pe_comm, 0 },
248 { "lcomm", ppc_pe_comm, 1 },
249 { "section", ppc_pe_section, 0 },
250 { "function", ppc_pe_function,0 },
251 { "tocd", ppc_pe_tocd, 0 },
252#endif
253
0baf16f2 254#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 255 { "tc", ppc_tc, 0 },
0baf16f2
AM		 256 { "machine", ppc_machine, 0 },
257#endif
252b5132
RH		 258
259 { NULL, NULL, 0 }
260};
261
262\f
99a814a1
AM		 263/* Predefined register names if -mregnames (or default for Windows NT).
264 In general, there are lots of them, in an attempt to be compatible
265 with a number of other Windows NT assemblers. */
252b5132
RH		 266
267/* Structure to hold information about predefined registers. */
268struct pd_reg
269 {
270 char *name;
271 int value;
272 };
273
274/* List of registers that are pre-defined:
275
276 Each general register has predefined names of the form:
277 1. r<reg_num> which has the value <reg_num>.
278 2. r.<reg_num> which has the value <reg_num>.
279
252b5132
RH		 280 Each floating point register has predefined names of the form:
281 1. f<reg_num> which has the value <reg_num>.
282 2. f.<reg_num> which has the value <reg_num>.
283
7a899fff
C		 284 Each vector unit register has predefined names of the form:
285 1. v<reg_num> which has the value <reg_num>.
286 2. v.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each condition register has predefined names of the form:
289 1. cr<reg_num> which has the value <reg_num>.
290 2. cr.<reg_num> which has the value <reg_num>.
291
292 There are individual registers as well:
293 sp or r.sp has the value 1
294 rtoc or r.toc has the value 2
295 fpscr has the value 0
296 xer has the value 1
297 lr has the value 8
298 ctr has the value 9
299 pmr has the value 0
300 dar has the value 19
301 dsisr has the value 18
302 dec has the value 22
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
306
81d4177b 307 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 308
309static const struct pd_reg pre_defined_registers[] =
310{
311 { "cr.0", 0 }, /* Condition Registers */
312 { "cr.1", 1 },
313 { "cr.2", 2 },
314 { "cr.3", 3 },
315 { "cr.4", 4 },
316 { "cr.5", 5 },
317 { "cr.6", 6 },
318 { "cr.7", 7 },
319
320 { "cr0", 0 },
321 { "cr1", 1 },
322 { "cr2", 2 },
323 { "cr3", 3 },
324 { "cr4", 4 },
325 { "cr5", 5 },
326 { "cr6", 6 },
327 { "cr7", 7 },
328
329 { "ctr", 9 },
330
331 { "dar", 19 }, /* Data Access Register */
332 { "dec", 22 }, /* Decrementer */
333 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
334
335 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 336 { "f.1", 1 },
337 { "f.10", 10 },
338 { "f.11", 11 },
339 { "f.12", 12 },
340 { "f.13", 13 },
341 { "f.14", 14 },
342 { "f.15", 15 },
343 { "f.16", 16 },
344 { "f.17", 17 },
345 { "f.18", 18 },
346 { "f.19", 19 },
347 { "f.2", 2 },
348 { "f.20", 20 },
349 { "f.21", 21 },
350 { "f.22", 22 },
351 { "f.23", 23 },
352 { "f.24", 24 },
353 { "f.25", 25 },
354 { "f.26", 26 },
355 { "f.27", 27 },
356 { "f.28", 28 },
357 { "f.29", 29 },
358 { "f.3", 3 },
252b5132
RH		 359 { "f.30", 30 },
360 { "f.31", 31 },
066be9f7
PB		 361
362 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
363 { "f.33", 33 },
364 { "f.34", 34 },
365 { "f.35", 35 },
366 { "f.36", 36 },
367 { "f.37", 37 },
368 { "f.38", 38 },
369 { "f.39", 39 },
81d4177b 370 { "f.4", 4 },
066be9f7
PB		 371 { "f.40", 40 },
372 { "f.41", 41 },
373 { "f.42", 42 },
374 { "f.43", 43 },
375 { "f.44", 44 },
376 { "f.45", 45 },
377 { "f.46", 46 },
378 { "f.47", 47 },
379 { "f.48", 48 },
380 { "f.49", 49 },
81d4177b 381 { "f.5", 5 },
066be9f7
PB		 382 { "f.50", 50 },
383 { "f.51", 51 },
384 { "f.52", 52 },
385 { "f.53", 53 },
386 { "f.54", 54 },
387 { "f.55", 55 },
388 { "f.56", 56 },
389 { "f.57", 57 },
390 { "f.58", 58 },
391 { "f.59", 59 },
81d4177b 392 { "f.6", 6 },
066be9f7
PB		 393 { "f.60", 60 },
394 { "f.61", 61 },
395 { "f.62", 62 },
396 { "f.63", 63 },
81d4177b
KH		 397 { "f.7", 7 },
398 { "f.8", 8 },
399 { "f.9", 9 },
400
401 { "f0", 0 },
402 { "f1", 1 },
403 { "f10", 10 },
404 { "f11", 11 },
405 { "f12", 12 },
406 { "f13", 13 },
407 { "f14", 14 },
408 { "f15", 15 },
409 { "f16", 16 },
410 { "f17", 17 },
411 { "f18", 18 },
412 { "f19", 19 },
413 { "f2", 2 },
414 { "f20", 20 },
415 { "f21", 21 },
416 { "f22", 22 },
417 { "f23", 23 },
418 { "f24", 24 },
419 { "f25", 25 },
420 { "f26", 26 },
421 { "f27", 27 },
422 { "f28", 28 },
423 { "f29", 29 },
424 { "f3", 3 },
252b5132
RH		 425 { "f30", 30 },
426 { "f31", 31 },
066be9f7
PB		 427
428 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
429 { "f33", 33 },
430 { "f34", 34 },
431 { "f35", 35 },
432 { "f36", 36 },
433 { "f37", 37 },
434 { "f38", 38 },
435 { "f39", 39 },
81d4177b 436 { "f4", 4 },
066be9f7
PB		 437 { "f40", 40 },
438 { "f41", 41 },
439 { "f42", 42 },
440 { "f43", 43 },
441 { "f44", 44 },
442 { "f45", 45 },
443 { "f46", 46 },
444 { "f47", 47 },
445 { "f48", 48 },
446 { "f49", 49 },
81d4177b 447 { "f5", 5 },
066be9f7
PB		 448 { "f50", 50 },
449 { "f51", 51 },
450 { "f52", 52 },
451 { "f53", 53 },
452 { "f54", 54 },
453 { "f55", 55 },
454 { "f56", 56 },
455 { "f57", 57 },
456 { "f58", 58 },
457 { "f59", 59 },
81d4177b 458 { "f6", 6 },
066be9f7
PB		 459 { "f60", 60 },
460 { "f61", 61 },
461 { "f62", 62 },
462 { "f63", 63 },
81d4177b
KH		 463 { "f7", 7 },
464 { "f8", 8 },
465 { "f9", 9 },
252b5132
RH		 466
467 { "fpscr", 0 },
468
c3d65c1c
BE		 469 /* Quantization registers used with pair single instructions. */
470 { "gqr.0", 0 },
471 { "gqr.1", 1 },
472 { "gqr.2", 2 },
473 { "gqr.3", 3 },
474 { "gqr.4", 4 },
475 { "gqr.5", 5 },
476 { "gqr.6", 6 },
477 { "gqr.7", 7 },
478 { "gqr0", 0 },
479 { "gqr1", 1 },
480 { "gqr2", 2 },
481 { "gqr3", 3 },
482 { "gqr4", 4 },
483 { "gqr5", 5 },
484 { "gqr6", 6 },
485 { "gqr7", 7 },
486
252b5132
RH		 487 { "lr", 8 }, /* Link Register */
488
489 { "pmr", 0 },
490
491 { "r.0", 0 }, /* General Purpose Registers */
492 { "r.1", 1 },
493 { "r.10", 10 },
494 { "r.11", 11 },
495 { "r.12", 12 },
496 { "r.13", 13 },
497 { "r.14", 14 },
498 { "r.15", 15 },
499 { "r.16", 16 },
500 { "r.17", 17 },
501 { "r.18", 18 },
502 { "r.19", 19 },
503 { "r.2", 2 },
504 { "r.20", 20 },
505 { "r.21", 21 },
506 { "r.22", 22 },
507 { "r.23", 23 },
508 { "r.24", 24 },
509 { "r.25", 25 },
510 { "r.26", 26 },
511 { "r.27", 27 },
512 { "r.28", 28 },
513 { "r.29", 29 },
514 { "r.3", 3 },
515 { "r.30", 30 },
516 { "r.31", 31 },
517 { "r.4", 4 },
518 { "r.5", 5 },
519 { "r.6", 6 },
520 { "r.7", 7 },
521 { "r.8", 8 },
522 { "r.9", 9 },
523
524 { "r.sp", 1 }, /* Stack Pointer */
525
526 { "r.toc", 2 }, /* Pointer to the table of contents */
527
528 { "r0", 0 }, /* More general purpose registers */
529 { "r1", 1 },
530 { "r10", 10 },
531 { "r11", 11 },
532 { "r12", 12 },
533 { "r13", 13 },
534 { "r14", 14 },
535 { "r15", 15 },
536 { "r16", 16 },
537 { "r17", 17 },
538 { "r18", 18 },
539 { "r19", 19 },
540 { "r2", 2 },
541 { "r20", 20 },
542 { "r21", 21 },
543 { "r22", 22 },
544 { "r23", 23 },
545 { "r24", 24 },
546 { "r25", 25 },
547 { "r26", 26 },
548 { "r27", 27 },
549 { "r28", 28 },
550 { "r29", 29 },
551 { "r3", 3 },
552 { "r30", 30 },
553 { "r31", 31 },
554 { "r4", 4 },
555 { "r5", 5 },
556 { "r6", 6 },
557 { "r7", 7 },
558 { "r8", 8 },
559 { "r9", 9 },
560
561 { "rtoc", 2 }, /* Table of contents */
562
563 { "sdr1", 25 }, /* Storage Description Register 1 */
564
565 { "sp", 1 },
566
567 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
568 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 569
066be9f7 570 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 571 { "v.1", 1 },
572 { "v.10", 10 },
573 { "v.11", 11 },
574 { "v.12", 12 },
575 { "v.13", 13 },
576 { "v.14", 14 },
577 { "v.15", 15 },
578 { "v.16", 16 },
579 { "v.17", 17 },
580 { "v.18", 18 },
581 { "v.19", 19 },
582 { "v.2", 2 },
583 { "v.20", 20 },
584 { "v.21", 21 },
585 { "v.22", 22 },
586 { "v.23", 23 },
587 { "v.24", 24 },
588 { "v.25", 25 },
589 { "v.26", 26 },
590 { "v.27", 27 },
591 { "v.28", 28 },
592 { "v.29", 29 },
593 { "v.3", 3 },
7a899fff
C		 594 { "v.30", 30 },
595 { "v.31", 31 },
81d4177b
KH		 596 { "v.4", 4 },
597 { "v.5", 5 },
598 { "v.6", 6 },
599 { "v.7", 7 },
600 { "v.8", 8 },
601 { "v.9", 9 },
7a899fff
C		 602
603 { "v0", 0 },
81d4177b
KH		 604 { "v1", 1 },
605 { "v10", 10 },
606 { "v11", 11 },
607 { "v12", 12 },
608 { "v13", 13 },
609 { "v14", 14 },
610 { "v15", 15 },
611 { "v16", 16 },
612 { "v17", 17 },
613 { "v18", 18 },
614 { "v19", 19 },
615 { "v2", 2 },
616 { "v20", 20 },
617 { "v21", 21 },
618 { "v22", 22 },
619 { "v23", 23 },
620 { "v24", 24 },
621 { "v25", 25 },
622 { "v26", 26 },
623 { "v27", 27 },
624 { "v28", 28 },
625 { "v29", 29 },
626 { "v3", 3 },
7a899fff
C		 627 { "v30", 30 },
628 { "v31", 31 },
81d4177b
KH		 629 { "v4", 4 },
630 { "v5", 5 },
631 { "v6", 6 },
632 { "v7", 7 },
633 { "v8", 8 },
7a899fff 634 { "v9", 9 },
252b5132 635
066be9f7
PB		 636 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
637 { "vs.1", 1 },
638 { "vs.10", 10 },
639 { "vs.11", 11 },
640 { "vs.12", 12 },
641 { "vs.13", 13 },
642 { "vs.14", 14 },
643 { "vs.15", 15 },
644 { "vs.16", 16 },
645 { "vs.17", 17 },
646 { "vs.18", 18 },
647 { "vs.19", 19 },
648 { "vs.2", 2 },
649 { "vs.20", 20 },
650 { "vs.21", 21 },
651 { "vs.22", 22 },
652 { "vs.23", 23 },
653 { "vs.24", 24 },
654 { "vs.25", 25 },
655 { "vs.26", 26 },
656 { "vs.27", 27 },
657 { "vs.28", 28 },
658 { "vs.29", 29 },
659 { "vs.3", 3 },
660 { "vs.30", 30 },
661 { "vs.31", 31 },
662 { "vs.32", 32 },
663 { "vs.33", 33 },
664 { "vs.34", 34 },
665 { "vs.35", 35 },
666 { "vs.36", 36 },
667 { "vs.37", 37 },
668 { "vs.38", 38 },
669 { "vs.39", 39 },
670 { "vs.4", 4 },
671 { "vs.40", 40 },
672 { "vs.41", 41 },
673 { "vs.42", 42 },
674 { "vs.43", 43 },
675 { "vs.44", 44 },
676 { "vs.45", 45 },
677 { "vs.46", 46 },
678 { "vs.47", 47 },
679 { "vs.48", 48 },
680 { "vs.49", 49 },
681 { "vs.5", 5 },
682 { "vs.50", 50 },
683 { "vs.51", 51 },
684 { "vs.52", 52 },
685 { "vs.53", 53 },
686 { "vs.54", 54 },
687 { "vs.55", 55 },
688 { "vs.56", 56 },
689 { "vs.57", 57 },
690 { "vs.58", 58 },
691 { "vs.59", 59 },
692 { "vs.6", 6 },
693 { "vs.60", 60 },
694 { "vs.61", 61 },
695 { "vs.62", 62 },
696 { "vs.63", 63 },
697 { "vs.7", 7 },
698 { "vs.8", 8 },
699 { "vs.9", 9 },
700
701 { "vs0", 0 },
702 { "vs1", 1 },
703 { "vs10", 10 },
704 { "vs11", 11 },
705 { "vs12", 12 },
706 { "vs13", 13 },
707 { "vs14", 14 },
708 { "vs15", 15 },
709 { "vs16", 16 },
710 { "vs17", 17 },
711 { "vs18", 18 },
712 { "vs19", 19 },
713 { "vs2", 2 },
714 { "vs20", 20 },
715 { "vs21", 21 },
716 { "vs22", 22 },
717 { "vs23", 23 },
718 { "vs24", 24 },
719 { "vs25", 25 },
720 { "vs26", 26 },
721 { "vs27", 27 },
722 { "vs28", 28 },
723 { "vs29", 29 },
724 { "vs3", 3 },
725 { "vs30", 30 },
726 { "vs31", 31 },
727 { "vs32", 32 },
728 { "vs33", 33 },
729 { "vs34", 34 },
730 { "vs35", 35 },
731 { "vs36", 36 },
732 { "vs37", 37 },
733 { "vs38", 38 },
734 { "vs39", 39 },
735 { "vs4", 4 },
736 { "vs40", 40 },
737 { "vs41", 41 },
738 { "vs42", 42 },
739 { "vs43", 43 },
740 { "vs44", 44 },
741 { "vs45", 45 },
742 { "vs46", 46 },
743 { "vs47", 47 },
744 { "vs48", 48 },
745 { "vs49", 49 },
746 { "vs5", 5 },
747 { "vs50", 50 },
748 { "vs51", 51 },
749 { "vs52", 52 },
750 { "vs53", 53 },
751 { "vs54", 54 },
752 { "vs55", 55 },
753 { "vs56", 56 },
754 { "vs57", 57 },
755 { "vs58", 58 },
756 { "vs59", 59 },
757 { "vs6", 6 },
758 { "vs60", 60 },
759 { "vs61", 61 },
760 { "vs62", 62 },
761 { "vs63", 63 },
762 { "vs7", 7 },
763 { "vs8", 8 },
764 { "vs9", 9 },
765
252b5132
RH		 766 { "xer", 1 },
767
768};
769
bc805888 770#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 771
772/* Given NAME, find the register number associated with that name, return
773 the integer value associated with the given name or -1 on failure. */
774
252b5132 775static int
98027b10 776reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 777{
778 int middle, low, high;
779 int cmp;
780
781 low = 0;
782 high = regcount - 1;
783
784 do
785 {
786 middle = (low + high) / 2;
787 cmp = strcasecmp (name, regs[middle].name);
788 if (cmp < 0)
789 high = middle - 1;
790 else if (cmp > 0)
791 low = middle + 1;
792 else
793 return regs[middle].value;
794 }
795 while (low <= high);
796
797 return -1;
798}
799
800/*
99a814a1 801 * Summary of register_name.
252b5132
RH		 802 *
803 * in: Input_line_pointer points to 1st char of operand.
804 *
805 * out: A expressionS.
806 * The operand may have been a register: in this case, X_op == O_register,
807 * X_add_number is set to the register number, and truth is returned.
808 * Input_line_pointer->(next non-blank) char after operand, or is in its
809 * original state.
810 */
811
b34976b6 812static bfd_boolean
98027b10 813register_name (expressionS *expressionP)
252b5132
RH		 814{
815 int reg_number;
816 char *name;
817 char *start;
818 char c;
819
99a814a1 820 /* Find the spelling of the operand. */
252b5132 821 start = name = input_line_pointer;
3882b010 822 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 823 name = ++input_line_pointer;
824
3882b010 825 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 826 return FALSE;
252b5132
RH		 827
828 c = get_symbol_end ();
829 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
830
468cced8
AM		 831 /* Put back the delimiting char. */
832 *input_line_pointer = c;
833
99a814a1 834 /* Look to see if it's in the register table. */
81d4177b 835 if (reg_number >= 0)
252b5132
RH		 836 {
837 expressionP->X_op = O_register;
838 expressionP->X_add_number = reg_number;
81d4177b 839
99a814a1 840 /* Make the rest nice. */
252b5132
RH		 841 expressionP->X_add_symbol = NULL;
842 expressionP->X_op_symbol = NULL;
b34976b6 843 return TRUE;
252b5132 844 }
468cced8
AM		 845
846 /* Reset the line as if we had not done anything. */
847 input_line_pointer = start;
b34976b6 848 return FALSE;
252b5132
RH		 849}
850\f
851/* This function is called for each symbol seen in an expression. It
852 handles the special parsing which PowerPC assemblers are supposed
853 to use for condition codes. */
854
855/* Whether to do the special parsing. */
b34976b6 856static bfd_boolean cr_operand;
252b5132
RH		 857
858/* Names to recognize in a condition code. This table is sorted. */
859static const struct pd_reg cr_names[] =
860{
861 { "cr0", 0 },
862 { "cr1", 1 },
863 { "cr2", 2 },
864 { "cr3", 3 },
865 { "cr4", 4 },
866 { "cr5", 5 },
867 { "cr6", 6 },
868 { "cr7", 7 },
869 { "eq", 2 },
870 { "gt", 1 },
871 { "lt", 0 },
872 { "so", 3 },
873 { "un", 3 }
874};
875
876/* Parsing function. This returns non-zero if it recognized an
877 expression. */
878
879int
98027b10 880ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH		 881{
882 int val;
883
884 if (! cr_operand)
885 return 0;
886
13abbae3
AM		 887 if (*name == '%')
888 ++name;
252b5132
RH		 889 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
890 name);
891 if (val < 0)
892 return 0;
893
894 expr->X_op = O_constant;
895 expr->X_add_number = val;
896
897 return 1;
898}
899\f
900/* Local variables. */
901
2b3c4602
AM		 902/* Whether to target xcoff64/elf64. */
903static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 904
252b5132
RH		 905/* Opcode hash table. */
906static struct hash_control *ppc_hash;
907
908/* Macro hash table. */
909static struct hash_control *ppc_macro_hash;
910
911#ifdef OBJ_ELF
99a814a1 912/* What type of shared library support to use. */
5d6f4f16 913static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 914
99a814a1 915/* Flags to set in the elf header. */
252b5132
RH		 916static flagword ppc_flags = 0;
917
918/* Whether this is Solaris or not. */
919#ifdef TARGET_SOLARIS_COMMENT
b34976b6 920#define SOLARIS_P TRUE
252b5132 921#else
b34976b6 922#define SOLARIS_P FALSE
252b5132
RH		 923#endif
924
b34976b6 925static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 926#endif
927
928#ifdef OBJ_XCOFF
929
930/* The RS/6000 assembler uses the .csect pseudo-op to generate code
931 using a bunch of different sections. These assembler sections,
932 however, are all encompassed within the .text or .data sections of
933 the final output file. We handle this by using different
934 subsegments within these main segments. */
935
936/* Next subsegment to allocate within the .text segment. */
937static subsegT ppc_text_subsegment = 2;
938
939/* Linked list of csects in the text section. */
940static symbolS *ppc_text_csects;
941
942/* Next subsegment to allocate within the .data segment. */
943static subsegT ppc_data_subsegment = 2;
944
945/* Linked list of csects in the data section. */
946static symbolS *ppc_data_csects;
947
948/* The current csect. */
949static symbolS *ppc_current_csect;
950
951/* The RS/6000 assembler uses a TOC which holds addresses of functions
952 and variables. Symbols are put in the TOC with the .tc pseudo-op.
953 A special relocation is used when accessing TOC entries. We handle
954 the TOC as a subsegment within the .data segment. We set it up if
955 we see a .toc pseudo-op, and save the csect symbol here. */
956static symbolS *ppc_toc_csect;
957
958/* The first frag in the TOC subsegment. */
959static fragS *ppc_toc_frag;
960
961/* The first frag in the first subsegment after the TOC in the .data
962 segment. NULL if there are no subsegments after the TOC. */
963static fragS *ppc_after_toc_frag;
964
965/* The current static block. */
966static symbolS *ppc_current_block;
967
968/* The COFF debugging section; set by md_begin. This is not the
969 .debug section, but is instead the secret BFD section which will
970 cause BFD to set the section number of a symbol to N_DEBUG. */
971static asection *ppc_coff_debug_section;
972
973#endif /* OBJ_XCOFF */
974
975#ifdef TE_PE
976
977/* Various sections that we need for PE coff support. */
978static segT ydata_section;
979static segT pdata_section;
980static segT reldata_section;
981static segT rdata_section;
982static segT tocdata_section;
983
81d4177b 984/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 985static segT ppc_previous_section;
986static segT ppc_current_section;
987
988#endif /* TE_PE */
989
990#ifdef OBJ_ELF
991symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 992#define PPC_APUINFO_ISEL 0x40
993#define PPC_APUINFO_PMR 0x41
994#define PPC_APUINFO_RFMCI 0x42
995#define PPC_APUINFO_CACHELCK 0x43
996#define PPC_APUINFO_SPE 0x100
997#define PPC_APUINFO_EFS 0x101
998#define PPC_APUINFO_BRLOCK 0x102
999
b34976b6
AM		 1000/*
1001 * We keep a list of APUinfo
6a0c61b7
EZ		 1002 */
1003unsigned long *ppc_apuinfo_list;
1004unsigned int ppc_apuinfo_num;
1005unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1006#endif /* OBJ_ELF */
1007\f
1008#ifdef OBJ_ELF
15c1449b 1009const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1010#else
15c1449b 1011const char *const md_shortopts = "um:";
252b5132 1012#endif
15c1449b 1013const struct option md_longopts[] = {
252b5132
RH		 1014 {NULL, no_argument, NULL, 0}
1015};
15c1449b 1016const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1017
1018int
98027b10 1019md_parse_option (int c, char *arg)
252b5132 1020{
69fe9ce5
AM		 1021 ppc_cpu_t new_cpu;
1022
252b5132
RH		 1023 switch (c)
1024 {
1025 case 'u':
1026 /* -u means that any undefined symbols should be treated as
1027 external, which is the default for gas anyhow. */
1028 break;
1029
1030#ifdef OBJ_ELF
1031 case 'l':
1032 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1033 sake, recognize -be also. */
252b5132
RH		 1034 if (strcmp (arg, "e") == 0)
1035 {
1036 target_big_endian = 0;
1037 set_target_endian = 1;
1038 }
1039 else
1040 return 0;
1041
1042 break;
1043
1044 case 'b':
1045 if (strcmp (arg, "e") == 0)
1046 {
1047 target_big_endian = 1;
1048 set_target_endian = 1;
1049 }
1050 else
1051 return 0;
1052
1053 break;
1054
1055 case 'K':
99a814a1 1056 /* Recognize -K PIC. */
252b5132
RH		 1057 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1058 {
1059 shlib = SHLIB_PIC;
1060 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1061 }
1062 else
1063 return 0;
1064
1065 break;
1066#endif
1067
7f6d05e8
CP		 1068 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1069 case 'a':
1070 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1071 {
1072#ifdef BFD64
1073 ppc_obj64 = 1;
1074#else
1075 as_fatal (_("%s unsupported"), "-a64");
1076#endif
1077 }
7f6d05e8 1078 else if (strcmp (arg, "32") == 0)
2b3c4602 1079 ppc_obj64 = 0;
7f6d05e8
CP		 1080 else
1081 return 0;
1082 break;
81d4177b 1083
252b5132 1084 case 'm':
69fe9ce5
AM		 1085 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1086 ppc_cpu = new_cpu;
252b5132
RH		 1087
1088 else if (strcmp (arg, "regnames") == 0)
b34976b6 1089 reg_names_p = TRUE;
252b5132
RH		 1090
1091 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1092 reg_names_p = FALSE;
252b5132
RH		 1093
1094#ifdef OBJ_ELF
99a814a1
AM		 1095 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1096 that require relocation. */
252b5132
RH		 1097 else if (strcmp (arg, "relocatable") == 0)
1098 {
5d6f4f16 1099 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1100 ppc_flags |= EF_PPC_RELOCATABLE;
1101 }
1102
1103 else if (strcmp (arg, "relocatable-lib") == 0)
1104 {
5d6f4f16 1105 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1106 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1107 }
1108
99a814a1 1109 /* -memb, set embedded bit. */
252b5132
RH		 1110 else if (strcmp (arg, "emb") == 0)
1111 ppc_flags |= EF_PPC_EMB;
1112
99a814a1
AM		 1113 /* -mlittle/-mbig set the endianess. */
1114 else if (strcmp (arg, "little") == 0
1115 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1116 {
1117 target_big_endian = 0;
1118 set_target_endian = 1;
1119 }
1120
1121 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1122 {
1123 target_big_endian = 1;
1124 set_target_endian = 1;
1125 }
1126
1127 else if (strcmp (arg, "solaris") == 0)
1128 {
b34976b6 1129 msolaris = TRUE;
252b5132
RH		 1130 ppc_comment_chars = ppc_solaris_comment_chars;
1131 }
1132
1133 else if (strcmp (arg, "no-solaris") == 0)
1134 {
b34976b6 1135 msolaris = FALSE;
252b5132
RH		 1136 ppc_comment_chars = ppc_eabi_comment_chars;
1137 }
1138#endif
1139 else
1140 {
1141 as_bad (_("invalid switch -m%s"), arg);
1142 return 0;
1143 }
1144 break;
1145
1146#ifdef OBJ_ELF
1147 /* -V: SVR4 argument to print version ID. */
1148 case 'V':
1149 print_version_id ();
1150 break;
1151
1152 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1153 should be emitted or not. FIXME: Not implemented. */
1154 case 'Q':
1155 break;
1156
1157 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1158 rather than .stabs.excl, which is ignored by the linker.
1159 FIXME: Not implemented. */
1160 case 's':
1161 if (arg)
1162 return 0;
1163
1164 break;
1165#endif
1166
1167 default:
1168 return 0;
1169 }
1170
1171 return 1;
1172}
1173
1174void
98027b10 1175md_show_usage (FILE *stream)
252b5132 1176{
bc805888 1177 fprintf (stream, _("\
252b5132 1178PowerPC options:\n\
df12615d
AM		 1179-a32 generate ELF32/XCOFF32\n\
1180-a64 generate ELF64/XCOFF64\n\
252b5132 1181-u ignored\n\
23e1d84c
AM		 1182-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1183-mpwr generate code for POWER (RIOS1)\n\
1184-m601 generate code for PowerPC 601\n\
418c1742 1185-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1186 generate code for PowerPC 603/604\n\
081ba1b3
AM		 1187-m403 generate code for PowerPC 403\n\
1188-m405 generate code for PowerPC 405\n\
3d8aea2f 1189-m440 generate code for PowerPC 440\n\
c8187e15 1190-m464 generate code for PowerPC 464\n\
f5c120c5 1191-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1192 generate code for PowerPC 7400/7410/7450/7455\n\
1193-m750cl generate code for PowerPC 750cl\n"));
df12615d 1194 fprintf (stream, _("\
23e1d84c 1195-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1196-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
2f3bb96a 1197-mbooke generate code for 32-bit PowerPC BookE\n\
23e1d84c 1198-mpower4 generate code for Power4 architecture\n\
b0648eec 1199-mpower5 generate code for Power5 architecture\n\
9622b051 1200-mpower6 generate code for Power6 architecture\n\
9b4e5766 1201-mpower7 generate code for Power7 architecture\n\
ede602d7 1202-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1203-mcom generate code Power/PowerPC common instructions\n\
df12615d 1204-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1205 fprintf (stream, _("\
df12615d 1206-maltivec generate code for AltiVec\n\
9b4e5766 1207-mvsx generate code for Vector-Scalar (VSX) instructions\n\
36ae0db3 1208-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1209-me500, -me500x2 generate code for Motorola e500 core complex\n\
19a6653c 1210-me500mc, generate code for Freescale e500mc core complex\n\
df12615d
AM		 1211-mspe generate code for Motorola SPE instructions\n\
1212-mregnames Allow symbolic names for registers\n\
1213-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1214#ifdef OBJ_ELF
bc805888 1215 fprintf (stream, _("\
252b5132
RH		 1216-mrelocatable support for GCC's -mrelocatble option\n\
1217-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1218-memb set PPC_EMB bit in ELF flags\n\
df12615d 1219-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1220 generate code for a little endian machine\n\
df12615d
AM		 1221-mbig, -mbig-endian, -b, -be\n\
1222 generate code for a big endian machine\n\
252b5132
RH		 1223-msolaris generate code for Solaris\n\
1224-mno-solaris do not generate code for Solaris\n\
1225-V print assembler version number\n\
1226-Qy, -Qn ignored\n"));
1227#endif
1228}
1229\f
1230/* Set ppc_cpu if it is not already set. */
1231
1232static void
98027b10 1233ppc_set_cpu (void)
252b5132
RH		 1234{
1235 const char *default_os = TARGET_OS;
1236 const char *default_cpu = TARGET_CPU;
1237
3c9030c1 1238 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1239 {
2a98c3a6 1240 if (ppc_obj64)
3c9030c1 1241 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1242 else if (strncmp (default_os, "aix", 3) == 0
1243 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1244 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1245 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1246 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1247 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1248 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1249 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1250 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1251 else
99a814a1
AM		 1252 as_fatal (_("Unknown default cpu = %s, os = %s"),
1253 default_cpu, default_os);
252b5132
RH		 1254 }
1255}
1256
9232bbb0
AM		 1257/* Figure out the BFD architecture to use. This function and ppc_mach
1258 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1259
1260enum bfd_architecture
98027b10 1261ppc_arch (void)
252b5132
RH		 1262{
1263 const char *default_cpu = TARGET_CPU;
1264 ppc_set_cpu ();
1265
1266 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1267 return bfd_arch_powerpc;
1268 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1269 return bfd_arch_rs6000;
1270 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1271 {
1272 if (strcmp (default_cpu, "rs6000") == 0)
1273 return bfd_arch_rs6000;
0baf16f2 1274 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1275 return bfd_arch_powerpc;
1276 }
1277
1278 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1279 return bfd_arch_unknown;
1280}
1281
7f6d05e8 1282unsigned long
98027b10 1283ppc_mach (void)
7f6d05e8 1284{
2a98c3a6
AM		 1285 if (ppc_obj64)
1286 return bfd_mach_ppc64;
1287 else if (ppc_arch () == bfd_arch_rs6000)
1288 return bfd_mach_rs6k;
1289 else
1290 return bfd_mach_ppc;
7f6d05e8
CP		 1291}
1292
81d4177b 1293extern char*
98027b10 1294ppc_target_format (void)
7f6d05e8
CP		 1295{
1296#ifdef OBJ_COFF
1297#ifdef TE_PE
99a814a1 1298 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1299#elif TE_POWERMAC
0baf16f2 1300 return "xcoff-powermac";
7f6d05e8 1301#else
eb1e0e80 1302# ifdef TE_AIX5
2b3c4602 1303 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1304# else
2b3c4602 1305 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1306# endif
7f6d05e8 1307#endif
7f6d05e8
CP		 1308#endif
1309#ifdef OBJ_ELF
9d8504b1
PB		 1310# ifdef TE_VXWORKS
1311 return "elf32-powerpc-vxworks";
1312# else
0baf16f2 1313 return (target_big_endian
2b3c4602
AM		 1314 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1315 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1316# endif
7f6d05e8
CP		 1317#endif
1318}
1319
69c040df
AM		 1320/* Insert opcodes and macros into hash tables. Called at startup and
1321 for .cpu pseudo. */
252b5132 1322
69c040df
AM		 1323static void
1324ppc_setup_opcodes (void)
252b5132 1325{
98027b10 1326 const struct powerpc_opcode *op;
252b5132
RH		 1327 const struct powerpc_opcode *op_end;
1328 const struct powerpc_macro *macro;
1329 const struct powerpc_macro *macro_end;
b84bf58a 1330 bfd_boolean bad_insn = FALSE;
252b5132 1331
69c040df
AM		 1332 if (ppc_hash != NULL)
1333 hash_die (ppc_hash);
1334 if (ppc_macro_hash != NULL)
1335 hash_die (ppc_macro_hash);
252b5132
RH		 1336
1337 /* Insert the opcodes into a hash table. */
1338 ppc_hash = hash_new ();
1339
c43a438d 1340 if (ENABLE_CHECKING)
b84bf58a 1341 {
c43a438d 1342 unsigned int i;
b84bf58a 1343
c43a438d
AM		 1344 /* Check operand masks. Code here and in the disassembler assumes
1345 all the 1's in the mask are contiguous. */
1346 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1347 {
c43a438d
AM		 1348 unsigned long mask = powerpc_operands[i].bitm;
1349 unsigned long right_bit;
1350 unsigned int j;
1351
1352 right_bit = mask & -mask;
1353 mask += right_bit;
1354 right_bit = mask & -mask;
1355 if (mask != right_bit)
1356 {
1357 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1358 bad_insn = TRUE;
1359 }
1360 for (j = i + 1; j < num_powerpc_operands; ++j)
1361 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1362 sizeof (powerpc_operands[0])) == 0)
1363 {
1364 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1365 j, i);
1366 bad_insn = TRUE;
1367 }
b84bf58a
AM		 1368 }
1369 }
1370
252b5132
RH		 1371 op_end = powerpc_opcodes + powerpc_num_opcodes;
1372 for (op = powerpc_opcodes; op < op_end; op++)
1373 {
c43a438d 1374 if (ENABLE_CHECKING)
b84bf58a 1375 {
c43a438d
AM		 1376 const unsigned char *o;
1377 unsigned long omask = op->mask;
8dbcd839 1378
d815f1a9 1379 if (op != powerpc_opcodes)
8dbcd839 1380 {
d815f1a9
AM		 1381 /* The major opcodes had better be sorted. Code in the
1382 disassembler assumes the insns are sorted according to
1383 major opcode. */
1384 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1385 {
1386 as_bad (_("major opcode is not sorted for %s"),
1387 op->name);
1388 bad_insn = TRUE;
1389 }
1390
1391 /* Warn if the table isn't more strictly ordered.
1392 Unfortunately it doesn't seem possible to order the
1393 table on much more than the major opcode, which makes
1394 it difficult to implement a binary search in the
1395 disassembler. The problem is that we have multiple
1396 ways to disassemble instructions, and we usually want
1397 to choose a more specific form (with more bits set in
1398 the opcode) than a more general form. eg. all of the
1399 following are equivalent:
1400 bne label # opcode = 0x40820000, mask = 0xff830003
1401 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1402 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1403
1404 There are also cases where the table needs to be out
1405 of order to disassemble the correct instruction for
2f3bb96a 1406 processor variants. */
d815f1a9
AM		 1407 else if (0)
1408 {
1409 unsigned long t1 = op[0].opcode;
1410 unsigned long t2 = op[-1].opcode;
1411
1412 if (((t1 ^ t2) & 0xfc0007ff) == 0
1413 && (t1 & 0xfc0006df) == 0x7c000286)
1414 {
1415 /* spr field is split. */
1416 t1 = ((t1 & ~0x1ff800)
1417 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1418 t2 = ((t2 & ~0x1ff800)
1419 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1420 }
1421 if (t1 < t2)
1422 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1423 op[0].name, op[0].opcode, op[0].mask,
1424 op[-1].name, op[-1].opcode, op[-1].mask);
1425 }
8dbcd839 1426 }
c43a438d
AM		 1427
1428 /* The mask had better not trim off opcode bits. */
1429 if ((op->opcode & omask) != op->opcode)
1430 {
1431 as_bad (_("mask trims opcode bits for %s"),
1432 op->name);
1433 bad_insn = TRUE;
1434 }
1435
1436 /* The operands must not overlap the opcode or each other. */
1437 for (o = op->operands; *o; ++o)
1438 if (*o >= num_powerpc_operands)
1439 {
1440 as_bad (_("operand index error for %s"),
1441 op->name);
1442 bad_insn = TRUE;
1443 }
1444 else
b84bf58a 1445 {
c43a438d
AM		 1446 const struct powerpc_operand *operand = &powerpc_operands[*o];
1447 if (operand->shift >= 0)
b84bf58a 1448 {
c43a438d
AM		 1449 unsigned long mask = operand->bitm << operand->shift;
1450 if (omask & mask)
1451 {
1452 as_bad (_("operand %d overlap in %s"),
1453 (int) (o - op->operands), op->name);
1454 bad_insn = TRUE;
1455 }
1456 omask |= mask;
b84bf58a 1457 }
b84bf58a 1458 }
c43a438d 1459 }
252b5132 1460
2b3c4602 1461 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1462 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1463 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1464 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1465 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
1cb0a767 1466 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1467 {
1468 const char *retval;
1469
98027b10 1470 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1471 if (retval != NULL)
252b5132 1472 {
99a814a1 1473 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1474 if ((ppc_cpu & PPC_OPCODE_601) != 0
1475 && (op->flags & PPC_OPCODE_POWER) != 0)
1476 continue;
1477
b84bf58a 1478 as_bad (_("duplicate instruction %s"),
99a814a1 1479 op->name);
b84bf58a 1480 bad_insn = TRUE;
252b5132
RH		 1481 }
1482 }
1483 }
1484
3c9030c1
AM		 1485 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1486 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1487 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1488
252b5132
RH		 1489 /* Insert the macros into a hash table. */
1490 ppc_macro_hash = hash_new ();
1491
1492 macro_end = powerpc_macros + powerpc_num_macros;
1493 for (macro = powerpc_macros; macro < macro_end; macro++)
1494 {
1495 if ((macro->flags & ppc_cpu) != 0)
1496 {
1497 const char *retval;
1498
98027b10 1499 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1500 if (retval != (const char *) NULL)
1501 {
b84bf58a
AM		 1502 as_bad (_("duplicate macro %s"), macro->name);
1503 bad_insn = TRUE;
252b5132
RH		 1504 }
1505 }
1506 }
1507
b84bf58a 1508 if (bad_insn)
252b5132 1509 abort ();
69c040df
AM		 1510}
1511
1512/* This function is called when the assembler starts up. It is called
1513 after the options have been parsed and the output file has been
1514 opened. */
1515
1516void
98027b10 1517md_begin (void)
69c040df
AM		 1518{
1519 ppc_set_cpu ();
1520
1521 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1522
1523#ifdef OBJ_ELF
1524 /* Set the ELF flags if desired. */
1525 if (ppc_flags && !msolaris)
1526 bfd_set_private_flags (stdoutput, ppc_flags);
1527#endif
1528
1529 ppc_setup_opcodes ();
252b5132 1530
67c1ffbe 1531 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1532 by the user. */
252b5132
RH		 1533 if (!set_target_endian)
1534 {
1535 set_target_endian = 1;
1536 target_big_endian = PPC_BIG_ENDIAN;
1537 }
1538
1539#ifdef OBJ_XCOFF
1540 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1541
1542 /* Create dummy symbols to serve as initial csects. This forces the
1543 text csects to precede the data csects. These symbols will not
1544 be output. */
1545 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1546 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1547 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1548 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1549#endif
1550
1551#ifdef TE_PE
1552
1553 ppc_current_section = text_section;
81d4177b 1554 ppc_previous_section = 0;
252b5132
RH		 1555
1556#endif
1557}
1558
6a0c61b7 1559void
98027b10 1560ppc_cleanup (void)
6a0c61b7 1561{
dc1d03fc 1562#ifdef OBJ_ELF
6a0c61b7
EZ		 1563 if (ppc_apuinfo_list == NULL)
1564 return;
1565
1566 /* Ok, so write the section info out. We have this layout:
1567
1568 byte data what
1569 ---- ---- ----
1570 0 8 length of "APUinfo\0"
1571 4 (n*4) number of APU's (4 bytes each)
1572 8 2 note type 2
1573 12 "APUinfo\0" name
1574 20 APU#1 first APU's info
1575 24 APU#2 second APU's info
1576 ... ...
1577 */
1578 {
1579 char *p;
1580 asection *seg = now_seg;
1581 subsegT subseg = now_subseg;
1582 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1583 unsigned int i;
6a0c61b7
EZ		 1584
1585 /* Create the .PPC.EMB.apuinfo section. */
1586 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1587 bfd_set_section_flags (stdoutput,
1588 apuinfo_secp,
e1a9cb8e 1589 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1590
1591 p = frag_more (4);
1592 md_number_to_chars (p, (valueT) 8, 4);
1593
1594 p = frag_more (4);
e98d298c 1595 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1596
1597 p = frag_more (4);
1598 md_number_to_chars (p, (valueT) 2, 4);
1599
1600 p = frag_more (8);
1601 strcpy (p, "APUinfo");
1602
1603 for (i = 0; i < ppc_apuinfo_num; i++)
1604 {
b34976b6
AM		 1605 p = frag_more (4);
1606 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1607 }
1608
1609 frag_align (2, 0, 0);
1610
1611 /* We probably can't restore the current segment, for there likely
1612 isn't one yet... */
1613 if (seg && subseg)
1614 subseg_set (seg, subseg);
1615 }
dc1d03fc 1616#endif
6a0c61b7
EZ		 1617}
1618
252b5132
RH		 1619/* Insert an operand value into an instruction. */
1620
1621static unsigned long
a1867a27
AM		 1622ppc_insert_operand (unsigned long insn,
1623 const struct powerpc_operand *operand,
1624 offsetT val,
fa452fa6 1625 ppc_cpu_t ppc_cpu,
a1867a27
AM		 1626 char *file,
1627 unsigned int line)
252b5132 1628{
b84bf58a 1629 long min, max, right;
eb42fac1 1630
b84bf58a
AM		 1631 max = operand->bitm;
1632 right = max & -max;
1633 min = 0;
1634
1635 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1636 {
b84bf58a 1637 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1638 max = (max >> 1) & -right;
1639 min = ~max & -right;
b84bf58a 1640 }
252b5132 1641
b84bf58a 1642 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1643 max++;
252b5132 1644
b84bf58a 1645 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1646 {
1647 long tmp = min;
1648 min = -max;
1649 max = -tmp;
1650 }
b84bf58a 1651
a1867a27
AM		 1652 if (min <= max)
1653 {
1654 /* Some people write constants with the sign extension done by
1655 hand but only up to 32 bits. This shouldn't really be valid,
1656 but, to permit this code to assemble on a 64-bit host, we
1657 sign extend the 32-bit value to 64 bits if so doing makes the
1658 value valid. */
1659 if (val > max
1660 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1661 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1662 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1663 val = val - 0x80000000 - 0x80000000;
1664
1665 /* Similarly, people write expressions like ~(1<<15), and expect
1666 this to be OK for a 32-bit unsigned value. */
1667 else if (val < min
1668 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1669 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1670 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1671 val = val + 0x80000000 + 0x80000000;
1672
1673 else if (val < min
1674 || val > max
1675 || (val & (right - 1)) != 0)
1676 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1677 }
b84bf58a 1678
252b5132
RH		 1679 if (operand->insert)
1680 {
1681 const char *errmsg;
1682
1683 errmsg = NULL;
2b3c4602 1684 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1685 if (errmsg != (const char *) NULL)
ee2c9aa9 1686 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1687 }
1688 else
b84bf58a 1689 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1690
1691 return insn;
1692}
1693
1694\f
1695#ifdef OBJ_ELF
1696/* Parse @got, etc. and return the desired relocation. */
1697static bfd_reloc_code_real_type
98027b10 1698ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1699{
1700 struct map_bfd {
1701 char *string;
b7d7dc63
AM		 1702 unsigned int length : 8;
1703 unsigned int valid32 : 1;
1704 unsigned int valid64 : 1;
1705 unsigned int reloc;
252b5132
RH		 1706 };
1707
1708 char ident[20];
1709 char *str = *str_p;
1710 char *str2;
1711 int ch;
1712 int len;
15c1449b 1713 const struct map_bfd *ptr;
252b5132 1714
b7d7dc63
AM		 1715#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1716#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1717#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1718
15c1449b 1719 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1720 MAP ("l", BFD_RELOC_LO16),
1721 MAP ("h", BFD_RELOC_HI16),
1722 MAP ("ha", BFD_RELOC_HI16_S),
1723 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1724 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1725 MAP ("got", BFD_RELOC_16_GOTOFF),
1726 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1727 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1728 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1729 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1730 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1731 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1732 MAP ("copy", BFD_RELOC_PPC_COPY),
1733 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1734 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1735 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1736 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1737 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1738 MAP ("tls", BFD_RELOC_PPC_TLS),
1739 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1740 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1741 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1742 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1743 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1744 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1745 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1746 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1747 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1748 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1749 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1750 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1751 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1752 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1753 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1754 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1755 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1756 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1757 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1758 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1759 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1760 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1761 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1762 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1763 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1764 MAP32 ("fixup", BFD_RELOC_CTOR),
1765 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1766 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1767 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1768 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1769 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1770 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1771 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1772 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1773 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1774 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1775 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1776 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1777 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1778 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1779 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1780 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1781 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1782 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1783 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1784 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1785 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1786 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1787 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1788 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1789 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1790 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1791 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1792 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1793 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1794 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1795 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1796 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1797 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1798 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1799 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1800 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1801 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1802 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1803 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1804 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1805 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1806 };
1807
1808 if (*str++ != '@')
1809 return BFD_RELOC_UNUSED;
1810
1811 for (ch = *str, str2 = ident;
1812 (str2 < ident + sizeof (ident) - 1
3882b010 1813 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1814 ch = *++str)
1815 {
3882b010 1816 *str2++ = TOLOWER (ch);
252b5132
RH		 1817 }
1818
1819 *str2 = '\0';
1820 len = str2 - ident;
1821
1822 ch = ident[0];
1823 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1824 if (ch == ptr->string[0]
1825 && len == ptr->length
b7d7dc63
AM		 1826 && memcmp (ident, ptr->string, ptr->length) == 0
1827 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1828 {
15c1449b
AM		 1829 int reloc = ptr->reloc;
1830
727fc41e
AM		 1831 if (!ppc_obj64 && exp_p->X_add_number != 0)
1832 {
1833 switch (reloc)
1834 {
1835 case BFD_RELOC_16_GOTOFF:
1836 case BFD_RELOC_LO16_GOTOFF:
1837 case BFD_RELOC_HI16_GOTOFF:
1838 case BFD_RELOC_HI16_S_GOTOFF:
1839 as_warn (_("identifier+constant@got means "
1840 "identifier@got+constant"));
1841 break;
1842
1843 case BFD_RELOC_PPC_GOT_TLSGD16:
1844 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1845 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1846 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1847 case BFD_RELOC_PPC_GOT_TLSLD16:
1848 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1849 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1850 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1851 case BFD_RELOC_PPC_GOT_DTPREL16:
1852 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1853 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1854 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1855 case BFD_RELOC_PPC_GOT_TPREL16:
1856 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1857 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1858 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1859 as_bad (_("symbol+offset not supported for got tls"));
1860 break;
1861 }
1862 }
5f6db75a
AM		 1863
1864 /* Now check for identifier@suffix+constant. */
1865 if (*str == '-' || *str == '+')
252b5132 1866 {
5f6db75a
AM		 1867 char *orig_line = input_line_pointer;
1868 expressionS new_exp;
1869
1870 input_line_pointer = str;
1871 expression (&new_exp);
1872 if (new_exp.X_op == O_constant)
252b5132 1873 {
5f6db75a
AM		 1874 exp_p->X_add_number += new_exp.X_add_number;
1875 str = input_line_pointer;
252b5132 1876 }
5f6db75a
AM		 1877
1878 if (&input_line_pointer != str_p)
1879 input_line_pointer = orig_line;
252b5132 1880 }
252b5132 1881 *str_p = str;
0baf16f2 1882
2b3c4602 1883 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1884 && exp_p->X_op == O_symbol
1885 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1886 {
9f2b53d7
AM		 1887 /* Change the symbol so that the dummy .TOC. symbol can be
1888 omitted from the object file. */
0baf16f2
AM		 1889 exp_p->X_add_symbol = &abs_symbol;
1890 }
1891
15c1449b 1892 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1893 }
1894
1895 return BFD_RELOC_UNUSED;
1896}
1897
99a814a1
AM		 1898/* Like normal .long/.short/.word, except support @got, etc.
1899 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1900static void
98027b10 1901ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1902{
1903 expressionS exp;
1904 bfd_reloc_code_real_type reloc;
1905
1906 if (is_it_end_of_statement ())
1907 {
1908 demand_empty_rest_of_line ();
1909 return;
1910 }
1911
1912 do
1913 {
1914 expression (&exp);
1915 if (exp.X_op == O_symbol
1916 && *input_line_pointer == '@'
99a814a1
AM		 1917 && (reloc = ppc_elf_suffix (&input_line_pointer,
1918 &exp)) != BFD_RELOC_UNUSED)
252b5132 1919 {
99a814a1
AM		 1920 reloc_howto_type *reloc_howto;
1921 int size;
1922
1923 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1924 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1925
1926 if (size > nbytes)
0baf16f2
AM		 1927 {
1928 as_bad (_("%s relocations do not fit in %d bytes\n"),
1929 reloc_howto->name, nbytes);
1930 }
252b5132
RH		 1931 else
1932 {
0baf16f2
AM		 1933 char *p;
1934 int offset;
252b5132 1935
0baf16f2
AM		 1936 p = frag_more (nbytes);
1937 offset = 0;
1938 if (target_big_endian)
1939 offset = nbytes - size;
99a814a1
AM		 1940 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1941 &exp, 0, reloc);
252b5132
RH		 1942 }
1943 }
1944 else
1945 emit_expr (&exp, (unsigned int) nbytes);
1946 }
1947 while (*input_line_pointer++ == ',');
1948
99a814a1
AM		 1949 /* Put terminator back into stream. */
1950 input_line_pointer--;
252b5132
RH		 1951 demand_empty_rest_of_line ();
1952}
1953
1954/* Solaris pseduo op to change to the .rodata section. */
1955static void
98027b10 1956ppc_elf_rdata (int xxx)
252b5132
RH		 1957{
1958 char *save_line = input_line_pointer;
1959 static char section[] = ".rodata\n";
1960
99a814a1 1961 /* Just pretend this is .section .rodata */
252b5132
RH		 1962 input_line_pointer = section;
1963 obj_elf_section (xxx);
1964
1965 input_line_pointer = save_line;
1966}
1967
99a814a1 1968/* Pseudo op to make file scope bss items. */
252b5132 1969static void
98027b10 1970ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1971{
98027b10
AM		 1972 char *name;
1973 char c;
1974 char *p;
252b5132 1975 offsetT size;
98027b10 1976 symbolS *symbolP;
252b5132
RH		 1977 offsetT align;
1978 segT old_sec;
1979 int old_subsec;
1980 char *pfrag;
1981 int align2;
1982
1983 name = input_line_pointer;
1984 c = get_symbol_end ();
1985
99a814a1 1986 /* just after name is now '\0'. */
252b5132
RH		 1987 p = input_line_pointer;
1988 *p = c;
1989 SKIP_WHITESPACE ();
1990 if (*input_line_pointer != ',')
1991 {
1992 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1993 ignore_rest_of_line ();
1994 return;
1995 }
1996
1997 input_line_pointer++; /* skip ',' */
1998 if ((size = get_absolute_expression ()) < 0)
1999 {
2000 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2001 ignore_rest_of_line ();
2002 return;
2003 }
2004
2005 /* The third argument to .lcomm is the alignment. */
2006 if (*input_line_pointer != ',')
2007 align = 8;
2008 else
2009 {
2010 ++input_line_pointer;
2011 align = get_absolute_expression ();
2012 if (align <= 0)
2013 {
2014 as_warn (_("ignoring bad alignment"));
2015 align = 8;
2016 }
2017 }
2018
2019 *p = 0;
2020 symbolP = symbol_find_or_make (name);
2021 *p = c;
2022
2023 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2024 {
2025 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2026 S_GET_NAME (symbolP));
2027 ignore_rest_of_line ();
2028 return;
2029 }
2030
2031 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2032 {
2033 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2034 S_GET_NAME (symbolP),
2035 (long) S_GET_VALUE (symbolP),
2036 (long) size);
2037
2038 ignore_rest_of_line ();
2039 return;
2040 }
2041
99a814a1 2042 /* Allocate_bss. */
252b5132
RH		 2043 old_sec = now_seg;
2044 old_subsec = now_subseg;
2045 if (align)
2046 {
99a814a1 2047 /* Convert to a power of 2 alignment. */
252b5132
RH		 2048 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2049 if (align != 1)
2050 {
2051 as_bad (_("Common alignment not a power of 2"));
2052 ignore_rest_of_line ();
2053 return;
2054 }
2055 }
2056 else
2057 align2 = 0;
2058
2059 record_alignment (bss_section, align2);
2060 subseg_set (bss_section, 0);
2061 if (align2)
2062 frag_align (align2, 0, 0);
2063 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2064 symbol_get_frag (symbolP)->fr_symbol = 0;
2065 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2066 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2067 (char *) 0);
2068 *pfrag = 0;
2069 S_SET_SIZE (symbolP, size);
2070 S_SET_SEGMENT (symbolP, bss_section);
2071 subseg_set (old_sec, old_subsec);
2072 demand_empty_rest_of_line ();
2073}
2074
2075/* Validate any relocations emitted for -mrelocatable, possibly adding
2076 fixups for word relocations in writable segments, so we can adjust
2077 them at runtime. */
2078static void
98027b10 2079ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2080{
2081 if (fixp->fx_done || fixp->fx_pcrel)
2082 return;
2083
2084 switch (shlib)
2085 {
2086 case SHLIB_NONE:
2087 case SHLIB_PIC:
2088 return;
2089
5d6f4f16 2090 case SHLIB_MRELOCATABLE:
252b5132
RH		 2091 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2092 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2093 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2094 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2095 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2096 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2097 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2098 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2099 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2100 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2101 && strcmp (segment_name (seg), ".got2") != 0
2102 && strcmp (segment_name (seg), ".dtors") != 0
2103 && strcmp (segment_name (seg), ".ctors") != 0
2104 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2105 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2106 && strcmp (segment_name (seg), ".eh_frame") != 0
2107 && strcmp (segment_name (seg), ".ex_shared") != 0)
2108 {
2109 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2110 || fixp->fx_r_type != BFD_RELOC_CTOR)
2111 {
2112 as_bad_where (fixp->fx_file, fixp->fx_line,
2113 _("Relocation cannot be done when using -mrelocatable"));
2114 }
2115 }
2116 return;
2117 }
2118}
0baf16f2 2119
7e8d4ab4
AM		 2120/* Prevent elf_frob_file_before_adjust removing a weak undefined
2121 function descriptor sym if the corresponding code sym is used. */
2122
2123void
98027b10 2124ppc_frob_file_before_adjust (void)
0baf16f2 2125{
7e8d4ab4 2126 symbolS *symp;
9232bbb0 2127 asection *toc;
0baf16f2 2128
7e8d4ab4
AM		 2129 if (!ppc_obj64)
2130 return;
2131
2132 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2133 {
7e8d4ab4
AM		 2134 const char *name;
2135 char *dotname;
2136 symbolS *dotsym;
2137 size_t len;
2138
2139 name = S_GET_NAME (symp);
2140 if (name[0] == '.')
2141 continue;
2142
2143 if (! S_IS_WEAK (symp)
2144 || S_IS_DEFINED (symp))
2145 continue;
2146
2147 len = strlen (name) + 1;
2148 dotname = xmalloc (len + 1);
2149 dotname[0] = '.';
2150 memcpy (dotname + 1, name, len);
461b725f 2151 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2152 free (dotname);
2153 if (dotsym != NULL && (symbol_used_p (dotsym)
2154 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2155 symbol_mark_used (symp);
2156
0baf16f2
AM		 2157 }
2158
9232bbb0
AM		 2159 toc = bfd_get_section_by_name (stdoutput, ".toc");
2160 if (toc != NULL
2161 && bfd_section_size (stdoutput, toc) > 0x10000)
2162 as_warn (_("TOC section size exceeds 64k"));
2163
7e8d4ab4
AM		 2164 /* Don't emit .TOC. symbol. */
2165 symp = symbol_find (".TOC.");
2166 if (symp != NULL)
2167 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2168}
252b5132
RH		 2169#endif /* OBJ_ELF */
2170\f
2171#ifdef TE_PE
2172
2173/*
99a814a1 2174 * Summary of parse_toc_entry.
252b5132
RH		 2175 *
2176 * in: Input_line_pointer points to the '[' in one of:
2177 *
2178 * [toc] [tocv] [toc32] [toc64]
2179 *
2180 * Anything else is an error of one kind or another.
2181 *
81d4177b 2182 * out:
252b5132
RH		 2183 * return value: success or failure
2184 * toc_kind: kind of toc reference
2185 * input_line_pointer:
2186 * success: first char after the ']'
2187 * failure: unchanged
2188 *
2189 * settings:
2190 *
2191 * [toc] - rv == success, toc_kind = default_toc
2192 * [tocv] - rv == success, toc_kind = data_in_toc
2193 * [toc32] - rv == success, toc_kind = must_be_32
2194 * [toc64] - rv == success, toc_kind = must_be_64
2195 *
2196 */
2197
81d4177b
KH		 2198enum toc_size_qualifier
2199{
252b5132
RH		 2200 default_toc, /* The toc cell constructed should be the system default size */
2201 data_in_toc, /* This is a direct reference to a toc cell */
2202 must_be_32, /* The toc cell constructed must be 32 bits wide */
2203 must_be_64 /* The toc cell constructed must be 64 bits wide */
2204};
2205
2206static int
98027b10 2207parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2208{
2209 char *start;
2210 char *toc_spec;
2211 char c;
2212 enum toc_size_qualifier t;
2213
99a814a1 2214 /* Save the input_line_pointer. */
252b5132
RH		 2215 start = input_line_pointer;
2216
99a814a1 2217 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2218 ++input_line_pointer;
2219 SKIP_WHITESPACE ();
81d4177b 2220
99a814a1 2221 /* Find the spelling of the operand. */
252b5132
RH		 2222 toc_spec = input_line_pointer;
2223 c = get_symbol_end ();
2224
99a814a1 2225 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2226 {
2227 t = default_toc;
2228 }
99a814a1 2229 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2230 {
2231 t = data_in_toc;
2232 }
99a814a1 2233 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2234 {
2235 t = must_be_32;
2236 }
99a814a1 2237 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2238 {
2239 t = must_be_64;
2240 }
2241 else
2242 {
2243 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2244 *input_line_pointer = c;
2245 input_line_pointer = start;
252b5132
RH		 2246 return 0;
2247 }
2248
99a814a1
AM		 2249 /* Now find the ']'. */
2250 *input_line_pointer = c;
252b5132 2251
81d4177b
KH		 2252 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2253 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2254
2255 if (c != ']')
2256 {
2257 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2258 input_line_pointer = start;
252b5132
RH		 2259 return 0;
2260 }
2261
99a814a1 2262 *toc_kind = t;
252b5132
RH		 2263 return 1;
2264}
2265#endif
2266\f
2267
dc1d03fc 2268#ifdef OBJ_ELF
6a0c61b7
EZ		 2269#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2270static void
98027b10 2271ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2272{
2273 unsigned int i;
2274
2275 /* Check we don't already exist. */
2276 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2277 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2278 return;
b34976b6 2279
6a0c61b7
EZ		 2280 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2281 {
2282 if (ppc_apuinfo_num_alloc == 0)
2283 {
2284 ppc_apuinfo_num_alloc = 4;
2285 ppc_apuinfo_list = (unsigned long *)
2286 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2287 }
2288 else
2289 {
2290 ppc_apuinfo_num_alloc += 4;
2291 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2292 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2293 }
2294 }
dc1d03fc 2295 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2296}
2297#undef APUID
dc1d03fc 2298#endif
6a0c61b7
EZ		 2299\f
2300
252b5132
RH		 2301/* We need to keep a list of fixups. We can't simply generate them as
2302 we go, because that would require us to first create the frag, and
2303 that would screw up references to ``.''. */
2304
2305struct ppc_fixup
2306{
2307 expressionS exp;
2308 int opindex;
2309 bfd_reloc_code_real_type reloc;
2310};
2311
2312#define MAX_INSN_FIXUPS (5)
2313
2314/* This routine is called for each instruction to be assembled. */
2315
2316void
98027b10 2317md_assemble (char *str)
252b5132
RH		 2318{
2319 char *s;
2320 const struct powerpc_opcode *opcode;
2321 unsigned long insn;
2322 const unsigned char *opindex_ptr;
2323 int skip_optional;
2324 int need_paren;
2325 int next_opindex;
2326 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2327 int fc;
2328 char *f;
09b935ac 2329 int addr_mod;
252b5132
RH		 2330 int i;
2331#ifdef OBJ_ELF
2332 bfd_reloc_code_real_type reloc;
2333#endif
2334
2335 /* Get the opcode. */
3882b010 2336 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2337 ;
2338 if (*s != '\0')
2339 *s++ = '\0';
2340
2341 /* Look up the opcode in the hash table. */
2342 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2343 if (opcode == (const struct powerpc_opcode *) NULL)
2344 {
2345 const struct powerpc_macro *macro;
2346
2347 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2348 if (macro == (const struct powerpc_macro *) NULL)
2349 as_bad (_("Unrecognized opcode: `%s'"), str);
2350 else
2351 ppc_macro (s, macro);
2352
2353 return;
2354 }
2355
2356 insn = opcode->opcode;
2357
2358 str = s;
3882b010 2359 while (ISSPACE (*str))
252b5132
RH		 2360 ++str;
2361
2362 /* PowerPC operands are just expressions. The only real issue is
2363 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2364 an optional operand separate the operands only with commas (in some
2365 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2366 have optional operands). Most instructions with optional operands
2367 have only one. Those that have more than one optional operand can
2368 take either all their operands or none. So, before we start seriously
2369 parsing the operands, we check to see if we have optional operands,
2370 and if we do, we count the number of commas to see which operands
2371 have been omitted. */
252b5132
RH		 2372 skip_optional = 0;
2373 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2374 {
2375 const struct powerpc_operand *operand;
2376
2377 operand = &powerpc_operands[*opindex_ptr];
2378 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2379 {
2380 unsigned int opcount;
7fe9cf6b
NC		 2381 unsigned int num_operands_expected;
2382 unsigned int i;
252b5132
RH		 2383
2384 /* There is an optional operand. Count the number of
2385 commas in the input line. */
2386 if (*str == '\0')
2387 opcount = 0;
2388 else
2389 {
2390 opcount = 1;
2391 s = str;
2392 while ((s = strchr (s, ',')) != (char *) NULL)
2393 {
2394 ++opcount;
2395 ++s;
2396 }
2397 }
2398
7fe9cf6b
NC		 2399 /* Compute the number of expected operands.
2400 Do not count fake operands. */
2401 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2402 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2403 ++ num_operands_expected;
2404
252b5132
RH		 2405 /* If there are fewer operands in the line then are called
2406 for by the instruction, we want to skip the optional
1f6c9eb0 2407 operands. */
7fe9cf6b 2408 if (opcount < num_operands_expected)
252b5132
RH		 2409 skip_optional = 1;
2410
2411 break;
2412 }
2413 }
2414
2415 /* Gather the operands. */
2416 need_paren = 0;
2417 next_opindex = 0;
2418 fc = 0;
2419 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2420 {
2421 const struct powerpc_operand *operand;
2422 const char *errmsg;
2423 char *hold;
2424 expressionS ex;
2425 char endc;
2426
2427 if (next_opindex == 0)
2428 operand = &powerpc_operands[*opindex_ptr];
2429 else
2430 {
2431 operand = &powerpc_operands[next_opindex];
2432 next_opindex = 0;
2433 }
252b5132
RH		 2434 errmsg = NULL;
2435
2436 /* If this is a fake operand, then we do not expect anything
2437 from the input. */
2438 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2439 {
2b3c4602 2440 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2441 if (errmsg != (const char *) NULL)
ee2c9aa9 2442 as_bad ("%s", errmsg);
252b5132
RH		 2443 continue;
2444 }
2445
2446 /* If this is an optional operand, and we are skipping it, just
2447 insert a zero. */
2448 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2449 && skip_optional)
2450 {
2451 if (operand->insert)
2452 {
2b3c4602 2453 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2454 if (errmsg != (const char *) NULL)
ee2c9aa9 2455 as_bad ("%s", errmsg);
252b5132
RH		 2456 }
2457 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2458 next_opindex = *opindex_ptr + 1;
2459 continue;
2460 }
2461
2462 /* Gather the operand. */
2463 hold = input_line_pointer;
2464 input_line_pointer = str;
2465
2466#ifdef TE_PE
81d4177b 2467 if (*input_line_pointer == '[')
252b5132
RH		 2468 {
2469 /* We are expecting something like the second argument here:
99a814a1
AM		 2470 *
2471 * lwz r4,[toc].GS.0.static_int(rtoc)
2472 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2473 * The argument following the `]' must be a symbol name, and the
2474 * register must be the toc register: 'rtoc' or '2'
2475 *
2476 * The effect is to 0 as the displacement field
2477 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2478 * the appropriate variation) reloc against it based on the symbol.
2479 * The linker will build the toc, and insert the resolved toc offset.
2480 *
2481 * Note:
2482 * o The size of the toc entry is currently assumed to be
2483 * 32 bits. This should not be assumed to be a hard coded
2484 * number.
2485 * o In an effort to cope with a change from 32 to 64 bits,
2486 * there are also toc entries that are specified to be
2487 * either 32 or 64 bits:
2488 * lwz r4,[toc32].GS.0.static_int(rtoc)
2489 * lwz r4,[toc64].GS.0.static_int(rtoc)
2490 * These demand toc entries of the specified size, and the
2491 * instruction probably requires it.
2492 */
252b5132
RH		 2493
2494 int valid_toc;
2495 enum toc_size_qualifier toc_kind;
2496 bfd_reloc_code_real_type toc_reloc;
2497
99a814a1
AM		 2498 /* Go parse off the [tocXX] part. */
2499 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2500
81d4177b 2501 if (!valid_toc)
252b5132 2502 {
99a814a1
AM		 2503 /* Note: message has already been issued.
2504 FIXME: what sort of recovery should we do?
2505 demand_rest_of_line (); return; ? */
252b5132
RH		 2506 }
2507
99a814a1
AM		 2508 /* Now get the symbol following the ']'. */
2509 expression (&ex);
252b5132
RH		 2510
2511 switch (toc_kind)
2512 {
2513 case default_toc:
99a814a1
AM		 2514 /* In this case, we may not have seen the symbol yet,
2515 since it is allowed to appear on a .extern or .globl
2516 or just be a label in the .data section. */
252b5132
RH		 2517 toc_reloc = BFD_RELOC_PPC_TOC16;
2518 break;
2519 case data_in_toc:
99a814a1
AM		 2520 /* 1. The symbol must be defined and either in the toc
2521 section, or a global.
2522 2. The reloc generated must have the TOCDEFN flag set
2523 in upper bit mess of the reloc type.
2524 FIXME: It's a little confusing what the tocv
2525 qualifier can be used for. At the very least, I've
2526 seen three uses, only one of which I'm sure I can
2527 explain. */
81d4177b
KH		 2528 if (ex.X_op == O_symbol)
2529 {
252b5132 2530 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2531 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2532 != tocdata_section)
252b5132 2533 {
99a814a1 2534 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2535 }
2536 }
2537
2538 toc_reloc = BFD_RELOC_PPC_TOC16;
2539 break;
2540 case must_be_32:
99a814a1
AM		 2541 /* FIXME: these next two specifically specify 32/64 bit
2542 toc entries. We don't support them today. Is this
2543 the right way to say that? */
252b5132
RH		 2544 toc_reloc = BFD_RELOC_UNUSED;
2545 as_bad (_("Unimplemented toc32 expression modifier"));
2546 break;
2547 case must_be_64:
99a814a1 2548 /* FIXME: see above. */
252b5132
RH		 2549 toc_reloc = BFD_RELOC_UNUSED;
2550 as_bad (_("Unimplemented toc64 expression modifier"));
2551 break;
2552 default:
bc805888 2553 fprintf (stderr,
99a814a1
AM		 2554 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2555 toc_kind);
bc805888 2556 abort ();
252b5132
RH		 2557 break;
2558 }
2559
2560 /* We need to generate a fixup for this expression. */
2561 if (fc >= MAX_INSN_FIXUPS)
2562 as_fatal (_("too many fixups"));
2563
2564 fixups[fc].reloc = toc_reloc;
2565 fixups[fc].exp = ex;
2566 fixups[fc].opindex = *opindex_ptr;
2567 ++fc;
2568
99a814a1
AM		 2569 /* Ok. We've set up the fixup for the instruction. Now make it
2570 look like the constant 0 was found here. */
252b5132
RH		 2571 ex.X_unsigned = 1;
2572 ex.X_op = O_constant;
2573 ex.X_add_number = 0;
2574 ex.X_add_symbol = NULL;
2575 ex.X_op_symbol = NULL;
2576 }
2577
2578 else
2579#endif /* TE_PE */
2580 {
2ad068be
AM		 2581 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2582 || !register_name (&ex))
252b5132 2583 {
13abbae3
AM		 2584 char save_lex = lex_type['%'];
2585
252b5132 2586 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2587 {
2588 cr_operand = TRUE;
2589 lex_type['%'] |= LEX_BEGIN_NAME;
2590 }
252b5132 2591 expression (&ex);
b34976b6 2592 cr_operand = FALSE;
13abbae3 2593 lex_type['%'] = save_lex;
252b5132
RH		 2594 }
2595 }
2596
2597 str = input_line_pointer;
2598 input_line_pointer = hold;
2599
2600 if (ex.X_op == O_illegal)
2601 as_bad (_("illegal operand"));
2602 else if (ex.X_op == O_absent)
2603 as_bad (_("missing operand"));
2604 else if (ex.X_op == O_register)
2605 {
2606 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2607 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2608 }
2609 else if (ex.X_op == O_constant)
2610 {
2611#ifdef OBJ_ELF
81d4177b 2612 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2613 char *orig_str = str;
2614
2615 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2616 switch (reloc)
2617 {
2618 default:
2619 str = orig_str;
2620 break;
2621
2622 case BFD_RELOC_LO16:
2623 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2624 something which cleared it, we always produce a
2625 signed value. */
2626 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2627 ex.X_add_number &= 0xffff;
2628 else
0baf16f2 2629 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2630 break;
2631
2632 case BFD_RELOC_HI16:
0baf16f2
AM		 2633 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2634 ex.X_add_number = PPC_HI (ex.X_add_number);
2635 else
2636 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2637 break;
2638
2639 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2640 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2641 ex.X_add_number = PPC_HA (ex.X_add_number);
2642 else
2643 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2644 break;
2645
0baf16f2
AM		 2646 case BFD_RELOC_PPC64_HIGHER:
2647 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2648 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2649 else
2650 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2651 break;
2652
2653 case BFD_RELOC_PPC64_HIGHER_S:
2654 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2655 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2656 else
2657 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2658 break;
0baf16f2
AM		 2659
2660 case BFD_RELOC_PPC64_HIGHEST:
2661 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2662 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2663 else
2664 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2665 break;
2666
2667 case BFD_RELOC_PPC64_HIGHEST_S:
2668 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2669 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2670 else
2671 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2672 break;
252b5132 2673 }
0baf16f2 2674#endif /* OBJ_ELF */
252b5132 2675 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2676 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2677 }
2678#ifdef OBJ_ELF
727fc41e 2679 else
252b5132 2680 {
727fc41e 2681 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2682 {
727fc41e
AM		 2683 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2684 if (sym_name[0] == '.')
2685 ++sym_name;
cdba85ec 2686
727fc41e 2687 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2688 {
727fc41e
AM		 2689 expressionS tls_exp;
2690
2691 hold = input_line_pointer;
2692 input_line_pointer = str + 1;
2693 expression (&tls_exp);
2694 if (tls_exp.X_op == O_symbol)
2695 {
2696 reloc = BFD_RELOC_UNUSED;
2697 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2698 {
2699 reloc = BFD_RELOC_PPC_TLSGD;
2700 input_line_pointer += 7;
2701 }
2702 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2703 {
2704 reloc = BFD_RELOC_PPC_TLSLD;
2705 input_line_pointer += 7;
2706 }
2707 if (reloc != BFD_RELOC_UNUSED)
2708 {
2709 SKIP_WHITESPACE ();
2710 str = input_line_pointer;
2711
2712 if (fc >= MAX_INSN_FIXUPS)
2713 as_fatal (_("too many fixups"));
2714 fixups[fc].exp = tls_exp;
2715 fixups[fc].opindex = *opindex_ptr;
2716 fixups[fc].reloc = reloc;
2717 ++fc;
2718 }
2719 }
2720 input_line_pointer = hold;
252b5132
RH		 2721 }
2722 }
2723
727fc41e 2724 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2725 {
727fc41e 2726 /* Some TLS tweaks. */
0baf16f2
AM		 2727 switch (reloc)
2728 {
727fc41e 2729 default:
cdba85ec 2730 break;
727fc41e
AM		 2731
2732 case BFD_RELOC_PPC_TLS:
2733 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2734 ppc_cpu, (char *) NULL, 0);
cdba85ec 2735 break;
727fc41e
AM		 2736
2737 /* We'll only use the 32 (or 64) bit form of these relocations
2738 in constants. Instructions get the 16 bit form. */
2739 case BFD_RELOC_PPC_DTPREL:
2740 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2741 break;
727fc41e
AM		 2742 case BFD_RELOC_PPC_TPREL:
2743 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2744 break;
2745 }
727fc41e
AM		 2746
2747 /* For the absolute forms of branches, convert the PC
2748 relative form back into the absolute. */
2749 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2750 {
2751 switch (reloc)
2752 {
2753 case BFD_RELOC_PPC_B26:
2754 reloc = BFD_RELOC_PPC_BA26;
2755 break;
2756 case BFD_RELOC_PPC_B16:
2757 reloc = BFD_RELOC_PPC_BA16;
2758 break;
2759 case BFD_RELOC_PPC_B16_BRTAKEN:
2760 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2761 break;
2762 case BFD_RELOC_PPC_B16_BRNTAKEN:
2763 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2764 break;
2765 default:
2766 break;
2767 }
2768 }
2769
2770 if (ppc_obj64
2771 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2772 {
2773 switch (reloc)
2774 {
2775 case BFD_RELOC_16:
2776 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2777 break;
2778 case BFD_RELOC_LO16:
2779 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2780 break;
2781 case BFD_RELOC_16_GOTOFF:
2782 reloc = BFD_RELOC_PPC64_GOT16_DS;
2783 break;
2784 case BFD_RELOC_LO16_GOTOFF:
2785 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2786 break;
2787 case BFD_RELOC_LO16_PLTOFF:
2788 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2789 break;
2790 case BFD_RELOC_16_BASEREL:
2791 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2792 break;
2793 case BFD_RELOC_LO16_BASEREL:
2794 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2795 break;
2796 case BFD_RELOC_PPC_TOC16:
2797 reloc = BFD_RELOC_PPC64_TOC16_DS;
2798 break;
2799 case BFD_RELOC_PPC64_TOC16_LO:
2800 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2801 break;
2802 case BFD_RELOC_PPC64_PLTGOT16:
2803 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2804 break;
2805 case BFD_RELOC_PPC64_PLTGOT16_LO:
2806 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2807 break;
2808 case BFD_RELOC_PPC_DTPREL16:
2809 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2810 break;
2811 case BFD_RELOC_PPC_DTPREL16_LO:
2812 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2813 break;
2814 case BFD_RELOC_PPC_TPREL16:
2815 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2816 break;
2817 case BFD_RELOC_PPC_TPREL16_LO:
2818 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2819 break;
2820 case BFD_RELOC_PPC_GOT_DTPREL16:
2821 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2822 case BFD_RELOC_PPC_GOT_TPREL16:
2823 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2824 break;
2825 default:
2826 as_bad (_("unsupported relocation for DS offset field"));
2827 break;
2828 }
2829 }
0baf16f2
AM		 2830 }
2831
252b5132
RH		 2832 /* We need to generate a fixup for this expression. */
2833 if (fc >= MAX_INSN_FIXUPS)
2834 as_fatal (_("too many fixups"));
2835 fixups[fc].exp = ex;
727fc41e 2836 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2837 fixups[fc].reloc = reloc;
2838 ++fc;
2839 }
727fc41e 2840#else /* OBJ_ELF */
252b5132
RH		 2841 else
2842 {
2843 /* We need to generate a fixup for this expression. */
2844 if (fc >= MAX_INSN_FIXUPS)
2845 as_fatal (_("too many fixups"));
2846 fixups[fc].exp = ex;
2847 fixups[fc].opindex = *opindex_ptr;
2848 fixups[fc].reloc = BFD_RELOC_UNUSED;
2849 ++fc;
2850 }
727fc41e 2851#endif /* OBJ_ELF */
252b5132
RH		 2852
2853 if (need_paren)
2854 {
2855 endc = ')';
2856 need_paren = 0;
c3d65c1c
BE		 2857 /* If expecting more operands, then we want to see "),". */
2858 if (*str == endc && opindex_ptr[1] != 0)
2859 {
2860 do
2861 ++str;
2862 while (ISSPACE (*str));
2863 endc = ',';
2864 }
252b5132
RH		 2865 }
2866 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2867 {
2868 endc = '(';
2869 need_paren = 1;
2870 }
2871 else
2872 endc = ',';
2873
2874 /* The call to expression should have advanced str past any
2875 whitespace. */
2876 if (*str != endc
2877 && (endc != ',' || *str != '\0'))
2878 {
2879 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2880 break;
2881 }
2882
2883 if (*str != '\0')
2884 ++str;
2885 }
2886
3882b010 2887 while (ISSPACE (*str))
252b5132
RH		 2888 ++str;
2889
2890 if (*str != '\0')
2891 as_bad (_("junk at end of line: `%s'"), str);
2892
dc1d03fc 2893#ifdef OBJ_ELF
6a0c61b7 2894 /* Do we need/want a APUinfo section? */
ed84b57b 2895 if ((ppc_cpu & PPC_OPCODE_E500MC) != 0)
6a0c61b7
EZ		 2896 {
2897 /* These are all version "1". */
2898 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2899 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2900 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2901 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2902 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2903 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2904 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2905 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2906 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2907 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2908 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2909 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2910 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2911 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2912 }
dc1d03fc 2913#endif
6a0c61b7 2914
252b5132
RH		 2915 /* Write out the instruction. */
2916 f = frag_more (4);
09b935ac
AM		 2917 addr_mod = frag_now_fix () & 3;
2918 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2919 as_bad (_("instruction address is not a multiple of 4"));
2920 frag_now->insn_addr = addr_mod;
2921 frag_now->has_code = 1;
252b5132
RH		 2922 md_number_to_chars (f, insn, 4);
2923
5d6f4f16
GK		 2924#ifdef OBJ_ELF
2925 dwarf2_emit_insn (4);
2926#endif
2927
252b5132
RH		 2928 /* Create any fixups. At this point we do not use a
2929 bfd_reloc_code_real_type, but instead just use the
2930 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2931 handle fixups for any operand type, although that is admittedly
2932 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2933 md_apply_fix. */
252b5132
RH		 2934 for (i = 0; i < fc; i++)
2935 {
252b5132
RH		 2936 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2937 {
99a814a1 2938 reloc_howto_type *reloc_howto;
252b5132
RH		 2939 int size;
2940 int offset;
2941 fixS *fixP;
2942
99a814a1 2943 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2944 if (!reloc_howto)
2945 abort ();
2946
2947 size = bfd_get_reloc_size (reloc_howto);
2948 offset = target_big_endian ? (4 - size) : 0;
2949
2950 if (size < 1 || size > 4)
bc805888 2951 abort ();
252b5132 2952
99a814a1
AM		 2953 fixP = fix_new_exp (frag_now,
2954 f - frag_now->fr_literal + offset,
2955 size,
2956 &fixups[i].exp,
2957 reloc_howto->pc_relative,
252b5132
RH		 2958 fixups[i].reloc);
2959
2960 /* Turn off complaints that the addend is too large for things like
2961 foo+100000@ha. */
2962 switch (fixups[i].reloc)
2963 {
2964 case BFD_RELOC_16_GOTOFF:
2965 case BFD_RELOC_PPC_TOC16:
2966 case BFD_RELOC_LO16:
2967 case BFD_RELOC_HI16:
2968 case BFD_RELOC_HI16_S:
0baf16f2 2969#ifdef OBJ_ELF
0baf16f2
AM		 2970 case BFD_RELOC_PPC64_HIGHER:
2971 case BFD_RELOC_PPC64_HIGHER_S:
2972 case BFD_RELOC_PPC64_HIGHEST:
2973 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2974#endif
252b5132
RH		 2975 fixP->fx_no_overflow = 1;
2976 break;
2977 default:
2978 break;
2979 }
2980 }
2981 else
727fc41e
AM		 2982 {
2983 const struct powerpc_operand *operand;
2984
2985 operand = &powerpc_operands[fixups[i].opindex];
2986 fix_new_exp (frag_now,
2987 f - frag_now->fr_literal,
2988 4,
2989 &fixups[i].exp,
2990 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2991 ((bfd_reloc_code_real_type)
2992 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
2993 }
252b5132
RH		 2994 }
2995}
2996
2997/* Handle a macro. Gather all the operands, transform them as
2998 described by the macro, and call md_assemble recursively. All the
2999 operands are separated by commas; we don't accept parentheses
3000 around operands here. */
3001
3002static void
98027b10 3003ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3004{
3005 char *operands[10];
3006 unsigned int count;
3007 char *s;
3008 unsigned int len;
3009 const char *format;
db557034 3010 unsigned int arg;
252b5132
RH		 3011 char *send;
3012 char *complete;
3013
3014 /* Gather the users operands into the operands array. */
3015 count = 0;
3016 s = str;
3017 while (1)
3018 {
3019 if (count >= sizeof operands / sizeof operands[0])
3020 break;
3021 operands[count++] = s;
3022 s = strchr (s, ',');
3023 if (s == (char *) NULL)
3024 break;
3025 *s++ = '\0';
81d4177b 3026 }
252b5132
RH		 3027
3028 if (count != macro->operands)
3029 {
3030 as_bad (_("wrong number of operands"));
3031 return;
3032 }
3033
3034 /* Work out how large the string must be (the size is unbounded
3035 because it includes user input). */
3036 len = 0;
3037 format = macro->format;
3038 while (*format != '\0')
3039 {
3040 if (*format != '%')
3041 {
3042 ++len;
3043 ++format;
3044 }
3045 else
3046 {
3047 arg = strtol (format + 1, &send, 10);
db557034 3048 know (send != format && arg < count);
252b5132
RH		 3049 len += strlen (operands[arg]);
3050 format = send;
3051 }
3052 }
3053
3054 /* Put the string together. */
3055 complete = s = (char *) alloca (len + 1);
3056 format = macro->format;
3057 while (*format != '\0')
3058 {
3059 if (*format != '%')
3060 *s++ = *format++;
3061 else
3062 {
3063 arg = strtol (format + 1, &send, 10);
3064 strcpy (s, operands[arg]);
3065 s += strlen (s);
3066 format = send;
3067 }
3068 }
3069 *s = '\0';
3070
3071 /* Assemble the constructed instruction. */
3072 md_assemble (complete);
81d4177b 3073}
252b5132
RH		 3074\f
3075#ifdef OBJ_ELF
99a814a1 3076/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132 3077
01e1a5bc 3078bfd_vma
98027b10 3079ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 3080{
3081 if (letter == 'e')
3082 return SHF_EXCLUDE;
3083
13ae64f3 3084 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 3085 return -1;
252b5132
RH		 3086}
3087
01e1a5bc 3088bfd_vma
98027b10 3089ppc_section_word (char *str, size_t len)
252b5132 3090{
9de8d8f1
RH		 3091 if (len == 7 && strncmp (str, "exclude", 7) == 0)
3092 return SHF_EXCLUDE;
252b5132 3093
9de8d8f1 3094 return -1;
252b5132
RH		 3095}
3096
3097int
98027b10 3098ppc_section_type (char *str, size_t len)
252b5132 3099{
9de8d8f1
RH		 3100 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3101 return SHT_ORDERED;
252b5132 3102
9de8d8f1 3103 return -1;
252b5132
RH		 3104}
3105
3106int
01e1a5bc 3107ppc_section_flags (flagword flags, bfd_vma attr, int type)
252b5132
RH		 3108{
3109 if (type == SHT_ORDERED)
3110 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3111
3112 if (attr & SHF_EXCLUDE)
3113 flags |= SEC_EXCLUDE;
3114
3115 return flags;
3116}
3117#endif /* OBJ_ELF */
3118
3119\f
3120/* Pseudo-op handling. */
3121
3122/* The .byte pseudo-op. This is similar to the normal .byte
3123 pseudo-op, but it can also take a single ASCII string. */
3124
3125static void
98027b10 3126ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3127{
3128 if (*input_line_pointer != '\"')
3129 {
3130 cons (1);
3131 return;
3132 }
3133
3134 /* Gather characters. A real double quote is doubled. Unusual
3135 characters are not permitted. */
3136 ++input_line_pointer;
3137 while (1)
3138 {
3139 char c;
3140
3141 c = *input_line_pointer++;
3142
3143 if (c == '\"')
3144 {
3145 if (*input_line_pointer != '\"')
3146 break;
3147 ++input_line_pointer;
3148 }
3149
3150 FRAG_APPEND_1_CHAR (c);
3151 }
3152
3153 demand_empty_rest_of_line ();
3154}
3155\f
3156#ifdef OBJ_XCOFF
3157
3158/* XCOFF specific pseudo-op handling. */
3159
3160/* This is set if we are creating a .stabx symbol, since we don't want
3161 to handle symbol suffixes for such symbols. */
b34976b6 3162static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3163
3164/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3165 symbols in the .bss segment as though they were local common
67c1ffbe 3166 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3167 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3168
3169static void
98027b10 3170ppc_comm (int lcomm)
252b5132
RH		 3171{
3172 asection *current_seg = now_seg;
3173 subsegT current_subseg = now_subseg;
3174 char *name;
3175 char endc;
3176 char *end_name;
3177 offsetT size;
3178 offsetT align;
3179 symbolS *lcomm_sym = NULL;
3180 symbolS *sym;
3181 char *pfrag;
3182
3183 name = input_line_pointer;
3184 endc = get_symbol_end ();
3185 end_name = input_line_pointer;
3186 *end_name = endc;
3187
3188 if (*input_line_pointer != ',')
3189 {
3190 as_bad (_("missing size"));
3191 ignore_rest_of_line ();
3192 return;
3193 }
3194 ++input_line_pointer;
3195
3196 size = get_absolute_expression ();
3197 if (size < 0)
3198 {
3199 as_bad (_("negative size"));
3200 ignore_rest_of_line ();
3201 return;
3202 }
3203
3204 if (! lcomm)
3205 {
3206 /* The third argument to .comm is the alignment. */
3207 if (*input_line_pointer != ',')
1ad63b2f 3208 align = 2;
252b5132
RH		 3209 else
3210 {
3211 ++input_line_pointer;
3212 align = get_absolute_expression ();
3213 if (align <= 0)
3214 {
3215 as_warn (_("ignoring bad alignment"));
1ad63b2f 3216 align = 2;
252b5132
RH		 3217 }
3218 }
3219 }
3220 else
3221 {
3222 char *lcomm_name;
3223 char lcomm_endc;
3224
1ad63b2f 3225 if (size <= 4)
252b5132
RH		 3226 align = 2;
3227 else
3228 align = 3;
3229
3230 /* The third argument to .lcomm appears to be the real local
3231 common symbol to create. References to the symbol named in
3232 the first argument are turned into references to the third
3233 argument. */
3234 if (*input_line_pointer != ',')
3235 {
3236 as_bad (_("missing real symbol name"));
3237 ignore_rest_of_line ();
3238 return;
3239 }
3240 ++input_line_pointer;
3241
3242 lcomm_name = input_line_pointer;
3243 lcomm_endc = get_symbol_end ();
81d4177b 3244
252b5132
RH		 3245 lcomm_sym = symbol_find_or_make (lcomm_name);
3246
3247 *input_line_pointer = lcomm_endc;
3248 }
3249
3250 *end_name = '\0';
3251 sym = symbol_find_or_make (name);
3252 *end_name = endc;
3253
3254 if (S_IS_DEFINED (sym)
3255 || S_GET_VALUE (sym) != 0)
3256 {
3257 as_bad (_("attempt to redefine symbol"));
3258 ignore_rest_of_line ();
3259 return;
3260 }
81d4177b 3261
252b5132 3262 record_alignment (bss_section, align);
81d4177b 3263
252b5132
RH		 3264 if (! lcomm
3265 || ! S_IS_DEFINED (lcomm_sym))
3266 {
3267 symbolS *def_sym;
3268 offsetT def_size;
3269
3270 if (! lcomm)
3271 {
3272 def_sym = sym;
3273 def_size = size;
3274 S_SET_EXTERNAL (sym);
3275 }
3276 else
3277 {
809ffe0d 3278 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3279 def_sym = lcomm_sym;
3280 def_size = 0;
3281 }
3282
3283 subseg_set (bss_section, 1);
3284 frag_align (align, 0, 0);
81d4177b 3285
809ffe0d 3286 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3287 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3288 def_size, (char *) NULL);
3289 *pfrag = 0;
3290 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3291 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3292 }
3293 else if (lcomm)
3294 {
3295 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3296 symbol_get_frag (lcomm_sym)->fr_offset =
3297 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3298 &~ ((1 << align) - 1));
809ffe0d
ILT		 3299 if (align > symbol_get_tc (lcomm_sym)->align)
3300 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3301 }
3302
3303 if (lcomm)
3304 {
3305 /* Make sym an offset from lcomm_sym. */
3306 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3307 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3308 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3309 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3310 }
3311
3312 subseg_set (current_seg, current_subseg);
3313
3314 demand_empty_rest_of_line ();
3315}
3316
3317/* The .csect pseudo-op. This switches us into a different
3318 subsegment. The first argument is a symbol whose value is the
3319 start of the .csect. In COFF, csect symbols get special aux
3320 entries defined by the x_csect field of union internal_auxent. The
3321 optional second argument is the alignment (the default is 2). */
3322
3323static void
98027b10 3324ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3325{
3326 char *name;
3327 char endc;
3328 symbolS *sym;
931e13a6 3329 offsetT align;
252b5132
RH		 3330
3331 name = input_line_pointer;
3332 endc = get_symbol_end ();
81d4177b 3333
252b5132
RH		 3334 sym = symbol_find_or_make (name);
3335
3336 *input_line_pointer = endc;
3337
3338 if (S_GET_NAME (sym)[0] == '\0')
3339 {
3340 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3341 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3342 }
3343
931e13a6 3344 align = 2;
252b5132
RH		 3345 if (*input_line_pointer == ',')
3346 {
3347 ++input_line_pointer;
931e13a6 3348 align = get_absolute_expression ();
252b5132
RH		 3349 }
3350
931e13a6
AM		 3351 ppc_change_csect (sym, align);
3352
252b5132
RH		 3353 demand_empty_rest_of_line ();
3354}
3355
3356/* Change to a different csect. */
3357
3358static void
98027b10 3359ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3360{
3361 if (S_IS_DEFINED (sym))
809ffe0d 3362 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3363 else
3364 {
3365 symbolS **list_ptr;
3366 int after_toc;
3367 int hold_chunksize;
3368 symbolS *list;
931e13a6
AM		 3369 int is_code;
3370 segT sec;
252b5132
RH		 3371
3372 /* This is a new csect. We need to look at the symbol class to
3373 figure out whether it should go in the text section or the
3374 data section. */
3375 after_toc = 0;
931e13a6 3376 is_code = 0;
809ffe0d 3377 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3378 {
3379 case XMC_PR:
3380 case XMC_RO:
3381 case XMC_DB:
3382 case XMC_GL:
3383 case XMC_XO:
3384 case XMC_SV:
3385 case XMC_TI:
3386 case XMC_TB:
3387 S_SET_SEGMENT (sym, text_section);
809ffe0d 3388 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3389 ++ppc_text_subsegment;
3390 list_ptr = &ppc_text_csects;
931e13a6 3391 is_code = 1;
252b5132
RH		 3392 break;
3393 case XMC_RW:
3394 case XMC_TC0:
3395 case XMC_TC:
3396 case XMC_DS:
3397 case XMC_UA:
3398 case XMC_BS:
3399 case XMC_UC:
3400 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3401 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3402 == ppc_data_subsegment))
252b5132
RH		 3403 after_toc = 1;
3404 S_SET_SEGMENT (sym, data_section);
809ffe0d 3405 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3406 ++ppc_data_subsegment;
3407 list_ptr = &ppc_data_csects;
3408 break;
3409 default:
3410 abort ();
3411 }
3412
3413 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3414 changing subsegments, so that we don't use a lot of memory
3415 space for what may be a small section. */
252b5132
RH		 3416 hold_chunksize = chunksize;
3417 chunksize = 64;
3418
931e13a6
AM		 3419 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3420 symbol_get_tc (sym)->subseg);
252b5132
RH		 3421
3422 chunksize = hold_chunksize;
3423
3424 if (after_toc)
3425 ppc_after_toc_frag = frag_now;
3426
931e13a6
AM		 3427 record_alignment (sec, align);
3428 if (is_code)
3429 frag_align_code (align, 0);
3430 else
3431 frag_align (align, 0, 0);
3432
809ffe0d 3433 symbol_set_frag (sym, frag_now);
252b5132
RH		 3434 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3435
931e13a6 3436 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3437 symbol_get_tc (sym)->output = 1;
3438 symbol_get_tc (sym)->within = sym;
81d4177b 3439
252b5132 3440 for (list = *list_ptr;
809ffe0d
ILT		 3441 symbol_get_tc (list)->next != (symbolS *) NULL;
3442 list = symbol_get_tc (list)->next)
252b5132 3443 ;
809ffe0d 3444 symbol_get_tc (list)->next = sym;
81d4177b 3445
252b5132 3446 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3447 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3448 &symbol_lastP);
252b5132
RH		 3449 }
3450
3451 ppc_current_csect = sym;
3452}
3453
3454/* This function handles the .text and .data pseudo-ops. These
3455 pseudo-ops aren't really used by XCOFF; we implement them for the
3456 convenience of people who aren't used to XCOFF. */
3457
3458static void
98027b10 3459ppc_section (int type)
252b5132
RH		 3460{
3461 const char *name;
3462 symbolS *sym;
3463
3464 if (type == 't')
3465 name = ".text[PR]";
3466 else if (type == 'd')
3467 name = ".data[RW]";
3468 else
3469 abort ();
3470
3471 sym = symbol_find_or_make (name);
3472
931e13a6 3473 ppc_change_csect (sym, 2);
252b5132
RH		 3474
3475 demand_empty_rest_of_line ();
3476}
3477
3478/* This function handles the .section pseudo-op. This is mostly to
3479 give an error, since XCOFF only supports .text, .data and .bss, but
3480 we do permit the user to name the text or data section. */
3481
3482static void
98027b10 3483ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3484{
3485 char *user_name;
3486 const char *real_name;
3487 char c;
3488 symbolS *sym;
3489
3490 user_name = input_line_pointer;
3491 c = get_symbol_end ();
3492
3493 if (strcmp (user_name, ".text") == 0)
3494 real_name = ".text[PR]";
3495 else if (strcmp (user_name, ".data") == 0)
3496 real_name = ".data[RW]";
3497 else
3498 {
3499 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3500 *input_line_pointer = c;
3501 ignore_rest_of_line ();
3502 return;
3503 }
3504
3505 *input_line_pointer = c;
3506
3507 sym = symbol_find_or_make (real_name);
3508
931e13a6 3509 ppc_change_csect (sym, 2);
252b5132
RH		 3510
3511 demand_empty_rest_of_line ();
3512}
3513
3514/* The .extern pseudo-op. We create an undefined symbol. */
3515
3516static void
98027b10 3517ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3518{
3519 char *name;
3520 char endc;
3521
3522 name = input_line_pointer;
3523 endc = get_symbol_end ();
3524
3525 (void) symbol_find_or_make (name);
3526
3527 *input_line_pointer = endc;
3528
3529 demand_empty_rest_of_line ();
3530}
3531
3532/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3533
3534static void
98027b10 3535ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3536{
3537 char *name;
3538 char endc;
3539 symbolS *sym;
3540
3541 name = input_line_pointer;
3542 endc = get_symbol_end ();
3543
3544 sym = symbol_find_or_make (name);
3545
3546 *input_line_pointer = endc;
3547
809ffe0d 3548 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3549
3550 demand_empty_rest_of_line ();
3551}
3552
3553/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3554 although I don't know why it bothers. */
3555
3556static void
98027b10 3557ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3558{
3559 char *name;
3560 char endc;
3561 symbolS *sym;
3562 int len;
3563
3564 name = input_line_pointer;
3565 endc = get_symbol_end ();
3566
3567 sym = symbol_find_or_make (name);
3568
3569 *input_line_pointer = endc;
3570
3571 if (*input_line_pointer != ',')
3572 {
3573 as_bad (_("missing rename string"));
3574 ignore_rest_of_line ();
3575 return;
3576 }
3577 ++input_line_pointer;
3578
809ffe0d 3579 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3580
3581 demand_empty_rest_of_line ();
3582}
3583
3584/* The .stabx pseudo-op. This is similar to a normal .stabs
3585 pseudo-op, but slightly different. A sample is
3586 .stabx "main:F-1",.main,142,0
3587 The first argument is the symbol name to create. The second is the
3588 value, and the third is the storage class. The fourth seems to be
3589 always zero, and I am assuming it is the type. */
3590
3591static void
98027b10 3592ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3593{
3594 char *name;
3595 int len;
3596 symbolS *sym;
3597 expressionS exp;
3598
3599 name = demand_copy_C_string (&len);
3600
3601 if (*input_line_pointer != ',')
3602 {
3603 as_bad (_("missing value"));
3604 return;
3605 }
3606 ++input_line_pointer;
3607
b34976b6 3608 ppc_stab_symbol = TRUE;
252b5132 3609 sym = symbol_make (name);
b34976b6 3610 ppc_stab_symbol = FALSE;
252b5132 3611
809ffe0d 3612 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3613
3614 (void) expression (&exp);
3615
3616 switch (exp.X_op)
3617 {
3618 case O_illegal:
3619 case O_absent:
3620 case O_big:
3621 as_bad (_("illegal .stabx expression; zero assumed"));
3622 exp.X_add_number = 0;
3623 /* Fall through. */
3624 case O_constant:
3625 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3626 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3627 break;
3628
3629 case O_symbol:
3630 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3631 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3632 else
3633 {
3634 S_SET_VALUE (sym,
3635 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3636 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3637 }
3638 break;
3639
3640 default:
3641 /* The value is some complex expression. This will probably
99a814a1
AM		 3642 fail at some later point, but this is probably the right
3643 thing to do here. */
809ffe0d 3644 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3645 break;
3646 }
3647
3648 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3649 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3650
3651 if (*input_line_pointer != ',')
3652 {
3653 as_bad (_("missing class"));
3654 return;
3655 }
3656 ++input_line_pointer;
3657
3658 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3659
3660 if (*input_line_pointer != ',')
3661 {
3662 as_bad (_("missing type"));
3663 return;
3664 }
3665 ++input_line_pointer;
3666
3667 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3668
809ffe0d 3669 symbol_get_tc (sym)->output = 1;
252b5132 3670
6877bb43 3671 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3672
809ffe0d 3673 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3674
41ea10b1 3675 /* In this case :
99a814a1 3676
41ea10b1
TR		 3677 .bs name
3678 .stabx "z",arrays_,133,0
3679 .es
99a814a1 3680
41ea10b1 3681 .comm arrays_,13768,3
99a814a1 3682
41ea10b1
TR		 3683 resolve_symbol_value will copy the exp's "within" into sym's when the
3684 offset is 0. Since this seems to be corner case problem,
3685 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3686 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3687
3688 if (exp.X_op == O_symbol)
41ea10b1
TR		 3689 {
3690 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3691 }
6877bb43 3692 }
99a814a1 3693
252b5132
RH		 3694 if (exp.X_op != O_symbol
3695 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3696 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3697 ppc_frob_label (sym);
3698 else
3699 {
3700 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3701 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3702 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3703 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3704 }
3705
3706 demand_empty_rest_of_line ();
3707}
3708
3709/* The .function pseudo-op. This takes several arguments. The first
3710 argument seems to be the external name of the symbol. The second
67c1ffbe 3711 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3712 uses the same name for both. I have no idea what the third and
3713 fourth arguments are meant to be. The optional fifth argument is
3714 an expression for the size of the function. In COFF this symbol
3715 gets an aux entry like that used for a csect. */
3716
3717static void
98027b10 3718ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3719{
3720 char *name;
3721 char endc;
3722 char *s;
3723 symbolS *ext_sym;
3724 symbolS *lab_sym;
3725
3726 name = input_line_pointer;
3727 endc = get_symbol_end ();
3728
3729 /* Ignore any [PR] suffix. */
3730 name = ppc_canonicalize_symbol_name (name);
3731 s = strchr (name, '[');
3732 if (s != (char *) NULL
3733 && strcmp (s + 1, "PR]") == 0)
3734 *s = '\0';
3735
3736 ext_sym = symbol_find_or_make (name);
3737
3738 *input_line_pointer = endc;
3739
3740 if (*input_line_pointer != ',')
3741 {
3742 as_bad (_("missing symbol name"));
3743 ignore_rest_of_line ();
3744 return;
3745 }
3746 ++input_line_pointer;
3747
3748 name = input_line_pointer;
3749 endc = get_symbol_end ();
3750
3751 lab_sym = symbol_find_or_make (name);
3752
3753 *input_line_pointer = endc;
3754
3755 if (ext_sym != lab_sym)
3756 {
809ffe0d
ILT		 3757 expressionS exp;
3758
3759 exp.X_op = O_symbol;
3760 exp.X_add_symbol = lab_sym;
3761 exp.X_op_symbol = NULL;
3762 exp.X_add_number = 0;
3763 exp.X_unsigned = 0;
3764 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3765 }
3766
809ffe0d
ILT		 3767 if (symbol_get_tc (ext_sym)->class == -1)
3768 symbol_get_tc (ext_sym)->class = XMC_PR;
3769 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3770
3771 if (*input_line_pointer == ',')
3772 {
3773 expressionS ignore;
3774
3775 /* Ignore the third argument. */
3776 ++input_line_pointer;
3777 expression (&ignore);
3778 if (*input_line_pointer == ',')
3779 {
3780 /* Ignore the fourth argument. */
3781 ++input_line_pointer;
3782 expression (&ignore);
3783 if (*input_line_pointer == ',')
3784 {
3785 /* The fifth argument is the function size. */
3786 ++input_line_pointer;
809ffe0d
ILT		 3787 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3788 absolute_section,
3789 (valueT) 0,
3790 &zero_address_frag);
3791 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3792 }
3793 }
3794 }
3795
3796 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3797 SF_SET_FUNCTION (ext_sym);
3798 SF_SET_PROCESS (ext_sym);
3799 coff_add_linesym (ext_sym);
3800
3801 demand_empty_rest_of_line ();
3802}
3803
3804/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3805 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3806 with the correct line number */
5d6255fe 3807
8642cce8 3808static symbolS *saved_bi_sym = 0;
252b5132
RH		 3809
3810static void
98027b10 3811ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3812{
3813 symbolS *sym;
3814
3815 sym = symbol_make (".bf");
3816 S_SET_SEGMENT (sym, text_section);
809ffe0d 3817 symbol_set_frag (sym, frag_now);
252b5132
RH		 3818 S_SET_VALUE (sym, frag_now_fix ());
3819 S_SET_STORAGE_CLASS (sym, C_FCN);
3820
3821 coff_line_base = get_absolute_expression ();
3822
3823 S_SET_NUMBER_AUXILIARY (sym, 1);
3824 SA_SET_SYM_LNNO (sym, coff_line_base);
3825
8642cce8 3826 /* Line number for bi. */
5d6255fe 3827 if (saved_bi_sym)
8642cce8
TR		 3828 {
3829 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3830 saved_bi_sym = 0;
3831 }
5d6255fe 3832
8642cce8 3833
809ffe0d 3834 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3835
3836 ppc_frob_label (sym);
3837
3838 demand_empty_rest_of_line ();
3839}
3840
3841/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3842 ".ef", except that the line number is absolute, not relative to the
3843 most recent ".bf" symbol. */
3844
3845static void
98027b10 3846ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3847{
3848 symbolS *sym;
3849
3850 sym = symbol_make (".ef");
3851 S_SET_SEGMENT (sym, text_section);
809ffe0d 3852 symbol_set_frag (sym, frag_now);
252b5132
RH		 3853 S_SET_VALUE (sym, frag_now_fix ());
3854 S_SET_STORAGE_CLASS (sym, C_FCN);
3855 S_SET_NUMBER_AUXILIARY (sym, 1);
3856 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3857 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3858
3859 ppc_frob_label (sym);
3860
3861 demand_empty_rest_of_line ();
3862}
3863
3864/* The .bi and .ei pseudo-ops. These take a string argument and
3865 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3866 the symbol list. The value of .bi will be know when the next .bf
3867 is encountered. */
252b5132
RH		 3868
3869static void
98027b10 3870ppc_biei (int ei)
252b5132
RH		 3871{
3872 static symbolS *last_biei;
3873
3874 char *name;
3875 int len;
3876 symbolS *sym;
3877 symbolS *look;
3878
3879 name = demand_copy_C_string (&len);
3880
3881 /* The value of these symbols is actually file offset. Here we set
3882 the value to the index into the line number entries. In
3883 ppc_frob_symbols we set the fix_line field, which will cause BFD
3884 to do the right thing. */
3885
3886 sym = symbol_make (name);
3887 /* obj-coff.c currently only handles line numbers correctly in the
3888 .text section. */
3889 S_SET_SEGMENT (sym, text_section);
3890 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3891 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3892
3893 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3894 symbol_get_tc (sym)->output = 1;
81d4177b 3895
8642cce8 3896 /* Save bi. */
5d6255fe 3897 if (ei)
8642cce8
TR		 3898 saved_bi_sym = 0;
3899 else
3900 saved_bi_sym = sym;
3901
252b5132
RH		 3902 for (look = last_biei ? last_biei : symbol_rootP;
3903 (look != (symbolS *) NULL
3904 && (S_GET_STORAGE_CLASS (look) == C_FILE
3905 || S_GET_STORAGE_CLASS (look) == C_BINCL
3906 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3907 look = symbol_next (look))
3908 ;
3909 if (look != (symbolS *) NULL)
3910 {
3911 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3912 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3913 last_biei = sym;
3914 }
3915
3916 demand_empty_rest_of_line ();
3917}
3918
3919/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3920 There is one argument, which is a csect symbol. The value of the
3921 .bs symbol is the index of this csect symbol. */
3922
3923static void
98027b10 3924ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3925{
3926 char *name;
3927 char endc;
3928 symbolS *csect;
3929 symbolS *sym;
3930
3931 if (ppc_current_block != NULL)
3932 as_bad (_("nested .bs blocks"));
3933
3934 name = input_line_pointer;
3935 endc = get_symbol_end ();
3936
3937 csect = symbol_find_or_make (name);
3938
3939 *input_line_pointer = endc;
3940
3941 sym = symbol_make (".bs");
3942 S_SET_SEGMENT (sym, now_seg);
3943 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3944 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3945 symbol_get_tc (sym)->output = 1;
252b5132 3946
809ffe0d 3947 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3948
3949 ppc_frob_label (sym);
3950
3951 ppc_current_block = sym;
3952
3953 demand_empty_rest_of_line ();
3954}
3955
3956/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3957
3958static void
98027b10 3959ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3960{
3961 symbolS *sym;
3962
3963 if (ppc_current_block == NULL)
3964 as_bad (_(".es without preceding .bs"));
3965
3966 sym = symbol_make (".es");
3967 S_SET_SEGMENT (sym, now_seg);
3968 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3969 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3970 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3971
3972 ppc_frob_label (sym);
3973
3974 ppc_current_block = NULL;
3975
3976 demand_empty_rest_of_line ();
3977}
3978
3979/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3980 line number. */
3981
3982static void
98027b10 3983ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3984{
3985 symbolS *sym;
3986
3987 sym = symbol_make (".bb");
3988 S_SET_SEGMENT (sym, text_section);
809ffe0d 3989 symbol_set_frag (sym, frag_now);
252b5132
RH		 3990 S_SET_VALUE (sym, frag_now_fix ());
3991 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3992
3993 S_SET_NUMBER_AUXILIARY (sym, 1);
3994 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3995
809ffe0d 3996 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3997
3998 SF_SET_PROCESS (sym);
3999
4000 ppc_frob_label (sym);
4001
4002 demand_empty_rest_of_line ();
4003}
4004
4005/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4006 line number. */
4007
4008static void
98027b10 4009ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4010{
4011 symbolS *sym;
4012
4013 sym = symbol_make (".eb");
4014 S_SET_SEGMENT (sym, text_section);
809ffe0d 4015 symbol_set_frag (sym, frag_now);
252b5132
RH		 4016 S_SET_VALUE (sym, frag_now_fix ());
4017 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4018 S_SET_NUMBER_AUXILIARY (sym, 1);
4019 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4020 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4021
4022 SF_SET_PROCESS (sym);
4023
4024 ppc_frob_label (sym);
4025
4026 demand_empty_rest_of_line ();
4027}
4028
4029/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4030 specified name. */
4031
4032static void
98027b10 4033ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4034{
4035 char *name;
4036 int len;
4037 symbolS *sym;
4038
4039 name = demand_copy_C_string (&len);
4040 sym = symbol_make (name);
4041 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4042 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4043 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4044 S_SET_VALUE (sym, 0);
809ffe0d 4045 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4046
4047 ppc_frob_label (sym);
4048
4049 demand_empty_rest_of_line ();
4050}
4051
4052/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4053
4054static void
98027b10 4055ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4056{
4057 symbolS *sym;
4058
4059 sym = symbol_make (".ec");
4060 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4061 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4062 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4063 S_SET_VALUE (sym, 0);
809ffe0d 4064 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4065
4066 ppc_frob_label (sym);
4067
4068 demand_empty_rest_of_line ();
4069}
4070
4071/* The .toc pseudo-op. Switch to the .toc subsegment. */
4072
4073static void
98027b10 4074ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4075{
4076 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4077 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4078 else
4079 {
4080 subsegT subseg;
4081 symbolS *sym;
4082 symbolS *list;
81d4177b 4083
252b5132
RH		 4084 subseg = ppc_data_subsegment;
4085 ++ppc_data_subsegment;
4086
4087 subseg_new (segment_name (data_section), subseg);
4088 ppc_toc_frag = frag_now;
4089
4090 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4091 symbol_set_frag (sym, frag_now);
252b5132
RH		 4092 S_SET_SEGMENT (sym, data_section);
4093 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4094 symbol_get_tc (sym)->subseg = subseg;
4095 symbol_get_tc (sym)->output = 1;
4096 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4097
4098 ppc_toc_csect = sym;
81d4177b 4099
252b5132 4100 for (list = ppc_data_csects;
809ffe0d
ILT		 4101 symbol_get_tc (list)->next != (symbolS *) NULL;
4102 list = symbol_get_tc (list)->next)
252b5132 4103 ;
809ffe0d 4104 symbol_get_tc (list)->next = sym;
252b5132
RH		 4105
4106 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4107 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4108 &symbol_lastP);
252b5132
RH		 4109 }
4110
4111 ppc_current_csect = ppc_toc_csect;
4112
4113 demand_empty_rest_of_line ();
4114}
4115
4116/* The AIX assembler automatically aligns the operands of a .long or
4117 .short pseudo-op, and we want to be compatible. */
4118
4119static void
98027b10 4120ppc_xcoff_cons (int log_size)
252b5132
RH		 4121{
4122 frag_align (log_size, 0, 0);
4123 record_alignment (now_seg, log_size);
4124 cons (1 << log_size);
4125}
4126
4127static void
98027b10 4128ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4129{
4130 expressionS exp;
4131 int byte_count;
4132
4133 (void) expression (&exp);
4134
4135 if (exp.X_op != O_constant)
4136 {
4137 as_bad (_("non-constant byte count"));
4138 return;
4139 }
4140
4141 byte_count = exp.X_add_number;
4142
4143 if (*input_line_pointer != ',')
4144 {
4145 as_bad (_("missing value"));
4146 return;
4147 }
4148
4149 ++input_line_pointer;
4150 cons (byte_count);
4151}
4152
4153#endif /* OBJ_XCOFF */
0baf16f2 4154#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4155\f
4156/* The .tc pseudo-op. This is used when generating either XCOFF or
4157 ELF. This takes two or more arguments.
4158
4159 When generating XCOFF output, the first argument is the name to
4160 give to this location in the toc; this will be a symbol with class
0baf16f2 4161 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4162 this location in the TOC; often there is just one more argument, a
1049f94e 4163 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4164 depends on target word size. A 32-bit target uses 4-byte values, a
4165 64-bit target uses 8-byte values.
252b5132
RH		 4166
4167 When not generating XCOFF output, the arguments are the same, but
4168 the first argument is simply ignored. */
4169
4170static void
98027b10 4171ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4172{
4173#ifdef OBJ_XCOFF
4174
4175 /* Define the TOC symbol name. */
4176 {
4177 char *name;
4178 char endc;
4179 symbolS *sym;
4180
4181 if (ppc_toc_csect == (symbolS *) NULL
4182 || ppc_toc_csect != ppc_current_csect)
4183 {
4184 as_bad (_(".tc not in .toc section"));
4185 ignore_rest_of_line ();
4186 return;
4187 }
4188
4189 name = input_line_pointer;
4190 endc = get_symbol_end ();
4191
4192 sym = symbol_find_or_make (name);
4193
4194 *input_line_pointer = endc;
4195
4196 if (S_IS_DEFINED (sym))
4197 {
4198 symbolS *label;
4199
809ffe0d
ILT		 4200 label = symbol_get_tc (ppc_current_csect)->within;
4201 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 4202 {
4203 as_bad (_(".tc with no label"));
4204 ignore_rest_of_line ();
4205 return;
4206 }
4207
4208 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4209 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4210 S_SET_VALUE (label, S_GET_VALUE (sym));
4211
4212 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4213 ++input_line_pointer;
4214
4215 return;
4216 }
4217
4218 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4219 symbol_set_frag (sym, frag_now);
252b5132 4220 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4221 symbol_get_tc (sym)->class = XMC_TC;
4222 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4223
4224 ppc_frob_label (sym);
4225 }
4226
0baf16f2
AM		 4227#endif /* OBJ_XCOFF */
4228#ifdef OBJ_ELF
9c7977b3 4229 int align;
252b5132
RH		 4230
4231 /* Skip the TOC symbol name. */
4232 while (is_part_of_name (*input_line_pointer)
d13d4015 4233 || *input_line_pointer == ' '
252b5132
RH		 4234 || *input_line_pointer == '['
4235 || *input_line_pointer == ']'
4236 || *input_line_pointer == '{'
4237 || *input_line_pointer == '}')
4238 ++input_line_pointer;
4239
0baf16f2 4240 /* Align to a four/eight byte boundary. */
2b3c4602 4241 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4242 frag_align (align, 0, 0);
4243 record_alignment (now_seg, align);
0baf16f2 4244#endif /* OBJ_ELF */
252b5132
RH		 4245
4246 if (*input_line_pointer != ',')
4247 demand_empty_rest_of_line ();
4248 else
4249 {
4250 ++input_line_pointer;
2b3c4602 4251 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4252 }
4253}
0baf16f2
AM		 4254
4255/* Pseudo-op .machine. */
0baf16f2
AM		 4256
4257static void
98027b10 4258ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4259{
69c040df
AM		 4260 char *cpu_string;
4261#define MAX_HISTORY 100
fa452fa6 4262 static ppc_cpu_t *cpu_history;
69c040df
AM		 4263 static int curr_hist;
4264
4265 SKIP_WHITESPACE ();
4266
4267 if (*input_line_pointer == '"')
4268 {
4269 int len;
4270 cpu_string = demand_copy_C_string (&len);
4271 }
4272 else
4273 {
4274 char c;
4275 cpu_string = input_line_pointer;
4276 c = get_symbol_end ();
4277 cpu_string = xstrdup (cpu_string);
4278 *input_line_pointer = c;
4279 }
4280
4281 if (cpu_string != NULL)
4282 {
fa452fa6 4283 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4284 ppc_cpu_t new_cpu;
69c040df
AM		 4285 char *p;
4286
4287 for (p = cpu_string; *p != 0; p++)
4288 *p = TOLOWER (*p);
4289
4290 if (strcmp (cpu_string, "push") == 0)
4291 {
4292 if (cpu_history == NULL)
4293 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4294
4295 if (curr_hist >= MAX_HISTORY)
4296 as_bad (_(".machine stack overflow"));
4297 else
4298 cpu_history[curr_hist++] = ppc_cpu;
4299 }
4300 else if (strcmp (cpu_string, "pop") == 0)
4301 {
4302 if (curr_hist <= 0)
4303 as_bad (_(".machine stack underflow"));
4304 else
4305 ppc_cpu = cpu_history[--curr_hist];
4306 }
69fe9ce5
AM		 4307 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4308 ppc_cpu = new_cpu;
69c040df
AM		 4309 else
4310 as_bad (_("invalid machine `%s'"), cpu_string);
4311
4312 if (ppc_cpu != old_cpu)
4313 ppc_setup_opcodes ();
4314 }
4315
4316 demand_empty_rest_of_line ();
0baf16f2
AM		 4317}
4318
4319/* See whether a symbol is in the TOC section. */
4320
4321static int
98027b10 4322ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4323{
4324#ifdef OBJ_XCOFF
4325 return symbol_get_tc (sym)->class == XMC_TC;
4326#endif
4327#ifdef OBJ_ELF
4328 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4329 if (ppc_obj64)
0baf16f2
AM		 4330 return strcmp (sname, ".toc") == 0;
4331 else
4332 return strcmp (sname, ".got") == 0;
4333#endif
4334}
4335#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4336\f
4337#ifdef TE_PE
4338
99a814a1 4339/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4340
4341/* Set the current section. */
4342static void
98027b10 4343ppc_set_current_section (segT new)
252b5132
RH		 4344{
4345 ppc_previous_section = ppc_current_section;
4346 ppc_current_section = new;
4347}
4348
4349/* pseudo-op: .previous
4350 behaviour: toggles the current section with the previous section.
4351 errors: None
99a814a1
AM		 4352 warnings: "No previous section" */
4353
252b5132 4354static void
98027b10 4355ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4356{
4357 symbolS *tmp;
4358
81d4177b 4359 if (ppc_previous_section == NULL)
252b5132 4360 {
99a814a1 4361 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4362 return;
4363 }
4364
99a814a1 4365 subseg_set (ppc_previous_section, 0);
252b5132 4366
99a814a1 4367 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4368}
4369
4370/* pseudo-op: .pdata
4371 behaviour: predefined read only data section
b34976b6 4372 double word aligned
252b5132
RH		 4373 errors: None
4374 warnings: None
4375 initial: .section .pdata "adr3"
b34976b6 4376 a - don't know -- maybe a misprint
252b5132
RH		 4377 d - initialized data
4378 r - readable
4379 3 - double word aligned (that would be 4 byte boundary)
4380
4381 commentary:
4382 Tag index tables (also known as the function table) for exception
99a814a1 4383 handling, debugging, etc. */
252b5132 4384
252b5132 4385static void
98027b10 4386ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4387{
81d4177b 4388 if (pdata_section == 0)
252b5132
RH		 4389 {
4390 pdata_section = subseg_new (".pdata", 0);
81d4177b 4391
252b5132
RH		 4392 bfd_set_section_flags (stdoutput, pdata_section,
4393 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4394 | SEC_READONLY | SEC_DATA ));
81d4177b 4395
252b5132
RH		 4396 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4397 }
4398 else
4399 {
99a814a1 4400 pdata_section = subseg_new (".pdata", 0);
252b5132 4401 }
99a814a1 4402 ppc_set_current_section (pdata_section);
252b5132
RH		 4403}
4404
4405/* pseudo-op: .ydata
4406 behaviour: predefined read only data section
b34976b6 4407 double word aligned
252b5132
RH		 4408 errors: None
4409 warnings: None
4410 initial: .section .ydata "drw3"
b34976b6 4411 a - don't know -- maybe a misprint
252b5132
RH		 4412 d - initialized data
4413 r - readable
4414 3 - double word aligned (that would be 4 byte boundary)
4415 commentary:
4416 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4417 debugging, etc. */
4418
252b5132 4419static void
98027b10 4420ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4421{
81d4177b 4422 if (ydata_section == 0)
252b5132
RH		 4423 {
4424 ydata_section = subseg_new (".ydata", 0);
4425 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4426 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4427 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4428
4429 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4430 }
4431 else
4432 {
4433 ydata_section = subseg_new (".ydata", 0);
4434 }
99a814a1 4435 ppc_set_current_section (ydata_section);
252b5132
RH		 4436}
4437
4438/* pseudo-op: .reldata
4439 behaviour: predefined read write data section
b34976b6 4440 double word aligned (4-byte)
252b5132
RH		 4441 FIXME: relocation is applied to it
4442 FIXME: what's the difference between this and .data?
4443 errors: None
4444 warnings: None
4445 initial: .section .reldata "drw3"
4446 d - initialized data
4447 r - readable
4448 w - writeable
4449 3 - double word aligned (that would be 8 byte boundary)
4450
4451 commentary:
4452 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4453 function descriptors, etc. */
4454
252b5132 4455static void
98027b10 4456ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4457{
4458 if (reldata_section == 0)
4459 {
4460 reldata_section = subseg_new (".reldata", 0);
4461
4462 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4463 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4464 | SEC_DATA));
252b5132
RH		 4465
4466 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4467 }
4468 else
4469 {
4470 reldata_section = subseg_new (".reldata", 0);
4471 }
99a814a1 4472 ppc_set_current_section (reldata_section);
252b5132
RH		 4473}
4474
4475/* pseudo-op: .rdata
4476 behaviour: predefined read only data section
b34976b6 4477 double word aligned
252b5132
RH		 4478 errors: None
4479 warnings: None
4480 initial: .section .rdata "dr3"
4481 d - initialized data
4482 r - readable
99a814a1
AM		 4483 3 - double word aligned (that would be 4 byte boundary) */
4484
252b5132 4485static void
98027b10 4486ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4487{
4488 if (rdata_section == 0)
4489 {
4490 rdata_section = subseg_new (".rdata", 0);
4491 bfd_set_section_flags (stdoutput, rdata_section,
4492 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4493 | SEC_READONLY | SEC_DATA ));
4494
4495 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4496 }
4497 else
4498 {
4499 rdata_section = subseg_new (".rdata", 0);
4500 }
99a814a1 4501 ppc_set_current_section (rdata_section);
252b5132
RH		 4502}
4503
4504/* pseudo-op: .ualong
81d4177b 4505 behaviour: much like .int, with the exception that no alignment is
b34976b6 4506 performed.
252b5132
RH		 4507 FIXME: test the alignment statement
4508 errors: None
99a814a1
AM		 4509 warnings: None */
4510
252b5132 4511static void
98027b10 4512ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4513{
99a814a1
AM		 4514 /* Try for long. */
4515 cons (4);
252b5132
RH		 4516}
4517
4518/* pseudo-op: .znop <symbol name>
4519 behaviour: Issue a nop instruction
b34976b6 4520 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4521 the supplied symbol name.
4522 errors: None
99a814a1
AM		 4523 warnings: Missing symbol name */
4524
252b5132 4525static void
98027b10 4526ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4527{
4528 unsigned long insn;
4529 const struct powerpc_opcode *opcode;
4530 expressionS ex;
4531 char *f;
252b5132 4532 symbolS *sym;
252b5132
RH		 4533 char *symbol_name;
4534 char c;
4535 char *name;
4536 unsigned int exp;
4537 flagword flags;
4538 asection *sec;
4539
99a814a1 4540 /* Strip out the symbol name. */
252b5132
RH		 4541 symbol_name = input_line_pointer;
4542 c = get_symbol_end ();
4543
4544 name = xmalloc (input_line_pointer - symbol_name + 1);
4545 strcpy (name, symbol_name);
4546
4547 sym = symbol_find_or_make (name);
4548
4549 *input_line_pointer = c;
4550
4551 SKIP_WHITESPACE ();
4552
4553 /* Look up the opcode in the hash table. */
4554 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4555
99a814a1 4556 /* Stick in the nop. */
252b5132
RH		 4557 insn = opcode->opcode;
4558
4559 /* Write out the instruction. */
4560 f = frag_more (4);
4561 md_number_to_chars (f, insn, 4);
4562 fix_new (frag_now,
4563 f - frag_now->fr_literal,
4564 4,
4565 sym,
4566 0,
4567 0,
4568 BFD_RELOC_16_GOT_PCREL);
4569
4570}
4571
81d4177b
KH		 4572/* pseudo-op:
4573 behaviour:
4574 errors:
99a814a1
AM		 4575 warnings: */
4576
252b5132 4577static void
98027b10 4578ppc_pe_comm (int lcomm)
252b5132 4579{
98027b10
AM		 4580 char *name;
4581 char c;
4582 char *p;
252b5132 4583 offsetT temp;
98027b10 4584 symbolS *symbolP;
252b5132
RH		 4585 offsetT align;
4586
4587 name = input_line_pointer;
4588 c = get_symbol_end ();
4589
99a814a1 4590 /* just after name is now '\0'. */
252b5132
RH		 4591 p = input_line_pointer;
4592 *p = c;
4593 SKIP_WHITESPACE ();
4594 if (*input_line_pointer != ',')
4595 {
4596 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4597 ignore_rest_of_line ();
4598 return;
4599 }
4600
4601 input_line_pointer++; /* skip ',' */
4602 if ((temp = get_absolute_expression ()) < 0)
4603 {
4604 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4605 ignore_rest_of_line ();
4606 return;
4607 }
4608
4609 if (! lcomm)
4610 {
4611 /* The third argument to .comm is the alignment. */
4612 if (*input_line_pointer != ',')
4613 align = 3;
4614 else
4615 {
4616 ++input_line_pointer;
4617 align = get_absolute_expression ();
4618 if (align <= 0)
4619 {
4620 as_warn (_("ignoring bad alignment"));
4621 align = 3;
4622 }
4623 }
4624 }
4625
4626 *p = 0;
4627 symbolP = symbol_find_or_make (name);
4628
4629 *p = c;
4630 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4631 {
4632 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4633 S_GET_NAME (symbolP));
4634 ignore_rest_of_line ();
4635 return;
4636 }
4637
4638 if (S_GET_VALUE (symbolP))
4639 {
4640 if (S_GET_VALUE (symbolP) != (valueT) temp)
4641 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4642 S_GET_NAME (symbolP),
4643 (long) S_GET_VALUE (symbolP),
4644 (long) temp);
4645 }
4646 else
4647 {
4648 S_SET_VALUE (symbolP, (valueT) temp);
4649 S_SET_EXTERNAL (symbolP);
86ebace2 4650 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4651 }
4652
4653 demand_empty_rest_of_line ();
4654}
4655
4656/*
4657 * implement the .section pseudo op:
4658 * .section name {, "flags"}
4659 * ^ ^
4660 * | +--- optional flags: 'b' for bss
4661 * | 'i' for info
4662 * +-- section name 'l' for lib
4663 * 'n' for noload
4664 * 'o' for over
4665 * 'w' for data
4666 * 'd' (apparently m88k for data)
4667 * 'x' for text
4668 * But if the argument is not a quoted string, treat it as a
4669 * subsegment number.
4670 *
4671 * FIXME: this is a copy of the section processing from obj-coff.c, with
4672 * additions/changes for the moto-pas assembler support. There are three
4673 * categories:
4674 *
81d4177b 4675 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4676 * setting bits that bfd probably neither understands or uses. The
4677 * correct approach (?) will have to incorporate extra fields attached
4678 * to the section to hold the system specific stuff. (krk)
4679 *
4680 * Section Contents:
4681 * 'a' - unknown - referred to in documentation, but no definition supplied
4682 * 'c' - section has code
4683 * 'd' - section has initialized data
4684 * 'u' - section has uninitialized data
4685 * 'i' - section contains directives (info)
4686 * 'n' - section can be discarded
4687 * 'R' - remove section at link time
4688 *
4689 * Section Protection:
4690 * 'r' - section is readable
4691 * 'w' - section is writeable
4692 * 'x' - section is executable
4693 * 's' - section is sharable
4694 *
4695 * Section Alignment:
4696 * '0' - align to byte boundary
4697 * '1' - align to halfword undary
4698 * '2' - align to word boundary
4699 * '3' - align to doubleword boundary
4700 * '4' - align to quadword boundary
4701 * '5' - align to 32 byte boundary
4702 * '6' - align to 64 byte boundary
4703 *
4704 */
4705
4706void
98027b10 4707ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4708{
99a814a1 4709 /* Strip out the section name. */
252b5132
RH		 4710 char *section_name;
4711 char c;
4712 char *name;
4713 unsigned int exp;
4714 flagword flags;
4715 segT sec;
4716 int align;
4717
4718 section_name = input_line_pointer;
4719 c = get_symbol_end ();
4720
4721 name = xmalloc (input_line_pointer - section_name + 1);
4722 strcpy (name, section_name);
4723
4724 *input_line_pointer = c;
4725
4726 SKIP_WHITESPACE ();
4727
4728 exp = 0;
4729 flags = SEC_NO_FLAGS;
4730
4731 if (strcmp (name, ".idata$2") == 0)
4732 {
4733 align = 0;
4734 }
4735 else if (strcmp (name, ".idata$3") == 0)
4736 {
4737 align = 0;
4738 }
4739 else if (strcmp (name, ".idata$4") == 0)
4740 {
4741 align = 2;
4742 }
4743 else if (strcmp (name, ".idata$5") == 0)
4744 {
4745 align = 2;
4746 }
4747 else if (strcmp (name, ".idata$6") == 0)
4748 {
4749 align = 1;
4750 }
4751 else
99a814a1
AM		 4752 /* Default alignment to 16 byte boundary. */
4753 align = 4;
252b5132
RH		 4754
4755 if (*input_line_pointer == ',')
4756 {
4757 ++input_line_pointer;
4758 SKIP_WHITESPACE ();
4759 if (*input_line_pointer != '"')
4760 exp = get_absolute_expression ();
4761 else
4762 {
4763 ++input_line_pointer;
4764 while (*input_line_pointer != '"'
4765 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4766 {
4767 switch (*input_line_pointer)
4768 {
4769 /* Section Contents */
4770 case 'a': /* unknown */
4771 as_bad (_("Unsupported section attribute -- 'a'"));
4772 break;
4773 case 'c': /* code section */
81d4177b 4774 flags |= SEC_CODE;
252b5132
RH		 4775 break;
4776 case 'd': /* section has initialized data */
4777 flags |= SEC_DATA;
4778 break;
4779 case 'u': /* section has uninitialized data */
4780 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4781 in winnt.h */
4782 flags |= SEC_ROM;
4783 break;
4784 case 'i': /* section contains directives (info) */
4785 /* FIXME: This is IMAGE_SCN_LNK_INFO
4786 in winnt.h */
4787 flags |= SEC_HAS_CONTENTS;
4788 break;
4789 case 'n': /* section can be discarded */
81d4177b 4790 flags &=~ SEC_LOAD;
252b5132
RH		 4791 break;
4792 case 'R': /* Remove section at link time */
4793 flags |= SEC_NEVER_LOAD;
4794 break;
8d452c78 4795#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4796 /* Section Protection */
4797 case 'r': /* section is readable */
4798 flags |= IMAGE_SCN_MEM_READ;
4799 break;
4800 case 'w': /* section is writeable */
4801 flags |= IMAGE_SCN_MEM_WRITE;
4802 break;
4803 case 'x': /* section is executable */
4804 flags |= IMAGE_SCN_MEM_EXECUTE;
4805 break;
4806 case 's': /* section is sharable */
4807 flags |= IMAGE_SCN_MEM_SHARED;
4808 break;
4809
4810 /* Section Alignment */
4811 case '0': /* align to byte boundary */
4812 flags |= IMAGE_SCN_ALIGN_1BYTES;
4813 align = 0;
4814 break;
4815 case '1': /* align to halfword boundary */
4816 flags |= IMAGE_SCN_ALIGN_2BYTES;
4817 align = 1;
4818 break;
4819 case '2': /* align to word boundary */
4820 flags |= IMAGE_SCN_ALIGN_4BYTES;
4821 align = 2;
4822 break;
4823 case '3': /* align to doubleword boundary */
4824 flags |= IMAGE_SCN_ALIGN_8BYTES;
4825 align = 3;
4826 break;
4827 case '4': /* align to quadword boundary */
4828 flags |= IMAGE_SCN_ALIGN_16BYTES;
4829 align = 4;
4830 break;
4831 case '5': /* align to 32 byte boundary */
4832 flags |= IMAGE_SCN_ALIGN_32BYTES;
4833 align = 5;
4834 break;
4835 case '6': /* align to 64 byte boundary */
4836 flags |= IMAGE_SCN_ALIGN_64BYTES;
4837 align = 6;
4838 break;
8d452c78 4839#endif
252b5132 4840 default:
99a814a1
AM		 4841 as_bad (_("unknown section attribute '%c'"),
4842 *input_line_pointer);
252b5132
RH		 4843 break;
4844 }
4845 ++input_line_pointer;
4846 }
4847 if (*input_line_pointer == '"')
4848 ++input_line_pointer;
4849 }
4850 }
4851
4852 sec = subseg_new (name, (subsegT) exp);
4853
99a814a1 4854 ppc_set_current_section (sec);
252b5132
RH		 4855
4856 if (flags != SEC_NO_FLAGS)
4857 {
4858 if (! bfd_set_section_flags (stdoutput, sec, flags))
4859 as_bad (_("error setting flags for \"%s\": %s"),
4860 bfd_section_name (stdoutput, sec),
4861 bfd_errmsg (bfd_get_error ()));
4862 }
4863
99a814a1 4864 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4865}
4866
4867static void
98027b10 4868ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4869{
4870 char *name;
4871 char endc;
4872 symbolS *ext_sym;
4873
4874 name = input_line_pointer;
4875 endc = get_symbol_end ();
4876
4877 ext_sym = symbol_find_or_make (name);
4878
4879 *input_line_pointer = endc;
4880
4881 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4882 SF_SET_FUNCTION (ext_sym);
4883 SF_SET_PROCESS (ext_sym);
4884 coff_add_linesym (ext_sym);
4885
4886 demand_empty_rest_of_line ();
4887}
4888
4889static void
98027b10 4890ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4891{
4892 if (tocdata_section == 0)
4893 {
4894 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4895 /* FIXME: section flags won't work. */
252b5132
RH		 4896 bfd_set_section_flags (stdoutput, tocdata_section,
4897 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4898 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4899
4900 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4901 }
4902 else
4903 {
4904 rdata_section = subseg_new (".tocd", 0);
4905 }
4906
99a814a1 4907 ppc_set_current_section (tocdata_section);
252b5132
RH		 4908
4909 demand_empty_rest_of_line ();
4910}
4911
4912/* Don't adjust TOC relocs to use the section symbol. */
4913
4914int
98027b10 4915ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4916{
4917 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4918}
4919
4920#endif
4921\f
4922#ifdef OBJ_XCOFF
4923
4924/* XCOFF specific symbol and file handling. */
4925
4926/* Canonicalize the symbol name. We use the to force the suffix, if
4927 any, to use square brackets, and to be in upper case. */
4928
4929char *
98027b10 4930ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4931{
4932 char *s;
4933
4934 if (ppc_stab_symbol)
4935 return name;
4936
4937 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4938 ;
4939 if (*s != '\0')
4940 {
4941 char brac;
4942
4943 if (*s == '[')
4944 brac = ']';
4945 else
4946 {
4947 *s = '[';
4948 brac = '}';
4949 }
4950
4951 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4952 *s = TOUPPER (*s);
252b5132
RH		 4953
4954 if (*s == '\0' || s[1] != '\0')
4955 as_bad (_("bad symbol suffix"));
4956
4957 *s = ']';
4958 }
4959
4960 return name;
4961}
4962
4963/* Set the class of a symbol based on the suffix, if any. This is
4964 called whenever a new symbol is created. */
4965
4966void
98027b10 4967ppc_symbol_new_hook (symbolS *sym)
252b5132 4968{
809ffe0d 4969 struct ppc_tc_sy *tc;
252b5132
RH		 4970 const char *s;
4971
809ffe0d
ILT		 4972 tc = symbol_get_tc (sym);
4973 tc->next = NULL;
4974 tc->output = 0;
4975 tc->class = -1;
4976 tc->real_name = NULL;
4977 tc->subseg = 0;
4978 tc->align = 0;
4979 tc->size = NULL;
4980 tc->within = NULL;
252b5132
RH		 4981
4982 if (ppc_stab_symbol)
4983 return;
4984
4985 s = strchr (S_GET_NAME (sym), '[');
4986 if (s == (const char *) NULL)
4987 {
4988 /* There is no suffix. */
4989 return;
4990 }
4991
4992 ++s;
4993
4994 switch (s[0])
4995 {
4996 case 'B':
4997 if (strcmp (s, "BS]") == 0)
809ffe0d 4998 tc->class = XMC_BS;
252b5132
RH		 4999 break;
5000 case 'D':
5001 if (strcmp (s, "DB]") == 0)
809ffe0d 5002 tc->class = XMC_DB;
252b5132 5003 else if (strcmp (s, "DS]") == 0)
809ffe0d 5004 tc->class = XMC_DS;
252b5132
RH		 5005 break;
5006 case 'G':
5007 if (strcmp (s, "GL]") == 0)
809ffe0d 5008 tc->class = XMC_GL;
252b5132
RH		 5009 break;
5010 case 'P':
5011 if (strcmp (s, "PR]") == 0)
809ffe0d 5012 tc->class = XMC_PR;
252b5132
RH		 5013 break;
5014 case 'R':
5015 if (strcmp (s, "RO]") == 0)
809ffe0d 5016 tc->class = XMC_RO;
252b5132 5017 else if (strcmp (s, "RW]") == 0)
809ffe0d 5018 tc->class = XMC_RW;
252b5132
RH		 5019 break;
5020 case 'S':
5021 if (strcmp (s, "SV]") == 0)
809ffe0d 5022 tc->class = XMC_SV;
252b5132
RH		 5023 break;
5024 case 'T':
5025 if (strcmp (s, "TC]") == 0)
809ffe0d 5026 tc->class = XMC_TC;
252b5132 5027 else if (strcmp (s, "TI]") == 0)
809ffe0d 5028 tc->class = XMC_TI;
252b5132 5029 else if (strcmp (s, "TB]") == 0)
809ffe0d 5030 tc->class = XMC_TB;
252b5132 5031 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 5032 tc->class = XMC_TC0;
252b5132
RH		 5033 break;
5034 case 'U':
5035 if (strcmp (s, "UA]") == 0)
809ffe0d 5036 tc->class = XMC_UA;
252b5132 5037 else if (strcmp (s, "UC]") == 0)
809ffe0d 5038 tc->class = XMC_UC;
252b5132
RH		 5039 break;
5040 case 'X':
5041 if (strcmp (s, "XO]") == 0)
809ffe0d 5042 tc->class = XMC_XO;
252b5132
RH		 5043 break;
5044 }
5045
809ffe0d 5046 if (tc->class == -1)
252b5132
RH		 5047 as_bad (_("Unrecognized symbol suffix"));
5048}
5049
5050/* Set the class of a label based on where it is defined. This
5051 handles symbols without suffixes. Also, move the symbol so that it
5052 follows the csect symbol. */
5053
5054void
98027b10 5055ppc_frob_label (symbolS *sym)
252b5132
RH		 5056{
5057 if (ppc_current_csect != (symbolS *) NULL)
5058 {
809ffe0d
ILT		 5059 if (symbol_get_tc (sym)->class == -1)
5060 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 5061
5062 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5063 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5064 &symbol_rootP, &symbol_lastP);
5065 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 5066 }
07a53e5c
RH		 5067
5068#ifdef OBJ_ELF
5069 dwarf2_emit_label (sym);
5070#endif
252b5132
RH		 5071}
5072
5073/* This variable is set by ppc_frob_symbol if any absolute symbols are
5074 seen. It tells ppc_adjust_symtab whether it needs to look through
5075 the symbols. */
5076
b34976b6 5077static bfd_boolean ppc_saw_abs;
252b5132
RH		 5078
5079/* Change the name of a symbol just before writing it out. Set the
5080 real name if the .rename pseudo-op was used. Otherwise, remove any
5081 class suffix. Return 1 if the symbol should not be included in the
5082 symbol table. */
5083
5084int
98027b10 5085ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5086{
5087 static symbolS *ppc_last_function;
5088 static symbolS *set_end;
5089
5090 /* Discard symbols that should not be included in the output symbol
5091 table. */
809ffe0d
ILT		 5092 if (! symbol_used_in_reloc_p (sym)
5093 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5094 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5095 && ! symbol_get_tc (sym)->output
252b5132
RH		 5096 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5097 return 1;
5098
a161fe53
AM		 5099 /* This one will disappear anyway. Don't make a csect sym for it. */
5100 if (sym == abs_section_sym)
5101 return 1;
5102
809ffe0d
ILT		 5103 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5104 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5105 else
5106 {
5107 const char *name;
5108 const char *s;
5109
5110 name = S_GET_NAME (sym);
5111 s = strchr (name, '[');
5112 if (s != (char *) NULL)
5113 {
5114 unsigned int len;
5115 char *snew;
5116
5117 len = s - name;
5118 snew = xmalloc (len + 1);
5119 memcpy (snew, name, len);
5120 snew[len] = '\0';
5121
5122 S_SET_NAME (sym, snew);
5123 }
5124 }
5125
5126 if (set_end != (symbolS *) NULL)
5127 {
5128 SA_SET_SYM_ENDNDX (set_end, sym);
5129 set_end = NULL;
5130 }
5131
5132 if (SF_GET_FUNCTION (sym))
5133 {
5134 if (ppc_last_function != (symbolS *) NULL)
5135 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5136 ppc_last_function = sym;
809ffe0d 5137 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5138 {
6386f3a7 5139 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5140 SA_SET_SYM_FSIZE (sym,
5141 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5142 }
5143 }
5144 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5145 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5146 {
5147 if (ppc_last_function == (symbolS *) NULL)
5148 as_bad (_(".ef with no preceding .function"));
5149 else
5150 {
5151 set_end = ppc_last_function;
5152 ppc_last_function = NULL;
5153
5154 /* We don't have a C_EFCN symbol, but we need to force the
5155 COFF backend to believe that it has seen one. */
5156 coff_last_function = NULL;
5157 }
5158 }
5159
670ec21d 5160 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5161 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5162 && S_GET_STORAGE_CLASS (sym) != C_FILE
5163 && S_GET_STORAGE_CLASS (sym) != C_FCN
5164 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5165 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5166 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5167 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5168 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5169 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5170 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5171
5172 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5173 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5174 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5175 {
5176 int i;
5177 union internal_auxent *a;
5178
5179 /* Create a csect aux. */
5180 i = S_GET_NUMBER_AUXILIARY (sym);
5181 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 5182 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5183 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 5184 {
5185 /* This is the TOC table. */
5186 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5187 a->x_csect.x_scnlen.l = 0;
5188 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5189 }
809ffe0d 5190 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5191 {
5192 /* This is a csect symbol. x_scnlen is the size of the
5193 csect. */
809ffe0d 5194 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5195 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5196 S_GET_SEGMENT (sym))
5197 - S_GET_VALUE (sym));
5198 else
5199 {
6386f3a7 5200 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5201 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5202 - S_GET_VALUE (sym));
5203 }
809ffe0d 5204 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5205 }
5206 else if (S_GET_SEGMENT (sym) == bss_section)
5207 {
5208 /* This is a common symbol. */
809ffe0d
ILT		 5209 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5210 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5211 if (S_IS_EXTERNAL (sym))
809ffe0d 5212 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5213 else
809ffe0d 5214 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5215 }
5216 else if (S_GET_SEGMENT (sym) == absolute_section)
5217 {
5218 /* This is an absolute symbol. The csect will be created by
99a814a1 5219 ppc_adjust_symtab. */
b34976b6 5220 ppc_saw_abs = TRUE;
252b5132 5221 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5222 if (symbol_get_tc (sym)->class == -1)
5223 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5224 }
5225 else if (! S_IS_DEFINED (sym))
5226 {
5227 /* This is an external symbol. */
5228 a->x_csect.x_scnlen.l = 0;
5229 a->x_csect.x_smtyp = XTY_ER;
5230 }
809ffe0d 5231 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5232 {
5233 symbolS *next;
5234
5235 /* This is a TOC definition. x_scnlen is the size of the
5236 TOC entry. */
5237 next = symbol_next (sym);
809ffe0d 5238 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5239 next = symbol_next (next);
5240 if (next == (symbolS *) NULL
809ffe0d 5241 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5242 {
5243 if (ppc_after_toc_frag == (fragS *) NULL)
5244 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5245 data_section)
5246 - S_GET_VALUE (sym));
5247 else
5248 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5249 - S_GET_VALUE (sym));
5250 }
5251 else
5252 {
6386f3a7 5253 resolve_symbol_value (next);
252b5132
RH		 5254 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5255 - S_GET_VALUE (sym));
5256 }
5257 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5258 }
5259 else
5260 {
5261 symbolS *csect;
5262
5263 /* This is a normal symbol definition. x_scnlen is the
5264 symbol index of the containing csect. */
5265 if (S_GET_SEGMENT (sym) == text_section)
5266 csect = ppc_text_csects;
5267 else if (S_GET_SEGMENT (sym) == data_section)
5268 csect = ppc_data_csects;
5269 else
5270 abort ();
5271
5272 /* Skip the initial dummy symbol. */
809ffe0d 5273 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5274
5275 if (csect == (symbolS *) NULL)
5276 {
5277 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5278 a->x_csect.x_scnlen.l = 0;
5279 }
5280 else
5281 {
809ffe0d 5282 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5283 {
6386f3a7 5284 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5285 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5286 > S_GET_VALUE (sym))
252b5132 5287 break;
809ffe0d 5288 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5289 }
5290
809ffe0d
ILT		 5291 a->x_csect.x_scnlen.p =
5292 coffsymbol (symbol_get_bfdsym (csect))->native;
5293 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5294 1;
252b5132
RH		 5295 }
5296 a->x_csect.x_smtyp = XTY_LD;
5297 }
81d4177b 5298
252b5132
RH		 5299 a->x_csect.x_parmhash = 0;
5300 a->x_csect.x_snhash = 0;
809ffe0d 5301 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5302 a->x_csect.x_smclas = XMC_PR;
5303 else
809ffe0d 5304 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5305 a->x_csect.x_stab = 0;
5306 a->x_csect.x_snstab = 0;
5307
5308 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5309 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5310 }
5311 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5312 {
5313 /* We want the value to be the symbol index of the referenced
5314 csect symbol. BFD will do that for us if we set the right
5315 flags. */
b782de16
AM		 5316 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5317 combined_entry_type *c = coffsymbol (bsym)->native;
5318
5319 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5320 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5321 }
5322 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5323 {
5324 symbolS *block;
5325 symbolS *csect;
5326
5327 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5328 block = symbol_get_tc (sym)->within;
5329 csect = symbol_get_tc (block)->within;
6386f3a7 5330 resolve_symbol_value (csect);
252b5132
RH		 5331 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5332 }
5333 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5334 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5335 {
5336 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5337 BFD will do that for us if we set the right flags. We have
5338 already set the value correctly. */
809ffe0d 5339 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5340 }
5341
5342 return 0;
5343}
5344
5345/* Adjust the symbol table. This creates csect symbols for all
5346 absolute symbols. */
5347
5348void
98027b10 5349ppc_adjust_symtab (void)
252b5132
RH		 5350{
5351 symbolS *sym;
5352
5353 if (! ppc_saw_abs)
5354 return;
5355
5356 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5357 {
5358 symbolS *csect;
5359 int i;
5360 union internal_auxent *a;
5361
5362 if (S_GET_SEGMENT (sym) != absolute_section)
5363 continue;
5364
5365 csect = symbol_create (".abs[XO]", absolute_section,
5366 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5367 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5368 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5369 i = S_GET_NUMBER_AUXILIARY (csect);
5370 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5371 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5372 a->x_csect.x_scnlen.l = 0;
5373 a->x_csect.x_smtyp = XTY_SD;
5374 a->x_csect.x_parmhash = 0;
5375 a->x_csect.x_snhash = 0;
5376 a->x_csect.x_smclas = XMC_XO;
5377 a->x_csect.x_stab = 0;
5378 a->x_csect.x_snstab = 0;
5379
5380 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5381
5382 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5383 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5384 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5385 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5386 }
5387
b34976b6 5388 ppc_saw_abs = FALSE;
252b5132
RH		 5389}
5390
5391/* Set the VMA for a section. This is called on all the sections in
5392 turn. */
5393
5394void
98027b10 5395ppc_frob_section (asection *sec)
252b5132 5396{
931e13a6 5397 static bfd_vma vma = 0;
252b5132 5398
931e13a6 5399 vma = md_section_align (sec, vma);
252b5132
RH		 5400 bfd_set_section_vma (stdoutput, sec, vma);
5401 vma += bfd_section_size (stdoutput, sec);
5402}
5403
5404#endif /* OBJ_XCOFF */
5405\f
252b5132 5406char *
98027b10 5407md_atof (int type, char *litp, int *sizep)
252b5132 5408{
499ac353 5409 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5410}
5411
5412/* Write a value out to the object file, using the appropriate
5413 endianness. */
5414
5415void
98027b10 5416md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5417{
5418 if (target_big_endian)
5419 number_to_chars_bigendian (buf, val, n);
5420 else
5421 number_to_chars_littleendian (buf, val, n);
5422}
5423
5424/* Align a section (I don't know why this is machine dependent). */
5425
5426valueT
3aeeedbb 5427md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5428{
3aeeedbb
AM		 5429#ifdef OBJ_ELF
5430 return addr;
5431#else
252b5132
RH		 5432 int align = bfd_get_section_alignment (stdoutput, seg);
5433
5434 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5435#endif
252b5132
RH		 5436}
5437
5438/* We don't have any form of relaxing. */
5439
5440int
98027b10
AM		 5441md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5442 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5443{
5444 abort ();
5445 return 0;
5446}
5447
5448/* Convert a machine dependent frag. We never generate these. */
5449
5450void
98027b10
AM		 5451md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5452 asection *sec ATTRIBUTE_UNUSED,
5453 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5454{
5455 abort ();
5456}
5457
5458/* We have no need to default values of symbols. */
5459
252b5132 5460symbolS *
98027b10 5461md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5462{
5463 return 0;
5464}
5465\f
5466/* Functions concerning relocs. */
5467
5468/* The location from which a PC relative jump should be calculated,
5469 given a PC relative reloc. */
5470
5471long
98027b10 5472md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5473{
5474 return fixp->fx_frag->fr_address + fixp->fx_where;
5475}
5476
5477#ifdef OBJ_XCOFF
5478
5479/* This is called to see whether a fixup should be adjusted to use a
5480 section symbol. We take the opportunity to change a fixup against
5481 a symbol in the TOC subsegment into a reloc against the
5482 corresponding .tc symbol. */
5483
5484int
98027b10 5485ppc_fix_adjustable (fixS *fix)
252b5132 5486{
b782de16
AM		 5487 valueT val = resolve_symbol_value (fix->fx_addsy);
5488 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5489 TC_SYMFIELD_TYPE *tc;
5490
5491 if (symseg == absolute_section)
5492 return 0;
252b5132 5493
252b5132 5494 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5495 && fix->fx_addsy != ppc_toc_csect
b782de16 5496 && symseg == data_section
252b5132
RH		 5497 && val >= ppc_toc_frag->fr_address
5498 && (ppc_after_toc_frag == (fragS *) NULL
5499 || val < ppc_after_toc_frag->fr_address))
5500 {
5501 symbolS *sy;
5502
5503 for (sy = symbol_next (ppc_toc_csect);
5504 sy != (symbolS *) NULL;
5505 sy = symbol_next (sy))
5506 {
b782de16
AM		 5507 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5508
5509 if (sy_tc->class == XMC_TC0)
252b5132 5510 continue;
b782de16 5511 if (sy_tc->class != XMC_TC)
252b5132 5512 break;
b782de16 5513 if (val == resolve_symbol_value (sy))
252b5132
RH		 5514 {
5515 fix->fx_addsy = sy;
5516 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5517 return 0;
5518 }
5519 }
5520
5521 as_bad_where (fix->fx_file, fix->fx_line,
5522 _("symbol in .toc does not match any .tc"));
5523 }
5524
5525 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5526 tc = symbol_get_tc (fix->fx_addsy);
5527 if (tc->subseg == 0
5528 && tc->class != XMC_TC0
5529 && tc->class != XMC_TC
5530 && symseg != bss_section
252b5132 5531 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5532 && (symseg != data_section
252b5132
RH		 5533 || ppc_toc_csect == NULL
5534 || val < ppc_toc_frag->fr_address
5535 || (ppc_after_toc_frag != NULL
5536 && val >= ppc_after_toc_frag->fr_address)))
5537 {
5538 symbolS *csect;
b782de16 5539 symbolS *next_csect;
252b5132 5540
b782de16 5541 if (symseg == text_section)
252b5132 5542 csect = ppc_text_csects;
b782de16 5543 else if (symseg == data_section)
252b5132
RH		 5544 csect = ppc_data_csects;
5545 else
5546 abort ();
5547
5548 /* Skip the initial dummy symbol. */
809ffe0d 5549 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5550
5551 if (csect != (symbolS *) NULL)
5552 {
b782de16
AM		 5553 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5554 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5555 {
5556 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5557 have to look through the full symbol table to see
5558 whether this is the csect we want. Note that we will
5559 only get here if the csect has zero length. */
b782de16
AM		 5560 if (symbol_get_frag (csect)->fr_address == val
5561 && S_GET_VALUE (csect) == val)
252b5132
RH		 5562 {
5563 symbolS *scan;
5564
809ffe0d 5565 for (scan = symbol_next (csect);
252b5132 5566 scan != NULL;
809ffe0d 5567 scan = symbol_next (scan))
252b5132 5568 {
809ffe0d 5569 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5570 break;
5571 if (scan == fix->fx_addsy)
5572 break;
5573 }
5574
5575 /* If we found the symbol before the next csect
99a814a1 5576 symbol, then this is the csect we want. */
252b5132
RH		 5577 if (scan == fix->fx_addsy)
5578 break;
5579 }
5580
b782de16 5581 csect = next_csect;
252b5132
RH		 5582 }
5583
b782de16 5584 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5585 fix->fx_addsy = csect;
5586 }
b782de16 5587 return 0;
252b5132
RH		 5588 }
5589
5590 /* Adjust a reloc against a .lcomm symbol to be against the base
5591 .lcomm. */
b782de16 5592 if (symseg == bss_section
252b5132
RH		 5593 && ! S_IS_EXTERNAL (fix->fx_addsy))
5594 {
b782de16
AM		 5595 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5596
5597 fix->fx_offset += val - resolve_symbol_value (sy);
5598 fix->fx_addsy = sy;
252b5132
RH		 5599 }
5600
5601 return 0;
5602}
5603
5604/* A reloc from one csect to another must be kept. The assembler
5605 will, of course, keep relocs between sections, and it will keep
5606 absolute relocs, but we need to force it to keep PC relative relocs
5607 between two csects in the same section. */
5608
5609int
98027b10 5610ppc_force_relocation (fixS *fix)
252b5132
RH		 5611{
5612 /* At this point fix->fx_addsy should already have been converted to
5613 a csect symbol. If the csect does not include the fragment, then
5614 we need to force the relocation. */
5615 if (fix->fx_pcrel
5616 && fix->fx_addsy != NULL
809ffe0d
ILT		 5617 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5618 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5619 > fix->fx_frag->fr_address)
5620 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5621 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5622 <= fix->fx_frag->fr_address))))
5623 return 1;
5624
ae6063d4 5625 return generic_force_reloc (fix);
252b5132
RH		 5626}
5627
5628#endif /* OBJ_XCOFF */
5629
0baf16f2 5630#ifdef OBJ_ELF
a161fe53
AM		 5631/* If this function returns non-zero, it guarantees that a relocation
5632 will be emitted for a fixup. */
5633
5634int
98027b10 5635ppc_force_relocation (fixS *fix)
a161fe53
AM		 5636{
5637 /* Branch prediction relocations must force a relocation, as must
5638 the vtable description relocs. */
5639 switch (fix->fx_r_type)
5640 {
5641 case BFD_RELOC_PPC_B16_BRTAKEN:
5642 case BFD_RELOC_PPC_B16_BRNTAKEN:
5643 case BFD_RELOC_PPC_BA16_BRTAKEN:
5644 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5645 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5646 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5647 return 1;
5648 default:
5649 break;
5650 }
5651
cdba85ec
AM		 5652 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5653 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5654 return 1;
5655
ae6063d4 5656 return generic_force_reloc (fix);
a161fe53
AM		 5657}
5658
0baf16f2 5659int
98027b10 5660ppc_fix_adjustable (fixS *fix)
252b5132 5661{
0baf16f2
AM		 5662 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5663 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5664 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5665 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5666 && fix->fx_r_type != BFD_RELOC_GPREL16
5667 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5668 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5669 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5670 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5671}
0baf16f2 5672#endif
252b5132 5673
3aeeedbb
AM		 5674/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5675 rs_align_code frag. */
5676
5677void
5678ppc_handle_align (struct frag *fragP)
5679{
5680 valueT count = (fragP->fr_next->fr_address
5681 - (fragP->fr_address + fragP->fr_fix));
5682
5683 if (count != 0 && (count & 3) == 0)
5684 {
5685 char *dest = fragP->fr_literal + fragP->fr_fix;
5686
5687 fragP->fr_var = 4;
5688 md_number_to_chars (dest, 0x60000000, 4);
5689
5690 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5691 {
5692 /* For power6, we want the last nop to be a group terminating
5693 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5694 immediately after this one, with its address set to the last
5695 nop location. This will automatically reduce the number of
5696 nops in the current frag by one. */
5697 if (count > 4)
5698 {
5699 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5700
5701 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5702 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5703 group_nop->fr_fix = 0;
5704 group_nop->fr_offset = 1;
5705 group_nop->fr_type = rs_fill;
5706 fragP->fr_next = group_nop;
5707 dest = group_nop->fr_literal;
5708 }
5709
5710 md_number_to_chars (dest, 0x60210000, 4);
5711 }
5712 }
5713}
5714
252b5132
RH		 5715/* Apply a fixup to the object code. This is called for all the
5716 fixups we generated by the call to fix_new_exp, above. In the call
5717 above we used a reloc code which was the largest legal reloc code
5718 plus the operand index. Here we undo that to recover the operand
5719 index. At this point all symbol values should be fully resolved,
5720 and we attempt to completely resolve the reloc. If we can not do
5721 that, we determine the correct reloc code and put it back in the
5722 fixup. */
5723
94f592af 5724void
98027b10 5725md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5726{
94f592af 5727 valueT value = * valP;
252b5132
RH		 5728
5729#ifdef OBJ_ELF
94f592af 5730 if (fixP->fx_addsy != NULL)
252b5132 5731 {
a161fe53 5732 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5733 if (fixP->fx_pcrel)
5734 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5735 }
5736 else
94f592af 5737 fixP->fx_done = 1;
252b5132 5738#else
a161fe53 5739 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5740 the symbol values. If we are doing this relocation the code in
5741 write.c is going to call bfd_install_relocation, which is also
5742 going to use the symbol value. That means that if the reloc is
5743 fully resolved we want to use *valP since bfd_install_relocation is
5744 not being used.
9f0eb232
RS		 5745 However, if the reloc is not fully resolved we do not want to
5746 use *valP, and must use fx_offset instead. If the relocation
5747 is PC-relative, we then need to re-apply md_pcrel_from_section
5748 to this new relocation value. */
94f592af
NC		 5749 if (fixP->fx_addsy == (symbolS *) NULL)
5750 fixP->fx_done = 1;
5751
252b5132 5752 else
9f0eb232
RS		 5753 {
5754 value = fixP->fx_offset;
5755 if (fixP->fx_pcrel)
5756 value -= md_pcrel_from_section (fixP, seg);
5757 }
a161fe53
AM		 5758#endif
5759
5760 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5761 {
a161fe53
AM		 5762 /* We can't actually support subtracting a symbol. */
5763 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5764 }
252b5132 5765
94f592af 5766 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5767 {
5768 int opindex;
5769 const struct powerpc_operand *operand;
5770 char *where;
5771 unsigned long insn;
5772
94f592af 5773 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5774
5775 operand = &powerpc_operands[opindex];
5776
5777#ifdef OBJ_XCOFF
0baf16f2
AM		 5778 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5779 does not generate a reloc. It uses the offset of `sym' within its
5780 csect. Other usages, such as `.long sym', generate relocs. This
5781 is the documented behaviour of non-TOC symbols. */
252b5132 5782 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5783 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5784 && operand->shift == 0
2b3c4602 5785 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5786 && fixP->fx_addsy != NULL
5787 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5788 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5789 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5790 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5791 {
94f592af
NC		 5792 value = fixP->fx_offset;
5793 fixP->fx_done = 1;
252b5132
RH		 5794 }
5795#endif
5796
5797 /* Fetch the instruction, insert the fully resolved operand
5798 value, and stuff the instruction back again. */
94f592af 5799 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5800 if (target_big_endian)
5801 insn = bfd_getb32 ((unsigned char *) where);
5802 else
5803 insn = bfd_getl32 ((unsigned char *) where);
5804 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5805 fixP->tc_fix_data.ppc_cpu,
94f592af 5806 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5807 if (target_big_endian)
5808 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5809 else
5810 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5811
94f592af
NC		 5812 if (fixP->fx_done)
5813 /* Nothing else to do here. */
5814 return;
252b5132 5815
94f592af 5816 assert (fixP->fx_addsy != NULL);
0baf16f2 5817
252b5132
RH		 5818 /* Determine a BFD reloc value based on the operand information.
5819 We are only prepared to turn a few of the operands into
0baf16f2 5820 relocs. */
11b37b7b 5821 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5822 && operand->bitm == 0x3fffffc
11b37b7b 5823 && operand->shift == 0)
94f592af 5824 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5825 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5826 && operand->bitm == 0xfffc
11b37b7b 5827 && operand->shift == 0)
95210096
AM		 5828 {
5829 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5830#ifdef OBJ_XCOFF
5831 fixP->fx_size = 2;
5832 if (target_big_endian)
5833 fixP->fx_where += 2;
5834#endif
5835 }
11b37b7b 5836 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5837 && operand->bitm == 0x3fffffc
11b37b7b 5838 && operand->shift == 0)
94f592af 5839 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5840 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5841 && operand->bitm == 0xfffc
11b37b7b 5842 && operand->shift == 0)
95210096
AM		 5843 {
5844 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5845#ifdef OBJ_XCOFF
5846 fixP->fx_size = 2;
5847 if (target_big_endian)
5848 fixP->fx_where += 2;
5849#endif
5850 }
0baf16f2 5851#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5852 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5853 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5854 && operand->shift == 0)
11b37b7b 5855 {
a7fc733f
AM		 5856 if (ppc_is_toc_sym (fixP->fx_addsy))
5857 {
5858 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5859#ifdef OBJ_ELF
a7fc733f
AM		 5860 if (ppc_obj64
5861 && (operand->flags & PPC_OPERAND_DS) != 0)
5862 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5863#endif
5864 }
5865 else
5866 {
5867 fixP->fx_r_type = BFD_RELOC_16;
5868#ifdef OBJ_ELF
5869 if (ppc_obj64
5870 && (operand->flags & PPC_OPERAND_DS) != 0)
5871 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5872#endif
a7fc733f 5873 }
94f592af 5874 fixP->fx_size = 2;
11b37b7b 5875 if (target_big_endian)
94f592af 5876 fixP->fx_where += 2;
11b37b7b 5877 }
0baf16f2 5878#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5879 else
252b5132
RH		 5880 {
5881 char *sfile;
5882 unsigned int sline;
5883
5884 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5885 symbol. */
94f592af
NC		 5886 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5887 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5888 _("unresolved expression that must be resolved"));
5889 else
94f592af 5890 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5891 _("unsupported relocation against %s"),
94f592af
NC		 5892 S_GET_NAME (fixP->fx_addsy));
5893 fixP->fx_done = 1;
5894 return;
252b5132
RH		 5895 }
5896 }
5897 else
5898 {
5899#ifdef OBJ_ELF
94f592af 5900 ppc_elf_validate_fix (fixP, seg);
252b5132 5901#endif
94f592af 5902 switch (fixP->fx_r_type)
252b5132 5903 {
252b5132 5904 case BFD_RELOC_CTOR:
2b3c4602 5905 if (ppc_obj64)
9c7977b3
AM		 5906 goto ctor64;
5907 /* fall through */
5908
0baf16f2 5909 case BFD_RELOC_32:
94f592af
NC		 5910 if (fixP->fx_pcrel)
5911 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5912 /* fall through */
252b5132
RH		 5913
5914 case BFD_RELOC_RVA:
5915 case BFD_RELOC_32_PCREL:
252b5132 5916 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5917 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5918 value, 4);
5919 break;
5920
7f6d05e8 5921 case BFD_RELOC_64:
9c7977b3 5922 ctor64:
94f592af
NC		 5923 if (fixP->fx_pcrel)
5924 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5925 /* fall through */
0baf16f2 5926
7f6d05e8 5927 case BFD_RELOC_64_PCREL:
94f592af 5928 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5929 value, 8);
81d4177b 5930 break;
0baf16f2 5931
252b5132
RH		 5932 case BFD_RELOC_GPREL16:
5933 case BFD_RELOC_16_GOT_PCREL:
5934 case BFD_RELOC_16_GOTOFF:
5935 case BFD_RELOC_LO16_GOTOFF:
5936 case BFD_RELOC_HI16_GOTOFF:
5937 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5938 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5939 case BFD_RELOC_LO16_BASEREL:
5940 case BFD_RELOC_HI16_BASEREL:
5941 case BFD_RELOC_HI16_S_BASEREL:
5942 case BFD_RELOC_PPC_EMB_NADDR16:
5943 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5944 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5945 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5946 case BFD_RELOC_PPC_EMB_SDAI16:
5947 case BFD_RELOC_PPC_EMB_SDA2REL:
5948 case BFD_RELOC_PPC_EMB_SDA2I16:
5949 case BFD_RELOC_PPC_EMB_RELSEC16:
5950 case BFD_RELOC_PPC_EMB_RELST_LO:
5951 case BFD_RELOC_PPC_EMB_RELST_HI:
5952 case BFD_RELOC_PPC_EMB_RELST_HA:
5953 case BFD_RELOC_PPC_EMB_RELSDA:
5954 case BFD_RELOC_PPC_TOC16:
0baf16f2 5955#ifdef OBJ_ELF
0baf16f2
AM		 5956 case BFD_RELOC_PPC64_TOC16_LO:
5957 case BFD_RELOC_PPC64_TOC16_HI:
5958 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5959#endif
94f592af 5960 if (fixP->fx_pcrel)
252b5132 5961 {
94f592af
NC		 5962 if (fixP->fx_addsy != NULL)
5963 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5964 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5965 bfd_get_reloc_code_name (fixP->fx_r_type),
5966 S_GET_NAME (fixP->fx_addsy));
252b5132 5967 else
94f592af 5968 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5969 _("cannot emit PC relative %s relocation"),
94f592af 5970 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5971 }
5972
94f592af 5973 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5974 value, 2);
5975 break;
5976
3c9d25f4
AM		 5977 case BFD_RELOC_16:
5978 if (fixP->fx_pcrel)
5979 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5980 /* fall through */
5981
5982 case BFD_RELOC_16_PCREL:
5983 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5984 value, 2);
5985 break;
5986
5987 case BFD_RELOC_LO16:
5988 if (fixP->fx_pcrel)
5989 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5990 /* fall through */
5991
5992 case BFD_RELOC_LO16_PCREL:
5993 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5994 value, 2);
5995 break;
5996
252b5132
RH		 5997 /* This case happens when you write, for example,
5998 lis %r3,(L1-L2)@ha
5999 where L1 and L2 are defined later. */
6000 case BFD_RELOC_HI16:
94f592af 6001 if (fixP->fx_pcrel)
3c9d25f4
AM		 6002 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6003 /* fall through */
6004
6005 case BFD_RELOC_HI16_PCREL:
94f592af 6006 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6007 PPC_HI (value), 2);
252b5132 6008 break;
0baf16f2 6009
252b5132 6010 case BFD_RELOC_HI16_S:
94f592af 6011 if (fixP->fx_pcrel)
3c9d25f4
AM		 6012 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6013 /* fall through */
6014
6015 case BFD_RELOC_HI16_S_PCREL:
94f592af 6016 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6017 PPC_HA (value), 2);
6018 break;
6019
6020#ifdef OBJ_ELF
0baf16f2 6021 case BFD_RELOC_PPC64_HIGHER:
94f592af 6022 if (fixP->fx_pcrel)
0baf16f2 6023 abort ();
94f592af 6024 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6025 PPC_HIGHER (value), 2);
252b5132
RH		 6026 break;
6027
0baf16f2 6028 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6029 if (fixP->fx_pcrel)
0baf16f2 6030 abort ();
94f592af 6031 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6032 PPC_HIGHERA (value), 2);
6033 break;
6034
6035 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6036 if (fixP->fx_pcrel)
0baf16f2 6037 abort ();
94f592af 6038 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6039 PPC_HIGHEST (value), 2);
6040 break;
6041
6042 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6043 if (fixP->fx_pcrel)
0baf16f2 6044 abort ();
94f592af 6045 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6046 PPC_HIGHESTA (value), 2);
6047 break;
6048
6049 case BFD_RELOC_PPC64_ADDR16_DS:
6050 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6051 case BFD_RELOC_PPC64_GOT16_DS:
6052 case BFD_RELOC_PPC64_GOT16_LO_DS:
6053 case BFD_RELOC_PPC64_PLT16_LO_DS:
6054 case BFD_RELOC_PPC64_SECTOFF_DS:
6055 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6056 case BFD_RELOC_PPC64_TOC16_DS:
6057 case BFD_RELOC_PPC64_TOC16_LO_DS:
6058 case BFD_RELOC_PPC64_PLTGOT16_DS:
6059 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6060 if (fixP->fx_pcrel)
0baf16f2
AM		 6061 abort ();
6062 {
2132e3a3 6063 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6064 unsigned long val, mask;
0baf16f2
AM		 6065
6066 if (target_big_endian)
adadcc0c 6067 val = bfd_getb32 (where - 2);
0baf16f2 6068 else
adadcc0c
AM		 6069 val = bfd_getl32 (where);
6070 mask = 0xfffc;
6071 /* lq insns reserve the four lsbs. */
6072 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6073 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6074 mask = 0xfff0;
6075 val |= value & mask;
0baf16f2
AM		 6076 if (target_big_endian)
6077 bfd_putb16 ((bfd_vma) val, where);
6078 else
6079 bfd_putl16 ((bfd_vma) val, where);
6080 }
6081 break;
cdba85ec 6082
ba0b2174
AM		 6083 case BFD_RELOC_PPC_B16_BRTAKEN:
6084 case BFD_RELOC_PPC_B16_BRNTAKEN:
6085 case BFD_RELOC_PPC_BA16_BRTAKEN:
6086 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6087 break;
6088
cdba85ec 6089 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6090 case BFD_RELOC_PPC_TLSGD:
6091 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6092 break;
6093
cdba85ec
AM		 6094 case BFD_RELOC_PPC_DTPMOD:
6095 case BFD_RELOC_PPC_TPREL16:
6096 case BFD_RELOC_PPC_TPREL16_LO:
6097 case BFD_RELOC_PPC_TPREL16_HI:
6098 case BFD_RELOC_PPC_TPREL16_HA:
6099 case BFD_RELOC_PPC_TPREL:
6100 case BFD_RELOC_PPC_DTPREL16:
6101 case BFD_RELOC_PPC_DTPREL16_LO:
6102 case BFD_RELOC_PPC_DTPREL16_HI:
6103 case BFD_RELOC_PPC_DTPREL16_HA:
6104 case BFD_RELOC_PPC_DTPREL:
6105 case BFD_RELOC_PPC_GOT_TLSGD16:
6106 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6107 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6108 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6109 case BFD_RELOC_PPC_GOT_TLSLD16:
6110 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6111 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6112 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6113 case BFD_RELOC_PPC_GOT_TPREL16:
6114 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6115 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6116 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6117 case BFD_RELOC_PPC_GOT_DTPREL16:
6118 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6119 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6120 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6121 case BFD_RELOC_PPC64_TPREL16_DS:
6122 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6123 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6124 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6125 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6126 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6127 case BFD_RELOC_PPC64_DTPREL16_DS:
6128 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6129 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6130 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6131 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6132 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6133 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6134 break;
0baf16f2 6135#endif
252b5132 6136 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6137 bytes, rather than 2, so offset it here appropriately. */
252b5132 6138 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6139 if (fixP->fx_pcrel)
252b5132
RH		 6140 abort ();
6141
94f592af 6142 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6143 + ((target_big_endian) ? 2 : 0),
6144 value, 2);
6145 break;
6146
6147 case BFD_RELOC_8:
94f592af 6148 if (fixP->fx_pcrel)
31a91399
NC		 6149 {
6150 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6151 ".byte <undefined_symbol> - ." */
31a91399
NC		 6152 if (fixP->fx_addsy)
6153 as_bad (_("Unable to handle reference to symbol %s"),
6154 S_GET_NAME (fixP->fx_addsy));
6155 else
6156 as_bad (_("Unable to resolve expression"));
6157 fixP->fx_done = 1;
6158 }
6159 else
6160 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6161 value, 1);
252b5132
RH		 6162 break;
6163
6164 case BFD_RELOC_24_PLT_PCREL:
6165 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6166 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6167 abort ();
6168
94f592af 6169 if (fixP->fx_done)
99a814a1
AM		 6170 {
6171 char *where;
6172 unsigned long insn;
6173
6174 /* Fetch the instruction, insert the fully resolved operand
6175 value, and stuff the instruction back again. */
94f592af 6176 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6177 if (target_big_endian)
6178 insn = bfd_getb32 ((unsigned char *) where);
6179 else
6180 insn = bfd_getl32 ((unsigned char *) where);
6181 if ((value & 3) != 0)
94f592af 6182 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6183 _("must branch to an address a multiple of 4"));
6184 if ((offsetT) value < -0x40000000
6185 || (offsetT) value >= 0x40000000)
94f592af 6186 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6187 _("@local or @plt branch destination is too far away, %ld bytes"),
6188 (long) value);
6189 insn = insn | (value & 0x03fffffc);
6190 if (target_big_endian)
6191 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6192 else
6193 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6194 }
252b5132
RH		 6195 break;
6196
6197 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6198 fixP->fx_done = 0;
6199 if (fixP->fx_addsy
6200 && !S_IS_DEFINED (fixP->fx_addsy)
6201 && !S_IS_WEAK (fixP->fx_addsy))
6202 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6203 break;
6204
6205 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6206 fixP->fx_done = 0;
252b5132
RH		 6207 break;
6208
0baf16f2 6209#ifdef OBJ_ELF
0baf16f2
AM		 6210 /* Generated by reference to `sym@tocbase'. The sym is
6211 ignored by the linker. */
6212 case BFD_RELOC_PPC64_TOC:
94f592af 6213 fixP->fx_done = 0;
0baf16f2 6214 break;
0baf16f2 6215#endif
252b5132 6216 default:
bc805888 6217 fprintf (stderr,
94f592af 6218 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6219 fflush (stderr);
252b5132
RH		 6220 abort ();
6221 }
6222 }
6223
6224#ifdef OBJ_ELF
94f592af 6225 fixP->fx_addnumber = value;
4e6935a6
AM		 6226
6227 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6228 from the section contents. If we are going to be emitting a reloc
6229 then the section contents are immaterial, so don't warn if they
6230 happen to overflow. Leave such warnings to ld. */
6231 if (!fixP->fx_done)
6232 fixP->fx_no_overflow = 1;
252b5132 6233#else
94f592af
NC		 6234 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6235 fixP->fx_addnumber = 0;
252b5132
RH		 6236 else
6237 {
6238#ifdef TE_PE
94f592af 6239 fixP->fx_addnumber = 0;
252b5132 6240#else
8edcbfcd
TG		 6241 /* We want to use the offset within the toc, not the actual VMA
6242 of the symbol. */
94f592af 6243 fixP->fx_addnumber =
8edcbfcd
TG		 6244 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6245 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6246#endif
6247 }
6248#endif
252b5132
RH		 6249}
6250
6251/* Generate a reloc for a fixup. */
6252
6253arelent *
98027b10 6254tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6255{
6256 arelent *reloc;
6257
6258 reloc = (arelent *) xmalloc (sizeof (arelent));
6259
49309057
ILT		 6260 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6261 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6262 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6263 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6264 if (reloc->howto == (reloc_howto_type *) NULL)
6265 {
6266 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6267 _("reloc %d not supported by object file format"),
6268 (int) fixp->fx_r_type);
252b5132
RH		 6269 return NULL;
6270 }
6271 reloc->addend = fixp->fx_addnumber;
6272
6273 return reloc;
6274}
75e21f08
JJ		 6275
6276void
98027b10 6277ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6278{
6279 cfi_add_CFA_def_cfa (1, 0);
6280}
6281
6282int
1df69f4f 6283tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6284{
6285 unsigned int regnum = -1;
6286 unsigned int i;
6287 const char *p;
6288 char *q;
6289 static struct { char *name; int dw2regnum; } regnames[] =
6290 {
6291 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6292 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6293 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6294 { "spe_acc", 111 }, { "spefscr", 112 }
6295 };
6296
6297 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6298 if (strcmp (regnames[i].name, regname) == 0)
6299 return regnames[i].dw2regnum;
6300
6301 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6302 {
6303 p = regname + 1 + (regname[1] == '.');
6304 regnum = strtoul (p, &q, 10);
6305 if (p == q || *q || regnum >= 32)
6306 return -1;
6307 if (regname[0] == 'f')
b7d7dc63 6308 regnum += 32;
75e21f08 6309 else if (regname[0] == 'v')
b7d7dc63 6310 regnum += 77;
75e21f08
JJ		 6311 }
6312 else if (regname[0] == 'c' && regname[1] == 'r')
6313 {
6314 p = regname + 2 + (regname[2] == '.');
6315 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6316 return -1;
75e21f08
JJ		 6317 regnum = p[0] - '0' + 68;
6318 }
6319 return regnum;
6320}
GDB Binutils - Deliverables
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