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* configure.tgt (*-*-vxworks): Match vxworks* instead.
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2132e3a3 3 2004, 2005 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132
RH		 22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 53#endif
54#endif
55
0baf16f2
AM		 56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM		 99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH		 101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
931e13a6 114static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH		 115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
5ce8663f 185
b7d7dc63 186/* '+' and '-' can be used as postfix predicate predictors for conditional
5ce8663f
NC		 187 branches. So they need to be accepted as symbol characters. */
188const char ppc_symbol_chars[] = "+-";
75e21f08
JJ		 189
190/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
191int ppc_cie_data_alignment;
252b5132
RH		 192\f
193/* The target specific pseudo-ops which we support. */
194
195const pseudo_typeS md_pseudo_table[] =
196{
197 /* Pseudo-ops which must be overridden. */
198 { "byte", ppc_byte, 0 },
199
200#ifdef OBJ_XCOFF
201 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
202 legitimately belong in the obj-*.c file. However, XCOFF is based
203 on COFF, and is only implemented for the RS/6000. We just use
204 obj-coff.c, and add what we need here. */
205 { "comm", ppc_comm, 0 },
206 { "lcomm", ppc_comm, 1 },
207 { "bb", ppc_bb, 0 },
208 { "bc", ppc_bc, 0 },
209 { "bf", ppc_bf, 0 },
210 { "bi", ppc_biei, 0 },
211 { "bs", ppc_bs, 0 },
212 { "csect", ppc_csect, 0 },
213 { "data", ppc_section, 'd' },
214 { "eb", ppc_eb, 0 },
215 { "ec", ppc_ec, 0 },
216 { "ef", ppc_ef, 0 },
217 { "ei", ppc_biei, 1 },
218 { "es", ppc_es, 0 },
219 { "extern", ppc_extern, 0 },
220 { "function", ppc_function, 0 },
221 { "lglobl", ppc_lglobl, 0 },
222 { "rename", ppc_rename, 0 },
223 { "section", ppc_named_section, 0 },
224 { "stabx", ppc_stabx, 0 },
225 { "text", ppc_section, 't' },
226 { "toc", ppc_toc, 0 },
227 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 228 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 229 { "word", ppc_xcoff_cons, 1 },
230 { "short", ppc_xcoff_cons, 1 },
231 { "vbyte", ppc_vbyte, 0 },
232#endif
233
234#ifdef OBJ_ELF
0baf16f2
AM		 235 { "llong", ppc_elf_cons, 8 },
236 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 237 { "long", ppc_elf_cons, 4 },
238 { "word", ppc_elf_cons, 2 },
239 { "short", ppc_elf_cons, 2 },
240 { "rdata", ppc_elf_rdata, 0 },
241 { "rodata", ppc_elf_rdata, 0 },
242 { "lcomm", ppc_elf_lcomm, 0 },
243#endif
244
245#ifdef TE_PE
99a814a1 246 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 247 { "previous", ppc_previous, 0 },
248 { "pdata", ppc_pdata, 0 },
249 { "ydata", ppc_ydata, 0 },
250 { "reldata", ppc_reldata, 0 },
251 { "rdata", ppc_rdata, 0 },
252 { "ualong", ppc_ualong, 0 },
253 { "znop", ppc_znop, 0 },
254 { "comm", ppc_pe_comm, 0 },
255 { "lcomm", ppc_pe_comm, 1 },
256 { "section", ppc_pe_section, 0 },
257 { "function", ppc_pe_function,0 },
258 { "tocd", ppc_pe_tocd, 0 },
259#endif
260
0baf16f2 261#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 262 { "tc", ppc_tc, 0 },
0baf16f2
AM		 263 { "machine", ppc_machine, 0 },
264#endif
252b5132
RH		 265
266 { NULL, NULL, 0 }
267};
268
269\f
99a814a1
AM		 270/* Predefined register names if -mregnames (or default for Windows NT).
271 In general, there are lots of them, in an attempt to be compatible
272 with a number of other Windows NT assemblers. */
252b5132
RH		 273
274/* Structure to hold information about predefined registers. */
275struct pd_reg
276 {
277 char *name;
278 int value;
279 };
280
281/* List of registers that are pre-defined:
282
283 Each general register has predefined names of the form:
284 1. r<reg_num> which has the value <reg_num>.
285 2. r.<reg_num> which has the value <reg_num>.
286
252b5132
RH		 287 Each floating point register has predefined names of the form:
288 1. f<reg_num> which has the value <reg_num>.
289 2. f.<reg_num> which has the value <reg_num>.
290
7a899fff
C		 291 Each vector unit register has predefined names of the form:
292 1. v<reg_num> which has the value <reg_num>.
293 2. v.<reg_num> which has the value <reg_num>.
294
252b5132
RH		 295 Each condition register has predefined names of the form:
296 1. cr<reg_num> which has the value <reg_num>.
297 2. cr.<reg_num> which has the value <reg_num>.
298
299 There are individual registers as well:
300 sp or r.sp has the value 1
301 rtoc or r.toc has the value 2
302 fpscr has the value 0
303 xer has the value 1
304 lr has the value 8
305 ctr has the value 9
306 pmr has the value 0
307 dar has the value 19
308 dsisr has the value 18
309 dec has the value 22
310 sdr1 has the value 25
311 srr0 has the value 26
312 srr1 has the value 27
313
81d4177b 314 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 315
316static const struct pd_reg pre_defined_registers[] =
317{
318 { "cr.0", 0 }, /* Condition Registers */
319 { "cr.1", 1 },
320 { "cr.2", 2 },
321 { "cr.3", 3 },
322 { "cr.4", 4 },
323 { "cr.5", 5 },
324 { "cr.6", 6 },
325 { "cr.7", 7 },
326
327 { "cr0", 0 },
328 { "cr1", 1 },
329 { "cr2", 2 },
330 { "cr3", 3 },
331 { "cr4", 4 },
332 { "cr5", 5 },
333 { "cr6", 6 },
334 { "cr7", 7 },
335
336 { "ctr", 9 },
337
338 { "dar", 19 }, /* Data Access Register */
339 { "dec", 22 }, /* Decrementer */
340 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
341
342 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 343 { "f.1", 1 },
344 { "f.10", 10 },
345 { "f.11", 11 },
346 { "f.12", 12 },
347 { "f.13", 13 },
348 { "f.14", 14 },
349 { "f.15", 15 },
350 { "f.16", 16 },
351 { "f.17", 17 },
352 { "f.18", 18 },
353 { "f.19", 19 },
354 { "f.2", 2 },
355 { "f.20", 20 },
356 { "f.21", 21 },
357 { "f.22", 22 },
358 { "f.23", 23 },
359 { "f.24", 24 },
360 { "f.25", 25 },
361 { "f.26", 26 },
362 { "f.27", 27 },
363 { "f.28", 28 },
364 { "f.29", 29 },
365 { "f.3", 3 },
252b5132
RH		 366 { "f.30", 30 },
367 { "f.31", 31 },
81d4177b
KH		 368 { "f.4", 4 },
369 { "f.5", 5 },
370 { "f.6", 6 },
371 { "f.7", 7 },
372 { "f.8", 8 },
373 { "f.9", 9 },
374
375 { "f0", 0 },
376 { "f1", 1 },
377 { "f10", 10 },
378 { "f11", 11 },
379 { "f12", 12 },
380 { "f13", 13 },
381 { "f14", 14 },
382 { "f15", 15 },
383 { "f16", 16 },
384 { "f17", 17 },
385 { "f18", 18 },
386 { "f19", 19 },
387 { "f2", 2 },
388 { "f20", 20 },
389 { "f21", 21 },
390 { "f22", 22 },
391 { "f23", 23 },
392 { "f24", 24 },
393 { "f25", 25 },
394 { "f26", 26 },
395 { "f27", 27 },
396 { "f28", 28 },
397 { "f29", 29 },
398 { "f3", 3 },
252b5132
RH		 399 { "f30", 30 },
400 { "f31", 31 },
81d4177b
KH		 401 { "f4", 4 },
402 { "f5", 5 },
403 { "f6", 6 },
404 { "f7", 7 },
405 { "f8", 8 },
406 { "f9", 9 },
252b5132
RH		 407
408 { "fpscr", 0 },
409
410 { "lr", 8 }, /* Link Register */
411
412 { "pmr", 0 },
413
414 { "r.0", 0 }, /* General Purpose Registers */
415 { "r.1", 1 },
416 { "r.10", 10 },
417 { "r.11", 11 },
418 { "r.12", 12 },
419 { "r.13", 13 },
420 { "r.14", 14 },
421 { "r.15", 15 },
422 { "r.16", 16 },
423 { "r.17", 17 },
424 { "r.18", 18 },
425 { "r.19", 19 },
426 { "r.2", 2 },
427 { "r.20", 20 },
428 { "r.21", 21 },
429 { "r.22", 22 },
430 { "r.23", 23 },
431 { "r.24", 24 },
432 { "r.25", 25 },
433 { "r.26", 26 },
434 { "r.27", 27 },
435 { "r.28", 28 },
436 { "r.29", 29 },
437 { "r.3", 3 },
438 { "r.30", 30 },
439 { "r.31", 31 },
440 { "r.4", 4 },
441 { "r.5", 5 },
442 { "r.6", 6 },
443 { "r.7", 7 },
444 { "r.8", 8 },
445 { "r.9", 9 },
446
447 { "r.sp", 1 }, /* Stack Pointer */
448
449 { "r.toc", 2 }, /* Pointer to the table of contents */
450
451 { "r0", 0 }, /* More general purpose registers */
452 { "r1", 1 },
453 { "r10", 10 },
454 { "r11", 11 },
455 { "r12", 12 },
456 { "r13", 13 },
457 { "r14", 14 },
458 { "r15", 15 },
459 { "r16", 16 },
460 { "r17", 17 },
461 { "r18", 18 },
462 { "r19", 19 },
463 { "r2", 2 },
464 { "r20", 20 },
465 { "r21", 21 },
466 { "r22", 22 },
467 { "r23", 23 },
468 { "r24", 24 },
469 { "r25", 25 },
470 { "r26", 26 },
471 { "r27", 27 },
472 { "r28", 28 },
473 { "r29", 29 },
474 { "r3", 3 },
475 { "r30", 30 },
476 { "r31", 31 },
477 { "r4", 4 },
478 { "r5", 5 },
479 { "r6", 6 },
480 { "r7", 7 },
481 { "r8", 8 },
482 { "r9", 9 },
483
484 { "rtoc", 2 }, /* Table of contents */
485
486 { "sdr1", 25 }, /* Storage Description Register 1 */
487
488 { "sp", 1 },
489
490 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
491 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 492
7a899fff 493 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 494 { "v.1", 1 },
495 { "v.10", 10 },
496 { "v.11", 11 },
497 { "v.12", 12 },
498 { "v.13", 13 },
499 { "v.14", 14 },
500 { "v.15", 15 },
501 { "v.16", 16 },
502 { "v.17", 17 },
503 { "v.18", 18 },
504 { "v.19", 19 },
505 { "v.2", 2 },
506 { "v.20", 20 },
507 { "v.21", 21 },
508 { "v.22", 22 },
509 { "v.23", 23 },
510 { "v.24", 24 },
511 { "v.25", 25 },
512 { "v.26", 26 },
513 { "v.27", 27 },
514 { "v.28", 28 },
515 { "v.29", 29 },
516 { "v.3", 3 },
7a899fff
C		 517 { "v.30", 30 },
518 { "v.31", 31 },
81d4177b
KH		 519 { "v.4", 4 },
520 { "v.5", 5 },
521 { "v.6", 6 },
522 { "v.7", 7 },
523 { "v.8", 8 },
524 { "v.9", 9 },
7a899fff
C		 525
526 { "v0", 0 },
81d4177b
KH		 527 { "v1", 1 },
528 { "v10", 10 },
529 { "v11", 11 },
530 { "v12", 12 },
531 { "v13", 13 },
532 { "v14", 14 },
533 { "v15", 15 },
534 { "v16", 16 },
535 { "v17", 17 },
536 { "v18", 18 },
537 { "v19", 19 },
538 { "v2", 2 },
539 { "v20", 20 },
540 { "v21", 21 },
541 { "v22", 22 },
542 { "v23", 23 },
543 { "v24", 24 },
544 { "v25", 25 },
545 { "v26", 26 },
546 { "v27", 27 },
547 { "v28", 28 },
548 { "v29", 29 },
549 { "v3", 3 },
7a899fff
C		 550 { "v30", 30 },
551 { "v31", 31 },
81d4177b
KH		 552 { "v4", 4 },
553 { "v5", 5 },
554 { "v6", 6 },
555 { "v7", 7 },
556 { "v8", 8 },
7a899fff 557 { "v9", 9 },
252b5132
RH		 558
559 { "xer", 1 },
560
561};
562
bc805888 563#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 564
565/* Given NAME, find the register number associated with that name, return
566 the integer value associated with the given name or -1 on failure. */
567
568static int reg_name_search
569 PARAMS ((const struct pd_reg *, int, const char * name));
570
571static int
572reg_name_search (regs, regcount, name)
573 const struct pd_reg *regs;
574 int regcount;
575 const char *name;
576{
577 int middle, low, high;
578 int cmp;
579
580 low = 0;
581 high = regcount - 1;
582
583 do
584 {
585 middle = (low + high) / 2;
586 cmp = strcasecmp (name, regs[middle].name);
587 if (cmp < 0)
588 high = middle - 1;
589 else if (cmp > 0)
590 low = middle + 1;
591 else
592 return regs[middle].value;
593 }
594 while (low <= high);
595
596 return -1;
597}
598
599/*
99a814a1 600 * Summary of register_name.
252b5132
RH		 601 *
602 * in: Input_line_pointer points to 1st char of operand.
603 *
604 * out: A expressionS.
605 * The operand may have been a register: in this case, X_op == O_register,
606 * X_add_number is set to the register number, and truth is returned.
607 * Input_line_pointer->(next non-blank) char after operand, or is in its
608 * original state.
609 */
610
b34976b6 611static bfd_boolean
252b5132
RH		 612register_name (expressionP)
613 expressionS *expressionP;
614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH		 627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM		 631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH		 636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH		 641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM		 645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH		 649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH		 657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
680ppc_parse_name (name, expr)
681 const char *name;
682 expressionS *expr;
683{
684 int val;
685
686 if (! cr_operand)
687 return 0;
688
689 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
690 name);
691 if (val < 0)
692 return 0;
693
694 expr->X_op = O_constant;
695 expr->X_add_number = val;
696
697 return 1;
698}
699\f
700/* Local variables. */
701
702/* The type of processor we are assembling for. This is one or more
703 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 704static unsigned long ppc_cpu = 0;
252b5132 705
2b3c4602
AM		 706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH		 709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH		 720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH		 727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM		 804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ		 806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH		 818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM		 822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
828 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
829 (RIOS2). */
830 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
831 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
832 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
833 else if (strcmp (arg, "pwr") == 0)
834 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
835 /* -m601 means to assemble for the PowerPC 601, which includes
836 instructions that are holdovers from the Power. */
837 else if (strcmp (arg, "601") == 0)
838 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
839 | PPC_OPCODE_601 | PPC_OPCODE_32);
840 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
841 PowerPC 603/604. */
842 else if (strcmp (arg, "ppc") == 0
843 || strcmp (arg, "ppc32") == 0
844 || strcmp (arg, "603") == 0
845 || strcmp (arg, "604") == 0)
846 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
847 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
848 else if (strcmp (arg, "403") == 0
849 || strcmp (arg, "405") == 0)
850 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
851 | PPC_OPCODE_403 | PPC_OPCODE_32);
852 else if (strcmp (arg, "440") == 0)
853 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
854 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
855 else if (strcmp (arg, "7400") == 0
856 || strcmp (arg, "7410") == 0
857 || strcmp (arg, "7450") == 0
858 || strcmp (arg, "7455") == 0)
859 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
860 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 861 else if (strcmp (arg, "e300") == 0)
862 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
863 | PPC_OPCODE_E300);
69c040df
AM		 864 else if (strcmp (arg, "altivec") == 0)
865 {
866 if (ppc_cpu == 0)
867 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
868 else
869 ppc_cpu |= PPC_OPCODE_ALTIVEC;
870 }
871 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
872 {
873 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
874 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
875 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
876 | PPC_OPCODE_RFMCI);
877 }
878 else if (strcmp (arg, "spe") == 0)
879 {
880 if (ppc_cpu == 0)
881 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
882 else
883 ppc_cpu |= PPC_OPCODE_SPE;
884 }
885 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
886 620. */
887 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
888 {
889 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
890 }
891 else if (strcmp (arg, "ppc64bridge") == 0)
892 {
893 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
894 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
895 }
896 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
897 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
898 {
899 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
900 }
901 /* -mbooke64 means enable 64-bit BookE support. */
902 else if (strcmp (arg, "booke64") == 0)
903 {
904 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
905 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
906 }
907 else if (strcmp (arg, "power4") == 0)
908 {
909 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
910 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
911 }
b0648eec
AM		 912 else if (strcmp (arg, "power5") == 0)
913 {
914 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
915 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
916 | PPC_OPCODE_POWER5);
917 }
69c040df
AM		 918 /* -mcom means assemble for the common intersection between Power
919 and PowerPC. At present, we just allow the union, rather
920 than the intersection. */
921 else if (strcmp (arg, "com") == 0)
922 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
923 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
924 else if (strcmp (arg, "any") == 0)
925 ppc_cpu |= PPC_OPCODE_ANY;
926 else
927 return 0;
928
929 return 1;
930}
931
252b5132
RH		 932int
933md_parse_option (c, arg)
934 int c;
935 char *arg;
936{
937 switch (c)
938 {
939 case 'u':
940 /* -u means that any undefined symbols should be treated as
941 external, which is the default for gas anyhow. */
942 break;
943
944#ifdef OBJ_ELF
945 case 'l':
946 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 947 sake, recognize -be also. */
252b5132
RH		 948 if (strcmp (arg, "e") == 0)
949 {
950 target_big_endian = 0;
951 set_target_endian = 1;
952 }
953 else
954 return 0;
955
956 break;
957
958 case 'b':
959 if (strcmp (arg, "e") == 0)
960 {
961 target_big_endian = 1;
962 set_target_endian = 1;
963 }
964 else
965 return 0;
966
967 break;
968
969 case 'K':
99a814a1 970 /* Recognize -K PIC. */
252b5132
RH		 971 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
972 {
973 shlib = SHLIB_PIC;
974 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
975 }
976 else
977 return 0;
978
979 break;
980#endif
981
7f6d05e8
CP		 982 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
983 case 'a':
984 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 985 {
986#ifdef BFD64
987 ppc_obj64 = 1;
988#else
989 as_fatal (_("%s unsupported"), "-a64");
990#endif
991 }
7f6d05e8 992 else if (strcmp (arg, "32") == 0)
2b3c4602 993 ppc_obj64 = 0;
7f6d05e8
CP		 994 else
995 return 0;
996 break;
81d4177b 997
252b5132 998 case 'm':
69c040df
AM		 999 if (parse_cpu (arg))
1000 ;
252b5132
RH		 1001
1002 else if (strcmp (arg, "regnames") == 0)
b34976b6 1003 reg_names_p = TRUE;
252b5132
RH		 1004
1005 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1006 reg_names_p = FALSE;
252b5132
RH		 1007
1008#ifdef OBJ_ELF
99a814a1
AM		 1009 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1010 that require relocation. */
252b5132
RH		 1011 else if (strcmp (arg, "relocatable") == 0)
1012 {
5d6f4f16 1013 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1014 ppc_flags |= EF_PPC_RELOCATABLE;
1015 }
1016
1017 else if (strcmp (arg, "relocatable-lib") == 0)
1018 {
5d6f4f16 1019 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1020 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1021 }
1022
99a814a1 1023 /* -memb, set embedded bit. */
252b5132
RH		 1024 else if (strcmp (arg, "emb") == 0)
1025 ppc_flags |= EF_PPC_EMB;
1026
99a814a1
AM		 1027 /* -mlittle/-mbig set the endianess. */
1028 else if (strcmp (arg, "little") == 0
1029 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1030 {
1031 target_big_endian = 0;
1032 set_target_endian = 1;
1033 }
1034
1035 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1036 {
1037 target_big_endian = 1;
1038 set_target_endian = 1;
1039 }
1040
1041 else if (strcmp (arg, "solaris") == 0)
1042 {
b34976b6 1043 msolaris = TRUE;
252b5132
RH		 1044 ppc_comment_chars = ppc_solaris_comment_chars;
1045 }
1046
1047 else if (strcmp (arg, "no-solaris") == 0)
1048 {
b34976b6 1049 msolaris = FALSE;
252b5132
RH		 1050 ppc_comment_chars = ppc_eabi_comment_chars;
1051 }
1052#endif
1053 else
1054 {
1055 as_bad (_("invalid switch -m%s"), arg);
1056 return 0;
1057 }
1058 break;
1059
1060#ifdef OBJ_ELF
1061 /* -V: SVR4 argument to print version ID. */
1062 case 'V':
1063 print_version_id ();
1064 break;
1065
1066 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1067 should be emitted or not. FIXME: Not implemented. */
1068 case 'Q':
1069 break;
1070
1071 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1072 rather than .stabs.excl, which is ignored by the linker.
1073 FIXME: Not implemented. */
1074 case 's':
1075 if (arg)
1076 return 0;
1077
1078 break;
1079#endif
1080
1081 default:
1082 return 0;
1083 }
1084
1085 return 1;
1086}
1087
1088void
1089md_show_usage (stream)
1090 FILE *stream;
1091{
bc805888 1092 fprintf (stream, _("\
252b5132 1093PowerPC options:\n\
df12615d
AM		 1094-a32 generate ELF32/XCOFF32\n\
1095-a64 generate ELF64/XCOFF64\n\
252b5132 1096-u ignored\n\
23e1d84c
AM		 1097-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1098-mpwr generate code for POWER (RIOS1)\n\
1099-m601 generate code for PowerPC 601\n\
418c1742 1100-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1101 generate code for PowerPC 603/604\n\
df12615d 1102-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1103-m440 generate code for PowerPC 440\n\
f5c120c5 1104-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1105 generate code For PowerPC 7400/7410/7450/7455\n"));
1106 fprintf (stream, _("\
23e1d84c 1107-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1108-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1109-mbooke64 generate code for 64-bit PowerPC BookE\n\
1110-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1111-mpower4 generate code for Power4 architecture\n\
b0648eec 1112-mpower5 generate code for Power5 architecture\n\
252b5132 1113-mcom generate code Power/PowerPC common instructions\n\
df12615d 1114-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1115 fprintf (stream, _("\
df12615d 1116-maltivec generate code for AltiVec\n\
36ae0db3 1117-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1118-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1119-mspe generate code for Motorola SPE instructions\n\
1120-mregnames Allow symbolic names for registers\n\
1121-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1122#ifdef OBJ_ELF
bc805888 1123 fprintf (stream, _("\
252b5132
RH		 1124-mrelocatable support for GCC's -mrelocatble option\n\
1125-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1126-memb set PPC_EMB bit in ELF flags\n\
df12615d 1127-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1128 generate code for a little endian machine\n\
df12615d
AM		 1129-mbig, -mbig-endian, -b, -be\n\
1130 generate code for a big endian machine\n\
252b5132
RH		 1131-msolaris generate code for Solaris\n\
1132-mno-solaris do not generate code for Solaris\n\
1133-V print assembler version number\n\
1134-Qy, -Qn ignored\n"));
1135#endif
1136}
1137\f
1138/* Set ppc_cpu if it is not already set. */
1139
1140static void
1141ppc_set_cpu ()
1142{
1143 const char *default_os = TARGET_OS;
1144 const char *default_cpu = TARGET_CPU;
1145
3c9030c1 1146 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1147 {
2a98c3a6 1148 if (ppc_obj64)
3c9030c1 1149 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1150 else if (strncmp (default_os, "aix", 3) == 0
1151 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1152 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1153 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1154 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1155 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1156 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1157 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1158 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1159 else
99a814a1
AM		 1160 as_fatal (_("Unknown default cpu = %s, os = %s"),
1161 default_cpu, default_os);
252b5132
RH		 1162 }
1163}
1164
9232bbb0
AM		 1165/* Figure out the BFD architecture to use. This function and ppc_mach
1166 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1167
1168enum bfd_architecture
1169ppc_arch ()
1170{
1171 const char *default_cpu = TARGET_CPU;
1172 ppc_set_cpu ();
1173
1174 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1175 return bfd_arch_powerpc;
1176 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1177 return bfd_arch_rs6000;
1178 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1179 {
1180 if (strcmp (default_cpu, "rs6000") == 0)
1181 return bfd_arch_rs6000;
0baf16f2 1182 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1183 return bfd_arch_powerpc;
1184 }
1185
1186 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1187 return bfd_arch_unknown;
1188}
1189
7f6d05e8
CP		 1190unsigned long
1191ppc_mach ()
1192{
2a98c3a6
AM		 1193 if (ppc_obj64)
1194 return bfd_mach_ppc64;
1195 else if (ppc_arch () == bfd_arch_rs6000)
1196 return bfd_mach_rs6k;
1197 else
1198 return bfd_mach_ppc;
7f6d05e8
CP		 1199}
1200
81d4177b 1201extern char*
99a814a1 1202ppc_target_format ()
7f6d05e8
CP		 1203{
1204#ifdef OBJ_COFF
1205#ifdef TE_PE
99a814a1 1206 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1207#elif TE_POWERMAC
0baf16f2 1208 return "xcoff-powermac";
7f6d05e8 1209#else
eb1e0e80 1210# ifdef TE_AIX5
2b3c4602 1211 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1212# else
2b3c4602 1213 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1214# endif
7f6d05e8 1215#endif
7f6d05e8
CP		 1216#endif
1217#ifdef OBJ_ELF
9d8504b1
PB		 1218# ifdef TE_VXWORKS
1219 return "elf32-powerpc-vxworks";
1220# else
0baf16f2 1221 return (target_big_endian
2b3c4602
AM		 1222 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1223 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1224# endif
7f6d05e8
CP		 1225#endif
1226}
1227
69c040df
AM		 1228/* Insert opcodes and macros into hash tables. Called at startup and
1229 for .cpu pseudo. */
252b5132 1230
69c040df
AM		 1231static void
1232ppc_setup_opcodes (void)
252b5132
RH		 1233{
1234 register const struct powerpc_opcode *op;
1235 const struct powerpc_opcode *op_end;
1236 const struct powerpc_macro *macro;
1237 const struct powerpc_macro *macro_end;
b34976b6 1238 bfd_boolean dup_insn = FALSE;
252b5132 1239
69c040df
AM		 1240 if (ppc_hash != NULL)
1241 hash_die (ppc_hash);
1242 if (ppc_macro_hash != NULL)
1243 hash_die (ppc_macro_hash);
252b5132
RH		 1244
1245 /* Insert the opcodes into a hash table. */
1246 ppc_hash = hash_new ();
1247
1248 op_end = powerpc_opcodes + powerpc_num_opcodes;
1249 for (op = powerpc_opcodes; op < op_end; op++)
1250 {
1251 know ((op->opcode & op->mask) == op->opcode);
1252
2b3c4602 1253 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1254 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1255 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1256 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1257 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1258 /* Certain instructions (eg: extsw) do not exist in the
1259 32-bit BookE instruction set, but they do exist in the
1260 64-bit BookE instruction set, and other PPC instruction
1261 sets. Check to see if the opcode has the BOOKE64 flag set.
1262 If it does make sure that the target CPU is not the BookE32. */
1263 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1264 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1265 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1266 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1267 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1268 == (ppc_cpu & PPC_OPCODE_POWER4)))
1269 && ((op->flags & PPC_OPCODE_POWER5) == 0
1270 || ((op->flags & PPC_OPCODE_POWER5)
1271 == (ppc_cpu & PPC_OPCODE_POWER5))))
252b5132
RH		 1272 {
1273 const char *retval;
1274
1275 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1276 if (retval != NULL)
252b5132 1277 {
99a814a1 1278 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1279 if ((ppc_cpu & PPC_OPCODE_601) != 0
1280 && (op->flags & PPC_OPCODE_POWER) != 0)
1281 continue;
1282
99a814a1
AM		 1283 as_bad (_("Internal assembler error for instruction %s"),
1284 op->name);
b34976b6 1285 dup_insn = TRUE;
252b5132
RH		 1286 }
1287 }
1288 }
1289
3c9030c1
AM		 1290 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1291 for (op = powerpc_opcodes; op < op_end; op++)
1292 hash_insert (ppc_hash, op->name, (PTR) op);
1293
252b5132
RH		 1294 /* Insert the macros into a hash table. */
1295 ppc_macro_hash = hash_new ();
1296
1297 macro_end = powerpc_macros + powerpc_num_macros;
1298 for (macro = powerpc_macros; macro < macro_end; macro++)
1299 {
1300 if ((macro->flags & ppc_cpu) != 0)
1301 {
1302 const char *retval;
1303
1304 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1305 if (retval != (const char *) NULL)
1306 {
1307 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1308 dup_insn = TRUE;
252b5132
RH		 1309 }
1310 }
1311 }
1312
1313 if (dup_insn)
1314 abort ();
69c040df
AM		 1315}
1316
1317/* This function is called when the assembler starts up. It is called
1318 after the options have been parsed and the output file has been
1319 opened. */
1320
1321void
1322md_begin ()
1323{
1324 ppc_set_cpu ();
1325
1326 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1327
1328#ifdef OBJ_ELF
1329 /* Set the ELF flags if desired. */
1330 if (ppc_flags && !msolaris)
1331 bfd_set_private_flags (stdoutput, ppc_flags);
1332#endif
1333
1334 ppc_setup_opcodes ();
252b5132 1335
67c1ffbe 1336 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1337 by the user. */
252b5132
RH		 1338 if (!set_target_endian)
1339 {
1340 set_target_endian = 1;
1341 target_big_endian = PPC_BIG_ENDIAN;
1342 }
1343
1344#ifdef OBJ_XCOFF
1345 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1346
1347 /* Create dummy symbols to serve as initial csects. This forces the
1348 text csects to precede the data csects. These symbols will not
1349 be output. */
1350 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1351 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1352 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1353 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1354#endif
1355
1356#ifdef TE_PE
1357
1358 ppc_current_section = text_section;
81d4177b 1359 ppc_previous_section = 0;
252b5132
RH		 1360
1361#endif
1362}
1363
6a0c61b7
EZ		 1364void
1365ppc_cleanup ()
1366{
dc1d03fc 1367#ifdef OBJ_ELF
6a0c61b7
EZ		 1368 if (ppc_apuinfo_list == NULL)
1369 return;
1370
1371 /* Ok, so write the section info out. We have this layout:
1372
1373 byte data what
1374 ---- ---- ----
1375 0 8 length of "APUinfo\0"
1376 4 (n*4) number of APU's (4 bytes each)
1377 8 2 note type 2
1378 12 "APUinfo\0" name
1379 20 APU#1 first APU's info
1380 24 APU#2 second APU's info
1381 ... ...
1382 */
1383 {
1384 char *p;
1385 asection *seg = now_seg;
1386 subsegT subseg = now_subseg;
1387 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1388 unsigned int i;
6a0c61b7
EZ		 1389
1390 /* Create the .PPC.EMB.apuinfo section. */
1391 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1392 bfd_set_section_flags (stdoutput,
1393 apuinfo_secp,
e1a9cb8e 1394 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1395
1396 p = frag_more (4);
1397 md_number_to_chars (p, (valueT) 8, 4);
1398
1399 p = frag_more (4);
e98d298c 1400 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1401
1402 p = frag_more (4);
1403 md_number_to_chars (p, (valueT) 2, 4);
1404
1405 p = frag_more (8);
1406 strcpy (p, "APUinfo");
1407
1408 for (i = 0; i < ppc_apuinfo_num; i++)
1409 {
b34976b6
AM		 1410 p = frag_more (4);
1411 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1412 }
1413
1414 frag_align (2, 0, 0);
1415
1416 /* We probably can't restore the current segment, for there likely
1417 isn't one yet... */
1418 if (seg && subseg)
1419 subseg_set (seg, subseg);
1420 }
dc1d03fc 1421#endif
6a0c61b7
EZ		 1422}
1423
252b5132
RH		 1424/* Insert an operand value into an instruction. */
1425
1426static unsigned long
1427ppc_insert_operand (insn, operand, val, file, line)
1428 unsigned long insn;
1429 const struct powerpc_operand *operand;
1430 offsetT val;
1431 char *file;
1432 unsigned int line;
1433{
1434 if (operand->bits != 32)
1435 {
1436 long min, max;
1437 offsetT test;
1438
1439 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1440 {
d0e9a01c 1441 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH		 1442 max = (1 << operand->bits) - 1;
1443 else
1444 max = (1 << (operand->bits - 1)) - 1;
1445 min = - (1 << (operand->bits - 1));
1446
2b3c4602 1447 if (!ppc_obj64)
252b5132
RH		 1448 {
1449 /* Some people write 32 bit hex constants with the sign
1450 extension done by hand. This shouldn't really be
1451 valid, but, to permit this code to assemble on a 64
1452 bit host, we sign extend the 32 bit value. */
1453 if (val > 0
92161534
ILT		 1454 && (val & (offsetT) 0x80000000) != 0
1455 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH		 1456 {
1457 val -= 0x80000000;
1458 val -= 0x80000000;
1459 }
1460 }
1461 }
1462 else
1463 {
1464 max = (1 << operand->bits) - 1;
1465 min = 0;
1466 }
1467
1468 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1469 test = - val;
1470 else
1471 test = val;
1472
1473 if (test < (offsetT) min || test > (offsetT) max)
e5976317 1474 as_bad_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
252b5132
RH		 1475 }
1476
1477 if (operand->insert)
1478 {
1479 const char *errmsg;
1480
1481 errmsg = NULL;
2b3c4602 1482 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1483 if (errmsg != (const char *) NULL)
0baf16f2 1484 as_bad_where (file, line, errmsg);
252b5132
RH		 1485 }
1486 else
1487 insn |= (((long) val & ((1 << operand->bits) - 1))
1488 << operand->shift);
1489
1490 return insn;
1491}
1492
1493\f
1494#ifdef OBJ_ELF
1495/* Parse @got, etc. and return the desired relocation. */
1496static bfd_reloc_code_real_type
1497ppc_elf_suffix (str_p, exp_p)
1498 char **str_p;
1499 expressionS *exp_p;
1500{
1501 struct map_bfd {
1502 char *string;
b7d7dc63
AM		 1503 unsigned int length : 8;
1504 unsigned int valid32 : 1;
1505 unsigned int valid64 : 1;
1506 unsigned int reloc;
252b5132
RH		 1507 };
1508
1509 char ident[20];
1510 char *str = *str_p;
1511 char *str2;
1512 int ch;
1513 int len;
15c1449b 1514 const struct map_bfd *ptr;
252b5132 1515
b7d7dc63
AM		 1516#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1517#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1518#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1519
15c1449b 1520 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1521 MAP ("l", BFD_RELOC_LO16),
1522 MAP ("h", BFD_RELOC_HI16),
1523 MAP ("ha", BFD_RELOC_HI16_S),
1524 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1525 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1526 MAP ("got", BFD_RELOC_16_GOTOFF),
1527 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1528 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1529 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1530 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1531 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1532 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1533 MAP ("copy", BFD_RELOC_PPC_COPY),
1534 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1535 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1536 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1537 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1538 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1539 MAP ("tls", BFD_RELOC_PPC_TLS),
1540 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1541 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1542 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1543 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1544 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1545 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1546 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1547 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1548 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1549 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1550 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1551 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1552 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1553 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1554 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1555 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1556 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1557 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1558 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1559 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1560 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1561 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1562 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1563 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1564 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1565 MAP32 ("fixup", BFD_RELOC_CTOR),
1566 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1567 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1568 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1569 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1570 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1571 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1572 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1573 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1574 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1575 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1576 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1577 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1578 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1579 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1580 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1581 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1582 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1583 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1584 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1585 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1586 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1587 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1588 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1589 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1590 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1591 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1592 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1593 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1594 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1595 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1596 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1597 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1598 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1599 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1600 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1601 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1602 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1603 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1604 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1605 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1606 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1607 };
1608
1609 if (*str++ != '@')
1610 return BFD_RELOC_UNUSED;
1611
1612 for (ch = *str, str2 = ident;
1613 (str2 < ident + sizeof (ident) - 1
3882b010 1614 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1615 ch = *++str)
1616 {
3882b010 1617 *str2++ = TOLOWER (ch);
252b5132
RH		 1618 }
1619
1620 *str2 = '\0';
1621 len = str2 - ident;
1622
1623 ch = ident[0];
1624 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1625 if (ch == ptr->string[0]
1626 && len == ptr->length
b7d7dc63
AM		 1627 && memcmp (ident, ptr->string, ptr->length) == 0
1628 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1629 {
15c1449b
AM		 1630 int reloc = ptr->reloc;
1631
cdba85ec 1632 if (!ppc_obj64)
5f6db75a
AM		 1633 if (exp_p->X_add_number != 0
1634 && (reloc == (int) BFD_RELOC_16_GOTOFF
1635 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1636 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1637 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1638 as_warn (_("identifier+constant@got means identifier@got+constant"));
1639
1640 /* Now check for identifier@suffix+constant. */
1641 if (*str == '-' || *str == '+')
252b5132 1642 {
5f6db75a
AM		 1643 char *orig_line = input_line_pointer;
1644 expressionS new_exp;
1645
1646 input_line_pointer = str;
1647 expression (&new_exp);
1648 if (new_exp.X_op == O_constant)
252b5132 1649 {
5f6db75a
AM		 1650 exp_p->X_add_number += new_exp.X_add_number;
1651 str = input_line_pointer;
252b5132 1652 }
5f6db75a
AM		 1653
1654 if (&input_line_pointer != str_p)
1655 input_line_pointer = orig_line;
252b5132 1656 }
252b5132 1657 *str_p = str;
0baf16f2 1658
2b3c4602 1659 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1660 && exp_p->X_op == O_symbol
1661 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1662 {
9f2b53d7
AM		 1663 /* Change the symbol so that the dummy .TOC. symbol can be
1664 omitted from the object file. */
0baf16f2
AM		 1665 exp_p->X_add_symbol = &abs_symbol;
1666 }
1667
15c1449b 1668 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1669 }
1670
1671 return BFD_RELOC_UNUSED;
1672}
1673
99a814a1
AM		 1674/* Like normal .long/.short/.word, except support @got, etc.
1675 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1676static void
1677ppc_elf_cons (nbytes)
0baf16f2 1678 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1679{
1680 expressionS exp;
1681 bfd_reloc_code_real_type reloc;
1682
1683 if (is_it_end_of_statement ())
1684 {
1685 demand_empty_rest_of_line ();
1686 return;
1687 }
1688
1689 do
1690 {
1691 expression (&exp);
1692 if (exp.X_op == O_symbol
1693 && *input_line_pointer == '@'
99a814a1
AM		 1694 && (reloc = ppc_elf_suffix (&input_line_pointer,
1695 &exp)) != BFD_RELOC_UNUSED)
252b5132 1696 {
99a814a1
AM		 1697 reloc_howto_type *reloc_howto;
1698 int size;
1699
1700 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1701 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1702
1703 if (size > nbytes)
0baf16f2
AM		 1704 {
1705 as_bad (_("%s relocations do not fit in %d bytes\n"),
1706 reloc_howto->name, nbytes);
1707 }
252b5132
RH		 1708 else
1709 {
0baf16f2
AM		 1710 char *p;
1711 int offset;
252b5132 1712
0baf16f2
AM		 1713 p = frag_more (nbytes);
1714 offset = 0;
1715 if (target_big_endian)
1716 offset = nbytes - size;
99a814a1
AM		 1717 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1718 &exp, 0, reloc);
252b5132
RH		 1719 }
1720 }
1721 else
1722 emit_expr (&exp, (unsigned int) nbytes);
1723 }
1724 while (*input_line_pointer++ == ',');
1725
99a814a1
AM		 1726 /* Put terminator back into stream. */
1727 input_line_pointer--;
252b5132
RH		 1728 demand_empty_rest_of_line ();
1729}
1730
1731/* Solaris pseduo op to change to the .rodata section. */
1732static void
1733ppc_elf_rdata (xxx)
1734 int xxx;
1735{
1736 char *save_line = input_line_pointer;
1737 static char section[] = ".rodata\n";
1738
99a814a1 1739 /* Just pretend this is .section .rodata */
252b5132
RH		 1740 input_line_pointer = section;
1741 obj_elf_section (xxx);
1742
1743 input_line_pointer = save_line;
1744}
1745
99a814a1 1746/* Pseudo op to make file scope bss items. */
252b5132 1747static void
99a814a1 1748ppc_elf_lcomm (xxx)
92161534 1749 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1750{
1751 register char *name;
1752 register char c;
1753 register char *p;
1754 offsetT size;
1755 register symbolS *symbolP;
1756 offsetT align;
1757 segT old_sec;
1758 int old_subsec;
1759 char *pfrag;
1760 int align2;
1761
1762 name = input_line_pointer;
1763 c = get_symbol_end ();
1764
99a814a1 1765 /* just after name is now '\0'. */
252b5132
RH		 1766 p = input_line_pointer;
1767 *p = c;
1768 SKIP_WHITESPACE ();
1769 if (*input_line_pointer != ',')
1770 {
1771 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1772 ignore_rest_of_line ();
1773 return;
1774 }
1775
1776 input_line_pointer++; /* skip ',' */
1777 if ((size = get_absolute_expression ()) < 0)
1778 {
1779 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1780 ignore_rest_of_line ();
1781 return;
1782 }
1783
1784 /* The third argument to .lcomm is the alignment. */
1785 if (*input_line_pointer != ',')
1786 align = 8;
1787 else
1788 {
1789 ++input_line_pointer;
1790 align = get_absolute_expression ();
1791 if (align <= 0)
1792 {
1793 as_warn (_("ignoring bad alignment"));
1794 align = 8;
1795 }
1796 }
1797
1798 *p = 0;
1799 symbolP = symbol_find_or_make (name);
1800 *p = c;
1801
1802 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1803 {
1804 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1805 S_GET_NAME (symbolP));
1806 ignore_rest_of_line ();
1807 return;
1808 }
1809
1810 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1811 {
1812 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1813 S_GET_NAME (symbolP),
1814 (long) S_GET_VALUE (symbolP),
1815 (long) size);
1816
1817 ignore_rest_of_line ();
1818 return;
1819 }
1820
99a814a1 1821 /* Allocate_bss. */
252b5132
RH		 1822 old_sec = now_seg;
1823 old_subsec = now_subseg;
1824 if (align)
1825 {
99a814a1 1826 /* Convert to a power of 2 alignment. */
252b5132
RH		 1827 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1828 if (align != 1)
1829 {
1830 as_bad (_("Common alignment not a power of 2"));
1831 ignore_rest_of_line ();
1832 return;
1833 }
1834 }
1835 else
1836 align2 = 0;
1837
1838 record_alignment (bss_section, align2);
1839 subseg_set (bss_section, 0);
1840 if (align2)
1841 frag_align (align2, 0, 0);
1842 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1843 symbol_get_frag (symbolP)->fr_symbol = 0;
1844 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1845 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1846 (char *) 0);
1847 *pfrag = 0;
1848 S_SET_SIZE (symbolP, size);
1849 S_SET_SEGMENT (symbolP, bss_section);
1850 subseg_set (old_sec, old_subsec);
1851 demand_empty_rest_of_line ();
1852}
1853
1854/* Validate any relocations emitted for -mrelocatable, possibly adding
1855 fixups for word relocations in writable segments, so we can adjust
1856 them at runtime. */
1857static void
1858ppc_elf_validate_fix (fixp, seg)
1859 fixS *fixp;
1860 segT seg;
1861{
1862 if (fixp->fx_done || fixp->fx_pcrel)
1863 return;
1864
1865 switch (shlib)
1866 {
1867 case SHLIB_NONE:
1868 case SHLIB_PIC:
1869 return;
1870
5d6f4f16 1871 case SHLIB_MRELOCATABLE:
252b5132
RH		 1872 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1873 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1874 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1875 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1876 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1877 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1878 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1879 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1880 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1881 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1882 && strcmp (segment_name (seg), ".got2") != 0
1883 && strcmp (segment_name (seg), ".dtors") != 0
1884 && strcmp (segment_name (seg), ".ctors") != 0
1885 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1886 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1887 && strcmp (segment_name (seg), ".eh_frame") != 0
1888 && strcmp (segment_name (seg), ".ex_shared") != 0)
1889 {
1890 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1891 || fixp->fx_r_type != BFD_RELOC_CTOR)
1892 {
1893 as_bad_where (fixp->fx_file, fixp->fx_line,
1894 _("Relocation cannot be done when using -mrelocatable"));
1895 }
1896 }
1897 return;
1898 }
1899}
0baf16f2 1900
7e8d4ab4
AM		 1901/* Prevent elf_frob_file_before_adjust removing a weak undefined
1902 function descriptor sym if the corresponding code sym is used. */
1903
1904void
1905ppc_frob_file_before_adjust ()
0baf16f2 1906{
7e8d4ab4 1907 symbolS *symp;
9232bbb0 1908 asection *toc;
0baf16f2 1909
7e8d4ab4
AM		 1910 if (!ppc_obj64)
1911 return;
1912
1913 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1914 {
7e8d4ab4
AM		 1915 const char *name;
1916 char *dotname;
1917 symbolS *dotsym;
1918 size_t len;
1919
1920 name = S_GET_NAME (symp);
1921 if (name[0] == '.')
1922 continue;
1923
1924 if (! S_IS_WEAK (symp)
1925 || S_IS_DEFINED (symp))
1926 continue;
1927
1928 len = strlen (name) + 1;
1929 dotname = xmalloc (len + 1);
1930 dotname[0] = '.';
1931 memcpy (dotname + 1, name, len);
1932 dotsym = symbol_find (dotname);
1933 free (dotname);
1934 if (dotsym != NULL && (symbol_used_p (dotsym)
1935 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 1936 symbol_mark_used (symp);
1937
0baf16f2
AM		 1938 }
1939
9232bbb0
AM		 1940 toc = bfd_get_section_by_name (stdoutput, ".toc");
1941 if (toc != NULL
1942 && bfd_section_size (stdoutput, toc) > 0x10000)
1943 as_warn (_("TOC section size exceeds 64k"));
1944
7e8d4ab4
AM		 1945 /* Don't emit .TOC. symbol. */
1946 symp = symbol_find (".TOC.");
1947 if (symp != NULL)
1948 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1949}
252b5132
RH		 1950#endif /* OBJ_ELF */
1951\f
1952#ifdef TE_PE
1953
1954/*
99a814a1 1955 * Summary of parse_toc_entry.
252b5132
RH		 1956 *
1957 * in: Input_line_pointer points to the '[' in one of:
1958 *
1959 * [toc] [tocv] [toc32] [toc64]
1960 *
1961 * Anything else is an error of one kind or another.
1962 *
81d4177b 1963 * out:
252b5132
RH		 1964 * return value: success or failure
1965 * toc_kind: kind of toc reference
1966 * input_line_pointer:
1967 * success: first char after the ']'
1968 * failure: unchanged
1969 *
1970 * settings:
1971 *
1972 * [toc] - rv == success, toc_kind = default_toc
1973 * [tocv] - rv == success, toc_kind = data_in_toc
1974 * [toc32] - rv == success, toc_kind = must_be_32
1975 * [toc64] - rv == success, toc_kind = must_be_64
1976 *
1977 */
1978
81d4177b
KH		 1979enum toc_size_qualifier
1980{
252b5132
RH		 1981 default_toc, /* The toc cell constructed should be the system default size */
1982 data_in_toc, /* This is a direct reference to a toc cell */
1983 must_be_32, /* The toc cell constructed must be 32 bits wide */
1984 must_be_64 /* The toc cell constructed must be 64 bits wide */
1985};
1986
1987static int
99a814a1 1988parse_toc_entry (toc_kind)
252b5132
RH		 1989 enum toc_size_qualifier *toc_kind;
1990{
1991 char *start;
1992 char *toc_spec;
1993 char c;
1994 enum toc_size_qualifier t;
1995
99a814a1 1996 /* Save the input_line_pointer. */
252b5132
RH		 1997 start = input_line_pointer;
1998
99a814a1 1999 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2000 ++input_line_pointer;
2001 SKIP_WHITESPACE ();
81d4177b 2002
99a814a1 2003 /* Find the spelling of the operand. */
252b5132
RH		 2004 toc_spec = input_line_pointer;
2005 c = get_symbol_end ();
2006
99a814a1 2007 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2008 {
2009 t = default_toc;
2010 }
99a814a1 2011 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2012 {
2013 t = data_in_toc;
2014 }
99a814a1 2015 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2016 {
2017 t = must_be_32;
2018 }
99a814a1 2019 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2020 {
2021 t = must_be_64;
2022 }
2023 else
2024 {
2025 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2026 *input_line_pointer = c;
2027 input_line_pointer = start;
252b5132
RH		 2028 return 0;
2029 }
2030
99a814a1
AM		 2031 /* Now find the ']'. */
2032 *input_line_pointer = c;
252b5132 2033
81d4177b
KH		 2034 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2035 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2036
2037 if (c != ']')
2038 {
2039 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2040 input_line_pointer = start;
252b5132
RH		 2041 return 0;
2042 }
2043
99a814a1 2044 *toc_kind = t;
252b5132
RH		 2045 return 1;
2046}
2047#endif
2048\f
2049
dc1d03fc 2050#ifdef OBJ_ELF
6a0c61b7
EZ		 2051#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2052static void
dc1d03fc 2053ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2054 unsigned int apu, version;
2055{
2056 unsigned int i;
2057
2058 /* Check we don't already exist. */
2059 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2060 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2061 return;
b34976b6 2062
6a0c61b7
EZ		 2063 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2064 {
2065 if (ppc_apuinfo_num_alloc == 0)
2066 {
2067 ppc_apuinfo_num_alloc = 4;
2068 ppc_apuinfo_list = (unsigned long *)
2069 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2070 }
2071 else
2072 {
2073 ppc_apuinfo_num_alloc += 4;
2074 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2075 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2076 }
2077 }
dc1d03fc 2078 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2079}
2080#undef APUID
dc1d03fc 2081#endif
6a0c61b7
EZ		 2082\f
2083
252b5132
RH		 2084/* We need to keep a list of fixups. We can't simply generate them as
2085 we go, because that would require us to first create the frag, and
2086 that would screw up references to ``.''. */
2087
2088struct ppc_fixup
2089{
2090 expressionS exp;
2091 int opindex;
2092 bfd_reloc_code_real_type reloc;
2093};
2094
2095#define MAX_INSN_FIXUPS (5)
2096
2097/* This routine is called for each instruction to be assembled. */
2098
2099void
2100md_assemble (str)
2101 char *str;
2102{
2103 char *s;
2104 const struct powerpc_opcode *opcode;
2105 unsigned long insn;
2106 const unsigned char *opindex_ptr;
2107 int skip_optional;
2108 int need_paren;
2109 int next_opindex;
2110 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2111 int fc;
2112 char *f;
09b935ac 2113 int addr_mod;
252b5132
RH		 2114 int i;
2115#ifdef OBJ_ELF
2116 bfd_reloc_code_real_type reloc;
2117#endif
2118
2119 /* Get the opcode. */
3882b010 2120 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2121 ;
2122 if (*s != '\0')
2123 *s++ = '\0';
2124
2125 /* Look up the opcode in the hash table. */
2126 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2127 if (opcode == (const struct powerpc_opcode *) NULL)
2128 {
2129 const struct powerpc_macro *macro;
2130
2131 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2132 if (macro == (const struct powerpc_macro *) NULL)
2133 as_bad (_("Unrecognized opcode: `%s'"), str);
2134 else
2135 ppc_macro (s, macro);
2136
2137 return;
2138 }
2139
2140 insn = opcode->opcode;
2141
2142 str = s;
3882b010 2143 while (ISSPACE (*str))
252b5132
RH		 2144 ++str;
2145
2146 /* PowerPC operands are just expressions. The only real issue is
2147 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2148 an optional operand separate the operands only with commas (in some
2149 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2150 have optional operands). Most instructions with optional operands
2151 have only one. Those that have more than one optional operand can
2152 take either all their operands or none. So, before we start seriously
2153 parsing the operands, we check to see if we have optional operands,
2154 and if we do, we count the number of commas to see which operands
2155 have been omitted. */
252b5132
RH		 2156 skip_optional = 0;
2157 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2158 {
2159 const struct powerpc_operand *operand;
2160
2161 operand = &powerpc_operands[*opindex_ptr];
2162 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2163 {
2164 unsigned int opcount;
7fe9cf6b
NC		 2165 unsigned int num_operands_expected;
2166 unsigned int i;
252b5132
RH		 2167
2168 /* There is an optional operand. Count the number of
2169 commas in the input line. */
2170 if (*str == '\0')
2171 opcount = 0;
2172 else
2173 {
2174 opcount = 1;
2175 s = str;
2176 while ((s = strchr (s, ',')) != (char *) NULL)
2177 {
2178 ++opcount;
2179 ++s;
2180 }
2181 }
2182
7fe9cf6b
NC		 2183 /* Compute the number of expected operands.
2184 Do not count fake operands. */
2185 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2186 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2187 ++ num_operands_expected;
2188
252b5132
RH		 2189 /* If there are fewer operands in the line then are called
2190 for by the instruction, we want to skip the optional
1f6c9eb0 2191 operands. */
7fe9cf6b 2192 if (opcount < num_operands_expected)
252b5132
RH		 2193 skip_optional = 1;
2194
2195 break;
2196 }
2197 }
2198
2199 /* Gather the operands. */
2200 need_paren = 0;
2201 next_opindex = 0;
2202 fc = 0;
2203 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2204 {
2205 const struct powerpc_operand *operand;
2206 const char *errmsg;
2207 char *hold;
2208 expressionS ex;
2209 char endc;
2210
2211 if (next_opindex == 0)
2212 operand = &powerpc_operands[*opindex_ptr];
2213 else
2214 {
2215 operand = &powerpc_operands[next_opindex];
2216 next_opindex = 0;
2217 }
252b5132
RH		 2218 errmsg = NULL;
2219
2220 /* If this is a fake operand, then we do not expect anything
2221 from the input. */
2222 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2223 {
2b3c4602 2224 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2225 if (errmsg != (const char *) NULL)
2226 as_bad (errmsg);
2227 continue;
2228 }
2229
2230 /* If this is an optional operand, and we are skipping it, just
2231 insert a zero. */
2232 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2233 && skip_optional)
2234 {
2235 if (operand->insert)
2236 {
2b3c4602 2237 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2238 if (errmsg != (const char *) NULL)
2239 as_bad (errmsg);
2240 }
2241 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2242 next_opindex = *opindex_ptr + 1;
2243 continue;
2244 }
2245
2246 /* Gather the operand. */
2247 hold = input_line_pointer;
2248 input_line_pointer = str;
2249
2250#ifdef TE_PE
81d4177b 2251 if (*input_line_pointer == '[')
252b5132
RH		 2252 {
2253 /* We are expecting something like the second argument here:
99a814a1
AM		 2254 *
2255 * lwz r4,[toc].GS.0.static_int(rtoc)
2256 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2257 * The argument following the `]' must be a symbol name, and the
2258 * register must be the toc register: 'rtoc' or '2'
2259 *
2260 * The effect is to 0 as the displacement field
2261 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2262 * the appropriate variation) reloc against it based on the symbol.
2263 * The linker will build the toc, and insert the resolved toc offset.
2264 *
2265 * Note:
2266 * o The size of the toc entry is currently assumed to be
2267 * 32 bits. This should not be assumed to be a hard coded
2268 * number.
2269 * o In an effort to cope with a change from 32 to 64 bits,
2270 * there are also toc entries that are specified to be
2271 * either 32 or 64 bits:
2272 * lwz r4,[toc32].GS.0.static_int(rtoc)
2273 * lwz r4,[toc64].GS.0.static_int(rtoc)
2274 * These demand toc entries of the specified size, and the
2275 * instruction probably requires it.
2276 */
252b5132
RH		 2277
2278 int valid_toc;
2279 enum toc_size_qualifier toc_kind;
2280 bfd_reloc_code_real_type toc_reloc;
2281
99a814a1
AM		 2282 /* Go parse off the [tocXX] part. */
2283 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2284
81d4177b 2285 if (!valid_toc)
252b5132 2286 {
99a814a1
AM		 2287 /* Note: message has already been issued.
2288 FIXME: what sort of recovery should we do?
2289 demand_rest_of_line (); return; ? */
252b5132
RH		 2290 }
2291
99a814a1
AM		 2292 /* Now get the symbol following the ']'. */
2293 expression (&ex);
252b5132
RH		 2294
2295 switch (toc_kind)
2296 {
2297 case default_toc:
99a814a1
AM		 2298 /* In this case, we may not have seen the symbol yet,
2299 since it is allowed to appear on a .extern or .globl
2300 or just be a label in the .data section. */
252b5132
RH		 2301 toc_reloc = BFD_RELOC_PPC_TOC16;
2302 break;
2303 case data_in_toc:
99a814a1
AM		 2304 /* 1. The symbol must be defined and either in the toc
2305 section, or a global.
2306 2. The reloc generated must have the TOCDEFN flag set
2307 in upper bit mess of the reloc type.
2308 FIXME: It's a little confusing what the tocv
2309 qualifier can be used for. At the very least, I've
2310 seen three uses, only one of which I'm sure I can
2311 explain. */
81d4177b
KH		 2312 if (ex.X_op == O_symbol)
2313 {
252b5132 2314 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2315 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2316 != tocdata_section)
252b5132 2317 {
99a814a1 2318 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2319 }
2320 }
2321
2322 toc_reloc = BFD_RELOC_PPC_TOC16;
2323 break;
2324 case must_be_32:
99a814a1
AM		 2325 /* FIXME: these next two specifically specify 32/64 bit
2326 toc entries. We don't support them today. Is this
2327 the right way to say that? */
252b5132
RH		 2328 toc_reloc = BFD_RELOC_UNUSED;
2329 as_bad (_("Unimplemented toc32 expression modifier"));
2330 break;
2331 case must_be_64:
99a814a1 2332 /* FIXME: see above. */
252b5132
RH		 2333 toc_reloc = BFD_RELOC_UNUSED;
2334 as_bad (_("Unimplemented toc64 expression modifier"));
2335 break;
2336 default:
bc805888 2337 fprintf (stderr,
99a814a1
AM		 2338 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2339 toc_kind);
bc805888 2340 abort ();
252b5132
RH		 2341 break;
2342 }
2343
2344 /* We need to generate a fixup for this expression. */
2345 if (fc >= MAX_INSN_FIXUPS)
2346 as_fatal (_("too many fixups"));
2347
2348 fixups[fc].reloc = toc_reloc;
2349 fixups[fc].exp = ex;
2350 fixups[fc].opindex = *opindex_ptr;
2351 ++fc;
2352
99a814a1
AM		 2353 /* Ok. We've set up the fixup for the instruction. Now make it
2354 look like the constant 0 was found here. */
252b5132
RH		 2355 ex.X_unsigned = 1;
2356 ex.X_op = O_constant;
2357 ex.X_add_number = 0;
2358 ex.X_add_symbol = NULL;
2359 ex.X_op_symbol = NULL;
2360 }
2361
2362 else
2363#endif /* TE_PE */
2364 {
2365 if (! register_name (&ex))
2366 {
2367 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2368 cr_operand = TRUE;
252b5132 2369 expression (&ex);
b34976b6 2370 cr_operand = FALSE;
252b5132
RH		 2371 }
2372 }
2373
2374 str = input_line_pointer;
2375 input_line_pointer = hold;
2376
2377 if (ex.X_op == O_illegal)
2378 as_bad (_("illegal operand"));
2379 else if (ex.X_op == O_absent)
2380 as_bad (_("missing operand"));
2381 else if (ex.X_op == O_register)
2382 {
2383 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2384 (char *) NULL, 0);
2385 }
2386 else if (ex.X_op == O_constant)
2387 {
2388#ifdef OBJ_ELF
81d4177b 2389 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2390 char *orig_str = str;
2391
2392 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2393 switch (reloc)
2394 {
2395 default:
2396 str = orig_str;
2397 break;
2398
2399 case BFD_RELOC_LO16:
2400 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2401 something which cleared it, we always produce a
2402 signed value. */
2403 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2404 ex.X_add_number &= 0xffff;
2405 else
0baf16f2 2406 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2407 break;
2408
2409 case BFD_RELOC_HI16:
0baf16f2
AM		 2410 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2411 ex.X_add_number = PPC_HI (ex.X_add_number);
2412 else
2413 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2414 break;
2415
2416 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2417 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2418 ex.X_add_number = PPC_HA (ex.X_add_number);
2419 else
2420 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2421 break;
2422
0baf16f2
AM		 2423 case BFD_RELOC_PPC64_HIGHER:
2424 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2425 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2426 else
2427 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2428 break;
2429
2430 case BFD_RELOC_PPC64_HIGHER_S:
2431 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2432 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2433 else
2434 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2435 break;
0baf16f2
AM		 2436
2437 case BFD_RELOC_PPC64_HIGHEST:
2438 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2439 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2440 else
2441 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2442 break;
2443
2444 case BFD_RELOC_PPC64_HIGHEST_S:
2445 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2446 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2447 else
2448 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2449 break;
252b5132 2450 }
0baf16f2 2451#endif /* OBJ_ELF */
252b5132
RH		 2452 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2453 (char *) NULL, 0);
2454 }
2455#ifdef OBJ_ELF
2456 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2457 {
cdba85ec
AM		 2458 /* Some TLS tweaks. */
2459 switch (reloc)
2460 {
2461 default:
2462 break;
2463 case BFD_RELOC_PPC_TLS:
2464 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2465 (char *) NULL, 0);
2466 break;
2467 /* We'll only use the 32 (or 64) bit form of these relocations
2468 in constants. Instructions get the 16 bit form. */
2469 case BFD_RELOC_PPC_DTPREL:
2470 reloc = BFD_RELOC_PPC_DTPREL16;
2471 break;
2472 case BFD_RELOC_PPC_TPREL:
2473 reloc = BFD_RELOC_PPC_TPREL16;
2474 break;
2475 }
2476
99a814a1
AM		 2477 /* For the absolute forms of branches, convert the PC
2478 relative form back into the absolute. */
252b5132
RH		 2479 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2480 {
2481 switch (reloc)
2482 {
2483 case BFD_RELOC_PPC_B26:
2484 reloc = BFD_RELOC_PPC_BA26;
2485 break;
2486 case BFD_RELOC_PPC_B16:
2487 reloc = BFD_RELOC_PPC_BA16;
2488 break;
2489 case BFD_RELOC_PPC_B16_BRTAKEN:
2490 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2491 break;
2492 case BFD_RELOC_PPC_B16_BRNTAKEN:
2493 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2494 break;
2495 default:
2496 break;
2497 }
2498 }
2499
2b3c4602 2500 if (ppc_obj64
adadcc0c 2501 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2502 {
2503 switch (reloc)
2504 {
2505 case BFD_RELOC_16:
2506 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2507 break;
2508 case BFD_RELOC_LO16:
2509 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2510 break;
2511 case BFD_RELOC_16_GOTOFF:
2512 reloc = BFD_RELOC_PPC64_GOT16_DS;
2513 break;
2514 case BFD_RELOC_LO16_GOTOFF:
2515 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2516 break;
2517 case BFD_RELOC_LO16_PLTOFF:
2518 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2519 break;
1cfc59d5 2520 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2521 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2522 break;
2523 case BFD_RELOC_LO16_BASEREL:
2524 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2525 break;
2526 case BFD_RELOC_PPC_TOC16:
2527 reloc = BFD_RELOC_PPC64_TOC16_DS;
2528 break;
2529 case BFD_RELOC_PPC64_TOC16_LO:
2530 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2531 break;
2532 case BFD_RELOC_PPC64_PLTGOT16:
2533 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2534 break;
2535 case BFD_RELOC_PPC64_PLTGOT16_LO:
2536 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2537 break;
cdba85ec
AM		 2538 case BFD_RELOC_PPC_DTPREL16:
2539 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2540 break;
2541 case BFD_RELOC_PPC_DTPREL16_LO:
2542 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2543 break;
2544 case BFD_RELOC_PPC_TPREL16:
2545 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2546 break;
2547 case BFD_RELOC_PPC_TPREL16_LO:
2548 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2549 break;
2550 case BFD_RELOC_PPC_GOT_DTPREL16:
2551 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2552 case BFD_RELOC_PPC_GOT_TPREL16:
2553 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2554 break;
0baf16f2
AM		 2555 default:
2556 as_bad (_("unsupported relocation for DS offset field"));
2557 break;
2558 }
2559 }
2560
252b5132
RH		 2561 /* We need to generate a fixup for this expression. */
2562 if (fc >= MAX_INSN_FIXUPS)
2563 as_fatal (_("too many fixups"));
2564 fixups[fc].exp = ex;
2565 fixups[fc].opindex = 0;
2566 fixups[fc].reloc = reloc;
2567 ++fc;
2568 }
2569#endif /* OBJ_ELF */
2570
2571 else
2572 {
2573 /* We need to generate a fixup for this expression. */
2574 if (fc >= MAX_INSN_FIXUPS)
2575 as_fatal (_("too many fixups"));
2576 fixups[fc].exp = ex;
2577 fixups[fc].opindex = *opindex_ptr;
2578 fixups[fc].reloc = BFD_RELOC_UNUSED;
2579 ++fc;
2580 }
2581
2582 if (need_paren)
2583 {
2584 endc = ')';
2585 need_paren = 0;
2586 }
2587 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2588 {
2589 endc = '(';
2590 need_paren = 1;
2591 }
2592 else
2593 endc = ',';
2594
2595 /* The call to expression should have advanced str past any
2596 whitespace. */
2597 if (*str != endc
2598 && (endc != ',' || *str != '\0'))
2599 {
2600 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2601 break;
2602 }
2603
2604 if (*str != '\0')
2605 ++str;
2606 }
2607
3882b010 2608 while (ISSPACE (*str))
252b5132
RH		 2609 ++str;
2610
2611 if (*str != '\0')
2612 as_bad (_("junk at end of line: `%s'"), str);
2613
dc1d03fc 2614#ifdef OBJ_ELF
6a0c61b7
EZ		 2615 /* Do we need/want a APUinfo section? */
2616 if (ppc_cpu & (PPC_OPCODE_SPE
2617 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2618 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2619 | PPC_OPCODE_RFMCI))
2620 {
2621 /* These are all version "1". */
2622 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2623 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2624 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2625 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2626 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2627 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2628 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2629 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2630 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2631 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2632 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2633 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2634 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2635 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2636 }
dc1d03fc 2637#endif
6a0c61b7 2638
252b5132
RH		 2639 /* Write out the instruction. */
2640 f = frag_more (4);
09b935ac
AM		 2641 addr_mod = frag_now_fix () & 3;
2642 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2643 as_bad (_("instruction address is not a multiple of 4"));
2644 frag_now->insn_addr = addr_mod;
2645 frag_now->has_code = 1;
252b5132
RH		 2646 md_number_to_chars (f, insn, 4);
2647
5d6f4f16
GK		 2648#ifdef OBJ_ELF
2649 dwarf2_emit_insn (4);
2650#endif
2651
252b5132
RH		 2652 /* Create any fixups. At this point we do not use a
2653 bfd_reloc_code_real_type, but instead just use the
2654 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2655 handle fixups for any operand type, although that is admittedly
2656 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2657 md_apply_fix. */
252b5132
RH		 2658 for (i = 0; i < fc; i++)
2659 {
2660 const struct powerpc_operand *operand;
2661
2662 operand = &powerpc_operands[fixups[i].opindex];
2663 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2664 {
99a814a1 2665 reloc_howto_type *reloc_howto;
252b5132
RH		 2666 int size;
2667 int offset;
2668 fixS *fixP;
2669
99a814a1 2670 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2671 if (!reloc_howto)
2672 abort ();
2673
2674 size = bfd_get_reloc_size (reloc_howto);
2675 offset = target_big_endian ? (4 - size) : 0;
2676
2677 if (size < 1 || size > 4)
bc805888 2678 abort ();
252b5132 2679
99a814a1
AM		 2680 fixP = fix_new_exp (frag_now,
2681 f - frag_now->fr_literal + offset,
2682 size,
2683 &fixups[i].exp,
2684 reloc_howto->pc_relative,
252b5132
RH		 2685 fixups[i].reloc);
2686
2687 /* Turn off complaints that the addend is too large for things like
2688 foo+100000@ha. */
2689 switch (fixups[i].reloc)
2690 {
2691 case BFD_RELOC_16_GOTOFF:
2692 case BFD_RELOC_PPC_TOC16:
2693 case BFD_RELOC_LO16:
2694 case BFD_RELOC_HI16:
2695 case BFD_RELOC_HI16_S:
0baf16f2 2696#ifdef OBJ_ELF
0baf16f2
AM		 2697 case BFD_RELOC_PPC64_HIGHER:
2698 case BFD_RELOC_PPC64_HIGHER_S:
2699 case BFD_RELOC_PPC64_HIGHEST:
2700 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2701#endif
252b5132
RH		 2702 fixP->fx_no_overflow = 1;
2703 break;
2704 default:
2705 break;
2706 }
2707 }
2708 else
99a814a1
AM		 2709 fix_new_exp (frag_now,
2710 f - frag_now->fr_literal,
2711 4,
252b5132
RH		 2712 &fixups[i].exp,
2713 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2714 ((bfd_reloc_code_real_type)
99a814a1 2715 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2716 }
2717}
2718
2719/* Handle a macro. Gather all the operands, transform them as
2720 described by the macro, and call md_assemble recursively. All the
2721 operands are separated by commas; we don't accept parentheses
2722 around operands here. */
2723
2724static void
2725ppc_macro (str, macro)
2726 char *str;
2727 const struct powerpc_macro *macro;
2728{
2729 char *operands[10];
2730 unsigned int count;
2731 char *s;
2732 unsigned int len;
2733 const char *format;
2734 int arg;
2735 char *send;
2736 char *complete;
2737
2738 /* Gather the users operands into the operands array. */
2739 count = 0;
2740 s = str;
2741 while (1)
2742 {
2743 if (count >= sizeof operands / sizeof operands[0])
2744 break;
2745 operands[count++] = s;
2746 s = strchr (s, ',');
2747 if (s == (char *) NULL)
2748 break;
2749 *s++ = '\0';
81d4177b 2750 }
252b5132
RH		 2751
2752 if (count != macro->operands)
2753 {
2754 as_bad (_("wrong number of operands"));
2755 return;
2756 }
2757
2758 /* Work out how large the string must be (the size is unbounded
2759 because it includes user input). */
2760 len = 0;
2761 format = macro->format;
2762 while (*format != '\0')
2763 {
2764 if (*format != '%')
2765 {
2766 ++len;
2767 ++format;
2768 }
2769 else
2770 {
2771 arg = strtol (format + 1, &send, 10);
2772 know (send != format && arg >= 0 && arg < count);
2773 len += strlen (operands[arg]);
2774 format = send;
2775 }
2776 }
2777
2778 /* Put the string together. */
2779 complete = s = (char *) alloca (len + 1);
2780 format = macro->format;
2781 while (*format != '\0')
2782 {
2783 if (*format != '%')
2784 *s++ = *format++;
2785 else
2786 {
2787 arg = strtol (format + 1, &send, 10);
2788 strcpy (s, operands[arg]);
2789 s += strlen (s);
2790 format = send;
2791 }
2792 }
2793 *s = '\0';
2794
2795 /* Assemble the constructed instruction. */
2796 md_assemble (complete);
81d4177b 2797}
252b5132
RH		 2798\f
2799#ifdef OBJ_ELF
99a814a1 2800/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2801
2802int
2803ppc_section_letter (letter, ptr_msg)
2804 int letter;
2805 char **ptr_msg;
2806{
2807 if (letter == 'e')
2808 return SHF_EXCLUDE;
2809
13ae64f3 2810 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2811 return -1;
252b5132
RH		 2812}
2813
2814int
9de8d8f1
RH		 2815ppc_section_word (str, len)
2816 char *str;
2817 size_t len;
252b5132 2818{
9de8d8f1
RH		 2819 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2820 return SHF_EXCLUDE;
252b5132 2821
9de8d8f1 2822 return -1;
252b5132
RH		 2823}
2824
2825int
9de8d8f1
RH		 2826ppc_section_type (str, len)
2827 char *str;
2828 size_t len;
252b5132 2829{
9de8d8f1
RH		 2830 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2831 return SHT_ORDERED;
252b5132 2832
9de8d8f1 2833 return -1;
252b5132
RH		 2834}
2835
2836int
2837ppc_section_flags (flags, attr, type)
2838 int flags;
2839 int attr;
2840 int type;
2841{
2842 if (type == SHT_ORDERED)
2843 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2844
2845 if (attr & SHF_EXCLUDE)
2846 flags |= SEC_EXCLUDE;
2847
2848 return flags;
2849}
2850#endif /* OBJ_ELF */
2851
2852\f
2853/* Pseudo-op handling. */
2854
2855/* The .byte pseudo-op. This is similar to the normal .byte
2856 pseudo-op, but it can also take a single ASCII string. */
2857
2858static void
2859ppc_byte (ignore)
92161534 2860 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2861{
2862 if (*input_line_pointer != '\"')
2863 {
2864 cons (1);
2865 return;
2866 }
2867
2868 /* Gather characters. A real double quote is doubled. Unusual
2869 characters are not permitted. */
2870 ++input_line_pointer;
2871 while (1)
2872 {
2873 char c;
2874
2875 c = *input_line_pointer++;
2876
2877 if (c == '\"')
2878 {
2879 if (*input_line_pointer != '\"')
2880 break;
2881 ++input_line_pointer;
2882 }
2883
2884 FRAG_APPEND_1_CHAR (c);
2885 }
2886
2887 demand_empty_rest_of_line ();
2888}
2889\f
2890#ifdef OBJ_XCOFF
2891
2892/* XCOFF specific pseudo-op handling. */
2893
2894/* This is set if we are creating a .stabx symbol, since we don't want
2895 to handle symbol suffixes for such symbols. */
b34976b6 2896static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2897
2898/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2899 symbols in the .bss segment as though they were local common
67c1ffbe 2900 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2901 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2902
2903static void
2904ppc_comm (lcomm)
2905 int lcomm;
2906{
2907 asection *current_seg = now_seg;
2908 subsegT current_subseg = now_subseg;
2909 char *name;
2910 char endc;
2911 char *end_name;
2912 offsetT size;
2913 offsetT align;
2914 symbolS *lcomm_sym = NULL;
2915 symbolS *sym;
2916 char *pfrag;
2917
2918 name = input_line_pointer;
2919 endc = get_symbol_end ();
2920 end_name = input_line_pointer;
2921 *end_name = endc;
2922
2923 if (*input_line_pointer != ',')
2924 {
2925 as_bad (_("missing size"));
2926 ignore_rest_of_line ();
2927 return;
2928 }
2929 ++input_line_pointer;
2930
2931 size = get_absolute_expression ();
2932 if (size < 0)
2933 {
2934 as_bad (_("negative size"));
2935 ignore_rest_of_line ();
2936 return;
2937 }
2938
2939 if (! lcomm)
2940 {
2941 /* The third argument to .comm is the alignment. */
2942 if (*input_line_pointer != ',')
1ad63b2f 2943 align = 2;
252b5132
RH		 2944 else
2945 {
2946 ++input_line_pointer;
2947 align = get_absolute_expression ();
2948 if (align <= 0)
2949 {
2950 as_warn (_("ignoring bad alignment"));
1ad63b2f 2951 align = 2;
252b5132
RH		 2952 }
2953 }
2954 }
2955 else
2956 {
2957 char *lcomm_name;
2958 char lcomm_endc;
2959
1ad63b2f 2960 if (size <= 4)
252b5132
RH		 2961 align = 2;
2962 else
2963 align = 3;
2964
2965 /* The third argument to .lcomm appears to be the real local
2966 common symbol to create. References to the symbol named in
2967 the first argument are turned into references to the third
2968 argument. */
2969 if (*input_line_pointer != ',')
2970 {
2971 as_bad (_("missing real symbol name"));
2972 ignore_rest_of_line ();
2973 return;
2974 }
2975 ++input_line_pointer;
2976
2977 lcomm_name = input_line_pointer;
2978 lcomm_endc = get_symbol_end ();
81d4177b 2979
252b5132
RH		 2980 lcomm_sym = symbol_find_or_make (lcomm_name);
2981
2982 *input_line_pointer = lcomm_endc;
2983 }
2984
2985 *end_name = '\0';
2986 sym = symbol_find_or_make (name);
2987 *end_name = endc;
2988
2989 if (S_IS_DEFINED (sym)
2990 || S_GET_VALUE (sym) != 0)
2991 {
2992 as_bad (_("attempt to redefine symbol"));
2993 ignore_rest_of_line ();
2994 return;
2995 }
81d4177b 2996
252b5132 2997 record_alignment (bss_section, align);
81d4177b 2998
252b5132
RH		 2999 if (! lcomm
3000 || ! S_IS_DEFINED (lcomm_sym))
3001 {
3002 symbolS *def_sym;
3003 offsetT def_size;
3004
3005 if (! lcomm)
3006 {
3007 def_sym = sym;
3008 def_size = size;
3009 S_SET_EXTERNAL (sym);
3010 }
3011 else
3012 {
809ffe0d 3013 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3014 def_sym = lcomm_sym;
3015 def_size = 0;
3016 }
3017
3018 subseg_set (bss_section, 1);
3019 frag_align (align, 0, 0);
81d4177b 3020
809ffe0d 3021 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3022 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3023 def_size, (char *) NULL);
3024 *pfrag = 0;
3025 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3026 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3027 }
3028 else if (lcomm)
3029 {
3030 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3031 symbol_get_frag (lcomm_sym)->fr_offset =
3032 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3033 &~ ((1 << align) - 1));
809ffe0d
ILT		 3034 if (align > symbol_get_tc (lcomm_sym)->align)
3035 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3036 }
3037
3038 if (lcomm)
3039 {
3040 /* Make sym an offset from lcomm_sym. */
3041 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3042 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3043 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3044 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3045 }
3046
3047 subseg_set (current_seg, current_subseg);
3048
3049 demand_empty_rest_of_line ();
3050}
3051
3052/* The .csect pseudo-op. This switches us into a different
3053 subsegment. The first argument is a symbol whose value is the
3054 start of the .csect. In COFF, csect symbols get special aux
3055 entries defined by the x_csect field of union internal_auxent. The
3056 optional second argument is the alignment (the default is 2). */
3057
3058static void
3059ppc_csect (ignore)
5480ccf3 3060 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3061{
3062 char *name;
3063 char endc;
3064 symbolS *sym;
931e13a6 3065 offsetT align;
252b5132
RH		 3066
3067 name = input_line_pointer;
3068 endc = get_symbol_end ();
81d4177b 3069
252b5132
RH		 3070 sym = symbol_find_or_make (name);
3071
3072 *input_line_pointer = endc;
3073
3074 if (S_GET_NAME (sym)[0] == '\0')
3075 {
3076 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3077 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3078 }
3079
931e13a6 3080 align = 2;
252b5132
RH		 3081 if (*input_line_pointer == ',')
3082 {
3083 ++input_line_pointer;
931e13a6 3084 align = get_absolute_expression ();
252b5132
RH		 3085 }
3086
931e13a6
AM		 3087 ppc_change_csect (sym, align);
3088
252b5132
RH		 3089 demand_empty_rest_of_line ();
3090}
3091
3092/* Change to a different csect. */
3093
3094static void
931e13a6 3095ppc_change_csect (sym, align)
252b5132 3096 symbolS *sym;
931e13a6 3097 offsetT align;
252b5132
RH		 3098{
3099 if (S_IS_DEFINED (sym))
809ffe0d 3100 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3101 else
3102 {
3103 symbolS **list_ptr;
3104 int after_toc;
3105 int hold_chunksize;
3106 symbolS *list;
931e13a6
AM		 3107 int is_code;
3108 segT sec;
252b5132
RH		 3109
3110 /* This is a new csect. We need to look at the symbol class to
3111 figure out whether it should go in the text section or the
3112 data section. */
3113 after_toc = 0;
931e13a6 3114 is_code = 0;
809ffe0d 3115 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3116 {
3117 case XMC_PR:
3118 case XMC_RO:
3119 case XMC_DB:
3120 case XMC_GL:
3121 case XMC_XO:
3122 case XMC_SV:
3123 case XMC_TI:
3124 case XMC_TB:
3125 S_SET_SEGMENT (sym, text_section);
809ffe0d 3126 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3127 ++ppc_text_subsegment;
3128 list_ptr = &ppc_text_csects;
931e13a6 3129 is_code = 1;
252b5132
RH		 3130 break;
3131 case XMC_RW:
3132 case XMC_TC0:
3133 case XMC_TC:
3134 case XMC_DS:
3135 case XMC_UA:
3136 case XMC_BS:
3137 case XMC_UC:
3138 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3139 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3140 == ppc_data_subsegment))
252b5132
RH		 3141 after_toc = 1;
3142 S_SET_SEGMENT (sym, data_section);
809ffe0d 3143 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3144 ++ppc_data_subsegment;
3145 list_ptr = &ppc_data_csects;
3146 break;
3147 default:
3148 abort ();
3149 }
3150
3151 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3152 changing subsegments, so that we don't use a lot of memory
3153 space for what may be a small section. */
252b5132
RH		 3154 hold_chunksize = chunksize;
3155 chunksize = 64;
3156
931e13a6
AM		 3157 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3158 symbol_get_tc (sym)->subseg);
252b5132
RH		 3159
3160 chunksize = hold_chunksize;
3161
3162 if (after_toc)
3163 ppc_after_toc_frag = frag_now;
3164
931e13a6
AM		 3165 record_alignment (sec, align);
3166 if (is_code)
3167 frag_align_code (align, 0);
3168 else
3169 frag_align (align, 0, 0);
3170
809ffe0d 3171 symbol_set_frag (sym, frag_now);
252b5132
RH		 3172 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3173
931e13a6 3174 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3175 symbol_get_tc (sym)->output = 1;
3176 symbol_get_tc (sym)->within = sym;
81d4177b 3177
252b5132 3178 for (list = *list_ptr;
809ffe0d
ILT		 3179 symbol_get_tc (list)->next != (symbolS *) NULL;
3180 list = symbol_get_tc (list)->next)
252b5132 3181 ;
809ffe0d 3182 symbol_get_tc (list)->next = sym;
81d4177b 3183
252b5132 3184 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3185 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3186 &symbol_lastP);
252b5132
RH		 3187 }
3188
3189 ppc_current_csect = sym;
3190}
3191
3192/* This function handles the .text and .data pseudo-ops. These
3193 pseudo-ops aren't really used by XCOFF; we implement them for the
3194 convenience of people who aren't used to XCOFF. */
3195
3196static void
3197ppc_section (type)
3198 int type;
3199{
3200 const char *name;
3201 symbolS *sym;
3202
3203 if (type == 't')
3204 name = ".text[PR]";
3205 else if (type == 'd')
3206 name = ".data[RW]";
3207 else
3208 abort ();
3209
3210 sym = symbol_find_or_make (name);
3211
931e13a6 3212 ppc_change_csect (sym, 2);
252b5132
RH		 3213
3214 demand_empty_rest_of_line ();
3215}
3216
3217/* This function handles the .section pseudo-op. This is mostly to
3218 give an error, since XCOFF only supports .text, .data and .bss, but
3219 we do permit the user to name the text or data section. */
3220
3221static void
3222ppc_named_section (ignore)
5480ccf3 3223 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3224{
3225 char *user_name;
3226 const char *real_name;
3227 char c;
3228 symbolS *sym;
3229
3230 user_name = input_line_pointer;
3231 c = get_symbol_end ();
3232
3233 if (strcmp (user_name, ".text") == 0)
3234 real_name = ".text[PR]";
3235 else if (strcmp (user_name, ".data") == 0)
3236 real_name = ".data[RW]";
3237 else
3238 {
3239 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3240 *input_line_pointer = c;
3241 ignore_rest_of_line ();
3242 return;
3243 }
3244
3245 *input_line_pointer = c;
3246
3247 sym = symbol_find_or_make (real_name);
3248
931e13a6 3249 ppc_change_csect (sym, 2);
252b5132
RH		 3250
3251 demand_empty_rest_of_line ();
3252}
3253
3254/* The .extern pseudo-op. We create an undefined symbol. */
3255
3256static void
3257ppc_extern (ignore)
5480ccf3 3258 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3259{
3260 char *name;
3261 char endc;
3262
3263 name = input_line_pointer;
3264 endc = get_symbol_end ();
3265
3266 (void) symbol_find_or_make (name);
3267
3268 *input_line_pointer = endc;
3269
3270 demand_empty_rest_of_line ();
3271}
3272
3273/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3274
3275static void
3276ppc_lglobl (ignore)
5480ccf3 3277 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3278{
3279 char *name;
3280 char endc;
3281 symbolS *sym;
3282
3283 name = input_line_pointer;
3284 endc = get_symbol_end ();
3285
3286 sym = symbol_find_or_make (name);
3287
3288 *input_line_pointer = endc;
3289
809ffe0d 3290 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3291
3292 demand_empty_rest_of_line ();
3293}
3294
3295/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3296 although I don't know why it bothers. */
3297
3298static void
3299ppc_rename (ignore)
5480ccf3 3300 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3301{
3302 char *name;
3303 char endc;
3304 symbolS *sym;
3305 int len;
3306
3307 name = input_line_pointer;
3308 endc = get_symbol_end ();
3309
3310 sym = symbol_find_or_make (name);
3311
3312 *input_line_pointer = endc;
3313
3314 if (*input_line_pointer != ',')
3315 {
3316 as_bad (_("missing rename string"));
3317 ignore_rest_of_line ();
3318 return;
3319 }
3320 ++input_line_pointer;
3321
809ffe0d 3322 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3323
3324 demand_empty_rest_of_line ();
3325}
3326
3327/* The .stabx pseudo-op. This is similar to a normal .stabs
3328 pseudo-op, but slightly different. A sample is
3329 .stabx "main:F-1",.main,142,0
3330 The first argument is the symbol name to create. The second is the
3331 value, and the third is the storage class. The fourth seems to be
3332 always zero, and I am assuming it is the type. */
3333
3334static void
3335ppc_stabx (ignore)
5480ccf3 3336 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3337{
3338 char *name;
3339 int len;
3340 symbolS *sym;
3341 expressionS exp;
3342
3343 name = demand_copy_C_string (&len);
3344
3345 if (*input_line_pointer != ',')
3346 {
3347 as_bad (_("missing value"));
3348 return;
3349 }
3350 ++input_line_pointer;
3351
b34976b6 3352 ppc_stab_symbol = TRUE;
252b5132 3353 sym = symbol_make (name);
b34976b6 3354 ppc_stab_symbol = FALSE;
252b5132 3355
809ffe0d 3356 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3357
3358 (void) expression (&exp);
3359
3360 switch (exp.X_op)
3361 {
3362 case O_illegal:
3363 case O_absent:
3364 case O_big:
3365 as_bad (_("illegal .stabx expression; zero assumed"));
3366 exp.X_add_number = 0;
3367 /* Fall through. */
3368 case O_constant:
3369 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3370 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3371 break;
3372
3373 case O_symbol:
3374 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3375 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3376 else
3377 {
3378 S_SET_VALUE (sym,
3379 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3380 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3381 }
3382 break;
3383
3384 default:
3385 /* The value is some complex expression. This will probably
99a814a1
AM		 3386 fail at some later point, but this is probably the right
3387 thing to do here. */
809ffe0d 3388 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3389 break;
3390 }
3391
3392 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3393 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3394
3395 if (*input_line_pointer != ',')
3396 {
3397 as_bad (_("missing class"));
3398 return;
3399 }
3400 ++input_line_pointer;
3401
3402 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3403
3404 if (*input_line_pointer != ',')
3405 {
3406 as_bad (_("missing type"));
3407 return;
3408 }
3409 ++input_line_pointer;
3410
3411 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3412
809ffe0d 3413 symbol_get_tc (sym)->output = 1;
252b5132 3414
6877bb43 3415 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3416
809ffe0d 3417 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3418
41ea10b1 3419 /* In this case :
99a814a1 3420
41ea10b1
TR		 3421 .bs name
3422 .stabx "z",arrays_,133,0
3423 .es
99a814a1 3424
41ea10b1 3425 .comm arrays_,13768,3
99a814a1 3426
41ea10b1
TR		 3427 resolve_symbol_value will copy the exp's "within" into sym's when the
3428 offset is 0. Since this seems to be corner case problem,
3429 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3430 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3431
3432 if (exp.X_op == O_symbol)
41ea10b1
TR		 3433 {
3434 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3435 }
6877bb43 3436 }
99a814a1 3437
252b5132
RH		 3438 if (exp.X_op != O_symbol
3439 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3440 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3441 ppc_frob_label (sym);
3442 else
3443 {
3444 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3445 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3446 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3447 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3448 }
3449
3450 demand_empty_rest_of_line ();
3451}
3452
3453/* The .function pseudo-op. This takes several arguments. The first
3454 argument seems to be the external name of the symbol. The second
67c1ffbe 3455 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3456 uses the same name for both. I have no idea what the third and
3457 fourth arguments are meant to be. The optional fifth argument is
3458 an expression for the size of the function. In COFF this symbol
3459 gets an aux entry like that used for a csect. */
3460
3461static void
3462ppc_function (ignore)
5480ccf3 3463 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3464{
3465 char *name;
3466 char endc;
3467 char *s;
3468 symbolS *ext_sym;
3469 symbolS *lab_sym;
3470
3471 name = input_line_pointer;
3472 endc = get_symbol_end ();
3473
3474 /* Ignore any [PR] suffix. */
3475 name = ppc_canonicalize_symbol_name (name);
3476 s = strchr (name, '[');
3477 if (s != (char *) NULL
3478 && strcmp (s + 1, "PR]") == 0)
3479 *s = '\0';
3480
3481 ext_sym = symbol_find_or_make (name);
3482
3483 *input_line_pointer = endc;
3484
3485 if (*input_line_pointer != ',')
3486 {
3487 as_bad (_("missing symbol name"));
3488 ignore_rest_of_line ();
3489 return;
3490 }
3491 ++input_line_pointer;
3492
3493 name = input_line_pointer;
3494 endc = get_symbol_end ();
3495
3496 lab_sym = symbol_find_or_make (name);
3497
3498 *input_line_pointer = endc;
3499
3500 if (ext_sym != lab_sym)
3501 {
809ffe0d
ILT		 3502 expressionS exp;
3503
3504 exp.X_op = O_symbol;
3505 exp.X_add_symbol = lab_sym;
3506 exp.X_op_symbol = NULL;
3507 exp.X_add_number = 0;
3508 exp.X_unsigned = 0;
3509 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3510 }
3511
809ffe0d
ILT		 3512 if (symbol_get_tc (ext_sym)->class == -1)
3513 symbol_get_tc (ext_sym)->class = XMC_PR;
3514 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3515
3516 if (*input_line_pointer == ',')
3517 {
3518 expressionS ignore;
3519
3520 /* Ignore the third argument. */
3521 ++input_line_pointer;
3522 expression (&ignore);
3523 if (*input_line_pointer == ',')
3524 {
3525 /* Ignore the fourth argument. */
3526 ++input_line_pointer;
3527 expression (&ignore);
3528 if (*input_line_pointer == ',')
3529 {
3530 /* The fifth argument is the function size. */
3531 ++input_line_pointer;
809ffe0d
ILT		 3532 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3533 absolute_section,
3534 (valueT) 0,
3535 &zero_address_frag);
3536 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3537 }
3538 }
3539 }
3540
3541 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3542 SF_SET_FUNCTION (ext_sym);
3543 SF_SET_PROCESS (ext_sym);
3544 coff_add_linesym (ext_sym);
3545
3546 demand_empty_rest_of_line ();
3547}
3548
3549/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3550 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3551 with the correct line number */
5d6255fe 3552
8642cce8 3553static symbolS *saved_bi_sym = 0;
252b5132
RH		 3554
3555static void
3556ppc_bf (ignore)
5480ccf3 3557 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3558{
3559 symbolS *sym;
3560
3561 sym = symbol_make (".bf");
3562 S_SET_SEGMENT (sym, text_section);
809ffe0d 3563 symbol_set_frag (sym, frag_now);
252b5132
RH		 3564 S_SET_VALUE (sym, frag_now_fix ());
3565 S_SET_STORAGE_CLASS (sym, C_FCN);
3566
3567 coff_line_base = get_absolute_expression ();
3568
3569 S_SET_NUMBER_AUXILIARY (sym, 1);
3570 SA_SET_SYM_LNNO (sym, coff_line_base);
3571
8642cce8 3572 /* Line number for bi. */
5d6255fe 3573 if (saved_bi_sym)
8642cce8
TR		 3574 {
3575 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3576 saved_bi_sym = 0;
3577 }
5d6255fe 3578
8642cce8 3579
809ffe0d 3580 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3581
3582 ppc_frob_label (sym);
3583
3584 demand_empty_rest_of_line ();
3585}
3586
3587/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3588 ".ef", except that the line number is absolute, not relative to the
3589 most recent ".bf" symbol. */
3590
3591static void
3592ppc_ef (ignore)
5480ccf3 3593 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3594{
3595 symbolS *sym;
3596
3597 sym = symbol_make (".ef");
3598 S_SET_SEGMENT (sym, text_section);
809ffe0d 3599 symbol_set_frag (sym, frag_now);
252b5132
RH		 3600 S_SET_VALUE (sym, frag_now_fix ());
3601 S_SET_STORAGE_CLASS (sym, C_FCN);
3602 S_SET_NUMBER_AUXILIARY (sym, 1);
3603 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3604 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3605
3606 ppc_frob_label (sym);
3607
3608 demand_empty_rest_of_line ();
3609}
3610
3611/* The .bi and .ei pseudo-ops. These take a string argument and
3612 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3613 the symbol list. The value of .bi will be know when the next .bf
3614 is encountered. */
252b5132
RH		 3615
3616static void
3617ppc_biei (ei)
3618 int ei;
3619{
3620 static symbolS *last_biei;
3621
3622 char *name;
3623 int len;
3624 symbolS *sym;
3625 symbolS *look;
3626
3627 name = demand_copy_C_string (&len);
3628
3629 /* The value of these symbols is actually file offset. Here we set
3630 the value to the index into the line number entries. In
3631 ppc_frob_symbols we set the fix_line field, which will cause BFD
3632 to do the right thing. */
3633
3634 sym = symbol_make (name);
3635 /* obj-coff.c currently only handles line numbers correctly in the
3636 .text section. */
3637 S_SET_SEGMENT (sym, text_section);
3638 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3639 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3640
3641 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3642 symbol_get_tc (sym)->output = 1;
81d4177b 3643
8642cce8 3644 /* Save bi. */
5d6255fe 3645 if (ei)
8642cce8
TR		 3646 saved_bi_sym = 0;
3647 else
3648 saved_bi_sym = sym;
3649
252b5132
RH		 3650 for (look = last_biei ? last_biei : symbol_rootP;
3651 (look != (symbolS *) NULL
3652 && (S_GET_STORAGE_CLASS (look) == C_FILE
3653 || S_GET_STORAGE_CLASS (look) == C_BINCL
3654 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3655 look = symbol_next (look))
3656 ;
3657 if (look != (symbolS *) NULL)
3658 {
3659 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3660 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3661 last_biei = sym;
3662 }
3663
3664 demand_empty_rest_of_line ();
3665}
3666
3667/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3668 There is one argument, which is a csect symbol. The value of the
3669 .bs symbol is the index of this csect symbol. */
3670
3671static void
3672ppc_bs (ignore)
5480ccf3 3673 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3674{
3675 char *name;
3676 char endc;
3677 symbolS *csect;
3678 symbolS *sym;
3679
3680 if (ppc_current_block != NULL)
3681 as_bad (_("nested .bs blocks"));
3682
3683 name = input_line_pointer;
3684 endc = get_symbol_end ();
3685
3686 csect = symbol_find_or_make (name);
3687
3688 *input_line_pointer = endc;
3689
3690 sym = symbol_make (".bs");
3691 S_SET_SEGMENT (sym, now_seg);
3692 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3693 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3694 symbol_get_tc (sym)->output = 1;
252b5132 3695
809ffe0d 3696 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3697
3698 ppc_frob_label (sym);
3699
3700 ppc_current_block = sym;
3701
3702 demand_empty_rest_of_line ();
3703}
3704
3705/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3706
3707static void
3708ppc_es (ignore)
5480ccf3 3709 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3710{
3711 symbolS *sym;
3712
3713 if (ppc_current_block == NULL)
3714 as_bad (_(".es without preceding .bs"));
3715
3716 sym = symbol_make (".es");
3717 S_SET_SEGMENT (sym, now_seg);
3718 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3719 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3720 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3721
3722 ppc_frob_label (sym);
3723
3724 ppc_current_block = NULL;
3725
3726 demand_empty_rest_of_line ();
3727}
3728
3729/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3730 line number. */
3731
3732static void
3733ppc_bb (ignore)
5480ccf3 3734 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3735{
3736 symbolS *sym;
3737
3738 sym = symbol_make (".bb");
3739 S_SET_SEGMENT (sym, text_section);
809ffe0d 3740 symbol_set_frag (sym, frag_now);
252b5132
RH		 3741 S_SET_VALUE (sym, frag_now_fix ());
3742 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3743
3744 S_SET_NUMBER_AUXILIARY (sym, 1);
3745 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3746
809ffe0d 3747 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3748
3749 SF_SET_PROCESS (sym);
3750
3751 ppc_frob_label (sym);
3752
3753 demand_empty_rest_of_line ();
3754}
3755
3756/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3757 line number. */
3758
3759static void
3760ppc_eb (ignore)
5480ccf3 3761 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3762{
3763 symbolS *sym;
3764
3765 sym = symbol_make (".eb");
3766 S_SET_SEGMENT (sym, text_section);
809ffe0d 3767 symbol_set_frag (sym, frag_now);
252b5132
RH		 3768 S_SET_VALUE (sym, frag_now_fix ());
3769 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3770 S_SET_NUMBER_AUXILIARY (sym, 1);
3771 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3772 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3773
3774 SF_SET_PROCESS (sym);
3775
3776 ppc_frob_label (sym);
3777
3778 demand_empty_rest_of_line ();
3779}
3780
3781/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3782 specified name. */
3783
3784static void
3785ppc_bc (ignore)
5480ccf3 3786 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3787{
3788 char *name;
3789 int len;
3790 symbolS *sym;
3791
3792 name = demand_copy_C_string (&len);
3793 sym = symbol_make (name);
3794 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3795 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3796 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3797 S_SET_VALUE (sym, 0);
809ffe0d 3798 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3799
3800 ppc_frob_label (sym);
3801
3802 demand_empty_rest_of_line ();
3803}
3804
3805/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3806
3807static void
3808ppc_ec (ignore)
5480ccf3 3809 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3810{
3811 symbolS *sym;
3812
3813 sym = symbol_make (".ec");
3814 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3815 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3816 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3817 S_SET_VALUE (sym, 0);
809ffe0d 3818 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3819
3820 ppc_frob_label (sym);
3821
3822 demand_empty_rest_of_line ();
3823}
3824
3825/* The .toc pseudo-op. Switch to the .toc subsegment. */
3826
3827static void
3828ppc_toc (ignore)
5480ccf3 3829 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3830{
3831 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3832 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3833 else
3834 {
3835 subsegT subseg;
3836 symbolS *sym;
3837 symbolS *list;
81d4177b 3838
252b5132
RH		 3839 subseg = ppc_data_subsegment;
3840 ++ppc_data_subsegment;
3841
3842 subseg_new (segment_name (data_section), subseg);
3843 ppc_toc_frag = frag_now;
3844
3845 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3846 symbol_set_frag (sym, frag_now);
252b5132
RH		 3847 S_SET_SEGMENT (sym, data_section);
3848 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3849 symbol_get_tc (sym)->subseg = subseg;
3850 symbol_get_tc (sym)->output = 1;
3851 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3852
3853 ppc_toc_csect = sym;
81d4177b 3854
252b5132 3855 for (list = ppc_data_csects;
809ffe0d
ILT		 3856 symbol_get_tc (list)->next != (symbolS *) NULL;
3857 list = symbol_get_tc (list)->next)
252b5132 3858 ;
809ffe0d 3859 symbol_get_tc (list)->next = sym;
252b5132
RH		 3860
3861 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3862 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3863 &symbol_lastP);
252b5132
RH		 3864 }
3865
3866 ppc_current_csect = ppc_toc_csect;
3867
3868 demand_empty_rest_of_line ();
3869}
3870
3871/* The AIX assembler automatically aligns the operands of a .long or
3872 .short pseudo-op, and we want to be compatible. */
3873
3874static void
3875ppc_xcoff_cons (log_size)
3876 int log_size;
3877{
3878 frag_align (log_size, 0, 0);
3879 record_alignment (now_seg, log_size);
3880 cons (1 << log_size);
3881}
3882
3883static void
3884ppc_vbyte (dummy)
5480ccf3 3885 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3886{
3887 expressionS exp;
3888 int byte_count;
3889
3890 (void) expression (&exp);
3891
3892 if (exp.X_op != O_constant)
3893 {
3894 as_bad (_("non-constant byte count"));
3895 return;
3896 }
3897
3898 byte_count = exp.X_add_number;
3899
3900 if (*input_line_pointer != ',')
3901 {
3902 as_bad (_("missing value"));
3903 return;
3904 }
3905
3906 ++input_line_pointer;
3907 cons (byte_count);
3908}
3909
3910#endif /* OBJ_XCOFF */
0baf16f2 3911#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3912\f
3913/* The .tc pseudo-op. This is used when generating either XCOFF or
3914 ELF. This takes two or more arguments.
3915
3916 When generating XCOFF output, the first argument is the name to
3917 give to this location in the toc; this will be a symbol with class
0baf16f2 3918 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3919 this location in the TOC; often there is just one more argument, a
1049f94e 3920 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3921 depends on target word size. A 32-bit target uses 4-byte values, a
3922 64-bit target uses 8-byte values.
252b5132
RH		 3923
3924 When not generating XCOFF output, the arguments are the same, but
3925 the first argument is simply ignored. */
3926
3927static void
3928ppc_tc (ignore)
92161534 3929 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3930{
3931#ifdef OBJ_XCOFF
3932
3933 /* Define the TOC symbol name. */
3934 {
3935 char *name;
3936 char endc;
3937 symbolS *sym;
3938
3939 if (ppc_toc_csect == (symbolS *) NULL
3940 || ppc_toc_csect != ppc_current_csect)
3941 {
3942 as_bad (_(".tc not in .toc section"));
3943 ignore_rest_of_line ();
3944 return;
3945 }
3946
3947 name = input_line_pointer;
3948 endc = get_symbol_end ();
3949
3950 sym = symbol_find_or_make (name);
3951
3952 *input_line_pointer = endc;
3953
3954 if (S_IS_DEFINED (sym))
3955 {
3956 symbolS *label;
3957
809ffe0d
ILT		 3958 label = symbol_get_tc (ppc_current_csect)->within;
3959 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3960 {
3961 as_bad (_(".tc with no label"));
3962 ignore_rest_of_line ();
3963 return;
3964 }
3965
3966 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3967 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3968 S_SET_VALUE (label, S_GET_VALUE (sym));
3969
3970 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3971 ++input_line_pointer;
3972
3973 return;
3974 }
3975
3976 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3977 symbol_set_frag (sym, frag_now);
252b5132 3978 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3979 symbol_get_tc (sym)->class = XMC_TC;
3980 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3981
3982 ppc_frob_label (sym);
3983 }
3984
0baf16f2
AM		 3985#endif /* OBJ_XCOFF */
3986#ifdef OBJ_ELF
9c7977b3 3987 int align;
252b5132
RH		 3988
3989 /* Skip the TOC symbol name. */
3990 while (is_part_of_name (*input_line_pointer)
3991 || *input_line_pointer == '['
3992 || *input_line_pointer == ']'
3993 || *input_line_pointer == '{'
3994 || *input_line_pointer == '}')
3995 ++input_line_pointer;
3996
0baf16f2 3997 /* Align to a four/eight byte boundary. */
2b3c4602 3998 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 3999 frag_align (align, 0, 0);
4000 record_alignment (now_seg, align);
0baf16f2 4001#endif /* OBJ_ELF */
252b5132
RH		 4002
4003 if (*input_line_pointer != ',')
4004 demand_empty_rest_of_line ();
4005 else
4006 {
4007 ++input_line_pointer;
2b3c4602 4008 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4009 }
4010}
0baf16f2
AM		 4011
4012/* Pseudo-op .machine. */
0baf16f2
AM		 4013
4014static void
4015ppc_machine (ignore)
4016 int ignore ATTRIBUTE_UNUSED;
4017{
69c040df
AM		 4018 char *cpu_string;
4019#define MAX_HISTORY 100
4020 static unsigned long *cpu_history;
4021 static int curr_hist;
4022
4023 SKIP_WHITESPACE ();
4024
4025 if (*input_line_pointer == '"')
4026 {
4027 int len;
4028 cpu_string = demand_copy_C_string (&len);
4029 }
4030 else
4031 {
4032 char c;
4033 cpu_string = input_line_pointer;
4034 c = get_symbol_end ();
4035 cpu_string = xstrdup (cpu_string);
4036 *input_line_pointer = c;
4037 }
4038
4039 if (cpu_string != NULL)
4040 {
4041 unsigned long old_cpu = ppc_cpu;
4042 char *p;
4043
4044 for (p = cpu_string; *p != 0; p++)
4045 *p = TOLOWER (*p);
4046
4047 if (strcmp (cpu_string, "push") == 0)
4048 {
4049 if (cpu_history == NULL)
4050 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4051
4052 if (curr_hist >= MAX_HISTORY)
4053 as_bad (_(".machine stack overflow"));
4054 else
4055 cpu_history[curr_hist++] = ppc_cpu;
4056 }
4057 else if (strcmp (cpu_string, "pop") == 0)
4058 {
4059 if (curr_hist <= 0)
4060 as_bad (_(".machine stack underflow"));
4061 else
4062 ppc_cpu = cpu_history[--curr_hist];
4063 }
4064 else if (parse_cpu (cpu_string))
4065 ;
4066 else
4067 as_bad (_("invalid machine `%s'"), cpu_string);
4068
4069 if (ppc_cpu != old_cpu)
4070 ppc_setup_opcodes ();
4071 }
4072
4073 demand_empty_rest_of_line ();
0baf16f2
AM		 4074}
4075
4076/* See whether a symbol is in the TOC section. */
4077
4078static int
4079ppc_is_toc_sym (sym)
4080 symbolS *sym;
4081{
4082#ifdef OBJ_XCOFF
4083 return symbol_get_tc (sym)->class == XMC_TC;
4084#endif
4085#ifdef OBJ_ELF
4086 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4087 if (ppc_obj64)
0baf16f2
AM		 4088 return strcmp (sname, ".toc") == 0;
4089 else
4090 return strcmp (sname, ".got") == 0;
4091#endif
4092}
4093#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4094\f
4095#ifdef TE_PE
4096
99a814a1 4097/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4098
4099/* Set the current section. */
4100static void
4101ppc_set_current_section (new)
4102 segT new;
4103{
4104 ppc_previous_section = ppc_current_section;
4105 ppc_current_section = new;
4106}
4107
4108/* pseudo-op: .previous
4109 behaviour: toggles the current section with the previous section.
4110 errors: None
99a814a1
AM		 4111 warnings: "No previous section" */
4112
252b5132 4113static void
99a814a1 4114ppc_previous (ignore)
5480ccf3 4115 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4116{
4117 symbolS *tmp;
4118
81d4177b 4119 if (ppc_previous_section == NULL)
252b5132 4120 {
99a814a1 4121 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4122 return;
4123 }
4124
99a814a1 4125 subseg_set (ppc_previous_section, 0);
252b5132 4126
99a814a1 4127 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4128}
4129
4130/* pseudo-op: .pdata
4131 behaviour: predefined read only data section
b34976b6 4132 double word aligned
252b5132
RH		 4133 errors: None
4134 warnings: None
4135 initial: .section .pdata "adr3"
b34976b6 4136 a - don't know -- maybe a misprint
252b5132
RH		 4137 d - initialized data
4138 r - readable
4139 3 - double word aligned (that would be 4 byte boundary)
4140
4141 commentary:
4142 Tag index tables (also known as the function table) for exception
99a814a1 4143 handling, debugging, etc. */
252b5132 4144
252b5132 4145static void
99a814a1 4146ppc_pdata (ignore)
5480ccf3 4147 int ignore ATTRIBUTE_UNUSED;
252b5132 4148{
81d4177b 4149 if (pdata_section == 0)
252b5132
RH		 4150 {
4151 pdata_section = subseg_new (".pdata", 0);
81d4177b 4152
252b5132
RH		 4153 bfd_set_section_flags (stdoutput, pdata_section,
4154 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4155 | SEC_READONLY | SEC_DATA ));
81d4177b 4156
252b5132
RH		 4157 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4158 }
4159 else
4160 {
99a814a1 4161 pdata_section = subseg_new (".pdata", 0);
252b5132 4162 }
99a814a1 4163 ppc_set_current_section (pdata_section);
252b5132
RH		 4164}
4165
4166/* pseudo-op: .ydata
4167 behaviour: predefined read only data section
b34976b6 4168 double word aligned
252b5132
RH		 4169 errors: None
4170 warnings: None
4171 initial: .section .ydata "drw3"
b34976b6 4172 a - don't know -- maybe a misprint
252b5132
RH		 4173 d - initialized data
4174 r - readable
4175 3 - double word aligned (that would be 4 byte boundary)
4176 commentary:
4177 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4178 debugging, etc. */
4179
252b5132 4180static void
99a814a1 4181ppc_ydata (ignore)
5480ccf3 4182 int ignore ATTRIBUTE_UNUSED;
252b5132 4183{
81d4177b 4184 if (ydata_section == 0)
252b5132
RH		 4185 {
4186 ydata_section = subseg_new (".ydata", 0);
4187 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4188 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4189 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4190
4191 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4192 }
4193 else
4194 {
4195 ydata_section = subseg_new (".ydata", 0);
4196 }
99a814a1 4197 ppc_set_current_section (ydata_section);
252b5132
RH		 4198}
4199
4200/* pseudo-op: .reldata
4201 behaviour: predefined read write data section
b34976b6 4202 double word aligned (4-byte)
252b5132
RH		 4203 FIXME: relocation is applied to it
4204 FIXME: what's the difference between this and .data?
4205 errors: None
4206 warnings: None
4207 initial: .section .reldata "drw3"
4208 d - initialized data
4209 r - readable
4210 w - writeable
4211 3 - double word aligned (that would be 8 byte boundary)
4212
4213 commentary:
4214 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4215 function descriptors, etc. */
4216
252b5132 4217static void
99a814a1 4218ppc_reldata (ignore)
5480ccf3 4219 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4220{
4221 if (reldata_section == 0)
4222 {
4223 reldata_section = subseg_new (".reldata", 0);
4224
4225 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4226 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4227 | SEC_DATA));
252b5132
RH		 4228
4229 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4230 }
4231 else
4232 {
4233 reldata_section = subseg_new (".reldata", 0);
4234 }
99a814a1 4235 ppc_set_current_section (reldata_section);
252b5132
RH		 4236}
4237
4238/* pseudo-op: .rdata
4239 behaviour: predefined read only data section
b34976b6 4240 double word aligned
252b5132
RH		 4241 errors: None
4242 warnings: None
4243 initial: .section .rdata "dr3"
4244 d - initialized data
4245 r - readable
99a814a1
AM		 4246 3 - double word aligned (that would be 4 byte boundary) */
4247
252b5132 4248static void
99a814a1 4249ppc_rdata (ignore)
5480ccf3 4250 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4251{
4252 if (rdata_section == 0)
4253 {
4254 rdata_section = subseg_new (".rdata", 0);
4255 bfd_set_section_flags (stdoutput, rdata_section,
4256 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4257 | SEC_READONLY | SEC_DATA ));
4258
4259 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4260 }
4261 else
4262 {
4263 rdata_section = subseg_new (".rdata", 0);
4264 }
99a814a1 4265 ppc_set_current_section (rdata_section);
252b5132
RH		 4266}
4267
4268/* pseudo-op: .ualong
81d4177b 4269 behaviour: much like .int, with the exception that no alignment is
b34976b6 4270 performed.
252b5132
RH		 4271 FIXME: test the alignment statement
4272 errors: None
99a814a1
AM		 4273 warnings: None */
4274
252b5132 4275static void
99a814a1 4276ppc_ualong (ignore)
5480ccf3 4277 int ignore ATTRIBUTE_UNUSED;
252b5132 4278{
99a814a1
AM		 4279 /* Try for long. */
4280 cons (4);
252b5132
RH		 4281}
4282
4283/* pseudo-op: .znop <symbol name>
4284 behaviour: Issue a nop instruction
b34976b6 4285 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4286 the supplied symbol name.
4287 errors: None
99a814a1
AM		 4288 warnings: Missing symbol name */
4289
252b5132 4290static void
99a814a1 4291ppc_znop (ignore)
5480ccf3 4292 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4293{
4294 unsigned long insn;
4295 const struct powerpc_opcode *opcode;
4296 expressionS ex;
4297 char *f;
252b5132 4298 symbolS *sym;
252b5132
RH		 4299 char *symbol_name;
4300 char c;
4301 char *name;
4302 unsigned int exp;
4303 flagword flags;
4304 asection *sec;
4305
99a814a1 4306 /* Strip out the symbol name. */
252b5132
RH		 4307 symbol_name = input_line_pointer;
4308 c = get_symbol_end ();
4309
4310 name = xmalloc (input_line_pointer - symbol_name + 1);
4311 strcpy (name, symbol_name);
4312
4313 sym = symbol_find_or_make (name);
4314
4315 *input_line_pointer = c;
4316
4317 SKIP_WHITESPACE ();
4318
4319 /* Look up the opcode in the hash table. */
4320 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4321
99a814a1 4322 /* Stick in the nop. */
252b5132
RH		 4323 insn = opcode->opcode;
4324
4325 /* Write out the instruction. */
4326 f = frag_more (4);
4327 md_number_to_chars (f, insn, 4);
4328 fix_new (frag_now,
4329 f - frag_now->fr_literal,
4330 4,
4331 sym,
4332 0,
4333 0,
4334 BFD_RELOC_16_GOT_PCREL);
4335
4336}
4337
81d4177b
KH		 4338/* pseudo-op:
4339 behaviour:
4340 errors:
99a814a1
AM		 4341 warnings: */
4342
252b5132 4343static void
99a814a1 4344ppc_pe_comm (lcomm)
252b5132
RH		 4345 int lcomm;
4346{
4347 register char *name;
4348 register char c;
4349 register char *p;
4350 offsetT temp;
4351 register symbolS *symbolP;
4352 offsetT align;
4353
4354 name = input_line_pointer;
4355 c = get_symbol_end ();
4356
99a814a1 4357 /* just after name is now '\0'. */
252b5132
RH		 4358 p = input_line_pointer;
4359 *p = c;
4360 SKIP_WHITESPACE ();
4361 if (*input_line_pointer != ',')
4362 {
4363 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4364 ignore_rest_of_line ();
4365 return;
4366 }
4367
4368 input_line_pointer++; /* skip ',' */
4369 if ((temp = get_absolute_expression ()) < 0)
4370 {
4371 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4372 ignore_rest_of_line ();
4373 return;
4374 }
4375
4376 if (! lcomm)
4377 {
4378 /* The third argument to .comm is the alignment. */
4379 if (*input_line_pointer != ',')
4380 align = 3;
4381 else
4382 {
4383 ++input_line_pointer;
4384 align = get_absolute_expression ();
4385 if (align <= 0)
4386 {
4387 as_warn (_("ignoring bad alignment"));
4388 align = 3;
4389 }
4390 }
4391 }
4392
4393 *p = 0;
4394 symbolP = symbol_find_or_make (name);
4395
4396 *p = c;
4397 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4398 {
4399 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4400 S_GET_NAME (symbolP));
4401 ignore_rest_of_line ();
4402 return;
4403 }
4404
4405 if (S_GET_VALUE (symbolP))
4406 {
4407 if (S_GET_VALUE (symbolP) != (valueT) temp)
4408 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4409 S_GET_NAME (symbolP),
4410 (long) S_GET_VALUE (symbolP),
4411 (long) temp);
4412 }
4413 else
4414 {
4415 S_SET_VALUE (symbolP, (valueT) temp);
4416 S_SET_EXTERNAL (symbolP);
4417 }
4418
4419 demand_empty_rest_of_line ();
4420}
4421
4422/*
4423 * implement the .section pseudo op:
4424 * .section name {, "flags"}
4425 * ^ ^
4426 * | +--- optional flags: 'b' for bss
4427 * | 'i' for info
4428 * +-- section name 'l' for lib
4429 * 'n' for noload
4430 * 'o' for over
4431 * 'w' for data
4432 * 'd' (apparently m88k for data)
4433 * 'x' for text
4434 * But if the argument is not a quoted string, treat it as a
4435 * subsegment number.
4436 *
4437 * FIXME: this is a copy of the section processing from obj-coff.c, with
4438 * additions/changes for the moto-pas assembler support. There are three
4439 * categories:
4440 *
81d4177b 4441 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4442 * setting bits that bfd probably neither understands or uses. The
4443 * correct approach (?) will have to incorporate extra fields attached
4444 * to the section to hold the system specific stuff. (krk)
4445 *
4446 * Section Contents:
4447 * 'a' - unknown - referred to in documentation, but no definition supplied
4448 * 'c' - section has code
4449 * 'd' - section has initialized data
4450 * 'u' - section has uninitialized data
4451 * 'i' - section contains directives (info)
4452 * 'n' - section can be discarded
4453 * 'R' - remove section at link time
4454 *
4455 * Section Protection:
4456 * 'r' - section is readable
4457 * 'w' - section is writeable
4458 * 'x' - section is executable
4459 * 's' - section is sharable
4460 *
4461 * Section Alignment:
4462 * '0' - align to byte boundary
4463 * '1' - align to halfword undary
4464 * '2' - align to word boundary
4465 * '3' - align to doubleword boundary
4466 * '4' - align to quadword boundary
4467 * '5' - align to 32 byte boundary
4468 * '6' - align to 64 byte boundary
4469 *
4470 */
4471
4472void
4473ppc_pe_section (ignore)
5480ccf3 4474 int ignore ATTRIBUTE_UNUSED;
252b5132 4475{
99a814a1 4476 /* Strip out the section name. */
252b5132
RH		 4477 char *section_name;
4478 char c;
4479 char *name;
4480 unsigned int exp;
4481 flagword flags;
4482 segT sec;
4483 int align;
4484
4485 section_name = input_line_pointer;
4486 c = get_symbol_end ();
4487
4488 name = xmalloc (input_line_pointer - section_name + 1);
4489 strcpy (name, section_name);
4490
4491 *input_line_pointer = c;
4492
4493 SKIP_WHITESPACE ();
4494
4495 exp = 0;
4496 flags = SEC_NO_FLAGS;
4497
4498 if (strcmp (name, ".idata$2") == 0)
4499 {
4500 align = 0;
4501 }
4502 else if (strcmp (name, ".idata$3") == 0)
4503 {
4504 align = 0;
4505 }
4506 else if (strcmp (name, ".idata$4") == 0)
4507 {
4508 align = 2;
4509 }
4510 else if (strcmp (name, ".idata$5") == 0)
4511 {
4512 align = 2;
4513 }
4514 else if (strcmp (name, ".idata$6") == 0)
4515 {
4516 align = 1;
4517 }
4518 else
99a814a1
AM		 4519 /* Default alignment to 16 byte boundary. */
4520 align = 4;
252b5132
RH		 4521
4522 if (*input_line_pointer == ',')
4523 {
4524 ++input_line_pointer;
4525 SKIP_WHITESPACE ();
4526 if (*input_line_pointer != '"')
4527 exp = get_absolute_expression ();
4528 else
4529 {
4530 ++input_line_pointer;
4531 while (*input_line_pointer != '"'
4532 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4533 {
4534 switch (*input_line_pointer)
4535 {
4536 /* Section Contents */
4537 case 'a': /* unknown */
4538 as_bad (_("Unsupported section attribute -- 'a'"));
4539 break;
4540 case 'c': /* code section */
81d4177b 4541 flags |= SEC_CODE;
252b5132
RH		 4542 break;
4543 case 'd': /* section has initialized data */
4544 flags |= SEC_DATA;
4545 break;
4546 case 'u': /* section has uninitialized data */
4547 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4548 in winnt.h */
4549 flags |= SEC_ROM;
4550 break;
4551 case 'i': /* section contains directives (info) */
4552 /* FIXME: This is IMAGE_SCN_LNK_INFO
4553 in winnt.h */
4554 flags |= SEC_HAS_CONTENTS;
4555 break;
4556 case 'n': /* section can be discarded */
81d4177b 4557 flags &=~ SEC_LOAD;
252b5132
RH		 4558 break;
4559 case 'R': /* Remove section at link time */
4560 flags |= SEC_NEVER_LOAD;
4561 break;
4562
4563 /* Section Protection */
4564 case 'r': /* section is readable */
4565 flags |= IMAGE_SCN_MEM_READ;
4566 break;
4567 case 'w': /* section is writeable */
4568 flags |= IMAGE_SCN_MEM_WRITE;
4569 break;
4570 case 'x': /* section is executable */
4571 flags |= IMAGE_SCN_MEM_EXECUTE;
4572 break;
4573 case 's': /* section is sharable */
4574 flags |= IMAGE_SCN_MEM_SHARED;
4575 break;
4576
4577 /* Section Alignment */
4578 case '0': /* align to byte boundary */
4579 flags |= IMAGE_SCN_ALIGN_1BYTES;
4580 align = 0;
4581 break;
4582 case '1': /* align to halfword boundary */
4583 flags |= IMAGE_SCN_ALIGN_2BYTES;
4584 align = 1;
4585 break;
4586 case '2': /* align to word boundary */
4587 flags |= IMAGE_SCN_ALIGN_4BYTES;
4588 align = 2;
4589 break;
4590 case '3': /* align to doubleword boundary */
4591 flags |= IMAGE_SCN_ALIGN_8BYTES;
4592 align = 3;
4593 break;
4594 case '4': /* align to quadword boundary */
4595 flags |= IMAGE_SCN_ALIGN_16BYTES;
4596 align = 4;
4597 break;
4598 case '5': /* align to 32 byte boundary */
4599 flags |= IMAGE_SCN_ALIGN_32BYTES;
4600 align = 5;
4601 break;
4602 case '6': /* align to 64 byte boundary */
4603 flags |= IMAGE_SCN_ALIGN_64BYTES;
4604 align = 6;
4605 break;
4606
4607 default:
99a814a1
AM		 4608 as_bad (_("unknown section attribute '%c'"),
4609 *input_line_pointer);
252b5132
RH		 4610 break;
4611 }
4612 ++input_line_pointer;
4613 }
4614 if (*input_line_pointer == '"')
4615 ++input_line_pointer;
4616 }
4617 }
4618
4619 sec = subseg_new (name, (subsegT) exp);
4620
99a814a1 4621 ppc_set_current_section (sec);
252b5132
RH		 4622
4623 if (flags != SEC_NO_FLAGS)
4624 {
4625 if (! bfd_set_section_flags (stdoutput, sec, flags))
4626 as_bad (_("error setting flags for \"%s\": %s"),
4627 bfd_section_name (stdoutput, sec),
4628 bfd_errmsg (bfd_get_error ()));
4629 }
4630
99a814a1 4631 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4632
4633}
4634
4635static void
4636ppc_pe_function (ignore)
5480ccf3 4637 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4638{
4639 char *name;
4640 char endc;
4641 symbolS *ext_sym;
4642
4643 name = input_line_pointer;
4644 endc = get_symbol_end ();
4645
4646 ext_sym = symbol_find_or_make (name);
4647
4648 *input_line_pointer = endc;
4649
4650 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4651 SF_SET_FUNCTION (ext_sym);
4652 SF_SET_PROCESS (ext_sym);
4653 coff_add_linesym (ext_sym);
4654
4655 demand_empty_rest_of_line ();
4656}
4657
4658static void
4659ppc_pe_tocd (ignore)
5480ccf3 4660 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4661{
4662 if (tocdata_section == 0)
4663 {
4664 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4665 /* FIXME: section flags won't work. */
252b5132
RH		 4666 bfd_set_section_flags (stdoutput, tocdata_section,
4667 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4668 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4669
4670 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4671 }
4672 else
4673 {
4674 rdata_section = subseg_new (".tocd", 0);
4675 }
4676
99a814a1 4677 ppc_set_current_section (tocdata_section);
252b5132
RH		 4678
4679 demand_empty_rest_of_line ();
4680}
4681
4682/* Don't adjust TOC relocs to use the section symbol. */
4683
4684int
4685ppc_pe_fix_adjustable (fix)
4686 fixS *fix;
4687{
4688 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4689}
4690
4691#endif
4692\f
4693#ifdef OBJ_XCOFF
4694
4695/* XCOFF specific symbol and file handling. */
4696
4697/* Canonicalize the symbol name. We use the to force the suffix, if
4698 any, to use square brackets, and to be in upper case. */
4699
4700char *
4701ppc_canonicalize_symbol_name (name)
4702 char *name;
4703{
4704 char *s;
4705
4706 if (ppc_stab_symbol)
4707 return name;
4708
4709 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4710 ;
4711 if (*s != '\0')
4712 {
4713 char brac;
4714
4715 if (*s == '[')
4716 brac = ']';
4717 else
4718 {
4719 *s = '[';
4720 brac = '}';
4721 }
4722
4723 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4724 *s = TOUPPER (*s);
252b5132
RH		 4725
4726 if (*s == '\0' || s[1] != '\0')
4727 as_bad (_("bad symbol suffix"));
4728
4729 *s = ']';
4730 }
4731
4732 return name;
4733}
4734
4735/* Set the class of a symbol based on the suffix, if any. This is
4736 called whenever a new symbol is created. */
4737
4738void
4739ppc_symbol_new_hook (sym)
4740 symbolS *sym;
4741{
809ffe0d 4742 struct ppc_tc_sy *tc;
252b5132
RH		 4743 const char *s;
4744
809ffe0d
ILT		 4745 tc = symbol_get_tc (sym);
4746 tc->next = NULL;
4747 tc->output = 0;
4748 tc->class = -1;
4749 tc->real_name = NULL;
4750 tc->subseg = 0;
4751 tc->align = 0;
4752 tc->size = NULL;
4753 tc->within = NULL;
252b5132
RH		 4754
4755 if (ppc_stab_symbol)
4756 return;
4757
4758 s = strchr (S_GET_NAME (sym), '[');
4759 if (s == (const char *) NULL)
4760 {
4761 /* There is no suffix. */
4762 return;
4763 }
4764
4765 ++s;
4766
4767 switch (s[0])
4768 {
4769 case 'B':
4770 if (strcmp (s, "BS]") == 0)
809ffe0d 4771 tc->class = XMC_BS;
252b5132
RH		 4772 break;
4773 case 'D':
4774 if (strcmp (s, "DB]") == 0)
809ffe0d 4775 tc->class = XMC_DB;
252b5132 4776 else if (strcmp (s, "DS]") == 0)
809ffe0d 4777 tc->class = XMC_DS;
252b5132
RH		 4778 break;
4779 case 'G':
4780 if (strcmp (s, "GL]") == 0)
809ffe0d 4781 tc->class = XMC_GL;
252b5132
RH		 4782 break;
4783 case 'P':
4784 if (strcmp (s, "PR]") == 0)
809ffe0d 4785 tc->class = XMC_PR;
252b5132
RH		 4786 break;
4787 case 'R':
4788 if (strcmp (s, "RO]") == 0)
809ffe0d 4789 tc->class = XMC_RO;
252b5132 4790 else if (strcmp (s, "RW]") == 0)
809ffe0d 4791 tc->class = XMC_RW;
252b5132
RH		 4792 break;
4793 case 'S':
4794 if (strcmp (s, "SV]") == 0)
809ffe0d 4795 tc->class = XMC_SV;
252b5132
RH		 4796 break;
4797 case 'T':
4798 if (strcmp (s, "TC]") == 0)
809ffe0d 4799 tc->class = XMC_TC;
252b5132 4800 else if (strcmp (s, "TI]") == 0)
809ffe0d 4801 tc->class = XMC_TI;
252b5132 4802 else if (strcmp (s, "TB]") == 0)
809ffe0d 4803 tc->class = XMC_TB;
252b5132 4804 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4805 tc->class = XMC_TC0;
252b5132
RH		 4806 break;
4807 case 'U':
4808 if (strcmp (s, "UA]") == 0)
809ffe0d 4809 tc->class = XMC_UA;
252b5132 4810 else if (strcmp (s, "UC]") == 0)
809ffe0d 4811 tc->class = XMC_UC;
252b5132
RH		 4812 break;
4813 case 'X':
4814 if (strcmp (s, "XO]") == 0)
809ffe0d 4815 tc->class = XMC_XO;
252b5132
RH		 4816 break;
4817 }
4818
809ffe0d 4819 if (tc->class == -1)
252b5132
RH		 4820 as_bad (_("Unrecognized symbol suffix"));
4821}
4822
4823/* Set the class of a label based on where it is defined. This
4824 handles symbols without suffixes. Also, move the symbol so that it
4825 follows the csect symbol. */
4826
4827void
4828ppc_frob_label (sym)
4829 symbolS *sym;
4830{
4831 if (ppc_current_csect != (symbolS *) NULL)
4832 {
809ffe0d
ILT		 4833 if (symbol_get_tc (sym)->class == -1)
4834 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4835
4836 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4837 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4838 &symbol_rootP, &symbol_lastP);
4839 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4840 }
4841}
4842
4843/* This variable is set by ppc_frob_symbol if any absolute symbols are
4844 seen. It tells ppc_adjust_symtab whether it needs to look through
4845 the symbols. */
4846
b34976b6 4847static bfd_boolean ppc_saw_abs;
252b5132
RH		 4848
4849/* Change the name of a symbol just before writing it out. Set the
4850 real name if the .rename pseudo-op was used. Otherwise, remove any
4851 class suffix. Return 1 if the symbol should not be included in the
4852 symbol table. */
4853
4854int
4855ppc_frob_symbol (sym)
4856 symbolS *sym;
4857{
4858 static symbolS *ppc_last_function;
4859 static symbolS *set_end;
4860
4861 /* Discard symbols that should not be included in the output symbol
4862 table. */
809ffe0d
ILT		 4863 if (! symbol_used_in_reloc_p (sym)
4864 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4865 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4866 && ! symbol_get_tc (sym)->output
252b5132
RH		 4867 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4868 return 1;
4869
a161fe53
AM		 4870 /* This one will disappear anyway. Don't make a csect sym for it. */
4871 if (sym == abs_section_sym)
4872 return 1;
4873
809ffe0d
ILT		 4874 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4875 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4876 else
4877 {
4878 const char *name;
4879 const char *s;
4880
4881 name = S_GET_NAME (sym);
4882 s = strchr (name, '[');
4883 if (s != (char *) NULL)
4884 {
4885 unsigned int len;
4886 char *snew;
4887
4888 len = s - name;
4889 snew = xmalloc (len + 1);
4890 memcpy (snew, name, len);
4891 snew[len] = '\0';
4892
4893 S_SET_NAME (sym, snew);
4894 }
4895 }
4896
4897 if (set_end != (symbolS *) NULL)
4898 {
4899 SA_SET_SYM_ENDNDX (set_end, sym);
4900 set_end = NULL;
4901 }
4902
4903 if (SF_GET_FUNCTION (sym))
4904 {
4905 if (ppc_last_function != (symbolS *) NULL)
4906 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4907 ppc_last_function = sym;
809ffe0d 4908 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4909 {
6386f3a7 4910 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4911 SA_SET_SYM_FSIZE (sym,
4912 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4913 }
4914 }
4915 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4916 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4917 {
4918 if (ppc_last_function == (symbolS *) NULL)
4919 as_bad (_(".ef with no preceding .function"));
4920 else
4921 {
4922 set_end = ppc_last_function;
4923 ppc_last_function = NULL;
4924
4925 /* We don't have a C_EFCN symbol, but we need to force the
4926 COFF backend to believe that it has seen one. */
4927 coff_last_function = NULL;
4928 }
4929 }
4930
670ec21d 4931 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4932 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4933 && S_GET_STORAGE_CLASS (sym) != C_FILE
4934 && S_GET_STORAGE_CLASS (sym) != C_FCN
4935 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4936 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4937 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4938 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4939 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4940 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4941 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4942
4943 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4944 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4945 {
4946 int i;
4947 union internal_auxent *a;
4948
4949 /* Create a csect aux. */
4950 i = S_GET_NUMBER_AUXILIARY (sym);
4951 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4952 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4953 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4954 {
4955 /* This is the TOC table. */
4956 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4957 a->x_csect.x_scnlen.l = 0;
4958 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4959 }
809ffe0d 4960 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4961 {
4962 /* This is a csect symbol. x_scnlen is the size of the
4963 csect. */
809ffe0d 4964 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4965 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4966 S_GET_SEGMENT (sym))
4967 - S_GET_VALUE (sym));
4968 else
4969 {
6386f3a7 4970 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4971 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4972 - S_GET_VALUE (sym));
4973 }
809ffe0d 4974 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4975 }
4976 else if (S_GET_SEGMENT (sym) == bss_section)
4977 {
4978 /* This is a common symbol. */
809ffe0d
ILT		 4979 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4980 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4981 if (S_IS_EXTERNAL (sym))
809ffe0d 4982 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4983 else
809ffe0d 4984 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 4985 }
4986 else if (S_GET_SEGMENT (sym) == absolute_section)
4987 {
4988 /* This is an absolute symbol. The csect will be created by
99a814a1 4989 ppc_adjust_symtab. */
b34976b6 4990 ppc_saw_abs = TRUE;
252b5132 4991 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 4992 if (symbol_get_tc (sym)->class == -1)
4993 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 4994 }
4995 else if (! S_IS_DEFINED (sym))
4996 {
4997 /* This is an external symbol. */
4998 a->x_csect.x_scnlen.l = 0;
4999 a->x_csect.x_smtyp = XTY_ER;
5000 }
809ffe0d 5001 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5002 {
5003 symbolS *next;
5004
5005 /* This is a TOC definition. x_scnlen is the size of the
5006 TOC entry. */
5007 next = symbol_next (sym);
809ffe0d 5008 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5009 next = symbol_next (next);
5010 if (next == (symbolS *) NULL
809ffe0d 5011 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5012 {
5013 if (ppc_after_toc_frag == (fragS *) NULL)
5014 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5015 data_section)
5016 - S_GET_VALUE (sym));
5017 else
5018 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5019 - S_GET_VALUE (sym));
5020 }
5021 else
5022 {
6386f3a7 5023 resolve_symbol_value (next);
252b5132
RH		 5024 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5025 - S_GET_VALUE (sym));
5026 }
5027 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5028 }
5029 else
5030 {
5031 symbolS *csect;
5032
5033 /* This is a normal symbol definition. x_scnlen is the
5034 symbol index of the containing csect. */
5035 if (S_GET_SEGMENT (sym) == text_section)
5036 csect = ppc_text_csects;
5037 else if (S_GET_SEGMENT (sym) == data_section)
5038 csect = ppc_data_csects;
5039 else
5040 abort ();
5041
5042 /* Skip the initial dummy symbol. */
809ffe0d 5043 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5044
5045 if (csect == (symbolS *) NULL)
5046 {
5047 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5048 a->x_csect.x_scnlen.l = 0;
5049 }
5050 else
5051 {
809ffe0d 5052 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5053 {
6386f3a7 5054 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5055 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5056 > S_GET_VALUE (sym))
252b5132 5057 break;
809ffe0d 5058 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5059 }
5060
809ffe0d
ILT		 5061 a->x_csect.x_scnlen.p =
5062 coffsymbol (symbol_get_bfdsym (csect))->native;
5063 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5064 1;
252b5132
RH		 5065 }
5066 a->x_csect.x_smtyp = XTY_LD;
5067 }
81d4177b 5068
252b5132
RH		 5069 a->x_csect.x_parmhash = 0;
5070 a->x_csect.x_snhash = 0;
809ffe0d 5071 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5072 a->x_csect.x_smclas = XMC_PR;
5073 else
809ffe0d 5074 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5075 a->x_csect.x_stab = 0;
5076 a->x_csect.x_snstab = 0;
5077
5078 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5079 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5080 }
5081 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5082 {
5083 /* We want the value to be the symbol index of the referenced
5084 csect symbol. BFD will do that for us if we set the right
5085 flags. */
b782de16
AM		 5086 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5087 combined_entry_type *c = coffsymbol (bsym)->native;
5088
5089 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5090 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5091 }
5092 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5093 {
5094 symbolS *block;
5095 symbolS *csect;
5096
5097 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5098 block = symbol_get_tc (sym)->within;
5099 csect = symbol_get_tc (block)->within;
6386f3a7 5100 resolve_symbol_value (csect);
252b5132
RH		 5101 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5102 }
5103 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5104 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5105 {
5106 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5107 BFD will do that for us if we set the right flags. We have
5108 already set the value correctly. */
809ffe0d 5109 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5110 }
5111
5112 return 0;
5113}
5114
5115/* Adjust the symbol table. This creates csect symbols for all
5116 absolute symbols. */
5117
5118void
5119ppc_adjust_symtab ()
5120{
5121 symbolS *sym;
5122
5123 if (! ppc_saw_abs)
5124 return;
5125
5126 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5127 {
5128 symbolS *csect;
5129 int i;
5130 union internal_auxent *a;
5131
5132 if (S_GET_SEGMENT (sym) != absolute_section)
5133 continue;
5134
5135 csect = symbol_create (".abs[XO]", absolute_section,
5136 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5137 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5138 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5139 i = S_GET_NUMBER_AUXILIARY (csect);
5140 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5141 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5142 a->x_csect.x_scnlen.l = 0;
5143 a->x_csect.x_smtyp = XTY_SD;
5144 a->x_csect.x_parmhash = 0;
5145 a->x_csect.x_snhash = 0;
5146 a->x_csect.x_smclas = XMC_XO;
5147 a->x_csect.x_stab = 0;
5148 a->x_csect.x_snstab = 0;
5149
5150 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5151
5152 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5153 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5154 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5155 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5156 }
5157
b34976b6 5158 ppc_saw_abs = FALSE;
252b5132
RH		 5159}
5160
5161/* Set the VMA for a section. This is called on all the sections in
5162 turn. */
5163
5164void
5165ppc_frob_section (sec)
5166 asection *sec;
5167{
931e13a6 5168 static bfd_vma vma = 0;
252b5132 5169
931e13a6 5170 vma = md_section_align (sec, vma);
252b5132
RH		 5171 bfd_set_section_vma (stdoutput, sec, vma);
5172 vma += bfd_section_size (stdoutput, sec);
5173}
5174
5175#endif /* OBJ_XCOFF */
5176\f
5177/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5178 of type TYPE, and store the appropriate bytes in *LITP. The number
5179 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5180 returned, or NULL on OK. */
5181
5182char *
5183md_atof (type, litp, sizep)
5184 int type;
5185 char *litp;
5186 int *sizep;
5187{
5188 int prec;
5189 LITTLENUM_TYPE words[4];
5190 char *t;
5191 int i;
5192
5193 switch (type)
5194 {
5195 case 'f':
5196 prec = 2;
5197 break;
5198
5199 case 'd':
5200 prec = 4;
5201 break;
5202
5203 default:
5204 *sizep = 0;
5205 return _("bad call to md_atof");
5206 }
5207
5208 t = atof_ieee (input_line_pointer, type, words);
5209 if (t)
5210 input_line_pointer = t;
5211
5212 *sizep = prec * 2;
5213
5214 if (target_big_endian)
5215 {
5216 for (i = 0; i < prec; i++)
5217 {
5218 md_number_to_chars (litp, (valueT) words[i], 2);
5219 litp += 2;
5220 }
5221 }
5222 else
5223 {
5224 for (i = prec - 1; i >= 0; i--)
5225 {
5226 md_number_to_chars (litp, (valueT) words[i], 2);
5227 litp += 2;
5228 }
5229 }
81d4177b 5230
252b5132
RH		 5231 return NULL;
5232}
5233
5234/* Write a value out to the object file, using the appropriate
5235 endianness. */
5236
5237void
5238md_number_to_chars (buf, val, n)
5239 char *buf;
5240 valueT val;
5241 int n;
5242{
5243 if (target_big_endian)
5244 number_to_chars_bigendian (buf, val, n);
5245 else
5246 number_to_chars_littleendian (buf, val, n);
5247}
5248
5249/* Align a section (I don't know why this is machine dependent). */
5250
5251valueT
5252md_section_align (seg, addr)
5253 asection *seg;
5254 valueT addr;
5255{
5256 int align = bfd_get_section_alignment (stdoutput, seg);
5257
5258 return ((addr + (1 << align) - 1) & (-1 << align));
5259}
5260
5261/* We don't have any form of relaxing. */
5262
5263int
5264md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5265 fragS *fragp ATTRIBUTE_UNUSED;
5266 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5267{
5268 abort ();
5269 return 0;
5270}
5271
5272/* Convert a machine dependent frag. We never generate these. */
5273
5274void
5275md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5276 bfd *abfd ATTRIBUTE_UNUSED;
5277 asection *sec ATTRIBUTE_UNUSED;
5278 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5279{
5280 abort ();
5281}
5282
5283/* We have no need to default values of symbols. */
5284
252b5132
RH		 5285symbolS *
5286md_undefined_symbol (name)
92161534 5287 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5288{
5289 return 0;
5290}
5291\f
5292/* Functions concerning relocs. */
5293
5294/* The location from which a PC relative jump should be calculated,
5295 given a PC relative reloc. */
5296
5297long
5298md_pcrel_from_section (fixp, sec)
5299 fixS *fixp;
92161534 5300 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5301{
5302 return fixp->fx_frag->fr_address + fixp->fx_where;
5303}
5304
5305#ifdef OBJ_XCOFF
5306
5307/* This is called to see whether a fixup should be adjusted to use a
5308 section symbol. We take the opportunity to change a fixup against
5309 a symbol in the TOC subsegment into a reloc against the
5310 corresponding .tc symbol. */
5311
5312int
5313ppc_fix_adjustable (fix)
5314 fixS *fix;
5315{
b782de16
AM		 5316 valueT val = resolve_symbol_value (fix->fx_addsy);
5317 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5318 TC_SYMFIELD_TYPE *tc;
5319
5320 if (symseg == absolute_section)
5321 return 0;
252b5132 5322
252b5132 5323 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5324 && fix->fx_addsy != ppc_toc_csect
b782de16 5325 && symseg == data_section
252b5132
RH		 5326 && val >= ppc_toc_frag->fr_address
5327 && (ppc_after_toc_frag == (fragS *) NULL
5328 || val < ppc_after_toc_frag->fr_address))
5329 {
5330 symbolS *sy;
5331
5332 for (sy = symbol_next (ppc_toc_csect);
5333 sy != (symbolS *) NULL;
5334 sy = symbol_next (sy))
5335 {
b782de16
AM		 5336 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5337
5338 if (sy_tc->class == XMC_TC0)
252b5132 5339 continue;
b782de16 5340 if (sy_tc->class != XMC_TC)
252b5132 5341 break;
b782de16 5342 if (val == resolve_symbol_value (sy))
252b5132
RH		 5343 {
5344 fix->fx_addsy = sy;
5345 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5346 return 0;
5347 }
5348 }
5349
5350 as_bad_where (fix->fx_file, fix->fx_line,
5351 _("symbol in .toc does not match any .tc"));
5352 }
5353
5354 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5355 tc = symbol_get_tc (fix->fx_addsy);
5356 if (tc->subseg == 0
5357 && tc->class != XMC_TC0
5358 && tc->class != XMC_TC
5359 && symseg != bss_section
252b5132 5360 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5361 && (symseg != data_section
252b5132
RH		 5362 || ppc_toc_csect == NULL
5363 || val < ppc_toc_frag->fr_address
5364 || (ppc_after_toc_frag != NULL
5365 && val >= ppc_after_toc_frag->fr_address)))
5366 {
5367 symbolS *csect;
b782de16 5368 symbolS *next_csect;
252b5132 5369
b782de16 5370 if (symseg == text_section)
252b5132 5371 csect = ppc_text_csects;
b782de16 5372 else if (symseg == data_section)
252b5132
RH		 5373 csect = ppc_data_csects;
5374 else
5375 abort ();
5376
5377 /* Skip the initial dummy symbol. */
809ffe0d 5378 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5379
5380 if (csect != (symbolS *) NULL)
5381 {
b782de16
AM		 5382 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5383 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5384 {
5385 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5386 have to look through the full symbol table to see
5387 whether this is the csect we want. Note that we will
5388 only get here if the csect has zero length. */
b782de16
AM		 5389 if (symbol_get_frag (csect)->fr_address == val
5390 && S_GET_VALUE (csect) == val)
252b5132
RH		 5391 {
5392 symbolS *scan;
5393
809ffe0d 5394 for (scan = symbol_next (csect);
252b5132 5395 scan != NULL;
809ffe0d 5396 scan = symbol_next (scan))
252b5132 5397 {
809ffe0d 5398 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5399 break;
5400 if (scan == fix->fx_addsy)
5401 break;
5402 }
5403
5404 /* If we found the symbol before the next csect
99a814a1 5405 symbol, then this is the csect we want. */
252b5132
RH		 5406 if (scan == fix->fx_addsy)
5407 break;
5408 }
5409
b782de16 5410 csect = next_csect;
252b5132
RH		 5411 }
5412
b782de16 5413 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5414 fix->fx_addsy = csect;
5415 }
b782de16 5416 return 0;
252b5132
RH		 5417 }
5418
5419 /* Adjust a reloc against a .lcomm symbol to be against the base
5420 .lcomm. */
b782de16 5421 if (symseg == bss_section
252b5132
RH		 5422 && ! S_IS_EXTERNAL (fix->fx_addsy))
5423 {
b782de16
AM		 5424 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5425
5426 fix->fx_offset += val - resolve_symbol_value (sy);
5427 fix->fx_addsy = sy;
252b5132
RH		 5428 }
5429
5430 return 0;
5431}
5432
5433/* A reloc from one csect to another must be kept. The assembler
5434 will, of course, keep relocs between sections, and it will keep
5435 absolute relocs, but we need to force it to keep PC relative relocs
5436 between two csects in the same section. */
5437
5438int
5439ppc_force_relocation (fix)
5440 fixS *fix;
5441{
5442 /* At this point fix->fx_addsy should already have been converted to
5443 a csect symbol. If the csect does not include the fragment, then
5444 we need to force the relocation. */
5445 if (fix->fx_pcrel
5446 && fix->fx_addsy != NULL
809ffe0d
ILT		 5447 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5448 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5449 > fix->fx_frag->fr_address)
5450 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5451 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5452 <= fix->fx_frag->fr_address))))
5453 return 1;
5454
ae6063d4 5455 return generic_force_reloc (fix);
252b5132
RH		 5456}
5457
5458#endif /* OBJ_XCOFF */
5459
0baf16f2 5460#ifdef OBJ_ELF
a161fe53
AM		 5461/* If this function returns non-zero, it guarantees that a relocation
5462 will be emitted for a fixup. */
5463
5464int
5465ppc_force_relocation (fix)
5466 fixS *fix;
5467{
5468 /* Branch prediction relocations must force a relocation, as must
5469 the vtable description relocs. */
5470 switch (fix->fx_r_type)
5471 {
5472 case BFD_RELOC_PPC_B16_BRTAKEN:
5473 case BFD_RELOC_PPC_B16_BRNTAKEN:
5474 case BFD_RELOC_PPC_BA16_BRTAKEN:
5475 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5476 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5477 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5478 return 1;
5479 default:
5480 break;
5481 }
5482
cdba85ec
AM		 5483 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5484 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5485 return 1;
5486
ae6063d4 5487 return generic_force_reloc (fix);
a161fe53
AM		 5488}
5489
0baf16f2
AM		 5490int
5491ppc_fix_adjustable (fix)
5492 fixS *fix;
252b5132 5493{
0baf16f2
AM		 5494 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5495 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5496 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5497 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5498 && fix->fx_r_type != BFD_RELOC_GPREL16
5499 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5500 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5501 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5502 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5503}
0baf16f2 5504#endif
252b5132
RH		 5505
5506/* Apply a fixup to the object code. This is called for all the
5507 fixups we generated by the call to fix_new_exp, above. In the call
5508 above we used a reloc code which was the largest legal reloc code
5509 plus the operand index. Here we undo that to recover the operand
5510 index. At this point all symbol values should be fully resolved,
5511 and we attempt to completely resolve the reloc. If we can not do
5512 that, we determine the correct reloc code and put it back in the
5513 fixup. */
5514
94f592af 5515void
55cf6793 5516md_apply_fix (fixP, valP, seg)
94f592af
NC		 5517 fixS *fixP;
5518 valueT * valP;
0baf16f2 5519 segT seg ATTRIBUTE_UNUSED;
252b5132 5520{
94f592af 5521 valueT value = * valP;
252b5132
RH		 5522
5523#ifdef OBJ_ELF
94f592af 5524 if (fixP->fx_addsy != NULL)
252b5132 5525 {
a161fe53 5526 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5527 if (fixP->fx_pcrel)
5528 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5529 }
5530 else
94f592af 5531 fixP->fx_done = 1;
252b5132 5532#else
a161fe53 5533 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5534 the symbol values. If we are doing this relocation the code in
5535 write.c is going to call bfd_install_relocation, which is also
5536 going to use the symbol value. That means that if the reloc is
5537 fully resolved we want to use *valP since bfd_install_relocation is
5538 not being used.
252b5132 5539 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5540 *valP, and must use fx_offset instead. However, if the reloc
5541 is PC relative, we do want to use *valP since it includes the
252b5132 5542 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5543 if (fixP->fx_addsy == (symbolS *) NULL)
5544 fixP->fx_done = 1;
5545
5546 else if (fixP->fx_pcrel)
5547 ;
5548
252b5132 5549 else
a161fe53
AM		 5550 value = fixP->fx_offset;
5551#endif
5552
5553 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5554 {
a161fe53
AM		 5555 /* We can't actually support subtracting a symbol. */
5556 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5557 }
252b5132 5558
94f592af 5559 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5560 {
5561 int opindex;
5562 const struct powerpc_operand *operand;
5563 char *where;
5564 unsigned long insn;
5565
94f592af 5566 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5567
5568 operand = &powerpc_operands[opindex];
5569
5570#ifdef OBJ_XCOFF
0baf16f2
AM		 5571 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5572 does not generate a reloc. It uses the offset of `sym' within its
5573 csect. Other usages, such as `.long sym', generate relocs. This
5574 is the documented behaviour of non-TOC symbols. */
252b5132
RH		 5575 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5576 && operand->bits == 16
5577 && operand->shift == 0
2b3c4602 5578 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5579 && fixP->fx_addsy != NULL
5580 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5581 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5582 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5583 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5584 {
94f592af
NC		 5585 value = fixP->fx_offset;
5586 fixP->fx_done = 1;
252b5132
RH		 5587 }
5588#endif
5589
5590 /* Fetch the instruction, insert the fully resolved operand
5591 value, and stuff the instruction back again. */
94f592af 5592 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5593 if (target_big_endian)
5594 insn = bfd_getb32 ((unsigned char *) where);
5595 else
5596 insn = bfd_getl32 ((unsigned char *) where);
5597 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5598 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5599 if (target_big_endian)
5600 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5601 else
5602 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5603
94f592af
NC		 5604 if (fixP->fx_done)
5605 /* Nothing else to do here. */
5606 return;
252b5132 5607
94f592af 5608 assert (fixP->fx_addsy != NULL);
0baf16f2 5609
252b5132
RH		 5610 /* Determine a BFD reloc value based on the operand information.
5611 We are only prepared to turn a few of the operands into
0baf16f2 5612 relocs. */
11b37b7b
AM		 5613 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5614 && operand->bits == 26
5615 && operand->shift == 0)
94f592af 5616 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM		 5617 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5618 && operand->bits == 16
5619 && operand->shift == 0)
95210096
AM		 5620 {
5621 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5622#ifdef OBJ_XCOFF
5623 fixP->fx_size = 2;
5624 if (target_big_endian)
5625 fixP->fx_where += 2;
5626#endif
5627 }
11b37b7b
AM		 5628 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5629 && operand->bits == 26
5630 && operand->shift == 0)
94f592af 5631 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM		 5632 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5633 && operand->bits == 16
5634 && operand->shift == 0)
95210096
AM		 5635 {
5636 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5637#ifdef OBJ_XCOFF
5638 fixP->fx_size = 2;
5639 if (target_big_endian)
5640 fixP->fx_where += 2;
5641#endif
5642 }
0baf16f2 5643#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM		 5644 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5645 && operand->bits == 16
a7fc733f 5646 && operand->shift == 0)
11b37b7b 5647 {
a7fc733f
AM		 5648 if (ppc_is_toc_sym (fixP->fx_addsy))
5649 {
5650 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5651#ifdef OBJ_ELF
a7fc733f
AM		 5652 if (ppc_obj64
5653 && (operand->flags & PPC_OPERAND_DS) != 0)
5654 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5655#endif
5656 }
5657 else
5658 {
5659 fixP->fx_r_type = BFD_RELOC_16;
5660#ifdef OBJ_ELF
5661 if (ppc_obj64
5662 && (operand->flags & PPC_OPERAND_DS) != 0)
5663 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5664#endif
a7fc733f 5665 }
94f592af 5666 fixP->fx_size = 2;
11b37b7b 5667 if (target_big_endian)
94f592af 5668 fixP->fx_where += 2;
11b37b7b 5669 }
0baf16f2 5670#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5671 else
252b5132
RH		 5672 {
5673 char *sfile;
5674 unsigned int sline;
5675
5676 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5677 symbol. */
94f592af
NC		 5678 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5679 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5680 _("unresolved expression that must be resolved"));
5681 else
94f592af 5682 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5683 _("unsupported relocation against %s"),
94f592af
NC		 5684 S_GET_NAME (fixP->fx_addsy));
5685 fixP->fx_done = 1;
5686 return;
252b5132
RH		 5687 }
5688 }
5689 else
5690 {
5691#ifdef OBJ_ELF
94f592af 5692 ppc_elf_validate_fix (fixP, seg);
252b5132 5693#endif
94f592af 5694 switch (fixP->fx_r_type)
252b5132 5695 {
252b5132 5696 case BFD_RELOC_CTOR:
2b3c4602 5697 if (ppc_obj64)
9c7977b3
AM		 5698 goto ctor64;
5699 /* fall through */
5700
0baf16f2 5701 case BFD_RELOC_32:
94f592af
NC		 5702 if (fixP->fx_pcrel)
5703 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5704 /* fall through */
252b5132
RH		 5705
5706 case BFD_RELOC_RVA:
5707 case BFD_RELOC_32_PCREL:
252b5132 5708 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5709 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5710 value, 4);
5711 break;
5712
7f6d05e8 5713 case BFD_RELOC_64:
9c7977b3 5714 ctor64:
94f592af
NC		 5715 if (fixP->fx_pcrel)
5716 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5717 /* fall through */
0baf16f2 5718
7f6d05e8 5719 case BFD_RELOC_64_PCREL:
94f592af 5720 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5721 value, 8);
81d4177b 5722 break;
0baf16f2 5723
252b5132
RH		 5724 case BFD_RELOC_GPREL16:
5725 case BFD_RELOC_16_GOT_PCREL:
5726 case BFD_RELOC_16_GOTOFF:
5727 case BFD_RELOC_LO16_GOTOFF:
5728 case BFD_RELOC_HI16_GOTOFF:
5729 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5730 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5731 case BFD_RELOC_LO16_BASEREL:
5732 case BFD_RELOC_HI16_BASEREL:
5733 case BFD_RELOC_HI16_S_BASEREL:
5734 case BFD_RELOC_PPC_EMB_NADDR16:
5735 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5736 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5737 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5738 case BFD_RELOC_PPC_EMB_SDAI16:
5739 case BFD_RELOC_PPC_EMB_SDA2REL:
5740 case BFD_RELOC_PPC_EMB_SDA2I16:
5741 case BFD_RELOC_PPC_EMB_RELSEC16:
5742 case BFD_RELOC_PPC_EMB_RELST_LO:
5743 case BFD_RELOC_PPC_EMB_RELST_HI:
5744 case BFD_RELOC_PPC_EMB_RELST_HA:
5745 case BFD_RELOC_PPC_EMB_RELSDA:
5746 case BFD_RELOC_PPC_TOC16:
0baf16f2 5747#ifdef OBJ_ELF
0baf16f2
AM		 5748 case BFD_RELOC_PPC64_TOC16_LO:
5749 case BFD_RELOC_PPC64_TOC16_HI:
5750 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5751#endif
94f592af 5752 if (fixP->fx_pcrel)
252b5132 5753 {
94f592af
NC		 5754 if (fixP->fx_addsy != NULL)
5755 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5756 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5757 bfd_get_reloc_code_name (fixP->fx_r_type),
5758 S_GET_NAME (fixP->fx_addsy));
252b5132 5759 else
94f592af 5760 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5761 _("cannot emit PC relative %s relocation"),
94f592af 5762 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5763 }
5764
94f592af 5765 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5766 value, 2);
5767 break;
5768
3c9d25f4
AM		 5769 case BFD_RELOC_16:
5770 if (fixP->fx_pcrel)
5771 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5772 /* fall through */
5773
5774 case BFD_RELOC_16_PCREL:
5775 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5776 value, 2);
5777 break;
5778
5779 case BFD_RELOC_LO16:
5780 if (fixP->fx_pcrel)
5781 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5782 /* fall through */
5783
5784 case BFD_RELOC_LO16_PCREL:
5785 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5786 value, 2);
5787 break;
5788
252b5132
RH		 5789 /* This case happens when you write, for example,
5790 lis %r3,(L1-L2)@ha
5791 where L1 and L2 are defined later. */
5792 case BFD_RELOC_HI16:
94f592af 5793 if (fixP->fx_pcrel)
3c9d25f4
AM		 5794 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5795 /* fall through */
5796
5797 case BFD_RELOC_HI16_PCREL:
94f592af 5798 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5799 PPC_HI (value), 2);
252b5132 5800 break;
0baf16f2 5801
252b5132 5802 case BFD_RELOC_HI16_S:
94f592af 5803 if (fixP->fx_pcrel)
3c9d25f4
AM		 5804 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5805 /* fall through */
5806
5807 case BFD_RELOC_HI16_S_PCREL:
94f592af 5808 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5809 PPC_HA (value), 2);
5810 break;
5811
5812#ifdef OBJ_ELF
0baf16f2 5813 case BFD_RELOC_PPC64_HIGHER:
94f592af 5814 if (fixP->fx_pcrel)
0baf16f2 5815 abort ();
94f592af 5816 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5817 PPC_HIGHER (value), 2);
252b5132
RH		 5818 break;
5819
0baf16f2 5820 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5821 if (fixP->fx_pcrel)
0baf16f2 5822 abort ();
94f592af 5823 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5824 PPC_HIGHERA (value), 2);
5825 break;
5826
5827 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5828 if (fixP->fx_pcrel)
0baf16f2 5829 abort ();
94f592af 5830 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5831 PPC_HIGHEST (value), 2);
5832 break;
5833
5834 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5835 if (fixP->fx_pcrel)
0baf16f2 5836 abort ();
94f592af 5837 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5838 PPC_HIGHESTA (value), 2);
5839 break;
5840
5841 case BFD_RELOC_PPC64_ADDR16_DS:
5842 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5843 case BFD_RELOC_PPC64_GOT16_DS:
5844 case BFD_RELOC_PPC64_GOT16_LO_DS:
5845 case BFD_RELOC_PPC64_PLT16_LO_DS:
5846 case BFD_RELOC_PPC64_SECTOFF_DS:
5847 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5848 case BFD_RELOC_PPC64_TOC16_DS:
5849 case BFD_RELOC_PPC64_TOC16_LO_DS:
5850 case BFD_RELOC_PPC64_PLTGOT16_DS:
5851 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5852 if (fixP->fx_pcrel)
0baf16f2
AM		 5853 abort ();
5854 {
2132e3a3 5855 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5856 unsigned long val, mask;
0baf16f2
AM		 5857
5858 if (target_big_endian)
adadcc0c 5859 val = bfd_getb32 (where - 2);
0baf16f2 5860 else
adadcc0c
AM		 5861 val = bfd_getl32 (where);
5862 mask = 0xfffc;
5863 /* lq insns reserve the four lsbs. */
5864 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5865 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5866 mask = 0xfff0;
5867 val |= value & mask;
0baf16f2
AM		 5868 if (target_big_endian)
5869 bfd_putb16 ((bfd_vma) val, where);
5870 else
5871 bfd_putl16 ((bfd_vma) val, where);
5872 }
5873 break;
cdba85ec 5874
ba0b2174
AM		 5875 case BFD_RELOC_PPC_B16_BRTAKEN:
5876 case BFD_RELOC_PPC_B16_BRNTAKEN:
5877 case BFD_RELOC_PPC_BA16_BRTAKEN:
5878 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5879 break;
5880
cdba85ec 5881 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5882 break;
5883
cdba85ec
AM		 5884 case BFD_RELOC_PPC_DTPMOD:
5885 case BFD_RELOC_PPC_TPREL16:
5886 case BFD_RELOC_PPC_TPREL16_LO:
5887 case BFD_RELOC_PPC_TPREL16_HI:
5888 case BFD_RELOC_PPC_TPREL16_HA:
5889 case BFD_RELOC_PPC_TPREL:
5890 case BFD_RELOC_PPC_DTPREL16:
5891 case BFD_RELOC_PPC_DTPREL16_LO:
5892 case BFD_RELOC_PPC_DTPREL16_HI:
5893 case BFD_RELOC_PPC_DTPREL16_HA:
5894 case BFD_RELOC_PPC_DTPREL:
5895 case BFD_RELOC_PPC_GOT_TLSGD16:
5896 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5897 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5898 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5899 case BFD_RELOC_PPC_GOT_TLSLD16:
5900 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5901 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5902 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5903 case BFD_RELOC_PPC_GOT_TPREL16:
5904 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5905 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5906 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5907 case BFD_RELOC_PPC_GOT_DTPREL16:
5908 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5909 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5910 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5911 case BFD_RELOC_PPC64_TPREL16_DS:
5912 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5913 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5914 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5915 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5916 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5917 case BFD_RELOC_PPC64_DTPREL16_DS:
5918 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5919 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5920 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5921 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5922 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 5923 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 5924 break;
0baf16f2 5925#endif
252b5132 5926 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5927 bytes, rather than 2, so offset it here appropriately. */
252b5132 5928 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5929 if (fixP->fx_pcrel)
252b5132
RH		 5930 abort ();
5931
94f592af 5932 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5933 + ((target_big_endian) ? 2 : 0),
5934 value, 2);
5935 break;
5936
5937 case BFD_RELOC_8:
94f592af 5938 if (fixP->fx_pcrel)
31a91399
NC		 5939 {
5940 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 5941 ".byte <undefined_symbol> - ." */
31a91399
NC		 5942 if (fixP->fx_addsy)
5943 as_bad (_("Unable to handle reference to symbol %s"),
5944 S_GET_NAME (fixP->fx_addsy));
5945 else
5946 as_bad (_("Unable to resolve expression"));
5947 fixP->fx_done = 1;
5948 }
5949 else
5950 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5951 value, 1);
252b5132
RH		 5952 break;
5953
5954 case BFD_RELOC_24_PLT_PCREL:
5955 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5956 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5957 abort ();
5958
94f592af 5959 if (fixP->fx_done)
99a814a1
AM		 5960 {
5961 char *where;
5962 unsigned long insn;
5963
5964 /* Fetch the instruction, insert the fully resolved operand
5965 value, and stuff the instruction back again. */
94f592af 5966 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 5967 if (target_big_endian)
5968 insn = bfd_getb32 ((unsigned char *) where);
5969 else
5970 insn = bfd_getl32 ((unsigned char *) where);
5971 if ((value & 3) != 0)
94f592af 5972 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5973 _("must branch to an address a multiple of 4"));
5974 if ((offsetT) value < -0x40000000
5975 || (offsetT) value >= 0x40000000)
94f592af 5976 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5977 _("@local or @plt branch destination is too far away, %ld bytes"),
5978 (long) value);
5979 insn = insn | (value & 0x03fffffc);
5980 if (target_big_endian)
5981 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5982 else
5983 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5984 }
252b5132
RH		 5985 break;
5986
5987 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 5988 fixP->fx_done = 0;
5989 if (fixP->fx_addsy
5990 && !S_IS_DEFINED (fixP->fx_addsy)
5991 && !S_IS_WEAK (fixP->fx_addsy))
5992 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 5993 break;
5994
5995 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5996 fixP->fx_done = 0;
252b5132
RH		 5997 break;
5998
0baf16f2 5999#ifdef OBJ_ELF
0baf16f2
AM		 6000 /* Generated by reference to `sym@tocbase'. The sym is
6001 ignored by the linker. */
6002 case BFD_RELOC_PPC64_TOC:
94f592af 6003 fixP->fx_done = 0;
0baf16f2 6004 break;
0baf16f2 6005#endif
252b5132 6006 default:
bc805888 6007 fprintf (stderr,
94f592af 6008 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6009 fflush (stderr);
252b5132
RH		 6010 abort ();
6011 }
6012 }
6013
6014#ifdef OBJ_ELF
94f592af 6015 fixP->fx_addnumber = value;
4e6935a6
AM		 6016
6017 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6018 from the section contents. If we are going to be emitting a reloc
6019 then the section contents are immaterial, so don't warn if they
6020 happen to overflow. Leave such warnings to ld. */
6021 if (!fixP->fx_done)
6022 fixP->fx_no_overflow = 1;
252b5132 6023#else
94f592af
NC		 6024 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6025 fixP->fx_addnumber = 0;
252b5132
RH		 6026 else
6027 {
6028#ifdef TE_PE
94f592af 6029 fixP->fx_addnumber = 0;
252b5132
RH		 6030#else
6031 /* We want to use the offset within the data segment of the
6032 symbol, not the actual VMA of the symbol. */
94f592af
NC		 6033 fixP->fx_addnumber =
6034 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 6035#endif
6036 }
6037#endif
252b5132
RH		 6038}
6039
6040/* Generate a reloc for a fixup. */
6041
6042arelent *
6043tc_gen_reloc (seg, fixp)
92161534 6044 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 6045 fixS *fixp;
6046{
6047 arelent *reloc;
6048
6049 reloc = (arelent *) xmalloc (sizeof (arelent));
6050
49309057
ILT		 6051 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6052 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6053 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6054 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6055 if (reloc->howto == (reloc_howto_type *) NULL)
6056 {
6057 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6058 _("reloc %d not supported by object file format"),
6059 (int) fixp->fx_r_type);
252b5132
RH		 6060 return NULL;
6061 }
6062 reloc->addend = fixp->fx_addnumber;
6063
6064 return reloc;
6065}
75e21f08
JJ		 6066
6067void
6068ppc_cfi_frame_initial_instructions ()
6069{
6070 cfi_add_CFA_def_cfa (1, 0);
6071}
6072
6073int
6074tc_ppc_regname_to_dw2regnum (const char *regname)
6075{
6076 unsigned int regnum = -1;
6077 unsigned int i;
6078 const char *p;
6079 char *q;
6080 static struct { char *name; int dw2regnum; } regnames[] =
6081 {
6082 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6083 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6084 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6085 { "spe_acc", 111 }, { "spefscr", 112 }
6086 };
6087
6088 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6089 if (strcmp (regnames[i].name, regname) == 0)
6090 return regnames[i].dw2regnum;
6091
6092 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6093 {
6094 p = regname + 1 + (regname[1] == '.');
6095 regnum = strtoul (p, &q, 10);
6096 if (p == q || *q || regnum >= 32)
6097 return -1;
6098 if (regname[0] == 'f')
b7d7dc63 6099 regnum += 32;
75e21f08 6100 else if (regname[0] == 'v')
b7d7dc63 6101 regnum += 77;
75e21f08
JJ		 6102 }
6103 else if (regname[0] == 'c' && regname[1] == 'r')
6104 {
6105 p = regname + 2 + (regname[2] == '.');
6106 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6107 return -1;
75e21f08
JJ		 6108 regnum = p[0] - '0' + 68;
6109 }
6110 return regnum;
6111}
GDB Binutils - Deliverables
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