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[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
ae6063d4 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
2c1c4c62 3 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
81d4177b 21 02111-1307, USA. */
252b5132
RH		 22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132
RH		 26#include "subsegs.h"
27
28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 53#endif
54#endif
55
0baf16f2
AM		 56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM		 99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH		 101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
114static void ppc_change_csect PARAMS ((symbolS *));
115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
5ce8663f
NC		 185
186/* '+' and '-' can be used as postfix predicate predictors for conditional
187 branches. So they need to be accepted as symbol characters. */
188const char ppc_symbol_chars[] = "+-";
252b5132
RH		 189\f
190/* The target specific pseudo-ops which we support. */
191
192const pseudo_typeS md_pseudo_table[] =
193{
194 /* Pseudo-ops which must be overridden. */
195 { "byte", ppc_byte, 0 },
196
197#ifdef OBJ_XCOFF
198 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
199 legitimately belong in the obj-*.c file. However, XCOFF is based
200 on COFF, and is only implemented for the RS/6000. We just use
201 obj-coff.c, and add what we need here. */
202 { "comm", ppc_comm, 0 },
203 { "lcomm", ppc_comm, 1 },
204 { "bb", ppc_bb, 0 },
205 { "bc", ppc_bc, 0 },
206 { "bf", ppc_bf, 0 },
207 { "bi", ppc_biei, 0 },
208 { "bs", ppc_bs, 0 },
209 { "csect", ppc_csect, 0 },
210 { "data", ppc_section, 'd' },
211 { "eb", ppc_eb, 0 },
212 { "ec", ppc_ec, 0 },
213 { "ef", ppc_ef, 0 },
214 { "ei", ppc_biei, 1 },
215 { "es", ppc_es, 0 },
216 { "extern", ppc_extern, 0 },
217 { "function", ppc_function, 0 },
218 { "lglobl", ppc_lglobl, 0 },
219 { "rename", ppc_rename, 0 },
220 { "section", ppc_named_section, 0 },
221 { "stabx", ppc_stabx, 0 },
222 { "text", ppc_section, 't' },
223 { "toc", ppc_toc, 0 },
224 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 225 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 226 { "word", ppc_xcoff_cons, 1 },
227 { "short", ppc_xcoff_cons, 1 },
228 { "vbyte", ppc_vbyte, 0 },
229#endif
230
231#ifdef OBJ_ELF
0baf16f2
AM		 232 { "llong", ppc_elf_cons, 8 },
233 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 234 { "long", ppc_elf_cons, 4 },
235 { "word", ppc_elf_cons, 2 },
236 { "short", ppc_elf_cons, 2 },
237 { "rdata", ppc_elf_rdata, 0 },
238 { "rodata", ppc_elf_rdata, 0 },
239 { "lcomm", ppc_elf_lcomm, 0 },
2b3c4602 240 { "file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 },
5d6f4f16 241 { "loc", dwarf2_directive_loc, 0 },
252b5132
RH		 242#endif
243
244#ifdef TE_PE
99a814a1 245 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 246 { "previous", ppc_previous, 0 },
247 { "pdata", ppc_pdata, 0 },
248 { "ydata", ppc_ydata, 0 },
249 { "reldata", ppc_reldata, 0 },
250 { "rdata", ppc_rdata, 0 },
251 { "ualong", ppc_ualong, 0 },
252 { "znop", ppc_znop, 0 },
253 { "comm", ppc_pe_comm, 0 },
254 { "lcomm", ppc_pe_comm, 1 },
255 { "section", ppc_pe_section, 0 },
256 { "function", ppc_pe_function,0 },
257 { "tocd", ppc_pe_tocd, 0 },
258#endif
259
0baf16f2 260#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 261 { "tc", ppc_tc, 0 },
0baf16f2
AM		 262 { "machine", ppc_machine, 0 },
263#endif
252b5132
RH		 264
265 { NULL, NULL, 0 }
266};
267
268\f
99a814a1
AM		 269/* Predefined register names if -mregnames (or default for Windows NT).
270 In general, there are lots of them, in an attempt to be compatible
271 with a number of other Windows NT assemblers. */
252b5132
RH		 272
273/* Structure to hold information about predefined registers. */
274struct pd_reg
275 {
276 char *name;
277 int value;
278 };
279
280/* List of registers that are pre-defined:
281
282 Each general register has predefined names of the form:
283 1. r<reg_num> which has the value <reg_num>.
284 2. r.<reg_num> which has the value <reg_num>.
285
252b5132
RH		 286 Each floating point register has predefined names of the form:
287 1. f<reg_num> which has the value <reg_num>.
288 2. f.<reg_num> which has the value <reg_num>.
289
7a899fff
C		 290 Each vector unit register has predefined names of the form:
291 1. v<reg_num> which has the value <reg_num>.
292 2. v.<reg_num> which has the value <reg_num>.
293
252b5132
RH		 294 Each condition register has predefined names of the form:
295 1. cr<reg_num> which has the value <reg_num>.
296 2. cr.<reg_num> which has the value <reg_num>.
297
298 There are individual registers as well:
299 sp or r.sp has the value 1
300 rtoc or r.toc has the value 2
301 fpscr has the value 0
302 xer has the value 1
303 lr has the value 8
304 ctr has the value 9
305 pmr has the value 0
306 dar has the value 19
307 dsisr has the value 18
308 dec has the value 22
309 sdr1 has the value 25
310 srr0 has the value 26
311 srr1 has the value 27
312
81d4177b 313 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 314
315static const struct pd_reg pre_defined_registers[] =
316{
317 { "cr.0", 0 }, /* Condition Registers */
318 { "cr.1", 1 },
319 { "cr.2", 2 },
320 { "cr.3", 3 },
321 { "cr.4", 4 },
322 { "cr.5", 5 },
323 { "cr.6", 6 },
324 { "cr.7", 7 },
325
326 { "cr0", 0 },
327 { "cr1", 1 },
328 { "cr2", 2 },
329 { "cr3", 3 },
330 { "cr4", 4 },
331 { "cr5", 5 },
332 { "cr6", 6 },
333 { "cr7", 7 },
334
335 { "ctr", 9 },
336
337 { "dar", 19 }, /* Data Access Register */
338 { "dec", 22 }, /* Decrementer */
339 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
340
341 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 342 { "f.1", 1 },
343 { "f.10", 10 },
344 { "f.11", 11 },
345 { "f.12", 12 },
346 { "f.13", 13 },
347 { "f.14", 14 },
348 { "f.15", 15 },
349 { "f.16", 16 },
350 { "f.17", 17 },
351 { "f.18", 18 },
352 { "f.19", 19 },
353 { "f.2", 2 },
354 { "f.20", 20 },
355 { "f.21", 21 },
356 { "f.22", 22 },
357 { "f.23", 23 },
358 { "f.24", 24 },
359 { "f.25", 25 },
360 { "f.26", 26 },
361 { "f.27", 27 },
362 { "f.28", 28 },
363 { "f.29", 29 },
364 { "f.3", 3 },
252b5132
RH		 365 { "f.30", 30 },
366 { "f.31", 31 },
81d4177b
KH		 367 { "f.4", 4 },
368 { "f.5", 5 },
369 { "f.6", 6 },
370 { "f.7", 7 },
371 { "f.8", 8 },
372 { "f.9", 9 },
373
374 { "f0", 0 },
375 { "f1", 1 },
376 { "f10", 10 },
377 { "f11", 11 },
378 { "f12", 12 },
379 { "f13", 13 },
380 { "f14", 14 },
381 { "f15", 15 },
382 { "f16", 16 },
383 { "f17", 17 },
384 { "f18", 18 },
385 { "f19", 19 },
386 { "f2", 2 },
387 { "f20", 20 },
388 { "f21", 21 },
389 { "f22", 22 },
390 { "f23", 23 },
391 { "f24", 24 },
392 { "f25", 25 },
393 { "f26", 26 },
394 { "f27", 27 },
395 { "f28", 28 },
396 { "f29", 29 },
397 { "f3", 3 },
252b5132
RH		 398 { "f30", 30 },
399 { "f31", 31 },
81d4177b
KH		 400 { "f4", 4 },
401 { "f5", 5 },
402 { "f6", 6 },
403 { "f7", 7 },
404 { "f8", 8 },
405 { "f9", 9 },
252b5132
RH		 406
407 { "fpscr", 0 },
408
409 { "lr", 8 }, /* Link Register */
410
411 { "pmr", 0 },
412
413 { "r.0", 0 }, /* General Purpose Registers */
414 { "r.1", 1 },
415 { "r.10", 10 },
416 { "r.11", 11 },
417 { "r.12", 12 },
418 { "r.13", 13 },
419 { "r.14", 14 },
420 { "r.15", 15 },
421 { "r.16", 16 },
422 { "r.17", 17 },
423 { "r.18", 18 },
424 { "r.19", 19 },
425 { "r.2", 2 },
426 { "r.20", 20 },
427 { "r.21", 21 },
428 { "r.22", 22 },
429 { "r.23", 23 },
430 { "r.24", 24 },
431 { "r.25", 25 },
432 { "r.26", 26 },
433 { "r.27", 27 },
434 { "r.28", 28 },
435 { "r.29", 29 },
436 { "r.3", 3 },
437 { "r.30", 30 },
438 { "r.31", 31 },
439 { "r.4", 4 },
440 { "r.5", 5 },
441 { "r.6", 6 },
442 { "r.7", 7 },
443 { "r.8", 8 },
444 { "r.9", 9 },
445
446 { "r.sp", 1 }, /* Stack Pointer */
447
448 { "r.toc", 2 }, /* Pointer to the table of contents */
449
450 { "r0", 0 }, /* More general purpose registers */
451 { "r1", 1 },
452 { "r10", 10 },
453 { "r11", 11 },
454 { "r12", 12 },
455 { "r13", 13 },
456 { "r14", 14 },
457 { "r15", 15 },
458 { "r16", 16 },
459 { "r17", 17 },
460 { "r18", 18 },
461 { "r19", 19 },
462 { "r2", 2 },
463 { "r20", 20 },
464 { "r21", 21 },
465 { "r22", 22 },
466 { "r23", 23 },
467 { "r24", 24 },
468 { "r25", 25 },
469 { "r26", 26 },
470 { "r27", 27 },
471 { "r28", 28 },
472 { "r29", 29 },
473 { "r3", 3 },
474 { "r30", 30 },
475 { "r31", 31 },
476 { "r4", 4 },
477 { "r5", 5 },
478 { "r6", 6 },
479 { "r7", 7 },
480 { "r8", 8 },
481 { "r9", 9 },
482
483 { "rtoc", 2 }, /* Table of contents */
484
485 { "sdr1", 25 }, /* Storage Description Register 1 */
486
487 { "sp", 1 },
488
489 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
490 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 491
7a899fff 492 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 493 { "v.1", 1 },
494 { "v.10", 10 },
495 { "v.11", 11 },
496 { "v.12", 12 },
497 { "v.13", 13 },
498 { "v.14", 14 },
499 { "v.15", 15 },
500 { "v.16", 16 },
501 { "v.17", 17 },
502 { "v.18", 18 },
503 { "v.19", 19 },
504 { "v.2", 2 },
505 { "v.20", 20 },
506 { "v.21", 21 },
507 { "v.22", 22 },
508 { "v.23", 23 },
509 { "v.24", 24 },
510 { "v.25", 25 },
511 { "v.26", 26 },
512 { "v.27", 27 },
513 { "v.28", 28 },
514 { "v.29", 29 },
515 { "v.3", 3 },
7a899fff
C		 516 { "v.30", 30 },
517 { "v.31", 31 },
81d4177b
KH		 518 { "v.4", 4 },
519 { "v.5", 5 },
520 { "v.6", 6 },
521 { "v.7", 7 },
522 { "v.8", 8 },
523 { "v.9", 9 },
7a899fff
C		 524
525 { "v0", 0 },
81d4177b
KH		 526 { "v1", 1 },
527 { "v10", 10 },
528 { "v11", 11 },
529 { "v12", 12 },
530 { "v13", 13 },
531 { "v14", 14 },
532 { "v15", 15 },
533 { "v16", 16 },
534 { "v17", 17 },
535 { "v18", 18 },
536 { "v19", 19 },
537 { "v2", 2 },
538 { "v20", 20 },
539 { "v21", 21 },
540 { "v22", 22 },
541 { "v23", 23 },
542 { "v24", 24 },
543 { "v25", 25 },
544 { "v26", 26 },
545 { "v27", 27 },
546 { "v28", 28 },
547 { "v29", 29 },
548 { "v3", 3 },
7a899fff
C		 549 { "v30", 30 },
550 { "v31", 31 },
81d4177b
KH		 551 { "v4", 4 },
552 { "v5", 5 },
553 { "v6", 6 },
554 { "v7", 7 },
555 { "v8", 8 },
7a899fff 556 { "v9", 9 },
252b5132
RH		 557
558 { "xer", 1 },
559
560};
561
bc805888 562#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 563
564/* Given NAME, find the register number associated with that name, return
565 the integer value associated with the given name or -1 on failure. */
566
567static int reg_name_search
568 PARAMS ((const struct pd_reg *, int, const char * name));
569
570static int
571reg_name_search (regs, regcount, name)
572 const struct pd_reg *regs;
573 int regcount;
574 const char *name;
575{
576 int middle, low, high;
577 int cmp;
578
579 low = 0;
580 high = regcount - 1;
581
582 do
583 {
584 middle = (low + high) / 2;
585 cmp = strcasecmp (name, regs[middle].name);
586 if (cmp < 0)
587 high = middle - 1;
588 else if (cmp > 0)
589 low = middle + 1;
590 else
591 return regs[middle].value;
592 }
593 while (low <= high);
594
595 return -1;
596}
597
598/*
99a814a1 599 * Summary of register_name.
252b5132
RH		 600 *
601 * in: Input_line_pointer points to 1st char of operand.
602 *
603 * out: A expressionS.
604 * The operand may have been a register: in this case, X_op == O_register,
605 * X_add_number is set to the register number, and truth is returned.
606 * Input_line_pointer->(next non-blank) char after operand, or is in its
607 * original state.
608 */
609
b34976b6 610static bfd_boolean
252b5132
RH		 611register_name (expressionP)
612 expressionS *expressionP;
613{
614 int reg_number;
615 char *name;
616 char *start;
617 char c;
618
99a814a1 619 /* Find the spelling of the operand. */
252b5132 620 start = name = input_line_pointer;
3882b010 621 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 622 name = ++input_line_pointer;
623
3882b010 624 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 625 return FALSE;
252b5132
RH		 626
627 c = get_symbol_end ();
628 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
629
468cced8
AM		 630 /* Put back the delimiting char. */
631 *input_line_pointer = c;
632
99a814a1 633 /* Look to see if it's in the register table. */
81d4177b 634 if (reg_number >= 0)
252b5132
RH		 635 {
636 expressionP->X_op = O_register;
637 expressionP->X_add_number = reg_number;
81d4177b 638
99a814a1 639 /* Make the rest nice. */
252b5132
RH		 640 expressionP->X_add_symbol = NULL;
641 expressionP->X_op_symbol = NULL;
b34976b6 642 return TRUE;
252b5132 643 }
468cced8
AM		 644
645 /* Reset the line as if we had not done anything. */
646 input_line_pointer = start;
b34976b6 647 return FALSE;
252b5132
RH		 648}
649\f
650/* This function is called for each symbol seen in an expression. It
651 handles the special parsing which PowerPC assemblers are supposed
652 to use for condition codes. */
653
654/* Whether to do the special parsing. */
b34976b6 655static bfd_boolean cr_operand;
252b5132
RH		 656
657/* Names to recognize in a condition code. This table is sorted. */
658static const struct pd_reg cr_names[] =
659{
660 { "cr0", 0 },
661 { "cr1", 1 },
662 { "cr2", 2 },
663 { "cr3", 3 },
664 { "cr4", 4 },
665 { "cr5", 5 },
666 { "cr6", 6 },
667 { "cr7", 7 },
668 { "eq", 2 },
669 { "gt", 1 },
670 { "lt", 0 },
671 { "so", 3 },
672 { "un", 3 }
673};
674
675/* Parsing function. This returns non-zero if it recognized an
676 expression. */
677
678int
679ppc_parse_name (name, expr)
680 const char *name;
681 expressionS *expr;
682{
683 int val;
684
685 if (! cr_operand)
686 return 0;
687
688 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
689 name);
690 if (val < 0)
691 return 0;
692
693 expr->X_op = O_constant;
694 expr->X_add_number = val;
695
696 return 1;
697}
698\f
699/* Local variables. */
700
701/* The type of processor we are assembling for. This is one or more
702 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 703static unsigned long ppc_cpu = 0;
252b5132 704
2b3c4602
AM		 705/* Whether to target xcoff64/elf64. */
706static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 707
252b5132
RH		 708/* Opcode hash table. */
709static struct hash_control *ppc_hash;
710
711/* Macro hash table. */
712static struct hash_control *ppc_macro_hash;
713
714#ifdef OBJ_ELF
99a814a1 715/* What type of shared library support to use. */
5d6f4f16 716static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 717
99a814a1 718/* Flags to set in the elf header. */
252b5132
RH		 719static flagword ppc_flags = 0;
720
721/* Whether this is Solaris or not. */
722#ifdef TARGET_SOLARIS_COMMENT
b34976b6 723#define SOLARIS_P TRUE
252b5132 724#else
b34976b6 725#define SOLARIS_P FALSE
252b5132
RH		 726#endif
727
b34976b6 728static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 729#endif
730
731#ifdef OBJ_XCOFF
732
733/* The RS/6000 assembler uses the .csect pseudo-op to generate code
734 using a bunch of different sections. These assembler sections,
735 however, are all encompassed within the .text or .data sections of
736 the final output file. We handle this by using different
737 subsegments within these main segments. */
738
739/* Next subsegment to allocate within the .text segment. */
740static subsegT ppc_text_subsegment = 2;
741
742/* Linked list of csects in the text section. */
743static symbolS *ppc_text_csects;
744
745/* Next subsegment to allocate within the .data segment. */
746static subsegT ppc_data_subsegment = 2;
747
748/* Linked list of csects in the data section. */
749static symbolS *ppc_data_csects;
750
751/* The current csect. */
752static symbolS *ppc_current_csect;
753
754/* The RS/6000 assembler uses a TOC which holds addresses of functions
755 and variables. Symbols are put in the TOC with the .tc pseudo-op.
756 A special relocation is used when accessing TOC entries. We handle
757 the TOC as a subsegment within the .data segment. We set it up if
758 we see a .toc pseudo-op, and save the csect symbol here. */
759static symbolS *ppc_toc_csect;
760
761/* The first frag in the TOC subsegment. */
762static fragS *ppc_toc_frag;
763
764/* The first frag in the first subsegment after the TOC in the .data
765 segment. NULL if there are no subsegments after the TOC. */
766static fragS *ppc_after_toc_frag;
767
768/* The current static block. */
769static symbolS *ppc_current_block;
770
771/* The COFF debugging section; set by md_begin. This is not the
772 .debug section, but is instead the secret BFD section which will
773 cause BFD to set the section number of a symbol to N_DEBUG. */
774static asection *ppc_coff_debug_section;
775
776#endif /* OBJ_XCOFF */
777
778#ifdef TE_PE
779
780/* Various sections that we need for PE coff support. */
781static segT ydata_section;
782static segT pdata_section;
783static segT reldata_section;
784static segT rdata_section;
785static segT tocdata_section;
786
81d4177b 787/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 788static segT ppc_previous_section;
789static segT ppc_current_section;
790
791#endif /* TE_PE */
792
793#ifdef OBJ_ELF
794symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 795#define PPC_APUINFO_ISEL 0x40
796#define PPC_APUINFO_PMR 0x41
797#define PPC_APUINFO_RFMCI 0x42
798#define PPC_APUINFO_CACHELCK 0x43
799#define PPC_APUINFO_SPE 0x100
800#define PPC_APUINFO_EFS 0x101
801#define PPC_APUINFO_BRLOCK 0x102
802
b34976b6
AM		 803/*
804 * We keep a list of APUinfo
6a0c61b7
EZ		 805 */
806unsigned long *ppc_apuinfo_list;
807unsigned int ppc_apuinfo_num;
808unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 809#endif /* OBJ_ELF */
810\f
811#ifdef OBJ_ELF
15c1449b 812const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 813#else
15c1449b 814const char *const md_shortopts = "um:";
252b5132 815#endif
15c1449b 816const struct option md_longopts[] = {
252b5132
RH		 817 {NULL, no_argument, NULL, 0}
818};
15c1449b 819const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 820
821int
822md_parse_option (c, arg)
823 int c;
824 char *arg;
825{
826 switch (c)
827 {
828 case 'u':
829 /* -u means that any undefined symbols should be treated as
830 external, which is the default for gas anyhow. */
831 break;
832
833#ifdef OBJ_ELF
834 case 'l':
835 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 836 sake, recognize -be also. */
252b5132
RH		 837 if (strcmp (arg, "e") == 0)
838 {
839 target_big_endian = 0;
840 set_target_endian = 1;
841 }
842 else
843 return 0;
844
845 break;
846
847 case 'b':
848 if (strcmp (arg, "e") == 0)
849 {
850 target_big_endian = 1;
851 set_target_endian = 1;
852 }
853 else
854 return 0;
855
856 break;
857
858 case 'K':
99a814a1 859 /* Recognize -K PIC. */
252b5132
RH		 860 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
861 {
862 shlib = SHLIB_PIC;
863 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
864 }
865 else
866 return 0;
867
868 break;
869#endif
870
7f6d05e8
CP		 871 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
872 case 'a':
873 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 874 {
875#ifdef BFD64
876 ppc_obj64 = 1;
877#else
878 as_fatal (_("%s unsupported"), "-a64");
879#endif
880 }
7f6d05e8 881 else if (strcmp (arg, "32") == 0)
2b3c4602 882 ppc_obj64 = 0;
7f6d05e8
CP		 883 else
884 return 0;
885 break;
81d4177b 886
252b5132
RH		 887 case 'm':
888 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
99a814a1 889 (RIOS2). */
252b5132 890 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
2b3c4602 891 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
252b5132
RH		 892 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
893 else if (strcmp (arg, "pwr") == 0)
2b3c4602 894 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
23e1d84c 895 /* -m601 means to assemble for the PowerPC 601, which includes
99a814a1 896 instructions that are holdovers from the Power. */
252b5132 897 else if (strcmp (arg, "601") == 0)
b34976b6
AM		 898 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
899 | PPC_OPCODE_601 | PPC_OPCODE_32);
252b5132 900 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
23e1d84c 901 PowerPC 603/604. */
252b5132
RH		 902 else if (strcmp (arg, "ppc") == 0
903 || strcmp (arg, "ppc32") == 0
252b5132
RH		 904 || strcmp (arg, "603") == 0
905 || strcmp (arg, "604") == 0)
6a0c61b7 906 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
23e1d84c 907 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
418c1742 908 else if (strcmp (arg, "403") == 0
b34976b6
AM		 909 || strcmp (arg, "405") == 0)
910 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
911 | PPC_OPCODE_403 | PPC_OPCODE_32);
418c1742 912 else if (strcmp (arg, "7400") == 0
b34976b6
AM		 913 || strcmp (arg, "7410") == 0
914 || strcmp (arg, "7450") == 0
915 || strcmp (arg, "7455") == 0)
916 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
917 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
418c1742 918 else if (strcmp (arg, "altivec") == 0)
b34976b6
AM		 919 {
920 if (ppc_cpu == 0)
921 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
922 else
923 ppc_cpu |= PPC_OPCODE_ALTIVEC;
924 }
6a0c61b7
EZ		 925 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
926 {
b34976b6
AM		 927 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
928 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
929 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
930 | PPC_OPCODE_RFMCI);
931 }
6a0c61b7
EZ		 932 else if (strcmp (arg, "spe") == 0)
933 {
934 if (ppc_cpu == 0)
935 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
936 else
937 ppc_cpu |= PPC_OPCODE_SPE;
938 }
252b5132 939 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
99a814a1 940 620. */
252b5132
RH		 941 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
942 {
6a0c61b7 943 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
252b5132 944 }
d0e9a01c
RH		 945 else if (strcmp (arg, "ppc64bridge") == 0)
946 {
b34976b6
AM		 947 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
948 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
418c1742
MG		 949 }
950 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
951 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
6a0c61b7
EZ		 952 {
953 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
954 }
418c1742
MG		 955 /* -mbooke64 means enable 64-bit BookE support. */
956 else if (strcmp (arg, "booke64") == 0)
957 {
b34976b6
AM		 958 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
959 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
d0e9a01c 960 }
23e1d84c
AM		 961 else if (strcmp (arg, "power4") == 0)
962 {
b34976b6
AM		 963 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
964 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
23e1d84c 965 }
252b5132
RH		 966 /* -mcom means assemble for the common intersection between Power
967 and PowerPC. At present, we just allow the union, rather
968 than the intersection. */
969 else if (strcmp (arg, "com") == 0)
2b3c4602 970 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132
RH		 971 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
972 else if (strcmp (arg, "any") == 0)
2b3c4602 973 ppc_cpu = PPC_OPCODE_ANY | PPC_OPCODE_32;
252b5132
RH		 974
975 else if (strcmp (arg, "regnames") == 0)
b34976b6 976 reg_names_p = TRUE;
252b5132
RH		 977
978 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 979 reg_names_p = FALSE;
252b5132
RH		 980
981#ifdef OBJ_ELF
99a814a1
AM		 982 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
983 that require relocation. */
252b5132
RH		 984 else if (strcmp (arg, "relocatable") == 0)
985 {
5d6f4f16 986 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 987 ppc_flags |= EF_PPC_RELOCATABLE;
988 }
989
990 else if (strcmp (arg, "relocatable-lib") == 0)
991 {
5d6f4f16 992 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 993 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
994 }
995
99a814a1 996 /* -memb, set embedded bit. */
252b5132
RH		 997 else if (strcmp (arg, "emb") == 0)
998 ppc_flags |= EF_PPC_EMB;
999
99a814a1
AM		 1000 /* -mlittle/-mbig set the endianess. */
1001 else if (strcmp (arg, "little") == 0
1002 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1003 {
1004 target_big_endian = 0;
1005 set_target_endian = 1;
1006 }
1007
1008 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1009 {
1010 target_big_endian = 1;
1011 set_target_endian = 1;
1012 }
1013
1014 else if (strcmp (arg, "solaris") == 0)
1015 {
b34976b6 1016 msolaris = TRUE;
252b5132
RH		 1017 ppc_comment_chars = ppc_solaris_comment_chars;
1018 }
1019
1020 else if (strcmp (arg, "no-solaris") == 0)
1021 {
b34976b6 1022 msolaris = FALSE;
252b5132
RH		 1023 ppc_comment_chars = ppc_eabi_comment_chars;
1024 }
1025#endif
1026 else
1027 {
1028 as_bad (_("invalid switch -m%s"), arg);
1029 return 0;
1030 }
1031 break;
1032
1033#ifdef OBJ_ELF
1034 /* -V: SVR4 argument to print version ID. */
1035 case 'V':
1036 print_version_id ();
1037 break;
1038
1039 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1040 should be emitted or not. FIXME: Not implemented. */
1041 case 'Q':
1042 break;
1043
1044 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1045 rather than .stabs.excl, which is ignored by the linker.
1046 FIXME: Not implemented. */
1047 case 's':
1048 if (arg)
1049 return 0;
1050
1051 break;
1052#endif
1053
1054 default:
1055 return 0;
1056 }
1057
1058 return 1;
1059}
1060
1061void
1062md_show_usage (stream)
1063 FILE *stream;
1064{
bc805888 1065 fprintf (stream, _("\
252b5132
RH		 1066PowerPC options:\n\
1067-u ignored\n\
23e1d84c
AM		 1068-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1069-mpwr generate code for POWER (RIOS1)\n\
1070-m601 generate code for PowerPC 601\n\
418c1742 1071-mppc, -mppc32, -m603, -m604\n\
23e1d84c
AM		 1072 generate code for PowerPC 603/604\n\
1073-m403, -m405 generate code for PowerPC 403/405\n\
f5c120c5 1074-m7400, -m7410, -m7450, -m7455\n\
23e1d84c
AM		 1075 generate code For PowerPC 7400/7410/7450/7455\n\
1076-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1077-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1078-mbooke64 generate code for 64-bit PowerPC BookE\n\
1079-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1080-mpower4 generate code for Power4 architecture\n\
f5c120c5 1081-maltivec generate code for AltiVec\n\
252b5132
RH		 1082-mcom generate code Power/PowerPC common instructions\n\
1083-many generate code for any architecture (PWR/PWRX/PPC)\n\
1084-mregnames Allow symbolic names for registers\n\
1085-mno-regnames Do not allow symbolic names for registers\n"));
6a0c61b7
EZ		 1086 fprintf (stream, _("\
1087-me500, -me500x2 generate code for Motorola e500 core complex\n\
1088-mspe generate code for Motorola SPE instructions\n"));
252b5132 1089#ifdef OBJ_ELF
bc805888 1090 fprintf (stream, _("\
252b5132
RH		 1091-mrelocatable support for GCC's -mrelocatble option\n\
1092-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1093-memb set PPC_EMB bit in ELF flags\n\
1094-mlittle, -mlittle-endian\n\
1095 generate code for a little endian machine\n\
1096-mbig, -mbig-endian generate code for a big endian machine\n\
1097-msolaris generate code for Solaris\n\
1098-mno-solaris do not generate code for Solaris\n\
1099-V print assembler version number\n\
1100-Qy, -Qn ignored\n"));
1101#endif
1102}
1103\f
1104/* Set ppc_cpu if it is not already set. */
1105
1106static void
1107ppc_set_cpu ()
1108{
1109 const char *default_os = TARGET_OS;
1110 const char *default_cpu = TARGET_CPU;
1111
1112 if (ppc_cpu == 0)
1113 {
2a98c3a6
AM		 1114 if (ppc_obj64)
1115 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
1116 else if (strncmp (default_os, "aix", 3) == 0
1117 && default_os[3] >= '4' && default_os[3] <= '9')
2b3c4602 1118 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1119 else if (strncmp (default_os, "aix3", 4) == 0)
2b3c4602 1120 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1121 else if (strcmp (default_cpu, "rs6000") == 0)
2b3c4602 1122 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1123 else if (strncmp (default_cpu, "powerpc", 7) == 0)
b34976b6
AM		 1124 {
1125 if (default_cpu[7] == '6' && default_cpu[8] == '4')
1126 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
1127 else
1128 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
1129 }
252b5132 1130 else
99a814a1
AM		 1131 as_fatal (_("Unknown default cpu = %s, os = %s"),
1132 default_cpu, default_os);
252b5132
RH		 1133 }
1134}
1135
1136/* Figure out the BFD architecture to use. */
1137
1138enum bfd_architecture
1139ppc_arch ()
1140{
1141 const char *default_cpu = TARGET_CPU;
1142 ppc_set_cpu ();
1143
1144 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1145 return bfd_arch_powerpc;
1146 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1147 return bfd_arch_rs6000;
1148 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1149 {
1150 if (strcmp (default_cpu, "rs6000") == 0)
1151 return bfd_arch_rs6000;
0baf16f2 1152 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1153 return bfd_arch_powerpc;
1154 }
1155
1156 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1157 return bfd_arch_unknown;
1158}
1159
7f6d05e8
CP		 1160unsigned long
1161ppc_mach ()
1162{
2a98c3a6
AM		 1163 if (ppc_obj64)
1164 return bfd_mach_ppc64;
1165 else if (ppc_arch () == bfd_arch_rs6000)
1166 return bfd_mach_rs6k;
1167 else
1168 return bfd_mach_ppc;
7f6d05e8
CP		 1169}
1170
81d4177b 1171extern char*
99a814a1 1172ppc_target_format ()
7f6d05e8
CP		 1173{
1174#ifdef OBJ_COFF
1175#ifdef TE_PE
99a814a1 1176 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1177#elif TE_POWERMAC
0baf16f2 1178 return "xcoff-powermac";
7f6d05e8 1179#else
eb1e0e80 1180# ifdef TE_AIX5
2b3c4602 1181 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1182# else
2b3c4602 1183 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1184# endif
7f6d05e8 1185#endif
7f6d05e8
CP		 1186#endif
1187#ifdef OBJ_ELF
0baf16f2 1188 return (target_big_endian
2b3c4602
AM		 1189 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1190 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
7f6d05e8
CP		 1191#endif
1192}
1193
252b5132
RH		 1194/* This function is called when the assembler starts up. It is called
1195 after the options have been parsed and the output file has been
1196 opened. */
1197
1198void
1199md_begin ()
1200{
1201 register const struct powerpc_opcode *op;
1202 const struct powerpc_opcode *op_end;
1203 const struct powerpc_macro *macro;
1204 const struct powerpc_macro *macro_end;
b34976b6 1205 bfd_boolean dup_insn = FALSE;
252b5132
RH		 1206
1207 ppc_set_cpu ();
1208
1209#ifdef OBJ_ELF
81d4177b 1210 /* Set the ELF flags if desired. */
252b5132
RH		 1211 if (ppc_flags && !msolaris)
1212 bfd_set_private_flags (stdoutput, ppc_flags);
1213#endif
1214
1215 /* Insert the opcodes into a hash table. */
1216 ppc_hash = hash_new ();
1217
1218 op_end = powerpc_opcodes + powerpc_num_opcodes;
1219 for (op = powerpc_opcodes; op < op_end; op++)
1220 {
1221 know ((op->opcode & op->mask) == op->opcode);
1222
2b3c4602 1223 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1224 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1225 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1226 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1227 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1228 /* Certain instructions (eg: extsw) do not exist in the
1229 32-bit BookE instruction set, but they do exist in the
1230 64-bit BookE instruction set, and other PPC instruction
1231 sets. Check to see if the opcode has the BOOKE64 flag set.
1232 If it does make sure that the target CPU is not the BookE32. */
1233 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1234 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1235 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1236 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1237 || ((op->flags & PPC_OPCODE_POWER4)
1238 == (ppc_cpu & PPC_OPCODE_POWER4))))
252b5132
RH		 1239 {
1240 const char *retval;
1241
1242 retval = hash_insert (ppc_hash, op->name, (PTR) op);
1243 if (retval != (const char *) NULL)
1244 {
99a814a1 1245 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1246 if ((ppc_cpu & PPC_OPCODE_601) != 0
1247 && (op->flags & PPC_OPCODE_POWER) != 0)
1248 continue;
1249
99a814a1
AM		 1250 as_bad (_("Internal assembler error for instruction %s"),
1251 op->name);
b34976b6 1252 dup_insn = TRUE;
252b5132
RH		 1253 }
1254 }
1255 }
1256
1257 /* Insert the macros into a hash table. */
1258 ppc_macro_hash = hash_new ();
1259
1260 macro_end = powerpc_macros + powerpc_num_macros;
1261 for (macro = powerpc_macros; macro < macro_end; macro++)
1262 {
1263 if ((macro->flags & ppc_cpu) != 0)
1264 {
1265 const char *retval;
1266
1267 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1268 if (retval != (const char *) NULL)
1269 {
1270 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1271 dup_insn = TRUE;
252b5132
RH		 1272 }
1273 }
1274 }
1275
1276 if (dup_insn)
1277 abort ();
1278
99a814a1
AM		 1279 /* Tell the main code what the endianness is if it is not overidden
1280 by the user. */
252b5132
RH		 1281 if (!set_target_endian)
1282 {
1283 set_target_endian = 1;
1284 target_big_endian = PPC_BIG_ENDIAN;
1285 }
1286
1287#ifdef OBJ_XCOFF
1288 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1289
1290 /* Create dummy symbols to serve as initial csects. This forces the
1291 text csects to precede the data csects. These symbols will not
1292 be output. */
1293 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1294 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1295 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1296 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1297#endif
1298
1299#ifdef TE_PE
1300
1301 ppc_current_section = text_section;
81d4177b 1302 ppc_previous_section = 0;
252b5132
RH		 1303
1304#endif
1305}
1306
6a0c61b7
EZ		 1307void
1308ppc_cleanup ()
1309{
dc1d03fc 1310#ifdef OBJ_ELF
6a0c61b7
EZ		 1311 if (ppc_apuinfo_list == NULL)
1312 return;
1313
1314 /* Ok, so write the section info out. We have this layout:
1315
1316 byte data what
1317 ---- ---- ----
1318 0 8 length of "APUinfo\0"
1319 4 (n*4) number of APU's (4 bytes each)
1320 8 2 note type 2
1321 12 "APUinfo\0" name
1322 20 APU#1 first APU's info
1323 24 APU#2 second APU's info
1324 ... ...
1325 */
1326 {
1327 char *p;
1328 asection *seg = now_seg;
1329 subsegT subseg = now_subseg;
1330 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1331 unsigned int i;
6a0c61b7
EZ		 1332
1333 /* Create the .PPC.EMB.apuinfo section. */
1334 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1335 bfd_set_section_flags (stdoutput,
1336 apuinfo_secp,
e1a9cb8e 1337 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1338
1339 p = frag_more (4);
1340 md_number_to_chars (p, (valueT) 8, 4);
1341
1342 p = frag_more (4);
1343 md_number_to_chars (p, (valueT) ppc_apuinfo_num, 4);
1344
1345 p = frag_more (4);
1346 md_number_to_chars (p, (valueT) 2, 4);
1347
1348 p = frag_more (8);
1349 strcpy (p, "APUinfo");
1350
1351 for (i = 0; i < ppc_apuinfo_num; i++)
1352 {
b34976b6
AM		 1353 p = frag_more (4);
1354 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1355 }
1356
1357 frag_align (2, 0, 0);
1358
1359 /* We probably can't restore the current segment, for there likely
1360 isn't one yet... */
1361 if (seg && subseg)
1362 subseg_set (seg, subseg);
1363 }
dc1d03fc 1364#endif
6a0c61b7
EZ		 1365}
1366
252b5132
RH		 1367/* Insert an operand value into an instruction. */
1368
1369static unsigned long
1370ppc_insert_operand (insn, operand, val, file, line)
1371 unsigned long insn;
1372 const struct powerpc_operand *operand;
1373 offsetT val;
1374 char *file;
1375 unsigned int line;
1376{
1377 if (operand->bits != 32)
1378 {
1379 long min, max;
1380 offsetT test;
1381
1382 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1383 {
d0e9a01c 1384 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH		 1385 max = (1 << operand->bits) - 1;
1386 else
1387 max = (1 << (operand->bits - 1)) - 1;
1388 min = - (1 << (operand->bits - 1));
1389
2b3c4602 1390 if (!ppc_obj64)
252b5132
RH		 1391 {
1392 /* Some people write 32 bit hex constants with the sign
1393 extension done by hand. This shouldn't really be
1394 valid, but, to permit this code to assemble on a 64
1395 bit host, we sign extend the 32 bit value. */
1396 if (val > 0
92161534
ILT		 1397 && (val & (offsetT) 0x80000000) != 0
1398 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH		 1399 {
1400 val -= 0x80000000;
1401 val -= 0x80000000;
1402 }
1403 }
1404 }
1405 else
1406 {
1407 max = (1 << operand->bits) - 1;
1408 min = 0;
1409 }
1410
1411 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1412 test = - val;
1413 else
1414 test = val;
1415
1416 if (test < (offsetT) min || test > (offsetT) max)
1417 {
1418 const char *err =
1419 _("operand out of range (%s not between %ld and %ld)");
1420 char buf[100];
1421
1422 sprint_value (buf, test);
0baf16f2 1423 as_bad_where (file, line, err, buf, min, max);
252b5132
RH		 1424 }
1425 }
1426
1427 if (operand->insert)
1428 {
1429 const char *errmsg;
1430
1431 errmsg = NULL;
2b3c4602 1432 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1433 if (errmsg != (const char *) NULL)
0baf16f2 1434 as_bad_where (file, line, errmsg);
252b5132
RH		 1435 }
1436 else
1437 insn |= (((long) val & ((1 << operand->bits) - 1))
1438 << operand->shift);
1439
1440 return insn;
1441}
1442
1443\f
1444#ifdef OBJ_ELF
1445/* Parse @got, etc. and return the desired relocation. */
1446static bfd_reloc_code_real_type
1447ppc_elf_suffix (str_p, exp_p)
1448 char **str_p;
1449 expressionS *exp_p;
1450{
1451 struct map_bfd {
1452 char *string;
1453 int length;
15c1449b 1454 int reloc;
252b5132
RH		 1455 };
1456
1457 char ident[20];
1458 char *str = *str_p;
1459 char *str2;
1460 int ch;
1461 int len;
15c1449b 1462 const struct map_bfd *ptr;
252b5132 1463
bc805888 1464#define MAP(str,reloc) { str, sizeof (str)-1, reloc }
252b5132 1465
15c1449b 1466 static const struct map_bfd mapping[] = {
cdba85ec
AM		 1467 MAP ("l", (int) BFD_RELOC_LO16),
1468 MAP ("h", (int) BFD_RELOC_HI16),
1469 MAP ("ha", (int) BFD_RELOC_HI16_S),
1470 MAP ("brtaken", (int) BFD_RELOC_PPC_B16_BRTAKEN),
1471 MAP ("brntaken", (int) BFD_RELOC_PPC_B16_BRNTAKEN),
1472 MAP ("got", (int) BFD_RELOC_16_GOTOFF),
1473 MAP ("got@l", (int) BFD_RELOC_LO16_GOTOFF),
1474 MAP ("got@h", (int) BFD_RELOC_HI16_GOTOFF),
1475 MAP ("got@ha", (int) BFD_RELOC_HI16_S_GOTOFF),
1476 MAP ("fixup", (int) BFD_RELOC_CTOR),
1477 MAP ("plt", (int) BFD_RELOC_24_PLT_PCREL),
1478 MAP ("pltrel24", (int) BFD_RELOC_24_PLT_PCREL),
1479 MAP ("copy", (int) BFD_RELOC_PPC_COPY),
1480 MAP ("globdat", (int) BFD_RELOC_PPC_GLOB_DAT),
1481 MAP ("local24pc", (int) BFD_RELOC_PPC_LOCAL24PC),
1482 MAP ("local", (int) BFD_RELOC_PPC_LOCAL24PC),
1483 MAP ("pltrel", (int) BFD_RELOC_32_PLT_PCREL),
1484 MAP ("plt@l", (int) BFD_RELOC_LO16_PLTOFF),
1485 MAP ("plt@h", (int) BFD_RELOC_HI16_PLTOFF),
1486 MAP ("plt@ha", (int) BFD_RELOC_HI16_S_PLTOFF),
1487 MAP ("sdarel", (int) BFD_RELOC_GPREL16),
1488 MAP ("sectoff", (int) BFD_RELOC_16_BASEREL),
1489 MAP ("sectoff@l", (int) BFD_RELOC_LO16_BASEREL),
1490 MAP ("sectoff@h", (int) BFD_RELOC_HI16_BASEREL),
1491 MAP ("sectoff@ha", (int) BFD_RELOC_HI16_S_BASEREL),
1492 MAP ("naddr", (int) BFD_RELOC_PPC_EMB_NADDR32),
1493 MAP ("naddr16", (int) BFD_RELOC_PPC_EMB_NADDR16),
1494 MAP ("naddr@l", (int) BFD_RELOC_PPC_EMB_NADDR16_LO),
1495 MAP ("naddr@h", (int) BFD_RELOC_PPC_EMB_NADDR16_HI),
1496 MAP ("naddr@ha", (int) BFD_RELOC_PPC_EMB_NADDR16_HA),
1497 MAP ("sdai16", (int) BFD_RELOC_PPC_EMB_SDAI16),
1498 MAP ("sda2rel", (int) BFD_RELOC_PPC_EMB_SDA2REL),
1499 MAP ("sda2i16", (int) BFD_RELOC_PPC_EMB_SDA2I16),
1500 MAP ("sda21", (int) BFD_RELOC_PPC_EMB_SDA21),
1501 MAP ("mrkref", (int) BFD_RELOC_PPC_EMB_MRKREF),
1502 MAP ("relsect", (int) BFD_RELOC_PPC_EMB_RELSEC16),
1503 MAP ("relsect@l", (int) BFD_RELOC_PPC_EMB_RELST_LO),
1504 MAP ("relsect@h", (int) BFD_RELOC_PPC_EMB_RELST_HI),
1505 MAP ("relsect@ha", (int) BFD_RELOC_PPC_EMB_RELST_HA),
1506 MAP ("bitfld", (int) BFD_RELOC_PPC_EMB_BIT_FLD),
1507 MAP ("relsda", (int) BFD_RELOC_PPC_EMB_RELSDA),
1508 MAP ("xgot", (int) BFD_RELOC_PPC_TOC16),
1509 MAP ("tls", (int) BFD_RELOC_PPC_TLS),
1510 MAP ("dtpmod", (int) BFD_RELOC_PPC_DTPMOD),
1511 MAP ("dtprel", (int) BFD_RELOC_PPC_DTPREL),
1512 MAP ("dtprel@l", (int) BFD_RELOC_PPC_DTPREL16_LO),
1513 MAP ("dtprel@h", (int) BFD_RELOC_PPC_DTPREL16_HI),
1514 MAP ("dtprel@ha", (int) BFD_RELOC_PPC_DTPREL16_HA),
1515 MAP ("tprel", (int) BFD_RELOC_PPC_TPREL),
1516 MAP ("tprel@l", (int) BFD_RELOC_PPC_TPREL16_LO),
1517 MAP ("tprel@h", (int) BFD_RELOC_PPC_TPREL16_HI),
1518 MAP ("tprel@ha", (int) BFD_RELOC_PPC_TPREL16_HA),
1519 MAP ("got@tlsgd", (int) BFD_RELOC_PPC_GOT_TLSGD16),
1520 MAP ("got@tlsgd@l", (int) BFD_RELOC_PPC_GOT_TLSGD16_LO),
1521 MAP ("got@tlsgd@h", (int) BFD_RELOC_PPC_GOT_TLSGD16_HI),
1522 MAP ("got@tlsgd@ha", (int) BFD_RELOC_PPC_GOT_TLSGD16_HA),
1523 MAP ("got@tlsld", (int) BFD_RELOC_PPC_GOT_TLSLD16),
1524 MAP ("got@tlsld@l", (int) BFD_RELOC_PPC_GOT_TLSLD16_LO),
1525 MAP ("got@tlsld@h", (int) BFD_RELOC_PPC_GOT_TLSLD16_HI),
1526 MAP ("got@tlsld@ha", (int) BFD_RELOC_PPC_GOT_TLSLD16_HA),
1527 MAP ("got@dtprel", (int) BFD_RELOC_PPC_GOT_DTPREL16),
1528 MAP ("got@dtprel@l", (int) BFD_RELOC_PPC_GOT_DTPREL16_LO),
1529 MAP ("got@dtprel@h", (int) BFD_RELOC_PPC_GOT_DTPREL16_HI),
1530 MAP ("got@dtprel@ha", (int) BFD_RELOC_PPC_GOT_DTPREL16_HA),
1531 MAP ("got@tprel", (int) BFD_RELOC_PPC_GOT_TPREL16),
1532 MAP ("got@tprel@l", (int) BFD_RELOC_PPC_GOT_TPREL16_LO),
1533 MAP ("got@tprel@h", (int) BFD_RELOC_PPC_GOT_TPREL16_HI),
1534 MAP ("got@tprel@ha", (int) BFD_RELOC_PPC_GOT_TPREL16_HA),
2b3c4602
AM		 1535 /* The following are only valid for ppc64. Negative values are
1536 used instead of a flag. */
cdba85ec
AM		 1537 MAP ("higher", - (int) BFD_RELOC_PPC64_HIGHER),
1538 MAP ("highera", - (int) BFD_RELOC_PPC64_HIGHER_S),
1539 MAP ("highest", - (int) BFD_RELOC_PPC64_HIGHEST),
1540 MAP ("highesta", - (int) BFD_RELOC_PPC64_HIGHEST_S),
1541 MAP ("tocbase", - (int) BFD_RELOC_PPC64_TOC),
1542 MAP ("toc", - (int) BFD_RELOC_PPC_TOC16),
1543 MAP ("toc@l", - (int) BFD_RELOC_PPC64_TOC16_LO),
1544 MAP ("toc@h", - (int) BFD_RELOC_PPC64_TOC16_HI),
1545 MAP ("toc@ha", - (int) BFD_RELOC_PPC64_TOC16_HA),
1546 MAP ("dtprel@higher", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHER),
1547 MAP ("dtprel@highera", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1548 MAP ("dtprel@highest", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1549 MAP ("dtprel@highesta", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1550 MAP ("tprel@higher", - (int) BFD_RELOC_PPC64_TPREL16_HIGHER),
1551 MAP ("tprel@highera", - (int) BFD_RELOC_PPC64_TPREL16_HIGHERA),
1552 MAP ("tprel@highest", - (int) BFD_RELOC_PPC64_TPREL16_HIGHEST),
1553 MAP ("tprel@highesta", - (int) BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1554 { (char *) 0, 0, (int) BFD_RELOC_UNUSED }
252b5132
RH		 1555 };
1556
1557 if (*str++ != '@')
1558 return BFD_RELOC_UNUSED;
1559
1560 for (ch = *str, str2 = ident;
1561 (str2 < ident + sizeof (ident) - 1
3882b010 1562 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1563 ch = *++str)
1564 {
3882b010 1565 *str2++ = TOLOWER (ch);
252b5132
RH		 1566 }
1567
1568 *str2 = '\0';
1569 len = str2 - ident;
1570
1571 ch = ident[0];
1572 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1573 if (ch == ptr->string[0]
1574 && len == ptr->length
1575 && memcmp (ident, ptr->string, ptr->length) == 0)
1576 {
15c1449b
AM		 1577 int reloc = ptr->reloc;
1578
2b3c4602 1579 if (reloc < 0)
15c1449b 1580 {
2b3c4602 1581 if (!ppc_obj64)
15c1449b
AM		 1582 return BFD_RELOC_UNUSED;
1583 reloc = -reloc;
1584 }
1585
cdba85ec 1586 if (!ppc_obj64)
5f6db75a
AM		 1587 if (exp_p->X_add_number != 0
1588 && (reloc == (int) BFD_RELOC_16_GOTOFF
1589 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1590 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1591 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1592 as_warn (_("identifier+constant@got means identifier@got+constant"));
1593
1594 /* Now check for identifier@suffix+constant. */
1595 if (*str == '-' || *str == '+')
252b5132 1596 {
5f6db75a
AM		 1597 char *orig_line = input_line_pointer;
1598 expressionS new_exp;
1599
1600 input_line_pointer = str;
1601 expression (&new_exp);
1602 if (new_exp.X_op == O_constant)
252b5132 1603 {
5f6db75a
AM		 1604 exp_p->X_add_number += new_exp.X_add_number;
1605 str = input_line_pointer;
252b5132 1606 }
5f6db75a
AM		 1607
1608 if (&input_line_pointer != str_p)
1609 input_line_pointer = orig_line;
252b5132 1610 }
252b5132 1611 *str_p = str;
0baf16f2 1612
2b3c4602 1613 if (reloc == (int) BFD_RELOC_PPC64_TOC
0baf16f2
AM		 1614 && exp_p->X_op == O_symbol)
1615 {
1616 /* This reloc type ignores the symbol. Change the symbol
1617 so that the dummy .TOC. symbol can be omitted from the
1618 object file. */
1619 exp_p->X_add_symbol = &abs_symbol;
1620 }
1621
15c1449b 1622 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1623 }
1624
1625 return BFD_RELOC_UNUSED;
1626}
1627
99a814a1
AM		 1628/* Like normal .long/.short/.word, except support @got, etc.
1629 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1630static void
1631ppc_elf_cons (nbytes)
0baf16f2 1632 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1633{
1634 expressionS exp;
1635 bfd_reloc_code_real_type reloc;
1636
1637 if (is_it_end_of_statement ())
1638 {
1639 demand_empty_rest_of_line ();
1640 return;
1641 }
1642
1643 do
1644 {
1645 expression (&exp);
1646 if (exp.X_op == O_symbol
1647 && *input_line_pointer == '@'
99a814a1
AM		 1648 && (reloc = ppc_elf_suffix (&input_line_pointer,
1649 &exp)) != BFD_RELOC_UNUSED)
252b5132 1650 {
99a814a1
AM		 1651 reloc_howto_type *reloc_howto;
1652 int size;
1653
1654 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1655 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1656
1657 if (size > nbytes)
0baf16f2
AM		 1658 {
1659 as_bad (_("%s relocations do not fit in %d bytes\n"),
1660 reloc_howto->name, nbytes);
1661 }
252b5132
RH		 1662 else
1663 {
0baf16f2
AM		 1664 char *p;
1665 int offset;
252b5132 1666
0baf16f2
AM		 1667 p = frag_more (nbytes);
1668 offset = 0;
1669 if (target_big_endian)
1670 offset = nbytes - size;
99a814a1
AM		 1671 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1672 &exp, 0, reloc);
252b5132
RH		 1673 }
1674 }
1675 else
1676 emit_expr (&exp, (unsigned int) nbytes);
1677 }
1678 while (*input_line_pointer++ == ',');
1679
99a814a1
AM		 1680 /* Put terminator back into stream. */
1681 input_line_pointer--;
252b5132
RH		 1682 demand_empty_rest_of_line ();
1683}
1684
1685/* Solaris pseduo op to change to the .rodata section. */
1686static void
1687ppc_elf_rdata (xxx)
1688 int xxx;
1689{
1690 char *save_line = input_line_pointer;
1691 static char section[] = ".rodata\n";
1692
99a814a1 1693 /* Just pretend this is .section .rodata */
252b5132
RH		 1694 input_line_pointer = section;
1695 obj_elf_section (xxx);
1696
1697 input_line_pointer = save_line;
1698}
1699
99a814a1 1700/* Pseudo op to make file scope bss items. */
252b5132 1701static void
99a814a1 1702ppc_elf_lcomm (xxx)
92161534 1703 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1704{
1705 register char *name;
1706 register char c;
1707 register char *p;
1708 offsetT size;
1709 register symbolS *symbolP;
1710 offsetT align;
1711 segT old_sec;
1712 int old_subsec;
1713 char *pfrag;
1714 int align2;
1715
1716 name = input_line_pointer;
1717 c = get_symbol_end ();
1718
99a814a1 1719 /* just after name is now '\0'. */
252b5132
RH		 1720 p = input_line_pointer;
1721 *p = c;
1722 SKIP_WHITESPACE ();
1723 if (*input_line_pointer != ',')
1724 {
1725 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1726 ignore_rest_of_line ();
1727 return;
1728 }
1729
1730 input_line_pointer++; /* skip ',' */
1731 if ((size = get_absolute_expression ()) < 0)
1732 {
1733 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1734 ignore_rest_of_line ();
1735 return;
1736 }
1737
1738 /* The third argument to .lcomm is the alignment. */
1739 if (*input_line_pointer != ',')
1740 align = 8;
1741 else
1742 {
1743 ++input_line_pointer;
1744 align = get_absolute_expression ();
1745 if (align <= 0)
1746 {
1747 as_warn (_("ignoring bad alignment"));
1748 align = 8;
1749 }
1750 }
1751
1752 *p = 0;
1753 symbolP = symbol_find_or_make (name);
1754 *p = c;
1755
1756 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1757 {
1758 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1759 S_GET_NAME (symbolP));
1760 ignore_rest_of_line ();
1761 return;
1762 }
1763
1764 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1765 {
1766 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1767 S_GET_NAME (symbolP),
1768 (long) S_GET_VALUE (symbolP),
1769 (long) size);
1770
1771 ignore_rest_of_line ();
1772 return;
1773 }
1774
99a814a1 1775 /* Allocate_bss. */
252b5132
RH		 1776 old_sec = now_seg;
1777 old_subsec = now_subseg;
1778 if (align)
1779 {
99a814a1 1780 /* Convert to a power of 2 alignment. */
252b5132
RH		 1781 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1782 if (align != 1)
1783 {
1784 as_bad (_("Common alignment not a power of 2"));
1785 ignore_rest_of_line ();
1786 return;
1787 }
1788 }
1789 else
1790 align2 = 0;
1791
1792 record_alignment (bss_section, align2);
1793 subseg_set (bss_section, 0);
1794 if (align2)
1795 frag_align (align2, 0, 0);
1796 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1797 symbol_get_frag (symbolP)->fr_symbol = 0;
1798 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1799 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1800 (char *) 0);
1801 *pfrag = 0;
1802 S_SET_SIZE (symbolP, size);
1803 S_SET_SEGMENT (symbolP, bss_section);
1804 subseg_set (old_sec, old_subsec);
1805 demand_empty_rest_of_line ();
1806}
1807
1808/* Validate any relocations emitted for -mrelocatable, possibly adding
1809 fixups for word relocations in writable segments, so we can adjust
1810 them at runtime. */
1811static void
1812ppc_elf_validate_fix (fixp, seg)
1813 fixS *fixp;
1814 segT seg;
1815{
1816 if (fixp->fx_done || fixp->fx_pcrel)
1817 return;
1818
1819 switch (shlib)
1820 {
1821 case SHLIB_NONE:
1822 case SHLIB_PIC:
1823 return;
1824
5d6f4f16 1825 case SHLIB_MRELOCATABLE:
252b5132
RH		 1826 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1827 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1828 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1829 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1830 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1831 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1832 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1833 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1834 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1835 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1836 && strcmp (segment_name (seg), ".got2") != 0
1837 && strcmp (segment_name (seg), ".dtors") != 0
1838 && strcmp (segment_name (seg), ".ctors") != 0
1839 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1840 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1841 && strcmp (segment_name (seg), ".eh_frame") != 0
1842 && strcmp (segment_name (seg), ".ex_shared") != 0)
1843 {
1844 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1845 || fixp->fx_r_type != BFD_RELOC_CTOR)
1846 {
1847 as_bad_where (fixp->fx_file, fixp->fx_line,
1848 _("Relocation cannot be done when using -mrelocatable"));
1849 }
1850 }
1851 return;
1852 }
1853}
0baf16f2 1854
7e8d4ab4
AM		 1855/* Prevent elf_frob_file_before_adjust removing a weak undefined
1856 function descriptor sym if the corresponding code sym is used. */
1857
1858void
1859ppc_frob_file_before_adjust ()
0baf16f2 1860{
7e8d4ab4 1861 symbolS *symp;
0baf16f2 1862
7e8d4ab4
AM		 1863 if (!ppc_obj64)
1864 return;
1865
1866 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1867 {
7e8d4ab4
AM		 1868 const char *name;
1869 char *dotname;
1870 symbolS *dotsym;
1871 size_t len;
1872
1873 name = S_GET_NAME (symp);
1874 if (name[0] == '.')
1875 continue;
1876
1877 if (! S_IS_WEAK (symp)
1878 || S_IS_DEFINED (symp))
1879 continue;
1880
1881 len = strlen (name) + 1;
1882 dotname = xmalloc (len + 1);
1883 dotname[0] = '.';
1884 memcpy (dotname + 1, name, len);
1885 dotsym = symbol_find (dotname);
1886 free (dotname);
1887 if (dotsym != NULL && (symbol_used_p (dotsym)
1888 || symbol_used_in_reloc_p (dotsym)))
1889 {
1890 symbol_mark_used (symp);
1891 }
0baf16f2
AM		 1892 }
1893
7e8d4ab4
AM		 1894 /* Don't emit .TOC. symbol. */
1895 symp = symbol_find (".TOC.");
1896 if (symp != NULL)
1897 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1898}
252b5132
RH		 1899#endif /* OBJ_ELF */
1900\f
1901#ifdef TE_PE
1902
1903/*
99a814a1 1904 * Summary of parse_toc_entry.
252b5132
RH		 1905 *
1906 * in: Input_line_pointer points to the '[' in one of:
1907 *
1908 * [toc] [tocv] [toc32] [toc64]
1909 *
1910 * Anything else is an error of one kind or another.
1911 *
81d4177b 1912 * out:
252b5132
RH		 1913 * return value: success or failure
1914 * toc_kind: kind of toc reference
1915 * input_line_pointer:
1916 * success: first char after the ']'
1917 * failure: unchanged
1918 *
1919 * settings:
1920 *
1921 * [toc] - rv == success, toc_kind = default_toc
1922 * [tocv] - rv == success, toc_kind = data_in_toc
1923 * [toc32] - rv == success, toc_kind = must_be_32
1924 * [toc64] - rv == success, toc_kind = must_be_64
1925 *
1926 */
1927
81d4177b
KH		 1928enum toc_size_qualifier
1929{
252b5132
RH		 1930 default_toc, /* The toc cell constructed should be the system default size */
1931 data_in_toc, /* This is a direct reference to a toc cell */
1932 must_be_32, /* The toc cell constructed must be 32 bits wide */
1933 must_be_64 /* The toc cell constructed must be 64 bits wide */
1934};
1935
1936static int
99a814a1 1937parse_toc_entry (toc_kind)
252b5132
RH		 1938 enum toc_size_qualifier *toc_kind;
1939{
1940 char *start;
1941 char *toc_spec;
1942 char c;
1943 enum toc_size_qualifier t;
1944
99a814a1 1945 /* Save the input_line_pointer. */
252b5132
RH		 1946 start = input_line_pointer;
1947
99a814a1 1948 /* Skip over the '[' , and whitespace. */
252b5132
RH		 1949 ++input_line_pointer;
1950 SKIP_WHITESPACE ();
81d4177b 1951
99a814a1 1952 /* Find the spelling of the operand. */
252b5132
RH		 1953 toc_spec = input_line_pointer;
1954 c = get_symbol_end ();
1955
99a814a1 1956 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 1957 {
1958 t = default_toc;
1959 }
99a814a1 1960 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 1961 {
1962 t = data_in_toc;
1963 }
99a814a1 1964 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 1965 {
1966 t = must_be_32;
1967 }
99a814a1 1968 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 1969 {
1970 t = must_be_64;
1971 }
1972 else
1973 {
1974 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 1975 *input_line_pointer = c;
1976 input_line_pointer = start;
252b5132
RH		 1977 return 0;
1978 }
1979
99a814a1
AM		 1980 /* Now find the ']'. */
1981 *input_line_pointer = c;
252b5132 1982
81d4177b
KH		 1983 SKIP_WHITESPACE (); /* leading whitespace could be there. */
1984 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 1985
1986 if (c != ']')
1987 {
1988 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 1989 input_line_pointer = start;
252b5132
RH		 1990 return 0;
1991 }
1992
99a814a1 1993 *toc_kind = t;
252b5132
RH		 1994 return 1;
1995}
1996#endif
1997\f
1998
dc1d03fc 1999#ifdef OBJ_ELF
6a0c61b7
EZ		 2000#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2001static void
dc1d03fc 2002ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2003 unsigned int apu, version;
2004{
2005 unsigned int i;
2006
2007 /* Check we don't already exist. */
2008 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2009 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2010 return;
b34976b6 2011
6a0c61b7
EZ		 2012 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2013 {
2014 if (ppc_apuinfo_num_alloc == 0)
2015 {
2016 ppc_apuinfo_num_alloc = 4;
2017 ppc_apuinfo_list = (unsigned long *)
2018 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2019 }
2020 else
2021 {
2022 ppc_apuinfo_num_alloc += 4;
2023 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2024 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2025 }
2026 }
dc1d03fc 2027 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2028}
2029#undef APUID
dc1d03fc 2030#endif
6a0c61b7
EZ		 2031\f
2032
252b5132
RH		 2033/* We need to keep a list of fixups. We can't simply generate them as
2034 we go, because that would require us to first create the frag, and
2035 that would screw up references to ``.''. */
2036
2037struct ppc_fixup
2038{
2039 expressionS exp;
2040 int opindex;
2041 bfd_reloc_code_real_type reloc;
2042};
2043
2044#define MAX_INSN_FIXUPS (5)
2045
2046/* This routine is called for each instruction to be assembled. */
2047
2048void
2049md_assemble (str)
2050 char *str;
2051{
2052 char *s;
2053 const struct powerpc_opcode *opcode;
2054 unsigned long insn;
2055 const unsigned char *opindex_ptr;
2056 int skip_optional;
2057 int need_paren;
2058 int next_opindex;
2059 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2060 int fc;
2061 char *f;
2062 int i;
2063#ifdef OBJ_ELF
2064 bfd_reloc_code_real_type reloc;
2065#endif
2066
2067 /* Get the opcode. */
3882b010 2068 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2069 ;
2070 if (*s != '\0')
2071 *s++ = '\0';
2072
2073 /* Look up the opcode in the hash table. */
2074 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2075 if (opcode == (const struct powerpc_opcode *) NULL)
2076 {
2077 const struct powerpc_macro *macro;
2078
2079 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2080 if (macro == (const struct powerpc_macro *) NULL)
2081 as_bad (_("Unrecognized opcode: `%s'"), str);
2082 else
2083 ppc_macro (s, macro);
2084
2085 return;
2086 }
2087
2088 insn = opcode->opcode;
2089
2090 str = s;
3882b010 2091 while (ISSPACE (*str))
252b5132
RH		 2092 ++str;
2093
2094 /* PowerPC operands are just expressions. The only real issue is
2095 that a few operand types are optional. All cases which might use
2096 an optional operand separate the operands only with commas (in
2097 some cases parentheses are used, as in ``lwz 1,0(1)'' but such
2098 cases never have optional operands). There is never more than
2099 one optional operand for an instruction. So, before we start
2100 seriously parsing the operands, we check to see if we have an
2101 optional operand, and, if we do, we count the number of commas to
2102 see whether the operand should be omitted. */
2103 skip_optional = 0;
2104 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2105 {
2106 const struct powerpc_operand *operand;
2107
2108 operand = &powerpc_operands[*opindex_ptr];
2109 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2110 {
2111 unsigned int opcount;
7fe9cf6b
NC		 2112 unsigned int num_operands_expected;
2113 unsigned int i;
252b5132
RH		 2114
2115 /* There is an optional operand. Count the number of
2116 commas in the input line. */
2117 if (*str == '\0')
2118 opcount = 0;
2119 else
2120 {
2121 opcount = 1;
2122 s = str;
2123 while ((s = strchr (s, ',')) != (char *) NULL)
2124 {
2125 ++opcount;
2126 ++s;
2127 }
2128 }
2129
7fe9cf6b
NC		 2130 /* Compute the number of expected operands.
2131 Do not count fake operands. */
2132 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2133 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2134 ++ num_operands_expected;
2135
252b5132
RH		 2136 /* If there are fewer operands in the line then are called
2137 for by the instruction, we want to skip the optional
2138 operand. */
7fe9cf6b 2139 if (opcount < num_operands_expected)
252b5132
RH		 2140 skip_optional = 1;
2141
2142 break;
2143 }
2144 }
2145
2146 /* Gather the operands. */
2147 need_paren = 0;
2148 next_opindex = 0;
2149 fc = 0;
2150 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2151 {
2152 const struct powerpc_operand *operand;
2153 const char *errmsg;
2154 char *hold;
2155 expressionS ex;
2156 char endc;
2157
2158 if (next_opindex == 0)
2159 operand = &powerpc_operands[*opindex_ptr];
2160 else
2161 {
2162 operand = &powerpc_operands[next_opindex];
2163 next_opindex = 0;
2164 }
252b5132
RH		 2165 errmsg = NULL;
2166
2167 /* If this is a fake operand, then we do not expect anything
2168 from the input. */
2169 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2170 {
2b3c4602 2171 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2172 if (errmsg != (const char *) NULL)
2173 as_bad (errmsg);
2174 continue;
2175 }
2176
2177 /* If this is an optional operand, and we are skipping it, just
2178 insert a zero. */
2179 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2180 && skip_optional)
2181 {
2182 if (operand->insert)
2183 {
2b3c4602 2184 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2185 if (errmsg != (const char *) NULL)
2186 as_bad (errmsg);
2187 }
2188 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2189 next_opindex = *opindex_ptr + 1;
2190 continue;
2191 }
2192
2193 /* Gather the operand. */
2194 hold = input_line_pointer;
2195 input_line_pointer = str;
2196
2197#ifdef TE_PE
81d4177b 2198 if (*input_line_pointer == '[')
252b5132
RH		 2199 {
2200 /* We are expecting something like the second argument here:
99a814a1
AM		 2201 *
2202 * lwz r4,[toc].GS.0.static_int(rtoc)
2203 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2204 * The argument following the `]' must be a symbol name, and the
2205 * register must be the toc register: 'rtoc' or '2'
2206 *
2207 * The effect is to 0 as the displacement field
2208 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2209 * the appropriate variation) reloc against it based on the symbol.
2210 * The linker will build the toc, and insert the resolved toc offset.
2211 *
2212 * Note:
2213 * o The size of the toc entry is currently assumed to be
2214 * 32 bits. This should not be assumed to be a hard coded
2215 * number.
2216 * o In an effort to cope with a change from 32 to 64 bits,
2217 * there are also toc entries that are specified to be
2218 * either 32 or 64 bits:
2219 * lwz r4,[toc32].GS.0.static_int(rtoc)
2220 * lwz r4,[toc64].GS.0.static_int(rtoc)
2221 * These demand toc entries of the specified size, and the
2222 * instruction probably requires it.
2223 */
252b5132
RH		 2224
2225 int valid_toc;
2226 enum toc_size_qualifier toc_kind;
2227 bfd_reloc_code_real_type toc_reloc;
2228
99a814a1
AM		 2229 /* Go parse off the [tocXX] part. */
2230 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2231
81d4177b 2232 if (!valid_toc)
252b5132 2233 {
99a814a1
AM		 2234 /* Note: message has already been issued.
2235 FIXME: what sort of recovery should we do?
2236 demand_rest_of_line (); return; ? */
252b5132
RH		 2237 }
2238
99a814a1
AM		 2239 /* Now get the symbol following the ']'. */
2240 expression (&ex);
252b5132
RH		 2241
2242 switch (toc_kind)
2243 {
2244 case default_toc:
99a814a1
AM		 2245 /* In this case, we may not have seen the symbol yet,
2246 since it is allowed to appear on a .extern or .globl
2247 or just be a label in the .data section. */
252b5132
RH		 2248 toc_reloc = BFD_RELOC_PPC_TOC16;
2249 break;
2250 case data_in_toc:
99a814a1
AM		 2251 /* 1. The symbol must be defined and either in the toc
2252 section, or a global.
2253 2. The reloc generated must have the TOCDEFN flag set
2254 in upper bit mess of the reloc type.
2255 FIXME: It's a little confusing what the tocv
2256 qualifier can be used for. At the very least, I've
2257 seen three uses, only one of which I'm sure I can
2258 explain. */
81d4177b
KH		 2259 if (ex.X_op == O_symbol)
2260 {
252b5132 2261 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2262 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2263 != tocdata_section)
252b5132 2264 {
99a814a1 2265 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2266 }
2267 }
2268
2269 toc_reloc = BFD_RELOC_PPC_TOC16;
2270 break;
2271 case must_be_32:
99a814a1
AM		 2272 /* FIXME: these next two specifically specify 32/64 bit
2273 toc entries. We don't support them today. Is this
2274 the right way to say that? */
252b5132
RH		 2275 toc_reloc = BFD_RELOC_UNUSED;
2276 as_bad (_("Unimplemented toc32 expression modifier"));
2277 break;
2278 case must_be_64:
99a814a1 2279 /* FIXME: see above. */
252b5132
RH		 2280 toc_reloc = BFD_RELOC_UNUSED;
2281 as_bad (_("Unimplemented toc64 expression modifier"));
2282 break;
2283 default:
bc805888 2284 fprintf (stderr,
99a814a1
AM		 2285 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2286 toc_kind);
bc805888 2287 abort ();
252b5132
RH		 2288 break;
2289 }
2290
2291 /* We need to generate a fixup for this expression. */
2292 if (fc >= MAX_INSN_FIXUPS)
2293 as_fatal (_("too many fixups"));
2294
2295 fixups[fc].reloc = toc_reloc;
2296 fixups[fc].exp = ex;
2297 fixups[fc].opindex = *opindex_ptr;
2298 ++fc;
2299
99a814a1
AM		 2300 /* Ok. We've set up the fixup for the instruction. Now make it
2301 look like the constant 0 was found here. */
252b5132
RH		 2302 ex.X_unsigned = 1;
2303 ex.X_op = O_constant;
2304 ex.X_add_number = 0;
2305 ex.X_add_symbol = NULL;
2306 ex.X_op_symbol = NULL;
2307 }
2308
2309 else
2310#endif /* TE_PE */
2311 {
2312 if (! register_name (&ex))
2313 {
2314 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2315 cr_operand = TRUE;
252b5132 2316 expression (&ex);
b34976b6 2317 cr_operand = FALSE;
252b5132
RH		 2318 }
2319 }
2320
2321 str = input_line_pointer;
2322 input_line_pointer = hold;
2323
2324 if (ex.X_op == O_illegal)
2325 as_bad (_("illegal operand"));
2326 else if (ex.X_op == O_absent)
2327 as_bad (_("missing operand"));
2328 else if (ex.X_op == O_register)
2329 {
2330 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2331 (char *) NULL, 0);
2332 }
2333 else if (ex.X_op == O_constant)
2334 {
2335#ifdef OBJ_ELF
81d4177b 2336 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2337 char *orig_str = str;
2338
2339 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2340 switch (reloc)
2341 {
2342 default:
2343 str = orig_str;
2344 break;
2345
2346 case BFD_RELOC_LO16:
2347 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2348 something which cleared it, we always produce a
2349 signed value. */
2350 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2351 ex.X_add_number &= 0xffff;
2352 else
0baf16f2 2353 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2354 break;
2355
2356 case BFD_RELOC_HI16:
0baf16f2
AM		 2357 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2358 ex.X_add_number = PPC_HI (ex.X_add_number);
2359 else
2360 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2361 break;
2362
2363 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2364 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2365 ex.X_add_number = PPC_HA (ex.X_add_number);
2366 else
2367 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2368 break;
2369
0baf16f2
AM		 2370 case BFD_RELOC_PPC64_HIGHER:
2371 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2372 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2373 else
2374 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2375 break;
2376
2377 case BFD_RELOC_PPC64_HIGHER_S:
2378 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2379 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2380 else
2381 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2382 break;
0baf16f2
AM		 2383
2384 case BFD_RELOC_PPC64_HIGHEST:
2385 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2386 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2387 else
2388 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2389 break;
2390
2391 case BFD_RELOC_PPC64_HIGHEST_S:
2392 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2393 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2394 else
2395 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2396 break;
252b5132 2397 }
0baf16f2 2398#endif /* OBJ_ELF */
252b5132
RH		 2399 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2400 (char *) NULL, 0);
2401 }
2402#ifdef OBJ_ELF
2403 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2404 {
cdba85ec
AM		 2405 /* Some TLS tweaks. */
2406 switch (reloc)
2407 {
2408 default:
2409 break;
2410 case BFD_RELOC_PPC_TLS:
2411 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2412 (char *) NULL, 0);
2413 break;
2414 /* We'll only use the 32 (or 64) bit form of these relocations
2415 in constants. Instructions get the 16 bit form. */
2416 case BFD_RELOC_PPC_DTPREL:
2417 reloc = BFD_RELOC_PPC_DTPREL16;
2418 break;
2419 case BFD_RELOC_PPC_TPREL:
2420 reloc = BFD_RELOC_PPC_TPREL16;
2421 break;
2422 }
2423
99a814a1
AM		 2424 /* For the absolute forms of branches, convert the PC
2425 relative form back into the absolute. */
252b5132
RH		 2426 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2427 {
2428 switch (reloc)
2429 {
2430 case BFD_RELOC_PPC_B26:
2431 reloc = BFD_RELOC_PPC_BA26;
2432 break;
2433 case BFD_RELOC_PPC_B16:
2434 reloc = BFD_RELOC_PPC_BA16;
2435 break;
2436 case BFD_RELOC_PPC_B16_BRTAKEN:
2437 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2438 break;
2439 case BFD_RELOC_PPC_B16_BRNTAKEN:
2440 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2441 break;
2442 default:
2443 break;
2444 }
2445 }
2446
2b3c4602 2447 if (ppc_obj64
0baf16f2
AM		 2448 && (operand->flags & PPC_OPERAND_DS) != 0)
2449 {
2450 switch (reloc)
2451 {
2452 case BFD_RELOC_16:
2453 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2454 break;
2455 case BFD_RELOC_LO16:
2456 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2457 break;
2458 case BFD_RELOC_16_GOTOFF:
2459 reloc = BFD_RELOC_PPC64_GOT16_DS;
2460 break;
2461 case BFD_RELOC_LO16_GOTOFF:
2462 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2463 break;
2464 case BFD_RELOC_LO16_PLTOFF:
2465 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2466 break;
1cfc59d5 2467 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2468 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2469 break;
2470 case BFD_RELOC_LO16_BASEREL:
2471 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2472 break;
2473 case BFD_RELOC_PPC_TOC16:
2474 reloc = BFD_RELOC_PPC64_TOC16_DS;
2475 break;
2476 case BFD_RELOC_PPC64_TOC16_LO:
2477 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2478 break;
2479 case BFD_RELOC_PPC64_PLTGOT16:
2480 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2481 break;
2482 case BFD_RELOC_PPC64_PLTGOT16_LO:
2483 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2484 break;
cdba85ec
AM		 2485 case BFD_RELOC_PPC_DTPREL16:
2486 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2487 break;
2488 case BFD_RELOC_PPC_DTPREL16_LO:
2489 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2490 break;
2491 case BFD_RELOC_PPC_TPREL16:
2492 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2493 break;
2494 case BFD_RELOC_PPC_TPREL16_LO:
2495 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2496 break;
2497 case BFD_RELOC_PPC_GOT_DTPREL16:
2498 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2499 case BFD_RELOC_PPC_GOT_TPREL16:
2500 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2501 break;
0baf16f2
AM		 2502 default:
2503 as_bad (_("unsupported relocation for DS offset field"));
2504 break;
2505 }
2506 }
2507
252b5132
RH		 2508 /* We need to generate a fixup for this expression. */
2509 if (fc >= MAX_INSN_FIXUPS)
2510 as_fatal (_("too many fixups"));
2511 fixups[fc].exp = ex;
2512 fixups[fc].opindex = 0;
2513 fixups[fc].reloc = reloc;
2514 ++fc;
2515 }
2516#endif /* OBJ_ELF */
2517
2518 else
2519 {
2520 /* We need to generate a fixup for this expression. */
2521 if (fc >= MAX_INSN_FIXUPS)
2522 as_fatal (_("too many fixups"));
2523 fixups[fc].exp = ex;
2524 fixups[fc].opindex = *opindex_ptr;
2525 fixups[fc].reloc = BFD_RELOC_UNUSED;
2526 ++fc;
2527 }
2528
2529 if (need_paren)
2530 {
2531 endc = ')';
2532 need_paren = 0;
2533 }
2534 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2535 {
2536 endc = '(';
2537 need_paren = 1;
2538 }
2539 else
2540 endc = ',';
2541
2542 /* The call to expression should have advanced str past any
2543 whitespace. */
2544 if (*str != endc
2545 && (endc != ',' || *str != '\0'))
2546 {
2547 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2548 break;
2549 }
2550
2551 if (*str != '\0')
2552 ++str;
2553 }
2554
3882b010 2555 while (ISSPACE (*str))
252b5132
RH		 2556 ++str;
2557
2558 if (*str != '\0')
2559 as_bad (_("junk at end of line: `%s'"), str);
2560
dc1d03fc 2561#ifdef OBJ_ELF
6a0c61b7
EZ		 2562 /* Do we need/want a APUinfo section? */
2563 if (ppc_cpu & (PPC_OPCODE_SPE
2564 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2565 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2566 | PPC_OPCODE_RFMCI))
2567 {
2568 /* These are all version "1". */
2569 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2570 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2571 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2572 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2573 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2574 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2575 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2576 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2577 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2578 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2579 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2580 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2581 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2582 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2583 }
dc1d03fc 2584#endif
6a0c61b7 2585
252b5132
RH		 2586 /* Write out the instruction. */
2587 f = frag_more (4);
2588 md_number_to_chars (f, insn, 4);
2589
5d6f4f16
GK		 2590#ifdef OBJ_ELF
2591 dwarf2_emit_insn (4);
2592#endif
2593
252b5132
RH		 2594 /* Create any fixups. At this point we do not use a
2595 bfd_reloc_code_real_type, but instead just use the
2596 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2597 handle fixups for any operand type, although that is admittedly
2598 not a very exciting feature. We pick a BFD reloc type in
94f592af 2599 md_apply_fix3. */
252b5132
RH		 2600 for (i = 0; i < fc; i++)
2601 {
2602 const struct powerpc_operand *operand;
2603
2604 operand = &powerpc_operands[fixups[i].opindex];
2605 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2606 {
99a814a1 2607 reloc_howto_type *reloc_howto;
252b5132
RH		 2608 int size;
2609 int offset;
2610 fixS *fixP;
2611
99a814a1 2612 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2613 if (!reloc_howto)
2614 abort ();
2615
2616 size = bfd_get_reloc_size (reloc_howto);
2617 offset = target_big_endian ? (4 - size) : 0;
2618
2619 if (size < 1 || size > 4)
bc805888 2620 abort ();
252b5132 2621
99a814a1
AM		 2622 fixP = fix_new_exp (frag_now,
2623 f - frag_now->fr_literal + offset,
2624 size,
2625 &fixups[i].exp,
2626 reloc_howto->pc_relative,
252b5132
RH		 2627 fixups[i].reloc);
2628
2629 /* Turn off complaints that the addend is too large for things like
2630 foo+100000@ha. */
2631 switch (fixups[i].reloc)
2632 {
2633 case BFD_RELOC_16_GOTOFF:
2634 case BFD_RELOC_PPC_TOC16:
2635 case BFD_RELOC_LO16:
2636 case BFD_RELOC_HI16:
2637 case BFD_RELOC_HI16_S:
0baf16f2 2638#ifdef OBJ_ELF
0baf16f2
AM		 2639 case BFD_RELOC_PPC64_HIGHER:
2640 case BFD_RELOC_PPC64_HIGHER_S:
2641 case BFD_RELOC_PPC64_HIGHEST:
2642 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2643#endif
252b5132
RH		 2644 fixP->fx_no_overflow = 1;
2645 break;
2646 default:
2647 break;
2648 }
2649 }
2650 else
99a814a1
AM		 2651 fix_new_exp (frag_now,
2652 f - frag_now->fr_literal,
2653 4,
252b5132
RH		 2654 &fixups[i].exp,
2655 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2656 ((bfd_reloc_code_real_type)
99a814a1 2657 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2658 }
2659}
2660
2661/* Handle a macro. Gather all the operands, transform them as
2662 described by the macro, and call md_assemble recursively. All the
2663 operands are separated by commas; we don't accept parentheses
2664 around operands here. */
2665
2666static void
2667ppc_macro (str, macro)
2668 char *str;
2669 const struct powerpc_macro *macro;
2670{
2671 char *operands[10];
2672 unsigned int count;
2673 char *s;
2674 unsigned int len;
2675 const char *format;
2676 int arg;
2677 char *send;
2678 char *complete;
2679
2680 /* Gather the users operands into the operands array. */
2681 count = 0;
2682 s = str;
2683 while (1)
2684 {
2685 if (count >= sizeof operands / sizeof operands[0])
2686 break;
2687 operands[count++] = s;
2688 s = strchr (s, ',');
2689 if (s == (char *) NULL)
2690 break;
2691 *s++ = '\0';
81d4177b 2692 }
252b5132
RH		 2693
2694 if (count != macro->operands)
2695 {
2696 as_bad (_("wrong number of operands"));
2697 return;
2698 }
2699
2700 /* Work out how large the string must be (the size is unbounded
2701 because it includes user input). */
2702 len = 0;
2703 format = macro->format;
2704 while (*format != '\0')
2705 {
2706 if (*format != '%')
2707 {
2708 ++len;
2709 ++format;
2710 }
2711 else
2712 {
2713 arg = strtol (format + 1, &send, 10);
2714 know (send != format && arg >= 0 && arg < count);
2715 len += strlen (operands[arg]);
2716 format = send;
2717 }
2718 }
2719
2720 /* Put the string together. */
2721 complete = s = (char *) alloca (len + 1);
2722 format = macro->format;
2723 while (*format != '\0')
2724 {
2725 if (*format != '%')
2726 *s++ = *format++;
2727 else
2728 {
2729 arg = strtol (format + 1, &send, 10);
2730 strcpy (s, operands[arg]);
2731 s += strlen (s);
2732 format = send;
2733 }
2734 }
2735 *s = '\0';
2736
2737 /* Assemble the constructed instruction. */
2738 md_assemble (complete);
81d4177b 2739}
252b5132
RH		 2740\f
2741#ifdef OBJ_ELF
99a814a1 2742/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2743
2744int
2745ppc_section_letter (letter, ptr_msg)
2746 int letter;
2747 char **ptr_msg;
2748{
2749 if (letter == 'e')
2750 return SHF_EXCLUDE;
2751
13ae64f3 2752 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
252b5132
RH		 2753 return 0;
2754}
2755
2756int
9de8d8f1
RH		 2757ppc_section_word (str, len)
2758 char *str;
2759 size_t len;
252b5132 2760{
9de8d8f1
RH		 2761 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2762 return SHF_EXCLUDE;
252b5132 2763
9de8d8f1 2764 return -1;
252b5132
RH		 2765}
2766
2767int
9de8d8f1
RH		 2768ppc_section_type (str, len)
2769 char *str;
2770 size_t len;
252b5132 2771{
9de8d8f1
RH		 2772 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2773 return SHT_ORDERED;
252b5132 2774
9de8d8f1 2775 return -1;
252b5132
RH		 2776}
2777
2778int
2779ppc_section_flags (flags, attr, type)
2780 int flags;
2781 int attr;
2782 int type;
2783{
2784 if (type == SHT_ORDERED)
2785 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2786
2787 if (attr & SHF_EXCLUDE)
2788 flags |= SEC_EXCLUDE;
2789
2790 return flags;
2791}
2792#endif /* OBJ_ELF */
2793
2794\f
2795/* Pseudo-op handling. */
2796
2797/* The .byte pseudo-op. This is similar to the normal .byte
2798 pseudo-op, but it can also take a single ASCII string. */
2799
2800static void
2801ppc_byte (ignore)
92161534 2802 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2803{
2804 if (*input_line_pointer != '\"')
2805 {
2806 cons (1);
2807 return;
2808 }
2809
2810 /* Gather characters. A real double quote is doubled. Unusual
2811 characters are not permitted. */
2812 ++input_line_pointer;
2813 while (1)
2814 {
2815 char c;
2816
2817 c = *input_line_pointer++;
2818
2819 if (c == '\"')
2820 {
2821 if (*input_line_pointer != '\"')
2822 break;
2823 ++input_line_pointer;
2824 }
2825
2826 FRAG_APPEND_1_CHAR (c);
2827 }
2828
2829 demand_empty_rest_of_line ();
2830}
2831\f
2832#ifdef OBJ_XCOFF
2833
2834/* XCOFF specific pseudo-op handling. */
2835
2836/* This is set if we are creating a .stabx symbol, since we don't want
2837 to handle symbol suffixes for such symbols. */
b34976b6 2838static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2839
2840/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2841 symbols in the .bss segment as though they were local common
1ad63b2f
TR		 2842 symbols, and uses a different smclas. The native Aix 4.3.3 assember
2843 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2844
2845static void
2846ppc_comm (lcomm)
2847 int lcomm;
2848{
2849 asection *current_seg = now_seg;
2850 subsegT current_subseg = now_subseg;
2851 char *name;
2852 char endc;
2853 char *end_name;
2854 offsetT size;
2855 offsetT align;
2856 symbolS *lcomm_sym = NULL;
2857 symbolS *sym;
2858 char *pfrag;
2859
2860 name = input_line_pointer;
2861 endc = get_symbol_end ();
2862 end_name = input_line_pointer;
2863 *end_name = endc;
2864
2865 if (*input_line_pointer != ',')
2866 {
2867 as_bad (_("missing size"));
2868 ignore_rest_of_line ();
2869 return;
2870 }
2871 ++input_line_pointer;
2872
2873 size = get_absolute_expression ();
2874 if (size < 0)
2875 {
2876 as_bad (_("negative size"));
2877 ignore_rest_of_line ();
2878 return;
2879 }
2880
2881 if (! lcomm)
2882 {
2883 /* The third argument to .comm is the alignment. */
2884 if (*input_line_pointer != ',')
1ad63b2f 2885 align = 2;
252b5132
RH		 2886 else
2887 {
2888 ++input_line_pointer;
2889 align = get_absolute_expression ();
2890 if (align <= 0)
2891 {
2892 as_warn (_("ignoring bad alignment"));
1ad63b2f 2893 align = 2;
252b5132
RH		 2894 }
2895 }
2896 }
2897 else
2898 {
2899 char *lcomm_name;
2900 char lcomm_endc;
2901
1ad63b2f 2902 if (size <= 4)
252b5132
RH		 2903 align = 2;
2904 else
2905 align = 3;
2906
2907 /* The third argument to .lcomm appears to be the real local
2908 common symbol to create. References to the symbol named in
2909 the first argument are turned into references to the third
2910 argument. */
2911 if (*input_line_pointer != ',')
2912 {
2913 as_bad (_("missing real symbol name"));
2914 ignore_rest_of_line ();
2915 return;
2916 }
2917 ++input_line_pointer;
2918
2919 lcomm_name = input_line_pointer;
2920 lcomm_endc = get_symbol_end ();
81d4177b 2921
252b5132
RH		 2922 lcomm_sym = symbol_find_or_make (lcomm_name);
2923
2924 *input_line_pointer = lcomm_endc;
2925 }
2926
2927 *end_name = '\0';
2928 sym = symbol_find_or_make (name);
2929 *end_name = endc;
2930
2931 if (S_IS_DEFINED (sym)
2932 || S_GET_VALUE (sym) != 0)
2933 {
2934 as_bad (_("attempt to redefine symbol"));
2935 ignore_rest_of_line ();
2936 return;
2937 }
81d4177b 2938
252b5132 2939 record_alignment (bss_section, align);
81d4177b 2940
252b5132
RH		 2941 if (! lcomm
2942 || ! S_IS_DEFINED (lcomm_sym))
2943 {
2944 symbolS *def_sym;
2945 offsetT def_size;
2946
2947 if (! lcomm)
2948 {
2949 def_sym = sym;
2950 def_size = size;
2951 S_SET_EXTERNAL (sym);
2952 }
2953 else
2954 {
809ffe0d 2955 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 2956 def_sym = lcomm_sym;
2957 def_size = 0;
2958 }
2959
2960 subseg_set (bss_section, 1);
2961 frag_align (align, 0, 0);
81d4177b 2962
809ffe0d 2963 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 2964 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
2965 def_size, (char *) NULL);
2966 *pfrag = 0;
2967 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 2968 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 2969 }
2970 else if (lcomm)
2971 {
2972 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 2973 symbol_get_frag (lcomm_sym)->fr_offset =
2974 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 2975 &~ ((1 << align) - 1));
809ffe0d
ILT		 2976 if (align > symbol_get_tc (lcomm_sym)->align)
2977 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 2978 }
2979
2980 if (lcomm)
2981 {
2982 /* Make sym an offset from lcomm_sym. */
2983 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 2984 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
2985 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
2986 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 2987 }
2988
2989 subseg_set (current_seg, current_subseg);
2990
2991 demand_empty_rest_of_line ();
2992}
2993
2994/* The .csect pseudo-op. This switches us into a different
2995 subsegment. The first argument is a symbol whose value is the
2996 start of the .csect. In COFF, csect symbols get special aux
2997 entries defined by the x_csect field of union internal_auxent. The
2998 optional second argument is the alignment (the default is 2). */
2999
3000static void
3001ppc_csect (ignore)
5480ccf3 3002 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3003{
3004 char *name;
3005 char endc;
3006 symbolS *sym;
3007
3008 name = input_line_pointer;
3009 endc = get_symbol_end ();
81d4177b 3010
252b5132
RH		 3011 sym = symbol_find_or_make (name);
3012
3013 *input_line_pointer = endc;
3014
3015 if (S_GET_NAME (sym)[0] == '\0')
3016 {
3017 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3018 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3019 }
3020
3021 ppc_change_csect (sym);
3022
3023 if (*input_line_pointer == ',')
3024 {
3025 ++input_line_pointer;
809ffe0d 3026 symbol_get_tc (sym)->align = get_absolute_expression ();
252b5132
RH		 3027 }
3028
3029 demand_empty_rest_of_line ();
3030}
3031
3032/* Change to a different csect. */
3033
3034static void
3035ppc_change_csect (sym)
3036 symbolS *sym;
3037{
3038 if (S_IS_DEFINED (sym))
809ffe0d 3039 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3040 else
3041 {
3042 symbolS **list_ptr;
3043 int after_toc;
3044 int hold_chunksize;
3045 symbolS *list;
3046
3047 /* This is a new csect. We need to look at the symbol class to
3048 figure out whether it should go in the text section or the
3049 data section. */
3050 after_toc = 0;
809ffe0d 3051 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3052 {
3053 case XMC_PR:
3054 case XMC_RO:
3055 case XMC_DB:
3056 case XMC_GL:
3057 case XMC_XO:
3058 case XMC_SV:
3059 case XMC_TI:
3060 case XMC_TB:
3061 S_SET_SEGMENT (sym, text_section);
809ffe0d 3062 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3063 ++ppc_text_subsegment;
3064 list_ptr = &ppc_text_csects;
3065 break;
3066 case XMC_RW:
3067 case XMC_TC0:
3068 case XMC_TC:
3069 case XMC_DS:
3070 case XMC_UA:
3071 case XMC_BS:
3072 case XMC_UC:
3073 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3074 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3075 == ppc_data_subsegment))
252b5132
RH		 3076 after_toc = 1;
3077 S_SET_SEGMENT (sym, data_section);
809ffe0d 3078 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3079 ++ppc_data_subsegment;
3080 list_ptr = &ppc_data_csects;
3081 break;
3082 default:
3083 abort ();
3084 }
3085
3086 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3087 changing subsegments, so that we don't use a lot of memory
3088 space for what may be a small section. */
252b5132
RH		 3089 hold_chunksize = chunksize;
3090 chunksize = 64;
3091
809ffe0d
ILT		 3092 subseg_new (segment_name (S_GET_SEGMENT (sym)),
3093 symbol_get_tc (sym)->subseg);
252b5132
RH		 3094
3095 chunksize = hold_chunksize;
3096
3097 if (after_toc)
3098 ppc_after_toc_frag = frag_now;
3099
809ffe0d 3100 symbol_set_frag (sym, frag_now);
252b5132
RH		 3101 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3102
b4f96c78 3103 symbol_get_tc (sym)->align = 2;
809ffe0d
ILT		 3104 symbol_get_tc (sym)->output = 1;
3105 symbol_get_tc (sym)->within = sym;
81d4177b 3106
252b5132 3107 for (list = *list_ptr;
809ffe0d
ILT		 3108 symbol_get_tc (list)->next != (symbolS *) NULL;
3109 list = symbol_get_tc (list)->next)
252b5132 3110 ;
809ffe0d 3111 symbol_get_tc (list)->next = sym;
81d4177b 3112
252b5132 3113 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3114 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3115 &symbol_lastP);
252b5132
RH		 3116 }
3117
3118 ppc_current_csect = sym;
3119}
3120
3121/* This function handles the .text and .data pseudo-ops. These
3122 pseudo-ops aren't really used by XCOFF; we implement them for the
3123 convenience of people who aren't used to XCOFF. */
3124
3125static void
3126ppc_section (type)
3127 int type;
3128{
3129 const char *name;
3130 symbolS *sym;
3131
3132 if (type == 't')
3133 name = ".text[PR]";
3134 else if (type == 'd')
3135 name = ".data[RW]";
3136 else
3137 abort ();
3138
3139 sym = symbol_find_or_make (name);
3140
3141 ppc_change_csect (sym);
3142
3143 demand_empty_rest_of_line ();
3144}
3145
3146/* This function handles the .section pseudo-op. This is mostly to
3147 give an error, since XCOFF only supports .text, .data and .bss, but
3148 we do permit the user to name the text or data section. */
3149
3150static void
3151ppc_named_section (ignore)
5480ccf3 3152 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3153{
3154 char *user_name;
3155 const char *real_name;
3156 char c;
3157 symbolS *sym;
3158
3159 user_name = input_line_pointer;
3160 c = get_symbol_end ();
3161
3162 if (strcmp (user_name, ".text") == 0)
3163 real_name = ".text[PR]";
3164 else if (strcmp (user_name, ".data") == 0)
3165 real_name = ".data[RW]";
3166 else
3167 {
3168 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3169 *input_line_pointer = c;
3170 ignore_rest_of_line ();
3171 return;
3172 }
3173
3174 *input_line_pointer = c;
3175
3176 sym = symbol_find_or_make (real_name);
3177
3178 ppc_change_csect (sym);
3179
3180 demand_empty_rest_of_line ();
3181}
3182
3183/* The .extern pseudo-op. We create an undefined symbol. */
3184
3185static void
3186ppc_extern (ignore)
5480ccf3 3187 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3188{
3189 char *name;
3190 char endc;
3191
3192 name = input_line_pointer;
3193 endc = get_symbol_end ();
3194
3195 (void) symbol_find_or_make (name);
3196
3197 *input_line_pointer = endc;
3198
3199 demand_empty_rest_of_line ();
3200}
3201
3202/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3203
3204static void
3205ppc_lglobl (ignore)
5480ccf3 3206 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3207{
3208 char *name;
3209 char endc;
3210 symbolS *sym;
3211
3212 name = input_line_pointer;
3213 endc = get_symbol_end ();
3214
3215 sym = symbol_find_or_make (name);
3216
3217 *input_line_pointer = endc;
3218
809ffe0d 3219 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3220
3221 demand_empty_rest_of_line ();
3222}
3223
3224/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3225 although I don't know why it bothers. */
3226
3227static void
3228ppc_rename (ignore)
5480ccf3 3229 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3230{
3231 char *name;
3232 char endc;
3233 symbolS *sym;
3234 int len;
3235
3236 name = input_line_pointer;
3237 endc = get_symbol_end ();
3238
3239 sym = symbol_find_or_make (name);
3240
3241 *input_line_pointer = endc;
3242
3243 if (*input_line_pointer != ',')
3244 {
3245 as_bad (_("missing rename string"));
3246 ignore_rest_of_line ();
3247 return;
3248 }
3249 ++input_line_pointer;
3250
809ffe0d 3251 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3252
3253 demand_empty_rest_of_line ();
3254}
3255
3256/* The .stabx pseudo-op. This is similar to a normal .stabs
3257 pseudo-op, but slightly different. A sample is
3258 .stabx "main:F-1",.main,142,0
3259 The first argument is the symbol name to create. The second is the
3260 value, and the third is the storage class. The fourth seems to be
3261 always zero, and I am assuming it is the type. */
3262
3263static void
3264ppc_stabx (ignore)
5480ccf3 3265 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3266{
3267 char *name;
3268 int len;
3269 symbolS *sym;
3270 expressionS exp;
3271
3272 name = demand_copy_C_string (&len);
3273
3274 if (*input_line_pointer != ',')
3275 {
3276 as_bad (_("missing value"));
3277 return;
3278 }
3279 ++input_line_pointer;
3280
b34976b6 3281 ppc_stab_symbol = TRUE;
252b5132 3282 sym = symbol_make (name);
b34976b6 3283 ppc_stab_symbol = FALSE;
252b5132 3284
809ffe0d 3285 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3286
3287 (void) expression (&exp);
3288
3289 switch (exp.X_op)
3290 {
3291 case O_illegal:
3292 case O_absent:
3293 case O_big:
3294 as_bad (_("illegal .stabx expression; zero assumed"));
3295 exp.X_add_number = 0;
3296 /* Fall through. */
3297 case O_constant:
3298 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3299 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3300 break;
3301
3302 case O_symbol:
3303 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3304 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3305 else
3306 {
3307 S_SET_VALUE (sym,
3308 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3309 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3310 }
3311 break;
3312
3313 default:
3314 /* The value is some complex expression. This will probably
99a814a1
AM		 3315 fail at some later point, but this is probably the right
3316 thing to do here. */
809ffe0d 3317 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3318 break;
3319 }
3320
3321 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3322 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3323
3324 if (*input_line_pointer != ',')
3325 {
3326 as_bad (_("missing class"));
3327 return;
3328 }
3329 ++input_line_pointer;
3330
3331 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3332
3333 if (*input_line_pointer != ',')
3334 {
3335 as_bad (_("missing type"));
3336 return;
3337 }
3338 ++input_line_pointer;
3339
3340 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3341
809ffe0d 3342 symbol_get_tc (sym)->output = 1;
252b5132 3343
6877bb43 3344 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3345
809ffe0d 3346 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3347
41ea10b1 3348 /* In this case :
99a814a1 3349
41ea10b1
TR		 3350 .bs name
3351 .stabx "z",arrays_,133,0
3352 .es
99a814a1 3353
41ea10b1 3354 .comm arrays_,13768,3
99a814a1 3355
41ea10b1
TR		 3356 resolve_symbol_value will copy the exp's "within" into sym's when the
3357 offset is 0. Since this seems to be corner case problem,
3358 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3359 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3360
3361 if (exp.X_op == O_symbol)
41ea10b1
TR		 3362 {
3363 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3364 }
6877bb43 3365 }
99a814a1 3366
252b5132
RH		 3367 if (exp.X_op != O_symbol
3368 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3369 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3370 ppc_frob_label (sym);
3371 else
3372 {
3373 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3374 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3375 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3376 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3377 }
3378
3379 demand_empty_rest_of_line ();
3380}
3381
3382/* The .function pseudo-op. This takes several arguments. The first
3383 argument seems to be the external name of the symbol. The second
3384 argment seems to be the label for the start of the function. gcc
3385 uses the same name for both. I have no idea what the third and
3386 fourth arguments are meant to be. The optional fifth argument is
3387 an expression for the size of the function. In COFF this symbol
3388 gets an aux entry like that used for a csect. */
3389
3390static void
3391ppc_function (ignore)
5480ccf3 3392 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3393{
3394 char *name;
3395 char endc;
3396 char *s;
3397 symbolS *ext_sym;
3398 symbolS *lab_sym;
3399
3400 name = input_line_pointer;
3401 endc = get_symbol_end ();
3402
3403 /* Ignore any [PR] suffix. */
3404 name = ppc_canonicalize_symbol_name (name);
3405 s = strchr (name, '[');
3406 if (s != (char *) NULL
3407 && strcmp (s + 1, "PR]") == 0)
3408 *s = '\0';
3409
3410 ext_sym = symbol_find_or_make (name);
3411
3412 *input_line_pointer = endc;
3413
3414 if (*input_line_pointer != ',')
3415 {
3416 as_bad (_("missing symbol name"));
3417 ignore_rest_of_line ();
3418 return;
3419 }
3420 ++input_line_pointer;
3421
3422 name = input_line_pointer;
3423 endc = get_symbol_end ();
3424
3425 lab_sym = symbol_find_or_make (name);
3426
3427 *input_line_pointer = endc;
3428
3429 if (ext_sym != lab_sym)
3430 {
809ffe0d
ILT		 3431 expressionS exp;
3432
3433 exp.X_op = O_symbol;
3434 exp.X_add_symbol = lab_sym;
3435 exp.X_op_symbol = NULL;
3436 exp.X_add_number = 0;
3437 exp.X_unsigned = 0;
3438 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3439 }
3440
809ffe0d
ILT		 3441 if (symbol_get_tc (ext_sym)->class == -1)
3442 symbol_get_tc (ext_sym)->class = XMC_PR;
3443 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3444
3445 if (*input_line_pointer == ',')
3446 {
3447 expressionS ignore;
3448
3449 /* Ignore the third argument. */
3450 ++input_line_pointer;
3451 expression (&ignore);
3452 if (*input_line_pointer == ',')
3453 {
3454 /* Ignore the fourth argument. */
3455 ++input_line_pointer;
3456 expression (&ignore);
3457 if (*input_line_pointer == ',')
3458 {
3459 /* The fifth argument is the function size. */
3460 ++input_line_pointer;
809ffe0d
ILT		 3461 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3462 absolute_section,
3463 (valueT) 0,
3464 &zero_address_frag);
3465 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3466 }
3467 }
3468 }
3469
3470 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3471 SF_SET_FUNCTION (ext_sym);
3472 SF_SET_PROCESS (ext_sym);
3473 coff_add_linesym (ext_sym);
3474
3475 demand_empty_rest_of_line ();
3476}
3477
3478/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3479 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3480 with the correct line number */
5d6255fe 3481
8642cce8 3482static symbolS *saved_bi_sym = 0;
252b5132
RH		 3483
3484static void
3485ppc_bf (ignore)
5480ccf3 3486 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3487{
3488 symbolS *sym;
3489
3490 sym = symbol_make (".bf");
3491 S_SET_SEGMENT (sym, text_section);
809ffe0d 3492 symbol_set_frag (sym, frag_now);
252b5132
RH		 3493 S_SET_VALUE (sym, frag_now_fix ());
3494 S_SET_STORAGE_CLASS (sym, C_FCN);
3495
3496 coff_line_base = get_absolute_expression ();
3497
3498 S_SET_NUMBER_AUXILIARY (sym, 1);
3499 SA_SET_SYM_LNNO (sym, coff_line_base);
3500
8642cce8 3501 /* Line number for bi. */
5d6255fe 3502 if (saved_bi_sym)
8642cce8
TR		 3503 {
3504 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3505 saved_bi_sym = 0;
3506 }
5d6255fe 3507
8642cce8 3508
809ffe0d 3509 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3510
3511 ppc_frob_label (sym);
3512
3513 demand_empty_rest_of_line ();
3514}
3515
3516/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3517 ".ef", except that the line number is absolute, not relative to the
3518 most recent ".bf" symbol. */
3519
3520static void
3521ppc_ef (ignore)
5480ccf3 3522 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3523{
3524 symbolS *sym;
3525
3526 sym = symbol_make (".ef");
3527 S_SET_SEGMENT (sym, text_section);
809ffe0d 3528 symbol_set_frag (sym, frag_now);
252b5132
RH		 3529 S_SET_VALUE (sym, frag_now_fix ());
3530 S_SET_STORAGE_CLASS (sym, C_FCN);
3531 S_SET_NUMBER_AUXILIARY (sym, 1);
3532 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3533 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3534
3535 ppc_frob_label (sym);
3536
3537 demand_empty_rest_of_line ();
3538}
3539
3540/* The .bi and .ei pseudo-ops. These take a string argument and
3541 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3542 the symbol list. The value of .bi will be know when the next .bf
3543 is encountered. */
252b5132
RH		 3544
3545static void
3546ppc_biei (ei)
3547 int ei;
3548{
3549 static symbolS *last_biei;
3550
3551 char *name;
3552 int len;
3553 symbolS *sym;
3554 symbolS *look;
3555
3556 name = demand_copy_C_string (&len);
3557
3558 /* The value of these symbols is actually file offset. Here we set
3559 the value to the index into the line number entries. In
3560 ppc_frob_symbols we set the fix_line field, which will cause BFD
3561 to do the right thing. */
3562
3563 sym = symbol_make (name);
3564 /* obj-coff.c currently only handles line numbers correctly in the
3565 .text section. */
3566 S_SET_SEGMENT (sym, text_section);
3567 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3568 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3569
3570 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3571 symbol_get_tc (sym)->output = 1;
81d4177b 3572
8642cce8 3573 /* Save bi. */
5d6255fe 3574 if (ei)
8642cce8
TR		 3575 saved_bi_sym = 0;
3576 else
3577 saved_bi_sym = sym;
3578
252b5132
RH		 3579 for (look = last_biei ? last_biei : symbol_rootP;
3580 (look != (symbolS *) NULL
3581 && (S_GET_STORAGE_CLASS (look) == C_FILE
3582 || S_GET_STORAGE_CLASS (look) == C_BINCL
3583 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3584 look = symbol_next (look))
3585 ;
3586 if (look != (symbolS *) NULL)
3587 {
3588 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3589 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3590 last_biei = sym;
3591 }
3592
3593 demand_empty_rest_of_line ();
3594}
3595
3596/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3597 There is one argument, which is a csect symbol. The value of the
3598 .bs symbol is the index of this csect symbol. */
3599
3600static void
3601ppc_bs (ignore)
5480ccf3 3602 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3603{
3604 char *name;
3605 char endc;
3606 symbolS *csect;
3607 symbolS *sym;
3608
3609 if (ppc_current_block != NULL)
3610 as_bad (_("nested .bs blocks"));
3611
3612 name = input_line_pointer;
3613 endc = get_symbol_end ();
3614
3615 csect = symbol_find_or_make (name);
3616
3617 *input_line_pointer = endc;
3618
3619 sym = symbol_make (".bs");
3620 S_SET_SEGMENT (sym, now_seg);
3621 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3622 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3623 symbol_get_tc (sym)->output = 1;
252b5132 3624
809ffe0d 3625 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3626
3627 ppc_frob_label (sym);
3628
3629 ppc_current_block = sym;
3630
3631 demand_empty_rest_of_line ();
3632}
3633
3634/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3635
3636static void
3637ppc_es (ignore)
5480ccf3 3638 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3639{
3640 symbolS *sym;
3641
3642 if (ppc_current_block == NULL)
3643 as_bad (_(".es without preceding .bs"));
3644
3645 sym = symbol_make (".es");
3646 S_SET_SEGMENT (sym, now_seg);
3647 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3648 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3649 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3650
3651 ppc_frob_label (sym);
3652
3653 ppc_current_block = NULL;
3654
3655 demand_empty_rest_of_line ();
3656}
3657
3658/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3659 line number. */
3660
3661static void
3662ppc_bb (ignore)
5480ccf3 3663 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3664{
3665 symbolS *sym;
3666
3667 sym = symbol_make (".bb");
3668 S_SET_SEGMENT (sym, text_section);
809ffe0d 3669 symbol_set_frag (sym, frag_now);
252b5132
RH		 3670 S_SET_VALUE (sym, frag_now_fix ());
3671 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3672
3673 S_SET_NUMBER_AUXILIARY (sym, 1);
3674 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3675
809ffe0d 3676 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3677
3678 SF_SET_PROCESS (sym);
3679
3680 ppc_frob_label (sym);
3681
3682 demand_empty_rest_of_line ();
3683}
3684
3685/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3686 line number. */
3687
3688static void
3689ppc_eb (ignore)
5480ccf3 3690 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3691{
3692 symbolS *sym;
3693
3694 sym = symbol_make (".eb");
3695 S_SET_SEGMENT (sym, text_section);
809ffe0d 3696 symbol_set_frag (sym, frag_now);
252b5132
RH		 3697 S_SET_VALUE (sym, frag_now_fix ());
3698 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3699 S_SET_NUMBER_AUXILIARY (sym, 1);
3700 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3701 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3702
3703 SF_SET_PROCESS (sym);
3704
3705 ppc_frob_label (sym);
3706
3707 demand_empty_rest_of_line ();
3708}
3709
3710/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3711 specified name. */
3712
3713static void
3714ppc_bc (ignore)
5480ccf3 3715 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3716{
3717 char *name;
3718 int len;
3719 symbolS *sym;
3720
3721 name = demand_copy_C_string (&len);
3722 sym = symbol_make (name);
3723 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3724 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3725 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3726 S_SET_VALUE (sym, 0);
809ffe0d 3727 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3728
3729 ppc_frob_label (sym);
3730
3731 demand_empty_rest_of_line ();
3732}
3733
3734/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3735
3736static void
3737ppc_ec (ignore)
5480ccf3 3738 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3739{
3740 symbolS *sym;
3741
3742 sym = symbol_make (".ec");
3743 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3744 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3745 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3746 S_SET_VALUE (sym, 0);
809ffe0d 3747 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3748
3749 ppc_frob_label (sym);
3750
3751 demand_empty_rest_of_line ();
3752}
3753
3754/* The .toc pseudo-op. Switch to the .toc subsegment. */
3755
3756static void
3757ppc_toc (ignore)
5480ccf3 3758 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3759{
3760 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3761 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3762 else
3763 {
3764 subsegT subseg;
3765 symbolS *sym;
3766 symbolS *list;
81d4177b 3767
252b5132
RH		 3768 subseg = ppc_data_subsegment;
3769 ++ppc_data_subsegment;
3770
3771 subseg_new (segment_name (data_section), subseg);
3772 ppc_toc_frag = frag_now;
3773
3774 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3775 symbol_set_frag (sym, frag_now);
252b5132
RH		 3776 S_SET_SEGMENT (sym, data_section);
3777 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3778 symbol_get_tc (sym)->subseg = subseg;
3779 symbol_get_tc (sym)->output = 1;
3780 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3781
3782 ppc_toc_csect = sym;
81d4177b 3783
252b5132 3784 for (list = ppc_data_csects;
809ffe0d
ILT		 3785 symbol_get_tc (list)->next != (symbolS *) NULL;
3786 list = symbol_get_tc (list)->next)
252b5132 3787 ;
809ffe0d 3788 symbol_get_tc (list)->next = sym;
252b5132
RH		 3789
3790 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3791 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3792 &symbol_lastP);
252b5132
RH		 3793 }
3794
3795 ppc_current_csect = ppc_toc_csect;
3796
3797 demand_empty_rest_of_line ();
3798}
3799
3800/* The AIX assembler automatically aligns the operands of a .long or
3801 .short pseudo-op, and we want to be compatible. */
3802
3803static void
3804ppc_xcoff_cons (log_size)
3805 int log_size;
3806{
3807 frag_align (log_size, 0, 0);
3808 record_alignment (now_seg, log_size);
3809 cons (1 << log_size);
3810}
3811
3812static void
3813ppc_vbyte (dummy)
5480ccf3 3814 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3815{
3816 expressionS exp;
3817 int byte_count;
3818
3819 (void) expression (&exp);
3820
3821 if (exp.X_op != O_constant)
3822 {
3823 as_bad (_("non-constant byte count"));
3824 return;
3825 }
3826
3827 byte_count = exp.X_add_number;
3828
3829 if (*input_line_pointer != ',')
3830 {
3831 as_bad (_("missing value"));
3832 return;
3833 }
3834
3835 ++input_line_pointer;
3836 cons (byte_count);
3837}
3838
3839#endif /* OBJ_XCOFF */
0baf16f2 3840#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3841\f
3842/* The .tc pseudo-op. This is used when generating either XCOFF or
3843 ELF. This takes two or more arguments.
3844
3845 When generating XCOFF output, the first argument is the name to
3846 give to this location in the toc; this will be a symbol with class
0baf16f2 3847 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3848 this location in the TOC; often there is just one more argument, a
0baf16f2
AM		 3849 relocateable symbol reference. The size of the value to store
3850 depends on target word size. A 32-bit target uses 4-byte values, a
3851 64-bit target uses 8-byte values.
252b5132
RH		 3852
3853 When not generating XCOFF output, the arguments are the same, but
3854 the first argument is simply ignored. */
3855
3856static void
3857ppc_tc (ignore)
92161534 3858 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3859{
3860#ifdef OBJ_XCOFF
3861
3862 /* Define the TOC symbol name. */
3863 {
3864 char *name;
3865 char endc;
3866 symbolS *sym;
3867
3868 if (ppc_toc_csect == (symbolS *) NULL
3869 || ppc_toc_csect != ppc_current_csect)
3870 {
3871 as_bad (_(".tc not in .toc section"));
3872 ignore_rest_of_line ();
3873 return;
3874 }
3875
3876 name = input_line_pointer;
3877 endc = get_symbol_end ();
3878
3879 sym = symbol_find_or_make (name);
3880
3881 *input_line_pointer = endc;
3882
3883 if (S_IS_DEFINED (sym))
3884 {
3885 symbolS *label;
3886
809ffe0d
ILT		 3887 label = symbol_get_tc (ppc_current_csect)->within;
3888 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3889 {
3890 as_bad (_(".tc with no label"));
3891 ignore_rest_of_line ();
3892 return;
3893 }
3894
3895 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3896 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3897 S_SET_VALUE (label, S_GET_VALUE (sym));
3898
3899 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3900 ++input_line_pointer;
3901
3902 return;
3903 }
3904
3905 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3906 symbol_set_frag (sym, frag_now);
252b5132 3907 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3908 symbol_get_tc (sym)->class = XMC_TC;
3909 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3910
3911 ppc_frob_label (sym);
3912 }
3913
0baf16f2
AM		 3914#endif /* OBJ_XCOFF */
3915#ifdef OBJ_ELF
9c7977b3 3916 int align;
252b5132
RH		 3917
3918 /* Skip the TOC symbol name. */
3919 while (is_part_of_name (*input_line_pointer)
3920 || *input_line_pointer == '['
3921 || *input_line_pointer == ']'
3922 || *input_line_pointer == '{'
3923 || *input_line_pointer == '}')
3924 ++input_line_pointer;
3925
0baf16f2 3926 /* Align to a four/eight byte boundary. */
2b3c4602 3927 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 3928 frag_align (align, 0, 0);
3929 record_alignment (now_seg, align);
0baf16f2 3930#endif /* OBJ_ELF */
252b5132
RH		 3931
3932 if (*input_line_pointer != ',')
3933 demand_empty_rest_of_line ();
3934 else
3935 {
3936 ++input_line_pointer;
2b3c4602 3937 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 3938 }
3939}
0baf16f2
AM		 3940
3941/* Pseudo-op .machine. */
15c1449b 3942/* FIXME: `.machine' is a nop for the moment. It would be nice to
2b3c4602 3943 accept this directive on the first line of input and set ppc_obj64
15c1449b
AM		 3944 and the target format accordingly. Unfortunately, the target
3945 format is selected in output-file.c:output_file_create before we
3946 even get to md_begin, so it's not possible without changing
3947 as.c:main. */
0baf16f2
AM		 3948
3949static void
3950ppc_machine (ignore)
3951 int ignore ATTRIBUTE_UNUSED;
3952{
3953 discard_rest_of_line ();
3954}
3955
3956/* See whether a symbol is in the TOC section. */
3957
3958static int
3959ppc_is_toc_sym (sym)
3960 symbolS *sym;
3961{
3962#ifdef OBJ_XCOFF
3963 return symbol_get_tc (sym)->class == XMC_TC;
3964#endif
3965#ifdef OBJ_ELF
3966 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 3967 if (ppc_obj64)
0baf16f2
AM		 3968 return strcmp (sname, ".toc") == 0;
3969 else
3970 return strcmp (sname, ".got") == 0;
3971#endif
3972}
3973#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 3974\f
3975#ifdef TE_PE
3976
99a814a1 3977/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 3978
3979/* Set the current section. */
3980static void
3981ppc_set_current_section (new)
3982 segT new;
3983{
3984 ppc_previous_section = ppc_current_section;
3985 ppc_current_section = new;
3986}
3987
3988/* pseudo-op: .previous
3989 behaviour: toggles the current section with the previous section.
3990 errors: None
99a814a1
AM		 3991 warnings: "No previous section" */
3992
252b5132 3993static void
99a814a1 3994ppc_previous (ignore)
5480ccf3 3995 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3996{
3997 symbolS *tmp;
3998
81d4177b 3999 if (ppc_previous_section == NULL)
252b5132 4000 {
99a814a1 4001 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4002 return;
4003 }
4004
99a814a1 4005 subseg_set (ppc_previous_section, 0);
252b5132 4006
99a814a1 4007 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4008}
4009
4010/* pseudo-op: .pdata
4011 behaviour: predefined read only data section
b34976b6 4012 double word aligned
252b5132
RH		 4013 errors: None
4014 warnings: None
4015 initial: .section .pdata "adr3"
b34976b6 4016 a - don't know -- maybe a misprint
252b5132
RH		 4017 d - initialized data
4018 r - readable
4019 3 - double word aligned (that would be 4 byte boundary)
4020
4021 commentary:
4022 Tag index tables (also known as the function table) for exception
99a814a1 4023 handling, debugging, etc. */
252b5132 4024
252b5132 4025static void
99a814a1 4026ppc_pdata (ignore)
5480ccf3 4027 int ignore ATTRIBUTE_UNUSED;
252b5132 4028{
81d4177b 4029 if (pdata_section == 0)
252b5132
RH		 4030 {
4031 pdata_section = subseg_new (".pdata", 0);
81d4177b 4032
252b5132
RH		 4033 bfd_set_section_flags (stdoutput, pdata_section,
4034 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4035 | SEC_READONLY | SEC_DATA ));
81d4177b 4036
252b5132
RH		 4037 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4038 }
4039 else
4040 {
99a814a1 4041 pdata_section = subseg_new (".pdata", 0);
252b5132 4042 }
99a814a1 4043 ppc_set_current_section (pdata_section);
252b5132
RH		 4044}
4045
4046/* pseudo-op: .ydata
4047 behaviour: predefined read only data section
b34976b6 4048 double word aligned
252b5132
RH		 4049 errors: None
4050 warnings: None
4051 initial: .section .ydata "drw3"
b34976b6 4052 a - don't know -- maybe a misprint
252b5132
RH		 4053 d - initialized data
4054 r - readable
4055 3 - double word aligned (that would be 4 byte boundary)
4056 commentary:
4057 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4058 debugging, etc. */
4059
252b5132 4060static void
99a814a1 4061ppc_ydata (ignore)
5480ccf3 4062 int ignore ATTRIBUTE_UNUSED;
252b5132 4063{
81d4177b 4064 if (ydata_section == 0)
252b5132
RH		 4065 {
4066 ydata_section = subseg_new (".ydata", 0);
4067 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4068 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4069 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4070
4071 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4072 }
4073 else
4074 {
4075 ydata_section = subseg_new (".ydata", 0);
4076 }
99a814a1 4077 ppc_set_current_section (ydata_section);
252b5132
RH		 4078}
4079
4080/* pseudo-op: .reldata
4081 behaviour: predefined read write data section
b34976b6 4082 double word aligned (4-byte)
252b5132
RH		 4083 FIXME: relocation is applied to it
4084 FIXME: what's the difference between this and .data?
4085 errors: None
4086 warnings: None
4087 initial: .section .reldata "drw3"
4088 d - initialized data
4089 r - readable
4090 w - writeable
4091 3 - double word aligned (that would be 8 byte boundary)
4092
4093 commentary:
4094 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4095 function descriptors, etc. */
4096
252b5132 4097static void
99a814a1 4098ppc_reldata (ignore)
5480ccf3 4099 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4100{
4101 if (reldata_section == 0)
4102 {
4103 reldata_section = subseg_new (".reldata", 0);
4104
4105 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4106 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4107 | SEC_DATA));
252b5132
RH		 4108
4109 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4110 }
4111 else
4112 {
4113 reldata_section = subseg_new (".reldata", 0);
4114 }
99a814a1 4115 ppc_set_current_section (reldata_section);
252b5132
RH		 4116}
4117
4118/* pseudo-op: .rdata
4119 behaviour: predefined read only data section
b34976b6 4120 double word aligned
252b5132
RH		 4121 errors: None
4122 warnings: None
4123 initial: .section .rdata "dr3"
4124 d - initialized data
4125 r - readable
99a814a1
AM		 4126 3 - double word aligned (that would be 4 byte boundary) */
4127
252b5132 4128static void
99a814a1 4129ppc_rdata (ignore)
5480ccf3 4130 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4131{
4132 if (rdata_section == 0)
4133 {
4134 rdata_section = subseg_new (".rdata", 0);
4135 bfd_set_section_flags (stdoutput, rdata_section,
4136 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4137 | SEC_READONLY | SEC_DATA ));
4138
4139 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4140 }
4141 else
4142 {
4143 rdata_section = subseg_new (".rdata", 0);
4144 }
99a814a1 4145 ppc_set_current_section (rdata_section);
252b5132
RH		 4146}
4147
4148/* pseudo-op: .ualong
81d4177b 4149 behaviour: much like .int, with the exception that no alignment is
b34976b6 4150 performed.
252b5132
RH		 4151 FIXME: test the alignment statement
4152 errors: None
99a814a1
AM		 4153 warnings: None */
4154
252b5132 4155static void
99a814a1 4156ppc_ualong (ignore)
5480ccf3 4157 int ignore ATTRIBUTE_UNUSED;
252b5132 4158{
99a814a1
AM		 4159 /* Try for long. */
4160 cons (4);
252b5132
RH		 4161}
4162
4163/* pseudo-op: .znop <symbol name>
4164 behaviour: Issue a nop instruction
b34976b6 4165 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4166 the supplied symbol name.
4167 errors: None
99a814a1
AM		 4168 warnings: Missing symbol name */
4169
252b5132 4170static void
99a814a1 4171ppc_znop (ignore)
5480ccf3 4172 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4173{
4174 unsigned long insn;
4175 const struct powerpc_opcode *opcode;
4176 expressionS ex;
4177 char *f;
252b5132 4178 symbolS *sym;
252b5132
RH		 4179 char *symbol_name;
4180 char c;
4181 char *name;
4182 unsigned int exp;
4183 flagword flags;
4184 asection *sec;
4185
99a814a1 4186 /* Strip out the symbol name. */
252b5132
RH		 4187 symbol_name = input_line_pointer;
4188 c = get_symbol_end ();
4189
4190 name = xmalloc (input_line_pointer - symbol_name + 1);
4191 strcpy (name, symbol_name);
4192
4193 sym = symbol_find_or_make (name);
4194
4195 *input_line_pointer = c;
4196
4197 SKIP_WHITESPACE ();
4198
4199 /* Look up the opcode in the hash table. */
4200 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4201
99a814a1 4202 /* Stick in the nop. */
252b5132
RH		 4203 insn = opcode->opcode;
4204
4205 /* Write out the instruction. */
4206 f = frag_more (4);
4207 md_number_to_chars (f, insn, 4);
4208 fix_new (frag_now,
4209 f - frag_now->fr_literal,
4210 4,
4211 sym,
4212 0,
4213 0,
4214 BFD_RELOC_16_GOT_PCREL);
4215
4216}
4217
81d4177b
KH		 4218/* pseudo-op:
4219 behaviour:
4220 errors:
99a814a1
AM		 4221 warnings: */
4222
252b5132 4223static void
99a814a1 4224ppc_pe_comm (lcomm)
252b5132
RH		 4225 int lcomm;
4226{
4227 register char *name;
4228 register char c;
4229 register char *p;
4230 offsetT temp;
4231 register symbolS *symbolP;
4232 offsetT align;
4233
4234 name = input_line_pointer;
4235 c = get_symbol_end ();
4236
99a814a1 4237 /* just after name is now '\0'. */
252b5132
RH		 4238 p = input_line_pointer;
4239 *p = c;
4240 SKIP_WHITESPACE ();
4241 if (*input_line_pointer != ',')
4242 {
4243 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4244 ignore_rest_of_line ();
4245 return;
4246 }
4247
4248 input_line_pointer++; /* skip ',' */
4249 if ((temp = get_absolute_expression ()) < 0)
4250 {
4251 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4252 ignore_rest_of_line ();
4253 return;
4254 }
4255
4256 if (! lcomm)
4257 {
4258 /* The third argument to .comm is the alignment. */
4259 if (*input_line_pointer != ',')
4260 align = 3;
4261 else
4262 {
4263 ++input_line_pointer;
4264 align = get_absolute_expression ();
4265 if (align <= 0)
4266 {
4267 as_warn (_("ignoring bad alignment"));
4268 align = 3;
4269 }
4270 }
4271 }
4272
4273 *p = 0;
4274 symbolP = symbol_find_or_make (name);
4275
4276 *p = c;
4277 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4278 {
4279 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4280 S_GET_NAME (symbolP));
4281 ignore_rest_of_line ();
4282 return;
4283 }
4284
4285 if (S_GET_VALUE (symbolP))
4286 {
4287 if (S_GET_VALUE (symbolP) != (valueT) temp)
4288 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4289 S_GET_NAME (symbolP),
4290 (long) S_GET_VALUE (symbolP),
4291 (long) temp);
4292 }
4293 else
4294 {
4295 S_SET_VALUE (symbolP, (valueT) temp);
4296 S_SET_EXTERNAL (symbolP);
4297 }
4298
4299 demand_empty_rest_of_line ();
4300}
4301
4302/*
4303 * implement the .section pseudo op:
4304 * .section name {, "flags"}
4305 * ^ ^
4306 * | +--- optional flags: 'b' for bss
4307 * | 'i' for info
4308 * +-- section name 'l' for lib
4309 * 'n' for noload
4310 * 'o' for over
4311 * 'w' for data
4312 * 'd' (apparently m88k for data)
4313 * 'x' for text
4314 * But if the argument is not a quoted string, treat it as a
4315 * subsegment number.
4316 *
4317 * FIXME: this is a copy of the section processing from obj-coff.c, with
4318 * additions/changes for the moto-pas assembler support. There are three
4319 * categories:
4320 *
81d4177b 4321 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4322 * setting bits that bfd probably neither understands or uses. The
4323 * correct approach (?) will have to incorporate extra fields attached
4324 * to the section to hold the system specific stuff. (krk)
4325 *
4326 * Section Contents:
4327 * 'a' - unknown - referred to in documentation, but no definition supplied
4328 * 'c' - section has code
4329 * 'd' - section has initialized data
4330 * 'u' - section has uninitialized data
4331 * 'i' - section contains directives (info)
4332 * 'n' - section can be discarded
4333 * 'R' - remove section at link time
4334 *
4335 * Section Protection:
4336 * 'r' - section is readable
4337 * 'w' - section is writeable
4338 * 'x' - section is executable
4339 * 's' - section is sharable
4340 *
4341 * Section Alignment:
4342 * '0' - align to byte boundary
4343 * '1' - align to halfword undary
4344 * '2' - align to word boundary
4345 * '3' - align to doubleword boundary
4346 * '4' - align to quadword boundary
4347 * '5' - align to 32 byte boundary
4348 * '6' - align to 64 byte boundary
4349 *
4350 */
4351
4352void
4353ppc_pe_section (ignore)
5480ccf3 4354 int ignore ATTRIBUTE_UNUSED;
252b5132 4355{
99a814a1 4356 /* Strip out the section name. */
252b5132
RH		 4357 char *section_name;
4358 char c;
4359 char *name;
4360 unsigned int exp;
4361 flagword flags;
4362 segT sec;
4363 int align;
4364
4365 section_name = input_line_pointer;
4366 c = get_symbol_end ();
4367
4368 name = xmalloc (input_line_pointer - section_name + 1);
4369 strcpy (name, section_name);
4370
4371 *input_line_pointer = c;
4372
4373 SKIP_WHITESPACE ();
4374
4375 exp = 0;
4376 flags = SEC_NO_FLAGS;
4377
4378 if (strcmp (name, ".idata$2") == 0)
4379 {
4380 align = 0;
4381 }
4382 else if (strcmp (name, ".idata$3") == 0)
4383 {
4384 align = 0;
4385 }
4386 else if (strcmp (name, ".idata$4") == 0)
4387 {
4388 align = 2;
4389 }
4390 else if (strcmp (name, ".idata$5") == 0)
4391 {
4392 align = 2;
4393 }
4394 else if (strcmp (name, ".idata$6") == 0)
4395 {
4396 align = 1;
4397 }
4398 else
99a814a1
AM		 4399 /* Default alignment to 16 byte boundary. */
4400 align = 4;
252b5132
RH		 4401
4402 if (*input_line_pointer == ',')
4403 {
4404 ++input_line_pointer;
4405 SKIP_WHITESPACE ();
4406 if (*input_line_pointer != '"')
4407 exp = get_absolute_expression ();
4408 else
4409 {
4410 ++input_line_pointer;
4411 while (*input_line_pointer != '"'
4412 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4413 {
4414 switch (*input_line_pointer)
4415 {
4416 /* Section Contents */
4417 case 'a': /* unknown */
4418 as_bad (_("Unsupported section attribute -- 'a'"));
4419 break;
4420 case 'c': /* code section */
81d4177b 4421 flags |= SEC_CODE;
252b5132
RH		 4422 break;
4423 case 'd': /* section has initialized data */
4424 flags |= SEC_DATA;
4425 break;
4426 case 'u': /* section has uninitialized data */
4427 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4428 in winnt.h */
4429 flags |= SEC_ROM;
4430 break;
4431 case 'i': /* section contains directives (info) */
4432 /* FIXME: This is IMAGE_SCN_LNK_INFO
4433 in winnt.h */
4434 flags |= SEC_HAS_CONTENTS;
4435 break;
4436 case 'n': /* section can be discarded */
81d4177b 4437 flags &=~ SEC_LOAD;
252b5132
RH		 4438 break;
4439 case 'R': /* Remove section at link time */
4440 flags |= SEC_NEVER_LOAD;
4441 break;
4442
4443 /* Section Protection */
4444 case 'r': /* section is readable */
4445 flags |= IMAGE_SCN_MEM_READ;
4446 break;
4447 case 'w': /* section is writeable */
4448 flags |= IMAGE_SCN_MEM_WRITE;
4449 break;
4450 case 'x': /* section is executable */
4451 flags |= IMAGE_SCN_MEM_EXECUTE;
4452 break;
4453 case 's': /* section is sharable */
4454 flags |= IMAGE_SCN_MEM_SHARED;
4455 break;
4456
4457 /* Section Alignment */
4458 case '0': /* align to byte boundary */
4459 flags |= IMAGE_SCN_ALIGN_1BYTES;
4460 align = 0;
4461 break;
4462 case '1': /* align to halfword boundary */
4463 flags |= IMAGE_SCN_ALIGN_2BYTES;
4464 align = 1;
4465 break;
4466 case '2': /* align to word boundary */
4467 flags |= IMAGE_SCN_ALIGN_4BYTES;
4468 align = 2;
4469 break;
4470 case '3': /* align to doubleword boundary */
4471 flags |= IMAGE_SCN_ALIGN_8BYTES;
4472 align = 3;
4473 break;
4474 case '4': /* align to quadword boundary */
4475 flags |= IMAGE_SCN_ALIGN_16BYTES;
4476 align = 4;
4477 break;
4478 case '5': /* align to 32 byte boundary */
4479 flags |= IMAGE_SCN_ALIGN_32BYTES;
4480 align = 5;
4481 break;
4482 case '6': /* align to 64 byte boundary */
4483 flags |= IMAGE_SCN_ALIGN_64BYTES;
4484 align = 6;
4485 break;
4486
4487 default:
99a814a1
AM		 4488 as_bad (_("unknown section attribute '%c'"),
4489 *input_line_pointer);
252b5132
RH		 4490 break;
4491 }
4492 ++input_line_pointer;
4493 }
4494 if (*input_line_pointer == '"')
4495 ++input_line_pointer;
4496 }
4497 }
4498
4499 sec = subseg_new (name, (subsegT) exp);
4500
99a814a1 4501 ppc_set_current_section (sec);
252b5132
RH		 4502
4503 if (flags != SEC_NO_FLAGS)
4504 {
4505 if (! bfd_set_section_flags (stdoutput, sec, flags))
4506 as_bad (_("error setting flags for \"%s\": %s"),
4507 bfd_section_name (stdoutput, sec),
4508 bfd_errmsg (bfd_get_error ()));
4509 }
4510
99a814a1 4511 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4512
4513}
4514
4515static void
4516ppc_pe_function (ignore)
5480ccf3 4517 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4518{
4519 char *name;
4520 char endc;
4521 symbolS *ext_sym;
4522
4523 name = input_line_pointer;
4524 endc = get_symbol_end ();
4525
4526 ext_sym = symbol_find_or_make (name);
4527
4528 *input_line_pointer = endc;
4529
4530 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4531 SF_SET_FUNCTION (ext_sym);
4532 SF_SET_PROCESS (ext_sym);
4533 coff_add_linesym (ext_sym);
4534
4535 demand_empty_rest_of_line ();
4536}
4537
4538static void
4539ppc_pe_tocd (ignore)
5480ccf3 4540 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4541{
4542 if (tocdata_section == 0)
4543 {
4544 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4545 /* FIXME: section flags won't work. */
252b5132
RH		 4546 bfd_set_section_flags (stdoutput, tocdata_section,
4547 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4548 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4549
4550 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4551 }
4552 else
4553 {
4554 rdata_section = subseg_new (".tocd", 0);
4555 }
4556
99a814a1 4557 ppc_set_current_section (tocdata_section);
252b5132
RH		 4558
4559 demand_empty_rest_of_line ();
4560}
4561
4562/* Don't adjust TOC relocs to use the section symbol. */
4563
4564int
4565ppc_pe_fix_adjustable (fix)
4566 fixS *fix;
4567{
4568 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4569}
4570
4571#endif
4572\f
4573#ifdef OBJ_XCOFF
4574
4575/* XCOFF specific symbol and file handling. */
4576
4577/* Canonicalize the symbol name. We use the to force the suffix, if
4578 any, to use square brackets, and to be in upper case. */
4579
4580char *
4581ppc_canonicalize_symbol_name (name)
4582 char *name;
4583{
4584 char *s;
4585
4586 if (ppc_stab_symbol)
4587 return name;
4588
4589 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4590 ;
4591 if (*s != '\0')
4592 {
4593 char brac;
4594
4595 if (*s == '[')
4596 brac = ']';
4597 else
4598 {
4599 *s = '[';
4600 brac = '}';
4601 }
4602
4603 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4604 *s = TOUPPER (*s);
252b5132
RH		 4605
4606 if (*s == '\0' || s[1] != '\0')
4607 as_bad (_("bad symbol suffix"));
4608
4609 *s = ']';
4610 }
4611
4612 return name;
4613}
4614
4615/* Set the class of a symbol based on the suffix, if any. This is
4616 called whenever a new symbol is created. */
4617
4618void
4619ppc_symbol_new_hook (sym)
4620 symbolS *sym;
4621{
809ffe0d 4622 struct ppc_tc_sy *tc;
252b5132
RH		 4623 const char *s;
4624
809ffe0d
ILT		 4625 tc = symbol_get_tc (sym);
4626 tc->next = NULL;
4627 tc->output = 0;
4628 tc->class = -1;
4629 tc->real_name = NULL;
4630 tc->subseg = 0;
4631 tc->align = 0;
4632 tc->size = NULL;
4633 tc->within = NULL;
252b5132
RH		 4634
4635 if (ppc_stab_symbol)
4636 return;
4637
4638 s = strchr (S_GET_NAME (sym), '[');
4639 if (s == (const char *) NULL)
4640 {
4641 /* There is no suffix. */
4642 return;
4643 }
4644
4645 ++s;
4646
4647 switch (s[0])
4648 {
4649 case 'B':
4650 if (strcmp (s, "BS]") == 0)
809ffe0d 4651 tc->class = XMC_BS;
252b5132
RH		 4652 break;
4653 case 'D':
4654 if (strcmp (s, "DB]") == 0)
809ffe0d 4655 tc->class = XMC_DB;
252b5132 4656 else if (strcmp (s, "DS]") == 0)
809ffe0d 4657 tc->class = XMC_DS;
252b5132
RH		 4658 break;
4659 case 'G':
4660 if (strcmp (s, "GL]") == 0)
809ffe0d 4661 tc->class = XMC_GL;
252b5132
RH		 4662 break;
4663 case 'P':
4664 if (strcmp (s, "PR]") == 0)
809ffe0d 4665 tc->class = XMC_PR;
252b5132
RH		 4666 break;
4667 case 'R':
4668 if (strcmp (s, "RO]") == 0)
809ffe0d 4669 tc->class = XMC_RO;
252b5132 4670 else if (strcmp (s, "RW]") == 0)
809ffe0d 4671 tc->class = XMC_RW;
252b5132
RH		 4672 break;
4673 case 'S':
4674 if (strcmp (s, "SV]") == 0)
809ffe0d 4675 tc->class = XMC_SV;
252b5132
RH		 4676 break;
4677 case 'T':
4678 if (strcmp (s, "TC]") == 0)
809ffe0d 4679 tc->class = XMC_TC;
252b5132 4680 else if (strcmp (s, "TI]") == 0)
809ffe0d 4681 tc->class = XMC_TI;
252b5132 4682 else if (strcmp (s, "TB]") == 0)
809ffe0d 4683 tc->class = XMC_TB;
252b5132 4684 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4685 tc->class = XMC_TC0;
252b5132
RH		 4686 break;
4687 case 'U':
4688 if (strcmp (s, "UA]") == 0)
809ffe0d 4689 tc->class = XMC_UA;
252b5132 4690 else if (strcmp (s, "UC]") == 0)
809ffe0d 4691 tc->class = XMC_UC;
252b5132
RH		 4692 break;
4693 case 'X':
4694 if (strcmp (s, "XO]") == 0)
809ffe0d 4695 tc->class = XMC_XO;
252b5132
RH		 4696 break;
4697 }
4698
809ffe0d 4699 if (tc->class == -1)
252b5132
RH		 4700 as_bad (_("Unrecognized symbol suffix"));
4701}
4702
4703/* Set the class of a label based on where it is defined. This
4704 handles symbols without suffixes. Also, move the symbol so that it
4705 follows the csect symbol. */
4706
4707void
4708ppc_frob_label (sym)
4709 symbolS *sym;
4710{
4711 if (ppc_current_csect != (symbolS *) NULL)
4712 {
809ffe0d
ILT		 4713 if (symbol_get_tc (sym)->class == -1)
4714 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4715
4716 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4717 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4718 &symbol_rootP, &symbol_lastP);
4719 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4720 }
4721}
4722
4723/* This variable is set by ppc_frob_symbol if any absolute symbols are
4724 seen. It tells ppc_adjust_symtab whether it needs to look through
4725 the symbols. */
4726
b34976b6 4727static bfd_boolean ppc_saw_abs;
252b5132
RH		 4728
4729/* Change the name of a symbol just before writing it out. Set the
4730 real name if the .rename pseudo-op was used. Otherwise, remove any
4731 class suffix. Return 1 if the symbol should not be included in the
4732 symbol table. */
4733
4734int
4735ppc_frob_symbol (sym)
4736 symbolS *sym;
4737{
4738 static symbolS *ppc_last_function;
4739 static symbolS *set_end;
4740
4741 /* Discard symbols that should not be included in the output symbol
4742 table. */
809ffe0d
ILT		 4743 if (! symbol_used_in_reloc_p (sym)
4744 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
252b5132 4745 || (! S_IS_EXTERNAL (sym)
809ffe0d 4746 && ! symbol_get_tc (sym)->output
252b5132
RH		 4747 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4748 return 1;
4749
a161fe53
AM		 4750 /* This one will disappear anyway. Don't make a csect sym for it. */
4751 if (sym == abs_section_sym)
4752 return 1;
4753
809ffe0d
ILT		 4754 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4755 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4756 else
4757 {
4758 const char *name;
4759 const char *s;
4760
4761 name = S_GET_NAME (sym);
4762 s = strchr (name, '[');
4763 if (s != (char *) NULL)
4764 {
4765 unsigned int len;
4766 char *snew;
4767
4768 len = s - name;
4769 snew = xmalloc (len + 1);
4770 memcpy (snew, name, len);
4771 snew[len] = '\0';
4772
4773 S_SET_NAME (sym, snew);
4774 }
4775 }
4776
4777 if (set_end != (symbolS *) NULL)
4778 {
4779 SA_SET_SYM_ENDNDX (set_end, sym);
4780 set_end = NULL;
4781 }
4782
4783 if (SF_GET_FUNCTION (sym))
4784 {
4785 if (ppc_last_function != (symbolS *) NULL)
4786 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4787 ppc_last_function = sym;
809ffe0d 4788 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4789 {
6386f3a7 4790 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4791 SA_SET_SYM_FSIZE (sym,
4792 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4793 }
4794 }
4795 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4796 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4797 {
4798 if (ppc_last_function == (symbolS *) NULL)
4799 as_bad (_(".ef with no preceding .function"));
4800 else
4801 {
4802 set_end = ppc_last_function;
4803 ppc_last_function = NULL;
4804
4805 /* We don't have a C_EFCN symbol, but we need to force the
4806 COFF backend to believe that it has seen one. */
4807 coff_last_function = NULL;
4808 }
4809 }
4810
4811 if (! S_IS_EXTERNAL (sym)
809ffe0d 4812 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4813 && S_GET_STORAGE_CLASS (sym) != C_FILE
4814 && S_GET_STORAGE_CLASS (sym) != C_FCN
4815 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4816 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4817 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4818 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4819 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4820 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4821 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4822
4823 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4824 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4825 {
4826 int i;
4827 union internal_auxent *a;
4828
4829 /* Create a csect aux. */
4830 i = S_GET_NUMBER_AUXILIARY (sym);
4831 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4832 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4833 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4834 {
4835 /* This is the TOC table. */
4836 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4837 a->x_csect.x_scnlen.l = 0;
4838 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4839 }
809ffe0d 4840 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4841 {
4842 /* This is a csect symbol. x_scnlen is the size of the
4843 csect. */
809ffe0d 4844 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4845 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4846 S_GET_SEGMENT (sym))
4847 - S_GET_VALUE (sym));
4848 else
4849 {
6386f3a7 4850 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4851 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4852 - S_GET_VALUE (sym));
4853 }
809ffe0d 4854 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4855 }
4856 else if (S_GET_SEGMENT (sym) == bss_section)
4857 {
4858 /* This is a common symbol. */
809ffe0d
ILT		 4859 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4860 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4861 if (S_IS_EXTERNAL (sym))
809ffe0d 4862 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4863 else
809ffe0d 4864 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 4865 }
4866 else if (S_GET_SEGMENT (sym) == absolute_section)
4867 {
4868 /* This is an absolute symbol. The csect will be created by
99a814a1 4869 ppc_adjust_symtab. */
b34976b6 4870 ppc_saw_abs = TRUE;
252b5132 4871 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 4872 if (symbol_get_tc (sym)->class == -1)
4873 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 4874 }
4875 else if (! S_IS_DEFINED (sym))
4876 {
4877 /* This is an external symbol. */
4878 a->x_csect.x_scnlen.l = 0;
4879 a->x_csect.x_smtyp = XTY_ER;
4880 }
809ffe0d 4881 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 4882 {
4883 symbolS *next;
4884
4885 /* This is a TOC definition. x_scnlen is the size of the
4886 TOC entry. */
4887 next = symbol_next (sym);
809ffe0d 4888 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 4889 next = symbol_next (next);
4890 if (next == (symbolS *) NULL
809ffe0d 4891 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 4892 {
4893 if (ppc_after_toc_frag == (fragS *) NULL)
4894 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4895 data_section)
4896 - S_GET_VALUE (sym));
4897 else
4898 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
4899 - S_GET_VALUE (sym));
4900 }
4901 else
4902 {
6386f3a7 4903 resolve_symbol_value (next);
252b5132
RH		 4904 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
4905 - S_GET_VALUE (sym));
4906 }
4907 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4908 }
4909 else
4910 {
4911 symbolS *csect;
4912
4913 /* This is a normal symbol definition. x_scnlen is the
4914 symbol index of the containing csect. */
4915 if (S_GET_SEGMENT (sym) == text_section)
4916 csect = ppc_text_csects;
4917 else if (S_GET_SEGMENT (sym) == data_section)
4918 csect = ppc_data_csects;
4919 else
4920 abort ();
4921
4922 /* Skip the initial dummy symbol. */
809ffe0d 4923 csect = symbol_get_tc (csect)->next;
252b5132
RH		 4924
4925 if (csect == (symbolS *) NULL)
4926 {
4927 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
4928 a->x_csect.x_scnlen.l = 0;
4929 }
4930 else
4931 {
809ffe0d 4932 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 4933 {
6386f3a7 4934 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 4935 if (S_GET_VALUE (symbol_get_tc (csect)->next)
4936 > S_GET_VALUE (sym))
252b5132 4937 break;
809ffe0d 4938 csect = symbol_get_tc (csect)->next;
252b5132
RH		 4939 }
4940
809ffe0d
ILT		 4941 a->x_csect.x_scnlen.p =
4942 coffsymbol (symbol_get_bfdsym (csect))->native;
4943 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
4944 1;
252b5132
RH		 4945 }
4946 a->x_csect.x_smtyp = XTY_LD;
4947 }
81d4177b 4948
252b5132
RH		 4949 a->x_csect.x_parmhash = 0;
4950 a->x_csect.x_snhash = 0;
809ffe0d 4951 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 4952 a->x_csect.x_smclas = XMC_PR;
4953 else
809ffe0d 4954 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 4955 a->x_csect.x_stab = 0;
4956 a->x_csect.x_snstab = 0;
4957
4958 /* Don't let the COFF backend resort these symbols. */
809ffe0d 4959 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 4960 }
4961 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
4962 {
4963 /* We want the value to be the symbol index of the referenced
4964 csect symbol. BFD will do that for us if we set the right
4965 flags. */
b782de16
AM		 4966 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
4967 combined_entry_type *c = coffsymbol (bsym)->native;
4968
4969 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 4970 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 4971 }
4972 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4973 {
4974 symbolS *block;
4975 symbolS *csect;
4976
4977 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 4978 block = symbol_get_tc (sym)->within;
4979 csect = symbol_get_tc (block)->within;
6386f3a7 4980 resolve_symbol_value (csect);
252b5132
RH		 4981 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
4982 }
4983 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
4984 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
4985 {
4986 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 4987 BFD will do that for us if we set the right flags. We have
4988 already set the value correctly. */
809ffe0d 4989 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 4990 }
4991
4992 return 0;
4993}
4994
4995/* Adjust the symbol table. This creates csect symbols for all
4996 absolute symbols. */
4997
4998void
4999ppc_adjust_symtab ()
5000{
5001 symbolS *sym;
5002
5003 if (! ppc_saw_abs)
5004 return;
5005
5006 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5007 {
5008 symbolS *csect;
5009 int i;
5010 union internal_auxent *a;
5011
5012 if (S_GET_SEGMENT (sym) != absolute_section)
5013 continue;
5014
5015 csect = symbol_create (".abs[XO]", absolute_section,
5016 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5017 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5018 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5019 i = S_GET_NUMBER_AUXILIARY (csect);
5020 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5021 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5022 a->x_csect.x_scnlen.l = 0;
5023 a->x_csect.x_smtyp = XTY_SD;
5024 a->x_csect.x_parmhash = 0;
5025 a->x_csect.x_snhash = 0;
5026 a->x_csect.x_smclas = XMC_XO;
5027 a->x_csect.x_stab = 0;
5028 a->x_csect.x_snstab = 0;
5029
5030 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5031
5032 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5033 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5034 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5035 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5036 }
5037
b34976b6 5038 ppc_saw_abs = FALSE;
252b5132
RH		 5039}
5040
5041/* Set the VMA for a section. This is called on all the sections in
5042 turn. */
5043
5044void
5045ppc_frob_section (sec)
5046 asection *sec;
5047{
5048 static bfd_size_type vma = 0;
5049
5050 bfd_set_section_vma (stdoutput, sec, vma);
5051 vma += bfd_section_size (stdoutput, sec);
5052}
5053
5054#endif /* OBJ_XCOFF */
5055\f
5056/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5057 of type TYPE, and store the appropriate bytes in *LITP. The number
5058 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5059 returned, or NULL on OK. */
5060
5061char *
5062md_atof (type, litp, sizep)
5063 int type;
5064 char *litp;
5065 int *sizep;
5066{
5067 int prec;
5068 LITTLENUM_TYPE words[4];
5069 char *t;
5070 int i;
5071
5072 switch (type)
5073 {
5074 case 'f':
5075 prec = 2;
5076 break;
5077
5078 case 'd':
5079 prec = 4;
5080 break;
5081
5082 default:
5083 *sizep = 0;
5084 return _("bad call to md_atof");
5085 }
5086
5087 t = atof_ieee (input_line_pointer, type, words);
5088 if (t)
5089 input_line_pointer = t;
5090
5091 *sizep = prec * 2;
5092
5093 if (target_big_endian)
5094 {
5095 for (i = 0; i < prec; i++)
5096 {
5097 md_number_to_chars (litp, (valueT) words[i], 2);
5098 litp += 2;
5099 }
5100 }
5101 else
5102 {
5103 for (i = prec - 1; i >= 0; i--)
5104 {
5105 md_number_to_chars (litp, (valueT) words[i], 2);
5106 litp += 2;
5107 }
5108 }
81d4177b 5109
252b5132
RH		 5110 return NULL;
5111}
5112
5113/* Write a value out to the object file, using the appropriate
5114 endianness. */
5115
5116void
5117md_number_to_chars (buf, val, n)
5118 char *buf;
5119 valueT val;
5120 int n;
5121{
5122 if (target_big_endian)
5123 number_to_chars_bigendian (buf, val, n);
5124 else
5125 number_to_chars_littleendian (buf, val, n);
5126}
5127
5128/* Align a section (I don't know why this is machine dependent). */
5129
5130valueT
5131md_section_align (seg, addr)
5132 asection *seg;
5133 valueT addr;
5134{
5135 int align = bfd_get_section_alignment (stdoutput, seg);
5136
5137 return ((addr + (1 << align) - 1) & (-1 << align));
5138}
5139
5140/* We don't have any form of relaxing. */
5141
5142int
5143md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5144 fragS *fragp ATTRIBUTE_UNUSED;
5145 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5146{
5147 abort ();
5148 return 0;
5149}
5150
5151/* Convert a machine dependent frag. We never generate these. */
5152
5153void
5154md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5155 bfd *abfd ATTRIBUTE_UNUSED;
5156 asection *sec ATTRIBUTE_UNUSED;
5157 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5158{
5159 abort ();
5160}
5161
5162/* We have no need to default values of symbols. */
5163
252b5132
RH		 5164symbolS *
5165md_undefined_symbol (name)
92161534 5166 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5167{
5168 return 0;
5169}
5170\f
5171/* Functions concerning relocs. */
5172
5173/* The location from which a PC relative jump should be calculated,
5174 given a PC relative reloc. */
5175
5176long
5177md_pcrel_from_section (fixp, sec)
5178 fixS *fixp;
92161534 5179 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5180{
5181 return fixp->fx_frag->fr_address + fixp->fx_where;
5182}
5183
5184#ifdef OBJ_XCOFF
5185
5186/* This is called to see whether a fixup should be adjusted to use a
5187 section symbol. We take the opportunity to change a fixup against
5188 a symbol in the TOC subsegment into a reloc against the
5189 corresponding .tc symbol. */
5190
5191int
5192ppc_fix_adjustable (fix)
5193 fixS *fix;
5194{
b782de16
AM		 5195 valueT val = resolve_symbol_value (fix->fx_addsy);
5196 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5197 TC_SYMFIELD_TYPE *tc;
5198
5199 if (symseg == absolute_section)
5200 return 0;
252b5132 5201
252b5132 5202 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5203 && fix->fx_addsy != ppc_toc_csect
b782de16 5204 && symseg == data_section
252b5132
RH		 5205 && val >= ppc_toc_frag->fr_address
5206 && (ppc_after_toc_frag == (fragS *) NULL
5207 || val < ppc_after_toc_frag->fr_address))
5208 {
5209 symbolS *sy;
5210
5211 for (sy = symbol_next (ppc_toc_csect);
5212 sy != (symbolS *) NULL;
5213 sy = symbol_next (sy))
5214 {
b782de16
AM		 5215 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5216
5217 if (sy_tc->class == XMC_TC0)
252b5132 5218 continue;
b782de16 5219 if (sy_tc->class != XMC_TC)
252b5132 5220 break;
b782de16 5221 if (val == resolve_symbol_value (sy))
252b5132
RH		 5222 {
5223 fix->fx_addsy = sy;
5224 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5225 return 0;
5226 }
5227 }
5228
5229 as_bad_where (fix->fx_file, fix->fx_line,
5230 _("symbol in .toc does not match any .tc"));
5231 }
5232
5233 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5234 tc = symbol_get_tc (fix->fx_addsy);
5235 if (tc->subseg == 0
5236 && tc->class != XMC_TC0
5237 && tc->class != XMC_TC
5238 && symseg != bss_section
252b5132 5239 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5240 && (symseg != data_section
252b5132
RH		 5241 || ppc_toc_csect == NULL
5242 || val < ppc_toc_frag->fr_address
5243 || (ppc_after_toc_frag != NULL
5244 && val >= ppc_after_toc_frag->fr_address)))
5245 {
5246 symbolS *csect;
b782de16 5247 symbolS *next_csect;
252b5132 5248
b782de16 5249 if (symseg == text_section)
252b5132 5250 csect = ppc_text_csects;
b782de16 5251 else if (symseg == data_section)
252b5132
RH		 5252 csect = ppc_data_csects;
5253 else
5254 abort ();
5255
5256 /* Skip the initial dummy symbol. */
809ffe0d 5257 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5258
5259 if (csect != (symbolS *) NULL)
5260 {
b782de16
AM		 5261 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5262 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5263 {
5264 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5265 have to look through the full symbol table to see
5266 whether this is the csect we want. Note that we will
5267 only get here if the csect has zero length. */
b782de16
AM		 5268 if (symbol_get_frag (csect)->fr_address == val
5269 && S_GET_VALUE (csect) == val)
252b5132
RH		 5270 {
5271 symbolS *scan;
5272
809ffe0d 5273 for (scan = symbol_next (csect);
252b5132 5274 scan != NULL;
809ffe0d 5275 scan = symbol_next (scan))
252b5132 5276 {
809ffe0d 5277 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5278 break;
5279 if (scan == fix->fx_addsy)
5280 break;
5281 }
5282
5283 /* If we found the symbol before the next csect
99a814a1 5284 symbol, then this is the csect we want. */
252b5132
RH		 5285 if (scan == fix->fx_addsy)
5286 break;
5287 }
5288
b782de16 5289 csect = next_csect;
252b5132
RH		 5290 }
5291
b782de16 5292 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5293 fix->fx_addsy = csect;
5294 }
b782de16 5295 return 0;
252b5132
RH		 5296 }
5297
5298 /* Adjust a reloc against a .lcomm symbol to be against the base
5299 .lcomm. */
b782de16 5300 if (symseg == bss_section
252b5132
RH		 5301 && ! S_IS_EXTERNAL (fix->fx_addsy))
5302 {
b782de16
AM		 5303 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5304
5305 fix->fx_offset += val - resolve_symbol_value (sy);
5306 fix->fx_addsy = sy;
252b5132
RH		 5307 }
5308
5309 return 0;
5310}
5311
5312/* A reloc from one csect to another must be kept. The assembler
5313 will, of course, keep relocs between sections, and it will keep
5314 absolute relocs, but we need to force it to keep PC relative relocs
5315 between two csects in the same section. */
5316
5317int
5318ppc_force_relocation (fix)
5319 fixS *fix;
5320{
5321 /* At this point fix->fx_addsy should already have been converted to
5322 a csect symbol. If the csect does not include the fragment, then
5323 we need to force the relocation. */
5324 if (fix->fx_pcrel
5325 && fix->fx_addsy != NULL
809ffe0d
ILT		 5326 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5327 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5328 > fix->fx_frag->fr_address)
5329 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5330 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5331 <= fix->fx_frag->fr_address))))
5332 return 1;
5333
ae6063d4 5334 return generic_force_reloc (fix);
252b5132
RH		 5335}
5336
5337#endif /* OBJ_XCOFF */
5338
0baf16f2 5339#ifdef OBJ_ELF
a161fe53
AM		 5340/* If this function returns non-zero, it guarantees that a relocation
5341 will be emitted for a fixup. */
5342
5343int
5344ppc_force_relocation (fix)
5345 fixS *fix;
5346{
5347 /* Branch prediction relocations must force a relocation, as must
5348 the vtable description relocs. */
5349 switch (fix->fx_r_type)
5350 {
5351 case BFD_RELOC_PPC_B16_BRTAKEN:
5352 case BFD_RELOC_PPC_B16_BRNTAKEN:
5353 case BFD_RELOC_PPC_BA16_BRTAKEN:
5354 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5355 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5356 return 1;
5357 default:
5358 break;
5359 }
5360
cdba85ec
AM		 5361 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5362 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5363 return 1;
5364
ae6063d4 5365 return generic_force_reloc (fix);
a161fe53
AM		 5366}
5367
0baf16f2
AM		 5368int
5369ppc_fix_adjustable (fix)
5370 fixS *fix;
252b5132 5371{
0baf16f2
AM		 5372 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5373 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5374 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5375 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5376 && fix->fx_r_type != BFD_RELOC_GPREL16
5377 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5378 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec
AM		 5379 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5380 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
0baf16f2
AM		 5381 && (fix->fx_pcrel
5382 || (fix->fx_subsy != NULL
5383 && (S_GET_SEGMENT (fix->fx_subsy)
5384 == S_GET_SEGMENT (fix->fx_addsy)))
5385 || S_IS_LOCAL (fix->fx_addsy)));
252b5132 5386}
0baf16f2 5387#endif
252b5132
RH		 5388
5389/* Apply a fixup to the object code. This is called for all the
5390 fixups we generated by the call to fix_new_exp, above. In the call
5391 above we used a reloc code which was the largest legal reloc code
5392 plus the operand index. Here we undo that to recover the operand
5393 index. At this point all symbol values should be fully resolved,
5394 and we attempt to completely resolve the reloc. If we can not do
5395 that, we determine the correct reloc code and put it back in the
5396 fixup. */
5397
94f592af
NC		 5398void
5399md_apply_fix3 (fixP, valP, seg)
5400 fixS *fixP;
5401 valueT * valP;
0baf16f2 5402 segT seg ATTRIBUTE_UNUSED;
252b5132 5403{
94f592af 5404 valueT value = * valP;
252b5132
RH		 5405
5406#ifdef OBJ_ELF
94f592af 5407 if (fixP->fx_addsy != NULL)
252b5132 5408 {
a161fe53 5409 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5410 if (fixP->fx_pcrel)
5411 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5412 }
5413 else
94f592af 5414 fixP->fx_done = 1;
252b5132 5415#else
a161fe53 5416 /* FIXME FIXME FIXME: The value we are passed in *valP includes
252b5132
RH		 5417 the symbol values. Since we are using BFD_ASSEMBLER, if we are
5418 doing this relocation the code in write.c is going to call
5419 bfd_install_relocation, which is also going to use the symbol
5420 value. That means that if the reloc is fully resolved we want to
a161fe53 5421 use *valP since bfd_install_relocation is not being used.
252b5132 5422 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5423 *valP, and must use fx_offset instead. However, if the reloc
5424 is PC relative, we do want to use *valP since it includes the
252b5132 5425 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5426 if (fixP->fx_addsy == (symbolS *) NULL)
5427 fixP->fx_done = 1;
5428
5429 else if (fixP->fx_pcrel)
5430 ;
5431
252b5132 5432 else
a161fe53
AM		 5433 value = fixP->fx_offset;
5434#endif
5435
5436 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5437 {
a161fe53
AM		 5438 /* We can't actually support subtracting a symbol. */
5439 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5440 }
252b5132 5441
94f592af 5442 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5443 {
5444 int opindex;
5445 const struct powerpc_operand *operand;
5446 char *where;
5447 unsigned long insn;
5448
94f592af 5449 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5450
5451 operand = &powerpc_operands[opindex];
5452
5453#ifdef OBJ_XCOFF
0baf16f2
AM		 5454 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5455 does not generate a reloc. It uses the offset of `sym' within its
5456 csect. Other usages, such as `.long sym', generate relocs. This
5457 is the documented behaviour of non-TOC symbols. */
252b5132
RH		 5458 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5459 && operand->bits == 16
5460 && operand->shift == 0
2b3c4602 5461 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5462 && fixP->fx_addsy != NULL
5463 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5464 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5465 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5466 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5467 {
94f592af
NC		 5468 value = fixP->fx_offset;
5469 fixP->fx_done = 1;
252b5132
RH		 5470 }
5471#endif
5472
5473 /* Fetch the instruction, insert the fully resolved operand
5474 value, and stuff the instruction back again. */
94f592af 5475 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5476 if (target_big_endian)
5477 insn = bfd_getb32 ((unsigned char *) where);
5478 else
5479 insn = bfd_getl32 ((unsigned char *) where);
5480 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5481 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5482 if (target_big_endian)
5483 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5484 else
5485 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5486
94f592af
NC		 5487 if (fixP->fx_done)
5488 /* Nothing else to do here. */
5489 return;
252b5132 5490
94f592af 5491 assert (fixP->fx_addsy != NULL);
0baf16f2 5492
252b5132
RH		 5493 /* Determine a BFD reloc value based on the operand information.
5494 We are only prepared to turn a few of the operands into
0baf16f2 5495 relocs. */
11b37b7b
AM		 5496 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5497 && operand->bits == 26
5498 && operand->shift == 0)
94f592af 5499 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM		 5500 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5501 && operand->bits == 16
5502 && operand->shift == 0)
95210096
AM		 5503 {
5504 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5505#ifdef OBJ_XCOFF
5506 fixP->fx_size = 2;
5507 if (target_big_endian)
5508 fixP->fx_where += 2;
5509#endif
5510 }
11b37b7b
AM		 5511 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5512 && operand->bits == 26
5513 && operand->shift == 0)
94f592af 5514 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM		 5515 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5516 && operand->bits == 16
5517 && operand->shift == 0)
95210096
AM		 5518 {
5519 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5520#ifdef OBJ_XCOFF
5521 fixP->fx_size = 2;
5522 if (target_big_endian)
5523 fixP->fx_where += 2;
5524#endif
5525 }
0baf16f2 5526#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM		 5527 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5528 && operand->bits == 16
a7fc733f 5529 && operand->shift == 0)
11b37b7b 5530 {
a7fc733f
AM		 5531 if (ppc_is_toc_sym (fixP->fx_addsy))
5532 {
5533 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5534#ifdef OBJ_ELF
a7fc733f
AM		 5535 if (ppc_obj64
5536 && (operand->flags & PPC_OPERAND_DS) != 0)
5537 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5538#endif
5539 }
5540 else
5541 {
5542 fixP->fx_r_type = BFD_RELOC_16;
5543#ifdef OBJ_ELF
5544 if (ppc_obj64
5545 && (operand->flags & PPC_OPERAND_DS) != 0)
5546 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5547#endif
a7fc733f 5548 }
94f592af 5549 fixP->fx_size = 2;
11b37b7b 5550 if (target_big_endian)
94f592af 5551 fixP->fx_where += 2;
11b37b7b 5552 }
0baf16f2 5553#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5554 else
252b5132
RH		 5555 {
5556 char *sfile;
5557 unsigned int sline;
5558
5559 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5560 symbol. */
94f592af
NC		 5561 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5562 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5563 _("unresolved expression that must be resolved"));
5564 else
94f592af 5565 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5566 _("unsupported relocation against %s"),
94f592af
NC		 5567 S_GET_NAME (fixP->fx_addsy));
5568 fixP->fx_done = 1;
5569 return;
252b5132
RH		 5570 }
5571 }
5572 else
5573 {
5574#ifdef OBJ_ELF
94f592af 5575 ppc_elf_validate_fix (fixP, seg);
252b5132 5576#endif
94f592af 5577 switch (fixP->fx_r_type)
252b5132 5578 {
252b5132 5579 case BFD_RELOC_CTOR:
2b3c4602 5580 if (ppc_obj64)
9c7977b3
AM		 5581 goto ctor64;
5582 /* fall through */
5583
0baf16f2 5584 case BFD_RELOC_32:
94f592af
NC		 5585 if (fixP->fx_pcrel)
5586 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5587 /* fall through */
252b5132
RH		 5588
5589 case BFD_RELOC_RVA:
5590 case BFD_RELOC_32_PCREL:
252b5132 5591 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5592 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5593 value, 4);
5594 break;
5595
7f6d05e8 5596 case BFD_RELOC_64:
9c7977b3 5597 ctor64:
94f592af
NC		 5598 if (fixP->fx_pcrel)
5599 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5600 /* fall through */
0baf16f2 5601
7f6d05e8 5602 case BFD_RELOC_64_PCREL:
94f592af 5603 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5604 value, 8);
81d4177b 5605 break;
0baf16f2 5606
252b5132
RH		 5607 case BFD_RELOC_LO16:
5608 case BFD_RELOC_16:
5609 case BFD_RELOC_GPREL16:
5610 case BFD_RELOC_16_GOT_PCREL:
5611 case BFD_RELOC_16_GOTOFF:
5612 case BFD_RELOC_LO16_GOTOFF:
5613 case BFD_RELOC_HI16_GOTOFF:
5614 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5615 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5616 case BFD_RELOC_LO16_BASEREL:
5617 case BFD_RELOC_HI16_BASEREL:
5618 case BFD_RELOC_HI16_S_BASEREL:
5619 case BFD_RELOC_PPC_EMB_NADDR16:
5620 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5621 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5622 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5623 case BFD_RELOC_PPC_EMB_SDAI16:
5624 case BFD_RELOC_PPC_EMB_SDA2REL:
5625 case BFD_RELOC_PPC_EMB_SDA2I16:
5626 case BFD_RELOC_PPC_EMB_RELSEC16:
5627 case BFD_RELOC_PPC_EMB_RELST_LO:
5628 case BFD_RELOC_PPC_EMB_RELST_HI:
5629 case BFD_RELOC_PPC_EMB_RELST_HA:
5630 case BFD_RELOC_PPC_EMB_RELSDA:
5631 case BFD_RELOC_PPC_TOC16:
0baf16f2 5632#ifdef OBJ_ELF
0baf16f2
AM		 5633 case BFD_RELOC_PPC64_TOC16_LO:
5634 case BFD_RELOC_PPC64_TOC16_HI:
5635 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5636#endif
94f592af 5637 if (fixP->fx_pcrel)
252b5132 5638 {
94f592af
NC		 5639 if (fixP->fx_addsy != NULL)
5640 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5641 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5642 bfd_get_reloc_code_name (fixP->fx_r_type),
5643 S_GET_NAME (fixP->fx_addsy));
252b5132 5644 else
94f592af 5645 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5646 _("cannot emit PC relative %s relocation"),
94f592af 5647 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5648 }
5649
94f592af 5650 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5651 value, 2);
5652 break;
5653
5654 /* This case happens when you write, for example,
5655 lis %r3,(L1-L2)@ha
5656 where L1 and L2 are defined later. */
5657 case BFD_RELOC_HI16:
94f592af 5658 if (fixP->fx_pcrel)
252b5132 5659 abort ();
94f592af 5660 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5661 PPC_HI (value), 2);
252b5132 5662 break;
0baf16f2 5663
252b5132 5664 case BFD_RELOC_HI16_S:
94f592af 5665 if (fixP->fx_pcrel)
252b5132 5666 abort ();
94f592af 5667 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5668 PPC_HA (value), 2);
5669 break;
5670
5671#ifdef OBJ_ELF
0baf16f2 5672 case BFD_RELOC_PPC64_HIGHER:
94f592af 5673 if (fixP->fx_pcrel)
0baf16f2 5674 abort ();
94f592af 5675 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5676 PPC_HIGHER (value), 2);
252b5132
RH		 5677 break;
5678
0baf16f2 5679 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5680 if (fixP->fx_pcrel)
0baf16f2 5681 abort ();
94f592af 5682 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5683 PPC_HIGHERA (value), 2);
5684 break;
5685
5686 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5687 if (fixP->fx_pcrel)
0baf16f2 5688 abort ();
94f592af 5689 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5690 PPC_HIGHEST (value), 2);
5691 break;
5692
5693 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5694 if (fixP->fx_pcrel)
0baf16f2 5695 abort ();
94f592af 5696 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5697 PPC_HIGHESTA (value), 2);
5698 break;
5699
5700 case BFD_RELOC_PPC64_ADDR16_DS:
5701 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5702 case BFD_RELOC_PPC64_GOT16_DS:
5703 case BFD_RELOC_PPC64_GOT16_LO_DS:
5704 case BFD_RELOC_PPC64_PLT16_LO_DS:
5705 case BFD_RELOC_PPC64_SECTOFF_DS:
5706 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5707 case BFD_RELOC_PPC64_TOC16_DS:
5708 case BFD_RELOC_PPC64_TOC16_LO_DS:
5709 case BFD_RELOC_PPC64_PLTGOT16_DS:
5710 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5711 if (fixP->fx_pcrel)
0baf16f2
AM		 5712 abort ();
5713 {
94f592af 5714 unsigned char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
0baf16f2
AM		 5715 unsigned long val;
5716
5717 if (target_big_endian)
5718 val = bfd_getb16 (where);
5719 else
5720 val = bfd_getl16 (where);
5721 val |= (value & 0xfffc);
5722 if (target_big_endian)
5723 bfd_putb16 ((bfd_vma) val, where);
5724 else
5725 bfd_putl16 ((bfd_vma) val, where);
5726 }
5727 break;
cdba85ec
AM		 5728
5729 case BFD_RELOC_PPC_TLS:
5730 case BFD_RELOC_PPC_DTPMOD:
5731 case BFD_RELOC_PPC_TPREL16:
5732 case BFD_RELOC_PPC_TPREL16_LO:
5733 case BFD_RELOC_PPC_TPREL16_HI:
5734 case BFD_RELOC_PPC_TPREL16_HA:
5735 case BFD_RELOC_PPC_TPREL:
5736 case BFD_RELOC_PPC_DTPREL16:
5737 case BFD_RELOC_PPC_DTPREL16_LO:
5738 case BFD_RELOC_PPC_DTPREL16_HI:
5739 case BFD_RELOC_PPC_DTPREL16_HA:
5740 case BFD_RELOC_PPC_DTPREL:
5741 case BFD_RELOC_PPC_GOT_TLSGD16:
5742 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5743 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5744 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5745 case BFD_RELOC_PPC_GOT_TLSLD16:
5746 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5747 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5748 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5749 case BFD_RELOC_PPC_GOT_TPREL16:
5750 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5751 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5752 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5753 case BFD_RELOC_PPC_GOT_DTPREL16:
5754 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5755 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5756 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5757 case BFD_RELOC_PPC64_TPREL16_DS:
5758 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5759 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5760 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5761 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5762 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5763 case BFD_RELOC_PPC64_DTPREL16_DS:
5764 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5765 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5766 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5767 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5768 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
5769 break;
0baf16f2 5770#endif
252b5132 5771 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5772 bytes, rather than 2, so offset it here appropriately. */
252b5132 5773 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5774 if (fixP->fx_pcrel)
252b5132
RH		 5775 abort ();
5776
94f592af 5777 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5778 + ((target_big_endian) ? 2 : 0),
5779 value, 2);
5780 break;
5781
5782 case BFD_RELOC_8:
94f592af 5783 if (fixP->fx_pcrel)
252b5132
RH		 5784 abort ();
5785
94f592af 5786 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5787 value, 1);
5788 break;
5789
5790 case BFD_RELOC_24_PLT_PCREL:
5791 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5792 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5793 abort ();
5794
94f592af 5795 if (fixP->fx_done)
99a814a1
AM		 5796 {
5797 char *where;
5798 unsigned long insn;
5799
5800 /* Fetch the instruction, insert the fully resolved operand
5801 value, and stuff the instruction back again. */
94f592af 5802 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 5803 if (target_big_endian)
5804 insn = bfd_getb32 ((unsigned char *) where);
5805 else
5806 insn = bfd_getl32 ((unsigned char *) where);
5807 if ((value & 3) != 0)
94f592af 5808 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5809 _("must branch to an address a multiple of 4"));
5810 if ((offsetT) value < -0x40000000
5811 || (offsetT) value >= 0x40000000)
94f592af 5812 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5813 _("@local or @plt branch destination is too far away, %ld bytes"),
5814 (long) value);
5815 insn = insn | (value & 0x03fffffc);
5816 if (target_big_endian)
5817 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5818 else
5819 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5820 }
252b5132
RH		 5821 break;
5822
5823 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 5824 fixP->fx_done = 0;
5825 if (fixP->fx_addsy
5826 && !S_IS_DEFINED (fixP->fx_addsy)
5827 && !S_IS_WEAK (fixP->fx_addsy))
5828 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 5829 break;
5830
5831 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5832 fixP->fx_done = 0;
252b5132
RH		 5833 break;
5834
0baf16f2 5835#ifdef OBJ_ELF
0baf16f2
AM		 5836 /* Generated by reference to `sym@tocbase'. The sym is
5837 ignored by the linker. */
5838 case BFD_RELOC_PPC64_TOC:
94f592af 5839 fixP->fx_done = 0;
0baf16f2 5840 break;
0baf16f2 5841#endif
252b5132 5842 default:
bc805888 5843 fprintf (stderr,
94f592af 5844 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 5845 fflush (stderr);
252b5132
RH		 5846 abort ();
5847 }
5848 }
5849
5850#ifdef OBJ_ELF
94f592af 5851 fixP->fx_addnumber = value;
252b5132 5852#else
94f592af
NC		 5853 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
5854 fixP->fx_addnumber = 0;
252b5132
RH		 5855 else
5856 {
5857#ifdef TE_PE
94f592af 5858 fixP->fx_addnumber = 0;
252b5132
RH		 5859#else
5860 /* We want to use the offset within the data segment of the
5861 symbol, not the actual VMA of the symbol. */
94f592af
NC		 5862 fixP->fx_addnumber =
5863 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 5864#endif
5865 }
5866#endif
252b5132
RH		 5867}
5868
5869/* Generate a reloc for a fixup. */
5870
5871arelent *
5872tc_gen_reloc (seg, fixp)
92161534 5873 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5874 fixS *fixp;
5875{
5876 arelent *reloc;
5877
5878 reloc = (arelent *) xmalloc (sizeof (arelent));
5879
49309057
ILT		 5880 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
5881 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 5882 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
5883 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
5884 if (reloc->howto == (reloc_howto_type *) NULL)
5885 {
5886 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 5887 _("reloc %d not supported by object file format"),
5888 (int) fixp->fx_r_type);
252b5132
RH		 5889 return NULL;
5890 }
5891 reloc->addend = fixp->fx_addnumber;
5892
5893 return reloc;
5894}
GDB Binutils - Deliverables
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