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* config.bfd: Add bfd_elf32_rx_be_ns_vec.
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
0dc93057 3 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
85645aed
TG		 38#ifdef OBJ_XCOFF
39#include "coff/xcoff.h"
40#include "libxcoff.h"
41#endif
42
252b5132
RH		 43/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
44
45/* Tell the main code what the endianness is. */
46extern int target_big_endian;
47
48/* Whether or not, we've set target_big_endian. */
49static int set_target_endian = 0;
50
51/* Whether to use user friendly register names. */
52#ifndef TARGET_REG_NAMES_P
53#ifdef TE_PE
b34976b6 54#define TARGET_REG_NAMES_P TRUE
252b5132 55#else
b34976b6 56#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 57#endif
58#endif
59
0baf16f2
AM		 60/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
61 HIGHESTA. */
62
63/* #lo(value) denotes the least significant 16 bits of the indicated. */
64#define PPC_LO(v) ((v) & 0xffff)
65
66/* #hi(value) denotes bits 16 through 31 of the indicated value. */
67#define PPC_HI(v) (((v) >> 16) & 0xffff)
68
69/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
71 signed number. */
15c1449b 72#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 73
74/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 75#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 76
77/* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
15c1449b 79#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 80
81/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 82#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 83
84/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 85 compensating for #lo being treated as a signed number. */
86#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 87
88#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
89
b34976b6 90static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 91
98027b10
AM		 92static void ppc_macro (char *, const struct powerpc_macro *);
93static void ppc_byte (int);
0baf16f2
AM		 94
95#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 96static void ppc_tc (int);
97static void ppc_machine (int);
0baf16f2 98#endif
252b5132
RH		 99
100#ifdef OBJ_XCOFF
98027b10
AM		 101static void ppc_comm (int);
102static void ppc_bb (int);
103static void ppc_bc (int);
104static void ppc_bf (int);
105static void ppc_biei (int);
106static void ppc_bs (int);
107static void ppc_eb (int);
108static void ppc_ec (int);
109static void ppc_ef (int);
110static void ppc_es (int);
111static void ppc_csect (int);
85645aed 112static void ppc_dwsect (int);
98027b10
AM		 113static void ppc_change_csect (symbolS *, offsetT);
114static void ppc_function (int);
115static void ppc_extern (int);
116static void ppc_lglobl (int);
c865e45b 117static void ppc_ref (int);
98027b10
AM		 118static void ppc_section (int);
119static void ppc_named_section (int);
120static void ppc_stabx (int);
121static void ppc_rename (int);
122static void ppc_toc (int);
123static void ppc_xcoff_cons (int);
124static void ppc_vbyte (int);
252b5132
RH		 125#endif
126
127#ifdef OBJ_ELF
98027b10
AM		 128static void ppc_elf_cons (int);
129static void ppc_elf_rdata (int);
130static void ppc_elf_lcomm (int);
252b5132
RH		 131#endif
132
133#ifdef TE_PE
98027b10
AM		 134static void ppc_previous (int);
135static void ppc_pdata (int);
136static void ppc_ydata (int);
137static void ppc_reldata (int);
138static void ppc_rdata (int);
139static void ppc_ualong (int);
140static void ppc_znop (int);
141static void ppc_pe_comm (int);
142static void ppc_pe_section (int);
143static void ppc_pe_function (int);
144static void ppc_pe_tocd (int);
252b5132
RH		 145#endif
146\f
147/* Generic assembler global variables which must be defined by all
148 targets. */
149
150#ifdef OBJ_ELF
151/* This string holds the chars that always start a comment. If the
152 pre-processor is disabled, these aren't very useful. The macro
153 tc_comment_chars points to this. We use this, rather than the
154 usual comment_chars, so that we can switch for Solaris conventions. */
155static const char ppc_solaris_comment_chars[] = "#!";
156static const char ppc_eabi_comment_chars[] = "#";
157
158#ifdef TARGET_SOLARIS_COMMENT
159const char *ppc_comment_chars = ppc_solaris_comment_chars;
160#else
161const char *ppc_comment_chars = ppc_eabi_comment_chars;
162#endif
163#else
164const char comment_chars[] = "#";
165#endif
166
167/* Characters which start a comment at the beginning of a line. */
168const char line_comment_chars[] = "#";
169
170/* Characters which may be used to separate multiple commands on a
171 single line. */
172const char line_separator_chars[] = ";";
173
174/* Characters which are used to indicate an exponent in a floating
175 point number. */
176const char EXP_CHARS[] = "eE";
177
178/* Characters which mean that a number is a floating point constant,
179 as in 0d1.0. */
180const char FLT_CHARS[] = "dD";
5ce8663f 181
5e02f92e 182/* Anything that can start an operand needs to be mentioned here,
ac805826 183 to stop the input scrubber eating whitespace. */
5e02f92e 184const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 185
186/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
187int ppc_cie_data_alignment;
783de163 188
cef4f754
AM		 189/* More than this number of nops in an alignment op gets a branch
190 instead. */
191unsigned long nop_limit = 4;
192
783de163
AM		 193/* The type of processor we are assembling for. This is one or more
194 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 195ppc_cpu_t ppc_cpu = 0;
01efc3af
AM		 196
197/* Flags set on encountering toc relocs. */
198enum {
199 has_large_toc_reloc = 1,
200 has_small_toc_reloc = 2
201} toc_reloc_types;
252b5132
RH		 202\f
203/* The target specific pseudo-ops which we support. */
204
205const pseudo_typeS md_pseudo_table[] =
206{
207 /* Pseudo-ops which must be overridden. */
208 { "byte", ppc_byte, 0 },
209
210#ifdef OBJ_XCOFF
211 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
212 legitimately belong in the obj-*.c file. However, XCOFF is based
213 on COFF, and is only implemented for the RS/6000. We just use
214 obj-coff.c, and add what we need here. */
215 { "comm", ppc_comm, 0 },
216 { "lcomm", ppc_comm, 1 },
217 { "bb", ppc_bb, 0 },
218 { "bc", ppc_bc, 0 },
219 { "bf", ppc_bf, 0 },
220 { "bi", ppc_biei, 0 },
221 { "bs", ppc_bs, 0 },
222 { "csect", ppc_csect, 0 },
85645aed 223 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 224 { "data", ppc_section, 'd' },
225 { "eb", ppc_eb, 0 },
226 { "ec", ppc_ec, 0 },
227 { "ef", ppc_ef, 0 },
228 { "ei", ppc_biei, 1 },
229 { "es", ppc_es, 0 },
230 { "extern", ppc_extern, 0 },
231 { "function", ppc_function, 0 },
232 { "lglobl", ppc_lglobl, 0 },
c865e45b 233 { "ref", ppc_ref, 0 },
252b5132
RH		 234 { "rename", ppc_rename, 0 },
235 { "section", ppc_named_section, 0 },
236 { "stabx", ppc_stabx, 0 },
237 { "text", ppc_section, 't' },
238 { "toc", ppc_toc, 0 },
239 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 240 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 241 { "word", ppc_xcoff_cons, 1 },
242 { "short", ppc_xcoff_cons, 1 },
243 { "vbyte", ppc_vbyte, 0 },
244#endif
245
246#ifdef OBJ_ELF
0baf16f2
AM		 247 { "llong", ppc_elf_cons, 8 },
248 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 249 { "long", ppc_elf_cons, 4 },
250 { "word", ppc_elf_cons, 2 },
251 { "short", ppc_elf_cons, 2 },
252 { "rdata", ppc_elf_rdata, 0 },
253 { "rodata", ppc_elf_rdata, 0 },
254 { "lcomm", ppc_elf_lcomm, 0 },
255#endif
256
257#ifdef TE_PE
99a814a1 258 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 259 { "previous", ppc_previous, 0 },
260 { "pdata", ppc_pdata, 0 },
261 { "ydata", ppc_ydata, 0 },
262 { "reldata", ppc_reldata, 0 },
263 { "rdata", ppc_rdata, 0 },
264 { "ualong", ppc_ualong, 0 },
265 { "znop", ppc_znop, 0 },
266 { "comm", ppc_pe_comm, 0 },
267 { "lcomm", ppc_pe_comm, 1 },
268 { "section", ppc_pe_section, 0 },
269 { "function", ppc_pe_function,0 },
270 { "tocd", ppc_pe_tocd, 0 },
271#endif
272
0baf16f2 273#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 274 { "tc", ppc_tc, 0 },
0baf16f2
AM		 275 { "machine", ppc_machine, 0 },
276#endif
252b5132
RH		 277
278 { NULL, NULL, 0 }
279};
280
281\f
99a814a1
AM		 282/* Predefined register names if -mregnames (or default for Windows NT).
283 In general, there are lots of them, in an attempt to be compatible
284 with a number of other Windows NT assemblers. */
252b5132
RH		 285
286/* Structure to hold information about predefined registers. */
287struct pd_reg
288 {
289 char *name;
290 int value;
291 };
292
293/* List of registers that are pre-defined:
294
295 Each general register has predefined names of the form:
296 1. r<reg_num> which has the value <reg_num>.
297 2. r.<reg_num> which has the value <reg_num>.
298
252b5132
RH		 299 Each floating point register has predefined names of the form:
300 1. f<reg_num> which has the value <reg_num>.
301 2. f.<reg_num> which has the value <reg_num>.
302
7a899fff
C		 303 Each vector unit register has predefined names of the form:
304 1. v<reg_num> which has the value <reg_num>.
305 2. v.<reg_num> which has the value <reg_num>.
306
252b5132
RH		 307 Each condition register has predefined names of the form:
308 1. cr<reg_num> which has the value <reg_num>.
309 2. cr.<reg_num> which has the value <reg_num>.
310
311 There are individual registers as well:
312 sp or r.sp has the value 1
313 rtoc or r.toc has the value 2
314 fpscr has the value 0
315 xer has the value 1
316 lr has the value 8
317 ctr has the value 9
318 pmr has the value 0
319 dar has the value 19
320 dsisr has the value 18
321 dec has the value 22
322 sdr1 has the value 25
323 srr0 has the value 26
324 srr1 has the value 27
325
81d4177b 326 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 327
328static const struct pd_reg pre_defined_registers[] =
329{
330 { "cr.0", 0 }, /* Condition Registers */
331 { "cr.1", 1 },
332 { "cr.2", 2 },
333 { "cr.3", 3 },
334 { "cr.4", 4 },
335 { "cr.5", 5 },
336 { "cr.6", 6 },
337 { "cr.7", 7 },
338
339 { "cr0", 0 },
340 { "cr1", 1 },
341 { "cr2", 2 },
342 { "cr3", 3 },
343 { "cr4", 4 },
344 { "cr5", 5 },
345 { "cr6", 6 },
346 { "cr7", 7 },
347
348 { "ctr", 9 },
349
350 { "dar", 19 }, /* Data Access Register */
351 { "dec", 22 }, /* Decrementer */
352 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
353
354 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 355 { "f.1", 1 },
356 { "f.10", 10 },
357 { "f.11", 11 },
358 { "f.12", 12 },
359 { "f.13", 13 },
360 { "f.14", 14 },
361 { "f.15", 15 },
362 { "f.16", 16 },
363 { "f.17", 17 },
364 { "f.18", 18 },
365 { "f.19", 19 },
366 { "f.2", 2 },
367 { "f.20", 20 },
368 { "f.21", 21 },
369 { "f.22", 22 },
370 { "f.23", 23 },
371 { "f.24", 24 },
372 { "f.25", 25 },
373 { "f.26", 26 },
374 { "f.27", 27 },
375 { "f.28", 28 },
376 { "f.29", 29 },
377 { "f.3", 3 },
252b5132
RH		 378 { "f.30", 30 },
379 { "f.31", 31 },
066be9f7
PB		 380
381 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
382 { "f.33", 33 },
383 { "f.34", 34 },
384 { "f.35", 35 },
385 { "f.36", 36 },
386 { "f.37", 37 },
387 { "f.38", 38 },
388 { "f.39", 39 },
81d4177b 389 { "f.4", 4 },
066be9f7
PB		 390 { "f.40", 40 },
391 { "f.41", 41 },
392 { "f.42", 42 },
393 { "f.43", 43 },
394 { "f.44", 44 },
395 { "f.45", 45 },
396 { "f.46", 46 },
397 { "f.47", 47 },
398 { "f.48", 48 },
399 { "f.49", 49 },
81d4177b 400 { "f.5", 5 },
066be9f7
PB		 401 { "f.50", 50 },
402 { "f.51", 51 },
403 { "f.52", 52 },
404 { "f.53", 53 },
405 { "f.54", 54 },
406 { "f.55", 55 },
407 { "f.56", 56 },
408 { "f.57", 57 },
409 { "f.58", 58 },
410 { "f.59", 59 },
81d4177b 411 { "f.6", 6 },
066be9f7
PB		 412 { "f.60", 60 },
413 { "f.61", 61 },
414 { "f.62", 62 },
415 { "f.63", 63 },
81d4177b
KH		 416 { "f.7", 7 },
417 { "f.8", 8 },
418 { "f.9", 9 },
419
420 { "f0", 0 },
421 { "f1", 1 },
422 { "f10", 10 },
423 { "f11", 11 },
424 { "f12", 12 },
425 { "f13", 13 },
426 { "f14", 14 },
427 { "f15", 15 },
428 { "f16", 16 },
429 { "f17", 17 },
430 { "f18", 18 },
431 { "f19", 19 },
432 { "f2", 2 },
433 { "f20", 20 },
434 { "f21", 21 },
435 { "f22", 22 },
436 { "f23", 23 },
437 { "f24", 24 },
438 { "f25", 25 },
439 { "f26", 26 },
440 { "f27", 27 },
441 { "f28", 28 },
442 { "f29", 29 },
443 { "f3", 3 },
252b5132
RH		 444 { "f30", 30 },
445 { "f31", 31 },
066be9f7
PB		 446
447 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
448 { "f33", 33 },
449 { "f34", 34 },
450 { "f35", 35 },
451 { "f36", 36 },
452 { "f37", 37 },
453 { "f38", 38 },
454 { "f39", 39 },
81d4177b 455 { "f4", 4 },
066be9f7
PB		 456 { "f40", 40 },
457 { "f41", 41 },
458 { "f42", 42 },
459 { "f43", 43 },
460 { "f44", 44 },
461 { "f45", 45 },
462 { "f46", 46 },
463 { "f47", 47 },
464 { "f48", 48 },
465 { "f49", 49 },
81d4177b 466 { "f5", 5 },
066be9f7
PB		 467 { "f50", 50 },
468 { "f51", 51 },
469 { "f52", 52 },
470 { "f53", 53 },
471 { "f54", 54 },
472 { "f55", 55 },
473 { "f56", 56 },
474 { "f57", 57 },
475 { "f58", 58 },
476 { "f59", 59 },
81d4177b 477 { "f6", 6 },
066be9f7
PB		 478 { "f60", 60 },
479 { "f61", 61 },
480 { "f62", 62 },
481 { "f63", 63 },
81d4177b
KH		 482 { "f7", 7 },
483 { "f8", 8 },
484 { "f9", 9 },
252b5132
RH		 485
486 { "fpscr", 0 },
487
c3d65c1c
BE		 488 /* Quantization registers used with pair single instructions. */
489 { "gqr.0", 0 },
490 { "gqr.1", 1 },
491 { "gqr.2", 2 },
492 { "gqr.3", 3 },
493 { "gqr.4", 4 },
494 { "gqr.5", 5 },
495 { "gqr.6", 6 },
496 { "gqr.7", 7 },
497 { "gqr0", 0 },
498 { "gqr1", 1 },
499 { "gqr2", 2 },
500 { "gqr3", 3 },
501 { "gqr4", 4 },
502 { "gqr5", 5 },
503 { "gqr6", 6 },
504 { "gqr7", 7 },
505
252b5132
RH		 506 { "lr", 8 }, /* Link Register */
507
508 { "pmr", 0 },
509
510 { "r.0", 0 }, /* General Purpose Registers */
511 { "r.1", 1 },
512 { "r.10", 10 },
513 { "r.11", 11 },
514 { "r.12", 12 },
515 { "r.13", 13 },
516 { "r.14", 14 },
517 { "r.15", 15 },
518 { "r.16", 16 },
519 { "r.17", 17 },
520 { "r.18", 18 },
521 { "r.19", 19 },
522 { "r.2", 2 },
523 { "r.20", 20 },
524 { "r.21", 21 },
525 { "r.22", 22 },
526 { "r.23", 23 },
527 { "r.24", 24 },
528 { "r.25", 25 },
529 { "r.26", 26 },
530 { "r.27", 27 },
531 { "r.28", 28 },
532 { "r.29", 29 },
533 { "r.3", 3 },
534 { "r.30", 30 },
535 { "r.31", 31 },
536 { "r.4", 4 },
537 { "r.5", 5 },
538 { "r.6", 6 },
539 { "r.7", 7 },
540 { "r.8", 8 },
541 { "r.9", 9 },
542
543 { "r.sp", 1 }, /* Stack Pointer */
544
545 { "r.toc", 2 }, /* Pointer to the table of contents */
546
547 { "r0", 0 }, /* More general purpose registers */
548 { "r1", 1 },
549 { "r10", 10 },
550 { "r11", 11 },
551 { "r12", 12 },
552 { "r13", 13 },
553 { "r14", 14 },
554 { "r15", 15 },
555 { "r16", 16 },
556 { "r17", 17 },
557 { "r18", 18 },
558 { "r19", 19 },
559 { "r2", 2 },
560 { "r20", 20 },
561 { "r21", 21 },
562 { "r22", 22 },
563 { "r23", 23 },
564 { "r24", 24 },
565 { "r25", 25 },
566 { "r26", 26 },
567 { "r27", 27 },
568 { "r28", 28 },
569 { "r29", 29 },
570 { "r3", 3 },
571 { "r30", 30 },
572 { "r31", 31 },
573 { "r4", 4 },
574 { "r5", 5 },
575 { "r6", 6 },
576 { "r7", 7 },
577 { "r8", 8 },
578 { "r9", 9 },
579
580 { "rtoc", 2 }, /* Table of contents */
581
582 { "sdr1", 25 }, /* Storage Description Register 1 */
583
584 { "sp", 1 },
585
586 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
587 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 588
066be9f7 589 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 590 { "v.1", 1 },
591 { "v.10", 10 },
592 { "v.11", 11 },
593 { "v.12", 12 },
594 { "v.13", 13 },
595 { "v.14", 14 },
596 { "v.15", 15 },
597 { "v.16", 16 },
598 { "v.17", 17 },
599 { "v.18", 18 },
600 { "v.19", 19 },
601 { "v.2", 2 },
602 { "v.20", 20 },
603 { "v.21", 21 },
604 { "v.22", 22 },
605 { "v.23", 23 },
606 { "v.24", 24 },
607 { "v.25", 25 },
608 { "v.26", 26 },
609 { "v.27", 27 },
610 { "v.28", 28 },
611 { "v.29", 29 },
612 { "v.3", 3 },
7a899fff
C		 613 { "v.30", 30 },
614 { "v.31", 31 },
81d4177b
KH		 615 { "v.4", 4 },
616 { "v.5", 5 },
617 { "v.6", 6 },
618 { "v.7", 7 },
619 { "v.8", 8 },
620 { "v.9", 9 },
7a899fff
C		 621
622 { "v0", 0 },
81d4177b
KH		 623 { "v1", 1 },
624 { "v10", 10 },
625 { "v11", 11 },
626 { "v12", 12 },
627 { "v13", 13 },
628 { "v14", 14 },
629 { "v15", 15 },
630 { "v16", 16 },
631 { "v17", 17 },
632 { "v18", 18 },
633 { "v19", 19 },
634 { "v2", 2 },
635 { "v20", 20 },
636 { "v21", 21 },
637 { "v22", 22 },
638 { "v23", 23 },
639 { "v24", 24 },
640 { "v25", 25 },
641 { "v26", 26 },
642 { "v27", 27 },
643 { "v28", 28 },
644 { "v29", 29 },
645 { "v3", 3 },
7a899fff
C		 646 { "v30", 30 },
647 { "v31", 31 },
81d4177b
KH		 648 { "v4", 4 },
649 { "v5", 5 },
650 { "v6", 6 },
651 { "v7", 7 },
652 { "v8", 8 },
7a899fff 653 { "v9", 9 },
252b5132 654
066be9f7
PB		 655 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
656 { "vs.1", 1 },
657 { "vs.10", 10 },
658 { "vs.11", 11 },
659 { "vs.12", 12 },
660 { "vs.13", 13 },
661 { "vs.14", 14 },
662 { "vs.15", 15 },
663 { "vs.16", 16 },
664 { "vs.17", 17 },
665 { "vs.18", 18 },
666 { "vs.19", 19 },
667 { "vs.2", 2 },
668 { "vs.20", 20 },
669 { "vs.21", 21 },
670 { "vs.22", 22 },
671 { "vs.23", 23 },
672 { "vs.24", 24 },
673 { "vs.25", 25 },
674 { "vs.26", 26 },
675 { "vs.27", 27 },
676 { "vs.28", 28 },
677 { "vs.29", 29 },
678 { "vs.3", 3 },
679 { "vs.30", 30 },
680 { "vs.31", 31 },
681 { "vs.32", 32 },
682 { "vs.33", 33 },
683 { "vs.34", 34 },
684 { "vs.35", 35 },
685 { "vs.36", 36 },
686 { "vs.37", 37 },
687 { "vs.38", 38 },
688 { "vs.39", 39 },
689 { "vs.4", 4 },
690 { "vs.40", 40 },
691 { "vs.41", 41 },
692 { "vs.42", 42 },
693 { "vs.43", 43 },
694 { "vs.44", 44 },
695 { "vs.45", 45 },
696 { "vs.46", 46 },
697 { "vs.47", 47 },
698 { "vs.48", 48 },
699 { "vs.49", 49 },
700 { "vs.5", 5 },
701 { "vs.50", 50 },
702 { "vs.51", 51 },
703 { "vs.52", 52 },
704 { "vs.53", 53 },
705 { "vs.54", 54 },
706 { "vs.55", 55 },
707 { "vs.56", 56 },
708 { "vs.57", 57 },
709 { "vs.58", 58 },
710 { "vs.59", 59 },
711 { "vs.6", 6 },
712 { "vs.60", 60 },
713 { "vs.61", 61 },
714 { "vs.62", 62 },
715 { "vs.63", 63 },
716 { "vs.7", 7 },
717 { "vs.8", 8 },
718 { "vs.9", 9 },
719
720 { "vs0", 0 },
721 { "vs1", 1 },
722 { "vs10", 10 },
723 { "vs11", 11 },
724 { "vs12", 12 },
725 { "vs13", 13 },
726 { "vs14", 14 },
727 { "vs15", 15 },
728 { "vs16", 16 },
729 { "vs17", 17 },
730 { "vs18", 18 },
731 { "vs19", 19 },
732 { "vs2", 2 },
733 { "vs20", 20 },
734 { "vs21", 21 },
735 { "vs22", 22 },
736 { "vs23", 23 },
737 { "vs24", 24 },
738 { "vs25", 25 },
739 { "vs26", 26 },
740 { "vs27", 27 },
741 { "vs28", 28 },
742 { "vs29", 29 },
743 { "vs3", 3 },
744 { "vs30", 30 },
745 { "vs31", 31 },
746 { "vs32", 32 },
747 { "vs33", 33 },
748 { "vs34", 34 },
749 { "vs35", 35 },
750 { "vs36", 36 },
751 { "vs37", 37 },
752 { "vs38", 38 },
753 { "vs39", 39 },
754 { "vs4", 4 },
755 { "vs40", 40 },
756 { "vs41", 41 },
757 { "vs42", 42 },
758 { "vs43", 43 },
759 { "vs44", 44 },
760 { "vs45", 45 },
761 { "vs46", 46 },
762 { "vs47", 47 },
763 { "vs48", 48 },
764 { "vs49", 49 },
765 { "vs5", 5 },
766 { "vs50", 50 },
767 { "vs51", 51 },
768 { "vs52", 52 },
769 { "vs53", 53 },
770 { "vs54", 54 },
771 { "vs55", 55 },
772 { "vs56", 56 },
773 { "vs57", 57 },
774 { "vs58", 58 },
775 { "vs59", 59 },
776 { "vs6", 6 },
777 { "vs60", 60 },
778 { "vs61", 61 },
779 { "vs62", 62 },
780 { "vs63", 63 },
781 { "vs7", 7 },
782 { "vs8", 8 },
783 { "vs9", 9 },
784
252b5132
RH		 785 { "xer", 1 },
786
787};
788
bc805888 789#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 790
791/* Given NAME, find the register number associated with that name, return
792 the integer value associated with the given name or -1 on failure. */
793
252b5132 794static int
98027b10 795reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 796{
797 int middle, low, high;
798 int cmp;
799
800 low = 0;
801 high = regcount - 1;
802
803 do
804 {
805 middle = (low + high) / 2;
806 cmp = strcasecmp (name, regs[middle].name);
807 if (cmp < 0)
808 high = middle - 1;
809 else if (cmp > 0)
810 low = middle + 1;
811 else
812 return regs[middle].value;
813 }
814 while (low <= high);
815
816 return -1;
817}
818
819/*
99a814a1 820 * Summary of register_name.
252b5132
RH		 821 *
822 * in: Input_line_pointer points to 1st char of operand.
823 *
824 * out: A expressionS.
825 * The operand may have been a register: in this case, X_op == O_register,
826 * X_add_number is set to the register number, and truth is returned.
827 * Input_line_pointer->(next non-blank) char after operand, or is in its
828 * original state.
829 */
830
b34976b6 831static bfd_boolean
98027b10 832register_name (expressionS *expressionP)
252b5132
RH		 833{
834 int reg_number;
835 char *name;
836 char *start;
837 char c;
838
99a814a1 839 /* Find the spelling of the operand. */
252b5132 840 start = name = input_line_pointer;
3882b010 841 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 842 name = ++input_line_pointer;
843
3882b010 844 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 845 return FALSE;
252b5132
RH		 846
847 c = get_symbol_end ();
848 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
849
468cced8
AM		 850 /* Put back the delimiting char. */
851 *input_line_pointer = c;
852
99a814a1 853 /* Look to see if it's in the register table. */
81d4177b 854 if (reg_number >= 0)
252b5132
RH		 855 {
856 expressionP->X_op = O_register;
857 expressionP->X_add_number = reg_number;
81d4177b 858
99a814a1 859 /* Make the rest nice. */
252b5132
RH		 860 expressionP->X_add_symbol = NULL;
861 expressionP->X_op_symbol = NULL;
b34976b6 862 return TRUE;
252b5132 863 }
468cced8
AM		 864
865 /* Reset the line as if we had not done anything. */
866 input_line_pointer = start;
b34976b6 867 return FALSE;
252b5132
RH		 868}
869\f
870/* This function is called for each symbol seen in an expression. It
871 handles the special parsing which PowerPC assemblers are supposed
872 to use for condition codes. */
873
874/* Whether to do the special parsing. */
b34976b6 875static bfd_boolean cr_operand;
252b5132
RH		 876
877/* Names to recognize in a condition code. This table is sorted. */
878static const struct pd_reg cr_names[] =
879{
880 { "cr0", 0 },
881 { "cr1", 1 },
882 { "cr2", 2 },
883 { "cr3", 3 },
884 { "cr4", 4 },
885 { "cr5", 5 },
886 { "cr6", 6 },
887 { "cr7", 7 },
888 { "eq", 2 },
889 { "gt", 1 },
890 { "lt", 0 },
891 { "so", 3 },
892 { "un", 3 }
893};
894
895/* Parsing function. This returns non-zero if it recognized an
896 expression. */
897
898int
91d6fa6a 899ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 900{
901 int val;
902
903 if (! cr_operand)
904 return 0;
905
13abbae3
AM		 906 if (*name == '%')
907 ++name;
252b5132
RH		 908 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
909 name);
910 if (val < 0)
911 return 0;
912
91d6fa6a
NC		 913 exp->X_op = O_constant;
914 exp->X_add_number = val;
252b5132
RH		 915
916 return 1;
917}
918\f
919/* Local variables. */
920
2b3c4602
AM		 921/* Whether to target xcoff64/elf64. */
922static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 923
252b5132
RH		 924/* Opcode hash table. */
925static struct hash_control *ppc_hash;
926
927/* Macro hash table. */
928static struct hash_control *ppc_macro_hash;
929
930#ifdef OBJ_ELF
99a814a1 931/* What type of shared library support to use. */
5d6f4f16 932static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 933
99a814a1 934/* Flags to set in the elf header. */
252b5132
RH		 935static flagword ppc_flags = 0;
936
937/* Whether this is Solaris or not. */
938#ifdef TARGET_SOLARIS_COMMENT
b34976b6 939#define SOLARIS_P TRUE
252b5132 940#else
b34976b6 941#define SOLARIS_P FALSE
252b5132
RH		 942#endif
943
b34976b6 944static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 945#endif
946
947#ifdef OBJ_XCOFF
948
949/* The RS/6000 assembler uses the .csect pseudo-op to generate code
950 using a bunch of different sections. These assembler sections,
951 however, are all encompassed within the .text or .data sections of
952 the final output file. We handle this by using different
953 subsegments within these main segments. */
954
955/* Next subsegment to allocate within the .text segment. */
956static subsegT ppc_text_subsegment = 2;
957
958/* Linked list of csects in the text section. */
959static symbolS *ppc_text_csects;
960
961/* Next subsegment to allocate within the .data segment. */
962static subsegT ppc_data_subsegment = 2;
963
964/* Linked list of csects in the data section. */
965static symbolS *ppc_data_csects;
966
967/* The current csect. */
968static symbolS *ppc_current_csect;
969
970/* The RS/6000 assembler uses a TOC which holds addresses of functions
971 and variables. Symbols are put in the TOC with the .tc pseudo-op.
972 A special relocation is used when accessing TOC entries. We handle
973 the TOC as a subsegment within the .data segment. We set it up if
974 we see a .toc pseudo-op, and save the csect symbol here. */
975static symbolS *ppc_toc_csect;
976
977/* The first frag in the TOC subsegment. */
978static fragS *ppc_toc_frag;
979
980/* The first frag in the first subsegment after the TOC in the .data
981 segment. NULL if there are no subsegments after the TOC. */
982static fragS *ppc_after_toc_frag;
983
984/* The current static block. */
985static symbolS *ppc_current_block;
986
987/* The COFF debugging section; set by md_begin. This is not the
988 .debug section, but is instead the secret BFD section which will
989 cause BFD to set the section number of a symbol to N_DEBUG. */
990static asection *ppc_coff_debug_section;
991
85645aed
TG		 992/* Structure to set the length field of the dwarf sections. */
993struct dw_subsection {
994 /* Subsections are simply linked. */
995 struct dw_subsection *link;
996
997 /* The subsection number. */
998 subsegT subseg;
999
1000 /* Expression to compute the length of the section. */
1001 expressionS end_exp;
1002};
1003
1004static struct dw_section {
1005 /* Corresponding section. */
1006 segT sect;
1007
1008 /* Simply linked list of subsections with a label. */
1009 struct dw_subsection *list_subseg;
1010
1011 /* The anonymous subsection. */
1012 struct dw_subsection *anon_subseg;
1013} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1014#endif /* OBJ_XCOFF */
1015
1016#ifdef TE_PE
1017
1018/* Various sections that we need for PE coff support. */
1019static segT ydata_section;
1020static segT pdata_section;
1021static segT reldata_section;
1022static segT rdata_section;
1023static segT tocdata_section;
1024
81d4177b 1025/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1026static segT ppc_previous_section;
1027static segT ppc_current_section;
1028
1029#endif /* TE_PE */
1030
1031#ifdef OBJ_ELF
1032symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1033#define PPC_APUINFO_ISEL 0x40
1034#define PPC_APUINFO_PMR 0x41
1035#define PPC_APUINFO_RFMCI 0x42
1036#define PPC_APUINFO_CACHELCK 0x43
1037#define PPC_APUINFO_SPE 0x100
1038#define PPC_APUINFO_EFS 0x101
1039#define PPC_APUINFO_BRLOCK 0x102
1040
b34976b6
AM		 1041/*
1042 * We keep a list of APUinfo
6a0c61b7
EZ		 1043 */
1044unsigned long *ppc_apuinfo_list;
1045unsigned int ppc_apuinfo_num;
1046unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1047#endif /* OBJ_ELF */
1048\f
1049#ifdef OBJ_ELF
15c1449b 1050const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1051#else
15c1449b 1052const char *const md_shortopts = "um:";
252b5132 1053#endif
cef4f754 1054#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1055const struct option md_longopts[] = {
cef4f754 1056 {"nops", required_argument, NULL, OPTION_NOPS},
252b5132
RH		 1057 {NULL, no_argument, NULL, 0}
1058};
15c1449b 1059const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1060
1061int
98027b10 1062md_parse_option (int c, char *arg)
252b5132 1063{
69fe9ce5
AM		 1064 ppc_cpu_t new_cpu;
1065
252b5132
RH		 1066 switch (c)
1067 {
1068 case 'u':
1069 /* -u means that any undefined symbols should be treated as
1070 external, which is the default for gas anyhow. */
1071 break;
1072
1073#ifdef OBJ_ELF
1074 case 'l':
1075 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1076 sake, recognize -be also. */
252b5132
RH		 1077 if (strcmp (arg, "e") == 0)
1078 {
1079 target_big_endian = 0;
1080 set_target_endian = 1;
1081 }
1082 else
1083 return 0;
1084
1085 break;
1086
1087 case 'b':
1088 if (strcmp (arg, "e") == 0)
1089 {
1090 target_big_endian = 1;
1091 set_target_endian = 1;
1092 }
1093 else
1094 return 0;
1095
1096 break;
1097
1098 case 'K':
99a814a1 1099 /* Recognize -K PIC. */
252b5132
RH		 1100 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1101 {
1102 shlib = SHLIB_PIC;
1103 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1104 }
1105 else
1106 return 0;
1107
1108 break;
1109#endif
1110
7f6d05e8
CP		 1111 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1112 case 'a':
1113 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1114 {
1115#ifdef BFD64
1116 ppc_obj64 = 1;
1117#else
1118 as_fatal (_("%s unsupported"), "-a64");
1119#endif
1120 }
7f6d05e8 1121 else if (strcmp (arg, "32") == 0)
2b3c4602 1122 ppc_obj64 = 0;
7f6d05e8
CP		 1123 else
1124 return 0;
1125 break;
81d4177b 1126
252b5132 1127 case 'm':
69fe9ce5
AM		 1128 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1129 ppc_cpu = new_cpu;
252b5132
RH		 1130
1131 else if (strcmp (arg, "regnames") == 0)
b34976b6 1132 reg_names_p = TRUE;
252b5132
RH		 1133
1134 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1135 reg_names_p = FALSE;
252b5132
RH		 1136
1137#ifdef OBJ_ELF
99a814a1
AM		 1138 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1139 that require relocation. */
252b5132
RH		 1140 else if (strcmp (arg, "relocatable") == 0)
1141 {
5d6f4f16 1142 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1143 ppc_flags |= EF_PPC_RELOCATABLE;
1144 }
1145
1146 else if (strcmp (arg, "relocatable-lib") == 0)
1147 {
5d6f4f16 1148 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1149 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1150 }
1151
99a814a1 1152 /* -memb, set embedded bit. */
252b5132
RH		 1153 else if (strcmp (arg, "emb") == 0)
1154 ppc_flags |= EF_PPC_EMB;
1155
99a814a1
AM		 1156 /* -mlittle/-mbig set the endianess. */
1157 else if (strcmp (arg, "little") == 0
1158 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1159 {
1160 target_big_endian = 0;
1161 set_target_endian = 1;
1162 }
1163
1164 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1165 {
1166 target_big_endian = 1;
1167 set_target_endian = 1;
1168 }
1169
1170 else if (strcmp (arg, "solaris") == 0)
1171 {
b34976b6 1172 msolaris = TRUE;
252b5132
RH		 1173 ppc_comment_chars = ppc_solaris_comment_chars;
1174 }
1175
1176 else if (strcmp (arg, "no-solaris") == 0)
1177 {
b34976b6 1178 msolaris = FALSE;
252b5132
RH		 1179 ppc_comment_chars = ppc_eabi_comment_chars;
1180 }
1181#endif
1182 else
1183 {
1184 as_bad (_("invalid switch -m%s"), arg);
1185 return 0;
1186 }
1187 break;
1188
1189#ifdef OBJ_ELF
1190 /* -V: SVR4 argument to print version ID. */
1191 case 'V':
1192 print_version_id ();
1193 break;
1194
1195 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1196 should be emitted or not. FIXME: Not implemented. */
1197 case 'Q':
1198 break;
1199
1200 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1201 rather than .stabs.excl, which is ignored by the linker.
1202 FIXME: Not implemented. */
1203 case 's':
1204 if (arg)
1205 return 0;
1206
1207 break;
1208#endif
1209
cef4f754
AM		 1210 case OPTION_NOPS:
1211 {
1212 char *end;
1213 nop_limit = strtoul (optarg, &end, 0);
1214 if (*end)
1215 as_bad (_("--nops needs a numeric argument"));
1216 }
1217 break;
85645aed 1218
252b5132
RH		 1219 default:
1220 return 0;
1221 }
1222
1223 return 1;
1224}
1225
1226void
98027b10 1227md_show_usage (FILE *stream)
252b5132 1228{
bc805888 1229 fprintf (stream, _("\
252b5132 1230PowerPC options:\n\
ce3d2015
AM		 1231-a32 generate ELF32/XCOFF32\n\
1232-a64 generate ELF64/XCOFF64\n\
1233-u ignored\n\
1234-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1235-mpwr generate code for POWER (RIOS1)\n\
1236-m601 generate code for PowerPC 601\n\
418c1742 1237-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1238 generate code for PowerPC 603/604\n\
1239-m403 generate code for PowerPC 403\n\
1240-m405 generate code for PowerPC 405\n\
1241-m440 generate code for PowerPC 440\n\
1242-m464 generate code for PowerPC 464\n\
1243-m476 generate code for PowerPC 476\n\
f5c120c5 1244-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1245 generate code for PowerPC 7400/7410/7450/7455\n\
1246-m750cl generate code for PowerPC 750cl\n"));
df12615d 1247 fprintf (stream, _("\
ce3d2015
AM		 1248-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1249-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1250-mbooke generate code for 32-bit PowerPC BookE\n\
1251-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1252-mpower4, -mpwr4 generate code for Power4 architecture\n\
1253-mpower5, -mpwr5, -mpwr5x\n\
1254 generate code for Power5 architecture\n\
1255-mpower6, -mpwr6 generate code for Power6 architecture\n\
1256-mpower7, -mpwr7 generate code for Power7 architecture\n\
ce3d2015
AM		 1257-mcell generate code for Cell Broadband Engine architecture\n\
1258-mcom generate code Power/PowerPC common instructions\n\
1259-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1260 fprintf (stream, _("\
ce3d2015
AM		 1261-maltivec generate code for AltiVec\n\
1262-mvsx generate code for Vector-Scalar (VSX) instructions\n\
1263-me300 generate code for PowerPC e300 family\n\
1264-me500, -me500x2 generate code for Motorola e500 core complex\n\
1265-me500mc, generate code for Freescale e500mc core complex\n\
1266-me500mc64, generate code for Freescale e500mc64 core complex\n\
1267-mspe generate code for Motorola SPE instructions\n\
1268-mtitan generate code for AppliedMicro Titan core complex\n\
1269-mregnames Allow symbolic names for registers\n\
1270-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1271#ifdef OBJ_ELF
bc805888 1272 fprintf (stream, _("\
ce3d2015
AM		 1273-mrelocatable support for GCC's -mrelocatble option\n\
1274-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1275-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1276-mlittle, -mlittle-endian, -le\n\
ce3d2015 1277 generate code for a little endian machine\n\
b8b738ac 1278-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1279 generate code for a big endian machine\n\
1280-msolaris generate code for Solaris\n\
1281-mno-solaris do not generate code for Solaris\n\
b8b738ac 1282-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1283-V print assembler version number\n\
1284-Qy, -Qn ignored\n"));
252b5132 1285#endif
cef4f754
AM		 1286 fprintf (stream, _("\
1287-nops=count when aligning, more than COUNT nops uses a branch\n"));
252b5132
RH		 1288}
1289\f
1290/* Set ppc_cpu if it is not already set. */
1291
1292static void
98027b10 1293ppc_set_cpu (void)
252b5132
RH		 1294{
1295 const char *default_os = TARGET_OS;
1296 const char *default_cpu = TARGET_CPU;
1297
7102e95e 1298 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1299 {
2a98c3a6 1300 if (ppc_obj64)
bdc70b4a 1301 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1302 else if (strncmp (default_os, "aix", 3) == 0
1303 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1304 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1305 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1306 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1307 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1308 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1309 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1310 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1311 else
99a814a1
AM		 1312 as_fatal (_("Unknown default cpu = %s, os = %s"),
1313 default_cpu, default_os);
252b5132
RH		 1314 }
1315}
1316
9232bbb0
AM		 1317/* Figure out the BFD architecture to use. This function and ppc_mach
1318 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1319
1320enum bfd_architecture
98027b10 1321ppc_arch (void)
252b5132
RH		 1322{
1323 const char *default_cpu = TARGET_CPU;
1324 ppc_set_cpu ();
1325
1326 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1327 return bfd_arch_powerpc;
1328 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1329 return bfd_arch_rs6000;
1330 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1331 {
1332 if (strcmp (default_cpu, "rs6000") == 0)
1333 return bfd_arch_rs6000;
0baf16f2 1334 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1335 return bfd_arch_powerpc;
1336 }
1337
1338 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1339 return bfd_arch_unknown;
1340}
1341
7f6d05e8 1342unsigned long
98027b10 1343ppc_mach (void)
7f6d05e8 1344{
2a98c3a6
AM		 1345 if (ppc_obj64)
1346 return bfd_mach_ppc64;
1347 else if (ppc_arch () == bfd_arch_rs6000)
1348 return bfd_mach_rs6k;
ce3d2015
AM		 1349 else if (ppc_cpu & PPC_OPCODE_TITAN)
1350 return bfd_mach_ppc_titan;
2a98c3a6
AM		 1351 else
1352 return bfd_mach_ppc;
7f6d05e8
CP		 1353}
1354
81d4177b 1355extern char*
98027b10 1356ppc_target_format (void)
7f6d05e8
CP		 1357{
1358#ifdef OBJ_COFF
1359#ifdef TE_PE
99a814a1 1360 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1361#elif TE_POWERMAC
0baf16f2 1362 return "xcoff-powermac";
7f6d05e8 1363#else
eb1e0e80 1364# ifdef TE_AIX5
2b3c4602 1365 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1366# else
2b3c4602 1367 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1368# endif
7f6d05e8 1369#endif
7f6d05e8
CP		 1370#endif
1371#ifdef OBJ_ELF
9d8504b1
PB		 1372# ifdef TE_VXWORKS
1373 return "elf32-powerpc-vxworks";
1374# else
0baf16f2 1375 return (target_big_endian
2b3c4602
AM		 1376 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1377 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1378# endif
7f6d05e8
CP		 1379#endif
1380}
1381
69c040df
AM		 1382/* Insert opcodes and macros into hash tables. Called at startup and
1383 for .cpu pseudo. */
252b5132 1384
69c040df
AM		 1385static void
1386ppc_setup_opcodes (void)
252b5132 1387{
98027b10 1388 const struct powerpc_opcode *op;
252b5132
RH		 1389 const struct powerpc_opcode *op_end;
1390 const struct powerpc_macro *macro;
1391 const struct powerpc_macro *macro_end;
b84bf58a 1392 bfd_boolean bad_insn = FALSE;
252b5132 1393
69c040df
AM		 1394 if (ppc_hash != NULL)
1395 hash_die (ppc_hash);
1396 if (ppc_macro_hash != NULL)
1397 hash_die (ppc_macro_hash);
252b5132
RH		 1398
1399 /* Insert the opcodes into a hash table. */
1400 ppc_hash = hash_new ();
1401
c43a438d 1402 if (ENABLE_CHECKING)
b84bf58a 1403 {
c43a438d 1404 unsigned int i;
b84bf58a 1405
c43a438d
AM		 1406 /* Check operand masks. Code here and in the disassembler assumes
1407 all the 1's in the mask are contiguous. */
1408 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1409 {
c43a438d
AM		 1410 unsigned long mask = powerpc_operands[i].bitm;
1411 unsigned long right_bit;
1412 unsigned int j;
1413
1414 right_bit = mask & -mask;
1415 mask += right_bit;
1416 right_bit = mask & -mask;
1417 if (mask != right_bit)
1418 {
1419 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1420 bad_insn = TRUE;
1421 }
1422 for (j = i + 1; j < num_powerpc_operands; ++j)
1423 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1424 sizeof (powerpc_operands[0])) == 0)
1425 {
1426 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1427 j, i);
1428 bad_insn = TRUE;
1429 }
b84bf58a
AM		 1430 }
1431 }
1432
252b5132
RH		 1433 op_end = powerpc_opcodes + powerpc_num_opcodes;
1434 for (op = powerpc_opcodes; op < op_end; op++)
1435 {
c43a438d 1436 if (ENABLE_CHECKING)
b84bf58a 1437 {
c43a438d
AM		 1438 const unsigned char *o;
1439 unsigned long omask = op->mask;
8dbcd839 1440
d815f1a9 1441 if (op != powerpc_opcodes)
8dbcd839 1442 {
d815f1a9
AM		 1443 /* The major opcodes had better be sorted. Code in the
1444 disassembler assumes the insns are sorted according to
1445 major opcode. */
1446 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1447 {
1448 as_bad (_("major opcode is not sorted for %s"),
1449 op->name);
1450 bad_insn = TRUE;
1451 }
1452
1453 /* Warn if the table isn't more strictly ordered.
1454 Unfortunately it doesn't seem possible to order the
1455 table on much more than the major opcode, which makes
1456 it difficult to implement a binary search in the
1457 disassembler. The problem is that we have multiple
1458 ways to disassemble instructions, and we usually want
1459 to choose a more specific form (with more bits set in
1460 the opcode) than a more general form. eg. all of the
1461 following are equivalent:
1462 bne label # opcode = 0x40820000, mask = 0xff830003
1463 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1464 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1465
1466 There are also cases where the table needs to be out
1467 of order to disassemble the correct instruction for
2f3bb96a 1468 processor variants. */
d815f1a9
AM		 1469 else if (0)
1470 {
1471 unsigned long t1 = op[0].opcode;
1472 unsigned long t2 = op[-1].opcode;
1473
1474 if (((t1 ^ t2) & 0xfc0007ff) == 0
1475 && (t1 & 0xfc0006df) == 0x7c000286)
1476 {
1477 /* spr field is split. */
1478 t1 = ((t1 & ~0x1ff800)
1479 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1480 t2 = ((t2 & ~0x1ff800)
1481 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1482 }
1483 if (t1 < t2)
1484 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1485 op[0].name, op[0].opcode, op[0].mask,
1486 op[-1].name, op[-1].opcode, op[-1].mask);
1487 }
8dbcd839 1488 }
c43a438d
AM		 1489
1490 /* The mask had better not trim off opcode bits. */
1491 if ((op->opcode & omask) != op->opcode)
1492 {
1493 as_bad (_("mask trims opcode bits for %s"),
1494 op->name);
1495 bad_insn = TRUE;
1496 }
1497
1498 /* The operands must not overlap the opcode or each other. */
1499 for (o = op->operands; *o; ++o)
1500 if (*o >= num_powerpc_operands)
1501 {
1502 as_bad (_("operand index error for %s"),
1503 op->name);
1504 bad_insn = TRUE;
1505 }
1506 else
b84bf58a 1507 {
c43a438d
AM		 1508 const struct powerpc_operand *operand = &powerpc_operands[*o];
1509 if (operand->shift >= 0)
b84bf58a 1510 {
c43a438d
AM		 1511 unsigned long mask = operand->bitm << operand->shift;
1512 if (omask & mask)
1513 {
1514 as_bad (_("operand %d overlap in %s"),
1515 (int) (o - op->operands), op->name);
1516 bad_insn = TRUE;
1517 }
1518 omask |= mask;
b84bf58a 1519 }
b84bf58a 1520 }
c43a438d 1521 }
252b5132 1522
bdc70b4a 1523 if ((ppc_cpu & op->flags) != 0
1cb0a767 1524 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1525 {
1526 const char *retval;
1527
98027b10 1528 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1529 if (retval != NULL)
252b5132 1530 {
b84bf58a 1531 as_bad (_("duplicate instruction %s"),
99a814a1 1532 op->name);
b84bf58a 1533 bad_insn = TRUE;
252b5132
RH		 1534 }
1535 }
1536 }
1537
3c9030c1
AM		 1538 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1539 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1540 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1541
252b5132
RH		 1542 /* Insert the macros into a hash table. */
1543 ppc_macro_hash = hash_new ();
1544
1545 macro_end = powerpc_macros + powerpc_num_macros;
1546 for (macro = powerpc_macros; macro < macro_end; macro++)
1547 {
33740db9 1548 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1549 {
1550 const char *retval;
1551
98027b10 1552 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1553 if (retval != (const char *) NULL)
1554 {
b84bf58a
AM		 1555 as_bad (_("duplicate macro %s"), macro->name);
1556 bad_insn = TRUE;
252b5132
RH		 1557 }
1558 }
1559 }
1560
b84bf58a 1561 if (bad_insn)
252b5132 1562 abort ();
69c040df
AM		 1563}
1564
1565/* This function is called when the assembler starts up. It is called
1566 after the options have been parsed and the output file has been
1567 opened. */
1568
1569void
98027b10 1570md_begin (void)
69c040df
AM		 1571{
1572 ppc_set_cpu ();
1573
1574 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1575
1576#ifdef OBJ_ELF
1577 /* Set the ELF flags if desired. */
1578 if (ppc_flags && !msolaris)
1579 bfd_set_private_flags (stdoutput, ppc_flags);
1580#endif
1581
1582 ppc_setup_opcodes ();
252b5132 1583
67c1ffbe 1584 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1585 by the user. */
252b5132
RH		 1586 if (!set_target_endian)
1587 {
1588 set_target_endian = 1;
1589 target_big_endian = PPC_BIG_ENDIAN;
1590 }
1591
1592#ifdef OBJ_XCOFF
1593 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1594
1595 /* Create dummy symbols to serve as initial csects. This forces the
1596 text csects to precede the data csects. These symbols will not
1597 be output. */
1598 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1599 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1600 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1601 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1602#endif
1603
1604#ifdef TE_PE
1605
1606 ppc_current_section = text_section;
81d4177b 1607 ppc_previous_section = 0;
252b5132
RH		 1608
1609#endif
1610}
1611
6a0c61b7 1612void
98027b10 1613ppc_cleanup (void)
6a0c61b7 1614{
dc1d03fc 1615#ifdef OBJ_ELF
6a0c61b7
EZ		 1616 if (ppc_apuinfo_list == NULL)
1617 return;
1618
1619 /* Ok, so write the section info out. We have this layout:
1620
1621 byte data what
1622 ---- ---- ----
1623 0 8 length of "APUinfo\0"
1624 4 (n*4) number of APU's (4 bytes each)
1625 8 2 note type 2
1626 12 "APUinfo\0" name
1627 20 APU#1 first APU's info
1628 24 APU#2 second APU's info
1629 ... ...
1630 */
1631 {
1632 char *p;
1633 asection *seg = now_seg;
1634 subsegT subseg = now_subseg;
1635 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1636 unsigned int i;
6a0c61b7
EZ		 1637
1638 /* Create the .PPC.EMB.apuinfo section. */
1639 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1640 bfd_set_section_flags (stdoutput,
1641 apuinfo_secp,
e1a9cb8e 1642 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1643
1644 p = frag_more (4);
1645 md_number_to_chars (p, (valueT) 8, 4);
1646
1647 p = frag_more (4);
e98d298c 1648 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1649
1650 p = frag_more (4);
1651 md_number_to_chars (p, (valueT) 2, 4);
1652
1653 p = frag_more (8);
1654 strcpy (p, "APUinfo");
1655
1656 for (i = 0; i < ppc_apuinfo_num; i++)
1657 {
b34976b6
AM		 1658 p = frag_more (4);
1659 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1660 }
1661
1662 frag_align (2, 0, 0);
1663
1664 /* We probably can't restore the current segment, for there likely
1665 isn't one yet... */
1666 if (seg && subseg)
1667 subseg_set (seg, subseg);
1668 }
dc1d03fc 1669#endif
6a0c61b7
EZ		 1670}
1671
252b5132
RH		 1672/* Insert an operand value into an instruction. */
1673
1674static unsigned long
a1867a27
AM		 1675ppc_insert_operand (unsigned long insn,
1676 const struct powerpc_operand *operand,
1677 offsetT val,
91d6fa6a 1678 ppc_cpu_t cpu,
a1867a27
AM		 1679 char *file,
1680 unsigned int line)
252b5132 1681{
b84bf58a 1682 long min, max, right;
eb42fac1 1683
b84bf58a
AM		 1684 max = operand->bitm;
1685 right = max & -max;
1686 min = 0;
1687
1688 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1689 {
b84bf58a 1690 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1691 max = (max >> 1) & -right;
1692 min = ~max & -right;
b84bf58a 1693 }
252b5132 1694
b84bf58a 1695 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1696 max++;
252b5132 1697
b84bf58a 1698 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1699 {
1700 long tmp = min;
1701 min = -max;
1702 max = -tmp;
1703 }
b84bf58a 1704
a1867a27
AM		 1705 if (min <= max)
1706 {
1707 /* Some people write constants with the sign extension done by
1708 hand but only up to 32 bits. This shouldn't really be valid,
1709 but, to permit this code to assemble on a 64-bit host, we
1710 sign extend the 32-bit value to 64 bits if so doing makes the
1711 value valid. */
1712 if (val > max
1713 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1714 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1715 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1716 val = val - 0x80000000 - 0x80000000;
1717
1718 /* Similarly, people write expressions like ~(1<<15), and expect
1719 this to be OK for a 32-bit unsigned value. */
1720 else if (val < min
1721 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1722 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1723 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1724 val = val + 0x80000000 + 0x80000000;
1725
1726 else if (val < min
1727 || val > max
1728 || (val & (right - 1)) != 0)
1729 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1730 }
b84bf58a 1731
252b5132
RH		 1732 if (operand->insert)
1733 {
1734 const char *errmsg;
1735
1736 errmsg = NULL;
91d6fa6a 1737 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1738 if (errmsg != (const char *) NULL)
ee2c9aa9 1739 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1740 }
1741 else
b84bf58a 1742 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1743
1744 return insn;
1745}
1746
1747\f
1748#ifdef OBJ_ELF
1749/* Parse @got, etc. and return the desired relocation. */
1750static bfd_reloc_code_real_type
98027b10 1751ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1752{
1753 struct map_bfd {
1754 char *string;
b7d7dc63
AM		 1755 unsigned int length : 8;
1756 unsigned int valid32 : 1;
1757 unsigned int valid64 : 1;
1758 unsigned int reloc;
252b5132
RH		 1759 };
1760
1761 char ident[20];
1762 char *str = *str_p;
1763 char *str2;
1764 int ch;
1765 int len;
15c1449b 1766 const struct map_bfd *ptr;
252b5132 1767
b7d7dc63
AM		 1768#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1769#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1770#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1771
15c1449b 1772 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1773 MAP ("l", BFD_RELOC_LO16),
1774 MAP ("h", BFD_RELOC_HI16),
1775 MAP ("ha", BFD_RELOC_HI16_S),
1776 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1777 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1778 MAP ("got", BFD_RELOC_16_GOTOFF),
1779 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1780 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1781 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1782 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1783 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1784 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1785 MAP ("copy", BFD_RELOC_PPC_COPY),
1786 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1787 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1788 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1789 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1790 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1791 MAP ("tls", BFD_RELOC_PPC_TLS),
1792 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1793 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1794 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1795 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1796 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1797 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1798 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1799 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1800 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1801 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1802 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1803 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1804 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1805 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1806 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1807 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1808 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1809 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1810 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1811 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1812 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1813 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1814 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1815 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1816 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1817 MAP32 ("fixup", BFD_RELOC_CTOR),
1818 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1819 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1820 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1821 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1822 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1823 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1824 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1825 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1826 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1827 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1828 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1829 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1830 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1831 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1832 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1833 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1834 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1835 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1836 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1837 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1838 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1839 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1840 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1841 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1842 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1843 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1844 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1845 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1846 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1847 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1848 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1849 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1850 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1851 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1852 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1853 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1854 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1855 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1856 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1857 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1858 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1859 };
1860
1861 if (*str++ != '@')
1862 return BFD_RELOC_UNUSED;
1863
1864 for (ch = *str, str2 = ident;
1865 (str2 < ident + sizeof (ident) - 1
3882b010 1866 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1867 ch = *++str)
1868 {
3882b010 1869 *str2++ = TOLOWER (ch);
252b5132
RH		 1870 }
1871
1872 *str2 = '\0';
1873 len = str2 - ident;
1874
1875 ch = ident[0];
1876 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1877 if (ch == ptr->string[0]
1878 && len == ptr->length
b7d7dc63
AM		 1879 && memcmp (ident, ptr->string, ptr->length) == 0
1880 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1881 {
15c1449b
AM		 1882 int reloc = ptr->reloc;
1883
727fc41e
AM		 1884 if (!ppc_obj64 && exp_p->X_add_number != 0)
1885 {
1886 switch (reloc)
1887 {
1888 case BFD_RELOC_16_GOTOFF:
1889 case BFD_RELOC_LO16_GOTOFF:
1890 case BFD_RELOC_HI16_GOTOFF:
1891 case BFD_RELOC_HI16_S_GOTOFF:
1892 as_warn (_("identifier+constant@got means "
1893 "identifier@got+constant"));
1894 break;
1895
1896 case BFD_RELOC_PPC_GOT_TLSGD16:
1897 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1898 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1899 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1900 case BFD_RELOC_PPC_GOT_TLSLD16:
1901 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1902 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1903 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1904 case BFD_RELOC_PPC_GOT_DTPREL16:
1905 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1906 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1907 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1908 case BFD_RELOC_PPC_GOT_TPREL16:
1909 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1910 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1911 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1912 as_bad (_("symbol+offset not supported for got tls"));
1913 break;
1914 }
1915 }
5f6db75a
AM		 1916
1917 /* Now check for identifier@suffix+constant. */
1918 if (*str == '-' || *str == '+')
252b5132 1919 {
5f6db75a
AM		 1920 char *orig_line = input_line_pointer;
1921 expressionS new_exp;
1922
1923 input_line_pointer = str;
1924 expression (&new_exp);
1925 if (new_exp.X_op == O_constant)
252b5132 1926 {
5f6db75a
AM		 1927 exp_p->X_add_number += new_exp.X_add_number;
1928 str = input_line_pointer;
252b5132 1929 }
5f6db75a
AM		 1930
1931 if (&input_line_pointer != str_p)
1932 input_line_pointer = orig_line;
252b5132 1933 }
252b5132 1934 *str_p = str;
0baf16f2 1935
2b3c4602 1936 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1937 && exp_p->X_op == O_symbol
1938 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1939 {
9f2b53d7
AM		 1940 /* Change the symbol so that the dummy .TOC. symbol can be
1941 omitted from the object file. */
0baf16f2
AM		 1942 exp_p->X_add_symbol = &abs_symbol;
1943 }
1944
15c1449b 1945 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1946 }
1947
1948 return BFD_RELOC_UNUSED;
1949}
1950
99a814a1
AM		 1951/* Like normal .long/.short/.word, except support @got, etc.
1952 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1953static void
98027b10 1954ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1955{
1956 expressionS exp;
1957 bfd_reloc_code_real_type reloc;
1958
1959 if (is_it_end_of_statement ())
1960 {
1961 demand_empty_rest_of_line ();
1962 return;
1963 }
1964
1965 do
1966 {
1967 expression (&exp);
1968 if (exp.X_op == O_symbol
1969 && *input_line_pointer == '@'
99a814a1
AM		 1970 && (reloc = ppc_elf_suffix (&input_line_pointer,
1971 &exp)) != BFD_RELOC_UNUSED)
252b5132 1972 {
99a814a1
AM		 1973 reloc_howto_type *reloc_howto;
1974 int size;
1975
1976 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1977 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1978
1979 if (size > nbytes)
0baf16f2
AM		 1980 {
1981 as_bad (_("%s relocations do not fit in %d bytes\n"),
1982 reloc_howto->name, nbytes);
1983 }
252b5132
RH		 1984 else
1985 {
0baf16f2
AM		 1986 char *p;
1987 int offset;
252b5132 1988
0baf16f2 1989 p = frag_more (nbytes);
aa0c8c1a 1990 memset (p, 0, nbytes);
0baf16f2
AM		 1991 offset = 0;
1992 if (target_big_endian)
1993 offset = nbytes - size;
99a814a1
AM		 1994 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1995 &exp, 0, reloc);
252b5132
RH		 1996 }
1997 }
1998 else
1999 emit_expr (&exp, (unsigned int) nbytes);
2000 }
2001 while (*input_line_pointer++ == ',');
2002
99a814a1
AM		 2003 /* Put terminator back into stream. */
2004 input_line_pointer--;
252b5132
RH		 2005 demand_empty_rest_of_line ();
2006}
2007
2008/* Solaris pseduo op to change to the .rodata section. */
2009static void
98027b10 2010ppc_elf_rdata (int xxx)
252b5132
RH		 2011{
2012 char *save_line = input_line_pointer;
2013 static char section[] = ".rodata\n";
2014
99a814a1 2015 /* Just pretend this is .section .rodata */
252b5132
RH		 2016 input_line_pointer = section;
2017 obj_elf_section (xxx);
2018
2019 input_line_pointer = save_line;
2020}
2021
99a814a1 2022/* Pseudo op to make file scope bss items. */
252b5132 2023static void
98027b10 2024ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2025{
98027b10
AM		 2026 char *name;
2027 char c;
2028 char *p;
252b5132 2029 offsetT size;
98027b10 2030 symbolS *symbolP;
252b5132
RH		 2031 offsetT align;
2032 segT old_sec;
2033 int old_subsec;
2034 char *pfrag;
2035 int align2;
2036
2037 name = input_line_pointer;
2038 c = get_symbol_end ();
2039
99a814a1 2040 /* just after name is now '\0'. */
252b5132
RH		 2041 p = input_line_pointer;
2042 *p = c;
2043 SKIP_WHITESPACE ();
2044 if (*input_line_pointer != ',')
2045 {
2046 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
2047 ignore_rest_of_line ();
2048 return;
2049 }
2050
2051 input_line_pointer++; /* skip ',' */
2052 if ((size = get_absolute_expression ()) < 0)
2053 {
2054 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2055 ignore_rest_of_line ();
2056 return;
2057 }
2058
2059 /* The third argument to .lcomm is the alignment. */
2060 if (*input_line_pointer != ',')
2061 align = 8;
2062 else
2063 {
2064 ++input_line_pointer;
2065 align = get_absolute_expression ();
2066 if (align <= 0)
2067 {
2068 as_warn (_("ignoring bad alignment"));
2069 align = 8;
2070 }
2071 }
2072
2073 *p = 0;
2074 symbolP = symbol_find_or_make (name);
2075 *p = c;
2076
2077 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2078 {
2079 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2080 S_GET_NAME (symbolP));
2081 ignore_rest_of_line ();
2082 return;
2083 }
2084
2085 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2086 {
2087 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2088 S_GET_NAME (symbolP),
2089 (long) S_GET_VALUE (symbolP),
2090 (long) size);
2091
2092 ignore_rest_of_line ();
2093 return;
2094 }
2095
99a814a1 2096 /* Allocate_bss. */
252b5132
RH		 2097 old_sec = now_seg;
2098 old_subsec = now_subseg;
2099 if (align)
2100 {
99a814a1 2101 /* Convert to a power of 2 alignment. */
252b5132
RH		 2102 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2103 if (align != 1)
2104 {
2105 as_bad (_("Common alignment not a power of 2"));
2106 ignore_rest_of_line ();
2107 return;
2108 }
2109 }
2110 else
2111 align2 = 0;
2112
2113 record_alignment (bss_section, align2);
2114 subseg_set (bss_section, 0);
2115 if (align2)
2116 frag_align (align2, 0, 0);
2117 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2118 symbol_get_frag (symbolP)->fr_symbol = 0;
2119 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2120 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2121 (char *) 0);
2122 *pfrag = 0;
2123 S_SET_SIZE (symbolP, size);
2124 S_SET_SEGMENT (symbolP, bss_section);
2125 subseg_set (old_sec, old_subsec);
2126 demand_empty_rest_of_line ();
2127}
2128
2129/* Validate any relocations emitted for -mrelocatable, possibly adding
2130 fixups for word relocations in writable segments, so we can adjust
2131 them at runtime. */
2132static void
98027b10 2133ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2134{
2135 if (fixp->fx_done || fixp->fx_pcrel)
2136 return;
2137
2138 switch (shlib)
2139 {
2140 case SHLIB_NONE:
2141 case SHLIB_PIC:
2142 return;
2143
5d6f4f16 2144 case SHLIB_MRELOCATABLE:
252b5132
RH		 2145 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2146 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2147 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2148 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2149 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2150 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2151 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2152 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2153 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2154 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2155 && strcmp (segment_name (seg), ".got2") != 0
2156 && strcmp (segment_name (seg), ".dtors") != 0
2157 && strcmp (segment_name (seg), ".ctors") != 0
2158 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2159 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2160 && strcmp (segment_name (seg), ".eh_frame") != 0
2161 && strcmp (segment_name (seg), ".ex_shared") != 0)
2162 {
2163 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2164 || fixp->fx_r_type != BFD_RELOC_CTOR)
2165 {
2166 as_bad_where (fixp->fx_file, fixp->fx_line,
2167 _("Relocation cannot be done when using -mrelocatable"));
2168 }
2169 }
2170 return;
2171 }
2172}
0baf16f2 2173
7e8d4ab4
AM		 2174/* Prevent elf_frob_file_before_adjust removing a weak undefined
2175 function descriptor sym if the corresponding code sym is used. */
2176
2177void
98027b10 2178ppc_frob_file_before_adjust (void)
0baf16f2 2179{
7e8d4ab4 2180 symbolS *symp;
9232bbb0 2181 asection *toc;
0baf16f2 2182
7e8d4ab4
AM		 2183 if (!ppc_obj64)
2184 return;
2185
2186 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2187 {
7e8d4ab4
AM		 2188 const char *name;
2189 char *dotname;
2190 symbolS *dotsym;
2191 size_t len;
2192
2193 name = S_GET_NAME (symp);
2194 if (name[0] == '.')
2195 continue;
2196
2197 if (! S_IS_WEAK (symp)
2198 || S_IS_DEFINED (symp))
2199 continue;
2200
2201 len = strlen (name) + 1;
2202 dotname = xmalloc (len + 1);
2203 dotname[0] = '.';
2204 memcpy (dotname + 1, name, len);
461b725f 2205 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2206 free (dotname);
2207 if (dotsym != NULL && (symbol_used_p (dotsym)
2208 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2209 symbol_mark_used (symp);
2210
0baf16f2
AM		 2211 }
2212
9232bbb0
AM		 2213 toc = bfd_get_section_by_name (stdoutput, ".toc");
2214 if (toc != NULL
01efc3af 2215 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2216 && bfd_section_size (stdoutput, toc) > 0x10000)
2217 as_warn (_("TOC section size exceeds 64k"));
2218
7e8d4ab4
AM		 2219 /* Don't emit .TOC. symbol. */
2220 symp = symbol_find (".TOC.");
2221 if (symp != NULL)
2222 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2223}
252b5132
RH		 2224#endif /* OBJ_ELF */
2225\f
2226#ifdef TE_PE
2227
2228/*
99a814a1 2229 * Summary of parse_toc_entry.
252b5132
RH		 2230 *
2231 * in: Input_line_pointer points to the '[' in one of:
2232 *
2233 * [toc] [tocv] [toc32] [toc64]
2234 *
2235 * Anything else is an error of one kind or another.
2236 *
81d4177b 2237 * out:
252b5132
RH		 2238 * return value: success or failure
2239 * toc_kind: kind of toc reference
2240 * input_line_pointer:
2241 * success: first char after the ']'
2242 * failure: unchanged
2243 *
2244 * settings:
2245 *
2246 * [toc] - rv == success, toc_kind = default_toc
2247 * [tocv] - rv == success, toc_kind = data_in_toc
2248 * [toc32] - rv == success, toc_kind = must_be_32
2249 * [toc64] - rv == success, toc_kind = must_be_64
2250 *
2251 */
2252
81d4177b
KH		 2253enum toc_size_qualifier
2254{
252b5132
RH		 2255 default_toc, /* The toc cell constructed should be the system default size */
2256 data_in_toc, /* This is a direct reference to a toc cell */
2257 must_be_32, /* The toc cell constructed must be 32 bits wide */
2258 must_be_64 /* The toc cell constructed must be 64 bits wide */
2259};
2260
2261static int
98027b10 2262parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2263{
2264 char *start;
2265 char *toc_spec;
2266 char c;
2267 enum toc_size_qualifier t;
2268
99a814a1 2269 /* Save the input_line_pointer. */
252b5132
RH		 2270 start = input_line_pointer;
2271
99a814a1 2272 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2273 ++input_line_pointer;
2274 SKIP_WHITESPACE ();
81d4177b 2275
99a814a1 2276 /* Find the spelling of the operand. */
252b5132
RH		 2277 toc_spec = input_line_pointer;
2278 c = get_symbol_end ();
2279
99a814a1 2280 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2281 {
2282 t = default_toc;
2283 }
99a814a1 2284 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2285 {
2286 t = data_in_toc;
2287 }
99a814a1 2288 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2289 {
2290 t = must_be_32;
2291 }
99a814a1 2292 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2293 {
2294 t = must_be_64;
2295 }
2296 else
2297 {
2298 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2299 *input_line_pointer = c;
2300 input_line_pointer = start;
252b5132
RH		 2301 return 0;
2302 }
2303
99a814a1
AM		 2304 /* Now find the ']'. */
2305 *input_line_pointer = c;
252b5132 2306
81d4177b
KH		 2307 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2308 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2309
2310 if (c != ']')
2311 {
2312 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2313 input_line_pointer = start;
252b5132
RH		 2314 return 0;
2315 }
2316
99a814a1 2317 *toc_kind = t;
252b5132
RH		 2318 return 1;
2319}
2320#endif
2321\f
2322
dc1d03fc 2323#ifdef OBJ_ELF
6a0c61b7
EZ		 2324#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2325static void
98027b10 2326ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2327{
2328 unsigned int i;
2329
2330 /* Check we don't already exist. */
2331 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2332 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2333 return;
b34976b6 2334
6a0c61b7
EZ		 2335 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2336 {
2337 if (ppc_apuinfo_num_alloc == 0)
2338 {
2339 ppc_apuinfo_num_alloc = 4;
2340 ppc_apuinfo_list = (unsigned long *)
2341 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2342 }
2343 else
2344 {
2345 ppc_apuinfo_num_alloc += 4;
2346 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2347 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2348 }
2349 }
dc1d03fc 2350 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2351}
2352#undef APUID
dc1d03fc 2353#endif
6a0c61b7
EZ		 2354\f
2355
252b5132
RH		 2356/* We need to keep a list of fixups. We can't simply generate them as
2357 we go, because that would require us to first create the frag, and
2358 that would screw up references to ``.''. */
2359
2360struct ppc_fixup
2361{
2362 expressionS exp;
2363 int opindex;
2364 bfd_reloc_code_real_type reloc;
2365};
2366
2367#define MAX_INSN_FIXUPS (5)
2368
2369/* This routine is called for each instruction to be assembled. */
2370
2371void
98027b10 2372md_assemble (char *str)
252b5132
RH		 2373{
2374 char *s;
2375 const struct powerpc_opcode *opcode;
2376 unsigned long insn;
2377 const unsigned char *opindex_ptr;
2378 int skip_optional;
2379 int need_paren;
2380 int next_opindex;
2381 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2382 int fc;
2383 char *f;
09b935ac 2384 int addr_mod;
252b5132
RH		 2385 int i;
2386#ifdef OBJ_ELF
2387 bfd_reloc_code_real_type reloc;
2388#endif
2389
2390 /* Get the opcode. */
3882b010 2391 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2392 ;
2393 if (*s != '\0')
2394 *s++ = '\0';
2395
2396 /* Look up the opcode in the hash table. */
2397 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2398 if (opcode == (const struct powerpc_opcode *) NULL)
2399 {
2400 const struct powerpc_macro *macro;
2401
2402 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2403 if (macro == (const struct powerpc_macro *) NULL)
2404 as_bad (_("Unrecognized opcode: `%s'"), str);
2405 else
2406 ppc_macro (s, macro);
2407
2408 return;
2409 }
2410
2411 insn = opcode->opcode;
2412
2413 str = s;
3882b010 2414 while (ISSPACE (*str))
252b5132
RH		 2415 ++str;
2416
2417 /* PowerPC operands are just expressions. The only real issue is
2418 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2419 an optional operand separate the operands only with commas (in some
2420 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2421 have optional operands). Most instructions with optional operands
2422 have only one. Those that have more than one optional operand can
2423 take either all their operands or none. So, before we start seriously
2424 parsing the operands, we check to see if we have optional operands,
2425 and if we do, we count the number of commas to see which operands
2426 have been omitted. */
252b5132
RH		 2427 skip_optional = 0;
2428 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2429 {
2430 const struct powerpc_operand *operand;
2431
2432 operand = &powerpc_operands[*opindex_ptr];
2433 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2434 {
2435 unsigned int opcount;
7fe9cf6b 2436 unsigned int num_operands_expected;
252b5132
RH		 2437
2438 /* There is an optional operand. Count the number of
2439 commas in the input line. */
2440 if (*str == '\0')
2441 opcount = 0;
2442 else
2443 {
2444 opcount = 1;
2445 s = str;
2446 while ((s = strchr (s, ',')) != (char *) NULL)
2447 {
2448 ++opcount;
2449 ++s;
2450 }
2451 }
2452
7fe9cf6b
NC		 2453 /* Compute the number of expected operands.
2454 Do not count fake operands. */
2455 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2456 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2457 ++ num_operands_expected;
2458
252b5132
RH		 2459 /* If there are fewer operands in the line then are called
2460 for by the instruction, we want to skip the optional
1f6c9eb0 2461 operands. */
7fe9cf6b 2462 if (opcount < num_operands_expected)
252b5132
RH		 2463 skip_optional = 1;
2464
2465 break;
2466 }
2467 }
2468
2469 /* Gather the operands. */
2470 need_paren = 0;
2471 next_opindex = 0;
2472 fc = 0;
2473 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2474 {
2475 const struct powerpc_operand *operand;
2476 const char *errmsg;
2477 char *hold;
2478 expressionS ex;
2479 char endc;
2480
2481 if (next_opindex == 0)
2482 operand = &powerpc_operands[*opindex_ptr];
2483 else
2484 {
2485 operand = &powerpc_operands[next_opindex];
2486 next_opindex = 0;
2487 }
252b5132
RH		 2488 errmsg = NULL;
2489
2490 /* If this is a fake operand, then we do not expect anything
2491 from the input. */
2492 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2493 {
2b3c4602 2494 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2495 if (errmsg != (const char *) NULL)
ee2c9aa9 2496 as_bad ("%s", errmsg);
252b5132
RH		 2497 continue;
2498 }
2499
2500 /* If this is an optional operand, and we are skipping it, just
2501 insert a zero. */
2502 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2503 && skip_optional)
2504 {
2505 if (operand->insert)
2506 {
2b3c4602 2507 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2508 if (errmsg != (const char *) NULL)
ee2c9aa9 2509 as_bad ("%s", errmsg);
252b5132
RH		 2510 }
2511 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2512 next_opindex = *opindex_ptr + 1;
2513 continue;
2514 }
2515
2516 /* Gather the operand. */
2517 hold = input_line_pointer;
2518 input_line_pointer = str;
2519
2520#ifdef TE_PE
81d4177b 2521 if (*input_line_pointer == '[')
252b5132
RH		 2522 {
2523 /* We are expecting something like the second argument here:
99a814a1
AM		 2524 *
2525 * lwz r4,[toc].GS.0.static_int(rtoc)
2526 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2527 * The argument following the `]' must be a symbol name, and the
2528 * register must be the toc register: 'rtoc' or '2'
2529 *
2530 * The effect is to 0 as the displacement field
2531 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2532 * the appropriate variation) reloc against it based on the symbol.
2533 * The linker will build the toc, and insert the resolved toc offset.
2534 *
2535 * Note:
2536 * o The size of the toc entry is currently assumed to be
2537 * 32 bits. This should not be assumed to be a hard coded
2538 * number.
2539 * o In an effort to cope with a change from 32 to 64 bits,
2540 * there are also toc entries that are specified to be
2541 * either 32 or 64 bits:
2542 * lwz r4,[toc32].GS.0.static_int(rtoc)
2543 * lwz r4,[toc64].GS.0.static_int(rtoc)
2544 * These demand toc entries of the specified size, and the
2545 * instruction probably requires it.
2546 */
252b5132
RH		 2547
2548 int valid_toc;
2549 enum toc_size_qualifier toc_kind;
2550 bfd_reloc_code_real_type toc_reloc;
2551
99a814a1
AM		 2552 /* Go parse off the [tocXX] part. */
2553 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2554
81d4177b 2555 if (!valid_toc)
252b5132 2556 {
99a814a1
AM		 2557 /* Note: message has already been issued.
2558 FIXME: what sort of recovery should we do?
2559 demand_rest_of_line (); return; ? */
252b5132
RH		 2560 }
2561
99a814a1
AM		 2562 /* Now get the symbol following the ']'. */
2563 expression (&ex);
252b5132
RH		 2564
2565 switch (toc_kind)
2566 {
2567 case default_toc:
99a814a1
AM		 2568 /* In this case, we may not have seen the symbol yet,
2569 since it is allowed to appear on a .extern or .globl
2570 or just be a label in the .data section. */
252b5132
RH		 2571 toc_reloc = BFD_RELOC_PPC_TOC16;
2572 break;
2573 case data_in_toc:
99a814a1
AM		 2574 /* 1. The symbol must be defined and either in the toc
2575 section, or a global.
2576 2. The reloc generated must have the TOCDEFN flag set
2577 in upper bit mess of the reloc type.
2578 FIXME: It's a little confusing what the tocv
2579 qualifier can be used for. At the very least, I've
2580 seen three uses, only one of which I'm sure I can
2581 explain. */
81d4177b
KH		 2582 if (ex.X_op == O_symbol)
2583 {
9c2799c2 2584 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2585 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2586 != tocdata_section)
252b5132 2587 {
99a814a1 2588 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2589 }
2590 }
2591
2592 toc_reloc = BFD_RELOC_PPC_TOC16;
2593 break;
2594 case must_be_32:
99a814a1
AM		 2595 /* FIXME: these next two specifically specify 32/64 bit
2596 toc entries. We don't support them today. Is this
2597 the right way to say that? */
252b5132
RH		 2598 toc_reloc = BFD_RELOC_UNUSED;
2599 as_bad (_("Unimplemented toc32 expression modifier"));
2600 break;
2601 case must_be_64:
99a814a1 2602 /* FIXME: see above. */
252b5132
RH		 2603 toc_reloc = BFD_RELOC_UNUSED;
2604 as_bad (_("Unimplemented toc64 expression modifier"));
2605 break;
2606 default:
bc805888 2607 fprintf (stderr,
99a814a1
AM		 2608 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2609 toc_kind);
bc805888 2610 abort ();
252b5132
RH		 2611 break;
2612 }
2613
2614 /* We need to generate a fixup for this expression. */
2615 if (fc >= MAX_INSN_FIXUPS)
2616 as_fatal (_("too many fixups"));
2617
2618 fixups[fc].reloc = toc_reloc;
2619 fixups[fc].exp = ex;
2620 fixups[fc].opindex = *opindex_ptr;
2621 ++fc;
2622
99a814a1
AM		 2623 /* Ok. We've set up the fixup for the instruction. Now make it
2624 look like the constant 0 was found here. */
252b5132
RH		 2625 ex.X_unsigned = 1;
2626 ex.X_op = O_constant;
2627 ex.X_add_number = 0;
2628 ex.X_add_symbol = NULL;
2629 ex.X_op_symbol = NULL;
2630 }
2631
2632 else
2633#endif /* TE_PE */
2634 {
2ad068be
AM		 2635 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2636 || !register_name (&ex))
252b5132 2637 {
13abbae3
AM		 2638 char save_lex = lex_type['%'];
2639
252b5132 2640 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2641 {
2642 cr_operand = TRUE;
2643 lex_type['%'] |= LEX_BEGIN_NAME;
2644 }
252b5132 2645 expression (&ex);
b34976b6 2646 cr_operand = FALSE;
13abbae3 2647 lex_type['%'] = save_lex;
252b5132
RH		 2648 }
2649 }
2650
2651 str = input_line_pointer;
2652 input_line_pointer = hold;
2653
2654 if (ex.X_op == O_illegal)
2655 as_bad (_("illegal operand"));
2656 else if (ex.X_op == O_absent)
2657 as_bad (_("missing operand"));
2658 else if (ex.X_op == O_register)
2659 {
2660 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2661 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2662 }
2663 else if (ex.X_op == O_constant)
2664 {
2665#ifdef OBJ_ELF
81d4177b 2666 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2667 char *orig_str = str;
2668
2669 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2670 switch (reloc)
2671 {
2672 default:
2673 str = orig_str;
2674 break;
2675
2676 case BFD_RELOC_LO16:
2677 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2678 something which cleared it, we always produce a
2679 signed value. */
2680 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2681 ex.X_add_number &= 0xffff;
2682 else
0baf16f2 2683 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2684 break;
2685
2686 case BFD_RELOC_HI16:
0baf16f2
AM		 2687 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2688 ex.X_add_number = PPC_HI (ex.X_add_number);
2689 else
2690 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2691 break;
2692
2693 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2694 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2695 ex.X_add_number = PPC_HA (ex.X_add_number);
2696 else
2697 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2698 break;
2699
0baf16f2
AM		 2700 case BFD_RELOC_PPC64_HIGHER:
2701 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2702 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2703 else
2704 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2705 break;
2706
2707 case BFD_RELOC_PPC64_HIGHER_S:
2708 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2709 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2710 else
2711 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2712 break;
0baf16f2
AM		 2713
2714 case BFD_RELOC_PPC64_HIGHEST:
2715 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2716 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2717 else
2718 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2719 break;
2720
2721 case BFD_RELOC_PPC64_HIGHEST_S:
2722 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2723 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2724 else
2725 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2726 break;
252b5132 2727 }
0baf16f2 2728#endif /* OBJ_ELF */
252b5132 2729 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2730 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2731 }
2732#ifdef OBJ_ELF
727fc41e 2733 else
252b5132 2734 {
727fc41e 2735 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2736 {
727fc41e
AM		 2737 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2738 if (sym_name[0] == '.')
2739 ++sym_name;
cdba85ec 2740
727fc41e 2741 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2742 {
727fc41e
AM		 2743 expressionS tls_exp;
2744
2745 hold = input_line_pointer;
2746 input_line_pointer = str + 1;
2747 expression (&tls_exp);
2748 if (tls_exp.X_op == O_symbol)
2749 {
2750 reloc = BFD_RELOC_UNUSED;
2751 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2752 {
2753 reloc = BFD_RELOC_PPC_TLSGD;
2754 input_line_pointer += 7;
2755 }
2756 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2757 {
2758 reloc = BFD_RELOC_PPC_TLSLD;
2759 input_line_pointer += 7;
2760 }
2761 if (reloc != BFD_RELOC_UNUSED)
2762 {
2763 SKIP_WHITESPACE ();
2764 str = input_line_pointer;
2765
2766 if (fc >= MAX_INSN_FIXUPS)
2767 as_fatal (_("too many fixups"));
2768 fixups[fc].exp = tls_exp;
2769 fixups[fc].opindex = *opindex_ptr;
2770 fixups[fc].reloc = reloc;
2771 ++fc;
2772 }
2773 }
2774 input_line_pointer = hold;
252b5132
RH		 2775 }
2776 }
2777
727fc41e 2778 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2779 {
727fc41e 2780 /* Some TLS tweaks. */
0baf16f2
AM		 2781 switch (reloc)
2782 {
727fc41e 2783 default:
cdba85ec 2784 break;
727fc41e
AM		 2785
2786 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2787 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2788 as_bad (_("@tls may not be used with \"%s\" operands"),
2789 opcode->name);
2790 else if (operand->shift != 11)
2791 as_bad (_("@tls may only be used in last operand"));
2792 else
2793 insn = ppc_insert_operand (insn, operand,
2794 ppc_obj64 ? 13 : 2,
2795 ppc_cpu, (char *) NULL, 0);
cdba85ec 2796 break;
727fc41e
AM		 2797
2798 /* We'll only use the 32 (or 64) bit form of these relocations
2799 in constants. Instructions get the 16 bit form. */
2800 case BFD_RELOC_PPC_DTPREL:
2801 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2802 break;
727fc41e
AM		 2803 case BFD_RELOC_PPC_TPREL:
2804 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2805 break;
2806 }
727fc41e
AM		 2807
2808 /* For the absolute forms of branches, convert the PC
2809 relative form back into the absolute. */
2810 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2811 {
2812 switch (reloc)
2813 {
2814 case BFD_RELOC_PPC_B26:
2815 reloc = BFD_RELOC_PPC_BA26;
2816 break;
2817 case BFD_RELOC_PPC_B16:
2818 reloc = BFD_RELOC_PPC_BA16;
2819 break;
2820 case BFD_RELOC_PPC_B16_BRTAKEN:
2821 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2822 break;
2823 case BFD_RELOC_PPC_B16_BRNTAKEN:
2824 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2825 break;
2826 default:
2827 break;
2828 }
2829 }
2830
01efc3af
AM		 2831 switch (reloc)
2832 {
2833 case BFD_RELOC_PPC_TOC16:
2834 toc_reloc_types |= has_small_toc_reloc;
2835 break;
2836 case BFD_RELOC_PPC64_TOC16_LO:
2837 case BFD_RELOC_PPC64_TOC16_HI:
2838 case BFD_RELOC_PPC64_TOC16_HA:
2839 toc_reloc_types |= has_large_toc_reloc;
2840 break;
2841 default:
2842 break;
2843 }
2844
727fc41e
AM		 2845 if (ppc_obj64
2846 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2847 {
2848 switch (reloc)
2849 {
2850 case BFD_RELOC_16:
2851 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2852 break;
2853 case BFD_RELOC_LO16:
2854 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2855 break;
2856 case BFD_RELOC_16_GOTOFF:
2857 reloc = BFD_RELOC_PPC64_GOT16_DS;
2858 break;
2859 case BFD_RELOC_LO16_GOTOFF:
2860 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2861 break;
2862 case BFD_RELOC_LO16_PLTOFF:
2863 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2864 break;
2865 case BFD_RELOC_16_BASEREL:
2866 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2867 break;
2868 case BFD_RELOC_LO16_BASEREL:
2869 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2870 break;
2871 case BFD_RELOC_PPC_TOC16:
2872 reloc = BFD_RELOC_PPC64_TOC16_DS;
2873 break;
2874 case BFD_RELOC_PPC64_TOC16_LO:
2875 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2876 break;
2877 case BFD_RELOC_PPC64_PLTGOT16:
2878 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2879 break;
2880 case BFD_RELOC_PPC64_PLTGOT16_LO:
2881 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2882 break;
2883 case BFD_RELOC_PPC_DTPREL16:
2884 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2885 break;
2886 case BFD_RELOC_PPC_DTPREL16_LO:
2887 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2888 break;
2889 case BFD_RELOC_PPC_TPREL16:
2890 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2891 break;
2892 case BFD_RELOC_PPC_TPREL16_LO:
2893 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2894 break;
2895 case BFD_RELOC_PPC_GOT_DTPREL16:
2896 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2897 case BFD_RELOC_PPC_GOT_TPREL16:
2898 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2899 break;
2900 default:
2901 as_bad (_("unsupported relocation for DS offset field"));
2902 break;
2903 }
2904 }
0baf16f2
AM		 2905 }
2906
252b5132
RH		 2907 /* We need to generate a fixup for this expression. */
2908 if (fc >= MAX_INSN_FIXUPS)
2909 as_fatal (_("too many fixups"));
2910 fixups[fc].exp = ex;
727fc41e 2911 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2912 fixups[fc].reloc = reloc;
2913 ++fc;
2914 }
727fc41e 2915#else /* OBJ_ELF */
252b5132
RH		 2916 else
2917 {
2918 /* We need to generate a fixup for this expression. */
2919 if (fc >= MAX_INSN_FIXUPS)
2920 as_fatal (_("too many fixups"));
2921 fixups[fc].exp = ex;
2922 fixups[fc].opindex = *opindex_ptr;
2923 fixups[fc].reloc = BFD_RELOC_UNUSED;
2924 ++fc;
2925 }
727fc41e 2926#endif /* OBJ_ELF */
252b5132
RH		 2927
2928 if (need_paren)
2929 {
2930 endc = ')';
2931 need_paren = 0;
c3d65c1c
BE		 2932 /* If expecting more operands, then we want to see "),". */
2933 if (*str == endc && opindex_ptr[1] != 0)
2934 {
2935 do
2936 ++str;
2937 while (ISSPACE (*str));
2938 endc = ',';
2939 }
252b5132
RH		 2940 }
2941 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2942 {
2943 endc = '(';
2944 need_paren = 1;
2945 }
2946 else
2947 endc = ',';
2948
2949 /* The call to expression should have advanced str past any
2950 whitespace. */
2951 if (*str != endc
2952 && (endc != ',' || *str != '\0'))
2953 {
5a938047
AM		 2954 if (*str == '\0')
2955 as_bad (_("syntax error; end of line, expected `%c'"), endc);
2956 else
2957 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 2958 break;
2959 }
2960
2961 if (*str != '\0')
2962 ++str;
2963 }
2964
3882b010 2965 while (ISSPACE (*str))
252b5132
RH		 2966 ++str;
2967
2968 if (*str != '\0')
2969 as_bad (_("junk at end of line: `%s'"), str);
2970
dc1d03fc 2971#ifdef OBJ_ELF
6a0c61b7 2972 /* Do we need/want a APUinfo section? */
e01d869a 2973 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC)) != 0)
6a0c61b7
EZ		 2974 {
2975 /* These are all version "1". */
2976 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2977 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2978 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2979 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2980 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2981 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2982 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2983 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2984 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2985 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2986 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2987 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2988 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2989 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2990 }
dc1d03fc 2991#endif
6a0c61b7 2992
252b5132
RH		 2993 /* Write out the instruction. */
2994 f = frag_more (4);
09b935ac
AM		 2995 addr_mod = frag_now_fix () & 3;
2996 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2997 as_bad (_("instruction address is not a multiple of 4"));
2998 frag_now->insn_addr = addr_mod;
2999 frag_now->has_code = 1;
252b5132
RH		 3000 md_number_to_chars (f, insn, 4);
3001
5d6f4f16
GK		 3002#ifdef OBJ_ELF
3003 dwarf2_emit_insn (4);
3004#endif
3005
252b5132
RH		 3006 /* Create any fixups. At this point we do not use a
3007 bfd_reloc_code_real_type, but instead just use the
3008 BFD_RELOC_UNUSED plus the operand index. This lets us easily
3009 handle fixups for any operand type, although that is admittedly
3010 not a very exciting feature. We pick a BFD reloc type in
55cf6793 3011 md_apply_fix. */
252b5132
RH		 3012 for (i = 0; i < fc; i++)
3013 {
252b5132
RH		 3014 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3015 {
99a814a1 3016 reloc_howto_type *reloc_howto;
252b5132
RH		 3017 int size;
3018 int offset;
3019 fixS *fixP;
3020
99a814a1 3021 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3022 if (!reloc_howto)
3023 abort ();
3024
3025 size = bfd_get_reloc_size (reloc_howto);
3026 offset = target_big_endian ? (4 - size) : 0;
3027
3028 if (size < 1 || size > 4)
bc805888 3029 abort ();
252b5132 3030
99a814a1
AM		 3031 fixP = fix_new_exp (frag_now,
3032 f - frag_now->fr_literal + offset,
3033 size,
3034 &fixups[i].exp,
3035 reloc_howto->pc_relative,
252b5132
RH		 3036 fixups[i].reloc);
3037
3038 /* Turn off complaints that the addend is too large for things like
3039 foo+100000@ha. */
3040 switch (fixups[i].reloc)
3041 {
3042 case BFD_RELOC_16_GOTOFF:
3043 case BFD_RELOC_PPC_TOC16:
3044 case BFD_RELOC_LO16:
3045 case BFD_RELOC_HI16:
3046 case BFD_RELOC_HI16_S:
0baf16f2 3047#ifdef OBJ_ELF
0baf16f2
AM		 3048 case BFD_RELOC_PPC64_HIGHER:
3049 case BFD_RELOC_PPC64_HIGHER_S:
3050 case BFD_RELOC_PPC64_HIGHEST:
3051 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 3052#endif
252b5132
RH		 3053 fixP->fx_no_overflow = 1;
3054 break;
3055 default:
3056 break;
3057 }
3058 }
3059 else
727fc41e
AM		 3060 {
3061 const struct powerpc_operand *operand;
3062
3063 operand = &powerpc_operands[fixups[i].opindex];
3064 fix_new_exp (frag_now,
3065 f - frag_now->fr_literal,
3066 4,
3067 &fixups[i].exp,
3068 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3069 ((bfd_reloc_code_real_type)
3070 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3071 }
252b5132
RH		 3072 }
3073}
3074
3075/* Handle a macro. Gather all the operands, transform them as
3076 described by the macro, and call md_assemble recursively. All the
3077 operands are separated by commas; we don't accept parentheses
3078 around operands here. */
3079
3080static void
98027b10 3081ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3082{
3083 char *operands[10];
3084 unsigned int count;
3085 char *s;
3086 unsigned int len;
3087 const char *format;
db557034 3088 unsigned int arg;
252b5132
RH		 3089 char *send;
3090 char *complete;
3091
3092 /* Gather the users operands into the operands array. */
3093 count = 0;
3094 s = str;
3095 while (1)
3096 {
3097 if (count >= sizeof operands / sizeof operands[0])
3098 break;
3099 operands[count++] = s;
3100 s = strchr (s, ',');
3101 if (s == (char *) NULL)
3102 break;
3103 *s++ = '\0';
81d4177b 3104 }
252b5132
RH		 3105
3106 if (count != macro->operands)
3107 {
3108 as_bad (_("wrong number of operands"));
3109 return;
3110 }
3111
3112 /* Work out how large the string must be (the size is unbounded
3113 because it includes user input). */
3114 len = 0;
3115 format = macro->format;
3116 while (*format != '\0')
3117 {
3118 if (*format != '%')
3119 {
3120 ++len;
3121 ++format;
3122 }
3123 else
3124 {
3125 arg = strtol (format + 1, &send, 10);
db557034 3126 know (send != format && arg < count);
252b5132
RH		 3127 len += strlen (operands[arg]);
3128 format = send;
3129 }
3130 }
3131
3132 /* Put the string together. */
3133 complete = s = (char *) alloca (len + 1);
3134 format = macro->format;
3135 while (*format != '\0')
3136 {
3137 if (*format != '%')
3138 *s++ = *format++;
3139 else
3140 {
3141 arg = strtol (format + 1, &send, 10);
3142 strcpy (s, operands[arg]);
3143 s += strlen (s);
3144 format = send;
3145 }
3146 }
3147 *s = '\0';
3148
3149 /* Assemble the constructed instruction. */
3150 md_assemble (complete);
81d4177b 3151}
252b5132
RH		 3152\f
3153#ifdef OBJ_ELF
18ae9cc1 3154/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3155
3156int
98027b10 3157ppc_section_type (char *str, size_t len)
252b5132 3158{
9de8d8f1
RH		 3159 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3160 return SHT_ORDERED;
252b5132 3161
9de8d8f1 3162 return -1;
252b5132
RH		 3163}
3164
3165int
1239de13 3166ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3167{
3168 if (type == SHT_ORDERED)
3169 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3170
252b5132
RH		 3171 return flags;
3172}
3173#endif /* OBJ_ELF */
3174
3175\f
3176/* Pseudo-op handling. */
3177
3178/* The .byte pseudo-op. This is similar to the normal .byte
3179 pseudo-op, but it can also take a single ASCII string. */
3180
3181static void
98027b10 3182ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3183{
3184 if (*input_line_pointer != '\"')
3185 {
3186 cons (1);
3187 return;
3188 }
3189
3190 /* Gather characters. A real double quote is doubled. Unusual
3191 characters are not permitted. */
3192 ++input_line_pointer;
3193 while (1)
3194 {
3195 char c;
3196
3197 c = *input_line_pointer++;
3198
3199 if (c == '\"')
3200 {
3201 if (*input_line_pointer != '\"')
3202 break;
3203 ++input_line_pointer;
3204 }
3205
3206 FRAG_APPEND_1_CHAR (c);
3207 }
3208
3209 demand_empty_rest_of_line ();
3210}
3211\f
3212#ifdef OBJ_XCOFF
3213
3214/* XCOFF specific pseudo-op handling. */
3215
3216/* This is set if we are creating a .stabx symbol, since we don't want
3217 to handle symbol suffixes for such symbols. */
b34976b6 3218static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3219
3220/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3221 symbols in the .bss segment as though they were local common
67c1ffbe 3222 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3223 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3224
3225static void
98027b10 3226ppc_comm (int lcomm)
252b5132
RH		 3227{
3228 asection *current_seg = now_seg;
3229 subsegT current_subseg = now_subseg;
3230 char *name;
3231 char endc;
3232 char *end_name;
3233 offsetT size;
3234 offsetT align;
3235 symbolS *lcomm_sym = NULL;
3236 symbolS *sym;
3237 char *pfrag;
3238
3239 name = input_line_pointer;
3240 endc = get_symbol_end ();
3241 end_name = input_line_pointer;
3242 *end_name = endc;
3243
3244 if (*input_line_pointer != ',')
3245 {
3246 as_bad (_("missing size"));
3247 ignore_rest_of_line ();
3248 return;
3249 }
3250 ++input_line_pointer;
3251
3252 size = get_absolute_expression ();
3253 if (size < 0)
3254 {
3255 as_bad (_("negative size"));
3256 ignore_rest_of_line ();
3257 return;
3258 }
3259
3260 if (! lcomm)
3261 {
3262 /* The third argument to .comm is the alignment. */
3263 if (*input_line_pointer != ',')
1ad63b2f 3264 align = 2;
252b5132
RH		 3265 else
3266 {
3267 ++input_line_pointer;
3268 align = get_absolute_expression ();
3269 if (align <= 0)
3270 {
3271 as_warn (_("ignoring bad alignment"));
1ad63b2f 3272 align = 2;
252b5132
RH		 3273 }
3274 }
3275 }
3276 else
3277 {
3278 char *lcomm_name;
3279 char lcomm_endc;
3280
1ad63b2f 3281 if (size <= 4)
252b5132
RH		 3282 align = 2;
3283 else
3284 align = 3;
3285
3286 /* The third argument to .lcomm appears to be the real local
3287 common symbol to create. References to the symbol named in
3288 the first argument are turned into references to the third
3289 argument. */
3290 if (*input_line_pointer != ',')
3291 {
3292 as_bad (_("missing real symbol name"));
3293 ignore_rest_of_line ();
3294 return;
3295 }
3296 ++input_line_pointer;
3297
3298 lcomm_name = input_line_pointer;
3299 lcomm_endc = get_symbol_end ();
81d4177b 3300
252b5132
RH		 3301 lcomm_sym = symbol_find_or_make (lcomm_name);
3302
3303 *input_line_pointer = lcomm_endc;
3304 }
3305
3306 *end_name = '\0';
3307 sym = symbol_find_or_make (name);
3308 *end_name = endc;
3309
3310 if (S_IS_DEFINED (sym)
3311 || S_GET_VALUE (sym) != 0)
3312 {
3313 as_bad (_("attempt to redefine symbol"));
3314 ignore_rest_of_line ();
3315 return;
3316 }
81d4177b 3317
252b5132 3318 record_alignment (bss_section, align);
81d4177b 3319
252b5132
RH		 3320 if (! lcomm
3321 || ! S_IS_DEFINED (lcomm_sym))
3322 {
3323 symbolS *def_sym;
3324 offsetT def_size;
3325
3326 if (! lcomm)
3327 {
3328 def_sym = sym;
3329 def_size = size;
3330 S_SET_EXTERNAL (sym);
3331 }
3332 else
3333 {
809ffe0d 3334 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3335 def_sym = lcomm_sym;
3336 def_size = 0;
3337 }
3338
3339 subseg_set (bss_section, 1);
3340 frag_align (align, 0, 0);
81d4177b 3341
809ffe0d 3342 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3343 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3344 def_size, (char *) NULL);
3345 *pfrag = 0;
3346 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3347 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3348 }
3349 else if (lcomm)
3350 {
3351 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3352 symbol_get_frag (lcomm_sym)->fr_offset =
3353 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3354 &~ ((1 << align) - 1));
809ffe0d
ILT		 3355 if (align > symbol_get_tc (lcomm_sym)->align)
3356 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3357 }
3358
3359 if (lcomm)
3360 {
3361 /* Make sym an offset from lcomm_sym. */
3362 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3363 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3364 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3365 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3366 }
3367
3368 subseg_set (current_seg, current_subseg);
3369
3370 demand_empty_rest_of_line ();
3371}
3372
3373/* The .csect pseudo-op. This switches us into a different
3374 subsegment. The first argument is a symbol whose value is the
3375 start of the .csect. In COFF, csect symbols get special aux
3376 entries defined by the x_csect field of union internal_auxent. The
3377 optional second argument is the alignment (the default is 2). */
3378
3379static void
98027b10 3380ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3381{
3382 char *name;
3383 char endc;
3384 symbolS *sym;
931e13a6 3385 offsetT align;
252b5132
RH		 3386
3387 name = input_line_pointer;
3388 endc = get_symbol_end ();
81d4177b 3389
252b5132
RH		 3390 sym = symbol_find_or_make (name);
3391
3392 *input_line_pointer = endc;
3393
3394 if (S_GET_NAME (sym)[0] == '\0')
3395 {
3396 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3397 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3398 }
3399
931e13a6 3400 align = 2;
252b5132
RH		 3401 if (*input_line_pointer == ',')
3402 {
3403 ++input_line_pointer;
931e13a6 3404 align = get_absolute_expression ();
252b5132
RH		 3405 }
3406
931e13a6
AM		 3407 ppc_change_csect (sym, align);
3408
252b5132
RH		 3409 demand_empty_rest_of_line ();
3410}
3411
3412/* Change to a different csect. */
3413
3414static void
98027b10 3415ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3416{
3417 if (S_IS_DEFINED (sym))
809ffe0d 3418 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3419 else
3420 {
3421 symbolS **list_ptr;
3422 int after_toc;
3423 int hold_chunksize;
3424 symbolS *list;
931e13a6
AM		 3425 int is_code;
3426 segT sec;
252b5132
RH		 3427
3428 /* This is a new csect. We need to look at the symbol class to
3429 figure out whether it should go in the text section or the
3430 data section. */
3431 after_toc = 0;
931e13a6 3432 is_code = 0;
96d56e9f 3433 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3434 {
3435 case XMC_PR:
3436 case XMC_RO:
3437 case XMC_DB:
3438 case XMC_GL:
3439 case XMC_XO:
3440 case XMC_SV:
3441 case XMC_TI:
3442 case XMC_TB:
3443 S_SET_SEGMENT (sym, text_section);
809ffe0d 3444 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3445 ++ppc_text_subsegment;
3446 list_ptr = &ppc_text_csects;
931e13a6 3447 is_code = 1;
252b5132
RH		 3448 break;
3449 case XMC_RW:
3450 case XMC_TC0:
3451 case XMC_TC:
3452 case XMC_DS:
3453 case XMC_UA:
3454 case XMC_BS:
3455 case XMC_UC:
3456 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3457 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3458 == ppc_data_subsegment))
252b5132
RH		 3459 after_toc = 1;
3460 S_SET_SEGMENT (sym, data_section);
809ffe0d 3461 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3462 ++ppc_data_subsegment;
3463 list_ptr = &ppc_data_csects;
3464 break;
3465 default:
3466 abort ();
3467 }
3468
3469 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3470 changing subsegments, so that we don't use a lot of memory
3471 space for what may be a small section. */
252b5132
RH		 3472 hold_chunksize = chunksize;
3473 chunksize = 64;
3474
931e13a6
AM		 3475 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3476 symbol_get_tc (sym)->subseg);
252b5132
RH		 3477
3478 chunksize = hold_chunksize;
3479
3480 if (after_toc)
3481 ppc_after_toc_frag = frag_now;
3482
931e13a6
AM		 3483 record_alignment (sec, align);
3484 if (is_code)
3485 frag_align_code (align, 0);
3486 else
3487 frag_align (align, 0, 0);
3488
809ffe0d 3489 symbol_set_frag (sym, frag_now);
252b5132
RH		 3490 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3491
931e13a6 3492 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3493 symbol_get_tc (sym)->output = 1;
3494 symbol_get_tc (sym)->within = sym;
81d4177b 3495
252b5132 3496 for (list = *list_ptr;
809ffe0d
ILT		 3497 symbol_get_tc (list)->next != (symbolS *) NULL;
3498 list = symbol_get_tc (list)->next)
252b5132 3499 ;
809ffe0d 3500 symbol_get_tc (list)->next = sym;
81d4177b 3501
252b5132 3502 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3503 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3504 &symbol_lastP);
252b5132
RH		 3505 }
3506
3507 ppc_current_csect = sym;
3508}
3509
85645aed
TG		 3510static void
3511ppc_change_debug_section (unsigned int idx, subsegT subseg)
3512{
3513 segT sec;
3514 flagword oldflags;
3515 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3516
3517 sec = subseg_new (dw->name, subseg);
3518 oldflags = bfd_get_section_flags (stdoutput, sec);
3519 if (oldflags == SEC_NO_FLAGS)
3520 {
3521 /* Just created section. */
3522 gas_assert (dw_sections[idx].sect == NULL);
3523
3524 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3525 bfd_set_section_alignment (stdoutput, sec, 0);
3526 dw_sections[idx].sect = sec;
3527 }
3528
3529 /* Not anymore in a csect. */
3530 ppc_current_csect = NULL;
3531}
3532
3533/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3534 .dwsect flag [, opt-label ]
3535*/
3536
3537static void
3538ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3539{
3540 offsetT flag;
3541 symbolS *opt_label;
3542 const struct xcoff_dwsect_name *dw;
3543 struct dw_subsection *subseg;
3544 struct dw_section *dws;
3545 int i;
3546
3547 /* Find section. */
3548 flag = get_absolute_expression ();
3549 dw = NULL;
3550 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3551 if (xcoff_dwsect_names[i].flag == flag)
3552 {
3553 dw = &xcoff_dwsect_names[i];
3554 break;
3555 }
3556
3557 /* Parse opt-label. */
3558 if (*input_line_pointer == ',')
3559 {
3560 const char *label;
3561 char c;
3562
3563 ++input_line_pointer;
3564
3565 label = input_line_pointer;
3566 c = get_symbol_end ();
3567 opt_label = symbol_find_or_make (label);
3568 *input_line_pointer = c;
3569 }
3570 else
3571 opt_label = NULL;
3572
3573 demand_empty_rest_of_line ();
3574
3575 /* Return now in case of unknown subsection. */
3576 if (dw == NULL)
3577 {
3578 as_bad (_("No known dwarf XCOFF section for flag 0x%08x\n"),
3579 (unsigned)flag);
3580 return;
3581 }
3582
3583 /* Find the subsection. */
3584 dws = &dw_sections[i];
3585 subseg = NULL;
3586 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3587 {
3588 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3589 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3590 {
3591 as_bad (_("label %s was not defined in this dwarf section"),
3592 S_GET_NAME (opt_label));
3593 subseg = dws->anon_subseg;
3594 opt_label = NULL;
3595 }
3596 else
3597 subseg = symbol_get_tc (opt_label)->u.dw;
3598 }
3599
3600 if (subseg != NULL)
3601 {
3602 /* Switch to the subsection. */
3603 ppc_change_debug_section (i, subseg->subseg);
3604 }
3605 else
3606 {
3607 /* Create a new dw subsection. */
3608 subseg = (struct dw_subsection *)
3609 xmalloc (sizeof (struct dw_subsection));
3610
3611 if (opt_label == NULL)
3612 {
3613 /* The anonymous one. */
3614 subseg->subseg = 0;
3615 subseg->link = NULL;
3616 dws->anon_subseg = subseg;
3617 }
3618 else
3619 {
3620 /* A named one. */
3621 if (dws->list_subseg != NULL)
3622 subseg->subseg = dws->list_subseg->subseg + 1;
3623 else
3624 subseg->subseg = 1;
3625
3626 subseg->link = dws->list_subseg;
3627 dws->list_subseg = subseg;
3628 symbol_get_tc (opt_label)->u.dw = subseg;
3629 }
3630
3631 ppc_change_debug_section (i, subseg->subseg);
3632
3633 if (dw->def_size)
3634 {
3635 /* Add the length field. */
3636 expressionS *exp = &subseg->end_exp;
3637 int sz;
3638
3639 if (opt_label != NULL)
3640 symbol_set_value_now (opt_label);
3641
3642 /* Add the length field. Note that according to the AIX assembler
3643 manual, the size of the length field is 4 for powerpc32 but
3644 12 for powerpc64. */
3645 if (ppc_obj64)
3646 {
3647 /* Write the 64bit marker. */
3648 md_number_to_chars (frag_more (4), -1, 4);
3649 }
3650
3651 exp->X_op = O_subtract;
3652 exp->X_op_symbol = symbol_temp_new_now ();
3653 exp->X_add_symbol = symbol_temp_make ();
3654
3655 sz = ppc_obj64 ? 8 : 4;
3656 exp->X_add_number = -sz;
3657 emit_expr (exp, sz);
3658 }
3659 }
3660}
3661
252b5132
RH		 3662/* This function handles the .text and .data pseudo-ops. These
3663 pseudo-ops aren't really used by XCOFF; we implement them for the
3664 convenience of people who aren't used to XCOFF. */
3665
3666static void
98027b10 3667ppc_section (int type)
252b5132
RH		 3668{
3669 const char *name;
3670 symbolS *sym;
3671
3672 if (type == 't')
3673 name = ".text[PR]";
3674 else if (type == 'd')
3675 name = ".data[RW]";
3676 else
3677 abort ();
3678
3679 sym = symbol_find_or_make (name);
3680
931e13a6 3681 ppc_change_csect (sym, 2);
252b5132
RH		 3682
3683 demand_empty_rest_of_line ();
3684}
3685
3686/* This function handles the .section pseudo-op. This is mostly to
3687 give an error, since XCOFF only supports .text, .data and .bss, but
3688 we do permit the user to name the text or data section. */
3689
3690static void
98027b10 3691ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3692{
3693 char *user_name;
3694 const char *real_name;
3695 char c;
3696 symbolS *sym;
3697
3698 user_name = input_line_pointer;
3699 c = get_symbol_end ();
3700
3701 if (strcmp (user_name, ".text") == 0)
3702 real_name = ".text[PR]";
3703 else if (strcmp (user_name, ".data") == 0)
3704 real_name = ".data[RW]";
3705 else
3706 {
3707 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3708 *input_line_pointer = c;
3709 ignore_rest_of_line ();
3710 return;
3711 }
3712
3713 *input_line_pointer = c;
3714
3715 sym = symbol_find_or_make (real_name);
3716
931e13a6 3717 ppc_change_csect (sym, 2);
252b5132
RH		 3718
3719 demand_empty_rest_of_line ();
3720}
3721
3722/* The .extern pseudo-op. We create an undefined symbol. */
3723
3724static void
98027b10 3725ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3726{
3727 char *name;
3728 char endc;
3729
3730 name = input_line_pointer;
3731 endc = get_symbol_end ();
3732
3733 (void) symbol_find_or_make (name);
3734
3735 *input_line_pointer = endc;
3736
3737 demand_empty_rest_of_line ();
3738}
3739
3740/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3741
3742static void
98027b10 3743ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3744{
3745 char *name;
3746 char endc;
3747 symbolS *sym;
3748
3749 name = input_line_pointer;
3750 endc = get_symbol_end ();
3751
3752 sym = symbol_find_or_make (name);
3753
3754 *input_line_pointer = endc;
3755
809ffe0d 3756 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3757
3758 demand_empty_rest_of_line ();
3759}
3760
c865e45b
RS		 3761/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
3762 relocations at the beginning of the current csect.
3763
3764 (In principle, there's no reason why the relocations _have_ to be at
3765 the beginning. Anywhere in the csect would do. However, inserting
3766 at the beginning is what the native assmebler does, and it helps to
3767 deal with cases where the .ref statements follow the section contents.)
3768
3769 ??? .refs don't work for empty .csects. However, the native assembler
3770 doesn't report an error in this case, and neither yet do we. */
3771
3772static void
3773ppc_ref (int ignore ATTRIBUTE_UNUSED)
3774{
3775 char *name;
3776 char c;
3777
3778 if (ppc_current_csect == NULL)
3779 {
3780 as_bad (_(".ref outside .csect"));
3781 ignore_rest_of_line ();
3782 return;
3783 }
3784
3785 do
3786 {
3787 name = input_line_pointer;
3788 c = get_symbol_end ();
3789
3790 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
3791 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
3792
3793 *input_line_pointer = c;
3794 SKIP_WHITESPACE ();
3795 c = *input_line_pointer;
3796 if (c == ',')
3797 {
3798 input_line_pointer++;
3799 SKIP_WHITESPACE ();
3800 if (is_end_of_line[(unsigned char) *input_line_pointer])
3801 {
3802 as_bad (_("missing symbol name"));
3803 ignore_rest_of_line ();
3804 return;
3805 }
3806 }
3807 }
3808 while (c == ',');
3809
3810 demand_empty_rest_of_line ();
3811}
3812
252b5132
RH		 3813/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3814 although I don't know why it bothers. */
3815
3816static void
98027b10 3817ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3818{
3819 char *name;
3820 char endc;
3821 symbolS *sym;
3822 int len;
3823
3824 name = input_line_pointer;
3825 endc = get_symbol_end ();
3826
3827 sym = symbol_find_or_make (name);
3828
3829 *input_line_pointer = endc;
3830
3831 if (*input_line_pointer != ',')
3832 {
3833 as_bad (_("missing rename string"));
3834 ignore_rest_of_line ();
3835 return;
3836 }
3837 ++input_line_pointer;
3838
809ffe0d 3839 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3840
3841 demand_empty_rest_of_line ();
3842}
3843
3844/* The .stabx pseudo-op. This is similar to a normal .stabs
3845 pseudo-op, but slightly different. A sample is
3846 .stabx "main:F-1",.main,142,0
3847 The first argument is the symbol name to create. The second is the
3848 value, and the third is the storage class. The fourth seems to be
3849 always zero, and I am assuming it is the type. */
3850
3851static void
98027b10 3852ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3853{
3854 char *name;
3855 int len;
3856 symbolS *sym;
3857 expressionS exp;
3858
3859 name = demand_copy_C_string (&len);
3860
3861 if (*input_line_pointer != ',')
3862 {
3863 as_bad (_("missing value"));
3864 return;
3865 }
3866 ++input_line_pointer;
3867
b34976b6 3868 ppc_stab_symbol = TRUE;
252b5132 3869 sym = symbol_make (name);
b34976b6 3870 ppc_stab_symbol = FALSE;
252b5132 3871
809ffe0d 3872 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3873
3874 (void) expression (&exp);
3875
3876 switch (exp.X_op)
3877 {
3878 case O_illegal:
3879 case O_absent:
3880 case O_big:
3881 as_bad (_("illegal .stabx expression; zero assumed"));
3882 exp.X_add_number = 0;
3883 /* Fall through. */
3884 case O_constant:
3885 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3886 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3887 break;
3888
3889 case O_symbol:
3890 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3891 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3892 else
3893 {
3894 S_SET_VALUE (sym,
3895 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3896 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3897 }
3898 break;
3899
3900 default:
3901 /* The value is some complex expression. This will probably
99a814a1
AM		 3902 fail at some later point, but this is probably the right
3903 thing to do here. */
809ffe0d 3904 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3905 break;
3906 }
3907
3908 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3909 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3910
3911 if (*input_line_pointer != ',')
3912 {
3913 as_bad (_("missing class"));
3914 return;
3915 }
3916 ++input_line_pointer;
3917
3918 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3919
3920 if (*input_line_pointer != ',')
3921 {
3922 as_bad (_("missing type"));
3923 return;
3924 }
3925 ++input_line_pointer;
3926
3927 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3928
809ffe0d 3929 symbol_get_tc (sym)->output = 1;
252b5132 3930
c734e7e3
TG		 3931 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
3932 {
3933 /* In this case :
252b5132 3934
c734e7e3
TG		 3935 .bs name
3936 .stabx "z",arrays_,133,0
3937 .es
99a814a1 3938
c734e7e3 3939 .comm arrays_,13768,3
99a814a1 3940
c734e7e3
TG		 3941 resolve_symbol_value will copy the exp's "within" into sym's when the
3942 offset is 0. Since this seems to be corner case problem,
3943 only do the correction for storage class C_STSYM. A better solution
3944 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 3945
c734e7e3
TG		 3946 if (exp.X_op == O_symbol)
3947 {
3948 if (ppc_current_block == NULL)
3949 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 3950
c734e7e3
TG		 3951 symbol_get_tc (sym)->within = ppc_current_block;
3952 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3953 }
3954 }
99a814a1 3955
252b5132
RH		 3956 if (exp.X_op != O_symbol
3957 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3958 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3959 ppc_frob_label (sym);
3960 else
3961 {
3962 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3963 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3964 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3965 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3966 }
3967
3968 demand_empty_rest_of_line ();
3969}
3970
3971/* The .function pseudo-op. This takes several arguments. The first
3972 argument seems to be the external name of the symbol. The second
67c1ffbe 3973 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3974 uses the same name for both. I have no idea what the third and
3975 fourth arguments are meant to be. The optional fifth argument is
3976 an expression for the size of the function. In COFF this symbol
3977 gets an aux entry like that used for a csect. */
3978
3979static void
98027b10 3980ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3981{
3982 char *name;
3983 char endc;
3984 char *s;
3985 symbolS *ext_sym;
3986 symbolS *lab_sym;
3987
3988 name = input_line_pointer;
3989 endc = get_symbol_end ();
3990
3991 /* Ignore any [PR] suffix. */
3992 name = ppc_canonicalize_symbol_name (name);
3993 s = strchr (name, '[');
3994 if (s != (char *) NULL
3995 && strcmp (s + 1, "PR]") == 0)
3996 *s = '\0';
3997
3998 ext_sym = symbol_find_or_make (name);
3999
4000 *input_line_pointer = endc;
4001
4002 if (*input_line_pointer != ',')
4003 {
4004 as_bad (_("missing symbol name"));
4005 ignore_rest_of_line ();
4006 return;
4007 }
4008 ++input_line_pointer;
4009
4010 name = input_line_pointer;
4011 endc = get_symbol_end ();
4012
4013 lab_sym = symbol_find_or_make (name);
4014
4015 *input_line_pointer = endc;
4016
4017 if (ext_sym != lab_sym)
4018 {
809ffe0d
ILT		 4019 expressionS exp;
4020
4021 exp.X_op = O_symbol;
4022 exp.X_add_symbol = lab_sym;
4023 exp.X_op_symbol = NULL;
4024 exp.X_add_number = 0;
4025 exp.X_unsigned = 0;
4026 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4027 }
4028
96d56e9f
NC		 4029 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4030 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4031 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4032
4033 if (*input_line_pointer == ',')
4034 {
91d6fa6a 4035 expressionS exp;
252b5132
RH		 4036
4037 /* Ignore the third argument. */
4038 ++input_line_pointer;
91d6fa6a 4039 expression (& exp);
252b5132
RH		 4040 if (*input_line_pointer == ',')
4041 {
4042 /* Ignore the fourth argument. */
4043 ++input_line_pointer;
91d6fa6a 4044 expression (& exp);
252b5132
RH		 4045 if (*input_line_pointer == ',')
4046 {
4047 /* The fifth argument is the function size. */
4048 ++input_line_pointer;
85645aed
TG		 4049 symbol_get_tc (ext_sym)->u.size = symbol_new
4050 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4051 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4052 }
4053 }
4054 }
4055
4056 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4057 SF_SET_FUNCTION (ext_sym);
4058 SF_SET_PROCESS (ext_sym);
4059 coff_add_linesym (ext_sym);
4060
4061 demand_empty_rest_of_line ();
4062}
4063
4064/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4065 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4066 with the correct line number */
5d6255fe 4067
8642cce8 4068static symbolS *saved_bi_sym = 0;
252b5132
RH		 4069
4070static void
98027b10 4071ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4072{
4073 symbolS *sym;
4074
4075 sym = symbol_make (".bf");
4076 S_SET_SEGMENT (sym, text_section);
809ffe0d 4077 symbol_set_frag (sym, frag_now);
252b5132
RH		 4078 S_SET_VALUE (sym, frag_now_fix ());
4079 S_SET_STORAGE_CLASS (sym, C_FCN);
4080
4081 coff_line_base = get_absolute_expression ();
4082
4083 S_SET_NUMBER_AUXILIARY (sym, 1);
4084 SA_SET_SYM_LNNO (sym, coff_line_base);
4085
8642cce8 4086 /* Line number for bi. */
5d6255fe 4087 if (saved_bi_sym)
8642cce8
TR		 4088 {
4089 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4090 saved_bi_sym = 0;
4091 }
5d6255fe 4092
8642cce8 4093
809ffe0d 4094 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4095
4096 ppc_frob_label (sym);
4097
4098 demand_empty_rest_of_line ();
4099}
4100
4101/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4102 ".ef", except that the line number is absolute, not relative to the
4103 most recent ".bf" symbol. */
4104
4105static void
98027b10 4106ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4107{
4108 symbolS *sym;
4109
4110 sym = symbol_make (".ef");
4111 S_SET_SEGMENT (sym, text_section);
809ffe0d 4112 symbol_set_frag (sym, frag_now);
252b5132
RH		 4113 S_SET_VALUE (sym, frag_now_fix ());
4114 S_SET_STORAGE_CLASS (sym, C_FCN);
4115 S_SET_NUMBER_AUXILIARY (sym, 1);
4116 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4117 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4118
4119 ppc_frob_label (sym);
4120
4121 demand_empty_rest_of_line ();
4122}
4123
4124/* The .bi and .ei pseudo-ops. These take a string argument and
4125 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4126 the symbol list. The value of .bi will be know when the next .bf
4127 is encountered. */
252b5132
RH		 4128
4129static void
98027b10 4130ppc_biei (int ei)
252b5132
RH		 4131{
4132 static symbolS *last_biei;
4133
4134 char *name;
4135 int len;
4136 symbolS *sym;
4137 symbolS *look;
4138
4139 name = demand_copy_C_string (&len);
4140
4141 /* The value of these symbols is actually file offset. Here we set
4142 the value to the index into the line number entries. In
4143 ppc_frob_symbols we set the fix_line field, which will cause BFD
4144 to do the right thing. */
4145
4146 sym = symbol_make (name);
4147 /* obj-coff.c currently only handles line numbers correctly in the
4148 .text section. */
4149 S_SET_SEGMENT (sym, text_section);
4150 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4151 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4152
4153 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4154 symbol_get_tc (sym)->output = 1;
81d4177b 4155
8642cce8 4156 /* Save bi. */
5d6255fe 4157 if (ei)
8642cce8
TR		 4158 saved_bi_sym = 0;
4159 else
4160 saved_bi_sym = sym;
4161
252b5132
RH		 4162 for (look = last_biei ? last_biei : symbol_rootP;
4163 (look != (symbolS *) NULL
4164 && (S_GET_STORAGE_CLASS (look) == C_FILE
4165 || S_GET_STORAGE_CLASS (look) == C_BINCL
4166 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4167 look = symbol_next (look))
4168 ;
4169 if (look != (symbolS *) NULL)
4170 {
4171 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4172 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4173 last_biei = sym;
4174 }
4175
4176 demand_empty_rest_of_line ();
4177}
4178
4179/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4180 There is one argument, which is a csect symbol. The value of the
4181 .bs symbol is the index of this csect symbol. */
4182
4183static void
98027b10 4184ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4185{
4186 char *name;
4187 char endc;
4188 symbolS *csect;
4189 symbolS *sym;
4190
4191 if (ppc_current_block != NULL)
4192 as_bad (_("nested .bs blocks"));
4193
4194 name = input_line_pointer;
4195 endc = get_symbol_end ();
4196
4197 csect = symbol_find_or_make (name);
4198
4199 *input_line_pointer = endc;
4200
4201 sym = symbol_make (".bs");
4202 S_SET_SEGMENT (sym, now_seg);
4203 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4204 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4205 symbol_get_tc (sym)->output = 1;
252b5132 4206
809ffe0d 4207 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4208
4209 ppc_frob_label (sym);
4210
4211 ppc_current_block = sym;
4212
4213 demand_empty_rest_of_line ();
4214}
4215
4216/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4217
4218static void
98027b10 4219ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4220{
4221 symbolS *sym;
4222
4223 if (ppc_current_block == NULL)
4224 as_bad (_(".es without preceding .bs"));
4225
4226 sym = symbol_make (".es");
4227 S_SET_SEGMENT (sym, now_seg);
4228 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4229 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4230 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4231
4232 ppc_frob_label (sym);
4233
4234 ppc_current_block = NULL;
4235
4236 demand_empty_rest_of_line ();
4237}
4238
4239/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4240 line number. */
4241
4242static void
98027b10 4243ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4244{
4245 symbolS *sym;
4246
4247 sym = symbol_make (".bb");
4248 S_SET_SEGMENT (sym, text_section);
809ffe0d 4249 symbol_set_frag (sym, frag_now);
252b5132
RH		 4250 S_SET_VALUE (sym, frag_now_fix ());
4251 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4252
4253 S_SET_NUMBER_AUXILIARY (sym, 1);
4254 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4255
809ffe0d 4256 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4257
4258 SF_SET_PROCESS (sym);
4259
4260 ppc_frob_label (sym);
4261
4262 demand_empty_rest_of_line ();
4263}
4264
4265/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4266 line number. */
4267
4268static void
98027b10 4269ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4270{
4271 symbolS *sym;
4272
4273 sym = symbol_make (".eb");
4274 S_SET_SEGMENT (sym, text_section);
809ffe0d 4275 symbol_set_frag (sym, frag_now);
252b5132
RH		 4276 S_SET_VALUE (sym, frag_now_fix ());
4277 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4278 S_SET_NUMBER_AUXILIARY (sym, 1);
4279 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4280 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4281
4282 SF_SET_PROCESS (sym);
4283
4284 ppc_frob_label (sym);
4285
4286 demand_empty_rest_of_line ();
4287}
4288
4289/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4290 specified name. */
4291
4292static void
98027b10 4293ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4294{
4295 char *name;
4296 int len;
4297 symbolS *sym;
4298
4299 name = demand_copy_C_string (&len);
4300 sym = symbol_make (name);
4301 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4302 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4303 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4304 S_SET_VALUE (sym, 0);
809ffe0d 4305 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4306
4307 ppc_frob_label (sym);
4308
4309 demand_empty_rest_of_line ();
4310}
4311
4312/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4313
4314static void
98027b10 4315ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4316{
4317 symbolS *sym;
4318
4319 sym = symbol_make (".ec");
4320 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4321 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4322 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4323 S_SET_VALUE (sym, 0);
809ffe0d 4324 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4325
4326 ppc_frob_label (sym);
4327
4328 demand_empty_rest_of_line ();
4329}
4330
4331/* The .toc pseudo-op. Switch to the .toc subsegment. */
4332
4333static void
98027b10 4334ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4335{
4336 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4337 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4338 else
4339 {
4340 subsegT subseg;
4341 symbolS *sym;
4342 symbolS *list;
81d4177b 4343
252b5132
RH		 4344 subseg = ppc_data_subsegment;
4345 ++ppc_data_subsegment;
4346
4347 subseg_new (segment_name (data_section), subseg);
4348 ppc_toc_frag = frag_now;
4349
4350 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4351 symbol_set_frag (sym, frag_now);
252b5132
RH		 4352 S_SET_SEGMENT (sym, data_section);
4353 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4354 symbol_get_tc (sym)->subseg = subseg;
4355 symbol_get_tc (sym)->output = 1;
4356 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4357
4358 ppc_toc_csect = sym;
81d4177b 4359
252b5132 4360 for (list = ppc_data_csects;
809ffe0d
ILT		 4361 symbol_get_tc (list)->next != (symbolS *) NULL;
4362 list = symbol_get_tc (list)->next)
252b5132 4363 ;
809ffe0d 4364 symbol_get_tc (list)->next = sym;
252b5132
RH		 4365
4366 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4367 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4368 &symbol_lastP);
252b5132
RH		 4369 }
4370
4371 ppc_current_csect = ppc_toc_csect;
4372
4373 demand_empty_rest_of_line ();
4374}
4375
4376/* The AIX assembler automatically aligns the operands of a .long or
4377 .short pseudo-op, and we want to be compatible. */
4378
4379static void
98027b10 4380ppc_xcoff_cons (int log_size)
252b5132
RH		 4381{
4382 frag_align (log_size, 0, 0);
4383 record_alignment (now_seg, log_size);
4384 cons (1 << log_size);
4385}
4386
4387static void
98027b10 4388ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4389{
4390 expressionS exp;
4391 int byte_count;
4392
4393 (void) expression (&exp);
4394
4395 if (exp.X_op != O_constant)
4396 {
4397 as_bad (_("non-constant byte count"));
4398 return;
4399 }
4400
4401 byte_count = exp.X_add_number;
4402
4403 if (*input_line_pointer != ',')
4404 {
4405 as_bad (_("missing value"));
4406 return;
4407 }
4408
4409 ++input_line_pointer;
4410 cons (byte_count);
4411}
4412
85645aed
TG		 4413void
4414ppc_xcoff_end (void)
4415{
4416 int i;
4417
4418 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4419 {
4420 struct dw_section *dws = &dw_sections[i];
4421 struct dw_subsection *dwss;
4422
4423 if (dws->anon_subseg)
4424 {
4425 dwss = dws->anon_subseg;
4426 dwss->link = dws->list_subseg;
4427 }
4428 else
4429 dwss = dws->list_subseg;
4430
4431 for (; dwss != NULL; dwss = dwss->link)
4432 if (dwss->end_exp.X_add_symbol != NULL)
4433 {
4434 subseg_set (dws->sect, dwss->subseg);
4435 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4436 }
4437 }
4438}
4439
252b5132 4440#endif /* OBJ_XCOFF */
0baf16f2 4441#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4442\f
4443/* The .tc pseudo-op. This is used when generating either XCOFF or
4444 ELF. This takes two or more arguments.
4445
4446 When generating XCOFF output, the first argument is the name to
4447 give to this location in the toc; this will be a symbol with class
0baf16f2 4448 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4449 this location in the TOC; often there is just one more argument, a
1049f94e 4450 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4451 depends on target word size. A 32-bit target uses 4-byte values, a
4452 64-bit target uses 8-byte values.
252b5132
RH		 4453
4454 When not generating XCOFF output, the arguments are the same, but
4455 the first argument is simply ignored. */
4456
4457static void
98027b10 4458ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4459{
4460#ifdef OBJ_XCOFF
4461
4462 /* Define the TOC symbol name. */
4463 {
4464 char *name;
4465 char endc;
4466 symbolS *sym;
4467
4468 if (ppc_toc_csect == (symbolS *) NULL
4469 || ppc_toc_csect != ppc_current_csect)
4470 {
4471 as_bad (_(".tc not in .toc section"));
4472 ignore_rest_of_line ();
4473 return;
4474 }
4475
4476 name = input_line_pointer;
4477 endc = get_symbol_end ();
4478
4479 sym = symbol_find_or_make (name);
4480
4481 *input_line_pointer = endc;
4482
4483 if (S_IS_DEFINED (sym))
4484 {
4485 symbolS *label;
4486
809ffe0d 4487 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4488 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4489 {
4490 as_bad (_(".tc with no label"));
4491 ignore_rest_of_line ();
4492 return;
4493 }
4494
4495 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4496 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4497 S_SET_VALUE (label, S_GET_VALUE (sym));
4498
4499 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4500 ++input_line_pointer;
4501
4502 return;
4503 }
4504
4505 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4506 symbol_set_frag (sym, frag_now);
252b5132 4507 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4508 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4509 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4510
4511 ppc_frob_label (sym);
4512 }
4513
0baf16f2
AM		 4514#endif /* OBJ_XCOFF */
4515#ifdef OBJ_ELF
9c7977b3 4516 int align;
252b5132
RH		 4517
4518 /* Skip the TOC symbol name. */
4519 while (is_part_of_name (*input_line_pointer)
d13d4015 4520 || *input_line_pointer == ' '
252b5132
RH		 4521 || *input_line_pointer == '['
4522 || *input_line_pointer == ']'
4523 || *input_line_pointer == '{'
4524 || *input_line_pointer == '}')
4525 ++input_line_pointer;
4526
0baf16f2 4527 /* Align to a four/eight byte boundary. */
2b3c4602 4528 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4529 frag_align (align, 0, 0);
4530 record_alignment (now_seg, align);
0baf16f2 4531#endif /* OBJ_ELF */
252b5132
RH		 4532
4533 if (*input_line_pointer != ',')
4534 demand_empty_rest_of_line ();
4535 else
4536 {
4537 ++input_line_pointer;
2b3c4602 4538 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4539 }
4540}
0baf16f2
AM		 4541
4542/* Pseudo-op .machine. */
0baf16f2
AM		 4543
4544static void
98027b10 4545ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4546{
69c040df
AM		 4547 char *cpu_string;
4548#define MAX_HISTORY 100
fa452fa6 4549 static ppc_cpu_t *cpu_history;
69c040df
AM		 4550 static int curr_hist;
4551
4552 SKIP_WHITESPACE ();
4553
4554 if (*input_line_pointer == '"')
4555 {
4556 int len;
4557 cpu_string = demand_copy_C_string (&len);
4558 }
4559 else
4560 {
4561 char c;
4562 cpu_string = input_line_pointer;
4563 c = get_symbol_end ();
4564 cpu_string = xstrdup (cpu_string);
4565 *input_line_pointer = c;
4566 }
4567
4568 if (cpu_string != NULL)
4569 {
fa452fa6 4570 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4571 ppc_cpu_t new_cpu;
69c040df
AM		 4572 char *p;
4573
4574 for (p = cpu_string; *p != 0; p++)
4575 *p = TOLOWER (*p);
4576
4577 if (strcmp (cpu_string, "push") == 0)
4578 {
4579 if (cpu_history == NULL)
4580 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4581
4582 if (curr_hist >= MAX_HISTORY)
4583 as_bad (_(".machine stack overflow"));
4584 else
4585 cpu_history[curr_hist++] = ppc_cpu;
4586 }
4587 else if (strcmp (cpu_string, "pop") == 0)
4588 {
4589 if (curr_hist <= 0)
4590 as_bad (_(".machine stack underflow"));
4591 else
4592 ppc_cpu = cpu_history[--curr_hist];
4593 }
69fe9ce5
AM		 4594 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4595 ppc_cpu = new_cpu;
69c040df
AM		 4596 else
4597 as_bad (_("invalid machine `%s'"), cpu_string);
4598
4599 if (ppc_cpu != old_cpu)
4600 ppc_setup_opcodes ();
4601 }
4602
4603 demand_empty_rest_of_line ();
0baf16f2
AM		 4604}
4605
4606/* See whether a symbol is in the TOC section. */
4607
4608static int
98027b10 4609ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4610{
4611#ifdef OBJ_XCOFF
96d56e9f 4612 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4613#endif
4614#ifdef OBJ_ELF
4615 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4616 if (ppc_obj64)
0baf16f2
AM		 4617 return strcmp (sname, ".toc") == 0;
4618 else
4619 return strcmp (sname, ".got") == 0;
4620#endif
4621}
4622#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4623\f
4624#ifdef TE_PE
4625
99a814a1 4626/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4627
4628/* Set the current section. */
4629static void
98027b10 4630ppc_set_current_section (segT new)
252b5132
RH		 4631{
4632 ppc_previous_section = ppc_current_section;
4633 ppc_current_section = new;
4634}
4635
4636/* pseudo-op: .previous
4637 behaviour: toggles the current section with the previous section.
4638 errors: None
99a814a1
AM		 4639 warnings: "No previous section" */
4640
252b5132 4641static void
98027b10 4642ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4643{
4644 symbolS *tmp;
4645
81d4177b 4646 if (ppc_previous_section == NULL)
252b5132 4647 {
99a814a1 4648 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4649 return;
4650 }
4651
99a814a1 4652 subseg_set (ppc_previous_section, 0);
252b5132 4653
99a814a1 4654 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4655}
4656
4657/* pseudo-op: .pdata
4658 behaviour: predefined read only data section
b34976b6 4659 double word aligned
252b5132
RH		 4660 errors: None
4661 warnings: None
4662 initial: .section .pdata "adr3"
b34976b6 4663 a - don't know -- maybe a misprint
252b5132
RH		 4664 d - initialized data
4665 r - readable
4666 3 - double word aligned (that would be 4 byte boundary)
4667
4668 commentary:
4669 Tag index tables (also known as the function table) for exception
99a814a1 4670 handling, debugging, etc. */
252b5132 4671
252b5132 4672static void
98027b10 4673ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4674{
81d4177b 4675 if (pdata_section == 0)
252b5132
RH		 4676 {
4677 pdata_section = subseg_new (".pdata", 0);
81d4177b 4678
252b5132
RH		 4679 bfd_set_section_flags (stdoutput, pdata_section,
4680 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4681 | SEC_READONLY | SEC_DATA ));
81d4177b 4682
252b5132
RH		 4683 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4684 }
4685 else
4686 {
99a814a1 4687 pdata_section = subseg_new (".pdata", 0);
252b5132 4688 }
99a814a1 4689 ppc_set_current_section (pdata_section);
252b5132
RH		 4690}
4691
4692/* pseudo-op: .ydata
4693 behaviour: predefined read only data section
b34976b6 4694 double word aligned
252b5132
RH		 4695 errors: None
4696 warnings: None
4697 initial: .section .ydata "drw3"
b34976b6 4698 a - don't know -- maybe a misprint
252b5132
RH		 4699 d - initialized data
4700 r - readable
4701 3 - double word aligned (that would be 4 byte boundary)
4702 commentary:
4703 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4704 debugging, etc. */
4705
252b5132 4706static void
98027b10 4707ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4708{
81d4177b 4709 if (ydata_section == 0)
252b5132
RH		 4710 {
4711 ydata_section = subseg_new (".ydata", 0);
4712 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4713 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4714 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4715
4716 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4717 }
4718 else
4719 {
4720 ydata_section = subseg_new (".ydata", 0);
4721 }
99a814a1 4722 ppc_set_current_section (ydata_section);
252b5132
RH		 4723}
4724
4725/* pseudo-op: .reldata
4726 behaviour: predefined read write data section
b34976b6 4727 double word aligned (4-byte)
252b5132
RH		 4728 FIXME: relocation is applied to it
4729 FIXME: what's the difference between this and .data?
4730 errors: None
4731 warnings: None
4732 initial: .section .reldata "drw3"
4733 d - initialized data
4734 r - readable
4735 w - writeable
4736 3 - double word aligned (that would be 8 byte boundary)
4737
4738 commentary:
4739 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4740 function descriptors, etc. */
4741
252b5132 4742static void
98027b10 4743ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4744{
4745 if (reldata_section == 0)
4746 {
4747 reldata_section = subseg_new (".reldata", 0);
4748
4749 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4750 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4751 | SEC_DATA));
252b5132
RH		 4752
4753 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4754 }
4755 else
4756 {
4757 reldata_section = subseg_new (".reldata", 0);
4758 }
99a814a1 4759 ppc_set_current_section (reldata_section);
252b5132
RH		 4760}
4761
4762/* pseudo-op: .rdata
4763 behaviour: predefined read only data section
b34976b6 4764 double word aligned
252b5132
RH		 4765 errors: None
4766 warnings: None
4767 initial: .section .rdata "dr3"
4768 d - initialized data
4769 r - readable
99a814a1
AM		 4770 3 - double word aligned (that would be 4 byte boundary) */
4771
252b5132 4772static void
98027b10 4773ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4774{
4775 if (rdata_section == 0)
4776 {
4777 rdata_section = subseg_new (".rdata", 0);
4778 bfd_set_section_flags (stdoutput, rdata_section,
4779 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4780 | SEC_READONLY | SEC_DATA ));
4781
4782 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4783 }
4784 else
4785 {
4786 rdata_section = subseg_new (".rdata", 0);
4787 }
99a814a1 4788 ppc_set_current_section (rdata_section);
252b5132
RH		 4789}
4790
4791/* pseudo-op: .ualong
81d4177b 4792 behaviour: much like .int, with the exception that no alignment is
b34976b6 4793 performed.
252b5132
RH		 4794 FIXME: test the alignment statement
4795 errors: None
99a814a1
AM		 4796 warnings: None */
4797
252b5132 4798static void
98027b10 4799ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4800{
99a814a1
AM		 4801 /* Try for long. */
4802 cons (4);
252b5132
RH		 4803}
4804
4805/* pseudo-op: .znop <symbol name>
4806 behaviour: Issue a nop instruction
b34976b6 4807 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4808 the supplied symbol name.
4809 errors: None
99a814a1
AM		 4810 warnings: Missing symbol name */
4811
252b5132 4812static void
98027b10 4813ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4814{
4815 unsigned long insn;
4816 const struct powerpc_opcode *opcode;
4817 expressionS ex;
4818 char *f;
252b5132 4819 symbolS *sym;
252b5132
RH		 4820 char *symbol_name;
4821 char c;
4822 char *name;
4823 unsigned int exp;
4824 flagword flags;
4825 asection *sec;
4826
99a814a1 4827 /* Strip out the symbol name. */
252b5132
RH		 4828 symbol_name = input_line_pointer;
4829 c = get_symbol_end ();
4830
4831 name = xmalloc (input_line_pointer - symbol_name + 1);
4832 strcpy (name, symbol_name);
4833
4834 sym = symbol_find_or_make (name);
4835
4836 *input_line_pointer = c;
4837
4838 SKIP_WHITESPACE ();
4839
4840 /* Look up the opcode in the hash table. */
4841 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4842
99a814a1 4843 /* Stick in the nop. */
252b5132
RH		 4844 insn = opcode->opcode;
4845
4846 /* Write out the instruction. */
4847 f = frag_more (4);
4848 md_number_to_chars (f, insn, 4);
4849 fix_new (frag_now,
4850 f - frag_now->fr_literal,
4851 4,
4852 sym,
4853 0,
4854 0,
4855 BFD_RELOC_16_GOT_PCREL);
4856
4857}
4858
81d4177b
KH		 4859/* pseudo-op:
4860 behaviour:
4861 errors:
99a814a1
AM		 4862 warnings: */
4863
252b5132 4864static void
98027b10 4865ppc_pe_comm (int lcomm)
252b5132 4866{
98027b10
AM		 4867 char *name;
4868 char c;
4869 char *p;
252b5132 4870 offsetT temp;
98027b10 4871 symbolS *symbolP;
252b5132
RH		 4872 offsetT align;
4873
4874 name = input_line_pointer;
4875 c = get_symbol_end ();
4876
99a814a1 4877 /* just after name is now '\0'. */
252b5132
RH		 4878 p = input_line_pointer;
4879 *p = c;
4880 SKIP_WHITESPACE ();
4881 if (*input_line_pointer != ',')
4882 {
4883 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4884 ignore_rest_of_line ();
4885 return;
4886 }
4887
4888 input_line_pointer++; /* skip ',' */
4889 if ((temp = get_absolute_expression ()) < 0)
4890 {
4891 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4892 ignore_rest_of_line ();
4893 return;
4894 }
4895
4896 if (! lcomm)
4897 {
4898 /* The third argument to .comm is the alignment. */
4899 if (*input_line_pointer != ',')
4900 align = 3;
4901 else
4902 {
4903 ++input_line_pointer;
4904 align = get_absolute_expression ();
4905 if (align <= 0)
4906 {
4907 as_warn (_("ignoring bad alignment"));
4908 align = 3;
4909 }
4910 }
4911 }
4912
4913 *p = 0;
4914 symbolP = symbol_find_or_make (name);
4915
4916 *p = c;
4917 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4918 {
4919 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4920 S_GET_NAME (symbolP));
4921 ignore_rest_of_line ();
4922 return;
4923 }
4924
4925 if (S_GET_VALUE (symbolP))
4926 {
4927 if (S_GET_VALUE (symbolP) != (valueT) temp)
4928 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4929 S_GET_NAME (symbolP),
4930 (long) S_GET_VALUE (symbolP),
4931 (long) temp);
4932 }
4933 else
4934 {
4935 S_SET_VALUE (symbolP, (valueT) temp);
4936 S_SET_EXTERNAL (symbolP);
86ebace2 4937 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4938 }
4939
4940 demand_empty_rest_of_line ();
4941}
4942
4943/*
4944 * implement the .section pseudo op:
4945 * .section name {, "flags"}
4946 * ^ ^
4947 * | +--- optional flags: 'b' for bss
4948 * | 'i' for info
4949 * +-- section name 'l' for lib
4950 * 'n' for noload
4951 * 'o' for over
4952 * 'w' for data
4953 * 'd' (apparently m88k for data)
4954 * 'x' for text
4955 * But if the argument is not a quoted string, treat it as a
4956 * subsegment number.
4957 *
4958 * FIXME: this is a copy of the section processing from obj-coff.c, with
4959 * additions/changes for the moto-pas assembler support. There are three
4960 * categories:
4961 *
81d4177b 4962 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4963 * setting bits that bfd probably neither understands or uses. The
4964 * correct approach (?) will have to incorporate extra fields attached
4965 * to the section to hold the system specific stuff. (krk)
4966 *
4967 * Section Contents:
4968 * 'a' - unknown - referred to in documentation, but no definition supplied
4969 * 'c' - section has code
4970 * 'd' - section has initialized data
4971 * 'u' - section has uninitialized data
4972 * 'i' - section contains directives (info)
4973 * 'n' - section can be discarded
4974 * 'R' - remove section at link time
4975 *
4976 * Section Protection:
4977 * 'r' - section is readable
4978 * 'w' - section is writeable
4979 * 'x' - section is executable
4980 * 's' - section is sharable
4981 *
4982 * Section Alignment:
4983 * '0' - align to byte boundary
4984 * '1' - align to halfword undary
4985 * '2' - align to word boundary
4986 * '3' - align to doubleword boundary
4987 * '4' - align to quadword boundary
4988 * '5' - align to 32 byte boundary
4989 * '6' - align to 64 byte boundary
4990 *
4991 */
4992
4993void
98027b10 4994ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4995{
99a814a1 4996 /* Strip out the section name. */
252b5132
RH		 4997 char *section_name;
4998 char c;
4999 char *name;
5000 unsigned int exp;
5001 flagword flags;
5002 segT sec;
5003 int align;
5004
5005 section_name = input_line_pointer;
5006 c = get_symbol_end ();
5007
5008 name = xmalloc (input_line_pointer - section_name + 1);
5009 strcpy (name, section_name);
5010
5011 *input_line_pointer = c;
5012
5013 SKIP_WHITESPACE ();
5014
5015 exp = 0;
5016 flags = SEC_NO_FLAGS;
5017
5018 if (strcmp (name, ".idata$2") == 0)
5019 {
5020 align = 0;
5021 }
5022 else if (strcmp (name, ".idata$3") == 0)
5023 {
5024 align = 0;
5025 }
5026 else if (strcmp (name, ".idata$4") == 0)
5027 {
5028 align = 2;
5029 }
5030 else if (strcmp (name, ".idata$5") == 0)
5031 {
5032 align = 2;
5033 }
5034 else if (strcmp (name, ".idata$6") == 0)
5035 {
5036 align = 1;
5037 }
5038 else
99a814a1
AM		 5039 /* Default alignment to 16 byte boundary. */
5040 align = 4;
252b5132
RH		 5041
5042 if (*input_line_pointer == ',')
5043 {
5044 ++input_line_pointer;
5045 SKIP_WHITESPACE ();
5046 if (*input_line_pointer != '"')
5047 exp = get_absolute_expression ();
5048 else
5049 {
5050 ++input_line_pointer;
5051 while (*input_line_pointer != '"'
5052 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5053 {
5054 switch (*input_line_pointer)
5055 {
5056 /* Section Contents */
5057 case 'a': /* unknown */
5058 as_bad (_("Unsupported section attribute -- 'a'"));
5059 break;
5060 case 'c': /* code section */
81d4177b 5061 flags |= SEC_CODE;
252b5132
RH		 5062 break;
5063 case 'd': /* section has initialized data */
5064 flags |= SEC_DATA;
5065 break;
5066 case 'u': /* section has uninitialized data */
5067 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5068 in winnt.h */
5069 flags |= SEC_ROM;
5070 break;
5071 case 'i': /* section contains directives (info) */
5072 /* FIXME: This is IMAGE_SCN_LNK_INFO
5073 in winnt.h */
5074 flags |= SEC_HAS_CONTENTS;
5075 break;
5076 case 'n': /* section can be discarded */
81d4177b 5077 flags &=~ SEC_LOAD;
252b5132
RH		 5078 break;
5079 case 'R': /* Remove section at link time */
5080 flags |= SEC_NEVER_LOAD;
5081 break;
8d452c78 5082#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5083 /* Section Protection */
5084 case 'r': /* section is readable */
5085 flags |= IMAGE_SCN_MEM_READ;
5086 break;
5087 case 'w': /* section is writeable */
5088 flags |= IMAGE_SCN_MEM_WRITE;
5089 break;
5090 case 'x': /* section is executable */
5091 flags |= IMAGE_SCN_MEM_EXECUTE;
5092 break;
5093 case 's': /* section is sharable */
5094 flags |= IMAGE_SCN_MEM_SHARED;
5095 break;
5096
5097 /* Section Alignment */
5098 case '0': /* align to byte boundary */
5099 flags |= IMAGE_SCN_ALIGN_1BYTES;
5100 align = 0;
5101 break;
5102 case '1': /* align to halfword boundary */
5103 flags |= IMAGE_SCN_ALIGN_2BYTES;
5104 align = 1;
5105 break;
5106 case '2': /* align to word boundary */
5107 flags |= IMAGE_SCN_ALIGN_4BYTES;
5108 align = 2;
5109 break;
5110 case '3': /* align to doubleword boundary */
5111 flags |= IMAGE_SCN_ALIGN_8BYTES;
5112 align = 3;
5113 break;
5114 case '4': /* align to quadword boundary */
5115 flags |= IMAGE_SCN_ALIGN_16BYTES;
5116 align = 4;
5117 break;
5118 case '5': /* align to 32 byte boundary */
5119 flags |= IMAGE_SCN_ALIGN_32BYTES;
5120 align = 5;
5121 break;
5122 case '6': /* align to 64 byte boundary */
5123 flags |= IMAGE_SCN_ALIGN_64BYTES;
5124 align = 6;
5125 break;
8d452c78 5126#endif
252b5132 5127 default:
99a814a1
AM		 5128 as_bad (_("unknown section attribute '%c'"),
5129 *input_line_pointer);
252b5132
RH		 5130 break;
5131 }
5132 ++input_line_pointer;
5133 }
5134 if (*input_line_pointer == '"')
5135 ++input_line_pointer;
5136 }
5137 }
5138
5139 sec = subseg_new (name, (subsegT) exp);
5140
99a814a1 5141 ppc_set_current_section (sec);
252b5132
RH		 5142
5143 if (flags != SEC_NO_FLAGS)
5144 {
5145 if (! bfd_set_section_flags (stdoutput, sec, flags))
5146 as_bad (_("error setting flags for \"%s\": %s"),
5147 bfd_section_name (stdoutput, sec),
5148 bfd_errmsg (bfd_get_error ()));
5149 }
5150
99a814a1 5151 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5152}
5153
5154static void
98027b10 5155ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5156{
5157 char *name;
5158 char endc;
5159 symbolS *ext_sym;
5160
5161 name = input_line_pointer;
5162 endc = get_symbol_end ();
5163
5164 ext_sym = symbol_find_or_make (name);
5165
5166 *input_line_pointer = endc;
5167
5168 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5169 SF_SET_FUNCTION (ext_sym);
5170 SF_SET_PROCESS (ext_sym);
5171 coff_add_linesym (ext_sym);
5172
5173 demand_empty_rest_of_line ();
5174}
5175
5176static void
98027b10 5177ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5178{
5179 if (tocdata_section == 0)
5180 {
5181 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5182 /* FIXME: section flags won't work. */
252b5132
RH		 5183 bfd_set_section_flags (stdoutput, tocdata_section,
5184 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5185 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5186
5187 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5188 }
5189 else
5190 {
5191 rdata_section = subseg_new (".tocd", 0);
5192 }
5193
99a814a1 5194 ppc_set_current_section (tocdata_section);
252b5132
RH		 5195
5196 demand_empty_rest_of_line ();
5197}
5198
5199/* Don't adjust TOC relocs to use the section symbol. */
5200
5201int
98027b10 5202ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5203{
5204 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5205}
5206
5207#endif
5208\f
5209#ifdef OBJ_XCOFF
5210
5211/* XCOFF specific symbol and file handling. */
5212
5213/* Canonicalize the symbol name. We use the to force the suffix, if
5214 any, to use square brackets, and to be in upper case. */
5215
5216char *
98027b10 5217ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5218{
5219 char *s;
5220
5221 if (ppc_stab_symbol)
5222 return name;
5223
5224 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5225 ;
5226 if (*s != '\0')
5227 {
5228 char brac;
5229
5230 if (*s == '[')
5231 brac = ']';
5232 else
5233 {
5234 *s = '[';
5235 brac = '}';
5236 }
5237
5238 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5239 *s = TOUPPER (*s);
252b5132
RH		 5240
5241 if (*s == '\0' || s[1] != '\0')
5242 as_bad (_("bad symbol suffix"));
5243
5244 *s = ']';
5245 }
5246
5247 return name;
5248}
5249
5250/* Set the class of a symbol based on the suffix, if any. This is
5251 called whenever a new symbol is created. */
5252
5253void
98027b10 5254ppc_symbol_new_hook (symbolS *sym)
252b5132 5255{
809ffe0d 5256 struct ppc_tc_sy *tc;
252b5132
RH		 5257 const char *s;
5258
809ffe0d
ILT		 5259 tc = symbol_get_tc (sym);
5260 tc->next = NULL;
5261 tc->output = 0;
96d56e9f 5262 tc->symbol_class = -1;
809ffe0d
ILT		 5263 tc->real_name = NULL;
5264 tc->subseg = 0;
5265 tc->align = 0;
85645aed
TG		 5266 tc->u.size = NULL;
5267 tc->u.dw = NULL;
809ffe0d 5268 tc->within = NULL;
252b5132
RH		 5269
5270 if (ppc_stab_symbol)
5271 return;
5272
5273 s = strchr (S_GET_NAME (sym), '[');
5274 if (s == (const char *) NULL)
5275 {
5276 /* There is no suffix. */
5277 return;
5278 }
5279
5280 ++s;
5281
5282 switch (s[0])
5283 {
5284 case 'B':
5285 if (strcmp (s, "BS]") == 0)
96d56e9f 5286 tc->symbol_class = XMC_BS;
252b5132
RH		 5287 break;
5288 case 'D':
5289 if (strcmp (s, "DB]") == 0)
96d56e9f 5290 tc->symbol_class = XMC_DB;
252b5132 5291 else if (strcmp (s, "DS]") == 0)
96d56e9f 5292 tc->symbol_class = XMC_DS;
252b5132
RH		 5293 break;
5294 case 'G':
5295 if (strcmp (s, "GL]") == 0)
96d56e9f 5296 tc->symbol_class = XMC_GL;
252b5132
RH		 5297 break;
5298 case 'P':
5299 if (strcmp (s, "PR]") == 0)
96d56e9f 5300 tc->symbol_class = XMC_PR;
252b5132
RH		 5301 break;
5302 case 'R':
5303 if (strcmp (s, "RO]") == 0)
96d56e9f 5304 tc->symbol_class = XMC_RO;
252b5132 5305 else if (strcmp (s, "RW]") == 0)
96d56e9f 5306 tc->symbol_class = XMC_RW;
252b5132
RH		 5307 break;
5308 case 'S':
5309 if (strcmp (s, "SV]") == 0)
96d56e9f 5310 tc->symbol_class = XMC_SV;
252b5132
RH		 5311 break;
5312 case 'T':
5313 if (strcmp (s, "TC]") == 0)
96d56e9f 5314 tc->symbol_class = XMC_TC;
252b5132 5315 else if (strcmp (s, "TI]") == 0)
96d56e9f 5316 tc->symbol_class = XMC_TI;
252b5132 5317 else if (strcmp (s, "TB]") == 0)
96d56e9f 5318 tc->symbol_class = XMC_TB;
252b5132 5319 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5320 tc->symbol_class = XMC_TC0;
252b5132
RH		 5321 break;
5322 case 'U':
5323 if (strcmp (s, "UA]") == 0)
96d56e9f 5324 tc->symbol_class = XMC_UA;
252b5132 5325 else if (strcmp (s, "UC]") == 0)
96d56e9f 5326 tc->symbol_class = XMC_UC;
252b5132
RH		 5327 break;
5328 case 'X':
5329 if (strcmp (s, "XO]") == 0)
96d56e9f 5330 tc->symbol_class = XMC_XO;
252b5132
RH		 5331 break;
5332 }
5333
96d56e9f 5334 if (tc->symbol_class == -1)
252b5132
RH		 5335 as_bad (_("Unrecognized symbol suffix"));
5336}
5337
5338/* Set the class of a label based on where it is defined. This
5339 handles symbols without suffixes. Also, move the symbol so that it
5340 follows the csect symbol. */
5341
5342void
98027b10 5343ppc_frob_label (symbolS *sym)
252b5132
RH		 5344{
5345 if (ppc_current_csect != (symbolS *) NULL)
5346 {
96d56e9f
NC		 5347 if (symbol_get_tc (sym)->symbol_class == -1)
5348 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5349
5350 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5351 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5352 &symbol_rootP, &symbol_lastP);
5353 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 5354 }
07a53e5c
RH		 5355
5356#ifdef OBJ_ELF
5357 dwarf2_emit_label (sym);
5358#endif
252b5132
RH		 5359}
5360
5361/* This variable is set by ppc_frob_symbol if any absolute symbols are
5362 seen. It tells ppc_adjust_symtab whether it needs to look through
5363 the symbols. */
5364
b34976b6 5365static bfd_boolean ppc_saw_abs;
252b5132
RH		 5366
5367/* Change the name of a symbol just before writing it out. Set the
5368 real name if the .rename pseudo-op was used. Otherwise, remove any
5369 class suffix. Return 1 if the symbol should not be included in the
5370 symbol table. */
5371
5372int
98027b10 5373ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5374{
5375 static symbolS *ppc_last_function;
5376 static symbolS *set_end;
5377
5378 /* Discard symbols that should not be included in the output symbol
5379 table. */
809ffe0d
ILT		 5380 if (! symbol_used_in_reloc_p (sym)
5381 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5382 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5383 && ! symbol_get_tc (sym)->output
252b5132
RH		 5384 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5385 return 1;
5386
a161fe53
AM		 5387 /* This one will disappear anyway. Don't make a csect sym for it. */
5388 if (sym == abs_section_sym)
5389 return 1;
5390
809ffe0d
ILT		 5391 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5392 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5393 else
5394 {
5395 const char *name;
5396 const char *s;
5397
5398 name = S_GET_NAME (sym);
5399 s = strchr (name, '[');
5400 if (s != (char *) NULL)
5401 {
5402 unsigned int len;
5403 char *snew;
5404
5405 len = s - name;
5406 snew = xmalloc (len + 1);
5407 memcpy (snew, name, len);
5408 snew[len] = '\0';
5409
5410 S_SET_NAME (sym, snew);
5411 }
5412 }
5413
5414 if (set_end != (symbolS *) NULL)
5415 {
5416 SA_SET_SYM_ENDNDX (set_end, sym);
5417 set_end = NULL;
5418 }
5419
5420 if (SF_GET_FUNCTION (sym))
5421 {
5422 if (ppc_last_function != (symbolS *) NULL)
5423 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5424 ppc_last_function = sym;
85645aed 5425 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5426 {
85645aed 5427 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5428 SA_SET_SYM_FSIZE (sym,
85645aed 5429 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5430 }
5431 }
5432 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5433 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5434 {
5435 if (ppc_last_function == (symbolS *) NULL)
5436 as_bad (_(".ef with no preceding .function"));
5437 else
5438 {
5439 set_end = ppc_last_function;
5440 ppc_last_function = NULL;
5441
5442 /* We don't have a C_EFCN symbol, but we need to force the
5443 COFF backend to believe that it has seen one. */
5444 coff_last_function = NULL;
5445 }
5446 }
5447
670ec21d 5448 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5449 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5450 && S_GET_STORAGE_CLASS (sym) != C_FILE
5451 && S_GET_STORAGE_CLASS (sym) != C_FCN
5452 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5453 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5454 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5455 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5456 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5457 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5458 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5459
5460 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5461 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5462 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5463 {
5464 int i;
5465 union internal_auxent *a;
5466
5467 /* Create a csect aux. */
5468 i = S_GET_NUMBER_AUXILIARY (sym);
5469 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5470 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5471 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5472 {
5473 /* This is the TOC table. */
5474 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5475 a->x_csect.x_scnlen.l = 0;
5476 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5477 }
809ffe0d 5478 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5479 {
5480 /* This is a csect symbol. x_scnlen is the size of the
5481 csect. */
809ffe0d 5482 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5483 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5484 S_GET_SEGMENT (sym))
5485 - S_GET_VALUE (sym));
5486 else
5487 {
6386f3a7 5488 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5489 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5490 - S_GET_VALUE (sym));
5491 }
809ffe0d 5492 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5493 }
5494 else if (S_GET_SEGMENT (sym) == bss_section)
5495 {
5496 /* This is a common symbol. */
809ffe0d
ILT		 5497 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5498 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5499 if (S_IS_EXTERNAL (sym))
96d56e9f 5500 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5501 else
96d56e9f 5502 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5503 }
5504 else if (S_GET_SEGMENT (sym) == absolute_section)
5505 {
5506 /* This is an absolute symbol. The csect will be created by
99a814a1 5507 ppc_adjust_symtab. */
b34976b6 5508 ppc_saw_abs = TRUE;
252b5132 5509 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5510 if (symbol_get_tc (sym)->symbol_class == -1)
5511 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5512 }
5513 else if (! S_IS_DEFINED (sym))
5514 {
5515 /* This is an external symbol. */
5516 a->x_csect.x_scnlen.l = 0;
5517 a->x_csect.x_smtyp = XTY_ER;
5518 }
96d56e9f 5519 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5520 {
5521 symbolS *next;
5522
5523 /* This is a TOC definition. x_scnlen is the size of the
5524 TOC entry. */
5525 next = symbol_next (sym);
96d56e9f 5526 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5527 next = symbol_next (next);
5528 if (next == (symbolS *) NULL
96d56e9f 5529 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5530 {
5531 if (ppc_after_toc_frag == (fragS *) NULL)
5532 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5533 data_section)
5534 - S_GET_VALUE (sym));
5535 else
5536 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5537 - S_GET_VALUE (sym));
5538 }
5539 else
5540 {
6386f3a7 5541 resolve_symbol_value (next);
252b5132
RH		 5542 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5543 - S_GET_VALUE (sym));
5544 }
5545 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5546 }
5547 else
5548 {
5549 symbolS *csect;
5550
5551 /* This is a normal symbol definition. x_scnlen is the
5552 symbol index of the containing csect. */
5553 if (S_GET_SEGMENT (sym) == text_section)
5554 csect = ppc_text_csects;
5555 else if (S_GET_SEGMENT (sym) == data_section)
5556 csect = ppc_data_csects;
5557 else
5558 abort ();
5559
5560 /* Skip the initial dummy symbol. */
809ffe0d 5561 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5562
5563 if (csect == (symbolS *) NULL)
5564 {
5565 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5566 a->x_csect.x_scnlen.l = 0;
5567 }
5568 else
5569 {
809ffe0d 5570 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5571 {
6386f3a7 5572 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5573 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5574 > S_GET_VALUE (sym))
252b5132 5575 break;
809ffe0d 5576 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5577 }
5578
809ffe0d
ILT		 5579 a->x_csect.x_scnlen.p =
5580 coffsymbol (symbol_get_bfdsym (csect))->native;
5581 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5582 1;
252b5132
RH		 5583 }
5584 a->x_csect.x_smtyp = XTY_LD;
5585 }
81d4177b 5586
252b5132
RH		 5587 a->x_csect.x_parmhash = 0;
5588 a->x_csect.x_snhash = 0;
96d56e9f 5589 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5590 a->x_csect.x_smclas = XMC_PR;
5591 else
96d56e9f 5592 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5593 a->x_csect.x_stab = 0;
5594 a->x_csect.x_snstab = 0;
5595
5596 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5597 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5598 }
5599 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5600 {
5601 /* We want the value to be the symbol index of the referenced
5602 csect symbol. BFD will do that for us if we set the right
5603 flags. */
b782de16
AM		 5604 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5605 combined_entry_type *c = coffsymbol (bsym)->native;
5606
5607 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5608 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5609 }
5610 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5611 {
5612 symbolS *block;
c734e7e3 5613 valueT base;
252b5132 5614
809ffe0d 5615 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5616 if (block)
5617 {
5618 /* The value is the offset from the enclosing csect. */
5619 symbolS *csect;
5620
5621 csect = symbol_get_tc (block)->within;
5622 resolve_symbol_value (csect);
5623 base = S_GET_VALUE (csect);
5624 }
5625 else
5626 base = 0;
5627
5628 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 5629 }
5630 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5631 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5632 {
5633 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5634 BFD will do that for us if we set the right flags. We have
5635 already set the value correctly. */
809ffe0d 5636 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5637 }
5638
5639 return 0;
5640}
5641
5642/* Adjust the symbol table. This creates csect symbols for all
5643 absolute symbols. */
5644
5645void
98027b10 5646ppc_adjust_symtab (void)
252b5132
RH		 5647{
5648 symbolS *sym;
5649
5650 if (! ppc_saw_abs)
5651 return;
5652
5653 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5654 {
5655 symbolS *csect;
5656 int i;
5657 union internal_auxent *a;
5658
5659 if (S_GET_SEGMENT (sym) != absolute_section)
5660 continue;
5661
5662 csect = symbol_create (".abs[XO]", absolute_section,
5663 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5664 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5665 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5666 i = S_GET_NUMBER_AUXILIARY (csect);
5667 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5668 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5669 a->x_csect.x_scnlen.l = 0;
5670 a->x_csect.x_smtyp = XTY_SD;
5671 a->x_csect.x_parmhash = 0;
5672 a->x_csect.x_snhash = 0;
5673 a->x_csect.x_smclas = XMC_XO;
5674 a->x_csect.x_stab = 0;
5675 a->x_csect.x_snstab = 0;
5676
5677 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5678
5679 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5680 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5681 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5682 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5683 }
5684
b34976b6 5685 ppc_saw_abs = FALSE;
252b5132
RH		 5686}
5687
5688/* Set the VMA for a section. This is called on all the sections in
5689 turn. */
5690
5691void
98027b10 5692ppc_frob_section (asection *sec)
252b5132 5693{
931e13a6 5694 static bfd_vma vma = 0;
252b5132 5695
85645aed
TG		 5696 /* Dwarf sections start at 0. */
5697 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
5698 return;
5699
931e13a6 5700 vma = md_section_align (sec, vma);
252b5132
RH		 5701 bfd_set_section_vma (stdoutput, sec, vma);
5702 vma += bfd_section_size (stdoutput, sec);
5703}
5704
5705#endif /* OBJ_XCOFF */
5706\f
252b5132 5707char *
98027b10 5708md_atof (int type, char *litp, int *sizep)
252b5132 5709{
499ac353 5710 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5711}
5712
5713/* Write a value out to the object file, using the appropriate
5714 endianness. */
5715
5716void
98027b10 5717md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5718{
5719 if (target_big_endian)
5720 number_to_chars_bigendian (buf, val, n);
5721 else
5722 number_to_chars_littleendian (buf, val, n);
5723}
5724
5725/* Align a section (I don't know why this is machine dependent). */
5726
5727valueT
3aeeedbb 5728md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5729{
3aeeedbb
AM		 5730#ifdef OBJ_ELF
5731 return addr;
5732#else
252b5132
RH		 5733 int align = bfd_get_section_alignment (stdoutput, seg);
5734
5735 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5736#endif
252b5132
RH		 5737}
5738
5739/* We don't have any form of relaxing. */
5740
5741int
98027b10
AM		 5742md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5743 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5744{
5745 abort ();
5746 return 0;
5747}
5748
5749/* Convert a machine dependent frag. We never generate these. */
5750
5751void
98027b10
AM		 5752md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5753 asection *sec ATTRIBUTE_UNUSED,
5754 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5755{
5756 abort ();
5757}
5758
5759/* We have no need to default values of symbols. */
5760
252b5132 5761symbolS *
98027b10 5762md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5763{
5764 return 0;
5765}
5766\f
5767/* Functions concerning relocs. */
5768
5769/* The location from which a PC relative jump should be calculated,
5770 given a PC relative reloc. */
5771
5772long
98027b10 5773md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5774{
5775 return fixp->fx_frag->fr_address + fixp->fx_where;
5776}
5777
5778#ifdef OBJ_XCOFF
5779
5780/* This is called to see whether a fixup should be adjusted to use a
5781 section symbol. We take the opportunity to change a fixup against
5782 a symbol in the TOC subsegment into a reloc against the
5783 corresponding .tc symbol. */
5784
5785int
98027b10 5786ppc_fix_adjustable (fixS *fix)
252b5132 5787{
b782de16
AM		 5788 valueT val = resolve_symbol_value (fix->fx_addsy);
5789 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5790 TC_SYMFIELD_TYPE *tc;
5791
5792 if (symseg == absolute_section)
5793 return 0;
252b5132 5794
85645aed
TG		 5795 /* Always adjust symbols in debugging sections. */
5796 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
5797 return 1;
5798
252b5132 5799 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5800 && fix->fx_addsy != ppc_toc_csect
b782de16 5801 && symseg == data_section
252b5132
RH		 5802 && val >= ppc_toc_frag->fr_address
5803 && (ppc_after_toc_frag == (fragS *) NULL
5804 || val < ppc_after_toc_frag->fr_address))
5805 {
5806 symbolS *sy;
5807
5808 for (sy = symbol_next (ppc_toc_csect);
5809 sy != (symbolS *) NULL;
5810 sy = symbol_next (sy))
5811 {
b782de16
AM		 5812 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5813
96d56e9f 5814 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5815 continue;
96d56e9f 5816 if (sy_tc->symbol_class != XMC_TC)
252b5132 5817 break;
b782de16 5818 if (val == resolve_symbol_value (sy))
252b5132
RH		 5819 {
5820 fix->fx_addsy = sy;
5821 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5822 return 0;
5823 }
5824 }
5825
5826 as_bad_where (fix->fx_file, fix->fx_line,
5827 _("symbol in .toc does not match any .tc"));
5828 }
5829
5830 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5831 tc = symbol_get_tc (fix->fx_addsy);
5832 if (tc->subseg == 0
96d56e9f
NC		 5833 && tc->symbol_class != XMC_TC0
5834 && tc->symbol_class != XMC_TC
b782de16 5835 && symseg != bss_section
252b5132 5836 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5837 && (symseg != data_section
252b5132
RH		 5838 || ppc_toc_csect == NULL
5839 || val < ppc_toc_frag->fr_address
5840 || (ppc_after_toc_frag != NULL
5841 && val >= ppc_after_toc_frag->fr_address)))
5842 {
5843 symbolS *csect;
b782de16 5844 symbolS *next_csect;
252b5132 5845
b782de16 5846 if (symseg == text_section)
252b5132 5847 csect = ppc_text_csects;
b782de16 5848 else if (symseg == data_section)
252b5132
RH		 5849 csect = ppc_data_csects;
5850 else
5851 abort ();
5852
5853 /* Skip the initial dummy symbol. */
809ffe0d 5854 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5855
5856 if (csect != (symbolS *) NULL)
5857 {
b782de16
AM		 5858 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5859 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5860 {
5861 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5862 have to look through the full symbol table to see
5863 whether this is the csect we want. Note that we will
5864 only get here if the csect has zero length. */
b782de16
AM		 5865 if (symbol_get_frag (csect)->fr_address == val
5866 && S_GET_VALUE (csect) == val)
252b5132
RH		 5867 {
5868 symbolS *scan;
5869
809ffe0d 5870 for (scan = symbol_next (csect);
252b5132 5871 scan != NULL;
809ffe0d 5872 scan = symbol_next (scan))
252b5132 5873 {
809ffe0d 5874 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5875 break;
5876 if (scan == fix->fx_addsy)
5877 break;
5878 }
5879
5880 /* If we found the symbol before the next csect
99a814a1 5881 symbol, then this is the csect we want. */
252b5132
RH		 5882 if (scan == fix->fx_addsy)
5883 break;
5884 }
5885
b782de16 5886 csect = next_csect;
252b5132
RH		 5887 }
5888
b782de16 5889 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5890 fix->fx_addsy = csect;
5891 }
b782de16 5892 return 0;
252b5132
RH		 5893 }
5894
5895 /* Adjust a reloc against a .lcomm symbol to be against the base
5896 .lcomm. */
b782de16 5897 if (symseg == bss_section
252b5132
RH		 5898 && ! S_IS_EXTERNAL (fix->fx_addsy))
5899 {
b782de16
AM		 5900 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5901
5902 fix->fx_offset += val - resolve_symbol_value (sy);
5903 fix->fx_addsy = sy;
252b5132
RH		 5904 }
5905
5906 return 0;
5907}
5908
5909/* A reloc from one csect to another must be kept. The assembler
5910 will, of course, keep relocs between sections, and it will keep
5911 absolute relocs, but we need to force it to keep PC relative relocs
5912 between two csects in the same section. */
5913
5914int
98027b10 5915ppc_force_relocation (fixS *fix)
252b5132
RH		 5916{
5917 /* At this point fix->fx_addsy should already have been converted to
5918 a csect symbol. If the csect does not include the fragment, then
5919 we need to force the relocation. */
5920 if (fix->fx_pcrel
5921 && fix->fx_addsy != NULL
809ffe0d
ILT		 5922 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5923 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5924 > fix->fx_frag->fr_address)
5925 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5926 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5927 <= fix->fx_frag->fr_address))))
5928 return 1;
5929
ae6063d4 5930 return generic_force_reloc (fix);
252b5132
RH		 5931}
5932
5933#endif /* OBJ_XCOFF */
5934
0baf16f2 5935#ifdef OBJ_ELF
a161fe53
AM		 5936/* If this function returns non-zero, it guarantees that a relocation
5937 will be emitted for a fixup. */
5938
5939int
98027b10 5940ppc_force_relocation (fixS *fix)
a161fe53
AM		 5941{
5942 /* Branch prediction relocations must force a relocation, as must
5943 the vtable description relocs. */
5944 switch (fix->fx_r_type)
5945 {
5946 case BFD_RELOC_PPC_B16_BRTAKEN:
5947 case BFD_RELOC_PPC_B16_BRNTAKEN:
5948 case BFD_RELOC_PPC_BA16_BRTAKEN:
5949 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5950 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5951 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5952 return 1;
5953 default:
5954 break;
5955 }
5956
cdba85ec
AM		 5957 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5958 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5959 return 1;
5960
ae6063d4 5961 return generic_force_reloc (fix);
a161fe53
AM		 5962}
5963
0baf16f2 5964int
98027b10 5965ppc_fix_adjustable (fixS *fix)
252b5132 5966{
0baf16f2
AM		 5967 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5968 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5969 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5970 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 5971 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
5972 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 5973 && fix->fx_r_type != BFD_RELOC_GPREL16
5974 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5975 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5976 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5977 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5978}
0baf16f2 5979#endif
252b5132 5980
3aeeedbb
AM		 5981/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5982 rs_align_code frag. */
5983
5984void
5985ppc_handle_align (struct frag *fragP)
5986{
5987 valueT count = (fragP->fr_next->fr_address
5988 - (fragP->fr_address + fragP->fr_fix));
5989
5990 if (count != 0 && (count & 3) == 0)
5991 {
5992 char *dest = fragP->fr_literal + fragP->fr_fix;
5993
5994 fragP->fr_var = 4;
cef4f754
AM		 5995
5996 if (count > 4 * nop_limit && count < 0x2000000)
5997 {
5998 struct frag *rest;
5999
6000 /* Make a branch, then follow with nops. Insert another
6001 frag to handle the nops. */
6002 md_number_to_chars (dest, 0x48000000 + count, 4);
6003 count -= 4;
6004 if (count == 0)
6005 return;
6006
6007 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6008 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6009 fragP->fr_next = rest;
6010 fragP = rest;
6011 rest->fr_address += rest->fr_fix + 4;
6012 rest->fr_fix = 0;
6013 /* If we leave the next frag as rs_align_code we'll come here
6014 again, resulting in a bunch of branches rather than a
6015 branch followed by nops. */
6016 rest->fr_type = rs_align;
6017 dest = rest->fr_literal;
6018 }
6019
3aeeedbb
AM		 6020 md_number_to_chars (dest, 0x60000000, 4);
6021
42240548
PB		 6022 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6023 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 6024 {
42240548
PB		 6025 /* For power6 and power7, we want the last nop to be a group
6026 terminating one. Do this by inserting an rs_fill frag immediately
6027 after this one, with its address set to the last nop location.
6028 This will automatically reduce the number of nops in the current
6029 frag by one. */
3aeeedbb
AM		 6030 if (count > 4)
6031 {
6032 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6033
6034 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6035 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6036 group_nop->fr_fix = 0;
6037 group_nop->fr_offset = 1;
6038 group_nop->fr_type = rs_fill;
6039 fragP->fr_next = group_nop;
6040 dest = group_nop->fr_literal;
6041 }
6042
42240548
PB		 6043 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
6044 /* power7 group terminating nop: "ori 2,2,0". */
6045 md_number_to_chars (dest, 0x60420000, 4);
6046 else
6047 /* power6 group terminating nop: "ori 1,1,0". */
6048 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6049 }
6050 }
6051}
6052
252b5132
RH		 6053/* Apply a fixup to the object code. This is called for all the
6054 fixups we generated by the call to fix_new_exp, above. In the call
6055 above we used a reloc code which was the largest legal reloc code
6056 plus the operand index. Here we undo that to recover the operand
6057 index. At this point all symbol values should be fully resolved,
6058 and we attempt to completely resolve the reloc. If we can not do
6059 that, we determine the correct reloc code and put it back in the
6060 fixup. */
6061
94f592af 6062void
98027b10 6063md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 6064{
94f592af 6065 valueT value = * valP;
252b5132
RH		 6066
6067#ifdef OBJ_ELF
94f592af 6068 if (fixP->fx_addsy != NULL)
252b5132 6069 {
a161fe53 6070 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6071 if (fixP->fx_pcrel)
6072 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 6073 }
6074 else
94f592af 6075 fixP->fx_done = 1;
252b5132 6076#else
a161fe53 6077 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6078 the symbol values. If we are doing this relocation the code in
6079 write.c is going to call bfd_install_relocation, which is also
6080 going to use the symbol value. That means that if the reloc is
6081 fully resolved we want to use *valP since bfd_install_relocation is
6082 not being used.
9f0eb232
RS		 6083 However, if the reloc is not fully resolved we do not want to
6084 use *valP, and must use fx_offset instead. If the relocation
6085 is PC-relative, we then need to re-apply md_pcrel_from_section
6086 to this new relocation value. */
94f592af
NC		 6087 if (fixP->fx_addsy == (symbolS *) NULL)
6088 fixP->fx_done = 1;
6089
252b5132 6090 else
9f0eb232
RS		 6091 {
6092 value = fixP->fx_offset;
6093 if (fixP->fx_pcrel)
6094 value -= md_pcrel_from_section (fixP, seg);
6095 }
a161fe53
AM		 6096#endif
6097
6098 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6099 {
a161fe53
AM		 6100 /* We can't actually support subtracting a symbol. */
6101 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6102 }
252b5132 6103
94f592af 6104 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 6105 {
6106 int opindex;
6107 const struct powerpc_operand *operand;
6108 char *where;
6109 unsigned long insn;
6110
94f592af 6111 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 6112
6113 operand = &powerpc_operands[opindex];
6114
6115#ifdef OBJ_XCOFF
0baf16f2
AM		 6116 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6117 does not generate a reloc. It uses the offset of `sym' within its
6118 csect. Other usages, such as `.long sym', generate relocs. This
6119 is the documented behaviour of non-TOC symbols. */
252b5132 6120 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6121 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6122 && operand->shift == 0
2b3c4602 6123 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6124 && fixP->fx_addsy != NULL
6125 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6126 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6127 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6128 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6129 {
94f592af
NC		 6130 value = fixP->fx_offset;
6131 fixP->fx_done = 1;
252b5132
RH		 6132 }
6133#endif
6134
6135 /* Fetch the instruction, insert the fully resolved operand
6136 value, and stuff the instruction back again. */
94f592af 6137 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 6138 if (target_big_endian)
6139 insn = bfd_getb32 ((unsigned char *) where);
6140 else
6141 insn = bfd_getl32 ((unsigned char *) where);
6142 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 6143 fixP->tc_fix_data.ppc_cpu,
94f592af 6144 fixP->fx_file, fixP->fx_line);
252b5132
RH		 6145 if (target_big_endian)
6146 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6147 else
6148 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6149
94f592af
NC		 6150 if (fixP->fx_done)
6151 /* Nothing else to do here. */
6152 return;
252b5132 6153
9c2799c2 6154 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 6155
252b5132
RH		 6156 /* Determine a BFD reloc value based on the operand information.
6157 We are only prepared to turn a few of the operands into
0baf16f2 6158 relocs. */
11b37b7b 6159 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 6160 && operand->bitm == 0x3fffffc
11b37b7b 6161 && operand->shift == 0)
94f592af 6162 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 6163 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 6164 && operand->bitm == 0xfffc
11b37b7b 6165 && operand->shift == 0)
95210096
AM		 6166 {
6167 fixP->fx_r_type = BFD_RELOC_PPC_B16;
6168#ifdef OBJ_XCOFF
6169 fixP->fx_size = 2;
6170 if (target_big_endian)
6171 fixP->fx_where += 2;
6172#endif
6173 }
11b37b7b 6174 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 6175 && operand->bitm == 0x3fffffc
11b37b7b 6176 && operand->shift == 0)
94f592af 6177 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 6178 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 6179 && operand->bitm == 0xfffc
11b37b7b 6180 && operand->shift == 0)
95210096
AM		 6181 {
6182 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
6183#ifdef OBJ_XCOFF
6184 fixP->fx_size = 2;
6185 if (target_big_endian)
6186 fixP->fx_where += 2;
6187#endif
6188 }
0baf16f2 6189#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 6190 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6191 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 6192 && operand->shift == 0)
11b37b7b 6193 {
a7fc733f
AM		 6194 if (ppc_is_toc_sym (fixP->fx_addsy))
6195 {
6196 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 6197#ifdef OBJ_ELF
a7fc733f
AM		 6198 if (ppc_obj64
6199 && (operand->flags & PPC_OPERAND_DS) != 0)
6200 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
6201#endif
6202 }
6203 else
6204 {
6205 fixP->fx_r_type = BFD_RELOC_16;
6206#ifdef OBJ_ELF
6207 if (ppc_obj64
6208 && (operand->flags & PPC_OPERAND_DS) != 0)
6209 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 6210#endif
a7fc733f 6211 }
94f592af 6212 fixP->fx_size = 2;
11b37b7b 6213 if (target_big_endian)
94f592af 6214 fixP->fx_where += 2;
11b37b7b 6215 }
0baf16f2 6216#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 6217 else
252b5132
RH		 6218 {
6219 char *sfile;
6220 unsigned int sline;
6221
6222 /* Use expr_symbol_where to see if this is an expression
0baf16f2 6223 symbol. */
94f592af
NC		 6224 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6225 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 6226 _("unresolved expression that must be resolved"));
6227 else
94f592af 6228 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 6229 _("unsupported relocation against %s"),
94f592af
NC		 6230 S_GET_NAME (fixP->fx_addsy));
6231 fixP->fx_done = 1;
6232 return;
252b5132
RH		 6233 }
6234 }
6235 else
6236 {
6237#ifdef OBJ_ELF
94f592af 6238 ppc_elf_validate_fix (fixP, seg);
252b5132 6239#endif
94f592af 6240 switch (fixP->fx_r_type)
252b5132 6241 {
252b5132 6242 case BFD_RELOC_CTOR:
2b3c4602 6243 if (ppc_obj64)
9c7977b3
AM		 6244 goto ctor64;
6245 /* fall through */
6246
0baf16f2 6247 case BFD_RELOC_32:
94f592af
NC		 6248 if (fixP->fx_pcrel)
6249 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 6250 /* fall through */
252b5132
RH		 6251
6252 case BFD_RELOC_RVA:
6253 case BFD_RELOC_32_PCREL:
252b5132 6254 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 6255 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6256 value, 4);
6257 break;
6258
7f6d05e8 6259 case BFD_RELOC_64:
9c7977b3 6260 ctor64:
94f592af
NC		 6261 if (fixP->fx_pcrel)
6262 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 6263 /* fall through */
0baf16f2 6264
7f6d05e8 6265 case BFD_RELOC_64_PCREL:
94f592af 6266 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 6267 value, 8);
81d4177b 6268 break;
0baf16f2 6269
252b5132
RH		 6270 case BFD_RELOC_GPREL16:
6271 case BFD_RELOC_16_GOT_PCREL:
6272 case BFD_RELOC_16_GOTOFF:
6273 case BFD_RELOC_LO16_GOTOFF:
6274 case BFD_RELOC_HI16_GOTOFF:
6275 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 6276 case BFD_RELOC_16_BASEREL:
252b5132
RH		 6277 case BFD_RELOC_LO16_BASEREL:
6278 case BFD_RELOC_HI16_BASEREL:
6279 case BFD_RELOC_HI16_S_BASEREL:
6280 case BFD_RELOC_PPC_EMB_NADDR16:
6281 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6282 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6283 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6284 case BFD_RELOC_PPC_EMB_SDAI16:
6285 case BFD_RELOC_PPC_EMB_SDA2REL:
6286 case BFD_RELOC_PPC_EMB_SDA2I16:
6287 case BFD_RELOC_PPC_EMB_RELSEC16:
6288 case BFD_RELOC_PPC_EMB_RELST_LO:
6289 case BFD_RELOC_PPC_EMB_RELST_HI:
6290 case BFD_RELOC_PPC_EMB_RELST_HA:
6291 case BFD_RELOC_PPC_EMB_RELSDA:
6292 case BFD_RELOC_PPC_TOC16:
0baf16f2 6293#ifdef OBJ_ELF
0baf16f2
AM		 6294 case BFD_RELOC_PPC64_TOC16_LO:
6295 case BFD_RELOC_PPC64_TOC16_HI:
6296 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 6297#endif
94f592af 6298 if (fixP->fx_pcrel)
252b5132 6299 {
94f592af
NC		 6300 if (fixP->fx_addsy != NULL)
6301 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6302 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 6303 bfd_get_reloc_code_name (fixP->fx_r_type),
6304 S_GET_NAME (fixP->fx_addsy));
252b5132 6305 else
94f592af 6306 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6307 _("cannot emit PC relative %s relocation"),
94f592af 6308 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 6309 }
6310
94f592af 6311 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6312 value, 2);
6313 break;
6314
3c9d25f4
AM		 6315 case BFD_RELOC_16:
6316 if (fixP->fx_pcrel)
6317 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6318 /* fall through */
6319
6320 case BFD_RELOC_16_PCREL:
6321 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6322 value, 2);
6323 break;
6324
6325 case BFD_RELOC_LO16:
6326 if (fixP->fx_pcrel)
6327 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6328 /* fall through */
6329
6330 case BFD_RELOC_LO16_PCREL:
6331 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6332 value, 2);
6333 break;
6334
252b5132
RH		 6335 /* This case happens when you write, for example,
6336 lis %r3,(L1-L2)@ha
6337 where L1 and L2 are defined later. */
6338 case BFD_RELOC_HI16:
94f592af 6339 if (fixP->fx_pcrel)
3c9d25f4
AM		 6340 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6341 /* fall through */
6342
6343 case BFD_RELOC_HI16_PCREL:
94f592af 6344 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6345 PPC_HI (value), 2);
252b5132 6346 break;
0baf16f2 6347
252b5132 6348 case BFD_RELOC_HI16_S:
94f592af 6349 if (fixP->fx_pcrel)
3c9d25f4
AM		 6350 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6351 /* fall through */
6352
6353 case BFD_RELOC_HI16_S_PCREL:
94f592af 6354 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6355 PPC_HA (value), 2);
6356 break;
6357
c865e45b
RS		 6358#ifdef OBJ_XCOFF
6359 case BFD_RELOC_NONE:
6360 break;
6361#endif
6362
0baf16f2 6363#ifdef OBJ_ELF
0baf16f2 6364 case BFD_RELOC_PPC64_HIGHER:
94f592af 6365 if (fixP->fx_pcrel)
0baf16f2 6366 abort ();
94f592af 6367 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6368 PPC_HIGHER (value), 2);
252b5132
RH		 6369 break;
6370
0baf16f2 6371 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6372 if (fixP->fx_pcrel)
0baf16f2 6373 abort ();
94f592af 6374 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6375 PPC_HIGHERA (value), 2);
6376 break;
6377
6378 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6379 if (fixP->fx_pcrel)
0baf16f2 6380 abort ();
94f592af 6381 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6382 PPC_HIGHEST (value), 2);
6383 break;
6384
6385 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6386 if (fixP->fx_pcrel)
0baf16f2 6387 abort ();
94f592af 6388 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6389 PPC_HIGHESTA (value), 2);
6390 break;
6391
6392 case BFD_RELOC_PPC64_ADDR16_DS:
6393 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6394 case BFD_RELOC_PPC64_GOT16_DS:
6395 case BFD_RELOC_PPC64_GOT16_LO_DS:
6396 case BFD_RELOC_PPC64_PLT16_LO_DS:
6397 case BFD_RELOC_PPC64_SECTOFF_DS:
6398 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6399 case BFD_RELOC_PPC64_TOC16_DS:
6400 case BFD_RELOC_PPC64_TOC16_LO_DS:
6401 case BFD_RELOC_PPC64_PLTGOT16_DS:
6402 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6403 if (fixP->fx_pcrel)
0baf16f2
AM		 6404 abort ();
6405 {
2132e3a3 6406 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6407 unsigned long val, mask;
0baf16f2
AM		 6408
6409 if (target_big_endian)
adadcc0c 6410 val = bfd_getb32 (where - 2);
0baf16f2 6411 else
adadcc0c
AM		 6412 val = bfd_getl32 (where);
6413 mask = 0xfffc;
6414 /* lq insns reserve the four lsbs. */
6415 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6416 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6417 mask = 0xfff0;
6418 val |= value & mask;
0baf16f2
AM		 6419 if (target_big_endian)
6420 bfd_putb16 ((bfd_vma) val, where);
6421 else
6422 bfd_putl16 ((bfd_vma) val, where);
6423 }
6424 break;
cdba85ec 6425
ba0b2174
AM		 6426 case BFD_RELOC_PPC_B16_BRTAKEN:
6427 case BFD_RELOC_PPC_B16_BRNTAKEN:
6428 case BFD_RELOC_PPC_BA16_BRTAKEN:
6429 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6430 break;
6431
cdba85ec 6432 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6433 case BFD_RELOC_PPC_TLSGD:
6434 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6435 break;
6436
cdba85ec
AM		 6437 case BFD_RELOC_PPC_DTPMOD:
6438 case BFD_RELOC_PPC_TPREL16:
6439 case BFD_RELOC_PPC_TPREL16_LO:
6440 case BFD_RELOC_PPC_TPREL16_HI:
6441 case BFD_RELOC_PPC_TPREL16_HA:
6442 case BFD_RELOC_PPC_TPREL:
6443 case BFD_RELOC_PPC_DTPREL16:
6444 case BFD_RELOC_PPC_DTPREL16_LO:
6445 case BFD_RELOC_PPC_DTPREL16_HI:
6446 case BFD_RELOC_PPC_DTPREL16_HA:
6447 case BFD_RELOC_PPC_DTPREL:
6448 case BFD_RELOC_PPC_GOT_TLSGD16:
6449 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6450 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6451 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6452 case BFD_RELOC_PPC_GOT_TLSLD16:
6453 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6454 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6455 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6456 case BFD_RELOC_PPC_GOT_TPREL16:
6457 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6458 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6459 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6460 case BFD_RELOC_PPC_GOT_DTPREL16:
6461 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6462 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6463 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6464 case BFD_RELOC_PPC64_TPREL16_DS:
6465 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6466 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6467 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6468 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6469 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6470 case BFD_RELOC_PPC64_DTPREL16_DS:
6471 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6472 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6473 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6474 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6475 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6476 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6477 break;
0baf16f2 6478#endif
252b5132 6479 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6480 bytes, rather than 2, so offset it here appropriately. */
252b5132 6481 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6482 if (fixP->fx_pcrel)
252b5132
RH		 6483 abort ();
6484
94f592af 6485 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6486 + ((target_big_endian) ? 2 : 0),
6487 value, 2);
6488 break;
6489
6490 case BFD_RELOC_8:
94f592af 6491 if (fixP->fx_pcrel)
31a91399
NC		 6492 {
6493 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6494 ".byte <undefined_symbol> - ." */
31a91399
NC		 6495 if (fixP->fx_addsy)
6496 as_bad (_("Unable to handle reference to symbol %s"),
6497 S_GET_NAME (fixP->fx_addsy));
6498 else
6499 as_bad (_("Unable to resolve expression"));
6500 fixP->fx_done = 1;
6501 }
6502 else
6503 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6504 value, 1);
252b5132
RH		 6505 break;
6506
6507 case BFD_RELOC_24_PLT_PCREL:
6508 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6509 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6510 abort ();
6511
94f592af 6512 if (fixP->fx_done)
99a814a1
AM		 6513 {
6514 char *where;
6515 unsigned long insn;
6516
6517 /* Fetch the instruction, insert the fully resolved operand
6518 value, and stuff the instruction back again. */
94f592af 6519 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6520 if (target_big_endian)
6521 insn = bfd_getb32 ((unsigned char *) where);
6522 else
6523 insn = bfd_getl32 ((unsigned char *) where);
6524 if ((value & 3) != 0)
94f592af 6525 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6526 _("must branch to an address a multiple of 4"));
6527 if ((offsetT) value < -0x40000000
6528 || (offsetT) value >= 0x40000000)
94f592af 6529 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6530 _("@local or @plt branch destination is too far away, %ld bytes"),
6531 (long) value);
6532 insn = insn | (value & 0x03fffffc);
6533 if (target_big_endian)
6534 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6535 else
6536 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6537 }
252b5132
RH		 6538 break;
6539
6540 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6541 fixP->fx_done = 0;
6542 if (fixP->fx_addsy
6543 && !S_IS_DEFINED (fixP->fx_addsy)
6544 && !S_IS_WEAK (fixP->fx_addsy))
6545 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6546 break;
6547
6548 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6549 fixP->fx_done = 0;
252b5132
RH		 6550 break;
6551
0baf16f2 6552#ifdef OBJ_ELF
0baf16f2
AM		 6553 /* Generated by reference to `sym@tocbase'. The sym is
6554 ignored by the linker. */
6555 case BFD_RELOC_PPC64_TOC:
94f592af 6556 fixP->fx_done = 0;
0baf16f2 6557 break;
0baf16f2 6558#endif
252b5132 6559 default:
bc805888 6560 fprintf (stderr,
94f592af 6561 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6562 fflush (stderr);
252b5132
RH		 6563 abort ();
6564 }
6565 }
6566
6567#ifdef OBJ_ELF
94f592af 6568 fixP->fx_addnumber = value;
4e6935a6
AM		 6569
6570 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6571 from the section contents. If we are going to be emitting a reloc
6572 then the section contents are immaterial, so don't warn if they
6573 happen to overflow. Leave such warnings to ld. */
6574 if (!fixP->fx_done)
6575 fixP->fx_no_overflow = 1;
252b5132 6576#else
94f592af
NC		 6577 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6578 fixP->fx_addnumber = 0;
252b5132
RH		 6579 else
6580 {
6581#ifdef TE_PE
94f592af 6582 fixP->fx_addnumber = 0;
252b5132 6583#else
8edcbfcd
TG		 6584 /* We want to use the offset within the toc, not the actual VMA
6585 of the symbol. */
94f592af 6586 fixP->fx_addnumber =
8edcbfcd
TG		 6587 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6588 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6589#endif
6590 }
6591#endif
252b5132
RH		 6592}
6593
6594/* Generate a reloc for a fixup. */
6595
6596arelent *
98027b10 6597tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6598{
6599 arelent *reloc;
6600
6601 reloc = (arelent *) xmalloc (sizeof (arelent));
6602
49309057
ILT		 6603 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6604 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6605 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6606 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6607 if (reloc->howto == (reloc_howto_type *) NULL)
6608 {
6609 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6610 _("reloc %d not supported by object file format"),
6611 (int) fixp->fx_r_type);
252b5132
RH		 6612 return NULL;
6613 }
6614 reloc->addend = fixp->fx_addnumber;
6615
6616 return reloc;
6617}
75e21f08
JJ		 6618
6619void
98027b10 6620ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6621{
6622 cfi_add_CFA_def_cfa (1, 0);
6623}
6624
6625int
1df69f4f 6626tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6627{
6628 unsigned int regnum = -1;
6629 unsigned int i;
6630 const char *p;
6631 char *q;
6632 static struct { char *name; int dw2regnum; } regnames[] =
6633 {
6634 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6635 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6636 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6637 { "spe_acc", 111 }, { "spefscr", 112 }
6638 };
6639
6640 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6641 if (strcmp (regnames[i].name, regname) == 0)
6642 return regnames[i].dw2regnum;
6643
6644 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6645 {
6646 p = regname + 1 + (regname[1] == '.');
6647 regnum = strtoul (p, &q, 10);
6648 if (p == q || *q || regnum >= 32)
6649 return -1;
6650 if (regname[0] == 'f')
b7d7dc63 6651 regnum += 32;
75e21f08 6652 else if (regname[0] == 'v')
b7d7dc63 6653 regnum += 77;
75e21f08
JJ		 6654 }
6655 else if (regname[0] == 'c' && regname[1] == 'r')
6656 {
6657 p = regname + 2 + (regname[2] == '.');
6658 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6659 return -1;
75e21f08
JJ		 6660 regnum = p[0] - '0' + 68;
6661 }
6662 return regnum;
6663}
GDB Binutils - Deliverables
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