Commit | Line | Data |
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252b5132 | 1 | /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) |
4b95cf5c | 2 | Copyright (C) 1994-2014 Free Software Foundation, Inc. |
252b5132 RH |
3 | Written by Ian Lance Taylor, Cygnus Support. |
4 | ||
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 9 | the Free Software Foundation; either version 3, or (at your option) |
252b5132 RH |
10 | any later version. |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to the Free | |
4b4da160 NC |
19 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
20 | 02110-1301, USA. */ | |
252b5132 | 21 | |
252b5132 | 22 | #include "as.h" |
3882b010 | 23 | #include "safe-ctype.h" |
252b5132 | 24 | #include "subsegs.h" |
75e21f08 | 25 | #include "dw2gencfi.h" |
252b5132 RH |
26 | #include "opcode/ppc.h" |
27 | ||
28 | #ifdef OBJ_ELF | |
29 | #include "elf/ppc.h" | |
ee67d69a | 30 | #include "elf/ppc64.h" |
5d6f4f16 | 31 | #include "dwarf2dbg.h" |
252b5132 RH |
32 | #endif |
33 | ||
34 | #ifdef TE_PE | |
35 | #include "coff/pe.h" | |
36 | #endif | |
37 | ||
85645aed TG |
38 | #ifdef OBJ_XCOFF |
39 | #include "coff/xcoff.h" | |
40 | #include "libxcoff.h" | |
41 | #endif | |
42 | ||
252b5132 RH |
43 | /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */ |
44 | ||
45 | /* Tell the main code what the endianness is. */ | |
46 | extern int target_big_endian; | |
47 | ||
48 | /* Whether or not, we've set target_big_endian. */ | |
49 | static int set_target_endian = 0; | |
50 | ||
51 | /* Whether to use user friendly register names. */ | |
52 | #ifndef TARGET_REG_NAMES_P | |
53 | #ifdef TE_PE | |
b34976b6 | 54 | #define TARGET_REG_NAMES_P TRUE |
252b5132 | 55 | #else |
b34976b6 | 56 | #define TARGET_REG_NAMES_P FALSE |
252b5132 RH |
57 | #endif |
58 | #endif | |
59 | ||
0baf16f2 AM |
60 | /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST, |
61 | HIGHESTA. */ | |
62 | ||
63 | /* #lo(value) denotes the least significant 16 bits of the indicated. */ | |
64 | #define PPC_LO(v) ((v) & 0xffff) | |
65 | ||
66 | /* #hi(value) denotes bits 16 through 31 of the indicated value. */ | |
67 | #define PPC_HI(v) (((v) >> 16) & 0xffff) | |
68 | ||
69 | /* #ha(value) denotes the high adjusted value: bits 16 through 31 of | |
70 | the indicated value, compensating for #lo() being treated as a | |
71 | signed number. */ | |
15c1449b | 72 | #define PPC_HA(v) PPC_HI ((v) + 0x8000) |
0baf16f2 AM |
73 | |
74 | /* #higher(value) denotes bits 32 through 47 of the indicated value. */ | |
2a98c3a6 | 75 | #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff) |
0baf16f2 AM |
76 | |
77 | /* #highera(value) denotes bits 32 through 47 of the indicated value, | |
78 | compensating for #lo() being treated as a signed number. */ | |
15c1449b | 79 | #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000) |
0baf16f2 AM |
80 | |
81 | /* #highest(value) denotes bits 48 through 63 of the indicated value. */ | |
2a98c3a6 | 82 | #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff) |
0baf16f2 AM |
83 | |
84 | /* #highesta(value) denotes bits 48 through 63 of the indicated value, | |
15c1449b AM |
85 | compensating for #lo being treated as a signed number. */ |
86 | #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000) | |
0baf16f2 | 87 | |
f9c6b907 AM |
88 | #define SEX16(val) (((val) ^ 0x8000) - 0x8000) |
89 | ||
90 | /* For the time being on ppc64, don't report overflow on @h and @ha | |
91 | applied to constants. */ | |
92 | #define REPORT_OVERFLOW_HI 0 | |
0baf16f2 | 93 | |
b34976b6 | 94 | static bfd_boolean reg_names_p = TARGET_REG_NAMES_P; |
252b5132 | 95 | |
98027b10 AM |
96 | static void ppc_macro (char *, const struct powerpc_macro *); |
97 | static void ppc_byte (int); | |
0baf16f2 AM |
98 | |
99 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) | |
98027b10 AM |
100 | static void ppc_tc (int); |
101 | static void ppc_machine (int); | |
0baf16f2 | 102 | #endif |
252b5132 RH |
103 | |
104 | #ifdef OBJ_XCOFF | |
98027b10 AM |
105 | static void ppc_comm (int); |
106 | static void ppc_bb (int); | |
107 | static void ppc_bc (int); | |
108 | static void ppc_bf (int); | |
109 | static void ppc_biei (int); | |
110 | static void ppc_bs (int); | |
111 | static void ppc_eb (int); | |
112 | static void ppc_ec (int); | |
113 | static void ppc_ef (int); | |
114 | static void ppc_es (int); | |
115 | static void ppc_csect (int); | |
85645aed | 116 | static void ppc_dwsect (int); |
98027b10 AM |
117 | static void ppc_change_csect (symbolS *, offsetT); |
118 | static void ppc_function (int); | |
119 | static void ppc_extern (int); | |
120 | static void ppc_lglobl (int); | |
c865e45b | 121 | static void ppc_ref (int); |
98027b10 AM |
122 | static void ppc_section (int); |
123 | static void ppc_named_section (int); | |
124 | static void ppc_stabx (int); | |
125 | static void ppc_rename (int); | |
126 | static void ppc_toc (int); | |
127 | static void ppc_xcoff_cons (int); | |
128 | static void ppc_vbyte (int); | |
252b5132 RH |
129 | #endif |
130 | ||
131 | #ifdef OBJ_ELF | |
98027b10 AM |
132 | static void ppc_elf_rdata (int); |
133 | static void ppc_elf_lcomm (int); | |
6911b7dc | 134 | static void ppc_elf_localentry (int); |
ee67d69a | 135 | static void ppc_elf_abiversion (int); |
252b5132 RH |
136 | #endif |
137 | ||
138 | #ifdef TE_PE | |
98027b10 AM |
139 | static void ppc_previous (int); |
140 | static void ppc_pdata (int); | |
141 | static void ppc_ydata (int); | |
142 | static void ppc_reldata (int); | |
143 | static void ppc_rdata (int); | |
144 | static void ppc_ualong (int); | |
145 | static void ppc_znop (int); | |
146 | static void ppc_pe_comm (int); | |
147 | static void ppc_pe_section (int); | |
148 | static void ppc_pe_function (int); | |
149 | static void ppc_pe_tocd (int); | |
252b5132 RH |
150 | #endif |
151 | \f | |
152 | /* Generic assembler global variables which must be defined by all | |
153 | targets. */ | |
154 | ||
155 | #ifdef OBJ_ELF | |
156 | /* This string holds the chars that always start a comment. If the | |
157 | pre-processor is disabled, these aren't very useful. The macro | |
158 | tc_comment_chars points to this. We use this, rather than the | |
159 | usual comment_chars, so that we can switch for Solaris conventions. */ | |
160 | static const char ppc_solaris_comment_chars[] = "#!"; | |
161 | static const char ppc_eabi_comment_chars[] = "#"; | |
162 | ||
163 | #ifdef TARGET_SOLARIS_COMMENT | |
164 | const char *ppc_comment_chars = ppc_solaris_comment_chars; | |
165 | #else | |
166 | const char *ppc_comment_chars = ppc_eabi_comment_chars; | |
167 | #endif | |
168 | #else | |
169 | const char comment_chars[] = "#"; | |
170 | #endif | |
171 | ||
172 | /* Characters which start a comment at the beginning of a line. */ | |
173 | const char line_comment_chars[] = "#"; | |
174 | ||
175 | /* Characters which may be used to separate multiple commands on a | |
176 | single line. */ | |
177 | const char line_separator_chars[] = ";"; | |
178 | ||
179 | /* Characters which are used to indicate an exponent in a floating | |
180 | point number. */ | |
181 | const char EXP_CHARS[] = "eE"; | |
182 | ||
183 | /* Characters which mean that a number is a floating point constant, | |
184 | as in 0d1.0. */ | |
185 | const char FLT_CHARS[] = "dD"; | |
5ce8663f | 186 | |
5e02f92e | 187 | /* Anything that can start an operand needs to be mentioned here, |
ac805826 | 188 | to stop the input scrubber eating whitespace. */ |
5e02f92e | 189 | const char ppc_symbol_chars[] = "%["; |
75e21f08 JJ |
190 | |
191 | /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ | |
192 | int ppc_cie_data_alignment; | |
783de163 | 193 | |
8fbf7334 JL |
194 | /* The dwarf2 minimum instruction length. */ |
195 | int ppc_dwarf2_line_min_insn_length; | |
196 | ||
cef4f754 AM |
197 | /* More than this number of nops in an alignment op gets a branch |
198 | instead. */ | |
199 | unsigned long nop_limit = 4; | |
200 | ||
783de163 AM |
201 | /* The type of processor we are assembling for. This is one or more |
202 | of the PPC_OPCODE flags defined in opcode/ppc.h. */ | |
fa452fa6 | 203 | ppc_cpu_t ppc_cpu = 0; |
776fc418 | 204 | ppc_cpu_t sticky = 0; |
01efc3af | 205 | |
ee67d69a AM |
206 | /* Value for ELF e_flags EF_PPC64_ABI. */ |
207 | unsigned int ppc_abiversion = 0; | |
208 | ||
01efc3af AM |
209 | /* Flags set on encountering toc relocs. */ |
210 | enum { | |
211 | has_large_toc_reloc = 1, | |
212 | has_small_toc_reloc = 2 | |
213 | } toc_reloc_types; | |
252b5132 RH |
214 | \f |
215 | /* The target specific pseudo-ops which we support. */ | |
216 | ||
217 | const pseudo_typeS md_pseudo_table[] = | |
218 | { | |
219 | /* Pseudo-ops which must be overridden. */ | |
220 | { "byte", ppc_byte, 0 }, | |
221 | ||
222 | #ifdef OBJ_XCOFF | |
223 | /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these | |
224 | legitimately belong in the obj-*.c file. However, XCOFF is based | |
225 | on COFF, and is only implemented for the RS/6000. We just use | |
226 | obj-coff.c, and add what we need here. */ | |
227 | { "comm", ppc_comm, 0 }, | |
228 | { "lcomm", ppc_comm, 1 }, | |
229 | { "bb", ppc_bb, 0 }, | |
230 | { "bc", ppc_bc, 0 }, | |
231 | { "bf", ppc_bf, 0 }, | |
232 | { "bi", ppc_biei, 0 }, | |
233 | { "bs", ppc_bs, 0 }, | |
234 | { "csect", ppc_csect, 0 }, | |
85645aed | 235 | { "dwsect", ppc_dwsect, 0 }, |
252b5132 RH |
236 | { "data", ppc_section, 'd' }, |
237 | { "eb", ppc_eb, 0 }, | |
238 | { "ec", ppc_ec, 0 }, | |
239 | { "ef", ppc_ef, 0 }, | |
240 | { "ei", ppc_biei, 1 }, | |
241 | { "es", ppc_es, 0 }, | |
242 | { "extern", ppc_extern, 0 }, | |
243 | { "function", ppc_function, 0 }, | |
244 | { "lglobl", ppc_lglobl, 0 }, | |
c865e45b | 245 | { "ref", ppc_ref, 0 }, |
252b5132 RH |
246 | { "rename", ppc_rename, 0 }, |
247 | { "section", ppc_named_section, 0 }, | |
248 | { "stabx", ppc_stabx, 0 }, | |
249 | { "text", ppc_section, 't' }, | |
250 | { "toc", ppc_toc, 0 }, | |
251 | { "long", ppc_xcoff_cons, 2 }, | |
7f6d05e8 | 252 | { "llong", ppc_xcoff_cons, 3 }, |
252b5132 RH |
253 | { "word", ppc_xcoff_cons, 1 }, |
254 | { "short", ppc_xcoff_cons, 1 }, | |
255 | { "vbyte", ppc_vbyte, 0 }, | |
256 | #endif | |
257 | ||
258 | #ifdef OBJ_ELF | |
62ebcb5c | 259 | { "llong", cons, 8 }, |
252b5132 RH |
260 | { "rdata", ppc_elf_rdata, 0 }, |
261 | { "rodata", ppc_elf_rdata, 0 }, | |
262 | { "lcomm", ppc_elf_lcomm, 0 }, | |
6911b7dc | 263 | { "localentry", ppc_elf_localentry, 0 }, |
ee67d69a | 264 | { "abiversion", ppc_elf_abiversion, 0 }, |
252b5132 RH |
265 | #endif |
266 | ||
267 | #ifdef TE_PE | |
99a814a1 | 268 | /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ |
252b5132 RH |
269 | { "previous", ppc_previous, 0 }, |
270 | { "pdata", ppc_pdata, 0 }, | |
271 | { "ydata", ppc_ydata, 0 }, | |
272 | { "reldata", ppc_reldata, 0 }, | |
273 | { "rdata", ppc_rdata, 0 }, | |
274 | { "ualong", ppc_ualong, 0 }, | |
275 | { "znop", ppc_znop, 0 }, | |
276 | { "comm", ppc_pe_comm, 0 }, | |
277 | { "lcomm", ppc_pe_comm, 1 }, | |
278 | { "section", ppc_pe_section, 0 }, | |
279 | { "function", ppc_pe_function,0 }, | |
280 | { "tocd", ppc_pe_tocd, 0 }, | |
281 | #endif | |
282 | ||
0baf16f2 | 283 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 | 284 | { "tc", ppc_tc, 0 }, |
0baf16f2 AM |
285 | { "machine", ppc_machine, 0 }, |
286 | #endif | |
252b5132 RH |
287 | |
288 | { NULL, NULL, 0 } | |
289 | }; | |
290 | ||
291 | \f | |
99a814a1 AM |
292 | /* Predefined register names if -mregnames (or default for Windows NT). |
293 | In general, there are lots of them, in an attempt to be compatible | |
294 | with a number of other Windows NT assemblers. */ | |
252b5132 RH |
295 | |
296 | /* Structure to hold information about predefined registers. */ | |
297 | struct pd_reg | |
298 | { | |
299 | char *name; | |
300 | int value; | |
301 | }; | |
302 | ||
303 | /* List of registers that are pre-defined: | |
304 | ||
305 | Each general register has predefined names of the form: | |
306 | 1. r<reg_num> which has the value <reg_num>. | |
307 | 2. r.<reg_num> which has the value <reg_num>. | |
308 | ||
252b5132 RH |
309 | Each floating point register has predefined names of the form: |
310 | 1. f<reg_num> which has the value <reg_num>. | |
311 | 2. f.<reg_num> which has the value <reg_num>. | |
312 | ||
7a899fff C |
313 | Each vector unit register has predefined names of the form: |
314 | 1. v<reg_num> which has the value <reg_num>. | |
315 | 2. v.<reg_num> which has the value <reg_num>. | |
316 | ||
252b5132 RH |
317 | Each condition register has predefined names of the form: |
318 | 1. cr<reg_num> which has the value <reg_num>. | |
319 | 2. cr.<reg_num> which has the value <reg_num>. | |
320 | ||
321 | There are individual registers as well: | |
322 | sp or r.sp has the value 1 | |
323 | rtoc or r.toc has the value 2 | |
324 | fpscr has the value 0 | |
325 | xer has the value 1 | |
326 | lr has the value 8 | |
327 | ctr has the value 9 | |
328 | pmr has the value 0 | |
329 | dar has the value 19 | |
330 | dsisr has the value 18 | |
331 | dec has the value 22 | |
332 | sdr1 has the value 25 | |
333 | srr0 has the value 26 | |
334 | srr1 has the value 27 | |
335 | ||
81d4177b | 336 | The table is sorted. Suitable for searching by a binary search. */ |
252b5132 RH |
337 | |
338 | static const struct pd_reg pre_defined_registers[] = | |
339 | { | |
340 | { "cr.0", 0 }, /* Condition Registers */ | |
341 | { "cr.1", 1 }, | |
342 | { "cr.2", 2 }, | |
343 | { "cr.3", 3 }, | |
344 | { "cr.4", 4 }, | |
345 | { "cr.5", 5 }, | |
346 | { "cr.6", 6 }, | |
347 | { "cr.7", 7 }, | |
348 | ||
349 | { "cr0", 0 }, | |
350 | { "cr1", 1 }, | |
351 | { "cr2", 2 }, | |
352 | { "cr3", 3 }, | |
353 | { "cr4", 4 }, | |
354 | { "cr5", 5 }, | |
355 | { "cr6", 6 }, | |
356 | { "cr7", 7 }, | |
357 | ||
358 | { "ctr", 9 }, | |
359 | ||
360 | { "dar", 19 }, /* Data Access Register */ | |
361 | { "dec", 22 }, /* Decrementer */ | |
362 | { "dsisr", 18 }, /* Data Storage Interrupt Status Register */ | |
363 | ||
364 | { "f.0", 0 }, /* Floating point registers */ | |
81d4177b KH |
365 | { "f.1", 1 }, |
366 | { "f.10", 10 }, | |
367 | { "f.11", 11 }, | |
368 | { "f.12", 12 }, | |
369 | { "f.13", 13 }, | |
370 | { "f.14", 14 }, | |
371 | { "f.15", 15 }, | |
372 | { "f.16", 16 }, | |
373 | { "f.17", 17 }, | |
374 | { "f.18", 18 }, | |
375 | { "f.19", 19 }, | |
376 | { "f.2", 2 }, | |
377 | { "f.20", 20 }, | |
378 | { "f.21", 21 }, | |
379 | { "f.22", 22 }, | |
380 | { "f.23", 23 }, | |
381 | { "f.24", 24 }, | |
382 | { "f.25", 25 }, | |
383 | { "f.26", 26 }, | |
384 | { "f.27", 27 }, | |
385 | { "f.28", 28 }, | |
386 | { "f.29", 29 }, | |
387 | { "f.3", 3 }, | |
252b5132 RH |
388 | { "f.30", 30 }, |
389 | { "f.31", 31 }, | |
066be9f7 PB |
390 | |
391 | { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ | |
392 | { "f.33", 33 }, | |
393 | { "f.34", 34 }, | |
394 | { "f.35", 35 }, | |
395 | { "f.36", 36 }, | |
396 | { "f.37", 37 }, | |
397 | { "f.38", 38 }, | |
398 | { "f.39", 39 }, | |
81d4177b | 399 | { "f.4", 4 }, |
066be9f7 PB |
400 | { "f.40", 40 }, |
401 | { "f.41", 41 }, | |
402 | { "f.42", 42 }, | |
403 | { "f.43", 43 }, | |
404 | { "f.44", 44 }, | |
405 | { "f.45", 45 }, | |
406 | { "f.46", 46 }, | |
407 | { "f.47", 47 }, | |
408 | { "f.48", 48 }, | |
409 | { "f.49", 49 }, | |
81d4177b | 410 | { "f.5", 5 }, |
066be9f7 PB |
411 | { "f.50", 50 }, |
412 | { "f.51", 51 }, | |
413 | { "f.52", 52 }, | |
414 | { "f.53", 53 }, | |
415 | { "f.54", 54 }, | |
416 | { "f.55", 55 }, | |
417 | { "f.56", 56 }, | |
418 | { "f.57", 57 }, | |
419 | { "f.58", 58 }, | |
420 | { "f.59", 59 }, | |
81d4177b | 421 | { "f.6", 6 }, |
066be9f7 PB |
422 | { "f.60", 60 }, |
423 | { "f.61", 61 }, | |
424 | { "f.62", 62 }, | |
425 | { "f.63", 63 }, | |
81d4177b KH |
426 | { "f.7", 7 }, |
427 | { "f.8", 8 }, | |
428 | { "f.9", 9 }, | |
429 | ||
430 | { "f0", 0 }, | |
431 | { "f1", 1 }, | |
432 | { "f10", 10 }, | |
433 | { "f11", 11 }, | |
434 | { "f12", 12 }, | |
435 | { "f13", 13 }, | |
436 | { "f14", 14 }, | |
437 | { "f15", 15 }, | |
438 | { "f16", 16 }, | |
439 | { "f17", 17 }, | |
440 | { "f18", 18 }, | |
441 | { "f19", 19 }, | |
442 | { "f2", 2 }, | |
443 | { "f20", 20 }, | |
444 | { "f21", 21 }, | |
445 | { "f22", 22 }, | |
446 | { "f23", 23 }, | |
447 | { "f24", 24 }, | |
448 | { "f25", 25 }, | |
449 | { "f26", 26 }, | |
450 | { "f27", 27 }, | |
451 | { "f28", 28 }, | |
452 | { "f29", 29 }, | |
453 | { "f3", 3 }, | |
252b5132 RH |
454 | { "f30", 30 }, |
455 | { "f31", 31 }, | |
066be9f7 PB |
456 | |
457 | { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ | |
458 | { "f33", 33 }, | |
459 | { "f34", 34 }, | |
460 | { "f35", 35 }, | |
461 | { "f36", 36 }, | |
462 | { "f37", 37 }, | |
463 | { "f38", 38 }, | |
464 | { "f39", 39 }, | |
81d4177b | 465 | { "f4", 4 }, |
066be9f7 PB |
466 | { "f40", 40 }, |
467 | { "f41", 41 }, | |
468 | { "f42", 42 }, | |
469 | { "f43", 43 }, | |
470 | { "f44", 44 }, | |
471 | { "f45", 45 }, | |
472 | { "f46", 46 }, | |
473 | { "f47", 47 }, | |
474 | { "f48", 48 }, | |
475 | { "f49", 49 }, | |
81d4177b | 476 | { "f5", 5 }, |
066be9f7 PB |
477 | { "f50", 50 }, |
478 | { "f51", 51 }, | |
479 | { "f52", 52 }, | |
480 | { "f53", 53 }, | |
481 | { "f54", 54 }, | |
482 | { "f55", 55 }, | |
483 | { "f56", 56 }, | |
484 | { "f57", 57 }, | |
485 | { "f58", 58 }, | |
486 | { "f59", 59 }, | |
81d4177b | 487 | { "f6", 6 }, |
066be9f7 PB |
488 | { "f60", 60 }, |
489 | { "f61", 61 }, | |
490 | { "f62", 62 }, | |
491 | { "f63", 63 }, | |
81d4177b KH |
492 | { "f7", 7 }, |
493 | { "f8", 8 }, | |
494 | { "f9", 9 }, | |
252b5132 RH |
495 | |
496 | { "fpscr", 0 }, | |
497 | ||
c3d65c1c BE |
498 | /* Quantization registers used with pair single instructions. */ |
499 | { "gqr.0", 0 }, | |
500 | { "gqr.1", 1 }, | |
501 | { "gqr.2", 2 }, | |
502 | { "gqr.3", 3 }, | |
503 | { "gqr.4", 4 }, | |
504 | { "gqr.5", 5 }, | |
505 | { "gqr.6", 6 }, | |
506 | { "gqr.7", 7 }, | |
507 | { "gqr0", 0 }, | |
508 | { "gqr1", 1 }, | |
509 | { "gqr2", 2 }, | |
510 | { "gqr3", 3 }, | |
511 | { "gqr4", 4 }, | |
512 | { "gqr5", 5 }, | |
513 | { "gqr6", 6 }, | |
514 | { "gqr7", 7 }, | |
515 | ||
252b5132 RH |
516 | { "lr", 8 }, /* Link Register */ |
517 | ||
518 | { "pmr", 0 }, | |
519 | ||
520 | { "r.0", 0 }, /* General Purpose Registers */ | |
521 | { "r.1", 1 }, | |
522 | { "r.10", 10 }, | |
523 | { "r.11", 11 }, | |
524 | { "r.12", 12 }, | |
525 | { "r.13", 13 }, | |
526 | { "r.14", 14 }, | |
527 | { "r.15", 15 }, | |
528 | { "r.16", 16 }, | |
529 | { "r.17", 17 }, | |
530 | { "r.18", 18 }, | |
531 | { "r.19", 19 }, | |
532 | { "r.2", 2 }, | |
533 | { "r.20", 20 }, | |
534 | { "r.21", 21 }, | |
535 | { "r.22", 22 }, | |
536 | { "r.23", 23 }, | |
537 | { "r.24", 24 }, | |
538 | { "r.25", 25 }, | |
539 | { "r.26", 26 }, | |
540 | { "r.27", 27 }, | |
541 | { "r.28", 28 }, | |
542 | { "r.29", 29 }, | |
543 | { "r.3", 3 }, | |
544 | { "r.30", 30 }, | |
545 | { "r.31", 31 }, | |
546 | { "r.4", 4 }, | |
547 | { "r.5", 5 }, | |
548 | { "r.6", 6 }, | |
549 | { "r.7", 7 }, | |
550 | { "r.8", 8 }, | |
551 | { "r.9", 9 }, | |
552 | ||
553 | { "r.sp", 1 }, /* Stack Pointer */ | |
554 | ||
555 | { "r.toc", 2 }, /* Pointer to the table of contents */ | |
556 | ||
557 | { "r0", 0 }, /* More general purpose registers */ | |
558 | { "r1", 1 }, | |
559 | { "r10", 10 }, | |
560 | { "r11", 11 }, | |
561 | { "r12", 12 }, | |
562 | { "r13", 13 }, | |
563 | { "r14", 14 }, | |
564 | { "r15", 15 }, | |
565 | { "r16", 16 }, | |
566 | { "r17", 17 }, | |
567 | { "r18", 18 }, | |
568 | { "r19", 19 }, | |
569 | { "r2", 2 }, | |
570 | { "r20", 20 }, | |
571 | { "r21", 21 }, | |
572 | { "r22", 22 }, | |
573 | { "r23", 23 }, | |
574 | { "r24", 24 }, | |
575 | { "r25", 25 }, | |
576 | { "r26", 26 }, | |
577 | { "r27", 27 }, | |
578 | { "r28", 28 }, | |
579 | { "r29", 29 }, | |
580 | { "r3", 3 }, | |
581 | { "r30", 30 }, | |
582 | { "r31", 31 }, | |
583 | { "r4", 4 }, | |
584 | { "r5", 5 }, | |
585 | { "r6", 6 }, | |
586 | { "r7", 7 }, | |
587 | { "r8", 8 }, | |
588 | { "r9", 9 }, | |
589 | ||
590 | { "rtoc", 2 }, /* Table of contents */ | |
591 | ||
592 | { "sdr1", 25 }, /* Storage Description Register 1 */ | |
593 | ||
594 | { "sp", 1 }, | |
595 | ||
596 | { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */ | |
597 | { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */ | |
81d4177b | 598 | |
066be9f7 | 599 | { "v.0", 0 }, /* Vector (Altivec/VMX) registers */ |
81d4177b KH |
600 | { "v.1", 1 }, |
601 | { "v.10", 10 }, | |
602 | { "v.11", 11 }, | |
603 | { "v.12", 12 }, | |
604 | { "v.13", 13 }, | |
605 | { "v.14", 14 }, | |
606 | { "v.15", 15 }, | |
607 | { "v.16", 16 }, | |
608 | { "v.17", 17 }, | |
609 | { "v.18", 18 }, | |
610 | { "v.19", 19 }, | |
611 | { "v.2", 2 }, | |
612 | { "v.20", 20 }, | |
613 | { "v.21", 21 }, | |
614 | { "v.22", 22 }, | |
615 | { "v.23", 23 }, | |
616 | { "v.24", 24 }, | |
617 | { "v.25", 25 }, | |
618 | { "v.26", 26 }, | |
619 | { "v.27", 27 }, | |
620 | { "v.28", 28 }, | |
621 | { "v.29", 29 }, | |
622 | { "v.3", 3 }, | |
7a899fff C |
623 | { "v.30", 30 }, |
624 | { "v.31", 31 }, | |
81d4177b KH |
625 | { "v.4", 4 }, |
626 | { "v.5", 5 }, | |
627 | { "v.6", 6 }, | |
628 | { "v.7", 7 }, | |
629 | { "v.8", 8 }, | |
630 | { "v.9", 9 }, | |
7a899fff C |
631 | |
632 | { "v0", 0 }, | |
81d4177b KH |
633 | { "v1", 1 }, |
634 | { "v10", 10 }, | |
635 | { "v11", 11 }, | |
636 | { "v12", 12 }, | |
637 | { "v13", 13 }, | |
638 | { "v14", 14 }, | |
639 | { "v15", 15 }, | |
640 | { "v16", 16 }, | |
641 | { "v17", 17 }, | |
642 | { "v18", 18 }, | |
643 | { "v19", 19 }, | |
644 | { "v2", 2 }, | |
645 | { "v20", 20 }, | |
646 | { "v21", 21 }, | |
647 | { "v22", 22 }, | |
648 | { "v23", 23 }, | |
649 | { "v24", 24 }, | |
650 | { "v25", 25 }, | |
651 | { "v26", 26 }, | |
652 | { "v27", 27 }, | |
653 | { "v28", 28 }, | |
654 | { "v29", 29 }, | |
655 | { "v3", 3 }, | |
7a899fff C |
656 | { "v30", 30 }, |
657 | { "v31", 31 }, | |
81d4177b KH |
658 | { "v4", 4 }, |
659 | { "v5", 5 }, | |
660 | { "v6", 6 }, | |
661 | { "v7", 7 }, | |
662 | { "v8", 8 }, | |
7a899fff | 663 | { "v9", 9 }, |
252b5132 | 664 | |
066be9f7 PB |
665 | { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */ |
666 | { "vs.1", 1 }, | |
667 | { "vs.10", 10 }, | |
668 | { "vs.11", 11 }, | |
669 | { "vs.12", 12 }, | |
670 | { "vs.13", 13 }, | |
671 | { "vs.14", 14 }, | |
672 | { "vs.15", 15 }, | |
673 | { "vs.16", 16 }, | |
674 | { "vs.17", 17 }, | |
675 | { "vs.18", 18 }, | |
676 | { "vs.19", 19 }, | |
677 | { "vs.2", 2 }, | |
678 | { "vs.20", 20 }, | |
679 | { "vs.21", 21 }, | |
680 | { "vs.22", 22 }, | |
681 | { "vs.23", 23 }, | |
682 | { "vs.24", 24 }, | |
683 | { "vs.25", 25 }, | |
684 | { "vs.26", 26 }, | |
685 | { "vs.27", 27 }, | |
686 | { "vs.28", 28 }, | |
687 | { "vs.29", 29 }, | |
688 | { "vs.3", 3 }, | |
689 | { "vs.30", 30 }, | |
690 | { "vs.31", 31 }, | |
691 | { "vs.32", 32 }, | |
692 | { "vs.33", 33 }, | |
693 | { "vs.34", 34 }, | |
694 | { "vs.35", 35 }, | |
695 | { "vs.36", 36 }, | |
696 | { "vs.37", 37 }, | |
697 | { "vs.38", 38 }, | |
698 | { "vs.39", 39 }, | |
699 | { "vs.4", 4 }, | |
700 | { "vs.40", 40 }, | |
701 | { "vs.41", 41 }, | |
702 | { "vs.42", 42 }, | |
703 | { "vs.43", 43 }, | |
704 | { "vs.44", 44 }, | |
705 | { "vs.45", 45 }, | |
706 | { "vs.46", 46 }, | |
707 | { "vs.47", 47 }, | |
708 | { "vs.48", 48 }, | |
709 | { "vs.49", 49 }, | |
710 | { "vs.5", 5 }, | |
711 | { "vs.50", 50 }, | |
712 | { "vs.51", 51 }, | |
713 | { "vs.52", 52 }, | |
714 | { "vs.53", 53 }, | |
715 | { "vs.54", 54 }, | |
716 | { "vs.55", 55 }, | |
717 | { "vs.56", 56 }, | |
718 | { "vs.57", 57 }, | |
719 | { "vs.58", 58 }, | |
720 | { "vs.59", 59 }, | |
721 | { "vs.6", 6 }, | |
722 | { "vs.60", 60 }, | |
723 | { "vs.61", 61 }, | |
724 | { "vs.62", 62 }, | |
725 | { "vs.63", 63 }, | |
726 | { "vs.7", 7 }, | |
727 | { "vs.8", 8 }, | |
728 | { "vs.9", 9 }, | |
729 | ||
730 | { "vs0", 0 }, | |
731 | { "vs1", 1 }, | |
732 | { "vs10", 10 }, | |
733 | { "vs11", 11 }, | |
734 | { "vs12", 12 }, | |
735 | { "vs13", 13 }, | |
736 | { "vs14", 14 }, | |
737 | { "vs15", 15 }, | |
738 | { "vs16", 16 }, | |
739 | { "vs17", 17 }, | |
740 | { "vs18", 18 }, | |
741 | { "vs19", 19 }, | |
742 | { "vs2", 2 }, | |
743 | { "vs20", 20 }, | |
744 | { "vs21", 21 }, | |
745 | { "vs22", 22 }, | |
746 | { "vs23", 23 }, | |
747 | { "vs24", 24 }, | |
748 | { "vs25", 25 }, | |
749 | { "vs26", 26 }, | |
750 | { "vs27", 27 }, | |
751 | { "vs28", 28 }, | |
752 | { "vs29", 29 }, | |
753 | { "vs3", 3 }, | |
754 | { "vs30", 30 }, | |
755 | { "vs31", 31 }, | |
756 | { "vs32", 32 }, | |
757 | { "vs33", 33 }, | |
758 | { "vs34", 34 }, | |
759 | { "vs35", 35 }, | |
760 | { "vs36", 36 }, | |
761 | { "vs37", 37 }, | |
762 | { "vs38", 38 }, | |
763 | { "vs39", 39 }, | |
764 | { "vs4", 4 }, | |
765 | { "vs40", 40 }, | |
766 | { "vs41", 41 }, | |
767 | { "vs42", 42 }, | |
768 | { "vs43", 43 }, | |
769 | { "vs44", 44 }, | |
770 | { "vs45", 45 }, | |
771 | { "vs46", 46 }, | |
772 | { "vs47", 47 }, | |
773 | { "vs48", 48 }, | |
774 | { "vs49", 49 }, | |
775 | { "vs5", 5 }, | |
776 | { "vs50", 50 }, | |
777 | { "vs51", 51 }, | |
778 | { "vs52", 52 }, | |
779 | { "vs53", 53 }, | |
780 | { "vs54", 54 }, | |
781 | { "vs55", 55 }, | |
782 | { "vs56", 56 }, | |
783 | { "vs57", 57 }, | |
784 | { "vs58", 58 }, | |
785 | { "vs59", 59 }, | |
786 | { "vs6", 6 }, | |
787 | { "vs60", 60 }, | |
788 | { "vs61", 61 }, | |
789 | { "vs62", 62 }, | |
790 | { "vs63", 63 }, | |
791 | { "vs7", 7 }, | |
792 | { "vs8", 8 }, | |
793 | { "vs9", 9 }, | |
794 | ||
252b5132 RH |
795 | { "xer", 1 }, |
796 | ||
797 | }; | |
798 | ||
bc805888 | 799 | #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) |
252b5132 RH |
800 | |
801 | /* Given NAME, find the register number associated with that name, return | |
802 | the integer value associated with the given name or -1 on failure. */ | |
803 | ||
252b5132 | 804 | static int |
98027b10 | 805 | reg_name_search (const struct pd_reg *regs, int regcount, const char *name) |
252b5132 RH |
806 | { |
807 | int middle, low, high; | |
808 | int cmp; | |
809 | ||
810 | low = 0; | |
811 | high = regcount - 1; | |
812 | ||
813 | do | |
814 | { | |
815 | middle = (low + high) / 2; | |
816 | cmp = strcasecmp (name, regs[middle].name); | |
817 | if (cmp < 0) | |
818 | high = middle - 1; | |
819 | else if (cmp > 0) | |
820 | low = middle + 1; | |
821 | else | |
822 | return regs[middle].value; | |
823 | } | |
824 | while (low <= high); | |
825 | ||
826 | return -1; | |
827 | } | |
828 | ||
829 | /* | |
99a814a1 | 830 | * Summary of register_name. |
252b5132 RH |
831 | * |
832 | * in: Input_line_pointer points to 1st char of operand. | |
833 | * | |
834 | * out: A expressionS. | |
835 | * The operand may have been a register: in this case, X_op == O_register, | |
836 | * X_add_number is set to the register number, and truth is returned. | |
837 | * Input_line_pointer->(next non-blank) char after operand, or is in its | |
838 | * original state. | |
839 | */ | |
840 | ||
b34976b6 | 841 | static bfd_boolean |
98027b10 | 842 | register_name (expressionS *expressionP) |
252b5132 RH |
843 | { |
844 | int reg_number; | |
845 | char *name; | |
846 | char *start; | |
847 | char c; | |
848 | ||
99a814a1 | 849 | /* Find the spelling of the operand. */ |
252b5132 | 850 | start = name = input_line_pointer; |
3882b010 | 851 | if (name[0] == '%' && ISALPHA (name[1])) |
252b5132 RH |
852 | name = ++input_line_pointer; |
853 | ||
3882b010 | 854 | else if (!reg_names_p || !ISALPHA (name[0])) |
b34976b6 | 855 | return FALSE; |
252b5132 RH |
856 | |
857 | c = get_symbol_end (); | |
858 | reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name); | |
859 | ||
468cced8 AM |
860 | /* Put back the delimiting char. */ |
861 | *input_line_pointer = c; | |
862 | ||
99a814a1 | 863 | /* Look to see if it's in the register table. */ |
81d4177b | 864 | if (reg_number >= 0) |
252b5132 RH |
865 | { |
866 | expressionP->X_op = O_register; | |
867 | expressionP->X_add_number = reg_number; | |
81d4177b | 868 | |
99a814a1 | 869 | /* Make the rest nice. */ |
252b5132 RH |
870 | expressionP->X_add_symbol = NULL; |
871 | expressionP->X_op_symbol = NULL; | |
b34976b6 | 872 | return TRUE; |
252b5132 | 873 | } |
468cced8 AM |
874 | |
875 | /* Reset the line as if we had not done anything. */ | |
876 | input_line_pointer = start; | |
b34976b6 | 877 | return FALSE; |
252b5132 RH |
878 | } |
879 | \f | |
880 | /* This function is called for each symbol seen in an expression. It | |
881 | handles the special parsing which PowerPC assemblers are supposed | |
882 | to use for condition codes. */ | |
883 | ||
884 | /* Whether to do the special parsing. */ | |
b34976b6 | 885 | static bfd_boolean cr_operand; |
252b5132 RH |
886 | |
887 | /* Names to recognize in a condition code. This table is sorted. */ | |
888 | static const struct pd_reg cr_names[] = | |
889 | { | |
890 | { "cr0", 0 }, | |
891 | { "cr1", 1 }, | |
892 | { "cr2", 2 }, | |
893 | { "cr3", 3 }, | |
894 | { "cr4", 4 }, | |
895 | { "cr5", 5 }, | |
896 | { "cr6", 6 }, | |
897 | { "cr7", 7 }, | |
898 | { "eq", 2 }, | |
899 | { "gt", 1 }, | |
900 | { "lt", 0 }, | |
901 | { "so", 3 }, | |
902 | { "un", 3 } | |
903 | }; | |
904 | ||
905 | /* Parsing function. This returns non-zero if it recognized an | |
906 | expression. */ | |
907 | ||
908 | int | |
91d6fa6a | 909 | ppc_parse_name (const char *name, expressionS *exp) |
252b5132 RH |
910 | { |
911 | int val; | |
912 | ||
913 | if (! cr_operand) | |
914 | return 0; | |
915 | ||
13abbae3 AM |
916 | if (*name == '%') |
917 | ++name; | |
252b5132 RH |
918 | val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0], |
919 | name); | |
920 | if (val < 0) | |
921 | return 0; | |
922 | ||
91d6fa6a NC |
923 | exp->X_op = O_constant; |
924 | exp->X_add_number = val; | |
252b5132 RH |
925 | |
926 | return 1; | |
927 | } | |
928 | \f | |
929 | /* Local variables. */ | |
930 | ||
2b3c4602 AM |
931 | /* Whether to target xcoff64/elf64. */ |
932 | static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; | |
7f6d05e8 | 933 | |
252b5132 RH |
934 | /* Opcode hash table. */ |
935 | static struct hash_control *ppc_hash; | |
936 | ||
937 | /* Macro hash table. */ | |
938 | static struct hash_control *ppc_macro_hash; | |
939 | ||
940 | #ifdef OBJ_ELF | |
99a814a1 | 941 | /* What type of shared library support to use. */ |
5d6f4f16 | 942 | static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; |
252b5132 | 943 | |
99a814a1 | 944 | /* Flags to set in the elf header. */ |
252b5132 RH |
945 | static flagword ppc_flags = 0; |
946 | ||
947 | /* Whether this is Solaris or not. */ | |
948 | #ifdef TARGET_SOLARIS_COMMENT | |
b34976b6 | 949 | #define SOLARIS_P TRUE |
252b5132 | 950 | #else |
b34976b6 | 951 | #define SOLARIS_P FALSE |
252b5132 RH |
952 | #endif |
953 | ||
b34976b6 | 954 | static bfd_boolean msolaris = SOLARIS_P; |
252b5132 RH |
955 | #endif |
956 | ||
957 | #ifdef OBJ_XCOFF | |
958 | ||
959 | /* The RS/6000 assembler uses the .csect pseudo-op to generate code | |
960 | using a bunch of different sections. These assembler sections, | |
961 | however, are all encompassed within the .text or .data sections of | |
962 | the final output file. We handle this by using different | |
963 | subsegments within these main segments. */ | |
964 | ||
965 | /* Next subsegment to allocate within the .text segment. */ | |
966 | static subsegT ppc_text_subsegment = 2; | |
967 | ||
968 | /* Linked list of csects in the text section. */ | |
969 | static symbolS *ppc_text_csects; | |
970 | ||
971 | /* Next subsegment to allocate within the .data segment. */ | |
972 | static subsegT ppc_data_subsegment = 2; | |
973 | ||
974 | /* Linked list of csects in the data section. */ | |
975 | static symbolS *ppc_data_csects; | |
976 | ||
977 | /* The current csect. */ | |
978 | static symbolS *ppc_current_csect; | |
979 | ||
980 | /* The RS/6000 assembler uses a TOC which holds addresses of functions | |
981 | and variables. Symbols are put in the TOC with the .tc pseudo-op. | |
982 | A special relocation is used when accessing TOC entries. We handle | |
983 | the TOC as a subsegment within the .data segment. We set it up if | |
984 | we see a .toc pseudo-op, and save the csect symbol here. */ | |
985 | static symbolS *ppc_toc_csect; | |
986 | ||
987 | /* The first frag in the TOC subsegment. */ | |
988 | static fragS *ppc_toc_frag; | |
989 | ||
990 | /* The first frag in the first subsegment after the TOC in the .data | |
991 | segment. NULL if there are no subsegments after the TOC. */ | |
992 | static fragS *ppc_after_toc_frag; | |
993 | ||
994 | /* The current static block. */ | |
995 | static symbolS *ppc_current_block; | |
996 | ||
997 | /* The COFF debugging section; set by md_begin. This is not the | |
998 | .debug section, but is instead the secret BFD section which will | |
999 | cause BFD to set the section number of a symbol to N_DEBUG. */ | |
1000 | static asection *ppc_coff_debug_section; | |
1001 | ||
85645aed TG |
1002 | /* Structure to set the length field of the dwarf sections. */ |
1003 | struct dw_subsection { | |
1004 | /* Subsections are simply linked. */ | |
1005 | struct dw_subsection *link; | |
1006 | ||
1007 | /* The subsection number. */ | |
1008 | subsegT subseg; | |
1009 | ||
1010 | /* Expression to compute the length of the section. */ | |
1011 | expressionS end_exp; | |
1012 | }; | |
1013 | ||
1014 | static struct dw_section { | |
1015 | /* Corresponding section. */ | |
1016 | segT sect; | |
1017 | ||
1018 | /* Simply linked list of subsections with a label. */ | |
1019 | struct dw_subsection *list_subseg; | |
1020 | ||
1021 | /* The anonymous subsection. */ | |
1022 | struct dw_subsection *anon_subseg; | |
1023 | } dw_sections[XCOFF_DWSECT_NBR_NAMES]; | |
252b5132 RH |
1024 | #endif /* OBJ_XCOFF */ |
1025 | ||
1026 | #ifdef TE_PE | |
1027 | ||
1028 | /* Various sections that we need for PE coff support. */ | |
1029 | static segT ydata_section; | |
1030 | static segT pdata_section; | |
1031 | static segT reldata_section; | |
1032 | static segT rdata_section; | |
1033 | static segT tocdata_section; | |
1034 | ||
81d4177b | 1035 | /* The current section and the previous section. See ppc_previous. */ |
252b5132 RH |
1036 | static segT ppc_previous_section; |
1037 | static segT ppc_current_section; | |
1038 | ||
1039 | #endif /* TE_PE */ | |
1040 | ||
1041 | #ifdef OBJ_ELF | |
1042 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ | |
6a0c61b7 EZ |
1043 | #define PPC_APUINFO_ISEL 0x40 |
1044 | #define PPC_APUINFO_PMR 0x41 | |
1045 | #define PPC_APUINFO_RFMCI 0x42 | |
1046 | #define PPC_APUINFO_CACHELCK 0x43 | |
1047 | #define PPC_APUINFO_SPE 0x100 | |
1048 | #define PPC_APUINFO_EFS 0x101 | |
1049 | #define PPC_APUINFO_BRLOCK 0x102 | |
b9c361e0 | 1050 | #define PPC_APUINFO_VLE 0x104 |
6a0c61b7 | 1051 | |
b34976b6 AM |
1052 | /* |
1053 | * We keep a list of APUinfo | |
6a0c61b7 EZ |
1054 | */ |
1055 | unsigned long *ppc_apuinfo_list; | |
1056 | unsigned int ppc_apuinfo_num; | |
1057 | unsigned int ppc_apuinfo_num_alloc; | |
252b5132 RH |
1058 | #endif /* OBJ_ELF */ |
1059 | \f | |
1060 | #ifdef OBJ_ELF | |
15c1449b | 1061 | const char *const md_shortopts = "b:l:usm:K:VQ:"; |
252b5132 | 1062 | #else |
15c1449b | 1063 | const char *const md_shortopts = "um:"; |
252b5132 | 1064 | #endif |
cef4f754 | 1065 | #define OPTION_NOPS (OPTION_MD_BASE + 0) |
15c1449b | 1066 | const struct option md_longopts[] = { |
cef4f754 | 1067 | {"nops", required_argument, NULL, OPTION_NOPS}, |
252b5132 RH |
1068 | {NULL, no_argument, NULL, 0} |
1069 | }; | |
15c1449b | 1070 | const size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
1071 | |
1072 | int | |
98027b10 | 1073 | md_parse_option (int c, char *arg) |
252b5132 | 1074 | { |
69fe9ce5 AM |
1075 | ppc_cpu_t new_cpu; |
1076 | ||
252b5132 RH |
1077 | switch (c) |
1078 | { | |
1079 | case 'u': | |
1080 | /* -u means that any undefined symbols should be treated as | |
1081 | external, which is the default for gas anyhow. */ | |
1082 | break; | |
1083 | ||
1084 | #ifdef OBJ_ELF | |
1085 | case 'l': | |
1086 | /* Solaris as takes -le (presumably for little endian). For completeness | |
99a814a1 | 1087 | sake, recognize -be also. */ |
252b5132 RH |
1088 | if (strcmp (arg, "e") == 0) |
1089 | { | |
1090 | target_big_endian = 0; | |
1091 | set_target_endian = 1; | |
b9c361e0 | 1092 | if (ppc_cpu & PPC_OPCODE_VLE) |
d6ed37ed | 1093 | as_bad (_("the use of -mvle requires big endian.")); |
252b5132 RH |
1094 | } |
1095 | else | |
1096 | return 0; | |
1097 | ||
1098 | break; | |
1099 | ||
1100 | case 'b': | |
1101 | if (strcmp (arg, "e") == 0) | |
1102 | { | |
1103 | target_big_endian = 1; | |
1104 | set_target_endian = 1; | |
1105 | } | |
1106 | else | |
1107 | return 0; | |
1108 | ||
1109 | break; | |
1110 | ||
1111 | case 'K': | |
99a814a1 | 1112 | /* Recognize -K PIC. */ |
252b5132 RH |
1113 | if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0) |
1114 | { | |
1115 | shlib = SHLIB_PIC; | |
1116 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; | |
1117 | } | |
1118 | else | |
1119 | return 0; | |
1120 | ||
1121 | break; | |
1122 | #endif | |
1123 | ||
7f6d05e8 CP |
1124 | /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */ |
1125 | case 'a': | |
1126 | if (strcmp (arg, "64") == 0) | |
2a98c3a6 AM |
1127 | { |
1128 | #ifdef BFD64 | |
1129 | ppc_obj64 = 1; | |
d6ed37ed AM |
1130 | if (ppc_cpu & PPC_OPCODE_VLE) |
1131 | as_bad (_("the use of -mvle requires -a32.")); | |
2a98c3a6 AM |
1132 | #else |
1133 | as_fatal (_("%s unsupported"), "-a64"); | |
1134 | #endif | |
1135 | } | |
7f6d05e8 | 1136 | else if (strcmp (arg, "32") == 0) |
2b3c4602 | 1137 | ppc_obj64 = 0; |
7f6d05e8 CP |
1138 | else |
1139 | return 0; | |
1140 | break; | |
81d4177b | 1141 | |
252b5132 | 1142 | case 'm': |
776fc418 | 1143 | new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg); |
b9c361e0 JL |
1144 | if (new_cpu != 0) |
1145 | { | |
1146 | ppc_cpu = new_cpu; | |
d6ed37ed AM |
1147 | if (strcmp (arg, "vle") == 0) |
1148 | { | |
1149 | if (set_target_endian && target_big_endian == 0) | |
1150 | as_bad (_("the use of -mvle requires big endian.")); | |
1151 | if (ppc_obj64) | |
1152 | as_bad (_("the use of -mvle requires -a32.")); | |
1153 | } | |
b9c361e0 | 1154 | } |
252b5132 RH |
1155 | |
1156 | else if (strcmp (arg, "regnames") == 0) | |
b34976b6 | 1157 | reg_names_p = TRUE; |
252b5132 RH |
1158 | |
1159 | else if (strcmp (arg, "no-regnames") == 0) | |
b34976b6 | 1160 | reg_names_p = FALSE; |
252b5132 RH |
1161 | |
1162 | #ifdef OBJ_ELF | |
99a814a1 AM |
1163 | /* -mrelocatable/-mrelocatable-lib -- warn about initializations |
1164 | that require relocation. */ | |
252b5132 RH |
1165 | else if (strcmp (arg, "relocatable") == 0) |
1166 | { | |
5d6f4f16 | 1167 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1168 | ppc_flags |= EF_PPC_RELOCATABLE; |
1169 | } | |
1170 | ||
1171 | else if (strcmp (arg, "relocatable-lib") == 0) | |
1172 | { | |
5d6f4f16 | 1173 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1174 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; |
1175 | } | |
1176 | ||
99a814a1 | 1177 | /* -memb, set embedded bit. */ |
252b5132 RH |
1178 | else if (strcmp (arg, "emb") == 0) |
1179 | ppc_flags |= EF_PPC_EMB; | |
1180 | ||
cc643b88 | 1181 | /* -mlittle/-mbig set the endianness. */ |
99a814a1 AM |
1182 | else if (strcmp (arg, "little") == 0 |
1183 | || strcmp (arg, "little-endian") == 0) | |
252b5132 RH |
1184 | { |
1185 | target_big_endian = 0; | |
1186 | set_target_endian = 1; | |
b9c361e0 | 1187 | if (ppc_cpu & PPC_OPCODE_VLE) |
d6ed37ed | 1188 | as_bad (_("the use of -mvle requires big endian.")); |
252b5132 RH |
1189 | } |
1190 | ||
1191 | else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0) | |
1192 | { | |
1193 | target_big_endian = 1; | |
1194 | set_target_endian = 1; | |
1195 | } | |
1196 | ||
1197 | else if (strcmp (arg, "solaris") == 0) | |
1198 | { | |
b34976b6 | 1199 | msolaris = TRUE; |
252b5132 RH |
1200 | ppc_comment_chars = ppc_solaris_comment_chars; |
1201 | } | |
1202 | ||
1203 | else if (strcmp (arg, "no-solaris") == 0) | |
1204 | { | |
b34976b6 | 1205 | msolaris = FALSE; |
252b5132 RH |
1206 | ppc_comment_chars = ppc_eabi_comment_chars; |
1207 | } | |
1208 | #endif | |
1209 | else | |
1210 | { | |
1211 | as_bad (_("invalid switch -m%s"), arg); | |
1212 | return 0; | |
1213 | } | |
1214 | break; | |
1215 | ||
1216 | #ifdef OBJ_ELF | |
1217 | /* -V: SVR4 argument to print version ID. */ | |
1218 | case 'V': | |
1219 | print_version_id (); | |
1220 | break; | |
1221 | ||
1222 | /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section | |
1223 | should be emitted or not. FIXME: Not implemented. */ | |
1224 | case 'Q': | |
1225 | break; | |
1226 | ||
1227 | /* Solaris takes -s to specify that .stabs go in a .stabs section, | |
1228 | rather than .stabs.excl, which is ignored by the linker. | |
1229 | FIXME: Not implemented. */ | |
1230 | case 's': | |
1231 | if (arg) | |
1232 | return 0; | |
1233 | ||
1234 | break; | |
1235 | #endif | |
1236 | ||
cef4f754 AM |
1237 | case OPTION_NOPS: |
1238 | { | |
1239 | char *end; | |
1240 | nop_limit = strtoul (optarg, &end, 0); | |
1241 | if (*end) | |
1242 | as_bad (_("--nops needs a numeric argument")); | |
1243 | } | |
1244 | break; | |
85645aed | 1245 | |
252b5132 RH |
1246 | default: |
1247 | return 0; | |
1248 | } | |
1249 | ||
1250 | return 1; | |
1251 | } | |
1252 | ||
1253 | void | |
98027b10 | 1254 | md_show_usage (FILE *stream) |
252b5132 | 1255 | { |
bc805888 | 1256 | fprintf (stream, _("\ |
252b5132 | 1257 | PowerPC options:\n\ |
ce3d2015 AM |
1258 | -a32 generate ELF32/XCOFF32\n\ |
1259 | -a64 generate ELF64/XCOFF64\n\ | |
1260 | -u ignored\n\ | |
1261 | -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\ | |
1262 | -mpwr generate code for POWER (RIOS1)\n\ | |
1263 | -m601 generate code for PowerPC 601\n\ | |
418c1742 | 1264 | -mppc, -mppc32, -m603, -m604\n\ |
ce3d2015 AM |
1265 | generate code for PowerPC 603/604\n\ |
1266 | -m403 generate code for PowerPC 403\n\ | |
1267 | -m405 generate code for PowerPC 405\n\ | |
1268 | -m440 generate code for PowerPC 440\n\ | |
1269 | -m464 generate code for PowerPC 464\n\ | |
1270 | -m476 generate code for PowerPC 476\n\ | |
f5c120c5 | 1271 | -m7400, -m7410, -m7450, -m7455\n\ |
ce3d2015 AM |
1272 | generate code for PowerPC 7400/7410/7450/7455\n\ |
1273 | -m750cl generate code for PowerPC 750cl\n")); | |
df12615d | 1274 | fprintf (stream, _("\ |
ce3d2015 AM |
1275 | -mppc64, -m620 generate code for PowerPC 620/625/630\n\ |
1276 | -mppc64bridge generate code for PowerPC 64, including bridge insns\n\ | |
1277 | -mbooke generate code for 32-bit PowerPC BookE\n\ | |
1278 | -ma2 generate code for A2 architecture\n\ | |
cdc51b07 RS |
1279 | -mpower4, -mpwr4 generate code for Power4 architecture\n\ |
1280 | -mpower5, -mpwr5, -mpwr5x\n\ | |
1281 | generate code for Power5 architecture\n\ | |
1282 | -mpower6, -mpwr6 generate code for Power6 architecture\n\ | |
1283 | -mpower7, -mpwr7 generate code for Power7 architecture\n\ | |
5817ffd1 | 1284 | -mpower8, -mpwr8 generate code for Power8 architecture\n\ |
ce3d2015 AM |
1285 | -mcell generate code for Cell Broadband Engine architecture\n\ |
1286 | -mcom generate code Power/PowerPC common instructions\n\ | |
1287 | -many generate code for any architecture (PWR/PWRX/PPC)\n")); | |
6a0c61b7 | 1288 | fprintf (stream, _("\ |
ce3d2015 AM |
1289 | -maltivec generate code for AltiVec\n\ |
1290 | -mvsx generate code for Vector-Scalar (VSX) instructions\n\ | |
5817ffd1 | 1291 | -mhtm generate code for Hardware Transactional Memory\n\ |
ce3d2015 AM |
1292 | -me300 generate code for PowerPC e300 family\n\ |
1293 | -me500, -me500x2 generate code for Motorola e500 core complex\n\ | |
1294 | -me500mc, generate code for Freescale e500mc core complex\n\ | |
1295 | -me500mc64, generate code for Freescale e500mc64 core complex\n\ | |
aea77599 AM |
1296 | -me5500, generate code for Freescale e5500 core complex\n\ |
1297 | -me6500, generate code for Freescale e6500 core complex\n\ | |
ce3d2015 | 1298 | -mspe generate code for Motorola SPE instructions\n\ |
b9c361e0 | 1299 | -mvle generate code for Freescale VLE instructions\n\ |
ce3d2015 AM |
1300 | -mtitan generate code for AppliedMicro Titan core complex\n\ |
1301 | -mregnames Allow symbolic names for registers\n\ | |
1302 | -mno-regnames Do not allow symbolic names for registers\n")); | |
252b5132 | 1303 | #ifdef OBJ_ELF |
bc805888 | 1304 | fprintf (stream, _("\ |
ce3d2015 AM |
1305 | -mrelocatable support for GCC's -mrelocatble option\n\ |
1306 | -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\ | |
1307 | -memb set PPC_EMB bit in ELF flags\n\ | |
b8b738ac | 1308 | -mlittle, -mlittle-endian, -le\n\ |
ce3d2015 | 1309 | generate code for a little endian machine\n\ |
b8b738ac | 1310 | -mbig, -mbig-endian, -be\n\ |
ce3d2015 AM |
1311 | generate code for a big endian machine\n\ |
1312 | -msolaris generate code for Solaris\n\ | |
1313 | -mno-solaris do not generate code for Solaris\n\ | |
b8b738ac | 1314 | -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\ |
ce3d2015 AM |
1315 | -V print assembler version number\n\ |
1316 | -Qy, -Qn ignored\n")); | |
252b5132 | 1317 | #endif |
cef4f754 AM |
1318 | fprintf (stream, _("\ |
1319 | -nops=count when aligning, more than COUNT nops uses a branch\n")); | |
252b5132 RH |
1320 | } |
1321 | \f | |
1322 | /* Set ppc_cpu if it is not already set. */ | |
1323 | ||
1324 | static void | |
98027b10 | 1325 | ppc_set_cpu (void) |
252b5132 RH |
1326 | { |
1327 | const char *default_os = TARGET_OS; | |
1328 | const char *default_cpu = TARGET_CPU; | |
1329 | ||
7102e95e | 1330 | if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0) |
252b5132 | 1331 | { |
2a98c3a6 | 1332 | if (ppc_obj64) |
bdc70b4a | 1333 | ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64; |
2a98c3a6 AM |
1334 | else if (strncmp (default_os, "aix", 3) == 0 |
1335 | && default_os[3] >= '4' && default_os[3] <= '9') | |
bdc70b4a | 1336 | ppc_cpu |= PPC_OPCODE_COMMON; |
252b5132 | 1337 | else if (strncmp (default_os, "aix3", 4) == 0) |
bdc70b4a | 1338 | ppc_cpu |= PPC_OPCODE_POWER; |
252b5132 | 1339 | else if (strcmp (default_cpu, "rs6000") == 0) |
bdc70b4a | 1340 | ppc_cpu |= PPC_OPCODE_POWER; |
0baf16f2 | 1341 | else if (strncmp (default_cpu, "powerpc", 7) == 0) |
bdc70b4a | 1342 | ppc_cpu |= PPC_OPCODE_PPC; |
252b5132 | 1343 | else |
d6ed37ed | 1344 | as_fatal (_("unknown default cpu = %s, os = %s"), |
99a814a1 | 1345 | default_cpu, default_os); |
252b5132 RH |
1346 | } |
1347 | } | |
1348 | ||
9232bbb0 AM |
1349 | /* Figure out the BFD architecture to use. This function and ppc_mach |
1350 | are called well before md_begin, when the output file is opened. */ | |
252b5132 RH |
1351 | |
1352 | enum bfd_architecture | |
98027b10 | 1353 | ppc_arch (void) |
252b5132 RH |
1354 | { |
1355 | const char *default_cpu = TARGET_CPU; | |
1356 | ppc_set_cpu (); | |
1357 | ||
1358 | if ((ppc_cpu & PPC_OPCODE_PPC) != 0) | |
1359 | return bfd_arch_powerpc; | |
b9c361e0 JL |
1360 | if ((ppc_cpu & PPC_OPCODE_VLE) != 0) |
1361 | return bfd_arch_powerpc; | |
1362 | if ((ppc_cpu & PPC_OPCODE_POWER) != 0) | |
252b5132 | 1363 | return bfd_arch_rs6000; |
b9c361e0 | 1364 | if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0) |
252b5132 RH |
1365 | { |
1366 | if (strcmp (default_cpu, "rs6000") == 0) | |
1367 | return bfd_arch_rs6000; | |
0baf16f2 | 1368 | else if (strncmp (default_cpu, "powerpc", 7) == 0) |
252b5132 RH |
1369 | return bfd_arch_powerpc; |
1370 | } | |
1371 | ||
d6ed37ed | 1372 | as_fatal (_("neither Power nor PowerPC opcodes were selected.")); |
252b5132 RH |
1373 | return bfd_arch_unknown; |
1374 | } | |
1375 | ||
7f6d05e8 | 1376 | unsigned long |
98027b10 | 1377 | ppc_mach (void) |
7f6d05e8 | 1378 | { |
2a98c3a6 AM |
1379 | if (ppc_obj64) |
1380 | return bfd_mach_ppc64; | |
1381 | else if (ppc_arch () == bfd_arch_rs6000) | |
1382 | return bfd_mach_rs6k; | |
ce3d2015 AM |
1383 | else if (ppc_cpu & PPC_OPCODE_TITAN) |
1384 | return bfd_mach_ppc_titan; | |
b9c361e0 JL |
1385 | else if (ppc_cpu & PPC_OPCODE_VLE) |
1386 | return bfd_mach_ppc_vle; | |
2a98c3a6 AM |
1387 | else |
1388 | return bfd_mach_ppc; | |
7f6d05e8 CP |
1389 | } |
1390 | ||
81d4177b | 1391 | extern char* |
98027b10 | 1392 | ppc_target_format (void) |
7f6d05e8 CP |
1393 | { |
1394 | #ifdef OBJ_COFF | |
1395 | #ifdef TE_PE | |
99a814a1 | 1396 | return target_big_endian ? "pe-powerpc" : "pe-powerpcle"; |
7f6d05e8 | 1397 | #elif TE_POWERMAC |
0baf16f2 | 1398 | return "xcoff-powermac"; |
7f6d05e8 | 1399 | #else |
eb1e0e80 | 1400 | # ifdef TE_AIX5 |
edc1d652 | 1401 | return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1402 | # else |
edc1d652 | 1403 | return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1404 | # endif |
7f6d05e8 | 1405 | #endif |
7f6d05e8 CP |
1406 | #endif |
1407 | #ifdef OBJ_ELF | |
edc1d652 AM |
1408 | # ifdef TE_FreeBSD |
1409 | return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd"); | |
1410 | # elif defined (TE_VXWORKS) | |
9d8504b1 PB |
1411 | return "elf32-powerpc-vxworks"; |
1412 | # else | |
0baf16f2 | 1413 | return (target_big_endian |
2b3c4602 AM |
1414 | ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc") |
1415 | : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle")); | |
9d8504b1 | 1416 | # endif |
7f6d05e8 CP |
1417 | #endif |
1418 | } | |
1419 | ||
b9c361e0 JL |
1420 | /* Validate one entry in powerpc_opcodes[] or vle_opcodes[]. |
1421 | Return TRUE if there's a problem, otherwise FALSE. */ | |
1422 | ||
1423 | static bfd_boolean | |
1424 | insn_validate (const struct powerpc_opcode *op) | |
1425 | { | |
1426 | const unsigned char *o; | |
1427 | unsigned long omask = op->mask; | |
1428 | ||
1429 | /* The mask had better not trim off opcode bits. */ | |
1430 | if ((op->opcode & omask) != op->opcode) | |
1431 | { | |
1432 | as_bad (_("mask trims opcode bits for %s"), op->name); | |
1433 | return TRUE; | |
1434 | } | |
1435 | ||
1436 | /* The operands must not overlap the opcode or each other. */ | |
1437 | for (o = op->operands; *o; ++o) | |
1438 | { | |
1439 | if (*o >= num_powerpc_operands) | |
1440 | { | |
1441 | as_bad (_("operand index error for %s"), op->name); | |
1442 | return TRUE; | |
1443 | } | |
1444 | else | |
1445 | { | |
1446 | const struct powerpc_operand *operand = &powerpc_operands[*o]; | |
1447 | if (operand->shift != PPC_OPSHIFT_INV) | |
1448 | { | |
1449 | unsigned long mask; | |
1450 | ||
1451 | if (operand->shift >= 0) | |
1452 | mask = operand->bitm << operand->shift; | |
1453 | else | |
1454 | mask = operand->bitm >> -operand->shift; | |
1455 | if (omask & mask) | |
1456 | { | |
1457 | as_bad (_("operand %d overlap in %s"), | |
1458 | (int) (o - op->operands), op->name); | |
1459 | return TRUE; | |
1460 | } | |
1461 | omask |= mask; | |
1462 | } | |
1463 | } | |
1464 | } | |
1465 | return FALSE; | |
1466 | } | |
1467 | ||
69c040df | 1468 | /* Insert opcodes and macros into hash tables. Called at startup and |
1fe532cf | 1469 | for .machine pseudo. */ |
252b5132 | 1470 | |
69c040df AM |
1471 | static void |
1472 | ppc_setup_opcodes (void) | |
252b5132 | 1473 | { |
98027b10 | 1474 | const struct powerpc_opcode *op; |
252b5132 RH |
1475 | const struct powerpc_opcode *op_end; |
1476 | const struct powerpc_macro *macro; | |
1477 | const struct powerpc_macro *macro_end; | |
b84bf58a | 1478 | bfd_boolean bad_insn = FALSE; |
252b5132 | 1479 | |
69c040df AM |
1480 | if (ppc_hash != NULL) |
1481 | hash_die (ppc_hash); | |
1482 | if (ppc_macro_hash != NULL) | |
1483 | hash_die (ppc_macro_hash); | |
252b5132 RH |
1484 | |
1485 | /* Insert the opcodes into a hash table. */ | |
1486 | ppc_hash = hash_new (); | |
1487 | ||
c43a438d | 1488 | if (ENABLE_CHECKING) |
b84bf58a | 1489 | { |
c43a438d | 1490 | unsigned int i; |
b84bf58a | 1491 | |
3b8b57a9 AM |
1492 | /* An index into powerpc_operands is stored in struct fix |
1493 | fx_pcrel_adjust which is 8 bits wide. */ | |
1494 | gas_assert (num_powerpc_operands < 256); | |
1495 | ||
c43a438d AM |
1496 | /* Check operand masks. Code here and in the disassembler assumes |
1497 | all the 1's in the mask are contiguous. */ | |
1498 | for (i = 0; i < num_powerpc_operands; ++i) | |
b84bf58a | 1499 | { |
c43a438d AM |
1500 | unsigned long mask = powerpc_operands[i].bitm; |
1501 | unsigned long right_bit; | |
1502 | unsigned int j; | |
1503 | ||
1504 | right_bit = mask & -mask; | |
1505 | mask += right_bit; | |
1506 | right_bit = mask & -mask; | |
1507 | if (mask != right_bit) | |
1508 | { | |
1509 | as_bad (_("powerpc_operands[%d].bitm invalid"), i); | |
1510 | bad_insn = TRUE; | |
1511 | } | |
1512 | for (j = i + 1; j < num_powerpc_operands; ++j) | |
1513 | if (memcmp (&powerpc_operands[i], &powerpc_operands[j], | |
1514 | sizeof (powerpc_operands[0])) == 0) | |
1515 | { | |
1516 | as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"), | |
1517 | j, i); | |
1518 | bad_insn = TRUE; | |
1519 | } | |
b84bf58a AM |
1520 | } |
1521 | } | |
1522 | ||
252b5132 RH |
1523 | op_end = powerpc_opcodes + powerpc_num_opcodes; |
1524 | for (op = powerpc_opcodes; op < op_end; op++) | |
1525 | { | |
c43a438d | 1526 | if (ENABLE_CHECKING) |
b84bf58a | 1527 | { |
d815f1a9 | 1528 | if (op != powerpc_opcodes) |
8dbcd839 | 1529 | { |
b9c361e0 JL |
1530 | int old_opcode = PPC_OP (op[-1].opcode); |
1531 | int new_opcode = PPC_OP (op[0].opcode); | |
1532 | ||
1533 | #ifdef PRINT_OPCODE_TABLE | |
c0637f3a PB |
1534 | printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", |
1535 | op->name, (unsigned int) (op - powerpc_opcodes), | |
1536 | (unsigned int) new_opcode, (unsigned int) op->opcode, | |
1537 | (unsigned int) op->mask, (unsigned long long) op->flags); | |
b9c361e0 JL |
1538 | #endif |
1539 | ||
d815f1a9 AM |
1540 | /* The major opcodes had better be sorted. Code in the |
1541 | disassembler assumes the insns are sorted according to | |
1542 | major opcode. */ | |
b9c361e0 | 1543 | if (new_opcode < old_opcode) |
d815f1a9 AM |
1544 | { |
1545 | as_bad (_("major opcode is not sorted for %s"), | |
1546 | op->name); | |
1547 | bad_insn = TRUE; | |
1548 | } | |
8dbcd839 | 1549 | } |
b9c361e0 JL |
1550 | bad_insn |= insn_validate (op); |
1551 | } | |
c43a438d | 1552 | |
b9c361e0 JL |
1553 | if ((ppc_cpu & op->flags) != 0 |
1554 | && !(ppc_cpu & op->deprecated)) | |
1555 | { | |
1556 | const char *retval; | |
1557 | ||
1558 | retval = hash_insert (ppc_hash, op->name, (void *) op); | |
1559 | if (retval != NULL) | |
c43a438d | 1560 | { |
b9c361e0 | 1561 | as_bad (_("duplicate instruction %s"), |
c43a438d AM |
1562 | op->name); |
1563 | bad_insn = TRUE; | |
1564 | } | |
b9c361e0 JL |
1565 | } |
1566 | } | |
c43a438d | 1567 | |
b9c361e0 JL |
1568 | if ((ppc_cpu & PPC_OPCODE_ANY) != 0) |
1569 | for (op = powerpc_opcodes; op < op_end; op++) | |
1570 | hash_insert (ppc_hash, op->name, (void *) op); | |
1571 | ||
1572 | op_end = vle_opcodes + vle_num_opcodes; | |
1573 | for (op = vle_opcodes; op < op_end; op++) | |
1574 | { | |
1575 | if (ENABLE_CHECKING) | |
1576 | { | |
1577 | if (op != vle_opcodes) | |
1578 | { | |
1579 | unsigned old_seg, new_seg; | |
1580 | ||
1581 | old_seg = VLE_OP (op[-1].opcode, op[-1].mask); | |
1582 | old_seg = VLE_OP_TO_SEG (old_seg); | |
1583 | new_seg = VLE_OP (op[0].opcode, op[0].mask); | |
1584 | new_seg = VLE_OP_TO_SEG (new_seg); | |
1585 | ||
1586 | #ifdef PRINT_OPCODE_TABLE | |
c0637f3a PB |
1587 | printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", |
1588 | op->name, (unsigned int) (op - powerpc_opcodes), | |
1589 | (unsigned int) new_seg, (unsigned int) op->opcode, | |
1590 | (unsigned int) op->mask, (unsigned long long) op->flags); | |
b9c361e0 JL |
1591 | #endif |
1592 | /* The major opcodes had better be sorted. Code in the | |
1593 | disassembler assumes the insns are sorted according to | |
1594 | major opcode. */ | |
1595 | if (new_seg < old_seg) | |
1596 | { | |
1597 | as_bad (_("major opcode is not sorted for %s"), | |
1598 | op->name); | |
1599 | bad_insn = TRUE; | |
1600 | } | |
1601 | } | |
1602 | ||
1603 | bad_insn |= insn_validate (op); | |
c43a438d | 1604 | } |
252b5132 | 1605 | |
bdc70b4a | 1606 | if ((ppc_cpu & op->flags) != 0 |
1cb0a767 | 1607 | && !(ppc_cpu & op->deprecated)) |
252b5132 RH |
1608 | { |
1609 | const char *retval; | |
1610 | ||
98027b10 | 1611 | retval = hash_insert (ppc_hash, op->name, (void *) op); |
69c040df | 1612 | if (retval != NULL) |
252b5132 | 1613 | { |
b84bf58a | 1614 | as_bad (_("duplicate instruction %s"), |
99a814a1 | 1615 | op->name); |
b84bf58a | 1616 | bad_insn = TRUE; |
252b5132 RH |
1617 | } |
1618 | } | |
1619 | } | |
1620 | ||
b9c361e0 JL |
1621 | if ((ppc_cpu & PPC_OPCODE_VLE) != 0) |
1622 | for (op = vle_opcodes; op < op_end; op++) | |
98027b10 | 1623 | hash_insert (ppc_hash, op->name, (void *) op); |
3c9030c1 | 1624 | |
252b5132 RH |
1625 | /* Insert the macros into a hash table. */ |
1626 | ppc_macro_hash = hash_new (); | |
1627 | ||
1628 | macro_end = powerpc_macros + powerpc_num_macros; | |
1629 | for (macro = powerpc_macros; macro < macro_end; macro++) | |
1630 | { | |
33740db9 | 1631 | if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0) |
252b5132 RH |
1632 | { |
1633 | const char *retval; | |
1634 | ||
98027b10 | 1635 | retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro); |
252b5132 RH |
1636 | if (retval != (const char *) NULL) |
1637 | { | |
b84bf58a AM |
1638 | as_bad (_("duplicate macro %s"), macro->name); |
1639 | bad_insn = TRUE; | |
252b5132 RH |
1640 | } |
1641 | } | |
1642 | } | |
1643 | ||
b84bf58a | 1644 | if (bad_insn) |
252b5132 | 1645 | abort (); |
69c040df AM |
1646 | } |
1647 | ||
1648 | /* This function is called when the assembler starts up. It is called | |
1649 | after the options have been parsed and the output file has been | |
1650 | opened. */ | |
1651 | ||
1652 | void | |
98027b10 | 1653 | md_begin (void) |
69c040df AM |
1654 | { |
1655 | ppc_set_cpu (); | |
1656 | ||
1657 | ppc_cie_data_alignment = ppc_obj64 ? -8 : -4; | |
8fbf7334 | 1658 | ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4; |
69c040df AM |
1659 | |
1660 | #ifdef OBJ_ELF | |
1661 | /* Set the ELF flags if desired. */ | |
1662 | if (ppc_flags && !msolaris) | |
1663 | bfd_set_private_flags (stdoutput, ppc_flags); | |
1664 | #endif | |
1665 | ||
1666 | ppc_setup_opcodes (); | |
252b5132 | 1667 | |
67c1ffbe | 1668 | /* Tell the main code what the endianness is if it is not overridden |
99a814a1 | 1669 | by the user. */ |
252b5132 RH |
1670 | if (!set_target_endian) |
1671 | { | |
1672 | set_target_endian = 1; | |
1673 | target_big_endian = PPC_BIG_ENDIAN; | |
1674 | } | |
1675 | ||
1676 | #ifdef OBJ_XCOFF | |
1677 | ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG); | |
1678 | ||
1679 | /* Create dummy symbols to serve as initial csects. This forces the | |
1680 | text csects to precede the data csects. These symbols will not | |
1681 | be output. */ | |
1682 | ppc_text_csects = symbol_make ("dummy\001"); | |
809ffe0d | 1683 | symbol_get_tc (ppc_text_csects)->within = ppc_text_csects; |
252b5132 | 1684 | ppc_data_csects = symbol_make ("dummy\001"); |
809ffe0d | 1685 | symbol_get_tc (ppc_data_csects)->within = ppc_data_csects; |
252b5132 RH |
1686 | #endif |
1687 | ||
1688 | #ifdef TE_PE | |
1689 | ||
1690 | ppc_current_section = text_section; | |
81d4177b | 1691 | ppc_previous_section = 0; |
252b5132 RH |
1692 | |
1693 | #endif | |
1694 | } | |
1695 | ||
6a0c61b7 | 1696 | void |
98027b10 | 1697 | ppc_cleanup (void) |
6a0c61b7 | 1698 | { |
dc1d03fc | 1699 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
1700 | if (ppc_apuinfo_list == NULL) |
1701 | return; | |
1702 | ||
1703 | /* Ok, so write the section info out. We have this layout: | |
1704 | ||
1705 | byte data what | |
1706 | ---- ---- ---- | |
1707 | 0 8 length of "APUinfo\0" | |
1708 | 4 (n*4) number of APU's (4 bytes each) | |
1709 | 8 2 note type 2 | |
1710 | 12 "APUinfo\0" name | |
1711 | 20 APU#1 first APU's info | |
1712 | 24 APU#2 second APU's info | |
1713 | ... ... | |
1714 | */ | |
1715 | { | |
1716 | char *p; | |
1717 | asection *seg = now_seg; | |
1718 | subsegT subseg = now_subseg; | |
1719 | asection *apuinfo_secp = (asection *) NULL; | |
49181a6a | 1720 | unsigned int i; |
6a0c61b7 EZ |
1721 | |
1722 | /* Create the .PPC.EMB.apuinfo section. */ | |
1723 | apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0); | |
1724 | bfd_set_section_flags (stdoutput, | |
1725 | apuinfo_secp, | |
e1a9cb8e | 1726 | SEC_HAS_CONTENTS | SEC_READONLY); |
6a0c61b7 EZ |
1727 | |
1728 | p = frag_more (4); | |
1729 | md_number_to_chars (p, (valueT) 8, 4); | |
1730 | ||
1731 | p = frag_more (4); | |
e98d298c | 1732 | md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4); |
6a0c61b7 EZ |
1733 | |
1734 | p = frag_more (4); | |
1735 | md_number_to_chars (p, (valueT) 2, 4); | |
1736 | ||
1737 | p = frag_more (8); | |
1738 | strcpy (p, "APUinfo"); | |
1739 | ||
1740 | for (i = 0; i < ppc_apuinfo_num; i++) | |
1741 | { | |
b34976b6 AM |
1742 | p = frag_more (4); |
1743 | md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); | |
6a0c61b7 EZ |
1744 | } |
1745 | ||
1746 | frag_align (2, 0, 0); | |
1747 | ||
1748 | /* We probably can't restore the current segment, for there likely | |
1749 | isn't one yet... */ | |
1750 | if (seg && subseg) | |
1751 | subseg_set (seg, subseg); | |
1752 | } | |
dc1d03fc | 1753 | #endif |
6a0c61b7 EZ |
1754 | } |
1755 | ||
252b5132 RH |
1756 | /* Insert an operand value into an instruction. */ |
1757 | ||
1758 | static unsigned long | |
a1867a27 AM |
1759 | ppc_insert_operand (unsigned long insn, |
1760 | const struct powerpc_operand *operand, | |
1761 | offsetT val, | |
91d6fa6a | 1762 | ppc_cpu_t cpu, |
a1867a27 AM |
1763 | char *file, |
1764 | unsigned int line) | |
252b5132 | 1765 | { |
b84bf58a | 1766 | long min, max, right; |
eb42fac1 | 1767 | |
b84bf58a AM |
1768 | max = operand->bitm; |
1769 | right = max & -max; | |
1770 | min = 0; | |
1771 | ||
1772 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
252b5132 | 1773 | { |
b84bf58a | 1774 | if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0) |
931774a9 AM |
1775 | max = (max >> 1) & -right; |
1776 | min = ~max & -right; | |
b84bf58a | 1777 | } |
252b5132 | 1778 | |
b84bf58a | 1779 | if ((operand->flags & PPC_OPERAND_PLUS1) != 0) |
3896c469 | 1780 | max++; |
252b5132 | 1781 | |
b84bf58a | 1782 | if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) |
a1867a27 AM |
1783 | { |
1784 | long tmp = min; | |
1785 | min = -max; | |
1786 | max = -tmp; | |
1787 | } | |
b84bf58a | 1788 | |
a1867a27 AM |
1789 | if (min <= max) |
1790 | { | |
1791 | /* Some people write constants with the sign extension done by | |
1792 | hand but only up to 32 bits. This shouldn't really be valid, | |
1793 | but, to permit this code to assemble on a 64-bit host, we | |
1794 | sign extend the 32-bit value to 64 bits if so doing makes the | |
1795 | value valid. */ | |
1796 | if (val > max | |
1797 | && (offsetT) (val - 0x80000000 - 0x80000000) >= min | |
1798 | && (offsetT) (val - 0x80000000 - 0x80000000) <= max | |
1799 | && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0) | |
1800 | val = val - 0x80000000 - 0x80000000; | |
1801 | ||
1802 | /* Similarly, people write expressions like ~(1<<15), and expect | |
1803 | this to be OK for a 32-bit unsigned value. */ | |
1804 | else if (val < min | |
1805 | && (offsetT) (val + 0x80000000 + 0x80000000) >= min | |
1806 | && (offsetT) (val + 0x80000000 + 0x80000000) <= max | |
1807 | && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0) | |
1808 | val = val + 0x80000000 + 0x80000000; | |
1809 | ||
1810 | else if (val < min | |
1811 | || val > max | |
1812 | || (val & (right - 1)) != 0) | |
1813 | as_bad_value_out_of_range (_("operand"), val, min, max, file, line); | |
1814 | } | |
b84bf58a | 1815 | |
252b5132 RH |
1816 | if (operand->insert) |
1817 | { | |
1818 | const char *errmsg; | |
1819 | ||
1820 | errmsg = NULL; | |
91d6fa6a | 1821 | insn = (*operand->insert) (insn, (long) val, cpu, &errmsg); |
252b5132 | 1822 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 1823 | as_bad_where (file, line, "%s", errmsg); |
252b5132 | 1824 | } |
b9c361e0 | 1825 | else if (operand->shift >= 0) |
b84bf58a | 1826 | insn |= ((long) val & operand->bitm) << operand->shift; |
b9c361e0 JL |
1827 | else |
1828 | insn |= ((long) val & operand->bitm) >> -operand->shift; | |
252b5132 RH |
1829 | |
1830 | return insn; | |
1831 | } | |
1832 | ||
1833 | \f | |
1834 | #ifdef OBJ_ELF | |
1835 | /* Parse @got, etc. and return the desired relocation. */ | |
1836 | static bfd_reloc_code_real_type | |
98027b10 | 1837 | ppc_elf_suffix (char **str_p, expressionS *exp_p) |
252b5132 RH |
1838 | { |
1839 | struct map_bfd { | |
1840 | char *string; | |
b7d7dc63 AM |
1841 | unsigned int length : 8; |
1842 | unsigned int valid32 : 1; | |
1843 | unsigned int valid64 : 1; | |
1844 | unsigned int reloc; | |
252b5132 RH |
1845 | }; |
1846 | ||
1847 | char ident[20]; | |
1848 | char *str = *str_p; | |
1849 | char *str2; | |
1850 | int ch; | |
1851 | int len; | |
15c1449b | 1852 | const struct map_bfd *ptr; |
252b5132 | 1853 | |
b7d7dc63 AM |
1854 | #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } |
1855 | #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } | |
1856 | #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } | |
252b5132 | 1857 | |
15c1449b | 1858 | static const struct map_bfd mapping[] = { |
b7d7dc63 AM |
1859 | MAP ("l", BFD_RELOC_LO16), |
1860 | MAP ("h", BFD_RELOC_HI16), | |
1861 | MAP ("ha", BFD_RELOC_HI16_S), | |
1862 | MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), | |
1863 | MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), | |
1864 | MAP ("got", BFD_RELOC_16_GOTOFF), | |
1865 | MAP ("got@l", BFD_RELOC_LO16_GOTOFF), | |
1866 | MAP ("got@h", BFD_RELOC_HI16_GOTOFF), | |
1867 | MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), | |
1868 | MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), | |
1869 | MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), | |
1870 | MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), | |
1871 | MAP ("copy", BFD_RELOC_PPC_COPY), | |
1872 | MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), | |
1873 | MAP ("sectoff", BFD_RELOC_16_BASEREL), | |
1874 | MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), | |
1875 | MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), | |
1876 | MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), | |
1877 | MAP ("tls", BFD_RELOC_PPC_TLS), | |
1878 | MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), | |
1879 | MAP ("dtprel", BFD_RELOC_PPC_DTPREL), | |
1880 | MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), | |
1881 | MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), | |
1882 | MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), | |
1883 | MAP ("tprel", BFD_RELOC_PPC_TPREL), | |
1884 | MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), | |
1885 | MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), | |
1886 | MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), | |
1887 | MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), | |
1888 | MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), | |
1889 | MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), | |
1890 | MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), | |
1891 | MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), | |
1892 | MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), | |
1893 | MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), | |
1894 | MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), | |
1895 | MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), | |
1896 | MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), | |
1897 | MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), | |
1898 | MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), | |
1899 | MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), | |
1900 | MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), | |
1901 | MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), | |
1902 | MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), | |
1903 | MAP32 ("fixup", BFD_RELOC_CTOR), | |
1904 | MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), | |
1905 | MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), | |
1906 | MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), | |
1907 | MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), | |
1908 | MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), | |
1909 | MAP32 ("sdarel", BFD_RELOC_GPREL16), | |
b9c361e0 JL |
1910 | MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A), |
1911 | MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A), | |
1912 | MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A), | |
b7d7dc63 AM |
1913 | MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), |
1914 | MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), | |
1915 | MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), | |
1916 | MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), | |
1917 | MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), | |
1918 | MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), | |
1919 | MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), | |
1920 | MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), | |
1921 | MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), | |
b9c361e0 | 1922 | MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO), |
b7d7dc63 AM |
1923 | MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), |
1924 | MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), | |
1925 | MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), | |
1926 | MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), | |
1927 | MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), | |
1928 | MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), | |
1929 | MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), | |
1930 | MAP32 ("xgot", BFD_RELOC_PPC_TOC16), | |
f9c6b907 AM |
1931 | MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH), |
1932 | MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA), | |
b7d7dc63 AM |
1933 | MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), |
1934 | MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), | |
1935 | MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), | |
1936 | MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), | |
1937 | MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), | |
1938 | MAP64 ("toc", BFD_RELOC_PPC_TOC16), | |
1939 | MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), | |
1940 | MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), | |
1941 | MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), | |
f9c6b907 AM |
1942 | MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH), |
1943 | MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA), | |
b7d7dc63 AM |
1944 | MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), |
1945 | MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), | |
1946 | MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), | |
1947 | MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), | |
45965137 | 1948 | MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL), |
f9c6b907 AM |
1949 | MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH), |
1950 | MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA), | |
b7d7dc63 AM |
1951 | MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), |
1952 | MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), | |
1953 | MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), | |
1954 | MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), | |
62ebcb5c | 1955 | { (char *) 0, 0, 0, 0, BFD_RELOC_NONE } |
252b5132 RH |
1956 | }; |
1957 | ||
1958 | if (*str++ != '@') | |
62ebcb5c | 1959 | return BFD_RELOC_NONE; |
252b5132 RH |
1960 | |
1961 | for (ch = *str, str2 = ident; | |
1962 | (str2 < ident + sizeof (ident) - 1 | |
3882b010 | 1963 | && (ISALNUM (ch) || ch == '@')); |
252b5132 RH |
1964 | ch = *++str) |
1965 | { | |
3882b010 | 1966 | *str2++ = TOLOWER (ch); |
252b5132 RH |
1967 | } |
1968 | ||
1969 | *str2 = '\0'; | |
1970 | len = str2 - ident; | |
1971 | ||
1972 | ch = ident[0]; | |
1973 | for (ptr = &mapping[0]; ptr->length > 0; ptr++) | |
1974 | if (ch == ptr->string[0] | |
1975 | && len == ptr->length | |
b7d7dc63 AM |
1976 | && memcmp (ident, ptr->string, ptr->length) == 0 |
1977 | && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) | |
252b5132 | 1978 | { |
15c1449b AM |
1979 | int reloc = ptr->reloc; |
1980 | ||
727fc41e AM |
1981 | if (!ppc_obj64 && exp_p->X_add_number != 0) |
1982 | { | |
1983 | switch (reloc) | |
1984 | { | |
1985 | case BFD_RELOC_16_GOTOFF: | |
1986 | case BFD_RELOC_LO16_GOTOFF: | |
1987 | case BFD_RELOC_HI16_GOTOFF: | |
1988 | case BFD_RELOC_HI16_S_GOTOFF: | |
1989 | as_warn (_("identifier+constant@got means " | |
1990 | "identifier@got+constant")); | |
1991 | break; | |
1992 | ||
1993 | case BFD_RELOC_PPC_GOT_TLSGD16: | |
1994 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
1995 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
1996 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
1997 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
1998 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
1999 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
2000 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
2001 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
2002 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
2003 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
2004 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
2005 | case BFD_RELOC_PPC_GOT_TPREL16: | |
2006 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
2007 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
2008 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
2009 | as_bad (_("symbol+offset not supported for got tls")); | |
2010 | break; | |
2011 | } | |
2012 | } | |
5f6db75a AM |
2013 | |
2014 | /* Now check for identifier@suffix+constant. */ | |
2015 | if (*str == '-' || *str == '+') | |
252b5132 | 2016 | { |
5f6db75a AM |
2017 | char *orig_line = input_line_pointer; |
2018 | expressionS new_exp; | |
2019 | ||
2020 | input_line_pointer = str; | |
2021 | expression (&new_exp); | |
2022 | if (new_exp.X_op == O_constant) | |
252b5132 | 2023 | { |
5f6db75a AM |
2024 | exp_p->X_add_number += new_exp.X_add_number; |
2025 | str = input_line_pointer; | |
252b5132 | 2026 | } |
5f6db75a AM |
2027 | |
2028 | if (&input_line_pointer != str_p) | |
2029 | input_line_pointer = orig_line; | |
252b5132 | 2030 | } |
252b5132 | 2031 | *str_p = str; |
0baf16f2 | 2032 | |
2b3c4602 | 2033 | if (reloc == (int) BFD_RELOC_PPC64_TOC |
9f2b53d7 AM |
2034 | && exp_p->X_op == O_symbol |
2035 | && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0) | |
0baf16f2 | 2036 | { |
9f2b53d7 AM |
2037 | /* Change the symbol so that the dummy .TOC. symbol can be |
2038 | omitted from the object file. */ | |
0baf16f2 AM |
2039 | exp_p->X_add_symbol = &abs_symbol; |
2040 | } | |
2041 | ||
15c1449b | 2042 | return (bfd_reloc_code_real_type) reloc; |
252b5132 RH |
2043 | } |
2044 | ||
62ebcb5c | 2045 | return BFD_RELOC_NONE; |
252b5132 RH |
2046 | } |
2047 | ||
62ebcb5c | 2048 | /* Support @got, etc. on constants emitted via .short, .int etc. */ |
99a814a1 | 2049 | |
62ebcb5c AM |
2050 | bfd_reloc_code_real_type |
2051 | ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes) | |
2052 | { | |
2053 | expression (exp); | |
2054 | if (nbytes >= 2 && *input_line_pointer == '@') | |
2055 | return ppc_elf_suffix (&input_line_pointer, exp); | |
2056 | return BFD_RELOC_NONE; | |
252b5132 RH |
2057 | } |
2058 | ||
2059 | /* Solaris pseduo op to change to the .rodata section. */ | |
2060 | static void | |
98027b10 | 2061 | ppc_elf_rdata (int xxx) |
252b5132 RH |
2062 | { |
2063 | char *save_line = input_line_pointer; | |
2064 | static char section[] = ".rodata\n"; | |
2065 | ||
99a814a1 | 2066 | /* Just pretend this is .section .rodata */ |
252b5132 RH |
2067 | input_line_pointer = section; |
2068 | obj_elf_section (xxx); | |
2069 | ||
2070 | input_line_pointer = save_line; | |
2071 | } | |
2072 | ||
99a814a1 | 2073 | /* Pseudo op to make file scope bss items. */ |
252b5132 | 2074 | static void |
98027b10 | 2075 | ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED) |
252b5132 | 2076 | { |
98027b10 AM |
2077 | char *name; |
2078 | char c; | |
2079 | char *p; | |
252b5132 | 2080 | offsetT size; |
98027b10 | 2081 | symbolS *symbolP; |
252b5132 RH |
2082 | offsetT align; |
2083 | segT old_sec; | |
2084 | int old_subsec; | |
2085 | char *pfrag; | |
2086 | int align2; | |
2087 | ||
2088 | name = input_line_pointer; | |
2089 | c = get_symbol_end (); | |
2090 | ||
99a814a1 | 2091 | /* just after name is now '\0'. */ |
252b5132 RH |
2092 | p = input_line_pointer; |
2093 | *p = c; | |
2094 | SKIP_WHITESPACE (); | |
2095 | if (*input_line_pointer != ',') | |
2096 | { | |
d6ed37ed | 2097 | as_bad (_("expected comma after symbol-name: rest of line ignored.")); |
252b5132 RH |
2098 | ignore_rest_of_line (); |
2099 | return; | |
2100 | } | |
2101 | ||
2102 | input_line_pointer++; /* skip ',' */ | |
2103 | if ((size = get_absolute_expression ()) < 0) | |
2104 | { | |
2105 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); | |
2106 | ignore_rest_of_line (); | |
2107 | return; | |
2108 | } | |
2109 | ||
2110 | /* The third argument to .lcomm is the alignment. */ | |
2111 | if (*input_line_pointer != ',') | |
2112 | align = 8; | |
2113 | else | |
2114 | { | |
2115 | ++input_line_pointer; | |
2116 | align = get_absolute_expression (); | |
2117 | if (align <= 0) | |
2118 | { | |
2119 | as_warn (_("ignoring bad alignment")); | |
2120 | align = 8; | |
2121 | } | |
2122 | } | |
2123 | ||
2124 | *p = 0; | |
2125 | symbolP = symbol_find_or_make (name); | |
2126 | *p = c; | |
2127 | ||
2128 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
2129 | { | |
d6ed37ed | 2130 | as_bad (_("ignoring attempt to re-define symbol `%s'."), |
252b5132 RH |
2131 | S_GET_NAME (symbolP)); |
2132 | ignore_rest_of_line (); | |
2133 | return; | |
2134 | } | |
2135 | ||
2136 | if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) | |
2137 | { | |
d6ed37ed | 2138 | as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."), |
252b5132 RH |
2139 | S_GET_NAME (symbolP), |
2140 | (long) S_GET_VALUE (symbolP), | |
2141 | (long) size); | |
2142 | ||
2143 | ignore_rest_of_line (); | |
2144 | return; | |
2145 | } | |
2146 | ||
99a814a1 | 2147 | /* Allocate_bss. */ |
252b5132 RH |
2148 | old_sec = now_seg; |
2149 | old_subsec = now_subseg; | |
2150 | if (align) | |
2151 | { | |
99a814a1 | 2152 | /* Convert to a power of 2 alignment. */ |
252b5132 RH |
2153 | for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2); |
2154 | if (align != 1) | |
2155 | { | |
d6ed37ed | 2156 | as_bad (_("common alignment not a power of 2")); |
252b5132 RH |
2157 | ignore_rest_of_line (); |
2158 | return; | |
2159 | } | |
2160 | } | |
2161 | else | |
2162 | align2 = 0; | |
2163 | ||
2164 | record_alignment (bss_section, align2); | |
cbe02d4f | 2165 | subseg_set (bss_section, 1); |
252b5132 RH |
2166 | if (align2) |
2167 | frag_align (align2, 0, 0); | |
2168 | if (S_GET_SEGMENT (symbolP) == bss_section) | |
49309057 ILT |
2169 | symbol_get_frag (symbolP)->fr_symbol = 0; |
2170 | symbol_set_frag (symbolP, frag_now); | |
252b5132 RH |
2171 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, |
2172 | (char *) 0); | |
2173 | *pfrag = 0; | |
2174 | S_SET_SIZE (symbolP, size); | |
2175 | S_SET_SEGMENT (symbolP, bss_section); | |
2176 | subseg_set (old_sec, old_subsec); | |
2177 | demand_empty_rest_of_line (); | |
2178 | } | |
2179 | ||
6911b7dc AM |
2180 | /* Pseudo op to set symbol local entry point. */ |
2181 | static void | |
2182 | ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED) | |
2183 | { | |
2184 | char *name = input_line_pointer; | |
2185 | char c = get_symbol_end (); | |
2186 | char *p; | |
2187 | expressionS exp; | |
2188 | symbolS *sym; | |
2189 | asymbol *bfdsym; | |
2190 | elf_symbol_type *elfsym; | |
2191 | ||
2192 | p = input_line_pointer; | |
2193 | *p = c; | |
2194 | SKIP_WHITESPACE (); | |
2195 | if (*input_line_pointer != ',') | |
2196 | { | |
2197 | *p = 0; | |
2198 | as_bad (_("expected comma after name `%s' in .localentry directive"), | |
2199 | name); | |
2200 | *p = c; | |
2201 | ignore_rest_of_line (); | |
2202 | return; | |
2203 | } | |
2204 | input_line_pointer++; | |
2205 | expression (&exp); | |
2206 | if (exp.X_op == O_absent) | |
2207 | { | |
2208 | as_bad (_("missing expression in .localentry directive")); | |
2209 | exp.X_op = O_constant; | |
2210 | exp.X_add_number = 0; | |
2211 | } | |
2212 | *p = 0; | |
2213 | sym = symbol_find_or_make (name); | |
2214 | *p = c; | |
2215 | ||
2216 | if (resolve_expression (&exp) | |
2217 | && exp.X_op == O_constant) | |
2218 | { | |
2219 | unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number); | |
2220 | ||
e2b5892e | 2221 | if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded)) |
6911b7dc AM |
2222 | as_bad (_(".localentry expression for `%s' " |
2223 | "is not a valid power of 2"), S_GET_NAME (sym)); | |
2224 | else | |
2225 | { | |
2226 | bfdsym = symbol_get_bfdsym (sym); | |
2227 | elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym); | |
2228 | gas_assert (elfsym); | |
2229 | elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK; | |
2230 | elfsym->internal_elf_sym.st_other |= encoded; | |
2231 | if (ppc_abiversion == 0) | |
2232 | ppc_abiversion = 2; | |
2233 | } | |
2234 | } | |
2235 | else | |
2236 | as_bad (_(".localentry expression for `%s' " | |
2237 | "does not evaluate to a constant"), S_GET_NAME (sym)); | |
2238 | ||
2239 | demand_empty_rest_of_line (); | |
2240 | } | |
2241 | ||
ee67d69a AM |
2242 | /* Pseudo op to set ABI version. */ |
2243 | static void | |
2244 | ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED) | |
2245 | { | |
2246 | expressionS exp; | |
2247 | ||
2248 | expression (&exp); | |
2249 | if (exp.X_op == O_absent) | |
2250 | { | |
2251 | as_bad (_("missing expression in .abiversion directive")); | |
2252 | exp.X_op = O_constant; | |
2253 | exp.X_add_number = 0; | |
2254 | } | |
2255 | ||
2256 | if (resolve_expression (&exp) | |
2257 | && exp.X_op == O_constant) | |
2258 | ppc_abiversion = exp.X_add_number; | |
2259 | else | |
2260 | as_bad (_(".abiversion expression does not evaluate to a constant")); | |
2261 | demand_empty_rest_of_line (); | |
2262 | } | |
2263 | ||
2264 | /* Set ABI version in output file. */ | |
2265 | void | |
2266 | ppc_elf_end (void) | |
2267 | { | |
2268 | if (ppc_obj64 && ppc_abiversion != 0) | |
2269 | { | |
2270 | elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI; | |
2271 | elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI; | |
2272 | } | |
2273 | } | |
2274 | ||
252b5132 RH |
2275 | /* Validate any relocations emitted for -mrelocatable, possibly adding |
2276 | fixups for word relocations in writable segments, so we can adjust | |
2277 | them at runtime. */ | |
2278 | static void | |
98027b10 | 2279 | ppc_elf_validate_fix (fixS *fixp, segT seg) |
252b5132 RH |
2280 | { |
2281 | if (fixp->fx_done || fixp->fx_pcrel) | |
2282 | return; | |
2283 | ||
2284 | switch (shlib) | |
2285 | { | |
2286 | case SHLIB_NONE: | |
2287 | case SHLIB_PIC: | |
2288 | return; | |
2289 | ||
5d6f4f16 | 2290 | case SHLIB_MRELOCATABLE: |
62ebcb5c | 2291 | if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF |
252b5132 RH |
2292 | && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF |
2293 | && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
2294 | && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
1cfc59d5 | 2295 | && fixp->fx_r_type != BFD_RELOC_16_BASEREL |
252b5132 RH |
2296 | && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL |
2297 | && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL | |
2298 | && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL | |
e138127a | 2299 | && (seg->flags & SEC_LOAD) != 0 |
252b5132 RH |
2300 | && strcmp (segment_name (seg), ".got2") != 0 |
2301 | && strcmp (segment_name (seg), ".dtors") != 0 | |
2302 | && strcmp (segment_name (seg), ".ctors") != 0 | |
2303 | && strcmp (segment_name (seg), ".fixup") != 0 | |
252b5132 RH |
2304 | && strcmp (segment_name (seg), ".gcc_except_table") != 0 |
2305 | && strcmp (segment_name (seg), ".eh_frame") != 0 | |
2306 | && strcmp (segment_name (seg), ".ex_shared") != 0) | |
2307 | { | |
2308 | if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0 | |
2309 | || fixp->fx_r_type != BFD_RELOC_CTOR) | |
2310 | { | |
2311 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
d6ed37ed | 2312 | _("relocation cannot be done when using -mrelocatable")); |
252b5132 RH |
2313 | } |
2314 | } | |
2315 | return; | |
2316 | } | |
2317 | } | |
0baf16f2 | 2318 | |
7e8d4ab4 AM |
2319 | /* Prevent elf_frob_file_before_adjust removing a weak undefined |
2320 | function descriptor sym if the corresponding code sym is used. */ | |
2321 | ||
2322 | void | |
98027b10 | 2323 | ppc_frob_file_before_adjust (void) |
0baf16f2 | 2324 | { |
7e8d4ab4 | 2325 | symbolS *symp; |
9232bbb0 | 2326 | asection *toc; |
0baf16f2 | 2327 | |
7e8d4ab4 AM |
2328 | if (!ppc_obj64) |
2329 | return; | |
2330 | ||
2331 | for (symp = symbol_rootP; symp; symp = symbol_next (symp)) | |
0baf16f2 | 2332 | { |
7e8d4ab4 AM |
2333 | const char *name; |
2334 | char *dotname; | |
2335 | symbolS *dotsym; | |
2336 | size_t len; | |
2337 | ||
2338 | name = S_GET_NAME (symp); | |
2339 | if (name[0] == '.') | |
2340 | continue; | |
2341 | ||
2342 | if (! S_IS_WEAK (symp) | |
2343 | || S_IS_DEFINED (symp)) | |
2344 | continue; | |
2345 | ||
2346 | len = strlen (name) + 1; | |
2347 | dotname = xmalloc (len + 1); | |
2348 | dotname[0] = '.'; | |
2349 | memcpy (dotname + 1, name, len); | |
461b725f | 2350 | dotsym = symbol_find_noref (dotname, 1); |
7e8d4ab4 AM |
2351 | free (dotname); |
2352 | if (dotsym != NULL && (symbol_used_p (dotsym) | |
2353 | || symbol_used_in_reloc_p (dotsym))) | |
670ec21d NC |
2354 | symbol_mark_used (symp); |
2355 | ||
0baf16f2 AM |
2356 | } |
2357 | ||
9232bbb0 AM |
2358 | toc = bfd_get_section_by_name (stdoutput, ".toc"); |
2359 | if (toc != NULL | |
01efc3af | 2360 | && toc_reloc_types != has_large_toc_reloc |
9232bbb0 AM |
2361 | && bfd_section_size (stdoutput, toc) > 0x10000) |
2362 | as_warn (_("TOC section size exceeds 64k")); | |
a38a07e0 AM |
2363 | } |
2364 | ||
2365 | /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be | |
2366 | emitted. Other uses of .TOC. will cause the symbol to be marked | |
2367 | with BSF_KEEP in md_apply_fix. */ | |
9232bbb0 | 2368 | |
a38a07e0 AM |
2369 | void |
2370 | ppc_elf_adjust_symtab (void) | |
2371 | { | |
2372 | if (ppc_obj64) | |
2373 | { | |
2374 | symbolS *symp; | |
2375 | symp = symbol_find (".TOC."); | |
2376 | if (symp != NULL) | |
2377 | { | |
2378 | asymbol *bsym = symbol_get_bfdsym (symp); | |
2379 | if ((bsym->flags & BSF_KEEP) == 0) | |
2380 | symbol_remove (symp, &symbol_rootP, &symbol_lastP); | |
a38a07e0 AM |
2381 | } |
2382 | } | |
0baf16f2 | 2383 | } |
252b5132 RH |
2384 | #endif /* OBJ_ELF */ |
2385 | \f | |
2386 | #ifdef TE_PE | |
2387 | ||
2388 | /* | |
99a814a1 | 2389 | * Summary of parse_toc_entry. |
252b5132 RH |
2390 | * |
2391 | * in: Input_line_pointer points to the '[' in one of: | |
2392 | * | |
2393 | * [toc] [tocv] [toc32] [toc64] | |
2394 | * | |
2395 | * Anything else is an error of one kind or another. | |
2396 | * | |
81d4177b | 2397 | * out: |
252b5132 RH |
2398 | * return value: success or failure |
2399 | * toc_kind: kind of toc reference | |
2400 | * input_line_pointer: | |
2401 | * success: first char after the ']' | |
2402 | * failure: unchanged | |
2403 | * | |
2404 | * settings: | |
2405 | * | |
2406 | * [toc] - rv == success, toc_kind = default_toc | |
2407 | * [tocv] - rv == success, toc_kind = data_in_toc | |
2408 | * [toc32] - rv == success, toc_kind = must_be_32 | |
2409 | * [toc64] - rv == success, toc_kind = must_be_64 | |
2410 | * | |
2411 | */ | |
2412 | ||
81d4177b KH |
2413 | enum toc_size_qualifier |
2414 | { | |
252b5132 RH |
2415 | default_toc, /* The toc cell constructed should be the system default size */ |
2416 | data_in_toc, /* This is a direct reference to a toc cell */ | |
2417 | must_be_32, /* The toc cell constructed must be 32 bits wide */ | |
2418 | must_be_64 /* The toc cell constructed must be 64 bits wide */ | |
2419 | }; | |
2420 | ||
2421 | static int | |
98027b10 | 2422 | parse_toc_entry (enum toc_size_qualifier *toc_kind) |
252b5132 RH |
2423 | { |
2424 | char *start; | |
2425 | char *toc_spec; | |
2426 | char c; | |
2427 | enum toc_size_qualifier t; | |
2428 | ||
99a814a1 | 2429 | /* Save the input_line_pointer. */ |
252b5132 RH |
2430 | start = input_line_pointer; |
2431 | ||
99a814a1 | 2432 | /* Skip over the '[' , and whitespace. */ |
252b5132 RH |
2433 | ++input_line_pointer; |
2434 | SKIP_WHITESPACE (); | |
81d4177b | 2435 | |
99a814a1 | 2436 | /* Find the spelling of the operand. */ |
252b5132 RH |
2437 | toc_spec = input_line_pointer; |
2438 | c = get_symbol_end (); | |
2439 | ||
99a814a1 | 2440 | if (strcmp (toc_spec, "toc") == 0) |
252b5132 RH |
2441 | { |
2442 | t = default_toc; | |
2443 | } | |
99a814a1 | 2444 | else if (strcmp (toc_spec, "tocv") == 0) |
252b5132 RH |
2445 | { |
2446 | t = data_in_toc; | |
2447 | } | |
99a814a1 | 2448 | else if (strcmp (toc_spec, "toc32") == 0) |
252b5132 RH |
2449 | { |
2450 | t = must_be_32; | |
2451 | } | |
99a814a1 | 2452 | else if (strcmp (toc_spec, "toc64") == 0) |
252b5132 RH |
2453 | { |
2454 | t = must_be_64; | |
2455 | } | |
2456 | else | |
2457 | { | |
2458 | as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec); | |
99a814a1 AM |
2459 | *input_line_pointer = c; |
2460 | input_line_pointer = start; | |
252b5132 RH |
2461 | return 0; |
2462 | } | |
2463 | ||
99a814a1 AM |
2464 | /* Now find the ']'. */ |
2465 | *input_line_pointer = c; | |
252b5132 | 2466 | |
81d4177b KH |
2467 | SKIP_WHITESPACE (); /* leading whitespace could be there. */ |
2468 | c = *input_line_pointer++; /* input_line_pointer->past char in c. */ | |
252b5132 RH |
2469 | |
2470 | if (c != ']') | |
2471 | { | |
2472 | as_bad (_("syntax error: expected `]', found `%c'"), c); | |
99a814a1 | 2473 | input_line_pointer = start; |
252b5132 RH |
2474 | return 0; |
2475 | } | |
2476 | ||
99a814a1 | 2477 | *toc_kind = t; |
252b5132 RH |
2478 | return 1; |
2479 | } | |
2480 | #endif | |
3b8b57a9 | 2481 | |
3e60bf4d | 2482 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
3b8b57a9 AM |
2483 | /* See whether a symbol is in the TOC section. */ |
2484 | ||
2485 | static int | |
2486 | ppc_is_toc_sym (symbolS *sym) | |
2487 | { | |
3e60bf4d | 2488 | #ifdef OBJ_XCOFF |
9f6e76f4 TG |
2489 | return (symbol_get_tc (sym)->symbol_class == XMC_TC |
2490 | || symbol_get_tc (sym)->symbol_class == XMC_TC0); | |
f50c47f1 | 2491 | #endif |
3e60bf4d AM |
2492 | #ifdef OBJ_ELF |
2493 | const char *sname = segment_name (S_GET_SEGMENT (sym)); | |
2494 | if (ppc_obj64) | |
2495 | return strcmp (sname, ".toc") == 0; | |
2496 | else | |
2497 | return strcmp (sname, ".got") == 0; | |
2498 | #endif | |
2499 | } | |
2500 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ | |
252b5132 RH |
2501 | \f |
2502 | ||
dc1d03fc | 2503 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
2504 | #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff)) |
2505 | static void | |
98027b10 | 2506 | ppc_apuinfo_section_add (unsigned int apu, unsigned int version) |
6a0c61b7 EZ |
2507 | { |
2508 | unsigned int i; | |
2509 | ||
2510 | /* Check we don't already exist. */ | |
2511 | for (i = 0; i < ppc_apuinfo_num; i++) | |
dc1d03fc | 2512 | if (ppc_apuinfo_list[i] == APUID (apu, version)) |
6a0c61b7 | 2513 | return; |
b34976b6 | 2514 | |
6a0c61b7 EZ |
2515 | if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) |
2516 | { | |
2517 | if (ppc_apuinfo_num_alloc == 0) | |
2518 | { | |
2519 | ppc_apuinfo_num_alloc = 4; | |
2520 | ppc_apuinfo_list = (unsigned long *) | |
2521 | xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc); | |
2522 | } | |
2523 | else | |
2524 | { | |
2525 | ppc_apuinfo_num_alloc += 4; | |
2526 | ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list, | |
2527 | sizeof (unsigned long) * ppc_apuinfo_num_alloc); | |
2528 | } | |
2529 | } | |
dc1d03fc | 2530 | ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version); |
6a0c61b7 EZ |
2531 | } |
2532 | #undef APUID | |
dc1d03fc | 2533 | #endif |
6a0c61b7 EZ |
2534 | \f |
2535 | ||
252b5132 RH |
2536 | /* We need to keep a list of fixups. We can't simply generate them as |
2537 | we go, because that would require us to first create the frag, and | |
2538 | that would screw up references to ``.''. */ | |
2539 | ||
2540 | struct ppc_fixup | |
2541 | { | |
2542 | expressionS exp; | |
2543 | int opindex; | |
2544 | bfd_reloc_code_real_type reloc; | |
2545 | }; | |
2546 | ||
2547 | #define MAX_INSN_FIXUPS (5) | |
2548 | ||
b9c361e0 JL |
2549 | /* Form I16L. */ |
2550 | #define E_OR2I_INSN 0x7000C000 | |
2551 | #define E_AND2I_DOT_INSN 0x7000C800 | |
2552 | #define E_OR2IS_INSN 0x7000D000 | |
2553 | #define E_LIS_INSN 0x7000E000 | |
2554 | #define E_AND2IS_DOT_INSN 0x7000E800 | |
2555 | ||
2556 | /* Form I16A. */ | |
2557 | #define E_ADD2I_DOT_INSN 0x70008800 | |
2558 | #define E_ADD2IS_INSN 0x70009000 | |
2559 | #define E_CMP16I_INSN 0x70009800 | |
2560 | #define E_MULL2I_INSN 0x7000A000 | |
2561 | #define E_CMPL16I_INSN 0x7000A800 | |
2562 | #define E_CMPH16I_INSN 0x7000B000 | |
2563 | #define E_CMPHL16I_INSN 0x7000B800 | |
2564 | ||
252b5132 RH |
2565 | /* This routine is called for each instruction to be assembled. */ |
2566 | ||
2567 | void | |
98027b10 | 2568 | md_assemble (char *str) |
252b5132 RH |
2569 | { |
2570 | char *s; | |
2571 | const struct powerpc_opcode *opcode; | |
2572 | unsigned long insn; | |
2573 | const unsigned char *opindex_ptr; | |
2574 | int skip_optional; | |
2575 | int need_paren; | |
2576 | int next_opindex; | |
2577 | struct ppc_fixup fixups[MAX_INSN_FIXUPS]; | |
2578 | int fc; | |
2579 | char *f; | |
09b935ac | 2580 | int addr_mod; |
252b5132 | 2581 | int i; |
b9c361e0 | 2582 | unsigned int insn_length; |
252b5132 RH |
2583 | |
2584 | /* Get the opcode. */ | |
3882b010 | 2585 | for (s = str; *s != '\0' && ! ISSPACE (*s); s++) |
252b5132 RH |
2586 | ; |
2587 | if (*s != '\0') | |
2588 | *s++ = '\0'; | |
2589 | ||
2590 | /* Look up the opcode in the hash table. */ | |
2591 | opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str); | |
2592 | if (opcode == (const struct powerpc_opcode *) NULL) | |
2593 | { | |
2594 | const struct powerpc_macro *macro; | |
2595 | ||
2596 | macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str); | |
2597 | if (macro == (const struct powerpc_macro *) NULL) | |
d6ed37ed | 2598 | as_bad (_("unrecognized opcode: `%s'"), str); |
252b5132 RH |
2599 | else |
2600 | ppc_macro (s, macro); | |
2601 | ||
2602 | return; | |
2603 | } | |
2604 | ||
2605 | insn = opcode->opcode; | |
2606 | ||
2607 | str = s; | |
3882b010 | 2608 | while (ISSPACE (*str)) |
252b5132 RH |
2609 | ++str; |
2610 | ||
2611 | /* PowerPC operands are just expressions. The only real issue is | |
2612 | that a few operand types are optional. All cases which might use | |
1f6c9eb0 ZW |
2613 | an optional operand separate the operands only with commas (in some |
2614 | cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never | |
2615 | have optional operands). Most instructions with optional operands | |
2616 | have only one. Those that have more than one optional operand can | |
2617 | take either all their operands or none. So, before we start seriously | |
2618 | parsing the operands, we check to see if we have optional operands, | |
2619 | and if we do, we count the number of commas to see which operands | |
2620 | have been omitted. */ | |
252b5132 RH |
2621 | skip_optional = 0; |
2622 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) | |
2623 | { | |
2624 | const struct powerpc_operand *operand; | |
2625 | ||
2626 | operand = &powerpc_operands[*opindex_ptr]; | |
2627 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) | |
2628 | { | |
2629 | unsigned int opcount; | |
7fe9cf6b | 2630 | unsigned int num_operands_expected; |
252b5132 RH |
2631 | |
2632 | /* There is an optional operand. Count the number of | |
2633 | commas in the input line. */ | |
2634 | if (*str == '\0') | |
2635 | opcount = 0; | |
2636 | else | |
2637 | { | |
2638 | opcount = 1; | |
2639 | s = str; | |
2640 | while ((s = strchr (s, ',')) != (char *) NULL) | |
2641 | { | |
2642 | ++opcount; | |
2643 | ++s; | |
2644 | } | |
2645 | } | |
2646 | ||
7fe9cf6b NC |
2647 | /* Compute the number of expected operands. |
2648 | Do not count fake operands. */ | |
2649 | for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++) | |
2650 | if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0) | |
2651 | ++ num_operands_expected; | |
2652 | ||
252b5132 RH |
2653 | /* If there are fewer operands in the line then are called |
2654 | for by the instruction, we want to skip the optional | |
1f6c9eb0 | 2655 | operands. */ |
7fe9cf6b | 2656 | if (opcount < num_operands_expected) |
252b5132 RH |
2657 | skip_optional = 1; |
2658 | ||
2659 | break; | |
2660 | } | |
2661 | } | |
2662 | ||
2663 | /* Gather the operands. */ | |
2664 | need_paren = 0; | |
2665 | next_opindex = 0; | |
2666 | fc = 0; | |
2667 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) | |
2668 | { | |
2669 | const struct powerpc_operand *operand; | |
2670 | const char *errmsg; | |
2671 | char *hold; | |
2672 | expressionS ex; | |
2673 | char endc; | |
2674 | ||
2675 | if (next_opindex == 0) | |
2676 | operand = &powerpc_operands[*opindex_ptr]; | |
2677 | else | |
2678 | { | |
2679 | operand = &powerpc_operands[next_opindex]; | |
2680 | next_opindex = 0; | |
2681 | } | |
252b5132 RH |
2682 | errmsg = NULL; |
2683 | ||
2684 | /* If this is a fake operand, then we do not expect anything | |
2685 | from the input. */ | |
2686 | if ((operand->flags & PPC_OPERAND_FAKE) != 0) | |
2687 | { | |
2b3c4602 | 2688 | insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); |
252b5132 | 2689 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 2690 | as_bad ("%s", errmsg); |
252b5132 RH |
2691 | continue; |
2692 | } | |
2693 | ||
2694 | /* If this is an optional operand, and we are skipping it, just | |
2695 | insert a zero. */ | |
2696 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 | |
2697 | && skip_optional) | |
2698 | { | |
2699 | if (operand->insert) | |
2700 | { | |
2b3c4602 | 2701 | insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); |
252b5132 | 2702 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 2703 | as_bad ("%s", errmsg); |
252b5132 RH |
2704 | } |
2705 | if ((operand->flags & PPC_OPERAND_NEXT) != 0) | |
2706 | next_opindex = *opindex_ptr + 1; | |
2707 | continue; | |
2708 | } | |
2709 | ||
2710 | /* Gather the operand. */ | |
2711 | hold = input_line_pointer; | |
2712 | input_line_pointer = str; | |
2713 | ||
2714 | #ifdef TE_PE | |
81d4177b | 2715 | if (*input_line_pointer == '[') |
252b5132 RH |
2716 | { |
2717 | /* We are expecting something like the second argument here: | |
99a814a1 AM |
2718 | * |
2719 | * lwz r4,[toc].GS.0.static_int(rtoc) | |
2720 | * ^^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
2721 | * The argument following the `]' must be a symbol name, and the | |
2722 | * register must be the toc register: 'rtoc' or '2' | |
2723 | * | |
2724 | * The effect is to 0 as the displacement field | |
2725 | * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or | |
2726 | * the appropriate variation) reloc against it based on the symbol. | |
2727 | * The linker will build the toc, and insert the resolved toc offset. | |
2728 | * | |
2729 | * Note: | |
2730 | * o The size of the toc entry is currently assumed to be | |
2731 | * 32 bits. This should not be assumed to be a hard coded | |
2732 | * number. | |
2733 | * o In an effort to cope with a change from 32 to 64 bits, | |
2734 | * there are also toc entries that are specified to be | |
2735 | * either 32 or 64 bits: | |
2736 | * lwz r4,[toc32].GS.0.static_int(rtoc) | |
2737 | * lwz r4,[toc64].GS.0.static_int(rtoc) | |
2738 | * These demand toc entries of the specified size, and the | |
2739 | * instruction probably requires it. | |
2740 | */ | |
252b5132 RH |
2741 | |
2742 | int valid_toc; | |
2743 | enum toc_size_qualifier toc_kind; | |
2744 | bfd_reloc_code_real_type toc_reloc; | |
2745 | ||
99a814a1 AM |
2746 | /* Go parse off the [tocXX] part. */ |
2747 | valid_toc = parse_toc_entry (&toc_kind); | |
252b5132 | 2748 | |
81d4177b | 2749 | if (!valid_toc) |
252b5132 | 2750 | { |
a5840dce AM |
2751 | ignore_rest_of_line (); |
2752 | break; | |
252b5132 RH |
2753 | } |
2754 | ||
99a814a1 AM |
2755 | /* Now get the symbol following the ']'. */ |
2756 | expression (&ex); | |
252b5132 RH |
2757 | |
2758 | switch (toc_kind) | |
2759 | { | |
2760 | case default_toc: | |
99a814a1 AM |
2761 | /* In this case, we may not have seen the symbol yet, |
2762 | since it is allowed to appear on a .extern or .globl | |
2763 | or just be a label in the .data section. */ | |
252b5132 RH |
2764 | toc_reloc = BFD_RELOC_PPC_TOC16; |
2765 | break; | |
2766 | case data_in_toc: | |
99a814a1 AM |
2767 | /* 1. The symbol must be defined and either in the toc |
2768 | section, or a global. | |
2769 | 2. The reloc generated must have the TOCDEFN flag set | |
2770 | in upper bit mess of the reloc type. | |
2771 | FIXME: It's a little confusing what the tocv | |
2772 | qualifier can be used for. At the very least, I've | |
2773 | seen three uses, only one of which I'm sure I can | |
2774 | explain. */ | |
81d4177b KH |
2775 | if (ex.X_op == O_symbol) |
2776 | { | |
9c2799c2 | 2777 | gas_assert (ex.X_add_symbol != NULL); |
fed9b18a ILT |
2778 | if (symbol_get_bfdsym (ex.X_add_symbol)->section |
2779 | != tocdata_section) | |
252b5132 | 2780 | { |
99a814a1 | 2781 | as_bad (_("[tocv] symbol is not a toc symbol")); |
252b5132 RH |
2782 | } |
2783 | } | |
2784 | ||
2785 | toc_reloc = BFD_RELOC_PPC_TOC16; | |
2786 | break; | |
2787 | case must_be_32: | |
99a814a1 AM |
2788 | /* FIXME: these next two specifically specify 32/64 bit |
2789 | toc entries. We don't support them today. Is this | |
2790 | the right way to say that? */ | |
62ebcb5c | 2791 | toc_reloc = BFD_RELOC_NONE; |
d6ed37ed | 2792 | as_bad (_("unimplemented toc32 expression modifier")); |
252b5132 RH |
2793 | break; |
2794 | case must_be_64: | |
99a814a1 | 2795 | /* FIXME: see above. */ |
62ebcb5c | 2796 | toc_reloc = BFD_RELOC_NONE; |
d6ed37ed | 2797 | as_bad (_("unimplemented toc64 expression modifier")); |
252b5132 RH |
2798 | break; |
2799 | default: | |
bc805888 | 2800 | fprintf (stderr, |
99a814a1 AM |
2801 | _("Unexpected return value [%d] from parse_toc_entry!\n"), |
2802 | toc_kind); | |
bc805888 | 2803 | abort (); |
252b5132 RH |
2804 | break; |
2805 | } | |
2806 | ||
2807 | /* We need to generate a fixup for this expression. */ | |
2808 | if (fc >= MAX_INSN_FIXUPS) | |
2809 | as_fatal (_("too many fixups")); | |
2810 | ||
2811 | fixups[fc].reloc = toc_reloc; | |
2812 | fixups[fc].exp = ex; | |
2813 | fixups[fc].opindex = *opindex_ptr; | |
2814 | ++fc; | |
2815 | ||
99a814a1 AM |
2816 | /* Ok. We've set up the fixup for the instruction. Now make it |
2817 | look like the constant 0 was found here. */ | |
252b5132 RH |
2818 | ex.X_unsigned = 1; |
2819 | ex.X_op = O_constant; | |
2820 | ex.X_add_number = 0; | |
2821 | ex.X_add_symbol = NULL; | |
2822 | ex.X_op_symbol = NULL; | |
2823 | } | |
2824 | ||
2825 | else | |
2826 | #endif /* TE_PE */ | |
2827 | { | |
b9c361e0 JL |
2828 | if ((reg_names_p |
2829 | && (((operand->flags & PPC_OPERAND_CR_BIT) != 0) | |
2830 | || ((operand->flags & PPC_OPERAND_CR_REG) != 0))) | |
2ad068be | 2831 | || !register_name (&ex)) |
252b5132 | 2832 | { |
13abbae3 AM |
2833 | char save_lex = lex_type['%']; |
2834 | ||
b9c361e0 JL |
2835 | if (((operand->flags & PPC_OPERAND_CR_REG) != 0) |
2836 | || (operand->flags & PPC_OPERAND_CR_BIT) != 0) | |
13abbae3 AM |
2837 | { |
2838 | cr_operand = TRUE; | |
2839 | lex_type['%'] |= LEX_BEGIN_NAME; | |
2840 | } | |
252b5132 | 2841 | expression (&ex); |
b34976b6 | 2842 | cr_operand = FALSE; |
13abbae3 | 2843 | lex_type['%'] = save_lex; |
252b5132 RH |
2844 | } |
2845 | } | |
2846 | ||
2847 | str = input_line_pointer; | |
2848 | input_line_pointer = hold; | |
2849 | ||
2850 | if (ex.X_op == O_illegal) | |
2851 | as_bad (_("illegal operand")); | |
2852 | else if (ex.X_op == O_absent) | |
2853 | as_bad (_("missing operand")); | |
2854 | else if (ex.X_op == O_register) | |
2855 | { | |
2856 | insn = ppc_insert_operand (insn, operand, ex.X_add_number, | |
783de163 | 2857 | ppc_cpu, (char *) NULL, 0); |
252b5132 RH |
2858 | } |
2859 | else if (ex.X_op == O_constant) | |
2860 | { | |
2861 | #ifdef OBJ_ELF | |
81d4177b | 2862 | /* Allow @HA, @L, @H on constants. */ |
3b8b57a9 | 2863 | bfd_reloc_code_real_type reloc; |
252b5132 RH |
2864 | char *orig_str = str; |
2865 | ||
62ebcb5c | 2866 | if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE) |
252b5132 RH |
2867 | switch (reloc) |
2868 | { | |
2869 | default: | |
2870 | str = orig_str; | |
2871 | break; | |
2872 | ||
2873 | case BFD_RELOC_LO16: | |
f9c6b907 AM |
2874 | ex.X_add_number &= 0xffff; |
2875 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
0baf16f2 | 2876 | ex.X_add_number = SEX16 (ex.X_add_number); |
252b5132 RH |
2877 | break; |
2878 | ||
2879 | case BFD_RELOC_HI16: | |
f9c6b907 AM |
2880 | if (REPORT_OVERFLOW_HI && ppc_obj64) |
2881 | { | |
2882 | /* PowerPC64 @h is tested for overflow. */ | |
2883 | ex.X_add_number = (addressT) ex.X_add_number >> 16; | |
2884 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
2885 | { | |
2886 | addressT sign = (((addressT) -1 >> 16) + 1) >> 1; | |
2887 | ex.X_add_number | |
2888 | = ((addressT) ex.X_add_number ^ sign) - sign; | |
2889 | } | |
2890 | break; | |
2891 | } | |
2892 | /* Fall thru */ | |
2893 | ||
2894 | case BFD_RELOC_PPC64_ADDR16_HIGH: | |
2895 | ex.X_add_number = PPC_HI (ex.X_add_number); | |
2896 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
2897 | ex.X_add_number = SEX16 (ex.X_add_number); | |
252b5132 RH |
2898 | break; |
2899 | ||
2900 | case BFD_RELOC_HI16_S: | |
f9c6b907 AM |
2901 | if (REPORT_OVERFLOW_HI && ppc_obj64) |
2902 | { | |
2903 | /* PowerPC64 @ha is tested for overflow. */ | |
2904 | ex.X_add_number | |
2905 | = ((addressT) ex.X_add_number + 0x8000) >> 16; | |
2906 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
2907 | { | |
2908 | addressT sign = (((addressT) -1 >> 16) + 1) >> 1; | |
2909 | ex.X_add_number | |
2910 | = ((addressT) ex.X_add_number ^ sign) - sign; | |
2911 | } | |
2912 | break; | |
2913 | } | |
2914 | /* Fall thru */ | |
2915 | ||
2916 | case BFD_RELOC_PPC64_ADDR16_HIGHA: | |
2917 | ex.X_add_number = PPC_HA (ex.X_add_number); | |
2918 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
2919 | ex.X_add_number = SEX16 (ex.X_add_number); | |
0baf16f2 AM |
2920 | break; |
2921 | ||
0baf16f2 | 2922 | case BFD_RELOC_PPC64_HIGHER: |
f9c6b907 AM |
2923 | ex.X_add_number = PPC_HIGHER (ex.X_add_number); |
2924 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
2925 | ex.X_add_number = SEX16 (ex.X_add_number); | |
0baf16f2 AM |
2926 | break; |
2927 | ||
2928 | case BFD_RELOC_PPC64_HIGHER_S: | |
f9c6b907 AM |
2929 | ex.X_add_number = PPC_HIGHERA (ex.X_add_number); |
2930 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
2931 | ex.X_add_number = SEX16 (ex.X_add_number); | |
252b5132 | 2932 | break; |
0baf16f2 AM |
2933 | |
2934 | case BFD_RELOC_PPC64_HIGHEST: | |
f9c6b907 AM |
2935 | ex.X_add_number = PPC_HIGHEST (ex.X_add_number); |
2936 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
2937 | ex.X_add_number = SEX16 (ex.X_add_number); | |
0baf16f2 AM |
2938 | break; |
2939 | ||
2940 | case BFD_RELOC_PPC64_HIGHEST_S: | |
f9c6b907 AM |
2941 | ex.X_add_number = PPC_HIGHESTA (ex.X_add_number); |
2942 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
2943 | ex.X_add_number = SEX16 (ex.X_add_number); | |
0baf16f2 | 2944 | break; |
252b5132 | 2945 | } |
0baf16f2 | 2946 | #endif /* OBJ_ELF */ |
252b5132 | 2947 | insn = ppc_insert_operand (insn, operand, ex.X_add_number, |
783de163 | 2948 | ppc_cpu, (char *) NULL, 0); |
252b5132 | 2949 | } |
727fc41e | 2950 | else |
252b5132 | 2951 | { |
62ebcb5c | 2952 | bfd_reloc_code_real_type reloc = BFD_RELOC_NONE; |
3b8b57a9 | 2953 | #ifdef OBJ_ELF |
727fc41e | 2954 | if (ex.X_op == O_symbol && str[0] == '(') |
cdba85ec | 2955 | { |
727fc41e AM |
2956 | const char *sym_name = S_GET_NAME (ex.X_add_symbol); |
2957 | if (sym_name[0] == '.') | |
2958 | ++sym_name; | |
cdba85ec | 2959 | |
727fc41e | 2960 | if (strcasecmp (sym_name, "__tls_get_addr") == 0) |
252b5132 | 2961 | { |
727fc41e AM |
2962 | expressionS tls_exp; |
2963 | ||
2964 | hold = input_line_pointer; | |
2965 | input_line_pointer = str + 1; | |
2966 | expression (&tls_exp); | |
2967 | if (tls_exp.X_op == O_symbol) | |
2968 | { | |
62ebcb5c | 2969 | reloc = BFD_RELOC_NONE; |
727fc41e AM |
2970 | if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0) |
2971 | { | |
2972 | reloc = BFD_RELOC_PPC_TLSGD; | |
2973 | input_line_pointer += 7; | |
2974 | } | |
2975 | else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0) | |
2976 | { | |
2977 | reloc = BFD_RELOC_PPC_TLSLD; | |
2978 | input_line_pointer += 7; | |
2979 | } | |
62ebcb5c | 2980 | if (reloc != BFD_RELOC_NONE) |
727fc41e AM |
2981 | { |
2982 | SKIP_WHITESPACE (); | |
2983 | str = input_line_pointer; | |
2984 | ||
2985 | if (fc >= MAX_INSN_FIXUPS) | |
2986 | as_fatal (_("too many fixups")); | |
2987 | fixups[fc].exp = tls_exp; | |
2988 | fixups[fc].opindex = *opindex_ptr; | |
2989 | fixups[fc].reloc = reloc; | |
2990 | ++fc; | |
2991 | } | |
2992 | } | |
2993 | input_line_pointer = hold; | |
252b5132 RH |
2994 | } |
2995 | } | |
2996 | ||
62ebcb5c | 2997 | if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE) |
0baf16f2 | 2998 | { |
727fc41e | 2999 | /* Some TLS tweaks. */ |
0baf16f2 AM |
3000 | switch (reloc) |
3001 | { | |
727fc41e | 3002 | default: |
cdba85ec | 3003 | break; |
727fc41e AM |
3004 | |
3005 | case BFD_RELOC_PPC_TLS: | |
2d0f3896 AM |
3006 | if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0)) |
3007 | as_bad (_("@tls may not be used with \"%s\" operands"), | |
3008 | opcode->name); | |
3009 | else if (operand->shift != 11) | |
3010 | as_bad (_("@tls may only be used in last operand")); | |
3011 | else | |
3012 | insn = ppc_insert_operand (insn, operand, | |
3013 | ppc_obj64 ? 13 : 2, | |
3014 | ppc_cpu, (char *) NULL, 0); | |
cdba85ec | 3015 | break; |
727fc41e AM |
3016 | |
3017 | /* We'll only use the 32 (or 64) bit form of these relocations | |
3018 | in constants. Instructions get the 16 bit form. */ | |
3019 | case BFD_RELOC_PPC_DTPREL: | |
3020 | reloc = BFD_RELOC_PPC_DTPREL16; | |
cdba85ec | 3021 | break; |
727fc41e AM |
3022 | case BFD_RELOC_PPC_TPREL: |
3023 | reloc = BFD_RELOC_PPC_TPREL16; | |
0baf16f2 AM |
3024 | break; |
3025 | } | |
727fc41e | 3026 | |
b9c361e0 JL |
3027 | /* If VLE-mode convert LO/HI/HA relocations. */ |
3028 | if (opcode->flags & PPC_OPCODE_VLE) | |
3029 | { | |
3030 | int tmp_insn = insn & opcode->mask; | |
3031 | ||
3032 | int use_d_reloc = (tmp_insn == E_OR2I_INSN | |
3033 | || tmp_insn == E_AND2I_DOT_INSN | |
3034 | || tmp_insn == E_OR2IS_INSN | |
3035 | || tmp_insn == E_LIS_INSN | |
3036 | || tmp_insn == E_AND2IS_DOT_INSN); | |
3037 | ||
3038 | ||
3039 | int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN | |
3040 | || tmp_insn == E_ADD2IS_INSN | |
3041 | || tmp_insn == E_CMP16I_INSN | |
3042 | || tmp_insn == E_MULL2I_INSN | |
3043 | || tmp_insn == E_CMPL16I_INSN | |
3044 | || tmp_insn == E_CMPH16I_INSN | |
3045 | || tmp_insn == E_CMPHL16I_INSN); | |
3046 | ||
3047 | switch (reloc) | |
3048 | { | |
3049 | default: | |
3050 | break; | |
3051 | ||
3052 | case BFD_RELOC_PPC_EMB_SDA21: | |
3053 | reloc = BFD_RELOC_PPC_VLE_SDA21; | |
3054 | break; | |
3055 | ||
3056 | case BFD_RELOC_LO16: | |
3057 | if (use_d_reloc) | |
3058 | reloc = BFD_RELOC_PPC_VLE_LO16D; | |
3059 | else if (use_a_reloc) | |
3060 | reloc = BFD_RELOC_PPC_VLE_LO16A; | |
3061 | break; | |
3062 | ||
3063 | case BFD_RELOC_HI16: | |
3064 | if (use_d_reloc) | |
3065 | reloc = BFD_RELOC_PPC_VLE_HI16D; | |
3066 | else if (use_a_reloc) | |
3067 | reloc = BFD_RELOC_PPC_VLE_HI16A; | |
3068 | break; | |
3069 | ||
3070 | case BFD_RELOC_HI16_S: | |
3071 | if (use_d_reloc) | |
3072 | reloc = BFD_RELOC_PPC_VLE_HA16D; | |
3073 | else if (use_a_reloc) | |
3074 | reloc = BFD_RELOC_PPC_VLE_HA16A; | |
3075 | break; | |
3076 | ||
3077 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
3078 | if (use_d_reloc) | |
3079 | reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D; | |
3080 | break; | |
3081 | ||
3082 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
3083 | if (use_d_reloc) | |
3084 | reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D; | |
3085 | break; | |
3086 | ||
3087 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
3088 | if (use_d_reloc) | |
3089 | reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D; | |
3090 | break; | |
3091 | } | |
3092 | } | |
0baf16f2 | 3093 | } |
3b8b57a9 AM |
3094 | #endif /* OBJ_ELF */ |
3095 | ||
62ebcb5c | 3096 | if (reloc != BFD_RELOC_NONE) |
3b8b57a9 AM |
3097 | ; |
3098 | /* Determine a BFD reloc value based on the operand information. | |
3099 | We are only prepared to turn a few of the operands into | |
3100 | relocs. */ | |
a0593ad9 AM |
3101 | else if ((operand->flags & (PPC_OPERAND_RELATIVE |
3102 | | PPC_OPERAND_ABSOLUTE)) != 0 | |
3b8b57a9 AM |
3103 | && operand->bitm == 0x3fffffc |
3104 | && operand->shift == 0) | |
3105 | reloc = BFD_RELOC_PPC_B26; | |
a0593ad9 AM |
3106 | else if ((operand->flags & (PPC_OPERAND_RELATIVE |
3107 | | PPC_OPERAND_ABSOLUTE)) != 0 | |
3b8b57a9 AM |
3108 | && operand->bitm == 0xfffc |
3109 | && operand->shift == 0) | |
3110 | reloc = BFD_RELOC_PPC_B16; | |
3111 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3112 | && operand->bitm == 0x1fe | |
3113 | && operand->shift == -1) | |
3114 | reloc = BFD_RELOC_PPC_VLE_REL8; | |
3115 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3116 | && operand->bitm == 0xfffe | |
3117 | && operand->shift == 0) | |
3118 | reloc = BFD_RELOC_PPC_VLE_REL15; | |
3119 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
3120 | && operand->bitm == 0x1fffffe | |
3121 | && operand->shift == 0) | |
3122 | reloc = BFD_RELOC_PPC_VLE_REL24; | |
a0593ad9 | 3123 | else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0 |
3b8b57a9 AM |
3124 | && (operand->bitm & 0xfff0) == 0xfff0 |
3125 | && operand->shift == 0) | |
3126 | { | |
f50c47f1 | 3127 | reloc = BFD_RELOC_16; |
3e60bf4d | 3128 | #if defined OBJ_XCOFF || defined OBJ_ELF |
f50c47f1 | 3129 | /* Note: the symbol may be not yet defined. */ |
a0593ad9 AM |
3130 | if ((operand->flags & PPC_OPERAND_PARENS) != 0 |
3131 | && ppc_is_toc_sym (ex.X_add_symbol)) | |
3e60bf4d AM |
3132 | { |
3133 | reloc = BFD_RELOC_PPC_TOC16; | |
3134 | #ifdef OBJ_ELF | |
3135 | as_warn (_("assuming %s on symbol"), | |
3136 | ppc_obj64 ? "@toc" : "@xgot"); | |
3137 | #endif | |
3138 | } | |
3b8b57a9 | 3139 | #endif |
3b8b57a9 | 3140 | } |
a0593ad9 AM |
3141 | |
3142 | /* For the absolute forms of branches, convert the PC | |
3143 | relative form back into the absolute. */ | |
3144 | if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) | |
3145 | { | |
3146 | switch (reloc) | |
3147 | { | |
3148 | case BFD_RELOC_PPC_B26: | |
3149 | reloc = BFD_RELOC_PPC_BA26; | |
3150 | break; | |
3151 | case BFD_RELOC_PPC_B16: | |
3152 | reloc = BFD_RELOC_PPC_BA16; | |
3153 | break; | |
3154 | #ifdef OBJ_ELF | |
3155 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
3156 | reloc = BFD_RELOC_PPC_BA16_BRTAKEN; | |
3157 | break; | |
3158 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
3159 | reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; | |
3160 | break; | |
3161 | #endif | |
3162 | default: | |
3163 | break; | |
3164 | } | |
3165 | } | |
3166 | ||
3167 | #ifdef OBJ_ELF | |
3168 | switch (reloc) | |
3169 | { | |
3170 | case BFD_RELOC_PPC_TOC16: | |
3171 | toc_reloc_types |= has_small_toc_reloc; | |
3172 | break; | |
3173 | case BFD_RELOC_PPC64_TOC16_LO: | |
3174 | case BFD_RELOC_PPC64_TOC16_HI: | |
3175 | case BFD_RELOC_PPC64_TOC16_HA: | |
3176 | toc_reloc_types |= has_large_toc_reloc; | |
3177 | break; | |
3178 | default: | |
3179 | break; | |
3180 | } | |
3181 | ||
3182 | if (ppc_obj64 | |
3183 | && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0) | |
3184 | { | |
3185 | switch (reloc) | |
3186 | { | |
3187 | case BFD_RELOC_16: | |
3188 | reloc = BFD_RELOC_PPC64_ADDR16_DS; | |
3189 | break; | |
3190 | case BFD_RELOC_LO16: | |
3191 | reloc = BFD_RELOC_PPC64_ADDR16_LO_DS; | |
3192 | break; | |
3193 | case BFD_RELOC_16_GOTOFF: | |
3194 | reloc = BFD_RELOC_PPC64_GOT16_DS; | |
3195 | break; | |
3196 | case BFD_RELOC_LO16_GOTOFF: | |
3197 | reloc = BFD_RELOC_PPC64_GOT16_LO_DS; | |
3198 | break; | |
3199 | case BFD_RELOC_LO16_PLTOFF: | |
3200 | reloc = BFD_RELOC_PPC64_PLT16_LO_DS; | |
3201 | break; | |
3202 | case BFD_RELOC_16_BASEREL: | |
3203 | reloc = BFD_RELOC_PPC64_SECTOFF_DS; | |
3204 | break; | |
3205 | case BFD_RELOC_LO16_BASEREL: | |
3206 | reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS; | |
3207 | break; | |
3208 | case BFD_RELOC_PPC_TOC16: | |
3209 | reloc = BFD_RELOC_PPC64_TOC16_DS; | |
3210 | break; | |
3211 | case BFD_RELOC_PPC64_TOC16_LO: | |
3212 | reloc = BFD_RELOC_PPC64_TOC16_LO_DS; | |
3213 | break; | |
3214 | case BFD_RELOC_PPC64_PLTGOT16: | |
3215 | reloc = BFD_RELOC_PPC64_PLTGOT16_DS; | |
3216 | break; | |
3217 | case BFD_RELOC_PPC64_PLTGOT16_LO: | |
3218 | reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS; | |
3219 | break; | |
3220 | case BFD_RELOC_PPC_DTPREL16: | |
3221 | reloc = BFD_RELOC_PPC64_DTPREL16_DS; | |
3222 | break; | |
3223 | case BFD_RELOC_PPC_DTPREL16_LO: | |
3224 | reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS; | |
3225 | break; | |
3226 | case BFD_RELOC_PPC_TPREL16: | |
3227 | reloc = BFD_RELOC_PPC64_TPREL16_DS; | |
3228 | break; | |
3229 | case BFD_RELOC_PPC_TPREL16_LO: | |
3230 | reloc = BFD_RELOC_PPC64_TPREL16_LO_DS; | |
3231 | break; | |
3232 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
3233 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
3234 | case BFD_RELOC_PPC_GOT_TPREL16: | |
3235 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
3236 | break; | |
3237 | default: | |
3238 | as_bad (_("unsupported relocation for DS offset field")); | |
3239 | break; | |
3240 | } | |
3241 | } | |
3242 | #endif | |
0baf16f2 | 3243 | |
252b5132 RH |
3244 | /* We need to generate a fixup for this expression. */ |
3245 | if (fc >= MAX_INSN_FIXUPS) | |
3246 | as_fatal (_("too many fixups")); | |
3247 | fixups[fc].exp = ex; | |
727fc41e | 3248 | fixups[fc].opindex = *opindex_ptr; |
252b5132 RH |
3249 | fixups[fc].reloc = reloc; |
3250 | ++fc; | |
3251 | } | |
252b5132 RH |
3252 | |
3253 | if (need_paren) | |
3254 | { | |
3255 | endc = ')'; | |
3256 | need_paren = 0; | |
c3d65c1c BE |
3257 | /* If expecting more operands, then we want to see "),". */ |
3258 | if (*str == endc && opindex_ptr[1] != 0) | |
3259 | { | |
3260 | do | |
3261 | ++str; | |
3262 | while (ISSPACE (*str)); | |
3263 | endc = ','; | |
3264 | } | |
252b5132 RH |
3265 | } |
3266 | else if ((operand->flags & PPC_OPERAND_PARENS) != 0) | |
3267 | { | |
3268 | endc = '('; | |
3269 | need_paren = 1; | |
3270 | } | |
3271 | else | |
3272 | endc = ','; | |
3273 | ||
3274 | /* The call to expression should have advanced str past any | |
3275 | whitespace. */ | |
3276 | if (*str != endc | |
3277 | && (endc != ',' || *str != '\0')) | |
3278 | { | |
5a938047 AM |
3279 | if (*str == '\0') |
3280 | as_bad (_("syntax error; end of line, expected `%c'"), endc); | |
3281 | else | |
3282 | as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc); | |
252b5132 RH |
3283 | break; |
3284 | } | |
3285 | ||
3286 | if (*str != '\0') | |
3287 | ++str; | |
3288 | } | |
3289 | ||
3882b010 | 3290 | while (ISSPACE (*str)) |
252b5132 RH |
3291 | ++str; |
3292 | ||
3293 | if (*str != '\0') | |
3294 | as_bad (_("junk at end of line: `%s'"), str); | |
3295 | ||
dc1d03fc | 3296 | #ifdef OBJ_ELF |
b9c361e0 | 3297 | /* Do we need/want an APUinfo section? */ |
4faf939a JM |
3298 | if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0 |
3299 | && !ppc_obj64) | |
6a0c61b7 EZ |
3300 | { |
3301 | /* These are all version "1". */ | |
3302 | if (opcode->flags & PPC_OPCODE_SPE) | |
b34976b6 | 3303 | ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); |
6a0c61b7 | 3304 | if (opcode->flags & PPC_OPCODE_ISEL) |
b34976b6 | 3305 | ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); |
6a0c61b7 | 3306 | if (opcode->flags & PPC_OPCODE_EFS) |
b34976b6 | 3307 | ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); |
6a0c61b7 | 3308 | if (opcode->flags & PPC_OPCODE_BRLOCK) |
b34976b6 | 3309 | ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); |
6a0c61b7 | 3310 | if (opcode->flags & PPC_OPCODE_PMR) |
b34976b6 | 3311 | ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); |
6a0c61b7 | 3312 | if (opcode->flags & PPC_OPCODE_CACHELCK) |
b34976b6 | 3313 | ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); |
6a0c61b7 | 3314 | if (opcode->flags & PPC_OPCODE_RFMCI) |
b34976b6 | 3315 | ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); |
b9c361e0 JL |
3316 | if (opcode->flags & PPC_OPCODE_VLE) |
3317 | ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1); | |
6a0c61b7 | 3318 | } |
dc1d03fc | 3319 | #endif |
6a0c61b7 | 3320 | |
252b5132 | 3321 | /* Write out the instruction. */ |
b9c361e0 JL |
3322 | /* Differentiate between two and four byte insns. */ |
3323 | if (ppc_mach () == bfd_mach_ppc_vle) | |
3324 | { | |
3325 | if (PPC_OP_SE_VLE (insn)) | |
3326 | insn_length = 2; | |
3327 | else | |
3328 | insn_length = 4; | |
3329 | addr_mod = frag_now_fix () & 1; | |
3330 | } | |
3331 | else | |
3332 | { | |
3333 | insn_length = 4; | |
3334 | addr_mod = frag_now_fix () & 3; | |
3335 | } | |
3336 | /* All instructions can start on a 2 byte boundary for VLE. */ | |
3337 | f = frag_more (insn_length); | |
09b935ac | 3338 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) |
b9c361e0 JL |
3339 | { |
3340 | if (ppc_mach() == bfd_mach_ppc_vle) | |
3341 | as_bad (_("instruction address is not a multiple of 2")); | |
3342 | else | |
3343 | as_bad (_("instruction address is not a multiple of 4")); | |
3344 | } | |
09b935ac AM |
3345 | frag_now->insn_addr = addr_mod; |
3346 | frag_now->has_code = 1; | |
b9c361e0 | 3347 | md_number_to_chars (f, insn, insn_length); |
252b5132 | 3348 | |
5d6f4f16 | 3349 | #ifdef OBJ_ELF |
b9c361e0 | 3350 | dwarf2_emit_insn (insn_length); |
5d6f4f16 GK |
3351 | #endif |
3352 | ||
3b8b57a9 | 3353 | /* Create any fixups. */ |
252b5132 RH |
3354 | for (i = 0; i < fc; i++) |
3355 | { | |
3b8b57a9 | 3356 | fixS *fixP; |
62ebcb5c | 3357 | if (fixups[i].reloc != BFD_RELOC_NONE) |
252b5132 | 3358 | { |
99a814a1 | 3359 | reloc_howto_type *reloc_howto; |
252b5132 RH |
3360 | int size; |
3361 | int offset; | |
252b5132 | 3362 | |
99a814a1 | 3363 | reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc); |
252b5132 RH |
3364 | if (!reloc_howto) |
3365 | abort (); | |
3366 | ||
3367 | size = bfd_get_reloc_size (reloc_howto); | |
3b8b57a9 | 3368 | offset = target_big_endian ? (insn_length - size) : 0; |
252b5132 RH |
3369 | |
3370 | if (size < 1 || size > 4) | |
bc805888 | 3371 | abort (); |
252b5132 | 3372 | |
99a814a1 AM |
3373 | fixP = fix_new_exp (frag_now, |
3374 | f - frag_now->fr_literal + offset, | |
3375 | size, | |
3376 | &fixups[i].exp, | |
3377 | reloc_howto->pc_relative, | |
252b5132 | 3378 | fixups[i].reloc); |
252b5132 RH |
3379 | } |
3380 | else | |
727fc41e AM |
3381 | { |
3382 | const struct powerpc_operand *operand; | |
3383 | ||
3384 | operand = &powerpc_operands[fixups[i].opindex]; | |
3b8b57a9 AM |
3385 | fixP = fix_new_exp (frag_now, |
3386 | f - frag_now->fr_literal, | |
3387 | insn_length, | |
3388 | &fixups[i].exp, | |
3389 | (operand->flags & PPC_OPERAND_RELATIVE) != 0, | |
62ebcb5c | 3390 | BFD_RELOC_NONE); |
727fc41e | 3391 | } |
3b8b57a9 | 3392 | fixP->fx_pcrel_adjust = fixups[i].opindex; |
252b5132 RH |
3393 | } |
3394 | } | |
3395 | ||
3396 | /* Handle a macro. Gather all the operands, transform them as | |
3397 | described by the macro, and call md_assemble recursively. All the | |
3398 | operands are separated by commas; we don't accept parentheses | |
3399 | around operands here. */ | |
3400 | ||
3401 | static void | |
98027b10 | 3402 | ppc_macro (char *str, const struct powerpc_macro *macro) |
252b5132 RH |
3403 | { |
3404 | char *operands[10]; | |
3405 | unsigned int count; | |
3406 | char *s; | |
3407 | unsigned int len; | |
3408 | const char *format; | |
db557034 | 3409 | unsigned int arg; |
252b5132 RH |
3410 | char *send; |
3411 | char *complete; | |
3412 | ||
3413 | /* Gather the users operands into the operands array. */ | |
3414 | count = 0; | |
3415 | s = str; | |
3416 | while (1) | |
3417 | { | |
3418 | if (count >= sizeof operands / sizeof operands[0]) | |
3419 | break; | |
3420 | operands[count++] = s; | |
3421 | s = strchr (s, ','); | |
3422 | if (s == (char *) NULL) | |
3423 | break; | |
3424 | *s++ = '\0'; | |
81d4177b | 3425 | } |
252b5132 RH |
3426 | |
3427 | if (count != macro->operands) | |
3428 | { | |
3429 | as_bad (_("wrong number of operands")); | |
3430 | return; | |
3431 | } | |
3432 | ||
3433 | /* Work out how large the string must be (the size is unbounded | |
3434 | because it includes user input). */ | |
3435 | len = 0; | |
3436 | format = macro->format; | |
3437 | while (*format != '\0') | |
3438 | { | |
3439 | if (*format != '%') | |
3440 | { | |
3441 | ++len; | |
3442 | ++format; | |
3443 | } | |
3444 | else | |
3445 | { | |
3446 | arg = strtol (format + 1, &send, 10); | |
db557034 | 3447 | know (send != format && arg < count); |
252b5132 RH |
3448 | len += strlen (operands[arg]); |
3449 | format = send; | |
3450 | } | |
3451 | } | |
3452 | ||
3453 | /* Put the string together. */ | |
3454 | complete = s = (char *) alloca (len + 1); | |
3455 | format = macro->format; | |
3456 | while (*format != '\0') | |
3457 | { | |
3458 | if (*format != '%') | |
3459 | *s++ = *format++; | |
3460 | else | |
3461 | { | |
3462 | arg = strtol (format + 1, &send, 10); | |
3463 | strcpy (s, operands[arg]); | |
3464 | s += strlen (s); | |
3465 | format = send; | |
3466 | } | |
3467 | } | |
3468 | *s = '\0'; | |
3469 | ||
3470 | /* Assemble the constructed instruction. */ | |
3471 | md_assemble (complete); | |
81d4177b | 3472 | } |
252b5132 RH |
3473 | \f |
3474 | #ifdef OBJ_ELF | |
18ae9cc1 | 3475 | /* For ELF, add support for SHT_ORDERED. */ |
252b5132 RH |
3476 | |
3477 | int | |
98027b10 | 3478 | ppc_section_type (char *str, size_t len) |
252b5132 | 3479 | { |
9de8d8f1 RH |
3480 | if (len == 7 && strncmp (str, "ordered", 7) == 0) |
3481 | return SHT_ORDERED; | |
252b5132 | 3482 | |
9de8d8f1 | 3483 | return -1; |
252b5132 RH |
3484 | } |
3485 | ||
3486 | int | |
1239de13 | 3487 | ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type) |
252b5132 RH |
3488 | { |
3489 | if (type == SHT_ORDERED) | |
3490 | flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES; | |
3491 | ||
252b5132 RH |
3492 | return flags; |
3493 | } | |
3494 | #endif /* OBJ_ELF */ | |
3495 | ||
3496 | \f | |
3497 | /* Pseudo-op handling. */ | |
3498 | ||
3499 | /* The .byte pseudo-op. This is similar to the normal .byte | |
3500 | pseudo-op, but it can also take a single ASCII string. */ | |
3501 | ||
3502 | static void | |
98027b10 | 3503 | ppc_byte (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3504 | { |
3505 | if (*input_line_pointer != '\"') | |
3506 | { | |
3507 | cons (1); | |
3508 | return; | |
3509 | } | |
3510 | ||
3511 | /* Gather characters. A real double quote is doubled. Unusual | |
3512 | characters are not permitted. */ | |
3513 | ++input_line_pointer; | |
3514 | while (1) | |
3515 | { | |
3516 | char c; | |
3517 | ||
3518 | c = *input_line_pointer++; | |
3519 | ||
3520 | if (c == '\"') | |
3521 | { | |
3522 | if (*input_line_pointer != '\"') | |
3523 | break; | |
3524 | ++input_line_pointer; | |
3525 | } | |
3526 | ||
3527 | FRAG_APPEND_1_CHAR (c); | |
3528 | } | |
3529 | ||
3530 | demand_empty_rest_of_line (); | |
3531 | } | |
3532 | \f | |
3533 | #ifdef OBJ_XCOFF | |
3534 | ||
3535 | /* XCOFF specific pseudo-op handling. */ | |
3536 | ||
3537 | /* This is set if we are creating a .stabx symbol, since we don't want | |
3538 | to handle symbol suffixes for such symbols. */ | |
b34976b6 | 3539 | static bfd_boolean ppc_stab_symbol; |
252b5132 RH |
3540 | |
3541 | /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common | |
3542 | symbols in the .bss segment as though they were local common | |
67c1ffbe | 3543 | symbols, and uses a different smclas. The native Aix 4.3.3 assembler |
1ad63b2f | 3544 | aligns .comm and .lcomm to 4 bytes. */ |
252b5132 RH |
3545 | |
3546 | static void | |
98027b10 | 3547 | ppc_comm (int lcomm) |
252b5132 RH |
3548 | { |
3549 | asection *current_seg = now_seg; | |
3550 | subsegT current_subseg = now_subseg; | |
3551 | char *name; | |
3552 | char endc; | |
3553 | char *end_name; | |
3554 | offsetT size; | |
3555 | offsetT align; | |
3556 | symbolS *lcomm_sym = NULL; | |
3557 | symbolS *sym; | |
3558 | char *pfrag; | |
3559 | ||
3560 | name = input_line_pointer; | |
3561 | endc = get_symbol_end (); | |
3562 | end_name = input_line_pointer; | |
3563 | *end_name = endc; | |
3564 | ||
3565 | if (*input_line_pointer != ',') | |
3566 | { | |
3567 | as_bad (_("missing size")); | |
3568 | ignore_rest_of_line (); | |
3569 | return; | |
3570 | } | |
3571 | ++input_line_pointer; | |
3572 | ||
3573 | size = get_absolute_expression (); | |
3574 | if (size < 0) | |
3575 | { | |
3576 | as_bad (_("negative size")); | |
3577 | ignore_rest_of_line (); | |
3578 | return; | |
3579 | } | |
3580 | ||
3581 | if (! lcomm) | |
3582 | { | |
3583 | /* The third argument to .comm is the alignment. */ | |
3584 | if (*input_line_pointer != ',') | |
1ad63b2f | 3585 | align = 2; |
252b5132 RH |
3586 | else |
3587 | { | |
3588 | ++input_line_pointer; | |
3589 | align = get_absolute_expression (); | |
3590 | if (align <= 0) | |
3591 | { | |
3592 | as_warn (_("ignoring bad alignment")); | |
1ad63b2f | 3593 | align = 2; |
252b5132 RH |
3594 | } |
3595 | } | |
3596 | } | |
3597 | else | |
3598 | { | |
3599 | char *lcomm_name; | |
3600 | char lcomm_endc; | |
3601 | ||
252b5132 RH |
3602 | /* The third argument to .lcomm appears to be the real local |
3603 | common symbol to create. References to the symbol named in | |
3604 | the first argument are turned into references to the third | |
3605 | argument. */ | |
3606 | if (*input_line_pointer != ',') | |
3607 | { | |
3608 | as_bad (_("missing real symbol name")); | |
3609 | ignore_rest_of_line (); | |
3610 | return; | |
3611 | } | |
3612 | ++input_line_pointer; | |
3613 | ||
3614 | lcomm_name = input_line_pointer; | |
3615 | lcomm_endc = get_symbol_end (); | |
81d4177b | 3616 | |
252b5132 RH |
3617 | lcomm_sym = symbol_find_or_make (lcomm_name); |
3618 | ||
3619 | *input_line_pointer = lcomm_endc; | |
3c02c47f DE |
3620 | |
3621 | /* The fourth argument to .lcomm is the alignment. */ | |
3622 | if (*input_line_pointer != ',') | |
3623 | { | |
3624 | if (size <= 4) | |
3625 | align = 2; | |
3626 | else | |
3627 | align = 3; | |
3628 | } | |
3629 | else | |
3630 | { | |
3631 | ++input_line_pointer; | |
3632 | align = get_absolute_expression (); | |
3633 | if (align <= 0) | |
3634 | { | |
3635 | as_warn (_("ignoring bad alignment")); | |
3636 | align = 2; | |
3637 | } | |
3638 | } | |
252b5132 RH |
3639 | } |
3640 | ||
3641 | *end_name = '\0'; | |
3642 | sym = symbol_find_or_make (name); | |
3643 | *end_name = endc; | |
3644 | ||
3645 | if (S_IS_DEFINED (sym) | |
3646 | || S_GET_VALUE (sym) != 0) | |
3647 | { | |
3648 | as_bad (_("attempt to redefine symbol")); | |
3649 | ignore_rest_of_line (); | |
3650 | return; | |
3651 | } | |
81d4177b | 3652 | |
252b5132 | 3653 | record_alignment (bss_section, align); |
81d4177b | 3654 | |
252b5132 RH |
3655 | if (! lcomm |
3656 | || ! S_IS_DEFINED (lcomm_sym)) | |
3657 | { | |
3658 | symbolS *def_sym; | |
3659 | offsetT def_size; | |
3660 | ||
3661 | if (! lcomm) | |
3662 | { | |
3663 | def_sym = sym; | |
3664 | def_size = size; | |
3665 | S_SET_EXTERNAL (sym); | |
3666 | } | |
3667 | else | |
3668 | { | |
809ffe0d | 3669 | symbol_get_tc (lcomm_sym)->output = 1; |
252b5132 RH |
3670 | def_sym = lcomm_sym; |
3671 | def_size = 0; | |
3672 | } | |
3673 | ||
3674 | subseg_set (bss_section, 1); | |
3675 | frag_align (align, 0, 0); | |
81d4177b | 3676 | |
809ffe0d | 3677 | symbol_set_frag (def_sym, frag_now); |
252b5132 RH |
3678 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym, |
3679 | def_size, (char *) NULL); | |
3680 | *pfrag = 0; | |
3681 | S_SET_SEGMENT (def_sym, bss_section); | |
809ffe0d | 3682 | symbol_get_tc (def_sym)->align = align; |
252b5132 RH |
3683 | } |
3684 | else if (lcomm) | |
3685 | { | |
3686 | /* Align the size of lcomm_sym. */ | |
809ffe0d ILT |
3687 | symbol_get_frag (lcomm_sym)->fr_offset = |
3688 | ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1) | |
252b5132 | 3689 | &~ ((1 << align) - 1)); |
809ffe0d ILT |
3690 | if (align > symbol_get_tc (lcomm_sym)->align) |
3691 | symbol_get_tc (lcomm_sym)->align = align; | |
252b5132 RH |
3692 | } |
3693 | ||
3694 | if (lcomm) | |
3695 | { | |
3696 | /* Make sym an offset from lcomm_sym. */ | |
3697 | S_SET_SEGMENT (sym, bss_section); | |
809ffe0d ILT |
3698 | symbol_set_frag (sym, symbol_get_frag (lcomm_sym)); |
3699 | S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset); | |
3700 | symbol_get_frag (lcomm_sym)->fr_offset += size; | |
252b5132 RH |
3701 | } |
3702 | ||
3703 | subseg_set (current_seg, current_subseg); | |
3704 | ||
3705 | demand_empty_rest_of_line (); | |
3706 | } | |
3707 | ||
3708 | /* The .csect pseudo-op. This switches us into a different | |
3709 | subsegment. The first argument is a symbol whose value is the | |
3710 | start of the .csect. In COFF, csect symbols get special aux | |
3711 | entries defined by the x_csect field of union internal_auxent. The | |
3712 | optional second argument is the alignment (the default is 2). */ | |
3713 | ||
3714 | static void | |
98027b10 | 3715 | ppc_csect (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3716 | { |
3717 | char *name; | |
3718 | char endc; | |
3719 | symbolS *sym; | |
931e13a6 | 3720 | offsetT align; |
252b5132 RH |
3721 | |
3722 | name = input_line_pointer; | |
3723 | endc = get_symbol_end (); | |
81d4177b | 3724 | |
252b5132 RH |
3725 | sym = symbol_find_or_make (name); |
3726 | ||
3727 | *input_line_pointer = endc; | |
3728 | ||
3729 | if (S_GET_NAME (sym)[0] == '\0') | |
3730 | { | |
3731 | /* An unnamed csect is assumed to be [PR]. */ | |
96d56e9f | 3732 | symbol_get_tc (sym)->symbol_class = XMC_PR; |
252b5132 RH |
3733 | } |
3734 | ||
931e13a6 | 3735 | align = 2; |
252b5132 RH |
3736 | if (*input_line_pointer == ',') |
3737 | { | |
3738 | ++input_line_pointer; | |
931e13a6 | 3739 | align = get_absolute_expression (); |
252b5132 RH |
3740 | } |
3741 | ||
931e13a6 AM |
3742 | ppc_change_csect (sym, align); |
3743 | ||
252b5132 RH |
3744 | demand_empty_rest_of_line (); |
3745 | } | |
3746 | ||
3747 | /* Change to a different csect. */ | |
3748 | ||
3749 | static void | |
98027b10 | 3750 | ppc_change_csect (symbolS *sym, offsetT align) |
252b5132 RH |
3751 | { |
3752 | if (S_IS_DEFINED (sym)) | |
809ffe0d | 3753 | subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg); |
252b5132 RH |
3754 | else |
3755 | { | |
3756 | symbolS **list_ptr; | |
3757 | int after_toc; | |
3758 | int hold_chunksize; | |
3759 | symbolS *list; | |
931e13a6 AM |
3760 | int is_code; |
3761 | segT sec; | |
252b5132 RH |
3762 | |
3763 | /* This is a new csect. We need to look at the symbol class to | |
3764 | figure out whether it should go in the text section or the | |
3765 | data section. */ | |
3766 | after_toc = 0; | |
931e13a6 | 3767 | is_code = 0; |
96d56e9f | 3768 | switch (symbol_get_tc (sym)->symbol_class) |
252b5132 RH |
3769 | { |
3770 | case XMC_PR: | |
3771 | case XMC_RO: | |
3772 | case XMC_DB: | |
3773 | case XMC_GL: | |
3774 | case XMC_XO: | |
3775 | case XMC_SV: | |
3776 | case XMC_TI: | |
3777 | case XMC_TB: | |
3778 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 3779 | symbol_get_tc (sym)->subseg = ppc_text_subsegment; |
252b5132 RH |
3780 | ++ppc_text_subsegment; |
3781 | list_ptr = &ppc_text_csects; | |
931e13a6 | 3782 | is_code = 1; |
252b5132 RH |
3783 | break; |
3784 | case XMC_RW: | |
3785 | case XMC_TC0: | |
3786 | case XMC_TC: | |
3787 | case XMC_DS: | |
3788 | case XMC_UA: | |
3789 | case XMC_BS: | |
3790 | case XMC_UC: | |
3791 | if (ppc_toc_csect != NULL | |
809ffe0d ILT |
3792 | && (symbol_get_tc (ppc_toc_csect)->subseg + 1 |
3793 | == ppc_data_subsegment)) | |
252b5132 RH |
3794 | after_toc = 1; |
3795 | S_SET_SEGMENT (sym, data_section); | |
809ffe0d | 3796 | symbol_get_tc (sym)->subseg = ppc_data_subsegment; |
252b5132 RH |
3797 | ++ppc_data_subsegment; |
3798 | list_ptr = &ppc_data_csects; | |
3799 | break; | |
3800 | default: | |
3801 | abort (); | |
3802 | } | |
3803 | ||
3804 | /* We set the obstack chunk size to a small value before | |
99a814a1 AM |
3805 | changing subsegments, so that we don't use a lot of memory |
3806 | space for what may be a small section. */ | |
252b5132 RH |
3807 | hold_chunksize = chunksize; |
3808 | chunksize = 64; | |
3809 | ||
931e13a6 AM |
3810 | sec = subseg_new (segment_name (S_GET_SEGMENT (sym)), |
3811 | symbol_get_tc (sym)->subseg); | |
252b5132 RH |
3812 | |
3813 | chunksize = hold_chunksize; | |
3814 | ||
3815 | if (after_toc) | |
3816 | ppc_after_toc_frag = frag_now; | |
3817 | ||
931e13a6 AM |
3818 | record_alignment (sec, align); |
3819 | if (is_code) | |
3820 | frag_align_code (align, 0); | |
3821 | else | |
3822 | frag_align (align, 0, 0); | |
3823 | ||
809ffe0d | 3824 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
3825 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
3826 | ||
931e13a6 | 3827 | symbol_get_tc (sym)->align = align; |
809ffe0d ILT |
3828 | symbol_get_tc (sym)->output = 1; |
3829 | symbol_get_tc (sym)->within = sym; | |
81d4177b | 3830 | |
252b5132 | 3831 | for (list = *list_ptr; |
809ffe0d ILT |
3832 | symbol_get_tc (list)->next != (symbolS *) NULL; |
3833 | list = symbol_get_tc (list)->next) | |
252b5132 | 3834 | ; |
809ffe0d | 3835 | symbol_get_tc (list)->next = sym; |
81d4177b | 3836 | |
252b5132 | 3837 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); |
809ffe0d ILT |
3838 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
3839 | &symbol_lastP); | |
252b5132 RH |
3840 | } |
3841 | ||
3842 | ppc_current_csect = sym; | |
3843 | } | |
3844 | ||
85645aed TG |
3845 | static void |
3846 | ppc_change_debug_section (unsigned int idx, subsegT subseg) | |
3847 | { | |
3848 | segT sec; | |
3849 | flagword oldflags; | |
3850 | const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx]; | |
3851 | ||
3852 | sec = subseg_new (dw->name, subseg); | |
3853 | oldflags = bfd_get_section_flags (stdoutput, sec); | |
3854 | if (oldflags == SEC_NO_FLAGS) | |
3855 | { | |
3856 | /* Just created section. */ | |
3857 | gas_assert (dw_sections[idx].sect == NULL); | |
3858 | ||
3859 | bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING); | |
3860 | bfd_set_section_alignment (stdoutput, sec, 0); | |
3861 | dw_sections[idx].sect = sec; | |
3862 | } | |
3863 | ||
3864 | /* Not anymore in a csect. */ | |
3865 | ppc_current_csect = NULL; | |
3866 | } | |
3867 | ||
3868 | /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is: | |
3869 | .dwsect flag [, opt-label ] | |
3870 | */ | |
3871 | ||
3872 | static void | |
3873 | ppc_dwsect (int ignore ATTRIBUTE_UNUSED) | |
3874 | { | |
3875 | offsetT flag; | |
3876 | symbolS *opt_label; | |
3877 | const struct xcoff_dwsect_name *dw; | |
3878 | struct dw_subsection *subseg; | |
3879 | struct dw_section *dws; | |
3880 | int i; | |
3881 | ||
3882 | /* Find section. */ | |
3883 | flag = get_absolute_expression (); | |
3884 | dw = NULL; | |
3885 | for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) | |
3886 | if (xcoff_dwsect_names[i].flag == flag) | |
3887 | { | |
3888 | dw = &xcoff_dwsect_names[i]; | |
3889 | break; | |
3890 | } | |
3891 | ||
3892 | /* Parse opt-label. */ | |
3893 | if (*input_line_pointer == ',') | |
3894 | { | |
3895 | const char *label; | |
3896 | char c; | |
3897 | ||
3898 | ++input_line_pointer; | |
3899 | ||
3900 | label = input_line_pointer; | |
3901 | c = get_symbol_end (); | |
3902 | opt_label = symbol_find_or_make (label); | |
3903 | *input_line_pointer = c; | |
3904 | } | |
3905 | else | |
3906 | opt_label = NULL; | |
3907 | ||
3908 | demand_empty_rest_of_line (); | |
3909 | ||
3910 | /* Return now in case of unknown subsection. */ | |
3911 | if (dw == NULL) | |
3912 | { | |
d6ed37ed | 3913 | as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"), |
85645aed TG |
3914 | (unsigned)flag); |
3915 | return; | |
3916 | } | |
3917 | ||
3918 | /* Find the subsection. */ | |
3919 | dws = &dw_sections[i]; | |
3920 | subseg = NULL; | |
3921 | if (opt_label != NULL && S_IS_DEFINED (opt_label)) | |
3922 | { | |
3923 | /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */ | |
3924 | if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect) | |
3925 | { | |
3926 | as_bad (_("label %s was not defined in this dwarf section"), | |
3927 | S_GET_NAME (opt_label)); | |
3928 | subseg = dws->anon_subseg; | |
3929 | opt_label = NULL; | |
3930 | } | |
3931 | else | |
3932 | subseg = symbol_get_tc (opt_label)->u.dw; | |
3933 | } | |
3934 | ||
3935 | if (subseg != NULL) | |
3936 | { | |
3937 | /* Switch to the subsection. */ | |
3938 | ppc_change_debug_section (i, subseg->subseg); | |
3939 | } | |
3940 | else | |
3941 | { | |
3942 | /* Create a new dw subsection. */ | |
3943 | subseg = (struct dw_subsection *) | |
3944 | xmalloc (sizeof (struct dw_subsection)); | |
3945 | ||
3946 | if (opt_label == NULL) | |
3947 | { | |
3948 | /* The anonymous one. */ | |
3949 | subseg->subseg = 0; | |
3950 | subseg->link = NULL; | |
3951 | dws->anon_subseg = subseg; | |
3952 | } | |
3953 | else | |
3954 | { | |
3955 | /* A named one. */ | |
3956 | if (dws->list_subseg != NULL) | |
3957 | subseg->subseg = dws->list_subseg->subseg + 1; | |
3958 | else | |
3959 | subseg->subseg = 1; | |
3960 | ||
3961 | subseg->link = dws->list_subseg; | |
3962 | dws->list_subseg = subseg; | |
3963 | symbol_get_tc (opt_label)->u.dw = subseg; | |
3964 | } | |
3965 | ||
3966 | ppc_change_debug_section (i, subseg->subseg); | |
3967 | ||
3968 | if (dw->def_size) | |
3969 | { | |
3970 | /* Add the length field. */ | |
3971 | expressionS *exp = &subseg->end_exp; | |
3972 | int sz; | |
3973 | ||
3974 | if (opt_label != NULL) | |
3975 | symbol_set_value_now (opt_label); | |
3976 | ||
3977 | /* Add the length field. Note that according to the AIX assembler | |
3978 | manual, the size of the length field is 4 for powerpc32 but | |
3979 | 12 for powerpc64. */ | |
3980 | if (ppc_obj64) | |
3981 | { | |
3982 | /* Write the 64bit marker. */ | |
3983 | md_number_to_chars (frag_more (4), -1, 4); | |
3984 | } | |
3985 | ||
3986 | exp->X_op = O_subtract; | |
3987 | exp->X_op_symbol = symbol_temp_new_now (); | |
3988 | exp->X_add_symbol = symbol_temp_make (); | |
3989 | ||
3990 | sz = ppc_obj64 ? 8 : 4; | |
3991 | exp->X_add_number = -sz; | |
3992 | emit_expr (exp, sz); | |
3993 | } | |
3994 | } | |
3995 | } | |
3996 | ||
252b5132 RH |
3997 | /* This function handles the .text and .data pseudo-ops. These |
3998 | pseudo-ops aren't really used by XCOFF; we implement them for the | |
3999 | convenience of people who aren't used to XCOFF. */ | |
4000 | ||
4001 | static void | |
98027b10 | 4002 | ppc_section (int type) |
252b5132 RH |
4003 | { |
4004 | const char *name; | |
4005 | symbolS *sym; | |
4006 | ||
4007 | if (type == 't') | |
4008 | name = ".text[PR]"; | |
4009 | else if (type == 'd') | |
4010 | name = ".data[RW]"; | |
4011 | else | |
4012 | abort (); | |
4013 | ||
4014 | sym = symbol_find_or_make (name); | |
4015 | ||
931e13a6 | 4016 | ppc_change_csect (sym, 2); |
252b5132 RH |
4017 | |
4018 | demand_empty_rest_of_line (); | |
4019 | } | |
4020 | ||
4021 | /* This function handles the .section pseudo-op. This is mostly to | |
4022 | give an error, since XCOFF only supports .text, .data and .bss, but | |
4023 | we do permit the user to name the text or data section. */ | |
4024 | ||
4025 | static void | |
98027b10 | 4026 | ppc_named_section (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4027 | { |
4028 | char *user_name; | |
4029 | const char *real_name; | |
4030 | char c; | |
4031 | symbolS *sym; | |
4032 | ||
4033 | user_name = input_line_pointer; | |
4034 | c = get_symbol_end (); | |
4035 | ||
4036 | if (strcmp (user_name, ".text") == 0) | |
4037 | real_name = ".text[PR]"; | |
4038 | else if (strcmp (user_name, ".data") == 0) | |
4039 | real_name = ".data[RW]"; | |
4040 | else | |
4041 | { | |
d6ed37ed | 4042 | as_bad (_("the XCOFF file format does not support arbitrary sections")); |
252b5132 RH |
4043 | *input_line_pointer = c; |
4044 | ignore_rest_of_line (); | |
4045 | return; | |
4046 | } | |
4047 | ||
4048 | *input_line_pointer = c; | |
4049 | ||
4050 | sym = symbol_find_or_make (real_name); | |
4051 | ||
931e13a6 | 4052 | ppc_change_csect (sym, 2); |
252b5132 RH |
4053 | |
4054 | demand_empty_rest_of_line (); | |
4055 | } | |
4056 | ||
4057 | /* The .extern pseudo-op. We create an undefined symbol. */ | |
4058 | ||
4059 | static void | |
98027b10 | 4060 | ppc_extern (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4061 | { |
4062 | char *name; | |
4063 | char endc; | |
4064 | ||
4065 | name = input_line_pointer; | |
4066 | endc = get_symbol_end (); | |
4067 | ||
4068 | (void) symbol_find_or_make (name); | |
4069 | ||
4070 | *input_line_pointer = endc; | |
4071 | ||
4072 | demand_empty_rest_of_line (); | |
4073 | } | |
4074 | ||
4075 | /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */ | |
4076 | ||
4077 | static void | |
98027b10 | 4078 | ppc_lglobl (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4079 | { |
4080 | char *name; | |
4081 | char endc; | |
4082 | symbolS *sym; | |
4083 | ||
4084 | name = input_line_pointer; | |
4085 | endc = get_symbol_end (); | |
4086 | ||
4087 | sym = symbol_find_or_make (name); | |
4088 | ||
4089 | *input_line_pointer = endc; | |
4090 | ||
809ffe0d | 4091 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4092 | |
4093 | demand_empty_rest_of_line (); | |
4094 | } | |
4095 | ||
c865e45b RS |
4096 | /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF |
4097 | relocations at the beginning of the current csect. | |
4098 | ||
4099 | (In principle, there's no reason why the relocations _have_ to be at | |
4100 | the beginning. Anywhere in the csect would do. However, inserting | |
4101 | at the beginning is what the native assmebler does, and it helps to | |
4102 | deal with cases where the .ref statements follow the section contents.) | |
4103 | ||
4104 | ??? .refs don't work for empty .csects. However, the native assembler | |
4105 | doesn't report an error in this case, and neither yet do we. */ | |
4106 | ||
4107 | static void | |
4108 | ppc_ref (int ignore ATTRIBUTE_UNUSED) | |
4109 | { | |
4110 | char *name; | |
4111 | char c; | |
4112 | ||
4113 | if (ppc_current_csect == NULL) | |
4114 | { | |
4115 | as_bad (_(".ref outside .csect")); | |
4116 | ignore_rest_of_line (); | |
4117 | return; | |
4118 | } | |
4119 | ||
4120 | do | |
4121 | { | |
4122 | name = input_line_pointer; | |
4123 | c = get_symbol_end (); | |
4124 | ||
4125 | fix_at_start (symbol_get_frag (ppc_current_csect), 0, | |
4126 | symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE); | |
4127 | ||
4128 | *input_line_pointer = c; | |
4129 | SKIP_WHITESPACE (); | |
4130 | c = *input_line_pointer; | |
4131 | if (c == ',') | |
4132 | { | |
4133 | input_line_pointer++; | |
4134 | SKIP_WHITESPACE (); | |
4135 | if (is_end_of_line[(unsigned char) *input_line_pointer]) | |
4136 | { | |
4137 | as_bad (_("missing symbol name")); | |
4138 | ignore_rest_of_line (); | |
4139 | return; | |
4140 | } | |
4141 | } | |
4142 | } | |
4143 | while (c == ','); | |
4144 | ||
4145 | demand_empty_rest_of_line (); | |
4146 | } | |
4147 | ||
252b5132 RH |
4148 | /* The .rename pseudo-op. The RS/6000 assembler can rename symbols, |
4149 | although I don't know why it bothers. */ | |
4150 | ||
4151 | static void | |
98027b10 | 4152 | ppc_rename (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4153 | { |
4154 | char *name; | |
4155 | char endc; | |
4156 | symbolS *sym; | |
4157 | int len; | |
4158 | ||
4159 | name = input_line_pointer; | |
4160 | endc = get_symbol_end (); | |
4161 | ||
4162 | sym = symbol_find_or_make (name); | |
4163 | ||
4164 | *input_line_pointer = endc; | |
4165 | ||
4166 | if (*input_line_pointer != ',') | |
4167 | { | |
4168 | as_bad (_("missing rename string")); | |
4169 | ignore_rest_of_line (); | |
4170 | return; | |
4171 | } | |
4172 | ++input_line_pointer; | |
4173 | ||
809ffe0d | 4174 | symbol_get_tc (sym)->real_name = demand_copy_C_string (&len); |
252b5132 RH |
4175 | |
4176 | demand_empty_rest_of_line (); | |
4177 | } | |
4178 | ||
4179 | /* The .stabx pseudo-op. This is similar to a normal .stabs | |
4180 | pseudo-op, but slightly different. A sample is | |
4181 | .stabx "main:F-1",.main,142,0 | |
4182 | The first argument is the symbol name to create. The second is the | |
4183 | value, and the third is the storage class. The fourth seems to be | |
4184 | always zero, and I am assuming it is the type. */ | |
4185 | ||
4186 | static void | |
98027b10 | 4187 | ppc_stabx (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4188 | { |
4189 | char *name; | |
4190 | int len; | |
4191 | symbolS *sym; | |
4192 | expressionS exp; | |
4193 | ||
4194 | name = demand_copy_C_string (&len); | |
4195 | ||
4196 | if (*input_line_pointer != ',') | |
4197 | { | |
4198 | as_bad (_("missing value")); | |
4199 | return; | |
4200 | } | |
4201 | ++input_line_pointer; | |
4202 | ||
b34976b6 | 4203 | ppc_stab_symbol = TRUE; |
252b5132 | 4204 | sym = symbol_make (name); |
b34976b6 | 4205 | ppc_stab_symbol = FALSE; |
252b5132 | 4206 | |
809ffe0d | 4207 | symbol_get_tc (sym)->real_name = name; |
252b5132 RH |
4208 | |
4209 | (void) expression (&exp); | |
4210 | ||
4211 | switch (exp.X_op) | |
4212 | { | |
4213 | case O_illegal: | |
4214 | case O_absent: | |
4215 | case O_big: | |
4216 | as_bad (_("illegal .stabx expression; zero assumed")); | |
4217 | exp.X_add_number = 0; | |
4218 | /* Fall through. */ | |
4219 | case O_constant: | |
4220 | S_SET_VALUE (sym, (valueT) exp.X_add_number); | |
809ffe0d | 4221 | symbol_set_frag (sym, &zero_address_frag); |
252b5132 RH |
4222 | break; |
4223 | ||
4224 | case O_symbol: | |
4225 | if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section) | |
809ffe0d | 4226 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
4227 | else |
4228 | { | |
4229 | S_SET_VALUE (sym, | |
4230 | exp.X_add_number + S_GET_VALUE (exp.X_add_symbol)); | |
809ffe0d | 4231 | symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol)); |
252b5132 RH |
4232 | } |
4233 | break; | |
4234 | ||
4235 | default: | |
4236 | /* The value is some complex expression. This will probably | |
99a814a1 AM |
4237 | fail at some later point, but this is probably the right |
4238 | thing to do here. */ | |
809ffe0d | 4239 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
4240 | break; |
4241 | } | |
4242 | ||
4243 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4244 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4245 | |
4246 | if (*input_line_pointer != ',') | |
4247 | { | |
4248 | as_bad (_("missing class")); | |
4249 | return; | |
4250 | } | |
4251 | ++input_line_pointer; | |
4252 | ||
4253 | S_SET_STORAGE_CLASS (sym, get_absolute_expression ()); | |
4254 | ||
4255 | if (*input_line_pointer != ',') | |
4256 | { | |
4257 | as_bad (_("missing type")); | |
4258 | return; | |
4259 | } | |
4260 | ++input_line_pointer; | |
4261 | ||
4262 | S_SET_DATA_TYPE (sym, get_absolute_expression ()); | |
4263 | ||
809ffe0d | 4264 | symbol_get_tc (sym)->output = 1; |
252b5132 | 4265 | |
c734e7e3 TG |
4266 | if (S_GET_STORAGE_CLASS (sym) == C_STSYM) |
4267 | { | |
4268 | /* In this case : | |
252b5132 | 4269 | |
c734e7e3 TG |
4270 | .bs name |
4271 | .stabx "z",arrays_,133,0 | |
4272 | .es | |
99a814a1 | 4273 | |
c734e7e3 | 4274 | .comm arrays_,13768,3 |
99a814a1 | 4275 | |
c734e7e3 TG |
4276 | resolve_symbol_value will copy the exp's "within" into sym's when the |
4277 | offset is 0. Since this seems to be corner case problem, | |
4278 | only do the correction for storage class C_STSYM. A better solution | |
4279 | would be to have the tc field updated in ppc_symbol_new_hook. */ | |
99a814a1 | 4280 | |
c734e7e3 TG |
4281 | if (exp.X_op == O_symbol) |
4282 | { | |
4283 | if (ppc_current_block == NULL) | |
4284 | as_bad (_(".stabx of storage class stsym must be within .bs/.es")); | |
99a814a1 | 4285 | |
c734e7e3 TG |
4286 | symbol_get_tc (sym)->within = ppc_current_block; |
4287 | symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block; | |
4288 | } | |
4289 | } | |
99a814a1 | 4290 | |
252b5132 RH |
4291 | if (exp.X_op != O_symbol |
4292 | || ! S_IS_EXTERNAL (exp.X_add_symbol) | |
4293 | || S_GET_SEGMENT (exp.X_add_symbol) != bss_section) | |
4294 | ppc_frob_label (sym); | |
4295 | else | |
4296 | { | |
4297 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
4298 | symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
4299 | if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol) |
4300 | symbol_get_tc (ppc_current_csect)->within = sym; | |
252b5132 RH |
4301 | } |
4302 | ||
4303 | demand_empty_rest_of_line (); | |
4304 | } | |
4305 | ||
4306 | /* The .function pseudo-op. This takes several arguments. The first | |
4307 | argument seems to be the external name of the symbol. The second | |
67c1ffbe | 4308 | argument seems to be the label for the start of the function. gcc |
252b5132 RH |
4309 | uses the same name for both. I have no idea what the third and |
4310 | fourth arguments are meant to be. The optional fifth argument is | |
4311 | an expression for the size of the function. In COFF this symbol | |
4312 | gets an aux entry like that used for a csect. */ | |
4313 | ||
4314 | static void | |
98027b10 | 4315 | ppc_function (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4316 | { |
4317 | char *name; | |
4318 | char endc; | |
4319 | char *s; | |
4320 | symbolS *ext_sym; | |
4321 | symbolS *lab_sym; | |
4322 | ||
4323 | name = input_line_pointer; | |
4324 | endc = get_symbol_end (); | |
4325 | ||
4326 | /* Ignore any [PR] suffix. */ | |
4327 | name = ppc_canonicalize_symbol_name (name); | |
4328 | s = strchr (name, '['); | |
4329 | if (s != (char *) NULL | |
4330 | && strcmp (s + 1, "PR]") == 0) | |
4331 | *s = '\0'; | |
4332 | ||
4333 | ext_sym = symbol_find_or_make (name); | |
4334 | ||
4335 | *input_line_pointer = endc; | |
4336 | ||
4337 | if (*input_line_pointer != ',') | |
4338 | { | |
4339 | as_bad (_("missing symbol name")); | |
4340 | ignore_rest_of_line (); | |
4341 | return; | |
4342 | } | |
4343 | ++input_line_pointer; | |
4344 | ||
4345 | name = input_line_pointer; | |
4346 | endc = get_symbol_end (); | |
4347 | ||
4348 | lab_sym = symbol_find_or_make (name); | |
4349 | ||
4350 | *input_line_pointer = endc; | |
4351 | ||
4352 | if (ext_sym != lab_sym) | |
4353 | { | |
809ffe0d ILT |
4354 | expressionS exp; |
4355 | ||
4356 | exp.X_op = O_symbol; | |
4357 | exp.X_add_symbol = lab_sym; | |
4358 | exp.X_op_symbol = NULL; | |
4359 | exp.X_add_number = 0; | |
4360 | exp.X_unsigned = 0; | |
4361 | symbol_set_value_expression (ext_sym, &exp); | |
252b5132 RH |
4362 | } |
4363 | ||
96d56e9f NC |
4364 | if (symbol_get_tc (ext_sym)->symbol_class == -1) |
4365 | symbol_get_tc (ext_sym)->symbol_class = XMC_PR; | |
809ffe0d | 4366 | symbol_get_tc (ext_sym)->output = 1; |
252b5132 RH |
4367 | |
4368 | if (*input_line_pointer == ',') | |
4369 | { | |
91d6fa6a | 4370 | expressionS exp; |
252b5132 RH |
4371 | |
4372 | /* Ignore the third argument. */ | |
4373 | ++input_line_pointer; | |
91d6fa6a | 4374 | expression (& exp); |
252b5132 RH |
4375 | if (*input_line_pointer == ',') |
4376 | { | |
4377 | /* Ignore the fourth argument. */ | |
4378 | ++input_line_pointer; | |
91d6fa6a | 4379 | expression (& exp); |
252b5132 RH |
4380 | if (*input_line_pointer == ',') |
4381 | { | |
4382 | /* The fifth argument is the function size. */ | |
4383 | ++input_line_pointer; | |
85645aed TG |
4384 | symbol_get_tc (ext_sym)->u.size = symbol_new |
4385 | ("L0\001", absolute_section,(valueT) 0, &zero_address_frag); | |
4386 | pseudo_set (symbol_get_tc (ext_sym)->u.size); | |
252b5132 RH |
4387 | } |
4388 | } | |
4389 | } | |
4390 | ||
4391 | S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); | |
4392 | SF_SET_FUNCTION (ext_sym); | |
4393 | SF_SET_PROCESS (ext_sym); | |
4394 | coff_add_linesym (ext_sym); | |
4395 | ||
4396 | demand_empty_rest_of_line (); | |
4397 | } | |
4398 | ||
4399 | /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named | |
8642cce8 TR |
4400 | ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym |
4401 | with the correct line number */ | |
5d6255fe | 4402 | |
8642cce8 | 4403 | static symbolS *saved_bi_sym = 0; |
252b5132 RH |
4404 | |
4405 | static void | |
98027b10 | 4406 | ppc_bf (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4407 | { |
4408 | symbolS *sym; | |
4409 | ||
4410 | sym = symbol_make (".bf"); | |
4411 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4412 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4413 | S_SET_VALUE (sym, frag_now_fix ()); |
4414 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
4415 | ||
4416 | coff_line_base = get_absolute_expression (); | |
4417 | ||
4418 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4419 | SA_SET_SYM_LNNO (sym, coff_line_base); | |
4420 | ||
8642cce8 | 4421 | /* Line number for bi. */ |
5d6255fe | 4422 | if (saved_bi_sym) |
8642cce8 TR |
4423 | { |
4424 | S_SET_VALUE (saved_bi_sym, coff_n_line_nos); | |
4425 | saved_bi_sym = 0; | |
4426 | } | |
5d6255fe | 4427 | |
8642cce8 | 4428 | |
809ffe0d | 4429 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4430 | |
4431 | ppc_frob_label (sym); | |
4432 | ||
4433 | demand_empty_rest_of_line (); | |
4434 | } | |
4435 | ||
4436 | /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named | |
4437 | ".ef", except that the line number is absolute, not relative to the | |
4438 | most recent ".bf" symbol. */ | |
4439 | ||
4440 | static void | |
98027b10 | 4441 | ppc_ef (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4442 | { |
4443 | symbolS *sym; | |
4444 | ||
4445 | sym = symbol_make (".ef"); | |
4446 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4447 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4448 | S_SET_VALUE (sym, frag_now_fix ()); |
4449 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
4450 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4451 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 4452 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4453 | |
4454 | ppc_frob_label (sym); | |
4455 | ||
4456 | demand_empty_rest_of_line (); | |
4457 | } | |
4458 | ||
4459 | /* The .bi and .ei pseudo-ops. These take a string argument and | |
4460 | generates a C_BINCL or C_EINCL symbol, which goes at the start of | |
8642cce8 TR |
4461 | the symbol list. The value of .bi will be know when the next .bf |
4462 | is encountered. */ | |
252b5132 RH |
4463 | |
4464 | static void | |
98027b10 | 4465 | ppc_biei (int ei) |
252b5132 RH |
4466 | { |
4467 | static symbolS *last_biei; | |
4468 | ||
4469 | char *name; | |
4470 | int len; | |
4471 | symbolS *sym; | |
4472 | symbolS *look; | |
4473 | ||
4474 | name = demand_copy_C_string (&len); | |
4475 | ||
4476 | /* The value of these symbols is actually file offset. Here we set | |
4477 | the value to the index into the line number entries. In | |
4478 | ppc_frob_symbols we set the fix_line field, which will cause BFD | |
4479 | to do the right thing. */ | |
4480 | ||
4481 | sym = symbol_make (name); | |
4482 | /* obj-coff.c currently only handles line numbers correctly in the | |
4483 | .text section. */ | |
4484 | S_SET_SEGMENT (sym, text_section); | |
4485 | S_SET_VALUE (sym, coff_n_line_nos); | |
809ffe0d | 4486 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4487 | |
4488 | S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL); | |
809ffe0d | 4489 | symbol_get_tc (sym)->output = 1; |
81d4177b | 4490 | |
8642cce8 | 4491 | /* Save bi. */ |
5d6255fe | 4492 | if (ei) |
8642cce8 TR |
4493 | saved_bi_sym = 0; |
4494 | else | |
4495 | saved_bi_sym = sym; | |
4496 | ||
252b5132 RH |
4497 | for (look = last_biei ? last_biei : symbol_rootP; |
4498 | (look != (symbolS *) NULL | |
4499 | && (S_GET_STORAGE_CLASS (look) == C_FILE | |
4500 | || S_GET_STORAGE_CLASS (look) == C_BINCL | |
4501 | || S_GET_STORAGE_CLASS (look) == C_EINCL)); | |
4502 | look = symbol_next (look)) | |
4503 | ; | |
4504 | if (look != (symbolS *) NULL) | |
4505 | { | |
4506 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
4507 | symbol_insert (sym, look, &symbol_rootP, &symbol_lastP); | |
4508 | last_biei = sym; | |
4509 | } | |
4510 | ||
4511 | demand_empty_rest_of_line (); | |
4512 | } | |
4513 | ||
4514 | /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs". | |
4515 | There is one argument, which is a csect symbol. The value of the | |
4516 | .bs symbol is the index of this csect symbol. */ | |
4517 | ||
4518 | static void | |
98027b10 | 4519 | ppc_bs (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4520 | { |
4521 | char *name; | |
4522 | char endc; | |
4523 | symbolS *csect; | |
4524 | symbolS *sym; | |
4525 | ||
4526 | if (ppc_current_block != NULL) | |
4527 | as_bad (_("nested .bs blocks")); | |
4528 | ||
4529 | name = input_line_pointer; | |
4530 | endc = get_symbol_end (); | |
4531 | ||
4532 | csect = symbol_find_or_make (name); | |
4533 | ||
4534 | *input_line_pointer = endc; | |
4535 | ||
4536 | sym = symbol_make (".bs"); | |
4537 | S_SET_SEGMENT (sym, now_seg); | |
4538 | S_SET_STORAGE_CLASS (sym, C_BSTAT); | |
809ffe0d ILT |
4539 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
4540 | symbol_get_tc (sym)->output = 1; | |
252b5132 | 4541 | |
809ffe0d | 4542 | symbol_get_tc (sym)->within = csect; |
252b5132 RH |
4543 | |
4544 | ppc_frob_label (sym); | |
4545 | ||
4546 | ppc_current_block = sym; | |
4547 | ||
4548 | demand_empty_rest_of_line (); | |
4549 | } | |
4550 | ||
4551 | /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */ | |
4552 | ||
4553 | static void | |
98027b10 | 4554 | ppc_es (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4555 | { |
4556 | symbolS *sym; | |
4557 | ||
4558 | if (ppc_current_block == NULL) | |
4559 | as_bad (_(".es without preceding .bs")); | |
4560 | ||
4561 | sym = symbol_make (".es"); | |
4562 | S_SET_SEGMENT (sym, now_seg); | |
4563 | S_SET_STORAGE_CLASS (sym, C_ESTAT); | |
809ffe0d ILT |
4564 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
4565 | symbol_get_tc (sym)->output = 1; | |
252b5132 RH |
4566 | |
4567 | ppc_frob_label (sym); | |
4568 | ||
4569 | ppc_current_block = NULL; | |
4570 | ||
4571 | demand_empty_rest_of_line (); | |
4572 | } | |
4573 | ||
4574 | /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a | |
4575 | line number. */ | |
4576 | ||
4577 | static void | |
98027b10 | 4578 | ppc_bb (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4579 | { |
4580 | symbolS *sym; | |
4581 | ||
4582 | sym = symbol_make (".bb"); | |
4583 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4584 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4585 | S_SET_VALUE (sym, frag_now_fix ()); |
4586 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
4587 | ||
4588 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4589 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
4590 | ||
809ffe0d | 4591 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4592 | |
4593 | SF_SET_PROCESS (sym); | |
4594 | ||
4595 | ppc_frob_label (sym); | |
4596 | ||
4597 | demand_empty_rest_of_line (); | |
4598 | } | |
4599 | ||
4600 | /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a | |
4601 | line number. */ | |
4602 | ||
4603 | static void | |
98027b10 | 4604 | ppc_eb (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4605 | { |
4606 | symbolS *sym; | |
4607 | ||
4608 | sym = symbol_make (".eb"); | |
4609 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4610 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4611 | S_SET_VALUE (sym, frag_now_fix ()); |
4612 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
4613 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4614 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 4615 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4616 | |
4617 | SF_SET_PROCESS (sym); | |
4618 | ||
4619 | ppc_frob_label (sym); | |
4620 | ||
4621 | demand_empty_rest_of_line (); | |
4622 | } | |
4623 | ||
4624 | /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a | |
4625 | specified name. */ | |
4626 | ||
4627 | static void | |
98027b10 | 4628 | ppc_bc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4629 | { |
4630 | char *name; | |
4631 | int len; | |
4632 | symbolS *sym; | |
4633 | ||
4634 | name = demand_copy_C_string (&len); | |
4635 | sym = symbol_make (name); | |
4636 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4637 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4638 | S_SET_STORAGE_CLASS (sym, C_BCOMM); |
4639 | S_SET_VALUE (sym, 0); | |
809ffe0d | 4640 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4641 | |
4642 | ppc_frob_label (sym); | |
4643 | ||
4644 | demand_empty_rest_of_line (); | |
4645 | } | |
4646 | ||
4647 | /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */ | |
4648 | ||
4649 | static void | |
98027b10 | 4650 | ppc_ec (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4651 | { |
4652 | symbolS *sym; | |
4653 | ||
4654 | sym = symbol_make (".ec"); | |
4655 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4656 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4657 | S_SET_STORAGE_CLASS (sym, C_ECOMM); |
4658 | S_SET_VALUE (sym, 0); | |
809ffe0d | 4659 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4660 | |
4661 | ppc_frob_label (sym); | |
4662 | ||
4663 | demand_empty_rest_of_line (); | |
4664 | } | |
4665 | ||
4666 | /* The .toc pseudo-op. Switch to the .toc subsegment. */ | |
4667 | ||
4668 | static void | |
98027b10 | 4669 | ppc_toc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4670 | { |
4671 | if (ppc_toc_csect != (symbolS *) NULL) | |
809ffe0d | 4672 | subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg); |
252b5132 RH |
4673 | else |
4674 | { | |
4675 | subsegT subseg; | |
4676 | symbolS *sym; | |
4677 | symbolS *list; | |
81d4177b | 4678 | |
252b5132 RH |
4679 | subseg = ppc_data_subsegment; |
4680 | ++ppc_data_subsegment; | |
4681 | ||
4682 | subseg_new (segment_name (data_section), subseg); | |
4683 | ppc_toc_frag = frag_now; | |
4684 | ||
4685 | sym = symbol_find_or_make ("TOC[TC0]"); | |
809ffe0d | 4686 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4687 | S_SET_SEGMENT (sym, data_section); |
4688 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); | |
809ffe0d ILT |
4689 | symbol_get_tc (sym)->subseg = subseg; |
4690 | symbol_get_tc (sym)->output = 1; | |
4691 | symbol_get_tc (sym)->within = sym; | |
252b5132 RH |
4692 | |
4693 | ppc_toc_csect = sym; | |
81d4177b | 4694 | |
252b5132 | 4695 | for (list = ppc_data_csects; |
809ffe0d ILT |
4696 | symbol_get_tc (list)->next != (symbolS *) NULL; |
4697 | list = symbol_get_tc (list)->next) | |
252b5132 | 4698 | ; |
809ffe0d | 4699 | symbol_get_tc (list)->next = sym; |
252b5132 RH |
4700 | |
4701 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
4702 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
4703 | &symbol_lastP); | |
252b5132 RH |
4704 | } |
4705 | ||
4706 | ppc_current_csect = ppc_toc_csect; | |
4707 | ||
4708 | demand_empty_rest_of_line (); | |
4709 | } | |
4710 | ||
4711 | /* The AIX assembler automatically aligns the operands of a .long or | |
4712 | .short pseudo-op, and we want to be compatible. */ | |
4713 | ||
4714 | static void | |
98027b10 | 4715 | ppc_xcoff_cons (int log_size) |
252b5132 RH |
4716 | { |
4717 | frag_align (log_size, 0, 0); | |
4718 | record_alignment (now_seg, log_size); | |
4719 | cons (1 << log_size); | |
4720 | } | |
4721 | ||
4722 | static void | |
98027b10 | 4723 | ppc_vbyte (int dummy ATTRIBUTE_UNUSED) |
252b5132 RH |
4724 | { |
4725 | expressionS exp; | |
4726 | int byte_count; | |
4727 | ||
4728 | (void) expression (&exp); | |
4729 | ||
4730 | if (exp.X_op != O_constant) | |
4731 | { | |
4732 | as_bad (_("non-constant byte count")); | |
4733 | return; | |
4734 | } | |
4735 | ||
4736 | byte_count = exp.X_add_number; | |
4737 | ||
4738 | if (*input_line_pointer != ',') | |
4739 | { | |
4740 | as_bad (_("missing value")); | |
4741 | return; | |
4742 | } | |
4743 | ||
4744 | ++input_line_pointer; | |
4745 | cons (byte_count); | |
4746 | } | |
4747 | ||
85645aed TG |
4748 | void |
4749 | ppc_xcoff_end (void) | |
4750 | { | |
4751 | int i; | |
4752 | ||
4753 | for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) | |
4754 | { | |
4755 | struct dw_section *dws = &dw_sections[i]; | |
4756 | struct dw_subsection *dwss; | |
4757 | ||
4758 | if (dws->anon_subseg) | |
4759 | { | |
4760 | dwss = dws->anon_subseg; | |
4761 | dwss->link = dws->list_subseg; | |
4762 | } | |
4763 | else | |
4764 | dwss = dws->list_subseg; | |
4765 | ||
4766 | for (; dwss != NULL; dwss = dwss->link) | |
4767 | if (dwss->end_exp.X_add_symbol != NULL) | |
4768 | { | |
4769 | subseg_set (dws->sect, dwss->subseg); | |
4770 | symbol_set_value_now (dwss->end_exp.X_add_symbol); | |
4771 | } | |
4772 | } | |
4773 | } | |
4774 | ||
252b5132 | 4775 | #endif /* OBJ_XCOFF */ |
0baf16f2 | 4776 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 RH |
4777 | \f |
4778 | /* The .tc pseudo-op. This is used when generating either XCOFF or | |
4779 | ELF. This takes two or more arguments. | |
4780 | ||
4781 | When generating XCOFF output, the first argument is the name to | |
4782 | give to this location in the toc; this will be a symbol with class | |
0baf16f2 | 4783 | TC. The rest of the arguments are N-byte values to actually put at |
252b5132 | 4784 | this location in the TOC; often there is just one more argument, a |
1049f94e | 4785 | relocatable symbol reference. The size of the value to store |
0baf16f2 AM |
4786 | depends on target word size. A 32-bit target uses 4-byte values, a |
4787 | 64-bit target uses 8-byte values. | |
252b5132 RH |
4788 | |
4789 | When not generating XCOFF output, the arguments are the same, but | |
4790 | the first argument is simply ignored. */ | |
4791 | ||
4792 | static void | |
98027b10 | 4793 | ppc_tc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4794 | { |
4795 | #ifdef OBJ_XCOFF | |
4796 | ||
4797 | /* Define the TOC symbol name. */ | |
4798 | { | |
4799 | char *name; | |
4800 | char endc; | |
4801 | symbolS *sym; | |
4802 | ||
4803 | if (ppc_toc_csect == (symbolS *) NULL | |
4804 | || ppc_toc_csect != ppc_current_csect) | |
4805 | { | |
4806 | as_bad (_(".tc not in .toc section")); | |
4807 | ignore_rest_of_line (); | |
4808 | return; | |
4809 | } | |
4810 | ||
4811 | name = input_line_pointer; | |
4812 | endc = get_symbol_end (); | |
4813 | ||
4814 | sym = symbol_find_or_make (name); | |
4815 | ||
4816 | *input_line_pointer = endc; | |
4817 | ||
4818 | if (S_IS_DEFINED (sym)) | |
4819 | { | |
4820 | symbolS *label; | |
4821 | ||
809ffe0d | 4822 | label = symbol_get_tc (ppc_current_csect)->within; |
96d56e9f | 4823 | if (symbol_get_tc (label)->symbol_class != XMC_TC0) |
252b5132 RH |
4824 | { |
4825 | as_bad (_(".tc with no label")); | |
4826 | ignore_rest_of_line (); | |
4827 | return; | |
4828 | } | |
4829 | ||
4830 | S_SET_SEGMENT (label, S_GET_SEGMENT (sym)); | |
809ffe0d | 4831 | symbol_set_frag (label, symbol_get_frag (sym)); |
252b5132 RH |
4832 | S_SET_VALUE (label, S_GET_VALUE (sym)); |
4833 | ||
4834 | while (! is_end_of_line[(unsigned char) *input_line_pointer]) | |
4835 | ++input_line_pointer; | |
4836 | ||
4837 | return; | |
4838 | } | |
4839 | ||
4840 | S_SET_SEGMENT (sym, now_seg); | |
809ffe0d | 4841 | symbol_set_frag (sym, frag_now); |
252b5132 | 4842 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
96d56e9f | 4843 | symbol_get_tc (sym)->symbol_class = XMC_TC; |
809ffe0d | 4844 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4845 | |
4846 | ppc_frob_label (sym); | |
4847 | } | |
4848 | ||
0baf16f2 AM |
4849 | #endif /* OBJ_XCOFF */ |
4850 | #ifdef OBJ_ELF | |
9c7977b3 | 4851 | int align; |
252b5132 RH |
4852 | |
4853 | /* Skip the TOC symbol name. */ | |
4854 | while (is_part_of_name (*input_line_pointer) | |
d13d4015 | 4855 | || *input_line_pointer == ' ' |
252b5132 RH |
4856 | || *input_line_pointer == '[' |
4857 | || *input_line_pointer == ']' | |
4858 | || *input_line_pointer == '{' | |
4859 | || *input_line_pointer == '}') | |
4860 | ++input_line_pointer; | |
4861 | ||
0baf16f2 | 4862 | /* Align to a four/eight byte boundary. */ |
2b3c4602 | 4863 | align = ppc_obj64 ? 3 : 2; |
9c7977b3 AM |
4864 | frag_align (align, 0, 0); |
4865 | record_alignment (now_seg, align); | |
0baf16f2 | 4866 | #endif /* OBJ_ELF */ |
252b5132 RH |
4867 | |
4868 | if (*input_line_pointer != ',') | |
4869 | demand_empty_rest_of_line (); | |
4870 | else | |
4871 | { | |
4872 | ++input_line_pointer; | |
2b3c4602 | 4873 | cons (ppc_obj64 ? 8 : 4); |
252b5132 RH |
4874 | } |
4875 | } | |
0baf16f2 AM |
4876 | |
4877 | /* Pseudo-op .machine. */ | |
0baf16f2 AM |
4878 | |
4879 | static void | |
98027b10 | 4880 | ppc_machine (int ignore ATTRIBUTE_UNUSED) |
0baf16f2 | 4881 | { |
69c040df AM |
4882 | char *cpu_string; |
4883 | #define MAX_HISTORY 100 | |
fa452fa6 | 4884 | static ppc_cpu_t *cpu_history; |
69c040df AM |
4885 | static int curr_hist; |
4886 | ||
4887 | SKIP_WHITESPACE (); | |
4888 | ||
4889 | if (*input_line_pointer == '"') | |
4890 | { | |
4891 | int len; | |
4892 | cpu_string = demand_copy_C_string (&len); | |
4893 | } | |
4894 | else | |
4895 | { | |
4896 | char c; | |
4897 | cpu_string = input_line_pointer; | |
4898 | c = get_symbol_end (); | |
4899 | cpu_string = xstrdup (cpu_string); | |
4900 | *input_line_pointer = c; | |
4901 | } | |
4902 | ||
4903 | if (cpu_string != NULL) | |
4904 | { | |
fa452fa6 | 4905 | ppc_cpu_t old_cpu = ppc_cpu; |
69fe9ce5 | 4906 | ppc_cpu_t new_cpu; |
69c040df AM |
4907 | char *p; |
4908 | ||
4909 | for (p = cpu_string; *p != 0; p++) | |
4910 | *p = TOLOWER (*p); | |
4911 | ||
4912 | if (strcmp (cpu_string, "push") == 0) | |
4913 | { | |
4914 | if (cpu_history == NULL) | |
4915 | cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history)); | |
4916 | ||
4917 | if (curr_hist >= MAX_HISTORY) | |
4918 | as_bad (_(".machine stack overflow")); | |
4919 | else | |
4920 | cpu_history[curr_hist++] = ppc_cpu; | |
4921 | } | |
4922 | else if (strcmp (cpu_string, "pop") == 0) | |
4923 | { | |
4924 | if (curr_hist <= 0) | |
4925 | as_bad (_(".machine stack underflow")); | |
4926 | else | |
4927 | ppc_cpu = cpu_history[--curr_hist]; | |
4928 | } | |
776fc418 | 4929 | else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0) |
69fe9ce5 | 4930 | ppc_cpu = new_cpu; |
69c040df AM |
4931 | else |
4932 | as_bad (_("invalid machine `%s'"), cpu_string); | |
4933 | ||
4934 | if (ppc_cpu != old_cpu) | |
4935 | ppc_setup_opcodes (); | |
4936 | } | |
4937 | ||
4938 | demand_empty_rest_of_line (); | |
0baf16f2 | 4939 | } |
0baf16f2 | 4940 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ |
252b5132 RH |
4941 | \f |
4942 | #ifdef TE_PE | |
4943 | ||
99a814a1 | 4944 | /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ |
252b5132 RH |
4945 | |
4946 | /* Set the current section. */ | |
4947 | static void | |
98027b10 | 4948 | ppc_set_current_section (segT new) |
252b5132 RH |
4949 | { |
4950 | ppc_previous_section = ppc_current_section; | |
4951 | ppc_current_section = new; | |
4952 | } | |
4953 | ||
4954 | /* pseudo-op: .previous | |
4955 | behaviour: toggles the current section with the previous section. | |
4956 | errors: None | |
99a814a1 AM |
4957 | warnings: "No previous section" */ |
4958 | ||
252b5132 | 4959 | static void |
98027b10 | 4960 | ppc_previous (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4961 | { |
81d4177b | 4962 | if (ppc_previous_section == NULL) |
252b5132 | 4963 | { |
d6ed37ed | 4964 | as_warn (_("no previous section to return to, ignored.")); |
252b5132 RH |
4965 | return; |
4966 | } | |
4967 | ||
99a814a1 | 4968 | subseg_set (ppc_previous_section, 0); |
252b5132 | 4969 | |
99a814a1 | 4970 | ppc_set_current_section (ppc_previous_section); |
252b5132 RH |
4971 | } |
4972 | ||
4973 | /* pseudo-op: .pdata | |
4974 | behaviour: predefined read only data section | |
b34976b6 | 4975 | double word aligned |
252b5132 RH |
4976 | errors: None |
4977 | warnings: None | |
4978 | initial: .section .pdata "adr3" | |
b34976b6 | 4979 | a - don't know -- maybe a misprint |
252b5132 RH |
4980 | d - initialized data |
4981 | r - readable | |
4982 | 3 - double word aligned (that would be 4 byte boundary) | |
4983 | ||
4984 | commentary: | |
4985 | Tag index tables (also known as the function table) for exception | |
99a814a1 | 4986 | handling, debugging, etc. */ |
252b5132 | 4987 | |
252b5132 | 4988 | static void |
98027b10 | 4989 | ppc_pdata (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4990 | { |
81d4177b | 4991 | if (pdata_section == 0) |
252b5132 RH |
4992 | { |
4993 | pdata_section = subseg_new (".pdata", 0); | |
81d4177b | 4994 | |
252b5132 RH |
4995 | bfd_set_section_flags (stdoutput, pdata_section, |
4996 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
4997 | | SEC_READONLY | SEC_DATA )); | |
81d4177b | 4998 | |
252b5132 RH |
4999 | bfd_set_section_alignment (stdoutput, pdata_section, 2); |
5000 | } | |
5001 | else | |
5002 | { | |
99a814a1 | 5003 | pdata_section = subseg_new (".pdata", 0); |
252b5132 | 5004 | } |
99a814a1 | 5005 | ppc_set_current_section (pdata_section); |
252b5132 RH |
5006 | } |
5007 | ||
5008 | /* pseudo-op: .ydata | |
5009 | behaviour: predefined read only data section | |
b34976b6 | 5010 | double word aligned |
252b5132 RH |
5011 | errors: None |
5012 | warnings: None | |
5013 | initial: .section .ydata "drw3" | |
b34976b6 | 5014 | a - don't know -- maybe a misprint |
252b5132 RH |
5015 | d - initialized data |
5016 | r - readable | |
5017 | 3 - double word aligned (that would be 4 byte boundary) | |
5018 | commentary: | |
5019 | Tag tables (also known as the scope table) for exception handling, | |
99a814a1 AM |
5020 | debugging, etc. */ |
5021 | ||
252b5132 | 5022 | static void |
98027b10 | 5023 | ppc_ydata (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 5024 | { |
81d4177b | 5025 | if (ydata_section == 0) |
252b5132 RH |
5026 | { |
5027 | ydata_section = subseg_new (".ydata", 0); | |
5028 | bfd_set_section_flags (stdoutput, ydata_section, | |
99a814a1 AM |
5029 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC |
5030 | | SEC_READONLY | SEC_DATA )); | |
252b5132 RH |
5031 | |
5032 | bfd_set_section_alignment (stdoutput, ydata_section, 3); | |
5033 | } | |
5034 | else | |
5035 | { | |
5036 | ydata_section = subseg_new (".ydata", 0); | |
5037 | } | |
99a814a1 | 5038 | ppc_set_current_section (ydata_section); |
252b5132 RH |
5039 | } |
5040 | ||
5041 | /* pseudo-op: .reldata | |
5042 | behaviour: predefined read write data section | |
b34976b6 | 5043 | double word aligned (4-byte) |
252b5132 RH |
5044 | FIXME: relocation is applied to it |
5045 | FIXME: what's the difference between this and .data? | |
5046 | errors: None | |
5047 | warnings: None | |
5048 | initial: .section .reldata "drw3" | |
5049 | d - initialized data | |
5050 | r - readable | |
5051 | w - writeable | |
5052 | 3 - double word aligned (that would be 8 byte boundary) | |
5053 | ||
5054 | commentary: | |
5055 | Like .data, but intended to hold data subject to relocation, such as | |
99a814a1 AM |
5056 | function descriptors, etc. */ |
5057 | ||
252b5132 | 5058 | static void |
98027b10 | 5059 | ppc_reldata (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5060 | { |
5061 | if (reldata_section == 0) | |
5062 | { | |
5063 | reldata_section = subseg_new (".reldata", 0); | |
5064 | ||
5065 | bfd_set_section_flags (stdoutput, reldata_section, | |
99a814a1 AM |
5066 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC |
5067 | | SEC_DATA)); | |
252b5132 RH |
5068 | |
5069 | bfd_set_section_alignment (stdoutput, reldata_section, 2); | |
5070 | } | |
5071 | else | |
5072 | { | |
5073 | reldata_section = subseg_new (".reldata", 0); | |
5074 | } | |
99a814a1 | 5075 | ppc_set_current_section (reldata_section); |
252b5132 RH |
5076 | } |
5077 | ||
5078 | /* pseudo-op: .rdata | |
5079 | behaviour: predefined read only data section | |
b34976b6 | 5080 | double word aligned |
252b5132 RH |
5081 | errors: None |
5082 | warnings: None | |
5083 | initial: .section .rdata "dr3" | |
5084 | d - initialized data | |
5085 | r - readable | |
99a814a1 AM |
5086 | 3 - double word aligned (that would be 4 byte boundary) */ |
5087 | ||
252b5132 | 5088 | static void |
98027b10 | 5089 | ppc_rdata (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5090 | { |
5091 | if (rdata_section == 0) | |
5092 | { | |
5093 | rdata_section = subseg_new (".rdata", 0); | |
5094 | bfd_set_section_flags (stdoutput, rdata_section, | |
5095 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
5096 | | SEC_READONLY | SEC_DATA )); | |
5097 | ||
5098 | bfd_set_section_alignment (stdoutput, rdata_section, 2); | |
5099 | } | |
5100 | else | |
5101 | { | |
5102 | rdata_section = subseg_new (".rdata", 0); | |
5103 | } | |
99a814a1 | 5104 | ppc_set_current_section (rdata_section); |
252b5132 RH |
5105 | } |
5106 | ||
5107 | /* pseudo-op: .ualong | |
81d4177b | 5108 | behaviour: much like .int, with the exception that no alignment is |
b34976b6 | 5109 | performed. |
252b5132 RH |
5110 | FIXME: test the alignment statement |
5111 | errors: None | |
99a814a1 AM |
5112 | warnings: None */ |
5113 | ||
252b5132 | 5114 | static void |
98027b10 | 5115 | ppc_ualong (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 5116 | { |
99a814a1 AM |
5117 | /* Try for long. */ |
5118 | cons (4); | |
252b5132 RH |
5119 | } |
5120 | ||
5121 | /* pseudo-op: .znop <symbol name> | |
5122 | behaviour: Issue a nop instruction | |
b34976b6 | 5123 | Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using |
252b5132 RH |
5124 | the supplied symbol name. |
5125 | errors: None | |
99a814a1 AM |
5126 | warnings: Missing symbol name */ |
5127 | ||
252b5132 | 5128 | static void |
98027b10 | 5129 | ppc_znop (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5130 | { |
5131 | unsigned long insn; | |
5132 | const struct powerpc_opcode *opcode; | |
252b5132 | 5133 | char *f; |
252b5132 | 5134 | symbolS *sym; |
252b5132 RH |
5135 | char *symbol_name; |
5136 | char c; | |
5137 | char *name; | |
252b5132 | 5138 | |
99a814a1 | 5139 | /* Strip out the symbol name. */ |
252b5132 RH |
5140 | symbol_name = input_line_pointer; |
5141 | c = get_symbol_end (); | |
5142 | ||
5143 | name = xmalloc (input_line_pointer - symbol_name + 1); | |
5144 | strcpy (name, symbol_name); | |
5145 | ||
5146 | sym = symbol_find_or_make (name); | |
5147 | ||
5148 | *input_line_pointer = c; | |
5149 | ||
5150 | SKIP_WHITESPACE (); | |
5151 | ||
5152 | /* Look up the opcode in the hash table. */ | |
5153 | opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop"); | |
5154 | ||
99a814a1 | 5155 | /* Stick in the nop. */ |
252b5132 RH |
5156 | insn = opcode->opcode; |
5157 | ||
5158 | /* Write out the instruction. */ | |
5159 | f = frag_more (4); | |
5160 | md_number_to_chars (f, insn, 4); | |
5161 | fix_new (frag_now, | |
5162 | f - frag_now->fr_literal, | |
5163 | 4, | |
5164 | sym, | |
5165 | 0, | |
5166 | 0, | |
5167 | BFD_RELOC_16_GOT_PCREL); | |
5168 | ||
5169 | } | |
5170 | ||
81d4177b KH |
5171 | /* pseudo-op: |
5172 | behaviour: | |
5173 | errors: | |
99a814a1 AM |
5174 | warnings: */ |
5175 | ||
252b5132 | 5176 | static void |
98027b10 | 5177 | ppc_pe_comm (int lcomm) |
252b5132 | 5178 | { |
98027b10 AM |
5179 | char *name; |
5180 | char c; | |
5181 | char *p; | |
252b5132 | 5182 | offsetT temp; |
98027b10 | 5183 | symbolS *symbolP; |
252b5132 RH |
5184 | offsetT align; |
5185 | ||
5186 | name = input_line_pointer; | |
5187 | c = get_symbol_end (); | |
5188 | ||
99a814a1 | 5189 | /* just after name is now '\0'. */ |
252b5132 RH |
5190 | p = input_line_pointer; |
5191 | *p = c; | |
5192 | SKIP_WHITESPACE (); | |
5193 | if (*input_line_pointer != ',') | |
5194 | { | |
d6ed37ed | 5195 | as_bad (_("expected comma after symbol-name: rest of line ignored.")); |
252b5132 RH |
5196 | ignore_rest_of_line (); |
5197 | return; | |
5198 | } | |
5199 | ||
5200 | input_line_pointer++; /* skip ',' */ | |
5201 | if ((temp = get_absolute_expression ()) < 0) | |
5202 | { | |
5203 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp); | |
5204 | ignore_rest_of_line (); | |
5205 | return; | |
5206 | } | |
5207 | ||
5208 | if (! lcomm) | |
5209 | { | |
5210 | /* The third argument to .comm is the alignment. */ | |
5211 | if (*input_line_pointer != ',') | |
5212 | align = 3; | |
5213 | else | |
5214 | { | |
5215 | ++input_line_pointer; | |
5216 | align = get_absolute_expression (); | |
5217 | if (align <= 0) | |
5218 | { | |
5219 | as_warn (_("ignoring bad alignment")); | |
5220 | align = 3; | |
5221 | } | |
5222 | } | |
5223 | } | |
5224 | ||
5225 | *p = 0; | |
5226 | symbolP = symbol_find_or_make (name); | |
5227 | ||
5228 | *p = c; | |
5229 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
5230 | { | |
d6ed37ed | 5231 | as_bad (_("ignoring attempt to re-define symbol `%s'."), |
252b5132 RH |
5232 | S_GET_NAME (symbolP)); |
5233 | ignore_rest_of_line (); | |
5234 | return; | |
5235 | } | |
5236 | ||
5237 | if (S_GET_VALUE (symbolP)) | |
5238 | { | |
5239 | if (S_GET_VALUE (symbolP) != (valueT) temp) | |
d6ed37ed | 5240 | as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."), |
252b5132 RH |
5241 | S_GET_NAME (symbolP), |
5242 | (long) S_GET_VALUE (symbolP), | |
5243 | (long) temp); | |
5244 | } | |
5245 | else | |
5246 | { | |
5247 | S_SET_VALUE (symbolP, (valueT) temp); | |
5248 | S_SET_EXTERNAL (symbolP); | |
86ebace2 | 5249 | S_SET_SEGMENT (symbolP, bfd_com_section_ptr); |
252b5132 RH |
5250 | } |
5251 | ||
5252 | demand_empty_rest_of_line (); | |
5253 | } | |
5254 | ||
5255 | /* | |
5256 | * implement the .section pseudo op: | |
5257 | * .section name {, "flags"} | |
5258 | * ^ ^ | |
5259 | * | +--- optional flags: 'b' for bss | |
5260 | * | 'i' for info | |
5261 | * +-- section name 'l' for lib | |
5262 | * 'n' for noload | |
5263 | * 'o' for over | |
5264 | * 'w' for data | |
5265 | * 'd' (apparently m88k for data) | |
5266 | * 'x' for text | |
5267 | * But if the argument is not a quoted string, treat it as a | |
5268 | * subsegment number. | |
5269 | * | |
5270 | * FIXME: this is a copy of the section processing from obj-coff.c, with | |
5271 | * additions/changes for the moto-pas assembler support. There are three | |
5272 | * categories: | |
5273 | * | |
81d4177b | 5274 | * FIXME: I just noticed this. This doesn't work at all really. It it |
252b5132 RH |
5275 | * setting bits that bfd probably neither understands or uses. The |
5276 | * correct approach (?) will have to incorporate extra fields attached | |
5277 | * to the section to hold the system specific stuff. (krk) | |
5278 | * | |
5279 | * Section Contents: | |
5280 | * 'a' - unknown - referred to in documentation, but no definition supplied | |
5281 | * 'c' - section has code | |
5282 | * 'd' - section has initialized data | |
5283 | * 'u' - section has uninitialized data | |
5284 | * 'i' - section contains directives (info) | |
5285 | * 'n' - section can be discarded | |
5286 | * 'R' - remove section at link time | |
5287 | * | |
5288 | * Section Protection: | |
5289 | * 'r' - section is readable | |
5290 | * 'w' - section is writeable | |
5291 | * 'x' - section is executable | |
5292 | * 's' - section is sharable | |
5293 | * | |
5294 | * Section Alignment: | |
5295 | * '0' - align to byte boundary | |
5296 | * '1' - align to halfword undary | |
5297 | * '2' - align to word boundary | |
5298 | * '3' - align to doubleword boundary | |
5299 | * '4' - align to quadword boundary | |
5300 | * '5' - align to 32 byte boundary | |
5301 | * '6' - align to 64 byte boundary | |
5302 | * | |
5303 | */ | |
5304 | ||
5305 | void | |
98027b10 | 5306 | ppc_pe_section (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 5307 | { |
99a814a1 | 5308 | /* Strip out the section name. */ |
252b5132 RH |
5309 | char *section_name; |
5310 | char c; | |
5311 | char *name; | |
5312 | unsigned int exp; | |
5313 | flagword flags; | |
5314 | segT sec; | |
5315 | int align; | |
5316 | ||
5317 | section_name = input_line_pointer; | |
5318 | c = get_symbol_end (); | |
5319 | ||
5320 | name = xmalloc (input_line_pointer - section_name + 1); | |
5321 | strcpy (name, section_name); | |
5322 | ||
5323 | *input_line_pointer = c; | |
5324 | ||
5325 | SKIP_WHITESPACE (); | |
5326 | ||
5327 | exp = 0; | |
5328 | flags = SEC_NO_FLAGS; | |
5329 | ||
5330 | if (strcmp (name, ".idata$2") == 0) | |
5331 | { | |
5332 | align = 0; | |
5333 | } | |
5334 | else if (strcmp (name, ".idata$3") == 0) | |
5335 | { | |
5336 | align = 0; | |
5337 | } | |
5338 | else if (strcmp (name, ".idata$4") == 0) | |
5339 | { | |
5340 | align = 2; | |
5341 | } | |
5342 | else if (strcmp (name, ".idata$5") == 0) | |
5343 | { | |
5344 | align = 2; | |
5345 | } | |
5346 | else if (strcmp (name, ".idata$6") == 0) | |
5347 | { | |
5348 | align = 1; | |
5349 | } | |
5350 | else | |
99a814a1 AM |
5351 | /* Default alignment to 16 byte boundary. */ |
5352 | align = 4; | |
252b5132 RH |
5353 | |
5354 | if (*input_line_pointer == ',') | |
5355 | { | |
5356 | ++input_line_pointer; | |
5357 | SKIP_WHITESPACE (); | |
5358 | if (*input_line_pointer != '"') | |
5359 | exp = get_absolute_expression (); | |
5360 | else | |
5361 | { | |
5362 | ++input_line_pointer; | |
5363 | while (*input_line_pointer != '"' | |
5364 | && ! is_end_of_line[(unsigned char) *input_line_pointer]) | |
5365 | { | |
5366 | switch (*input_line_pointer) | |
5367 | { | |
5368 | /* Section Contents */ | |
5369 | case 'a': /* unknown */ | |
d6ed37ed | 5370 | as_bad (_("unsupported section attribute -- 'a'")); |
252b5132 RH |
5371 | break; |
5372 | case 'c': /* code section */ | |
81d4177b | 5373 | flags |= SEC_CODE; |
252b5132 RH |
5374 | break; |
5375 | case 'd': /* section has initialized data */ | |
5376 | flags |= SEC_DATA; | |
5377 | break; | |
5378 | case 'u': /* section has uninitialized data */ | |
5379 | /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA | |
5380 | in winnt.h */ | |
5381 | flags |= SEC_ROM; | |
5382 | break; | |
5383 | case 'i': /* section contains directives (info) */ | |
5384 | /* FIXME: This is IMAGE_SCN_LNK_INFO | |
5385 | in winnt.h */ | |
5386 | flags |= SEC_HAS_CONTENTS; | |
5387 | break; | |
5388 | case 'n': /* section can be discarded */ | |
81d4177b | 5389 | flags &=~ SEC_LOAD; |
252b5132 RH |
5390 | break; |
5391 | case 'R': /* Remove section at link time */ | |
5392 | flags |= SEC_NEVER_LOAD; | |
5393 | break; | |
8d452c78 | 5394 | #if IFLICT_BRAIN_DAMAGE |
252b5132 RH |
5395 | /* Section Protection */ |
5396 | case 'r': /* section is readable */ | |
5397 | flags |= IMAGE_SCN_MEM_READ; | |
5398 | break; | |
5399 | case 'w': /* section is writeable */ | |
5400 | flags |= IMAGE_SCN_MEM_WRITE; | |
5401 | break; | |
5402 | case 'x': /* section is executable */ | |
5403 | flags |= IMAGE_SCN_MEM_EXECUTE; | |
5404 | break; | |
5405 | case 's': /* section is sharable */ | |
5406 | flags |= IMAGE_SCN_MEM_SHARED; | |
5407 | break; | |
5408 | ||
5409 | /* Section Alignment */ | |
5410 | case '0': /* align to byte boundary */ | |
5411 | flags |= IMAGE_SCN_ALIGN_1BYTES; | |
5412 | align = 0; | |
5413 | break; | |
5414 | case '1': /* align to halfword boundary */ | |
5415 | flags |= IMAGE_SCN_ALIGN_2BYTES; | |
5416 | align = 1; | |
5417 | break; | |
5418 | case '2': /* align to word boundary */ | |
5419 | flags |= IMAGE_SCN_ALIGN_4BYTES; | |
5420 | align = 2; | |
5421 | break; | |
5422 | case '3': /* align to doubleword boundary */ | |
5423 | flags |= IMAGE_SCN_ALIGN_8BYTES; | |
5424 | align = 3; | |
5425 | break; | |
5426 | case '4': /* align to quadword boundary */ | |
5427 | flags |= IMAGE_SCN_ALIGN_16BYTES; | |
5428 | align = 4; | |
5429 | break; | |
5430 | case '5': /* align to 32 byte boundary */ | |
5431 | flags |= IMAGE_SCN_ALIGN_32BYTES; | |
5432 | align = 5; | |
5433 | break; | |
5434 | case '6': /* align to 64 byte boundary */ | |
5435 | flags |= IMAGE_SCN_ALIGN_64BYTES; | |
5436 | align = 6; | |
5437 | break; | |
8d452c78 | 5438 | #endif |
252b5132 | 5439 | default: |
99a814a1 AM |
5440 | as_bad (_("unknown section attribute '%c'"), |
5441 | *input_line_pointer); | |
252b5132 RH |
5442 | break; |
5443 | } | |
5444 | ++input_line_pointer; | |
5445 | } | |
5446 | if (*input_line_pointer == '"') | |
5447 | ++input_line_pointer; | |
5448 | } | |
5449 | } | |
5450 | ||
5451 | sec = subseg_new (name, (subsegT) exp); | |
5452 | ||
99a814a1 | 5453 | ppc_set_current_section (sec); |
252b5132 RH |
5454 | |
5455 | if (flags != SEC_NO_FLAGS) | |
5456 | { | |
5457 | if (! bfd_set_section_flags (stdoutput, sec, flags)) | |
5458 | as_bad (_("error setting flags for \"%s\": %s"), | |
5459 | bfd_section_name (stdoutput, sec), | |
5460 | bfd_errmsg (bfd_get_error ())); | |
5461 | } | |
5462 | ||
99a814a1 | 5463 | bfd_set_section_alignment (stdoutput, sec, align); |
252b5132 RH |
5464 | } |
5465 | ||
5466 | static void | |
98027b10 | 5467 | ppc_pe_function (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5468 | { |
5469 | char *name; | |
5470 | char endc; | |
5471 | symbolS *ext_sym; | |
5472 | ||
5473 | name = input_line_pointer; | |
5474 | endc = get_symbol_end (); | |
5475 | ||
5476 | ext_sym = symbol_find_or_make (name); | |
5477 | ||
5478 | *input_line_pointer = endc; | |
5479 | ||
5480 | S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); | |
5481 | SF_SET_FUNCTION (ext_sym); | |
5482 | SF_SET_PROCESS (ext_sym); | |
5483 | coff_add_linesym (ext_sym); | |
5484 | ||
5485 | demand_empty_rest_of_line (); | |
5486 | } | |
5487 | ||
5488 | static void | |
98027b10 | 5489 | ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5490 | { |
5491 | if (tocdata_section == 0) | |
5492 | { | |
5493 | tocdata_section = subseg_new (".tocd", 0); | |
99a814a1 | 5494 | /* FIXME: section flags won't work. */ |
252b5132 RH |
5495 | bfd_set_section_flags (stdoutput, tocdata_section, |
5496 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
99a814a1 | 5497 | | SEC_READONLY | SEC_DATA)); |
252b5132 RH |
5498 | |
5499 | bfd_set_section_alignment (stdoutput, tocdata_section, 2); | |
5500 | } | |
5501 | else | |
5502 | { | |
5503 | rdata_section = subseg_new (".tocd", 0); | |
5504 | } | |
5505 | ||
99a814a1 | 5506 | ppc_set_current_section (tocdata_section); |
252b5132 RH |
5507 | |
5508 | demand_empty_rest_of_line (); | |
5509 | } | |
5510 | ||
5511 | /* Don't adjust TOC relocs to use the section symbol. */ | |
5512 | ||
5513 | int | |
98027b10 | 5514 | ppc_pe_fix_adjustable (fixS *fix) |
252b5132 RH |
5515 | { |
5516 | return fix->fx_r_type != BFD_RELOC_PPC_TOC16; | |
5517 | } | |
5518 | ||
5519 | #endif | |
5520 | \f | |
5521 | #ifdef OBJ_XCOFF | |
5522 | ||
5523 | /* XCOFF specific symbol and file handling. */ | |
5524 | ||
5525 | /* Canonicalize the symbol name. We use the to force the suffix, if | |
5526 | any, to use square brackets, and to be in upper case. */ | |
5527 | ||
5528 | char * | |
98027b10 | 5529 | ppc_canonicalize_symbol_name (char *name) |
252b5132 RH |
5530 | { |
5531 | char *s; | |
5532 | ||
5533 | if (ppc_stab_symbol) | |
5534 | return name; | |
5535 | ||
5536 | for (s = name; *s != '\0' && *s != '{' && *s != '['; s++) | |
5537 | ; | |
5538 | if (*s != '\0') | |
5539 | { | |
5540 | char brac; | |
5541 | ||
5542 | if (*s == '[') | |
5543 | brac = ']'; | |
5544 | else | |
5545 | { | |
5546 | *s = '['; | |
5547 | brac = '}'; | |
5548 | } | |
5549 | ||
5550 | for (s++; *s != '\0' && *s != brac; s++) | |
3882b010 | 5551 | *s = TOUPPER (*s); |
252b5132 RH |
5552 | |
5553 | if (*s == '\0' || s[1] != '\0') | |
5554 | as_bad (_("bad symbol suffix")); | |
5555 | ||
5556 | *s = ']'; | |
5557 | } | |
5558 | ||
5559 | return name; | |
5560 | } | |
5561 | ||
5562 | /* Set the class of a symbol based on the suffix, if any. This is | |
5563 | called whenever a new symbol is created. */ | |
5564 | ||
5565 | void | |
98027b10 | 5566 | ppc_symbol_new_hook (symbolS *sym) |
252b5132 | 5567 | { |
809ffe0d | 5568 | struct ppc_tc_sy *tc; |
252b5132 RH |
5569 | const char *s; |
5570 | ||
809ffe0d ILT |
5571 | tc = symbol_get_tc (sym); |
5572 | tc->next = NULL; | |
5573 | tc->output = 0; | |
96d56e9f | 5574 | tc->symbol_class = -1; |
809ffe0d ILT |
5575 | tc->real_name = NULL; |
5576 | tc->subseg = 0; | |
5577 | tc->align = 0; | |
85645aed TG |
5578 | tc->u.size = NULL; |
5579 | tc->u.dw = NULL; | |
809ffe0d | 5580 | tc->within = NULL; |
252b5132 RH |
5581 | |
5582 | if (ppc_stab_symbol) | |
5583 | return; | |
5584 | ||
5585 | s = strchr (S_GET_NAME (sym), '['); | |
5586 | if (s == (const char *) NULL) | |
5587 | { | |
5588 | /* There is no suffix. */ | |
5589 | return; | |
5590 | } | |
5591 | ||
5592 | ++s; | |
5593 | ||
5594 | switch (s[0]) | |
5595 | { | |
5596 | case 'B': | |
5597 | if (strcmp (s, "BS]") == 0) | |
96d56e9f | 5598 | tc->symbol_class = XMC_BS; |
252b5132 RH |
5599 | break; |
5600 | case 'D': | |
5601 | if (strcmp (s, "DB]") == 0) | |
96d56e9f | 5602 | tc->symbol_class = XMC_DB; |
252b5132 | 5603 | else if (strcmp (s, "DS]") == 0) |
96d56e9f | 5604 | tc->symbol_class = XMC_DS; |
252b5132 RH |
5605 | break; |
5606 | case 'G': | |
5607 | if (strcmp (s, "GL]") == 0) | |
96d56e9f | 5608 | tc->symbol_class = XMC_GL; |
252b5132 RH |
5609 | break; |
5610 | case 'P': | |
5611 | if (strcmp (s, "PR]") == 0) | |
96d56e9f | 5612 | tc->symbol_class = XMC_PR; |
252b5132 RH |
5613 | break; |
5614 | case 'R': | |
5615 | if (strcmp (s, "RO]") == 0) | |
96d56e9f | 5616 | tc->symbol_class = XMC_RO; |
252b5132 | 5617 | else if (strcmp (s, "RW]") == 0) |
96d56e9f | 5618 | tc->symbol_class = XMC_RW; |
252b5132 RH |
5619 | break; |
5620 | case 'S': | |
5621 | if (strcmp (s, "SV]") == 0) | |
96d56e9f | 5622 | tc->symbol_class = XMC_SV; |
252b5132 RH |
5623 | break; |
5624 | case 'T': | |
5625 | if (strcmp (s, "TC]") == 0) | |
96d56e9f | 5626 | tc->symbol_class = XMC_TC; |
252b5132 | 5627 | else if (strcmp (s, "TI]") == 0) |
96d56e9f | 5628 | tc->symbol_class = XMC_TI; |
252b5132 | 5629 | else if (strcmp (s, "TB]") == 0) |
96d56e9f | 5630 | tc->symbol_class = XMC_TB; |
252b5132 | 5631 | else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0) |
96d56e9f | 5632 | tc->symbol_class = XMC_TC0; |
252b5132 RH |
5633 | break; |
5634 | case 'U': | |
5635 | if (strcmp (s, "UA]") == 0) | |
96d56e9f | 5636 | tc->symbol_class = XMC_UA; |
252b5132 | 5637 | else if (strcmp (s, "UC]") == 0) |
96d56e9f | 5638 | tc->symbol_class = XMC_UC; |
252b5132 RH |
5639 | break; |
5640 | case 'X': | |
5641 | if (strcmp (s, "XO]") == 0) | |
96d56e9f | 5642 | tc->symbol_class = XMC_XO; |
252b5132 RH |
5643 | break; |
5644 | } | |
5645 | ||
96d56e9f | 5646 | if (tc->symbol_class == -1) |
d6ed37ed | 5647 | as_bad (_("unrecognized symbol suffix")); |
252b5132 RH |
5648 | } |
5649 | ||
5650 | /* Set the class of a label based on where it is defined. This | |
5651 | handles symbols without suffixes. Also, move the symbol so that it | |
5652 | follows the csect symbol. */ | |
5653 | ||
5654 | void | |
98027b10 | 5655 | ppc_frob_label (symbolS *sym) |
252b5132 RH |
5656 | { |
5657 | if (ppc_current_csect != (symbolS *) NULL) | |
5658 | { | |
96d56e9f NC |
5659 | if (symbol_get_tc (sym)->symbol_class == -1) |
5660 | symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class; | |
252b5132 RH |
5661 | |
5662 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
5663 | symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, |
5664 | &symbol_rootP, &symbol_lastP); | |
5665 | symbol_get_tc (ppc_current_csect)->within = sym; | |
2fb4b302 | 5666 | symbol_get_tc (sym)->within = ppc_current_csect; |
252b5132 | 5667 | } |
07a53e5c RH |
5668 | |
5669 | #ifdef OBJ_ELF | |
5670 | dwarf2_emit_label (sym); | |
5671 | #endif | |
252b5132 RH |
5672 | } |
5673 | ||
5674 | /* This variable is set by ppc_frob_symbol if any absolute symbols are | |
5675 | seen. It tells ppc_adjust_symtab whether it needs to look through | |
5676 | the symbols. */ | |
5677 | ||
b34976b6 | 5678 | static bfd_boolean ppc_saw_abs; |
252b5132 RH |
5679 | |
5680 | /* Change the name of a symbol just before writing it out. Set the | |
5681 | real name if the .rename pseudo-op was used. Otherwise, remove any | |
5682 | class suffix. Return 1 if the symbol should not be included in the | |
5683 | symbol table. */ | |
5684 | ||
5685 | int | |
98027b10 | 5686 | ppc_frob_symbol (symbolS *sym) |
252b5132 RH |
5687 | { |
5688 | static symbolS *ppc_last_function; | |
5689 | static symbolS *set_end; | |
5690 | ||
5691 | /* Discard symbols that should not be included in the output symbol | |
5692 | table. */ | |
809ffe0d ILT |
5693 | if (! symbol_used_in_reloc_p (sym) |
5694 | && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0 | |
670ec21d | 5695 | || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 5696 | && ! symbol_get_tc (sym)->output |
252b5132 RH |
5697 | && S_GET_STORAGE_CLASS (sym) != C_FILE))) |
5698 | return 1; | |
5699 | ||
a161fe53 AM |
5700 | /* This one will disappear anyway. Don't make a csect sym for it. */ |
5701 | if (sym == abs_section_sym) | |
5702 | return 1; | |
5703 | ||
809ffe0d ILT |
5704 | if (symbol_get_tc (sym)->real_name != (char *) NULL) |
5705 | S_SET_NAME (sym, symbol_get_tc (sym)->real_name); | |
252b5132 RH |
5706 | else |
5707 | { | |
5708 | const char *name; | |
5709 | const char *s; | |
5710 | ||
5711 | name = S_GET_NAME (sym); | |
5712 | s = strchr (name, '['); | |
5713 | if (s != (char *) NULL) | |
5714 | { | |
5715 | unsigned int len; | |
5716 | char *snew; | |
5717 | ||
5718 | len = s - name; | |
5719 | snew = xmalloc (len + 1); | |
5720 | memcpy (snew, name, len); | |
5721 | snew[len] = '\0'; | |
5722 | ||
5723 | S_SET_NAME (sym, snew); | |
5724 | } | |
5725 | } | |
5726 | ||
5727 | if (set_end != (symbolS *) NULL) | |
5728 | { | |
5729 | SA_SET_SYM_ENDNDX (set_end, sym); | |
5730 | set_end = NULL; | |
5731 | } | |
5732 | ||
5733 | if (SF_GET_FUNCTION (sym)) | |
5734 | { | |
5735 | if (ppc_last_function != (symbolS *) NULL) | |
5736 | as_bad (_("two .function pseudo-ops with no intervening .ef")); | |
5737 | ppc_last_function = sym; | |
85645aed | 5738 | if (symbol_get_tc (sym)->u.size != (symbolS *) NULL) |
252b5132 | 5739 | { |
85645aed | 5740 | resolve_symbol_value (symbol_get_tc (sym)->u.size); |
809ffe0d | 5741 | SA_SET_SYM_FSIZE (sym, |
85645aed | 5742 | (long) S_GET_VALUE (symbol_get_tc (sym)->u.size)); |
252b5132 RH |
5743 | } |
5744 | } | |
5745 | else if (S_GET_STORAGE_CLASS (sym) == C_FCN | |
5746 | && strcmp (S_GET_NAME (sym), ".ef") == 0) | |
5747 | { | |
5748 | if (ppc_last_function == (symbolS *) NULL) | |
5749 | as_bad (_(".ef with no preceding .function")); | |
5750 | else | |
5751 | { | |
5752 | set_end = ppc_last_function; | |
5753 | ppc_last_function = NULL; | |
5754 | ||
5755 | /* We don't have a C_EFCN symbol, but we need to force the | |
5756 | COFF backend to believe that it has seen one. */ | |
5757 | coff_last_function = NULL; | |
5758 | } | |
5759 | } | |
5760 | ||
670ec21d | 5761 | if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 5762 | && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0 |
252b5132 RH |
5763 | && S_GET_STORAGE_CLASS (sym) != C_FILE |
5764 | && S_GET_STORAGE_CLASS (sym) != C_FCN | |
5765 | && S_GET_STORAGE_CLASS (sym) != C_BLOCK | |
5766 | && S_GET_STORAGE_CLASS (sym) != C_BSTAT | |
5767 | && S_GET_STORAGE_CLASS (sym) != C_ESTAT | |
5768 | && S_GET_STORAGE_CLASS (sym) != C_BINCL | |
5769 | && S_GET_STORAGE_CLASS (sym) != C_EINCL | |
5770 | && S_GET_SEGMENT (sym) != ppc_coff_debug_section) | |
5771 | S_SET_STORAGE_CLASS (sym, C_HIDEXT); | |
5772 | ||
5773 | if (S_GET_STORAGE_CLASS (sym) == C_EXT | |
8602d4fe | 5774 | || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT |
252b5132 RH |
5775 | || S_GET_STORAGE_CLASS (sym) == C_HIDEXT) |
5776 | { | |
5777 | int i; | |
5778 | union internal_auxent *a; | |
5779 | ||
5780 | /* Create a csect aux. */ | |
5781 | i = S_GET_NUMBER_AUXILIARY (sym); | |
5782 | S_SET_NUMBER_AUXILIARY (sym, i + 1); | |
809ffe0d | 5783 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent; |
96d56e9f | 5784 | if (symbol_get_tc (sym)->symbol_class == XMC_TC0) |
252b5132 RH |
5785 | { |
5786 | /* This is the TOC table. */ | |
5787 | know (strcmp (S_GET_NAME (sym), "TOC") == 0); | |
5788 | a->x_csect.x_scnlen.l = 0; | |
5789 | a->x_csect.x_smtyp = (2 << 3) | XTY_SD; | |
5790 | } | |
809ffe0d | 5791 | else if (symbol_get_tc (sym)->subseg != 0) |
252b5132 RH |
5792 | { |
5793 | /* This is a csect symbol. x_scnlen is the size of the | |
5794 | csect. */ | |
809ffe0d | 5795 | if (symbol_get_tc (sym)->next == (symbolS *) NULL) |
252b5132 RH |
5796 | a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, |
5797 | S_GET_SEGMENT (sym)) | |
5798 | - S_GET_VALUE (sym)); | |
5799 | else | |
5800 | { | |
6386f3a7 | 5801 | resolve_symbol_value (symbol_get_tc (sym)->next); |
809ffe0d | 5802 | a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next) |
252b5132 RH |
5803 | - S_GET_VALUE (sym)); |
5804 | } | |
809ffe0d | 5805 | a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD; |
252b5132 RH |
5806 | } |
5807 | else if (S_GET_SEGMENT (sym) == bss_section) | |
5808 | { | |
5809 | /* This is a common symbol. */ | |
809ffe0d ILT |
5810 | a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset; |
5811 | a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM; | |
252b5132 | 5812 | if (S_IS_EXTERNAL (sym)) |
96d56e9f | 5813 | symbol_get_tc (sym)->symbol_class = XMC_RW; |
252b5132 | 5814 | else |
96d56e9f | 5815 | symbol_get_tc (sym)->symbol_class = XMC_BS; |
252b5132 RH |
5816 | } |
5817 | else if (S_GET_SEGMENT (sym) == absolute_section) | |
5818 | { | |
5819 | /* This is an absolute symbol. The csect will be created by | |
99a814a1 | 5820 | ppc_adjust_symtab. */ |
b34976b6 | 5821 | ppc_saw_abs = TRUE; |
252b5132 | 5822 | a->x_csect.x_smtyp = XTY_LD; |
96d56e9f NC |
5823 | if (symbol_get_tc (sym)->symbol_class == -1) |
5824 | symbol_get_tc (sym)->symbol_class = XMC_XO; | |
252b5132 RH |
5825 | } |
5826 | else if (! S_IS_DEFINED (sym)) | |
5827 | { | |
5828 | /* This is an external symbol. */ | |
5829 | a->x_csect.x_scnlen.l = 0; | |
5830 | a->x_csect.x_smtyp = XTY_ER; | |
5831 | } | |
96d56e9f | 5832 | else if (symbol_get_tc (sym)->symbol_class == XMC_TC) |
252b5132 RH |
5833 | { |
5834 | symbolS *next; | |
5835 | ||
5836 | /* This is a TOC definition. x_scnlen is the size of the | |
5837 | TOC entry. */ | |
5838 | next = symbol_next (sym); | |
96d56e9f | 5839 | while (symbol_get_tc (next)->symbol_class == XMC_TC0) |
252b5132 RH |
5840 | next = symbol_next (next); |
5841 | if (next == (symbolS *) NULL | |
96d56e9f | 5842 | || symbol_get_tc (next)->symbol_class != XMC_TC) |
252b5132 RH |
5843 | { |
5844 | if (ppc_after_toc_frag == (fragS *) NULL) | |
5845 | a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, | |
5846 | data_section) | |
5847 | - S_GET_VALUE (sym)); | |
5848 | else | |
5849 | a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address | |
5850 | - S_GET_VALUE (sym)); | |
5851 | } | |
5852 | else | |
5853 | { | |
6386f3a7 | 5854 | resolve_symbol_value (next); |
252b5132 RH |
5855 | a->x_csect.x_scnlen.l = (S_GET_VALUE (next) |
5856 | - S_GET_VALUE (sym)); | |
5857 | } | |
5858 | a->x_csect.x_smtyp = (2 << 3) | XTY_SD; | |
5859 | } | |
5860 | else | |
5861 | { | |
5862 | symbolS *csect; | |
5863 | ||
5864 | /* This is a normal symbol definition. x_scnlen is the | |
5865 | symbol index of the containing csect. */ | |
5866 | if (S_GET_SEGMENT (sym) == text_section) | |
5867 | csect = ppc_text_csects; | |
5868 | else if (S_GET_SEGMENT (sym) == data_section) | |
5869 | csect = ppc_data_csects; | |
5870 | else | |
5871 | abort (); | |
5872 | ||
5873 | /* Skip the initial dummy symbol. */ | |
809ffe0d | 5874 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5875 | |
5876 | if (csect == (symbolS *) NULL) | |
5877 | { | |
5878 | as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym)); | |
5879 | a->x_csect.x_scnlen.l = 0; | |
5880 | } | |
5881 | else | |
5882 | { | |
809ffe0d | 5883 | while (symbol_get_tc (csect)->next != (symbolS *) NULL) |
252b5132 | 5884 | { |
6386f3a7 | 5885 | resolve_symbol_value (symbol_get_tc (csect)->next); |
809ffe0d ILT |
5886 | if (S_GET_VALUE (symbol_get_tc (csect)->next) |
5887 | > S_GET_VALUE (sym)) | |
252b5132 | 5888 | break; |
809ffe0d | 5889 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5890 | } |
5891 | ||
809ffe0d ILT |
5892 | a->x_csect.x_scnlen.p = |
5893 | coffsymbol (symbol_get_bfdsym (csect))->native; | |
5894 | coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen = | |
5895 | 1; | |
252b5132 RH |
5896 | } |
5897 | a->x_csect.x_smtyp = XTY_LD; | |
5898 | } | |
81d4177b | 5899 | |
252b5132 RH |
5900 | a->x_csect.x_parmhash = 0; |
5901 | a->x_csect.x_snhash = 0; | |
96d56e9f | 5902 | if (symbol_get_tc (sym)->symbol_class == -1) |
252b5132 RH |
5903 | a->x_csect.x_smclas = XMC_PR; |
5904 | else | |
96d56e9f | 5905 | a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class; |
252b5132 RH |
5906 | a->x_csect.x_stab = 0; |
5907 | a->x_csect.x_snstab = 0; | |
5908 | ||
5909 | /* Don't let the COFF backend resort these symbols. */ | |
809ffe0d | 5910 | symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END; |
252b5132 RH |
5911 | } |
5912 | else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT) | |
5913 | { | |
5914 | /* We want the value to be the symbol index of the referenced | |
5915 | csect symbol. BFD will do that for us if we set the right | |
5916 | flags. */ | |
b782de16 AM |
5917 | asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within); |
5918 | combined_entry_type *c = coffsymbol (bsym)->native; | |
5919 | ||
5920 | S_SET_VALUE (sym, (valueT) (size_t) c); | |
809ffe0d | 5921 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1; |
252b5132 RH |
5922 | } |
5923 | else if (S_GET_STORAGE_CLASS (sym) == C_STSYM) | |
5924 | { | |
5925 | symbolS *block; | |
c734e7e3 | 5926 | valueT base; |
252b5132 | 5927 | |
809ffe0d | 5928 | block = symbol_get_tc (sym)->within; |
c734e7e3 TG |
5929 | if (block) |
5930 | { | |
5931 | /* The value is the offset from the enclosing csect. */ | |
5932 | symbolS *csect; | |
5933 | ||
5934 | csect = symbol_get_tc (block)->within; | |
5935 | resolve_symbol_value (csect); | |
5936 | base = S_GET_VALUE (csect); | |
5937 | } | |
5938 | else | |
5939 | base = 0; | |
5940 | ||
5941 | S_SET_VALUE (sym, S_GET_VALUE (sym) - base); | |
252b5132 RH |
5942 | } |
5943 | else if (S_GET_STORAGE_CLASS (sym) == C_BINCL | |
5944 | || S_GET_STORAGE_CLASS (sym) == C_EINCL) | |
5945 | { | |
5946 | /* We want the value to be a file offset into the line numbers. | |
99a814a1 AM |
5947 | BFD will do that for us if we set the right flags. We have |
5948 | already set the value correctly. */ | |
809ffe0d | 5949 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1; |
252b5132 RH |
5950 | } |
5951 | ||
5952 | return 0; | |
5953 | } | |
5954 | ||
5955 | /* Adjust the symbol table. This creates csect symbols for all | |
5956 | absolute symbols. */ | |
5957 | ||
5958 | void | |
98027b10 | 5959 | ppc_adjust_symtab (void) |
252b5132 RH |
5960 | { |
5961 | symbolS *sym; | |
5962 | ||
5963 | if (! ppc_saw_abs) | |
5964 | return; | |
5965 | ||
5966 | for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym)) | |
5967 | { | |
5968 | symbolS *csect; | |
5969 | int i; | |
5970 | union internal_auxent *a; | |
5971 | ||
5972 | if (S_GET_SEGMENT (sym) != absolute_section) | |
5973 | continue; | |
5974 | ||
5975 | csect = symbol_create (".abs[XO]", absolute_section, | |
5976 | S_GET_VALUE (sym), &zero_address_frag); | |
809ffe0d | 5977 | symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym); |
252b5132 RH |
5978 | S_SET_STORAGE_CLASS (csect, C_HIDEXT); |
5979 | i = S_GET_NUMBER_AUXILIARY (csect); | |
5980 | S_SET_NUMBER_AUXILIARY (csect, i + 1); | |
809ffe0d | 5981 | a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent; |
252b5132 RH |
5982 | a->x_csect.x_scnlen.l = 0; |
5983 | a->x_csect.x_smtyp = XTY_SD; | |
5984 | a->x_csect.x_parmhash = 0; | |
5985 | a->x_csect.x_snhash = 0; | |
5986 | a->x_csect.x_smclas = XMC_XO; | |
5987 | a->x_csect.x_stab = 0; | |
5988 | a->x_csect.x_snstab = 0; | |
5989 | ||
5990 | symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP); | |
5991 | ||
5992 | i = S_GET_NUMBER_AUXILIARY (sym); | |
809ffe0d ILT |
5993 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent; |
5994 | a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native; | |
5995 | coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1; | |
252b5132 RH |
5996 | } |
5997 | ||
b34976b6 | 5998 | ppc_saw_abs = FALSE; |
252b5132 RH |
5999 | } |
6000 | ||
6001 | /* Set the VMA for a section. This is called on all the sections in | |
6002 | turn. */ | |
6003 | ||
6004 | void | |
98027b10 | 6005 | ppc_frob_section (asection *sec) |
252b5132 | 6006 | { |
931e13a6 | 6007 | static bfd_vma vma = 0; |
252b5132 | 6008 | |
85645aed TG |
6009 | /* Dwarf sections start at 0. */ |
6010 | if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING) | |
6011 | return; | |
6012 | ||
931e13a6 | 6013 | vma = md_section_align (sec, vma); |
252b5132 RH |
6014 | bfd_set_section_vma (stdoutput, sec, vma); |
6015 | vma += bfd_section_size (stdoutput, sec); | |
6016 | } | |
6017 | ||
6018 | #endif /* OBJ_XCOFF */ | |
6019 | \f | |
252b5132 | 6020 | char * |
98027b10 | 6021 | md_atof (int type, char *litp, int *sizep) |
252b5132 | 6022 | { |
499ac353 | 6023 | return ieee_md_atof (type, litp, sizep, target_big_endian); |
252b5132 RH |
6024 | } |
6025 | ||
6026 | /* Write a value out to the object file, using the appropriate | |
6027 | endianness. */ | |
6028 | ||
6029 | void | |
98027b10 | 6030 | md_number_to_chars (char *buf, valueT val, int n) |
252b5132 RH |
6031 | { |
6032 | if (target_big_endian) | |
6033 | number_to_chars_bigendian (buf, val, n); | |
6034 | else | |
6035 | number_to_chars_littleendian (buf, val, n); | |
6036 | } | |
6037 | ||
6038 | /* Align a section (I don't know why this is machine dependent). */ | |
6039 | ||
6040 | valueT | |
3aeeedbb | 6041 | md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr) |
252b5132 | 6042 | { |
3aeeedbb AM |
6043 | #ifdef OBJ_ELF |
6044 | return addr; | |
6045 | #else | |
252b5132 RH |
6046 | int align = bfd_get_section_alignment (stdoutput, seg); |
6047 | ||
6048 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
3aeeedbb | 6049 | #endif |
252b5132 RH |
6050 | } |
6051 | ||
6052 | /* We don't have any form of relaxing. */ | |
6053 | ||
6054 | int | |
98027b10 AM |
6055 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
6056 | asection *seg ATTRIBUTE_UNUSED) | |
252b5132 RH |
6057 | { |
6058 | abort (); | |
6059 | return 0; | |
6060 | } | |
6061 | ||
6062 | /* Convert a machine dependent frag. We never generate these. */ | |
6063 | ||
6064 | void | |
98027b10 AM |
6065 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
6066 | asection *sec ATTRIBUTE_UNUSED, | |
6067 | fragS *fragp ATTRIBUTE_UNUSED) | |
252b5132 RH |
6068 | { |
6069 | abort (); | |
6070 | } | |
6071 | ||
6072 | /* We have no need to default values of symbols. */ | |
6073 | ||
252b5132 | 6074 | symbolS * |
98027b10 | 6075 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
6076 | { |
6077 | return 0; | |
6078 | } | |
6079 | \f | |
6080 | /* Functions concerning relocs. */ | |
6081 | ||
6082 | /* The location from which a PC relative jump should be calculated, | |
6083 | given a PC relative reloc. */ | |
6084 | ||
6085 | long | |
98027b10 | 6086 | md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED) |
252b5132 RH |
6087 | { |
6088 | return fixp->fx_frag->fr_address + fixp->fx_where; | |
6089 | } | |
6090 | ||
6091 | #ifdef OBJ_XCOFF | |
6092 | ||
6093 | /* This is called to see whether a fixup should be adjusted to use a | |
6094 | section symbol. We take the opportunity to change a fixup against | |
6095 | a symbol in the TOC subsegment into a reloc against the | |
6096 | corresponding .tc symbol. */ | |
6097 | ||
6098 | int | |
98027b10 | 6099 | ppc_fix_adjustable (fixS *fix) |
252b5132 | 6100 | { |
b782de16 AM |
6101 | valueT val = resolve_symbol_value (fix->fx_addsy); |
6102 | segT symseg = S_GET_SEGMENT (fix->fx_addsy); | |
6103 | TC_SYMFIELD_TYPE *tc; | |
6104 | ||
6105 | if (symseg == absolute_section) | |
6106 | return 0; | |
252b5132 | 6107 | |
85645aed TG |
6108 | /* Always adjust symbols in debugging sections. */ |
6109 | if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING) | |
6110 | return 1; | |
6111 | ||
252b5132 | 6112 | if (ppc_toc_csect != (symbolS *) NULL |
252b5132 | 6113 | && fix->fx_addsy != ppc_toc_csect |
b782de16 | 6114 | && symseg == data_section |
252b5132 RH |
6115 | && val >= ppc_toc_frag->fr_address |
6116 | && (ppc_after_toc_frag == (fragS *) NULL | |
6117 | || val < ppc_after_toc_frag->fr_address)) | |
6118 | { | |
6119 | symbolS *sy; | |
6120 | ||
6121 | for (sy = symbol_next (ppc_toc_csect); | |
6122 | sy != (symbolS *) NULL; | |
6123 | sy = symbol_next (sy)) | |
6124 | { | |
b782de16 AM |
6125 | TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy); |
6126 | ||
96d56e9f | 6127 | if (sy_tc->symbol_class == XMC_TC0) |
252b5132 | 6128 | continue; |
96d56e9f | 6129 | if (sy_tc->symbol_class != XMC_TC) |
252b5132 | 6130 | break; |
b782de16 | 6131 | if (val == resolve_symbol_value (sy)) |
252b5132 RH |
6132 | { |
6133 | fix->fx_addsy = sy; | |
6134 | fix->fx_addnumber = val - ppc_toc_frag->fr_address; | |
6135 | return 0; | |
6136 | } | |
6137 | } | |
6138 | ||
6139 | as_bad_where (fix->fx_file, fix->fx_line, | |
6140 | _("symbol in .toc does not match any .tc")); | |
6141 | } | |
6142 | ||
6143 | /* Possibly adjust the reloc to be against the csect. */ | |
b782de16 AM |
6144 | tc = symbol_get_tc (fix->fx_addsy); |
6145 | if (tc->subseg == 0 | |
96d56e9f NC |
6146 | && tc->symbol_class != XMC_TC0 |
6147 | && tc->symbol_class != XMC_TC | |
b782de16 | 6148 | && symseg != bss_section |
252b5132 | 6149 | /* Don't adjust if this is a reloc in the toc section. */ |
b782de16 | 6150 | && (symseg != data_section |
252b5132 RH |
6151 | || ppc_toc_csect == NULL |
6152 | || val < ppc_toc_frag->fr_address | |
6153 | || (ppc_after_toc_frag != NULL | |
6154 | && val >= ppc_after_toc_frag->fr_address))) | |
6155 | { | |
2fb4b302 | 6156 | symbolS *csect = tc->within; |
252b5132 | 6157 | |
2fb4b302 TG |
6158 | /* If the symbol was not declared by a label (eg: a section symbol), |
6159 | use the section instead of the csect. This doesn't happen in | |
6160 | normal AIX assembly code. */ | |
6161 | if (csect == NULL) | |
6162 | csect = seg_info (symseg)->sym; | |
252b5132 | 6163 | |
2fb4b302 TG |
6164 | fix->fx_offset += val - symbol_get_frag (csect)->fr_address; |
6165 | fix->fx_addsy = csect; | |
252b5132 | 6166 | |
b782de16 | 6167 | return 0; |
252b5132 RH |
6168 | } |
6169 | ||
6170 | /* Adjust a reloc against a .lcomm symbol to be against the base | |
6171 | .lcomm. */ | |
b782de16 | 6172 | if (symseg == bss_section |
252b5132 RH |
6173 | && ! S_IS_EXTERNAL (fix->fx_addsy)) |
6174 | { | |
b782de16 AM |
6175 | symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol; |
6176 | ||
6177 | fix->fx_offset += val - resolve_symbol_value (sy); | |
6178 | fix->fx_addsy = sy; | |
252b5132 RH |
6179 | } |
6180 | ||
6181 | return 0; | |
6182 | } | |
6183 | ||
6184 | /* A reloc from one csect to another must be kept. The assembler | |
6185 | will, of course, keep relocs between sections, and it will keep | |
6186 | absolute relocs, but we need to force it to keep PC relative relocs | |
6187 | between two csects in the same section. */ | |
6188 | ||
6189 | int | |
98027b10 | 6190 | ppc_force_relocation (fixS *fix) |
252b5132 RH |
6191 | { |
6192 | /* At this point fix->fx_addsy should already have been converted to | |
6193 | a csect symbol. If the csect does not include the fragment, then | |
6194 | we need to force the relocation. */ | |
6195 | if (fix->fx_pcrel | |
6196 | && fix->fx_addsy != NULL | |
809ffe0d ILT |
6197 | && symbol_get_tc (fix->fx_addsy)->subseg != 0 |
6198 | && ((symbol_get_frag (fix->fx_addsy)->fr_address | |
6199 | > fix->fx_frag->fr_address) | |
6200 | || (symbol_get_tc (fix->fx_addsy)->next != NULL | |
6201 | && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address | |
252b5132 RH |
6202 | <= fix->fx_frag->fr_address)))) |
6203 | return 1; | |
6204 | ||
ae6063d4 | 6205 | return generic_force_reloc (fix); |
252b5132 RH |
6206 | } |
6207 | ||
2fb4b302 TG |
6208 | void |
6209 | ppc_new_dot_label (symbolS *sym) | |
6210 | { | |
6211 | /* Anchor this label to the current csect for relocations. */ | |
6212 | symbol_get_tc (sym)->within = ppc_current_csect; | |
6213 | } | |
6214 | ||
252b5132 RH |
6215 | #endif /* OBJ_XCOFF */ |
6216 | ||
0baf16f2 | 6217 | #ifdef OBJ_ELF |
a161fe53 AM |
6218 | /* If this function returns non-zero, it guarantees that a relocation |
6219 | will be emitted for a fixup. */ | |
6220 | ||
6221 | int | |
98027b10 | 6222 | ppc_force_relocation (fixS *fix) |
a161fe53 AM |
6223 | { |
6224 | /* Branch prediction relocations must force a relocation, as must | |
6225 | the vtable description relocs. */ | |
6226 | switch (fix->fx_r_type) | |
6227 | { | |
6228 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
6229 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6230 | case BFD_RELOC_PPC_BA16_BRTAKEN: | |
6231 | case BFD_RELOC_PPC_BA16_BRNTAKEN: | |
c744ecf2 | 6232 | case BFD_RELOC_24_PLT_PCREL: |
a161fe53 | 6233 | case BFD_RELOC_PPC64_TOC: |
a161fe53 | 6234 | return 1; |
6911b7dc AM |
6235 | case BFD_RELOC_PPC_B26: |
6236 | case BFD_RELOC_PPC_BA26: | |
6237 | case BFD_RELOC_PPC_B16: | |
6238 | case BFD_RELOC_PPC_BA16: | |
6239 | /* All branch fixups targeting a localentry symbol must | |
6240 | force a relocation. */ | |
6241 | if (fix->fx_addsy) | |
6242 | { | |
6243 | asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); | |
6244 | elf_symbol_type *elfsym | |
6245 | = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym); | |
6246 | gas_assert (elfsym); | |
6247 | if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) | |
6248 | return 1; | |
6249 | } | |
6250 | break; | |
a161fe53 AM |
6251 | default: |
6252 | break; | |
6253 | } | |
6254 | ||
cdba85ec AM |
6255 | if (fix->fx_r_type >= BFD_RELOC_PPC_TLS |
6256 | && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA) | |
6257 | return 1; | |
6258 | ||
ae6063d4 | 6259 | return generic_force_reloc (fix); |
a161fe53 AM |
6260 | } |
6261 | ||
0baf16f2 | 6262 | int |
98027b10 | 6263 | ppc_fix_adjustable (fixS *fix) |
252b5132 | 6264 | { |
6911b7dc AM |
6265 | switch (fix->fx_r_type) |
6266 | { | |
6267 | /* All branch fixups targeting a localentry symbol must | |
6268 | continue using the symbol. */ | |
6269 | case BFD_RELOC_PPC_B26: | |
6270 | case BFD_RELOC_PPC_BA26: | |
6271 | case BFD_RELOC_PPC_B16: | |
6272 | case BFD_RELOC_PPC_BA16: | |
6273 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
6274 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6275 | case BFD_RELOC_PPC_BA16_BRTAKEN: | |
6276 | case BFD_RELOC_PPC_BA16_BRNTAKEN: | |
6277 | if (fix->fx_addsy) | |
6278 | { | |
6279 | asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); | |
6280 | elf_symbol_type *elfsym | |
6281 | = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym); | |
6282 | gas_assert (elfsym); | |
6283 | if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) | |
6284 | return 0; | |
6285 | } | |
6286 | break; | |
6287 | default: | |
6288 | break; | |
6289 | } | |
6290 | ||
0baf16f2 AM |
6291 | return (fix->fx_r_type != BFD_RELOC_16_GOTOFF |
6292 | && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
6293 | && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF | |
6294 | && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
cc9edbf3 AM |
6295 | && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS |
6296 | && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS | |
0baf16f2 AM |
6297 | && fix->fx_r_type != BFD_RELOC_GPREL16 |
6298 | && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT | |
6299 | && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY | |
cdba85ec | 6300 | && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS |
ab1e9ef7 | 6301 | && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)); |
252b5132 | 6302 | } |
0baf16f2 | 6303 | #endif |
252b5132 | 6304 | |
b9c361e0 JL |
6305 | void |
6306 | ppc_frag_check (struct frag *fragP) | |
6307 | { | |
6308 | if (!fragP->has_code) | |
6309 | return; | |
6310 | ||
6311 | if (ppc_mach() == bfd_mach_ppc_vle) | |
6312 | { | |
6313 | if (((fragP->fr_address + fragP->insn_addr) & 1) != 0) | |
6314 | as_bad (_("instruction address is not a multiple of 2")); | |
6315 | } | |
6316 | else | |
6317 | { | |
6318 | if (((fragP->fr_address + fragP->insn_addr) & 3) != 0) | |
6319 | as_bad (_("instruction address is not a multiple of 4")); | |
6320 | } | |
6321 | } | |
6322 | ||
3aeeedbb AM |
6323 | /* Implement HANDLE_ALIGN. This writes the NOP pattern into an |
6324 | rs_align_code frag. */ | |
6325 | ||
6326 | void | |
6327 | ppc_handle_align (struct frag *fragP) | |
6328 | { | |
6329 | valueT count = (fragP->fr_next->fr_address | |
6330 | - (fragP->fr_address + fragP->fr_fix)); | |
6331 | ||
b9c361e0 JL |
6332 | if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0) |
6333 | { | |
6334 | char *dest = fragP->fr_literal + fragP->fr_fix; | |
6335 | ||
6336 | fragP->fr_var = 2; | |
6337 | md_number_to_chars (dest, 0x4400, 2); | |
6338 | } | |
6339 | else if (count != 0 && (count & 3) == 0) | |
3aeeedbb AM |
6340 | { |
6341 | char *dest = fragP->fr_literal + fragP->fr_fix; | |
6342 | ||
6343 | fragP->fr_var = 4; | |
cef4f754 AM |
6344 | |
6345 | if (count > 4 * nop_limit && count < 0x2000000) | |
6346 | { | |
6347 | struct frag *rest; | |
6348 | ||
6349 | /* Make a branch, then follow with nops. Insert another | |
6350 | frag to handle the nops. */ | |
6351 | md_number_to_chars (dest, 0x48000000 + count, 4); | |
6352 | count -= 4; | |
6353 | if (count == 0) | |
6354 | return; | |
6355 | ||
6356 | rest = xmalloc (SIZEOF_STRUCT_FRAG + 4); | |
6357 | memcpy (rest, fragP, SIZEOF_STRUCT_FRAG); | |
6358 | fragP->fr_next = rest; | |
6359 | fragP = rest; | |
6360 | rest->fr_address += rest->fr_fix + 4; | |
6361 | rest->fr_fix = 0; | |
6362 | /* If we leave the next frag as rs_align_code we'll come here | |
6363 | again, resulting in a bunch of branches rather than a | |
6364 | branch followed by nops. */ | |
6365 | rest->fr_type = rs_align; | |
6366 | dest = rest->fr_literal; | |
6367 | } | |
6368 | ||
3aeeedbb AM |
6369 | md_number_to_chars (dest, 0x60000000, 4); |
6370 | ||
42240548 | 6371 | if ((ppc_cpu & PPC_OPCODE_POWER6) != 0 |
5817ffd1 PB |
6372 | || (ppc_cpu & PPC_OPCODE_POWER7) != 0 |
6373 | || (ppc_cpu & PPC_OPCODE_POWER8) != 0) | |
3aeeedbb | 6374 | { |
5817ffd1 | 6375 | /* For power6, power7 and power8, we want the last nop to be a group |
42240548 PB |
6376 | terminating one. Do this by inserting an rs_fill frag immediately |
6377 | after this one, with its address set to the last nop location. | |
6378 | This will automatically reduce the number of nops in the current | |
6379 | frag by one. */ | |
3aeeedbb AM |
6380 | if (count > 4) |
6381 | { | |
6382 | struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4); | |
6383 | ||
6384 | memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG); | |
6385 | group_nop->fr_address = group_nop->fr_next->fr_address - 4; | |
6386 | group_nop->fr_fix = 0; | |
6387 | group_nop->fr_offset = 1; | |
6388 | group_nop->fr_type = rs_fill; | |
6389 | fragP->fr_next = group_nop; | |
6390 | dest = group_nop->fr_literal; | |
6391 | } | |
6392 | ||
5817ffd1 PB |
6393 | if ((ppc_cpu & PPC_OPCODE_POWER7) != 0 |
6394 | || (ppc_cpu & PPC_OPCODE_POWER8) != 0) | |
aea77599 AM |
6395 | { |
6396 | if (ppc_cpu & PPC_OPCODE_E500MC) | |
6397 | /* e500mc group terminating nop: "ori 0,0,0". */ | |
6398 | md_number_to_chars (dest, 0x60000000, 4); | |
6399 | else | |
5817ffd1 | 6400 | /* power7/power8 group terminating nop: "ori 2,2,0". */ |
aea77599 AM |
6401 | md_number_to_chars (dest, 0x60420000, 4); |
6402 | } | |
42240548 PB |
6403 | else |
6404 | /* power6 group terminating nop: "ori 1,1,0". */ | |
6405 | md_number_to_chars (dest, 0x60210000, 4); | |
3aeeedbb AM |
6406 | } |
6407 | } | |
6408 | } | |
6409 | ||
252b5132 | 6410 | /* Apply a fixup to the object code. This is called for all the |
3b8b57a9 | 6411 | fixups we generated by the calls to fix_new_exp, above. */ |
252b5132 | 6412 | |
94f592af | 6413 | void |
62ebcb5c | 6414 | md_apply_fix (fixS *fixP, valueT *valP, segT seg) |
252b5132 | 6415 | { |
94f592af | 6416 | valueT value = * valP; |
5656a981 AM |
6417 | offsetT fieldval; |
6418 | const struct powerpc_operand *operand; | |
252b5132 RH |
6419 | |
6420 | #ifdef OBJ_ELF | |
94f592af | 6421 | if (fixP->fx_addsy != NULL) |
252b5132 | 6422 | { |
a161fe53 | 6423 | /* Hack around bfd_install_relocation brain damage. */ |
94f592af NC |
6424 | if (fixP->fx_pcrel) |
6425 | value += fixP->fx_frag->fr_address + fixP->fx_where; | |
252b5132 RH |
6426 | } |
6427 | else | |
94f592af | 6428 | fixP->fx_done = 1; |
252b5132 | 6429 | #else |
a161fe53 | 6430 | /* FIXME FIXME FIXME: The value we are passed in *valP includes |
7be1c489 AM |
6431 | the symbol values. If we are doing this relocation the code in |
6432 | write.c is going to call bfd_install_relocation, which is also | |
6433 | going to use the symbol value. That means that if the reloc is | |
6434 | fully resolved we want to use *valP since bfd_install_relocation is | |
6435 | not being used. | |
9f0eb232 RS |
6436 | However, if the reloc is not fully resolved we do not want to |
6437 | use *valP, and must use fx_offset instead. If the relocation | |
6438 | is PC-relative, we then need to re-apply md_pcrel_from_section | |
6439 | to this new relocation value. */ | |
94f592af NC |
6440 | if (fixP->fx_addsy == (symbolS *) NULL) |
6441 | fixP->fx_done = 1; | |
6442 | ||
252b5132 | 6443 | else |
9f0eb232 RS |
6444 | { |
6445 | value = fixP->fx_offset; | |
6446 | if (fixP->fx_pcrel) | |
6447 | value -= md_pcrel_from_section (fixP, seg); | |
6448 | } | |
a161fe53 AM |
6449 | #endif |
6450 | ||
6451 | if (fixP->fx_subsy != (symbolS *) NULL) | |
252b5132 | 6452 | { |
a161fe53 AM |
6453 | /* We can't actually support subtracting a symbol. */ |
6454 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
252b5132 | 6455 | } |
252b5132 | 6456 | |
5656a981 | 6457 | operand = NULL; |
3b8b57a9 | 6458 | if (fixP->fx_pcrel_adjust != 0) |
252b5132 | 6459 | { |
5656a981 | 6460 | /* This is a fixup on an instruction. */ |
3b8b57a9 | 6461 | int opindex = fixP->fx_pcrel_adjust & 0xff; |
252b5132 | 6462 | |
5656a981 | 6463 | operand = &powerpc_operands[opindex]; |
252b5132 | 6464 | #ifdef OBJ_XCOFF |
0baf16f2 AM |
6465 | /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol |
6466 | does not generate a reloc. It uses the offset of `sym' within its | |
6467 | csect. Other usages, such as `.long sym', generate relocs. This | |
6468 | is the documented behaviour of non-TOC symbols. */ | |
252b5132 | 6469 | if ((operand->flags & PPC_OPERAND_PARENS) != 0 |
b84bf58a | 6470 | && (operand->bitm & 0xfff0) == 0xfff0 |
252b5132 | 6471 | && operand->shift == 0 |
2b3c4602 | 6472 | && (operand->insert == NULL || ppc_obj64) |
94f592af NC |
6473 | && fixP->fx_addsy != NULL |
6474 | && symbol_get_tc (fixP->fx_addsy)->subseg != 0 | |
96d56e9f NC |
6475 | && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC |
6476 | && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0 | |
94f592af | 6477 | && S_GET_SEGMENT (fixP->fx_addsy) != bss_section) |
252b5132 | 6478 | { |
94f592af NC |
6479 | value = fixP->fx_offset; |
6480 | fixP->fx_done = 1; | |
252b5132 | 6481 | } |
ac21e7da TG |
6482 | |
6483 | /* During parsing of instructions, a TOC16 reloc is generated for | |
6484 | instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined | |
6485 | in the toc. But at parse time, SYM may be not yet defined, so | |
6486 | check again here. */ | |
6487 | if (fixP->fx_r_type == BFD_RELOC_16 | |
6488 | && fixP->fx_addsy != NULL | |
6489 | && ppc_is_toc_sym (fixP->fx_addsy)) | |
6490 | fixP->fx_r_type = BFD_RELOC_PPC_TOC16; | |
252b5132 | 6491 | #endif |
5656a981 AM |
6492 | } |
6493 | ||
6494 | /* Calculate value to be stored in field. */ | |
6495 | fieldval = value; | |
6496 | switch (fixP->fx_r_type) | |
6497 | { | |
1ec2d25e | 6498 | #ifdef OBJ_ELF |
5656a981 AM |
6499 | case BFD_RELOC_PPC64_ADDR16_LO_DS: |
6500 | case BFD_RELOC_PPC_VLE_LO16A: | |
6501 | case BFD_RELOC_PPC_VLE_LO16D: | |
1ec2d25e | 6502 | #endif |
5656a981 AM |
6503 | case BFD_RELOC_LO16: |
6504 | case BFD_RELOC_LO16_PCREL: | |
6505 | fieldval = value & 0xffff; | |
6506 | sign_extend_16: | |
6507 | if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) | |
f9c6b907 | 6508 | fieldval = SEX16 (fieldval); |
5656a981 AM |
6509 | fixP->fx_no_overflow = 1; |
6510 | break; | |
3c9d25f4 | 6511 | |
f9c6b907 AM |
6512 | case BFD_RELOC_HI16: |
6513 | case BFD_RELOC_HI16_PCREL: | |
5656a981 | 6514 | #ifdef OBJ_ELF |
f9c6b907 AM |
6515 | if (REPORT_OVERFLOW_HI && ppc_obj64) |
6516 | { | |
6517 | fieldval = value >> 16; | |
6518 | if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) | |
6519 | { | |
6520 | valueT sign = (((valueT) -1 >> 16) + 1) >> 1; | |
6521 | fieldval = ((valueT) fieldval ^ sign) - sign; | |
6522 | } | |
6523 | break; | |
6524 | } | |
6525 | /* Fall thru */ | |
6526 | ||
5656a981 AM |
6527 | case BFD_RELOC_PPC_VLE_HI16A: |
6528 | case BFD_RELOC_PPC_VLE_HI16D: | |
f9c6b907 | 6529 | case BFD_RELOC_PPC64_ADDR16_HIGH: |
5656a981 | 6530 | #endif |
5656a981 AM |
6531 | fieldval = PPC_HI (value); |
6532 | goto sign_extend_16; | |
0baf16f2 | 6533 | |
f9c6b907 AM |
6534 | case BFD_RELOC_HI16_S: |
6535 | case BFD_RELOC_HI16_S_PCREL: | |
5656a981 | 6536 | #ifdef OBJ_ELF |
f9c6b907 AM |
6537 | if (REPORT_OVERFLOW_HI && ppc_obj64) |
6538 | { | |
6539 | fieldval = (value + 0x8000) >> 16; | |
6540 | if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) | |
6541 | { | |
6542 | valueT sign = (((valueT) -1 >> 16) + 1) >> 1; | |
6543 | fieldval = ((valueT) fieldval ^ sign) - sign; | |
6544 | } | |
6545 | break; | |
6546 | } | |
6547 | /* Fall thru */ | |
6548 | ||
5656a981 AM |
6549 | case BFD_RELOC_PPC_VLE_HA16A: |
6550 | case BFD_RELOC_PPC_VLE_HA16D: | |
f9c6b907 | 6551 | case BFD_RELOC_PPC64_ADDR16_HIGHA: |
5656a981 | 6552 | #endif |
5656a981 AM |
6553 | fieldval = PPC_HA (value); |
6554 | goto sign_extend_16; | |
0baf16f2 | 6555 | |
3b8b57a9 | 6556 | #ifdef OBJ_ELF |
5656a981 AM |
6557 | case BFD_RELOC_PPC64_HIGHER: |
6558 | fieldval = PPC_HIGHER (value); | |
6559 | goto sign_extend_16; | |
252b5132 | 6560 | |
5656a981 AM |
6561 | case BFD_RELOC_PPC64_HIGHER_S: |
6562 | fieldval = PPC_HIGHERA (value); | |
6563 | goto sign_extend_16; | |
0baf16f2 | 6564 | |
5656a981 AM |
6565 | case BFD_RELOC_PPC64_HIGHEST: |
6566 | fieldval = PPC_HIGHEST (value); | |
6567 | goto sign_extend_16; | |
0baf16f2 | 6568 | |
5656a981 AM |
6569 | case BFD_RELOC_PPC64_HIGHEST_S: |
6570 | fieldval = PPC_HIGHESTA (value); | |
6571 | goto sign_extend_16; | |
6572 | #endif | |
6573 | ||
6574 | default: | |
6575 | break; | |
6576 | } | |
6577 | ||
6578 | if (operand != NULL) | |
6579 | { | |
6580 | /* Handle relocs in an insn. */ | |
6581 | char *where; | |
6582 | unsigned long insn; | |
0baf16f2 | 6583 | |
5656a981 AM |
6584 | switch (fixP->fx_r_type) |
6585 | { | |
7fa9fcb6 | 6586 | #ifdef OBJ_ELF |
3b8b57a9 AM |
6587 | /* The following relocs can't be calculated by the assembler. |
6588 | Leave the field zero. */ | |
cdba85ec AM |
6589 | case BFD_RELOC_PPC_TPREL16: |
6590 | case BFD_RELOC_PPC_TPREL16_LO: | |
6591 | case BFD_RELOC_PPC_TPREL16_HI: | |
6592 | case BFD_RELOC_PPC_TPREL16_HA: | |
cdba85ec AM |
6593 | case BFD_RELOC_PPC_DTPREL16: |
6594 | case BFD_RELOC_PPC_DTPREL16_LO: | |
6595 | case BFD_RELOC_PPC_DTPREL16_HI: | |
6596 | case BFD_RELOC_PPC_DTPREL16_HA: | |
cdba85ec AM |
6597 | case BFD_RELOC_PPC_GOT_TLSGD16: |
6598 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
6599 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
6600 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
6601 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
6602 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
6603 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
6604 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
6605 | case BFD_RELOC_PPC_GOT_TPREL16: | |
6606 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
6607 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
6608 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
6609 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
6610 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
6611 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
6612 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
6613 | case BFD_RELOC_PPC64_TPREL16_DS: | |
6614 | case BFD_RELOC_PPC64_TPREL16_LO_DS: | |
f9c6b907 AM |
6615 | case BFD_RELOC_PPC64_TPREL16_HIGH: |
6616 | case BFD_RELOC_PPC64_TPREL16_HIGHA: | |
cdba85ec AM |
6617 | case BFD_RELOC_PPC64_TPREL16_HIGHER: |
6618 | case BFD_RELOC_PPC64_TPREL16_HIGHERA: | |
6619 | case BFD_RELOC_PPC64_TPREL16_HIGHEST: | |
6620 | case BFD_RELOC_PPC64_TPREL16_HIGHESTA: | |
f9c6b907 AM |
6621 | case BFD_RELOC_PPC64_DTPREL16_HIGH: |
6622 | case BFD_RELOC_PPC64_DTPREL16_HIGHA: | |
cdba85ec AM |
6623 | case BFD_RELOC_PPC64_DTPREL16_DS: |
6624 | case BFD_RELOC_PPC64_DTPREL16_LO_DS: | |
6625 | case BFD_RELOC_PPC64_DTPREL16_HIGHER: | |
6626 | case BFD_RELOC_PPC64_DTPREL16_HIGHERA: | |
6627 | case BFD_RELOC_PPC64_DTPREL16_HIGHEST: | |
6628 | case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: | |
3b8b57a9 | 6629 | gas_assert (fixP->fx_addsy != NULL); |
7c1d0959 | 6630 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
3b8b57a9 | 6631 | fieldval = 0; |
cdba85ec | 6632 | break; |
3b8b57a9 AM |
6633 | |
6634 | /* These also should leave the field zero for the same | |
6635 | reason. Note that older versions of gas wrote values | |
6636 | here. If we want to go back to the old behaviour, then | |
6637 | all _LO and _LO_DS cases will need to be treated like | |
6638 | BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */ | |
6639 | case BFD_RELOC_16_GOTOFF: | |
6640 | case BFD_RELOC_LO16_GOTOFF: | |
6641 | case BFD_RELOC_HI16_GOTOFF: | |
6642 | case BFD_RELOC_HI16_S_GOTOFF: | |
6643 | case BFD_RELOC_LO16_PLTOFF: | |
6644 | case BFD_RELOC_HI16_PLTOFF: | |
6645 | case BFD_RELOC_HI16_S_PLTOFF: | |
6646 | case BFD_RELOC_GPREL16: | |
6647 | case BFD_RELOC_16_BASEREL: | |
6648 | case BFD_RELOC_LO16_BASEREL: | |
6649 | case BFD_RELOC_HI16_BASEREL: | |
6650 | case BFD_RELOC_HI16_S_BASEREL: | |
6651 | case BFD_RELOC_PPC_TOC16: | |
6652 | case BFD_RELOC_PPC64_TOC16_LO: | |
6653 | case BFD_RELOC_PPC64_TOC16_HI: | |
6654 | case BFD_RELOC_PPC64_TOC16_HA: | |
6655 | case BFD_RELOC_PPC64_PLTGOT16: | |
6656 | case BFD_RELOC_PPC64_PLTGOT16_LO: | |
6657 | case BFD_RELOC_PPC64_PLTGOT16_HI: | |
6658 | case BFD_RELOC_PPC64_PLTGOT16_HA: | |
6659 | case BFD_RELOC_PPC64_GOT16_DS: | |
6660 | case BFD_RELOC_PPC64_GOT16_LO_DS: | |
6661 | case BFD_RELOC_PPC64_PLT16_LO_DS: | |
6662 | case BFD_RELOC_PPC64_SECTOFF_DS: | |
6663 | case BFD_RELOC_PPC64_SECTOFF_LO_DS: | |
6664 | case BFD_RELOC_PPC64_TOC16_DS: | |
6665 | case BFD_RELOC_PPC64_TOC16_LO_DS: | |
6666 | case BFD_RELOC_PPC64_PLTGOT16_DS: | |
6667 | case BFD_RELOC_PPC64_PLTGOT16_LO_DS: | |
6668 | case BFD_RELOC_PPC_EMB_NADDR16: | |
6669 | case BFD_RELOC_PPC_EMB_NADDR16_LO: | |
6670 | case BFD_RELOC_PPC_EMB_NADDR16_HI: | |
6671 | case BFD_RELOC_PPC_EMB_NADDR16_HA: | |
6672 | case BFD_RELOC_PPC_EMB_SDAI16: | |
6673 | case BFD_RELOC_PPC_EMB_SDA2I16: | |
6674 | case BFD_RELOC_PPC_EMB_SDA2REL: | |
252b5132 | 6675 | case BFD_RELOC_PPC_EMB_SDA21: |
3b8b57a9 AM |
6676 | case BFD_RELOC_PPC_EMB_MRKREF: |
6677 | case BFD_RELOC_PPC_EMB_RELSEC16: | |
6678 | case BFD_RELOC_PPC_EMB_RELST_LO: | |
6679 | case BFD_RELOC_PPC_EMB_RELST_HI: | |
6680 | case BFD_RELOC_PPC_EMB_RELST_HA: | |
6681 | case BFD_RELOC_PPC_EMB_BIT_FLD: | |
6682 | case BFD_RELOC_PPC_EMB_RELSDA: | |
6683 | case BFD_RELOC_PPC_VLE_SDA21: | |
6684 | case BFD_RELOC_PPC_VLE_SDA21_LO: | |
6685 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
6686 | case BFD_RELOC_PPC_VLE_SDAREL_LO16D: | |
6687 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
6688 | case BFD_RELOC_PPC_VLE_SDAREL_HI16D: | |
6689 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
6690 | case BFD_RELOC_PPC_VLE_SDAREL_HA16D: | |
6691 | gas_assert (fixP->fx_addsy != NULL); | |
6692 | /* Fall thru */ | |
6693 | ||
6694 | case BFD_RELOC_PPC_TLS: | |
6695 | case BFD_RELOC_PPC_TLSGD: | |
6696 | case BFD_RELOC_PPC_TLSLD: | |
6697 | fieldval = 0; | |
3b8b57a9 | 6698 | break; |
7fa9fcb6 TG |
6699 | #endif |
6700 | ||
6701 | #ifdef OBJ_XCOFF | |
6702 | case BFD_RELOC_PPC_B16: | |
6703 | /* Adjust the offset to the instruction boundary. */ | |
6704 | fieldval += 2; | |
6705 | break; | |
6706 | #endif | |
252b5132 | 6707 | |
3b8b57a9 | 6708 | default: |
252b5132 | 6709 | break; |
3b8b57a9 | 6710 | } |
252b5132 | 6711 | |
3b8b57a9 AM |
6712 | #ifdef OBJ_ELF |
6713 | /* powerpc uses RELA style relocs, so if emitting a reloc the field | |
6714 | contents can stay at zero. */ | |
6715 | #define APPLY_RELOC fixP->fx_done | |
6716 | #else | |
6717 | #define APPLY_RELOC 1 | |
6718 | #endif | |
6719 | if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL) | |
6720 | { | |
6721 | /* Fetch the instruction, insert the fully resolved operand | |
6722 | value, and stuff the instruction back again. */ | |
6723 | where = fixP->fx_frag->fr_literal + fixP->fx_where; | |
6724 | if (target_big_endian) | |
31a91399 | 6725 | { |
3b8b57a9 AM |
6726 | if (fixP->fx_size == 4) |
6727 | insn = bfd_getb32 ((unsigned char *) where); | |
31a91399 | 6728 | else |
3b8b57a9 | 6729 | insn = bfd_getb16 ((unsigned char *) where); |
31a91399 NC |
6730 | } |
6731 | else | |
3b8b57a9 AM |
6732 | { |
6733 | if (fixP->fx_size == 4) | |
6734 | insn = bfd_getl32 ((unsigned char *) where); | |
6735 | else | |
6736 | insn = bfd_getl16 ((unsigned char *) where); | |
6737 | } | |
6738 | insn = ppc_insert_operand (insn, operand, fieldval, | |
6739 | fixP->tc_fix_data.ppc_cpu, | |
6740 | fixP->fx_file, fixP->fx_line); | |
6741 | if (target_big_endian) | |
6742 | { | |
6743 | if (fixP->fx_size == 4) | |
6744 | bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); | |
6745 | else | |
6746 | bfd_putb16 ((bfd_vma) insn, (unsigned char *) where); | |
6747 | } | |
6748 | else | |
6749 | { | |
6750 | if (fixP->fx_size == 4) | |
6751 | bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); | |
6752 | else | |
6753 | bfd_putl16 ((bfd_vma) insn, (unsigned char *) where); | |
6754 | } | |
6755 | } | |
6756 | ||
6757 | if (fixP->fx_done) | |
6758 | /* Nothing else to do here. */ | |
6759 | return; | |
6760 | ||
6761 | gas_assert (fixP->fx_addsy != NULL); | |
62ebcb5c | 6762 | if (fixP->fx_r_type == BFD_RELOC_NONE) |
3b8b57a9 AM |
6763 | { |
6764 | char *sfile; | |
6765 | unsigned int sline; | |
6766 | ||
6767 | /* Use expr_symbol_where to see if this is an expression | |
6768 | symbol. */ | |
6769 | if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) | |
6770 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6771 | _("unresolved expression that must be resolved")); | |
6772 | else | |
6773 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6774 | _("unsupported relocation against %s"), | |
6775 | S_GET_NAME (fixP->fx_addsy)); | |
6776 | fixP->fx_done = 1; | |
6777 | return; | |
6778 | } | |
6779 | } | |
6780 | else | |
6781 | { | |
6782 | /* Handle relocs in data. */ | |
6783 | switch (fixP->fx_r_type) | |
6784 | { | |
252b5132 | 6785 | case BFD_RELOC_VTABLE_INHERIT: |
94f592af NC |
6786 | if (fixP->fx_addsy |
6787 | && !S_IS_DEFINED (fixP->fx_addsy) | |
6788 | && !S_IS_WEAK (fixP->fx_addsy)) | |
6789 | S_SET_WEAK (fixP->fx_addsy); | |
3b8b57a9 | 6790 | /* Fall thru */ |
252b5132 RH |
6791 | |
6792 | case BFD_RELOC_VTABLE_ENTRY: | |
94f592af | 6793 | fixP->fx_done = 0; |
252b5132 RH |
6794 | break; |
6795 | ||
0baf16f2 | 6796 | #ifdef OBJ_ELF |
3b8b57a9 AM |
6797 | /* These can appear with @l etc. in data. */ |
6798 | case BFD_RELOC_LO16: | |
3b8b57a9 | 6799 | case BFD_RELOC_LO16_PCREL: |
3b8b57a9 | 6800 | case BFD_RELOC_HI16: |
3b8b57a9 | 6801 | case BFD_RELOC_HI16_PCREL: |
3b8b57a9 | 6802 | case BFD_RELOC_HI16_S: |
3b8b57a9 | 6803 | case BFD_RELOC_HI16_S_PCREL: |
3b8b57a9 | 6804 | case BFD_RELOC_PPC64_HIGHER: |
3b8b57a9 | 6805 | case BFD_RELOC_PPC64_HIGHER_S: |
3b8b57a9 | 6806 | case BFD_RELOC_PPC64_HIGHEST: |
3b8b57a9 | 6807 | case BFD_RELOC_PPC64_HIGHEST_S: |
f9c6b907 AM |
6808 | case BFD_RELOC_PPC64_ADDR16_HIGH: |
6809 | case BFD_RELOC_PPC64_ADDR16_HIGHA: | |
45965137 | 6810 | case BFD_RELOC_PPC64_ADDR64_LOCAL: |
3b8b57a9 AM |
6811 | break; |
6812 | ||
6813 | case BFD_RELOC_PPC_DTPMOD: | |
6814 | case BFD_RELOC_PPC_TPREL: | |
6815 | case BFD_RELOC_PPC_DTPREL: | |
6816 | S_SET_THREAD_LOCAL (fixP->fx_addsy); | |
6817 | break; | |
6818 | ||
6819 | /* Just punt all of these to the linker. */ | |
6820 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
6821 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6822 | case BFD_RELOC_16_GOTOFF: | |
6823 | case BFD_RELOC_LO16_GOTOFF: | |
6824 | case BFD_RELOC_HI16_GOTOFF: | |
6825 | case BFD_RELOC_HI16_S_GOTOFF: | |
6826 | case BFD_RELOC_LO16_PLTOFF: | |
6827 | case BFD_RELOC_HI16_PLTOFF: | |
6828 | case BFD_RELOC_HI16_S_PLTOFF: | |
6829 | case BFD_RELOC_PPC_COPY: | |
6830 | case BFD_RELOC_PPC_GLOB_DAT: | |
6831 | case BFD_RELOC_16_BASEREL: | |
6832 | case BFD_RELOC_LO16_BASEREL: | |
6833 | case BFD_RELOC_HI16_BASEREL: | |
6834 | case BFD_RELOC_HI16_S_BASEREL: | |
6835 | case BFD_RELOC_PPC_TLS: | |
6836 | case BFD_RELOC_PPC_DTPREL16_LO: | |
6837 | case BFD_RELOC_PPC_DTPREL16_HI: | |
6838 | case BFD_RELOC_PPC_DTPREL16_HA: | |
6839 | case BFD_RELOC_PPC_TPREL16_LO: | |
6840 | case BFD_RELOC_PPC_TPREL16_HI: | |
6841 | case BFD_RELOC_PPC_TPREL16_HA: | |
6842 | case BFD_RELOC_PPC_GOT_TLSGD16: | |
6843 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
6844 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
6845 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
6846 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
6847 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
6848 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
6849 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
6850 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
6851 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
6852 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
6853 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
6854 | case BFD_RELOC_PPC_GOT_TPREL16: | |
6855 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
6856 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
6857 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
6858 | case BFD_RELOC_24_PLT_PCREL: | |
6859 | case BFD_RELOC_PPC_LOCAL24PC: | |
6860 | case BFD_RELOC_32_PLT_PCREL: | |
6861 | case BFD_RELOC_GPREL16: | |
6862 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
6863 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
6864 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
6865 | case BFD_RELOC_PPC_EMB_NADDR32: | |
6866 | case BFD_RELOC_PPC_EMB_NADDR16: | |
6867 | case BFD_RELOC_PPC_EMB_NADDR16_LO: | |
6868 | case BFD_RELOC_PPC_EMB_NADDR16_HI: | |
6869 | case BFD_RELOC_PPC_EMB_NADDR16_HA: | |
6870 | case BFD_RELOC_PPC_EMB_SDAI16: | |
6871 | case BFD_RELOC_PPC_EMB_SDA2REL: | |
6872 | case BFD_RELOC_PPC_EMB_SDA2I16: | |
6873 | case BFD_RELOC_PPC_EMB_SDA21: | |
6874 | case BFD_RELOC_PPC_VLE_SDA21_LO: | |
6875 | case BFD_RELOC_PPC_EMB_MRKREF: | |
6876 | case BFD_RELOC_PPC_EMB_RELSEC16: | |
6877 | case BFD_RELOC_PPC_EMB_RELST_LO: | |
6878 | case BFD_RELOC_PPC_EMB_RELST_HI: | |
6879 | case BFD_RELOC_PPC_EMB_RELST_HA: | |
6880 | case BFD_RELOC_PPC_EMB_BIT_FLD: | |
6881 | case BFD_RELOC_PPC_EMB_RELSDA: | |
0baf16f2 | 6882 | case BFD_RELOC_PPC64_TOC: |
3b8b57a9 AM |
6883 | case BFD_RELOC_PPC_TOC16: |
6884 | case BFD_RELOC_PPC64_TOC16_LO: | |
6885 | case BFD_RELOC_PPC64_TOC16_HI: | |
6886 | case BFD_RELOC_PPC64_TOC16_HA: | |
f9c6b907 AM |
6887 | case BFD_RELOC_PPC64_DTPREL16_HIGH: |
6888 | case BFD_RELOC_PPC64_DTPREL16_HIGHA: | |
3b8b57a9 AM |
6889 | case BFD_RELOC_PPC64_DTPREL16_HIGHER: |
6890 | case BFD_RELOC_PPC64_DTPREL16_HIGHERA: | |
6891 | case BFD_RELOC_PPC64_DTPREL16_HIGHEST: | |
6892 | case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: | |
f9c6b907 AM |
6893 | case BFD_RELOC_PPC64_TPREL16_HIGH: |
6894 | case BFD_RELOC_PPC64_TPREL16_HIGHA: | |
3b8b57a9 AM |
6895 | case BFD_RELOC_PPC64_TPREL16_HIGHER: |
6896 | case BFD_RELOC_PPC64_TPREL16_HIGHERA: | |
6897 | case BFD_RELOC_PPC64_TPREL16_HIGHEST: | |
6898 | case BFD_RELOC_PPC64_TPREL16_HIGHESTA: | |
94f592af | 6899 | fixP->fx_done = 0; |
0baf16f2 | 6900 | break; |
0baf16f2 | 6901 | #endif |
3b8b57a9 AM |
6902 | |
6903 | #ifdef OBJ_XCOFF | |
6904 | case BFD_RELOC_NONE: | |
3b8b57a9 | 6905 | #endif |
5656a981 AM |
6906 | case BFD_RELOC_CTOR: |
6907 | case BFD_RELOC_32: | |
6908 | case BFD_RELOC_32_PCREL: | |
6909 | case BFD_RELOC_RVA: | |
6910 | case BFD_RELOC_64: | |
6911 | case BFD_RELOC_64_PCREL: | |
6912 | case BFD_RELOC_16: | |
6913 | case BFD_RELOC_16_PCREL: | |
6914 | case BFD_RELOC_8: | |
6915 | break; | |
3b8b57a9 | 6916 | |
252b5132 | 6917 | default: |
bc805888 | 6918 | fprintf (stderr, |
94f592af | 6919 | _("Gas failure, reloc value %d\n"), fixP->fx_r_type); |
99a814a1 | 6920 | fflush (stderr); |
252b5132 RH |
6921 | abort (); |
6922 | } | |
46b596ff | 6923 | |
5656a981 | 6924 | if (fixP->fx_size && APPLY_RELOC) |
46b596ff | 6925 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
5656a981 AM |
6926 | fieldval, fixP->fx_size); |
6927 | } | |
6928 | ||
6929 | /* We are only able to convert some relocs to pc-relative. */ | |
6930 | if (!fixP->fx_done && fixP->fx_pcrel) | |
6931 | { | |
6932 | switch (fixP->fx_r_type) | |
6933 | { | |
6934 | case BFD_RELOC_LO16: | |
6935 | fixP->fx_r_type = BFD_RELOC_LO16_PCREL; | |
6936 | break; | |
6937 | ||
6938 | case BFD_RELOC_HI16: | |
6939 | fixP->fx_r_type = BFD_RELOC_HI16_PCREL; | |
6940 | break; | |
6941 | ||
6942 | case BFD_RELOC_HI16_S: | |
6943 | fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL; | |
6944 | break; | |
6945 | ||
6946 | case BFD_RELOC_64: | |
6947 | fixP->fx_r_type = BFD_RELOC_64_PCREL; | |
6948 | break; | |
6949 | ||
6950 | case BFD_RELOC_32: | |
6951 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
6952 | break; | |
6953 | ||
6954 | case BFD_RELOC_16: | |
6955 | fixP->fx_r_type = BFD_RELOC_16_PCREL; | |
6956 | break; | |
6957 | ||
6958 | /* Some of course are already pc-relative. */ | |
6959 | case BFD_RELOC_LO16_PCREL: | |
6960 | case BFD_RELOC_HI16_PCREL: | |
6961 | case BFD_RELOC_HI16_S_PCREL: | |
6962 | case BFD_RELOC_64_PCREL: | |
6963 | case BFD_RELOC_32_PCREL: | |
6964 | case BFD_RELOC_16_PCREL: | |
6965 | case BFD_RELOC_PPC_B16: | |
6966 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
6967 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6968 | case BFD_RELOC_PPC_B26: | |
6969 | case BFD_RELOC_PPC_LOCAL24PC: | |
6970 | case BFD_RELOC_24_PLT_PCREL: | |
6971 | case BFD_RELOC_32_PLT_PCREL: | |
6972 | case BFD_RELOC_64_PLT_PCREL: | |
6973 | case BFD_RELOC_PPC_VLE_REL8: | |
6974 | case BFD_RELOC_PPC_VLE_REL15: | |
6975 | case BFD_RELOC_PPC_VLE_REL24: | |
6976 | break; | |
6977 | ||
6978 | default: | |
6979 | if (fixP->fx_addsy) | |
6980 | { | |
6981 | char *sfile; | |
6982 | unsigned int sline; | |
6983 | ||
6984 | /* Use expr_symbol_where to see if this is an | |
6985 | expression symbol. */ | |
6986 | if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) | |
6987 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6988 | _("unresolved expression that must" | |
6989 | " be resolved")); | |
6990 | else | |
6991 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6992 | _("cannot emit PC relative %s relocation" | |
6993 | " against %s"), | |
6994 | bfd_get_reloc_code_name (fixP->fx_r_type), | |
6995 | S_GET_NAME (fixP->fx_addsy)); | |
6996 | } | |
6997 | else | |
6998 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6999 | _("unable to resolve expression")); | |
7000 | fixP->fx_done = 1; | |
7001 | break; | |
7002 | } | |
252b5132 RH |
7003 | } |
7004 | ||
7005 | #ifdef OBJ_ELF | |
3b8b57a9 | 7006 | ppc_elf_validate_fix (fixP, seg); |
94f592af | 7007 | fixP->fx_addnumber = value; |
4e6935a6 AM |
7008 | |
7009 | /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately | |
7010 | from the section contents. If we are going to be emitting a reloc | |
7011 | then the section contents are immaterial, so don't warn if they | |
7012 | happen to overflow. Leave such warnings to ld. */ | |
7013 | if (!fixP->fx_done) | |
a38a07e0 AM |
7014 | { |
7015 | fixP->fx_no_overflow = 1; | |
7016 | ||
7017 | /* Arrange to emit .TOC. as a normal symbol if used in anything | |
7018 | but .TOC.@tocbase. */ | |
7019 | if (ppc_obj64 | |
7020 | && fixP->fx_r_type != BFD_RELOC_PPC64_TOC | |
7021 | && fixP->fx_addsy != NULL | |
7022 | && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0) | |
7023 | symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP; | |
7024 | } | |
252b5132 | 7025 | #else |
94f592af NC |
7026 | if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16) |
7027 | fixP->fx_addnumber = 0; | |
252b5132 RH |
7028 | else |
7029 | { | |
7030 | #ifdef TE_PE | |
94f592af | 7031 | fixP->fx_addnumber = 0; |
252b5132 | 7032 | #else |
8edcbfcd TG |
7033 | /* We want to use the offset within the toc, not the actual VMA |
7034 | of the symbol. */ | |
94f592af | 7035 | fixP->fx_addnumber = |
8edcbfcd TG |
7036 | - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy)) |
7037 | - S_GET_VALUE (ppc_toc_csect); | |
ac21e7da TG |
7038 | /* Set *valP to avoid errors. */ |
7039 | *valP = value; | |
252b5132 RH |
7040 | #endif |
7041 | } | |
7042 | #endif | |
252b5132 RH |
7043 | } |
7044 | ||
7045 | /* Generate a reloc for a fixup. */ | |
7046 | ||
7047 | arelent * | |
98027b10 | 7048 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 RH |
7049 | { |
7050 | arelent *reloc; | |
7051 | ||
7052 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
7053 | ||
49309057 ILT |
7054 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
7055 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
7056 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; |
7057 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
7058 | if (reloc->howto == (reloc_howto_type *) NULL) | |
7059 | { | |
7060 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
99a814a1 AM |
7061 | _("reloc %d not supported by object file format"), |
7062 | (int) fixp->fx_r_type); | |
252b5132 RH |
7063 | return NULL; |
7064 | } | |
7065 | reloc->addend = fixp->fx_addnumber; | |
7066 | ||
7067 | return reloc; | |
7068 | } | |
75e21f08 JJ |
7069 | |
7070 | void | |
98027b10 | 7071 | ppc_cfi_frame_initial_instructions (void) |
75e21f08 JJ |
7072 | { |
7073 | cfi_add_CFA_def_cfa (1, 0); | |
7074 | } | |
7075 | ||
7076 | int | |
1df69f4f | 7077 | tc_ppc_regname_to_dw2regnum (char *regname) |
75e21f08 JJ |
7078 | { |
7079 | unsigned int regnum = -1; | |
7080 | unsigned int i; | |
7081 | const char *p; | |
7082 | char *q; | |
7083 | static struct { char *name; int dw2regnum; } regnames[] = | |
7084 | { | |
7085 | { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 }, | |
7086 | { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 }, | |
80f846b6 | 7087 | { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 }, |
75e21f08 JJ |
7088 | { "spe_acc", 111 }, { "spefscr", 112 } |
7089 | }; | |
7090 | ||
7091 | for (i = 0; i < ARRAY_SIZE (regnames); ++i) | |
7092 | if (strcmp (regnames[i].name, regname) == 0) | |
7093 | return regnames[i].dw2regnum; | |
7094 | ||
7095 | if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v') | |
7096 | { | |
7097 | p = regname + 1 + (regname[1] == '.'); | |
7098 | regnum = strtoul (p, &q, 10); | |
7099 | if (p == q || *q || regnum >= 32) | |
7100 | return -1; | |
7101 | if (regname[0] == 'f') | |
b7d7dc63 | 7102 | regnum += 32; |
75e21f08 | 7103 | else if (regname[0] == 'v') |
b7d7dc63 | 7104 | regnum += 77; |
75e21f08 JJ |
7105 | } |
7106 | else if (regname[0] == 'c' && regname[1] == 'r') | |
7107 | { | |
7108 | p = regname + 2 + (regname[2] == '.'); | |
7109 | if (p[0] < '0' || p[0] > '7' || p[1]) | |
b7d7dc63 | 7110 | return -1; |
75e21f08 JJ |
7111 | regnum = p[0] - '0' + 68; |
7112 | } | |
7113 | return regnum; | |
7114 | } |