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Regeneration accidentally omitted from previous delta
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63
AM		 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
81d4177b 21 02111-1307, USA. */
252b5132
RH		 22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 53#endif
54#endif
55
0baf16f2
AM		 56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM		 99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH		 101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
931e13a6 114static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH		 115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
5ce8663f 185
b7d7dc63 186/* '+' and '-' can be used as postfix predicate predictors for conditional
5ce8663f
NC		 187 branches. So they need to be accepted as symbol characters. */
188const char ppc_symbol_chars[] = "+-";
75e21f08
JJ		 189
190/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
191int ppc_cie_data_alignment;
252b5132
RH		 192\f
193/* The target specific pseudo-ops which we support. */
194
195const pseudo_typeS md_pseudo_table[] =
196{
197 /* Pseudo-ops which must be overridden. */
198 { "byte", ppc_byte, 0 },
199
200#ifdef OBJ_XCOFF
201 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
202 legitimately belong in the obj-*.c file. However, XCOFF is based
203 on COFF, and is only implemented for the RS/6000. We just use
204 obj-coff.c, and add what we need here. */
205 { "comm", ppc_comm, 0 },
206 { "lcomm", ppc_comm, 1 },
207 { "bb", ppc_bb, 0 },
208 { "bc", ppc_bc, 0 },
209 { "bf", ppc_bf, 0 },
210 { "bi", ppc_biei, 0 },
211 { "bs", ppc_bs, 0 },
212 { "csect", ppc_csect, 0 },
213 { "data", ppc_section, 'd' },
214 { "eb", ppc_eb, 0 },
215 { "ec", ppc_ec, 0 },
216 { "ef", ppc_ef, 0 },
217 { "ei", ppc_biei, 1 },
218 { "es", ppc_es, 0 },
219 { "extern", ppc_extern, 0 },
220 { "function", ppc_function, 0 },
221 { "lglobl", ppc_lglobl, 0 },
222 { "rename", ppc_rename, 0 },
223 { "section", ppc_named_section, 0 },
224 { "stabx", ppc_stabx, 0 },
225 { "text", ppc_section, 't' },
226 { "toc", ppc_toc, 0 },
227 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 228 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 229 { "word", ppc_xcoff_cons, 1 },
230 { "short", ppc_xcoff_cons, 1 },
231 { "vbyte", ppc_vbyte, 0 },
232#endif
233
234#ifdef OBJ_ELF
0baf16f2
AM		 235 { "llong", ppc_elf_cons, 8 },
236 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 237 { "long", ppc_elf_cons, 4 },
238 { "word", ppc_elf_cons, 2 },
239 { "short", ppc_elf_cons, 2 },
240 { "rdata", ppc_elf_rdata, 0 },
241 { "rodata", ppc_elf_rdata, 0 },
242 { "lcomm", ppc_elf_lcomm, 0 },
243#endif
244
245#ifdef TE_PE
99a814a1 246 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 247 { "previous", ppc_previous, 0 },
248 { "pdata", ppc_pdata, 0 },
249 { "ydata", ppc_ydata, 0 },
250 { "reldata", ppc_reldata, 0 },
251 { "rdata", ppc_rdata, 0 },
252 { "ualong", ppc_ualong, 0 },
253 { "znop", ppc_znop, 0 },
254 { "comm", ppc_pe_comm, 0 },
255 { "lcomm", ppc_pe_comm, 1 },
256 { "section", ppc_pe_section, 0 },
257 { "function", ppc_pe_function,0 },
258 { "tocd", ppc_pe_tocd, 0 },
259#endif
260
0baf16f2 261#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 262 { "tc", ppc_tc, 0 },
0baf16f2
AM		 263 { "machine", ppc_machine, 0 },
264#endif
252b5132
RH		 265
266 { NULL, NULL, 0 }
267};
268
269\f
99a814a1
AM		 270/* Predefined register names if -mregnames (or default for Windows NT).
271 In general, there are lots of them, in an attempt to be compatible
272 with a number of other Windows NT assemblers. */
252b5132
RH		 273
274/* Structure to hold information about predefined registers. */
275struct pd_reg
276 {
277 char *name;
278 int value;
279 };
280
281/* List of registers that are pre-defined:
282
283 Each general register has predefined names of the form:
284 1. r<reg_num> which has the value <reg_num>.
285 2. r.<reg_num> which has the value <reg_num>.
286
252b5132
RH		 287 Each floating point register has predefined names of the form:
288 1. f<reg_num> which has the value <reg_num>.
289 2. f.<reg_num> which has the value <reg_num>.
290
7a899fff
C		 291 Each vector unit register has predefined names of the form:
292 1. v<reg_num> which has the value <reg_num>.
293 2. v.<reg_num> which has the value <reg_num>.
294
252b5132
RH		 295 Each condition register has predefined names of the form:
296 1. cr<reg_num> which has the value <reg_num>.
297 2. cr.<reg_num> which has the value <reg_num>.
298
299 There are individual registers as well:
300 sp or r.sp has the value 1
301 rtoc or r.toc has the value 2
302 fpscr has the value 0
303 xer has the value 1
304 lr has the value 8
305 ctr has the value 9
306 pmr has the value 0
307 dar has the value 19
308 dsisr has the value 18
309 dec has the value 22
310 sdr1 has the value 25
311 srr0 has the value 26
312 srr1 has the value 27
313
81d4177b 314 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 315
316static const struct pd_reg pre_defined_registers[] =
317{
318 { "cr.0", 0 }, /* Condition Registers */
319 { "cr.1", 1 },
320 { "cr.2", 2 },
321 { "cr.3", 3 },
322 { "cr.4", 4 },
323 { "cr.5", 5 },
324 { "cr.6", 6 },
325 { "cr.7", 7 },
326
327 { "cr0", 0 },
328 { "cr1", 1 },
329 { "cr2", 2 },
330 { "cr3", 3 },
331 { "cr4", 4 },
332 { "cr5", 5 },
333 { "cr6", 6 },
334 { "cr7", 7 },
335
336 { "ctr", 9 },
337
338 { "dar", 19 }, /* Data Access Register */
339 { "dec", 22 }, /* Decrementer */
340 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
341
342 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 343 { "f.1", 1 },
344 { "f.10", 10 },
345 { "f.11", 11 },
346 { "f.12", 12 },
347 { "f.13", 13 },
348 { "f.14", 14 },
349 { "f.15", 15 },
350 { "f.16", 16 },
351 { "f.17", 17 },
352 { "f.18", 18 },
353 { "f.19", 19 },
354 { "f.2", 2 },
355 { "f.20", 20 },
356 { "f.21", 21 },
357 { "f.22", 22 },
358 { "f.23", 23 },
359 { "f.24", 24 },
360 { "f.25", 25 },
361 { "f.26", 26 },
362 { "f.27", 27 },
363 { "f.28", 28 },
364 { "f.29", 29 },
365 { "f.3", 3 },
252b5132
RH		 366 { "f.30", 30 },
367 { "f.31", 31 },
81d4177b
KH		 368 { "f.4", 4 },
369 { "f.5", 5 },
370 { "f.6", 6 },
371 { "f.7", 7 },
372 { "f.8", 8 },
373 { "f.9", 9 },
374
375 { "f0", 0 },
376 { "f1", 1 },
377 { "f10", 10 },
378 { "f11", 11 },
379 { "f12", 12 },
380 { "f13", 13 },
381 { "f14", 14 },
382 { "f15", 15 },
383 { "f16", 16 },
384 { "f17", 17 },
385 { "f18", 18 },
386 { "f19", 19 },
387 { "f2", 2 },
388 { "f20", 20 },
389 { "f21", 21 },
390 { "f22", 22 },
391 { "f23", 23 },
392 { "f24", 24 },
393 { "f25", 25 },
394 { "f26", 26 },
395 { "f27", 27 },
396 { "f28", 28 },
397 { "f29", 29 },
398 { "f3", 3 },
252b5132
RH		 399 { "f30", 30 },
400 { "f31", 31 },
81d4177b
KH		 401 { "f4", 4 },
402 { "f5", 5 },
403 { "f6", 6 },
404 { "f7", 7 },
405 { "f8", 8 },
406 { "f9", 9 },
252b5132
RH		 407
408 { "fpscr", 0 },
409
410 { "lr", 8 }, /* Link Register */
411
412 { "pmr", 0 },
413
414 { "r.0", 0 }, /* General Purpose Registers */
415 { "r.1", 1 },
416 { "r.10", 10 },
417 { "r.11", 11 },
418 { "r.12", 12 },
419 { "r.13", 13 },
420 { "r.14", 14 },
421 { "r.15", 15 },
422 { "r.16", 16 },
423 { "r.17", 17 },
424 { "r.18", 18 },
425 { "r.19", 19 },
426 { "r.2", 2 },
427 { "r.20", 20 },
428 { "r.21", 21 },
429 { "r.22", 22 },
430 { "r.23", 23 },
431 { "r.24", 24 },
432 { "r.25", 25 },
433 { "r.26", 26 },
434 { "r.27", 27 },
435 { "r.28", 28 },
436 { "r.29", 29 },
437 { "r.3", 3 },
438 { "r.30", 30 },
439 { "r.31", 31 },
440 { "r.4", 4 },
441 { "r.5", 5 },
442 { "r.6", 6 },
443 { "r.7", 7 },
444 { "r.8", 8 },
445 { "r.9", 9 },
446
447 { "r.sp", 1 }, /* Stack Pointer */
448
449 { "r.toc", 2 }, /* Pointer to the table of contents */
450
451 { "r0", 0 }, /* More general purpose registers */
452 { "r1", 1 },
453 { "r10", 10 },
454 { "r11", 11 },
455 { "r12", 12 },
456 { "r13", 13 },
457 { "r14", 14 },
458 { "r15", 15 },
459 { "r16", 16 },
460 { "r17", 17 },
461 { "r18", 18 },
462 { "r19", 19 },
463 { "r2", 2 },
464 { "r20", 20 },
465 { "r21", 21 },
466 { "r22", 22 },
467 { "r23", 23 },
468 { "r24", 24 },
469 { "r25", 25 },
470 { "r26", 26 },
471 { "r27", 27 },
472 { "r28", 28 },
473 { "r29", 29 },
474 { "r3", 3 },
475 { "r30", 30 },
476 { "r31", 31 },
477 { "r4", 4 },
478 { "r5", 5 },
479 { "r6", 6 },
480 { "r7", 7 },
481 { "r8", 8 },
482 { "r9", 9 },
483
484 { "rtoc", 2 }, /* Table of contents */
485
486 { "sdr1", 25 }, /* Storage Description Register 1 */
487
488 { "sp", 1 },
489
490 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
491 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 492
7a899fff 493 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 494 { "v.1", 1 },
495 { "v.10", 10 },
496 { "v.11", 11 },
497 { "v.12", 12 },
498 { "v.13", 13 },
499 { "v.14", 14 },
500 { "v.15", 15 },
501 { "v.16", 16 },
502 { "v.17", 17 },
503 { "v.18", 18 },
504 { "v.19", 19 },
505 { "v.2", 2 },
506 { "v.20", 20 },
507 { "v.21", 21 },
508 { "v.22", 22 },
509 { "v.23", 23 },
510 { "v.24", 24 },
511 { "v.25", 25 },
512 { "v.26", 26 },
513 { "v.27", 27 },
514 { "v.28", 28 },
515 { "v.29", 29 },
516 { "v.3", 3 },
7a899fff
C		 517 { "v.30", 30 },
518 { "v.31", 31 },
81d4177b
KH		 519 { "v.4", 4 },
520 { "v.5", 5 },
521 { "v.6", 6 },
522 { "v.7", 7 },
523 { "v.8", 8 },
524 { "v.9", 9 },
7a899fff
C		 525
526 { "v0", 0 },
81d4177b
KH		 527 { "v1", 1 },
528 { "v10", 10 },
529 { "v11", 11 },
530 { "v12", 12 },
531 { "v13", 13 },
532 { "v14", 14 },
533 { "v15", 15 },
534 { "v16", 16 },
535 { "v17", 17 },
536 { "v18", 18 },
537 { "v19", 19 },
538 { "v2", 2 },
539 { "v20", 20 },
540 { "v21", 21 },
541 { "v22", 22 },
542 { "v23", 23 },
543 { "v24", 24 },
544 { "v25", 25 },
545 { "v26", 26 },
546 { "v27", 27 },
547 { "v28", 28 },
548 { "v29", 29 },
549 { "v3", 3 },
7a899fff
C		 550 { "v30", 30 },
551 { "v31", 31 },
81d4177b
KH		 552 { "v4", 4 },
553 { "v5", 5 },
554 { "v6", 6 },
555 { "v7", 7 },
556 { "v8", 8 },
7a899fff 557 { "v9", 9 },
252b5132
RH		 558
559 { "xer", 1 },
560
561};
562
bc805888 563#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 564
565/* Given NAME, find the register number associated with that name, return
566 the integer value associated with the given name or -1 on failure. */
567
568static int reg_name_search
569 PARAMS ((const struct pd_reg *, int, const char * name));
570
571static int
572reg_name_search (regs, regcount, name)
573 const struct pd_reg *regs;
574 int regcount;
575 const char *name;
576{
577 int middle, low, high;
578 int cmp;
579
580 low = 0;
581 high = regcount - 1;
582
583 do
584 {
585 middle = (low + high) / 2;
586 cmp = strcasecmp (name, regs[middle].name);
587 if (cmp < 0)
588 high = middle - 1;
589 else if (cmp > 0)
590 low = middle + 1;
591 else
592 return regs[middle].value;
593 }
594 while (low <= high);
595
596 return -1;
597}
598
599/*
99a814a1 600 * Summary of register_name.
252b5132
RH		 601 *
602 * in: Input_line_pointer points to 1st char of operand.
603 *
604 * out: A expressionS.
605 * The operand may have been a register: in this case, X_op == O_register,
606 * X_add_number is set to the register number, and truth is returned.
607 * Input_line_pointer->(next non-blank) char after operand, or is in its
608 * original state.
609 */
610
b34976b6 611static bfd_boolean
252b5132
RH		 612register_name (expressionP)
613 expressionS *expressionP;
614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH		 627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM		 631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH		 636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH		 641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM		 645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH		 649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH		 657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
680ppc_parse_name (name, expr)
681 const char *name;
682 expressionS *expr;
683{
684 int val;
685
686 if (! cr_operand)
687 return 0;
688
689 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
690 name);
691 if (val < 0)
692 return 0;
693
694 expr->X_op = O_constant;
695 expr->X_add_number = val;
696
697 return 1;
698}
699\f
700/* Local variables. */
701
702/* The type of processor we are assembling for. This is one or more
703 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 704static unsigned long ppc_cpu = 0;
252b5132 705
2b3c4602
AM		 706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH		 709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH		 720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH		 727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM		 804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ		 806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH		 818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM		 822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
828 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
829 (RIOS2). */
830 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
831 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
832 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
833 else if (strcmp (arg, "pwr") == 0)
834 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
835 /* -m601 means to assemble for the PowerPC 601, which includes
836 instructions that are holdovers from the Power. */
837 else if (strcmp (arg, "601") == 0)
838 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
839 | PPC_OPCODE_601 | PPC_OPCODE_32);
840 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
841 PowerPC 603/604. */
842 else if (strcmp (arg, "ppc") == 0
843 || strcmp (arg, "ppc32") == 0
844 || strcmp (arg, "603") == 0
845 || strcmp (arg, "604") == 0)
846 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
847 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
848 else if (strcmp (arg, "403") == 0
849 || strcmp (arg, "405") == 0)
850 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
851 | PPC_OPCODE_403 | PPC_OPCODE_32);
852 else if (strcmp (arg, "440") == 0)
853 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
854 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
855 else if (strcmp (arg, "7400") == 0
856 || strcmp (arg, "7410") == 0
857 || strcmp (arg, "7450") == 0
858 || strcmp (arg, "7455") == 0)
859 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
860 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
861 else if (strcmp (arg, "altivec") == 0)
862 {
863 if (ppc_cpu == 0)
864 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
865 else
866 ppc_cpu |= PPC_OPCODE_ALTIVEC;
867 }
868 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
869 {
870 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
871 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
872 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
873 | PPC_OPCODE_RFMCI);
874 }
875 else if (strcmp (arg, "spe") == 0)
876 {
877 if (ppc_cpu == 0)
878 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
879 else
880 ppc_cpu |= PPC_OPCODE_SPE;
881 }
882 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
883 620. */
884 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
885 {
886 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
887 }
888 else if (strcmp (arg, "ppc64bridge") == 0)
889 {
890 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
891 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
892 }
893 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
894 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
895 {
896 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
897 }
898 /* -mbooke64 means enable 64-bit BookE support. */
899 else if (strcmp (arg, "booke64") == 0)
900 {
901 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
902 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
903 }
904 else if (strcmp (arg, "power4") == 0)
905 {
906 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
907 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
908 }
909 /* -mcom means assemble for the common intersection between Power
910 and PowerPC. At present, we just allow the union, rather
911 than the intersection. */
912 else if (strcmp (arg, "com") == 0)
913 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
914 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
915 else if (strcmp (arg, "any") == 0)
916 ppc_cpu |= PPC_OPCODE_ANY;
917 else
918 return 0;
919
920 return 1;
921}
922
252b5132
RH		 923int
924md_parse_option (c, arg)
925 int c;
926 char *arg;
927{
928 switch (c)
929 {
930 case 'u':
931 /* -u means that any undefined symbols should be treated as
932 external, which is the default for gas anyhow. */
933 break;
934
935#ifdef OBJ_ELF
936 case 'l':
937 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 938 sake, recognize -be also. */
252b5132
RH		 939 if (strcmp (arg, "e") == 0)
940 {
941 target_big_endian = 0;
942 set_target_endian = 1;
943 }
944 else
945 return 0;
946
947 break;
948
949 case 'b':
950 if (strcmp (arg, "e") == 0)
951 {
952 target_big_endian = 1;
953 set_target_endian = 1;
954 }
955 else
956 return 0;
957
958 break;
959
960 case 'K':
99a814a1 961 /* Recognize -K PIC. */
252b5132
RH		 962 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
963 {
964 shlib = SHLIB_PIC;
965 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
966 }
967 else
968 return 0;
969
970 break;
971#endif
972
7f6d05e8
CP		 973 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
974 case 'a':
975 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 976 {
977#ifdef BFD64
978 ppc_obj64 = 1;
979#else
980 as_fatal (_("%s unsupported"), "-a64");
981#endif
982 }
7f6d05e8 983 else if (strcmp (arg, "32") == 0)
2b3c4602 984 ppc_obj64 = 0;
7f6d05e8
CP		 985 else
986 return 0;
987 break;
81d4177b 988
252b5132 989 case 'm':
69c040df
AM		 990 if (parse_cpu (arg))
991 ;
252b5132
RH		 992
993 else if (strcmp (arg, "regnames") == 0)
b34976b6 994 reg_names_p = TRUE;
252b5132
RH		 995
996 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 997 reg_names_p = FALSE;
252b5132
RH		 998
999#ifdef OBJ_ELF
99a814a1
AM		 1000 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1001 that require relocation. */
252b5132
RH		 1002 else if (strcmp (arg, "relocatable") == 0)
1003 {
5d6f4f16 1004 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1005 ppc_flags |= EF_PPC_RELOCATABLE;
1006 }
1007
1008 else if (strcmp (arg, "relocatable-lib") == 0)
1009 {
5d6f4f16 1010 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1011 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1012 }
1013
99a814a1 1014 /* -memb, set embedded bit. */
252b5132
RH		 1015 else if (strcmp (arg, "emb") == 0)
1016 ppc_flags |= EF_PPC_EMB;
1017
99a814a1
AM		 1018 /* -mlittle/-mbig set the endianess. */
1019 else if (strcmp (arg, "little") == 0
1020 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1021 {
1022 target_big_endian = 0;
1023 set_target_endian = 1;
1024 }
1025
1026 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1027 {
1028 target_big_endian = 1;
1029 set_target_endian = 1;
1030 }
1031
1032 else if (strcmp (arg, "solaris") == 0)
1033 {
b34976b6 1034 msolaris = TRUE;
252b5132
RH		 1035 ppc_comment_chars = ppc_solaris_comment_chars;
1036 }
1037
1038 else if (strcmp (arg, "no-solaris") == 0)
1039 {
b34976b6 1040 msolaris = FALSE;
252b5132
RH		 1041 ppc_comment_chars = ppc_eabi_comment_chars;
1042 }
1043#endif
1044 else
1045 {
1046 as_bad (_("invalid switch -m%s"), arg);
1047 return 0;
1048 }
1049 break;
1050
1051#ifdef OBJ_ELF
1052 /* -V: SVR4 argument to print version ID. */
1053 case 'V':
1054 print_version_id ();
1055 break;
1056
1057 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1058 should be emitted or not. FIXME: Not implemented. */
1059 case 'Q':
1060 break;
1061
1062 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1063 rather than .stabs.excl, which is ignored by the linker.
1064 FIXME: Not implemented. */
1065 case 's':
1066 if (arg)
1067 return 0;
1068
1069 break;
1070#endif
1071
1072 default:
1073 return 0;
1074 }
1075
1076 return 1;
1077}
1078
1079void
1080md_show_usage (stream)
1081 FILE *stream;
1082{
bc805888 1083 fprintf (stream, _("\
252b5132 1084PowerPC options:\n\
df12615d
AM		 1085-a32 generate ELF32/XCOFF32\n\
1086-a64 generate ELF64/XCOFF64\n\
252b5132 1087-u ignored\n\
23e1d84c
AM		 1088-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1089-mpwr generate code for POWER (RIOS1)\n\
1090-m601 generate code for PowerPC 601\n\
418c1742 1091-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1092 generate code for PowerPC 603/604\n\
df12615d 1093-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1094-m440 generate code for PowerPC 440\n\
f5c120c5 1095-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1096 generate code For PowerPC 7400/7410/7450/7455\n"));
1097 fprintf (stream, _("\
23e1d84c 1098-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1099-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1100-mbooke64 generate code for 64-bit PowerPC BookE\n\
1101-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1102-mpower4 generate code for Power4 architecture\n\
252b5132 1103-mcom generate code Power/PowerPC common instructions\n\
df12615d 1104-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1105 fprintf (stream, _("\
df12615d 1106-maltivec generate code for AltiVec\n\
6a0c61b7 1107-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1108-mspe generate code for Motorola SPE instructions\n\
1109-mregnames Allow symbolic names for registers\n\
1110-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1111#ifdef OBJ_ELF
bc805888 1112 fprintf (stream, _("\
252b5132
RH		 1113-mrelocatable support for GCC's -mrelocatble option\n\
1114-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1115-memb set PPC_EMB bit in ELF flags\n\
df12615d 1116-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1117 generate code for a little endian machine\n\
df12615d
AM		 1118-mbig, -mbig-endian, -b, -be\n\
1119 generate code for a big endian machine\n\
252b5132
RH		 1120-msolaris generate code for Solaris\n\
1121-mno-solaris do not generate code for Solaris\n\
1122-V print assembler version number\n\
1123-Qy, -Qn ignored\n"));
1124#endif
1125}
1126\f
1127/* Set ppc_cpu if it is not already set. */
1128
1129static void
1130ppc_set_cpu ()
1131{
1132 const char *default_os = TARGET_OS;
1133 const char *default_cpu = TARGET_CPU;
1134
3c9030c1 1135 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1136 {
2a98c3a6 1137 if (ppc_obj64)
3c9030c1 1138 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1139 else if (strncmp (default_os, "aix", 3) == 0
1140 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1141 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1142 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1143 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1144 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1145 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1146 else if (strncmp (default_cpu, "powerpc", 7) == 0)
b34976b6
AM		 1147 {
1148 if (default_cpu[7] == '6' && default_cpu[8] == '4')
3c9030c1 1149 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
b34976b6 1150 else
3c9030c1 1151 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
b34976b6 1152 }
252b5132 1153 else
99a814a1
AM		 1154 as_fatal (_("Unknown default cpu = %s, os = %s"),
1155 default_cpu, default_os);
252b5132
RH		 1156 }
1157}
1158
1159/* Figure out the BFD architecture to use. */
1160
1161enum bfd_architecture
1162ppc_arch ()
1163{
1164 const char *default_cpu = TARGET_CPU;
1165 ppc_set_cpu ();
1166
1167 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1168 return bfd_arch_powerpc;
1169 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1170 return bfd_arch_rs6000;
1171 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1172 {
1173 if (strcmp (default_cpu, "rs6000") == 0)
1174 return bfd_arch_rs6000;
0baf16f2 1175 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1176 return bfd_arch_powerpc;
1177 }
1178
1179 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1180 return bfd_arch_unknown;
1181}
1182
7f6d05e8
CP		 1183unsigned long
1184ppc_mach ()
1185{
2a98c3a6
AM		 1186 if (ppc_obj64)
1187 return bfd_mach_ppc64;
1188 else if (ppc_arch () == bfd_arch_rs6000)
1189 return bfd_mach_rs6k;
1190 else
1191 return bfd_mach_ppc;
7f6d05e8
CP		 1192}
1193
81d4177b 1194extern char*
99a814a1 1195ppc_target_format ()
7f6d05e8
CP		 1196{
1197#ifdef OBJ_COFF
1198#ifdef TE_PE
99a814a1 1199 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1200#elif TE_POWERMAC
0baf16f2 1201 return "xcoff-powermac";
7f6d05e8 1202#else
eb1e0e80 1203# ifdef TE_AIX5
2b3c4602 1204 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1205# else
2b3c4602 1206 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1207# endif
7f6d05e8 1208#endif
7f6d05e8
CP		 1209#endif
1210#ifdef OBJ_ELF
0baf16f2 1211 return (target_big_endian
2b3c4602
AM		 1212 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1213 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
7f6d05e8
CP		 1214#endif
1215}
1216
69c040df
AM		 1217/* Insert opcodes and macros into hash tables. Called at startup and
1218 for .cpu pseudo. */
252b5132 1219
69c040df
AM		 1220static void
1221ppc_setup_opcodes (void)
252b5132
RH		 1222{
1223 register const struct powerpc_opcode *op;
1224 const struct powerpc_opcode *op_end;
1225 const struct powerpc_macro *macro;
1226 const struct powerpc_macro *macro_end;
b34976b6 1227 bfd_boolean dup_insn = FALSE;
252b5132 1228
69c040df
AM		 1229 if (ppc_hash != NULL)
1230 hash_die (ppc_hash);
1231 if (ppc_macro_hash != NULL)
1232 hash_die (ppc_macro_hash);
252b5132
RH		 1233
1234 /* Insert the opcodes into a hash table. */
1235 ppc_hash = hash_new ();
1236
1237 op_end = powerpc_opcodes + powerpc_num_opcodes;
1238 for (op = powerpc_opcodes; op < op_end; op++)
1239 {
1240 know ((op->opcode & op->mask) == op->opcode);
1241
2b3c4602 1242 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1243 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1244 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1245 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1246 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1247 /* Certain instructions (eg: extsw) do not exist in the
1248 32-bit BookE instruction set, but they do exist in the
1249 64-bit BookE instruction set, and other PPC instruction
1250 sets. Check to see if the opcode has the BOOKE64 flag set.
1251 If it does make sure that the target CPU is not the BookE32. */
1252 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1253 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1254 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1255 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1256 || ((op->flags & PPC_OPCODE_POWER4)
1257 == (ppc_cpu & PPC_OPCODE_POWER4))))
252b5132
RH		 1258 {
1259 const char *retval;
1260
1261 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1262 if (retval != NULL)
252b5132 1263 {
99a814a1 1264 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1265 if ((ppc_cpu & PPC_OPCODE_601) != 0
1266 && (op->flags & PPC_OPCODE_POWER) != 0)
1267 continue;
1268
99a814a1
AM		 1269 as_bad (_("Internal assembler error for instruction %s"),
1270 op->name);
b34976b6 1271 dup_insn = TRUE;
252b5132
RH		 1272 }
1273 }
1274 }
1275
3c9030c1
AM		 1276 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1277 for (op = powerpc_opcodes; op < op_end; op++)
1278 hash_insert (ppc_hash, op->name, (PTR) op);
1279
252b5132
RH		 1280 /* Insert the macros into a hash table. */
1281 ppc_macro_hash = hash_new ();
1282
1283 macro_end = powerpc_macros + powerpc_num_macros;
1284 for (macro = powerpc_macros; macro < macro_end; macro++)
1285 {
1286 if ((macro->flags & ppc_cpu) != 0)
1287 {
1288 const char *retval;
1289
1290 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1291 if (retval != (const char *) NULL)
1292 {
1293 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1294 dup_insn = TRUE;
252b5132
RH		 1295 }
1296 }
1297 }
1298
1299 if (dup_insn)
1300 abort ();
69c040df
AM		 1301}
1302
1303/* This function is called when the assembler starts up. It is called
1304 after the options have been parsed and the output file has been
1305 opened. */
1306
1307void
1308md_begin ()
1309{
1310 ppc_set_cpu ();
1311
1312 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1313
1314#ifdef OBJ_ELF
1315 /* Set the ELF flags if desired. */
1316 if (ppc_flags && !msolaris)
1317 bfd_set_private_flags (stdoutput, ppc_flags);
1318#endif
1319
1320 ppc_setup_opcodes ();
252b5132 1321
67c1ffbe 1322 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1323 by the user. */
252b5132
RH		 1324 if (!set_target_endian)
1325 {
1326 set_target_endian = 1;
1327 target_big_endian = PPC_BIG_ENDIAN;
1328 }
1329
1330#ifdef OBJ_XCOFF
1331 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1332
1333 /* Create dummy symbols to serve as initial csects. This forces the
1334 text csects to precede the data csects. These symbols will not
1335 be output. */
1336 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1337 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1338 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1339 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1340#endif
1341
1342#ifdef TE_PE
1343
1344 ppc_current_section = text_section;
81d4177b 1345 ppc_previous_section = 0;
252b5132
RH		 1346
1347#endif
1348}
1349
6a0c61b7
EZ		 1350void
1351ppc_cleanup ()
1352{
dc1d03fc 1353#ifdef OBJ_ELF
6a0c61b7
EZ		 1354 if (ppc_apuinfo_list == NULL)
1355 return;
1356
1357 /* Ok, so write the section info out. We have this layout:
1358
1359 byte data what
1360 ---- ---- ----
1361 0 8 length of "APUinfo\0"
1362 4 (n*4) number of APU's (4 bytes each)
1363 8 2 note type 2
1364 12 "APUinfo\0" name
1365 20 APU#1 first APU's info
1366 24 APU#2 second APU's info
1367 ... ...
1368 */
1369 {
1370 char *p;
1371 asection *seg = now_seg;
1372 subsegT subseg = now_subseg;
1373 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1374 unsigned int i;
6a0c61b7
EZ		 1375
1376 /* Create the .PPC.EMB.apuinfo section. */
1377 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1378 bfd_set_section_flags (stdoutput,
1379 apuinfo_secp,
e1a9cb8e 1380 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1381
1382 p = frag_more (4);
1383 md_number_to_chars (p, (valueT) 8, 4);
1384
1385 p = frag_more (4);
e98d298c 1386 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1387
1388 p = frag_more (4);
1389 md_number_to_chars (p, (valueT) 2, 4);
1390
1391 p = frag_more (8);
1392 strcpy (p, "APUinfo");
1393
1394 for (i = 0; i < ppc_apuinfo_num; i++)
1395 {
b34976b6
AM		 1396 p = frag_more (4);
1397 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1398 }
1399
1400 frag_align (2, 0, 0);
1401
1402 /* We probably can't restore the current segment, for there likely
1403 isn't one yet... */
1404 if (seg && subseg)
1405 subseg_set (seg, subseg);
1406 }
dc1d03fc 1407#endif
6a0c61b7
EZ		 1408}
1409
252b5132
RH		 1410/* Insert an operand value into an instruction. */
1411
1412static unsigned long
1413ppc_insert_operand (insn, operand, val, file, line)
1414 unsigned long insn;
1415 const struct powerpc_operand *operand;
1416 offsetT val;
1417 char *file;
1418 unsigned int line;
1419{
1420 if (operand->bits != 32)
1421 {
1422 long min, max;
1423 offsetT test;
1424
1425 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1426 {
d0e9a01c 1427 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH		 1428 max = (1 << operand->bits) - 1;
1429 else
1430 max = (1 << (operand->bits - 1)) - 1;
1431 min = - (1 << (operand->bits - 1));
1432
2b3c4602 1433 if (!ppc_obj64)
252b5132
RH		 1434 {
1435 /* Some people write 32 bit hex constants with the sign
1436 extension done by hand. This shouldn't really be
1437 valid, but, to permit this code to assemble on a 64
1438 bit host, we sign extend the 32 bit value. */
1439 if (val > 0
92161534
ILT		 1440 && (val & (offsetT) 0x80000000) != 0
1441 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH		 1442 {
1443 val -= 0x80000000;
1444 val -= 0x80000000;
1445 }
1446 }
1447 }
1448 else
1449 {
1450 max = (1 << operand->bits) - 1;
1451 min = 0;
1452 }
1453
1454 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1455 test = - val;
1456 else
1457 test = val;
1458
1459 if (test < (offsetT) min || test > (offsetT) max)
e5976317 1460 as_bad_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
252b5132
RH		 1461 }
1462
1463 if (operand->insert)
1464 {
1465 const char *errmsg;
1466
1467 errmsg = NULL;
2b3c4602 1468 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1469 if (errmsg != (const char *) NULL)
0baf16f2 1470 as_bad_where (file, line, errmsg);
252b5132
RH		 1471 }
1472 else
1473 insn |= (((long) val & ((1 << operand->bits) - 1))
1474 << operand->shift);
1475
1476 return insn;
1477}
1478
1479\f
1480#ifdef OBJ_ELF
1481/* Parse @got, etc. and return the desired relocation. */
1482static bfd_reloc_code_real_type
1483ppc_elf_suffix (str_p, exp_p)
1484 char **str_p;
1485 expressionS *exp_p;
1486{
1487 struct map_bfd {
1488 char *string;
b7d7dc63
AM		 1489 unsigned int length : 8;
1490 unsigned int valid32 : 1;
1491 unsigned int valid64 : 1;
1492 unsigned int reloc;
252b5132
RH		 1493 };
1494
1495 char ident[20];
1496 char *str = *str_p;
1497 char *str2;
1498 int ch;
1499 int len;
15c1449b 1500 const struct map_bfd *ptr;
252b5132 1501
b7d7dc63
AM		 1502#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1503#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1504#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1505
15c1449b 1506 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1507 MAP ("l", BFD_RELOC_LO16),
1508 MAP ("h", BFD_RELOC_HI16),
1509 MAP ("ha", BFD_RELOC_HI16_S),
1510 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1511 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1512 MAP ("got", BFD_RELOC_16_GOTOFF),
1513 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1514 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1515 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1516 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1517 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1518 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1519 MAP ("copy", BFD_RELOC_PPC_COPY),
1520 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1521 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1522 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1523 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1524 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1525 MAP ("tls", BFD_RELOC_PPC_TLS),
1526 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1527 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1528 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1529 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1530 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1531 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1532 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1533 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1534 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1535 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1536 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1537 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1538 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1539 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1540 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1541 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1542 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1543 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1544 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1545 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1546 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1547 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1548 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1549 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1550 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1551 MAP32 ("fixup", BFD_RELOC_CTOR),
1552 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1553 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1554 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1555 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1556 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1557 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1558 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1559 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1560 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1561 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1562 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1563 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1564 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1565 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1566 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1567 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1568 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1569 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1570 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1571 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1572 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1573 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1574 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1575 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1576 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1577 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1578 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1579 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1580 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1581 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1582 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1583 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1584 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1585 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1586 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1587 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1588 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1589 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1590 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1591 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1592 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1593 };
1594
1595 if (*str++ != '@')
1596 return BFD_RELOC_UNUSED;
1597
1598 for (ch = *str, str2 = ident;
1599 (str2 < ident + sizeof (ident) - 1
3882b010 1600 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1601 ch = *++str)
1602 {
3882b010 1603 *str2++ = TOLOWER (ch);
252b5132
RH		 1604 }
1605
1606 *str2 = '\0';
1607 len = str2 - ident;
1608
1609 ch = ident[0];
1610 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1611 if (ch == ptr->string[0]
1612 && len == ptr->length
b7d7dc63
AM		 1613 && memcmp (ident, ptr->string, ptr->length) == 0
1614 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1615 {
15c1449b
AM		 1616 int reloc = ptr->reloc;
1617
cdba85ec 1618 if (!ppc_obj64)
5f6db75a
AM		 1619 if (exp_p->X_add_number != 0
1620 && (reloc == (int) BFD_RELOC_16_GOTOFF
1621 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1622 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1623 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1624 as_warn (_("identifier+constant@got means identifier@got+constant"));
1625
1626 /* Now check for identifier@suffix+constant. */
1627 if (*str == '-' || *str == '+')
252b5132 1628 {
5f6db75a
AM		 1629 char *orig_line = input_line_pointer;
1630 expressionS new_exp;
1631
1632 input_line_pointer = str;
1633 expression (&new_exp);
1634 if (new_exp.X_op == O_constant)
252b5132 1635 {
5f6db75a
AM		 1636 exp_p->X_add_number += new_exp.X_add_number;
1637 str = input_line_pointer;
252b5132 1638 }
5f6db75a
AM		 1639
1640 if (&input_line_pointer != str_p)
1641 input_line_pointer = orig_line;
252b5132 1642 }
252b5132 1643 *str_p = str;
0baf16f2 1644
2b3c4602 1645 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1646 && exp_p->X_op == O_symbol
1647 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1648 {
9f2b53d7
AM		 1649 /* Change the symbol so that the dummy .TOC. symbol can be
1650 omitted from the object file. */
0baf16f2
AM		 1651 exp_p->X_add_symbol = &abs_symbol;
1652 }
1653
15c1449b 1654 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1655 }
1656
1657 return BFD_RELOC_UNUSED;
1658}
1659
99a814a1
AM		 1660/* Like normal .long/.short/.word, except support @got, etc.
1661 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1662static void
1663ppc_elf_cons (nbytes)
0baf16f2 1664 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1665{
1666 expressionS exp;
1667 bfd_reloc_code_real_type reloc;
1668
1669 if (is_it_end_of_statement ())
1670 {
1671 demand_empty_rest_of_line ();
1672 return;
1673 }
1674
1675 do
1676 {
1677 expression (&exp);
1678 if (exp.X_op == O_symbol
1679 && *input_line_pointer == '@'
99a814a1
AM		 1680 && (reloc = ppc_elf_suffix (&input_line_pointer,
1681 &exp)) != BFD_RELOC_UNUSED)
252b5132 1682 {
99a814a1
AM		 1683 reloc_howto_type *reloc_howto;
1684 int size;
1685
1686 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1687 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1688
1689 if (size > nbytes)
0baf16f2
AM		 1690 {
1691 as_bad (_("%s relocations do not fit in %d bytes\n"),
1692 reloc_howto->name, nbytes);
1693 }
252b5132
RH		 1694 else
1695 {
0baf16f2
AM		 1696 char *p;
1697 int offset;
252b5132 1698
0baf16f2
AM		 1699 p = frag_more (nbytes);
1700 offset = 0;
1701 if (target_big_endian)
1702 offset = nbytes - size;
99a814a1
AM		 1703 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1704 &exp, 0, reloc);
252b5132
RH		 1705 }
1706 }
1707 else
1708 emit_expr (&exp, (unsigned int) nbytes);
1709 }
1710 while (*input_line_pointer++ == ',');
1711
99a814a1
AM		 1712 /* Put terminator back into stream. */
1713 input_line_pointer--;
252b5132
RH		 1714 demand_empty_rest_of_line ();
1715}
1716
1717/* Solaris pseduo op to change to the .rodata section. */
1718static void
1719ppc_elf_rdata (xxx)
1720 int xxx;
1721{
1722 char *save_line = input_line_pointer;
1723 static char section[] = ".rodata\n";
1724
99a814a1 1725 /* Just pretend this is .section .rodata */
252b5132
RH		 1726 input_line_pointer = section;
1727 obj_elf_section (xxx);
1728
1729 input_line_pointer = save_line;
1730}
1731
99a814a1 1732/* Pseudo op to make file scope bss items. */
252b5132 1733static void
99a814a1 1734ppc_elf_lcomm (xxx)
92161534 1735 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1736{
1737 register char *name;
1738 register char c;
1739 register char *p;
1740 offsetT size;
1741 register symbolS *symbolP;
1742 offsetT align;
1743 segT old_sec;
1744 int old_subsec;
1745 char *pfrag;
1746 int align2;
1747
1748 name = input_line_pointer;
1749 c = get_symbol_end ();
1750
99a814a1 1751 /* just after name is now '\0'. */
252b5132
RH		 1752 p = input_line_pointer;
1753 *p = c;
1754 SKIP_WHITESPACE ();
1755 if (*input_line_pointer != ',')
1756 {
1757 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1758 ignore_rest_of_line ();
1759 return;
1760 }
1761
1762 input_line_pointer++; /* skip ',' */
1763 if ((size = get_absolute_expression ()) < 0)
1764 {
1765 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1766 ignore_rest_of_line ();
1767 return;
1768 }
1769
1770 /* The third argument to .lcomm is the alignment. */
1771 if (*input_line_pointer != ',')
1772 align = 8;
1773 else
1774 {
1775 ++input_line_pointer;
1776 align = get_absolute_expression ();
1777 if (align <= 0)
1778 {
1779 as_warn (_("ignoring bad alignment"));
1780 align = 8;
1781 }
1782 }
1783
1784 *p = 0;
1785 symbolP = symbol_find_or_make (name);
1786 *p = c;
1787
1788 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1789 {
1790 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1791 S_GET_NAME (symbolP));
1792 ignore_rest_of_line ();
1793 return;
1794 }
1795
1796 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1797 {
1798 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1799 S_GET_NAME (symbolP),
1800 (long) S_GET_VALUE (symbolP),
1801 (long) size);
1802
1803 ignore_rest_of_line ();
1804 return;
1805 }
1806
99a814a1 1807 /* Allocate_bss. */
252b5132
RH		 1808 old_sec = now_seg;
1809 old_subsec = now_subseg;
1810 if (align)
1811 {
99a814a1 1812 /* Convert to a power of 2 alignment. */
252b5132
RH		 1813 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1814 if (align != 1)
1815 {
1816 as_bad (_("Common alignment not a power of 2"));
1817 ignore_rest_of_line ();
1818 return;
1819 }
1820 }
1821 else
1822 align2 = 0;
1823
1824 record_alignment (bss_section, align2);
1825 subseg_set (bss_section, 0);
1826 if (align2)
1827 frag_align (align2, 0, 0);
1828 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1829 symbol_get_frag (symbolP)->fr_symbol = 0;
1830 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1831 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1832 (char *) 0);
1833 *pfrag = 0;
1834 S_SET_SIZE (symbolP, size);
1835 S_SET_SEGMENT (symbolP, bss_section);
1836 subseg_set (old_sec, old_subsec);
1837 demand_empty_rest_of_line ();
1838}
1839
1840/* Validate any relocations emitted for -mrelocatable, possibly adding
1841 fixups for word relocations in writable segments, so we can adjust
1842 them at runtime. */
1843static void
1844ppc_elf_validate_fix (fixp, seg)
1845 fixS *fixp;
1846 segT seg;
1847{
1848 if (fixp->fx_done || fixp->fx_pcrel)
1849 return;
1850
1851 switch (shlib)
1852 {
1853 case SHLIB_NONE:
1854 case SHLIB_PIC:
1855 return;
1856
5d6f4f16 1857 case SHLIB_MRELOCATABLE:
252b5132
RH		 1858 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1859 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1860 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1861 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1862 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1863 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1864 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1865 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1866 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1867 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1868 && strcmp (segment_name (seg), ".got2") != 0
1869 && strcmp (segment_name (seg), ".dtors") != 0
1870 && strcmp (segment_name (seg), ".ctors") != 0
1871 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1872 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1873 && strcmp (segment_name (seg), ".eh_frame") != 0
1874 && strcmp (segment_name (seg), ".ex_shared") != 0)
1875 {
1876 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1877 || fixp->fx_r_type != BFD_RELOC_CTOR)
1878 {
1879 as_bad_where (fixp->fx_file, fixp->fx_line,
1880 _("Relocation cannot be done when using -mrelocatable"));
1881 }
1882 }
1883 return;
1884 }
1885}
0baf16f2 1886
7e8d4ab4
AM		 1887/* Prevent elf_frob_file_before_adjust removing a weak undefined
1888 function descriptor sym if the corresponding code sym is used. */
1889
1890void
1891ppc_frob_file_before_adjust ()
0baf16f2 1892{
7e8d4ab4 1893 symbolS *symp;
0baf16f2 1894
7e8d4ab4
AM		 1895 if (!ppc_obj64)
1896 return;
1897
1898 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1899 {
7e8d4ab4
AM		 1900 const char *name;
1901 char *dotname;
1902 symbolS *dotsym;
1903 size_t len;
1904
1905 name = S_GET_NAME (symp);
1906 if (name[0] == '.')
1907 continue;
1908
1909 if (! S_IS_WEAK (symp)
1910 || S_IS_DEFINED (symp))
1911 continue;
1912
1913 len = strlen (name) + 1;
1914 dotname = xmalloc (len + 1);
1915 dotname[0] = '.';
1916 memcpy (dotname + 1, name, len);
1917 dotsym = symbol_find (dotname);
1918 free (dotname);
1919 if (dotsym != NULL && (symbol_used_p (dotsym)
1920 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 1921 symbol_mark_used (symp);
1922
0baf16f2
AM		 1923 }
1924
7e8d4ab4
AM		 1925 /* Don't emit .TOC. symbol. */
1926 symp = symbol_find (".TOC.");
1927 if (symp != NULL)
1928 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1929}
252b5132
RH		 1930#endif /* OBJ_ELF */
1931\f
1932#ifdef TE_PE
1933
1934/*
99a814a1 1935 * Summary of parse_toc_entry.
252b5132
RH		 1936 *
1937 * in: Input_line_pointer points to the '[' in one of:
1938 *
1939 * [toc] [tocv] [toc32] [toc64]
1940 *
1941 * Anything else is an error of one kind or another.
1942 *
81d4177b 1943 * out:
252b5132
RH		 1944 * return value: success or failure
1945 * toc_kind: kind of toc reference
1946 * input_line_pointer:
1947 * success: first char after the ']'
1948 * failure: unchanged
1949 *
1950 * settings:
1951 *
1952 * [toc] - rv == success, toc_kind = default_toc
1953 * [tocv] - rv == success, toc_kind = data_in_toc
1954 * [toc32] - rv == success, toc_kind = must_be_32
1955 * [toc64] - rv == success, toc_kind = must_be_64
1956 *
1957 */
1958
81d4177b
KH		 1959enum toc_size_qualifier
1960{
252b5132
RH		 1961 default_toc, /* The toc cell constructed should be the system default size */
1962 data_in_toc, /* This is a direct reference to a toc cell */
1963 must_be_32, /* The toc cell constructed must be 32 bits wide */
1964 must_be_64 /* The toc cell constructed must be 64 bits wide */
1965};
1966
1967static int
99a814a1 1968parse_toc_entry (toc_kind)
252b5132
RH		 1969 enum toc_size_qualifier *toc_kind;
1970{
1971 char *start;
1972 char *toc_spec;
1973 char c;
1974 enum toc_size_qualifier t;
1975
99a814a1 1976 /* Save the input_line_pointer. */
252b5132
RH		 1977 start = input_line_pointer;
1978
99a814a1 1979 /* Skip over the '[' , and whitespace. */
252b5132
RH		 1980 ++input_line_pointer;
1981 SKIP_WHITESPACE ();
81d4177b 1982
99a814a1 1983 /* Find the spelling of the operand. */
252b5132
RH		 1984 toc_spec = input_line_pointer;
1985 c = get_symbol_end ();
1986
99a814a1 1987 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 1988 {
1989 t = default_toc;
1990 }
99a814a1 1991 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 1992 {
1993 t = data_in_toc;
1994 }
99a814a1 1995 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 1996 {
1997 t = must_be_32;
1998 }
99a814a1 1999 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2000 {
2001 t = must_be_64;
2002 }
2003 else
2004 {
2005 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2006 *input_line_pointer = c;
2007 input_line_pointer = start;
252b5132
RH		 2008 return 0;
2009 }
2010
99a814a1
AM		 2011 /* Now find the ']'. */
2012 *input_line_pointer = c;
252b5132 2013
81d4177b
KH		 2014 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2015 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2016
2017 if (c != ']')
2018 {
2019 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2020 input_line_pointer = start;
252b5132
RH		 2021 return 0;
2022 }
2023
99a814a1 2024 *toc_kind = t;
252b5132
RH		 2025 return 1;
2026}
2027#endif
2028\f
2029
dc1d03fc 2030#ifdef OBJ_ELF
6a0c61b7
EZ		 2031#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2032static void
dc1d03fc 2033ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2034 unsigned int apu, version;
2035{
2036 unsigned int i;
2037
2038 /* Check we don't already exist. */
2039 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2040 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2041 return;
b34976b6 2042
6a0c61b7
EZ		 2043 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2044 {
2045 if (ppc_apuinfo_num_alloc == 0)
2046 {
2047 ppc_apuinfo_num_alloc = 4;
2048 ppc_apuinfo_list = (unsigned long *)
2049 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2050 }
2051 else
2052 {
2053 ppc_apuinfo_num_alloc += 4;
2054 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2055 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2056 }
2057 }
dc1d03fc 2058 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2059}
2060#undef APUID
dc1d03fc 2061#endif
6a0c61b7
EZ		 2062\f
2063
252b5132
RH		 2064/* We need to keep a list of fixups. We can't simply generate them as
2065 we go, because that would require us to first create the frag, and
2066 that would screw up references to ``.''. */
2067
2068struct ppc_fixup
2069{
2070 expressionS exp;
2071 int opindex;
2072 bfd_reloc_code_real_type reloc;
2073};
2074
2075#define MAX_INSN_FIXUPS (5)
2076
2077/* This routine is called for each instruction to be assembled. */
2078
2079void
2080md_assemble (str)
2081 char *str;
2082{
2083 char *s;
2084 const struct powerpc_opcode *opcode;
2085 unsigned long insn;
2086 const unsigned char *opindex_ptr;
2087 int skip_optional;
2088 int need_paren;
2089 int next_opindex;
2090 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2091 int fc;
2092 char *f;
09b935ac 2093 int addr_mod;
252b5132
RH		 2094 int i;
2095#ifdef OBJ_ELF
2096 bfd_reloc_code_real_type reloc;
2097#endif
2098
2099 /* Get the opcode. */
3882b010 2100 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2101 ;
2102 if (*s != '\0')
2103 *s++ = '\0';
2104
2105 /* Look up the opcode in the hash table. */
2106 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2107 if (opcode == (const struct powerpc_opcode *) NULL)
2108 {
2109 const struct powerpc_macro *macro;
2110
2111 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2112 if (macro == (const struct powerpc_macro *) NULL)
2113 as_bad (_("Unrecognized opcode: `%s'"), str);
2114 else
2115 ppc_macro (s, macro);
2116
2117 return;
2118 }
2119
2120 insn = opcode->opcode;
2121
2122 str = s;
3882b010 2123 while (ISSPACE (*str))
252b5132
RH		 2124 ++str;
2125
2126 /* PowerPC operands are just expressions. The only real issue is
2127 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2128 an optional operand separate the operands only with commas (in some
2129 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2130 have optional operands). Most instructions with optional operands
2131 have only one. Those that have more than one optional operand can
2132 take either all their operands or none. So, before we start seriously
2133 parsing the operands, we check to see if we have optional operands,
2134 and if we do, we count the number of commas to see which operands
2135 have been omitted. */
252b5132
RH		 2136 skip_optional = 0;
2137 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2138 {
2139 const struct powerpc_operand *operand;
2140
2141 operand = &powerpc_operands[*opindex_ptr];
2142 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2143 {
2144 unsigned int opcount;
7fe9cf6b
NC		 2145 unsigned int num_operands_expected;
2146 unsigned int i;
252b5132
RH		 2147
2148 /* There is an optional operand. Count the number of
2149 commas in the input line. */
2150 if (*str == '\0')
2151 opcount = 0;
2152 else
2153 {
2154 opcount = 1;
2155 s = str;
2156 while ((s = strchr (s, ',')) != (char *) NULL)
2157 {
2158 ++opcount;
2159 ++s;
2160 }
2161 }
2162
7fe9cf6b
NC		 2163 /* Compute the number of expected operands.
2164 Do not count fake operands. */
2165 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2166 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2167 ++ num_operands_expected;
2168
252b5132
RH		 2169 /* If there are fewer operands in the line then are called
2170 for by the instruction, we want to skip the optional
1f6c9eb0 2171 operands. */
7fe9cf6b 2172 if (opcount < num_operands_expected)
252b5132
RH		 2173 skip_optional = 1;
2174
2175 break;
2176 }
2177 }
2178
2179 /* Gather the operands. */
2180 need_paren = 0;
2181 next_opindex = 0;
2182 fc = 0;
2183 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2184 {
2185 const struct powerpc_operand *operand;
2186 const char *errmsg;
2187 char *hold;
2188 expressionS ex;
2189 char endc;
2190
2191 if (next_opindex == 0)
2192 operand = &powerpc_operands[*opindex_ptr];
2193 else
2194 {
2195 operand = &powerpc_operands[next_opindex];
2196 next_opindex = 0;
2197 }
252b5132
RH		 2198 errmsg = NULL;
2199
2200 /* If this is a fake operand, then we do not expect anything
2201 from the input. */
2202 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2203 {
2b3c4602 2204 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2205 if (errmsg != (const char *) NULL)
2206 as_bad (errmsg);
2207 continue;
2208 }
2209
2210 /* If this is an optional operand, and we are skipping it, just
2211 insert a zero. */
2212 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2213 && skip_optional)
2214 {
2215 if (operand->insert)
2216 {
2b3c4602 2217 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2218 if (errmsg != (const char *) NULL)
2219 as_bad (errmsg);
2220 }
2221 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2222 next_opindex = *opindex_ptr + 1;
2223 continue;
2224 }
2225
2226 /* Gather the operand. */
2227 hold = input_line_pointer;
2228 input_line_pointer = str;
2229
2230#ifdef TE_PE
81d4177b 2231 if (*input_line_pointer == '[')
252b5132
RH		 2232 {
2233 /* We are expecting something like the second argument here:
99a814a1
AM		 2234 *
2235 * lwz r4,[toc].GS.0.static_int(rtoc)
2236 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2237 * The argument following the `]' must be a symbol name, and the
2238 * register must be the toc register: 'rtoc' or '2'
2239 *
2240 * The effect is to 0 as the displacement field
2241 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2242 * the appropriate variation) reloc against it based on the symbol.
2243 * The linker will build the toc, and insert the resolved toc offset.
2244 *
2245 * Note:
2246 * o The size of the toc entry is currently assumed to be
2247 * 32 bits. This should not be assumed to be a hard coded
2248 * number.
2249 * o In an effort to cope with a change from 32 to 64 bits,
2250 * there are also toc entries that are specified to be
2251 * either 32 or 64 bits:
2252 * lwz r4,[toc32].GS.0.static_int(rtoc)
2253 * lwz r4,[toc64].GS.0.static_int(rtoc)
2254 * These demand toc entries of the specified size, and the
2255 * instruction probably requires it.
2256 */
252b5132
RH		 2257
2258 int valid_toc;
2259 enum toc_size_qualifier toc_kind;
2260 bfd_reloc_code_real_type toc_reloc;
2261
99a814a1
AM		 2262 /* Go parse off the [tocXX] part. */
2263 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2264
81d4177b 2265 if (!valid_toc)
252b5132 2266 {
99a814a1
AM		 2267 /* Note: message has already been issued.
2268 FIXME: what sort of recovery should we do?
2269 demand_rest_of_line (); return; ? */
252b5132
RH		 2270 }
2271
99a814a1
AM		 2272 /* Now get the symbol following the ']'. */
2273 expression (&ex);
252b5132
RH		 2274
2275 switch (toc_kind)
2276 {
2277 case default_toc:
99a814a1
AM		 2278 /* In this case, we may not have seen the symbol yet,
2279 since it is allowed to appear on a .extern or .globl
2280 or just be a label in the .data section. */
252b5132
RH		 2281 toc_reloc = BFD_RELOC_PPC_TOC16;
2282 break;
2283 case data_in_toc:
99a814a1
AM		 2284 /* 1. The symbol must be defined and either in the toc
2285 section, or a global.
2286 2. The reloc generated must have the TOCDEFN flag set
2287 in upper bit mess of the reloc type.
2288 FIXME: It's a little confusing what the tocv
2289 qualifier can be used for. At the very least, I've
2290 seen three uses, only one of which I'm sure I can
2291 explain. */
81d4177b
KH		 2292 if (ex.X_op == O_symbol)
2293 {
252b5132 2294 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2295 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2296 != tocdata_section)
252b5132 2297 {
99a814a1 2298 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2299 }
2300 }
2301
2302 toc_reloc = BFD_RELOC_PPC_TOC16;
2303 break;
2304 case must_be_32:
99a814a1
AM		 2305 /* FIXME: these next two specifically specify 32/64 bit
2306 toc entries. We don't support them today. Is this
2307 the right way to say that? */
252b5132
RH		 2308 toc_reloc = BFD_RELOC_UNUSED;
2309 as_bad (_("Unimplemented toc32 expression modifier"));
2310 break;
2311 case must_be_64:
99a814a1 2312 /* FIXME: see above. */
252b5132
RH		 2313 toc_reloc = BFD_RELOC_UNUSED;
2314 as_bad (_("Unimplemented toc64 expression modifier"));
2315 break;
2316 default:
bc805888 2317 fprintf (stderr,
99a814a1
AM		 2318 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2319 toc_kind);
bc805888 2320 abort ();
252b5132
RH		 2321 break;
2322 }
2323
2324 /* We need to generate a fixup for this expression. */
2325 if (fc >= MAX_INSN_FIXUPS)
2326 as_fatal (_("too many fixups"));
2327
2328 fixups[fc].reloc = toc_reloc;
2329 fixups[fc].exp = ex;
2330 fixups[fc].opindex = *opindex_ptr;
2331 ++fc;
2332
99a814a1
AM		 2333 /* Ok. We've set up the fixup for the instruction. Now make it
2334 look like the constant 0 was found here. */
252b5132
RH		 2335 ex.X_unsigned = 1;
2336 ex.X_op = O_constant;
2337 ex.X_add_number = 0;
2338 ex.X_add_symbol = NULL;
2339 ex.X_op_symbol = NULL;
2340 }
2341
2342 else
2343#endif /* TE_PE */
2344 {
2345 if (! register_name (&ex))
2346 {
2347 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2348 cr_operand = TRUE;
252b5132 2349 expression (&ex);
b34976b6 2350 cr_operand = FALSE;
252b5132
RH		 2351 }
2352 }
2353
2354 str = input_line_pointer;
2355 input_line_pointer = hold;
2356
2357 if (ex.X_op == O_illegal)
2358 as_bad (_("illegal operand"));
2359 else if (ex.X_op == O_absent)
2360 as_bad (_("missing operand"));
2361 else if (ex.X_op == O_register)
2362 {
2363 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2364 (char *) NULL, 0);
2365 }
2366 else if (ex.X_op == O_constant)
2367 {
2368#ifdef OBJ_ELF
81d4177b 2369 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2370 char *orig_str = str;
2371
2372 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2373 switch (reloc)
2374 {
2375 default:
2376 str = orig_str;
2377 break;
2378
2379 case BFD_RELOC_LO16:
2380 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2381 something which cleared it, we always produce a
2382 signed value. */
2383 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2384 ex.X_add_number &= 0xffff;
2385 else
0baf16f2 2386 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2387 break;
2388
2389 case BFD_RELOC_HI16:
0baf16f2
AM		 2390 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2391 ex.X_add_number = PPC_HI (ex.X_add_number);
2392 else
2393 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2394 break;
2395
2396 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2397 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2398 ex.X_add_number = PPC_HA (ex.X_add_number);
2399 else
2400 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2401 break;
2402
0baf16f2
AM		 2403 case BFD_RELOC_PPC64_HIGHER:
2404 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2405 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2406 else
2407 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2408 break;
2409
2410 case BFD_RELOC_PPC64_HIGHER_S:
2411 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2412 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2413 else
2414 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2415 break;
0baf16f2
AM		 2416
2417 case BFD_RELOC_PPC64_HIGHEST:
2418 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2419 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2420 else
2421 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2422 break;
2423
2424 case BFD_RELOC_PPC64_HIGHEST_S:
2425 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2426 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2427 else
2428 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2429 break;
252b5132 2430 }
0baf16f2 2431#endif /* OBJ_ELF */
252b5132
RH		 2432 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2433 (char *) NULL, 0);
2434 }
2435#ifdef OBJ_ELF
2436 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2437 {
cdba85ec
AM		 2438 /* Some TLS tweaks. */
2439 switch (reloc)
2440 {
2441 default:
2442 break;
2443 case BFD_RELOC_PPC_TLS:
2444 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2445 (char *) NULL, 0);
2446 break;
2447 /* We'll only use the 32 (or 64) bit form of these relocations
2448 in constants. Instructions get the 16 bit form. */
2449 case BFD_RELOC_PPC_DTPREL:
2450 reloc = BFD_RELOC_PPC_DTPREL16;
2451 break;
2452 case BFD_RELOC_PPC_TPREL:
2453 reloc = BFD_RELOC_PPC_TPREL16;
2454 break;
2455 }
2456
99a814a1
AM		 2457 /* For the absolute forms of branches, convert the PC
2458 relative form back into the absolute. */
252b5132
RH		 2459 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2460 {
2461 switch (reloc)
2462 {
2463 case BFD_RELOC_PPC_B26:
2464 reloc = BFD_RELOC_PPC_BA26;
2465 break;
2466 case BFD_RELOC_PPC_B16:
2467 reloc = BFD_RELOC_PPC_BA16;
2468 break;
2469 case BFD_RELOC_PPC_B16_BRTAKEN:
2470 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2471 break;
2472 case BFD_RELOC_PPC_B16_BRNTAKEN:
2473 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2474 break;
2475 default:
2476 break;
2477 }
2478 }
2479
2b3c4602 2480 if (ppc_obj64
adadcc0c 2481 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2482 {
2483 switch (reloc)
2484 {
2485 case BFD_RELOC_16:
2486 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2487 break;
2488 case BFD_RELOC_LO16:
2489 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2490 break;
2491 case BFD_RELOC_16_GOTOFF:
2492 reloc = BFD_RELOC_PPC64_GOT16_DS;
2493 break;
2494 case BFD_RELOC_LO16_GOTOFF:
2495 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2496 break;
2497 case BFD_RELOC_LO16_PLTOFF:
2498 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2499 break;
1cfc59d5 2500 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2501 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2502 break;
2503 case BFD_RELOC_LO16_BASEREL:
2504 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2505 break;
2506 case BFD_RELOC_PPC_TOC16:
2507 reloc = BFD_RELOC_PPC64_TOC16_DS;
2508 break;
2509 case BFD_RELOC_PPC64_TOC16_LO:
2510 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2511 break;
2512 case BFD_RELOC_PPC64_PLTGOT16:
2513 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2514 break;
2515 case BFD_RELOC_PPC64_PLTGOT16_LO:
2516 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2517 break;
cdba85ec
AM		 2518 case BFD_RELOC_PPC_DTPREL16:
2519 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2520 break;
2521 case BFD_RELOC_PPC_DTPREL16_LO:
2522 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2523 break;
2524 case BFD_RELOC_PPC_TPREL16:
2525 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2526 break;
2527 case BFD_RELOC_PPC_TPREL16_LO:
2528 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2529 break;
2530 case BFD_RELOC_PPC_GOT_DTPREL16:
2531 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2532 case BFD_RELOC_PPC_GOT_TPREL16:
2533 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2534 break;
0baf16f2
AM		 2535 default:
2536 as_bad (_("unsupported relocation for DS offset field"));
2537 break;
2538 }
2539 }
2540
252b5132
RH		 2541 /* We need to generate a fixup for this expression. */
2542 if (fc >= MAX_INSN_FIXUPS)
2543 as_fatal (_("too many fixups"));
2544 fixups[fc].exp = ex;
2545 fixups[fc].opindex = 0;
2546 fixups[fc].reloc = reloc;
2547 ++fc;
2548 }
2549#endif /* OBJ_ELF */
2550
2551 else
2552 {
2553 /* We need to generate a fixup for this expression. */
2554 if (fc >= MAX_INSN_FIXUPS)
2555 as_fatal (_("too many fixups"));
2556 fixups[fc].exp = ex;
2557 fixups[fc].opindex = *opindex_ptr;
2558 fixups[fc].reloc = BFD_RELOC_UNUSED;
2559 ++fc;
2560 }
2561
2562 if (need_paren)
2563 {
2564 endc = ')';
2565 need_paren = 0;
2566 }
2567 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2568 {
2569 endc = '(';
2570 need_paren = 1;
2571 }
2572 else
2573 endc = ',';
2574
2575 /* The call to expression should have advanced str past any
2576 whitespace. */
2577 if (*str != endc
2578 && (endc != ',' || *str != '\0'))
2579 {
2580 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2581 break;
2582 }
2583
2584 if (*str != '\0')
2585 ++str;
2586 }
2587
3882b010 2588 while (ISSPACE (*str))
252b5132
RH		 2589 ++str;
2590
2591 if (*str != '\0')
2592 as_bad (_("junk at end of line: `%s'"), str);
2593
dc1d03fc 2594#ifdef OBJ_ELF
6a0c61b7
EZ		 2595 /* Do we need/want a APUinfo section? */
2596 if (ppc_cpu & (PPC_OPCODE_SPE
2597 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2598 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2599 | PPC_OPCODE_RFMCI))
2600 {
2601 /* These are all version "1". */
2602 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2603 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2604 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2605 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2606 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2607 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2608 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2609 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2610 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2611 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2612 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2613 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2614 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2615 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2616 }
dc1d03fc 2617#endif
6a0c61b7 2618
252b5132
RH		 2619 /* Write out the instruction. */
2620 f = frag_more (4);
09b935ac
AM		 2621 addr_mod = frag_now_fix () & 3;
2622 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2623 as_bad (_("instruction address is not a multiple of 4"));
2624 frag_now->insn_addr = addr_mod;
2625 frag_now->has_code = 1;
252b5132
RH		 2626 md_number_to_chars (f, insn, 4);
2627
5d6f4f16
GK		 2628#ifdef OBJ_ELF
2629 dwarf2_emit_insn (4);
2630#endif
2631
252b5132
RH		 2632 /* Create any fixups. At this point we do not use a
2633 bfd_reloc_code_real_type, but instead just use the
2634 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2635 handle fixups for any operand type, although that is admittedly
2636 not a very exciting feature. We pick a BFD reloc type in
94f592af 2637 md_apply_fix3. */
252b5132
RH		 2638 for (i = 0; i < fc; i++)
2639 {
2640 const struct powerpc_operand *operand;
2641
2642 operand = &powerpc_operands[fixups[i].opindex];
2643 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2644 {
99a814a1 2645 reloc_howto_type *reloc_howto;
252b5132
RH		 2646 int size;
2647 int offset;
2648 fixS *fixP;
2649
99a814a1 2650 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2651 if (!reloc_howto)
2652 abort ();
2653
2654 size = bfd_get_reloc_size (reloc_howto);
2655 offset = target_big_endian ? (4 - size) : 0;
2656
2657 if (size < 1 || size > 4)
bc805888 2658 abort ();
252b5132 2659
99a814a1
AM		 2660 fixP = fix_new_exp (frag_now,
2661 f - frag_now->fr_literal + offset,
2662 size,
2663 &fixups[i].exp,
2664 reloc_howto->pc_relative,
252b5132
RH		 2665 fixups[i].reloc);
2666
2667 /* Turn off complaints that the addend is too large for things like
2668 foo+100000@ha. */
2669 switch (fixups[i].reloc)
2670 {
2671 case BFD_RELOC_16_GOTOFF:
2672 case BFD_RELOC_PPC_TOC16:
2673 case BFD_RELOC_LO16:
2674 case BFD_RELOC_HI16:
2675 case BFD_RELOC_HI16_S:
0baf16f2 2676#ifdef OBJ_ELF
0baf16f2
AM		 2677 case BFD_RELOC_PPC64_HIGHER:
2678 case BFD_RELOC_PPC64_HIGHER_S:
2679 case BFD_RELOC_PPC64_HIGHEST:
2680 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2681#endif
252b5132
RH		 2682 fixP->fx_no_overflow = 1;
2683 break;
2684 default:
2685 break;
2686 }
2687 }
2688 else
99a814a1
AM		 2689 fix_new_exp (frag_now,
2690 f - frag_now->fr_literal,
2691 4,
252b5132
RH		 2692 &fixups[i].exp,
2693 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2694 ((bfd_reloc_code_real_type)
99a814a1 2695 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2696 }
2697}
2698
2699/* Handle a macro. Gather all the operands, transform them as
2700 described by the macro, and call md_assemble recursively. All the
2701 operands are separated by commas; we don't accept parentheses
2702 around operands here. */
2703
2704static void
2705ppc_macro (str, macro)
2706 char *str;
2707 const struct powerpc_macro *macro;
2708{
2709 char *operands[10];
2710 unsigned int count;
2711 char *s;
2712 unsigned int len;
2713 const char *format;
2714 int arg;
2715 char *send;
2716 char *complete;
2717
2718 /* Gather the users operands into the operands array. */
2719 count = 0;
2720 s = str;
2721 while (1)
2722 {
2723 if (count >= sizeof operands / sizeof operands[0])
2724 break;
2725 operands[count++] = s;
2726 s = strchr (s, ',');
2727 if (s == (char *) NULL)
2728 break;
2729 *s++ = '\0';
81d4177b 2730 }
252b5132
RH		 2731
2732 if (count != macro->operands)
2733 {
2734 as_bad (_("wrong number of operands"));
2735 return;
2736 }
2737
2738 /* Work out how large the string must be (the size is unbounded
2739 because it includes user input). */
2740 len = 0;
2741 format = macro->format;
2742 while (*format != '\0')
2743 {
2744 if (*format != '%')
2745 {
2746 ++len;
2747 ++format;
2748 }
2749 else
2750 {
2751 arg = strtol (format + 1, &send, 10);
2752 know (send != format && arg >= 0 && arg < count);
2753 len += strlen (operands[arg]);
2754 format = send;
2755 }
2756 }
2757
2758 /* Put the string together. */
2759 complete = s = (char *) alloca (len + 1);
2760 format = macro->format;
2761 while (*format != '\0')
2762 {
2763 if (*format != '%')
2764 *s++ = *format++;
2765 else
2766 {
2767 arg = strtol (format + 1, &send, 10);
2768 strcpy (s, operands[arg]);
2769 s += strlen (s);
2770 format = send;
2771 }
2772 }
2773 *s = '\0';
2774
2775 /* Assemble the constructed instruction. */
2776 md_assemble (complete);
81d4177b 2777}
252b5132
RH		 2778\f
2779#ifdef OBJ_ELF
99a814a1 2780/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2781
2782int
2783ppc_section_letter (letter, ptr_msg)
2784 int letter;
2785 char **ptr_msg;
2786{
2787 if (letter == 'e')
2788 return SHF_EXCLUDE;
2789
13ae64f3 2790 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2791 return -1;
252b5132
RH		 2792}
2793
2794int
9de8d8f1
RH		 2795ppc_section_word (str, len)
2796 char *str;
2797 size_t len;
252b5132 2798{
9de8d8f1
RH		 2799 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2800 return SHF_EXCLUDE;
252b5132 2801
9de8d8f1 2802 return -1;
252b5132
RH		 2803}
2804
2805int
9de8d8f1
RH		 2806ppc_section_type (str, len)
2807 char *str;
2808 size_t len;
252b5132 2809{
9de8d8f1
RH		 2810 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2811 return SHT_ORDERED;
252b5132 2812
9de8d8f1 2813 return -1;
252b5132
RH		 2814}
2815
2816int
2817ppc_section_flags (flags, attr, type)
2818 int flags;
2819 int attr;
2820 int type;
2821{
2822 if (type == SHT_ORDERED)
2823 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2824
2825 if (attr & SHF_EXCLUDE)
2826 flags |= SEC_EXCLUDE;
2827
2828 return flags;
2829}
2830#endif /* OBJ_ELF */
2831
2832\f
2833/* Pseudo-op handling. */
2834
2835/* The .byte pseudo-op. This is similar to the normal .byte
2836 pseudo-op, but it can also take a single ASCII string. */
2837
2838static void
2839ppc_byte (ignore)
92161534 2840 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2841{
2842 if (*input_line_pointer != '\"')
2843 {
2844 cons (1);
2845 return;
2846 }
2847
2848 /* Gather characters. A real double quote is doubled. Unusual
2849 characters are not permitted. */
2850 ++input_line_pointer;
2851 while (1)
2852 {
2853 char c;
2854
2855 c = *input_line_pointer++;
2856
2857 if (c == '\"')
2858 {
2859 if (*input_line_pointer != '\"')
2860 break;
2861 ++input_line_pointer;
2862 }
2863
2864 FRAG_APPEND_1_CHAR (c);
2865 }
2866
2867 demand_empty_rest_of_line ();
2868}
2869\f
2870#ifdef OBJ_XCOFF
2871
2872/* XCOFF specific pseudo-op handling. */
2873
2874/* This is set if we are creating a .stabx symbol, since we don't want
2875 to handle symbol suffixes for such symbols. */
b34976b6 2876static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2877
2878/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2879 symbols in the .bss segment as though they were local common
67c1ffbe 2880 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2881 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2882
2883static void
2884ppc_comm (lcomm)
2885 int lcomm;
2886{
2887 asection *current_seg = now_seg;
2888 subsegT current_subseg = now_subseg;
2889 char *name;
2890 char endc;
2891 char *end_name;
2892 offsetT size;
2893 offsetT align;
2894 symbolS *lcomm_sym = NULL;
2895 symbolS *sym;
2896 char *pfrag;
2897
2898 name = input_line_pointer;
2899 endc = get_symbol_end ();
2900 end_name = input_line_pointer;
2901 *end_name = endc;
2902
2903 if (*input_line_pointer != ',')
2904 {
2905 as_bad (_("missing size"));
2906 ignore_rest_of_line ();
2907 return;
2908 }
2909 ++input_line_pointer;
2910
2911 size = get_absolute_expression ();
2912 if (size < 0)
2913 {
2914 as_bad (_("negative size"));
2915 ignore_rest_of_line ();
2916 return;
2917 }
2918
2919 if (! lcomm)
2920 {
2921 /* The third argument to .comm is the alignment. */
2922 if (*input_line_pointer != ',')
1ad63b2f 2923 align = 2;
252b5132
RH		 2924 else
2925 {
2926 ++input_line_pointer;
2927 align = get_absolute_expression ();
2928 if (align <= 0)
2929 {
2930 as_warn (_("ignoring bad alignment"));
1ad63b2f 2931 align = 2;
252b5132
RH		 2932 }
2933 }
2934 }
2935 else
2936 {
2937 char *lcomm_name;
2938 char lcomm_endc;
2939
1ad63b2f 2940 if (size <= 4)
252b5132
RH		 2941 align = 2;
2942 else
2943 align = 3;
2944
2945 /* The third argument to .lcomm appears to be the real local
2946 common symbol to create. References to the symbol named in
2947 the first argument are turned into references to the third
2948 argument. */
2949 if (*input_line_pointer != ',')
2950 {
2951 as_bad (_("missing real symbol name"));
2952 ignore_rest_of_line ();
2953 return;
2954 }
2955 ++input_line_pointer;
2956
2957 lcomm_name = input_line_pointer;
2958 lcomm_endc = get_symbol_end ();
81d4177b 2959
252b5132
RH		 2960 lcomm_sym = symbol_find_or_make (lcomm_name);
2961
2962 *input_line_pointer = lcomm_endc;
2963 }
2964
2965 *end_name = '\0';
2966 sym = symbol_find_or_make (name);
2967 *end_name = endc;
2968
2969 if (S_IS_DEFINED (sym)
2970 || S_GET_VALUE (sym) != 0)
2971 {
2972 as_bad (_("attempt to redefine symbol"));
2973 ignore_rest_of_line ();
2974 return;
2975 }
81d4177b 2976
252b5132 2977 record_alignment (bss_section, align);
81d4177b 2978
252b5132
RH		 2979 if (! lcomm
2980 || ! S_IS_DEFINED (lcomm_sym))
2981 {
2982 symbolS *def_sym;
2983 offsetT def_size;
2984
2985 if (! lcomm)
2986 {
2987 def_sym = sym;
2988 def_size = size;
2989 S_SET_EXTERNAL (sym);
2990 }
2991 else
2992 {
809ffe0d 2993 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 2994 def_sym = lcomm_sym;
2995 def_size = 0;
2996 }
2997
2998 subseg_set (bss_section, 1);
2999 frag_align (align, 0, 0);
81d4177b 3000
809ffe0d 3001 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3002 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3003 def_size, (char *) NULL);
3004 *pfrag = 0;
3005 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3006 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3007 }
3008 else if (lcomm)
3009 {
3010 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3011 symbol_get_frag (lcomm_sym)->fr_offset =
3012 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3013 &~ ((1 << align) - 1));
809ffe0d
ILT		 3014 if (align > symbol_get_tc (lcomm_sym)->align)
3015 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3016 }
3017
3018 if (lcomm)
3019 {
3020 /* Make sym an offset from lcomm_sym. */
3021 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3022 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3023 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3024 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3025 }
3026
3027 subseg_set (current_seg, current_subseg);
3028
3029 demand_empty_rest_of_line ();
3030}
3031
3032/* The .csect pseudo-op. This switches us into a different
3033 subsegment. The first argument is a symbol whose value is the
3034 start of the .csect. In COFF, csect symbols get special aux
3035 entries defined by the x_csect field of union internal_auxent. The
3036 optional second argument is the alignment (the default is 2). */
3037
3038static void
3039ppc_csect (ignore)
5480ccf3 3040 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3041{
3042 char *name;
3043 char endc;
3044 symbolS *sym;
931e13a6 3045 offsetT align;
252b5132
RH		 3046
3047 name = input_line_pointer;
3048 endc = get_symbol_end ();
81d4177b 3049
252b5132
RH		 3050 sym = symbol_find_or_make (name);
3051
3052 *input_line_pointer = endc;
3053
3054 if (S_GET_NAME (sym)[0] == '\0')
3055 {
3056 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3057 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3058 }
3059
931e13a6 3060 align = 2;
252b5132
RH		 3061 if (*input_line_pointer == ',')
3062 {
3063 ++input_line_pointer;
931e13a6 3064 align = get_absolute_expression ();
252b5132
RH		 3065 }
3066
931e13a6
AM		 3067 ppc_change_csect (sym, align);
3068
252b5132
RH		 3069 demand_empty_rest_of_line ();
3070}
3071
3072/* Change to a different csect. */
3073
3074static void
931e13a6 3075ppc_change_csect (sym, align)
252b5132 3076 symbolS *sym;
931e13a6 3077 offsetT align;
252b5132
RH		 3078{
3079 if (S_IS_DEFINED (sym))
809ffe0d 3080 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3081 else
3082 {
3083 symbolS **list_ptr;
3084 int after_toc;
3085 int hold_chunksize;
3086 symbolS *list;
931e13a6
AM		 3087 int is_code;
3088 segT sec;
252b5132
RH		 3089
3090 /* This is a new csect. We need to look at the symbol class to
3091 figure out whether it should go in the text section or the
3092 data section. */
3093 after_toc = 0;
931e13a6 3094 is_code = 0;
809ffe0d 3095 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3096 {
3097 case XMC_PR:
3098 case XMC_RO:
3099 case XMC_DB:
3100 case XMC_GL:
3101 case XMC_XO:
3102 case XMC_SV:
3103 case XMC_TI:
3104 case XMC_TB:
3105 S_SET_SEGMENT (sym, text_section);
809ffe0d 3106 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3107 ++ppc_text_subsegment;
3108 list_ptr = &ppc_text_csects;
931e13a6 3109 is_code = 1;
252b5132
RH		 3110 break;
3111 case XMC_RW:
3112 case XMC_TC0:
3113 case XMC_TC:
3114 case XMC_DS:
3115 case XMC_UA:
3116 case XMC_BS:
3117 case XMC_UC:
3118 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3119 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3120 == ppc_data_subsegment))
252b5132
RH		 3121 after_toc = 1;
3122 S_SET_SEGMENT (sym, data_section);
809ffe0d 3123 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3124 ++ppc_data_subsegment;
3125 list_ptr = &ppc_data_csects;
3126 break;
3127 default:
3128 abort ();
3129 }
3130
3131 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3132 changing subsegments, so that we don't use a lot of memory
3133 space for what may be a small section. */
252b5132
RH		 3134 hold_chunksize = chunksize;
3135 chunksize = 64;
3136
931e13a6
AM		 3137 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3138 symbol_get_tc (sym)->subseg);
252b5132
RH		 3139
3140 chunksize = hold_chunksize;
3141
3142 if (after_toc)
3143 ppc_after_toc_frag = frag_now;
3144
931e13a6
AM		 3145 record_alignment (sec, align);
3146 if (is_code)
3147 frag_align_code (align, 0);
3148 else
3149 frag_align (align, 0, 0);
3150
809ffe0d 3151 symbol_set_frag (sym, frag_now);
252b5132
RH		 3152 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3153
931e13a6 3154 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3155 symbol_get_tc (sym)->output = 1;
3156 symbol_get_tc (sym)->within = sym;
81d4177b 3157
252b5132 3158 for (list = *list_ptr;
809ffe0d
ILT		 3159 symbol_get_tc (list)->next != (symbolS *) NULL;
3160 list = symbol_get_tc (list)->next)
252b5132 3161 ;
809ffe0d 3162 symbol_get_tc (list)->next = sym;
81d4177b 3163
252b5132 3164 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3165 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3166 &symbol_lastP);
252b5132
RH		 3167 }
3168
3169 ppc_current_csect = sym;
3170}
3171
3172/* This function handles the .text and .data pseudo-ops. These
3173 pseudo-ops aren't really used by XCOFF; we implement them for the
3174 convenience of people who aren't used to XCOFF. */
3175
3176static void
3177ppc_section (type)
3178 int type;
3179{
3180 const char *name;
3181 symbolS *sym;
3182
3183 if (type == 't')
3184 name = ".text[PR]";
3185 else if (type == 'd')
3186 name = ".data[RW]";
3187 else
3188 abort ();
3189
3190 sym = symbol_find_or_make (name);
3191
931e13a6 3192 ppc_change_csect (sym, 2);
252b5132
RH		 3193
3194 demand_empty_rest_of_line ();
3195}
3196
3197/* This function handles the .section pseudo-op. This is mostly to
3198 give an error, since XCOFF only supports .text, .data and .bss, but
3199 we do permit the user to name the text or data section. */
3200
3201static void
3202ppc_named_section (ignore)
5480ccf3 3203 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3204{
3205 char *user_name;
3206 const char *real_name;
3207 char c;
3208 symbolS *sym;
3209
3210 user_name = input_line_pointer;
3211 c = get_symbol_end ();
3212
3213 if (strcmp (user_name, ".text") == 0)
3214 real_name = ".text[PR]";
3215 else if (strcmp (user_name, ".data") == 0)
3216 real_name = ".data[RW]";
3217 else
3218 {
3219 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3220 *input_line_pointer = c;
3221 ignore_rest_of_line ();
3222 return;
3223 }
3224
3225 *input_line_pointer = c;
3226
3227 sym = symbol_find_or_make (real_name);
3228
931e13a6 3229 ppc_change_csect (sym, 2);
252b5132
RH		 3230
3231 demand_empty_rest_of_line ();
3232}
3233
3234/* The .extern pseudo-op. We create an undefined symbol. */
3235
3236static void
3237ppc_extern (ignore)
5480ccf3 3238 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3239{
3240 char *name;
3241 char endc;
3242
3243 name = input_line_pointer;
3244 endc = get_symbol_end ();
3245
3246 (void) symbol_find_or_make (name);
3247
3248 *input_line_pointer = endc;
3249
3250 demand_empty_rest_of_line ();
3251}
3252
3253/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3254
3255static void
3256ppc_lglobl (ignore)
5480ccf3 3257 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3258{
3259 char *name;
3260 char endc;
3261 symbolS *sym;
3262
3263 name = input_line_pointer;
3264 endc = get_symbol_end ();
3265
3266 sym = symbol_find_or_make (name);
3267
3268 *input_line_pointer = endc;
3269
809ffe0d 3270 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3271
3272 demand_empty_rest_of_line ();
3273}
3274
3275/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3276 although I don't know why it bothers. */
3277
3278static void
3279ppc_rename (ignore)
5480ccf3 3280 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3281{
3282 char *name;
3283 char endc;
3284 symbolS *sym;
3285 int len;
3286
3287 name = input_line_pointer;
3288 endc = get_symbol_end ();
3289
3290 sym = symbol_find_or_make (name);
3291
3292 *input_line_pointer = endc;
3293
3294 if (*input_line_pointer != ',')
3295 {
3296 as_bad (_("missing rename string"));
3297 ignore_rest_of_line ();
3298 return;
3299 }
3300 ++input_line_pointer;
3301
809ffe0d 3302 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3303
3304 demand_empty_rest_of_line ();
3305}
3306
3307/* The .stabx pseudo-op. This is similar to a normal .stabs
3308 pseudo-op, but slightly different. A sample is
3309 .stabx "main:F-1",.main,142,0
3310 The first argument is the symbol name to create. The second is the
3311 value, and the third is the storage class. The fourth seems to be
3312 always zero, and I am assuming it is the type. */
3313
3314static void
3315ppc_stabx (ignore)
5480ccf3 3316 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3317{
3318 char *name;
3319 int len;
3320 symbolS *sym;
3321 expressionS exp;
3322
3323 name = demand_copy_C_string (&len);
3324
3325 if (*input_line_pointer != ',')
3326 {
3327 as_bad (_("missing value"));
3328 return;
3329 }
3330 ++input_line_pointer;
3331
b34976b6 3332 ppc_stab_symbol = TRUE;
252b5132 3333 sym = symbol_make (name);
b34976b6 3334 ppc_stab_symbol = FALSE;
252b5132 3335
809ffe0d 3336 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3337
3338 (void) expression (&exp);
3339
3340 switch (exp.X_op)
3341 {
3342 case O_illegal:
3343 case O_absent:
3344 case O_big:
3345 as_bad (_("illegal .stabx expression; zero assumed"));
3346 exp.X_add_number = 0;
3347 /* Fall through. */
3348 case O_constant:
3349 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3350 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3351 break;
3352
3353 case O_symbol:
3354 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3355 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3356 else
3357 {
3358 S_SET_VALUE (sym,
3359 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3360 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3361 }
3362 break;
3363
3364 default:
3365 /* The value is some complex expression. This will probably
99a814a1
AM		 3366 fail at some later point, but this is probably the right
3367 thing to do here. */
809ffe0d 3368 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3369 break;
3370 }
3371
3372 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3373 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3374
3375 if (*input_line_pointer != ',')
3376 {
3377 as_bad (_("missing class"));
3378 return;
3379 }
3380 ++input_line_pointer;
3381
3382 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3383
3384 if (*input_line_pointer != ',')
3385 {
3386 as_bad (_("missing type"));
3387 return;
3388 }
3389 ++input_line_pointer;
3390
3391 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3392
809ffe0d 3393 symbol_get_tc (sym)->output = 1;
252b5132 3394
6877bb43 3395 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3396
809ffe0d 3397 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3398
41ea10b1 3399 /* In this case :
99a814a1 3400
41ea10b1
TR		 3401 .bs name
3402 .stabx "z",arrays_,133,0
3403 .es
99a814a1 3404
41ea10b1 3405 .comm arrays_,13768,3
99a814a1 3406
41ea10b1
TR		 3407 resolve_symbol_value will copy the exp's "within" into sym's when the
3408 offset is 0. Since this seems to be corner case problem,
3409 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3410 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3411
3412 if (exp.X_op == O_symbol)
41ea10b1
TR		 3413 {
3414 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3415 }
6877bb43 3416 }
99a814a1 3417
252b5132
RH		 3418 if (exp.X_op != O_symbol
3419 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3420 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3421 ppc_frob_label (sym);
3422 else
3423 {
3424 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3425 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3426 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3427 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3428 }
3429
3430 demand_empty_rest_of_line ();
3431}
3432
3433/* The .function pseudo-op. This takes several arguments. The first
3434 argument seems to be the external name of the symbol. The second
67c1ffbe 3435 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3436 uses the same name for both. I have no idea what the third and
3437 fourth arguments are meant to be. The optional fifth argument is
3438 an expression for the size of the function. In COFF this symbol
3439 gets an aux entry like that used for a csect. */
3440
3441static void
3442ppc_function (ignore)
5480ccf3 3443 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3444{
3445 char *name;
3446 char endc;
3447 char *s;
3448 symbolS *ext_sym;
3449 symbolS *lab_sym;
3450
3451 name = input_line_pointer;
3452 endc = get_symbol_end ();
3453
3454 /* Ignore any [PR] suffix. */
3455 name = ppc_canonicalize_symbol_name (name);
3456 s = strchr (name, '[');
3457 if (s != (char *) NULL
3458 && strcmp (s + 1, "PR]") == 0)
3459 *s = '\0';
3460
3461 ext_sym = symbol_find_or_make (name);
3462
3463 *input_line_pointer = endc;
3464
3465 if (*input_line_pointer != ',')
3466 {
3467 as_bad (_("missing symbol name"));
3468 ignore_rest_of_line ();
3469 return;
3470 }
3471 ++input_line_pointer;
3472
3473 name = input_line_pointer;
3474 endc = get_symbol_end ();
3475
3476 lab_sym = symbol_find_or_make (name);
3477
3478 *input_line_pointer = endc;
3479
3480 if (ext_sym != lab_sym)
3481 {
809ffe0d
ILT		 3482 expressionS exp;
3483
3484 exp.X_op = O_symbol;
3485 exp.X_add_symbol = lab_sym;
3486 exp.X_op_symbol = NULL;
3487 exp.X_add_number = 0;
3488 exp.X_unsigned = 0;
3489 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3490 }
3491
809ffe0d
ILT		 3492 if (symbol_get_tc (ext_sym)->class == -1)
3493 symbol_get_tc (ext_sym)->class = XMC_PR;
3494 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3495
3496 if (*input_line_pointer == ',')
3497 {
3498 expressionS ignore;
3499
3500 /* Ignore the third argument. */
3501 ++input_line_pointer;
3502 expression (&ignore);
3503 if (*input_line_pointer == ',')
3504 {
3505 /* Ignore the fourth argument. */
3506 ++input_line_pointer;
3507 expression (&ignore);
3508 if (*input_line_pointer == ',')
3509 {
3510 /* The fifth argument is the function size. */
3511 ++input_line_pointer;
809ffe0d
ILT		 3512 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3513 absolute_section,
3514 (valueT) 0,
3515 &zero_address_frag);
3516 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3517 }
3518 }
3519 }
3520
3521 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3522 SF_SET_FUNCTION (ext_sym);
3523 SF_SET_PROCESS (ext_sym);
3524 coff_add_linesym (ext_sym);
3525
3526 demand_empty_rest_of_line ();
3527}
3528
3529/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3530 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3531 with the correct line number */
5d6255fe 3532
8642cce8 3533static symbolS *saved_bi_sym = 0;
252b5132
RH		 3534
3535static void
3536ppc_bf (ignore)
5480ccf3 3537 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3538{
3539 symbolS *sym;
3540
3541 sym = symbol_make (".bf");
3542 S_SET_SEGMENT (sym, text_section);
809ffe0d 3543 symbol_set_frag (sym, frag_now);
252b5132
RH		 3544 S_SET_VALUE (sym, frag_now_fix ());
3545 S_SET_STORAGE_CLASS (sym, C_FCN);
3546
3547 coff_line_base = get_absolute_expression ();
3548
3549 S_SET_NUMBER_AUXILIARY (sym, 1);
3550 SA_SET_SYM_LNNO (sym, coff_line_base);
3551
8642cce8 3552 /* Line number for bi. */
5d6255fe 3553 if (saved_bi_sym)
8642cce8
TR		 3554 {
3555 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3556 saved_bi_sym = 0;
3557 }
5d6255fe 3558
8642cce8 3559
809ffe0d 3560 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3561
3562 ppc_frob_label (sym);
3563
3564 demand_empty_rest_of_line ();
3565}
3566
3567/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3568 ".ef", except that the line number is absolute, not relative to the
3569 most recent ".bf" symbol. */
3570
3571static void
3572ppc_ef (ignore)
5480ccf3 3573 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3574{
3575 symbolS *sym;
3576
3577 sym = symbol_make (".ef");
3578 S_SET_SEGMENT (sym, text_section);
809ffe0d 3579 symbol_set_frag (sym, frag_now);
252b5132
RH		 3580 S_SET_VALUE (sym, frag_now_fix ());
3581 S_SET_STORAGE_CLASS (sym, C_FCN);
3582 S_SET_NUMBER_AUXILIARY (sym, 1);
3583 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3584 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3585
3586 ppc_frob_label (sym);
3587
3588 demand_empty_rest_of_line ();
3589}
3590
3591/* The .bi and .ei pseudo-ops. These take a string argument and
3592 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3593 the symbol list. The value of .bi will be know when the next .bf
3594 is encountered. */
252b5132
RH		 3595
3596static void
3597ppc_biei (ei)
3598 int ei;
3599{
3600 static symbolS *last_biei;
3601
3602 char *name;
3603 int len;
3604 symbolS *sym;
3605 symbolS *look;
3606
3607 name = demand_copy_C_string (&len);
3608
3609 /* The value of these symbols is actually file offset. Here we set
3610 the value to the index into the line number entries. In
3611 ppc_frob_symbols we set the fix_line field, which will cause BFD
3612 to do the right thing. */
3613
3614 sym = symbol_make (name);
3615 /* obj-coff.c currently only handles line numbers correctly in the
3616 .text section. */
3617 S_SET_SEGMENT (sym, text_section);
3618 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3619 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3620
3621 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3622 symbol_get_tc (sym)->output = 1;
81d4177b 3623
8642cce8 3624 /* Save bi. */
5d6255fe 3625 if (ei)
8642cce8
TR		 3626 saved_bi_sym = 0;
3627 else
3628 saved_bi_sym = sym;
3629
252b5132
RH		 3630 for (look = last_biei ? last_biei : symbol_rootP;
3631 (look != (symbolS *) NULL
3632 && (S_GET_STORAGE_CLASS (look) == C_FILE
3633 || S_GET_STORAGE_CLASS (look) == C_BINCL
3634 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3635 look = symbol_next (look))
3636 ;
3637 if (look != (symbolS *) NULL)
3638 {
3639 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3640 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3641 last_biei = sym;
3642 }
3643
3644 demand_empty_rest_of_line ();
3645}
3646
3647/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3648 There is one argument, which is a csect symbol. The value of the
3649 .bs symbol is the index of this csect symbol. */
3650
3651static void
3652ppc_bs (ignore)
5480ccf3 3653 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3654{
3655 char *name;
3656 char endc;
3657 symbolS *csect;
3658 symbolS *sym;
3659
3660 if (ppc_current_block != NULL)
3661 as_bad (_("nested .bs blocks"));
3662
3663 name = input_line_pointer;
3664 endc = get_symbol_end ();
3665
3666 csect = symbol_find_or_make (name);
3667
3668 *input_line_pointer = endc;
3669
3670 sym = symbol_make (".bs");
3671 S_SET_SEGMENT (sym, now_seg);
3672 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3673 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3674 symbol_get_tc (sym)->output = 1;
252b5132 3675
809ffe0d 3676 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3677
3678 ppc_frob_label (sym);
3679
3680 ppc_current_block = sym;
3681
3682 demand_empty_rest_of_line ();
3683}
3684
3685/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3686
3687static void
3688ppc_es (ignore)
5480ccf3 3689 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3690{
3691 symbolS *sym;
3692
3693 if (ppc_current_block == NULL)
3694 as_bad (_(".es without preceding .bs"));
3695
3696 sym = symbol_make (".es");
3697 S_SET_SEGMENT (sym, now_seg);
3698 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3699 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3700 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3701
3702 ppc_frob_label (sym);
3703
3704 ppc_current_block = NULL;
3705
3706 demand_empty_rest_of_line ();
3707}
3708
3709/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3710 line number. */
3711
3712static void
3713ppc_bb (ignore)
5480ccf3 3714 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3715{
3716 symbolS *sym;
3717
3718 sym = symbol_make (".bb");
3719 S_SET_SEGMENT (sym, text_section);
809ffe0d 3720 symbol_set_frag (sym, frag_now);
252b5132
RH		 3721 S_SET_VALUE (sym, frag_now_fix ());
3722 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3723
3724 S_SET_NUMBER_AUXILIARY (sym, 1);
3725 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3726
809ffe0d 3727 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3728
3729 SF_SET_PROCESS (sym);
3730
3731 ppc_frob_label (sym);
3732
3733 demand_empty_rest_of_line ();
3734}
3735
3736/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3737 line number. */
3738
3739static void
3740ppc_eb (ignore)
5480ccf3 3741 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3742{
3743 symbolS *sym;
3744
3745 sym = symbol_make (".eb");
3746 S_SET_SEGMENT (sym, text_section);
809ffe0d 3747 symbol_set_frag (sym, frag_now);
252b5132
RH		 3748 S_SET_VALUE (sym, frag_now_fix ());
3749 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3750 S_SET_NUMBER_AUXILIARY (sym, 1);
3751 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3752 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3753
3754 SF_SET_PROCESS (sym);
3755
3756 ppc_frob_label (sym);
3757
3758 demand_empty_rest_of_line ();
3759}
3760
3761/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3762 specified name. */
3763
3764static void
3765ppc_bc (ignore)
5480ccf3 3766 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3767{
3768 char *name;
3769 int len;
3770 symbolS *sym;
3771
3772 name = demand_copy_C_string (&len);
3773 sym = symbol_make (name);
3774 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3775 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3776 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3777 S_SET_VALUE (sym, 0);
809ffe0d 3778 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3779
3780 ppc_frob_label (sym);
3781
3782 demand_empty_rest_of_line ();
3783}
3784
3785/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3786
3787static void
3788ppc_ec (ignore)
5480ccf3 3789 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3790{
3791 symbolS *sym;
3792
3793 sym = symbol_make (".ec");
3794 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3795 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3796 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3797 S_SET_VALUE (sym, 0);
809ffe0d 3798 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3799
3800 ppc_frob_label (sym);
3801
3802 demand_empty_rest_of_line ();
3803}
3804
3805/* The .toc pseudo-op. Switch to the .toc subsegment. */
3806
3807static void
3808ppc_toc (ignore)
5480ccf3 3809 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3810{
3811 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3812 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3813 else
3814 {
3815 subsegT subseg;
3816 symbolS *sym;
3817 symbolS *list;
81d4177b 3818
252b5132
RH		 3819 subseg = ppc_data_subsegment;
3820 ++ppc_data_subsegment;
3821
3822 subseg_new (segment_name (data_section), subseg);
3823 ppc_toc_frag = frag_now;
3824
3825 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3826 symbol_set_frag (sym, frag_now);
252b5132
RH		 3827 S_SET_SEGMENT (sym, data_section);
3828 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3829 symbol_get_tc (sym)->subseg = subseg;
3830 symbol_get_tc (sym)->output = 1;
3831 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3832
3833 ppc_toc_csect = sym;
81d4177b 3834
252b5132 3835 for (list = ppc_data_csects;
809ffe0d
ILT		 3836 symbol_get_tc (list)->next != (symbolS *) NULL;
3837 list = symbol_get_tc (list)->next)
252b5132 3838 ;
809ffe0d 3839 symbol_get_tc (list)->next = sym;
252b5132
RH		 3840
3841 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3842 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3843 &symbol_lastP);
252b5132
RH		 3844 }
3845
3846 ppc_current_csect = ppc_toc_csect;
3847
3848 demand_empty_rest_of_line ();
3849}
3850
3851/* The AIX assembler automatically aligns the operands of a .long or
3852 .short pseudo-op, and we want to be compatible. */
3853
3854static void
3855ppc_xcoff_cons (log_size)
3856 int log_size;
3857{
3858 frag_align (log_size, 0, 0);
3859 record_alignment (now_seg, log_size);
3860 cons (1 << log_size);
3861}
3862
3863static void
3864ppc_vbyte (dummy)
5480ccf3 3865 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3866{
3867 expressionS exp;
3868 int byte_count;
3869
3870 (void) expression (&exp);
3871
3872 if (exp.X_op != O_constant)
3873 {
3874 as_bad (_("non-constant byte count"));
3875 return;
3876 }
3877
3878 byte_count = exp.X_add_number;
3879
3880 if (*input_line_pointer != ',')
3881 {
3882 as_bad (_("missing value"));
3883 return;
3884 }
3885
3886 ++input_line_pointer;
3887 cons (byte_count);
3888}
3889
3890#endif /* OBJ_XCOFF */
0baf16f2 3891#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3892\f
3893/* The .tc pseudo-op. This is used when generating either XCOFF or
3894 ELF. This takes two or more arguments.
3895
3896 When generating XCOFF output, the first argument is the name to
3897 give to this location in the toc; this will be a symbol with class
0baf16f2 3898 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3899 this location in the TOC; often there is just one more argument, a
1049f94e 3900 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3901 depends on target word size. A 32-bit target uses 4-byte values, a
3902 64-bit target uses 8-byte values.
252b5132
RH		 3903
3904 When not generating XCOFF output, the arguments are the same, but
3905 the first argument is simply ignored. */
3906
3907static void
3908ppc_tc (ignore)
92161534 3909 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3910{
3911#ifdef OBJ_XCOFF
3912
3913 /* Define the TOC symbol name. */
3914 {
3915 char *name;
3916 char endc;
3917 symbolS *sym;
3918
3919 if (ppc_toc_csect == (symbolS *) NULL
3920 || ppc_toc_csect != ppc_current_csect)
3921 {
3922 as_bad (_(".tc not in .toc section"));
3923 ignore_rest_of_line ();
3924 return;
3925 }
3926
3927 name = input_line_pointer;
3928 endc = get_symbol_end ();
3929
3930 sym = symbol_find_or_make (name);
3931
3932 *input_line_pointer = endc;
3933
3934 if (S_IS_DEFINED (sym))
3935 {
3936 symbolS *label;
3937
809ffe0d
ILT		 3938 label = symbol_get_tc (ppc_current_csect)->within;
3939 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3940 {
3941 as_bad (_(".tc with no label"));
3942 ignore_rest_of_line ();
3943 return;
3944 }
3945
3946 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3947 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3948 S_SET_VALUE (label, S_GET_VALUE (sym));
3949
3950 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3951 ++input_line_pointer;
3952
3953 return;
3954 }
3955
3956 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3957 symbol_set_frag (sym, frag_now);
252b5132 3958 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3959 symbol_get_tc (sym)->class = XMC_TC;
3960 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3961
3962 ppc_frob_label (sym);
3963 }
3964
0baf16f2
AM		 3965#endif /* OBJ_XCOFF */
3966#ifdef OBJ_ELF
9c7977b3 3967 int align;
252b5132
RH		 3968
3969 /* Skip the TOC symbol name. */
3970 while (is_part_of_name (*input_line_pointer)
3971 || *input_line_pointer == '['
3972 || *input_line_pointer == ']'
3973 || *input_line_pointer == '{'
3974 || *input_line_pointer == '}')
3975 ++input_line_pointer;
3976
0baf16f2 3977 /* Align to a four/eight byte boundary. */
2b3c4602 3978 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 3979 frag_align (align, 0, 0);
3980 record_alignment (now_seg, align);
0baf16f2 3981#endif /* OBJ_ELF */
252b5132
RH		 3982
3983 if (*input_line_pointer != ',')
3984 demand_empty_rest_of_line ();
3985 else
3986 {
3987 ++input_line_pointer;
2b3c4602 3988 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 3989 }
3990}
0baf16f2
AM		 3991
3992/* Pseudo-op .machine. */
0baf16f2
AM		 3993
3994static void
3995ppc_machine (ignore)
3996 int ignore ATTRIBUTE_UNUSED;
3997{
69c040df
AM		 3998 char *cpu_string;
3999#define MAX_HISTORY 100
4000 static unsigned long *cpu_history;
4001 static int curr_hist;
4002
4003 SKIP_WHITESPACE ();
4004
4005 if (*input_line_pointer == '"')
4006 {
4007 int len;
4008 cpu_string = demand_copy_C_string (&len);
4009 }
4010 else
4011 {
4012 char c;
4013 cpu_string = input_line_pointer;
4014 c = get_symbol_end ();
4015 cpu_string = xstrdup (cpu_string);
4016 *input_line_pointer = c;
4017 }
4018
4019 if (cpu_string != NULL)
4020 {
4021 unsigned long old_cpu = ppc_cpu;
4022 char *p;
4023
4024 for (p = cpu_string; *p != 0; p++)
4025 *p = TOLOWER (*p);
4026
4027 if (strcmp (cpu_string, "push") == 0)
4028 {
4029 if (cpu_history == NULL)
4030 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4031
4032 if (curr_hist >= MAX_HISTORY)
4033 as_bad (_(".machine stack overflow"));
4034 else
4035 cpu_history[curr_hist++] = ppc_cpu;
4036 }
4037 else if (strcmp (cpu_string, "pop") == 0)
4038 {
4039 if (curr_hist <= 0)
4040 as_bad (_(".machine stack underflow"));
4041 else
4042 ppc_cpu = cpu_history[--curr_hist];
4043 }
4044 else if (parse_cpu (cpu_string))
4045 ;
4046 else
4047 as_bad (_("invalid machine `%s'"), cpu_string);
4048
4049 if (ppc_cpu != old_cpu)
4050 ppc_setup_opcodes ();
4051 }
4052
4053 demand_empty_rest_of_line ();
0baf16f2
AM		 4054}
4055
4056/* See whether a symbol is in the TOC section. */
4057
4058static int
4059ppc_is_toc_sym (sym)
4060 symbolS *sym;
4061{
4062#ifdef OBJ_XCOFF
4063 return symbol_get_tc (sym)->class == XMC_TC;
4064#endif
4065#ifdef OBJ_ELF
4066 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4067 if (ppc_obj64)
0baf16f2
AM		 4068 return strcmp (sname, ".toc") == 0;
4069 else
4070 return strcmp (sname, ".got") == 0;
4071#endif
4072}
4073#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4074\f
4075#ifdef TE_PE
4076
99a814a1 4077/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4078
4079/* Set the current section. */
4080static void
4081ppc_set_current_section (new)
4082 segT new;
4083{
4084 ppc_previous_section = ppc_current_section;
4085 ppc_current_section = new;
4086}
4087
4088/* pseudo-op: .previous
4089 behaviour: toggles the current section with the previous section.
4090 errors: None
99a814a1
AM		 4091 warnings: "No previous section" */
4092
252b5132 4093static void
99a814a1 4094ppc_previous (ignore)
5480ccf3 4095 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4096{
4097 symbolS *tmp;
4098
81d4177b 4099 if (ppc_previous_section == NULL)
252b5132 4100 {
99a814a1 4101 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4102 return;
4103 }
4104
99a814a1 4105 subseg_set (ppc_previous_section, 0);
252b5132 4106
99a814a1 4107 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4108}
4109
4110/* pseudo-op: .pdata
4111 behaviour: predefined read only data section
b34976b6 4112 double word aligned
252b5132
RH		 4113 errors: None
4114 warnings: None
4115 initial: .section .pdata "adr3"
b34976b6 4116 a - don't know -- maybe a misprint
252b5132
RH		 4117 d - initialized data
4118 r - readable
4119 3 - double word aligned (that would be 4 byte boundary)
4120
4121 commentary:
4122 Tag index tables (also known as the function table) for exception
99a814a1 4123 handling, debugging, etc. */
252b5132 4124
252b5132 4125static void
99a814a1 4126ppc_pdata (ignore)
5480ccf3 4127 int ignore ATTRIBUTE_UNUSED;
252b5132 4128{
81d4177b 4129 if (pdata_section == 0)
252b5132
RH		 4130 {
4131 pdata_section = subseg_new (".pdata", 0);
81d4177b 4132
252b5132
RH		 4133 bfd_set_section_flags (stdoutput, pdata_section,
4134 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4135 | SEC_READONLY | SEC_DATA ));
81d4177b 4136
252b5132
RH		 4137 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4138 }
4139 else
4140 {
99a814a1 4141 pdata_section = subseg_new (".pdata", 0);
252b5132 4142 }
99a814a1 4143 ppc_set_current_section (pdata_section);
252b5132
RH		 4144}
4145
4146/* pseudo-op: .ydata
4147 behaviour: predefined read only data section
b34976b6 4148 double word aligned
252b5132
RH		 4149 errors: None
4150 warnings: None
4151 initial: .section .ydata "drw3"
b34976b6 4152 a - don't know -- maybe a misprint
252b5132
RH		 4153 d - initialized data
4154 r - readable
4155 3 - double word aligned (that would be 4 byte boundary)
4156 commentary:
4157 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4158 debugging, etc. */
4159
252b5132 4160static void
99a814a1 4161ppc_ydata (ignore)
5480ccf3 4162 int ignore ATTRIBUTE_UNUSED;
252b5132 4163{
81d4177b 4164 if (ydata_section == 0)
252b5132
RH		 4165 {
4166 ydata_section = subseg_new (".ydata", 0);
4167 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4168 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4169 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4170
4171 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4172 }
4173 else
4174 {
4175 ydata_section = subseg_new (".ydata", 0);
4176 }
99a814a1 4177 ppc_set_current_section (ydata_section);
252b5132
RH		 4178}
4179
4180/* pseudo-op: .reldata
4181 behaviour: predefined read write data section
b34976b6 4182 double word aligned (4-byte)
252b5132
RH		 4183 FIXME: relocation is applied to it
4184 FIXME: what's the difference between this and .data?
4185 errors: None
4186 warnings: None
4187 initial: .section .reldata "drw3"
4188 d - initialized data
4189 r - readable
4190 w - writeable
4191 3 - double word aligned (that would be 8 byte boundary)
4192
4193 commentary:
4194 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4195 function descriptors, etc. */
4196
252b5132 4197static void
99a814a1 4198ppc_reldata (ignore)
5480ccf3 4199 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4200{
4201 if (reldata_section == 0)
4202 {
4203 reldata_section = subseg_new (".reldata", 0);
4204
4205 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4206 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4207 | SEC_DATA));
252b5132
RH		 4208
4209 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4210 }
4211 else
4212 {
4213 reldata_section = subseg_new (".reldata", 0);
4214 }
99a814a1 4215 ppc_set_current_section (reldata_section);
252b5132
RH		 4216}
4217
4218/* pseudo-op: .rdata
4219 behaviour: predefined read only data section
b34976b6 4220 double word aligned
252b5132
RH		 4221 errors: None
4222 warnings: None
4223 initial: .section .rdata "dr3"
4224 d - initialized data
4225 r - readable
99a814a1
AM		 4226 3 - double word aligned (that would be 4 byte boundary) */
4227
252b5132 4228static void
99a814a1 4229ppc_rdata (ignore)
5480ccf3 4230 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4231{
4232 if (rdata_section == 0)
4233 {
4234 rdata_section = subseg_new (".rdata", 0);
4235 bfd_set_section_flags (stdoutput, rdata_section,
4236 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4237 | SEC_READONLY | SEC_DATA ));
4238
4239 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4240 }
4241 else
4242 {
4243 rdata_section = subseg_new (".rdata", 0);
4244 }
99a814a1 4245 ppc_set_current_section (rdata_section);
252b5132
RH		 4246}
4247
4248/* pseudo-op: .ualong
81d4177b 4249 behaviour: much like .int, with the exception that no alignment is
b34976b6 4250 performed.
252b5132
RH		 4251 FIXME: test the alignment statement
4252 errors: None
99a814a1
AM		 4253 warnings: None */
4254
252b5132 4255static void
99a814a1 4256ppc_ualong (ignore)
5480ccf3 4257 int ignore ATTRIBUTE_UNUSED;
252b5132 4258{
99a814a1
AM		 4259 /* Try for long. */
4260 cons (4);
252b5132
RH		 4261}
4262
4263/* pseudo-op: .znop <symbol name>
4264 behaviour: Issue a nop instruction
b34976b6 4265 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4266 the supplied symbol name.
4267 errors: None
99a814a1
AM		 4268 warnings: Missing symbol name */
4269
252b5132 4270static void
99a814a1 4271ppc_znop (ignore)
5480ccf3 4272 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4273{
4274 unsigned long insn;
4275 const struct powerpc_opcode *opcode;
4276 expressionS ex;
4277 char *f;
252b5132 4278 symbolS *sym;
252b5132
RH		 4279 char *symbol_name;
4280 char c;
4281 char *name;
4282 unsigned int exp;
4283 flagword flags;
4284 asection *sec;
4285
99a814a1 4286 /* Strip out the symbol name. */
252b5132
RH		 4287 symbol_name = input_line_pointer;
4288 c = get_symbol_end ();
4289
4290 name = xmalloc (input_line_pointer - symbol_name + 1);
4291 strcpy (name, symbol_name);
4292
4293 sym = symbol_find_or_make (name);
4294
4295 *input_line_pointer = c;
4296
4297 SKIP_WHITESPACE ();
4298
4299 /* Look up the opcode in the hash table. */
4300 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4301
99a814a1 4302 /* Stick in the nop. */
252b5132
RH		 4303 insn = opcode->opcode;
4304
4305 /* Write out the instruction. */
4306 f = frag_more (4);
4307 md_number_to_chars (f, insn, 4);
4308 fix_new (frag_now,
4309 f - frag_now->fr_literal,
4310 4,
4311 sym,
4312 0,
4313 0,
4314 BFD_RELOC_16_GOT_PCREL);
4315
4316}
4317
81d4177b
KH		 4318/* pseudo-op:
4319 behaviour:
4320 errors:
99a814a1
AM		 4321 warnings: */
4322
252b5132 4323static void
99a814a1 4324ppc_pe_comm (lcomm)
252b5132
RH		 4325 int lcomm;
4326{
4327 register char *name;
4328 register char c;
4329 register char *p;
4330 offsetT temp;
4331 register symbolS *symbolP;
4332 offsetT align;
4333
4334 name = input_line_pointer;
4335 c = get_symbol_end ();
4336
99a814a1 4337 /* just after name is now '\0'. */
252b5132
RH		 4338 p = input_line_pointer;
4339 *p = c;
4340 SKIP_WHITESPACE ();
4341 if (*input_line_pointer != ',')
4342 {
4343 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4344 ignore_rest_of_line ();
4345 return;
4346 }
4347
4348 input_line_pointer++; /* skip ',' */
4349 if ((temp = get_absolute_expression ()) < 0)
4350 {
4351 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4352 ignore_rest_of_line ();
4353 return;
4354 }
4355
4356 if (! lcomm)
4357 {
4358 /* The third argument to .comm is the alignment. */
4359 if (*input_line_pointer != ',')
4360 align = 3;
4361 else
4362 {
4363 ++input_line_pointer;
4364 align = get_absolute_expression ();
4365 if (align <= 0)
4366 {
4367 as_warn (_("ignoring bad alignment"));
4368 align = 3;
4369 }
4370 }
4371 }
4372
4373 *p = 0;
4374 symbolP = symbol_find_or_make (name);
4375
4376 *p = c;
4377 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4378 {
4379 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4380 S_GET_NAME (symbolP));
4381 ignore_rest_of_line ();
4382 return;
4383 }
4384
4385 if (S_GET_VALUE (symbolP))
4386 {
4387 if (S_GET_VALUE (symbolP) != (valueT) temp)
4388 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4389 S_GET_NAME (symbolP),
4390 (long) S_GET_VALUE (symbolP),
4391 (long) temp);
4392 }
4393 else
4394 {
4395 S_SET_VALUE (symbolP, (valueT) temp);
4396 S_SET_EXTERNAL (symbolP);
4397 }
4398
4399 demand_empty_rest_of_line ();
4400}
4401
4402/*
4403 * implement the .section pseudo op:
4404 * .section name {, "flags"}
4405 * ^ ^
4406 * | +--- optional flags: 'b' for bss
4407 * | 'i' for info
4408 * +-- section name 'l' for lib
4409 * 'n' for noload
4410 * 'o' for over
4411 * 'w' for data
4412 * 'd' (apparently m88k for data)
4413 * 'x' for text
4414 * But if the argument is not a quoted string, treat it as a
4415 * subsegment number.
4416 *
4417 * FIXME: this is a copy of the section processing from obj-coff.c, with
4418 * additions/changes for the moto-pas assembler support. There are three
4419 * categories:
4420 *
81d4177b 4421 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4422 * setting bits that bfd probably neither understands or uses. The
4423 * correct approach (?) will have to incorporate extra fields attached
4424 * to the section to hold the system specific stuff. (krk)
4425 *
4426 * Section Contents:
4427 * 'a' - unknown - referred to in documentation, but no definition supplied
4428 * 'c' - section has code
4429 * 'd' - section has initialized data
4430 * 'u' - section has uninitialized data
4431 * 'i' - section contains directives (info)
4432 * 'n' - section can be discarded
4433 * 'R' - remove section at link time
4434 *
4435 * Section Protection:
4436 * 'r' - section is readable
4437 * 'w' - section is writeable
4438 * 'x' - section is executable
4439 * 's' - section is sharable
4440 *
4441 * Section Alignment:
4442 * '0' - align to byte boundary
4443 * '1' - align to halfword undary
4444 * '2' - align to word boundary
4445 * '3' - align to doubleword boundary
4446 * '4' - align to quadword boundary
4447 * '5' - align to 32 byte boundary
4448 * '6' - align to 64 byte boundary
4449 *
4450 */
4451
4452void
4453ppc_pe_section (ignore)
5480ccf3 4454 int ignore ATTRIBUTE_UNUSED;
252b5132 4455{
99a814a1 4456 /* Strip out the section name. */
252b5132
RH		 4457 char *section_name;
4458 char c;
4459 char *name;
4460 unsigned int exp;
4461 flagword flags;
4462 segT sec;
4463 int align;
4464
4465 section_name = input_line_pointer;
4466 c = get_symbol_end ();
4467
4468 name = xmalloc (input_line_pointer - section_name + 1);
4469 strcpy (name, section_name);
4470
4471 *input_line_pointer = c;
4472
4473 SKIP_WHITESPACE ();
4474
4475 exp = 0;
4476 flags = SEC_NO_FLAGS;
4477
4478 if (strcmp (name, ".idata$2") == 0)
4479 {
4480 align = 0;
4481 }
4482 else if (strcmp (name, ".idata$3") == 0)
4483 {
4484 align = 0;
4485 }
4486 else if (strcmp (name, ".idata$4") == 0)
4487 {
4488 align = 2;
4489 }
4490 else if (strcmp (name, ".idata$5") == 0)
4491 {
4492 align = 2;
4493 }
4494 else if (strcmp (name, ".idata$6") == 0)
4495 {
4496 align = 1;
4497 }
4498 else
99a814a1
AM		 4499 /* Default alignment to 16 byte boundary. */
4500 align = 4;
252b5132
RH		 4501
4502 if (*input_line_pointer == ',')
4503 {
4504 ++input_line_pointer;
4505 SKIP_WHITESPACE ();
4506 if (*input_line_pointer != '"')
4507 exp = get_absolute_expression ();
4508 else
4509 {
4510 ++input_line_pointer;
4511 while (*input_line_pointer != '"'
4512 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4513 {
4514 switch (*input_line_pointer)
4515 {
4516 /* Section Contents */
4517 case 'a': /* unknown */
4518 as_bad (_("Unsupported section attribute -- 'a'"));
4519 break;
4520 case 'c': /* code section */
81d4177b 4521 flags |= SEC_CODE;
252b5132
RH		 4522 break;
4523 case 'd': /* section has initialized data */
4524 flags |= SEC_DATA;
4525 break;
4526 case 'u': /* section has uninitialized data */
4527 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4528 in winnt.h */
4529 flags |= SEC_ROM;
4530 break;
4531 case 'i': /* section contains directives (info) */
4532 /* FIXME: This is IMAGE_SCN_LNK_INFO
4533 in winnt.h */
4534 flags |= SEC_HAS_CONTENTS;
4535 break;
4536 case 'n': /* section can be discarded */
81d4177b 4537 flags &=~ SEC_LOAD;
252b5132
RH		 4538 break;
4539 case 'R': /* Remove section at link time */
4540 flags |= SEC_NEVER_LOAD;
4541 break;
4542
4543 /* Section Protection */
4544 case 'r': /* section is readable */
4545 flags |= IMAGE_SCN_MEM_READ;
4546 break;
4547 case 'w': /* section is writeable */
4548 flags |= IMAGE_SCN_MEM_WRITE;
4549 break;
4550 case 'x': /* section is executable */
4551 flags |= IMAGE_SCN_MEM_EXECUTE;
4552 break;
4553 case 's': /* section is sharable */
4554 flags |= IMAGE_SCN_MEM_SHARED;
4555 break;
4556
4557 /* Section Alignment */
4558 case '0': /* align to byte boundary */
4559 flags |= IMAGE_SCN_ALIGN_1BYTES;
4560 align = 0;
4561 break;
4562 case '1': /* align to halfword boundary */
4563 flags |= IMAGE_SCN_ALIGN_2BYTES;
4564 align = 1;
4565 break;
4566 case '2': /* align to word boundary */
4567 flags |= IMAGE_SCN_ALIGN_4BYTES;
4568 align = 2;
4569 break;
4570 case '3': /* align to doubleword boundary */
4571 flags |= IMAGE_SCN_ALIGN_8BYTES;
4572 align = 3;
4573 break;
4574 case '4': /* align to quadword boundary */
4575 flags |= IMAGE_SCN_ALIGN_16BYTES;
4576 align = 4;
4577 break;
4578 case '5': /* align to 32 byte boundary */
4579 flags |= IMAGE_SCN_ALIGN_32BYTES;
4580 align = 5;
4581 break;
4582 case '6': /* align to 64 byte boundary */
4583 flags |= IMAGE_SCN_ALIGN_64BYTES;
4584 align = 6;
4585 break;
4586
4587 default:
99a814a1
AM		 4588 as_bad (_("unknown section attribute '%c'"),
4589 *input_line_pointer);
252b5132
RH		 4590 break;
4591 }
4592 ++input_line_pointer;
4593 }
4594 if (*input_line_pointer == '"')
4595 ++input_line_pointer;
4596 }
4597 }
4598
4599 sec = subseg_new (name, (subsegT) exp);
4600
99a814a1 4601 ppc_set_current_section (sec);
252b5132
RH		 4602
4603 if (flags != SEC_NO_FLAGS)
4604 {
4605 if (! bfd_set_section_flags (stdoutput, sec, flags))
4606 as_bad (_("error setting flags for \"%s\": %s"),
4607 bfd_section_name (stdoutput, sec),
4608 bfd_errmsg (bfd_get_error ()));
4609 }
4610
99a814a1 4611 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4612
4613}
4614
4615static void
4616ppc_pe_function (ignore)
5480ccf3 4617 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4618{
4619 char *name;
4620 char endc;
4621 symbolS *ext_sym;
4622
4623 name = input_line_pointer;
4624 endc = get_symbol_end ();
4625
4626 ext_sym = symbol_find_or_make (name);
4627
4628 *input_line_pointer = endc;
4629
4630 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4631 SF_SET_FUNCTION (ext_sym);
4632 SF_SET_PROCESS (ext_sym);
4633 coff_add_linesym (ext_sym);
4634
4635 demand_empty_rest_of_line ();
4636}
4637
4638static void
4639ppc_pe_tocd (ignore)
5480ccf3 4640 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4641{
4642 if (tocdata_section == 0)
4643 {
4644 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4645 /* FIXME: section flags won't work. */
252b5132
RH		 4646 bfd_set_section_flags (stdoutput, tocdata_section,
4647 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4648 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4649
4650 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4651 }
4652 else
4653 {
4654 rdata_section = subseg_new (".tocd", 0);
4655 }
4656
99a814a1 4657 ppc_set_current_section (tocdata_section);
252b5132
RH		 4658
4659 demand_empty_rest_of_line ();
4660}
4661
4662/* Don't adjust TOC relocs to use the section symbol. */
4663
4664int
4665ppc_pe_fix_adjustable (fix)
4666 fixS *fix;
4667{
4668 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4669}
4670
4671#endif
4672\f
4673#ifdef OBJ_XCOFF
4674
4675/* XCOFF specific symbol and file handling. */
4676
4677/* Canonicalize the symbol name. We use the to force the suffix, if
4678 any, to use square brackets, and to be in upper case. */
4679
4680char *
4681ppc_canonicalize_symbol_name (name)
4682 char *name;
4683{
4684 char *s;
4685
4686 if (ppc_stab_symbol)
4687 return name;
4688
4689 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4690 ;
4691 if (*s != '\0')
4692 {
4693 char brac;
4694
4695 if (*s == '[')
4696 brac = ']';
4697 else
4698 {
4699 *s = '[';
4700 brac = '}';
4701 }
4702
4703 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4704 *s = TOUPPER (*s);
252b5132
RH		 4705
4706 if (*s == '\0' || s[1] != '\0')
4707 as_bad (_("bad symbol suffix"));
4708
4709 *s = ']';
4710 }
4711
4712 return name;
4713}
4714
4715/* Set the class of a symbol based on the suffix, if any. This is
4716 called whenever a new symbol is created. */
4717
4718void
4719ppc_symbol_new_hook (sym)
4720 symbolS *sym;
4721{
809ffe0d 4722 struct ppc_tc_sy *tc;
252b5132
RH		 4723 const char *s;
4724
809ffe0d
ILT		 4725 tc = symbol_get_tc (sym);
4726 tc->next = NULL;
4727 tc->output = 0;
4728 tc->class = -1;
4729 tc->real_name = NULL;
4730 tc->subseg = 0;
4731 tc->align = 0;
4732 tc->size = NULL;
4733 tc->within = NULL;
252b5132
RH		 4734
4735 if (ppc_stab_symbol)
4736 return;
4737
4738 s = strchr (S_GET_NAME (sym), '[');
4739 if (s == (const char *) NULL)
4740 {
4741 /* There is no suffix. */
4742 return;
4743 }
4744
4745 ++s;
4746
4747 switch (s[0])
4748 {
4749 case 'B':
4750 if (strcmp (s, "BS]") == 0)
809ffe0d 4751 tc->class = XMC_BS;
252b5132
RH		 4752 break;
4753 case 'D':
4754 if (strcmp (s, "DB]") == 0)
809ffe0d 4755 tc->class = XMC_DB;
252b5132 4756 else if (strcmp (s, "DS]") == 0)
809ffe0d 4757 tc->class = XMC_DS;
252b5132
RH		 4758 break;
4759 case 'G':
4760 if (strcmp (s, "GL]") == 0)
809ffe0d 4761 tc->class = XMC_GL;
252b5132
RH		 4762 break;
4763 case 'P':
4764 if (strcmp (s, "PR]") == 0)
809ffe0d 4765 tc->class = XMC_PR;
252b5132
RH		 4766 break;
4767 case 'R':
4768 if (strcmp (s, "RO]") == 0)
809ffe0d 4769 tc->class = XMC_RO;
252b5132 4770 else if (strcmp (s, "RW]") == 0)
809ffe0d 4771 tc->class = XMC_RW;
252b5132
RH		 4772 break;
4773 case 'S':
4774 if (strcmp (s, "SV]") == 0)
809ffe0d 4775 tc->class = XMC_SV;
252b5132
RH		 4776 break;
4777 case 'T':
4778 if (strcmp (s, "TC]") == 0)
809ffe0d 4779 tc->class = XMC_TC;
252b5132 4780 else if (strcmp (s, "TI]") == 0)
809ffe0d 4781 tc->class = XMC_TI;
252b5132 4782 else if (strcmp (s, "TB]") == 0)
809ffe0d 4783 tc->class = XMC_TB;
252b5132 4784 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4785 tc->class = XMC_TC0;
252b5132
RH		 4786 break;
4787 case 'U':
4788 if (strcmp (s, "UA]") == 0)
809ffe0d 4789 tc->class = XMC_UA;
252b5132 4790 else if (strcmp (s, "UC]") == 0)
809ffe0d 4791 tc->class = XMC_UC;
252b5132
RH		 4792 break;
4793 case 'X':
4794 if (strcmp (s, "XO]") == 0)
809ffe0d 4795 tc->class = XMC_XO;
252b5132
RH		 4796 break;
4797 }
4798
809ffe0d 4799 if (tc->class == -1)
252b5132
RH		 4800 as_bad (_("Unrecognized symbol suffix"));
4801}
4802
4803/* Set the class of a label based on where it is defined. This
4804 handles symbols without suffixes. Also, move the symbol so that it
4805 follows the csect symbol. */
4806
4807void
4808ppc_frob_label (sym)
4809 symbolS *sym;
4810{
4811 if (ppc_current_csect != (symbolS *) NULL)
4812 {
809ffe0d
ILT		 4813 if (symbol_get_tc (sym)->class == -1)
4814 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4815
4816 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4817 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4818 &symbol_rootP, &symbol_lastP);
4819 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4820 }
4821}
4822
4823/* This variable is set by ppc_frob_symbol if any absolute symbols are
4824 seen. It tells ppc_adjust_symtab whether it needs to look through
4825 the symbols. */
4826
b34976b6 4827static bfd_boolean ppc_saw_abs;
252b5132
RH		 4828
4829/* Change the name of a symbol just before writing it out. Set the
4830 real name if the .rename pseudo-op was used. Otherwise, remove any
4831 class suffix. Return 1 if the symbol should not be included in the
4832 symbol table. */
4833
4834int
4835ppc_frob_symbol (sym)
4836 symbolS *sym;
4837{
4838 static symbolS *ppc_last_function;
4839 static symbolS *set_end;
4840
4841 /* Discard symbols that should not be included in the output symbol
4842 table. */
809ffe0d
ILT		 4843 if (! symbol_used_in_reloc_p (sym)
4844 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4845 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4846 && ! symbol_get_tc (sym)->output
252b5132
RH		 4847 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4848 return 1;
4849
a161fe53
AM		 4850 /* This one will disappear anyway. Don't make a csect sym for it. */
4851 if (sym == abs_section_sym)
4852 return 1;
4853
809ffe0d
ILT		 4854 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4855 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4856 else
4857 {
4858 const char *name;
4859 const char *s;
4860
4861 name = S_GET_NAME (sym);
4862 s = strchr (name, '[');
4863 if (s != (char *) NULL)
4864 {
4865 unsigned int len;
4866 char *snew;
4867
4868 len = s - name;
4869 snew = xmalloc (len + 1);
4870 memcpy (snew, name, len);
4871 snew[len] = '\0';
4872
4873 S_SET_NAME (sym, snew);
4874 }
4875 }
4876
4877 if (set_end != (symbolS *) NULL)
4878 {
4879 SA_SET_SYM_ENDNDX (set_end, sym);
4880 set_end = NULL;
4881 }
4882
4883 if (SF_GET_FUNCTION (sym))
4884 {
4885 if (ppc_last_function != (symbolS *) NULL)
4886 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4887 ppc_last_function = sym;
809ffe0d 4888 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4889 {
6386f3a7 4890 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4891 SA_SET_SYM_FSIZE (sym,
4892 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4893 }
4894 }
4895 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4896 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4897 {
4898 if (ppc_last_function == (symbolS *) NULL)
4899 as_bad (_(".ef with no preceding .function"));
4900 else
4901 {
4902 set_end = ppc_last_function;
4903 ppc_last_function = NULL;
4904
4905 /* We don't have a C_EFCN symbol, but we need to force the
4906 COFF backend to believe that it has seen one. */
4907 coff_last_function = NULL;
4908 }
4909 }
4910
670ec21d 4911 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4912 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4913 && S_GET_STORAGE_CLASS (sym) != C_FILE
4914 && S_GET_STORAGE_CLASS (sym) != C_FCN
4915 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4916 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4917 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4918 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4919 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4920 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4921 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4922
4923 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4924 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4925 {
4926 int i;
4927 union internal_auxent *a;
4928
4929 /* Create a csect aux. */
4930 i = S_GET_NUMBER_AUXILIARY (sym);
4931 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4932 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4933 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4934 {
4935 /* This is the TOC table. */
4936 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4937 a->x_csect.x_scnlen.l = 0;
4938 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4939 }
809ffe0d 4940 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4941 {
4942 /* This is a csect symbol. x_scnlen is the size of the
4943 csect. */
809ffe0d 4944 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4945 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4946 S_GET_SEGMENT (sym))
4947 - S_GET_VALUE (sym));
4948 else
4949 {
6386f3a7 4950 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4951 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4952 - S_GET_VALUE (sym));
4953 }
809ffe0d 4954 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4955 }
4956 else if (S_GET_SEGMENT (sym) == bss_section)
4957 {
4958 /* This is a common symbol. */
809ffe0d
ILT		 4959 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4960 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4961 if (S_IS_EXTERNAL (sym))
809ffe0d 4962 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4963 else
809ffe0d 4964 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 4965 }
4966 else if (S_GET_SEGMENT (sym) == absolute_section)
4967 {
4968 /* This is an absolute symbol. The csect will be created by
99a814a1 4969 ppc_adjust_symtab. */
b34976b6 4970 ppc_saw_abs = TRUE;
252b5132 4971 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 4972 if (symbol_get_tc (sym)->class == -1)
4973 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 4974 }
4975 else if (! S_IS_DEFINED (sym))
4976 {
4977 /* This is an external symbol. */
4978 a->x_csect.x_scnlen.l = 0;
4979 a->x_csect.x_smtyp = XTY_ER;
4980 }
809ffe0d 4981 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 4982 {
4983 symbolS *next;
4984
4985 /* This is a TOC definition. x_scnlen is the size of the
4986 TOC entry. */
4987 next = symbol_next (sym);
809ffe0d 4988 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 4989 next = symbol_next (next);
4990 if (next == (symbolS *) NULL
809ffe0d 4991 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 4992 {
4993 if (ppc_after_toc_frag == (fragS *) NULL)
4994 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4995 data_section)
4996 - S_GET_VALUE (sym));
4997 else
4998 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
4999 - S_GET_VALUE (sym));
5000 }
5001 else
5002 {
6386f3a7 5003 resolve_symbol_value (next);
252b5132
RH		 5004 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5005 - S_GET_VALUE (sym));
5006 }
5007 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5008 }
5009 else
5010 {
5011 symbolS *csect;
5012
5013 /* This is a normal symbol definition. x_scnlen is the
5014 symbol index of the containing csect. */
5015 if (S_GET_SEGMENT (sym) == text_section)
5016 csect = ppc_text_csects;
5017 else if (S_GET_SEGMENT (sym) == data_section)
5018 csect = ppc_data_csects;
5019 else
5020 abort ();
5021
5022 /* Skip the initial dummy symbol. */
809ffe0d 5023 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5024
5025 if (csect == (symbolS *) NULL)
5026 {
5027 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5028 a->x_csect.x_scnlen.l = 0;
5029 }
5030 else
5031 {
809ffe0d 5032 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5033 {
6386f3a7 5034 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5035 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5036 > S_GET_VALUE (sym))
252b5132 5037 break;
809ffe0d 5038 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5039 }
5040
809ffe0d
ILT		 5041 a->x_csect.x_scnlen.p =
5042 coffsymbol (symbol_get_bfdsym (csect))->native;
5043 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5044 1;
252b5132
RH		 5045 }
5046 a->x_csect.x_smtyp = XTY_LD;
5047 }
81d4177b 5048
252b5132
RH		 5049 a->x_csect.x_parmhash = 0;
5050 a->x_csect.x_snhash = 0;
809ffe0d 5051 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5052 a->x_csect.x_smclas = XMC_PR;
5053 else
809ffe0d 5054 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5055 a->x_csect.x_stab = 0;
5056 a->x_csect.x_snstab = 0;
5057
5058 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5059 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5060 }
5061 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5062 {
5063 /* We want the value to be the symbol index of the referenced
5064 csect symbol. BFD will do that for us if we set the right
5065 flags. */
b782de16
AM		 5066 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5067 combined_entry_type *c = coffsymbol (bsym)->native;
5068
5069 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5070 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5071 }
5072 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5073 {
5074 symbolS *block;
5075 symbolS *csect;
5076
5077 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5078 block = symbol_get_tc (sym)->within;
5079 csect = symbol_get_tc (block)->within;
6386f3a7 5080 resolve_symbol_value (csect);
252b5132
RH		 5081 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5082 }
5083 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5084 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5085 {
5086 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5087 BFD will do that for us if we set the right flags. We have
5088 already set the value correctly. */
809ffe0d 5089 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5090 }
5091
5092 return 0;
5093}
5094
5095/* Adjust the symbol table. This creates csect symbols for all
5096 absolute symbols. */
5097
5098void
5099ppc_adjust_symtab ()
5100{
5101 symbolS *sym;
5102
5103 if (! ppc_saw_abs)
5104 return;
5105
5106 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5107 {
5108 symbolS *csect;
5109 int i;
5110 union internal_auxent *a;
5111
5112 if (S_GET_SEGMENT (sym) != absolute_section)
5113 continue;
5114
5115 csect = symbol_create (".abs[XO]", absolute_section,
5116 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5117 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5118 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5119 i = S_GET_NUMBER_AUXILIARY (csect);
5120 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5121 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5122 a->x_csect.x_scnlen.l = 0;
5123 a->x_csect.x_smtyp = XTY_SD;
5124 a->x_csect.x_parmhash = 0;
5125 a->x_csect.x_snhash = 0;
5126 a->x_csect.x_smclas = XMC_XO;
5127 a->x_csect.x_stab = 0;
5128 a->x_csect.x_snstab = 0;
5129
5130 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5131
5132 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5133 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5134 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5135 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5136 }
5137
b34976b6 5138 ppc_saw_abs = FALSE;
252b5132
RH		 5139}
5140
5141/* Set the VMA for a section. This is called on all the sections in
5142 turn. */
5143
5144void
5145ppc_frob_section (sec)
5146 asection *sec;
5147{
931e13a6 5148 static bfd_vma vma = 0;
252b5132 5149
931e13a6 5150 vma = md_section_align (sec, vma);
252b5132
RH		 5151 bfd_set_section_vma (stdoutput, sec, vma);
5152 vma += bfd_section_size (stdoutput, sec);
5153}
5154
5155#endif /* OBJ_XCOFF */
5156\f
5157/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5158 of type TYPE, and store the appropriate bytes in *LITP. The number
5159 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5160 returned, or NULL on OK. */
5161
5162char *
5163md_atof (type, litp, sizep)
5164 int type;
5165 char *litp;
5166 int *sizep;
5167{
5168 int prec;
5169 LITTLENUM_TYPE words[4];
5170 char *t;
5171 int i;
5172
5173 switch (type)
5174 {
5175 case 'f':
5176 prec = 2;
5177 break;
5178
5179 case 'd':
5180 prec = 4;
5181 break;
5182
5183 default:
5184 *sizep = 0;
5185 return _("bad call to md_atof");
5186 }
5187
5188 t = atof_ieee (input_line_pointer, type, words);
5189 if (t)
5190 input_line_pointer = t;
5191
5192 *sizep = prec * 2;
5193
5194 if (target_big_endian)
5195 {
5196 for (i = 0; i < prec; i++)
5197 {
5198 md_number_to_chars (litp, (valueT) words[i], 2);
5199 litp += 2;
5200 }
5201 }
5202 else
5203 {
5204 for (i = prec - 1; i >= 0; i--)
5205 {
5206 md_number_to_chars (litp, (valueT) words[i], 2);
5207 litp += 2;
5208 }
5209 }
81d4177b 5210
252b5132
RH		 5211 return NULL;
5212}
5213
5214/* Write a value out to the object file, using the appropriate
5215 endianness. */
5216
5217void
5218md_number_to_chars (buf, val, n)
5219 char *buf;
5220 valueT val;
5221 int n;
5222{
5223 if (target_big_endian)
5224 number_to_chars_bigendian (buf, val, n);
5225 else
5226 number_to_chars_littleendian (buf, val, n);
5227}
5228
5229/* Align a section (I don't know why this is machine dependent). */
5230
5231valueT
5232md_section_align (seg, addr)
5233 asection *seg;
5234 valueT addr;
5235{
5236 int align = bfd_get_section_alignment (stdoutput, seg);
5237
5238 return ((addr + (1 << align) - 1) & (-1 << align));
5239}
5240
5241/* We don't have any form of relaxing. */
5242
5243int
5244md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5245 fragS *fragp ATTRIBUTE_UNUSED;
5246 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5247{
5248 abort ();
5249 return 0;
5250}
5251
5252/* Convert a machine dependent frag. We never generate these. */
5253
5254void
5255md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5256 bfd *abfd ATTRIBUTE_UNUSED;
5257 asection *sec ATTRIBUTE_UNUSED;
5258 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5259{
5260 abort ();
5261}
5262
5263/* We have no need to default values of symbols. */
5264
252b5132
RH		 5265symbolS *
5266md_undefined_symbol (name)
92161534 5267 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5268{
5269 return 0;
5270}
5271\f
5272/* Functions concerning relocs. */
5273
5274/* The location from which a PC relative jump should be calculated,
5275 given a PC relative reloc. */
5276
5277long
5278md_pcrel_from_section (fixp, sec)
5279 fixS *fixp;
92161534 5280 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5281{
5282 return fixp->fx_frag->fr_address + fixp->fx_where;
5283}
5284
5285#ifdef OBJ_XCOFF
5286
5287/* This is called to see whether a fixup should be adjusted to use a
5288 section symbol. We take the opportunity to change a fixup against
5289 a symbol in the TOC subsegment into a reloc against the
5290 corresponding .tc symbol. */
5291
5292int
5293ppc_fix_adjustable (fix)
5294 fixS *fix;
5295{
b782de16
AM		 5296 valueT val = resolve_symbol_value (fix->fx_addsy);
5297 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5298 TC_SYMFIELD_TYPE *tc;
5299
5300 if (symseg == absolute_section)
5301 return 0;
252b5132 5302
252b5132 5303 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5304 && fix->fx_addsy != ppc_toc_csect
b782de16 5305 && symseg == data_section
252b5132
RH		 5306 && val >= ppc_toc_frag->fr_address
5307 && (ppc_after_toc_frag == (fragS *) NULL
5308 || val < ppc_after_toc_frag->fr_address))
5309 {
5310 symbolS *sy;
5311
5312 for (sy = symbol_next (ppc_toc_csect);
5313 sy != (symbolS *) NULL;
5314 sy = symbol_next (sy))
5315 {
b782de16
AM		 5316 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5317
5318 if (sy_tc->class == XMC_TC0)
252b5132 5319 continue;
b782de16 5320 if (sy_tc->class != XMC_TC)
252b5132 5321 break;
b782de16 5322 if (val == resolve_symbol_value (sy))
252b5132
RH		 5323 {
5324 fix->fx_addsy = sy;
5325 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5326 return 0;
5327 }
5328 }
5329
5330 as_bad_where (fix->fx_file, fix->fx_line,
5331 _("symbol in .toc does not match any .tc"));
5332 }
5333
5334 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5335 tc = symbol_get_tc (fix->fx_addsy);
5336 if (tc->subseg == 0
5337 && tc->class != XMC_TC0
5338 && tc->class != XMC_TC
5339 && symseg != bss_section
252b5132 5340 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5341 && (symseg != data_section
252b5132
RH		 5342 || ppc_toc_csect == NULL
5343 || val < ppc_toc_frag->fr_address
5344 || (ppc_after_toc_frag != NULL
5345 && val >= ppc_after_toc_frag->fr_address)))
5346 {
5347 symbolS *csect;
b782de16 5348 symbolS *next_csect;
252b5132 5349
b782de16 5350 if (symseg == text_section)
252b5132 5351 csect = ppc_text_csects;
b782de16 5352 else if (symseg == data_section)
252b5132
RH		 5353 csect = ppc_data_csects;
5354 else
5355 abort ();
5356
5357 /* Skip the initial dummy symbol. */
809ffe0d 5358 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5359
5360 if (csect != (symbolS *) NULL)
5361 {
b782de16
AM		 5362 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5363 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5364 {
5365 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5366 have to look through the full symbol table to see
5367 whether this is the csect we want. Note that we will
5368 only get here if the csect has zero length. */
b782de16
AM		 5369 if (symbol_get_frag (csect)->fr_address == val
5370 && S_GET_VALUE (csect) == val)
252b5132
RH		 5371 {
5372 symbolS *scan;
5373
809ffe0d 5374 for (scan = symbol_next (csect);
252b5132 5375 scan != NULL;
809ffe0d 5376 scan = symbol_next (scan))
252b5132 5377 {
809ffe0d 5378 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5379 break;
5380 if (scan == fix->fx_addsy)
5381 break;
5382 }
5383
5384 /* If we found the symbol before the next csect
99a814a1 5385 symbol, then this is the csect we want. */
252b5132
RH		 5386 if (scan == fix->fx_addsy)
5387 break;
5388 }
5389
b782de16 5390 csect = next_csect;
252b5132
RH		 5391 }
5392
b782de16 5393 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5394 fix->fx_addsy = csect;
5395 }
b782de16 5396 return 0;
252b5132
RH		 5397 }
5398
5399 /* Adjust a reloc against a .lcomm symbol to be against the base
5400 .lcomm. */
b782de16 5401 if (symseg == bss_section
252b5132
RH		 5402 && ! S_IS_EXTERNAL (fix->fx_addsy))
5403 {
b782de16
AM		 5404 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5405
5406 fix->fx_offset += val - resolve_symbol_value (sy);
5407 fix->fx_addsy = sy;
252b5132
RH		 5408 }
5409
5410 return 0;
5411}
5412
5413/* A reloc from one csect to another must be kept. The assembler
5414 will, of course, keep relocs between sections, and it will keep
5415 absolute relocs, but we need to force it to keep PC relative relocs
5416 between two csects in the same section. */
5417
5418int
5419ppc_force_relocation (fix)
5420 fixS *fix;
5421{
5422 /* At this point fix->fx_addsy should already have been converted to
5423 a csect symbol. If the csect does not include the fragment, then
5424 we need to force the relocation. */
5425 if (fix->fx_pcrel
5426 && fix->fx_addsy != NULL
809ffe0d
ILT		 5427 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5428 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5429 > fix->fx_frag->fr_address)
5430 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5431 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5432 <= fix->fx_frag->fr_address))))
5433 return 1;
5434
ae6063d4 5435 return generic_force_reloc (fix);
252b5132
RH		 5436}
5437
5438#endif /* OBJ_XCOFF */
5439
0baf16f2 5440#ifdef OBJ_ELF
a161fe53
AM		 5441/* If this function returns non-zero, it guarantees that a relocation
5442 will be emitted for a fixup. */
5443
5444int
5445ppc_force_relocation (fix)
5446 fixS *fix;
5447{
5448 /* Branch prediction relocations must force a relocation, as must
5449 the vtable description relocs. */
5450 switch (fix->fx_r_type)
5451 {
5452 case BFD_RELOC_PPC_B16_BRTAKEN:
5453 case BFD_RELOC_PPC_B16_BRNTAKEN:
5454 case BFD_RELOC_PPC_BA16_BRTAKEN:
5455 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5456 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5457 return 1;
5458 default:
5459 break;
5460 }
5461
cdba85ec
AM		 5462 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5463 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5464 return 1;
5465
ae6063d4 5466 return generic_force_reloc (fix);
a161fe53
AM		 5467}
5468
0baf16f2
AM		 5469int
5470ppc_fix_adjustable (fix)
5471 fixS *fix;
252b5132 5472{
0baf16f2
AM		 5473 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5474 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5475 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5476 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5477 && fix->fx_r_type != BFD_RELOC_GPREL16
5478 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5479 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec
AM		 5480 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5481 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
0baf16f2
AM		 5482 && (fix->fx_pcrel
5483 || (fix->fx_subsy != NULL
5484 && (S_GET_SEGMENT (fix->fx_subsy)
5485 == S_GET_SEGMENT (fix->fx_addsy)))
5486 || S_IS_LOCAL (fix->fx_addsy)));
252b5132 5487}
0baf16f2 5488#endif
252b5132
RH		 5489
5490/* Apply a fixup to the object code. This is called for all the
5491 fixups we generated by the call to fix_new_exp, above. In the call
5492 above we used a reloc code which was the largest legal reloc code
5493 plus the operand index. Here we undo that to recover the operand
5494 index. At this point all symbol values should be fully resolved,
5495 and we attempt to completely resolve the reloc. If we can not do
5496 that, we determine the correct reloc code and put it back in the
5497 fixup. */
5498
94f592af
NC		 5499void
5500md_apply_fix3 (fixP, valP, seg)
5501 fixS *fixP;
5502 valueT * valP;
0baf16f2 5503 segT seg ATTRIBUTE_UNUSED;
252b5132 5504{
94f592af 5505 valueT value = * valP;
252b5132
RH		 5506
5507#ifdef OBJ_ELF
94f592af 5508 if (fixP->fx_addsy != NULL)
252b5132 5509 {
a161fe53 5510 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5511 if (fixP->fx_pcrel)
5512 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5513 }
5514 else
94f592af 5515 fixP->fx_done = 1;
252b5132 5516#else
a161fe53 5517 /* FIXME FIXME FIXME: The value we are passed in *valP includes
252b5132
RH		 5518 the symbol values. Since we are using BFD_ASSEMBLER, if we are
5519 doing this relocation the code in write.c is going to call
5520 bfd_install_relocation, which is also going to use the symbol
5521 value. That means that if the reloc is fully resolved we want to
a161fe53 5522 use *valP since bfd_install_relocation is not being used.
252b5132 5523 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5524 *valP, and must use fx_offset instead. However, if the reloc
5525 is PC relative, we do want to use *valP since it includes the
252b5132 5526 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5527 if (fixP->fx_addsy == (symbolS *) NULL)
5528 fixP->fx_done = 1;
5529
5530 else if (fixP->fx_pcrel)
5531 ;
5532
252b5132 5533 else
a161fe53
AM		 5534 value = fixP->fx_offset;
5535#endif
5536
5537 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5538 {
a161fe53
AM		 5539 /* We can't actually support subtracting a symbol. */
5540 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5541 }
252b5132 5542
94f592af 5543 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5544 {
5545 int opindex;
5546 const struct powerpc_operand *operand;
5547 char *where;
5548 unsigned long insn;
5549
94f592af 5550 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5551
5552 operand = &powerpc_operands[opindex];
5553
5554#ifdef OBJ_XCOFF
0baf16f2
AM		 5555 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5556 does not generate a reloc. It uses the offset of `sym' within its
5557 csect. Other usages, such as `.long sym', generate relocs. This
5558 is the documented behaviour of non-TOC symbols. */
252b5132
RH		 5559 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5560 && operand->bits == 16
5561 && operand->shift == 0
2b3c4602 5562 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5563 && fixP->fx_addsy != NULL
5564 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5565 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5566 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5567 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5568 {
94f592af
NC		 5569 value = fixP->fx_offset;
5570 fixP->fx_done = 1;
252b5132
RH		 5571 }
5572#endif
5573
5574 /* Fetch the instruction, insert the fully resolved operand
5575 value, and stuff the instruction back again. */
94f592af 5576 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5577 if (target_big_endian)
5578 insn = bfd_getb32 ((unsigned char *) where);
5579 else
5580 insn = bfd_getl32 ((unsigned char *) where);
5581 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5582 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5583 if (target_big_endian)
5584 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5585 else
5586 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5587
94f592af
NC		 5588 if (fixP->fx_done)
5589 /* Nothing else to do here. */
5590 return;
252b5132 5591
94f592af 5592 assert (fixP->fx_addsy != NULL);
0baf16f2 5593
252b5132
RH		 5594 /* Determine a BFD reloc value based on the operand information.
5595 We are only prepared to turn a few of the operands into
0baf16f2 5596 relocs. */
11b37b7b
AM		 5597 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5598 && operand->bits == 26
5599 && operand->shift == 0)
94f592af 5600 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM		 5601 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5602 && operand->bits == 16
5603 && operand->shift == 0)
95210096
AM		 5604 {
5605 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5606#ifdef OBJ_XCOFF
5607 fixP->fx_size = 2;
5608 if (target_big_endian)
5609 fixP->fx_where += 2;
5610#endif
5611 }
11b37b7b
AM		 5612 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5613 && operand->bits == 26
5614 && operand->shift == 0)
94f592af 5615 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM		 5616 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5617 && operand->bits == 16
5618 && operand->shift == 0)
95210096
AM		 5619 {
5620 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5621#ifdef OBJ_XCOFF
5622 fixP->fx_size = 2;
5623 if (target_big_endian)
5624 fixP->fx_where += 2;
5625#endif
5626 }
0baf16f2 5627#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM		 5628 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5629 && operand->bits == 16
a7fc733f 5630 && operand->shift == 0)
11b37b7b 5631 {
a7fc733f
AM		 5632 if (ppc_is_toc_sym (fixP->fx_addsy))
5633 {
5634 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5635#ifdef OBJ_ELF
a7fc733f
AM		 5636 if (ppc_obj64
5637 && (operand->flags & PPC_OPERAND_DS) != 0)
5638 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5639#endif
5640 }
5641 else
5642 {
5643 fixP->fx_r_type = BFD_RELOC_16;
5644#ifdef OBJ_ELF
5645 if (ppc_obj64
5646 && (operand->flags & PPC_OPERAND_DS) != 0)
5647 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5648#endif
a7fc733f 5649 }
94f592af 5650 fixP->fx_size = 2;
11b37b7b 5651 if (target_big_endian)
94f592af 5652 fixP->fx_where += 2;
11b37b7b 5653 }
0baf16f2 5654#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5655 else
252b5132
RH		 5656 {
5657 char *sfile;
5658 unsigned int sline;
5659
5660 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5661 symbol. */
94f592af
NC		 5662 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5663 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5664 _("unresolved expression that must be resolved"));
5665 else
94f592af 5666 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5667 _("unsupported relocation against %s"),
94f592af
NC		 5668 S_GET_NAME (fixP->fx_addsy));
5669 fixP->fx_done = 1;
5670 return;
252b5132
RH		 5671 }
5672 }
5673 else
5674 {
5675#ifdef OBJ_ELF
94f592af 5676 ppc_elf_validate_fix (fixP, seg);
252b5132 5677#endif
94f592af 5678 switch (fixP->fx_r_type)
252b5132 5679 {
252b5132 5680 case BFD_RELOC_CTOR:
2b3c4602 5681 if (ppc_obj64)
9c7977b3
AM		 5682 goto ctor64;
5683 /* fall through */
5684
0baf16f2 5685 case BFD_RELOC_32:
94f592af
NC		 5686 if (fixP->fx_pcrel)
5687 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5688 /* fall through */
252b5132
RH		 5689
5690 case BFD_RELOC_RVA:
5691 case BFD_RELOC_32_PCREL:
252b5132 5692 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5693 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5694 value, 4);
5695 break;
5696
7f6d05e8 5697 case BFD_RELOC_64:
9c7977b3 5698 ctor64:
94f592af
NC		 5699 if (fixP->fx_pcrel)
5700 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5701 /* fall through */
0baf16f2 5702
7f6d05e8 5703 case BFD_RELOC_64_PCREL:
94f592af 5704 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5705 value, 8);
81d4177b 5706 break;
0baf16f2 5707
252b5132
RH		 5708 case BFD_RELOC_LO16:
5709 case BFD_RELOC_16:
5710 case BFD_RELOC_GPREL16:
5711 case BFD_RELOC_16_GOT_PCREL:
5712 case BFD_RELOC_16_GOTOFF:
5713 case BFD_RELOC_LO16_GOTOFF:
5714 case BFD_RELOC_HI16_GOTOFF:
5715 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5716 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5717 case BFD_RELOC_LO16_BASEREL:
5718 case BFD_RELOC_HI16_BASEREL:
5719 case BFD_RELOC_HI16_S_BASEREL:
5720 case BFD_RELOC_PPC_EMB_NADDR16:
5721 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5722 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5723 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5724 case BFD_RELOC_PPC_EMB_SDAI16:
5725 case BFD_RELOC_PPC_EMB_SDA2REL:
5726 case BFD_RELOC_PPC_EMB_SDA2I16:
5727 case BFD_RELOC_PPC_EMB_RELSEC16:
5728 case BFD_RELOC_PPC_EMB_RELST_LO:
5729 case BFD_RELOC_PPC_EMB_RELST_HI:
5730 case BFD_RELOC_PPC_EMB_RELST_HA:
5731 case BFD_RELOC_PPC_EMB_RELSDA:
5732 case BFD_RELOC_PPC_TOC16:
0baf16f2 5733#ifdef OBJ_ELF
0baf16f2
AM		 5734 case BFD_RELOC_PPC64_TOC16_LO:
5735 case BFD_RELOC_PPC64_TOC16_HI:
5736 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5737#endif
94f592af 5738 if (fixP->fx_pcrel)
252b5132 5739 {
94f592af
NC		 5740 if (fixP->fx_addsy != NULL)
5741 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5742 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5743 bfd_get_reloc_code_name (fixP->fx_r_type),
5744 S_GET_NAME (fixP->fx_addsy));
252b5132 5745 else
94f592af 5746 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5747 _("cannot emit PC relative %s relocation"),
94f592af 5748 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5749 }
5750
94f592af 5751 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5752 value, 2);
5753 break;
5754
5755 /* This case happens when you write, for example,
5756 lis %r3,(L1-L2)@ha
5757 where L1 and L2 are defined later. */
5758 case BFD_RELOC_HI16:
94f592af 5759 if (fixP->fx_pcrel)
252b5132 5760 abort ();
94f592af 5761 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5762 PPC_HI (value), 2);
252b5132 5763 break;
0baf16f2 5764
252b5132 5765 case BFD_RELOC_HI16_S:
94f592af 5766 if (fixP->fx_pcrel)
252b5132 5767 abort ();
94f592af 5768 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5769 PPC_HA (value), 2);
5770 break;
5771
5772#ifdef OBJ_ELF
0baf16f2 5773 case BFD_RELOC_PPC64_HIGHER:
94f592af 5774 if (fixP->fx_pcrel)
0baf16f2 5775 abort ();
94f592af 5776 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5777 PPC_HIGHER (value), 2);
252b5132
RH		 5778 break;
5779
0baf16f2 5780 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5781 if (fixP->fx_pcrel)
0baf16f2 5782 abort ();
94f592af 5783 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5784 PPC_HIGHERA (value), 2);
5785 break;
5786
5787 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5788 if (fixP->fx_pcrel)
0baf16f2 5789 abort ();
94f592af 5790 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5791 PPC_HIGHEST (value), 2);
5792 break;
5793
5794 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5795 if (fixP->fx_pcrel)
0baf16f2 5796 abort ();
94f592af 5797 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5798 PPC_HIGHESTA (value), 2);
5799 break;
5800
5801 case BFD_RELOC_PPC64_ADDR16_DS:
5802 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5803 case BFD_RELOC_PPC64_GOT16_DS:
5804 case BFD_RELOC_PPC64_GOT16_LO_DS:
5805 case BFD_RELOC_PPC64_PLT16_LO_DS:
5806 case BFD_RELOC_PPC64_SECTOFF_DS:
5807 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5808 case BFD_RELOC_PPC64_TOC16_DS:
5809 case BFD_RELOC_PPC64_TOC16_LO_DS:
5810 case BFD_RELOC_PPC64_PLTGOT16_DS:
5811 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5812 if (fixP->fx_pcrel)
0baf16f2
AM		 5813 abort ();
5814 {
94f592af 5815 unsigned char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5816 unsigned long val, mask;
0baf16f2
AM		 5817
5818 if (target_big_endian)
adadcc0c 5819 val = bfd_getb32 (where - 2);
0baf16f2 5820 else
adadcc0c
AM		 5821 val = bfd_getl32 (where);
5822 mask = 0xfffc;
5823 /* lq insns reserve the four lsbs. */
5824 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5825 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5826 mask = 0xfff0;
5827 val |= value & mask;
0baf16f2
AM		 5828 if (target_big_endian)
5829 bfd_putb16 ((bfd_vma) val, where);
5830 else
5831 bfd_putl16 ((bfd_vma) val, where);
5832 }
5833 break;
cdba85ec 5834
ba0b2174
AM		 5835 case BFD_RELOC_PPC_B16_BRTAKEN:
5836 case BFD_RELOC_PPC_B16_BRNTAKEN:
5837 case BFD_RELOC_PPC_BA16_BRTAKEN:
5838 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5839 break;
5840
cdba85ec
AM		 5841 case BFD_RELOC_PPC_TLS:
5842 case BFD_RELOC_PPC_DTPMOD:
5843 case BFD_RELOC_PPC_TPREL16:
5844 case BFD_RELOC_PPC_TPREL16_LO:
5845 case BFD_RELOC_PPC_TPREL16_HI:
5846 case BFD_RELOC_PPC_TPREL16_HA:
5847 case BFD_RELOC_PPC_TPREL:
5848 case BFD_RELOC_PPC_DTPREL16:
5849 case BFD_RELOC_PPC_DTPREL16_LO:
5850 case BFD_RELOC_PPC_DTPREL16_HI:
5851 case BFD_RELOC_PPC_DTPREL16_HA:
5852 case BFD_RELOC_PPC_DTPREL:
5853 case BFD_RELOC_PPC_GOT_TLSGD16:
5854 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5855 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5856 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5857 case BFD_RELOC_PPC_GOT_TLSLD16:
5858 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5859 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5860 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5861 case BFD_RELOC_PPC_GOT_TPREL16:
5862 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5863 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5864 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5865 case BFD_RELOC_PPC_GOT_DTPREL16:
5866 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5867 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5868 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5869 case BFD_RELOC_PPC64_TPREL16_DS:
5870 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5871 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5872 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5873 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5874 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5875 case BFD_RELOC_PPC64_DTPREL16_DS:
5876 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5877 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5878 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5879 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5880 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
5881 break;
0baf16f2 5882#endif
252b5132 5883 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5884 bytes, rather than 2, so offset it here appropriately. */
252b5132 5885 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5886 if (fixP->fx_pcrel)
252b5132
RH		 5887 abort ();
5888
94f592af 5889 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5890 + ((target_big_endian) ? 2 : 0),
5891 value, 2);
5892 break;
5893
5894 case BFD_RELOC_8:
94f592af 5895 if (fixP->fx_pcrel)
31a91399
NC		 5896 {
5897 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 5898 ".byte <undefined_symbol> - ." */
31a91399
NC		 5899 if (fixP->fx_addsy)
5900 as_bad (_("Unable to handle reference to symbol %s"),
5901 S_GET_NAME (fixP->fx_addsy));
5902 else
5903 as_bad (_("Unable to resolve expression"));
5904 fixP->fx_done = 1;
5905 }
5906 else
5907 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5908 value, 1);
252b5132
RH		 5909 break;
5910
5911 case BFD_RELOC_24_PLT_PCREL:
5912 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5913 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5914 abort ();
5915
94f592af 5916 if (fixP->fx_done)
99a814a1
AM		 5917 {
5918 char *where;
5919 unsigned long insn;
5920
5921 /* Fetch the instruction, insert the fully resolved operand
5922 value, and stuff the instruction back again. */
94f592af 5923 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 5924 if (target_big_endian)
5925 insn = bfd_getb32 ((unsigned char *) where);
5926 else
5927 insn = bfd_getl32 ((unsigned char *) where);
5928 if ((value & 3) != 0)
94f592af 5929 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5930 _("must branch to an address a multiple of 4"));
5931 if ((offsetT) value < -0x40000000
5932 || (offsetT) value >= 0x40000000)
94f592af 5933 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5934 _("@local or @plt branch destination is too far away, %ld bytes"),
5935 (long) value);
5936 insn = insn | (value & 0x03fffffc);
5937 if (target_big_endian)
5938 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5939 else
5940 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5941 }
252b5132
RH		 5942 break;
5943
5944 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 5945 fixP->fx_done = 0;
5946 if (fixP->fx_addsy
5947 && !S_IS_DEFINED (fixP->fx_addsy)
5948 && !S_IS_WEAK (fixP->fx_addsy))
5949 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 5950 break;
5951
5952 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5953 fixP->fx_done = 0;
252b5132
RH		 5954 break;
5955
0baf16f2 5956#ifdef OBJ_ELF
0baf16f2
AM		 5957 /* Generated by reference to `sym@tocbase'. The sym is
5958 ignored by the linker. */
5959 case BFD_RELOC_PPC64_TOC:
94f592af 5960 fixP->fx_done = 0;
0baf16f2 5961 break;
0baf16f2 5962#endif
252b5132 5963 default:
bc805888 5964 fprintf (stderr,
94f592af 5965 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 5966 fflush (stderr);
252b5132
RH		 5967 abort ();
5968 }
5969 }
5970
5971#ifdef OBJ_ELF
94f592af 5972 fixP->fx_addnumber = value;
252b5132 5973#else
94f592af
NC		 5974 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
5975 fixP->fx_addnumber = 0;
252b5132
RH		 5976 else
5977 {
5978#ifdef TE_PE
94f592af 5979 fixP->fx_addnumber = 0;
252b5132
RH		 5980#else
5981 /* We want to use the offset within the data segment of the
5982 symbol, not the actual VMA of the symbol. */
94f592af
NC		 5983 fixP->fx_addnumber =
5984 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 5985#endif
5986 }
5987#endif
252b5132
RH		 5988}
5989
5990/* Generate a reloc for a fixup. */
5991
5992arelent *
5993tc_gen_reloc (seg, fixp)
92161534 5994 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5995 fixS *fixp;
5996{
5997 arelent *reloc;
5998
5999 reloc = (arelent *) xmalloc (sizeof (arelent));
6000
49309057
ILT		 6001 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6002 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6003 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6004 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6005 if (reloc->howto == (reloc_howto_type *) NULL)
6006 {
6007 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6008 _("reloc %d not supported by object file format"),
6009 (int) fixp->fx_r_type);
252b5132
RH		 6010 return NULL;
6011 }
6012 reloc->addend = fixp->fx_addnumber;
6013
6014 return reloc;
6015}
75e21f08
JJ		 6016
6017void
6018ppc_cfi_frame_initial_instructions ()
6019{
6020 cfi_add_CFA_def_cfa (1, 0);
6021}
6022
6023int
6024tc_ppc_regname_to_dw2regnum (const char *regname)
6025{
6026 unsigned int regnum = -1;
6027 unsigned int i;
6028 const char *p;
6029 char *q;
6030 static struct { char *name; int dw2regnum; } regnames[] =
6031 {
6032 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6033 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
6034 { "cc", 68 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
6035 { "spe_acc", 111 }, { "spefscr", 112 }
6036 };
6037
6038 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6039 if (strcmp (regnames[i].name, regname) == 0)
6040 return regnames[i].dw2regnum;
6041
6042 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6043 {
6044 p = regname + 1 + (regname[1] == '.');
6045 regnum = strtoul (p, &q, 10);
6046 if (p == q || *q || regnum >= 32)
6047 return -1;
6048 if (regname[0] == 'f')
b7d7dc63 6049 regnum += 32;
75e21f08 6050 else if (regname[0] == 'v')
b7d7dc63 6051 regnum += 77;
75e21f08
JJ		 6052 }
6053 else if (regname[0] == 'c' && regname[1] == 'r')
6054 {
6055 p = regname + 2 + (regname[2] == '.');
6056 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6057 return -1;
75e21f08
JJ		 6058 regnum = p[0] - '0' + 68;
6059 }
6060 return regnum;
6061}
GDB Binutils - Deliverables
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