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Change plt stubs to have destination in r12.
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
aea77599 3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
cc643b88 4 Free Software Foundation, Inc.
252b5132
RH		 5 Written by Ian Lance Taylor, Cygnus Support.
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
ec2655a6 11 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 02110-1301, USA. */
252b5132 23
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
85645aed
TG		 39#ifdef OBJ_XCOFF
40#include "coff/xcoff.h"
41#include "libxcoff.h"
42#endif
43
252b5132
RH		 44/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45
46/* Tell the main code what the endianness is. */
47extern int target_big_endian;
48
49/* Whether or not, we've set target_big_endian. */
50static int set_target_endian = 0;
51
52/* Whether to use user friendly register names. */
53#ifndef TARGET_REG_NAMES_P
54#ifdef TE_PE
b34976b6 55#define TARGET_REG_NAMES_P TRUE
252b5132 56#else
b34976b6 57#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 58#endif
59#endif
60
0baf16f2
AM		 61/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
62 HIGHESTA. */
63
64/* #lo(value) denotes the least significant 16 bits of the indicated. */
65#define PPC_LO(v) ((v) & 0xffff)
66
67/* #hi(value) denotes bits 16 through 31 of the indicated value. */
68#define PPC_HI(v) (((v) >> 16) & 0xffff)
69
70/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
71 the indicated value, compensating for #lo() being treated as a
72 signed number. */
15c1449b 73#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 74
75/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 76#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 77
78/* #highera(value) denotes bits 32 through 47 of the indicated value,
79 compensating for #lo() being treated as a signed number. */
15c1449b 80#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 81
82/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 83#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 84
85/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 86 compensating for #lo being treated as a signed number. */
87#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2 88
f9c6b907
AM		 89#define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90
91/* For the time being on ppc64, don't report overflow on @h and @ha
92 applied to constants. */
93#define REPORT_OVERFLOW_HI 0
0baf16f2 94
b34976b6 95static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 96
98027b10
AM		 97static void ppc_macro (char *, const struct powerpc_macro *);
98static void ppc_byte (int);
0baf16f2
AM		 99
100#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 101static void ppc_tc (int);
102static void ppc_machine (int);
0baf16f2 103#endif
252b5132
RH		 104
105#ifdef OBJ_XCOFF
98027b10
AM		 106static void ppc_comm (int);
107static void ppc_bb (int);
108static void ppc_bc (int);
109static void ppc_bf (int);
110static void ppc_biei (int);
111static void ppc_bs (int);
112static void ppc_eb (int);
113static void ppc_ec (int);
114static void ppc_ef (int);
115static void ppc_es (int);
116static void ppc_csect (int);
85645aed 117static void ppc_dwsect (int);
98027b10
AM		 118static void ppc_change_csect (symbolS *, offsetT);
119static void ppc_function (int);
120static void ppc_extern (int);
121static void ppc_lglobl (int);
c865e45b 122static void ppc_ref (int);
98027b10
AM		 123static void ppc_section (int);
124static void ppc_named_section (int);
125static void ppc_stabx (int);
126static void ppc_rename (int);
127static void ppc_toc (int);
128static void ppc_xcoff_cons (int);
129static void ppc_vbyte (int);
252b5132
RH		 130#endif
131
132#ifdef OBJ_ELF
98027b10
AM		 133static void ppc_elf_cons (int);
134static void ppc_elf_rdata (int);
135static void ppc_elf_lcomm (int);
252b5132
RH		 136#endif
137
138#ifdef TE_PE
98027b10
AM		 139static void ppc_previous (int);
140static void ppc_pdata (int);
141static void ppc_ydata (int);
142static void ppc_reldata (int);
143static void ppc_rdata (int);
144static void ppc_ualong (int);
145static void ppc_znop (int);
146static void ppc_pe_comm (int);
147static void ppc_pe_section (int);
148static void ppc_pe_function (int);
149static void ppc_pe_tocd (int);
252b5132
RH		 150#endif
151\f
152/* Generic assembler global variables which must be defined by all
153 targets. */
154
155#ifdef OBJ_ELF
156/* This string holds the chars that always start a comment. If the
157 pre-processor is disabled, these aren't very useful. The macro
158 tc_comment_chars points to this. We use this, rather than the
159 usual comment_chars, so that we can switch for Solaris conventions. */
160static const char ppc_solaris_comment_chars[] = "#!";
161static const char ppc_eabi_comment_chars[] = "#";
162
163#ifdef TARGET_SOLARIS_COMMENT
164const char *ppc_comment_chars = ppc_solaris_comment_chars;
165#else
166const char *ppc_comment_chars = ppc_eabi_comment_chars;
167#endif
168#else
169const char comment_chars[] = "#";
170#endif
171
172/* Characters which start a comment at the beginning of a line. */
173const char line_comment_chars[] = "#";
174
175/* Characters which may be used to separate multiple commands on a
176 single line. */
177const char line_separator_chars[] = ";";
178
179/* Characters which are used to indicate an exponent in a floating
180 point number. */
181const char EXP_CHARS[] = "eE";
182
183/* Characters which mean that a number is a floating point constant,
184 as in 0d1.0. */
185const char FLT_CHARS[] = "dD";
5ce8663f 186
5e02f92e 187/* Anything that can start an operand needs to be mentioned here,
ac805826 188 to stop the input scrubber eating whitespace. */
5e02f92e 189const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 190
191/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
192int ppc_cie_data_alignment;
783de163 193
8fbf7334
JL		 194/* The dwarf2 minimum instruction length. */
195int ppc_dwarf2_line_min_insn_length;
196
cef4f754
AM		 197/* More than this number of nops in an alignment op gets a branch
198 instead. */
199unsigned long nop_limit = 4;
200
783de163
AM		 201/* The type of processor we are assembling for. This is one or more
202 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 203ppc_cpu_t ppc_cpu = 0;
776fc418 204ppc_cpu_t sticky = 0;
01efc3af
AM		 205
206/* Flags set on encountering toc relocs. */
207enum {
208 has_large_toc_reloc = 1,
209 has_small_toc_reloc = 2
210} toc_reloc_types;
252b5132
RH		 211\f
212/* The target specific pseudo-ops which we support. */
213
214const pseudo_typeS md_pseudo_table[] =
215{
216 /* Pseudo-ops which must be overridden. */
217 { "byte", ppc_byte, 0 },
218
219#ifdef OBJ_XCOFF
220 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
221 legitimately belong in the obj-*.c file. However, XCOFF is based
222 on COFF, and is only implemented for the RS/6000. We just use
223 obj-coff.c, and add what we need here. */
224 { "comm", ppc_comm, 0 },
225 { "lcomm", ppc_comm, 1 },
226 { "bb", ppc_bb, 0 },
227 { "bc", ppc_bc, 0 },
228 { "bf", ppc_bf, 0 },
229 { "bi", ppc_biei, 0 },
230 { "bs", ppc_bs, 0 },
231 { "csect", ppc_csect, 0 },
85645aed 232 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 233 { "data", ppc_section, 'd' },
234 { "eb", ppc_eb, 0 },
235 { "ec", ppc_ec, 0 },
236 { "ef", ppc_ef, 0 },
237 { "ei", ppc_biei, 1 },
238 { "es", ppc_es, 0 },
239 { "extern", ppc_extern, 0 },
240 { "function", ppc_function, 0 },
241 { "lglobl", ppc_lglobl, 0 },
c865e45b 242 { "ref", ppc_ref, 0 },
252b5132
RH		 243 { "rename", ppc_rename, 0 },
244 { "section", ppc_named_section, 0 },
245 { "stabx", ppc_stabx, 0 },
246 { "text", ppc_section, 't' },
247 { "toc", ppc_toc, 0 },
248 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 249 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 250 { "word", ppc_xcoff_cons, 1 },
251 { "short", ppc_xcoff_cons, 1 },
252 { "vbyte", ppc_vbyte, 0 },
253#endif
254
255#ifdef OBJ_ELF
0baf16f2
AM		 256 { "llong", ppc_elf_cons, 8 },
257 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 258 { "long", ppc_elf_cons, 4 },
259 { "word", ppc_elf_cons, 2 },
260 { "short", ppc_elf_cons, 2 },
261 { "rdata", ppc_elf_rdata, 0 },
262 { "rodata", ppc_elf_rdata, 0 },
263 { "lcomm", ppc_elf_lcomm, 0 },
264#endif
265
266#ifdef TE_PE
99a814a1 267 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 268 { "previous", ppc_previous, 0 },
269 { "pdata", ppc_pdata, 0 },
270 { "ydata", ppc_ydata, 0 },
271 { "reldata", ppc_reldata, 0 },
272 { "rdata", ppc_rdata, 0 },
273 { "ualong", ppc_ualong, 0 },
274 { "znop", ppc_znop, 0 },
275 { "comm", ppc_pe_comm, 0 },
276 { "lcomm", ppc_pe_comm, 1 },
277 { "section", ppc_pe_section, 0 },
278 { "function", ppc_pe_function,0 },
279 { "tocd", ppc_pe_tocd, 0 },
280#endif
281
0baf16f2 282#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 283 { "tc", ppc_tc, 0 },
0baf16f2
AM		 284 { "machine", ppc_machine, 0 },
285#endif
252b5132
RH		 286
287 { NULL, NULL, 0 }
288};
289
290\f
99a814a1
AM		 291/* Predefined register names if -mregnames (or default for Windows NT).
292 In general, there are lots of them, in an attempt to be compatible
293 with a number of other Windows NT assemblers. */
252b5132
RH		 294
295/* Structure to hold information about predefined registers. */
296struct pd_reg
297 {
298 char *name;
299 int value;
300 };
301
302/* List of registers that are pre-defined:
303
304 Each general register has predefined names of the form:
305 1. r<reg_num> which has the value <reg_num>.
306 2. r.<reg_num> which has the value <reg_num>.
307
252b5132
RH		 308 Each floating point register has predefined names of the form:
309 1. f<reg_num> which has the value <reg_num>.
310 2. f.<reg_num> which has the value <reg_num>.
311
7a899fff
C		 312 Each vector unit register has predefined names of the form:
313 1. v<reg_num> which has the value <reg_num>.
314 2. v.<reg_num> which has the value <reg_num>.
315
252b5132
RH		 316 Each condition register has predefined names of the form:
317 1. cr<reg_num> which has the value <reg_num>.
318 2. cr.<reg_num> which has the value <reg_num>.
319
320 There are individual registers as well:
321 sp or r.sp has the value 1
322 rtoc or r.toc has the value 2
323 fpscr has the value 0
324 xer has the value 1
325 lr has the value 8
326 ctr has the value 9
327 pmr has the value 0
328 dar has the value 19
329 dsisr has the value 18
330 dec has the value 22
331 sdr1 has the value 25
332 srr0 has the value 26
333 srr1 has the value 27
334
81d4177b 335 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 336
337static const struct pd_reg pre_defined_registers[] =
338{
339 { "cr.0", 0 }, /* Condition Registers */
340 { "cr.1", 1 },
341 { "cr.2", 2 },
342 { "cr.3", 3 },
343 { "cr.4", 4 },
344 { "cr.5", 5 },
345 { "cr.6", 6 },
346 { "cr.7", 7 },
347
348 { "cr0", 0 },
349 { "cr1", 1 },
350 { "cr2", 2 },
351 { "cr3", 3 },
352 { "cr4", 4 },
353 { "cr5", 5 },
354 { "cr6", 6 },
355 { "cr7", 7 },
356
357 { "ctr", 9 },
358
359 { "dar", 19 }, /* Data Access Register */
360 { "dec", 22 }, /* Decrementer */
361 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
362
363 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 364 { "f.1", 1 },
365 { "f.10", 10 },
366 { "f.11", 11 },
367 { "f.12", 12 },
368 { "f.13", 13 },
369 { "f.14", 14 },
370 { "f.15", 15 },
371 { "f.16", 16 },
372 { "f.17", 17 },
373 { "f.18", 18 },
374 { "f.19", 19 },
375 { "f.2", 2 },
376 { "f.20", 20 },
377 { "f.21", 21 },
378 { "f.22", 22 },
379 { "f.23", 23 },
380 { "f.24", 24 },
381 { "f.25", 25 },
382 { "f.26", 26 },
383 { "f.27", 27 },
384 { "f.28", 28 },
385 { "f.29", 29 },
386 { "f.3", 3 },
252b5132
RH		 387 { "f.30", 30 },
388 { "f.31", 31 },
066be9f7
PB		 389
390 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
391 { "f.33", 33 },
392 { "f.34", 34 },
393 { "f.35", 35 },
394 { "f.36", 36 },
395 { "f.37", 37 },
396 { "f.38", 38 },
397 { "f.39", 39 },
81d4177b 398 { "f.4", 4 },
066be9f7
PB		 399 { "f.40", 40 },
400 { "f.41", 41 },
401 { "f.42", 42 },
402 { "f.43", 43 },
403 { "f.44", 44 },
404 { "f.45", 45 },
405 { "f.46", 46 },
406 { "f.47", 47 },
407 { "f.48", 48 },
408 { "f.49", 49 },
81d4177b 409 { "f.5", 5 },
066be9f7
PB		 410 { "f.50", 50 },
411 { "f.51", 51 },
412 { "f.52", 52 },
413 { "f.53", 53 },
414 { "f.54", 54 },
415 { "f.55", 55 },
416 { "f.56", 56 },
417 { "f.57", 57 },
418 { "f.58", 58 },
419 { "f.59", 59 },
81d4177b 420 { "f.6", 6 },
066be9f7
PB		 421 { "f.60", 60 },
422 { "f.61", 61 },
423 { "f.62", 62 },
424 { "f.63", 63 },
81d4177b
KH		 425 { "f.7", 7 },
426 { "f.8", 8 },
427 { "f.9", 9 },
428
429 { "f0", 0 },
430 { "f1", 1 },
431 { "f10", 10 },
432 { "f11", 11 },
433 { "f12", 12 },
434 { "f13", 13 },
435 { "f14", 14 },
436 { "f15", 15 },
437 { "f16", 16 },
438 { "f17", 17 },
439 { "f18", 18 },
440 { "f19", 19 },
441 { "f2", 2 },
442 { "f20", 20 },
443 { "f21", 21 },
444 { "f22", 22 },
445 { "f23", 23 },
446 { "f24", 24 },
447 { "f25", 25 },
448 { "f26", 26 },
449 { "f27", 27 },
450 { "f28", 28 },
451 { "f29", 29 },
452 { "f3", 3 },
252b5132
RH		 453 { "f30", 30 },
454 { "f31", 31 },
066be9f7
PB		 455
456 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
457 { "f33", 33 },
458 { "f34", 34 },
459 { "f35", 35 },
460 { "f36", 36 },
461 { "f37", 37 },
462 { "f38", 38 },
463 { "f39", 39 },
81d4177b 464 { "f4", 4 },
066be9f7
PB		 465 { "f40", 40 },
466 { "f41", 41 },
467 { "f42", 42 },
468 { "f43", 43 },
469 { "f44", 44 },
470 { "f45", 45 },
471 { "f46", 46 },
472 { "f47", 47 },
473 { "f48", 48 },
474 { "f49", 49 },
81d4177b 475 { "f5", 5 },
066be9f7
PB		 476 { "f50", 50 },
477 { "f51", 51 },
478 { "f52", 52 },
479 { "f53", 53 },
480 { "f54", 54 },
481 { "f55", 55 },
482 { "f56", 56 },
483 { "f57", 57 },
484 { "f58", 58 },
485 { "f59", 59 },
81d4177b 486 { "f6", 6 },
066be9f7
PB		 487 { "f60", 60 },
488 { "f61", 61 },
489 { "f62", 62 },
490 { "f63", 63 },
81d4177b
KH		 491 { "f7", 7 },
492 { "f8", 8 },
493 { "f9", 9 },
252b5132
RH		 494
495 { "fpscr", 0 },
496
c3d65c1c
BE		 497 /* Quantization registers used with pair single instructions. */
498 { "gqr.0", 0 },
499 { "gqr.1", 1 },
500 { "gqr.2", 2 },
501 { "gqr.3", 3 },
502 { "gqr.4", 4 },
503 { "gqr.5", 5 },
504 { "gqr.6", 6 },
505 { "gqr.7", 7 },
506 { "gqr0", 0 },
507 { "gqr1", 1 },
508 { "gqr2", 2 },
509 { "gqr3", 3 },
510 { "gqr4", 4 },
511 { "gqr5", 5 },
512 { "gqr6", 6 },
513 { "gqr7", 7 },
514
252b5132
RH		 515 { "lr", 8 }, /* Link Register */
516
517 { "pmr", 0 },
518
519 { "r.0", 0 }, /* General Purpose Registers */
520 { "r.1", 1 },
521 { "r.10", 10 },
522 { "r.11", 11 },
523 { "r.12", 12 },
524 { "r.13", 13 },
525 { "r.14", 14 },
526 { "r.15", 15 },
527 { "r.16", 16 },
528 { "r.17", 17 },
529 { "r.18", 18 },
530 { "r.19", 19 },
531 { "r.2", 2 },
532 { "r.20", 20 },
533 { "r.21", 21 },
534 { "r.22", 22 },
535 { "r.23", 23 },
536 { "r.24", 24 },
537 { "r.25", 25 },
538 { "r.26", 26 },
539 { "r.27", 27 },
540 { "r.28", 28 },
541 { "r.29", 29 },
542 { "r.3", 3 },
543 { "r.30", 30 },
544 { "r.31", 31 },
545 { "r.4", 4 },
546 { "r.5", 5 },
547 { "r.6", 6 },
548 { "r.7", 7 },
549 { "r.8", 8 },
550 { "r.9", 9 },
551
552 { "r.sp", 1 }, /* Stack Pointer */
553
554 { "r.toc", 2 }, /* Pointer to the table of contents */
555
556 { "r0", 0 }, /* More general purpose registers */
557 { "r1", 1 },
558 { "r10", 10 },
559 { "r11", 11 },
560 { "r12", 12 },
561 { "r13", 13 },
562 { "r14", 14 },
563 { "r15", 15 },
564 { "r16", 16 },
565 { "r17", 17 },
566 { "r18", 18 },
567 { "r19", 19 },
568 { "r2", 2 },
569 { "r20", 20 },
570 { "r21", 21 },
571 { "r22", 22 },
572 { "r23", 23 },
573 { "r24", 24 },
574 { "r25", 25 },
575 { "r26", 26 },
576 { "r27", 27 },
577 { "r28", 28 },
578 { "r29", 29 },
579 { "r3", 3 },
580 { "r30", 30 },
581 { "r31", 31 },
582 { "r4", 4 },
583 { "r5", 5 },
584 { "r6", 6 },
585 { "r7", 7 },
586 { "r8", 8 },
587 { "r9", 9 },
588
589 { "rtoc", 2 }, /* Table of contents */
590
591 { "sdr1", 25 }, /* Storage Description Register 1 */
592
593 { "sp", 1 },
594
595 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
596 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 597
066be9f7 598 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 599 { "v.1", 1 },
600 { "v.10", 10 },
601 { "v.11", 11 },
602 { "v.12", 12 },
603 { "v.13", 13 },
604 { "v.14", 14 },
605 { "v.15", 15 },
606 { "v.16", 16 },
607 { "v.17", 17 },
608 { "v.18", 18 },
609 { "v.19", 19 },
610 { "v.2", 2 },
611 { "v.20", 20 },
612 { "v.21", 21 },
613 { "v.22", 22 },
614 { "v.23", 23 },
615 { "v.24", 24 },
616 { "v.25", 25 },
617 { "v.26", 26 },
618 { "v.27", 27 },
619 { "v.28", 28 },
620 { "v.29", 29 },
621 { "v.3", 3 },
7a899fff
C		 622 { "v.30", 30 },
623 { "v.31", 31 },
81d4177b
KH		 624 { "v.4", 4 },
625 { "v.5", 5 },
626 { "v.6", 6 },
627 { "v.7", 7 },
628 { "v.8", 8 },
629 { "v.9", 9 },
7a899fff
C		 630
631 { "v0", 0 },
81d4177b
KH		 632 { "v1", 1 },
633 { "v10", 10 },
634 { "v11", 11 },
635 { "v12", 12 },
636 { "v13", 13 },
637 { "v14", 14 },
638 { "v15", 15 },
639 { "v16", 16 },
640 { "v17", 17 },
641 { "v18", 18 },
642 { "v19", 19 },
643 { "v2", 2 },
644 { "v20", 20 },
645 { "v21", 21 },
646 { "v22", 22 },
647 { "v23", 23 },
648 { "v24", 24 },
649 { "v25", 25 },
650 { "v26", 26 },
651 { "v27", 27 },
652 { "v28", 28 },
653 { "v29", 29 },
654 { "v3", 3 },
7a899fff
C		 655 { "v30", 30 },
656 { "v31", 31 },
81d4177b
KH		 657 { "v4", 4 },
658 { "v5", 5 },
659 { "v6", 6 },
660 { "v7", 7 },
661 { "v8", 8 },
7a899fff 662 { "v9", 9 },
252b5132 663
066be9f7
PB		 664 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
665 { "vs.1", 1 },
666 { "vs.10", 10 },
667 { "vs.11", 11 },
668 { "vs.12", 12 },
669 { "vs.13", 13 },
670 { "vs.14", 14 },
671 { "vs.15", 15 },
672 { "vs.16", 16 },
673 { "vs.17", 17 },
674 { "vs.18", 18 },
675 { "vs.19", 19 },
676 { "vs.2", 2 },
677 { "vs.20", 20 },
678 { "vs.21", 21 },
679 { "vs.22", 22 },
680 { "vs.23", 23 },
681 { "vs.24", 24 },
682 { "vs.25", 25 },
683 { "vs.26", 26 },
684 { "vs.27", 27 },
685 { "vs.28", 28 },
686 { "vs.29", 29 },
687 { "vs.3", 3 },
688 { "vs.30", 30 },
689 { "vs.31", 31 },
690 { "vs.32", 32 },
691 { "vs.33", 33 },
692 { "vs.34", 34 },
693 { "vs.35", 35 },
694 { "vs.36", 36 },
695 { "vs.37", 37 },
696 { "vs.38", 38 },
697 { "vs.39", 39 },
698 { "vs.4", 4 },
699 { "vs.40", 40 },
700 { "vs.41", 41 },
701 { "vs.42", 42 },
702 { "vs.43", 43 },
703 { "vs.44", 44 },
704 { "vs.45", 45 },
705 { "vs.46", 46 },
706 { "vs.47", 47 },
707 { "vs.48", 48 },
708 { "vs.49", 49 },
709 { "vs.5", 5 },
710 { "vs.50", 50 },
711 { "vs.51", 51 },
712 { "vs.52", 52 },
713 { "vs.53", 53 },
714 { "vs.54", 54 },
715 { "vs.55", 55 },
716 { "vs.56", 56 },
717 { "vs.57", 57 },
718 { "vs.58", 58 },
719 { "vs.59", 59 },
720 { "vs.6", 6 },
721 { "vs.60", 60 },
722 { "vs.61", 61 },
723 { "vs.62", 62 },
724 { "vs.63", 63 },
725 { "vs.7", 7 },
726 { "vs.8", 8 },
727 { "vs.9", 9 },
728
729 { "vs0", 0 },
730 { "vs1", 1 },
731 { "vs10", 10 },
732 { "vs11", 11 },
733 { "vs12", 12 },
734 { "vs13", 13 },
735 { "vs14", 14 },
736 { "vs15", 15 },
737 { "vs16", 16 },
738 { "vs17", 17 },
739 { "vs18", 18 },
740 { "vs19", 19 },
741 { "vs2", 2 },
742 { "vs20", 20 },
743 { "vs21", 21 },
744 { "vs22", 22 },
745 { "vs23", 23 },
746 { "vs24", 24 },
747 { "vs25", 25 },
748 { "vs26", 26 },
749 { "vs27", 27 },
750 { "vs28", 28 },
751 { "vs29", 29 },
752 { "vs3", 3 },
753 { "vs30", 30 },
754 { "vs31", 31 },
755 { "vs32", 32 },
756 { "vs33", 33 },
757 { "vs34", 34 },
758 { "vs35", 35 },
759 { "vs36", 36 },
760 { "vs37", 37 },
761 { "vs38", 38 },
762 { "vs39", 39 },
763 { "vs4", 4 },
764 { "vs40", 40 },
765 { "vs41", 41 },
766 { "vs42", 42 },
767 { "vs43", 43 },
768 { "vs44", 44 },
769 { "vs45", 45 },
770 { "vs46", 46 },
771 { "vs47", 47 },
772 { "vs48", 48 },
773 { "vs49", 49 },
774 { "vs5", 5 },
775 { "vs50", 50 },
776 { "vs51", 51 },
777 { "vs52", 52 },
778 { "vs53", 53 },
779 { "vs54", 54 },
780 { "vs55", 55 },
781 { "vs56", 56 },
782 { "vs57", 57 },
783 { "vs58", 58 },
784 { "vs59", 59 },
785 { "vs6", 6 },
786 { "vs60", 60 },
787 { "vs61", 61 },
788 { "vs62", 62 },
789 { "vs63", 63 },
790 { "vs7", 7 },
791 { "vs8", 8 },
792 { "vs9", 9 },
793
252b5132
RH		 794 { "xer", 1 },
795
796};
797
bc805888 798#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 799
800/* Given NAME, find the register number associated with that name, return
801 the integer value associated with the given name or -1 on failure. */
802
252b5132 803static int
98027b10 804reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 805{
806 int middle, low, high;
807 int cmp;
808
809 low = 0;
810 high = regcount - 1;
811
812 do
813 {
814 middle = (low + high) / 2;
815 cmp = strcasecmp (name, regs[middle].name);
816 if (cmp < 0)
817 high = middle - 1;
818 else if (cmp > 0)
819 low = middle + 1;
820 else
821 return regs[middle].value;
822 }
823 while (low <= high);
824
825 return -1;
826}
827
828/*
99a814a1 829 * Summary of register_name.
252b5132
RH		 830 *
831 * in: Input_line_pointer points to 1st char of operand.
832 *
833 * out: A expressionS.
834 * The operand may have been a register: in this case, X_op == O_register,
835 * X_add_number is set to the register number, and truth is returned.
836 * Input_line_pointer->(next non-blank) char after operand, or is in its
837 * original state.
838 */
839
b34976b6 840static bfd_boolean
98027b10 841register_name (expressionS *expressionP)
252b5132
RH		 842{
843 int reg_number;
844 char *name;
845 char *start;
846 char c;
847
99a814a1 848 /* Find the spelling of the operand. */
252b5132 849 start = name = input_line_pointer;
3882b010 850 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 851 name = ++input_line_pointer;
852
3882b010 853 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 854 return FALSE;
252b5132
RH		 855
856 c = get_symbol_end ();
857 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
858
468cced8
AM		 859 /* Put back the delimiting char. */
860 *input_line_pointer = c;
861
99a814a1 862 /* Look to see if it's in the register table. */
81d4177b 863 if (reg_number >= 0)
252b5132
RH		 864 {
865 expressionP->X_op = O_register;
866 expressionP->X_add_number = reg_number;
81d4177b 867
99a814a1 868 /* Make the rest nice. */
252b5132
RH		 869 expressionP->X_add_symbol = NULL;
870 expressionP->X_op_symbol = NULL;
b34976b6 871 return TRUE;
252b5132 872 }
468cced8
AM		 873
874 /* Reset the line as if we had not done anything. */
875 input_line_pointer = start;
b34976b6 876 return FALSE;
252b5132
RH		 877}
878\f
879/* This function is called for each symbol seen in an expression. It
880 handles the special parsing which PowerPC assemblers are supposed
881 to use for condition codes. */
882
883/* Whether to do the special parsing. */
b34976b6 884static bfd_boolean cr_operand;
252b5132
RH		 885
886/* Names to recognize in a condition code. This table is sorted. */
887static const struct pd_reg cr_names[] =
888{
889 { "cr0", 0 },
890 { "cr1", 1 },
891 { "cr2", 2 },
892 { "cr3", 3 },
893 { "cr4", 4 },
894 { "cr5", 5 },
895 { "cr6", 6 },
896 { "cr7", 7 },
897 { "eq", 2 },
898 { "gt", 1 },
899 { "lt", 0 },
900 { "so", 3 },
901 { "un", 3 }
902};
903
904/* Parsing function. This returns non-zero if it recognized an
905 expression. */
906
907int
91d6fa6a 908ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 909{
910 int val;
911
912 if (! cr_operand)
913 return 0;
914
13abbae3
AM		 915 if (*name == '%')
916 ++name;
252b5132
RH		 917 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
918 name);
919 if (val < 0)
920 return 0;
921
91d6fa6a
NC		 922 exp->X_op = O_constant;
923 exp->X_add_number = val;
252b5132
RH		 924
925 return 1;
926}
927\f
928/* Local variables. */
929
2b3c4602
AM		 930/* Whether to target xcoff64/elf64. */
931static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 932
252b5132
RH		 933/* Opcode hash table. */
934static struct hash_control *ppc_hash;
935
936/* Macro hash table. */
937static struct hash_control *ppc_macro_hash;
938
939#ifdef OBJ_ELF
99a814a1 940/* What type of shared library support to use. */
5d6f4f16 941static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 942
99a814a1 943/* Flags to set in the elf header. */
252b5132
RH		 944static flagword ppc_flags = 0;
945
946/* Whether this is Solaris or not. */
947#ifdef TARGET_SOLARIS_COMMENT
b34976b6 948#define SOLARIS_P TRUE
252b5132 949#else
b34976b6 950#define SOLARIS_P FALSE
252b5132
RH		 951#endif
952
b34976b6 953static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 954#endif
955
956#ifdef OBJ_XCOFF
957
958/* The RS/6000 assembler uses the .csect pseudo-op to generate code
959 using a bunch of different sections. These assembler sections,
960 however, are all encompassed within the .text or .data sections of
961 the final output file. We handle this by using different
962 subsegments within these main segments. */
963
964/* Next subsegment to allocate within the .text segment. */
965static subsegT ppc_text_subsegment = 2;
966
967/* Linked list of csects in the text section. */
968static symbolS *ppc_text_csects;
969
970/* Next subsegment to allocate within the .data segment. */
971static subsegT ppc_data_subsegment = 2;
972
973/* Linked list of csects in the data section. */
974static symbolS *ppc_data_csects;
975
976/* The current csect. */
977static symbolS *ppc_current_csect;
978
979/* The RS/6000 assembler uses a TOC which holds addresses of functions
980 and variables. Symbols are put in the TOC with the .tc pseudo-op.
981 A special relocation is used when accessing TOC entries. We handle
982 the TOC as a subsegment within the .data segment. We set it up if
983 we see a .toc pseudo-op, and save the csect symbol here. */
984static symbolS *ppc_toc_csect;
985
986/* The first frag in the TOC subsegment. */
987static fragS *ppc_toc_frag;
988
989/* The first frag in the first subsegment after the TOC in the .data
990 segment. NULL if there are no subsegments after the TOC. */
991static fragS *ppc_after_toc_frag;
992
993/* The current static block. */
994static symbolS *ppc_current_block;
995
996/* The COFF debugging section; set by md_begin. This is not the
997 .debug section, but is instead the secret BFD section which will
998 cause BFD to set the section number of a symbol to N_DEBUG. */
999static asection *ppc_coff_debug_section;
1000
85645aed
TG		 1001/* Structure to set the length field of the dwarf sections. */
1002struct dw_subsection {
1003 /* Subsections are simply linked. */
1004 struct dw_subsection *link;
1005
1006 /* The subsection number. */
1007 subsegT subseg;
1008
1009 /* Expression to compute the length of the section. */
1010 expressionS end_exp;
1011};
1012
1013static struct dw_section {
1014 /* Corresponding section. */
1015 segT sect;
1016
1017 /* Simply linked list of subsections with a label. */
1018 struct dw_subsection *list_subseg;
1019
1020 /* The anonymous subsection. */
1021 struct dw_subsection *anon_subseg;
1022} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1023#endif /* OBJ_XCOFF */
1024
1025#ifdef TE_PE
1026
1027/* Various sections that we need for PE coff support. */
1028static segT ydata_section;
1029static segT pdata_section;
1030static segT reldata_section;
1031static segT rdata_section;
1032static segT tocdata_section;
1033
81d4177b 1034/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1035static segT ppc_previous_section;
1036static segT ppc_current_section;
1037
1038#endif /* TE_PE */
1039
1040#ifdef OBJ_ELF
1041symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1042#define PPC_APUINFO_ISEL 0x40
1043#define PPC_APUINFO_PMR 0x41
1044#define PPC_APUINFO_RFMCI 0x42
1045#define PPC_APUINFO_CACHELCK 0x43
1046#define PPC_APUINFO_SPE 0x100
1047#define PPC_APUINFO_EFS 0x101
1048#define PPC_APUINFO_BRLOCK 0x102
b9c361e0 1049#define PPC_APUINFO_VLE 0x104
6a0c61b7 1050
b34976b6
AM		 1051/*
1052 * We keep a list of APUinfo
6a0c61b7
EZ		 1053 */
1054unsigned long *ppc_apuinfo_list;
1055unsigned int ppc_apuinfo_num;
1056unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1057#endif /* OBJ_ELF */
1058\f
1059#ifdef OBJ_ELF
15c1449b 1060const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1061#else
15c1449b 1062const char *const md_shortopts = "um:";
252b5132 1063#endif
cef4f754 1064#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1065const struct option md_longopts[] = {
cef4f754 1066 {"nops", required_argument, NULL, OPTION_NOPS},
252b5132
RH		 1067 {NULL, no_argument, NULL, 0}
1068};
15c1449b 1069const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1070
1071int
98027b10 1072md_parse_option (int c, char *arg)
252b5132 1073{
69fe9ce5
AM		 1074 ppc_cpu_t new_cpu;
1075
252b5132
RH		 1076 switch (c)
1077 {
1078 case 'u':
1079 /* -u means that any undefined symbols should be treated as
1080 external, which is the default for gas anyhow. */
1081 break;
1082
1083#ifdef OBJ_ELF
1084 case 'l':
1085 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1086 sake, recognize -be also. */
252b5132
RH		 1087 if (strcmp (arg, "e") == 0)
1088 {
1089 target_big_endian = 0;
1090 set_target_endian = 1;
b9c361e0 1091 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1092 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1093 }
1094 else
1095 return 0;
1096
1097 break;
1098
1099 case 'b':
1100 if (strcmp (arg, "e") == 0)
1101 {
1102 target_big_endian = 1;
1103 set_target_endian = 1;
1104 }
1105 else
1106 return 0;
1107
1108 break;
1109
1110 case 'K':
99a814a1 1111 /* Recognize -K PIC. */
252b5132
RH		 1112 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1113 {
1114 shlib = SHLIB_PIC;
1115 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1116 }
1117 else
1118 return 0;
1119
1120 break;
1121#endif
1122
7f6d05e8
CP		 1123 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1124 case 'a':
1125 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1126 {
1127#ifdef BFD64
1128 ppc_obj64 = 1;
d6ed37ed
AM		 1129 if (ppc_cpu & PPC_OPCODE_VLE)
1130 as_bad (_("the use of -mvle requires -a32."));
2a98c3a6
AM		 1131#else
1132 as_fatal (_("%s unsupported"), "-a64");
1133#endif
1134 }
7f6d05e8 1135 else if (strcmp (arg, "32") == 0)
2b3c4602 1136 ppc_obj64 = 0;
7f6d05e8
CP		 1137 else
1138 return 0;
1139 break;
81d4177b 1140
252b5132 1141 case 'm':
776fc418 1142 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
b9c361e0
JL		 1143 if (new_cpu != 0)
1144 {
1145 ppc_cpu = new_cpu;
d6ed37ed
AM		 1146 if (strcmp (arg, "vle") == 0)
1147 {
1148 if (set_target_endian && target_big_endian == 0)
1149 as_bad (_("the use of -mvle requires big endian."));
1150 if (ppc_obj64)
1151 as_bad (_("the use of -mvle requires -a32."));
1152 }
b9c361e0 1153 }
252b5132
RH		 1154
1155 else if (strcmp (arg, "regnames") == 0)
b34976b6 1156 reg_names_p = TRUE;
252b5132
RH		 1157
1158 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1159 reg_names_p = FALSE;
252b5132
RH		 1160
1161#ifdef OBJ_ELF
99a814a1
AM		 1162 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1163 that require relocation. */
252b5132
RH		 1164 else if (strcmp (arg, "relocatable") == 0)
1165 {
5d6f4f16 1166 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1167 ppc_flags |= EF_PPC_RELOCATABLE;
1168 }
1169
1170 else if (strcmp (arg, "relocatable-lib") == 0)
1171 {
5d6f4f16 1172 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1173 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1174 }
1175
99a814a1 1176 /* -memb, set embedded bit. */
252b5132
RH		 1177 else if (strcmp (arg, "emb") == 0)
1178 ppc_flags |= EF_PPC_EMB;
1179
cc643b88 1180 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1181 else if (strcmp (arg, "little") == 0
1182 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1183 {
1184 target_big_endian = 0;
1185 set_target_endian = 1;
b9c361e0 1186 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1187 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1188 }
1189
1190 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1191 {
1192 target_big_endian = 1;
1193 set_target_endian = 1;
1194 }
1195
1196 else if (strcmp (arg, "solaris") == 0)
1197 {
b34976b6 1198 msolaris = TRUE;
252b5132
RH		 1199 ppc_comment_chars = ppc_solaris_comment_chars;
1200 }
1201
1202 else if (strcmp (arg, "no-solaris") == 0)
1203 {
b34976b6 1204 msolaris = FALSE;
252b5132
RH		 1205 ppc_comment_chars = ppc_eabi_comment_chars;
1206 }
1207#endif
1208 else
1209 {
1210 as_bad (_("invalid switch -m%s"), arg);
1211 return 0;
1212 }
1213 break;
1214
1215#ifdef OBJ_ELF
1216 /* -V: SVR4 argument to print version ID. */
1217 case 'V':
1218 print_version_id ();
1219 break;
1220
1221 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1222 should be emitted or not. FIXME: Not implemented. */
1223 case 'Q':
1224 break;
1225
1226 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1227 rather than .stabs.excl, which is ignored by the linker.
1228 FIXME: Not implemented. */
1229 case 's':
1230 if (arg)
1231 return 0;
1232
1233 break;
1234#endif
1235
cef4f754
AM		 1236 case OPTION_NOPS:
1237 {
1238 char *end;
1239 nop_limit = strtoul (optarg, &end, 0);
1240 if (*end)
1241 as_bad (_("--nops needs a numeric argument"));
1242 }
1243 break;
85645aed 1244
252b5132
RH		 1245 default:
1246 return 0;
1247 }
1248
1249 return 1;
1250}
1251
1252void
98027b10 1253md_show_usage (FILE *stream)
252b5132 1254{
bc805888 1255 fprintf (stream, _("\
252b5132 1256PowerPC options:\n\
ce3d2015
AM		 1257-a32 generate ELF32/XCOFF32\n\
1258-a64 generate ELF64/XCOFF64\n\
1259-u ignored\n\
1260-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1261-mpwr generate code for POWER (RIOS1)\n\
1262-m601 generate code for PowerPC 601\n\
418c1742 1263-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1264 generate code for PowerPC 603/604\n\
1265-m403 generate code for PowerPC 403\n\
1266-m405 generate code for PowerPC 405\n\
1267-m440 generate code for PowerPC 440\n\
1268-m464 generate code for PowerPC 464\n\
1269-m476 generate code for PowerPC 476\n\
f5c120c5 1270-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1271 generate code for PowerPC 7400/7410/7450/7455\n\
1272-m750cl generate code for PowerPC 750cl\n"));
df12615d 1273 fprintf (stream, _("\
ce3d2015
AM		 1274-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1275-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1276-mbooke generate code for 32-bit PowerPC BookE\n\
1277-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1278-mpower4, -mpwr4 generate code for Power4 architecture\n\
1279-mpower5, -mpwr5, -mpwr5x\n\
1280 generate code for Power5 architecture\n\
1281-mpower6, -mpwr6 generate code for Power6 architecture\n\
1282-mpower7, -mpwr7 generate code for Power7 architecture\n\
5817ffd1 1283-mpower8, -mpwr8 generate code for Power8 architecture\n\
ce3d2015
AM		 1284-mcell generate code for Cell Broadband Engine architecture\n\
1285-mcom generate code Power/PowerPC common instructions\n\
1286-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1287 fprintf (stream, _("\
ce3d2015
AM		 1288-maltivec generate code for AltiVec\n\
1289-mvsx generate code for Vector-Scalar (VSX) instructions\n\
5817ffd1 1290-mhtm generate code for Hardware Transactional Memory\n\
ce3d2015
AM		 1291-me300 generate code for PowerPC e300 family\n\
1292-me500, -me500x2 generate code for Motorola e500 core complex\n\
1293-me500mc, generate code for Freescale e500mc core complex\n\
1294-me500mc64, generate code for Freescale e500mc64 core complex\n\
aea77599
AM		 1295-me5500, generate code for Freescale e5500 core complex\n\
1296-me6500, generate code for Freescale e6500 core complex\n\
ce3d2015 1297-mspe generate code for Motorola SPE instructions\n\
b9c361e0 1298-mvle generate code for Freescale VLE instructions\n\
ce3d2015
AM		 1299-mtitan generate code for AppliedMicro Titan core complex\n\
1300-mregnames Allow symbolic names for registers\n\
1301-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1302#ifdef OBJ_ELF
bc805888 1303 fprintf (stream, _("\
ce3d2015
AM		 1304-mrelocatable support for GCC's -mrelocatble option\n\
1305-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1306-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1307-mlittle, -mlittle-endian, -le\n\
ce3d2015 1308 generate code for a little endian machine\n\
b8b738ac 1309-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1310 generate code for a big endian machine\n\
1311-msolaris generate code for Solaris\n\
1312-mno-solaris do not generate code for Solaris\n\
b8b738ac 1313-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1314-V print assembler version number\n\
1315-Qy, -Qn ignored\n"));
252b5132 1316#endif
cef4f754
AM		 1317 fprintf (stream, _("\
1318-nops=count when aligning, more than COUNT nops uses a branch\n"));
252b5132
RH		 1319}
1320\f
1321/* Set ppc_cpu if it is not already set. */
1322
1323static void
98027b10 1324ppc_set_cpu (void)
252b5132
RH		 1325{
1326 const char *default_os = TARGET_OS;
1327 const char *default_cpu = TARGET_CPU;
1328
7102e95e 1329 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1330 {
2a98c3a6 1331 if (ppc_obj64)
bdc70b4a 1332 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1333 else if (strncmp (default_os, "aix", 3) == 0
1334 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1335 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1336 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1337 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1338 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1339 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1340 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1341 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1342 else
d6ed37ed 1343 as_fatal (_("unknown default cpu = %s, os = %s"),
99a814a1 1344 default_cpu, default_os);
252b5132
RH		 1345 }
1346}
1347
9232bbb0
AM		 1348/* Figure out the BFD architecture to use. This function and ppc_mach
1349 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1350
1351enum bfd_architecture
98027b10 1352ppc_arch (void)
252b5132
RH		 1353{
1354 const char *default_cpu = TARGET_CPU;
1355 ppc_set_cpu ();
1356
1357 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1358 return bfd_arch_powerpc;
b9c361e0
JL		 1359 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1360 return bfd_arch_powerpc;
1361 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
252b5132 1362 return bfd_arch_rs6000;
b9c361e0 1363 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
252b5132
RH		 1364 {
1365 if (strcmp (default_cpu, "rs6000") == 0)
1366 return bfd_arch_rs6000;
0baf16f2 1367 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1368 return bfd_arch_powerpc;
1369 }
1370
d6ed37ed 1371 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
252b5132
RH		 1372 return bfd_arch_unknown;
1373}
1374
7f6d05e8 1375unsigned long
98027b10 1376ppc_mach (void)
7f6d05e8 1377{
2a98c3a6
AM		 1378 if (ppc_obj64)
1379 return bfd_mach_ppc64;
1380 else if (ppc_arch () == bfd_arch_rs6000)
1381 return bfd_mach_rs6k;
ce3d2015
AM		 1382 else if (ppc_cpu & PPC_OPCODE_TITAN)
1383 return bfd_mach_ppc_titan;
b9c361e0
JL		 1384 else if (ppc_cpu & PPC_OPCODE_VLE)
1385 return bfd_mach_ppc_vle;
2a98c3a6
AM		 1386 else
1387 return bfd_mach_ppc;
7f6d05e8
CP		 1388}
1389
81d4177b 1390extern char*
98027b10 1391ppc_target_format (void)
7f6d05e8
CP		 1392{
1393#ifdef OBJ_COFF
1394#ifdef TE_PE
99a814a1 1395 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1396#elif TE_POWERMAC
0baf16f2 1397 return "xcoff-powermac";
7f6d05e8 1398#else
eb1e0e80 1399# ifdef TE_AIX5
edc1d652 1400 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1401# else
edc1d652 1402 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1403# endif
7f6d05e8 1404#endif
7f6d05e8
CP		 1405#endif
1406#ifdef OBJ_ELF
edc1d652
AM		 1407# ifdef TE_FreeBSD
1408 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1409# elif defined (TE_VXWORKS)
9d8504b1
PB		 1410 return "elf32-powerpc-vxworks";
1411# else
0baf16f2 1412 return (target_big_endian
2b3c4602
AM		 1413 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1414 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1415# endif
7f6d05e8
CP		 1416#endif
1417}
1418
b9c361e0
JL		 1419/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1420 Return TRUE if there's a problem, otherwise FALSE. */
1421
1422static bfd_boolean
1423insn_validate (const struct powerpc_opcode *op)
1424{
1425 const unsigned char *o;
1426 unsigned long omask = op->mask;
1427
1428 /* The mask had better not trim off opcode bits. */
1429 if ((op->opcode & omask) != op->opcode)
1430 {
1431 as_bad (_("mask trims opcode bits for %s"), op->name);
1432 return TRUE;
1433 }
1434
1435 /* The operands must not overlap the opcode or each other. */
1436 for (o = op->operands; *o; ++o)
1437 {
1438 if (*o >= num_powerpc_operands)
1439 {
1440 as_bad (_("operand index error for %s"), op->name);
1441 return TRUE;
1442 }
1443 else
1444 {
1445 const struct powerpc_operand *operand = &powerpc_operands[*o];
1446 if (operand->shift != PPC_OPSHIFT_INV)
1447 {
1448 unsigned long mask;
1449
1450 if (operand->shift >= 0)
1451 mask = operand->bitm << operand->shift;
1452 else
1453 mask = operand->bitm >> -operand->shift;
1454 if (omask & mask)
1455 {
1456 as_bad (_("operand %d overlap in %s"),
1457 (int) (o - op->operands), op->name);
1458 return TRUE;
1459 }
1460 omask |= mask;
1461 }
1462 }
1463 }
1464 return FALSE;
1465}
1466
69c040df 1467/* Insert opcodes and macros into hash tables. Called at startup and
1fe532cf 1468 for .machine pseudo. */
252b5132 1469
69c040df
AM		 1470static void
1471ppc_setup_opcodes (void)
252b5132 1472{
98027b10 1473 const struct powerpc_opcode *op;
252b5132
RH		 1474 const struct powerpc_opcode *op_end;
1475 const struct powerpc_macro *macro;
1476 const struct powerpc_macro *macro_end;
b84bf58a 1477 bfd_boolean bad_insn = FALSE;
252b5132 1478
69c040df
AM		 1479 if (ppc_hash != NULL)
1480 hash_die (ppc_hash);
1481 if (ppc_macro_hash != NULL)
1482 hash_die (ppc_macro_hash);
252b5132
RH		 1483
1484 /* Insert the opcodes into a hash table. */
1485 ppc_hash = hash_new ();
1486
c43a438d 1487 if (ENABLE_CHECKING)
b84bf58a 1488 {
c43a438d 1489 unsigned int i;
b84bf58a 1490
3b8b57a9
AM		 1491 /* An index into powerpc_operands is stored in struct fix
1492 fx_pcrel_adjust which is 8 bits wide. */
1493 gas_assert (num_powerpc_operands < 256);
1494
c43a438d
AM		 1495 /* Check operand masks. Code here and in the disassembler assumes
1496 all the 1's in the mask are contiguous. */
1497 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1498 {
c43a438d
AM		 1499 unsigned long mask = powerpc_operands[i].bitm;
1500 unsigned long right_bit;
1501 unsigned int j;
1502
1503 right_bit = mask & -mask;
1504 mask += right_bit;
1505 right_bit = mask & -mask;
1506 if (mask != right_bit)
1507 {
1508 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1509 bad_insn = TRUE;
1510 }
1511 for (j = i + 1; j < num_powerpc_operands; ++j)
1512 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1513 sizeof (powerpc_operands[0])) == 0)
1514 {
1515 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1516 j, i);
1517 bad_insn = TRUE;
1518 }
b84bf58a
AM		 1519 }
1520 }
1521
252b5132
RH		 1522 op_end = powerpc_opcodes + powerpc_num_opcodes;
1523 for (op = powerpc_opcodes; op < op_end; op++)
1524 {
c43a438d 1525 if (ENABLE_CHECKING)
b84bf58a 1526 {
d815f1a9 1527 if (op != powerpc_opcodes)
8dbcd839 1528 {
b9c361e0
JL		 1529 int old_opcode = PPC_OP (op[-1].opcode);
1530 int new_opcode = PPC_OP (op[0].opcode);
1531
1532#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1533 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1534 op->name, (unsigned int) (op - powerpc_opcodes),
1535 (unsigned int) new_opcode, (unsigned int) op->opcode,
1536 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1537#endif
1538
d815f1a9
AM		 1539 /* The major opcodes had better be sorted. Code in the
1540 disassembler assumes the insns are sorted according to
1541 major opcode. */
b9c361e0 1542 if (new_opcode < old_opcode)
d815f1a9
AM		 1543 {
1544 as_bad (_("major opcode is not sorted for %s"),
1545 op->name);
1546 bad_insn = TRUE;
1547 }
8dbcd839 1548 }
b9c361e0
JL		 1549 bad_insn |= insn_validate (op);
1550 }
c43a438d 1551
b9c361e0
JL		 1552 if ((ppc_cpu & op->flags) != 0
1553 && !(ppc_cpu & op->deprecated))
1554 {
1555 const char *retval;
1556
1557 retval = hash_insert (ppc_hash, op->name, (void *) op);
1558 if (retval != NULL)
c43a438d 1559 {
b9c361e0 1560 as_bad (_("duplicate instruction %s"),
c43a438d
AM		 1561 op->name);
1562 bad_insn = TRUE;
1563 }
b9c361e0
JL		 1564 }
1565 }
c43a438d 1566
b9c361e0
JL		 1567 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1568 for (op = powerpc_opcodes; op < op_end; op++)
1569 hash_insert (ppc_hash, op->name, (void *) op);
1570
1571 op_end = vle_opcodes + vle_num_opcodes;
1572 for (op = vle_opcodes; op < op_end; op++)
1573 {
1574 if (ENABLE_CHECKING)
1575 {
1576 if (op != vle_opcodes)
1577 {
1578 unsigned old_seg, new_seg;
1579
1580 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1581 old_seg = VLE_OP_TO_SEG (old_seg);
1582 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1583 new_seg = VLE_OP_TO_SEG (new_seg);
1584
1585#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1586 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1587 op->name, (unsigned int) (op - powerpc_opcodes),
1588 (unsigned int) new_seg, (unsigned int) op->opcode,
1589 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1590#endif
1591 /* The major opcodes had better be sorted. Code in the
1592 disassembler assumes the insns are sorted according to
1593 major opcode. */
1594 if (new_seg < old_seg)
1595 {
1596 as_bad (_("major opcode is not sorted for %s"),
1597 op->name);
1598 bad_insn = TRUE;
1599 }
1600 }
1601
1602 bad_insn |= insn_validate (op);
c43a438d 1603 }
252b5132 1604
bdc70b4a 1605 if ((ppc_cpu & op->flags) != 0
1cb0a767 1606 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1607 {
1608 const char *retval;
1609
98027b10 1610 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1611 if (retval != NULL)
252b5132 1612 {
b84bf58a 1613 as_bad (_("duplicate instruction %s"),
99a814a1 1614 op->name);
b84bf58a 1615 bad_insn = TRUE;
252b5132
RH		 1616 }
1617 }
1618 }
1619
b9c361e0
JL		 1620 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1621 for (op = vle_opcodes; op < op_end; op++)
98027b10 1622 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1623
252b5132
RH		 1624 /* Insert the macros into a hash table. */
1625 ppc_macro_hash = hash_new ();
1626
1627 macro_end = powerpc_macros + powerpc_num_macros;
1628 for (macro = powerpc_macros; macro < macro_end; macro++)
1629 {
33740db9 1630 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1631 {
1632 const char *retval;
1633
98027b10 1634 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1635 if (retval != (const char *) NULL)
1636 {
b84bf58a
AM		 1637 as_bad (_("duplicate macro %s"), macro->name);
1638 bad_insn = TRUE;
252b5132
RH		 1639 }
1640 }
1641 }
1642
b84bf58a 1643 if (bad_insn)
252b5132 1644 abort ();
69c040df
AM		 1645}
1646
1647/* This function is called when the assembler starts up. It is called
1648 after the options have been parsed and the output file has been
1649 opened. */
1650
1651void
98027b10 1652md_begin (void)
69c040df
AM		 1653{
1654 ppc_set_cpu ();
1655
1656 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
8fbf7334 1657 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
69c040df
AM		 1658
1659#ifdef OBJ_ELF
1660 /* Set the ELF flags if desired. */
1661 if (ppc_flags && !msolaris)
1662 bfd_set_private_flags (stdoutput, ppc_flags);
1663#endif
1664
1665 ppc_setup_opcodes ();
252b5132 1666
67c1ffbe 1667 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1668 by the user. */
252b5132
RH		 1669 if (!set_target_endian)
1670 {
1671 set_target_endian = 1;
1672 target_big_endian = PPC_BIG_ENDIAN;
1673 }
1674
1675#ifdef OBJ_XCOFF
1676 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1677
1678 /* Create dummy symbols to serve as initial csects. This forces the
1679 text csects to precede the data csects. These symbols will not
1680 be output. */
1681 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1682 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1683 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1684 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1685#endif
1686
1687#ifdef TE_PE
1688
1689 ppc_current_section = text_section;
81d4177b 1690 ppc_previous_section = 0;
252b5132
RH		 1691
1692#endif
1693}
1694
6a0c61b7 1695void
98027b10 1696ppc_cleanup (void)
6a0c61b7 1697{
dc1d03fc 1698#ifdef OBJ_ELF
6a0c61b7
EZ		 1699 if (ppc_apuinfo_list == NULL)
1700 return;
1701
1702 /* Ok, so write the section info out. We have this layout:
1703
1704 byte data what
1705 ---- ---- ----
1706 0 8 length of "APUinfo\0"
1707 4 (n*4) number of APU's (4 bytes each)
1708 8 2 note type 2
1709 12 "APUinfo\0" name
1710 20 APU#1 first APU's info
1711 24 APU#2 second APU's info
1712 ... ...
1713 */
1714 {
1715 char *p;
1716 asection *seg = now_seg;
1717 subsegT subseg = now_subseg;
1718 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1719 unsigned int i;
6a0c61b7
EZ		 1720
1721 /* Create the .PPC.EMB.apuinfo section. */
1722 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1723 bfd_set_section_flags (stdoutput,
1724 apuinfo_secp,
e1a9cb8e 1725 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1726
1727 p = frag_more (4);
1728 md_number_to_chars (p, (valueT) 8, 4);
1729
1730 p = frag_more (4);
e98d298c 1731 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1732
1733 p = frag_more (4);
1734 md_number_to_chars (p, (valueT) 2, 4);
1735
1736 p = frag_more (8);
1737 strcpy (p, "APUinfo");
1738
1739 for (i = 0; i < ppc_apuinfo_num; i++)
1740 {
b34976b6
AM		 1741 p = frag_more (4);
1742 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1743 }
1744
1745 frag_align (2, 0, 0);
1746
1747 /* We probably can't restore the current segment, for there likely
1748 isn't one yet... */
1749 if (seg && subseg)
1750 subseg_set (seg, subseg);
1751 }
dc1d03fc 1752#endif
6a0c61b7
EZ		 1753}
1754
252b5132
RH		 1755/* Insert an operand value into an instruction. */
1756
1757static unsigned long
a1867a27
AM		 1758ppc_insert_operand (unsigned long insn,
1759 const struct powerpc_operand *operand,
1760 offsetT val,
91d6fa6a 1761 ppc_cpu_t cpu,
a1867a27
AM		 1762 char *file,
1763 unsigned int line)
252b5132 1764{
b84bf58a 1765 long min, max, right;
eb42fac1 1766
b84bf58a
AM		 1767 max = operand->bitm;
1768 right = max & -max;
1769 min = 0;
1770
1771 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1772 {
b84bf58a 1773 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1774 max = (max >> 1) & -right;
1775 min = ~max & -right;
b84bf58a 1776 }
252b5132 1777
b84bf58a 1778 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1779 max++;
252b5132 1780
b84bf58a 1781 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1782 {
1783 long tmp = min;
1784 min = -max;
1785 max = -tmp;
1786 }
b84bf58a 1787
a1867a27
AM		 1788 if (min <= max)
1789 {
1790 /* Some people write constants with the sign extension done by
1791 hand but only up to 32 bits. This shouldn't really be valid,
1792 but, to permit this code to assemble on a 64-bit host, we
1793 sign extend the 32-bit value to 64 bits if so doing makes the
1794 value valid. */
1795 if (val > max
1796 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1797 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1798 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1799 val = val - 0x80000000 - 0x80000000;
1800
1801 /* Similarly, people write expressions like ~(1<<15), and expect
1802 this to be OK for a 32-bit unsigned value. */
1803 else if (val < min
1804 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1805 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1806 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1807 val = val + 0x80000000 + 0x80000000;
1808
1809 else if (val < min
1810 || val > max
1811 || (val & (right - 1)) != 0)
1812 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1813 }
b84bf58a 1814
252b5132
RH		 1815 if (operand->insert)
1816 {
1817 const char *errmsg;
1818
1819 errmsg = NULL;
91d6fa6a 1820 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1821 if (errmsg != (const char *) NULL)
ee2c9aa9 1822 as_bad_where (file, line, "%s", errmsg);
252b5132 1823 }
b9c361e0 1824 else if (operand->shift >= 0)
b84bf58a 1825 insn |= ((long) val & operand->bitm) << operand->shift;
b9c361e0
JL		 1826 else
1827 insn |= ((long) val & operand->bitm) >> -operand->shift;
252b5132
RH		 1828
1829 return insn;
1830}
1831
1832\f
1833#ifdef OBJ_ELF
1834/* Parse @got, etc. and return the desired relocation. */
1835static bfd_reloc_code_real_type
98027b10 1836ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1837{
1838 struct map_bfd {
1839 char *string;
b7d7dc63
AM		 1840 unsigned int length : 8;
1841 unsigned int valid32 : 1;
1842 unsigned int valid64 : 1;
1843 unsigned int reloc;
252b5132
RH		 1844 };
1845
1846 char ident[20];
1847 char *str = *str_p;
1848 char *str2;
1849 int ch;
1850 int len;
15c1449b 1851 const struct map_bfd *ptr;
252b5132 1852
b7d7dc63
AM		 1853#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1854#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1855#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1856
15c1449b 1857 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1858 MAP ("l", BFD_RELOC_LO16),
1859 MAP ("h", BFD_RELOC_HI16),
1860 MAP ("ha", BFD_RELOC_HI16_S),
1861 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1862 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1863 MAP ("got", BFD_RELOC_16_GOTOFF),
1864 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1865 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1866 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1867 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1868 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1869 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1870 MAP ("copy", BFD_RELOC_PPC_COPY),
1871 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1872 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1873 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1874 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1875 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1876 MAP ("tls", BFD_RELOC_PPC_TLS),
1877 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1878 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1879 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1880 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1881 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1882 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1883 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1884 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1885 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1886 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1887 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1888 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1889 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1890 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1891 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1892 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1893 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1894 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1895 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1896 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1897 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1898 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1899 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1900 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1901 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1902 MAP32 ("fixup", BFD_RELOC_CTOR),
1903 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1904 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1905 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1906 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1907 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1908 MAP32 ("sdarel", BFD_RELOC_GPREL16),
b9c361e0
JL		 1909 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1910 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1911 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
b7d7dc63
AM		 1912 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1913 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1914 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1915 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1916 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1917 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1918 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1919 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1920 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
b9c361e0 1921 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
b7d7dc63
AM		 1922 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1923 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1924 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1925 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1926 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1927 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1928 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1929 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
f9c6b907
AM		 1930 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1931 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
b7d7dc63
AM		 1932 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1933 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1934 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1935 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1936 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1937 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1938 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1939 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1940 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
f9c6b907
AM		 1941 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1942 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
b7d7dc63
AM		 1943 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1944 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1945 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1946 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
f9c6b907
AM		 1947 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1948 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
b7d7dc63
AM		 1949 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1950 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1951 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1952 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1953 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1954 };
1955
1956 if (*str++ != '@')
1957 return BFD_RELOC_UNUSED;
1958
1959 for (ch = *str, str2 = ident;
1960 (str2 < ident + sizeof (ident) - 1
3882b010 1961 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1962 ch = *++str)
1963 {
3882b010 1964 *str2++ = TOLOWER (ch);
252b5132
RH		 1965 }
1966
1967 *str2 = '\0';
1968 len = str2 - ident;
1969
1970 ch = ident[0];
1971 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1972 if (ch == ptr->string[0]
1973 && len == ptr->length
b7d7dc63
AM		 1974 && memcmp (ident, ptr->string, ptr->length) == 0
1975 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1976 {
15c1449b
AM		 1977 int reloc = ptr->reloc;
1978
727fc41e
AM		 1979 if (!ppc_obj64 && exp_p->X_add_number != 0)
1980 {
1981 switch (reloc)
1982 {
1983 case BFD_RELOC_16_GOTOFF:
1984 case BFD_RELOC_LO16_GOTOFF:
1985 case BFD_RELOC_HI16_GOTOFF:
1986 case BFD_RELOC_HI16_S_GOTOFF:
1987 as_warn (_("identifier+constant@got means "
1988 "identifier@got+constant"));
1989 break;
1990
1991 case BFD_RELOC_PPC_GOT_TLSGD16:
1992 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1993 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1994 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1995 case BFD_RELOC_PPC_GOT_TLSLD16:
1996 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1997 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1998 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1999 case BFD_RELOC_PPC_GOT_DTPREL16:
2000 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2001 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2002 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2003 case BFD_RELOC_PPC_GOT_TPREL16:
2004 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2005 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2006 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2007 as_bad (_("symbol+offset not supported for got tls"));
2008 break;
2009 }
2010 }
5f6db75a
AM		 2011
2012 /* Now check for identifier@suffix+constant. */
2013 if (*str == '-' || *str == '+')
252b5132 2014 {
5f6db75a
AM		 2015 char *orig_line = input_line_pointer;
2016 expressionS new_exp;
2017
2018 input_line_pointer = str;
2019 expression (&new_exp);
2020 if (new_exp.X_op == O_constant)
252b5132 2021 {
5f6db75a
AM		 2022 exp_p->X_add_number += new_exp.X_add_number;
2023 str = input_line_pointer;
252b5132 2024 }
5f6db75a
AM		 2025
2026 if (&input_line_pointer != str_p)
2027 input_line_pointer = orig_line;
252b5132 2028 }
252b5132 2029 *str_p = str;
0baf16f2 2030
2b3c4602 2031 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 2032 && exp_p->X_op == O_symbol
2033 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 2034 {
9f2b53d7
AM		 2035 /* Change the symbol so that the dummy .TOC. symbol can be
2036 omitted from the object file. */
0baf16f2
AM		 2037 exp_p->X_add_symbol = &abs_symbol;
2038 }
2039
15c1449b 2040 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 2041 }
2042
2043 return BFD_RELOC_UNUSED;
2044}
2045
99a814a1
AM		 2046/* Like normal .long/.short/.word, except support @got, etc.
2047 Clobbers input_line_pointer, checks end-of-line. */
252b5132 2048static void
98027b10 2049ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 2050{
2051 expressionS exp;
2052 bfd_reloc_code_real_type reloc;
2053
2054 if (is_it_end_of_statement ())
2055 {
2056 demand_empty_rest_of_line ();
2057 return;
2058 }
2059
2060 do
2061 {
2062 expression (&exp);
27285eed 2063 if (*input_line_pointer == '@'
99a814a1
AM		 2064 && (reloc = ppc_elf_suffix (&input_line_pointer,
2065 &exp)) != BFD_RELOC_UNUSED)
252b5132 2066 {
99a814a1
AM		 2067 reloc_howto_type *reloc_howto;
2068 int size;
2069
2070 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
2071 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 2072
2073 if (size > nbytes)
0baf16f2
AM		 2074 {
2075 as_bad (_("%s relocations do not fit in %d bytes\n"),
2076 reloc_howto->name, nbytes);
2077 }
252b5132
RH		 2078 else
2079 {
0baf16f2
AM		 2080 char *p;
2081 int offset;
252b5132 2082
0baf16f2 2083 p = frag_more (nbytes);
aa0c8c1a 2084 memset (p, 0, nbytes);
0baf16f2
AM		 2085 offset = 0;
2086 if (target_big_endian)
2087 offset = nbytes - size;
99a814a1
AM		 2088 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
2089 &exp, 0, reloc);
252b5132
RH		 2090 }
2091 }
2092 else
2093 emit_expr (&exp, (unsigned int) nbytes);
2094 }
2095 while (*input_line_pointer++ == ',');
2096
99a814a1
AM		 2097 /* Put terminator back into stream. */
2098 input_line_pointer--;
252b5132
RH		 2099 demand_empty_rest_of_line ();
2100}
2101
2102/* Solaris pseduo op to change to the .rodata section. */
2103static void
98027b10 2104ppc_elf_rdata (int xxx)
252b5132
RH		 2105{
2106 char *save_line = input_line_pointer;
2107 static char section[] = ".rodata\n";
2108
99a814a1 2109 /* Just pretend this is .section .rodata */
252b5132
RH		 2110 input_line_pointer = section;
2111 obj_elf_section (xxx);
2112
2113 input_line_pointer = save_line;
2114}
2115
99a814a1 2116/* Pseudo op to make file scope bss items. */
252b5132 2117static void
98027b10 2118ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2119{
98027b10
AM		 2120 char *name;
2121 char c;
2122 char *p;
252b5132 2123 offsetT size;
98027b10 2124 symbolS *symbolP;
252b5132
RH		 2125 offsetT align;
2126 segT old_sec;
2127 int old_subsec;
2128 char *pfrag;
2129 int align2;
2130
2131 name = input_line_pointer;
2132 c = get_symbol_end ();
2133
99a814a1 2134 /* just after name is now '\0'. */
252b5132
RH		 2135 p = input_line_pointer;
2136 *p = c;
2137 SKIP_WHITESPACE ();
2138 if (*input_line_pointer != ',')
2139 {
d6ed37ed 2140 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 2141 ignore_rest_of_line ();
2142 return;
2143 }
2144
2145 input_line_pointer++; /* skip ',' */
2146 if ((size = get_absolute_expression ()) < 0)
2147 {
2148 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2149 ignore_rest_of_line ();
2150 return;
2151 }
2152
2153 /* The third argument to .lcomm is the alignment. */
2154 if (*input_line_pointer != ',')
2155 align = 8;
2156 else
2157 {
2158 ++input_line_pointer;
2159 align = get_absolute_expression ();
2160 if (align <= 0)
2161 {
2162 as_warn (_("ignoring bad alignment"));
2163 align = 8;
2164 }
2165 }
2166
2167 *p = 0;
2168 symbolP = symbol_find_or_make (name);
2169 *p = c;
2170
2171 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2172 {
d6ed37ed 2173 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 2174 S_GET_NAME (symbolP));
2175 ignore_rest_of_line ();
2176 return;
2177 }
2178
2179 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2180 {
d6ed37ed 2181 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 2182 S_GET_NAME (symbolP),
2183 (long) S_GET_VALUE (symbolP),
2184 (long) size);
2185
2186 ignore_rest_of_line ();
2187 return;
2188 }
2189
99a814a1 2190 /* Allocate_bss. */
252b5132
RH		 2191 old_sec = now_seg;
2192 old_subsec = now_subseg;
2193 if (align)
2194 {
99a814a1 2195 /* Convert to a power of 2 alignment. */
252b5132
RH		 2196 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2197 if (align != 1)
2198 {
d6ed37ed 2199 as_bad (_("common alignment not a power of 2"));
252b5132
RH		 2200 ignore_rest_of_line ();
2201 return;
2202 }
2203 }
2204 else
2205 align2 = 0;
2206
2207 record_alignment (bss_section, align2);
cbe02d4f 2208 subseg_set (bss_section, 1);
252b5132
RH		 2209 if (align2)
2210 frag_align (align2, 0, 0);
2211 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2212 symbol_get_frag (symbolP)->fr_symbol = 0;
2213 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2214 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2215 (char *) 0);
2216 *pfrag = 0;
2217 S_SET_SIZE (symbolP, size);
2218 S_SET_SEGMENT (symbolP, bss_section);
2219 subseg_set (old_sec, old_subsec);
2220 demand_empty_rest_of_line ();
2221}
2222
2223/* Validate any relocations emitted for -mrelocatable, possibly adding
2224 fixups for word relocations in writable segments, so we can adjust
2225 them at runtime. */
2226static void
98027b10 2227ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2228{
2229 if (fixp->fx_done || fixp->fx_pcrel)
2230 return;
2231
2232 switch (shlib)
2233 {
2234 case SHLIB_NONE:
2235 case SHLIB_PIC:
2236 return;
2237
5d6f4f16 2238 case SHLIB_MRELOCATABLE:
252b5132
RH		 2239 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2240 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2241 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2242 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2243 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2244 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2245 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2246 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2247 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2248 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2249 && strcmp (segment_name (seg), ".got2") != 0
2250 && strcmp (segment_name (seg), ".dtors") != 0
2251 && strcmp (segment_name (seg), ".ctors") != 0
2252 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2253 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2254 && strcmp (segment_name (seg), ".eh_frame") != 0
2255 && strcmp (segment_name (seg), ".ex_shared") != 0)
2256 {
2257 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2258 || fixp->fx_r_type != BFD_RELOC_CTOR)
2259 {
2260 as_bad_where (fixp->fx_file, fixp->fx_line,
d6ed37ed 2261 _("relocation cannot be done when using -mrelocatable"));
252b5132
RH		 2262 }
2263 }
2264 return;
2265 }
2266}
0baf16f2 2267
7e8d4ab4
AM		 2268/* Prevent elf_frob_file_before_adjust removing a weak undefined
2269 function descriptor sym if the corresponding code sym is used. */
2270
2271void
98027b10 2272ppc_frob_file_before_adjust (void)
0baf16f2 2273{
7e8d4ab4 2274 symbolS *symp;
9232bbb0 2275 asection *toc;
0baf16f2 2276
7e8d4ab4
AM		 2277 if (!ppc_obj64)
2278 return;
2279
2280 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2281 {
7e8d4ab4
AM		 2282 const char *name;
2283 char *dotname;
2284 symbolS *dotsym;
2285 size_t len;
2286
2287 name = S_GET_NAME (symp);
2288 if (name[0] == '.')
2289 continue;
2290
2291 if (! S_IS_WEAK (symp)
2292 || S_IS_DEFINED (symp))
2293 continue;
2294
2295 len = strlen (name) + 1;
2296 dotname = xmalloc (len + 1);
2297 dotname[0] = '.';
2298 memcpy (dotname + 1, name, len);
461b725f 2299 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2300 free (dotname);
2301 if (dotsym != NULL && (symbol_used_p (dotsym)
2302 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2303 symbol_mark_used (symp);
2304
0baf16f2
AM		 2305 }
2306
9232bbb0
AM		 2307 toc = bfd_get_section_by_name (stdoutput, ".toc");
2308 if (toc != NULL
01efc3af 2309 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2310 && bfd_section_size (stdoutput, toc) > 0x10000)
2311 as_warn (_("TOC section size exceeds 64k"));
a38a07e0
AM		 2312}
2313
2314/* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2315 emitted. Other uses of .TOC. will cause the symbol to be marked
2316 with BSF_KEEP in md_apply_fix. */
9232bbb0 2317
a38a07e0
AM		 2318void
2319ppc_elf_adjust_symtab (void)
2320{
2321 if (ppc_obj64)
2322 {
2323 symbolS *symp;
2324 symp = symbol_find (".TOC.");
2325 if (symp != NULL)
2326 {
2327 asymbol *bsym = symbol_get_bfdsym (symp);
2328 if ((bsym->flags & BSF_KEEP) == 0)
2329 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
a38a07e0
AM		 2330 }
2331 }
0baf16f2 2332}
252b5132
RH		 2333#endif /* OBJ_ELF */
2334\f
2335#ifdef TE_PE
2336
2337/*
99a814a1 2338 * Summary of parse_toc_entry.
252b5132
RH		 2339 *
2340 * in: Input_line_pointer points to the '[' in one of:
2341 *
2342 * [toc] [tocv] [toc32] [toc64]
2343 *
2344 * Anything else is an error of one kind or another.
2345 *
81d4177b 2346 * out:
252b5132
RH		 2347 * return value: success or failure
2348 * toc_kind: kind of toc reference
2349 * input_line_pointer:
2350 * success: first char after the ']'
2351 * failure: unchanged
2352 *
2353 * settings:
2354 *
2355 * [toc] - rv == success, toc_kind = default_toc
2356 * [tocv] - rv == success, toc_kind = data_in_toc
2357 * [toc32] - rv == success, toc_kind = must_be_32
2358 * [toc64] - rv == success, toc_kind = must_be_64
2359 *
2360 */
2361
81d4177b
KH		 2362enum toc_size_qualifier
2363{
252b5132
RH		 2364 default_toc, /* The toc cell constructed should be the system default size */
2365 data_in_toc, /* This is a direct reference to a toc cell */
2366 must_be_32, /* The toc cell constructed must be 32 bits wide */
2367 must_be_64 /* The toc cell constructed must be 64 bits wide */
2368};
2369
2370static int
98027b10 2371parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2372{
2373 char *start;
2374 char *toc_spec;
2375 char c;
2376 enum toc_size_qualifier t;
2377
99a814a1 2378 /* Save the input_line_pointer. */
252b5132
RH		 2379 start = input_line_pointer;
2380
99a814a1 2381 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2382 ++input_line_pointer;
2383 SKIP_WHITESPACE ();
81d4177b 2384
99a814a1 2385 /* Find the spelling of the operand. */
252b5132
RH		 2386 toc_spec = input_line_pointer;
2387 c = get_symbol_end ();
2388
99a814a1 2389 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2390 {
2391 t = default_toc;
2392 }
99a814a1 2393 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2394 {
2395 t = data_in_toc;
2396 }
99a814a1 2397 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2398 {
2399 t = must_be_32;
2400 }
99a814a1 2401 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2402 {
2403 t = must_be_64;
2404 }
2405 else
2406 {
2407 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2408 *input_line_pointer = c;
2409 input_line_pointer = start;
252b5132
RH		 2410 return 0;
2411 }
2412
99a814a1
AM		 2413 /* Now find the ']'. */
2414 *input_line_pointer = c;
252b5132 2415
81d4177b
KH		 2416 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2417 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2418
2419 if (c != ']')
2420 {
2421 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2422 input_line_pointer = start;
252b5132
RH		 2423 return 0;
2424 }
2425
99a814a1 2426 *toc_kind = t;
252b5132
RH		 2427 return 1;
2428}
2429#endif
3b8b57a9
AM		 2430
2431#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2432/* See whether a symbol is in the TOC section. */
2433
2434static int
2435ppc_is_toc_sym (symbolS *sym)
2436{
2437#ifdef OBJ_XCOFF
9f6e76f4
TG		 2438 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2439 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
3b8b57a9
AM		 2440#endif
2441#ifdef OBJ_ELF
2442 const char *sname = segment_name (S_GET_SEGMENT (sym));
2443 if (ppc_obj64)
2444 return strcmp (sname, ".toc") == 0;
2445 else
2446 return strcmp (sname, ".got") == 0;
2447#endif
2448}
2449#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 2450\f
2451
dc1d03fc 2452#ifdef OBJ_ELF
6a0c61b7
EZ		 2453#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2454static void
98027b10 2455ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2456{
2457 unsigned int i;
2458
2459 /* Check we don't already exist. */
2460 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2461 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2462 return;
b34976b6 2463
6a0c61b7
EZ		 2464 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2465 {
2466 if (ppc_apuinfo_num_alloc == 0)
2467 {
2468 ppc_apuinfo_num_alloc = 4;
2469 ppc_apuinfo_list = (unsigned long *)
2470 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2471 }
2472 else
2473 {
2474 ppc_apuinfo_num_alloc += 4;
2475 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2476 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2477 }
2478 }
dc1d03fc 2479 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2480}
2481#undef APUID
dc1d03fc 2482#endif
6a0c61b7
EZ		 2483\f
2484
252b5132
RH		 2485/* We need to keep a list of fixups. We can't simply generate them as
2486 we go, because that would require us to first create the frag, and
2487 that would screw up references to ``.''. */
2488
2489struct ppc_fixup
2490{
2491 expressionS exp;
2492 int opindex;
2493 bfd_reloc_code_real_type reloc;
2494};
2495
2496#define MAX_INSN_FIXUPS (5)
2497
b9c361e0
JL		 2498/* Form I16L. */
2499#define E_OR2I_INSN 0x7000C000
2500#define E_AND2I_DOT_INSN 0x7000C800
2501#define E_OR2IS_INSN 0x7000D000
2502#define E_LIS_INSN 0x7000E000
2503#define E_AND2IS_DOT_INSN 0x7000E800
2504
2505/* Form I16A. */
2506#define E_ADD2I_DOT_INSN 0x70008800
2507#define E_ADD2IS_INSN 0x70009000
2508#define E_CMP16I_INSN 0x70009800
2509#define E_MULL2I_INSN 0x7000A000
2510#define E_CMPL16I_INSN 0x7000A800
2511#define E_CMPH16I_INSN 0x7000B000
2512#define E_CMPHL16I_INSN 0x7000B800
2513
252b5132
RH		 2514/* This routine is called for each instruction to be assembled. */
2515
2516void
98027b10 2517md_assemble (char *str)
252b5132
RH		 2518{
2519 char *s;
2520 const struct powerpc_opcode *opcode;
2521 unsigned long insn;
2522 const unsigned char *opindex_ptr;
2523 int skip_optional;
2524 int need_paren;
2525 int next_opindex;
2526 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2527 int fc;
2528 char *f;
09b935ac 2529 int addr_mod;
252b5132 2530 int i;
b9c361e0 2531 unsigned int insn_length;
252b5132
RH		 2532
2533 /* Get the opcode. */
3882b010 2534 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2535 ;
2536 if (*s != '\0')
2537 *s++ = '\0';
2538
2539 /* Look up the opcode in the hash table. */
2540 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2541 if (opcode == (const struct powerpc_opcode *) NULL)
2542 {
2543 const struct powerpc_macro *macro;
2544
2545 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2546 if (macro == (const struct powerpc_macro *) NULL)
d6ed37ed 2547 as_bad (_("unrecognized opcode: `%s'"), str);
252b5132
RH		 2548 else
2549 ppc_macro (s, macro);
2550
2551 return;
2552 }
2553
2554 insn = opcode->opcode;
2555
2556 str = s;
3882b010 2557 while (ISSPACE (*str))
252b5132
RH		 2558 ++str;
2559
2560 /* PowerPC operands are just expressions. The only real issue is
2561 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2562 an optional operand separate the operands only with commas (in some
2563 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2564 have optional operands). Most instructions with optional operands
2565 have only one. Those that have more than one optional operand can
2566 take either all their operands or none. So, before we start seriously
2567 parsing the operands, we check to see if we have optional operands,
2568 and if we do, we count the number of commas to see which operands
2569 have been omitted. */
252b5132
RH		 2570 skip_optional = 0;
2571 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2572 {
2573 const struct powerpc_operand *operand;
2574
2575 operand = &powerpc_operands[*opindex_ptr];
2576 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2577 {
2578 unsigned int opcount;
7fe9cf6b 2579 unsigned int num_operands_expected;
252b5132
RH		 2580
2581 /* There is an optional operand. Count the number of
2582 commas in the input line. */
2583 if (*str == '\0')
2584 opcount = 0;
2585 else
2586 {
2587 opcount = 1;
2588 s = str;
2589 while ((s = strchr (s, ',')) != (char *) NULL)
2590 {
2591 ++opcount;
2592 ++s;
2593 }
2594 }
2595
7fe9cf6b
NC		 2596 /* Compute the number of expected operands.
2597 Do not count fake operands. */
2598 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2599 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2600 ++ num_operands_expected;
2601
252b5132
RH		 2602 /* If there are fewer operands in the line then are called
2603 for by the instruction, we want to skip the optional
1f6c9eb0 2604 operands. */
7fe9cf6b 2605 if (opcount < num_operands_expected)
252b5132
RH		 2606 skip_optional = 1;
2607
2608 break;
2609 }
2610 }
2611
2612 /* Gather the operands. */
2613 need_paren = 0;
2614 next_opindex = 0;
2615 fc = 0;
2616 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2617 {
2618 const struct powerpc_operand *operand;
2619 const char *errmsg;
2620 char *hold;
2621 expressionS ex;
2622 char endc;
2623
2624 if (next_opindex == 0)
2625 operand = &powerpc_operands[*opindex_ptr];
2626 else
2627 {
2628 operand = &powerpc_operands[next_opindex];
2629 next_opindex = 0;
2630 }
252b5132
RH		 2631 errmsg = NULL;
2632
2633 /* If this is a fake operand, then we do not expect anything
2634 from the input. */
2635 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2636 {
2b3c4602 2637 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2638 if (errmsg != (const char *) NULL)
ee2c9aa9 2639 as_bad ("%s", errmsg);
252b5132
RH		 2640 continue;
2641 }
2642
2643 /* If this is an optional operand, and we are skipping it, just
2644 insert a zero. */
2645 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2646 && skip_optional)
2647 {
2648 if (operand->insert)
2649 {
2b3c4602 2650 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2651 if (errmsg != (const char *) NULL)
ee2c9aa9 2652 as_bad ("%s", errmsg);
252b5132
RH		 2653 }
2654 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2655 next_opindex = *opindex_ptr + 1;
2656 continue;
2657 }
2658
2659 /* Gather the operand. */
2660 hold = input_line_pointer;
2661 input_line_pointer = str;
2662
2663#ifdef TE_PE
81d4177b 2664 if (*input_line_pointer == '[')
252b5132
RH		 2665 {
2666 /* We are expecting something like the second argument here:
99a814a1
AM		 2667 *
2668 * lwz r4,[toc].GS.0.static_int(rtoc)
2669 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2670 * The argument following the `]' must be a symbol name, and the
2671 * register must be the toc register: 'rtoc' or '2'
2672 *
2673 * The effect is to 0 as the displacement field
2674 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2675 * the appropriate variation) reloc against it based on the symbol.
2676 * The linker will build the toc, and insert the resolved toc offset.
2677 *
2678 * Note:
2679 * o The size of the toc entry is currently assumed to be
2680 * 32 bits. This should not be assumed to be a hard coded
2681 * number.
2682 * o In an effort to cope with a change from 32 to 64 bits,
2683 * there are also toc entries that are specified to be
2684 * either 32 or 64 bits:
2685 * lwz r4,[toc32].GS.0.static_int(rtoc)
2686 * lwz r4,[toc64].GS.0.static_int(rtoc)
2687 * These demand toc entries of the specified size, and the
2688 * instruction probably requires it.
2689 */
252b5132
RH		 2690
2691 int valid_toc;
2692 enum toc_size_qualifier toc_kind;
2693 bfd_reloc_code_real_type toc_reloc;
2694
99a814a1
AM		 2695 /* Go parse off the [tocXX] part. */
2696 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2697
81d4177b 2698 if (!valid_toc)
252b5132 2699 {
a5840dce
AM		 2700 ignore_rest_of_line ();
2701 break;
252b5132
RH		 2702 }
2703
99a814a1
AM		 2704 /* Now get the symbol following the ']'. */
2705 expression (&ex);
252b5132
RH		 2706
2707 switch (toc_kind)
2708 {
2709 case default_toc:
99a814a1
AM		 2710 /* In this case, we may not have seen the symbol yet,
2711 since it is allowed to appear on a .extern or .globl
2712 or just be a label in the .data section. */
252b5132
RH		 2713 toc_reloc = BFD_RELOC_PPC_TOC16;
2714 break;
2715 case data_in_toc:
99a814a1
AM		 2716 /* 1. The symbol must be defined and either in the toc
2717 section, or a global.
2718 2. The reloc generated must have the TOCDEFN flag set
2719 in upper bit mess of the reloc type.
2720 FIXME: It's a little confusing what the tocv
2721 qualifier can be used for. At the very least, I've
2722 seen three uses, only one of which I'm sure I can
2723 explain. */
81d4177b
KH		 2724 if (ex.X_op == O_symbol)
2725 {
9c2799c2 2726 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2727 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2728 != tocdata_section)
252b5132 2729 {
99a814a1 2730 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2731 }
2732 }
2733
2734 toc_reloc = BFD_RELOC_PPC_TOC16;
2735 break;
2736 case must_be_32:
99a814a1
AM		 2737 /* FIXME: these next two specifically specify 32/64 bit
2738 toc entries. We don't support them today. Is this
2739 the right way to say that? */
252b5132 2740 toc_reloc = BFD_RELOC_UNUSED;
d6ed37ed 2741 as_bad (_("unimplemented toc32 expression modifier"));
252b5132
RH		 2742 break;
2743 case must_be_64:
99a814a1 2744 /* FIXME: see above. */
252b5132 2745 toc_reloc = BFD_RELOC_UNUSED;
d6ed37ed 2746 as_bad (_("unimplemented toc64 expression modifier"));
252b5132
RH		 2747 break;
2748 default:
bc805888 2749 fprintf (stderr,
99a814a1
AM		 2750 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2751 toc_kind);
bc805888 2752 abort ();
252b5132
RH		 2753 break;
2754 }
2755
2756 /* We need to generate a fixup for this expression. */
2757 if (fc >= MAX_INSN_FIXUPS)
2758 as_fatal (_("too many fixups"));
2759
2760 fixups[fc].reloc = toc_reloc;
2761 fixups[fc].exp = ex;
2762 fixups[fc].opindex = *opindex_ptr;
2763 ++fc;
2764
99a814a1
AM		 2765 /* Ok. We've set up the fixup for the instruction. Now make it
2766 look like the constant 0 was found here. */
252b5132
RH		 2767 ex.X_unsigned = 1;
2768 ex.X_op = O_constant;
2769 ex.X_add_number = 0;
2770 ex.X_add_symbol = NULL;
2771 ex.X_op_symbol = NULL;
2772 }
2773
2774 else
2775#endif /* TE_PE */
2776 {
b9c361e0
JL		 2777 if ((reg_names_p
2778 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2779 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2ad068be 2780 || !register_name (&ex))
252b5132 2781 {
13abbae3
AM		 2782 char save_lex = lex_type['%'];
2783
b9c361e0
JL		 2784 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2785 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
13abbae3
AM		 2786 {
2787 cr_operand = TRUE;
2788 lex_type['%'] |= LEX_BEGIN_NAME;
2789 }
252b5132 2790 expression (&ex);
b34976b6 2791 cr_operand = FALSE;
13abbae3 2792 lex_type['%'] = save_lex;
252b5132
RH		 2793 }
2794 }
2795
2796 str = input_line_pointer;
2797 input_line_pointer = hold;
2798
2799 if (ex.X_op == O_illegal)
2800 as_bad (_("illegal operand"));
2801 else if (ex.X_op == O_absent)
2802 as_bad (_("missing operand"));
2803 else if (ex.X_op == O_register)
2804 {
2805 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2806 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2807 }
2808 else if (ex.X_op == O_constant)
2809 {
2810#ifdef OBJ_ELF
81d4177b 2811 /* Allow @HA, @L, @H on constants. */
3b8b57a9 2812 bfd_reloc_code_real_type reloc;
252b5132
RH		 2813 char *orig_str = str;
2814
2815 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2816 switch (reloc)
2817 {
2818 default:
2819 str = orig_str;
2820 break;
2821
2822 case BFD_RELOC_LO16:
f9c6b907
AM		 2823 ex.X_add_number &= 0xffff;
2824 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
0baf16f2 2825 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2826 break;
2827
2828 case BFD_RELOC_HI16:
f9c6b907
AM		 2829 if (REPORT_OVERFLOW_HI && ppc_obj64)
2830 {
2831 /* PowerPC64 @h is tested for overflow. */
2832 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2833 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2834 {
2835 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2836 ex.X_add_number
2837 = ((addressT) ex.X_add_number ^ sign) - sign;
2838 }
2839 break;
2840 }
2841 /* Fall thru */
2842
2843 case BFD_RELOC_PPC64_ADDR16_HIGH:
2844 ex.X_add_number = PPC_HI (ex.X_add_number);
2845 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2846 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2847 break;
2848
2849 case BFD_RELOC_HI16_S:
f9c6b907
AM		 2850 if (REPORT_OVERFLOW_HI && ppc_obj64)
2851 {
2852 /* PowerPC64 @ha is tested for overflow. */
2853 ex.X_add_number
2854 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2855 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2856 {
2857 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2858 ex.X_add_number
2859 = ((addressT) ex.X_add_number ^ sign) - sign;
2860 }
2861 break;
2862 }
2863 /* Fall thru */
2864
2865 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2866 ex.X_add_number = PPC_HA (ex.X_add_number);
2867 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2868 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2869 break;
2870
0baf16f2 2871 case BFD_RELOC_PPC64_HIGHER:
f9c6b907
AM		 2872 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2873 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2874 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2875 break;
2876
2877 case BFD_RELOC_PPC64_HIGHER_S:
f9c6b907
AM		 2878 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2879 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2880 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132 2881 break;
0baf16f2
AM		 2882
2883 case BFD_RELOC_PPC64_HIGHEST:
f9c6b907
AM		 2884 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2885 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2886 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2887 break;
2888
2889 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 2890 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2891 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2892 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2 2893 break;
252b5132 2894 }
0baf16f2 2895#endif /* OBJ_ELF */
252b5132 2896 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2897 ppc_cpu, (char *) NULL, 0);
252b5132 2898 }
727fc41e 2899 else
252b5132 2900 {
3b8b57a9
AM		 2901 bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
2902#ifdef OBJ_ELF
727fc41e 2903 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2904 {
727fc41e
AM		 2905 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2906 if (sym_name[0] == '.')
2907 ++sym_name;
cdba85ec 2908
727fc41e 2909 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2910 {
727fc41e
AM		 2911 expressionS tls_exp;
2912
2913 hold = input_line_pointer;
2914 input_line_pointer = str + 1;
2915 expression (&tls_exp);
2916 if (tls_exp.X_op == O_symbol)
2917 {
2918 reloc = BFD_RELOC_UNUSED;
2919 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2920 {
2921 reloc = BFD_RELOC_PPC_TLSGD;
2922 input_line_pointer += 7;
2923 }
2924 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2925 {
2926 reloc = BFD_RELOC_PPC_TLSLD;
2927 input_line_pointer += 7;
2928 }
2929 if (reloc != BFD_RELOC_UNUSED)
2930 {
2931 SKIP_WHITESPACE ();
2932 str = input_line_pointer;
2933
2934 if (fc >= MAX_INSN_FIXUPS)
2935 as_fatal (_("too many fixups"));
2936 fixups[fc].exp = tls_exp;
2937 fixups[fc].opindex = *opindex_ptr;
2938 fixups[fc].reloc = reloc;
2939 ++fc;
2940 }
2941 }
2942 input_line_pointer = hold;
252b5132
RH		 2943 }
2944 }
2945
727fc41e 2946 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2947 {
727fc41e 2948 /* Some TLS tweaks. */
0baf16f2
AM		 2949 switch (reloc)
2950 {
727fc41e 2951 default:
cdba85ec 2952 break;
727fc41e
AM		 2953
2954 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2955 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2956 as_bad (_("@tls may not be used with \"%s\" operands"),
2957 opcode->name);
2958 else if (operand->shift != 11)
2959 as_bad (_("@tls may only be used in last operand"));
2960 else
2961 insn = ppc_insert_operand (insn, operand,
2962 ppc_obj64 ? 13 : 2,
2963 ppc_cpu, (char *) NULL, 0);
cdba85ec 2964 break;
727fc41e
AM		 2965
2966 /* We'll only use the 32 (or 64) bit form of these relocations
2967 in constants. Instructions get the 16 bit form. */
2968 case BFD_RELOC_PPC_DTPREL:
2969 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2970 break;
727fc41e
AM		 2971 case BFD_RELOC_PPC_TPREL:
2972 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2973 break;
2974 }
727fc41e 2975
b9c361e0
JL		 2976 /* If VLE-mode convert LO/HI/HA relocations. */
2977 if (opcode->flags & PPC_OPCODE_VLE)
2978 {
2979 int tmp_insn = insn & opcode->mask;
2980
2981 int use_d_reloc = (tmp_insn == E_OR2I_INSN
2982 || tmp_insn == E_AND2I_DOT_INSN
2983 || tmp_insn == E_OR2IS_INSN
2984 || tmp_insn == E_LIS_INSN
2985 || tmp_insn == E_AND2IS_DOT_INSN);
2986
2987
2988 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
2989 || tmp_insn == E_ADD2IS_INSN
2990 || tmp_insn == E_CMP16I_INSN
2991 || tmp_insn == E_MULL2I_INSN
2992 || tmp_insn == E_CMPL16I_INSN
2993 || tmp_insn == E_CMPH16I_INSN
2994 || tmp_insn == E_CMPHL16I_INSN);
2995
2996 switch (reloc)
2997 {
2998 default:
2999 break;
3000
3001 case BFD_RELOC_PPC_EMB_SDA21:
3002 reloc = BFD_RELOC_PPC_VLE_SDA21;
3003 break;
3004
3005 case BFD_RELOC_LO16:
3006 if (use_d_reloc)
3007 reloc = BFD_RELOC_PPC_VLE_LO16D;
3008 else if (use_a_reloc)
3009 reloc = BFD_RELOC_PPC_VLE_LO16A;
3010 break;
3011
3012 case BFD_RELOC_HI16:
3013 if (use_d_reloc)
3014 reloc = BFD_RELOC_PPC_VLE_HI16D;
3015 else if (use_a_reloc)
3016 reloc = BFD_RELOC_PPC_VLE_HI16A;
3017 break;
3018
3019 case BFD_RELOC_HI16_S:
3020 if (use_d_reloc)
3021 reloc = BFD_RELOC_PPC_VLE_HA16D;
3022 else if (use_a_reloc)
3023 reloc = BFD_RELOC_PPC_VLE_HA16A;
3024 break;
3025
3026 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3027 if (use_d_reloc)
3028 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3029 break;
3030
3031 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3032 if (use_d_reloc)
3033 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3034 break;
3035
3036 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3037 if (use_d_reloc)
3038 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3039 break;
3040 }
3041 }
3042
727fc41e
AM		 3043 /* For the absolute forms of branches, convert the PC
3044 relative form back into the absolute. */
3045 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3046 {
3047 switch (reloc)
3048 {
3049 case BFD_RELOC_PPC_B26:
3050 reloc = BFD_RELOC_PPC_BA26;
3051 break;
3052 case BFD_RELOC_PPC_B16:
3053 reloc = BFD_RELOC_PPC_BA16;
3054 break;
3055 case BFD_RELOC_PPC_B16_BRTAKEN:
3056 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3057 break;
3058 case BFD_RELOC_PPC_B16_BRNTAKEN:
3059 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3060 break;
3061 default:
3062 break;
3063 }
3064 }
3065
01efc3af
AM		 3066 switch (reloc)
3067 {
3068 case BFD_RELOC_PPC_TOC16:
3069 toc_reloc_types |= has_small_toc_reloc;
3070 break;
3071 case BFD_RELOC_PPC64_TOC16_LO:
3072 case BFD_RELOC_PPC64_TOC16_HI:
3073 case BFD_RELOC_PPC64_TOC16_HA:
3074 toc_reloc_types |= has_large_toc_reloc;
3075 break;
3076 default:
3077 break;
3078 }
3079
1fe532cf 3080 if ((operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
727fc41e
AM		 3081 {
3082 switch (reloc)
3083 {
3084 case BFD_RELOC_16:
3085 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3086 break;
3087 case BFD_RELOC_LO16:
3088 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3089 break;
3090 case BFD_RELOC_16_GOTOFF:
3091 reloc = BFD_RELOC_PPC64_GOT16_DS;
3092 break;
3093 case BFD_RELOC_LO16_GOTOFF:
3094 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3095 break;
3096 case BFD_RELOC_LO16_PLTOFF:
3097 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3098 break;
3099 case BFD_RELOC_16_BASEREL:
3100 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3101 break;
3102 case BFD_RELOC_LO16_BASEREL:
3103 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3104 break;
3105 case BFD_RELOC_PPC_TOC16:
3106 reloc = BFD_RELOC_PPC64_TOC16_DS;
3107 break;
3108 case BFD_RELOC_PPC64_TOC16_LO:
3109 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3110 break;
3111 case BFD_RELOC_PPC64_PLTGOT16:
3112 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3113 break;
3114 case BFD_RELOC_PPC64_PLTGOT16_LO:
3115 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3116 break;
3117 case BFD_RELOC_PPC_DTPREL16:
3118 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3119 break;
3120 case BFD_RELOC_PPC_DTPREL16_LO:
3121 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3122 break;
3123 case BFD_RELOC_PPC_TPREL16:
3124 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3125 break;
3126 case BFD_RELOC_PPC_TPREL16_LO:
3127 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3128 break;
3129 case BFD_RELOC_PPC_GOT_DTPREL16:
3130 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3131 case BFD_RELOC_PPC_GOT_TPREL16:
3132 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3133 break;
3134 default:
3135 as_bad (_("unsupported relocation for DS offset field"));
3136 break;
3137 }
3138 }
0baf16f2 3139 }
3b8b57a9
AM		 3140#endif /* OBJ_ELF */
3141
3142 if (reloc != BFD_RELOC_UNUSED)
3143 ;
3144 /* Determine a BFD reloc value based on the operand information.
3145 We are only prepared to turn a few of the operands into
3146 relocs. */
3147 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3148 && operand->bitm == 0x3fffffc
3149 && operand->shift == 0)
3150 reloc = BFD_RELOC_PPC_B26;
3151 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3152 && operand->bitm == 0xfffc
3153 && operand->shift == 0)
3154 reloc = BFD_RELOC_PPC_B16;
3155 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3156 && operand->bitm == 0x1fe
3157 && operand->shift == -1)
3158 reloc = BFD_RELOC_PPC_VLE_REL8;
3159 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3160 && operand->bitm == 0xfffe
3161 && operand->shift == 0)
3162 reloc = BFD_RELOC_PPC_VLE_REL15;
3163 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3164 && operand->bitm == 0x1fffffe
3165 && operand->shift == 0)
3166 reloc = BFD_RELOC_PPC_VLE_REL24;
3167 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3168 && operand->bitm == 0x3fffffc
3169 && operand->shift == 0)
3170 reloc = BFD_RELOC_PPC_BA26;
3171 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3172 && operand->bitm == 0xfffc
3173 && operand->shift == 0)
3174 reloc = BFD_RELOC_PPC_BA16;
3175#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3176 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
3177 && (operand->bitm & 0xfff0) == 0xfff0
3178 && operand->shift == 0)
3179 {
ac21e7da 3180 /* Note: the symbol may be not yet defined. */
3b8b57a9
AM		 3181 if (ppc_is_toc_sym (ex.X_add_symbol))
3182 {
3183 reloc = BFD_RELOC_PPC_TOC16;
3184#ifdef OBJ_ELF
3185 if (ppc_obj64
3186 && (operand->flags & PPC_OPERAND_DS) != 0)
3187 reloc = BFD_RELOC_PPC64_TOC16_DS;
3188#endif
3189 }
3190 else
3191 {
3192 reloc = BFD_RELOC_16;
3193#ifdef OBJ_ELF
3194 if (ppc_obj64
3195 && (operand->flags & PPC_OPERAND_DS) != 0)
3196 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3197#endif
3198 }
3199 }
3200#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
0baf16f2 3201
252b5132
RH		 3202 /* We need to generate a fixup for this expression. */
3203 if (fc >= MAX_INSN_FIXUPS)
3204 as_fatal (_("too many fixups"));
3205 fixups[fc].exp = ex;
727fc41e 3206 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 3207 fixups[fc].reloc = reloc;
3208 ++fc;
3209 }
252b5132
RH		 3210
3211 if (need_paren)
3212 {
3213 endc = ')';
3214 need_paren = 0;
c3d65c1c
BE		 3215 /* If expecting more operands, then we want to see "),". */
3216 if (*str == endc && opindex_ptr[1] != 0)
3217 {
3218 do
3219 ++str;
3220 while (ISSPACE (*str));
3221 endc = ',';
3222 }
252b5132
RH		 3223 }
3224 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3225 {
3226 endc = '(';
3227 need_paren = 1;
3228 }
3229 else
3230 endc = ',';
3231
3232 /* The call to expression should have advanced str past any
3233 whitespace. */
3234 if (*str != endc
3235 && (endc != ',' || *str != '\0'))
3236 {
5a938047
AM		 3237 if (*str == '\0')
3238 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3239 else
3240 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 3241 break;
3242 }
3243
3244 if (*str != '\0')
3245 ++str;
3246 }
3247
3882b010 3248 while (ISSPACE (*str))
252b5132
RH		 3249 ++str;
3250
3251 if (*str != '\0')
3252 as_bad (_("junk at end of line: `%s'"), str);
3253
dc1d03fc 3254#ifdef OBJ_ELF
b9c361e0 3255 /* Do we need/want an APUinfo section? */
4faf939a
JM		 3256 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3257 && !ppc_obj64)
6a0c61b7
EZ		 3258 {
3259 /* These are all version "1". */
3260 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 3261 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 3262 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 3263 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 3264 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 3265 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 3266 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 3267 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 3268 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 3269 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 3270 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 3271 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 3272 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 3273 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
b9c361e0
JL		 3274 if (opcode->flags & PPC_OPCODE_VLE)
3275 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
6a0c61b7 3276 }
dc1d03fc 3277#endif
6a0c61b7 3278
252b5132 3279 /* Write out the instruction. */
b9c361e0
JL		 3280 /* Differentiate between two and four byte insns. */
3281 if (ppc_mach () == bfd_mach_ppc_vle)
3282 {
3283 if (PPC_OP_SE_VLE (insn))
3284 insn_length = 2;
3285 else
3286 insn_length = 4;
3287 addr_mod = frag_now_fix () & 1;
3288 }
3289 else
3290 {
3291 insn_length = 4;
3292 addr_mod = frag_now_fix () & 3;
3293 }
3294 /* All instructions can start on a 2 byte boundary for VLE. */
3295 f = frag_more (insn_length);
09b935ac 3296 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
b9c361e0
JL		 3297 {
3298 if (ppc_mach() == bfd_mach_ppc_vle)
3299 as_bad (_("instruction address is not a multiple of 2"));
3300 else
3301 as_bad (_("instruction address is not a multiple of 4"));
3302 }
09b935ac
AM		 3303 frag_now->insn_addr = addr_mod;
3304 frag_now->has_code = 1;
b9c361e0 3305 md_number_to_chars (f, insn, insn_length);
252b5132 3306
5d6f4f16 3307#ifdef OBJ_ELF
b9c361e0 3308 dwarf2_emit_insn (insn_length);
5d6f4f16
GK		 3309#endif
3310
3b8b57a9 3311 /* Create any fixups. */
252b5132
RH		 3312 for (i = 0; i < fc; i++)
3313 {
3b8b57a9 3314 fixS *fixP;
252b5132
RH		 3315 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3316 {
99a814a1 3317 reloc_howto_type *reloc_howto;
252b5132
RH		 3318 int size;
3319 int offset;
252b5132 3320
99a814a1 3321 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3322 if (!reloc_howto)
3323 abort ();
3324
3325 size = bfd_get_reloc_size (reloc_howto);
3b8b57a9 3326 offset = target_big_endian ? (insn_length - size) : 0;
252b5132
RH		 3327
3328 if (size < 1 || size > 4)
bc805888 3329 abort ();
252b5132 3330
99a814a1
AM		 3331 fixP = fix_new_exp (frag_now,
3332 f - frag_now->fr_literal + offset,
3333 size,
3334 &fixups[i].exp,
3335 reloc_howto->pc_relative,
252b5132 3336 fixups[i].reloc);
252b5132
RH		 3337 }
3338 else
727fc41e
AM		 3339 {
3340 const struct powerpc_operand *operand;
3341
3342 operand = &powerpc_operands[fixups[i].opindex];
3b8b57a9
AM		 3343 fixP = fix_new_exp (frag_now,
3344 f - frag_now->fr_literal,
3345 insn_length,
3346 &fixups[i].exp,
3347 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3348 BFD_RELOC_UNUSED);
727fc41e 3349 }
3b8b57a9 3350 fixP->fx_pcrel_adjust = fixups[i].opindex;
252b5132
RH		 3351 }
3352}
3353
3354/* Handle a macro. Gather all the operands, transform them as
3355 described by the macro, and call md_assemble recursively. All the
3356 operands are separated by commas; we don't accept parentheses
3357 around operands here. */
3358
3359static void
98027b10 3360ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3361{
3362 char *operands[10];
3363 unsigned int count;
3364 char *s;
3365 unsigned int len;
3366 const char *format;
db557034 3367 unsigned int arg;
252b5132
RH		 3368 char *send;
3369 char *complete;
3370
3371 /* Gather the users operands into the operands array. */
3372 count = 0;
3373 s = str;
3374 while (1)
3375 {
3376 if (count >= sizeof operands / sizeof operands[0])
3377 break;
3378 operands[count++] = s;
3379 s = strchr (s, ',');
3380 if (s == (char *) NULL)
3381 break;
3382 *s++ = '\0';
81d4177b 3383 }
252b5132
RH		 3384
3385 if (count != macro->operands)
3386 {
3387 as_bad (_("wrong number of operands"));
3388 return;
3389 }
3390
3391 /* Work out how large the string must be (the size is unbounded
3392 because it includes user input). */
3393 len = 0;
3394 format = macro->format;
3395 while (*format != '\0')
3396 {
3397 if (*format != '%')
3398 {
3399 ++len;
3400 ++format;
3401 }
3402 else
3403 {
3404 arg = strtol (format + 1, &send, 10);
db557034 3405 know (send != format && arg < count);
252b5132
RH		 3406 len += strlen (operands[arg]);
3407 format = send;
3408 }
3409 }
3410
3411 /* Put the string together. */
3412 complete = s = (char *) alloca (len + 1);
3413 format = macro->format;
3414 while (*format != '\0')
3415 {
3416 if (*format != '%')
3417 *s++ = *format++;
3418 else
3419 {
3420 arg = strtol (format + 1, &send, 10);
3421 strcpy (s, operands[arg]);
3422 s += strlen (s);
3423 format = send;
3424 }
3425 }
3426 *s = '\0';
3427
3428 /* Assemble the constructed instruction. */
3429 md_assemble (complete);
81d4177b 3430}
252b5132
RH		 3431\f
3432#ifdef OBJ_ELF
18ae9cc1 3433/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3434
3435int
98027b10 3436ppc_section_type (char *str, size_t len)
252b5132 3437{
9de8d8f1
RH		 3438 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3439 return SHT_ORDERED;
252b5132 3440
9de8d8f1 3441 return -1;
252b5132
RH		 3442}
3443
3444int
1239de13 3445ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3446{
3447 if (type == SHT_ORDERED)
3448 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3449
252b5132
RH		 3450 return flags;
3451}
3452#endif /* OBJ_ELF */
3453
3454\f
3455/* Pseudo-op handling. */
3456
3457/* The .byte pseudo-op. This is similar to the normal .byte
3458 pseudo-op, but it can also take a single ASCII string. */
3459
3460static void
98027b10 3461ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3462{
3463 if (*input_line_pointer != '\"')
3464 {
3465 cons (1);
3466 return;
3467 }
3468
3469 /* Gather characters. A real double quote is doubled. Unusual
3470 characters are not permitted. */
3471 ++input_line_pointer;
3472 while (1)
3473 {
3474 char c;
3475
3476 c = *input_line_pointer++;
3477
3478 if (c == '\"')
3479 {
3480 if (*input_line_pointer != '\"')
3481 break;
3482 ++input_line_pointer;
3483 }
3484
3485 FRAG_APPEND_1_CHAR (c);
3486 }
3487
3488 demand_empty_rest_of_line ();
3489}
3490\f
3491#ifdef OBJ_XCOFF
3492
3493/* XCOFF specific pseudo-op handling. */
3494
3495/* This is set if we are creating a .stabx symbol, since we don't want
3496 to handle symbol suffixes for such symbols. */
b34976b6 3497static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3498
3499/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3500 symbols in the .bss segment as though they were local common
67c1ffbe 3501 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3502 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3503
3504static void
98027b10 3505ppc_comm (int lcomm)
252b5132
RH		 3506{
3507 asection *current_seg = now_seg;
3508 subsegT current_subseg = now_subseg;
3509 char *name;
3510 char endc;
3511 char *end_name;
3512 offsetT size;
3513 offsetT align;
3514 symbolS *lcomm_sym = NULL;
3515 symbolS *sym;
3516 char *pfrag;
3517
3518 name = input_line_pointer;
3519 endc = get_symbol_end ();
3520 end_name = input_line_pointer;
3521 *end_name = endc;
3522
3523 if (*input_line_pointer != ',')
3524 {
3525 as_bad (_("missing size"));
3526 ignore_rest_of_line ();
3527 return;
3528 }
3529 ++input_line_pointer;
3530
3531 size = get_absolute_expression ();
3532 if (size < 0)
3533 {
3534 as_bad (_("negative size"));
3535 ignore_rest_of_line ();
3536 return;
3537 }
3538
3539 if (! lcomm)
3540 {
3541 /* The third argument to .comm is the alignment. */
3542 if (*input_line_pointer != ',')
1ad63b2f 3543 align = 2;
252b5132
RH		 3544 else
3545 {
3546 ++input_line_pointer;
3547 align = get_absolute_expression ();
3548 if (align <= 0)
3549 {
3550 as_warn (_("ignoring bad alignment"));
1ad63b2f 3551 align = 2;
252b5132
RH		 3552 }
3553 }
3554 }
3555 else
3556 {
3557 char *lcomm_name;
3558 char lcomm_endc;
3559
252b5132
RH		 3560 /* The third argument to .lcomm appears to be the real local
3561 common symbol to create. References to the symbol named in
3562 the first argument are turned into references to the third
3563 argument. */
3564 if (*input_line_pointer != ',')
3565 {
3566 as_bad (_("missing real symbol name"));
3567 ignore_rest_of_line ();
3568 return;
3569 }
3570 ++input_line_pointer;
3571
3572 lcomm_name = input_line_pointer;
3573 lcomm_endc = get_symbol_end ();
81d4177b 3574
252b5132
RH		 3575 lcomm_sym = symbol_find_or_make (lcomm_name);
3576
3577 *input_line_pointer = lcomm_endc;
3c02c47f
DE		 3578
3579 /* The fourth argument to .lcomm is the alignment. */
3580 if (*input_line_pointer != ',')
3581 {
3582 if (size <= 4)
3583 align = 2;
3584 else
3585 align = 3;
3586 }
3587 else
3588 {
3589 ++input_line_pointer;
3590 align = get_absolute_expression ();
3591 if (align <= 0)
3592 {
3593 as_warn (_("ignoring bad alignment"));
3594 align = 2;
3595 }
3596 }
252b5132
RH		 3597 }
3598
3599 *end_name = '\0';
3600 sym = symbol_find_or_make (name);
3601 *end_name = endc;
3602
3603 if (S_IS_DEFINED (sym)
3604 || S_GET_VALUE (sym) != 0)
3605 {
3606 as_bad (_("attempt to redefine symbol"));
3607 ignore_rest_of_line ();
3608 return;
3609 }
81d4177b 3610
252b5132 3611 record_alignment (bss_section, align);
81d4177b 3612
252b5132
RH		 3613 if (! lcomm
3614 || ! S_IS_DEFINED (lcomm_sym))
3615 {
3616 symbolS *def_sym;
3617 offsetT def_size;
3618
3619 if (! lcomm)
3620 {
3621 def_sym = sym;
3622 def_size = size;
3623 S_SET_EXTERNAL (sym);
3624 }
3625 else
3626 {
809ffe0d 3627 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3628 def_sym = lcomm_sym;
3629 def_size = 0;
3630 }
3631
3632 subseg_set (bss_section, 1);
3633 frag_align (align, 0, 0);
81d4177b 3634
809ffe0d 3635 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3636 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3637 def_size, (char *) NULL);
3638 *pfrag = 0;
3639 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3640 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3641 }
3642 else if (lcomm)
3643 {
3644 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3645 symbol_get_frag (lcomm_sym)->fr_offset =
3646 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3647 &~ ((1 << align) - 1));
809ffe0d
ILT		 3648 if (align > symbol_get_tc (lcomm_sym)->align)
3649 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3650 }
3651
3652 if (lcomm)
3653 {
3654 /* Make sym an offset from lcomm_sym. */
3655 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3656 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3657 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3658 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3659 }
3660
3661 subseg_set (current_seg, current_subseg);
3662
3663 demand_empty_rest_of_line ();
3664}
3665
3666/* The .csect pseudo-op. This switches us into a different
3667 subsegment. The first argument is a symbol whose value is the
3668 start of the .csect. In COFF, csect symbols get special aux
3669 entries defined by the x_csect field of union internal_auxent. The
3670 optional second argument is the alignment (the default is 2). */
3671
3672static void
98027b10 3673ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3674{
3675 char *name;
3676 char endc;
3677 symbolS *sym;
931e13a6 3678 offsetT align;
252b5132
RH		 3679
3680 name = input_line_pointer;
3681 endc = get_symbol_end ();
81d4177b 3682
252b5132
RH		 3683 sym = symbol_find_or_make (name);
3684
3685 *input_line_pointer = endc;
3686
3687 if (S_GET_NAME (sym)[0] == '\0')
3688 {
3689 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3690 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3691 }
3692
931e13a6 3693 align = 2;
252b5132
RH		 3694 if (*input_line_pointer == ',')
3695 {
3696 ++input_line_pointer;
931e13a6 3697 align = get_absolute_expression ();
252b5132
RH		 3698 }
3699
931e13a6
AM		 3700 ppc_change_csect (sym, align);
3701
252b5132
RH		 3702 demand_empty_rest_of_line ();
3703}
3704
3705/* Change to a different csect. */
3706
3707static void
98027b10 3708ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3709{
3710 if (S_IS_DEFINED (sym))
809ffe0d 3711 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3712 else
3713 {
3714 symbolS **list_ptr;
3715 int after_toc;
3716 int hold_chunksize;
3717 symbolS *list;
931e13a6
AM		 3718 int is_code;
3719 segT sec;
252b5132
RH		 3720
3721 /* This is a new csect. We need to look at the symbol class to
3722 figure out whether it should go in the text section or the
3723 data section. */
3724 after_toc = 0;
931e13a6 3725 is_code = 0;
96d56e9f 3726 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3727 {
3728 case XMC_PR:
3729 case XMC_RO:
3730 case XMC_DB:
3731 case XMC_GL:
3732 case XMC_XO:
3733 case XMC_SV:
3734 case XMC_TI:
3735 case XMC_TB:
3736 S_SET_SEGMENT (sym, text_section);
809ffe0d 3737 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3738 ++ppc_text_subsegment;
3739 list_ptr = &ppc_text_csects;
931e13a6 3740 is_code = 1;
252b5132
RH		 3741 break;
3742 case XMC_RW:
3743 case XMC_TC0:
3744 case XMC_TC:
3745 case XMC_DS:
3746 case XMC_UA:
3747 case XMC_BS:
3748 case XMC_UC:
3749 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3750 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3751 == ppc_data_subsegment))
252b5132
RH		 3752 after_toc = 1;
3753 S_SET_SEGMENT (sym, data_section);
809ffe0d 3754 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3755 ++ppc_data_subsegment;
3756 list_ptr = &ppc_data_csects;
3757 break;
3758 default:
3759 abort ();
3760 }
3761
3762 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3763 changing subsegments, so that we don't use a lot of memory
3764 space for what may be a small section. */
252b5132
RH		 3765 hold_chunksize = chunksize;
3766 chunksize = 64;
3767
931e13a6
AM		 3768 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3769 symbol_get_tc (sym)->subseg);
252b5132
RH		 3770
3771 chunksize = hold_chunksize;
3772
3773 if (after_toc)
3774 ppc_after_toc_frag = frag_now;
3775
931e13a6
AM		 3776 record_alignment (sec, align);
3777 if (is_code)
3778 frag_align_code (align, 0);
3779 else
3780 frag_align (align, 0, 0);
3781
809ffe0d 3782 symbol_set_frag (sym, frag_now);
252b5132
RH		 3783 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3784
931e13a6 3785 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3786 symbol_get_tc (sym)->output = 1;
3787 symbol_get_tc (sym)->within = sym;
81d4177b 3788
252b5132 3789 for (list = *list_ptr;
809ffe0d
ILT		 3790 symbol_get_tc (list)->next != (symbolS *) NULL;
3791 list = symbol_get_tc (list)->next)
252b5132 3792 ;
809ffe0d 3793 symbol_get_tc (list)->next = sym;
81d4177b 3794
252b5132 3795 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3796 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3797 &symbol_lastP);
252b5132
RH		 3798 }
3799
3800 ppc_current_csect = sym;
3801}
3802
85645aed
TG		 3803static void
3804ppc_change_debug_section (unsigned int idx, subsegT subseg)
3805{
3806 segT sec;
3807 flagword oldflags;
3808 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3809
3810 sec = subseg_new (dw->name, subseg);
3811 oldflags = bfd_get_section_flags (stdoutput, sec);
3812 if (oldflags == SEC_NO_FLAGS)
3813 {
3814 /* Just created section. */
3815 gas_assert (dw_sections[idx].sect == NULL);
3816
3817 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3818 bfd_set_section_alignment (stdoutput, sec, 0);
3819 dw_sections[idx].sect = sec;
3820 }
3821
3822 /* Not anymore in a csect. */
3823 ppc_current_csect = NULL;
3824}
3825
3826/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3827 .dwsect flag [, opt-label ]
3828*/
3829
3830static void
3831ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3832{
3833 offsetT flag;
3834 symbolS *opt_label;
3835 const struct xcoff_dwsect_name *dw;
3836 struct dw_subsection *subseg;
3837 struct dw_section *dws;
3838 int i;
3839
3840 /* Find section. */
3841 flag = get_absolute_expression ();
3842 dw = NULL;
3843 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3844 if (xcoff_dwsect_names[i].flag == flag)
3845 {
3846 dw = &xcoff_dwsect_names[i];
3847 break;
3848 }
3849
3850 /* Parse opt-label. */
3851 if (*input_line_pointer == ',')
3852 {
3853 const char *label;
3854 char c;
3855
3856 ++input_line_pointer;
3857
3858 label = input_line_pointer;
3859 c = get_symbol_end ();
3860 opt_label = symbol_find_or_make (label);
3861 *input_line_pointer = c;
3862 }
3863 else
3864 opt_label = NULL;
3865
3866 demand_empty_rest_of_line ();
3867
3868 /* Return now in case of unknown subsection. */
3869 if (dw == NULL)
3870 {
d6ed37ed 3871 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
85645aed
TG		 3872 (unsigned)flag);
3873 return;
3874 }
3875
3876 /* Find the subsection. */
3877 dws = &dw_sections[i];
3878 subseg = NULL;
3879 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3880 {
3881 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3882 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3883 {
3884 as_bad (_("label %s was not defined in this dwarf section"),
3885 S_GET_NAME (opt_label));
3886 subseg = dws->anon_subseg;
3887 opt_label = NULL;
3888 }
3889 else
3890 subseg = symbol_get_tc (opt_label)->u.dw;
3891 }
3892
3893 if (subseg != NULL)
3894 {
3895 /* Switch to the subsection. */
3896 ppc_change_debug_section (i, subseg->subseg);
3897 }
3898 else
3899 {
3900 /* Create a new dw subsection. */
3901 subseg = (struct dw_subsection *)
3902 xmalloc (sizeof (struct dw_subsection));
3903
3904 if (opt_label == NULL)
3905 {
3906 /* The anonymous one. */
3907 subseg->subseg = 0;
3908 subseg->link = NULL;
3909 dws->anon_subseg = subseg;
3910 }
3911 else
3912 {
3913 /* A named one. */
3914 if (dws->list_subseg != NULL)
3915 subseg->subseg = dws->list_subseg->subseg + 1;
3916 else
3917 subseg->subseg = 1;
3918
3919 subseg->link = dws->list_subseg;
3920 dws->list_subseg = subseg;
3921 symbol_get_tc (opt_label)->u.dw = subseg;
3922 }
3923
3924 ppc_change_debug_section (i, subseg->subseg);
3925
3926 if (dw->def_size)
3927 {
3928 /* Add the length field. */
3929 expressionS *exp = &subseg->end_exp;
3930 int sz;
3931
3932 if (opt_label != NULL)
3933 symbol_set_value_now (opt_label);
3934
3935 /* Add the length field. Note that according to the AIX assembler
3936 manual, the size of the length field is 4 for powerpc32 but
3937 12 for powerpc64. */
3938 if (ppc_obj64)
3939 {
3940 /* Write the 64bit marker. */
3941 md_number_to_chars (frag_more (4), -1, 4);
3942 }
3943
3944 exp->X_op = O_subtract;
3945 exp->X_op_symbol = symbol_temp_new_now ();
3946 exp->X_add_symbol = symbol_temp_make ();
3947
3948 sz = ppc_obj64 ? 8 : 4;
3949 exp->X_add_number = -sz;
3950 emit_expr (exp, sz);
3951 }
3952 }
3953}
3954
252b5132
RH		 3955/* This function handles the .text and .data pseudo-ops. These
3956 pseudo-ops aren't really used by XCOFF; we implement them for the
3957 convenience of people who aren't used to XCOFF. */
3958
3959static void
98027b10 3960ppc_section (int type)
252b5132
RH		 3961{
3962 const char *name;
3963 symbolS *sym;
3964
3965 if (type == 't')
3966 name = ".text[PR]";
3967 else if (type == 'd')
3968 name = ".data[RW]";
3969 else
3970 abort ();
3971
3972 sym = symbol_find_or_make (name);
3973
931e13a6 3974 ppc_change_csect (sym, 2);
252b5132
RH		 3975
3976 demand_empty_rest_of_line ();
3977}
3978
3979/* This function handles the .section pseudo-op. This is mostly to
3980 give an error, since XCOFF only supports .text, .data and .bss, but
3981 we do permit the user to name the text or data section. */
3982
3983static void
98027b10 3984ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3985{
3986 char *user_name;
3987 const char *real_name;
3988 char c;
3989 symbolS *sym;
3990
3991 user_name = input_line_pointer;
3992 c = get_symbol_end ();
3993
3994 if (strcmp (user_name, ".text") == 0)
3995 real_name = ".text[PR]";
3996 else if (strcmp (user_name, ".data") == 0)
3997 real_name = ".data[RW]";
3998 else
3999 {
d6ed37ed 4000 as_bad (_("the XCOFF file format does not support arbitrary sections"));
252b5132
RH		 4001 *input_line_pointer = c;
4002 ignore_rest_of_line ();
4003 return;
4004 }
4005
4006 *input_line_pointer = c;
4007
4008 sym = symbol_find_or_make (real_name);
4009
931e13a6 4010 ppc_change_csect (sym, 2);
252b5132
RH		 4011
4012 demand_empty_rest_of_line ();
4013}
4014
4015/* The .extern pseudo-op. We create an undefined symbol. */
4016
4017static void
98027b10 4018ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4019{
4020 char *name;
4021 char endc;
4022
4023 name = input_line_pointer;
4024 endc = get_symbol_end ();
4025
4026 (void) symbol_find_or_make (name);
4027
4028 *input_line_pointer = endc;
4029
4030 demand_empty_rest_of_line ();
4031}
4032
4033/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4034
4035static void
98027b10 4036ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4037{
4038 char *name;
4039 char endc;
4040 symbolS *sym;
4041
4042 name = input_line_pointer;
4043 endc = get_symbol_end ();
4044
4045 sym = symbol_find_or_make (name);
4046
4047 *input_line_pointer = endc;
4048
809ffe0d 4049 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4050
4051 demand_empty_rest_of_line ();
4052}
4053
c865e45b
RS		 4054/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4055 relocations at the beginning of the current csect.
4056
4057 (In principle, there's no reason why the relocations _have_ to be at
4058 the beginning. Anywhere in the csect would do. However, inserting
4059 at the beginning is what the native assmebler does, and it helps to
4060 deal with cases where the .ref statements follow the section contents.)
4061
4062 ??? .refs don't work for empty .csects. However, the native assembler
4063 doesn't report an error in this case, and neither yet do we. */
4064
4065static void
4066ppc_ref (int ignore ATTRIBUTE_UNUSED)
4067{
4068 char *name;
4069 char c;
4070
4071 if (ppc_current_csect == NULL)
4072 {
4073 as_bad (_(".ref outside .csect"));
4074 ignore_rest_of_line ();
4075 return;
4076 }
4077
4078 do
4079 {
4080 name = input_line_pointer;
4081 c = get_symbol_end ();
4082
4083 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4084 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4085
4086 *input_line_pointer = c;
4087 SKIP_WHITESPACE ();
4088 c = *input_line_pointer;
4089 if (c == ',')
4090 {
4091 input_line_pointer++;
4092 SKIP_WHITESPACE ();
4093 if (is_end_of_line[(unsigned char) *input_line_pointer])
4094 {
4095 as_bad (_("missing symbol name"));
4096 ignore_rest_of_line ();
4097 return;
4098 }
4099 }
4100 }
4101 while (c == ',');
4102
4103 demand_empty_rest_of_line ();
4104}
4105
252b5132
RH		 4106/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4107 although I don't know why it bothers. */
4108
4109static void
98027b10 4110ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4111{
4112 char *name;
4113 char endc;
4114 symbolS *sym;
4115 int len;
4116
4117 name = input_line_pointer;
4118 endc = get_symbol_end ();
4119
4120 sym = symbol_find_or_make (name);
4121
4122 *input_line_pointer = endc;
4123
4124 if (*input_line_pointer != ',')
4125 {
4126 as_bad (_("missing rename string"));
4127 ignore_rest_of_line ();
4128 return;
4129 }
4130 ++input_line_pointer;
4131
809ffe0d 4132 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 4133
4134 demand_empty_rest_of_line ();
4135}
4136
4137/* The .stabx pseudo-op. This is similar to a normal .stabs
4138 pseudo-op, but slightly different. A sample is
4139 .stabx "main:F-1",.main,142,0
4140 The first argument is the symbol name to create. The second is the
4141 value, and the third is the storage class. The fourth seems to be
4142 always zero, and I am assuming it is the type. */
4143
4144static void
98027b10 4145ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4146{
4147 char *name;
4148 int len;
4149 symbolS *sym;
4150 expressionS exp;
4151
4152 name = demand_copy_C_string (&len);
4153
4154 if (*input_line_pointer != ',')
4155 {
4156 as_bad (_("missing value"));
4157 return;
4158 }
4159 ++input_line_pointer;
4160
b34976b6 4161 ppc_stab_symbol = TRUE;
252b5132 4162 sym = symbol_make (name);
b34976b6 4163 ppc_stab_symbol = FALSE;
252b5132 4164
809ffe0d 4165 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 4166
4167 (void) expression (&exp);
4168
4169 switch (exp.X_op)
4170 {
4171 case O_illegal:
4172 case O_absent:
4173 case O_big:
4174 as_bad (_("illegal .stabx expression; zero assumed"));
4175 exp.X_add_number = 0;
4176 /* Fall through. */
4177 case O_constant:
4178 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 4179 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 4180 break;
4181
4182 case O_symbol:
4183 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 4184 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4185 else
4186 {
4187 S_SET_VALUE (sym,
4188 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 4189 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 4190 }
4191 break;
4192
4193 default:
4194 /* The value is some complex expression. This will probably
99a814a1
AM		 4195 fail at some later point, but this is probably the right
4196 thing to do here. */
809ffe0d 4197 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4198 break;
4199 }
4200
4201 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4202 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4203
4204 if (*input_line_pointer != ',')
4205 {
4206 as_bad (_("missing class"));
4207 return;
4208 }
4209 ++input_line_pointer;
4210
4211 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4212
4213 if (*input_line_pointer != ',')
4214 {
4215 as_bad (_("missing type"));
4216 return;
4217 }
4218 ++input_line_pointer;
4219
4220 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4221
809ffe0d 4222 symbol_get_tc (sym)->output = 1;
252b5132 4223
c734e7e3
TG		 4224 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4225 {
4226 /* In this case :
252b5132 4227
c734e7e3
TG		 4228 .bs name
4229 .stabx "z",arrays_,133,0
4230 .es
99a814a1 4231
c734e7e3 4232 .comm arrays_,13768,3
99a814a1 4233
c734e7e3
TG		 4234 resolve_symbol_value will copy the exp's "within" into sym's when the
4235 offset is 0. Since this seems to be corner case problem,
4236 only do the correction for storage class C_STSYM. A better solution
4237 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 4238
c734e7e3
TG		 4239 if (exp.X_op == O_symbol)
4240 {
4241 if (ppc_current_block == NULL)
4242 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 4243
c734e7e3
TG		 4244 symbol_get_tc (sym)->within = ppc_current_block;
4245 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4246 }
4247 }
99a814a1 4248
252b5132
RH		 4249 if (exp.X_op != O_symbol
4250 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4251 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4252 ppc_frob_label (sym);
4253 else
4254 {
4255 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4256 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4257 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4258 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4259 }
4260
4261 demand_empty_rest_of_line ();
4262}
4263
4264/* The .function pseudo-op. This takes several arguments. The first
4265 argument seems to be the external name of the symbol. The second
67c1ffbe 4266 argument seems to be the label for the start of the function. gcc
252b5132
RH		 4267 uses the same name for both. I have no idea what the third and
4268 fourth arguments are meant to be. The optional fifth argument is
4269 an expression for the size of the function. In COFF this symbol
4270 gets an aux entry like that used for a csect. */
4271
4272static void
98027b10 4273ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4274{
4275 char *name;
4276 char endc;
4277 char *s;
4278 symbolS *ext_sym;
4279 symbolS *lab_sym;
4280
4281 name = input_line_pointer;
4282 endc = get_symbol_end ();
4283
4284 /* Ignore any [PR] suffix. */
4285 name = ppc_canonicalize_symbol_name (name);
4286 s = strchr (name, '[');
4287 if (s != (char *) NULL
4288 && strcmp (s + 1, "PR]") == 0)
4289 *s = '\0';
4290
4291 ext_sym = symbol_find_or_make (name);
4292
4293 *input_line_pointer = endc;
4294
4295 if (*input_line_pointer != ',')
4296 {
4297 as_bad (_("missing symbol name"));
4298 ignore_rest_of_line ();
4299 return;
4300 }
4301 ++input_line_pointer;
4302
4303 name = input_line_pointer;
4304 endc = get_symbol_end ();
4305
4306 lab_sym = symbol_find_or_make (name);
4307
4308 *input_line_pointer = endc;
4309
4310 if (ext_sym != lab_sym)
4311 {
809ffe0d
ILT		 4312 expressionS exp;
4313
4314 exp.X_op = O_symbol;
4315 exp.X_add_symbol = lab_sym;
4316 exp.X_op_symbol = NULL;
4317 exp.X_add_number = 0;
4318 exp.X_unsigned = 0;
4319 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4320 }
4321
96d56e9f
NC		 4322 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4323 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4324 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4325
4326 if (*input_line_pointer == ',')
4327 {
91d6fa6a 4328 expressionS exp;
252b5132
RH		 4329
4330 /* Ignore the third argument. */
4331 ++input_line_pointer;
91d6fa6a 4332 expression (& exp);
252b5132
RH		 4333 if (*input_line_pointer == ',')
4334 {
4335 /* Ignore the fourth argument. */
4336 ++input_line_pointer;
91d6fa6a 4337 expression (& exp);
252b5132
RH		 4338 if (*input_line_pointer == ',')
4339 {
4340 /* The fifth argument is the function size. */
4341 ++input_line_pointer;
85645aed
TG		 4342 symbol_get_tc (ext_sym)->u.size = symbol_new
4343 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4344 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4345 }
4346 }
4347 }
4348
4349 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4350 SF_SET_FUNCTION (ext_sym);
4351 SF_SET_PROCESS (ext_sym);
4352 coff_add_linesym (ext_sym);
4353
4354 demand_empty_rest_of_line ();
4355}
4356
4357/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4358 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4359 with the correct line number */
5d6255fe 4360
8642cce8 4361static symbolS *saved_bi_sym = 0;
252b5132
RH		 4362
4363static void
98027b10 4364ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4365{
4366 symbolS *sym;
4367
4368 sym = symbol_make (".bf");
4369 S_SET_SEGMENT (sym, text_section);
809ffe0d 4370 symbol_set_frag (sym, frag_now);
252b5132
RH		 4371 S_SET_VALUE (sym, frag_now_fix ());
4372 S_SET_STORAGE_CLASS (sym, C_FCN);
4373
4374 coff_line_base = get_absolute_expression ();
4375
4376 S_SET_NUMBER_AUXILIARY (sym, 1);
4377 SA_SET_SYM_LNNO (sym, coff_line_base);
4378
8642cce8 4379 /* Line number for bi. */
5d6255fe 4380 if (saved_bi_sym)
8642cce8
TR		 4381 {
4382 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4383 saved_bi_sym = 0;
4384 }
5d6255fe 4385
8642cce8 4386
809ffe0d 4387 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4388
4389 ppc_frob_label (sym);
4390
4391 demand_empty_rest_of_line ();
4392}
4393
4394/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4395 ".ef", except that the line number is absolute, not relative to the
4396 most recent ".bf" symbol. */
4397
4398static void
98027b10 4399ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4400{
4401 symbolS *sym;
4402
4403 sym = symbol_make (".ef");
4404 S_SET_SEGMENT (sym, text_section);
809ffe0d 4405 symbol_set_frag (sym, frag_now);
252b5132
RH		 4406 S_SET_VALUE (sym, frag_now_fix ());
4407 S_SET_STORAGE_CLASS (sym, C_FCN);
4408 S_SET_NUMBER_AUXILIARY (sym, 1);
4409 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4410 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4411
4412 ppc_frob_label (sym);
4413
4414 demand_empty_rest_of_line ();
4415}
4416
4417/* The .bi and .ei pseudo-ops. These take a string argument and
4418 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4419 the symbol list. The value of .bi will be know when the next .bf
4420 is encountered. */
252b5132
RH		 4421
4422static void
98027b10 4423ppc_biei (int ei)
252b5132
RH		 4424{
4425 static symbolS *last_biei;
4426
4427 char *name;
4428 int len;
4429 symbolS *sym;
4430 symbolS *look;
4431
4432 name = demand_copy_C_string (&len);
4433
4434 /* The value of these symbols is actually file offset. Here we set
4435 the value to the index into the line number entries. In
4436 ppc_frob_symbols we set the fix_line field, which will cause BFD
4437 to do the right thing. */
4438
4439 sym = symbol_make (name);
4440 /* obj-coff.c currently only handles line numbers correctly in the
4441 .text section. */
4442 S_SET_SEGMENT (sym, text_section);
4443 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4444 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4445
4446 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4447 symbol_get_tc (sym)->output = 1;
81d4177b 4448
8642cce8 4449 /* Save bi. */
5d6255fe 4450 if (ei)
8642cce8
TR		 4451 saved_bi_sym = 0;
4452 else
4453 saved_bi_sym = sym;
4454
252b5132
RH		 4455 for (look = last_biei ? last_biei : symbol_rootP;
4456 (look != (symbolS *) NULL
4457 && (S_GET_STORAGE_CLASS (look) == C_FILE
4458 || S_GET_STORAGE_CLASS (look) == C_BINCL
4459 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4460 look = symbol_next (look))
4461 ;
4462 if (look != (symbolS *) NULL)
4463 {
4464 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4465 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4466 last_biei = sym;
4467 }
4468
4469 demand_empty_rest_of_line ();
4470}
4471
4472/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4473 There is one argument, which is a csect symbol. The value of the
4474 .bs symbol is the index of this csect symbol. */
4475
4476static void
98027b10 4477ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4478{
4479 char *name;
4480 char endc;
4481 symbolS *csect;
4482 symbolS *sym;
4483
4484 if (ppc_current_block != NULL)
4485 as_bad (_("nested .bs blocks"));
4486
4487 name = input_line_pointer;
4488 endc = get_symbol_end ();
4489
4490 csect = symbol_find_or_make (name);
4491
4492 *input_line_pointer = endc;
4493
4494 sym = symbol_make (".bs");
4495 S_SET_SEGMENT (sym, now_seg);
4496 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4497 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4498 symbol_get_tc (sym)->output = 1;
252b5132 4499
809ffe0d 4500 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4501
4502 ppc_frob_label (sym);
4503
4504 ppc_current_block = sym;
4505
4506 demand_empty_rest_of_line ();
4507}
4508
4509/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4510
4511static void
98027b10 4512ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4513{
4514 symbolS *sym;
4515
4516 if (ppc_current_block == NULL)
4517 as_bad (_(".es without preceding .bs"));
4518
4519 sym = symbol_make (".es");
4520 S_SET_SEGMENT (sym, now_seg);
4521 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4522 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4523 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4524
4525 ppc_frob_label (sym);
4526
4527 ppc_current_block = NULL;
4528
4529 demand_empty_rest_of_line ();
4530}
4531
4532/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4533 line number. */
4534
4535static void
98027b10 4536ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4537{
4538 symbolS *sym;
4539
4540 sym = symbol_make (".bb");
4541 S_SET_SEGMENT (sym, text_section);
809ffe0d 4542 symbol_set_frag (sym, frag_now);
252b5132
RH		 4543 S_SET_VALUE (sym, frag_now_fix ());
4544 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4545
4546 S_SET_NUMBER_AUXILIARY (sym, 1);
4547 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4548
809ffe0d 4549 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4550
4551 SF_SET_PROCESS (sym);
4552
4553 ppc_frob_label (sym);
4554
4555 demand_empty_rest_of_line ();
4556}
4557
4558/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4559 line number. */
4560
4561static void
98027b10 4562ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4563{
4564 symbolS *sym;
4565
4566 sym = symbol_make (".eb");
4567 S_SET_SEGMENT (sym, text_section);
809ffe0d 4568 symbol_set_frag (sym, frag_now);
252b5132
RH		 4569 S_SET_VALUE (sym, frag_now_fix ());
4570 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4571 S_SET_NUMBER_AUXILIARY (sym, 1);
4572 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4573 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4574
4575 SF_SET_PROCESS (sym);
4576
4577 ppc_frob_label (sym);
4578
4579 demand_empty_rest_of_line ();
4580}
4581
4582/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4583 specified name. */
4584
4585static void
98027b10 4586ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4587{
4588 char *name;
4589 int len;
4590 symbolS *sym;
4591
4592 name = demand_copy_C_string (&len);
4593 sym = symbol_make (name);
4594 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4595 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4596 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4597 S_SET_VALUE (sym, 0);
809ffe0d 4598 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4599
4600 ppc_frob_label (sym);
4601
4602 demand_empty_rest_of_line ();
4603}
4604
4605/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4606
4607static void
98027b10 4608ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4609{
4610 symbolS *sym;
4611
4612 sym = symbol_make (".ec");
4613 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4614 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4615 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4616 S_SET_VALUE (sym, 0);
809ffe0d 4617 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4618
4619 ppc_frob_label (sym);
4620
4621 demand_empty_rest_of_line ();
4622}
4623
4624/* The .toc pseudo-op. Switch to the .toc subsegment. */
4625
4626static void
98027b10 4627ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4628{
4629 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4630 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4631 else
4632 {
4633 subsegT subseg;
4634 symbolS *sym;
4635 symbolS *list;
81d4177b 4636
252b5132
RH		 4637 subseg = ppc_data_subsegment;
4638 ++ppc_data_subsegment;
4639
4640 subseg_new (segment_name (data_section), subseg);
4641 ppc_toc_frag = frag_now;
4642
4643 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4644 symbol_set_frag (sym, frag_now);
252b5132
RH		 4645 S_SET_SEGMENT (sym, data_section);
4646 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4647 symbol_get_tc (sym)->subseg = subseg;
4648 symbol_get_tc (sym)->output = 1;
4649 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4650
4651 ppc_toc_csect = sym;
81d4177b 4652
252b5132 4653 for (list = ppc_data_csects;
809ffe0d
ILT		 4654 symbol_get_tc (list)->next != (symbolS *) NULL;
4655 list = symbol_get_tc (list)->next)
252b5132 4656 ;
809ffe0d 4657 symbol_get_tc (list)->next = sym;
252b5132
RH		 4658
4659 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4660 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4661 &symbol_lastP);
252b5132
RH		 4662 }
4663
4664 ppc_current_csect = ppc_toc_csect;
4665
4666 demand_empty_rest_of_line ();
4667}
4668
4669/* The AIX assembler automatically aligns the operands of a .long or
4670 .short pseudo-op, and we want to be compatible. */
4671
4672static void
98027b10 4673ppc_xcoff_cons (int log_size)
252b5132
RH		 4674{
4675 frag_align (log_size, 0, 0);
4676 record_alignment (now_seg, log_size);
4677 cons (1 << log_size);
4678}
4679
4680static void
98027b10 4681ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4682{
4683 expressionS exp;
4684 int byte_count;
4685
4686 (void) expression (&exp);
4687
4688 if (exp.X_op != O_constant)
4689 {
4690 as_bad (_("non-constant byte count"));
4691 return;
4692 }
4693
4694 byte_count = exp.X_add_number;
4695
4696 if (*input_line_pointer != ',')
4697 {
4698 as_bad (_("missing value"));
4699 return;
4700 }
4701
4702 ++input_line_pointer;
4703 cons (byte_count);
4704}
4705
85645aed
TG		 4706void
4707ppc_xcoff_end (void)
4708{
4709 int i;
4710
4711 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4712 {
4713 struct dw_section *dws = &dw_sections[i];
4714 struct dw_subsection *dwss;
4715
4716 if (dws->anon_subseg)
4717 {
4718 dwss = dws->anon_subseg;
4719 dwss->link = dws->list_subseg;
4720 }
4721 else
4722 dwss = dws->list_subseg;
4723
4724 for (; dwss != NULL; dwss = dwss->link)
4725 if (dwss->end_exp.X_add_symbol != NULL)
4726 {
4727 subseg_set (dws->sect, dwss->subseg);
4728 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4729 }
4730 }
4731}
4732
252b5132 4733#endif /* OBJ_XCOFF */
0baf16f2 4734#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4735\f
4736/* The .tc pseudo-op. This is used when generating either XCOFF or
4737 ELF. This takes two or more arguments.
4738
4739 When generating XCOFF output, the first argument is the name to
4740 give to this location in the toc; this will be a symbol with class
0baf16f2 4741 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4742 this location in the TOC; often there is just one more argument, a
1049f94e 4743 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4744 depends on target word size. A 32-bit target uses 4-byte values, a
4745 64-bit target uses 8-byte values.
252b5132
RH		 4746
4747 When not generating XCOFF output, the arguments are the same, but
4748 the first argument is simply ignored. */
4749
4750static void
98027b10 4751ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4752{
4753#ifdef OBJ_XCOFF
4754
4755 /* Define the TOC symbol name. */
4756 {
4757 char *name;
4758 char endc;
4759 symbolS *sym;
4760
4761 if (ppc_toc_csect == (symbolS *) NULL
4762 || ppc_toc_csect != ppc_current_csect)
4763 {
4764 as_bad (_(".tc not in .toc section"));
4765 ignore_rest_of_line ();
4766 return;
4767 }
4768
4769 name = input_line_pointer;
4770 endc = get_symbol_end ();
4771
4772 sym = symbol_find_or_make (name);
4773
4774 *input_line_pointer = endc;
4775
4776 if (S_IS_DEFINED (sym))
4777 {
4778 symbolS *label;
4779
809ffe0d 4780 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4781 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4782 {
4783 as_bad (_(".tc with no label"));
4784 ignore_rest_of_line ();
4785 return;
4786 }
4787
4788 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4789 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4790 S_SET_VALUE (label, S_GET_VALUE (sym));
4791
4792 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4793 ++input_line_pointer;
4794
4795 return;
4796 }
4797
4798 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4799 symbol_set_frag (sym, frag_now);
252b5132 4800 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4801 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4802 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4803
4804 ppc_frob_label (sym);
4805 }
4806
0baf16f2
AM		 4807#endif /* OBJ_XCOFF */
4808#ifdef OBJ_ELF
9c7977b3 4809 int align;
252b5132
RH		 4810
4811 /* Skip the TOC symbol name. */
4812 while (is_part_of_name (*input_line_pointer)
d13d4015 4813 || *input_line_pointer == ' '
252b5132
RH		 4814 || *input_line_pointer == '['
4815 || *input_line_pointer == ']'
4816 || *input_line_pointer == '{'
4817 || *input_line_pointer == '}')
4818 ++input_line_pointer;
4819
0baf16f2 4820 /* Align to a four/eight byte boundary. */
2b3c4602 4821 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4822 frag_align (align, 0, 0);
4823 record_alignment (now_seg, align);
0baf16f2 4824#endif /* OBJ_ELF */
252b5132
RH		 4825
4826 if (*input_line_pointer != ',')
4827 demand_empty_rest_of_line ();
4828 else
4829 {
4830 ++input_line_pointer;
2b3c4602 4831 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4832 }
4833}
0baf16f2
AM		 4834
4835/* Pseudo-op .machine. */
0baf16f2
AM		 4836
4837static void
98027b10 4838ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4839{
69c040df
AM		 4840 char *cpu_string;
4841#define MAX_HISTORY 100
fa452fa6 4842 static ppc_cpu_t *cpu_history;
69c040df
AM		 4843 static int curr_hist;
4844
4845 SKIP_WHITESPACE ();
4846
4847 if (*input_line_pointer == '"')
4848 {
4849 int len;
4850 cpu_string = demand_copy_C_string (&len);
4851 }
4852 else
4853 {
4854 char c;
4855 cpu_string = input_line_pointer;
4856 c = get_symbol_end ();
4857 cpu_string = xstrdup (cpu_string);
4858 *input_line_pointer = c;
4859 }
4860
4861 if (cpu_string != NULL)
4862 {
fa452fa6 4863 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4864 ppc_cpu_t new_cpu;
69c040df
AM		 4865 char *p;
4866
4867 for (p = cpu_string; *p != 0; p++)
4868 *p = TOLOWER (*p);
4869
4870 if (strcmp (cpu_string, "push") == 0)
4871 {
4872 if (cpu_history == NULL)
4873 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4874
4875 if (curr_hist >= MAX_HISTORY)
4876 as_bad (_(".machine stack overflow"));
4877 else
4878 cpu_history[curr_hist++] = ppc_cpu;
4879 }
4880 else if (strcmp (cpu_string, "pop") == 0)
4881 {
4882 if (curr_hist <= 0)
4883 as_bad (_(".machine stack underflow"));
4884 else
4885 ppc_cpu = cpu_history[--curr_hist];
4886 }
776fc418 4887 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
69fe9ce5 4888 ppc_cpu = new_cpu;
69c040df
AM		 4889 else
4890 as_bad (_("invalid machine `%s'"), cpu_string);
4891
4892 if (ppc_cpu != old_cpu)
4893 ppc_setup_opcodes ();
4894 }
4895
4896 demand_empty_rest_of_line ();
0baf16f2 4897}
0baf16f2 4898#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4899\f
4900#ifdef TE_PE
4901
99a814a1 4902/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4903
4904/* Set the current section. */
4905static void
98027b10 4906ppc_set_current_section (segT new)
252b5132
RH		 4907{
4908 ppc_previous_section = ppc_current_section;
4909 ppc_current_section = new;
4910}
4911
4912/* pseudo-op: .previous
4913 behaviour: toggles the current section with the previous section.
4914 errors: None
99a814a1
AM		 4915 warnings: "No previous section" */
4916
252b5132 4917static void
98027b10 4918ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132 4919{
81d4177b 4920 if (ppc_previous_section == NULL)
252b5132 4921 {
d6ed37ed 4922 as_warn (_("no previous section to return to, ignored."));
252b5132
RH		 4923 return;
4924 }
4925
99a814a1 4926 subseg_set (ppc_previous_section, 0);
252b5132 4927
99a814a1 4928 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4929}
4930
4931/* pseudo-op: .pdata
4932 behaviour: predefined read only data section
b34976b6 4933 double word aligned
252b5132
RH		 4934 errors: None
4935 warnings: None
4936 initial: .section .pdata "adr3"
b34976b6 4937 a - don't know -- maybe a misprint
252b5132
RH		 4938 d - initialized data
4939 r - readable
4940 3 - double word aligned (that would be 4 byte boundary)
4941
4942 commentary:
4943 Tag index tables (also known as the function table) for exception
99a814a1 4944 handling, debugging, etc. */
252b5132 4945
252b5132 4946static void
98027b10 4947ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4948{
81d4177b 4949 if (pdata_section == 0)
252b5132
RH		 4950 {
4951 pdata_section = subseg_new (".pdata", 0);
81d4177b 4952
252b5132
RH		 4953 bfd_set_section_flags (stdoutput, pdata_section,
4954 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4955 | SEC_READONLY | SEC_DATA ));
81d4177b 4956
252b5132
RH		 4957 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4958 }
4959 else
4960 {
99a814a1 4961 pdata_section = subseg_new (".pdata", 0);
252b5132 4962 }
99a814a1 4963 ppc_set_current_section (pdata_section);
252b5132
RH		 4964}
4965
4966/* pseudo-op: .ydata
4967 behaviour: predefined read only data section
b34976b6 4968 double word aligned
252b5132
RH		 4969 errors: None
4970 warnings: None
4971 initial: .section .ydata "drw3"
b34976b6 4972 a - don't know -- maybe a misprint
252b5132
RH		 4973 d - initialized data
4974 r - readable
4975 3 - double word aligned (that would be 4 byte boundary)
4976 commentary:
4977 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4978 debugging, etc. */
4979
252b5132 4980static void
98027b10 4981ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4982{
81d4177b 4983 if (ydata_section == 0)
252b5132
RH		 4984 {
4985 ydata_section = subseg_new (".ydata", 0);
4986 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4987 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4988 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4989
4990 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4991 }
4992 else
4993 {
4994 ydata_section = subseg_new (".ydata", 0);
4995 }
99a814a1 4996 ppc_set_current_section (ydata_section);
252b5132
RH		 4997}
4998
4999/* pseudo-op: .reldata
5000 behaviour: predefined read write data section
b34976b6 5001 double word aligned (4-byte)
252b5132
RH		 5002 FIXME: relocation is applied to it
5003 FIXME: what's the difference between this and .data?
5004 errors: None
5005 warnings: None
5006 initial: .section .reldata "drw3"
5007 d - initialized data
5008 r - readable
5009 w - writeable
5010 3 - double word aligned (that would be 8 byte boundary)
5011
5012 commentary:
5013 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 5014 function descriptors, etc. */
5015
252b5132 5016static void
98027b10 5017ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5018{
5019 if (reldata_section == 0)
5020 {
5021 reldata_section = subseg_new (".reldata", 0);
5022
5023 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 5024 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5025 | SEC_DATA));
252b5132
RH		 5026
5027 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5028 }
5029 else
5030 {
5031 reldata_section = subseg_new (".reldata", 0);
5032 }
99a814a1 5033 ppc_set_current_section (reldata_section);
252b5132
RH		 5034}
5035
5036/* pseudo-op: .rdata
5037 behaviour: predefined read only data section
b34976b6 5038 double word aligned
252b5132
RH		 5039 errors: None
5040 warnings: None
5041 initial: .section .rdata "dr3"
5042 d - initialized data
5043 r - readable
99a814a1
AM		 5044 3 - double word aligned (that would be 4 byte boundary) */
5045
252b5132 5046static void
98027b10 5047ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5048{
5049 if (rdata_section == 0)
5050 {
5051 rdata_section = subseg_new (".rdata", 0);
5052 bfd_set_section_flags (stdoutput, rdata_section,
5053 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5054 | SEC_READONLY | SEC_DATA ));
5055
5056 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5057 }
5058 else
5059 {
5060 rdata_section = subseg_new (".rdata", 0);
5061 }
99a814a1 5062 ppc_set_current_section (rdata_section);
252b5132
RH		 5063}
5064
5065/* pseudo-op: .ualong
81d4177b 5066 behaviour: much like .int, with the exception that no alignment is
b34976b6 5067 performed.
252b5132
RH		 5068 FIXME: test the alignment statement
5069 errors: None
99a814a1
AM		 5070 warnings: None */
5071
252b5132 5072static void
98027b10 5073ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 5074{
99a814a1
AM		 5075 /* Try for long. */
5076 cons (4);
252b5132
RH		 5077}
5078
5079/* pseudo-op: .znop <symbol name>
5080 behaviour: Issue a nop instruction
b34976b6 5081 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 5082 the supplied symbol name.
5083 errors: None
99a814a1
AM		 5084 warnings: Missing symbol name */
5085
252b5132 5086static void
98027b10 5087ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5088{
5089 unsigned long insn;
5090 const struct powerpc_opcode *opcode;
252b5132 5091 char *f;
252b5132 5092 symbolS *sym;
252b5132
RH		 5093 char *symbol_name;
5094 char c;
5095 char *name;
252b5132 5096
99a814a1 5097 /* Strip out the symbol name. */
252b5132
RH		 5098 symbol_name = input_line_pointer;
5099 c = get_symbol_end ();
5100
5101 name = xmalloc (input_line_pointer - symbol_name + 1);
5102 strcpy (name, symbol_name);
5103
5104 sym = symbol_find_or_make (name);
5105
5106 *input_line_pointer = c;
5107
5108 SKIP_WHITESPACE ();
5109
5110 /* Look up the opcode in the hash table. */
5111 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5112
99a814a1 5113 /* Stick in the nop. */
252b5132
RH		 5114 insn = opcode->opcode;
5115
5116 /* Write out the instruction. */
5117 f = frag_more (4);
5118 md_number_to_chars (f, insn, 4);
5119 fix_new (frag_now,
5120 f - frag_now->fr_literal,
5121 4,
5122 sym,
5123 0,
5124 0,
5125 BFD_RELOC_16_GOT_PCREL);
5126
5127}
5128
81d4177b
KH		 5129/* pseudo-op:
5130 behaviour:
5131 errors:
99a814a1
AM		 5132 warnings: */
5133
252b5132 5134static void
98027b10 5135ppc_pe_comm (int lcomm)
252b5132 5136{
98027b10
AM		 5137 char *name;
5138 char c;
5139 char *p;
252b5132 5140 offsetT temp;
98027b10 5141 symbolS *symbolP;
252b5132
RH		 5142 offsetT align;
5143
5144 name = input_line_pointer;
5145 c = get_symbol_end ();
5146
99a814a1 5147 /* just after name is now '\0'. */
252b5132
RH		 5148 p = input_line_pointer;
5149 *p = c;
5150 SKIP_WHITESPACE ();
5151 if (*input_line_pointer != ',')
5152 {
d6ed37ed 5153 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 5154 ignore_rest_of_line ();
5155 return;
5156 }
5157
5158 input_line_pointer++; /* skip ',' */
5159 if ((temp = get_absolute_expression ()) < 0)
5160 {
5161 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5162 ignore_rest_of_line ();
5163 return;
5164 }
5165
5166 if (! lcomm)
5167 {
5168 /* The third argument to .comm is the alignment. */
5169 if (*input_line_pointer != ',')
5170 align = 3;
5171 else
5172 {
5173 ++input_line_pointer;
5174 align = get_absolute_expression ();
5175 if (align <= 0)
5176 {
5177 as_warn (_("ignoring bad alignment"));
5178 align = 3;
5179 }
5180 }
5181 }
5182
5183 *p = 0;
5184 symbolP = symbol_find_or_make (name);
5185
5186 *p = c;
5187 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5188 {
d6ed37ed 5189 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 5190 S_GET_NAME (symbolP));
5191 ignore_rest_of_line ();
5192 return;
5193 }
5194
5195 if (S_GET_VALUE (symbolP))
5196 {
5197 if (S_GET_VALUE (symbolP) != (valueT) temp)
d6ed37ed 5198 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 5199 S_GET_NAME (symbolP),
5200 (long) S_GET_VALUE (symbolP),
5201 (long) temp);
5202 }
5203 else
5204 {
5205 S_SET_VALUE (symbolP, (valueT) temp);
5206 S_SET_EXTERNAL (symbolP);
86ebace2 5207 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 5208 }
5209
5210 demand_empty_rest_of_line ();
5211}
5212
5213/*
5214 * implement the .section pseudo op:
5215 * .section name {, "flags"}
5216 * ^ ^
5217 * | +--- optional flags: 'b' for bss
5218 * | 'i' for info
5219 * +-- section name 'l' for lib
5220 * 'n' for noload
5221 * 'o' for over
5222 * 'w' for data
5223 * 'd' (apparently m88k for data)
5224 * 'x' for text
5225 * But if the argument is not a quoted string, treat it as a
5226 * subsegment number.
5227 *
5228 * FIXME: this is a copy of the section processing from obj-coff.c, with
5229 * additions/changes for the moto-pas assembler support. There are three
5230 * categories:
5231 *
81d4177b 5232 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 5233 * setting bits that bfd probably neither understands or uses. The
5234 * correct approach (?) will have to incorporate extra fields attached
5235 * to the section to hold the system specific stuff. (krk)
5236 *
5237 * Section Contents:
5238 * 'a' - unknown - referred to in documentation, but no definition supplied
5239 * 'c' - section has code
5240 * 'd' - section has initialized data
5241 * 'u' - section has uninitialized data
5242 * 'i' - section contains directives (info)
5243 * 'n' - section can be discarded
5244 * 'R' - remove section at link time
5245 *
5246 * Section Protection:
5247 * 'r' - section is readable
5248 * 'w' - section is writeable
5249 * 'x' - section is executable
5250 * 's' - section is sharable
5251 *
5252 * Section Alignment:
5253 * '0' - align to byte boundary
5254 * '1' - align to halfword undary
5255 * '2' - align to word boundary
5256 * '3' - align to doubleword boundary
5257 * '4' - align to quadword boundary
5258 * '5' - align to 32 byte boundary
5259 * '6' - align to 64 byte boundary
5260 *
5261 */
5262
5263void
98027b10 5264ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 5265{
99a814a1 5266 /* Strip out the section name. */
252b5132
RH		 5267 char *section_name;
5268 char c;
5269 char *name;
5270 unsigned int exp;
5271 flagword flags;
5272 segT sec;
5273 int align;
5274
5275 section_name = input_line_pointer;
5276 c = get_symbol_end ();
5277
5278 name = xmalloc (input_line_pointer - section_name + 1);
5279 strcpy (name, section_name);
5280
5281 *input_line_pointer = c;
5282
5283 SKIP_WHITESPACE ();
5284
5285 exp = 0;
5286 flags = SEC_NO_FLAGS;
5287
5288 if (strcmp (name, ".idata$2") == 0)
5289 {
5290 align = 0;
5291 }
5292 else if (strcmp (name, ".idata$3") == 0)
5293 {
5294 align = 0;
5295 }
5296 else if (strcmp (name, ".idata$4") == 0)
5297 {
5298 align = 2;
5299 }
5300 else if (strcmp (name, ".idata$5") == 0)
5301 {
5302 align = 2;
5303 }
5304 else if (strcmp (name, ".idata$6") == 0)
5305 {
5306 align = 1;
5307 }
5308 else
99a814a1
AM		 5309 /* Default alignment to 16 byte boundary. */
5310 align = 4;
252b5132
RH		 5311
5312 if (*input_line_pointer == ',')
5313 {
5314 ++input_line_pointer;
5315 SKIP_WHITESPACE ();
5316 if (*input_line_pointer != '"')
5317 exp = get_absolute_expression ();
5318 else
5319 {
5320 ++input_line_pointer;
5321 while (*input_line_pointer != '"'
5322 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5323 {
5324 switch (*input_line_pointer)
5325 {
5326 /* Section Contents */
5327 case 'a': /* unknown */
d6ed37ed 5328 as_bad (_("unsupported section attribute -- 'a'"));
252b5132
RH		 5329 break;
5330 case 'c': /* code section */
81d4177b 5331 flags |= SEC_CODE;
252b5132
RH		 5332 break;
5333 case 'd': /* section has initialized data */
5334 flags |= SEC_DATA;
5335 break;
5336 case 'u': /* section has uninitialized data */
5337 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5338 in winnt.h */
5339 flags |= SEC_ROM;
5340 break;
5341 case 'i': /* section contains directives (info) */
5342 /* FIXME: This is IMAGE_SCN_LNK_INFO
5343 in winnt.h */
5344 flags |= SEC_HAS_CONTENTS;
5345 break;
5346 case 'n': /* section can be discarded */
81d4177b 5347 flags &=~ SEC_LOAD;
252b5132
RH		 5348 break;
5349 case 'R': /* Remove section at link time */
5350 flags |= SEC_NEVER_LOAD;
5351 break;
8d452c78 5352#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5353 /* Section Protection */
5354 case 'r': /* section is readable */
5355 flags |= IMAGE_SCN_MEM_READ;
5356 break;
5357 case 'w': /* section is writeable */
5358 flags |= IMAGE_SCN_MEM_WRITE;
5359 break;
5360 case 'x': /* section is executable */
5361 flags |= IMAGE_SCN_MEM_EXECUTE;
5362 break;
5363 case 's': /* section is sharable */
5364 flags |= IMAGE_SCN_MEM_SHARED;
5365 break;
5366
5367 /* Section Alignment */
5368 case '0': /* align to byte boundary */
5369 flags |= IMAGE_SCN_ALIGN_1BYTES;
5370 align = 0;
5371 break;
5372 case '1': /* align to halfword boundary */
5373 flags |= IMAGE_SCN_ALIGN_2BYTES;
5374 align = 1;
5375 break;
5376 case '2': /* align to word boundary */
5377 flags |= IMAGE_SCN_ALIGN_4BYTES;
5378 align = 2;
5379 break;
5380 case '3': /* align to doubleword boundary */
5381 flags |= IMAGE_SCN_ALIGN_8BYTES;
5382 align = 3;
5383 break;
5384 case '4': /* align to quadword boundary */
5385 flags |= IMAGE_SCN_ALIGN_16BYTES;
5386 align = 4;
5387 break;
5388 case '5': /* align to 32 byte boundary */
5389 flags |= IMAGE_SCN_ALIGN_32BYTES;
5390 align = 5;
5391 break;
5392 case '6': /* align to 64 byte boundary */
5393 flags |= IMAGE_SCN_ALIGN_64BYTES;
5394 align = 6;
5395 break;
8d452c78 5396#endif
252b5132 5397 default:
99a814a1
AM		 5398 as_bad (_("unknown section attribute '%c'"),
5399 *input_line_pointer);
252b5132
RH		 5400 break;
5401 }
5402 ++input_line_pointer;
5403 }
5404 if (*input_line_pointer == '"')
5405 ++input_line_pointer;
5406 }
5407 }
5408
5409 sec = subseg_new (name, (subsegT) exp);
5410
99a814a1 5411 ppc_set_current_section (sec);
252b5132
RH		 5412
5413 if (flags != SEC_NO_FLAGS)
5414 {
5415 if (! bfd_set_section_flags (stdoutput, sec, flags))
5416 as_bad (_("error setting flags for \"%s\": %s"),
5417 bfd_section_name (stdoutput, sec),
5418 bfd_errmsg (bfd_get_error ()));
5419 }
5420
99a814a1 5421 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5422}
5423
5424static void
98027b10 5425ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5426{
5427 char *name;
5428 char endc;
5429 symbolS *ext_sym;
5430
5431 name = input_line_pointer;
5432 endc = get_symbol_end ();
5433
5434 ext_sym = symbol_find_or_make (name);
5435
5436 *input_line_pointer = endc;
5437
5438 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5439 SF_SET_FUNCTION (ext_sym);
5440 SF_SET_PROCESS (ext_sym);
5441 coff_add_linesym (ext_sym);
5442
5443 demand_empty_rest_of_line ();
5444}
5445
5446static void
98027b10 5447ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5448{
5449 if (tocdata_section == 0)
5450 {
5451 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5452 /* FIXME: section flags won't work. */
252b5132
RH		 5453 bfd_set_section_flags (stdoutput, tocdata_section,
5454 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5455 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5456
5457 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5458 }
5459 else
5460 {
5461 rdata_section = subseg_new (".tocd", 0);
5462 }
5463
99a814a1 5464 ppc_set_current_section (tocdata_section);
252b5132
RH		 5465
5466 demand_empty_rest_of_line ();
5467}
5468
5469/* Don't adjust TOC relocs to use the section symbol. */
5470
5471int
98027b10 5472ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5473{
5474 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5475}
5476
5477#endif
5478\f
5479#ifdef OBJ_XCOFF
5480
5481/* XCOFF specific symbol and file handling. */
5482
5483/* Canonicalize the symbol name. We use the to force the suffix, if
5484 any, to use square brackets, and to be in upper case. */
5485
5486char *
98027b10 5487ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5488{
5489 char *s;
5490
5491 if (ppc_stab_symbol)
5492 return name;
5493
5494 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5495 ;
5496 if (*s != '\0')
5497 {
5498 char brac;
5499
5500 if (*s == '[')
5501 brac = ']';
5502 else
5503 {
5504 *s = '[';
5505 brac = '}';
5506 }
5507
5508 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5509 *s = TOUPPER (*s);
252b5132
RH		 5510
5511 if (*s == '\0' || s[1] != '\0')
5512 as_bad (_("bad symbol suffix"));
5513
5514 *s = ']';
5515 }
5516
5517 return name;
5518}
5519
5520/* Set the class of a symbol based on the suffix, if any. This is
5521 called whenever a new symbol is created. */
5522
5523void
98027b10 5524ppc_symbol_new_hook (symbolS *sym)
252b5132 5525{
809ffe0d 5526 struct ppc_tc_sy *tc;
252b5132
RH		 5527 const char *s;
5528
809ffe0d
ILT		 5529 tc = symbol_get_tc (sym);
5530 tc->next = NULL;
5531 tc->output = 0;
96d56e9f 5532 tc->symbol_class = -1;
809ffe0d
ILT		 5533 tc->real_name = NULL;
5534 tc->subseg = 0;
5535 tc->align = 0;
85645aed
TG		 5536 tc->u.size = NULL;
5537 tc->u.dw = NULL;
809ffe0d 5538 tc->within = NULL;
252b5132
RH		 5539
5540 if (ppc_stab_symbol)
5541 return;
5542
5543 s = strchr (S_GET_NAME (sym), '[');
5544 if (s == (const char *) NULL)
5545 {
5546 /* There is no suffix. */
5547 return;
5548 }
5549
5550 ++s;
5551
5552 switch (s[0])
5553 {
5554 case 'B':
5555 if (strcmp (s, "BS]") == 0)
96d56e9f 5556 tc->symbol_class = XMC_BS;
252b5132
RH		 5557 break;
5558 case 'D':
5559 if (strcmp (s, "DB]") == 0)
96d56e9f 5560 tc->symbol_class = XMC_DB;
252b5132 5561 else if (strcmp (s, "DS]") == 0)
96d56e9f 5562 tc->symbol_class = XMC_DS;
252b5132
RH		 5563 break;
5564 case 'G':
5565 if (strcmp (s, "GL]") == 0)
96d56e9f 5566 tc->symbol_class = XMC_GL;
252b5132
RH		 5567 break;
5568 case 'P':
5569 if (strcmp (s, "PR]") == 0)
96d56e9f 5570 tc->symbol_class = XMC_PR;
252b5132
RH		 5571 break;
5572 case 'R':
5573 if (strcmp (s, "RO]") == 0)
96d56e9f 5574 tc->symbol_class = XMC_RO;
252b5132 5575 else if (strcmp (s, "RW]") == 0)
96d56e9f 5576 tc->symbol_class = XMC_RW;
252b5132
RH		 5577 break;
5578 case 'S':
5579 if (strcmp (s, "SV]") == 0)
96d56e9f 5580 tc->symbol_class = XMC_SV;
252b5132
RH		 5581 break;
5582 case 'T':
5583 if (strcmp (s, "TC]") == 0)
96d56e9f 5584 tc->symbol_class = XMC_TC;
252b5132 5585 else if (strcmp (s, "TI]") == 0)
96d56e9f 5586 tc->symbol_class = XMC_TI;
252b5132 5587 else if (strcmp (s, "TB]") == 0)
96d56e9f 5588 tc->symbol_class = XMC_TB;
252b5132 5589 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5590 tc->symbol_class = XMC_TC0;
252b5132
RH		 5591 break;
5592 case 'U':
5593 if (strcmp (s, "UA]") == 0)
96d56e9f 5594 tc->symbol_class = XMC_UA;
252b5132 5595 else if (strcmp (s, "UC]") == 0)
96d56e9f 5596 tc->symbol_class = XMC_UC;
252b5132
RH		 5597 break;
5598 case 'X':
5599 if (strcmp (s, "XO]") == 0)
96d56e9f 5600 tc->symbol_class = XMC_XO;
252b5132
RH		 5601 break;
5602 }
5603
96d56e9f 5604 if (tc->symbol_class == -1)
d6ed37ed 5605 as_bad (_("unrecognized symbol suffix"));
252b5132
RH		 5606}
5607
5608/* Set the class of a label based on where it is defined. This
5609 handles symbols without suffixes. Also, move the symbol so that it
5610 follows the csect symbol. */
5611
5612void
98027b10 5613ppc_frob_label (symbolS *sym)
252b5132
RH		 5614{
5615 if (ppc_current_csect != (symbolS *) NULL)
5616 {
96d56e9f
NC		 5617 if (symbol_get_tc (sym)->symbol_class == -1)
5618 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5619
5620 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5621 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5622 &symbol_rootP, &symbol_lastP);
5623 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5624 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5625 }
07a53e5c
RH		 5626
5627#ifdef OBJ_ELF
5628 dwarf2_emit_label (sym);
5629#endif
252b5132
RH		 5630}
5631
5632/* This variable is set by ppc_frob_symbol if any absolute symbols are
5633 seen. It tells ppc_adjust_symtab whether it needs to look through
5634 the symbols. */
5635
b34976b6 5636static bfd_boolean ppc_saw_abs;
252b5132
RH		 5637
5638/* Change the name of a symbol just before writing it out. Set the
5639 real name if the .rename pseudo-op was used. Otherwise, remove any
5640 class suffix. Return 1 if the symbol should not be included in the
5641 symbol table. */
5642
5643int
98027b10 5644ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5645{
5646 static symbolS *ppc_last_function;
5647 static symbolS *set_end;
5648
5649 /* Discard symbols that should not be included in the output symbol
5650 table. */
809ffe0d
ILT		 5651 if (! symbol_used_in_reloc_p (sym)
5652 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5653 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5654 && ! symbol_get_tc (sym)->output
252b5132
RH		 5655 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5656 return 1;
5657
a161fe53
AM		 5658 /* This one will disappear anyway. Don't make a csect sym for it. */
5659 if (sym == abs_section_sym)
5660 return 1;
5661
809ffe0d
ILT		 5662 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5663 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5664 else
5665 {
5666 const char *name;
5667 const char *s;
5668
5669 name = S_GET_NAME (sym);
5670 s = strchr (name, '[');
5671 if (s != (char *) NULL)
5672 {
5673 unsigned int len;
5674 char *snew;
5675
5676 len = s - name;
5677 snew = xmalloc (len + 1);
5678 memcpy (snew, name, len);
5679 snew[len] = '\0';
5680
5681 S_SET_NAME (sym, snew);
5682 }
5683 }
5684
5685 if (set_end != (symbolS *) NULL)
5686 {
5687 SA_SET_SYM_ENDNDX (set_end, sym);
5688 set_end = NULL;
5689 }
5690
5691 if (SF_GET_FUNCTION (sym))
5692 {
5693 if (ppc_last_function != (symbolS *) NULL)
5694 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5695 ppc_last_function = sym;
85645aed 5696 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5697 {
85645aed 5698 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5699 SA_SET_SYM_FSIZE (sym,
85645aed 5700 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5701 }
5702 }
5703 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5704 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5705 {
5706 if (ppc_last_function == (symbolS *) NULL)
5707 as_bad (_(".ef with no preceding .function"));
5708 else
5709 {
5710 set_end = ppc_last_function;
5711 ppc_last_function = NULL;
5712
5713 /* We don't have a C_EFCN symbol, but we need to force the
5714 COFF backend to believe that it has seen one. */
5715 coff_last_function = NULL;
5716 }
5717 }
5718
670ec21d 5719 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5720 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5721 && S_GET_STORAGE_CLASS (sym) != C_FILE
5722 && S_GET_STORAGE_CLASS (sym) != C_FCN
5723 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5724 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5725 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5726 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5727 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5728 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5729 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5730
5731 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5732 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5733 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5734 {
5735 int i;
5736 union internal_auxent *a;
5737
5738 /* Create a csect aux. */
5739 i = S_GET_NUMBER_AUXILIARY (sym);
5740 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5741 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5742 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5743 {
5744 /* This is the TOC table. */
5745 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5746 a->x_csect.x_scnlen.l = 0;
5747 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5748 }
809ffe0d 5749 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5750 {
5751 /* This is a csect symbol. x_scnlen is the size of the
5752 csect. */
809ffe0d 5753 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5754 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5755 S_GET_SEGMENT (sym))
5756 - S_GET_VALUE (sym));
5757 else
5758 {
6386f3a7 5759 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5760 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5761 - S_GET_VALUE (sym));
5762 }
809ffe0d 5763 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5764 }
5765 else if (S_GET_SEGMENT (sym) == bss_section)
5766 {
5767 /* This is a common symbol. */
809ffe0d
ILT		 5768 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5769 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5770 if (S_IS_EXTERNAL (sym))
96d56e9f 5771 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5772 else
96d56e9f 5773 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5774 }
5775 else if (S_GET_SEGMENT (sym) == absolute_section)
5776 {
5777 /* This is an absolute symbol. The csect will be created by
99a814a1 5778 ppc_adjust_symtab. */
b34976b6 5779 ppc_saw_abs = TRUE;
252b5132 5780 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5781 if (symbol_get_tc (sym)->symbol_class == -1)
5782 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5783 }
5784 else if (! S_IS_DEFINED (sym))
5785 {
5786 /* This is an external symbol. */
5787 a->x_csect.x_scnlen.l = 0;
5788 a->x_csect.x_smtyp = XTY_ER;
5789 }
96d56e9f 5790 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5791 {
5792 symbolS *next;
5793
5794 /* This is a TOC definition. x_scnlen is the size of the
5795 TOC entry. */
5796 next = symbol_next (sym);
96d56e9f 5797 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5798 next = symbol_next (next);
5799 if (next == (symbolS *) NULL
96d56e9f 5800 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5801 {
5802 if (ppc_after_toc_frag == (fragS *) NULL)
5803 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5804 data_section)
5805 - S_GET_VALUE (sym));
5806 else
5807 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5808 - S_GET_VALUE (sym));
5809 }
5810 else
5811 {
6386f3a7 5812 resolve_symbol_value (next);
252b5132
RH		 5813 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5814 - S_GET_VALUE (sym));
5815 }
5816 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5817 }
5818 else
5819 {
5820 symbolS *csect;
5821
5822 /* This is a normal symbol definition. x_scnlen is the
5823 symbol index of the containing csect. */
5824 if (S_GET_SEGMENT (sym) == text_section)
5825 csect = ppc_text_csects;
5826 else if (S_GET_SEGMENT (sym) == data_section)
5827 csect = ppc_data_csects;
5828 else
5829 abort ();
5830
5831 /* Skip the initial dummy symbol. */
809ffe0d 5832 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5833
5834 if (csect == (symbolS *) NULL)
5835 {
5836 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5837 a->x_csect.x_scnlen.l = 0;
5838 }
5839 else
5840 {
809ffe0d 5841 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5842 {
6386f3a7 5843 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5844 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5845 > S_GET_VALUE (sym))
252b5132 5846 break;
809ffe0d 5847 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5848 }
5849
809ffe0d
ILT		 5850 a->x_csect.x_scnlen.p =
5851 coffsymbol (symbol_get_bfdsym (csect))->native;
5852 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5853 1;
252b5132
RH		 5854 }
5855 a->x_csect.x_smtyp = XTY_LD;
5856 }
81d4177b 5857
252b5132
RH		 5858 a->x_csect.x_parmhash = 0;
5859 a->x_csect.x_snhash = 0;
96d56e9f 5860 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5861 a->x_csect.x_smclas = XMC_PR;
5862 else
96d56e9f 5863 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5864 a->x_csect.x_stab = 0;
5865 a->x_csect.x_snstab = 0;
5866
5867 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5868 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5869 }
5870 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5871 {
5872 /* We want the value to be the symbol index of the referenced
5873 csect symbol. BFD will do that for us if we set the right
5874 flags. */
b782de16
AM		 5875 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5876 combined_entry_type *c = coffsymbol (bsym)->native;
5877
5878 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5879 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5880 }
5881 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5882 {
5883 symbolS *block;
c734e7e3 5884 valueT base;
252b5132 5885
809ffe0d 5886 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5887 if (block)
5888 {
5889 /* The value is the offset from the enclosing csect. */
5890 symbolS *csect;
5891
5892 csect = symbol_get_tc (block)->within;
5893 resolve_symbol_value (csect);
5894 base = S_GET_VALUE (csect);
5895 }
5896 else
5897 base = 0;
5898
5899 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 5900 }
5901 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5902 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5903 {
5904 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5905 BFD will do that for us if we set the right flags. We have
5906 already set the value correctly. */
809ffe0d 5907 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5908 }
5909
5910 return 0;
5911}
5912
5913/* Adjust the symbol table. This creates csect symbols for all
5914 absolute symbols. */
5915
5916void
98027b10 5917ppc_adjust_symtab (void)
252b5132
RH		 5918{
5919 symbolS *sym;
5920
5921 if (! ppc_saw_abs)
5922 return;
5923
5924 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5925 {
5926 symbolS *csect;
5927 int i;
5928 union internal_auxent *a;
5929
5930 if (S_GET_SEGMENT (sym) != absolute_section)
5931 continue;
5932
5933 csect = symbol_create (".abs[XO]", absolute_section,
5934 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5935 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5936 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5937 i = S_GET_NUMBER_AUXILIARY (csect);
5938 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5939 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5940 a->x_csect.x_scnlen.l = 0;
5941 a->x_csect.x_smtyp = XTY_SD;
5942 a->x_csect.x_parmhash = 0;
5943 a->x_csect.x_snhash = 0;
5944 a->x_csect.x_smclas = XMC_XO;
5945 a->x_csect.x_stab = 0;
5946 a->x_csect.x_snstab = 0;
5947
5948 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5949
5950 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5951 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5952 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5953 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5954 }
5955
b34976b6 5956 ppc_saw_abs = FALSE;
252b5132
RH		 5957}
5958
5959/* Set the VMA for a section. This is called on all the sections in
5960 turn. */
5961
5962void
98027b10 5963ppc_frob_section (asection *sec)
252b5132 5964{
931e13a6 5965 static bfd_vma vma = 0;
252b5132 5966
85645aed
TG		 5967 /* Dwarf sections start at 0. */
5968 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
5969 return;
5970
931e13a6 5971 vma = md_section_align (sec, vma);
252b5132
RH		 5972 bfd_set_section_vma (stdoutput, sec, vma);
5973 vma += bfd_section_size (stdoutput, sec);
5974}
5975
5976#endif /* OBJ_XCOFF */
5977\f
252b5132 5978char *
98027b10 5979md_atof (int type, char *litp, int *sizep)
252b5132 5980{
499ac353 5981 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5982}
5983
5984/* Write a value out to the object file, using the appropriate
5985 endianness. */
5986
5987void
98027b10 5988md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5989{
5990 if (target_big_endian)
5991 number_to_chars_bigendian (buf, val, n);
5992 else
5993 number_to_chars_littleendian (buf, val, n);
5994}
5995
5996/* Align a section (I don't know why this is machine dependent). */
5997
5998valueT
3aeeedbb 5999md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 6000{
3aeeedbb
AM		 6001#ifdef OBJ_ELF
6002 return addr;
6003#else
252b5132
RH		 6004 int align = bfd_get_section_alignment (stdoutput, seg);
6005
6006 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 6007#endif
252b5132
RH		 6008}
6009
6010/* We don't have any form of relaxing. */
6011
6012int
98027b10
AM		 6013md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6014 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 6015{
6016 abort ();
6017 return 0;
6018}
6019
6020/* Convert a machine dependent frag. We never generate these. */
6021
6022void
98027b10
AM		 6023md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6024 asection *sec ATTRIBUTE_UNUSED,
6025 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 6026{
6027 abort ();
6028}
6029
6030/* We have no need to default values of symbols. */
6031
252b5132 6032symbolS *
98027b10 6033md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 6034{
6035 return 0;
6036}
6037\f
6038/* Functions concerning relocs. */
6039
6040/* The location from which a PC relative jump should be calculated,
6041 given a PC relative reloc. */
6042
6043long
98027b10 6044md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 6045{
6046 return fixp->fx_frag->fr_address + fixp->fx_where;
6047}
6048
6049#ifdef OBJ_XCOFF
6050
6051/* This is called to see whether a fixup should be adjusted to use a
6052 section symbol. We take the opportunity to change a fixup against
6053 a symbol in the TOC subsegment into a reloc against the
6054 corresponding .tc symbol. */
6055
6056int
98027b10 6057ppc_fix_adjustable (fixS *fix)
252b5132 6058{
b782de16
AM		 6059 valueT val = resolve_symbol_value (fix->fx_addsy);
6060 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6061 TC_SYMFIELD_TYPE *tc;
6062
6063 if (symseg == absolute_section)
6064 return 0;
252b5132 6065
85645aed
TG		 6066 /* Always adjust symbols in debugging sections. */
6067 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6068 return 1;
6069
252b5132 6070 if (ppc_toc_csect != (symbolS *) NULL
252b5132 6071 && fix->fx_addsy != ppc_toc_csect
b782de16 6072 && symseg == data_section
252b5132
RH		 6073 && val >= ppc_toc_frag->fr_address
6074 && (ppc_after_toc_frag == (fragS *) NULL
6075 || val < ppc_after_toc_frag->fr_address))
6076 {
6077 symbolS *sy;
6078
6079 for (sy = symbol_next (ppc_toc_csect);
6080 sy != (symbolS *) NULL;
6081 sy = symbol_next (sy))
6082 {
b782de16
AM		 6083 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6084
96d56e9f 6085 if (sy_tc->symbol_class == XMC_TC0)
252b5132 6086 continue;
96d56e9f 6087 if (sy_tc->symbol_class != XMC_TC)
252b5132 6088 break;
b782de16 6089 if (val == resolve_symbol_value (sy))
252b5132
RH		 6090 {
6091 fix->fx_addsy = sy;
6092 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6093 return 0;
6094 }
6095 }
6096
6097 as_bad_where (fix->fx_file, fix->fx_line,
6098 _("symbol in .toc does not match any .tc"));
6099 }
6100
6101 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 6102 tc = symbol_get_tc (fix->fx_addsy);
6103 if (tc->subseg == 0
96d56e9f
NC		 6104 && tc->symbol_class != XMC_TC0
6105 && tc->symbol_class != XMC_TC
b782de16 6106 && symseg != bss_section
252b5132 6107 /* Don't adjust if this is a reloc in the toc section. */
b782de16 6108 && (symseg != data_section
252b5132
RH		 6109 || ppc_toc_csect == NULL
6110 || val < ppc_toc_frag->fr_address
6111 || (ppc_after_toc_frag != NULL
6112 && val >= ppc_after_toc_frag->fr_address)))
6113 {
2fb4b302 6114 symbolS *csect = tc->within;
252b5132 6115
2fb4b302
TG		 6116 /* If the symbol was not declared by a label (eg: a section symbol),
6117 use the section instead of the csect. This doesn't happen in
6118 normal AIX assembly code. */
6119 if (csect == NULL)
6120 csect = seg_info (symseg)->sym;
252b5132 6121
2fb4b302
TG		 6122 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6123 fix->fx_addsy = csect;
252b5132 6124
b782de16 6125 return 0;
252b5132
RH		 6126 }
6127
6128 /* Adjust a reloc against a .lcomm symbol to be against the base
6129 .lcomm. */
b782de16 6130 if (symseg == bss_section
252b5132
RH		 6131 && ! S_IS_EXTERNAL (fix->fx_addsy))
6132 {
b782de16
AM		 6133 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6134
6135 fix->fx_offset += val - resolve_symbol_value (sy);
6136 fix->fx_addsy = sy;
252b5132
RH		 6137 }
6138
6139 return 0;
6140}
6141
6142/* A reloc from one csect to another must be kept. The assembler
6143 will, of course, keep relocs between sections, and it will keep
6144 absolute relocs, but we need to force it to keep PC relative relocs
6145 between two csects in the same section. */
6146
6147int
98027b10 6148ppc_force_relocation (fixS *fix)
252b5132
RH		 6149{
6150 /* At this point fix->fx_addsy should already have been converted to
6151 a csect symbol. If the csect does not include the fragment, then
6152 we need to force the relocation. */
6153 if (fix->fx_pcrel
6154 && fix->fx_addsy != NULL
809ffe0d
ILT		 6155 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6156 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6157 > fix->fx_frag->fr_address)
6158 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6159 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 6160 <= fix->fx_frag->fr_address))))
6161 return 1;
6162
ae6063d4 6163 return generic_force_reloc (fix);
252b5132
RH		 6164}
6165
2fb4b302
TG		 6166void
6167ppc_new_dot_label (symbolS *sym)
6168{
6169 /* Anchor this label to the current csect for relocations. */
6170 symbol_get_tc (sym)->within = ppc_current_csect;
6171}
6172
252b5132
RH		 6173#endif /* OBJ_XCOFF */
6174
0baf16f2 6175#ifdef OBJ_ELF
a161fe53
AM		 6176/* If this function returns non-zero, it guarantees that a relocation
6177 will be emitted for a fixup. */
6178
6179int
98027b10 6180ppc_force_relocation (fixS *fix)
a161fe53
AM		 6181{
6182 /* Branch prediction relocations must force a relocation, as must
6183 the vtable description relocs. */
6184 switch (fix->fx_r_type)
6185 {
6186 case BFD_RELOC_PPC_B16_BRTAKEN:
6187 case BFD_RELOC_PPC_B16_BRNTAKEN:
6188 case BFD_RELOC_PPC_BA16_BRTAKEN:
6189 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 6190 case BFD_RELOC_24_PLT_PCREL:
a161fe53 6191 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 6192 return 1;
6193 default:
6194 break;
6195 }
6196
cdba85ec
AM		 6197 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6198 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6199 return 1;
6200
ae6063d4 6201 return generic_force_reloc (fix);
a161fe53
AM		 6202}
6203
0baf16f2 6204int
98027b10 6205ppc_fix_adjustable (fixS *fix)
252b5132 6206{
0baf16f2
AM		 6207 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6208 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6209 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6210 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 6211 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6212 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 6213 && fix->fx_r_type != BFD_RELOC_GPREL16
6214 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6215 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 6216 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 6217 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 6218}
0baf16f2 6219#endif
252b5132 6220
b9c361e0
JL		 6221void
6222ppc_frag_check (struct frag *fragP)
6223{
6224 if (!fragP->has_code)
6225 return;
6226
6227 if (ppc_mach() == bfd_mach_ppc_vle)
6228 {
6229 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6230 as_bad (_("instruction address is not a multiple of 2"));
6231 }
6232 else
6233 {
6234 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6235 as_bad (_("instruction address is not a multiple of 4"));
6236 }
6237}
6238
3aeeedbb
AM		 6239/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6240 rs_align_code frag. */
6241
6242void
6243ppc_handle_align (struct frag *fragP)
6244{
6245 valueT count = (fragP->fr_next->fr_address
6246 - (fragP->fr_address + fragP->fr_fix));
6247
b9c361e0
JL		 6248 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6249 {
6250 char *dest = fragP->fr_literal + fragP->fr_fix;
6251
6252 fragP->fr_var = 2;
6253 md_number_to_chars (dest, 0x4400, 2);
6254 }
6255 else if (count != 0 && (count & 3) == 0)
3aeeedbb
AM		 6256 {
6257 char *dest = fragP->fr_literal + fragP->fr_fix;
6258
6259 fragP->fr_var = 4;
cef4f754
AM		 6260
6261 if (count > 4 * nop_limit && count < 0x2000000)
6262 {
6263 struct frag *rest;
6264
6265 /* Make a branch, then follow with nops. Insert another
6266 frag to handle the nops. */
6267 md_number_to_chars (dest, 0x48000000 + count, 4);
6268 count -= 4;
6269 if (count == 0)
6270 return;
6271
6272 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6273 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6274 fragP->fr_next = rest;
6275 fragP = rest;
6276 rest->fr_address += rest->fr_fix + 4;
6277 rest->fr_fix = 0;
6278 /* If we leave the next frag as rs_align_code we'll come here
6279 again, resulting in a bunch of branches rather than a
6280 branch followed by nops. */
6281 rest->fr_type = rs_align;
6282 dest = rest->fr_literal;
6283 }
6284
3aeeedbb
AM		 6285 md_number_to_chars (dest, 0x60000000, 4);
6286
42240548 6287 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5817ffd1
PB		 6288 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6289 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
3aeeedbb 6290 {
5817ffd1 6291 /* For power6, power7 and power8, we want the last nop to be a group
42240548
PB		 6292 terminating one. Do this by inserting an rs_fill frag immediately
6293 after this one, with its address set to the last nop location.
6294 This will automatically reduce the number of nops in the current
6295 frag by one. */
3aeeedbb
AM		 6296 if (count > 4)
6297 {
6298 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6299
6300 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6301 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6302 group_nop->fr_fix = 0;
6303 group_nop->fr_offset = 1;
6304 group_nop->fr_type = rs_fill;
6305 fragP->fr_next = group_nop;
6306 dest = group_nop->fr_literal;
6307 }
6308
5817ffd1
PB		 6309 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6310 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
aea77599
AM		 6311 {
6312 if (ppc_cpu & PPC_OPCODE_E500MC)
6313 /* e500mc group terminating nop: "ori 0,0,0". */
6314 md_number_to_chars (dest, 0x60000000, 4);
6315 else
5817ffd1 6316 /* power7/power8 group terminating nop: "ori 2,2,0". */
aea77599
AM		 6317 md_number_to_chars (dest, 0x60420000, 4);
6318 }
42240548
PB		 6319 else
6320 /* power6 group terminating nop: "ori 1,1,0". */
6321 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6322 }
6323 }
6324}
6325
252b5132 6326/* Apply a fixup to the object code. This is called for all the
3b8b57a9 6327 fixups we generated by the calls to fix_new_exp, above. */
252b5132 6328
94f592af 6329void
98027b10 6330md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 6331{
94f592af 6332 valueT value = * valP;
5656a981
AM		 6333 offsetT fieldval;
6334 const struct powerpc_operand *operand;
252b5132
RH		 6335
6336#ifdef OBJ_ELF
94f592af 6337 if (fixP->fx_addsy != NULL)
252b5132 6338 {
a161fe53 6339 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6340 if (fixP->fx_pcrel)
6341 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 6342 }
6343 else
94f592af 6344 fixP->fx_done = 1;
252b5132 6345#else
a161fe53 6346 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6347 the symbol values. If we are doing this relocation the code in
6348 write.c is going to call bfd_install_relocation, which is also
6349 going to use the symbol value. That means that if the reloc is
6350 fully resolved we want to use *valP since bfd_install_relocation is
6351 not being used.
9f0eb232
RS		 6352 However, if the reloc is not fully resolved we do not want to
6353 use *valP, and must use fx_offset instead. If the relocation
6354 is PC-relative, we then need to re-apply md_pcrel_from_section
6355 to this new relocation value. */
94f592af
NC		 6356 if (fixP->fx_addsy == (symbolS *) NULL)
6357 fixP->fx_done = 1;
6358
252b5132 6359 else
9f0eb232
RS		 6360 {
6361 value = fixP->fx_offset;
6362 if (fixP->fx_pcrel)
6363 value -= md_pcrel_from_section (fixP, seg);
6364 }
a161fe53
AM		 6365#endif
6366
6367 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6368 {
a161fe53
AM		 6369 /* We can't actually support subtracting a symbol. */
6370 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6371 }
252b5132 6372
5656a981 6373 operand = NULL;
3b8b57a9 6374 if (fixP->fx_pcrel_adjust != 0)
252b5132 6375 {
5656a981 6376 /* This is a fixup on an instruction. */
3b8b57a9 6377 int opindex = fixP->fx_pcrel_adjust & 0xff;
252b5132 6378
5656a981 6379 operand = &powerpc_operands[opindex];
252b5132 6380#ifdef OBJ_XCOFF
0baf16f2
AM		 6381 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6382 does not generate a reloc. It uses the offset of `sym' within its
6383 csect. Other usages, such as `.long sym', generate relocs. This
6384 is the documented behaviour of non-TOC symbols. */
252b5132 6385 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6386 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6387 && operand->shift == 0
2b3c4602 6388 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6389 && fixP->fx_addsy != NULL
6390 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6391 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6392 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6393 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6394 {
94f592af
NC		 6395 value = fixP->fx_offset;
6396 fixP->fx_done = 1;
252b5132 6397 }
ac21e7da
TG		 6398
6399 /* During parsing of instructions, a TOC16 reloc is generated for
6400 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6401 in the toc. But at parse time, SYM may be not yet defined, so
6402 check again here. */
6403 if (fixP->fx_r_type == BFD_RELOC_16
6404 && fixP->fx_addsy != NULL
6405 && ppc_is_toc_sym (fixP->fx_addsy))
6406 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
252b5132 6407#endif
5656a981
AM		 6408 }
6409
6410 /* Calculate value to be stored in field. */
6411 fieldval = value;
6412 switch (fixP->fx_r_type)
6413 {
1ec2d25e 6414#ifdef OBJ_ELF
5656a981
AM		 6415 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6416 case BFD_RELOC_PPC_VLE_LO16A:
6417 case BFD_RELOC_PPC_VLE_LO16D:
1ec2d25e 6418#endif
5656a981
AM		 6419 case BFD_RELOC_LO16:
6420 case BFD_RELOC_LO16_PCREL:
6421 fieldval = value & 0xffff;
6422 sign_extend_16:
6423 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
f9c6b907 6424 fieldval = SEX16 (fieldval);
5656a981
AM		 6425 fixP->fx_no_overflow = 1;
6426 break;
3c9d25f4 6427
f9c6b907
AM		 6428 case BFD_RELOC_HI16:
6429 case BFD_RELOC_HI16_PCREL:
5656a981 6430#ifdef OBJ_ELF
f9c6b907
AM		 6431 if (REPORT_OVERFLOW_HI && ppc_obj64)
6432 {
6433 fieldval = value >> 16;
6434 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6435 {
6436 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6437 fieldval = ((valueT) fieldval ^ sign) - sign;
6438 }
6439 break;
6440 }
6441 /* Fall thru */
6442
5656a981
AM		 6443 case BFD_RELOC_PPC_VLE_HI16A:
6444 case BFD_RELOC_PPC_VLE_HI16D:
f9c6b907 6445 case BFD_RELOC_PPC64_ADDR16_HIGH:
5656a981 6446#endif
5656a981
AM		 6447 fieldval = PPC_HI (value);
6448 goto sign_extend_16;
0baf16f2 6449
f9c6b907
AM		 6450 case BFD_RELOC_HI16_S:
6451 case BFD_RELOC_HI16_S_PCREL:
5656a981 6452#ifdef OBJ_ELF
f9c6b907
AM		 6453 if (REPORT_OVERFLOW_HI && ppc_obj64)
6454 {
6455 fieldval = (value + 0x8000) >> 16;
6456 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6457 {
6458 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6459 fieldval = ((valueT) fieldval ^ sign) - sign;
6460 }
6461 break;
6462 }
6463 /* Fall thru */
6464
5656a981
AM		 6465 case BFD_RELOC_PPC_VLE_HA16A:
6466 case BFD_RELOC_PPC_VLE_HA16D:
f9c6b907 6467 case BFD_RELOC_PPC64_ADDR16_HIGHA:
5656a981 6468#endif
5656a981
AM		 6469 fieldval = PPC_HA (value);
6470 goto sign_extend_16;
0baf16f2 6471
3b8b57a9 6472#ifdef OBJ_ELF
5656a981
AM		 6473 case BFD_RELOC_PPC64_HIGHER:
6474 fieldval = PPC_HIGHER (value);
6475 goto sign_extend_16;
252b5132 6476
5656a981
AM		 6477 case BFD_RELOC_PPC64_HIGHER_S:
6478 fieldval = PPC_HIGHERA (value);
6479 goto sign_extend_16;
0baf16f2 6480
5656a981
AM		 6481 case BFD_RELOC_PPC64_HIGHEST:
6482 fieldval = PPC_HIGHEST (value);
6483 goto sign_extend_16;
0baf16f2 6484
5656a981
AM		 6485 case BFD_RELOC_PPC64_HIGHEST_S:
6486 fieldval = PPC_HIGHESTA (value);
6487 goto sign_extend_16;
6488#endif
6489
6490 default:
6491 break;
6492 }
6493
6494 if (operand != NULL)
6495 {
6496 /* Handle relocs in an insn. */
6497 char *where;
6498 unsigned long insn;
0baf16f2 6499
5656a981
AM		 6500 switch (fixP->fx_r_type)
6501 {
7fa9fcb6 6502#ifdef OBJ_ELF
3b8b57a9
AM		 6503 /* The following relocs can't be calculated by the assembler.
6504 Leave the field zero. */
cdba85ec
AM		 6505 case BFD_RELOC_PPC_TPREL16:
6506 case BFD_RELOC_PPC_TPREL16_LO:
6507 case BFD_RELOC_PPC_TPREL16_HI:
6508 case BFD_RELOC_PPC_TPREL16_HA:
cdba85ec
AM		 6509 case BFD_RELOC_PPC_DTPREL16:
6510 case BFD_RELOC_PPC_DTPREL16_LO:
6511 case BFD_RELOC_PPC_DTPREL16_HI:
6512 case BFD_RELOC_PPC_DTPREL16_HA:
cdba85ec
AM		 6513 case BFD_RELOC_PPC_GOT_TLSGD16:
6514 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6515 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6516 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6517 case BFD_RELOC_PPC_GOT_TLSLD16:
6518 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6519 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6520 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6521 case BFD_RELOC_PPC_GOT_TPREL16:
6522 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6523 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6524 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6525 case BFD_RELOC_PPC_GOT_DTPREL16:
6526 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6527 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6528 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6529 case BFD_RELOC_PPC64_TPREL16_DS:
6530 case BFD_RELOC_PPC64_TPREL16_LO_DS:
f9c6b907
AM		 6531 case BFD_RELOC_PPC64_TPREL16_HIGH:
6532 case BFD_RELOC_PPC64_TPREL16_HIGHA:
cdba85ec
AM		 6533 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6534 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6535 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6536 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
f9c6b907
AM		 6537 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6538 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
cdba85ec
AM		 6539 case BFD_RELOC_PPC64_DTPREL16_DS:
6540 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6541 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6542 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6543 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6544 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
3b8b57a9 6545 gas_assert (fixP->fx_addsy != NULL);
7c1d0959 6546 S_SET_THREAD_LOCAL (fixP->fx_addsy);
3b8b57a9 6547 fieldval = 0;
cdba85ec 6548 break;
3b8b57a9
AM		 6549
6550 /* These also should leave the field zero for the same
6551 reason. Note that older versions of gas wrote values
6552 here. If we want to go back to the old behaviour, then
6553 all _LO and _LO_DS cases will need to be treated like
6554 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6555 case BFD_RELOC_16_GOTOFF:
6556 case BFD_RELOC_LO16_GOTOFF:
6557 case BFD_RELOC_HI16_GOTOFF:
6558 case BFD_RELOC_HI16_S_GOTOFF:
6559 case BFD_RELOC_LO16_PLTOFF:
6560 case BFD_RELOC_HI16_PLTOFF:
6561 case BFD_RELOC_HI16_S_PLTOFF:
6562 case BFD_RELOC_GPREL16:
6563 case BFD_RELOC_16_BASEREL:
6564 case BFD_RELOC_LO16_BASEREL:
6565 case BFD_RELOC_HI16_BASEREL:
6566 case BFD_RELOC_HI16_S_BASEREL:
6567 case BFD_RELOC_PPC_TOC16:
6568 case BFD_RELOC_PPC64_TOC16_LO:
6569 case BFD_RELOC_PPC64_TOC16_HI:
6570 case BFD_RELOC_PPC64_TOC16_HA:
6571 case BFD_RELOC_PPC64_PLTGOT16:
6572 case BFD_RELOC_PPC64_PLTGOT16_LO:
6573 case BFD_RELOC_PPC64_PLTGOT16_HI:
6574 case BFD_RELOC_PPC64_PLTGOT16_HA:
6575 case BFD_RELOC_PPC64_GOT16_DS:
6576 case BFD_RELOC_PPC64_GOT16_LO_DS:
6577 case BFD_RELOC_PPC64_PLT16_LO_DS:
6578 case BFD_RELOC_PPC64_SECTOFF_DS:
6579 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6580 case BFD_RELOC_PPC64_TOC16_DS:
6581 case BFD_RELOC_PPC64_TOC16_LO_DS:
6582 case BFD_RELOC_PPC64_PLTGOT16_DS:
6583 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6584 case BFD_RELOC_PPC_EMB_NADDR16:
6585 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6586 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6587 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6588 case BFD_RELOC_PPC_EMB_SDAI16:
6589 case BFD_RELOC_PPC_EMB_SDA2I16:
6590 case BFD_RELOC_PPC_EMB_SDA2REL:
252b5132 6591 case BFD_RELOC_PPC_EMB_SDA21:
3b8b57a9
AM		 6592 case BFD_RELOC_PPC_EMB_MRKREF:
6593 case BFD_RELOC_PPC_EMB_RELSEC16:
6594 case BFD_RELOC_PPC_EMB_RELST_LO:
6595 case BFD_RELOC_PPC_EMB_RELST_HI:
6596 case BFD_RELOC_PPC_EMB_RELST_HA:
6597 case BFD_RELOC_PPC_EMB_BIT_FLD:
6598 case BFD_RELOC_PPC_EMB_RELSDA:
6599 case BFD_RELOC_PPC_VLE_SDA21:
6600 case BFD_RELOC_PPC_VLE_SDA21_LO:
6601 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6602 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6603 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6604 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6605 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6606 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6607 gas_assert (fixP->fx_addsy != NULL);
6608 /* Fall thru */
6609
6610 case BFD_RELOC_PPC_TLS:
6611 case BFD_RELOC_PPC_TLSGD:
6612 case BFD_RELOC_PPC_TLSLD:
6613 fieldval = 0;
3b8b57a9 6614 break;
7fa9fcb6
TG		 6615#endif
6616
6617#ifdef OBJ_XCOFF
6618 case BFD_RELOC_PPC_B16:
6619 /* Adjust the offset to the instruction boundary. */
6620 fieldval += 2;
6621 break;
6622#endif
252b5132 6623
3b8b57a9 6624 default:
252b5132 6625 break;
3b8b57a9 6626 }
252b5132 6627
3b8b57a9
AM		 6628#ifdef OBJ_ELF
6629/* powerpc uses RELA style relocs, so if emitting a reloc the field
6630 contents can stay at zero. */
6631#define APPLY_RELOC fixP->fx_done
6632#else
6633#define APPLY_RELOC 1
6634#endif
6635 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6636 {
6637 /* Fetch the instruction, insert the fully resolved operand
6638 value, and stuff the instruction back again. */
6639 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6640 if (target_big_endian)
31a91399 6641 {
3b8b57a9
AM		 6642 if (fixP->fx_size == 4)
6643 insn = bfd_getb32 ((unsigned char *) where);
31a91399 6644 else
3b8b57a9 6645 insn = bfd_getb16 ((unsigned char *) where);
31a91399
NC		 6646 }
6647 else
3b8b57a9
AM		 6648 {
6649 if (fixP->fx_size == 4)
6650 insn = bfd_getl32 ((unsigned char *) where);
6651 else
6652 insn = bfd_getl16 ((unsigned char *) where);
6653 }
6654 insn = ppc_insert_operand (insn, operand, fieldval,
6655 fixP->tc_fix_data.ppc_cpu,
6656 fixP->fx_file, fixP->fx_line);
6657 if (target_big_endian)
6658 {
6659 if (fixP->fx_size == 4)
6660 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6661 else
6662 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6663 }
6664 else
6665 {
6666 if (fixP->fx_size == 4)
6667 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6668 else
6669 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6670 }
6671 }
6672
6673 if (fixP->fx_done)
6674 /* Nothing else to do here. */
6675 return;
6676
6677 gas_assert (fixP->fx_addsy != NULL);
6678 if (fixP->fx_r_type == BFD_RELOC_UNUSED)
6679 {
6680 char *sfile;
6681 unsigned int sline;
6682
6683 /* Use expr_symbol_where to see if this is an expression
6684 symbol. */
6685 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6686 as_bad_where (fixP->fx_file, fixP->fx_line,
6687 _("unresolved expression that must be resolved"));
6688 else
6689 as_bad_where (fixP->fx_file, fixP->fx_line,
6690 _("unsupported relocation against %s"),
6691 S_GET_NAME (fixP->fx_addsy));
6692 fixP->fx_done = 1;
6693 return;
6694 }
6695 }
6696 else
6697 {
6698 /* Handle relocs in data. */
6699 switch (fixP->fx_r_type)
6700 {
252b5132 6701 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6702 if (fixP->fx_addsy
6703 && !S_IS_DEFINED (fixP->fx_addsy)
6704 && !S_IS_WEAK (fixP->fx_addsy))
6705 S_SET_WEAK (fixP->fx_addsy);
3b8b57a9 6706 /* Fall thru */
252b5132
RH		 6707
6708 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6709 fixP->fx_done = 0;
252b5132
RH		 6710 break;
6711
0baf16f2 6712#ifdef OBJ_ELF
3b8b57a9
AM		 6713 /* These can appear with @l etc. in data. */
6714 case BFD_RELOC_LO16:
3b8b57a9 6715 case BFD_RELOC_LO16_PCREL:
3b8b57a9 6716 case BFD_RELOC_HI16:
3b8b57a9 6717 case BFD_RELOC_HI16_PCREL:
3b8b57a9 6718 case BFD_RELOC_HI16_S:
3b8b57a9 6719 case BFD_RELOC_HI16_S_PCREL:
3b8b57a9 6720 case BFD_RELOC_PPC64_HIGHER:
3b8b57a9 6721 case BFD_RELOC_PPC64_HIGHER_S:
3b8b57a9 6722 case BFD_RELOC_PPC64_HIGHEST:
3b8b57a9 6723 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 6724 case BFD_RELOC_PPC64_ADDR16_HIGH:
6725 case BFD_RELOC_PPC64_ADDR16_HIGHA:
3b8b57a9
AM		 6726 break;
6727
6728 case BFD_RELOC_PPC_DTPMOD:
6729 case BFD_RELOC_PPC_TPREL:
6730 case BFD_RELOC_PPC_DTPREL:
6731 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6732 break;
6733
6734 /* Just punt all of these to the linker. */
6735 case BFD_RELOC_PPC_B16_BRTAKEN:
6736 case BFD_RELOC_PPC_B16_BRNTAKEN:
6737 case BFD_RELOC_16_GOTOFF:
6738 case BFD_RELOC_LO16_GOTOFF:
6739 case BFD_RELOC_HI16_GOTOFF:
6740 case BFD_RELOC_HI16_S_GOTOFF:
6741 case BFD_RELOC_LO16_PLTOFF:
6742 case BFD_RELOC_HI16_PLTOFF:
6743 case BFD_RELOC_HI16_S_PLTOFF:
6744 case BFD_RELOC_PPC_COPY:
6745 case BFD_RELOC_PPC_GLOB_DAT:
6746 case BFD_RELOC_16_BASEREL:
6747 case BFD_RELOC_LO16_BASEREL:
6748 case BFD_RELOC_HI16_BASEREL:
6749 case BFD_RELOC_HI16_S_BASEREL:
6750 case BFD_RELOC_PPC_TLS:
6751 case BFD_RELOC_PPC_DTPREL16_LO:
6752 case BFD_RELOC_PPC_DTPREL16_HI:
6753 case BFD_RELOC_PPC_DTPREL16_HA:
6754 case BFD_RELOC_PPC_TPREL16_LO:
6755 case BFD_RELOC_PPC_TPREL16_HI:
6756 case BFD_RELOC_PPC_TPREL16_HA:
6757 case BFD_RELOC_PPC_GOT_TLSGD16:
6758 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6759 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6760 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6761 case BFD_RELOC_PPC_GOT_TLSLD16:
6762 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6763 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6764 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6765 case BFD_RELOC_PPC_GOT_DTPREL16:
6766 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6767 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6768 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6769 case BFD_RELOC_PPC_GOT_TPREL16:
6770 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6771 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6772 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6773 case BFD_RELOC_24_PLT_PCREL:
6774 case BFD_RELOC_PPC_LOCAL24PC:
6775 case BFD_RELOC_32_PLT_PCREL:
6776 case BFD_RELOC_GPREL16:
6777 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6778 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6779 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6780 case BFD_RELOC_PPC_EMB_NADDR32:
6781 case BFD_RELOC_PPC_EMB_NADDR16:
6782 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6783 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6784 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6785 case BFD_RELOC_PPC_EMB_SDAI16:
6786 case BFD_RELOC_PPC_EMB_SDA2REL:
6787 case BFD_RELOC_PPC_EMB_SDA2I16:
6788 case BFD_RELOC_PPC_EMB_SDA21:
6789 case BFD_RELOC_PPC_VLE_SDA21_LO:
6790 case BFD_RELOC_PPC_EMB_MRKREF:
6791 case BFD_RELOC_PPC_EMB_RELSEC16:
6792 case BFD_RELOC_PPC_EMB_RELST_LO:
6793 case BFD_RELOC_PPC_EMB_RELST_HI:
6794 case BFD_RELOC_PPC_EMB_RELST_HA:
6795 case BFD_RELOC_PPC_EMB_BIT_FLD:
6796 case BFD_RELOC_PPC_EMB_RELSDA:
0baf16f2 6797 case BFD_RELOC_PPC64_TOC:
3b8b57a9
AM		 6798 case BFD_RELOC_PPC_TOC16:
6799 case BFD_RELOC_PPC64_TOC16_LO:
6800 case BFD_RELOC_PPC64_TOC16_HI:
6801 case BFD_RELOC_PPC64_TOC16_HA:
f9c6b907
AM		 6802 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6803 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
3b8b57a9
AM		 6804 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6805 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6806 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6807 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
f9c6b907
AM		 6808 case BFD_RELOC_PPC64_TPREL16_HIGH:
6809 case BFD_RELOC_PPC64_TPREL16_HIGHA:
3b8b57a9
AM		 6810 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6811 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6812 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6813 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
94f592af 6814 fixP->fx_done = 0;
0baf16f2 6815 break;
0baf16f2 6816#endif
3b8b57a9
AM		 6817
6818#ifdef OBJ_XCOFF
6819 case BFD_RELOC_NONE:
3b8b57a9 6820#endif
5656a981
AM		 6821 case BFD_RELOC_CTOR:
6822 case BFD_RELOC_32:
6823 case BFD_RELOC_32_PCREL:
6824 case BFD_RELOC_RVA:
6825 case BFD_RELOC_64:
6826 case BFD_RELOC_64_PCREL:
6827 case BFD_RELOC_16:
6828 case BFD_RELOC_16_PCREL:
6829 case BFD_RELOC_8:
6830 break;
3b8b57a9 6831
252b5132 6832 default:
bc805888 6833 fprintf (stderr,
94f592af 6834 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6835 fflush (stderr);
252b5132
RH		 6836 abort ();
6837 }
46b596ff 6838
5656a981 6839 if (fixP->fx_size && APPLY_RELOC)
46b596ff 6840 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5656a981
AM		 6841 fieldval, fixP->fx_size);
6842 }
6843
6844 /* We are only able to convert some relocs to pc-relative. */
6845 if (!fixP->fx_done && fixP->fx_pcrel)
6846 {
6847 switch (fixP->fx_r_type)
6848 {
6849 case BFD_RELOC_LO16:
6850 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6851 break;
6852
6853 case BFD_RELOC_HI16:
6854 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6855 break;
6856
6857 case BFD_RELOC_HI16_S:
6858 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6859 break;
6860
6861 case BFD_RELOC_64:
6862 fixP->fx_r_type = BFD_RELOC_64_PCREL;
6863 break;
6864
6865 case BFD_RELOC_32:
6866 fixP->fx_r_type = BFD_RELOC_32_PCREL;
6867 break;
6868
6869 case BFD_RELOC_16:
6870 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6871 break;
6872
6873 /* Some of course are already pc-relative. */
6874 case BFD_RELOC_LO16_PCREL:
6875 case BFD_RELOC_HI16_PCREL:
6876 case BFD_RELOC_HI16_S_PCREL:
6877 case BFD_RELOC_64_PCREL:
6878 case BFD_RELOC_32_PCREL:
6879 case BFD_RELOC_16_PCREL:
6880 case BFD_RELOC_PPC_B16:
6881 case BFD_RELOC_PPC_B16_BRTAKEN:
6882 case BFD_RELOC_PPC_B16_BRNTAKEN:
6883 case BFD_RELOC_PPC_B26:
6884 case BFD_RELOC_PPC_LOCAL24PC:
6885 case BFD_RELOC_24_PLT_PCREL:
6886 case BFD_RELOC_32_PLT_PCREL:
6887 case BFD_RELOC_64_PLT_PCREL:
6888 case BFD_RELOC_PPC_VLE_REL8:
6889 case BFD_RELOC_PPC_VLE_REL15:
6890 case BFD_RELOC_PPC_VLE_REL24:
6891 break;
6892
6893 default:
6894 if (fixP->fx_addsy)
6895 {
6896 char *sfile;
6897 unsigned int sline;
6898
6899 /* Use expr_symbol_where to see if this is an
6900 expression symbol. */
6901 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6902 as_bad_where (fixP->fx_file, fixP->fx_line,
6903 _("unresolved expression that must"
6904 " be resolved"));
6905 else
6906 as_bad_where (fixP->fx_file, fixP->fx_line,
6907 _("cannot emit PC relative %s relocation"
6908 " against %s"),
6909 bfd_get_reloc_code_name (fixP->fx_r_type),
6910 S_GET_NAME (fixP->fx_addsy));
6911 }
6912 else
6913 as_bad_where (fixP->fx_file, fixP->fx_line,
6914 _("unable to resolve expression"));
6915 fixP->fx_done = 1;
6916 break;
6917 }
252b5132
RH		 6918 }
6919
6920#ifdef OBJ_ELF
3b8b57a9 6921 ppc_elf_validate_fix (fixP, seg);
94f592af 6922 fixP->fx_addnumber = value;
4e6935a6
AM		 6923
6924 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6925 from the section contents. If we are going to be emitting a reloc
6926 then the section contents are immaterial, so don't warn if they
6927 happen to overflow. Leave such warnings to ld. */
6928 if (!fixP->fx_done)
a38a07e0
AM		 6929 {
6930 fixP->fx_no_overflow = 1;
6931
6932 /* Arrange to emit .TOC. as a normal symbol if used in anything
6933 but .TOC.@tocbase. */
6934 if (ppc_obj64
6935 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
6936 && fixP->fx_addsy != NULL
6937 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
6938 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
6939 }
252b5132 6940#else
94f592af
NC		 6941 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6942 fixP->fx_addnumber = 0;
252b5132
RH		 6943 else
6944 {
6945#ifdef TE_PE
94f592af 6946 fixP->fx_addnumber = 0;
252b5132 6947#else
8edcbfcd
TG		 6948 /* We want to use the offset within the toc, not the actual VMA
6949 of the symbol. */
94f592af 6950 fixP->fx_addnumber =
8edcbfcd
TG		 6951 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6952 - S_GET_VALUE (ppc_toc_csect);
ac21e7da
TG		 6953 /* Set *valP to avoid errors. */
6954 *valP = value;
252b5132
RH		 6955#endif
6956 }
6957#endif
252b5132
RH		 6958}
6959
6960/* Generate a reloc for a fixup. */
6961
6962arelent *
98027b10 6963tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6964{
6965 arelent *reloc;
6966
6967 reloc = (arelent *) xmalloc (sizeof (arelent));
6968
49309057
ILT		 6969 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6970 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6971 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6972 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6973 if (reloc->howto == (reloc_howto_type *) NULL)
6974 {
6975 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6976 _("reloc %d not supported by object file format"),
6977 (int) fixp->fx_r_type);
252b5132
RH		 6978 return NULL;
6979 }
6980 reloc->addend = fixp->fx_addnumber;
6981
6982 return reloc;
6983}
75e21f08
JJ		 6984
6985void
98027b10 6986ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6987{
6988 cfi_add_CFA_def_cfa (1, 0);
6989}
6990
6991int
1df69f4f 6992tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6993{
6994 unsigned int regnum = -1;
6995 unsigned int i;
6996 const char *p;
6997 char *q;
6998 static struct { char *name; int dw2regnum; } regnames[] =
6999 {
7000 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7001 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 7002 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 7003 { "spe_acc", 111 }, { "spefscr", 112 }
7004 };
7005
7006 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7007 if (strcmp (regnames[i].name, regname) == 0)
7008 return regnames[i].dw2regnum;
7009
7010 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7011 {
7012 p = regname + 1 + (regname[1] == '.');
7013 regnum = strtoul (p, &q, 10);
7014 if (p == q || *q || regnum >= 32)
7015 return -1;
7016 if (regname[0] == 'f')
b7d7dc63 7017 regnum += 32;
75e21f08 7018 else if (regname[0] == 'v')
b7d7dc63 7019 regnum += 77;
75e21f08
JJ		 7020 }
7021 else if (regname[0] == 'c' && regname[1] == 'r')
7022 {
7023 p = regname + 2 + (regname[2] == '.');
7024 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 7025 return -1;
75e21f08
JJ		 7026 regnum = p[0] - '0' + 68;
7027 }
7028 return regnum;
7029}
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