projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
* config.bfd: Add vectors for powerpc and powerpc64-freebsd.
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
cc643b88
NC		 3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
252b5132
RH		 5 Written by Ian Lance Taylor, Cygnus Support.
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
ec2655a6 11 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 02110-1301, USA. */
252b5132 23
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
85645aed
TG		 39#ifdef OBJ_XCOFF
40#include "coff/xcoff.h"
41#include "libxcoff.h"
42#endif
43
252b5132
RH		 44/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45
46/* Tell the main code what the endianness is. */
47extern int target_big_endian;
48
49/* Whether or not, we've set target_big_endian. */
50static int set_target_endian = 0;
51
52/* Whether to use user friendly register names. */
53#ifndef TARGET_REG_NAMES_P
54#ifdef TE_PE
b34976b6 55#define TARGET_REG_NAMES_P TRUE
252b5132 56#else
b34976b6 57#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 58#endif
59#endif
60
0baf16f2
AM		 61/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
62 HIGHESTA. */
63
64/* #lo(value) denotes the least significant 16 bits of the indicated. */
65#define PPC_LO(v) ((v) & 0xffff)
66
67/* #hi(value) denotes bits 16 through 31 of the indicated value. */
68#define PPC_HI(v) (((v) >> 16) & 0xffff)
69
70/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
71 the indicated value, compensating for #lo() being treated as a
72 signed number. */
15c1449b 73#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 74
75/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 76#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 77
78/* #highera(value) denotes bits 32 through 47 of the indicated value,
79 compensating for #lo() being treated as a signed number. */
15c1449b 80#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 81
82/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 83#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 84
85/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 86 compensating for #lo being treated as a signed number. */
87#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 88
89#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
90
b34976b6 91static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 92
98027b10
AM		 93static void ppc_macro (char *, const struct powerpc_macro *);
94static void ppc_byte (int);
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 97static void ppc_tc (int);
98static void ppc_machine (int);
0baf16f2 99#endif
252b5132
RH		 100
101#ifdef OBJ_XCOFF
98027b10
AM		 102static void ppc_comm (int);
103static void ppc_bb (int);
104static void ppc_bc (int);
105static void ppc_bf (int);
106static void ppc_biei (int);
107static void ppc_bs (int);
108static void ppc_eb (int);
109static void ppc_ec (int);
110static void ppc_ef (int);
111static void ppc_es (int);
112static void ppc_csect (int);
85645aed 113static void ppc_dwsect (int);
98027b10
AM		 114static void ppc_change_csect (symbolS *, offsetT);
115static void ppc_function (int);
116static void ppc_extern (int);
117static void ppc_lglobl (int);
c865e45b 118static void ppc_ref (int);
98027b10
AM		 119static void ppc_section (int);
120static void ppc_named_section (int);
121static void ppc_stabx (int);
122static void ppc_rename (int);
123static void ppc_toc (int);
124static void ppc_xcoff_cons (int);
125static void ppc_vbyte (int);
252b5132
RH		 126#endif
127
128#ifdef OBJ_ELF
98027b10
AM		 129static void ppc_elf_cons (int);
130static void ppc_elf_rdata (int);
131static void ppc_elf_lcomm (int);
252b5132
RH		 132#endif
133
134#ifdef TE_PE
98027b10
AM		 135static void ppc_previous (int);
136static void ppc_pdata (int);
137static void ppc_ydata (int);
138static void ppc_reldata (int);
139static void ppc_rdata (int);
140static void ppc_ualong (int);
141static void ppc_znop (int);
142static void ppc_pe_comm (int);
143static void ppc_pe_section (int);
144static void ppc_pe_function (int);
145static void ppc_pe_tocd (int);
252b5132
RH		 146#endif
147\f
148/* Generic assembler global variables which must be defined by all
149 targets. */
150
151#ifdef OBJ_ELF
152/* This string holds the chars that always start a comment. If the
153 pre-processor is disabled, these aren't very useful. The macro
154 tc_comment_chars points to this. We use this, rather than the
155 usual comment_chars, so that we can switch for Solaris conventions. */
156static const char ppc_solaris_comment_chars[] = "#!";
157static const char ppc_eabi_comment_chars[] = "#";
158
159#ifdef TARGET_SOLARIS_COMMENT
160const char *ppc_comment_chars = ppc_solaris_comment_chars;
161#else
162const char *ppc_comment_chars = ppc_eabi_comment_chars;
163#endif
164#else
165const char comment_chars[] = "#";
166#endif
167
168/* Characters which start a comment at the beginning of a line. */
169const char line_comment_chars[] = "#";
170
171/* Characters which may be used to separate multiple commands on a
172 single line. */
173const char line_separator_chars[] = ";";
174
175/* Characters which are used to indicate an exponent in a floating
176 point number. */
177const char EXP_CHARS[] = "eE";
178
179/* Characters which mean that a number is a floating point constant,
180 as in 0d1.0. */
181const char FLT_CHARS[] = "dD";
5ce8663f 182
5e02f92e 183/* Anything that can start an operand needs to be mentioned here,
ac805826 184 to stop the input scrubber eating whitespace. */
5e02f92e 185const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 186
187/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
188int ppc_cie_data_alignment;
783de163 189
cef4f754
AM		 190/* More than this number of nops in an alignment op gets a branch
191 instead. */
192unsigned long nop_limit = 4;
193
783de163
AM		 194/* The type of processor we are assembling for. This is one or more
195 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 196ppc_cpu_t ppc_cpu = 0;
01efc3af
AM		 197
198/* Flags set on encountering toc relocs. */
199enum {
200 has_large_toc_reloc = 1,
201 has_small_toc_reloc = 2
202} toc_reloc_types;
252b5132
RH		 203\f
204/* The target specific pseudo-ops which we support. */
205
206const pseudo_typeS md_pseudo_table[] =
207{
208 /* Pseudo-ops which must be overridden. */
209 { "byte", ppc_byte, 0 },
210
211#ifdef OBJ_XCOFF
212 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
213 legitimately belong in the obj-*.c file. However, XCOFF is based
214 on COFF, and is only implemented for the RS/6000. We just use
215 obj-coff.c, and add what we need here. */
216 { "comm", ppc_comm, 0 },
217 { "lcomm", ppc_comm, 1 },
218 { "bb", ppc_bb, 0 },
219 { "bc", ppc_bc, 0 },
220 { "bf", ppc_bf, 0 },
221 { "bi", ppc_biei, 0 },
222 { "bs", ppc_bs, 0 },
223 { "csect", ppc_csect, 0 },
85645aed 224 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 225 { "data", ppc_section, 'd' },
226 { "eb", ppc_eb, 0 },
227 { "ec", ppc_ec, 0 },
228 { "ef", ppc_ef, 0 },
229 { "ei", ppc_biei, 1 },
230 { "es", ppc_es, 0 },
231 { "extern", ppc_extern, 0 },
232 { "function", ppc_function, 0 },
233 { "lglobl", ppc_lglobl, 0 },
c865e45b 234 { "ref", ppc_ref, 0 },
252b5132
RH		 235 { "rename", ppc_rename, 0 },
236 { "section", ppc_named_section, 0 },
237 { "stabx", ppc_stabx, 0 },
238 { "text", ppc_section, 't' },
239 { "toc", ppc_toc, 0 },
240 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 241 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 242 { "word", ppc_xcoff_cons, 1 },
243 { "short", ppc_xcoff_cons, 1 },
244 { "vbyte", ppc_vbyte, 0 },
245#endif
246
247#ifdef OBJ_ELF
0baf16f2
AM		 248 { "llong", ppc_elf_cons, 8 },
249 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 250 { "long", ppc_elf_cons, 4 },
251 { "word", ppc_elf_cons, 2 },
252 { "short", ppc_elf_cons, 2 },
253 { "rdata", ppc_elf_rdata, 0 },
254 { "rodata", ppc_elf_rdata, 0 },
255 { "lcomm", ppc_elf_lcomm, 0 },
256#endif
257
258#ifdef TE_PE
99a814a1 259 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 260 { "previous", ppc_previous, 0 },
261 { "pdata", ppc_pdata, 0 },
262 { "ydata", ppc_ydata, 0 },
263 { "reldata", ppc_reldata, 0 },
264 { "rdata", ppc_rdata, 0 },
265 { "ualong", ppc_ualong, 0 },
266 { "znop", ppc_znop, 0 },
267 { "comm", ppc_pe_comm, 0 },
268 { "lcomm", ppc_pe_comm, 1 },
269 { "section", ppc_pe_section, 0 },
270 { "function", ppc_pe_function,0 },
271 { "tocd", ppc_pe_tocd, 0 },
272#endif
273
0baf16f2 274#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 275 { "tc", ppc_tc, 0 },
0baf16f2
AM		 276 { "machine", ppc_machine, 0 },
277#endif
252b5132
RH		 278
279 { NULL, NULL, 0 }
280};
281
282\f
99a814a1
AM		 283/* Predefined register names if -mregnames (or default for Windows NT).
284 In general, there are lots of them, in an attempt to be compatible
285 with a number of other Windows NT assemblers. */
252b5132
RH		 286
287/* Structure to hold information about predefined registers. */
288struct pd_reg
289 {
290 char *name;
291 int value;
292 };
293
294/* List of registers that are pre-defined:
295
296 Each general register has predefined names of the form:
297 1. r<reg_num> which has the value <reg_num>.
298 2. r.<reg_num> which has the value <reg_num>.
299
252b5132
RH		 300 Each floating point register has predefined names of the form:
301 1. f<reg_num> which has the value <reg_num>.
302 2. f.<reg_num> which has the value <reg_num>.
303
7a899fff
C		 304 Each vector unit register has predefined names of the form:
305 1. v<reg_num> which has the value <reg_num>.
306 2. v.<reg_num> which has the value <reg_num>.
307
252b5132
RH		 308 Each condition register has predefined names of the form:
309 1. cr<reg_num> which has the value <reg_num>.
310 2. cr.<reg_num> which has the value <reg_num>.
311
312 There are individual registers as well:
313 sp or r.sp has the value 1
314 rtoc or r.toc has the value 2
315 fpscr has the value 0
316 xer has the value 1
317 lr has the value 8
318 ctr has the value 9
319 pmr has the value 0
320 dar has the value 19
321 dsisr has the value 18
322 dec has the value 22
323 sdr1 has the value 25
324 srr0 has the value 26
325 srr1 has the value 27
326
81d4177b 327 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 328
329static const struct pd_reg pre_defined_registers[] =
330{
331 { "cr.0", 0 }, /* Condition Registers */
332 { "cr.1", 1 },
333 { "cr.2", 2 },
334 { "cr.3", 3 },
335 { "cr.4", 4 },
336 { "cr.5", 5 },
337 { "cr.6", 6 },
338 { "cr.7", 7 },
339
340 { "cr0", 0 },
341 { "cr1", 1 },
342 { "cr2", 2 },
343 { "cr3", 3 },
344 { "cr4", 4 },
345 { "cr5", 5 },
346 { "cr6", 6 },
347 { "cr7", 7 },
348
349 { "ctr", 9 },
350
351 { "dar", 19 }, /* Data Access Register */
352 { "dec", 22 }, /* Decrementer */
353 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
354
355 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 356 { "f.1", 1 },
357 { "f.10", 10 },
358 { "f.11", 11 },
359 { "f.12", 12 },
360 { "f.13", 13 },
361 { "f.14", 14 },
362 { "f.15", 15 },
363 { "f.16", 16 },
364 { "f.17", 17 },
365 { "f.18", 18 },
366 { "f.19", 19 },
367 { "f.2", 2 },
368 { "f.20", 20 },
369 { "f.21", 21 },
370 { "f.22", 22 },
371 { "f.23", 23 },
372 { "f.24", 24 },
373 { "f.25", 25 },
374 { "f.26", 26 },
375 { "f.27", 27 },
376 { "f.28", 28 },
377 { "f.29", 29 },
378 { "f.3", 3 },
252b5132
RH		 379 { "f.30", 30 },
380 { "f.31", 31 },
066be9f7
PB		 381
382 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
383 { "f.33", 33 },
384 { "f.34", 34 },
385 { "f.35", 35 },
386 { "f.36", 36 },
387 { "f.37", 37 },
388 { "f.38", 38 },
389 { "f.39", 39 },
81d4177b 390 { "f.4", 4 },
066be9f7
PB		 391 { "f.40", 40 },
392 { "f.41", 41 },
393 { "f.42", 42 },
394 { "f.43", 43 },
395 { "f.44", 44 },
396 { "f.45", 45 },
397 { "f.46", 46 },
398 { "f.47", 47 },
399 { "f.48", 48 },
400 { "f.49", 49 },
81d4177b 401 { "f.5", 5 },
066be9f7
PB		 402 { "f.50", 50 },
403 { "f.51", 51 },
404 { "f.52", 52 },
405 { "f.53", 53 },
406 { "f.54", 54 },
407 { "f.55", 55 },
408 { "f.56", 56 },
409 { "f.57", 57 },
410 { "f.58", 58 },
411 { "f.59", 59 },
81d4177b 412 { "f.6", 6 },
066be9f7
PB		 413 { "f.60", 60 },
414 { "f.61", 61 },
415 { "f.62", 62 },
416 { "f.63", 63 },
81d4177b
KH		 417 { "f.7", 7 },
418 { "f.8", 8 },
419 { "f.9", 9 },
420
421 { "f0", 0 },
422 { "f1", 1 },
423 { "f10", 10 },
424 { "f11", 11 },
425 { "f12", 12 },
426 { "f13", 13 },
427 { "f14", 14 },
428 { "f15", 15 },
429 { "f16", 16 },
430 { "f17", 17 },
431 { "f18", 18 },
432 { "f19", 19 },
433 { "f2", 2 },
434 { "f20", 20 },
435 { "f21", 21 },
436 { "f22", 22 },
437 { "f23", 23 },
438 { "f24", 24 },
439 { "f25", 25 },
440 { "f26", 26 },
441 { "f27", 27 },
442 { "f28", 28 },
443 { "f29", 29 },
444 { "f3", 3 },
252b5132
RH		 445 { "f30", 30 },
446 { "f31", 31 },
066be9f7
PB		 447
448 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
449 { "f33", 33 },
450 { "f34", 34 },
451 { "f35", 35 },
452 { "f36", 36 },
453 { "f37", 37 },
454 { "f38", 38 },
455 { "f39", 39 },
81d4177b 456 { "f4", 4 },
066be9f7
PB		 457 { "f40", 40 },
458 { "f41", 41 },
459 { "f42", 42 },
460 { "f43", 43 },
461 { "f44", 44 },
462 { "f45", 45 },
463 { "f46", 46 },
464 { "f47", 47 },
465 { "f48", 48 },
466 { "f49", 49 },
81d4177b 467 { "f5", 5 },
066be9f7
PB		 468 { "f50", 50 },
469 { "f51", 51 },
470 { "f52", 52 },
471 { "f53", 53 },
472 { "f54", 54 },
473 { "f55", 55 },
474 { "f56", 56 },
475 { "f57", 57 },
476 { "f58", 58 },
477 { "f59", 59 },
81d4177b 478 { "f6", 6 },
066be9f7
PB		 479 { "f60", 60 },
480 { "f61", 61 },
481 { "f62", 62 },
482 { "f63", 63 },
81d4177b
KH		 483 { "f7", 7 },
484 { "f8", 8 },
485 { "f9", 9 },
252b5132
RH		 486
487 { "fpscr", 0 },
488
c3d65c1c
BE		 489 /* Quantization registers used with pair single instructions. */
490 { "gqr.0", 0 },
491 { "gqr.1", 1 },
492 { "gqr.2", 2 },
493 { "gqr.3", 3 },
494 { "gqr.4", 4 },
495 { "gqr.5", 5 },
496 { "gqr.6", 6 },
497 { "gqr.7", 7 },
498 { "gqr0", 0 },
499 { "gqr1", 1 },
500 { "gqr2", 2 },
501 { "gqr3", 3 },
502 { "gqr4", 4 },
503 { "gqr5", 5 },
504 { "gqr6", 6 },
505 { "gqr7", 7 },
506
252b5132
RH		 507 { "lr", 8 }, /* Link Register */
508
509 { "pmr", 0 },
510
511 { "r.0", 0 }, /* General Purpose Registers */
512 { "r.1", 1 },
513 { "r.10", 10 },
514 { "r.11", 11 },
515 { "r.12", 12 },
516 { "r.13", 13 },
517 { "r.14", 14 },
518 { "r.15", 15 },
519 { "r.16", 16 },
520 { "r.17", 17 },
521 { "r.18", 18 },
522 { "r.19", 19 },
523 { "r.2", 2 },
524 { "r.20", 20 },
525 { "r.21", 21 },
526 { "r.22", 22 },
527 { "r.23", 23 },
528 { "r.24", 24 },
529 { "r.25", 25 },
530 { "r.26", 26 },
531 { "r.27", 27 },
532 { "r.28", 28 },
533 { "r.29", 29 },
534 { "r.3", 3 },
535 { "r.30", 30 },
536 { "r.31", 31 },
537 { "r.4", 4 },
538 { "r.5", 5 },
539 { "r.6", 6 },
540 { "r.7", 7 },
541 { "r.8", 8 },
542 { "r.9", 9 },
543
544 { "r.sp", 1 }, /* Stack Pointer */
545
546 { "r.toc", 2 }, /* Pointer to the table of contents */
547
548 { "r0", 0 }, /* More general purpose registers */
549 { "r1", 1 },
550 { "r10", 10 },
551 { "r11", 11 },
552 { "r12", 12 },
553 { "r13", 13 },
554 { "r14", 14 },
555 { "r15", 15 },
556 { "r16", 16 },
557 { "r17", 17 },
558 { "r18", 18 },
559 { "r19", 19 },
560 { "r2", 2 },
561 { "r20", 20 },
562 { "r21", 21 },
563 { "r22", 22 },
564 { "r23", 23 },
565 { "r24", 24 },
566 { "r25", 25 },
567 { "r26", 26 },
568 { "r27", 27 },
569 { "r28", 28 },
570 { "r29", 29 },
571 { "r3", 3 },
572 { "r30", 30 },
573 { "r31", 31 },
574 { "r4", 4 },
575 { "r5", 5 },
576 { "r6", 6 },
577 { "r7", 7 },
578 { "r8", 8 },
579 { "r9", 9 },
580
581 { "rtoc", 2 }, /* Table of contents */
582
583 { "sdr1", 25 }, /* Storage Description Register 1 */
584
585 { "sp", 1 },
586
587 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
588 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 589
066be9f7 590 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 591 { "v.1", 1 },
592 { "v.10", 10 },
593 { "v.11", 11 },
594 { "v.12", 12 },
595 { "v.13", 13 },
596 { "v.14", 14 },
597 { "v.15", 15 },
598 { "v.16", 16 },
599 { "v.17", 17 },
600 { "v.18", 18 },
601 { "v.19", 19 },
602 { "v.2", 2 },
603 { "v.20", 20 },
604 { "v.21", 21 },
605 { "v.22", 22 },
606 { "v.23", 23 },
607 { "v.24", 24 },
608 { "v.25", 25 },
609 { "v.26", 26 },
610 { "v.27", 27 },
611 { "v.28", 28 },
612 { "v.29", 29 },
613 { "v.3", 3 },
7a899fff
C		 614 { "v.30", 30 },
615 { "v.31", 31 },
81d4177b
KH		 616 { "v.4", 4 },
617 { "v.5", 5 },
618 { "v.6", 6 },
619 { "v.7", 7 },
620 { "v.8", 8 },
621 { "v.9", 9 },
7a899fff
C		 622
623 { "v0", 0 },
81d4177b
KH		 624 { "v1", 1 },
625 { "v10", 10 },
626 { "v11", 11 },
627 { "v12", 12 },
628 { "v13", 13 },
629 { "v14", 14 },
630 { "v15", 15 },
631 { "v16", 16 },
632 { "v17", 17 },
633 { "v18", 18 },
634 { "v19", 19 },
635 { "v2", 2 },
636 { "v20", 20 },
637 { "v21", 21 },
638 { "v22", 22 },
639 { "v23", 23 },
640 { "v24", 24 },
641 { "v25", 25 },
642 { "v26", 26 },
643 { "v27", 27 },
644 { "v28", 28 },
645 { "v29", 29 },
646 { "v3", 3 },
7a899fff
C		 647 { "v30", 30 },
648 { "v31", 31 },
81d4177b
KH		 649 { "v4", 4 },
650 { "v5", 5 },
651 { "v6", 6 },
652 { "v7", 7 },
653 { "v8", 8 },
7a899fff 654 { "v9", 9 },
252b5132 655
066be9f7
PB		 656 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
657 { "vs.1", 1 },
658 { "vs.10", 10 },
659 { "vs.11", 11 },
660 { "vs.12", 12 },
661 { "vs.13", 13 },
662 { "vs.14", 14 },
663 { "vs.15", 15 },
664 { "vs.16", 16 },
665 { "vs.17", 17 },
666 { "vs.18", 18 },
667 { "vs.19", 19 },
668 { "vs.2", 2 },
669 { "vs.20", 20 },
670 { "vs.21", 21 },
671 { "vs.22", 22 },
672 { "vs.23", 23 },
673 { "vs.24", 24 },
674 { "vs.25", 25 },
675 { "vs.26", 26 },
676 { "vs.27", 27 },
677 { "vs.28", 28 },
678 { "vs.29", 29 },
679 { "vs.3", 3 },
680 { "vs.30", 30 },
681 { "vs.31", 31 },
682 { "vs.32", 32 },
683 { "vs.33", 33 },
684 { "vs.34", 34 },
685 { "vs.35", 35 },
686 { "vs.36", 36 },
687 { "vs.37", 37 },
688 { "vs.38", 38 },
689 { "vs.39", 39 },
690 { "vs.4", 4 },
691 { "vs.40", 40 },
692 { "vs.41", 41 },
693 { "vs.42", 42 },
694 { "vs.43", 43 },
695 { "vs.44", 44 },
696 { "vs.45", 45 },
697 { "vs.46", 46 },
698 { "vs.47", 47 },
699 { "vs.48", 48 },
700 { "vs.49", 49 },
701 { "vs.5", 5 },
702 { "vs.50", 50 },
703 { "vs.51", 51 },
704 { "vs.52", 52 },
705 { "vs.53", 53 },
706 { "vs.54", 54 },
707 { "vs.55", 55 },
708 { "vs.56", 56 },
709 { "vs.57", 57 },
710 { "vs.58", 58 },
711 { "vs.59", 59 },
712 { "vs.6", 6 },
713 { "vs.60", 60 },
714 { "vs.61", 61 },
715 { "vs.62", 62 },
716 { "vs.63", 63 },
717 { "vs.7", 7 },
718 { "vs.8", 8 },
719 { "vs.9", 9 },
720
721 { "vs0", 0 },
722 { "vs1", 1 },
723 { "vs10", 10 },
724 { "vs11", 11 },
725 { "vs12", 12 },
726 { "vs13", 13 },
727 { "vs14", 14 },
728 { "vs15", 15 },
729 { "vs16", 16 },
730 { "vs17", 17 },
731 { "vs18", 18 },
732 { "vs19", 19 },
733 { "vs2", 2 },
734 { "vs20", 20 },
735 { "vs21", 21 },
736 { "vs22", 22 },
737 { "vs23", 23 },
738 { "vs24", 24 },
739 { "vs25", 25 },
740 { "vs26", 26 },
741 { "vs27", 27 },
742 { "vs28", 28 },
743 { "vs29", 29 },
744 { "vs3", 3 },
745 { "vs30", 30 },
746 { "vs31", 31 },
747 { "vs32", 32 },
748 { "vs33", 33 },
749 { "vs34", 34 },
750 { "vs35", 35 },
751 { "vs36", 36 },
752 { "vs37", 37 },
753 { "vs38", 38 },
754 { "vs39", 39 },
755 { "vs4", 4 },
756 { "vs40", 40 },
757 { "vs41", 41 },
758 { "vs42", 42 },
759 { "vs43", 43 },
760 { "vs44", 44 },
761 { "vs45", 45 },
762 { "vs46", 46 },
763 { "vs47", 47 },
764 { "vs48", 48 },
765 { "vs49", 49 },
766 { "vs5", 5 },
767 { "vs50", 50 },
768 { "vs51", 51 },
769 { "vs52", 52 },
770 { "vs53", 53 },
771 { "vs54", 54 },
772 { "vs55", 55 },
773 { "vs56", 56 },
774 { "vs57", 57 },
775 { "vs58", 58 },
776 { "vs59", 59 },
777 { "vs6", 6 },
778 { "vs60", 60 },
779 { "vs61", 61 },
780 { "vs62", 62 },
781 { "vs63", 63 },
782 { "vs7", 7 },
783 { "vs8", 8 },
784 { "vs9", 9 },
785
252b5132
RH		 786 { "xer", 1 },
787
788};
789
bc805888 790#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 791
792/* Given NAME, find the register number associated with that name, return
793 the integer value associated with the given name or -1 on failure. */
794
252b5132 795static int
98027b10 796reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 797{
798 int middle, low, high;
799 int cmp;
800
801 low = 0;
802 high = regcount - 1;
803
804 do
805 {
806 middle = (low + high) / 2;
807 cmp = strcasecmp (name, regs[middle].name);
808 if (cmp < 0)
809 high = middle - 1;
810 else if (cmp > 0)
811 low = middle + 1;
812 else
813 return regs[middle].value;
814 }
815 while (low <= high);
816
817 return -1;
818}
819
820/*
99a814a1 821 * Summary of register_name.
252b5132
RH		 822 *
823 * in: Input_line_pointer points to 1st char of operand.
824 *
825 * out: A expressionS.
826 * The operand may have been a register: in this case, X_op == O_register,
827 * X_add_number is set to the register number, and truth is returned.
828 * Input_line_pointer->(next non-blank) char after operand, or is in its
829 * original state.
830 */
831
b34976b6 832static bfd_boolean
98027b10 833register_name (expressionS *expressionP)
252b5132
RH		 834{
835 int reg_number;
836 char *name;
837 char *start;
838 char c;
839
99a814a1 840 /* Find the spelling of the operand. */
252b5132 841 start = name = input_line_pointer;
3882b010 842 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 843 name = ++input_line_pointer;
844
3882b010 845 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 846 return FALSE;
252b5132
RH		 847
848 c = get_symbol_end ();
849 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
850
468cced8
AM		 851 /* Put back the delimiting char. */
852 *input_line_pointer = c;
853
99a814a1 854 /* Look to see if it's in the register table. */
81d4177b 855 if (reg_number >= 0)
252b5132
RH		 856 {
857 expressionP->X_op = O_register;
858 expressionP->X_add_number = reg_number;
81d4177b 859
99a814a1 860 /* Make the rest nice. */
252b5132
RH		 861 expressionP->X_add_symbol = NULL;
862 expressionP->X_op_symbol = NULL;
b34976b6 863 return TRUE;
252b5132 864 }
468cced8
AM		 865
866 /* Reset the line as if we had not done anything. */
867 input_line_pointer = start;
b34976b6 868 return FALSE;
252b5132
RH		 869}
870\f
871/* This function is called for each symbol seen in an expression. It
872 handles the special parsing which PowerPC assemblers are supposed
873 to use for condition codes. */
874
875/* Whether to do the special parsing. */
b34976b6 876static bfd_boolean cr_operand;
252b5132
RH		 877
878/* Names to recognize in a condition code. This table is sorted. */
879static const struct pd_reg cr_names[] =
880{
881 { "cr0", 0 },
882 { "cr1", 1 },
883 { "cr2", 2 },
884 { "cr3", 3 },
885 { "cr4", 4 },
886 { "cr5", 5 },
887 { "cr6", 6 },
888 { "cr7", 7 },
889 { "eq", 2 },
890 { "gt", 1 },
891 { "lt", 0 },
892 { "so", 3 },
893 { "un", 3 }
894};
895
896/* Parsing function. This returns non-zero if it recognized an
897 expression. */
898
899int
91d6fa6a 900ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 901{
902 int val;
903
904 if (! cr_operand)
905 return 0;
906
13abbae3
AM		 907 if (*name == '%')
908 ++name;
252b5132
RH		 909 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
910 name);
911 if (val < 0)
912 return 0;
913
91d6fa6a
NC		 914 exp->X_op = O_constant;
915 exp->X_add_number = val;
252b5132
RH		 916
917 return 1;
918}
919\f
920/* Local variables. */
921
2b3c4602
AM		 922/* Whether to target xcoff64/elf64. */
923static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 924
252b5132
RH		 925/* Opcode hash table. */
926static struct hash_control *ppc_hash;
927
928/* Macro hash table. */
929static struct hash_control *ppc_macro_hash;
930
931#ifdef OBJ_ELF
99a814a1 932/* What type of shared library support to use. */
5d6f4f16 933static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 934
99a814a1 935/* Flags to set in the elf header. */
252b5132
RH		 936static flagword ppc_flags = 0;
937
938/* Whether this is Solaris or not. */
939#ifdef TARGET_SOLARIS_COMMENT
b34976b6 940#define SOLARIS_P TRUE
252b5132 941#else
b34976b6 942#define SOLARIS_P FALSE
252b5132
RH		 943#endif
944
b34976b6 945static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 946#endif
947
948#ifdef OBJ_XCOFF
949
950/* The RS/6000 assembler uses the .csect pseudo-op to generate code
951 using a bunch of different sections. These assembler sections,
952 however, are all encompassed within the .text or .data sections of
953 the final output file. We handle this by using different
954 subsegments within these main segments. */
955
956/* Next subsegment to allocate within the .text segment. */
957static subsegT ppc_text_subsegment = 2;
958
959/* Linked list of csects in the text section. */
960static symbolS *ppc_text_csects;
961
962/* Next subsegment to allocate within the .data segment. */
963static subsegT ppc_data_subsegment = 2;
964
965/* Linked list of csects in the data section. */
966static symbolS *ppc_data_csects;
967
968/* The current csect. */
969static symbolS *ppc_current_csect;
970
971/* The RS/6000 assembler uses a TOC which holds addresses of functions
972 and variables. Symbols are put in the TOC with the .tc pseudo-op.
973 A special relocation is used when accessing TOC entries. We handle
974 the TOC as a subsegment within the .data segment. We set it up if
975 we see a .toc pseudo-op, and save the csect symbol here. */
976static symbolS *ppc_toc_csect;
977
978/* The first frag in the TOC subsegment. */
979static fragS *ppc_toc_frag;
980
981/* The first frag in the first subsegment after the TOC in the .data
982 segment. NULL if there are no subsegments after the TOC. */
983static fragS *ppc_after_toc_frag;
984
985/* The current static block. */
986static symbolS *ppc_current_block;
987
988/* The COFF debugging section; set by md_begin. This is not the
989 .debug section, but is instead the secret BFD section which will
990 cause BFD to set the section number of a symbol to N_DEBUG. */
991static asection *ppc_coff_debug_section;
992
85645aed
TG		 993/* Structure to set the length field of the dwarf sections. */
994struct dw_subsection {
995 /* Subsections are simply linked. */
996 struct dw_subsection *link;
997
998 /* The subsection number. */
999 subsegT subseg;
1000
1001 /* Expression to compute the length of the section. */
1002 expressionS end_exp;
1003};
1004
1005static struct dw_section {
1006 /* Corresponding section. */
1007 segT sect;
1008
1009 /* Simply linked list of subsections with a label. */
1010 struct dw_subsection *list_subseg;
1011
1012 /* The anonymous subsection. */
1013 struct dw_subsection *anon_subseg;
1014} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1015#endif /* OBJ_XCOFF */
1016
1017#ifdef TE_PE
1018
1019/* Various sections that we need for PE coff support. */
1020static segT ydata_section;
1021static segT pdata_section;
1022static segT reldata_section;
1023static segT rdata_section;
1024static segT tocdata_section;
1025
81d4177b 1026/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1027static segT ppc_previous_section;
1028static segT ppc_current_section;
1029
1030#endif /* TE_PE */
1031
1032#ifdef OBJ_ELF
1033symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1034#define PPC_APUINFO_ISEL 0x40
1035#define PPC_APUINFO_PMR 0x41
1036#define PPC_APUINFO_RFMCI 0x42
1037#define PPC_APUINFO_CACHELCK 0x43
1038#define PPC_APUINFO_SPE 0x100
1039#define PPC_APUINFO_EFS 0x101
1040#define PPC_APUINFO_BRLOCK 0x102
1041
b34976b6
AM		 1042/*
1043 * We keep a list of APUinfo
6a0c61b7
EZ		 1044 */
1045unsigned long *ppc_apuinfo_list;
1046unsigned int ppc_apuinfo_num;
1047unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1048#endif /* OBJ_ELF */
1049\f
1050#ifdef OBJ_ELF
15c1449b 1051const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1052#else
15c1449b 1053const char *const md_shortopts = "um:";
252b5132 1054#endif
cef4f754 1055#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1056const struct option md_longopts[] = {
cef4f754 1057 {"nops", required_argument, NULL, OPTION_NOPS},
252b5132
RH		 1058 {NULL, no_argument, NULL, 0}
1059};
15c1449b 1060const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1061
1062int
98027b10 1063md_parse_option (int c, char *arg)
252b5132 1064{
69fe9ce5
AM		 1065 ppc_cpu_t new_cpu;
1066
252b5132
RH		 1067 switch (c)
1068 {
1069 case 'u':
1070 /* -u means that any undefined symbols should be treated as
1071 external, which is the default for gas anyhow. */
1072 break;
1073
1074#ifdef OBJ_ELF
1075 case 'l':
1076 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1077 sake, recognize -be also. */
252b5132
RH		 1078 if (strcmp (arg, "e") == 0)
1079 {
1080 target_big_endian = 0;
1081 set_target_endian = 1;
1082 }
1083 else
1084 return 0;
1085
1086 break;
1087
1088 case 'b':
1089 if (strcmp (arg, "e") == 0)
1090 {
1091 target_big_endian = 1;
1092 set_target_endian = 1;
1093 }
1094 else
1095 return 0;
1096
1097 break;
1098
1099 case 'K':
99a814a1 1100 /* Recognize -K PIC. */
252b5132
RH		 1101 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1102 {
1103 shlib = SHLIB_PIC;
1104 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1105 }
1106 else
1107 return 0;
1108
1109 break;
1110#endif
1111
7f6d05e8
CP		 1112 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1113 case 'a':
1114 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1115 {
1116#ifdef BFD64
1117 ppc_obj64 = 1;
1118#else
1119 as_fatal (_("%s unsupported"), "-a64");
1120#endif
1121 }
7f6d05e8 1122 else if (strcmp (arg, "32") == 0)
2b3c4602 1123 ppc_obj64 = 0;
7f6d05e8
CP		 1124 else
1125 return 0;
1126 break;
81d4177b 1127
252b5132 1128 case 'm':
69fe9ce5
AM		 1129 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1130 ppc_cpu = new_cpu;
252b5132
RH		 1131
1132 else if (strcmp (arg, "regnames") == 0)
b34976b6 1133 reg_names_p = TRUE;
252b5132
RH		 1134
1135 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1136 reg_names_p = FALSE;
252b5132
RH		 1137
1138#ifdef OBJ_ELF
99a814a1
AM		 1139 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1140 that require relocation. */
252b5132
RH		 1141 else if (strcmp (arg, "relocatable") == 0)
1142 {
5d6f4f16 1143 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1144 ppc_flags |= EF_PPC_RELOCATABLE;
1145 }
1146
1147 else if (strcmp (arg, "relocatable-lib") == 0)
1148 {
5d6f4f16 1149 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1150 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1151 }
1152
99a814a1 1153 /* -memb, set embedded bit. */
252b5132
RH		 1154 else if (strcmp (arg, "emb") == 0)
1155 ppc_flags |= EF_PPC_EMB;
1156
cc643b88 1157 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1158 else if (strcmp (arg, "little") == 0
1159 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1160 {
1161 target_big_endian = 0;
1162 set_target_endian = 1;
1163 }
1164
1165 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1166 {
1167 target_big_endian = 1;
1168 set_target_endian = 1;
1169 }
1170
1171 else if (strcmp (arg, "solaris") == 0)
1172 {
b34976b6 1173 msolaris = TRUE;
252b5132
RH		 1174 ppc_comment_chars = ppc_solaris_comment_chars;
1175 }
1176
1177 else if (strcmp (arg, "no-solaris") == 0)
1178 {
b34976b6 1179 msolaris = FALSE;
252b5132
RH		 1180 ppc_comment_chars = ppc_eabi_comment_chars;
1181 }
1182#endif
1183 else
1184 {
1185 as_bad (_("invalid switch -m%s"), arg);
1186 return 0;
1187 }
1188 break;
1189
1190#ifdef OBJ_ELF
1191 /* -V: SVR4 argument to print version ID. */
1192 case 'V':
1193 print_version_id ();
1194 break;
1195
1196 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1197 should be emitted or not. FIXME: Not implemented. */
1198 case 'Q':
1199 break;
1200
1201 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1202 rather than .stabs.excl, which is ignored by the linker.
1203 FIXME: Not implemented. */
1204 case 's':
1205 if (arg)
1206 return 0;
1207
1208 break;
1209#endif
1210
cef4f754
AM		 1211 case OPTION_NOPS:
1212 {
1213 char *end;
1214 nop_limit = strtoul (optarg, &end, 0);
1215 if (*end)
1216 as_bad (_("--nops needs a numeric argument"));
1217 }
1218 break;
85645aed 1219
252b5132
RH		 1220 default:
1221 return 0;
1222 }
1223
1224 return 1;
1225}
1226
1227void
98027b10 1228md_show_usage (FILE *stream)
252b5132 1229{
bc805888 1230 fprintf (stream, _("\
252b5132 1231PowerPC options:\n\
ce3d2015
AM		 1232-a32 generate ELF32/XCOFF32\n\
1233-a64 generate ELF64/XCOFF64\n\
1234-u ignored\n\
1235-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1236-mpwr generate code for POWER (RIOS1)\n\
1237-m601 generate code for PowerPC 601\n\
418c1742 1238-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1239 generate code for PowerPC 603/604\n\
1240-m403 generate code for PowerPC 403\n\
1241-m405 generate code for PowerPC 405\n\
1242-m440 generate code for PowerPC 440\n\
1243-m464 generate code for PowerPC 464\n\
1244-m476 generate code for PowerPC 476\n\
f5c120c5 1245-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1246 generate code for PowerPC 7400/7410/7450/7455\n\
1247-m750cl generate code for PowerPC 750cl\n"));
df12615d 1248 fprintf (stream, _("\
ce3d2015
AM		 1249-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1250-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1251-mbooke generate code for 32-bit PowerPC BookE\n\
1252-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1253-mpower4, -mpwr4 generate code for Power4 architecture\n\
1254-mpower5, -mpwr5, -mpwr5x\n\
1255 generate code for Power5 architecture\n\
1256-mpower6, -mpwr6 generate code for Power6 architecture\n\
1257-mpower7, -mpwr7 generate code for Power7 architecture\n\
ce3d2015
AM		 1258-mcell generate code for Cell Broadband Engine architecture\n\
1259-mcom generate code Power/PowerPC common instructions\n\
1260-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1261 fprintf (stream, _("\
ce3d2015
AM		 1262-maltivec generate code for AltiVec\n\
1263-mvsx generate code for Vector-Scalar (VSX) instructions\n\
1264-me300 generate code for PowerPC e300 family\n\
1265-me500, -me500x2 generate code for Motorola e500 core complex\n\
1266-me500mc, generate code for Freescale e500mc core complex\n\
1267-me500mc64, generate code for Freescale e500mc64 core complex\n\
1268-mspe generate code for Motorola SPE instructions\n\
1269-mtitan generate code for AppliedMicro Titan core complex\n\
1270-mregnames Allow symbolic names for registers\n\
1271-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1272#ifdef OBJ_ELF
bc805888 1273 fprintf (stream, _("\
ce3d2015
AM		 1274-mrelocatable support for GCC's -mrelocatble option\n\
1275-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1276-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1277-mlittle, -mlittle-endian, -le\n\
ce3d2015 1278 generate code for a little endian machine\n\
b8b738ac 1279-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1280 generate code for a big endian machine\n\
1281-msolaris generate code for Solaris\n\
1282-mno-solaris do not generate code for Solaris\n\
b8b738ac 1283-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1284-V print assembler version number\n\
1285-Qy, -Qn ignored\n"));
252b5132 1286#endif
cef4f754
AM		 1287 fprintf (stream, _("\
1288-nops=count when aligning, more than COUNT nops uses a branch\n"));
252b5132
RH		 1289}
1290\f
1291/* Set ppc_cpu if it is not already set. */
1292
1293static void
98027b10 1294ppc_set_cpu (void)
252b5132
RH		 1295{
1296 const char *default_os = TARGET_OS;
1297 const char *default_cpu = TARGET_CPU;
1298
7102e95e 1299 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1300 {
2a98c3a6 1301 if (ppc_obj64)
bdc70b4a 1302 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1303 else if (strncmp (default_os, "aix", 3) == 0
1304 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1305 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1306 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1307 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1308 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1309 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1310 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1311 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1312 else
99a814a1
AM		 1313 as_fatal (_("Unknown default cpu = %s, os = %s"),
1314 default_cpu, default_os);
252b5132
RH		 1315 }
1316}
1317
9232bbb0
AM		 1318/* Figure out the BFD architecture to use. This function and ppc_mach
1319 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1320
1321enum bfd_architecture
98027b10 1322ppc_arch (void)
252b5132
RH		 1323{
1324 const char *default_cpu = TARGET_CPU;
1325 ppc_set_cpu ();
1326
1327 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1328 return bfd_arch_powerpc;
1329 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1330 return bfd_arch_rs6000;
1331 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1332 {
1333 if (strcmp (default_cpu, "rs6000") == 0)
1334 return bfd_arch_rs6000;
0baf16f2 1335 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1336 return bfd_arch_powerpc;
1337 }
1338
1339 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1340 return bfd_arch_unknown;
1341}
1342
7f6d05e8 1343unsigned long
98027b10 1344ppc_mach (void)
7f6d05e8 1345{
2a98c3a6
AM		 1346 if (ppc_obj64)
1347 return bfd_mach_ppc64;
1348 else if (ppc_arch () == bfd_arch_rs6000)
1349 return bfd_mach_rs6k;
ce3d2015
AM		 1350 else if (ppc_cpu & PPC_OPCODE_TITAN)
1351 return bfd_mach_ppc_titan;
2a98c3a6
AM		 1352 else
1353 return bfd_mach_ppc;
7f6d05e8
CP		 1354}
1355
81d4177b 1356extern char*
98027b10 1357ppc_target_format (void)
7f6d05e8
CP		 1358{
1359#ifdef OBJ_COFF
1360#ifdef TE_PE
99a814a1 1361 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1362#elif TE_POWERMAC
0baf16f2 1363 return "xcoff-powermac";
7f6d05e8 1364#else
eb1e0e80 1365# ifdef TE_AIX5
2b3c4602 1366 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1367# else
2b3c4602 1368 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1369# endif
7f6d05e8 1370#endif
7f6d05e8
CP		 1371#endif
1372#ifdef OBJ_ELF
9d8504b1
PB		 1373# ifdef TE_VXWORKS
1374 return "elf32-powerpc-vxworks";
1375# else
0baf16f2 1376 return (target_big_endian
2b3c4602
AM		 1377 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1378 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1379# endif
7f6d05e8
CP		 1380#endif
1381}
1382
69c040df
AM		 1383/* Insert opcodes and macros into hash tables. Called at startup and
1384 for .cpu pseudo. */
252b5132 1385
69c040df
AM		 1386static void
1387ppc_setup_opcodes (void)
252b5132 1388{
98027b10 1389 const struct powerpc_opcode *op;
252b5132
RH		 1390 const struct powerpc_opcode *op_end;
1391 const struct powerpc_macro *macro;
1392 const struct powerpc_macro *macro_end;
b84bf58a 1393 bfd_boolean bad_insn = FALSE;
252b5132 1394
69c040df
AM		 1395 if (ppc_hash != NULL)
1396 hash_die (ppc_hash);
1397 if (ppc_macro_hash != NULL)
1398 hash_die (ppc_macro_hash);
252b5132
RH		 1399
1400 /* Insert the opcodes into a hash table. */
1401 ppc_hash = hash_new ();
1402
c43a438d 1403 if (ENABLE_CHECKING)
b84bf58a 1404 {
c43a438d 1405 unsigned int i;
b84bf58a 1406
c43a438d
AM		 1407 /* Check operand masks. Code here and in the disassembler assumes
1408 all the 1's in the mask are contiguous. */
1409 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1410 {
c43a438d
AM		 1411 unsigned long mask = powerpc_operands[i].bitm;
1412 unsigned long right_bit;
1413 unsigned int j;
1414
1415 right_bit = mask & -mask;
1416 mask += right_bit;
1417 right_bit = mask & -mask;
1418 if (mask != right_bit)
1419 {
1420 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1421 bad_insn = TRUE;
1422 }
1423 for (j = i + 1; j < num_powerpc_operands; ++j)
1424 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1425 sizeof (powerpc_operands[0])) == 0)
1426 {
1427 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1428 j, i);
1429 bad_insn = TRUE;
1430 }
b84bf58a
AM		 1431 }
1432 }
1433
252b5132
RH		 1434 op_end = powerpc_opcodes + powerpc_num_opcodes;
1435 for (op = powerpc_opcodes; op < op_end; op++)
1436 {
c43a438d 1437 if (ENABLE_CHECKING)
b84bf58a 1438 {
c43a438d
AM		 1439 const unsigned char *o;
1440 unsigned long omask = op->mask;
8dbcd839 1441
d815f1a9 1442 if (op != powerpc_opcodes)
8dbcd839 1443 {
d815f1a9
AM		 1444 /* The major opcodes had better be sorted. Code in the
1445 disassembler assumes the insns are sorted according to
1446 major opcode. */
1447 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1448 {
1449 as_bad (_("major opcode is not sorted for %s"),
1450 op->name);
1451 bad_insn = TRUE;
1452 }
1453
1454 /* Warn if the table isn't more strictly ordered.
1455 Unfortunately it doesn't seem possible to order the
1456 table on much more than the major opcode, which makes
1457 it difficult to implement a binary search in the
1458 disassembler. The problem is that we have multiple
1459 ways to disassemble instructions, and we usually want
1460 to choose a more specific form (with more bits set in
1461 the opcode) than a more general form. eg. all of the
1462 following are equivalent:
1463 bne label # opcode = 0x40820000, mask = 0xff830003
1464 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1465 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1466
1467 There are also cases where the table needs to be out
1468 of order to disassemble the correct instruction for
2f3bb96a 1469 processor variants. */
d815f1a9
AM		 1470 else if (0)
1471 {
1472 unsigned long t1 = op[0].opcode;
1473 unsigned long t2 = op[-1].opcode;
1474
1475 if (((t1 ^ t2) & 0xfc0007ff) == 0
1476 && (t1 & 0xfc0006df) == 0x7c000286)
1477 {
1478 /* spr field is split. */
1479 t1 = ((t1 & ~0x1ff800)
1480 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1481 t2 = ((t2 & ~0x1ff800)
1482 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1483 }
1484 if (t1 < t2)
1485 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1486 op[0].name, op[0].opcode, op[0].mask,
1487 op[-1].name, op[-1].opcode, op[-1].mask);
1488 }
8dbcd839 1489 }
c43a438d
AM		 1490
1491 /* The mask had better not trim off opcode bits. */
1492 if ((op->opcode & omask) != op->opcode)
1493 {
1494 as_bad (_("mask trims opcode bits for %s"),
1495 op->name);
1496 bad_insn = TRUE;
1497 }
1498
1499 /* The operands must not overlap the opcode or each other. */
1500 for (o = op->operands; *o; ++o)
1501 if (*o >= num_powerpc_operands)
1502 {
1503 as_bad (_("operand index error for %s"),
1504 op->name);
1505 bad_insn = TRUE;
1506 }
1507 else
b84bf58a 1508 {
c43a438d
AM		 1509 const struct powerpc_operand *operand = &powerpc_operands[*o];
1510 if (operand->shift >= 0)
b84bf58a 1511 {
c43a438d
AM		 1512 unsigned long mask = operand->bitm << operand->shift;
1513 if (omask & mask)
1514 {
1515 as_bad (_("operand %d overlap in %s"),
1516 (int) (o - op->operands), op->name);
1517 bad_insn = TRUE;
1518 }
1519 omask |= mask;
b84bf58a 1520 }
b84bf58a 1521 }
c43a438d 1522 }
252b5132 1523
bdc70b4a 1524 if ((ppc_cpu & op->flags) != 0
1cb0a767 1525 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1526 {
1527 const char *retval;
1528
98027b10 1529 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1530 if (retval != NULL)
252b5132 1531 {
b84bf58a 1532 as_bad (_("duplicate instruction %s"),
99a814a1 1533 op->name);
b84bf58a 1534 bad_insn = TRUE;
252b5132
RH		 1535 }
1536 }
1537 }
1538
3c9030c1
AM		 1539 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1540 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1541 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1542
252b5132
RH		 1543 /* Insert the macros into a hash table. */
1544 ppc_macro_hash = hash_new ();
1545
1546 macro_end = powerpc_macros + powerpc_num_macros;
1547 for (macro = powerpc_macros; macro < macro_end; macro++)
1548 {
33740db9 1549 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1550 {
1551 const char *retval;
1552
98027b10 1553 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1554 if (retval != (const char *) NULL)
1555 {
b84bf58a
AM		 1556 as_bad (_("duplicate macro %s"), macro->name);
1557 bad_insn = TRUE;
252b5132
RH		 1558 }
1559 }
1560 }
1561
b84bf58a 1562 if (bad_insn)
252b5132 1563 abort ();
69c040df
AM		 1564}
1565
1566/* This function is called when the assembler starts up. It is called
1567 after the options have been parsed and the output file has been
1568 opened. */
1569
1570void
98027b10 1571md_begin (void)
69c040df
AM		 1572{
1573 ppc_set_cpu ();
1574
1575 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1576
1577#ifdef OBJ_ELF
1578 /* Set the ELF flags if desired. */
1579 if (ppc_flags && !msolaris)
1580 bfd_set_private_flags (stdoutput, ppc_flags);
1581#endif
1582
1583 ppc_setup_opcodes ();
252b5132 1584
67c1ffbe 1585 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1586 by the user. */
252b5132
RH		 1587 if (!set_target_endian)
1588 {
1589 set_target_endian = 1;
1590 target_big_endian = PPC_BIG_ENDIAN;
1591 }
1592
1593#ifdef OBJ_XCOFF
1594 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1595
1596 /* Create dummy symbols to serve as initial csects. This forces the
1597 text csects to precede the data csects. These symbols will not
1598 be output. */
1599 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1600 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1601 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1602 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1603#endif
1604
1605#ifdef TE_PE
1606
1607 ppc_current_section = text_section;
81d4177b 1608 ppc_previous_section = 0;
252b5132
RH		 1609
1610#endif
1611}
1612
6a0c61b7 1613void
98027b10 1614ppc_cleanup (void)
6a0c61b7 1615{
dc1d03fc 1616#ifdef OBJ_ELF
6a0c61b7
EZ		 1617 if (ppc_apuinfo_list == NULL)
1618 return;
1619
1620 /* Ok, so write the section info out. We have this layout:
1621
1622 byte data what
1623 ---- ---- ----
1624 0 8 length of "APUinfo\0"
1625 4 (n*4) number of APU's (4 bytes each)
1626 8 2 note type 2
1627 12 "APUinfo\0" name
1628 20 APU#1 first APU's info
1629 24 APU#2 second APU's info
1630 ... ...
1631 */
1632 {
1633 char *p;
1634 asection *seg = now_seg;
1635 subsegT subseg = now_subseg;
1636 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1637 unsigned int i;
6a0c61b7
EZ		 1638
1639 /* Create the .PPC.EMB.apuinfo section. */
1640 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1641 bfd_set_section_flags (stdoutput,
1642 apuinfo_secp,
e1a9cb8e 1643 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1644
1645 p = frag_more (4);
1646 md_number_to_chars (p, (valueT) 8, 4);
1647
1648 p = frag_more (4);
e98d298c 1649 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1650
1651 p = frag_more (4);
1652 md_number_to_chars (p, (valueT) 2, 4);
1653
1654 p = frag_more (8);
1655 strcpy (p, "APUinfo");
1656
1657 for (i = 0; i < ppc_apuinfo_num; i++)
1658 {
b34976b6
AM		 1659 p = frag_more (4);
1660 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1661 }
1662
1663 frag_align (2, 0, 0);
1664
1665 /* We probably can't restore the current segment, for there likely
1666 isn't one yet... */
1667 if (seg && subseg)
1668 subseg_set (seg, subseg);
1669 }
dc1d03fc 1670#endif
6a0c61b7
EZ		 1671}
1672
252b5132
RH		 1673/* Insert an operand value into an instruction. */
1674
1675static unsigned long
a1867a27
AM		 1676ppc_insert_operand (unsigned long insn,
1677 const struct powerpc_operand *operand,
1678 offsetT val,
91d6fa6a 1679 ppc_cpu_t cpu,
a1867a27
AM		 1680 char *file,
1681 unsigned int line)
252b5132 1682{
b84bf58a 1683 long min, max, right;
eb42fac1 1684
b84bf58a
AM		 1685 max = operand->bitm;
1686 right = max & -max;
1687 min = 0;
1688
1689 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1690 {
b84bf58a 1691 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1692 max = (max >> 1) & -right;
1693 min = ~max & -right;
b84bf58a 1694 }
252b5132 1695
b84bf58a 1696 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1697 max++;
252b5132 1698
b84bf58a 1699 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1700 {
1701 long tmp = min;
1702 min = -max;
1703 max = -tmp;
1704 }
b84bf58a 1705
a1867a27
AM		 1706 if (min <= max)
1707 {
1708 /* Some people write constants with the sign extension done by
1709 hand but only up to 32 bits. This shouldn't really be valid,
1710 but, to permit this code to assemble on a 64-bit host, we
1711 sign extend the 32-bit value to 64 bits if so doing makes the
1712 value valid. */
1713 if (val > max
1714 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1715 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1716 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1717 val = val - 0x80000000 - 0x80000000;
1718
1719 /* Similarly, people write expressions like ~(1<<15), and expect
1720 this to be OK for a 32-bit unsigned value. */
1721 else if (val < min
1722 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1723 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1724 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1725 val = val + 0x80000000 + 0x80000000;
1726
1727 else if (val < min
1728 || val > max
1729 || (val & (right - 1)) != 0)
1730 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1731 }
b84bf58a 1732
252b5132
RH		 1733 if (operand->insert)
1734 {
1735 const char *errmsg;
1736
1737 errmsg = NULL;
91d6fa6a 1738 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1739 if (errmsg != (const char *) NULL)
ee2c9aa9 1740 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1741 }
1742 else
b84bf58a 1743 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1744
1745 return insn;
1746}
1747
1748\f
1749#ifdef OBJ_ELF
1750/* Parse @got, etc. and return the desired relocation. */
1751static bfd_reloc_code_real_type
98027b10 1752ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1753{
1754 struct map_bfd {
1755 char *string;
b7d7dc63
AM		 1756 unsigned int length : 8;
1757 unsigned int valid32 : 1;
1758 unsigned int valid64 : 1;
1759 unsigned int reloc;
252b5132
RH		 1760 };
1761
1762 char ident[20];
1763 char *str = *str_p;
1764 char *str2;
1765 int ch;
1766 int len;
15c1449b 1767 const struct map_bfd *ptr;
252b5132 1768
b7d7dc63
AM		 1769#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1770#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1771#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1772
15c1449b 1773 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1774 MAP ("l", BFD_RELOC_LO16),
1775 MAP ("h", BFD_RELOC_HI16),
1776 MAP ("ha", BFD_RELOC_HI16_S),
1777 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1778 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1779 MAP ("got", BFD_RELOC_16_GOTOFF),
1780 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1781 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1782 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1783 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1784 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1785 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1786 MAP ("copy", BFD_RELOC_PPC_COPY),
1787 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1788 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1789 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1790 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1791 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1792 MAP ("tls", BFD_RELOC_PPC_TLS),
1793 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1794 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1795 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1796 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1797 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1798 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1799 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1800 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1801 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1802 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1803 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1804 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1805 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1806 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1807 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1808 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1809 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1810 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1811 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1812 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1813 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1814 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1815 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1816 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1817 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1818 MAP32 ("fixup", BFD_RELOC_CTOR),
1819 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1820 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1821 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1822 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1823 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1824 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1825 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1826 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1827 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1828 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1829 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1830 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1831 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1832 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1833 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1834 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1835 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1836 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1837 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1838 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1839 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1840 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1841 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1842 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1843 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1844 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1845 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1846 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1847 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1848 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1849 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1850 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1851 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1852 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1853 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1854 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1855 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1856 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1857 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1858 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1859 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1860 };
1861
1862 if (*str++ != '@')
1863 return BFD_RELOC_UNUSED;
1864
1865 for (ch = *str, str2 = ident;
1866 (str2 < ident + sizeof (ident) - 1
3882b010 1867 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1868 ch = *++str)
1869 {
3882b010 1870 *str2++ = TOLOWER (ch);
252b5132
RH		 1871 }
1872
1873 *str2 = '\0';
1874 len = str2 - ident;
1875
1876 ch = ident[0];
1877 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1878 if (ch == ptr->string[0]
1879 && len == ptr->length
b7d7dc63
AM		 1880 && memcmp (ident, ptr->string, ptr->length) == 0
1881 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1882 {
15c1449b
AM		 1883 int reloc = ptr->reloc;
1884
727fc41e
AM		 1885 if (!ppc_obj64 && exp_p->X_add_number != 0)
1886 {
1887 switch (reloc)
1888 {
1889 case BFD_RELOC_16_GOTOFF:
1890 case BFD_RELOC_LO16_GOTOFF:
1891 case BFD_RELOC_HI16_GOTOFF:
1892 case BFD_RELOC_HI16_S_GOTOFF:
1893 as_warn (_("identifier+constant@got means "
1894 "identifier@got+constant"));
1895 break;
1896
1897 case BFD_RELOC_PPC_GOT_TLSGD16:
1898 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1899 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1900 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1901 case BFD_RELOC_PPC_GOT_TLSLD16:
1902 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1903 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1904 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1905 case BFD_RELOC_PPC_GOT_DTPREL16:
1906 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1907 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1908 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1909 case BFD_RELOC_PPC_GOT_TPREL16:
1910 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1911 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1912 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1913 as_bad (_("symbol+offset not supported for got tls"));
1914 break;
1915 }
1916 }
5f6db75a
AM		 1917
1918 /* Now check for identifier@suffix+constant. */
1919 if (*str == '-' || *str == '+')
252b5132 1920 {
5f6db75a
AM		 1921 char *orig_line = input_line_pointer;
1922 expressionS new_exp;
1923
1924 input_line_pointer = str;
1925 expression (&new_exp);
1926 if (new_exp.X_op == O_constant)
252b5132 1927 {
5f6db75a
AM		 1928 exp_p->X_add_number += new_exp.X_add_number;
1929 str = input_line_pointer;
252b5132 1930 }
5f6db75a
AM		 1931
1932 if (&input_line_pointer != str_p)
1933 input_line_pointer = orig_line;
252b5132 1934 }
252b5132 1935 *str_p = str;
0baf16f2 1936
2b3c4602 1937 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1938 && exp_p->X_op == O_symbol
1939 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1940 {
9f2b53d7
AM		 1941 /* Change the symbol so that the dummy .TOC. symbol can be
1942 omitted from the object file. */
0baf16f2
AM		 1943 exp_p->X_add_symbol = &abs_symbol;
1944 }
1945
15c1449b 1946 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1947 }
1948
1949 return BFD_RELOC_UNUSED;
1950}
1951
99a814a1
AM		 1952/* Like normal .long/.short/.word, except support @got, etc.
1953 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1954static void
98027b10 1955ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1956{
1957 expressionS exp;
1958 bfd_reloc_code_real_type reloc;
1959
1960 if (is_it_end_of_statement ())
1961 {
1962 demand_empty_rest_of_line ();
1963 return;
1964 }
1965
1966 do
1967 {
1968 expression (&exp);
1969 if (exp.X_op == O_symbol
1970 && *input_line_pointer == '@'
99a814a1
AM		 1971 && (reloc = ppc_elf_suffix (&input_line_pointer,
1972 &exp)) != BFD_RELOC_UNUSED)
252b5132 1973 {
99a814a1
AM		 1974 reloc_howto_type *reloc_howto;
1975 int size;
1976
1977 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1978 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1979
1980 if (size > nbytes)
0baf16f2
AM		 1981 {
1982 as_bad (_("%s relocations do not fit in %d bytes\n"),
1983 reloc_howto->name, nbytes);
1984 }
252b5132
RH		 1985 else
1986 {
0baf16f2
AM		 1987 char *p;
1988 int offset;
252b5132 1989
0baf16f2 1990 p = frag_more (nbytes);
aa0c8c1a 1991 memset (p, 0, nbytes);
0baf16f2
AM		 1992 offset = 0;
1993 if (target_big_endian)
1994 offset = nbytes - size;
99a814a1
AM		 1995 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1996 &exp, 0, reloc);
252b5132
RH		 1997 }
1998 }
1999 else
2000 emit_expr (&exp, (unsigned int) nbytes);
2001 }
2002 while (*input_line_pointer++ == ',');
2003
99a814a1
AM		 2004 /* Put terminator back into stream. */
2005 input_line_pointer--;
252b5132
RH		 2006 demand_empty_rest_of_line ();
2007}
2008
2009/* Solaris pseduo op to change to the .rodata section. */
2010static void
98027b10 2011ppc_elf_rdata (int xxx)
252b5132
RH		 2012{
2013 char *save_line = input_line_pointer;
2014 static char section[] = ".rodata\n";
2015
99a814a1 2016 /* Just pretend this is .section .rodata */
252b5132
RH		 2017 input_line_pointer = section;
2018 obj_elf_section (xxx);
2019
2020 input_line_pointer = save_line;
2021}
2022
99a814a1 2023/* Pseudo op to make file scope bss items. */
252b5132 2024static void
98027b10 2025ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2026{
98027b10
AM		 2027 char *name;
2028 char c;
2029 char *p;
252b5132 2030 offsetT size;
98027b10 2031 symbolS *symbolP;
252b5132
RH		 2032 offsetT align;
2033 segT old_sec;
2034 int old_subsec;
2035 char *pfrag;
2036 int align2;
2037
2038 name = input_line_pointer;
2039 c = get_symbol_end ();
2040
99a814a1 2041 /* just after name is now '\0'. */
252b5132
RH		 2042 p = input_line_pointer;
2043 *p = c;
2044 SKIP_WHITESPACE ();
2045 if (*input_line_pointer != ',')
2046 {
2047 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
2048 ignore_rest_of_line ();
2049 return;
2050 }
2051
2052 input_line_pointer++; /* skip ',' */
2053 if ((size = get_absolute_expression ()) < 0)
2054 {
2055 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2056 ignore_rest_of_line ();
2057 return;
2058 }
2059
2060 /* The third argument to .lcomm is the alignment. */
2061 if (*input_line_pointer != ',')
2062 align = 8;
2063 else
2064 {
2065 ++input_line_pointer;
2066 align = get_absolute_expression ();
2067 if (align <= 0)
2068 {
2069 as_warn (_("ignoring bad alignment"));
2070 align = 8;
2071 }
2072 }
2073
2074 *p = 0;
2075 symbolP = symbol_find_or_make (name);
2076 *p = c;
2077
2078 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2079 {
2080 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2081 S_GET_NAME (symbolP));
2082 ignore_rest_of_line ();
2083 return;
2084 }
2085
2086 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2087 {
2088 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2089 S_GET_NAME (symbolP),
2090 (long) S_GET_VALUE (symbolP),
2091 (long) size);
2092
2093 ignore_rest_of_line ();
2094 return;
2095 }
2096
99a814a1 2097 /* Allocate_bss. */
252b5132
RH		 2098 old_sec = now_seg;
2099 old_subsec = now_subseg;
2100 if (align)
2101 {
99a814a1 2102 /* Convert to a power of 2 alignment. */
252b5132
RH		 2103 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2104 if (align != 1)
2105 {
2106 as_bad (_("Common alignment not a power of 2"));
2107 ignore_rest_of_line ();
2108 return;
2109 }
2110 }
2111 else
2112 align2 = 0;
2113
2114 record_alignment (bss_section, align2);
2115 subseg_set (bss_section, 0);
2116 if (align2)
2117 frag_align (align2, 0, 0);
2118 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2119 symbol_get_frag (symbolP)->fr_symbol = 0;
2120 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2121 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2122 (char *) 0);
2123 *pfrag = 0;
2124 S_SET_SIZE (symbolP, size);
2125 S_SET_SEGMENT (symbolP, bss_section);
2126 subseg_set (old_sec, old_subsec);
2127 demand_empty_rest_of_line ();
2128}
2129
2130/* Validate any relocations emitted for -mrelocatable, possibly adding
2131 fixups for word relocations in writable segments, so we can adjust
2132 them at runtime. */
2133static void
98027b10 2134ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2135{
2136 if (fixp->fx_done || fixp->fx_pcrel)
2137 return;
2138
2139 switch (shlib)
2140 {
2141 case SHLIB_NONE:
2142 case SHLIB_PIC:
2143 return;
2144
5d6f4f16 2145 case SHLIB_MRELOCATABLE:
252b5132
RH		 2146 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2147 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2148 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2149 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2150 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2151 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2152 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2153 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2154 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2155 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2156 && strcmp (segment_name (seg), ".got2") != 0
2157 && strcmp (segment_name (seg), ".dtors") != 0
2158 && strcmp (segment_name (seg), ".ctors") != 0
2159 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2160 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2161 && strcmp (segment_name (seg), ".eh_frame") != 0
2162 && strcmp (segment_name (seg), ".ex_shared") != 0)
2163 {
2164 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2165 || fixp->fx_r_type != BFD_RELOC_CTOR)
2166 {
2167 as_bad_where (fixp->fx_file, fixp->fx_line,
2168 _("Relocation cannot be done when using -mrelocatable"));
2169 }
2170 }
2171 return;
2172 }
2173}
0baf16f2 2174
7e8d4ab4
AM		 2175/* Prevent elf_frob_file_before_adjust removing a weak undefined
2176 function descriptor sym if the corresponding code sym is used. */
2177
2178void
98027b10 2179ppc_frob_file_before_adjust (void)
0baf16f2 2180{
7e8d4ab4 2181 symbolS *symp;
9232bbb0 2182 asection *toc;
0baf16f2 2183
7e8d4ab4
AM		 2184 if (!ppc_obj64)
2185 return;
2186
2187 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2188 {
7e8d4ab4
AM		 2189 const char *name;
2190 char *dotname;
2191 symbolS *dotsym;
2192 size_t len;
2193
2194 name = S_GET_NAME (symp);
2195 if (name[0] == '.')
2196 continue;
2197
2198 if (! S_IS_WEAK (symp)
2199 || S_IS_DEFINED (symp))
2200 continue;
2201
2202 len = strlen (name) + 1;
2203 dotname = xmalloc (len + 1);
2204 dotname[0] = '.';
2205 memcpy (dotname + 1, name, len);
461b725f 2206 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2207 free (dotname);
2208 if (dotsym != NULL && (symbol_used_p (dotsym)
2209 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2210 symbol_mark_used (symp);
2211
0baf16f2
AM		 2212 }
2213
9232bbb0
AM		 2214 toc = bfd_get_section_by_name (stdoutput, ".toc");
2215 if (toc != NULL
01efc3af 2216 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2217 && bfd_section_size (stdoutput, toc) > 0x10000)
2218 as_warn (_("TOC section size exceeds 64k"));
2219
7e8d4ab4
AM		 2220 /* Don't emit .TOC. symbol. */
2221 symp = symbol_find (".TOC.");
2222 if (symp != NULL)
2223 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2224}
252b5132
RH		 2225#endif /* OBJ_ELF */
2226\f
2227#ifdef TE_PE
2228
2229/*
99a814a1 2230 * Summary of parse_toc_entry.
252b5132
RH		 2231 *
2232 * in: Input_line_pointer points to the '[' in one of:
2233 *
2234 * [toc] [tocv] [toc32] [toc64]
2235 *
2236 * Anything else is an error of one kind or another.
2237 *
81d4177b 2238 * out:
252b5132
RH		 2239 * return value: success or failure
2240 * toc_kind: kind of toc reference
2241 * input_line_pointer:
2242 * success: first char after the ']'
2243 * failure: unchanged
2244 *
2245 * settings:
2246 *
2247 * [toc] - rv == success, toc_kind = default_toc
2248 * [tocv] - rv == success, toc_kind = data_in_toc
2249 * [toc32] - rv == success, toc_kind = must_be_32
2250 * [toc64] - rv == success, toc_kind = must_be_64
2251 *
2252 */
2253
81d4177b
KH		 2254enum toc_size_qualifier
2255{
252b5132
RH		 2256 default_toc, /* The toc cell constructed should be the system default size */
2257 data_in_toc, /* This is a direct reference to a toc cell */
2258 must_be_32, /* The toc cell constructed must be 32 bits wide */
2259 must_be_64 /* The toc cell constructed must be 64 bits wide */
2260};
2261
2262static int
98027b10 2263parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2264{
2265 char *start;
2266 char *toc_spec;
2267 char c;
2268 enum toc_size_qualifier t;
2269
99a814a1 2270 /* Save the input_line_pointer. */
252b5132
RH		 2271 start = input_line_pointer;
2272
99a814a1 2273 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2274 ++input_line_pointer;
2275 SKIP_WHITESPACE ();
81d4177b 2276
99a814a1 2277 /* Find the spelling of the operand. */
252b5132
RH		 2278 toc_spec = input_line_pointer;
2279 c = get_symbol_end ();
2280
99a814a1 2281 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2282 {
2283 t = default_toc;
2284 }
99a814a1 2285 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2286 {
2287 t = data_in_toc;
2288 }
99a814a1 2289 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2290 {
2291 t = must_be_32;
2292 }
99a814a1 2293 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2294 {
2295 t = must_be_64;
2296 }
2297 else
2298 {
2299 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2300 *input_line_pointer = c;
2301 input_line_pointer = start;
252b5132
RH		 2302 return 0;
2303 }
2304
99a814a1
AM		 2305 /* Now find the ']'. */
2306 *input_line_pointer = c;
252b5132 2307
81d4177b
KH		 2308 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2309 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2310
2311 if (c != ']')
2312 {
2313 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2314 input_line_pointer = start;
252b5132
RH		 2315 return 0;
2316 }
2317
99a814a1 2318 *toc_kind = t;
252b5132
RH		 2319 return 1;
2320}
2321#endif
2322\f
2323
dc1d03fc 2324#ifdef OBJ_ELF
6a0c61b7
EZ		 2325#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2326static void
98027b10 2327ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2328{
2329 unsigned int i;
2330
2331 /* Check we don't already exist. */
2332 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2333 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2334 return;
b34976b6 2335
6a0c61b7
EZ		 2336 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2337 {
2338 if (ppc_apuinfo_num_alloc == 0)
2339 {
2340 ppc_apuinfo_num_alloc = 4;
2341 ppc_apuinfo_list = (unsigned long *)
2342 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2343 }
2344 else
2345 {
2346 ppc_apuinfo_num_alloc += 4;
2347 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2348 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2349 }
2350 }
dc1d03fc 2351 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2352}
2353#undef APUID
dc1d03fc 2354#endif
6a0c61b7
EZ		 2355\f
2356
252b5132
RH		 2357/* We need to keep a list of fixups. We can't simply generate them as
2358 we go, because that would require us to first create the frag, and
2359 that would screw up references to ``.''. */
2360
2361struct ppc_fixup
2362{
2363 expressionS exp;
2364 int opindex;
2365 bfd_reloc_code_real_type reloc;
2366};
2367
2368#define MAX_INSN_FIXUPS (5)
2369
2370/* This routine is called for each instruction to be assembled. */
2371
2372void
98027b10 2373md_assemble (char *str)
252b5132
RH		 2374{
2375 char *s;
2376 const struct powerpc_opcode *opcode;
2377 unsigned long insn;
2378 const unsigned char *opindex_ptr;
2379 int skip_optional;
2380 int need_paren;
2381 int next_opindex;
2382 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2383 int fc;
2384 char *f;
09b935ac 2385 int addr_mod;
252b5132
RH		 2386 int i;
2387#ifdef OBJ_ELF
2388 bfd_reloc_code_real_type reloc;
2389#endif
2390
2391 /* Get the opcode. */
3882b010 2392 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2393 ;
2394 if (*s != '\0')
2395 *s++ = '\0';
2396
2397 /* Look up the opcode in the hash table. */
2398 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2399 if (opcode == (const struct powerpc_opcode *) NULL)
2400 {
2401 const struct powerpc_macro *macro;
2402
2403 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2404 if (macro == (const struct powerpc_macro *) NULL)
2405 as_bad (_("Unrecognized opcode: `%s'"), str);
2406 else
2407 ppc_macro (s, macro);
2408
2409 return;
2410 }
2411
2412 insn = opcode->opcode;
2413
2414 str = s;
3882b010 2415 while (ISSPACE (*str))
252b5132
RH		 2416 ++str;
2417
2418 /* PowerPC operands are just expressions. The only real issue is
2419 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2420 an optional operand separate the operands only with commas (in some
2421 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2422 have optional operands). Most instructions with optional operands
2423 have only one. Those that have more than one optional operand can
2424 take either all their operands or none. So, before we start seriously
2425 parsing the operands, we check to see if we have optional operands,
2426 and if we do, we count the number of commas to see which operands
2427 have been omitted. */
252b5132
RH		 2428 skip_optional = 0;
2429 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2430 {
2431 const struct powerpc_operand *operand;
2432
2433 operand = &powerpc_operands[*opindex_ptr];
2434 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2435 {
2436 unsigned int opcount;
7fe9cf6b 2437 unsigned int num_operands_expected;
252b5132
RH		 2438
2439 /* There is an optional operand. Count the number of
2440 commas in the input line. */
2441 if (*str == '\0')
2442 opcount = 0;
2443 else
2444 {
2445 opcount = 1;
2446 s = str;
2447 while ((s = strchr (s, ',')) != (char *) NULL)
2448 {
2449 ++opcount;
2450 ++s;
2451 }
2452 }
2453
7fe9cf6b
NC		 2454 /* Compute the number of expected operands.
2455 Do not count fake operands. */
2456 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2457 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2458 ++ num_operands_expected;
2459
252b5132
RH		 2460 /* If there are fewer operands in the line then are called
2461 for by the instruction, we want to skip the optional
1f6c9eb0 2462 operands. */
7fe9cf6b 2463 if (opcount < num_operands_expected)
252b5132
RH		 2464 skip_optional = 1;
2465
2466 break;
2467 }
2468 }
2469
2470 /* Gather the operands. */
2471 need_paren = 0;
2472 next_opindex = 0;
2473 fc = 0;
2474 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2475 {
2476 const struct powerpc_operand *operand;
2477 const char *errmsg;
2478 char *hold;
2479 expressionS ex;
2480 char endc;
2481
2482 if (next_opindex == 0)
2483 operand = &powerpc_operands[*opindex_ptr];
2484 else
2485 {
2486 operand = &powerpc_operands[next_opindex];
2487 next_opindex = 0;
2488 }
252b5132
RH		 2489 errmsg = NULL;
2490
2491 /* If this is a fake operand, then we do not expect anything
2492 from the input. */
2493 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2494 {
2b3c4602 2495 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2496 if (errmsg != (const char *) NULL)
ee2c9aa9 2497 as_bad ("%s", errmsg);
252b5132
RH		 2498 continue;
2499 }
2500
2501 /* If this is an optional operand, and we are skipping it, just
2502 insert a zero. */
2503 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2504 && skip_optional)
2505 {
2506 if (operand->insert)
2507 {
2b3c4602 2508 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2509 if (errmsg != (const char *) NULL)
ee2c9aa9 2510 as_bad ("%s", errmsg);
252b5132
RH		 2511 }
2512 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2513 next_opindex = *opindex_ptr + 1;
2514 continue;
2515 }
2516
2517 /* Gather the operand. */
2518 hold = input_line_pointer;
2519 input_line_pointer = str;
2520
2521#ifdef TE_PE
81d4177b 2522 if (*input_line_pointer == '[')
252b5132
RH		 2523 {
2524 /* We are expecting something like the second argument here:
99a814a1
AM		 2525 *
2526 * lwz r4,[toc].GS.0.static_int(rtoc)
2527 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2528 * The argument following the `]' must be a symbol name, and the
2529 * register must be the toc register: 'rtoc' or '2'
2530 *
2531 * The effect is to 0 as the displacement field
2532 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2533 * the appropriate variation) reloc against it based on the symbol.
2534 * The linker will build the toc, and insert the resolved toc offset.
2535 *
2536 * Note:
2537 * o The size of the toc entry is currently assumed to be
2538 * 32 bits. This should not be assumed to be a hard coded
2539 * number.
2540 * o In an effort to cope with a change from 32 to 64 bits,
2541 * there are also toc entries that are specified to be
2542 * either 32 or 64 bits:
2543 * lwz r4,[toc32].GS.0.static_int(rtoc)
2544 * lwz r4,[toc64].GS.0.static_int(rtoc)
2545 * These demand toc entries of the specified size, and the
2546 * instruction probably requires it.
2547 */
252b5132
RH		 2548
2549 int valid_toc;
2550 enum toc_size_qualifier toc_kind;
2551 bfd_reloc_code_real_type toc_reloc;
2552
99a814a1
AM		 2553 /* Go parse off the [tocXX] part. */
2554 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2555
81d4177b 2556 if (!valid_toc)
252b5132 2557 {
99a814a1
AM		 2558 /* Note: message has already been issued.
2559 FIXME: what sort of recovery should we do?
2560 demand_rest_of_line (); return; ? */
252b5132
RH		 2561 }
2562
99a814a1
AM		 2563 /* Now get the symbol following the ']'. */
2564 expression (&ex);
252b5132
RH		 2565
2566 switch (toc_kind)
2567 {
2568 case default_toc:
99a814a1
AM		 2569 /* In this case, we may not have seen the symbol yet,
2570 since it is allowed to appear on a .extern or .globl
2571 or just be a label in the .data section. */
252b5132
RH		 2572 toc_reloc = BFD_RELOC_PPC_TOC16;
2573 break;
2574 case data_in_toc:
99a814a1
AM		 2575 /* 1. The symbol must be defined and either in the toc
2576 section, or a global.
2577 2. The reloc generated must have the TOCDEFN flag set
2578 in upper bit mess of the reloc type.
2579 FIXME: It's a little confusing what the tocv
2580 qualifier can be used for. At the very least, I've
2581 seen three uses, only one of which I'm sure I can
2582 explain. */
81d4177b
KH		 2583 if (ex.X_op == O_symbol)
2584 {
9c2799c2 2585 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2586 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2587 != tocdata_section)
252b5132 2588 {
99a814a1 2589 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2590 }
2591 }
2592
2593 toc_reloc = BFD_RELOC_PPC_TOC16;
2594 break;
2595 case must_be_32:
99a814a1
AM		 2596 /* FIXME: these next two specifically specify 32/64 bit
2597 toc entries. We don't support them today. Is this
2598 the right way to say that? */
252b5132
RH		 2599 toc_reloc = BFD_RELOC_UNUSED;
2600 as_bad (_("Unimplemented toc32 expression modifier"));
2601 break;
2602 case must_be_64:
99a814a1 2603 /* FIXME: see above. */
252b5132
RH		 2604 toc_reloc = BFD_RELOC_UNUSED;
2605 as_bad (_("Unimplemented toc64 expression modifier"));
2606 break;
2607 default:
bc805888 2608 fprintf (stderr,
99a814a1
AM		 2609 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2610 toc_kind);
bc805888 2611 abort ();
252b5132
RH		 2612 break;
2613 }
2614
2615 /* We need to generate a fixup for this expression. */
2616 if (fc >= MAX_INSN_FIXUPS)
2617 as_fatal (_("too many fixups"));
2618
2619 fixups[fc].reloc = toc_reloc;
2620 fixups[fc].exp = ex;
2621 fixups[fc].opindex = *opindex_ptr;
2622 ++fc;
2623
99a814a1
AM		 2624 /* Ok. We've set up the fixup for the instruction. Now make it
2625 look like the constant 0 was found here. */
252b5132
RH		 2626 ex.X_unsigned = 1;
2627 ex.X_op = O_constant;
2628 ex.X_add_number = 0;
2629 ex.X_add_symbol = NULL;
2630 ex.X_op_symbol = NULL;
2631 }
2632
2633 else
2634#endif /* TE_PE */
2635 {
2ad068be
AM		 2636 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2637 || !register_name (&ex))
252b5132 2638 {
13abbae3
AM		 2639 char save_lex = lex_type['%'];
2640
252b5132 2641 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2642 {
2643 cr_operand = TRUE;
2644 lex_type['%'] |= LEX_BEGIN_NAME;
2645 }
252b5132 2646 expression (&ex);
b34976b6 2647 cr_operand = FALSE;
13abbae3 2648 lex_type['%'] = save_lex;
252b5132
RH		 2649 }
2650 }
2651
2652 str = input_line_pointer;
2653 input_line_pointer = hold;
2654
2655 if (ex.X_op == O_illegal)
2656 as_bad (_("illegal operand"));
2657 else if (ex.X_op == O_absent)
2658 as_bad (_("missing operand"));
2659 else if (ex.X_op == O_register)
2660 {
2661 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2662 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2663 }
2664 else if (ex.X_op == O_constant)
2665 {
2666#ifdef OBJ_ELF
81d4177b 2667 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2668 char *orig_str = str;
2669
2670 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2671 switch (reloc)
2672 {
2673 default:
2674 str = orig_str;
2675 break;
2676
2677 case BFD_RELOC_LO16:
2678 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2679 something which cleared it, we always produce a
2680 signed value. */
2681 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2682 ex.X_add_number &= 0xffff;
2683 else
0baf16f2 2684 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2685 break;
2686
2687 case BFD_RELOC_HI16:
0baf16f2
AM		 2688 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2689 ex.X_add_number = PPC_HI (ex.X_add_number);
2690 else
2691 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2692 break;
2693
2694 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2695 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2696 ex.X_add_number = PPC_HA (ex.X_add_number);
2697 else
2698 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2699 break;
2700
0baf16f2
AM		 2701 case BFD_RELOC_PPC64_HIGHER:
2702 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2703 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2704 else
2705 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2706 break;
2707
2708 case BFD_RELOC_PPC64_HIGHER_S:
2709 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2710 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2711 else
2712 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2713 break;
0baf16f2
AM		 2714
2715 case BFD_RELOC_PPC64_HIGHEST:
2716 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2717 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2718 else
2719 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2720 break;
2721
2722 case BFD_RELOC_PPC64_HIGHEST_S:
2723 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2724 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2725 else
2726 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2727 break;
252b5132 2728 }
0baf16f2 2729#endif /* OBJ_ELF */
252b5132 2730 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2731 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2732 }
2733#ifdef OBJ_ELF
727fc41e 2734 else
252b5132 2735 {
727fc41e 2736 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2737 {
727fc41e
AM		 2738 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2739 if (sym_name[0] == '.')
2740 ++sym_name;
cdba85ec 2741
727fc41e 2742 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2743 {
727fc41e
AM		 2744 expressionS tls_exp;
2745
2746 hold = input_line_pointer;
2747 input_line_pointer = str + 1;
2748 expression (&tls_exp);
2749 if (tls_exp.X_op == O_symbol)
2750 {
2751 reloc = BFD_RELOC_UNUSED;
2752 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2753 {
2754 reloc = BFD_RELOC_PPC_TLSGD;
2755 input_line_pointer += 7;
2756 }
2757 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2758 {
2759 reloc = BFD_RELOC_PPC_TLSLD;
2760 input_line_pointer += 7;
2761 }
2762 if (reloc != BFD_RELOC_UNUSED)
2763 {
2764 SKIP_WHITESPACE ();
2765 str = input_line_pointer;
2766
2767 if (fc >= MAX_INSN_FIXUPS)
2768 as_fatal (_("too many fixups"));
2769 fixups[fc].exp = tls_exp;
2770 fixups[fc].opindex = *opindex_ptr;
2771 fixups[fc].reloc = reloc;
2772 ++fc;
2773 }
2774 }
2775 input_line_pointer = hold;
252b5132
RH		 2776 }
2777 }
2778
727fc41e 2779 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2780 {
727fc41e 2781 /* Some TLS tweaks. */
0baf16f2
AM		 2782 switch (reloc)
2783 {
727fc41e 2784 default:
cdba85ec 2785 break;
727fc41e
AM		 2786
2787 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2788 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2789 as_bad (_("@tls may not be used with \"%s\" operands"),
2790 opcode->name);
2791 else if (operand->shift != 11)
2792 as_bad (_("@tls may only be used in last operand"));
2793 else
2794 insn = ppc_insert_operand (insn, operand,
2795 ppc_obj64 ? 13 : 2,
2796 ppc_cpu, (char *) NULL, 0);
cdba85ec 2797 break;
727fc41e
AM		 2798
2799 /* We'll only use the 32 (or 64) bit form of these relocations
2800 in constants. Instructions get the 16 bit form. */
2801 case BFD_RELOC_PPC_DTPREL:
2802 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2803 break;
727fc41e
AM		 2804 case BFD_RELOC_PPC_TPREL:
2805 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2806 break;
2807 }
727fc41e
AM		 2808
2809 /* For the absolute forms of branches, convert the PC
2810 relative form back into the absolute. */
2811 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2812 {
2813 switch (reloc)
2814 {
2815 case BFD_RELOC_PPC_B26:
2816 reloc = BFD_RELOC_PPC_BA26;
2817 break;
2818 case BFD_RELOC_PPC_B16:
2819 reloc = BFD_RELOC_PPC_BA16;
2820 break;
2821 case BFD_RELOC_PPC_B16_BRTAKEN:
2822 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2823 break;
2824 case BFD_RELOC_PPC_B16_BRNTAKEN:
2825 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2826 break;
2827 default:
2828 break;
2829 }
2830 }
2831
01efc3af
AM		 2832 switch (reloc)
2833 {
2834 case BFD_RELOC_PPC_TOC16:
2835 toc_reloc_types |= has_small_toc_reloc;
2836 break;
2837 case BFD_RELOC_PPC64_TOC16_LO:
2838 case BFD_RELOC_PPC64_TOC16_HI:
2839 case BFD_RELOC_PPC64_TOC16_HA:
2840 toc_reloc_types |= has_large_toc_reloc;
2841 break;
2842 default:
2843 break;
2844 }
2845
727fc41e
AM		 2846 if (ppc_obj64
2847 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2848 {
2849 switch (reloc)
2850 {
2851 case BFD_RELOC_16:
2852 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2853 break;
2854 case BFD_RELOC_LO16:
2855 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2856 break;
2857 case BFD_RELOC_16_GOTOFF:
2858 reloc = BFD_RELOC_PPC64_GOT16_DS;
2859 break;
2860 case BFD_RELOC_LO16_GOTOFF:
2861 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2862 break;
2863 case BFD_RELOC_LO16_PLTOFF:
2864 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2865 break;
2866 case BFD_RELOC_16_BASEREL:
2867 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2868 break;
2869 case BFD_RELOC_LO16_BASEREL:
2870 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2871 break;
2872 case BFD_RELOC_PPC_TOC16:
2873 reloc = BFD_RELOC_PPC64_TOC16_DS;
2874 break;
2875 case BFD_RELOC_PPC64_TOC16_LO:
2876 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2877 break;
2878 case BFD_RELOC_PPC64_PLTGOT16:
2879 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2880 break;
2881 case BFD_RELOC_PPC64_PLTGOT16_LO:
2882 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2883 break;
2884 case BFD_RELOC_PPC_DTPREL16:
2885 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2886 break;
2887 case BFD_RELOC_PPC_DTPREL16_LO:
2888 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2889 break;
2890 case BFD_RELOC_PPC_TPREL16:
2891 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2892 break;
2893 case BFD_RELOC_PPC_TPREL16_LO:
2894 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2895 break;
2896 case BFD_RELOC_PPC_GOT_DTPREL16:
2897 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2898 case BFD_RELOC_PPC_GOT_TPREL16:
2899 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2900 break;
2901 default:
2902 as_bad (_("unsupported relocation for DS offset field"));
2903 break;
2904 }
2905 }
0baf16f2
AM		 2906 }
2907
252b5132
RH		 2908 /* We need to generate a fixup for this expression. */
2909 if (fc >= MAX_INSN_FIXUPS)
2910 as_fatal (_("too many fixups"));
2911 fixups[fc].exp = ex;
727fc41e 2912 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2913 fixups[fc].reloc = reloc;
2914 ++fc;
2915 }
727fc41e 2916#else /* OBJ_ELF */
252b5132
RH		 2917 else
2918 {
2919 /* We need to generate a fixup for this expression. */
2920 if (fc >= MAX_INSN_FIXUPS)
2921 as_fatal (_("too many fixups"));
2922 fixups[fc].exp = ex;
2923 fixups[fc].opindex = *opindex_ptr;
2924 fixups[fc].reloc = BFD_RELOC_UNUSED;
2925 ++fc;
2926 }
727fc41e 2927#endif /* OBJ_ELF */
252b5132
RH		 2928
2929 if (need_paren)
2930 {
2931 endc = ')';
2932 need_paren = 0;
c3d65c1c
BE		 2933 /* If expecting more operands, then we want to see "),". */
2934 if (*str == endc && opindex_ptr[1] != 0)
2935 {
2936 do
2937 ++str;
2938 while (ISSPACE (*str));
2939 endc = ',';
2940 }
252b5132
RH		 2941 }
2942 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2943 {
2944 endc = '(';
2945 need_paren = 1;
2946 }
2947 else
2948 endc = ',';
2949
2950 /* The call to expression should have advanced str past any
2951 whitespace. */
2952 if (*str != endc
2953 && (endc != ',' || *str != '\0'))
2954 {
5a938047
AM		 2955 if (*str == '\0')
2956 as_bad (_("syntax error; end of line, expected `%c'"), endc);
2957 else
2958 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 2959 break;
2960 }
2961
2962 if (*str != '\0')
2963 ++str;
2964 }
2965
3882b010 2966 while (ISSPACE (*str))
252b5132
RH		 2967 ++str;
2968
2969 if (*str != '\0')
2970 as_bad (_("junk at end of line: `%s'"), str);
2971
dc1d03fc 2972#ifdef OBJ_ELF
6a0c61b7 2973 /* Do we need/want a APUinfo section? */
e01d869a 2974 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC)) != 0)
6a0c61b7
EZ		 2975 {
2976 /* These are all version "1". */
2977 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2978 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2979 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2980 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2981 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2982 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2983 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2984 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2985 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2986 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2987 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2988 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2989 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2990 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2991 }
dc1d03fc 2992#endif
6a0c61b7 2993
252b5132
RH		 2994 /* Write out the instruction. */
2995 f = frag_more (4);
09b935ac
AM		 2996 addr_mod = frag_now_fix () & 3;
2997 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2998 as_bad (_("instruction address is not a multiple of 4"));
2999 frag_now->insn_addr = addr_mod;
3000 frag_now->has_code = 1;
252b5132
RH		 3001 md_number_to_chars (f, insn, 4);
3002
5d6f4f16
GK		 3003#ifdef OBJ_ELF
3004 dwarf2_emit_insn (4);
3005#endif
3006
252b5132
RH		 3007 /* Create any fixups. At this point we do not use a
3008 bfd_reloc_code_real_type, but instead just use the
3009 BFD_RELOC_UNUSED plus the operand index. This lets us easily
3010 handle fixups for any operand type, although that is admittedly
3011 not a very exciting feature. We pick a BFD reloc type in
55cf6793 3012 md_apply_fix. */
252b5132
RH		 3013 for (i = 0; i < fc; i++)
3014 {
252b5132
RH		 3015 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3016 {
99a814a1 3017 reloc_howto_type *reloc_howto;
252b5132
RH		 3018 int size;
3019 int offset;
3020 fixS *fixP;
3021
99a814a1 3022 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3023 if (!reloc_howto)
3024 abort ();
3025
3026 size = bfd_get_reloc_size (reloc_howto);
3027 offset = target_big_endian ? (4 - size) : 0;
3028
3029 if (size < 1 || size > 4)
bc805888 3030 abort ();
252b5132 3031
99a814a1
AM		 3032 fixP = fix_new_exp (frag_now,
3033 f - frag_now->fr_literal + offset,
3034 size,
3035 &fixups[i].exp,
3036 reloc_howto->pc_relative,
252b5132
RH		 3037 fixups[i].reloc);
3038
3039 /* Turn off complaints that the addend is too large for things like
3040 foo+100000@ha. */
3041 switch (fixups[i].reloc)
3042 {
3043 case BFD_RELOC_16_GOTOFF:
3044 case BFD_RELOC_PPC_TOC16:
3045 case BFD_RELOC_LO16:
3046 case BFD_RELOC_HI16:
3047 case BFD_RELOC_HI16_S:
0baf16f2 3048#ifdef OBJ_ELF
0baf16f2
AM		 3049 case BFD_RELOC_PPC64_HIGHER:
3050 case BFD_RELOC_PPC64_HIGHER_S:
3051 case BFD_RELOC_PPC64_HIGHEST:
3052 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 3053#endif
252b5132
RH		 3054 fixP->fx_no_overflow = 1;
3055 break;
3056 default:
3057 break;
3058 }
3059 }
3060 else
727fc41e
AM		 3061 {
3062 const struct powerpc_operand *operand;
3063
3064 operand = &powerpc_operands[fixups[i].opindex];
3065 fix_new_exp (frag_now,
3066 f - frag_now->fr_literal,
3067 4,
3068 &fixups[i].exp,
3069 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3070 ((bfd_reloc_code_real_type)
3071 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3072 }
252b5132
RH		 3073 }
3074}
3075
3076/* Handle a macro. Gather all the operands, transform them as
3077 described by the macro, and call md_assemble recursively. All the
3078 operands are separated by commas; we don't accept parentheses
3079 around operands here. */
3080
3081static void
98027b10 3082ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3083{
3084 char *operands[10];
3085 unsigned int count;
3086 char *s;
3087 unsigned int len;
3088 const char *format;
db557034 3089 unsigned int arg;
252b5132
RH		 3090 char *send;
3091 char *complete;
3092
3093 /* Gather the users operands into the operands array. */
3094 count = 0;
3095 s = str;
3096 while (1)
3097 {
3098 if (count >= sizeof operands / sizeof operands[0])
3099 break;
3100 operands[count++] = s;
3101 s = strchr (s, ',');
3102 if (s == (char *) NULL)
3103 break;
3104 *s++ = '\0';
81d4177b 3105 }
252b5132
RH		 3106
3107 if (count != macro->operands)
3108 {
3109 as_bad (_("wrong number of operands"));
3110 return;
3111 }
3112
3113 /* Work out how large the string must be (the size is unbounded
3114 because it includes user input). */
3115 len = 0;
3116 format = macro->format;
3117 while (*format != '\0')
3118 {
3119 if (*format != '%')
3120 {
3121 ++len;
3122 ++format;
3123 }
3124 else
3125 {
3126 arg = strtol (format + 1, &send, 10);
db557034 3127 know (send != format && arg < count);
252b5132
RH		 3128 len += strlen (operands[arg]);
3129 format = send;
3130 }
3131 }
3132
3133 /* Put the string together. */
3134 complete = s = (char *) alloca (len + 1);
3135 format = macro->format;
3136 while (*format != '\0')
3137 {
3138 if (*format != '%')
3139 *s++ = *format++;
3140 else
3141 {
3142 arg = strtol (format + 1, &send, 10);
3143 strcpy (s, operands[arg]);
3144 s += strlen (s);
3145 format = send;
3146 }
3147 }
3148 *s = '\0';
3149
3150 /* Assemble the constructed instruction. */
3151 md_assemble (complete);
81d4177b 3152}
252b5132
RH		 3153\f
3154#ifdef OBJ_ELF
18ae9cc1 3155/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3156
3157int
98027b10 3158ppc_section_type (char *str, size_t len)
252b5132 3159{
9de8d8f1
RH		 3160 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3161 return SHT_ORDERED;
252b5132 3162
9de8d8f1 3163 return -1;
252b5132
RH		 3164}
3165
3166int
1239de13 3167ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3168{
3169 if (type == SHT_ORDERED)
3170 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3171
252b5132
RH		 3172 return flags;
3173}
3174#endif /* OBJ_ELF */
3175
3176\f
3177/* Pseudo-op handling. */
3178
3179/* The .byte pseudo-op. This is similar to the normal .byte
3180 pseudo-op, but it can also take a single ASCII string. */
3181
3182static void
98027b10 3183ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3184{
3185 if (*input_line_pointer != '\"')
3186 {
3187 cons (1);
3188 return;
3189 }
3190
3191 /* Gather characters. A real double quote is doubled. Unusual
3192 characters are not permitted. */
3193 ++input_line_pointer;
3194 while (1)
3195 {
3196 char c;
3197
3198 c = *input_line_pointer++;
3199
3200 if (c == '\"')
3201 {
3202 if (*input_line_pointer != '\"')
3203 break;
3204 ++input_line_pointer;
3205 }
3206
3207 FRAG_APPEND_1_CHAR (c);
3208 }
3209
3210 demand_empty_rest_of_line ();
3211}
3212\f
3213#ifdef OBJ_XCOFF
3214
3215/* XCOFF specific pseudo-op handling. */
3216
3217/* This is set if we are creating a .stabx symbol, since we don't want
3218 to handle symbol suffixes for such symbols. */
b34976b6 3219static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3220
3221/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3222 symbols in the .bss segment as though they were local common
67c1ffbe 3223 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3224 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3225
3226static void
98027b10 3227ppc_comm (int lcomm)
252b5132
RH		 3228{
3229 asection *current_seg = now_seg;
3230 subsegT current_subseg = now_subseg;
3231 char *name;
3232 char endc;
3233 char *end_name;
3234 offsetT size;
3235 offsetT align;
3236 symbolS *lcomm_sym = NULL;
3237 symbolS *sym;
3238 char *pfrag;
3239
3240 name = input_line_pointer;
3241 endc = get_symbol_end ();
3242 end_name = input_line_pointer;
3243 *end_name = endc;
3244
3245 if (*input_line_pointer != ',')
3246 {
3247 as_bad (_("missing size"));
3248 ignore_rest_of_line ();
3249 return;
3250 }
3251 ++input_line_pointer;
3252
3253 size = get_absolute_expression ();
3254 if (size < 0)
3255 {
3256 as_bad (_("negative size"));
3257 ignore_rest_of_line ();
3258 return;
3259 }
3260
3261 if (! lcomm)
3262 {
3263 /* The third argument to .comm is the alignment. */
3264 if (*input_line_pointer != ',')
1ad63b2f 3265 align = 2;
252b5132
RH		 3266 else
3267 {
3268 ++input_line_pointer;
3269 align = get_absolute_expression ();
3270 if (align <= 0)
3271 {
3272 as_warn (_("ignoring bad alignment"));
1ad63b2f 3273 align = 2;
252b5132
RH		 3274 }
3275 }
3276 }
3277 else
3278 {
3279 char *lcomm_name;
3280 char lcomm_endc;
3281
1ad63b2f 3282 if (size <= 4)
252b5132
RH		 3283 align = 2;
3284 else
3285 align = 3;
3286
3287 /* The third argument to .lcomm appears to be the real local
3288 common symbol to create. References to the symbol named in
3289 the first argument are turned into references to the third
3290 argument. */
3291 if (*input_line_pointer != ',')
3292 {
3293 as_bad (_("missing real symbol name"));
3294 ignore_rest_of_line ();
3295 return;
3296 }
3297 ++input_line_pointer;
3298
3299 lcomm_name = input_line_pointer;
3300 lcomm_endc = get_symbol_end ();
81d4177b 3301
252b5132
RH		 3302 lcomm_sym = symbol_find_or_make (lcomm_name);
3303
3304 *input_line_pointer = lcomm_endc;
3305 }
3306
3307 *end_name = '\0';
3308 sym = symbol_find_or_make (name);
3309 *end_name = endc;
3310
3311 if (S_IS_DEFINED (sym)
3312 || S_GET_VALUE (sym) != 0)
3313 {
3314 as_bad (_("attempt to redefine symbol"));
3315 ignore_rest_of_line ();
3316 return;
3317 }
81d4177b 3318
252b5132 3319 record_alignment (bss_section, align);
81d4177b 3320
252b5132
RH		 3321 if (! lcomm
3322 || ! S_IS_DEFINED (lcomm_sym))
3323 {
3324 symbolS *def_sym;
3325 offsetT def_size;
3326
3327 if (! lcomm)
3328 {
3329 def_sym = sym;
3330 def_size = size;
3331 S_SET_EXTERNAL (sym);
3332 }
3333 else
3334 {
809ffe0d 3335 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3336 def_sym = lcomm_sym;
3337 def_size = 0;
3338 }
3339
3340 subseg_set (bss_section, 1);
3341 frag_align (align, 0, 0);
81d4177b 3342
809ffe0d 3343 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3344 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3345 def_size, (char *) NULL);
3346 *pfrag = 0;
3347 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3348 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3349 }
3350 else if (lcomm)
3351 {
3352 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3353 symbol_get_frag (lcomm_sym)->fr_offset =
3354 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3355 &~ ((1 << align) - 1));
809ffe0d
ILT		 3356 if (align > symbol_get_tc (lcomm_sym)->align)
3357 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3358 }
3359
3360 if (lcomm)
3361 {
3362 /* Make sym an offset from lcomm_sym. */
3363 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3364 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3365 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3366 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3367 }
3368
3369 subseg_set (current_seg, current_subseg);
3370
3371 demand_empty_rest_of_line ();
3372}
3373
3374/* The .csect pseudo-op. This switches us into a different
3375 subsegment. The first argument is a symbol whose value is the
3376 start of the .csect. In COFF, csect symbols get special aux
3377 entries defined by the x_csect field of union internal_auxent. The
3378 optional second argument is the alignment (the default is 2). */
3379
3380static void
98027b10 3381ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3382{
3383 char *name;
3384 char endc;
3385 symbolS *sym;
931e13a6 3386 offsetT align;
252b5132
RH		 3387
3388 name = input_line_pointer;
3389 endc = get_symbol_end ();
81d4177b 3390
252b5132
RH		 3391 sym = symbol_find_or_make (name);
3392
3393 *input_line_pointer = endc;
3394
3395 if (S_GET_NAME (sym)[0] == '\0')
3396 {
3397 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3398 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3399 }
3400
931e13a6 3401 align = 2;
252b5132
RH		 3402 if (*input_line_pointer == ',')
3403 {
3404 ++input_line_pointer;
931e13a6 3405 align = get_absolute_expression ();
252b5132
RH		 3406 }
3407
931e13a6
AM		 3408 ppc_change_csect (sym, align);
3409
252b5132
RH		 3410 demand_empty_rest_of_line ();
3411}
3412
3413/* Change to a different csect. */
3414
3415static void
98027b10 3416ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3417{
3418 if (S_IS_DEFINED (sym))
809ffe0d 3419 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3420 else
3421 {
3422 symbolS **list_ptr;
3423 int after_toc;
3424 int hold_chunksize;
3425 symbolS *list;
931e13a6
AM		 3426 int is_code;
3427 segT sec;
252b5132
RH		 3428
3429 /* This is a new csect. We need to look at the symbol class to
3430 figure out whether it should go in the text section or the
3431 data section. */
3432 after_toc = 0;
931e13a6 3433 is_code = 0;
96d56e9f 3434 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3435 {
3436 case XMC_PR:
3437 case XMC_RO:
3438 case XMC_DB:
3439 case XMC_GL:
3440 case XMC_XO:
3441 case XMC_SV:
3442 case XMC_TI:
3443 case XMC_TB:
3444 S_SET_SEGMENT (sym, text_section);
809ffe0d 3445 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3446 ++ppc_text_subsegment;
3447 list_ptr = &ppc_text_csects;
931e13a6 3448 is_code = 1;
252b5132
RH		 3449 break;
3450 case XMC_RW:
3451 case XMC_TC0:
3452 case XMC_TC:
3453 case XMC_DS:
3454 case XMC_UA:
3455 case XMC_BS:
3456 case XMC_UC:
3457 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3458 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3459 == ppc_data_subsegment))
252b5132
RH		 3460 after_toc = 1;
3461 S_SET_SEGMENT (sym, data_section);
809ffe0d 3462 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3463 ++ppc_data_subsegment;
3464 list_ptr = &ppc_data_csects;
3465 break;
3466 default:
3467 abort ();
3468 }
3469
3470 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3471 changing subsegments, so that we don't use a lot of memory
3472 space for what may be a small section. */
252b5132
RH		 3473 hold_chunksize = chunksize;
3474 chunksize = 64;
3475
931e13a6
AM		 3476 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3477 symbol_get_tc (sym)->subseg);
252b5132
RH		 3478
3479 chunksize = hold_chunksize;
3480
3481 if (after_toc)
3482 ppc_after_toc_frag = frag_now;
3483
931e13a6
AM		 3484 record_alignment (sec, align);
3485 if (is_code)
3486 frag_align_code (align, 0);
3487 else
3488 frag_align (align, 0, 0);
3489
809ffe0d 3490 symbol_set_frag (sym, frag_now);
252b5132
RH		 3491 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3492
931e13a6 3493 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3494 symbol_get_tc (sym)->output = 1;
3495 symbol_get_tc (sym)->within = sym;
81d4177b 3496
252b5132 3497 for (list = *list_ptr;
809ffe0d
ILT		 3498 symbol_get_tc (list)->next != (symbolS *) NULL;
3499 list = symbol_get_tc (list)->next)
252b5132 3500 ;
809ffe0d 3501 symbol_get_tc (list)->next = sym;
81d4177b 3502
252b5132 3503 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3504 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3505 &symbol_lastP);
252b5132
RH		 3506 }
3507
3508 ppc_current_csect = sym;
3509}
3510
85645aed
TG		 3511static void
3512ppc_change_debug_section (unsigned int idx, subsegT subseg)
3513{
3514 segT sec;
3515 flagword oldflags;
3516 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3517
3518 sec = subseg_new (dw->name, subseg);
3519 oldflags = bfd_get_section_flags (stdoutput, sec);
3520 if (oldflags == SEC_NO_FLAGS)
3521 {
3522 /* Just created section. */
3523 gas_assert (dw_sections[idx].sect == NULL);
3524
3525 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3526 bfd_set_section_alignment (stdoutput, sec, 0);
3527 dw_sections[idx].sect = sec;
3528 }
3529
3530 /* Not anymore in a csect. */
3531 ppc_current_csect = NULL;
3532}
3533
3534/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3535 .dwsect flag [, opt-label ]
3536*/
3537
3538static void
3539ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3540{
3541 offsetT flag;
3542 symbolS *opt_label;
3543 const struct xcoff_dwsect_name *dw;
3544 struct dw_subsection *subseg;
3545 struct dw_section *dws;
3546 int i;
3547
3548 /* Find section. */
3549 flag = get_absolute_expression ();
3550 dw = NULL;
3551 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3552 if (xcoff_dwsect_names[i].flag == flag)
3553 {
3554 dw = &xcoff_dwsect_names[i];
3555 break;
3556 }
3557
3558 /* Parse opt-label. */
3559 if (*input_line_pointer == ',')
3560 {
3561 const char *label;
3562 char c;
3563
3564 ++input_line_pointer;
3565
3566 label = input_line_pointer;
3567 c = get_symbol_end ();
3568 opt_label = symbol_find_or_make (label);
3569 *input_line_pointer = c;
3570 }
3571 else
3572 opt_label = NULL;
3573
3574 demand_empty_rest_of_line ();
3575
3576 /* Return now in case of unknown subsection. */
3577 if (dw == NULL)
3578 {
3579 as_bad (_("No known dwarf XCOFF section for flag 0x%08x\n"),
3580 (unsigned)flag);
3581 return;
3582 }
3583
3584 /* Find the subsection. */
3585 dws = &dw_sections[i];
3586 subseg = NULL;
3587 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3588 {
3589 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3590 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3591 {
3592 as_bad (_("label %s was not defined in this dwarf section"),
3593 S_GET_NAME (opt_label));
3594 subseg = dws->anon_subseg;
3595 opt_label = NULL;
3596 }
3597 else
3598 subseg = symbol_get_tc (opt_label)->u.dw;
3599 }
3600
3601 if (subseg != NULL)
3602 {
3603 /* Switch to the subsection. */
3604 ppc_change_debug_section (i, subseg->subseg);
3605 }
3606 else
3607 {
3608 /* Create a new dw subsection. */
3609 subseg = (struct dw_subsection *)
3610 xmalloc (sizeof (struct dw_subsection));
3611
3612 if (opt_label == NULL)
3613 {
3614 /* The anonymous one. */
3615 subseg->subseg = 0;
3616 subseg->link = NULL;
3617 dws->anon_subseg = subseg;
3618 }
3619 else
3620 {
3621 /* A named one. */
3622 if (dws->list_subseg != NULL)
3623 subseg->subseg = dws->list_subseg->subseg + 1;
3624 else
3625 subseg->subseg = 1;
3626
3627 subseg->link = dws->list_subseg;
3628 dws->list_subseg = subseg;
3629 symbol_get_tc (opt_label)->u.dw = subseg;
3630 }
3631
3632 ppc_change_debug_section (i, subseg->subseg);
3633
3634 if (dw->def_size)
3635 {
3636 /* Add the length field. */
3637 expressionS *exp = &subseg->end_exp;
3638 int sz;
3639
3640 if (opt_label != NULL)
3641 symbol_set_value_now (opt_label);
3642
3643 /* Add the length field. Note that according to the AIX assembler
3644 manual, the size of the length field is 4 for powerpc32 but
3645 12 for powerpc64. */
3646 if (ppc_obj64)
3647 {
3648 /* Write the 64bit marker. */
3649 md_number_to_chars (frag_more (4), -1, 4);
3650 }
3651
3652 exp->X_op = O_subtract;
3653 exp->X_op_symbol = symbol_temp_new_now ();
3654 exp->X_add_symbol = symbol_temp_make ();
3655
3656 sz = ppc_obj64 ? 8 : 4;
3657 exp->X_add_number = -sz;
3658 emit_expr (exp, sz);
3659 }
3660 }
3661}
3662
252b5132
RH		 3663/* This function handles the .text and .data pseudo-ops. These
3664 pseudo-ops aren't really used by XCOFF; we implement them for the
3665 convenience of people who aren't used to XCOFF. */
3666
3667static void
98027b10 3668ppc_section (int type)
252b5132
RH		 3669{
3670 const char *name;
3671 symbolS *sym;
3672
3673 if (type == 't')
3674 name = ".text[PR]";
3675 else if (type == 'd')
3676 name = ".data[RW]";
3677 else
3678 abort ();
3679
3680 sym = symbol_find_or_make (name);
3681
931e13a6 3682 ppc_change_csect (sym, 2);
252b5132
RH		 3683
3684 demand_empty_rest_of_line ();
3685}
3686
3687/* This function handles the .section pseudo-op. This is mostly to
3688 give an error, since XCOFF only supports .text, .data and .bss, but
3689 we do permit the user to name the text or data section. */
3690
3691static void
98027b10 3692ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3693{
3694 char *user_name;
3695 const char *real_name;
3696 char c;
3697 symbolS *sym;
3698
3699 user_name = input_line_pointer;
3700 c = get_symbol_end ();
3701
3702 if (strcmp (user_name, ".text") == 0)
3703 real_name = ".text[PR]";
3704 else if (strcmp (user_name, ".data") == 0)
3705 real_name = ".data[RW]";
3706 else
3707 {
3708 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3709 *input_line_pointer = c;
3710 ignore_rest_of_line ();
3711 return;
3712 }
3713
3714 *input_line_pointer = c;
3715
3716 sym = symbol_find_or_make (real_name);
3717
931e13a6 3718 ppc_change_csect (sym, 2);
252b5132
RH		 3719
3720 demand_empty_rest_of_line ();
3721}
3722
3723/* The .extern pseudo-op. We create an undefined symbol. */
3724
3725static void
98027b10 3726ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3727{
3728 char *name;
3729 char endc;
3730
3731 name = input_line_pointer;
3732 endc = get_symbol_end ();
3733
3734 (void) symbol_find_or_make (name);
3735
3736 *input_line_pointer = endc;
3737
3738 demand_empty_rest_of_line ();
3739}
3740
3741/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3742
3743static void
98027b10 3744ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3745{
3746 char *name;
3747 char endc;
3748 symbolS *sym;
3749
3750 name = input_line_pointer;
3751 endc = get_symbol_end ();
3752
3753 sym = symbol_find_or_make (name);
3754
3755 *input_line_pointer = endc;
3756
809ffe0d 3757 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3758
3759 demand_empty_rest_of_line ();
3760}
3761
c865e45b
RS		 3762/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
3763 relocations at the beginning of the current csect.
3764
3765 (In principle, there's no reason why the relocations _have_ to be at
3766 the beginning. Anywhere in the csect would do. However, inserting
3767 at the beginning is what the native assmebler does, and it helps to
3768 deal with cases where the .ref statements follow the section contents.)
3769
3770 ??? .refs don't work for empty .csects. However, the native assembler
3771 doesn't report an error in this case, and neither yet do we. */
3772
3773static void
3774ppc_ref (int ignore ATTRIBUTE_UNUSED)
3775{
3776 char *name;
3777 char c;
3778
3779 if (ppc_current_csect == NULL)
3780 {
3781 as_bad (_(".ref outside .csect"));
3782 ignore_rest_of_line ();
3783 return;
3784 }
3785
3786 do
3787 {
3788 name = input_line_pointer;
3789 c = get_symbol_end ();
3790
3791 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
3792 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
3793
3794 *input_line_pointer = c;
3795 SKIP_WHITESPACE ();
3796 c = *input_line_pointer;
3797 if (c == ',')
3798 {
3799 input_line_pointer++;
3800 SKIP_WHITESPACE ();
3801 if (is_end_of_line[(unsigned char) *input_line_pointer])
3802 {
3803 as_bad (_("missing symbol name"));
3804 ignore_rest_of_line ();
3805 return;
3806 }
3807 }
3808 }
3809 while (c == ',');
3810
3811 demand_empty_rest_of_line ();
3812}
3813
252b5132
RH		 3814/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3815 although I don't know why it bothers. */
3816
3817static void
98027b10 3818ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3819{
3820 char *name;
3821 char endc;
3822 symbolS *sym;
3823 int len;
3824
3825 name = input_line_pointer;
3826 endc = get_symbol_end ();
3827
3828 sym = symbol_find_or_make (name);
3829
3830 *input_line_pointer = endc;
3831
3832 if (*input_line_pointer != ',')
3833 {
3834 as_bad (_("missing rename string"));
3835 ignore_rest_of_line ();
3836 return;
3837 }
3838 ++input_line_pointer;
3839
809ffe0d 3840 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3841
3842 demand_empty_rest_of_line ();
3843}
3844
3845/* The .stabx pseudo-op. This is similar to a normal .stabs
3846 pseudo-op, but slightly different. A sample is
3847 .stabx "main:F-1",.main,142,0
3848 The first argument is the symbol name to create. The second is the
3849 value, and the third is the storage class. The fourth seems to be
3850 always zero, and I am assuming it is the type. */
3851
3852static void
98027b10 3853ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3854{
3855 char *name;
3856 int len;
3857 symbolS *sym;
3858 expressionS exp;
3859
3860 name = demand_copy_C_string (&len);
3861
3862 if (*input_line_pointer != ',')
3863 {
3864 as_bad (_("missing value"));
3865 return;
3866 }
3867 ++input_line_pointer;
3868
b34976b6 3869 ppc_stab_symbol = TRUE;
252b5132 3870 sym = symbol_make (name);
b34976b6 3871 ppc_stab_symbol = FALSE;
252b5132 3872
809ffe0d 3873 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3874
3875 (void) expression (&exp);
3876
3877 switch (exp.X_op)
3878 {
3879 case O_illegal:
3880 case O_absent:
3881 case O_big:
3882 as_bad (_("illegal .stabx expression; zero assumed"));
3883 exp.X_add_number = 0;
3884 /* Fall through. */
3885 case O_constant:
3886 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3887 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3888 break;
3889
3890 case O_symbol:
3891 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3892 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3893 else
3894 {
3895 S_SET_VALUE (sym,
3896 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3897 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3898 }
3899 break;
3900
3901 default:
3902 /* The value is some complex expression. This will probably
99a814a1
AM		 3903 fail at some later point, but this is probably the right
3904 thing to do here. */
809ffe0d 3905 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3906 break;
3907 }
3908
3909 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3910 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3911
3912 if (*input_line_pointer != ',')
3913 {
3914 as_bad (_("missing class"));
3915 return;
3916 }
3917 ++input_line_pointer;
3918
3919 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3920
3921 if (*input_line_pointer != ',')
3922 {
3923 as_bad (_("missing type"));
3924 return;
3925 }
3926 ++input_line_pointer;
3927
3928 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3929
809ffe0d 3930 symbol_get_tc (sym)->output = 1;
252b5132 3931
c734e7e3
TG		 3932 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
3933 {
3934 /* In this case :
252b5132 3935
c734e7e3
TG		 3936 .bs name
3937 .stabx "z",arrays_,133,0
3938 .es
99a814a1 3939
c734e7e3 3940 .comm arrays_,13768,3
99a814a1 3941
c734e7e3
TG		 3942 resolve_symbol_value will copy the exp's "within" into sym's when the
3943 offset is 0. Since this seems to be corner case problem,
3944 only do the correction for storage class C_STSYM. A better solution
3945 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 3946
c734e7e3
TG		 3947 if (exp.X_op == O_symbol)
3948 {
3949 if (ppc_current_block == NULL)
3950 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 3951
c734e7e3
TG		 3952 symbol_get_tc (sym)->within = ppc_current_block;
3953 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3954 }
3955 }
99a814a1 3956
252b5132
RH		 3957 if (exp.X_op != O_symbol
3958 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3959 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3960 ppc_frob_label (sym);
3961 else
3962 {
3963 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3964 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3965 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3966 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3967 }
3968
3969 demand_empty_rest_of_line ();
3970}
3971
3972/* The .function pseudo-op. This takes several arguments. The first
3973 argument seems to be the external name of the symbol. The second
67c1ffbe 3974 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3975 uses the same name for both. I have no idea what the third and
3976 fourth arguments are meant to be. The optional fifth argument is
3977 an expression for the size of the function. In COFF this symbol
3978 gets an aux entry like that used for a csect. */
3979
3980static void
98027b10 3981ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3982{
3983 char *name;
3984 char endc;
3985 char *s;
3986 symbolS *ext_sym;
3987 symbolS *lab_sym;
3988
3989 name = input_line_pointer;
3990 endc = get_symbol_end ();
3991
3992 /* Ignore any [PR] suffix. */
3993 name = ppc_canonicalize_symbol_name (name);
3994 s = strchr (name, '[');
3995 if (s != (char *) NULL
3996 && strcmp (s + 1, "PR]") == 0)
3997 *s = '\0';
3998
3999 ext_sym = symbol_find_or_make (name);
4000
4001 *input_line_pointer = endc;
4002
4003 if (*input_line_pointer != ',')
4004 {
4005 as_bad (_("missing symbol name"));
4006 ignore_rest_of_line ();
4007 return;
4008 }
4009 ++input_line_pointer;
4010
4011 name = input_line_pointer;
4012 endc = get_symbol_end ();
4013
4014 lab_sym = symbol_find_or_make (name);
4015
4016 *input_line_pointer = endc;
4017
4018 if (ext_sym != lab_sym)
4019 {
809ffe0d
ILT		 4020 expressionS exp;
4021
4022 exp.X_op = O_symbol;
4023 exp.X_add_symbol = lab_sym;
4024 exp.X_op_symbol = NULL;
4025 exp.X_add_number = 0;
4026 exp.X_unsigned = 0;
4027 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4028 }
4029
96d56e9f
NC		 4030 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4031 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4032 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4033
4034 if (*input_line_pointer == ',')
4035 {
91d6fa6a 4036 expressionS exp;
252b5132
RH		 4037
4038 /* Ignore the third argument. */
4039 ++input_line_pointer;
91d6fa6a 4040 expression (& exp);
252b5132
RH		 4041 if (*input_line_pointer == ',')
4042 {
4043 /* Ignore the fourth argument. */
4044 ++input_line_pointer;
91d6fa6a 4045 expression (& exp);
252b5132
RH		 4046 if (*input_line_pointer == ',')
4047 {
4048 /* The fifth argument is the function size. */
4049 ++input_line_pointer;
85645aed
TG		 4050 symbol_get_tc (ext_sym)->u.size = symbol_new
4051 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4052 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4053 }
4054 }
4055 }
4056
4057 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4058 SF_SET_FUNCTION (ext_sym);
4059 SF_SET_PROCESS (ext_sym);
4060 coff_add_linesym (ext_sym);
4061
4062 demand_empty_rest_of_line ();
4063}
4064
4065/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4066 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4067 with the correct line number */
5d6255fe 4068
8642cce8 4069static symbolS *saved_bi_sym = 0;
252b5132
RH		 4070
4071static void
98027b10 4072ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4073{
4074 symbolS *sym;
4075
4076 sym = symbol_make (".bf");
4077 S_SET_SEGMENT (sym, text_section);
809ffe0d 4078 symbol_set_frag (sym, frag_now);
252b5132
RH		 4079 S_SET_VALUE (sym, frag_now_fix ());
4080 S_SET_STORAGE_CLASS (sym, C_FCN);
4081
4082 coff_line_base = get_absolute_expression ();
4083
4084 S_SET_NUMBER_AUXILIARY (sym, 1);
4085 SA_SET_SYM_LNNO (sym, coff_line_base);
4086
8642cce8 4087 /* Line number for bi. */
5d6255fe 4088 if (saved_bi_sym)
8642cce8
TR		 4089 {
4090 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4091 saved_bi_sym = 0;
4092 }
5d6255fe 4093
8642cce8 4094
809ffe0d 4095 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4096
4097 ppc_frob_label (sym);
4098
4099 demand_empty_rest_of_line ();
4100}
4101
4102/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4103 ".ef", except that the line number is absolute, not relative to the
4104 most recent ".bf" symbol. */
4105
4106static void
98027b10 4107ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4108{
4109 symbolS *sym;
4110
4111 sym = symbol_make (".ef");
4112 S_SET_SEGMENT (sym, text_section);
809ffe0d 4113 symbol_set_frag (sym, frag_now);
252b5132
RH		 4114 S_SET_VALUE (sym, frag_now_fix ());
4115 S_SET_STORAGE_CLASS (sym, C_FCN);
4116 S_SET_NUMBER_AUXILIARY (sym, 1);
4117 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4118 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4119
4120 ppc_frob_label (sym);
4121
4122 demand_empty_rest_of_line ();
4123}
4124
4125/* The .bi and .ei pseudo-ops. These take a string argument and
4126 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4127 the symbol list. The value of .bi will be know when the next .bf
4128 is encountered. */
252b5132
RH		 4129
4130static void
98027b10 4131ppc_biei (int ei)
252b5132
RH		 4132{
4133 static symbolS *last_biei;
4134
4135 char *name;
4136 int len;
4137 symbolS *sym;
4138 symbolS *look;
4139
4140 name = demand_copy_C_string (&len);
4141
4142 /* The value of these symbols is actually file offset. Here we set
4143 the value to the index into the line number entries. In
4144 ppc_frob_symbols we set the fix_line field, which will cause BFD
4145 to do the right thing. */
4146
4147 sym = symbol_make (name);
4148 /* obj-coff.c currently only handles line numbers correctly in the
4149 .text section. */
4150 S_SET_SEGMENT (sym, text_section);
4151 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4152 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4153
4154 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4155 symbol_get_tc (sym)->output = 1;
81d4177b 4156
8642cce8 4157 /* Save bi. */
5d6255fe 4158 if (ei)
8642cce8
TR		 4159 saved_bi_sym = 0;
4160 else
4161 saved_bi_sym = sym;
4162
252b5132
RH		 4163 for (look = last_biei ? last_biei : symbol_rootP;
4164 (look != (symbolS *) NULL
4165 && (S_GET_STORAGE_CLASS (look) == C_FILE
4166 || S_GET_STORAGE_CLASS (look) == C_BINCL
4167 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4168 look = symbol_next (look))
4169 ;
4170 if (look != (symbolS *) NULL)
4171 {
4172 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4173 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4174 last_biei = sym;
4175 }
4176
4177 demand_empty_rest_of_line ();
4178}
4179
4180/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4181 There is one argument, which is a csect symbol. The value of the
4182 .bs symbol is the index of this csect symbol. */
4183
4184static void
98027b10 4185ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4186{
4187 char *name;
4188 char endc;
4189 symbolS *csect;
4190 symbolS *sym;
4191
4192 if (ppc_current_block != NULL)
4193 as_bad (_("nested .bs blocks"));
4194
4195 name = input_line_pointer;
4196 endc = get_symbol_end ();
4197
4198 csect = symbol_find_or_make (name);
4199
4200 *input_line_pointer = endc;
4201
4202 sym = symbol_make (".bs");
4203 S_SET_SEGMENT (sym, now_seg);
4204 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4205 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4206 symbol_get_tc (sym)->output = 1;
252b5132 4207
809ffe0d 4208 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4209
4210 ppc_frob_label (sym);
4211
4212 ppc_current_block = sym;
4213
4214 demand_empty_rest_of_line ();
4215}
4216
4217/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4218
4219static void
98027b10 4220ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4221{
4222 symbolS *sym;
4223
4224 if (ppc_current_block == NULL)
4225 as_bad (_(".es without preceding .bs"));
4226
4227 sym = symbol_make (".es");
4228 S_SET_SEGMENT (sym, now_seg);
4229 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4230 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4231 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4232
4233 ppc_frob_label (sym);
4234
4235 ppc_current_block = NULL;
4236
4237 demand_empty_rest_of_line ();
4238}
4239
4240/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4241 line number. */
4242
4243static void
98027b10 4244ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4245{
4246 symbolS *sym;
4247
4248 sym = symbol_make (".bb");
4249 S_SET_SEGMENT (sym, text_section);
809ffe0d 4250 symbol_set_frag (sym, frag_now);
252b5132
RH		 4251 S_SET_VALUE (sym, frag_now_fix ());
4252 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4253
4254 S_SET_NUMBER_AUXILIARY (sym, 1);
4255 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4256
809ffe0d 4257 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4258
4259 SF_SET_PROCESS (sym);
4260
4261 ppc_frob_label (sym);
4262
4263 demand_empty_rest_of_line ();
4264}
4265
4266/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4267 line number. */
4268
4269static void
98027b10 4270ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4271{
4272 symbolS *sym;
4273
4274 sym = symbol_make (".eb");
4275 S_SET_SEGMENT (sym, text_section);
809ffe0d 4276 symbol_set_frag (sym, frag_now);
252b5132
RH		 4277 S_SET_VALUE (sym, frag_now_fix ());
4278 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4279 S_SET_NUMBER_AUXILIARY (sym, 1);
4280 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4281 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4282
4283 SF_SET_PROCESS (sym);
4284
4285 ppc_frob_label (sym);
4286
4287 demand_empty_rest_of_line ();
4288}
4289
4290/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4291 specified name. */
4292
4293static void
98027b10 4294ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4295{
4296 char *name;
4297 int len;
4298 symbolS *sym;
4299
4300 name = demand_copy_C_string (&len);
4301 sym = symbol_make (name);
4302 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4303 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4304 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4305 S_SET_VALUE (sym, 0);
809ffe0d 4306 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4307
4308 ppc_frob_label (sym);
4309
4310 demand_empty_rest_of_line ();
4311}
4312
4313/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4314
4315static void
98027b10 4316ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4317{
4318 symbolS *sym;
4319
4320 sym = symbol_make (".ec");
4321 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4322 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4323 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4324 S_SET_VALUE (sym, 0);
809ffe0d 4325 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4326
4327 ppc_frob_label (sym);
4328
4329 demand_empty_rest_of_line ();
4330}
4331
4332/* The .toc pseudo-op. Switch to the .toc subsegment. */
4333
4334static void
98027b10 4335ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4336{
4337 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4338 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4339 else
4340 {
4341 subsegT subseg;
4342 symbolS *sym;
4343 symbolS *list;
81d4177b 4344
252b5132
RH		 4345 subseg = ppc_data_subsegment;
4346 ++ppc_data_subsegment;
4347
4348 subseg_new (segment_name (data_section), subseg);
4349 ppc_toc_frag = frag_now;
4350
4351 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4352 symbol_set_frag (sym, frag_now);
252b5132
RH		 4353 S_SET_SEGMENT (sym, data_section);
4354 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4355 symbol_get_tc (sym)->subseg = subseg;
4356 symbol_get_tc (sym)->output = 1;
4357 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4358
4359 ppc_toc_csect = sym;
81d4177b 4360
252b5132 4361 for (list = ppc_data_csects;
809ffe0d
ILT		 4362 symbol_get_tc (list)->next != (symbolS *) NULL;
4363 list = symbol_get_tc (list)->next)
252b5132 4364 ;
809ffe0d 4365 symbol_get_tc (list)->next = sym;
252b5132
RH		 4366
4367 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4368 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4369 &symbol_lastP);
252b5132
RH		 4370 }
4371
4372 ppc_current_csect = ppc_toc_csect;
4373
4374 demand_empty_rest_of_line ();
4375}
4376
4377/* The AIX assembler automatically aligns the operands of a .long or
4378 .short pseudo-op, and we want to be compatible. */
4379
4380static void
98027b10 4381ppc_xcoff_cons (int log_size)
252b5132
RH		 4382{
4383 frag_align (log_size, 0, 0);
4384 record_alignment (now_seg, log_size);
4385 cons (1 << log_size);
4386}
4387
4388static void
98027b10 4389ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4390{
4391 expressionS exp;
4392 int byte_count;
4393
4394 (void) expression (&exp);
4395
4396 if (exp.X_op != O_constant)
4397 {
4398 as_bad (_("non-constant byte count"));
4399 return;
4400 }
4401
4402 byte_count = exp.X_add_number;
4403
4404 if (*input_line_pointer != ',')
4405 {
4406 as_bad (_("missing value"));
4407 return;
4408 }
4409
4410 ++input_line_pointer;
4411 cons (byte_count);
4412}
4413
85645aed
TG		 4414void
4415ppc_xcoff_end (void)
4416{
4417 int i;
4418
4419 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4420 {
4421 struct dw_section *dws = &dw_sections[i];
4422 struct dw_subsection *dwss;
4423
4424 if (dws->anon_subseg)
4425 {
4426 dwss = dws->anon_subseg;
4427 dwss->link = dws->list_subseg;
4428 }
4429 else
4430 dwss = dws->list_subseg;
4431
4432 for (; dwss != NULL; dwss = dwss->link)
4433 if (dwss->end_exp.X_add_symbol != NULL)
4434 {
4435 subseg_set (dws->sect, dwss->subseg);
4436 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4437 }
4438 }
4439}
4440
252b5132 4441#endif /* OBJ_XCOFF */
0baf16f2 4442#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4443\f
4444/* The .tc pseudo-op. This is used when generating either XCOFF or
4445 ELF. This takes two or more arguments.
4446
4447 When generating XCOFF output, the first argument is the name to
4448 give to this location in the toc; this will be a symbol with class
0baf16f2 4449 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4450 this location in the TOC; often there is just one more argument, a
1049f94e 4451 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4452 depends on target word size. A 32-bit target uses 4-byte values, a
4453 64-bit target uses 8-byte values.
252b5132
RH		 4454
4455 When not generating XCOFF output, the arguments are the same, but
4456 the first argument is simply ignored. */
4457
4458static void
98027b10 4459ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4460{
4461#ifdef OBJ_XCOFF
4462
4463 /* Define the TOC symbol name. */
4464 {
4465 char *name;
4466 char endc;
4467 symbolS *sym;
4468
4469 if (ppc_toc_csect == (symbolS *) NULL
4470 || ppc_toc_csect != ppc_current_csect)
4471 {
4472 as_bad (_(".tc not in .toc section"));
4473 ignore_rest_of_line ();
4474 return;
4475 }
4476
4477 name = input_line_pointer;
4478 endc = get_symbol_end ();
4479
4480 sym = symbol_find_or_make (name);
4481
4482 *input_line_pointer = endc;
4483
4484 if (S_IS_DEFINED (sym))
4485 {
4486 symbolS *label;
4487
809ffe0d 4488 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4489 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4490 {
4491 as_bad (_(".tc with no label"));
4492 ignore_rest_of_line ();
4493 return;
4494 }
4495
4496 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4497 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4498 S_SET_VALUE (label, S_GET_VALUE (sym));
4499
4500 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4501 ++input_line_pointer;
4502
4503 return;
4504 }
4505
4506 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4507 symbol_set_frag (sym, frag_now);
252b5132 4508 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4509 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4510 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4511
4512 ppc_frob_label (sym);
4513 }
4514
0baf16f2
AM		 4515#endif /* OBJ_XCOFF */
4516#ifdef OBJ_ELF
9c7977b3 4517 int align;
252b5132
RH		 4518
4519 /* Skip the TOC symbol name. */
4520 while (is_part_of_name (*input_line_pointer)
d13d4015 4521 || *input_line_pointer == ' '
252b5132
RH		 4522 || *input_line_pointer == '['
4523 || *input_line_pointer == ']'
4524 || *input_line_pointer == '{'
4525 || *input_line_pointer == '}')
4526 ++input_line_pointer;
4527
0baf16f2 4528 /* Align to a four/eight byte boundary. */
2b3c4602 4529 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4530 frag_align (align, 0, 0);
4531 record_alignment (now_seg, align);
0baf16f2 4532#endif /* OBJ_ELF */
252b5132
RH		 4533
4534 if (*input_line_pointer != ',')
4535 demand_empty_rest_of_line ();
4536 else
4537 {
4538 ++input_line_pointer;
2b3c4602 4539 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4540 }
4541}
0baf16f2
AM		 4542
4543/* Pseudo-op .machine. */
0baf16f2
AM		 4544
4545static void
98027b10 4546ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4547{
69c040df
AM		 4548 char *cpu_string;
4549#define MAX_HISTORY 100
fa452fa6 4550 static ppc_cpu_t *cpu_history;
69c040df
AM		 4551 static int curr_hist;
4552
4553 SKIP_WHITESPACE ();
4554
4555 if (*input_line_pointer == '"')
4556 {
4557 int len;
4558 cpu_string = demand_copy_C_string (&len);
4559 }
4560 else
4561 {
4562 char c;
4563 cpu_string = input_line_pointer;
4564 c = get_symbol_end ();
4565 cpu_string = xstrdup (cpu_string);
4566 *input_line_pointer = c;
4567 }
4568
4569 if (cpu_string != NULL)
4570 {
fa452fa6 4571 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4572 ppc_cpu_t new_cpu;
69c040df
AM		 4573 char *p;
4574
4575 for (p = cpu_string; *p != 0; p++)
4576 *p = TOLOWER (*p);
4577
4578 if (strcmp (cpu_string, "push") == 0)
4579 {
4580 if (cpu_history == NULL)
4581 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4582
4583 if (curr_hist >= MAX_HISTORY)
4584 as_bad (_(".machine stack overflow"));
4585 else
4586 cpu_history[curr_hist++] = ppc_cpu;
4587 }
4588 else if (strcmp (cpu_string, "pop") == 0)
4589 {
4590 if (curr_hist <= 0)
4591 as_bad (_(".machine stack underflow"));
4592 else
4593 ppc_cpu = cpu_history[--curr_hist];
4594 }
69fe9ce5
AM		 4595 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4596 ppc_cpu = new_cpu;
69c040df
AM		 4597 else
4598 as_bad (_("invalid machine `%s'"), cpu_string);
4599
4600 if (ppc_cpu != old_cpu)
4601 ppc_setup_opcodes ();
4602 }
4603
4604 demand_empty_rest_of_line ();
0baf16f2
AM		 4605}
4606
4607/* See whether a symbol is in the TOC section. */
4608
4609static int
98027b10 4610ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4611{
4612#ifdef OBJ_XCOFF
96d56e9f 4613 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4614#endif
4615#ifdef OBJ_ELF
4616 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4617 if (ppc_obj64)
0baf16f2
AM		 4618 return strcmp (sname, ".toc") == 0;
4619 else
4620 return strcmp (sname, ".got") == 0;
4621#endif
4622}
4623#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4624\f
4625#ifdef TE_PE
4626
99a814a1 4627/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4628
4629/* Set the current section. */
4630static void
98027b10 4631ppc_set_current_section (segT new)
252b5132
RH		 4632{
4633 ppc_previous_section = ppc_current_section;
4634 ppc_current_section = new;
4635}
4636
4637/* pseudo-op: .previous
4638 behaviour: toggles the current section with the previous section.
4639 errors: None
99a814a1
AM		 4640 warnings: "No previous section" */
4641
252b5132 4642static void
98027b10 4643ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4644{
4645 symbolS *tmp;
4646
81d4177b 4647 if (ppc_previous_section == NULL)
252b5132 4648 {
99a814a1 4649 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4650 return;
4651 }
4652
99a814a1 4653 subseg_set (ppc_previous_section, 0);
252b5132 4654
99a814a1 4655 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4656}
4657
4658/* pseudo-op: .pdata
4659 behaviour: predefined read only data section
b34976b6 4660 double word aligned
252b5132
RH		 4661 errors: None
4662 warnings: None
4663 initial: .section .pdata "adr3"
b34976b6 4664 a - don't know -- maybe a misprint
252b5132
RH		 4665 d - initialized data
4666 r - readable
4667 3 - double word aligned (that would be 4 byte boundary)
4668
4669 commentary:
4670 Tag index tables (also known as the function table) for exception
99a814a1 4671 handling, debugging, etc. */
252b5132 4672
252b5132 4673static void
98027b10 4674ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4675{
81d4177b 4676 if (pdata_section == 0)
252b5132
RH		 4677 {
4678 pdata_section = subseg_new (".pdata", 0);
81d4177b 4679
252b5132
RH		 4680 bfd_set_section_flags (stdoutput, pdata_section,
4681 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4682 | SEC_READONLY | SEC_DATA ));
81d4177b 4683
252b5132
RH		 4684 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4685 }
4686 else
4687 {
99a814a1 4688 pdata_section = subseg_new (".pdata", 0);
252b5132 4689 }
99a814a1 4690 ppc_set_current_section (pdata_section);
252b5132
RH		 4691}
4692
4693/* pseudo-op: .ydata
4694 behaviour: predefined read only data section
b34976b6 4695 double word aligned
252b5132
RH		 4696 errors: None
4697 warnings: None
4698 initial: .section .ydata "drw3"
b34976b6 4699 a - don't know -- maybe a misprint
252b5132
RH		 4700 d - initialized data
4701 r - readable
4702 3 - double word aligned (that would be 4 byte boundary)
4703 commentary:
4704 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4705 debugging, etc. */
4706
252b5132 4707static void
98027b10 4708ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4709{
81d4177b 4710 if (ydata_section == 0)
252b5132
RH		 4711 {
4712 ydata_section = subseg_new (".ydata", 0);
4713 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4714 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4715 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4716
4717 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4718 }
4719 else
4720 {
4721 ydata_section = subseg_new (".ydata", 0);
4722 }
99a814a1 4723 ppc_set_current_section (ydata_section);
252b5132
RH		 4724}
4725
4726/* pseudo-op: .reldata
4727 behaviour: predefined read write data section
b34976b6 4728 double word aligned (4-byte)
252b5132
RH		 4729 FIXME: relocation is applied to it
4730 FIXME: what's the difference between this and .data?
4731 errors: None
4732 warnings: None
4733 initial: .section .reldata "drw3"
4734 d - initialized data
4735 r - readable
4736 w - writeable
4737 3 - double word aligned (that would be 8 byte boundary)
4738
4739 commentary:
4740 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4741 function descriptors, etc. */
4742
252b5132 4743static void
98027b10 4744ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4745{
4746 if (reldata_section == 0)
4747 {
4748 reldata_section = subseg_new (".reldata", 0);
4749
4750 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4751 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4752 | SEC_DATA));
252b5132
RH		 4753
4754 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4755 }
4756 else
4757 {
4758 reldata_section = subseg_new (".reldata", 0);
4759 }
99a814a1 4760 ppc_set_current_section (reldata_section);
252b5132
RH		 4761}
4762
4763/* pseudo-op: .rdata
4764 behaviour: predefined read only data section
b34976b6 4765 double word aligned
252b5132
RH		 4766 errors: None
4767 warnings: None
4768 initial: .section .rdata "dr3"
4769 d - initialized data
4770 r - readable
99a814a1
AM		 4771 3 - double word aligned (that would be 4 byte boundary) */
4772
252b5132 4773static void
98027b10 4774ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4775{
4776 if (rdata_section == 0)
4777 {
4778 rdata_section = subseg_new (".rdata", 0);
4779 bfd_set_section_flags (stdoutput, rdata_section,
4780 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4781 | SEC_READONLY | SEC_DATA ));
4782
4783 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4784 }
4785 else
4786 {
4787 rdata_section = subseg_new (".rdata", 0);
4788 }
99a814a1 4789 ppc_set_current_section (rdata_section);
252b5132
RH		 4790}
4791
4792/* pseudo-op: .ualong
81d4177b 4793 behaviour: much like .int, with the exception that no alignment is
b34976b6 4794 performed.
252b5132
RH		 4795 FIXME: test the alignment statement
4796 errors: None
99a814a1
AM		 4797 warnings: None */
4798
252b5132 4799static void
98027b10 4800ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4801{
99a814a1
AM		 4802 /* Try for long. */
4803 cons (4);
252b5132
RH		 4804}
4805
4806/* pseudo-op: .znop <symbol name>
4807 behaviour: Issue a nop instruction
b34976b6 4808 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4809 the supplied symbol name.
4810 errors: None
99a814a1
AM		 4811 warnings: Missing symbol name */
4812
252b5132 4813static void
98027b10 4814ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4815{
4816 unsigned long insn;
4817 const struct powerpc_opcode *opcode;
4818 expressionS ex;
4819 char *f;
252b5132 4820 symbolS *sym;
252b5132
RH		 4821 char *symbol_name;
4822 char c;
4823 char *name;
4824 unsigned int exp;
4825 flagword flags;
4826 asection *sec;
4827
99a814a1 4828 /* Strip out the symbol name. */
252b5132
RH		 4829 symbol_name = input_line_pointer;
4830 c = get_symbol_end ();
4831
4832 name = xmalloc (input_line_pointer - symbol_name + 1);
4833 strcpy (name, symbol_name);
4834
4835 sym = symbol_find_or_make (name);
4836
4837 *input_line_pointer = c;
4838
4839 SKIP_WHITESPACE ();
4840
4841 /* Look up the opcode in the hash table. */
4842 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4843
99a814a1 4844 /* Stick in the nop. */
252b5132
RH		 4845 insn = opcode->opcode;
4846
4847 /* Write out the instruction. */
4848 f = frag_more (4);
4849 md_number_to_chars (f, insn, 4);
4850 fix_new (frag_now,
4851 f - frag_now->fr_literal,
4852 4,
4853 sym,
4854 0,
4855 0,
4856 BFD_RELOC_16_GOT_PCREL);
4857
4858}
4859
81d4177b
KH		 4860/* pseudo-op:
4861 behaviour:
4862 errors:
99a814a1
AM		 4863 warnings: */
4864
252b5132 4865static void
98027b10 4866ppc_pe_comm (int lcomm)
252b5132 4867{
98027b10
AM		 4868 char *name;
4869 char c;
4870 char *p;
252b5132 4871 offsetT temp;
98027b10 4872 symbolS *symbolP;
252b5132
RH		 4873 offsetT align;
4874
4875 name = input_line_pointer;
4876 c = get_symbol_end ();
4877
99a814a1 4878 /* just after name is now '\0'. */
252b5132
RH		 4879 p = input_line_pointer;
4880 *p = c;
4881 SKIP_WHITESPACE ();
4882 if (*input_line_pointer != ',')
4883 {
4884 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4885 ignore_rest_of_line ();
4886 return;
4887 }
4888
4889 input_line_pointer++; /* skip ',' */
4890 if ((temp = get_absolute_expression ()) < 0)
4891 {
4892 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4893 ignore_rest_of_line ();
4894 return;
4895 }
4896
4897 if (! lcomm)
4898 {
4899 /* The third argument to .comm is the alignment. */
4900 if (*input_line_pointer != ',')
4901 align = 3;
4902 else
4903 {
4904 ++input_line_pointer;
4905 align = get_absolute_expression ();
4906 if (align <= 0)
4907 {
4908 as_warn (_("ignoring bad alignment"));
4909 align = 3;
4910 }
4911 }
4912 }
4913
4914 *p = 0;
4915 symbolP = symbol_find_or_make (name);
4916
4917 *p = c;
4918 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4919 {
4920 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4921 S_GET_NAME (symbolP));
4922 ignore_rest_of_line ();
4923 return;
4924 }
4925
4926 if (S_GET_VALUE (symbolP))
4927 {
4928 if (S_GET_VALUE (symbolP) != (valueT) temp)
4929 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4930 S_GET_NAME (symbolP),
4931 (long) S_GET_VALUE (symbolP),
4932 (long) temp);
4933 }
4934 else
4935 {
4936 S_SET_VALUE (symbolP, (valueT) temp);
4937 S_SET_EXTERNAL (symbolP);
86ebace2 4938 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4939 }
4940
4941 demand_empty_rest_of_line ();
4942}
4943
4944/*
4945 * implement the .section pseudo op:
4946 * .section name {, "flags"}
4947 * ^ ^
4948 * | +--- optional flags: 'b' for bss
4949 * | 'i' for info
4950 * +-- section name 'l' for lib
4951 * 'n' for noload
4952 * 'o' for over
4953 * 'w' for data
4954 * 'd' (apparently m88k for data)
4955 * 'x' for text
4956 * But if the argument is not a quoted string, treat it as a
4957 * subsegment number.
4958 *
4959 * FIXME: this is a copy of the section processing from obj-coff.c, with
4960 * additions/changes for the moto-pas assembler support. There are three
4961 * categories:
4962 *
81d4177b 4963 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4964 * setting bits that bfd probably neither understands or uses. The
4965 * correct approach (?) will have to incorporate extra fields attached
4966 * to the section to hold the system specific stuff. (krk)
4967 *
4968 * Section Contents:
4969 * 'a' - unknown - referred to in documentation, but no definition supplied
4970 * 'c' - section has code
4971 * 'd' - section has initialized data
4972 * 'u' - section has uninitialized data
4973 * 'i' - section contains directives (info)
4974 * 'n' - section can be discarded
4975 * 'R' - remove section at link time
4976 *
4977 * Section Protection:
4978 * 'r' - section is readable
4979 * 'w' - section is writeable
4980 * 'x' - section is executable
4981 * 's' - section is sharable
4982 *
4983 * Section Alignment:
4984 * '0' - align to byte boundary
4985 * '1' - align to halfword undary
4986 * '2' - align to word boundary
4987 * '3' - align to doubleword boundary
4988 * '4' - align to quadword boundary
4989 * '5' - align to 32 byte boundary
4990 * '6' - align to 64 byte boundary
4991 *
4992 */
4993
4994void
98027b10 4995ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4996{
99a814a1 4997 /* Strip out the section name. */
252b5132
RH		 4998 char *section_name;
4999 char c;
5000 char *name;
5001 unsigned int exp;
5002 flagword flags;
5003 segT sec;
5004 int align;
5005
5006 section_name = input_line_pointer;
5007 c = get_symbol_end ();
5008
5009 name = xmalloc (input_line_pointer - section_name + 1);
5010 strcpy (name, section_name);
5011
5012 *input_line_pointer = c;
5013
5014 SKIP_WHITESPACE ();
5015
5016 exp = 0;
5017 flags = SEC_NO_FLAGS;
5018
5019 if (strcmp (name, ".idata$2") == 0)
5020 {
5021 align = 0;
5022 }
5023 else if (strcmp (name, ".idata$3") == 0)
5024 {
5025 align = 0;
5026 }
5027 else if (strcmp (name, ".idata$4") == 0)
5028 {
5029 align = 2;
5030 }
5031 else if (strcmp (name, ".idata$5") == 0)
5032 {
5033 align = 2;
5034 }
5035 else if (strcmp (name, ".idata$6") == 0)
5036 {
5037 align = 1;
5038 }
5039 else
99a814a1
AM		 5040 /* Default alignment to 16 byte boundary. */
5041 align = 4;
252b5132
RH		 5042
5043 if (*input_line_pointer == ',')
5044 {
5045 ++input_line_pointer;
5046 SKIP_WHITESPACE ();
5047 if (*input_line_pointer != '"')
5048 exp = get_absolute_expression ();
5049 else
5050 {
5051 ++input_line_pointer;
5052 while (*input_line_pointer != '"'
5053 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5054 {
5055 switch (*input_line_pointer)
5056 {
5057 /* Section Contents */
5058 case 'a': /* unknown */
5059 as_bad (_("Unsupported section attribute -- 'a'"));
5060 break;
5061 case 'c': /* code section */
81d4177b 5062 flags |= SEC_CODE;
252b5132
RH		 5063 break;
5064 case 'd': /* section has initialized data */
5065 flags |= SEC_DATA;
5066 break;
5067 case 'u': /* section has uninitialized data */
5068 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5069 in winnt.h */
5070 flags |= SEC_ROM;
5071 break;
5072 case 'i': /* section contains directives (info) */
5073 /* FIXME: This is IMAGE_SCN_LNK_INFO
5074 in winnt.h */
5075 flags |= SEC_HAS_CONTENTS;
5076 break;
5077 case 'n': /* section can be discarded */
81d4177b 5078 flags &=~ SEC_LOAD;
252b5132
RH		 5079 break;
5080 case 'R': /* Remove section at link time */
5081 flags |= SEC_NEVER_LOAD;
5082 break;
8d452c78 5083#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5084 /* Section Protection */
5085 case 'r': /* section is readable */
5086 flags |= IMAGE_SCN_MEM_READ;
5087 break;
5088 case 'w': /* section is writeable */
5089 flags |= IMAGE_SCN_MEM_WRITE;
5090 break;
5091 case 'x': /* section is executable */
5092 flags |= IMAGE_SCN_MEM_EXECUTE;
5093 break;
5094 case 's': /* section is sharable */
5095 flags |= IMAGE_SCN_MEM_SHARED;
5096 break;
5097
5098 /* Section Alignment */
5099 case '0': /* align to byte boundary */
5100 flags |= IMAGE_SCN_ALIGN_1BYTES;
5101 align = 0;
5102 break;
5103 case '1': /* align to halfword boundary */
5104 flags |= IMAGE_SCN_ALIGN_2BYTES;
5105 align = 1;
5106 break;
5107 case '2': /* align to word boundary */
5108 flags |= IMAGE_SCN_ALIGN_4BYTES;
5109 align = 2;
5110 break;
5111 case '3': /* align to doubleword boundary */
5112 flags |= IMAGE_SCN_ALIGN_8BYTES;
5113 align = 3;
5114 break;
5115 case '4': /* align to quadword boundary */
5116 flags |= IMAGE_SCN_ALIGN_16BYTES;
5117 align = 4;
5118 break;
5119 case '5': /* align to 32 byte boundary */
5120 flags |= IMAGE_SCN_ALIGN_32BYTES;
5121 align = 5;
5122 break;
5123 case '6': /* align to 64 byte boundary */
5124 flags |= IMAGE_SCN_ALIGN_64BYTES;
5125 align = 6;
5126 break;
8d452c78 5127#endif
252b5132 5128 default:
99a814a1
AM		 5129 as_bad (_("unknown section attribute '%c'"),
5130 *input_line_pointer);
252b5132
RH		 5131 break;
5132 }
5133 ++input_line_pointer;
5134 }
5135 if (*input_line_pointer == '"')
5136 ++input_line_pointer;
5137 }
5138 }
5139
5140 sec = subseg_new (name, (subsegT) exp);
5141
99a814a1 5142 ppc_set_current_section (sec);
252b5132
RH		 5143
5144 if (flags != SEC_NO_FLAGS)
5145 {
5146 if (! bfd_set_section_flags (stdoutput, sec, flags))
5147 as_bad (_("error setting flags for \"%s\": %s"),
5148 bfd_section_name (stdoutput, sec),
5149 bfd_errmsg (bfd_get_error ()));
5150 }
5151
99a814a1 5152 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5153}
5154
5155static void
98027b10 5156ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5157{
5158 char *name;
5159 char endc;
5160 symbolS *ext_sym;
5161
5162 name = input_line_pointer;
5163 endc = get_symbol_end ();
5164
5165 ext_sym = symbol_find_or_make (name);
5166
5167 *input_line_pointer = endc;
5168
5169 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5170 SF_SET_FUNCTION (ext_sym);
5171 SF_SET_PROCESS (ext_sym);
5172 coff_add_linesym (ext_sym);
5173
5174 demand_empty_rest_of_line ();
5175}
5176
5177static void
98027b10 5178ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5179{
5180 if (tocdata_section == 0)
5181 {
5182 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5183 /* FIXME: section flags won't work. */
252b5132
RH		 5184 bfd_set_section_flags (stdoutput, tocdata_section,
5185 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5186 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5187
5188 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5189 }
5190 else
5191 {
5192 rdata_section = subseg_new (".tocd", 0);
5193 }
5194
99a814a1 5195 ppc_set_current_section (tocdata_section);
252b5132
RH		 5196
5197 demand_empty_rest_of_line ();
5198}
5199
5200/* Don't adjust TOC relocs to use the section symbol. */
5201
5202int
98027b10 5203ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5204{
5205 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5206}
5207
5208#endif
5209\f
5210#ifdef OBJ_XCOFF
5211
5212/* XCOFF specific symbol and file handling. */
5213
5214/* Canonicalize the symbol name. We use the to force the suffix, if
5215 any, to use square brackets, and to be in upper case. */
5216
5217char *
98027b10 5218ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5219{
5220 char *s;
5221
5222 if (ppc_stab_symbol)
5223 return name;
5224
5225 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5226 ;
5227 if (*s != '\0')
5228 {
5229 char brac;
5230
5231 if (*s == '[')
5232 brac = ']';
5233 else
5234 {
5235 *s = '[';
5236 brac = '}';
5237 }
5238
5239 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5240 *s = TOUPPER (*s);
252b5132
RH		 5241
5242 if (*s == '\0' || s[1] != '\0')
5243 as_bad (_("bad symbol suffix"));
5244
5245 *s = ']';
5246 }
5247
5248 return name;
5249}
5250
5251/* Set the class of a symbol based on the suffix, if any. This is
5252 called whenever a new symbol is created. */
5253
5254void
98027b10 5255ppc_symbol_new_hook (symbolS *sym)
252b5132 5256{
809ffe0d 5257 struct ppc_tc_sy *tc;
252b5132
RH		 5258 const char *s;
5259
809ffe0d
ILT		 5260 tc = symbol_get_tc (sym);
5261 tc->next = NULL;
5262 tc->output = 0;
96d56e9f 5263 tc->symbol_class = -1;
809ffe0d
ILT		 5264 tc->real_name = NULL;
5265 tc->subseg = 0;
5266 tc->align = 0;
85645aed
TG		 5267 tc->u.size = NULL;
5268 tc->u.dw = NULL;
809ffe0d 5269 tc->within = NULL;
252b5132
RH		 5270
5271 if (ppc_stab_symbol)
5272 return;
5273
5274 s = strchr (S_GET_NAME (sym), '[');
5275 if (s == (const char *) NULL)
5276 {
5277 /* There is no suffix. */
5278 return;
5279 }
5280
5281 ++s;
5282
5283 switch (s[0])
5284 {
5285 case 'B':
5286 if (strcmp (s, "BS]") == 0)
96d56e9f 5287 tc->symbol_class = XMC_BS;
252b5132
RH		 5288 break;
5289 case 'D':
5290 if (strcmp (s, "DB]") == 0)
96d56e9f 5291 tc->symbol_class = XMC_DB;
252b5132 5292 else if (strcmp (s, "DS]") == 0)
96d56e9f 5293 tc->symbol_class = XMC_DS;
252b5132
RH		 5294 break;
5295 case 'G':
5296 if (strcmp (s, "GL]") == 0)
96d56e9f 5297 tc->symbol_class = XMC_GL;
252b5132
RH		 5298 break;
5299 case 'P':
5300 if (strcmp (s, "PR]") == 0)
96d56e9f 5301 tc->symbol_class = XMC_PR;
252b5132
RH		 5302 break;
5303 case 'R':
5304 if (strcmp (s, "RO]") == 0)
96d56e9f 5305 tc->symbol_class = XMC_RO;
252b5132 5306 else if (strcmp (s, "RW]") == 0)
96d56e9f 5307 tc->symbol_class = XMC_RW;
252b5132
RH		 5308 break;
5309 case 'S':
5310 if (strcmp (s, "SV]") == 0)
96d56e9f 5311 tc->symbol_class = XMC_SV;
252b5132
RH		 5312 break;
5313 case 'T':
5314 if (strcmp (s, "TC]") == 0)
96d56e9f 5315 tc->symbol_class = XMC_TC;
252b5132 5316 else if (strcmp (s, "TI]") == 0)
96d56e9f 5317 tc->symbol_class = XMC_TI;
252b5132 5318 else if (strcmp (s, "TB]") == 0)
96d56e9f 5319 tc->symbol_class = XMC_TB;
252b5132 5320 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5321 tc->symbol_class = XMC_TC0;
252b5132
RH		 5322 break;
5323 case 'U':
5324 if (strcmp (s, "UA]") == 0)
96d56e9f 5325 tc->symbol_class = XMC_UA;
252b5132 5326 else if (strcmp (s, "UC]") == 0)
96d56e9f 5327 tc->symbol_class = XMC_UC;
252b5132
RH		 5328 break;
5329 case 'X':
5330 if (strcmp (s, "XO]") == 0)
96d56e9f 5331 tc->symbol_class = XMC_XO;
252b5132
RH		 5332 break;
5333 }
5334
96d56e9f 5335 if (tc->symbol_class == -1)
252b5132
RH		 5336 as_bad (_("Unrecognized symbol suffix"));
5337}
5338
5339/* Set the class of a label based on where it is defined. This
5340 handles symbols without suffixes. Also, move the symbol so that it
5341 follows the csect symbol. */
5342
5343void
98027b10 5344ppc_frob_label (symbolS *sym)
252b5132
RH		 5345{
5346 if (ppc_current_csect != (symbolS *) NULL)
5347 {
96d56e9f
NC		 5348 if (symbol_get_tc (sym)->symbol_class == -1)
5349 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5350
5351 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5352 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5353 &symbol_rootP, &symbol_lastP);
5354 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5355 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5356 }
07a53e5c
RH		 5357
5358#ifdef OBJ_ELF
5359 dwarf2_emit_label (sym);
5360#endif
252b5132
RH		 5361}
5362
5363/* This variable is set by ppc_frob_symbol if any absolute symbols are
5364 seen. It tells ppc_adjust_symtab whether it needs to look through
5365 the symbols. */
5366
b34976b6 5367static bfd_boolean ppc_saw_abs;
252b5132
RH		 5368
5369/* Change the name of a symbol just before writing it out. Set the
5370 real name if the .rename pseudo-op was used. Otherwise, remove any
5371 class suffix. Return 1 if the symbol should not be included in the
5372 symbol table. */
5373
5374int
98027b10 5375ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5376{
5377 static symbolS *ppc_last_function;
5378 static symbolS *set_end;
5379
5380 /* Discard symbols that should not be included in the output symbol
5381 table. */
809ffe0d
ILT		 5382 if (! symbol_used_in_reloc_p (sym)
5383 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5384 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5385 && ! symbol_get_tc (sym)->output
252b5132
RH		 5386 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5387 return 1;
5388
a161fe53
AM		 5389 /* This one will disappear anyway. Don't make a csect sym for it. */
5390 if (sym == abs_section_sym)
5391 return 1;
5392
809ffe0d
ILT		 5393 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5394 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5395 else
5396 {
5397 const char *name;
5398 const char *s;
5399
5400 name = S_GET_NAME (sym);
5401 s = strchr (name, '[');
5402 if (s != (char *) NULL)
5403 {
5404 unsigned int len;
5405 char *snew;
5406
5407 len = s - name;
5408 snew = xmalloc (len + 1);
5409 memcpy (snew, name, len);
5410 snew[len] = '\0';
5411
5412 S_SET_NAME (sym, snew);
5413 }
5414 }
5415
5416 if (set_end != (symbolS *) NULL)
5417 {
5418 SA_SET_SYM_ENDNDX (set_end, sym);
5419 set_end = NULL;
5420 }
5421
5422 if (SF_GET_FUNCTION (sym))
5423 {
5424 if (ppc_last_function != (symbolS *) NULL)
5425 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5426 ppc_last_function = sym;
85645aed 5427 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5428 {
85645aed 5429 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5430 SA_SET_SYM_FSIZE (sym,
85645aed 5431 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5432 }
5433 }
5434 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5435 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5436 {
5437 if (ppc_last_function == (symbolS *) NULL)
5438 as_bad (_(".ef with no preceding .function"));
5439 else
5440 {
5441 set_end = ppc_last_function;
5442 ppc_last_function = NULL;
5443
5444 /* We don't have a C_EFCN symbol, but we need to force the
5445 COFF backend to believe that it has seen one. */
5446 coff_last_function = NULL;
5447 }
5448 }
5449
670ec21d 5450 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5451 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5452 && S_GET_STORAGE_CLASS (sym) != C_FILE
5453 && S_GET_STORAGE_CLASS (sym) != C_FCN
5454 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5455 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5456 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5457 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5458 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5459 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5460 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5461
5462 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5463 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5464 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5465 {
5466 int i;
5467 union internal_auxent *a;
5468
5469 /* Create a csect aux. */
5470 i = S_GET_NUMBER_AUXILIARY (sym);
5471 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5472 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5473 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5474 {
5475 /* This is the TOC table. */
5476 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5477 a->x_csect.x_scnlen.l = 0;
5478 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5479 }
809ffe0d 5480 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5481 {
5482 /* This is a csect symbol. x_scnlen is the size of the
5483 csect. */
809ffe0d 5484 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5485 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5486 S_GET_SEGMENT (sym))
5487 - S_GET_VALUE (sym));
5488 else
5489 {
6386f3a7 5490 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5491 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5492 - S_GET_VALUE (sym));
5493 }
809ffe0d 5494 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5495 }
5496 else if (S_GET_SEGMENT (sym) == bss_section)
5497 {
5498 /* This is a common symbol. */
809ffe0d
ILT		 5499 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5500 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5501 if (S_IS_EXTERNAL (sym))
96d56e9f 5502 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5503 else
96d56e9f 5504 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5505 }
5506 else if (S_GET_SEGMENT (sym) == absolute_section)
5507 {
5508 /* This is an absolute symbol. The csect will be created by
99a814a1 5509 ppc_adjust_symtab. */
b34976b6 5510 ppc_saw_abs = TRUE;
252b5132 5511 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5512 if (symbol_get_tc (sym)->symbol_class == -1)
5513 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5514 }
5515 else if (! S_IS_DEFINED (sym))
5516 {
5517 /* This is an external symbol. */
5518 a->x_csect.x_scnlen.l = 0;
5519 a->x_csect.x_smtyp = XTY_ER;
5520 }
96d56e9f 5521 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5522 {
5523 symbolS *next;
5524
5525 /* This is a TOC definition. x_scnlen is the size of the
5526 TOC entry. */
5527 next = symbol_next (sym);
96d56e9f 5528 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5529 next = symbol_next (next);
5530 if (next == (symbolS *) NULL
96d56e9f 5531 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5532 {
5533 if (ppc_after_toc_frag == (fragS *) NULL)
5534 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5535 data_section)
5536 - S_GET_VALUE (sym));
5537 else
5538 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5539 - S_GET_VALUE (sym));
5540 }
5541 else
5542 {
6386f3a7 5543 resolve_symbol_value (next);
252b5132
RH		 5544 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5545 - S_GET_VALUE (sym));
5546 }
5547 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5548 }
5549 else
5550 {
5551 symbolS *csect;
5552
5553 /* This is a normal symbol definition. x_scnlen is the
5554 symbol index of the containing csect. */
5555 if (S_GET_SEGMENT (sym) == text_section)
5556 csect = ppc_text_csects;
5557 else if (S_GET_SEGMENT (sym) == data_section)
5558 csect = ppc_data_csects;
5559 else
5560 abort ();
5561
5562 /* Skip the initial dummy symbol. */
809ffe0d 5563 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5564
5565 if (csect == (symbolS *) NULL)
5566 {
5567 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5568 a->x_csect.x_scnlen.l = 0;
5569 }
5570 else
5571 {
809ffe0d 5572 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5573 {
6386f3a7 5574 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5575 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5576 > S_GET_VALUE (sym))
252b5132 5577 break;
809ffe0d 5578 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5579 }
5580
809ffe0d
ILT		 5581 a->x_csect.x_scnlen.p =
5582 coffsymbol (symbol_get_bfdsym (csect))->native;
5583 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5584 1;
252b5132
RH		 5585 }
5586 a->x_csect.x_smtyp = XTY_LD;
5587 }
81d4177b 5588
252b5132
RH		 5589 a->x_csect.x_parmhash = 0;
5590 a->x_csect.x_snhash = 0;
96d56e9f 5591 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5592 a->x_csect.x_smclas = XMC_PR;
5593 else
96d56e9f 5594 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5595 a->x_csect.x_stab = 0;
5596 a->x_csect.x_snstab = 0;
5597
5598 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5599 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5600 }
5601 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5602 {
5603 /* We want the value to be the symbol index of the referenced
5604 csect symbol. BFD will do that for us if we set the right
5605 flags. */
b782de16
AM		 5606 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5607 combined_entry_type *c = coffsymbol (bsym)->native;
5608
5609 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5610 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5611 }
5612 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5613 {
5614 symbolS *block;
c734e7e3 5615 valueT base;
252b5132 5616
809ffe0d 5617 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5618 if (block)
5619 {
5620 /* The value is the offset from the enclosing csect. */
5621 symbolS *csect;
5622
5623 csect = symbol_get_tc (block)->within;
5624 resolve_symbol_value (csect);
5625 base = S_GET_VALUE (csect);
5626 }
5627 else
5628 base = 0;
5629
5630 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 5631 }
5632 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5633 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5634 {
5635 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5636 BFD will do that for us if we set the right flags. We have
5637 already set the value correctly. */
809ffe0d 5638 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5639 }
5640
5641 return 0;
5642}
5643
5644/* Adjust the symbol table. This creates csect symbols for all
5645 absolute symbols. */
5646
5647void
98027b10 5648ppc_adjust_symtab (void)
252b5132
RH		 5649{
5650 symbolS *sym;
5651
5652 if (! ppc_saw_abs)
5653 return;
5654
5655 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5656 {
5657 symbolS *csect;
5658 int i;
5659 union internal_auxent *a;
5660
5661 if (S_GET_SEGMENT (sym) != absolute_section)
5662 continue;
5663
5664 csect = symbol_create (".abs[XO]", absolute_section,
5665 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5666 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5667 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5668 i = S_GET_NUMBER_AUXILIARY (csect);
5669 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5670 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5671 a->x_csect.x_scnlen.l = 0;
5672 a->x_csect.x_smtyp = XTY_SD;
5673 a->x_csect.x_parmhash = 0;
5674 a->x_csect.x_snhash = 0;
5675 a->x_csect.x_smclas = XMC_XO;
5676 a->x_csect.x_stab = 0;
5677 a->x_csect.x_snstab = 0;
5678
5679 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5680
5681 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5682 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5683 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5684 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5685 }
5686
b34976b6 5687 ppc_saw_abs = FALSE;
252b5132
RH		 5688}
5689
5690/* Set the VMA for a section. This is called on all the sections in
5691 turn. */
5692
5693void
98027b10 5694ppc_frob_section (asection *sec)
252b5132 5695{
931e13a6 5696 static bfd_vma vma = 0;
252b5132 5697
85645aed
TG		 5698 /* Dwarf sections start at 0. */
5699 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
5700 return;
5701
931e13a6 5702 vma = md_section_align (sec, vma);
252b5132
RH		 5703 bfd_set_section_vma (stdoutput, sec, vma);
5704 vma += bfd_section_size (stdoutput, sec);
5705}
5706
5707#endif /* OBJ_XCOFF */
5708\f
252b5132 5709char *
98027b10 5710md_atof (int type, char *litp, int *sizep)
252b5132 5711{
499ac353 5712 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5713}
5714
5715/* Write a value out to the object file, using the appropriate
5716 endianness. */
5717
5718void
98027b10 5719md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5720{
5721 if (target_big_endian)
5722 number_to_chars_bigendian (buf, val, n);
5723 else
5724 number_to_chars_littleendian (buf, val, n);
5725}
5726
5727/* Align a section (I don't know why this is machine dependent). */
5728
5729valueT
3aeeedbb 5730md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5731{
3aeeedbb
AM		 5732#ifdef OBJ_ELF
5733 return addr;
5734#else
252b5132
RH		 5735 int align = bfd_get_section_alignment (stdoutput, seg);
5736
5737 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5738#endif
252b5132
RH		 5739}
5740
5741/* We don't have any form of relaxing. */
5742
5743int
98027b10
AM		 5744md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5745 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5746{
5747 abort ();
5748 return 0;
5749}
5750
5751/* Convert a machine dependent frag. We never generate these. */
5752
5753void
98027b10
AM		 5754md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5755 asection *sec ATTRIBUTE_UNUSED,
5756 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5757{
5758 abort ();
5759}
5760
5761/* We have no need to default values of symbols. */
5762
252b5132 5763symbolS *
98027b10 5764md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5765{
5766 return 0;
5767}
5768\f
5769/* Functions concerning relocs. */
5770
5771/* The location from which a PC relative jump should be calculated,
5772 given a PC relative reloc. */
5773
5774long
98027b10 5775md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5776{
5777 return fixp->fx_frag->fr_address + fixp->fx_where;
5778}
5779
5780#ifdef OBJ_XCOFF
5781
5782/* This is called to see whether a fixup should be adjusted to use a
5783 section symbol. We take the opportunity to change a fixup against
5784 a symbol in the TOC subsegment into a reloc against the
5785 corresponding .tc symbol. */
5786
5787int
98027b10 5788ppc_fix_adjustable (fixS *fix)
252b5132 5789{
b782de16
AM		 5790 valueT val = resolve_symbol_value (fix->fx_addsy);
5791 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5792 TC_SYMFIELD_TYPE *tc;
5793
5794 if (symseg == absolute_section)
5795 return 0;
252b5132 5796
85645aed
TG		 5797 /* Always adjust symbols in debugging sections. */
5798 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
5799 return 1;
5800
252b5132 5801 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5802 && fix->fx_addsy != ppc_toc_csect
b782de16 5803 && symseg == data_section
252b5132
RH		 5804 && val >= ppc_toc_frag->fr_address
5805 && (ppc_after_toc_frag == (fragS *) NULL
5806 || val < ppc_after_toc_frag->fr_address))
5807 {
5808 symbolS *sy;
5809
5810 for (sy = symbol_next (ppc_toc_csect);
5811 sy != (symbolS *) NULL;
5812 sy = symbol_next (sy))
5813 {
b782de16
AM		 5814 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5815
96d56e9f 5816 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5817 continue;
96d56e9f 5818 if (sy_tc->symbol_class != XMC_TC)
252b5132 5819 break;
b782de16 5820 if (val == resolve_symbol_value (sy))
252b5132
RH		 5821 {
5822 fix->fx_addsy = sy;
5823 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5824 return 0;
5825 }
5826 }
5827
5828 as_bad_where (fix->fx_file, fix->fx_line,
5829 _("symbol in .toc does not match any .tc"));
5830 }
5831
5832 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5833 tc = symbol_get_tc (fix->fx_addsy);
5834 if (tc->subseg == 0
96d56e9f
NC		 5835 && tc->symbol_class != XMC_TC0
5836 && tc->symbol_class != XMC_TC
b782de16 5837 && symseg != bss_section
252b5132 5838 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5839 && (symseg != data_section
252b5132
RH		 5840 || ppc_toc_csect == NULL
5841 || val < ppc_toc_frag->fr_address
5842 || (ppc_after_toc_frag != NULL
5843 && val >= ppc_after_toc_frag->fr_address)))
5844 {
2fb4b302 5845 symbolS *csect = tc->within;
252b5132 5846
2fb4b302
TG		 5847 /* If the symbol was not declared by a label (eg: a section symbol),
5848 use the section instead of the csect. This doesn't happen in
5849 normal AIX assembly code. */
5850 if (csect == NULL)
5851 csect = seg_info (symseg)->sym;
252b5132 5852
2fb4b302
TG		 5853 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
5854 fix->fx_addsy = csect;
252b5132 5855
b782de16 5856 return 0;
252b5132
RH		 5857 }
5858
5859 /* Adjust a reloc against a .lcomm symbol to be against the base
5860 .lcomm. */
b782de16 5861 if (symseg == bss_section
252b5132
RH		 5862 && ! S_IS_EXTERNAL (fix->fx_addsy))
5863 {
b782de16
AM		 5864 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5865
5866 fix->fx_offset += val - resolve_symbol_value (sy);
5867 fix->fx_addsy = sy;
252b5132
RH		 5868 }
5869
5870 return 0;
5871}
5872
5873/* A reloc from one csect to another must be kept. The assembler
5874 will, of course, keep relocs between sections, and it will keep
5875 absolute relocs, but we need to force it to keep PC relative relocs
5876 between two csects in the same section. */
5877
5878int
98027b10 5879ppc_force_relocation (fixS *fix)
252b5132
RH		 5880{
5881 /* At this point fix->fx_addsy should already have been converted to
5882 a csect symbol. If the csect does not include the fragment, then
5883 we need to force the relocation. */
5884 if (fix->fx_pcrel
5885 && fix->fx_addsy != NULL
809ffe0d
ILT		 5886 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5887 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5888 > fix->fx_frag->fr_address)
5889 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5890 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5891 <= fix->fx_frag->fr_address))))
5892 return 1;
5893
ae6063d4 5894 return generic_force_reloc (fix);
252b5132
RH		 5895}
5896
2fb4b302
TG		 5897void
5898ppc_new_dot_label (symbolS *sym)
5899{
5900 /* Anchor this label to the current csect for relocations. */
5901 symbol_get_tc (sym)->within = ppc_current_csect;
5902}
5903
252b5132
RH		 5904#endif /* OBJ_XCOFF */
5905
0baf16f2 5906#ifdef OBJ_ELF
a161fe53
AM		 5907/* If this function returns non-zero, it guarantees that a relocation
5908 will be emitted for a fixup. */
5909
5910int
98027b10 5911ppc_force_relocation (fixS *fix)
a161fe53
AM		 5912{
5913 /* Branch prediction relocations must force a relocation, as must
5914 the vtable description relocs. */
5915 switch (fix->fx_r_type)
5916 {
5917 case BFD_RELOC_PPC_B16_BRTAKEN:
5918 case BFD_RELOC_PPC_B16_BRNTAKEN:
5919 case BFD_RELOC_PPC_BA16_BRTAKEN:
5920 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5921 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5922 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5923 return 1;
5924 default:
5925 break;
5926 }
5927
cdba85ec
AM		 5928 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5929 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5930 return 1;
5931
ae6063d4 5932 return generic_force_reloc (fix);
a161fe53
AM		 5933}
5934
0baf16f2 5935int
98027b10 5936ppc_fix_adjustable (fixS *fix)
252b5132 5937{
0baf16f2
AM		 5938 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5939 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5940 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5941 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 5942 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
5943 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 5944 && fix->fx_r_type != BFD_RELOC_GPREL16
5945 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5946 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5947 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5948 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5949}
0baf16f2 5950#endif
252b5132 5951
3aeeedbb
AM		 5952/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5953 rs_align_code frag. */
5954
5955void
5956ppc_handle_align (struct frag *fragP)
5957{
5958 valueT count = (fragP->fr_next->fr_address
5959 - (fragP->fr_address + fragP->fr_fix));
5960
5961 if (count != 0 && (count & 3) == 0)
5962 {
5963 char *dest = fragP->fr_literal + fragP->fr_fix;
5964
5965 fragP->fr_var = 4;
cef4f754
AM		 5966
5967 if (count > 4 * nop_limit && count < 0x2000000)
5968 {
5969 struct frag *rest;
5970
5971 /* Make a branch, then follow with nops. Insert another
5972 frag to handle the nops. */
5973 md_number_to_chars (dest, 0x48000000 + count, 4);
5974 count -= 4;
5975 if (count == 0)
5976 return;
5977
5978 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5979 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
5980 fragP->fr_next = rest;
5981 fragP = rest;
5982 rest->fr_address += rest->fr_fix + 4;
5983 rest->fr_fix = 0;
5984 /* If we leave the next frag as rs_align_code we'll come here
5985 again, resulting in a bunch of branches rather than a
5986 branch followed by nops. */
5987 rest->fr_type = rs_align;
5988 dest = rest->fr_literal;
5989 }
5990
3aeeedbb
AM		 5991 md_number_to_chars (dest, 0x60000000, 4);
5992
42240548
PB		 5993 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5994 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 5995 {
42240548
PB		 5996 /* For power6 and power7, we want the last nop to be a group
5997 terminating one. Do this by inserting an rs_fill frag immediately
5998 after this one, with its address set to the last nop location.
5999 This will automatically reduce the number of nops in the current
6000 frag by one. */
3aeeedbb
AM		 6001 if (count > 4)
6002 {
6003 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6004
6005 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6006 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6007 group_nop->fr_fix = 0;
6008 group_nop->fr_offset = 1;
6009 group_nop->fr_type = rs_fill;
6010 fragP->fr_next = group_nop;
6011 dest = group_nop->fr_literal;
6012 }
6013
42240548
PB		 6014 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
6015 /* power7 group terminating nop: "ori 2,2,0". */
6016 md_number_to_chars (dest, 0x60420000, 4);
6017 else
6018 /* power6 group terminating nop: "ori 1,1,0". */
6019 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6020 }
6021 }
6022}
6023
252b5132
RH		 6024/* Apply a fixup to the object code. This is called for all the
6025 fixups we generated by the call to fix_new_exp, above. In the call
6026 above we used a reloc code which was the largest legal reloc code
6027 plus the operand index. Here we undo that to recover the operand
6028 index. At this point all symbol values should be fully resolved,
6029 and we attempt to completely resolve the reloc. If we can not do
6030 that, we determine the correct reloc code and put it back in the
6031 fixup. */
6032
94f592af 6033void
98027b10 6034md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 6035{
94f592af 6036 valueT value = * valP;
252b5132
RH		 6037
6038#ifdef OBJ_ELF
94f592af 6039 if (fixP->fx_addsy != NULL)
252b5132 6040 {
a161fe53 6041 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6042 if (fixP->fx_pcrel)
6043 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 6044 }
6045 else
94f592af 6046 fixP->fx_done = 1;
252b5132 6047#else
a161fe53 6048 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6049 the symbol values. If we are doing this relocation the code in
6050 write.c is going to call bfd_install_relocation, which is also
6051 going to use the symbol value. That means that if the reloc is
6052 fully resolved we want to use *valP since bfd_install_relocation is
6053 not being used.
9f0eb232
RS		 6054 However, if the reloc is not fully resolved we do not want to
6055 use *valP, and must use fx_offset instead. If the relocation
6056 is PC-relative, we then need to re-apply md_pcrel_from_section
6057 to this new relocation value. */
94f592af
NC		 6058 if (fixP->fx_addsy == (symbolS *) NULL)
6059 fixP->fx_done = 1;
6060
252b5132 6061 else
9f0eb232
RS		 6062 {
6063 value = fixP->fx_offset;
6064 if (fixP->fx_pcrel)
6065 value -= md_pcrel_from_section (fixP, seg);
6066 }
a161fe53
AM		 6067#endif
6068
6069 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6070 {
a161fe53
AM		 6071 /* We can't actually support subtracting a symbol. */
6072 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6073 }
252b5132 6074
94f592af 6075 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 6076 {
6077 int opindex;
6078 const struct powerpc_operand *operand;
6079 char *where;
6080 unsigned long insn;
6081
94f592af 6082 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 6083
6084 operand = &powerpc_operands[opindex];
6085
6086#ifdef OBJ_XCOFF
0baf16f2
AM		 6087 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6088 does not generate a reloc. It uses the offset of `sym' within its
6089 csect. Other usages, such as `.long sym', generate relocs. This
6090 is the documented behaviour of non-TOC symbols. */
252b5132 6091 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6092 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6093 && operand->shift == 0
2b3c4602 6094 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6095 && fixP->fx_addsy != NULL
6096 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6097 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6098 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6099 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6100 {
94f592af
NC		 6101 value = fixP->fx_offset;
6102 fixP->fx_done = 1;
252b5132
RH		 6103 }
6104#endif
6105
6106 /* Fetch the instruction, insert the fully resolved operand
6107 value, and stuff the instruction back again. */
94f592af 6108 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 6109 if (target_big_endian)
6110 insn = bfd_getb32 ((unsigned char *) where);
6111 else
6112 insn = bfd_getl32 ((unsigned char *) where);
6113 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 6114 fixP->tc_fix_data.ppc_cpu,
94f592af 6115 fixP->fx_file, fixP->fx_line);
252b5132
RH		 6116 if (target_big_endian)
6117 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6118 else
6119 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6120
94f592af
NC		 6121 if (fixP->fx_done)
6122 /* Nothing else to do here. */
6123 return;
252b5132 6124
9c2799c2 6125 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 6126
252b5132
RH		 6127 /* Determine a BFD reloc value based on the operand information.
6128 We are only prepared to turn a few of the operands into
0baf16f2 6129 relocs. */
11b37b7b 6130 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 6131 && operand->bitm == 0x3fffffc
11b37b7b 6132 && operand->shift == 0)
94f592af 6133 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 6134 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 6135 && operand->bitm == 0xfffc
11b37b7b 6136 && operand->shift == 0)
95210096
AM		 6137 {
6138 fixP->fx_r_type = BFD_RELOC_PPC_B16;
6139#ifdef OBJ_XCOFF
6140 fixP->fx_size = 2;
6141 if (target_big_endian)
6142 fixP->fx_where += 2;
6143#endif
6144 }
11b37b7b 6145 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 6146 && operand->bitm == 0x3fffffc
11b37b7b 6147 && operand->shift == 0)
94f592af 6148 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 6149 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 6150 && operand->bitm == 0xfffc
11b37b7b 6151 && operand->shift == 0)
95210096
AM		 6152 {
6153 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
6154#ifdef OBJ_XCOFF
6155 fixP->fx_size = 2;
6156 if (target_big_endian)
6157 fixP->fx_where += 2;
6158#endif
6159 }
0baf16f2 6160#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 6161 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6162 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 6163 && operand->shift == 0)
11b37b7b 6164 {
a7fc733f
AM		 6165 if (ppc_is_toc_sym (fixP->fx_addsy))
6166 {
6167 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 6168#ifdef OBJ_ELF
a7fc733f
AM		 6169 if (ppc_obj64
6170 && (operand->flags & PPC_OPERAND_DS) != 0)
6171 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
6172#endif
6173 }
6174 else
6175 {
6176 fixP->fx_r_type = BFD_RELOC_16;
6177#ifdef OBJ_ELF
6178 if (ppc_obj64
6179 && (operand->flags & PPC_OPERAND_DS) != 0)
6180 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 6181#endif
a7fc733f 6182 }
94f592af 6183 fixP->fx_size = 2;
11b37b7b 6184 if (target_big_endian)
94f592af 6185 fixP->fx_where += 2;
11b37b7b 6186 }
0baf16f2 6187#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 6188 else
252b5132
RH		 6189 {
6190 char *sfile;
6191 unsigned int sline;
6192
6193 /* Use expr_symbol_where to see if this is an expression
0baf16f2 6194 symbol. */
94f592af
NC		 6195 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6196 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 6197 _("unresolved expression that must be resolved"));
6198 else
94f592af 6199 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 6200 _("unsupported relocation against %s"),
94f592af
NC		 6201 S_GET_NAME (fixP->fx_addsy));
6202 fixP->fx_done = 1;
6203 return;
252b5132
RH		 6204 }
6205 }
6206 else
6207 {
6208#ifdef OBJ_ELF
94f592af 6209 ppc_elf_validate_fix (fixP, seg);
252b5132 6210#endif
94f592af 6211 switch (fixP->fx_r_type)
252b5132 6212 {
252b5132 6213 case BFD_RELOC_CTOR:
2b3c4602 6214 if (ppc_obj64)
9c7977b3
AM		 6215 goto ctor64;
6216 /* fall through */
6217
0baf16f2 6218 case BFD_RELOC_32:
94f592af
NC		 6219 if (fixP->fx_pcrel)
6220 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 6221 /* fall through */
252b5132
RH		 6222
6223 case BFD_RELOC_RVA:
6224 case BFD_RELOC_32_PCREL:
252b5132 6225 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 6226 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6227 value, 4);
6228 break;
6229
7f6d05e8 6230 case BFD_RELOC_64:
9c7977b3 6231 ctor64:
94f592af
NC		 6232 if (fixP->fx_pcrel)
6233 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 6234 /* fall through */
0baf16f2 6235
7f6d05e8 6236 case BFD_RELOC_64_PCREL:
94f592af 6237 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 6238 value, 8);
81d4177b 6239 break;
0baf16f2 6240
252b5132
RH		 6241 case BFD_RELOC_GPREL16:
6242 case BFD_RELOC_16_GOT_PCREL:
6243 case BFD_RELOC_16_GOTOFF:
6244 case BFD_RELOC_LO16_GOTOFF:
6245 case BFD_RELOC_HI16_GOTOFF:
6246 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 6247 case BFD_RELOC_16_BASEREL:
252b5132
RH		 6248 case BFD_RELOC_LO16_BASEREL:
6249 case BFD_RELOC_HI16_BASEREL:
6250 case BFD_RELOC_HI16_S_BASEREL:
6251 case BFD_RELOC_PPC_EMB_NADDR16:
6252 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6253 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6254 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6255 case BFD_RELOC_PPC_EMB_SDAI16:
6256 case BFD_RELOC_PPC_EMB_SDA2REL:
6257 case BFD_RELOC_PPC_EMB_SDA2I16:
6258 case BFD_RELOC_PPC_EMB_RELSEC16:
6259 case BFD_RELOC_PPC_EMB_RELST_LO:
6260 case BFD_RELOC_PPC_EMB_RELST_HI:
6261 case BFD_RELOC_PPC_EMB_RELST_HA:
6262 case BFD_RELOC_PPC_EMB_RELSDA:
6263 case BFD_RELOC_PPC_TOC16:
0baf16f2 6264#ifdef OBJ_ELF
0baf16f2
AM		 6265 case BFD_RELOC_PPC64_TOC16_LO:
6266 case BFD_RELOC_PPC64_TOC16_HI:
6267 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 6268#endif
94f592af 6269 if (fixP->fx_pcrel)
252b5132 6270 {
94f592af
NC		 6271 if (fixP->fx_addsy != NULL)
6272 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6273 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 6274 bfd_get_reloc_code_name (fixP->fx_r_type),
6275 S_GET_NAME (fixP->fx_addsy));
252b5132 6276 else
94f592af 6277 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6278 _("cannot emit PC relative %s relocation"),
94f592af 6279 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 6280 }
6281
94f592af 6282 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6283 value, 2);
6284 break;
6285
3c9d25f4
AM		 6286 case BFD_RELOC_16:
6287 if (fixP->fx_pcrel)
6288 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6289 /* fall through */
6290
6291 case BFD_RELOC_16_PCREL:
6292 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6293 value, 2);
6294 break;
6295
6296 case BFD_RELOC_LO16:
6297 if (fixP->fx_pcrel)
6298 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6299 /* fall through */
6300
6301 case BFD_RELOC_LO16_PCREL:
6302 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6303 value, 2);
6304 break;
6305
252b5132
RH		 6306 /* This case happens when you write, for example,
6307 lis %r3,(L1-L2)@ha
6308 where L1 and L2 are defined later. */
6309 case BFD_RELOC_HI16:
94f592af 6310 if (fixP->fx_pcrel)
3c9d25f4
AM		 6311 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6312 /* fall through */
6313
6314 case BFD_RELOC_HI16_PCREL:
94f592af 6315 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6316 PPC_HI (value), 2);
252b5132 6317 break;
0baf16f2 6318
252b5132 6319 case BFD_RELOC_HI16_S:
94f592af 6320 if (fixP->fx_pcrel)
3c9d25f4
AM		 6321 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6322 /* fall through */
6323
6324 case BFD_RELOC_HI16_S_PCREL:
94f592af 6325 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6326 PPC_HA (value), 2);
6327 break;
6328
c865e45b
RS		 6329#ifdef OBJ_XCOFF
6330 case BFD_RELOC_NONE:
6331 break;
6332#endif
6333
0baf16f2 6334#ifdef OBJ_ELF
0baf16f2 6335 case BFD_RELOC_PPC64_HIGHER:
94f592af 6336 if (fixP->fx_pcrel)
0baf16f2 6337 abort ();
94f592af 6338 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6339 PPC_HIGHER (value), 2);
252b5132
RH		 6340 break;
6341
0baf16f2 6342 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6343 if (fixP->fx_pcrel)
0baf16f2 6344 abort ();
94f592af 6345 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6346 PPC_HIGHERA (value), 2);
6347 break;
6348
6349 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6350 if (fixP->fx_pcrel)
0baf16f2 6351 abort ();
94f592af 6352 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6353 PPC_HIGHEST (value), 2);
6354 break;
6355
6356 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6357 if (fixP->fx_pcrel)
0baf16f2 6358 abort ();
94f592af 6359 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6360 PPC_HIGHESTA (value), 2);
6361 break;
6362
6363 case BFD_RELOC_PPC64_ADDR16_DS:
6364 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6365 case BFD_RELOC_PPC64_GOT16_DS:
6366 case BFD_RELOC_PPC64_GOT16_LO_DS:
6367 case BFD_RELOC_PPC64_PLT16_LO_DS:
6368 case BFD_RELOC_PPC64_SECTOFF_DS:
6369 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6370 case BFD_RELOC_PPC64_TOC16_DS:
6371 case BFD_RELOC_PPC64_TOC16_LO_DS:
6372 case BFD_RELOC_PPC64_PLTGOT16_DS:
6373 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6374 if (fixP->fx_pcrel)
0baf16f2
AM		 6375 abort ();
6376 {
2132e3a3 6377 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6378 unsigned long val, mask;
0baf16f2
AM		 6379
6380 if (target_big_endian)
adadcc0c 6381 val = bfd_getb32 (where - 2);
0baf16f2 6382 else
adadcc0c
AM		 6383 val = bfd_getl32 (where);
6384 mask = 0xfffc;
6385 /* lq insns reserve the four lsbs. */
6386 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6387 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6388 mask = 0xfff0;
6389 val |= value & mask;
0baf16f2
AM		 6390 if (target_big_endian)
6391 bfd_putb16 ((bfd_vma) val, where);
6392 else
6393 bfd_putl16 ((bfd_vma) val, where);
6394 }
6395 break;
cdba85ec 6396
ba0b2174
AM		 6397 case BFD_RELOC_PPC_B16_BRTAKEN:
6398 case BFD_RELOC_PPC_B16_BRNTAKEN:
6399 case BFD_RELOC_PPC_BA16_BRTAKEN:
6400 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6401 break;
6402
cdba85ec 6403 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6404 case BFD_RELOC_PPC_TLSGD:
6405 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6406 break;
6407
cdba85ec
AM		 6408 case BFD_RELOC_PPC_DTPMOD:
6409 case BFD_RELOC_PPC_TPREL16:
6410 case BFD_RELOC_PPC_TPREL16_LO:
6411 case BFD_RELOC_PPC_TPREL16_HI:
6412 case BFD_RELOC_PPC_TPREL16_HA:
6413 case BFD_RELOC_PPC_TPREL:
6414 case BFD_RELOC_PPC_DTPREL16:
6415 case BFD_RELOC_PPC_DTPREL16_LO:
6416 case BFD_RELOC_PPC_DTPREL16_HI:
6417 case BFD_RELOC_PPC_DTPREL16_HA:
6418 case BFD_RELOC_PPC_DTPREL:
6419 case BFD_RELOC_PPC_GOT_TLSGD16:
6420 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6421 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6422 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6423 case BFD_RELOC_PPC_GOT_TLSLD16:
6424 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6425 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6426 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6427 case BFD_RELOC_PPC_GOT_TPREL16:
6428 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6429 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6430 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6431 case BFD_RELOC_PPC_GOT_DTPREL16:
6432 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6433 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6434 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6435 case BFD_RELOC_PPC64_TPREL16_DS:
6436 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6437 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6438 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6439 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6440 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6441 case BFD_RELOC_PPC64_DTPREL16_DS:
6442 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6443 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6444 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6445 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6446 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6447 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6448 break;
0baf16f2 6449#endif
252b5132 6450 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6451 bytes, rather than 2, so offset it here appropriately. */
252b5132 6452 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6453 if (fixP->fx_pcrel)
252b5132
RH		 6454 abort ();
6455
94f592af 6456 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6457 + ((target_big_endian) ? 2 : 0),
6458 value, 2);
6459 break;
6460
6461 case BFD_RELOC_8:
94f592af 6462 if (fixP->fx_pcrel)
31a91399
NC		 6463 {
6464 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6465 ".byte <undefined_symbol> - ." */
31a91399
NC		 6466 if (fixP->fx_addsy)
6467 as_bad (_("Unable to handle reference to symbol %s"),
6468 S_GET_NAME (fixP->fx_addsy));
6469 else
6470 as_bad (_("Unable to resolve expression"));
6471 fixP->fx_done = 1;
6472 }
6473 else
6474 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6475 value, 1);
252b5132
RH		 6476 break;
6477
6478 case BFD_RELOC_24_PLT_PCREL:
6479 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6480 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6481 abort ();
6482
94f592af 6483 if (fixP->fx_done)
99a814a1
AM		 6484 {
6485 char *where;
6486 unsigned long insn;
6487
6488 /* Fetch the instruction, insert the fully resolved operand
6489 value, and stuff the instruction back again. */
94f592af 6490 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6491 if (target_big_endian)
6492 insn = bfd_getb32 ((unsigned char *) where);
6493 else
6494 insn = bfd_getl32 ((unsigned char *) where);
6495 if ((value & 3) != 0)
94f592af 6496 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6497 _("must branch to an address a multiple of 4"));
6498 if ((offsetT) value < -0x40000000
6499 || (offsetT) value >= 0x40000000)
94f592af 6500 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6501 _("@local or @plt branch destination is too far away, %ld bytes"),
6502 (long) value);
6503 insn = insn | (value & 0x03fffffc);
6504 if (target_big_endian)
6505 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6506 else
6507 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6508 }
252b5132
RH		 6509 break;
6510
6511 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6512 fixP->fx_done = 0;
6513 if (fixP->fx_addsy
6514 && !S_IS_DEFINED (fixP->fx_addsy)
6515 && !S_IS_WEAK (fixP->fx_addsy))
6516 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6517 break;
6518
6519 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6520 fixP->fx_done = 0;
252b5132
RH		 6521 break;
6522
0baf16f2 6523#ifdef OBJ_ELF
0baf16f2
AM		 6524 /* Generated by reference to `sym@tocbase'. The sym is
6525 ignored by the linker. */
6526 case BFD_RELOC_PPC64_TOC:
94f592af 6527 fixP->fx_done = 0;
0baf16f2 6528 break;
0baf16f2 6529#endif
252b5132 6530 default:
bc805888 6531 fprintf (stderr,
94f592af 6532 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6533 fflush (stderr);
252b5132
RH		 6534 abort ();
6535 }
6536 }
6537
6538#ifdef OBJ_ELF
94f592af 6539 fixP->fx_addnumber = value;
4e6935a6
AM		 6540
6541 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6542 from the section contents. If we are going to be emitting a reloc
6543 then the section contents are immaterial, so don't warn if they
6544 happen to overflow. Leave such warnings to ld. */
6545 if (!fixP->fx_done)
6546 fixP->fx_no_overflow = 1;
252b5132 6547#else
94f592af
NC		 6548 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6549 fixP->fx_addnumber = 0;
252b5132
RH		 6550 else
6551 {
6552#ifdef TE_PE
94f592af 6553 fixP->fx_addnumber = 0;
252b5132 6554#else
8edcbfcd
TG		 6555 /* We want to use the offset within the toc, not the actual VMA
6556 of the symbol. */
94f592af 6557 fixP->fx_addnumber =
8edcbfcd
TG		 6558 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6559 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6560#endif
6561 }
6562#endif
252b5132
RH		 6563}
6564
6565/* Generate a reloc for a fixup. */
6566
6567arelent *
98027b10 6568tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6569{
6570 arelent *reloc;
6571
6572 reloc = (arelent *) xmalloc (sizeof (arelent));
6573
49309057
ILT		 6574 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6575 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6576 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6577 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6578 if (reloc->howto == (reloc_howto_type *) NULL)
6579 {
6580 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6581 _("reloc %d not supported by object file format"),
6582 (int) fixp->fx_r_type);
252b5132
RH		 6583 return NULL;
6584 }
6585 reloc->addend = fixp->fx_addnumber;
6586
6587 return reloc;
6588}
75e21f08
JJ		 6589
6590void
98027b10 6591ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6592{
6593 cfi_add_CFA_def_cfa (1, 0);
6594}
6595
6596int
1df69f4f 6597tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6598{
6599 unsigned int regnum = -1;
6600 unsigned int i;
6601 const char *p;
6602 char *q;
6603 static struct { char *name; int dw2regnum; } regnames[] =
6604 {
6605 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6606 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6607 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6608 { "spe_acc", 111 }, { "spefscr", 112 }
6609 };
6610
6611 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6612 if (strcmp (regnames[i].name, regname) == 0)
6613 return regnames[i].dw2regnum;
6614
6615 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6616 {
6617 p = regname + 1 + (regname[1] == '.');
6618 regnum = strtoul (p, &q, 10);
6619 if (p == q || *q || regnum >= 32)
6620 return -1;
6621 if (regname[0] == 'f')
b7d7dc63 6622 regnum += 32;
75e21f08 6623 else if (regname[0] == 'v')
b7d7dc63 6624 regnum += 77;
75e21f08
JJ		 6625 }
6626 else if (regname[0] == 'c' && regname[1] == 'r')
6627 {
6628 p = regname + 2 + (regname[2] == '.');
6629 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6630 return -1;
75e21f08
JJ		 6631 regnum = p[0] - '0' + 68;
6632 }
6633 return regnum;
6634}
GDB Binutils - Deliverables
This page took 1.032497 seconds and 4 git commands to generate.