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ARM/opcodes: Fix negative hexadecimal offset disassembly
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
4b95cf5c 2 Copyright (C) 1994-2014 Free Software Foundation, Inc.
252b5132
RH		 3 Written by Ian Lance Taylor, Cygnus Support.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
ec2655a6 9 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
252b5132 21
252b5132 22#include "as.h"
3882b010 23#include "safe-ctype.h"
252b5132 24#include "subsegs.h"
75e21f08 25#include "dw2gencfi.h"
252b5132
RH		 26#include "opcode/ppc.h"
27
28#ifdef OBJ_ELF
29#include "elf/ppc.h"
ee67d69a 30#include "elf/ppc64.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
85645aed
TG		 38#ifdef OBJ_XCOFF
39#include "coff/xcoff.h"
40#include "libxcoff.h"
41#endif
42
252b5132
RH		 43/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
44
45/* Tell the main code what the endianness is. */
46extern int target_big_endian;
47
48/* Whether or not, we've set target_big_endian. */
49static int set_target_endian = 0;
50
51/* Whether to use user friendly register names. */
52#ifndef TARGET_REG_NAMES_P
53#ifdef TE_PE
b34976b6 54#define TARGET_REG_NAMES_P TRUE
252b5132 55#else
b34976b6 56#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 57#endif
58#endif
59
0baf16f2
AM		 60/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
61 HIGHESTA. */
62
63/* #lo(value) denotes the least significant 16 bits of the indicated. */
64#define PPC_LO(v) ((v) & 0xffff)
65
66/* #hi(value) denotes bits 16 through 31 of the indicated value. */
67#define PPC_HI(v) (((v) >> 16) & 0xffff)
68
69/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
71 signed number. */
15c1449b 72#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 73
74/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 75#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 76
77/* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
15c1449b 79#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 80
81/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 82#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 83
84/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 85 compensating for #lo being treated as a signed number. */
86#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2 87
f9c6b907
AM		 88#define SEX16(val) (((val) ^ 0x8000) - 0x8000)
89
90/* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92#define REPORT_OVERFLOW_HI 0
0baf16f2 93
b34976b6 94static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 95
98027b10
AM		 96static void ppc_macro (char *, const struct powerpc_macro *);
97static void ppc_byte (int);
0baf16f2
AM		 98
99#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 100static void ppc_tc (int);
101static void ppc_machine (int);
0baf16f2 102#endif
252b5132
RH		 103
104#ifdef OBJ_XCOFF
98027b10
AM		 105static void ppc_comm (int);
106static void ppc_bb (int);
107static void ppc_bc (int);
108static void ppc_bf (int);
109static void ppc_biei (int);
110static void ppc_bs (int);
111static void ppc_eb (int);
112static void ppc_ec (int);
113static void ppc_ef (int);
114static void ppc_es (int);
115static void ppc_csect (int);
85645aed 116static void ppc_dwsect (int);
98027b10
AM		 117static void ppc_change_csect (symbolS *, offsetT);
118static void ppc_function (int);
119static void ppc_extern (int);
120static void ppc_lglobl (int);
c865e45b 121static void ppc_ref (int);
98027b10
AM		 122static void ppc_section (int);
123static void ppc_named_section (int);
124static void ppc_stabx (int);
125static void ppc_rename (int);
126static void ppc_toc (int);
127static void ppc_xcoff_cons (int);
128static void ppc_vbyte (int);
252b5132
RH		 129#endif
130
131#ifdef OBJ_ELF
98027b10
AM		 132static void ppc_elf_rdata (int);
133static void ppc_elf_lcomm (int);
6911b7dc 134static void ppc_elf_localentry (int);
ee67d69a 135static void ppc_elf_abiversion (int);
252b5132
RH		 136#endif
137
138#ifdef TE_PE
98027b10
AM		 139static void ppc_previous (int);
140static void ppc_pdata (int);
141static void ppc_ydata (int);
142static void ppc_reldata (int);
143static void ppc_rdata (int);
144static void ppc_ualong (int);
145static void ppc_znop (int);
146static void ppc_pe_comm (int);
147static void ppc_pe_section (int);
148static void ppc_pe_function (int);
149static void ppc_pe_tocd (int);
252b5132
RH		 150#endif
151\f
152/* Generic assembler global variables which must be defined by all
153 targets. */
154
155#ifdef OBJ_ELF
156/* This string holds the chars that always start a comment. If the
157 pre-processor is disabled, these aren't very useful. The macro
158 tc_comment_chars points to this. We use this, rather than the
159 usual comment_chars, so that we can switch for Solaris conventions. */
160static const char ppc_solaris_comment_chars[] = "#!";
161static const char ppc_eabi_comment_chars[] = "#";
162
163#ifdef TARGET_SOLARIS_COMMENT
164const char *ppc_comment_chars = ppc_solaris_comment_chars;
165#else
166const char *ppc_comment_chars = ppc_eabi_comment_chars;
167#endif
168#else
169const char comment_chars[] = "#";
170#endif
171
172/* Characters which start a comment at the beginning of a line. */
173const char line_comment_chars[] = "#";
174
175/* Characters which may be used to separate multiple commands on a
176 single line. */
177const char line_separator_chars[] = ";";
178
179/* Characters which are used to indicate an exponent in a floating
180 point number. */
181const char EXP_CHARS[] = "eE";
182
183/* Characters which mean that a number is a floating point constant,
184 as in 0d1.0. */
185const char FLT_CHARS[] = "dD";
5ce8663f 186
5e02f92e 187/* Anything that can start an operand needs to be mentioned here,
ac805826 188 to stop the input scrubber eating whitespace. */
5e02f92e 189const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 190
191/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
192int ppc_cie_data_alignment;
783de163 193
8fbf7334
JL		 194/* The dwarf2 minimum instruction length. */
195int ppc_dwarf2_line_min_insn_length;
196
cef4f754
AM		 197/* More than this number of nops in an alignment op gets a branch
198 instead. */
199unsigned long nop_limit = 4;
200
783de163
AM		 201/* The type of processor we are assembling for. This is one or more
202 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 203ppc_cpu_t ppc_cpu = 0;
776fc418 204ppc_cpu_t sticky = 0;
01efc3af 205
ee67d69a
AM		 206/* Value for ELF e_flags EF_PPC64_ABI. */
207unsigned int ppc_abiversion = 0;
208
01efc3af
AM		 209/* Flags set on encountering toc relocs. */
210enum {
211 has_large_toc_reloc = 1,
212 has_small_toc_reloc = 2
213} toc_reloc_types;
bf7279d5
AM		 214
215/* Warn on emitting data to code sections. */
216int warn_476;
217unsigned long last_insn;
218segT last_seg;
219subsegT last_subseg;
252b5132
RH		 220\f
221/* The target specific pseudo-ops which we support. */
222
223const pseudo_typeS md_pseudo_table[] =
224{
225 /* Pseudo-ops which must be overridden. */
226 { "byte", ppc_byte, 0 },
227
228#ifdef OBJ_XCOFF
229 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
230 legitimately belong in the obj-*.c file. However, XCOFF is based
231 on COFF, and is only implemented for the RS/6000. We just use
232 obj-coff.c, and add what we need here. */
233 { "comm", ppc_comm, 0 },
234 { "lcomm", ppc_comm, 1 },
235 { "bb", ppc_bb, 0 },
236 { "bc", ppc_bc, 0 },
237 { "bf", ppc_bf, 0 },
238 { "bi", ppc_biei, 0 },
239 { "bs", ppc_bs, 0 },
240 { "csect", ppc_csect, 0 },
85645aed 241 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 242 { "data", ppc_section, 'd' },
243 { "eb", ppc_eb, 0 },
244 { "ec", ppc_ec, 0 },
245 { "ef", ppc_ef, 0 },
246 { "ei", ppc_biei, 1 },
247 { "es", ppc_es, 0 },
248 { "extern", ppc_extern, 0 },
249 { "function", ppc_function, 0 },
250 { "lglobl", ppc_lglobl, 0 },
c865e45b 251 { "ref", ppc_ref, 0 },
252b5132
RH		 252 { "rename", ppc_rename, 0 },
253 { "section", ppc_named_section, 0 },
254 { "stabx", ppc_stabx, 0 },
255 { "text", ppc_section, 't' },
256 { "toc", ppc_toc, 0 },
257 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 258 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 259 { "word", ppc_xcoff_cons, 1 },
260 { "short", ppc_xcoff_cons, 1 },
261 { "vbyte", ppc_vbyte, 0 },
262#endif
263
264#ifdef OBJ_ELF
62ebcb5c 265 { "llong", cons, 8 },
252b5132
RH		 266 { "rdata", ppc_elf_rdata, 0 },
267 { "rodata", ppc_elf_rdata, 0 },
268 { "lcomm", ppc_elf_lcomm, 0 },
6911b7dc 269 { "localentry", ppc_elf_localentry, 0 },
ee67d69a 270 { "abiversion", ppc_elf_abiversion, 0 },
252b5132
RH		 271#endif
272
273#ifdef TE_PE
99a814a1 274 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 275 { "previous", ppc_previous, 0 },
276 { "pdata", ppc_pdata, 0 },
277 { "ydata", ppc_ydata, 0 },
278 { "reldata", ppc_reldata, 0 },
279 { "rdata", ppc_rdata, 0 },
280 { "ualong", ppc_ualong, 0 },
281 { "znop", ppc_znop, 0 },
282 { "comm", ppc_pe_comm, 0 },
283 { "lcomm", ppc_pe_comm, 1 },
284 { "section", ppc_pe_section, 0 },
285 { "function", ppc_pe_function,0 },
286 { "tocd", ppc_pe_tocd, 0 },
287#endif
288
0baf16f2 289#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 290 { "tc", ppc_tc, 0 },
0baf16f2
AM		 291 { "machine", ppc_machine, 0 },
292#endif
252b5132
RH		 293
294 { NULL, NULL, 0 }
295};
296
297\f
99a814a1
AM		 298/* Predefined register names if -mregnames (or default for Windows NT).
299 In general, there are lots of them, in an attempt to be compatible
300 with a number of other Windows NT assemblers. */
252b5132
RH		 301
302/* Structure to hold information about predefined registers. */
303struct pd_reg
304 {
305 char *name;
306 int value;
307 };
308
309/* List of registers that are pre-defined:
310
311 Each general register has predefined names of the form:
312 1. r<reg_num> which has the value <reg_num>.
313 2. r.<reg_num> which has the value <reg_num>.
314
252b5132
RH		 315 Each floating point register has predefined names of the form:
316 1. f<reg_num> which has the value <reg_num>.
317 2. f.<reg_num> which has the value <reg_num>.
318
7a899fff
C		 319 Each vector unit register has predefined names of the form:
320 1. v<reg_num> which has the value <reg_num>.
321 2. v.<reg_num> which has the value <reg_num>.
322
252b5132
RH		 323 Each condition register has predefined names of the form:
324 1. cr<reg_num> which has the value <reg_num>.
325 2. cr.<reg_num> which has the value <reg_num>.
326
327 There are individual registers as well:
328 sp or r.sp has the value 1
329 rtoc or r.toc has the value 2
330 fpscr has the value 0
331 xer has the value 1
332 lr has the value 8
333 ctr has the value 9
334 pmr has the value 0
335 dar has the value 19
336 dsisr has the value 18
337 dec has the value 22
338 sdr1 has the value 25
339 srr0 has the value 26
340 srr1 has the value 27
341
81d4177b 342 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 343
344static const struct pd_reg pre_defined_registers[] =
345{
346 { "cr.0", 0 }, /* Condition Registers */
347 { "cr.1", 1 },
348 { "cr.2", 2 },
349 { "cr.3", 3 },
350 { "cr.4", 4 },
351 { "cr.5", 5 },
352 { "cr.6", 6 },
353 { "cr.7", 7 },
354
355 { "cr0", 0 },
356 { "cr1", 1 },
357 { "cr2", 2 },
358 { "cr3", 3 },
359 { "cr4", 4 },
360 { "cr5", 5 },
361 { "cr6", 6 },
362 { "cr7", 7 },
363
364 { "ctr", 9 },
365
366 { "dar", 19 }, /* Data Access Register */
367 { "dec", 22 }, /* Decrementer */
368 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
369
370 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 371 { "f.1", 1 },
372 { "f.10", 10 },
373 { "f.11", 11 },
374 { "f.12", 12 },
375 { "f.13", 13 },
376 { "f.14", 14 },
377 { "f.15", 15 },
378 { "f.16", 16 },
379 { "f.17", 17 },
380 { "f.18", 18 },
381 { "f.19", 19 },
382 { "f.2", 2 },
383 { "f.20", 20 },
384 { "f.21", 21 },
385 { "f.22", 22 },
386 { "f.23", 23 },
387 { "f.24", 24 },
388 { "f.25", 25 },
389 { "f.26", 26 },
390 { "f.27", 27 },
391 { "f.28", 28 },
392 { "f.29", 29 },
393 { "f.3", 3 },
252b5132
RH		 394 { "f.30", 30 },
395 { "f.31", 31 },
066be9f7
PB		 396
397 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
398 { "f.33", 33 },
399 { "f.34", 34 },
400 { "f.35", 35 },
401 { "f.36", 36 },
402 { "f.37", 37 },
403 { "f.38", 38 },
404 { "f.39", 39 },
81d4177b 405 { "f.4", 4 },
066be9f7
PB		 406 { "f.40", 40 },
407 { "f.41", 41 },
408 { "f.42", 42 },
409 { "f.43", 43 },
410 { "f.44", 44 },
411 { "f.45", 45 },
412 { "f.46", 46 },
413 { "f.47", 47 },
414 { "f.48", 48 },
415 { "f.49", 49 },
81d4177b 416 { "f.5", 5 },
066be9f7
PB		 417 { "f.50", 50 },
418 { "f.51", 51 },
419 { "f.52", 52 },
420 { "f.53", 53 },
421 { "f.54", 54 },
422 { "f.55", 55 },
423 { "f.56", 56 },
424 { "f.57", 57 },
425 { "f.58", 58 },
426 { "f.59", 59 },
81d4177b 427 { "f.6", 6 },
066be9f7
PB		 428 { "f.60", 60 },
429 { "f.61", 61 },
430 { "f.62", 62 },
431 { "f.63", 63 },
81d4177b
KH		 432 { "f.7", 7 },
433 { "f.8", 8 },
434 { "f.9", 9 },
435
436 { "f0", 0 },
437 { "f1", 1 },
438 { "f10", 10 },
439 { "f11", 11 },
440 { "f12", 12 },
441 { "f13", 13 },
442 { "f14", 14 },
443 { "f15", 15 },
444 { "f16", 16 },
445 { "f17", 17 },
446 { "f18", 18 },
447 { "f19", 19 },
448 { "f2", 2 },
449 { "f20", 20 },
450 { "f21", 21 },
451 { "f22", 22 },
452 { "f23", 23 },
453 { "f24", 24 },
454 { "f25", 25 },
455 { "f26", 26 },
456 { "f27", 27 },
457 { "f28", 28 },
458 { "f29", 29 },
459 { "f3", 3 },
252b5132
RH		 460 { "f30", 30 },
461 { "f31", 31 },
066be9f7
PB		 462
463 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
464 { "f33", 33 },
465 { "f34", 34 },
466 { "f35", 35 },
467 { "f36", 36 },
468 { "f37", 37 },
469 { "f38", 38 },
470 { "f39", 39 },
81d4177b 471 { "f4", 4 },
066be9f7
PB		 472 { "f40", 40 },
473 { "f41", 41 },
474 { "f42", 42 },
475 { "f43", 43 },
476 { "f44", 44 },
477 { "f45", 45 },
478 { "f46", 46 },
479 { "f47", 47 },
480 { "f48", 48 },
481 { "f49", 49 },
81d4177b 482 { "f5", 5 },
066be9f7
PB		 483 { "f50", 50 },
484 { "f51", 51 },
485 { "f52", 52 },
486 { "f53", 53 },
487 { "f54", 54 },
488 { "f55", 55 },
489 { "f56", 56 },
490 { "f57", 57 },
491 { "f58", 58 },
492 { "f59", 59 },
81d4177b 493 { "f6", 6 },
066be9f7
PB		 494 { "f60", 60 },
495 { "f61", 61 },
496 { "f62", 62 },
497 { "f63", 63 },
81d4177b
KH		 498 { "f7", 7 },
499 { "f8", 8 },
500 { "f9", 9 },
252b5132
RH		 501
502 { "fpscr", 0 },
503
c3d65c1c
BE		 504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0 },
506 { "gqr.1", 1 },
507 { "gqr.2", 2 },
508 { "gqr.3", 3 },
509 { "gqr.4", 4 },
510 { "gqr.5", 5 },
511 { "gqr.6", 6 },
512 { "gqr.7", 7 },
513 { "gqr0", 0 },
514 { "gqr1", 1 },
515 { "gqr2", 2 },
516 { "gqr3", 3 },
517 { "gqr4", 4 },
518 { "gqr5", 5 },
519 { "gqr6", 6 },
520 { "gqr7", 7 },
521
252b5132
RH		 522 { "lr", 8 }, /* Link Register */
523
524 { "pmr", 0 },
525
526 { "r.0", 0 }, /* General Purpose Registers */
527 { "r.1", 1 },
528 { "r.10", 10 },
529 { "r.11", 11 },
530 { "r.12", 12 },
531 { "r.13", 13 },
532 { "r.14", 14 },
533 { "r.15", 15 },
534 { "r.16", 16 },
535 { "r.17", 17 },
536 { "r.18", 18 },
537 { "r.19", 19 },
538 { "r.2", 2 },
539 { "r.20", 20 },
540 { "r.21", 21 },
541 { "r.22", 22 },
542 { "r.23", 23 },
543 { "r.24", 24 },
544 { "r.25", 25 },
545 { "r.26", 26 },
546 { "r.27", 27 },
547 { "r.28", 28 },
548 { "r.29", 29 },
549 { "r.3", 3 },
550 { "r.30", 30 },
551 { "r.31", 31 },
552 { "r.4", 4 },
553 { "r.5", 5 },
554 { "r.6", 6 },
555 { "r.7", 7 },
556 { "r.8", 8 },
557 { "r.9", 9 },
558
559 { "r.sp", 1 }, /* Stack Pointer */
560
561 { "r.toc", 2 }, /* Pointer to the table of contents */
562
563 { "r0", 0 }, /* More general purpose registers */
564 { "r1", 1 },
565 { "r10", 10 },
566 { "r11", 11 },
567 { "r12", 12 },
568 { "r13", 13 },
569 { "r14", 14 },
570 { "r15", 15 },
571 { "r16", 16 },
572 { "r17", 17 },
573 { "r18", 18 },
574 { "r19", 19 },
575 { "r2", 2 },
576 { "r20", 20 },
577 { "r21", 21 },
578 { "r22", 22 },
579 { "r23", 23 },
580 { "r24", 24 },
581 { "r25", 25 },
582 { "r26", 26 },
583 { "r27", 27 },
584 { "r28", 28 },
585 { "r29", 29 },
586 { "r3", 3 },
587 { "r30", 30 },
588 { "r31", 31 },
589 { "r4", 4 },
590 { "r5", 5 },
591 { "r6", 6 },
592 { "r7", 7 },
593 { "r8", 8 },
594 { "r9", 9 },
595
596 { "rtoc", 2 }, /* Table of contents */
597
598 { "sdr1", 25 }, /* Storage Description Register 1 */
599
600 { "sp", 1 },
601
602 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
603 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 604
066be9f7 605 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 606 { "v.1", 1 },
607 { "v.10", 10 },
608 { "v.11", 11 },
609 { "v.12", 12 },
610 { "v.13", 13 },
611 { "v.14", 14 },
612 { "v.15", 15 },
613 { "v.16", 16 },
614 { "v.17", 17 },
615 { "v.18", 18 },
616 { "v.19", 19 },
617 { "v.2", 2 },
618 { "v.20", 20 },
619 { "v.21", 21 },
620 { "v.22", 22 },
621 { "v.23", 23 },
622 { "v.24", 24 },
623 { "v.25", 25 },
624 { "v.26", 26 },
625 { "v.27", 27 },
626 { "v.28", 28 },
627 { "v.29", 29 },
628 { "v.3", 3 },
7a899fff
C		 629 { "v.30", 30 },
630 { "v.31", 31 },
81d4177b
KH		 631 { "v.4", 4 },
632 { "v.5", 5 },
633 { "v.6", 6 },
634 { "v.7", 7 },
635 { "v.8", 8 },
636 { "v.9", 9 },
7a899fff
C		 637
638 { "v0", 0 },
81d4177b
KH		 639 { "v1", 1 },
640 { "v10", 10 },
641 { "v11", 11 },
642 { "v12", 12 },
643 { "v13", 13 },
644 { "v14", 14 },
645 { "v15", 15 },
646 { "v16", 16 },
647 { "v17", 17 },
648 { "v18", 18 },
649 { "v19", 19 },
650 { "v2", 2 },
651 { "v20", 20 },
652 { "v21", 21 },
653 { "v22", 22 },
654 { "v23", 23 },
655 { "v24", 24 },
656 { "v25", 25 },
657 { "v26", 26 },
658 { "v27", 27 },
659 { "v28", 28 },
660 { "v29", 29 },
661 { "v3", 3 },
7a899fff
C		 662 { "v30", 30 },
663 { "v31", 31 },
81d4177b
KH		 664 { "v4", 4 },
665 { "v5", 5 },
666 { "v6", 6 },
667 { "v7", 7 },
668 { "v8", 8 },
7a899fff 669 { "v9", 9 },
252b5132 670
066be9f7
PB		 671 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.1", 1 },
673 { "vs.10", 10 },
674 { "vs.11", 11 },
675 { "vs.12", 12 },
676 { "vs.13", 13 },
677 { "vs.14", 14 },
678 { "vs.15", 15 },
679 { "vs.16", 16 },
680 { "vs.17", 17 },
681 { "vs.18", 18 },
682 { "vs.19", 19 },
683 { "vs.2", 2 },
684 { "vs.20", 20 },
685 { "vs.21", 21 },
686 { "vs.22", 22 },
687 { "vs.23", 23 },
688 { "vs.24", 24 },
689 { "vs.25", 25 },
690 { "vs.26", 26 },
691 { "vs.27", 27 },
692 { "vs.28", 28 },
693 { "vs.29", 29 },
694 { "vs.3", 3 },
695 { "vs.30", 30 },
696 { "vs.31", 31 },
697 { "vs.32", 32 },
698 { "vs.33", 33 },
699 { "vs.34", 34 },
700 { "vs.35", 35 },
701 { "vs.36", 36 },
702 { "vs.37", 37 },
703 { "vs.38", 38 },
704 { "vs.39", 39 },
705 { "vs.4", 4 },
706 { "vs.40", 40 },
707 { "vs.41", 41 },
708 { "vs.42", 42 },
709 { "vs.43", 43 },
710 { "vs.44", 44 },
711 { "vs.45", 45 },
712 { "vs.46", 46 },
713 { "vs.47", 47 },
714 { "vs.48", 48 },
715 { "vs.49", 49 },
716 { "vs.5", 5 },
717 { "vs.50", 50 },
718 { "vs.51", 51 },
719 { "vs.52", 52 },
720 { "vs.53", 53 },
721 { "vs.54", 54 },
722 { "vs.55", 55 },
723 { "vs.56", 56 },
724 { "vs.57", 57 },
725 { "vs.58", 58 },
726 { "vs.59", 59 },
727 { "vs.6", 6 },
728 { "vs.60", 60 },
729 { "vs.61", 61 },
730 { "vs.62", 62 },
731 { "vs.63", 63 },
732 { "vs.7", 7 },
733 { "vs.8", 8 },
734 { "vs.9", 9 },
735
736 { "vs0", 0 },
737 { "vs1", 1 },
738 { "vs10", 10 },
739 { "vs11", 11 },
740 { "vs12", 12 },
741 { "vs13", 13 },
742 { "vs14", 14 },
743 { "vs15", 15 },
744 { "vs16", 16 },
745 { "vs17", 17 },
746 { "vs18", 18 },
747 { "vs19", 19 },
748 { "vs2", 2 },
749 { "vs20", 20 },
750 { "vs21", 21 },
751 { "vs22", 22 },
752 { "vs23", 23 },
753 { "vs24", 24 },
754 { "vs25", 25 },
755 { "vs26", 26 },
756 { "vs27", 27 },
757 { "vs28", 28 },
758 { "vs29", 29 },
759 { "vs3", 3 },
760 { "vs30", 30 },
761 { "vs31", 31 },
762 { "vs32", 32 },
763 { "vs33", 33 },
764 { "vs34", 34 },
765 { "vs35", 35 },
766 { "vs36", 36 },
767 { "vs37", 37 },
768 { "vs38", 38 },
769 { "vs39", 39 },
770 { "vs4", 4 },
771 { "vs40", 40 },
772 { "vs41", 41 },
773 { "vs42", 42 },
774 { "vs43", 43 },
775 { "vs44", 44 },
776 { "vs45", 45 },
777 { "vs46", 46 },
778 { "vs47", 47 },
779 { "vs48", 48 },
780 { "vs49", 49 },
781 { "vs5", 5 },
782 { "vs50", 50 },
783 { "vs51", 51 },
784 { "vs52", 52 },
785 { "vs53", 53 },
786 { "vs54", 54 },
787 { "vs55", 55 },
788 { "vs56", 56 },
789 { "vs57", 57 },
790 { "vs58", 58 },
791 { "vs59", 59 },
792 { "vs6", 6 },
793 { "vs60", 60 },
794 { "vs61", 61 },
795 { "vs62", 62 },
796 { "vs63", 63 },
797 { "vs7", 7 },
798 { "vs8", 8 },
799 { "vs9", 9 },
800
252b5132
RH		 801 { "xer", 1 },
802
803};
804
bc805888 805#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 806
807/* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
809
252b5132 810static int
98027b10 811reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 812{
813 int middle, low, high;
814 int cmp;
815
816 low = 0;
817 high = regcount - 1;
818
819 do
820 {
821 middle = (low + high) / 2;
822 cmp = strcasecmp (name, regs[middle].name);
823 if (cmp < 0)
824 high = middle - 1;
825 else if (cmp > 0)
826 low = middle + 1;
827 else
828 return regs[middle].value;
829 }
830 while (low <= high);
831
832 return -1;
833}
834
835/*
99a814a1 836 * Summary of register_name.
252b5132
RH		 837 *
838 * in: Input_line_pointer points to 1st char of operand.
839 *
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
844 * original state.
845 */
846
b34976b6 847static bfd_boolean
98027b10 848register_name (expressionS *expressionP)
252b5132
RH		 849{
850 int reg_number;
851 char *name;
852 char *start;
853 char c;
854
99a814a1 855 /* Find the spelling of the operand. */
252b5132 856 start = name = input_line_pointer;
3882b010 857 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 858 name = ++input_line_pointer;
859
3882b010 860 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 861 return FALSE;
252b5132
RH		 862
863 c = get_symbol_end ();
864 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
865
468cced8
AM		 866 /* Put back the delimiting char. */
867 *input_line_pointer = c;
868
99a814a1 869 /* Look to see if it's in the register table. */
81d4177b 870 if (reg_number >= 0)
252b5132
RH		 871 {
872 expressionP->X_op = O_register;
873 expressionP->X_add_number = reg_number;
81d4177b 874
99a814a1 875 /* Make the rest nice. */
252b5132
RH		 876 expressionP->X_add_symbol = NULL;
877 expressionP->X_op_symbol = NULL;
b34976b6 878 return TRUE;
252b5132 879 }
468cced8
AM		 880
881 /* Reset the line as if we had not done anything. */
882 input_line_pointer = start;
b34976b6 883 return FALSE;
252b5132
RH		 884}
885\f
886/* This function is called for each symbol seen in an expression. It
887 handles the special parsing which PowerPC assemblers are supposed
888 to use for condition codes. */
889
890/* Whether to do the special parsing. */
b34976b6 891static bfd_boolean cr_operand;
252b5132
RH		 892
893/* Names to recognize in a condition code. This table is sorted. */
894static const struct pd_reg cr_names[] =
895{
896 { "cr0", 0 },
897 { "cr1", 1 },
898 { "cr2", 2 },
899 { "cr3", 3 },
900 { "cr4", 4 },
901 { "cr5", 5 },
902 { "cr6", 6 },
903 { "cr7", 7 },
904 { "eq", 2 },
905 { "gt", 1 },
906 { "lt", 0 },
907 { "so", 3 },
908 { "un", 3 }
909};
910
911/* Parsing function. This returns non-zero if it recognized an
912 expression. */
913
914int
91d6fa6a 915ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 916{
917 int val;
918
919 if (! cr_operand)
920 return 0;
921
13abbae3
AM		 922 if (*name == '%')
923 ++name;
252b5132
RH		 924 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
925 name);
926 if (val < 0)
927 return 0;
928
91d6fa6a
NC		 929 exp->X_op = O_constant;
930 exp->X_add_number = val;
252b5132
RH		 931
932 return 1;
933}
934\f
935/* Local variables. */
936
2b3c4602
AM		 937/* Whether to target xcoff64/elf64. */
938static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 939
252b5132
RH		 940/* Opcode hash table. */
941static struct hash_control *ppc_hash;
942
943/* Macro hash table. */
944static struct hash_control *ppc_macro_hash;
945
946#ifdef OBJ_ELF
99a814a1 947/* What type of shared library support to use. */
5d6f4f16 948static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 949
99a814a1 950/* Flags to set in the elf header. */
252b5132
RH		 951static flagword ppc_flags = 0;
952
953/* Whether this is Solaris or not. */
954#ifdef TARGET_SOLARIS_COMMENT
b34976b6 955#define SOLARIS_P TRUE
252b5132 956#else
b34976b6 957#define SOLARIS_P FALSE
252b5132
RH		 958#endif
959
b34976b6 960static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 961#endif
962
963#ifdef OBJ_XCOFF
964
965/* The RS/6000 assembler uses the .csect pseudo-op to generate code
966 using a bunch of different sections. These assembler sections,
967 however, are all encompassed within the .text or .data sections of
968 the final output file. We handle this by using different
969 subsegments within these main segments. */
970
971/* Next subsegment to allocate within the .text segment. */
972static subsegT ppc_text_subsegment = 2;
973
974/* Linked list of csects in the text section. */
975static symbolS *ppc_text_csects;
976
977/* Next subsegment to allocate within the .data segment. */
978static subsegT ppc_data_subsegment = 2;
979
980/* Linked list of csects in the data section. */
981static symbolS *ppc_data_csects;
982
983/* The current csect. */
984static symbolS *ppc_current_csect;
985
986/* The RS/6000 assembler uses a TOC which holds addresses of functions
987 and variables. Symbols are put in the TOC with the .tc pseudo-op.
988 A special relocation is used when accessing TOC entries. We handle
989 the TOC as a subsegment within the .data segment. We set it up if
990 we see a .toc pseudo-op, and save the csect symbol here. */
991static symbolS *ppc_toc_csect;
992
993/* The first frag in the TOC subsegment. */
994static fragS *ppc_toc_frag;
995
996/* The first frag in the first subsegment after the TOC in the .data
997 segment. NULL if there are no subsegments after the TOC. */
998static fragS *ppc_after_toc_frag;
999
1000/* The current static block. */
1001static symbolS *ppc_current_block;
1002
1003/* The COFF debugging section; set by md_begin. This is not the
1004 .debug section, but is instead the secret BFD section which will
1005 cause BFD to set the section number of a symbol to N_DEBUG. */
1006static asection *ppc_coff_debug_section;
1007
85645aed
TG		 1008/* Structure to set the length field of the dwarf sections. */
1009struct dw_subsection {
1010 /* Subsections are simply linked. */
1011 struct dw_subsection *link;
1012
1013 /* The subsection number. */
1014 subsegT subseg;
1015
1016 /* Expression to compute the length of the section. */
1017 expressionS end_exp;
1018};
1019
1020static struct dw_section {
1021 /* Corresponding section. */
1022 segT sect;
1023
1024 /* Simply linked list of subsections with a label. */
1025 struct dw_subsection *list_subseg;
1026
1027 /* The anonymous subsection. */
1028 struct dw_subsection *anon_subseg;
1029} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1030#endif /* OBJ_XCOFF */
1031
1032#ifdef TE_PE
1033
1034/* Various sections that we need for PE coff support. */
1035static segT ydata_section;
1036static segT pdata_section;
1037static segT reldata_section;
1038static segT rdata_section;
1039static segT tocdata_section;
1040
81d4177b 1041/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1042static segT ppc_previous_section;
1043static segT ppc_current_section;
1044
1045#endif /* TE_PE */
1046
1047#ifdef OBJ_ELF
1048symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1049#define PPC_APUINFO_ISEL 0x40
1050#define PPC_APUINFO_PMR 0x41
1051#define PPC_APUINFO_RFMCI 0x42
1052#define PPC_APUINFO_CACHELCK 0x43
1053#define PPC_APUINFO_SPE 0x100
1054#define PPC_APUINFO_EFS 0x101
1055#define PPC_APUINFO_BRLOCK 0x102
b9c361e0 1056#define PPC_APUINFO_VLE 0x104
6a0c61b7 1057
b34976b6
AM		 1058/*
1059 * We keep a list of APUinfo
6a0c61b7
EZ		 1060 */
1061unsigned long *ppc_apuinfo_list;
1062unsigned int ppc_apuinfo_num;
1063unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1064#endif /* OBJ_ELF */
1065\f
1066#ifdef OBJ_ELF
15c1449b 1067const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1068#else
15c1449b 1069const char *const md_shortopts = "um:";
252b5132 1070#endif
cef4f754 1071#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1072const struct option md_longopts[] = {
cef4f754 1073 {"nops", required_argument, NULL, OPTION_NOPS},
bf7279d5
AM		 1074 {"ppc476-workaround", no_argument, &warn_476, 1},
1075 {"no-ppc476-workaround", no_argument, &warn_476, 0},
252b5132
RH		 1076 {NULL, no_argument, NULL, 0}
1077};
15c1449b 1078const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1079
1080int
98027b10 1081md_parse_option (int c, char *arg)
252b5132 1082{
69fe9ce5
AM		 1083 ppc_cpu_t new_cpu;
1084
252b5132
RH		 1085 switch (c)
1086 {
1087 case 'u':
1088 /* -u means that any undefined symbols should be treated as
1089 external, which is the default for gas anyhow. */
1090 break;
1091
1092#ifdef OBJ_ELF
1093 case 'l':
1094 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1095 sake, recognize -be also. */
252b5132
RH		 1096 if (strcmp (arg, "e") == 0)
1097 {
1098 target_big_endian = 0;
1099 set_target_endian = 1;
b9c361e0 1100 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1101 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1102 }
1103 else
1104 return 0;
1105
1106 break;
1107
1108 case 'b':
1109 if (strcmp (arg, "e") == 0)
1110 {
1111 target_big_endian = 1;
1112 set_target_endian = 1;
1113 }
1114 else
1115 return 0;
1116
1117 break;
1118
1119 case 'K':
99a814a1 1120 /* Recognize -K PIC. */
252b5132
RH		 1121 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1122 {
1123 shlib = SHLIB_PIC;
1124 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1125 }
1126 else
1127 return 0;
1128
1129 break;
1130#endif
1131
7f6d05e8
CP		 1132 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1133 case 'a':
1134 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1135 {
1136#ifdef BFD64
1137 ppc_obj64 = 1;
d6ed37ed
AM		 1138 if (ppc_cpu & PPC_OPCODE_VLE)
1139 as_bad (_("the use of -mvle requires -a32."));
2a98c3a6
AM		 1140#else
1141 as_fatal (_("%s unsupported"), "-a64");
1142#endif
1143 }
7f6d05e8 1144 else if (strcmp (arg, "32") == 0)
2b3c4602 1145 ppc_obj64 = 0;
7f6d05e8
CP		 1146 else
1147 return 0;
1148 break;
81d4177b 1149
252b5132 1150 case 'm':
776fc418 1151 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
b9c361e0
JL		 1152 if (new_cpu != 0)
1153 {
1154 ppc_cpu = new_cpu;
d6ed37ed
AM		 1155 if (strcmp (arg, "vle") == 0)
1156 {
1157 if (set_target_endian && target_big_endian == 0)
1158 as_bad (_("the use of -mvle requires big endian."));
1159 if (ppc_obj64)
1160 as_bad (_("the use of -mvle requires -a32."));
1161 }
b9c361e0 1162 }
252b5132
RH		 1163
1164 else if (strcmp (arg, "regnames") == 0)
b34976b6 1165 reg_names_p = TRUE;
252b5132
RH		 1166
1167 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1168 reg_names_p = FALSE;
252b5132
RH		 1169
1170#ifdef OBJ_ELF
99a814a1
AM		 1171 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1172 that require relocation. */
252b5132
RH		 1173 else if (strcmp (arg, "relocatable") == 0)
1174 {
5d6f4f16 1175 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1176 ppc_flags |= EF_PPC_RELOCATABLE;
1177 }
1178
1179 else if (strcmp (arg, "relocatable-lib") == 0)
1180 {
5d6f4f16 1181 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1182 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1183 }
1184
99a814a1 1185 /* -memb, set embedded bit. */
252b5132
RH		 1186 else if (strcmp (arg, "emb") == 0)
1187 ppc_flags |= EF_PPC_EMB;
1188
cc643b88 1189 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1190 else if (strcmp (arg, "little") == 0
1191 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1192 {
1193 target_big_endian = 0;
1194 set_target_endian = 1;
b9c361e0 1195 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1196 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1197 }
1198
1199 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1200 {
1201 target_big_endian = 1;
1202 set_target_endian = 1;
1203 }
1204
1205 else if (strcmp (arg, "solaris") == 0)
1206 {
b34976b6 1207 msolaris = TRUE;
252b5132
RH		 1208 ppc_comment_chars = ppc_solaris_comment_chars;
1209 }
1210
1211 else if (strcmp (arg, "no-solaris") == 0)
1212 {
b34976b6 1213 msolaris = FALSE;
252b5132
RH		 1214 ppc_comment_chars = ppc_eabi_comment_chars;
1215 }
1216#endif
1217 else
1218 {
1219 as_bad (_("invalid switch -m%s"), arg);
1220 return 0;
1221 }
1222 break;
1223
1224#ifdef OBJ_ELF
1225 /* -V: SVR4 argument to print version ID. */
1226 case 'V':
1227 print_version_id ();
1228 break;
1229
1230 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1231 should be emitted or not. FIXME: Not implemented. */
1232 case 'Q':
1233 break;
1234
1235 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1236 rather than .stabs.excl, which is ignored by the linker.
1237 FIXME: Not implemented. */
1238 case 's':
1239 if (arg)
1240 return 0;
1241
1242 break;
1243#endif
1244
cef4f754
AM		 1245 case OPTION_NOPS:
1246 {
1247 char *end;
1248 nop_limit = strtoul (optarg, &end, 0);
1249 if (*end)
1250 as_bad (_("--nops needs a numeric argument"));
1251 }
1252 break;
85645aed 1253
bf7279d5
AM		 1254 case 0:
1255 break;
1256
252b5132
RH		 1257 default:
1258 return 0;
1259 }
1260
1261 return 1;
1262}
1263
1264void
98027b10 1265md_show_usage (FILE *stream)
252b5132 1266{
bc805888 1267 fprintf (stream, _("\
252b5132 1268PowerPC options:\n\
ce3d2015
AM		 1269-a32 generate ELF32/XCOFF32\n\
1270-a64 generate ELF64/XCOFF64\n\
1271-u ignored\n\
1272-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1273-mpwr generate code for POWER (RIOS1)\n\
1274-m601 generate code for PowerPC 601\n\
418c1742 1275-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1276 generate code for PowerPC 603/604\n\
1277-m403 generate code for PowerPC 403\n\
1278-m405 generate code for PowerPC 405\n\
1279-m440 generate code for PowerPC 440\n\
1280-m464 generate code for PowerPC 464\n\
1281-m476 generate code for PowerPC 476\n\
f5c120c5 1282-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1283 generate code for PowerPC 7400/7410/7450/7455\n\
1284-m750cl generate code for PowerPC 750cl\n"));
df12615d 1285 fprintf (stream, _("\
ce3d2015
AM		 1286-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1287-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1288-mbooke generate code for 32-bit PowerPC BookE\n\
1289-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1290-mpower4, -mpwr4 generate code for Power4 architecture\n\
1291-mpower5, -mpwr5, -mpwr5x\n\
1292 generate code for Power5 architecture\n\
1293-mpower6, -mpwr6 generate code for Power6 architecture\n\
1294-mpower7, -mpwr7 generate code for Power7 architecture\n\
5817ffd1 1295-mpower8, -mpwr8 generate code for Power8 architecture\n\
ce3d2015
AM		 1296-mcell generate code for Cell Broadband Engine architecture\n\
1297-mcom generate code Power/PowerPC common instructions\n\
1298-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1299 fprintf (stream, _("\
ce3d2015
AM		 1300-maltivec generate code for AltiVec\n\
1301-mvsx generate code for Vector-Scalar (VSX) instructions\n\
5817ffd1 1302-mhtm generate code for Hardware Transactional Memory\n\
ce3d2015
AM		 1303-me300 generate code for PowerPC e300 family\n\
1304-me500, -me500x2 generate code for Motorola e500 core complex\n\
1305-me500mc, generate code for Freescale e500mc core complex\n\
1306-me500mc64, generate code for Freescale e500mc64 core complex\n\
aea77599
AM		 1307-me5500, generate code for Freescale e5500 core complex\n\
1308-me6500, generate code for Freescale e6500 core complex\n\
ce3d2015 1309-mspe generate code for Motorola SPE instructions\n\
b9c361e0 1310-mvle generate code for Freescale VLE instructions\n\
ce3d2015
AM		 1311-mtitan generate code for AppliedMicro Titan core complex\n\
1312-mregnames Allow symbolic names for registers\n\
1313-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1314#ifdef OBJ_ELF
bc805888 1315 fprintf (stream, _("\
ce3d2015
AM		 1316-mrelocatable support for GCC's -mrelocatble option\n\
1317-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1318-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1319-mlittle, -mlittle-endian, -le\n\
ce3d2015 1320 generate code for a little endian machine\n\
b8b738ac 1321-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1322 generate code for a big endian machine\n\
1323-msolaris generate code for Solaris\n\
1324-mno-solaris do not generate code for Solaris\n\
b8b738ac 1325-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1326-V print assembler version number\n\
1327-Qy, -Qn ignored\n"));
252b5132 1328#endif
cef4f754 1329 fprintf (stream, _("\
bf7279d5
AM		 1330-nops=count when aligning, more than COUNT nops uses a branch\n\
1331-ppc476-workaround warn if emitting data to code sections\n"));
252b5132
RH		 1332}
1333\f
1334/* Set ppc_cpu if it is not already set. */
1335
1336static void
98027b10 1337ppc_set_cpu (void)
252b5132
RH		 1338{
1339 const char *default_os = TARGET_OS;
1340 const char *default_cpu = TARGET_CPU;
1341
7102e95e 1342 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1343 {
2a98c3a6 1344 if (ppc_obj64)
bdc70b4a 1345 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1346 else if (strncmp (default_os, "aix", 3) == 0
1347 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1348 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1349 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1350 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1351 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1352 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1353 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1354 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1355 else
d6ed37ed 1356 as_fatal (_("unknown default cpu = %s, os = %s"),
99a814a1 1357 default_cpu, default_os);
252b5132
RH		 1358 }
1359}
1360
9232bbb0
AM		 1361/* Figure out the BFD architecture to use. This function and ppc_mach
1362 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1363
1364enum bfd_architecture
98027b10 1365ppc_arch (void)
252b5132
RH		 1366{
1367 const char *default_cpu = TARGET_CPU;
1368 ppc_set_cpu ();
1369
1370 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1371 return bfd_arch_powerpc;
b9c361e0
JL		 1372 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1373 return bfd_arch_powerpc;
1374 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
252b5132 1375 return bfd_arch_rs6000;
b9c361e0 1376 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
252b5132
RH		 1377 {
1378 if (strcmp (default_cpu, "rs6000") == 0)
1379 return bfd_arch_rs6000;
0baf16f2 1380 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1381 return bfd_arch_powerpc;
1382 }
1383
d6ed37ed 1384 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
252b5132
RH		 1385 return bfd_arch_unknown;
1386}
1387
7f6d05e8 1388unsigned long
98027b10 1389ppc_mach (void)
7f6d05e8 1390{
2a98c3a6
AM		 1391 if (ppc_obj64)
1392 return bfd_mach_ppc64;
1393 else if (ppc_arch () == bfd_arch_rs6000)
1394 return bfd_mach_rs6k;
ce3d2015
AM		 1395 else if (ppc_cpu & PPC_OPCODE_TITAN)
1396 return bfd_mach_ppc_titan;
b9c361e0
JL		 1397 else if (ppc_cpu & PPC_OPCODE_VLE)
1398 return bfd_mach_ppc_vle;
2a98c3a6
AM		 1399 else
1400 return bfd_mach_ppc;
7f6d05e8
CP		 1401}
1402
81d4177b 1403extern char*
98027b10 1404ppc_target_format (void)
7f6d05e8
CP		 1405{
1406#ifdef OBJ_COFF
1407#ifdef TE_PE
99a814a1 1408 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1409#elif TE_POWERMAC
0baf16f2 1410 return "xcoff-powermac";
7f6d05e8 1411#else
eb1e0e80 1412# ifdef TE_AIX5
edc1d652 1413 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1414# else
edc1d652 1415 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1416# endif
7f6d05e8 1417#endif
7f6d05e8
CP		 1418#endif
1419#ifdef OBJ_ELF
edc1d652
AM		 1420# ifdef TE_FreeBSD
1421 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1422# elif defined (TE_VXWORKS)
9d8504b1
PB		 1423 return "elf32-powerpc-vxworks";
1424# else
0baf16f2 1425 return (target_big_endian
2b3c4602
AM		 1426 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1427 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1428# endif
7f6d05e8
CP		 1429#endif
1430}
1431
b9c361e0
JL		 1432/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1433 Return TRUE if there's a problem, otherwise FALSE. */
1434
1435static bfd_boolean
1436insn_validate (const struct powerpc_opcode *op)
1437{
1438 const unsigned char *o;
1439 unsigned long omask = op->mask;
1440
1441 /* The mask had better not trim off opcode bits. */
1442 if ((op->opcode & omask) != op->opcode)
1443 {
1444 as_bad (_("mask trims opcode bits for %s"), op->name);
1445 return TRUE;
1446 }
1447
1448 /* The operands must not overlap the opcode or each other. */
1449 for (o = op->operands; *o; ++o)
1450 {
1451 if (*o >= num_powerpc_operands)
1452 {
1453 as_bad (_("operand index error for %s"), op->name);
1454 return TRUE;
1455 }
1456 else
1457 {
1458 const struct powerpc_operand *operand = &powerpc_operands[*o];
1459 if (operand->shift != PPC_OPSHIFT_INV)
1460 {
1461 unsigned long mask;
1462
1463 if (operand->shift >= 0)
1464 mask = operand->bitm << operand->shift;
1465 else
1466 mask = operand->bitm >> -operand->shift;
1467 if (omask & mask)
1468 {
1469 as_bad (_("operand %d overlap in %s"),
1470 (int) (o - op->operands), op->name);
1471 return TRUE;
1472 }
1473 omask |= mask;
1474 }
1475 }
1476 }
1477 return FALSE;
1478}
1479
69c040df 1480/* Insert opcodes and macros into hash tables. Called at startup and
1fe532cf 1481 for .machine pseudo. */
252b5132 1482
69c040df
AM		 1483static void
1484ppc_setup_opcodes (void)
252b5132 1485{
98027b10 1486 const struct powerpc_opcode *op;
252b5132
RH		 1487 const struct powerpc_opcode *op_end;
1488 const struct powerpc_macro *macro;
1489 const struct powerpc_macro *macro_end;
b84bf58a 1490 bfd_boolean bad_insn = FALSE;
252b5132 1491
69c040df
AM		 1492 if (ppc_hash != NULL)
1493 hash_die (ppc_hash);
1494 if (ppc_macro_hash != NULL)
1495 hash_die (ppc_macro_hash);
252b5132
RH		 1496
1497 /* Insert the opcodes into a hash table. */
1498 ppc_hash = hash_new ();
1499
c43a438d 1500 if (ENABLE_CHECKING)
b84bf58a 1501 {
c43a438d 1502 unsigned int i;
b84bf58a 1503
3b8b57a9
AM		 1504 /* An index into powerpc_operands is stored in struct fix
1505 fx_pcrel_adjust which is 8 bits wide. */
1506 gas_assert (num_powerpc_operands < 256);
1507
c43a438d
AM		 1508 /* Check operand masks. Code here and in the disassembler assumes
1509 all the 1's in the mask are contiguous. */
1510 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1511 {
c43a438d
AM		 1512 unsigned long mask = powerpc_operands[i].bitm;
1513 unsigned long right_bit;
1514 unsigned int j;
1515
1516 right_bit = mask & -mask;
1517 mask += right_bit;
1518 right_bit = mask & -mask;
1519 if (mask != right_bit)
1520 {
1521 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1522 bad_insn = TRUE;
1523 }
1524 for (j = i + 1; j < num_powerpc_operands; ++j)
1525 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1526 sizeof (powerpc_operands[0])) == 0)
1527 {
1528 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1529 j, i);
1530 bad_insn = TRUE;
1531 }
b84bf58a
AM		 1532 }
1533 }
1534
252b5132
RH		 1535 op_end = powerpc_opcodes + powerpc_num_opcodes;
1536 for (op = powerpc_opcodes; op < op_end; op++)
1537 {
c43a438d 1538 if (ENABLE_CHECKING)
b84bf58a 1539 {
d815f1a9 1540 if (op != powerpc_opcodes)
8dbcd839 1541 {
b9c361e0
JL		 1542 int old_opcode = PPC_OP (op[-1].opcode);
1543 int new_opcode = PPC_OP (op[0].opcode);
1544
1545#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1546 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1547 op->name, (unsigned int) (op - powerpc_opcodes),
1548 (unsigned int) new_opcode, (unsigned int) op->opcode,
1549 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1550#endif
1551
d815f1a9
AM		 1552 /* The major opcodes had better be sorted. Code in the
1553 disassembler assumes the insns are sorted according to
1554 major opcode. */
b9c361e0 1555 if (new_opcode < old_opcode)
d815f1a9
AM		 1556 {
1557 as_bad (_("major opcode is not sorted for %s"),
1558 op->name);
1559 bad_insn = TRUE;
1560 }
8dbcd839 1561 }
b9c361e0
JL		 1562 bad_insn |= insn_validate (op);
1563 }
c43a438d 1564
b9c361e0
JL		 1565 if ((ppc_cpu & op->flags) != 0
1566 && !(ppc_cpu & op->deprecated))
1567 {
1568 const char *retval;
1569
1570 retval = hash_insert (ppc_hash, op->name, (void *) op);
1571 if (retval != NULL)
c43a438d 1572 {
b9c361e0 1573 as_bad (_("duplicate instruction %s"),
c43a438d
AM		 1574 op->name);
1575 bad_insn = TRUE;
1576 }
b9c361e0
JL		 1577 }
1578 }
c43a438d 1579
b9c361e0
JL		 1580 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1581 for (op = powerpc_opcodes; op < op_end; op++)
1582 hash_insert (ppc_hash, op->name, (void *) op);
1583
1584 op_end = vle_opcodes + vle_num_opcodes;
1585 for (op = vle_opcodes; op < op_end; op++)
1586 {
1587 if (ENABLE_CHECKING)
1588 {
1589 if (op != vle_opcodes)
1590 {
1591 unsigned old_seg, new_seg;
1592
1593 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1594 old_seg = VLE_OP_TO_SEG (old_seg);
1595 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1596 new_seg = VLE_OP_TO_SEG (new_seg);
1597
1598#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1599 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1600 op->name, (unsigned int) (op - powerpc_opcodes),
1601 (unsigned int) new_seg, (unsigned int) op->opcode,
1602 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1603#endif
1604 /* The major opcodes had better be sorted. Code in the
1605 disassembler assumes the insns are sorted according to
1606 major opcode. */
1607 if (new_seg < old_seg)
1608 {
1609 as_bad (_("major opcode is not sorted for %s"),
1610 op->name);
1611 bad_insn = TRUE;
1612 }
1613 }
1614
1615 bad_insn |= insn_validate (op);
c43a438d 1616 }
252b5132 1617
bdc70b4a 1618 if ((ppc_cpu & op->flags) != 0
1cb0a767 1619 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1620 {
1621 const char *retval;
1622
98027b10 1623 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1624 if (retval != NULL)
252b5132 1625 {
b84bf58a 1626 as_bad (_("duplicate instruction %s"),
99a814a1 1627 op->name);
b84bf58a 1628 bad_insn = TRUE;
252b5132
RH		 1629 }
1630 }
1631 }
1632
b9c361e0
JL		 1633 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1634 for (op = vle_opcodes; op < op_end; op++)
98027b10 1635 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1636
252b5132
RH		 1637 /* Insert the macros into a hash table. */
1638 ppc_macro_hash = hash_new ();
1639
1640 macro_end = powerpc_macros + powerpc_num_macros;
1641 for (macro = powerpc_macros; macro < macro_end; macro++)
1642 {
33740db9 1643 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1644 {
1645 const char *retval;
1646
98027b10 1647 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1648 if (retval != (const char *) NULL)
1649 {
b84bf58a
AM		 1650 as_bad (_("duplicate macro %s"), macro->name);
1651 bad_insn = TRUE;
252b5132
RH		 1652 }
1653 }
1654 }
1655
b84bf58a 1656 if (bad_insn)
252b5132 1657 abort ();
69c040df
AM		 1658}
1659
1660/* This function is called when the assembler starts up. It is called
1661 after the options have been parsed and the output file has been
1662 opened. */
1663
1664void
98027b10 1665md_begin (void)
69c040df
AM		 1666{
1667 ppc_set_cpu ();
1668
1669 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
8fbf7334 1670 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
69c040df
AM		 1671
1672#ifdef OBJ_ELF
1673 /* Set the ELF flags if desired. */
1674 if (ppc_flags && !msolaris)
1675 bfd_set_private_flags (stdoutput, ppc_flags);
1676#endif
1677
1678 ppc_setup_opcodes ();
252b5132 1679
67c1ffbe 1680 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1681 by the user. */
252b5132
RH		 1682 if (!set_target_endian)
1683 {
1684 set_target_endian = 1;
1685 target_big_endian = PPC_BIG_ENDIAN;
1686 }
1687
1688#ifdef OBJ_XCOFF
1689 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1690
1691 /* Create dummy symbols to serve as initial csects. This forces the
1692 text csects to precede the data csects. These symbols will not
1693 be output. */
1694 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1695 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1696 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1697 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1698#endif
1699
1700#ifdef TE_PE
1701
1702 ppc_current_section = text_section;
81d4177b 1703 ppc_previous_section = 0;
252b5132
RH		 1704
1705#endif
1706}
1707
6a0c61b7 1708void
98027b10 1709ppc_cleanup (void)
6a0c61b7 1710{
dc1d03fc 1711#ifdef OBJ_ELF
6a0c61b7
EZ		 1712 if (ppc_apuinfo_list == NULL)
1713 return;
1714
1715 /* Ok, so write the section info out. We have this layout:
1716
1717 byte data what
1718 ---- ---- ----
1719 0 8 length of "APUinfo\0"
1720 4 (n*4) number of APU's (4 bytes each)
1721 8 2 note type 2
1722 12 "APUinfo\0" name
1723 20 APU#1 first APU's info
1724 24 APU#2 second APU's info
1725 ... ...
1726 */
1727 {
1728 char *p;
1729 asection *seg = now_seg;
1730 subsegT subseg = now_subseg;
1731 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1732 unsigned int i;
6a0c61b7
EZ		 1733
1734 /* Create the .PPC.EMB.apuinfo section. */
1735 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1736 bfd_set_section_flags (stdoutput,
1737 apuinfo_secp,
e1a9cb8e 1738 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1739
1740 p = frag_more (4);
1741 md_number_to_chars (p, (valueT) 8, 4);
1742
1743 p = frag_more (4);
e98d298c 1744 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1745
1746 p = frag_more (4);
1747 md_number_to_chars (p, (valueT) 2, 4);
1748
1749 p = frag_more (8);
1750 strcpy (p, "APUinfo");
1751
1752 for (i = 0; i < ppc_apuinfo_num; i++)
1753 {
b34976b6
AM		 1754 p = frag_more (4);
1755 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1756 }
1757
1758 frag_align (2, 0, 0);
1759
1760 /* We probably can't restore the current segment, for there likely
1761 isn't one yet... */
1762 if (seg && subseg)
1763 subseg_set (seg, subseg);
1764 }
dc1d03fc 1765#endif
6a0c61b7
EZ		 1766}
1767
252b5132
RH		 1768/* Insert an operand value into an instruction. */
1769
1770static unsigned long
a1867a27
AM		 1771ppc_insert_operand (unsigned long insn,
1772 const struct powerpc_operand *operand,
1773 offsetT val,
91d6fa6a 1774 ppc_cpu_t cpu,
a1867a27
AM		 1775 char *file,
1776 unsigned int line)
252b5132 1777{
b84bf58a 1778 long min, max, right;
eb42fac1 1779
b84bf58a
AM		 1780 max = operand->bitm;
1781 right = max & -max;
1782 min = 0;
1783
a47622ac 1784 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132 1785 {
a47622ac
AM		 1786 /* Extend the allowed range for addis to [-65536, 65535].
1787 Similarly for some VLE high part insns. For 64-bit it
1788 would be good to disable this for signed fields since the
1789 value is sign extended into the high 32 bits of the register.
1790 If the value is, say, an address, then we might care about
1791 the high bits. However, gcc as of 2014-06 uses unsigned
1792 values when loading the high part of 64-bit constants using
1793 lis.
1794 Use the same extended range for cmpli, to allow at least
1795 [-32768, 65535]. */
1796 min = ~max & -right;
1797 }
1798 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1799 {
1800 max = (max >> 1) & -right;
931774a9 1801 min = ~max & -right;
b84bf58a 1802 }
252b5132 1803
b84bf58a 1804 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1805 max++;
252b5132 1806
b84bf58a 1807 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1808 {
1809 long tmp = min;
1810 min = -max;
1811 max = -tmp;
1812 }
b84bf58a 1813
a1867a27
AM		 1814 if (min <= max)
1815 {
1816 /* Some people write constants with the sign extension done by
1817 hand but only up to 32 bits. This shouldn't really be valid,
1818 but, to permit this code to assemble on a 64-bit host, we
1819 sign extend the 32-bit value to 64 bits if so doing makes the
1820 value valid. */
1821 if (val > max
1822 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1823 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1824 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1825 val = val - 0x80000000 - 0x80000000;
1826
1827 /* Similarly, people write expressions like ~(1<<15), and expect
1828 this to be OK for a 32-bit unsigned value. */
1829 else if (val < min
1830 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1831 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1832 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1833 val = val + 0x80000000 + 0x80000000;
1834
1835 else if (val < min
1836 || val > max
1837 || (val & (right - 1)) != 0)
1838 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1839 }
b84bf58a 1840
252b5132
RH		 1841 if (operand->insert)
1842 {
1843 const char *errmsg;
1844
1845 errmsg = NULL;
91d6fa6a 1846 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1847 if (errmsg != (const char *) NULL)
ee2c9aa9 1848 as_bad_where (file, line, "%s", errmsg);
252b5132 1849 }
b9c361e0 1850 else if (operand->shift >= 0)
b84bf58a 1851 insn |= ((long) val & operand->bitm) << operand->shift;
b9c361e0
JL		 1852 else
1853 insn |= ((long) val & operand->bitm) >> -operand->shift;
252b5132
RH		 1854
1855 return insn;
1856}
1857
1858\f
1859#ifdef OBJ_ELF
1860/* Parse @got, etc. and return the desired relocation. */
1861static bfd_reloc_code_real_type
98027b10 1862ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1863{
1864 struct map_bfd {
1865 char *string;
b7d7dc63
AM		 1866 unsigned int length : 8;
1867 unsigned int valid32 : 1;
1868 unsigned int valid64 : 1;
1869 unsigned int reloc;
252b5132
RH		 1870 };
1871
1872 char ident[20];
1873 char *str = *str_p;
1874 char *str2;
1875 int ch;
1876 int len;
15c1449b 1877 const struct map_bfd *ptr;
252b5132 1878
b7d7dc63
AM		 1879#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1880#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1881#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1882
15c1449b 1883 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1884 MAP ("l", BFD_RELOC_LO16),
1885 MAP ("h", BFD_RELOC_HI16),
1886 MAP ("ha", BFD_RELOC_HI16_S),
1887 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1888 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1889 MAP ("got", BFD_RELOC_16_GOTOFF),
1890 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1891 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1892 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1893 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1894 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1895 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1896 MAP ("copy", BFD_RELOC_PPC_COPY),
1897 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1898 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1899 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1900 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1901 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1902 MAP ("tls", BFD_RELOC_PPC_TLS),
1903 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1904 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1905 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1906 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1907 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1908 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1909 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1910 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1911 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1912 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1913 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1914 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1915 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1916 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1917 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1918 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1919 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1920 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1921 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1922 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1923 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1924 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1925 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1926 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1927 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1928 MAP32 ("fixup", BFD_RELOC_CTOR),
1929 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1930 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1931 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1932 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1933 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1934 MAP32 ("sdarel", BFD_RELOC_GPREL16),
b9c361e0
JL		 1935 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1936 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1937 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
b7d7dc63
AM		 1938 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1939 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1940 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1941 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1942 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1943 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1944 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1945 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1946 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
b9c361e0 1947 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
b7d7dc63
AM		 1948 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1949 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1950 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1951 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1952 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1953 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1954 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1955 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
f9c6b907
AM		 1956 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1957 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
b7d7dc63
AM		 1958 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1959 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1960 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1961 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1962 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1963 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1964 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1965 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1966 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
f9c6b907
AM		 1967 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1968 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
b7d7dc63
AM		 1969 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1970 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1971 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1972 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
45965137 1973 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
f9c6b907
AM		 1974 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1975 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
b7d7dc63
AM		 1976 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1977 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1978 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1979 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
62ebcb5c 1980 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
252b5132
RH		 1981 };
1982
1983 if (*str++ != '@')
62ebcb5c 1984 return BFD_RELOC_NONE;
252b5132
RH		 1985
1986 for (ch = *str, str2 = ident;
1987 (str2 < ident + sizeof (ident) - 1
3882b010 1988 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1989 ch = *++str)
1990 {
3882b010 1991 *str2++ = TOLOWER (ch);
252b5132
RH		 1992 }
1993
1994 *str2 = '\0';
1995 len = str2 - ident;
1996
1997 ch = ident[0];
1998 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1999 if (ch == ptr->string[0]
2000 && len == ptr->length
b7d7dc63
AM		 2001 && memcmp (ident, ptr->string, ptr->length) == 0
2002 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 2003 {
15c1449b
AM		 2004 int reloc = ptr->reloc;
2005
727fc41e
AM		 2006 if (!ppc_obj64 && exp_p->X_add_number != 0)
2007 {
2008 switch (reloc)
2009 {
2010 case BFD_RELOC_16_GOTOFF:
2011 case BFD_RELOC_LO16_GOTOFF:
2012 case BFD_RELOC_HI16_GOTOFF:
2013 case BFD_RELOC_HI16_S_GOTOFF:
2014 as_warn (_("identifier+constant@got means "
2015 "identifier@got+constant"));
2016 break;
2017
2018 case BFD_RELOC_PPC_GOT_TLSGD16:
2019 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2020 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2021 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2022 case BFD_RELOC_PPC_GOT_TLSLD16:
2023 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2024 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2025 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2026 case BFD_RELOC_PPC_GOT_DTPREL16:
2027 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2028 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2029 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2030 case BFD_RELOC_PPC_GOT_TPREL16:
2031 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2032 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2033 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2034 as_bad (_("symbol+offset not supported for got tls"));
2035 break;
2036 }
2037 }
5f6db75a
AM		 2038
2039 /* Now check for identifier@suffix+constant. */
2040 if (*str == '-' || *str == '+')
252b5132 2041 {
5f6db75a
AM		 2042 char *orig_line = input_line_pointer;
2043 expressionS new_exp;
2044
2045 input_line_pointer = str;
2046 expression (&new_exp);
2047 if (new_exp.X_op == O_constant)
252b5132 2048 {
5f6db75a
AM		 2049 exp_p->X_add_number += new_exp.X_add_number;
2050 str = input_line_pointer;
252b5132 2051 }
5f6db75a
AM		 2052
2053 if (&input_line_pointer != str_p)
2054 input_line_pointer = orig_line;
252b5132 2055 }
252b5132 2056 *str_p = str;
0baf16f2 2057
2b3c4602 2058 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 2059 && exp_p->X_op == O_symbol
2060 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 2061 {
9f2b53d7
AM		 2062 /* Change the symbol so that the dummy .TOC. symbol can be
2063 omitted from the object file. */
0baf16f2
AM		 2064 exp_p->X_add_symbol = &abs_symbol;
2065 }
2066
15c1449b 2067 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 2068 }
2069
62ebcb5c 2070 return BFD_RELOC_NONE;
252b5132
RH		 2071}
2072
62ebcb5c 2073/* Support @got, etc. on constants emitted via .short, .int etc. */
99a814a1 2074
62ebcb5c
AM		 2075bfd_reloc_code_real_type
2076ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2077{
2078 expression (exp);
2079 if (nbytes >= 2 && *input_line_pointer == '@')
2080 return ppc_elf_suffix (&input_line_pointer, exp);
2081 return BFD_RELOC_NONE;
252b5132
RH		 2082}
2083
bf7279d5
AM		 2084/* Warn when emitting data to code sections, unless we are emitting
2085 a relocation that ld --ppc476-workaround uses to recognise data
2086 *and* there was an unconditional branch prior to the data. */
2087
2088void
2089ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2090 unsigned int nbytes, fixS *fix)
2091{
2092 if (warn_476
2093 && (now_seg->flags & SEC_CODE) != 0
2094 && (nbytes != 4
2095 || fix == NULL
2096 || !(fix->fx_r_type == BFD_RELOC_32
2097 || fix->fx_r_type == BFD_RELOC_CTOR
2098 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2099 || !(last_seg == now_seg && last_subseg == now_subseg)
2100 || !((last_insn & (0x3f << 26)) == (18u << 26)
2101 || ((last_insn & (0x3f << 26)) == (16u << 26)
2102 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2103 || ((last_insn & (0x3f << 26)) == (19u << 26)
2104 && (last_insn & (0x3ff << 1)) == (16u << 1)
2105 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2106 {
2107 /* Flag that we've warned. */
2108 if (fix != NULL)
2109 fix->fx_tcbit = 1;
2110
2111 as_warn (_("data in executable section"));
2112 }
2113}
2114
252b5132
RH		 2115/* Solaris pseduo op to change to the .rodata section. */
2116static void
98027b10 2117ppc_elf_rdata (int xxx)
252b5132
RH		 2118{
2119 char *save_line = input_line_pointer;
2120 static char section[] = ".rodata\n";
2121
99a814a1 2122 /* Just pretend this is .section .rodata */
252b5132
RH		 2123 input_line_pointer = section;
2124 obj_elf_section (xxx);
2125
2126 input_line_pointer = save_line;
2127}
2128
99a814a1 2129/* Pseudo op to make file scope bss items. */
252b5132 2130static void
98027b10 2131ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2132{
98027b10
AM		 2133 char *name;
2134 char c;
2135 char *p;
252b5132 2136 offsetT size;
98027b10 2137 symbolS *symbolP;
252b5132
RH		 2138 offsetT align;
2139 segT old_sec;
2140 int old_subsec;
2141 char *pfrag;
2142 int align2;
2143
2144 name = input_line_pointer;
2145 c = get_symbol_end ();
2146
99a814a1 2147 /* just after name is now '\0'. */
252b5132
RH		 2148 p = input_line_pointer;
2149 *p = c;
2150 SKIP_WHITESPACE ();
2151 if (*input_line_pointer != ',')
2152 {
d6ed37ed 2153 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 2154 ignore_rest_of_line ();
2155 return;
2156 }
2157
2158 input_line_pointer++; /* skip ',' */
2159 if ((size = get_absolute_expression ()) < 0)
2160 {
2161 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2162 ignore_rest_of_line ();
2163 return;
2164 }
2165
2166 /* The third argument to .lcomm is the alignment. */
2167 if (*input_line_pointer != ',')
2168 align = 8;
2169 else
2170 {
2171 ++input_line_pointer;
2172 align = get_absolute_expression ();
2173 if (align <= 0)
2174 {
2175 as_warn (_("ignoring bad alignment"));
2176 align = 8;
2177 }
2178 }
2179
2180 *p = 0;
2181 symbolP = symbol_find_or_make (name);
2182 *p = c;
2183
2184 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2185 {
d6ed37ed 2186 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 2187 S_GET_NAME (symbolP));
2188 ignore_rest_of_line ();
2189 return;
2190 }
2191
2192 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2193 {
d6ed37ed 2194 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 2195 S_GET_NAME (symbolP),
2196 (long) S_GET_VALUE (symbolP),
2197 (long) size);
2198
2199 ignore_rest_of_line ();
2200 return;
2201 }
2202
99a814a1 2203 /* Allocate_bss. */
252b5132
RH		 2204 old_sec = now_seg;
2205 old_subsec = now_subseg;
2206 if (align)
2207 {
99a814a1 2208 /* Convert to a power of 2 alignment. */
252b5132
RH		 2209 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2210 if (align != 1)
2211 {
d6ed37ed 2212 as_bad (_("common alignment not a power of 2"));
252b5132
RH		 2213 ignore_rest_of_line ();
2214 return;
2215 }
2216 }
2217 else
2218 align2 = 0;
2219
2220 record_alignment (bss_section, align2);
cbe02d4f 2221 subseg_set (bss_section, 1);
252b5132
RH		 2222 if (align2)
2223 frag_align (align2, 0, 0);
2224 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2225 symbol_get_frag (symbolP)->fr_symbol = 0;
2226 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2227 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2228 (char *) 0);
2229 *pfrag = 0;
2230 S_SET_SIZE (symbolP, size);
2231 S_SET_SEGMENT (symbolP, bss_section);
2232 subseg_set (old_sec, old_subsec);
2233 demand_empty_rest_of_line ();
2234}
2235
6911b7dc
AM		 2236/* Pseudo op to set symbol local entry point. */
2237static void
2238ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2239{
2240 char *name = input_line_pointer;
2241 char c = get_symbol_end ();
2242 char *p;
2243 expressionS exp;
2244 symbolS *sym;
2245 asymbol *bfdsym;
2246 elf_symbol_type *elfsym;
2247
2248 p = input_line_pointer;
2249 *p = c;
2250 SKIP_WHITESPACE ();
2251 if (*input_line_pointer != ',')
2252 {
2253 *p = 0;
2254 as_bad (_("expected comma after name `%s' in .localentry directive"),
2255 name);
2256 *p = c;
2257 ignore_rest_of_line ();
2258 return;
2259 }
2260 input_line_pointer++;
2261 expression (&exp);
2262 if (exp.X_op == O_absent)
2263 {
2264 as_bad (_("missing expression in .localentry directive"));
2265 exp.X_op = O_constant;
2266 exp.X_add_number = 0;
2267 }
2268 *p = 0;
2269 sym = symbol_find_or_make (name);
2270 *p = c;
2271
2272 if (resolve_expression (&exp)
2273 && exp.X_op == O_constant)
2274 {
2275 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2276
e2b5892e 2277 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
6911b7dc
AM		 2278 as_bad (_(".localentry expression for `%s' "
2279 "is not a valid power of 2"), S_GET_NAME (sym));
2280 else
2281 {
2282 bfdsym = symbol_get_bfdsym (sym);
2283 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2284 gas_assert (elfsym);
2285 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2286 elfsym->internal_elf_sym.st_other |= encoded;
2287 if (ppc_abiversion == 0)
2288 ppc_abiversion = 2;
2289 }
2290 }
2291 else
2292 as_bad (_(".localentry expression for `%s' "
2293 "does not evaluate to a constant"), S_GET_NAME (sym));
2294
2295 demand_empty_rest_of_line ();
2296}
2297
ee67d69a
AM		 2298/* Pseudo op to set ABI version. */
2299static void
2300ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2301{
2302 expressionS exp;
2303
2304 expression (&exp);
2305 if (exp.X_op == O_absent)
2306 {
2307 as_bad (_("missing expression in .abiversion directive"));
2308 exp.X_op = O_constant;
2309 exp.X_add_number = 0;
2310 }
2311
2312 if (resolve_expression (&exp)
2313 && exp.X_op == O_constant)
2314 ppc_abiversion = exp.X_add_number;
2315 else
2316 as_bad (_(".abiversion expression does not evaluate to a constant"));
2317 demand_empty_rest_of_line ();
2318}
2319
2320/* Set ABI version in output file. */
2321void
2322ppc_elf_end (void)
2323{
2324 if (ppc_obj64 && ppc_abiversion != 0)
2325 {
2326 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2327 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2328 }
2329}
2330
252b5132
RH		 2331/* Validate any relocations emitted for -mrelocatable, possibly adding
2332 fixups for word relocations in writable segments, so we can adjust
2333 them at runtime. */
2334static void
98027b10 2335ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2336{
2337 if (fixp->fx_done || fixp->fx_pcrel)
2338 return;
2339
2340 switch (shlib)
2341 {
2342 case SHLIB_NONE:
2343 case SHLIB_PIC:
2344 return;
2345
5d6f4f16 2346 case SHLIB_MRELOCATABLE:
62ebcb5c 2347 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
252b5132
RH		 2348 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2349 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2350 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2351 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2352 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2353 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2354 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2355 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2356 && strcmp (segment_name (seg), ".got2") != 0
2357 && strcmp (segment_name (seg), ".dtors") != 0
2358 && strcmp (segment_name (seg), ".ctors") != 0
2359 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2360 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2361 && strcmp (segment_name (seg), ".eh_frame") != 0
2362 && strcmp (segment_name (seg), ".ex_shared") != 0)
2363 {
2364 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2365 || fixp->fx_r_type != BFD_RELOC_CTOR)
2366 {
2367 as_bad_where (fixp->fx_file, fixp->fx_line,
d6ed37ed 2368 _("relocation cannot be done when using -mrelocatable"));
252b5132
RH		 2369 }
2370 }
2371 return;
2372 }
2373}
0baf16f2 2374
7e8d4ab4
AM		 2375/* Prevent elf_frob_file_before_adjust removing a weak undefined
2376 function descriptor sym if the corresponding code sym is used. */
2377
2378void
98027b10 2379ppc_frob_file_before_adjust (void)
0baf16f2 2380{
7e8d4ab4 2381 symbolS *symp;
9232bbb0 2382 asection *toc;
0baf16f2 2383
7e8d4ab4
AM		 2384 if (!ppc_obj64)
2385 return;
2386
2387 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2388 {
7e8d4ab4
AM		 2389 const char *name;
2390 char *dotname;
2391 symbolS *dotsym;
2392 size_t len;
2393
2394 name = S_GET_NAME (symp);
2395 if (name[0] == '.')
2396 continue;
2397
2398 if (! S_IS_WEAK (symp)
2399 || S_IS_DEFINED (symp))
2400 continue;
2401
2402 len = strlen (name) + 1;
2403 dotname = xmalloc (len + 1);
2404 dotname[0] = '.';
2405 memcpy (dotname + 1, name, len);
461b725f 2406 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2407 free (dotname);
2408 if (dotsym != NULL && (symbol_used_p (dotsym)
2409 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2410 symbol_mark_used (symp);
2411
0baf16f2
AM		 2412 }
2413
9232bbb0
AM		 2414 toc = bfd_get_section_by_name (stdoutput, ".toc");
2415 if (toc != NULL
01efc3af 2416 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2417 && bfd_section_size (stdoutput, toc) > 0x10000)
2418 as_warn (_("TOC section size exceeds 64k"));
a38a07e0
AM		 2419}
2420
2421/* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2422 emitted. Other uses of .TOC. will cause the symbol to be marked
2423 with BSF_KEEP in md_apply_fix. */
9232bbb0 2424
a38a07e0
AM		 2425void
2426ppc_elf_adjust_symtab (void)
2427{
2428 if (ppc_obj64)
2429 {
2430 symbolS *symp;
2431 symp = symbol_find (".TOC.");
2432 if (symp != NULL)
2433 {
2434 asymbol *bsym = symbol_get_bfdsym (symp);
2435 if ((bsym->flags & BSF_KEEP) == 0)
2436 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
a38a07e0
AM		 2437 }
2438 }
0baf16f2 2439}
252b5132
RH		 2440#endif /* OBJ_ELF */
2441\f
2442#ifdef TE_PE
2443
2444/*
99a814a1 2445 * Summary of parse_toc_entry.
252b5132
RH		 2446 *
2447 * in: Input_line_pointer points to the '[' in one of:
2448 *
2449 * [toc] [tocv] [toc32] [toc64]
2450 *
2451 * Anything else is an error of one kind or another.
2452 *
81d4177b 2453 * out:
252b5132
RH		 2454 * return value: success or failure
2455 * toc_kind: kind of toc reference
2456 * input_line_pointer:
2457 * success: first char after the ']'
2458 * failure: unchanged
2459 *
2460 * settings:
2461 *
2462 * [toc] - rv == success, toc_kind = default_toc
2463 * [tocv] - rv == success, toc_kind = data_in_toc
2464 * [toc32] - rv == success, toc_kind = must_be_32
2465 * [toc64] - rv == success, toc_kind = must_be_64
2466 *
2467 */
2468
81d4177b
KH		 2469enum toc_size_qualifier
2470{
252b5132
RH		 2471 default_toc, /* The toc cell constructed should be the system default size */
2472 data_in_toc, /* This is a direct reference to a toc cell */
2473 must_be_32, /* The toc cell constructed must be 32 bits wide */
2474 must_be_64 /* The toc cell constructed must be 64 bits wide */
2475};
2476
2477static int
98027b10 2478parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2479{
2480 char *start;
2481 char *toc_spec;
2482 char c;
2483 enum toc_size_qualifier t;
2484
99a814a1 2485 /* Save the input_line_pointer. */
252b5132
RH		 2486 start = input_line_pointer;
2487
99a814a1 2488 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2489 ++input_line_pointer;
2490 SKIP_WHITESPACE ();
81d4177b 2491
99a814a1 2492 /* Find the spelling of the operand. */
252b5132
RH		 2493 toc_spec = input_line_pointer;
2494 c = get_symbol_end ();
2495
99a814a1 2496 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2497 {
2498 t = default_toc;
2499 }
99a814a1 2500 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2501 {
2502 t = data_in_toc;
2503 }
99a814a1 2504 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2505 {
2506 t = must_be_32;
2507 }
99a814a1 2508 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2509 {
2510 t = must_be_64;
2511 }
2512 else
2513 {
2514 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2515 *input_line_pointer = c;
2516 input_line_pointer = start;
252b5132
RH		 2517 return 0;
2518 }
2519
99a814a1
AM		 2520 /* Now find the ']'. */
2521 *input_line_pointer = c;
252b5132 2522
81d4177b
KH		 2523 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2524 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2525
2526 if (c != ']')
2527 {
2528 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2529 input_line_pointer = start;
252b5132
RH		 2530 return 0;
2531 }
2532
99a814a1 2533 *toc_kind = t;
252b5132
RH		 2534 return 1;
2535}
2536#endif
3b8b57a9 2537
3e60bf4d 2538#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3b8b57a9
AM		 2539/* See whether a symbol is in the TOC section. */
2540
2541static int
2542ppc_is_toc_sym (symbolS *sym)
2543{
3e60bf4d 2544#ifdef OBJ_XCOFF
9f6e76f4
TG		 2545 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2546 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
f50c47f1 2547#endif
3e60bf4d
AM		 2548#ifdef OBJ_ELF
2549 const char *sname = segment_name (S_GET_SEGMENT (sym));
2550 if (ppc_obj64)
2551 return strcmp (sname, ".toc") == 0;
2552 else
2553 return strcmp (sname, ".got") == 0;
2554#endif
2555}
2556#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 2557\f
2558
dc1d03fc 2559#ifdef OBJ_ELF
6a0c61b7
EZ		 2560#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2561static void
98027b10 2562ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2563{
2564 unsigned int i;
2565
2566 /* Check we don't already exist. */
2567 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2568 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2569 return;
b34976b6 2570
6a0c61b7
EZ		 2571 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2572 {
2573 if (ppc_apuinfo_num_alloc == 0)
2574 {
2575 ppc_apuinfo_num_alloc = 4;
2576 ppc_apuinfo_list = (unsigned long *)
2577 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2578 }
2579 else
2580 {
2581 ppc_apuinfo_num_alloc += 4;
2582 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2583 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2584 }
2585 }
dc1d03fc 2586 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2587}
2588#undef APUID
dc1d03fc 2589#endif
6a0c61b7
EZ		 2590\f
2591
252b5132
RH		 2592/* We need to keep a list of fixups. We can't simply generate them as
2593 we go, because that would require us to first create the frag, and
2594 that would screw up references to ``.''. */
2595
2596struct ppc_fixup
2597{
2598 expressionS exp;
2599 int opindex;
2600 bfd_reloc_code_real_type reloc;
2601};
2602
2603#define MAX_INSN_FIXUPS (5)
2604
b9c361e0
JL		 2605/* Form I16L. */
2606#define E_OR2I_INSN 0x7000C000
2607#define E_AND2I_DOT_INSN 0x7000C800
2608#define E_OR2IS_INSN 0x7000D000
2609#define E_LIS_INSN 0x7000E000
2610#define E_AND2IS_DOT_INSN 0x7000E800
2611
2612/* Form I16A. */
2613#define E_ADD2I_DOT_INSN 0x70008800
2614#define E_ADD2IS_INSN 0x70009000
2615#define E_CMP16I_INSN 0x70009800
2616#define E_MULL2I_INSN 0x7000A000
2617#define E_CMPL16I_INSN 0x7000A800
2618#define E_CMPH16I_INSN 0x7000B000
2619#define E_CMPHL16I_INSN 0x7000B800
2620
252b5132
RH		 2621/* This routine is called for each instruction to be assembled. */
2622
2623void
98027b10 2624md_assemble (char *str)
252b5132
RH		 2625{
2626 char *s;
2627 const struct powerpc_opcode *opcode;
2628 unsigned long insn;
2629 const unsigned char *opindex_ptr;
2630 int skip_optional;
2631 int need_paren;
2632 int next_opindex;
2633 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2634 int fc;
2635 char *f;
09b935ac 2636 int addr_mod;
252b5132 2637 int i;
b9c361e0 2638 unsigned int insn_length;
252b5132
RH		 2639
2640 /* Get the opcode. */
3882b010 2641 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2642 ;
2643 if (*s != '\0')
2644 *s++ = '\0';
2645
2646 /* Look up the opcode in the hash table. */
2647 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2648 if (opcode == (const struct powerpc_opcode *) NULL)
2649 {
2650 const struct powerpc_macro *macro;
2651
2652 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2653 if (macro == (const struct powerpc_macro *) NULL)
d6ed37ed 2654 as_bad (_("unrecognized opcode: `%s'"), str);
252b5132
RH		 2655 else
2656 ppc_macro (s, macro);
2657
2658 return;
2659 }
2660
2661 insn = opcode->opcode;
2662
2663 str = s;
3882b010 2664 while (ISSPACE (*str))
252b5132
RH		 2665 ++str;
2666
2667 /* PowerPC operands are just expressions. The only real issue is
2668 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2669 an optional operand separate the operands only with commas (in some
2670 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2671 have optional operands). Most instructions with optional operands
2672 have only one. Those that have more than one optional operand can
2673 take either all their operands or none. So, before we start seriously
2674 parsing the operands, we check to see if we have optional operands,
2675 and if we do, we count the number of commas to see which operands
2676 have been omitted. */
252b5132
RH		 2677 skip_optional = 0;
2678 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2679 {
2680 const struct powerpc_operand *operand;
2681
2682 operand = &powerpc_operands[*opindex_ptr];
2683 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2684 {
2685 unsigned int opcount;
7fe9cf6b 2686 unsigned int num_operands_expected;
252b5132
RH		 2687
2688 /* There is an optional operand. Count the number of
2689 commas in the input line. */
2690 if (*str == '\0')
2691 opcount = 0;
2692 else
2693 {
2694 opcount = 1;
2695 s = str;
2696 while ((s = strchr (s, ',')) != (char *) NULL)
2697 {
2698 ++opcount;
2699 ++s;
2700 }
2701 }
2702
7fe9cf6b
NC		 2703 /* Compute the number of expected operands.
2704 Do not count fake operands. */
2705 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2706 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2707 ++ num_operands_expected;
2708
252b5132
RH		 2709 /* If there are fewer operands in the line then are called
2710 for by the instruction, we want to skip the optional
1f6c9eb0 2711 operands. */
7fe9cf6b 2712 if (opcount < num_operands_expected)
252b5132
RH		 2713 skip_optional = 1;
2714
2715 break;
2716 }
2717 }
2718
2719 /* Gather the operands. */
2720 need_paren = 0;
2721 next_opindex = 0;
2722 fc = 0;
2723 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2724 {
2725 const struct powerpc_operand *operand;
2726 const char *errmsg;
2727 char *hold;
2728 expressionS ex;
2729 char endc;
2730
2731 if (next_opindex == 0)
2732 operand = &powerpc_operands[*opindex_ptr];
2733 else
2734 {
2735 operand = &powerpc_operands[next_opindex];
2736 next_opindex = 0;
2737 }
252b5132
RH		 2738 errmsg = NULL;
2739
2740 /* If this is a fake operand, then we do not expect anything
2741 from the input. */
2742 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2743 {
2b3c4602 2744 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2745 if (errmsg != (const char *) NULL)
ee2c9aa9 2746 as_bad ("%s", errmsg);
252b5132
RH		 2747 continue;
2748 }
2749
2750 /* If this is an optional operand, and we are skipping it, just
2751 insert a zero. */
2752 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2753 && skip_optional)
2754 {
2755 if (operand->insert)
2756 {
2b3c4602 2757 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2758 if (errmsg != (const char *) NULL)
ee2c9aa9 2759 as_bad ("%s", errmsg);
252b5132
RH		 2760 }
2761 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2762 next_opindex = *opindex_ptr + 1;
2763 continue;
2764 }
2765
2766 /* Gather the operand. */
2767 hold = input_line_pointer;
2768 input_line_pointer = str;
2769
2770#ifdef TE_PE
81d4177b 2771 if (*input_line_pointer == '[')
252b5132
RH		 2772 {
2773 /* We are expecting something like the second argument here:
99a814a1
AM		 2774 *
2775 * lwz r4,[toc].GS.0.static_int(rtoc)
2776 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2777 * The argument following the `]' must be a symbol name, and the
2778 * register must be the toc register: 'rtoc' or '2'
2779 *
2780 * The effect is to 0 as the displacement field
2781 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2782 * the appropriate variation) reloc against it based on the symbol.
2783 * The linker will build the toc, and insert the resolved toc offset.
2784 *
2785 * Note:
2786 * o The size of the toc entry is currently assumed to be
2787 * 32 bits. This should not be assumed to be a hard coded
2788 * number.
2789 * o In an effort to cope with a change from 32 to 64 bits,
2790 * there are also toc entries that are specified to be
2791 * either 32 or 64 bits:
2792 * lwz r4,[toc32].GS.0.static_int(rtoc)
2793 * lwz r4,[toc64].GS.0.static_int(rtoc)
2794 * These demand toc entries of the specified size, and the
2795 * instruction probably requires it.
2796 */
252b5132
RH		 2797
2798 int valid_toc;
2799 enum toc_size_qualifier toc_kind;
2800 bfd_reloc_code_real_type toc_reloc;
2801
99a814a1
AM		 2802 /* Go parse off the [tocXX] part. */
2803 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2804
81d4177b 2805 if (!valid_toc)
252b5132 2806 {
a5840dce
AM		 2807 ignore_rest_of_line ();
2808 break;
252b5132
RH		 2809 }
2810
99a814a1
AM		 2811 /* Now get the symbol following the ']'. */
2812 expression (&ex);
252b5132
RH		 2813
2814 switch (toc_kind)
2815 {
2816 case default_toc:
99a814a1
AM		 2817 /* In this case, we may not have seen the symbol yet,
2818 since it is allowed to appear on a .extern or .globl
2819 or just be a label in the .data section. */
252b5132
RH		 2820 toc_reloc = BFD_RELOC_PPC_TOC16;
2821 break;
2822 case data_in_toc:
99a814a1
AM		 2823 /* 1. The symbol must be defined and either in the toc
2824 section, or a global.
2825 2. The reloc generated must have the TOCDEFN flag set
2826 in upper bit mess of the reloc type.
2827 FIXME: It's a little confusing what the tocv
2828 qualifier can be used for. At the very least, I've
2829 seen three uses, only one of which I'm sure I can
2830 explain. */
81d4177b
KH		 2831 if (ex.X_op == O_symbol)
2832 {
9c2799c2 2833 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2834 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2835 != tocdata_section)
252b5132 2836 {
99a814a1 2837 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2838 }
2839 }
2840
2841 toc_reloc = BFD_RELOC_PPC_TOC16;
2842 break;
2843 case must_be_32:
99a814a1
AM		 2844 /* FIXME: these next two specifically specify 32/64 bit
2845 toc entries. We don't support them today. Is this
2846 the right way to say that? */
62ebcb5c 2847 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2848 as_bad (_("unimplemented toc32 expression modifier"));
252b5132
RH		 2849 break;
2850 case must_be_64:
99a814a1 2851 /* FIXME: see above. */
62ebcb5c 2852 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2853 as_bad (_("unimplemented toc64 expression modifier"));
252b5132
RH		 2854 break;
2855 default:
bc805888 2856 fprintf (stderr,
99a814a1
AM		 2857 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2858 toc_kind);
bc805888 2859 abort ();
252b5132
RH		 2860 break;
2861 }
2862
2863 /* We need to generate a fixup for this expression. */
2864 if (fc >= MAX_INSN_FIXUPS)
2865 as_fatal (_("too many fixups"));
2866
2867 fixups[fc].reloc = toc_reloc;
2868 fixups[fc].exp = ex;
2869 fixups[fc].opindex = *opindex_ptr;
2870 ++fc;
2871
99a814a1
AM		 2872 /* Ok. We've set up the fixup for the instruction. Now make it
2873 look like the constant 0 was found here. */
252b5132
RH		 2874 ex.X_unsigned = 1;
2875 ex.X_op = O_constant;
2876 ex.X_add_number = 0;
2877 ex.X_add_symbol = NULL;
2878 ex.X_op_symbol = NULL;
2879 }
2880
2881 else
2882#endif /* TE_PE */
2883 {
b9c361e0
JL		 2884 if ((reg_names_p
2885 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2886 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2ad068be 2887 || !register_name (&ex))
252b5132 2888 {
13abbae3
AM		 2889 char save_lex = lex_type['%'];
2890
b9c361e0
JL		 2891 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2892 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
13abbae3
AM		 2893 {
2894 cr_operand = TRUE;
2895 lex_type['%'] |= LEX_BEGIN_NAME;
2896 }
252b5132 2897 expression (&ex);
b34976b6 2898 cr_operand = FALSE;
13abbae3 2899 lex_type['%'] = save_lex;
252b5132
RH		 2900 }
2901 }
2902
2903 str = input_line_pointer;
2904 input_line_pointer = hold;
2905
2906 if (ex.X_op == O_illegal)
2907 as_bad (_("illegal operand"));
2908 else if (ex.X_op == O_absent)
2909 as_bad (_("missing operand"));
2910 else if (ex.X_op == O_register)
2911 {
2912 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2913 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2914 }
2915 else if (ex.X_op == O_constant)
2916 {
2917#ifdef OBJ_ELF
81d4177b 2918 /* Allow @HA, @L, @H on constants. */
3b8b57a9 2919 bfd_reloc_code_real_type reloc;
252b5132
RH		 2920 char *orig_str = str;
2921
62ebcb5c 2922 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
252b5132
RH		 2923 switch (reloc)
2924 {
2925 default:
2926 str = orig_str;
2927 break;
2928
2929 case BFD_RELOC_LO16:
f9c6b907
AM		 2930 ex.X_add_number &= 0xffff;
2931 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
0baf16f2 2932 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2933 break;
2934
2935 case BFD_RELOC_HI16:
f9c6b907
AM		 2936 if (REPORT_OVERFLOW_HI && ppc_obj64)
2937 {
2938 /* PowerPC64 @h is tested for overflow. */
2939 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2940 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2941 {
2942 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2943 ex.X_add_number
2944 = ((addressT) ex.X_add_number ^ sign) - sign;
2945 }
2946 break;
2947 }
2948 /* Fall thru */
2949
2950 case BFD_RELOC_PPC64_ADDR16_HIGH:
2951 ex.X_add_number = PPC_HI (ex.X_add_number);
2952 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2953 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2954 break;
2955
2956 case BFD_RELOC_HI16_S:
f9c6b907
AM		 2957 if (REPORT_OVERFLOW_HI && ppc_obj64)
2958 {
2959 /* PowerPC64 @ha is tested for overflow. */
2960 ex.X_add_number
2961 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2962 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2963 {
2964 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2965 ex.X_add_number
2966 = ((addressT) ex.X_add_number ^ sign) - sign;
2967 }
2968 break;
2969 }
2970 /* Fall thru */
2971
2972 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2973 ex.X_add_number = PPC_HA (ex.X_add_number);
2974 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2975 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2976 break;
2977
0baf16f2 2978 case BFD_RELOC_PPC64_HIGHER:
f9c6b907
AM		 2979 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2980 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2981 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2982 break;
2983
2984 case BFD_RELOC_PPC64_HIGHER_S:
f9c6b907
AM		 2985 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2986 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2987 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132 2988 break;
0baf16f2
AM		 2989
2990 case BFD_RELOC_PPC64_HIGHEST:
f9c6b907
AM		 2991 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2992 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2993 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2994 break;
2995
2996 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 2997 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2998 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2999 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2 3000 break;
252b5132 3001 }
0baf16f2 3002#endif /* OBJ_ELF */
252b5132 3003 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 3004 ppc_cpu, (char *) NULL, 0);
252b5132 3005 }
727fc41e 3006 else
252b5132 3007 {
62ebcb5c 3008 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3b8b57a9 3009#ifdef OBJ_ELF
727fc41e 3010 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 3011 {
727fc41e
AM		 3012 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3013 if (sym_name[0] == '.')
3014 ++sym_name;
cdba85ec 3015
727fc41e 3016 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 3017 {
727fc41e
AM		 3018 expressionS tls_exp;
3019
3020 hold = input_line_pointer;
3021 input_line_pointer = str + 1;
3022 expression (&tls_exp);
3023 if (tls_exp.X_op == O_symbol)
3024 {
62ebcb5c 3025 reloc = BFD_RELOC_NONE;
727fc41e
AM		 3026 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3027 {
3028 reloc = BFD_RELOC_PPC_TLSGD;
3029 input_line_pointer += 7;
3030 }
3031 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3032 {
3033 reloc = BFD_RELOC_PPC_TLSLD;
3034 input_line_pointer += 7;
3035 }
62ebcb5c 3036 if (reloc != BFD_RELOC_NONE)
727fc41e
AM		 3037 {
3038 SKIP_WHITESPACE ();
3039 str = input_line_pointer;
3040
3041 if (fc >= MAX_INSN_FIXUPS)
3042 as_fatal (_("too many fixups"));
3043 fixups[fc].exp = tls_exp;
3044 fixups[fc].opindex = *opindex_ptr;
3045 fixups[fc].reloc = reloc;
3046 ++fc;
3047 }
3048 }
3049 input_line_pointer = hold;
252b5132
RH		 3050 }
3051 }
3052
62ebcb5c 3053 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
0baf16f2 3054 {
727fc41e 3055 /* Some TLS tweaks. */
0baf16f2
AM		 3056 switch (reloc)
3057 {
727fc41e 3058 default:
cdba85ec 3059 break;
727fc41e
AM		 3060
3061 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 3062 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3063 as_bad (_("@tls may not be used with \"%s\" operands"),
3064 opcode->name);
3065 else if (operand->shift != 11)
3066 as_bad (_("@tls may only be used in last operand"));
3067 else
3068 insn = ppc_insert_operand (insn, operand,
3069 ppc_obj64 ? 13 : 2,
3070 ppc_cpu, (char *) NULL, 0);
cdba85ec 3071 break;
727fc41e
AM		 3072
3073 /* We'll only use the 32 (or 64) bit form of these relocations
3074 in constants. Instructions get the 16 bit form. */
3075 case BFD_RELOC_PPC_DTPREL:
3076 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 3077 break;
727fc41e
AM		 3078 case BFD_RELOC_PPC_TPREL:
3079 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 3080 break;
3081 }
727fc41e 3082
b9c361e0
JL		 3083 /* If VLE-mode convert LO/HI/HA relocations. */
3084 if (opcode->flags & PPC_OPCODE_VLE)
3085 {
3086 int tmp_insn = insn & opcode->mask;
3087
3088 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3089 || tmp_insn == E_AND2I_DOT_INSN
3090 || tmp_insn == E_OR2IS_INSN
3091 || tmp_insn == E_LIS_INSN
3092 || tmp_insn == E_AND2IS_DOT_INSN);
3093
3094
3095 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3096 || tmp_insn == E_ADD2IS_INSN
3097 || tmp_insn == E_CMP16I_INSN
3098 || tmp_insn == E_MULL2I_INSN
3099 || tmp_insn == E_CMPL16I_INSN
3100 || tmp_insn == E_CMPH16I_INSN
3101 || tmp_insn == E_CMPHL16I_INSN);
3102
3103 switch (reloc)
3104 {
3105 default:
3106 break;
3107
3108 case BFD_RELOC_PPC_EMB_SDA21:
3109 reloc = BFD_RELOC_PPC_VLE_SDA21;
3110 break;
3111
3112 case BFD_RELOC_LO16:
3113 if (use_d_reloc)
3114 reloc = BFD_RELOC_PPC_VLE_LO16D;
3115 else if (use_a_reloc)
3116 reloc = BFD_RELOC_PPC_VLE_LO16A;
3117 break;
3118
3119 case BFD_RELOC_HI16:
3120 if (use_d_reloc)
3121 reloc = BFD_RELOC_PPC_VLE_HI16D;
3122 else if (use_a_reloc)
3123 reloc = BFD_RELOC_PPC_VLE_HI16A;
3124 break;
3125
3126 case BFD_RELOC_HI16_S:
3127 if (use_d_reloc)
3128 reloc = BFD_RELOC_PPC_VLE_HA16D;
3129 else if (use_a_reloc)
3130 reloc = BFD_RELOC_PPC_VLE_HA16A;
3131 break;
3132
3133 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3134 if (use_d_reloc)
3135 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3136 break;
3137
3138 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3139 if (use_d_reloc)
3140 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3141 break;
3142
3143 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3144 if (use_d_reloc)
3145 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3146 break;
3147 }
3148 }
0baf16f2 3149 }
3b8b57a9
AM		 3150#endif /* OBJ_ELF */
3151
62ebcb5c 3152 if (reloc != BFD_RELOC_NONE)
3b8b57a9
AM		 3153 ;
3154 /* Determine a BFD reloc value based on the operand information.
3155 We are only prepared to turn a few of the operands into
3156 relocs. */
a0593ad9
AM		 3157 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3158 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3159 && operand->bitm == 0x3fffffc
3160 && operand->shift == 0)
3161 reloc = BFD_RELOC_PPC_B26;
a0593ad9
AM		 3162 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3163 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3164 && operand->bitm == 0xfffc
3165 && operand->shift == 0)
3166 reloc = BFD_RELOC_PPC_B16;
3167 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3168 && operand->bitm == 0x1fe
3169 && operand->shift == -1)
3170 reloc = BFD_RELOC_PPC_VLE_REL8;
3171 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3172 && operand->bitm == 0xfffe
3173 && operand->shift == 0)
3174 reloc = BFD_RELOC_PPC_VLE_REL15;
3175 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3176 && operand->bitm == 0x1fffffe
3177 && operand->shift == 0)
3178 reloc = BFD_RELOC_PPC_VLE_REL24;
a0593ad9 3179 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3b8b57a9
AM		 3180 && (operand->bitm & 0xfff0) == 0xfff0
3181 && operand->shift == 0)
3182 {
f50c47f1 3183 reloc = BFD_RELOC_16;
3e60bf4d 3184#if defined OBJ_XCOFF || defined OBJ_ELF
f50c47f1 3185 /* Note: the symbol may be not yet defined. */
a0593ad9
AM		 3186 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3187 && ppc_is_toc_sym (ex.X_add_symbol))
3e60bf4d
AM		 3188 {
3189 reloc = BFD_RELOC_PPC_TOC16;
3190#ifdef OBJ_ELF
3191 as_warn (_("assuming %s on symbol"),
3192 ppc_obj64 ? "@toc" : "@xgot");
3193#endif
3194 }
3b8b57a9 3195#endif
3b8b57a9 3196 }
a0593ad9
AM		 3197
3198 /* For the absolute forms of branches, convert the PC
3199 relative form back into the absolute. */
3200 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3201 {
3202 switch (reloc)
3203 {
3204 case BFD_RELOC_PPC_B26:
3205 reloc = BFD_RELOC_PPC_BA26;
3206 break;
3207 case BFD_RELOC_PPC_B16:
3208 reloc = BFD_RELOC_PPC_BA16;
3209 break;
3210#ifdef OBJ_ELF
3211 case BFD_RELOC_PPC_B16_BRTAKEN:
3212 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3213 break;
3214 case BFD_RELOC_PPC_B16_BRNTAKEN:
3215 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3216 break;
3217#endif
3218 default:
3219 break;
3220 }
3221 }
3222
3223#ifdef OBJ_ELF
3224 switch (reloc)
3225 {
3226 case BFD_RELOC_PPC_TOC16:
3227 toc_reloc_types |= has_small_toc_reloc;
3228 break;
3229 case BFD_RELOC_PPC64_TOC16_LO:
3230 case BFD_RELOC_PPC64_TOC16_HI:
3231 case BFD_RELOC_PPC64_TOC16_HA:
3232 toc_reloc_types |= has_large_toc_reloc;
3233 break;
3234 default:
3235 break;
3236 }
3237
3238 if (ppc_obj64
3239 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3240 {
3241 switch (reloc)
3242 {
3243 case BFD_RELOC_16:
3244 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3245 break;
3246 case BFD_RELOC_LO16:
3247 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3248 break;
3249 case BFD_RELOC_16_GOTOFF:
3250 reloc = BFD_RELOC_PPC64_GOT16_DS;
3251 break;
3252 case BFD_RELOC_LO16_GOTOFF:
3253 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3254 break;
3255 case BFD_RELOC_LO16_PLTOFF:
3256 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3257 break;
3258 case BFD_RELOC_16_BASEREL:
3259 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3260 break;
3261 case BFD_RELOC_LO16_BASEREL:
3262 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3263 break;
3264 case BFD_RELOC_PPC_TOC16:
3265 reloc = BFD_RELOC_PPC64_TOC16_DS;
3266 break;
3267 case BFD_RELOC_PPC64_TOC16_LO:
3268 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3269 break;
3270 case BFD_RELOC_PPC64_PLTGOT16:
3271 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3272 break;
3273 case BFD_RELOC_PPC64_PLTGOT16_LO:
3274 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3275 break;
3276 case BFD_RELOC_PPC_DTPREL16:
3277 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3278 break;
3279 case BFD_RELOC_PPC_DTPREL16_LO:
3280 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3281 break;
3282 case BFD_RELOC_PPC_TPREL16:
3283 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3284 break;
3285 case BFD_RELOC_PPC_TPREL16_LO:
3286 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3287 break;
3288 case BFD_RELOC_PPC_GOT_DTPREL16:
3289 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3290 case BFD_RELOC_PPC_GOT_TPREL16:
3291 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3292 break;
3293 default:
3294 as_bad (_("unsupported relocation for DS offset field"));
3295 break;
3296 }
3297 }
3298#endif
0baf16f2 3299
252b5132
RH		 3300 /* We need to generate a fixup for this expression. */
3301 if (fc >= MAX_INSN_FIXUPS)
3302 as_fatal (_("too many fixups"));
3303 fixups[fc].exp = ex;
727fc41e 3304 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 3305 fixups[fc].reloc = reloc;
3306 ++fc;
3307 }
252b5132
RH		 3308
3309 if (need_paren)
3310 {
3311 endc = ')';
3312 need_paren = 0;
c3d65c1c
BE		 3313 /* If expecting more operands, then we want to see "),". */
3314 if (*str == endc && opindex_ptr[1] != 0)
3315 {
3316 do
3317 ++str;
3318 while (ISSPACE (*str));
3319 endc = ',';
3320 }
252b5132
RH		 3321 }
3322 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3323 {
3324 endc = '(';
3325 need_paren = 1;
3326 }
3327 else
3328 endc = ',';
3329
3330 /* The call to expression should have advanced str past any
3331 whitespace. */
3332 if (*str != endc
3333 && (endc != ',' || *str != '\0'))
3334 {
5a938047
AM		 3335 if (*str == '\0')
3336 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3337 else
3338 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 3339 break;
3340 }
3341
3342 if (*str != '\0')
3343 ++str;
3344 }
3345
3882b010 3346 while (ISSPACE (*str))
252b5132
RH		 3347 ++str;
3348
3349 if (*str != '\0')
3350 as_bad (_("junk at end of line: `%s'"), str);
3351
dc1d03fc 3352#ifdef OBJ_ELF
b9c361e0 3353 /* Do we need/want an APUinfo section? */
4faf939a
JM		 3354 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3355 && !ppc_obj64)
6a0c61b7
EZ		 3356 {
3357 /* These are all version "1". */
3358 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 3359 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 3360 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 3361 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 3362 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 3363 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 3364 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 3365 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 3366 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 3367 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 3368 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 3369 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 3370 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 3371 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
b9c361e0
JL		 3372 if (opcode->flags & PPC_OPCODE_VLE)
3373 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
6a0c61b7 3374 }
dc1d03fc 3375#endif
6a0c61b7 3376
252b5132 3377 /* Write out the instruction. */
b9c361e0
JL		 3378 /* Differentiate between two and four byte insns. */
3379 if (ppc_mach () == bfd_mach_ppc_vle)
3380 {
3381 if (PPC_OP_SE_VLE (insn))
3382 insn_length = 2;
3383 else
3384 insn_length = 4;
3385 addr_mod = frag_now_fix () & 1;
3386 }
3387 else
3388 {
3389 insn_length = 4;
3390 addr_mod = frag_now_fix () & 3;
3391 }
3392 /* All instructions can start on a 2 byte boundary for VLE. */
3393 f = frag_more (insn_length);
09b935ac 3394 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
b9c361e0
JL		 3395 {
3396 if (ppc_mach() == bfd_mach_ppc_vle)
3397 as_bad (_("instruction address is not a multiple of 2"));
3398 else
3399 as_bad (_("instruction address is not a multiple of 4"));
3400 }
09b935ac
AM		 3401 frag_now->insn_addr = addr_mod;
3402 frag_now->has_code = 1;
b9c361e0 3403 md_number_to_chars (f, insn, insn_length);
bf7279d5
AM		 3404 last_insn = insn;
3405 last_seg = now_seg;
3406 last_subseg = now_subseg;
252b5132 3407
5d6f4f16 3408#ifdef OBJ_ELF
b9c361e0 3409 dwarf2_emit_insn (insn_length);
5d6f4f16
GK		 3410#endif
3411
3b8b57a9 3412 /* Create any fixups. */
252b5132
RH		 3413 for (i = 0; i < fc; i++)
3414 {
3b8b57a9 3415 fixS *fixP;
62ebcb5c 3416 if (fixups[i].reloc != BFD_RELOC_NONE)
252b5132 3417 {
99a814a1 3418 reloc_howto_type *reloc_howto;
252b5132
RH		 3419 int size;
3420 int offset;
252b5132 3421
99a814a1 3422 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3423 if (!reloc_howto)
3424 abort ();
3425
3426 size = bfd_get_reloc_size (reloc_howto);
3b8b57a9 3427 offset = target_big_endian ? (insn_length - size) : 0;
252b5132
RH		 3428
3429 if (size < 1 || size > 4)
bc805888 3430 abort ();
252b5132 3431
99a814a1
AM		 3432 fixP = fix_new_exp (frag_now,
3433 f - frag_now->fr_literal + offset,
3434 size,
3435 &fixups[i].exp,
3436 reloc_howto->pc_relative,
252b5132 3437 fixups[i].reloc);
252b5132
RH		 3438 }
3439 else
727fc41e
AM		 3440 {
3441 const struct powerpc_operand *operand;
3442
3443 operand = &powerpc_operands[fixups[i].opindex];
3b8b57a9
AM		 3444 fixP = fix_new_exp (frag_now,
3445 f - frag_now->fr_literal,
3446 insn_length,
3447 &fixups[i].exp,
3448 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
62ebcb5c 3449 BFD_RELOC_NONE);
727fc41e 3450 }
3b8b57a9 3451 fixP->fx_pcrel_adjust = fixups[i].opindex;
252b5132
RH		 3452 }
3453}
3454
3455/* Handle a macro. Gather all the operands, transform them as
3456 described by the macro, and call md_assemble recursively. All the
3457 operands are separated by commas; we don't accept parentheses
3458 around operands here. */
3459
3460static void
98027b10 3461ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3462{
3463 char *operands[10];
3464 unsigned int count;
3465 char *s;
3466 unsigned int len;
3467 const char *format;
db557034 3468 unsigned int arg;
252b5132
RH		 3469 char *send;
3470 char *complete;
3471
3472 /* Gather the users operands into the operands array. */
3473 count = 0;
3474 s = str;
3475 while (1)
3476 {
3477 if (count >= sizeof operands / sizeof operands[0])
3478 break;
3479 operands[count++] = s;
3480 s = strchr (s, ',');
3481 if (s == (char *) NULL)
3482 break;
3483 *s++ = '\0';
81d4177b 3484 }
252b5132
RH		 3485
3486 if (count != macro->operands)
3487 {
3488 as_bad (_("wrong number of operands"));
3489 return;
3490 }
3491
3492 /* Work out how large the string must be (the size is unbounded
3493 because it includes user input). */
3494 len = 0;
3495 format = macro->format;
3496 while (*format != '\0')
3497 {
3498 if (*format != '%')
3499 {
3500 ++len;
3501 ++format;
3502 }
3503 else
3504 {
3505 arg = strtol (format + 1, &send, 10);
db557034 3506 know (send != format && arg < count);
252b5132
RH		 3507 len += strlen (operands[arg]);
3508 format = send;
3509 }
3510 }
3511
3512 /* Put the string together. */
3513 complete = s = (char *) alloca (len + 1);
3514 format = macro->format;
3515 while (*format != '\0')
3516 {
3517 if (*format != '%')
3518 *s++ = *format++;
3519 else
3520 {
3521 arg = strtol (format + 1, &send, 10);
3522 strcpy (s, operands[arg]);
3523 s += strlen (s);
3524 format = send;
3525 }
3526 }
3527 *s = '\0';
3528
3529 /* Assemble the constructed instruction. */
3530 md_assemble (complete);
81d4177b 3531}
252b5132
RH		 3532\f
3533#ifdef OBJ_ELF
18ae9cc1 3534/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3535
3536int
98027b10 3537ppc_section_type (char *str, size_t len)
252b5132 3538{
9de8d8f1
RH		 3539 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3540 return SHT_ORDERED;
252b5132 3541
9de8d8f1 3542 return -1;
252b5132
RH		 3543}
3544
3545int
1239de13 3546ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3547{
3548 if (type == SHT_ORDERED)
3549 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3550
252b5132
RH		 3551 return flags;
3552}
3553#endif /* OBJ_ELF */
3554
3555\f
3556/* Pseudo-op handling. */
3557
3558/* The .byte pseudo-op. This is similar to the normal .byte
3559 pseudo-op, but it can also take a single ASCII string. */
3560
3561static void
98027b10 3562ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132 3563{
bf7279d5
AM		 3564 int count = 0;
3565
252b5132
RH		 3566 if (*input_line_pointer != '\"')
3567 {
3568 cons (1);
3569 return;
3570 }
3571
3572 /* Gather characters. A real double quote is doubled. Unusual
3573 characters are not permitted. */
3574 ++input_line_pointer;
3575 while (1)
3576 {
3577 char c;
3578
3579 c = *input_line_pointer++;
3580
3581 if (c == '\"')
3582 {
3583 if (*input_line_pointer != '\"')
3584 break;
3585 ++input_line_pointer;
3586 }
3587
3588 FRAG_APPEND_1_CHAR (c);
bf7279d5 3589 ++count;
252b5132
RH		 3590 }
3591
bf7279d5
AM		 3592 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3593 as_warn (_("data in executable section"));
252b5132
RH		 3594 demand_empty_rest_of_line ();
3595}
3596\f
3597#ifdef OBJ_XCOFF
3598
3599/* XCOFF specific pseudo-op handling. */
3600
3601/* This is set if we are creating a .stabx symbol, since we don't want
3602 to handle symbol suffixes for such symbols. */
b34976b6 3603static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3604
3605/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3606 symbols in the .bss segment as though they were local common
67c1ffbe 3607 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3608 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3609
3610static void
98027b10 3611ppc_comm (int lcomm)
252b5132
RH		 3612{
3613 asection *current_seg = now_seg;
3614 subsegT current_subseg = now_subseg;
3615 char *name;
3616 char endc;
3617 char *end_name;
3618 offsetT size;
3619 offsetT align;
3620 symbolS *lcomm_sym = NULL;
3621 symbolS *sym;
3622 char *pfrag;
3623
3624 name = input_line_pointer;
3625 endc = get_symbol_end ();
3626 end_name = input_line_pointer;
3627 *end_name = endc;
3628
3629 if (*input_line_pointer != ',')
3630 {
3631 as_bad (_("missing size"));
3632 ignore_rest_of_line ();
3633 return;
3634 }
3635 ++input_line_pointer;
3636
3637 size = get_absolute_expression ();
3638 if (size < 0)
3639 {
3640 as_bad (_("negative size"));
3641 ignore_rest_of_line ();
3642 return;
3643 }
3644
3645 if (! lcomm)
3646 {
3647 /* The third argument to .comm is the alignment. */
3648 if (*input_line_pointer != ',')
1ad63b2f 3649 align = 2;
252b5132
RH		 3650 else
3651 {
3652 ++input_line_pointer;
3653 align = get_absolute_expression ();
3654 if (align <= 0)
3655 {
3656 as_warn (_("ignoring bad alignment"));
1ad63b2f 3657 align = 2;
252b5132
RH		 3658 }
3659 }
3660 }
3661 else
3662 {
3663 char *lcomm_name;
3664 char lcomm_endc;
3665
252b5132
RH		 3666 /* The third argument to .lcomm appears to be the real local
3667 common symbol to create. References to the symbol named in
3668 the first argument are turned into references to the third
3669 argument. */
3670 if (*input_line_pointer != ',')
3671 {
3672 as_bad (_("missing real symbol name"));
3673 ignore_rest_of_line ();
3674 return;
3675 }
3676 ++input_line_pointer;
3677
3678 lcomm_name = input_line_pointer;
3679 lcomm_endc = get_symbol_end ();
81d4177b 3680
252b5132
RH		 3681 lcomm_sym = symbol_find_or_make (lcomm_name);
3682
3683 *input_line_pointer = lcomm_endc;
3c02c47f
DE		 3684
3685 /* The fourth argument to .lcomm is the alignment. */
3686 if (*input_line_pointer != ',')
3687 {
3688 if (size <= 4)
3689 align = 2;
3690 else
3691 align = 3;
3692 }
3693 else
3694 {
3695 ++input_line_pointer;
3696 align = get_absolute_expression ();
3697 if (align <= 0)
3698 {
3699 as_warn (_("ignoring bad alignment"));
3700 align = 2;
3701 }
3702 }
252b5132
RH		 3703 }
3704
3705 *end_name = '\0';
3706 sym = symbol_find_or_make (name);
3707 *end_name = endc;
3708
3709 if (S_IS_DEFINED (sym)
3710 || S_GET_VALUE (sym) != 0)
3711 {
3712 as_bad (_("attempt to redefine symbol"));
3713 ignore_rest_of_line ();
3714 return;
3715 }
81d4177b 3716
252b5132 3717 record_alignment (bss_section, align);
81d4177b 3718
252b5132
RH		 3719 if (! lcomm
3720 || ! S_IS_DEFINED (lcomm_sym))
3721 {
3722 symbolS *def_sym;
3723 offsetT def_size;
3724
3725 if (! lcomm)
3726 {
3727 def_sym = sym;
3728 def_size = size;
3729 S_SET_EXTERNAL (sym);
3730 }
3731 else
3732 {
809ffe0d 3733 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3734 def_sym = lcomm_sym;
3735 def_size = 0;
3736 }
3737
3738 subseg_set (bss_section, 1);
3739 frag_align (align, 0, 0);
81d4177b 3740
809ffe0d 3741 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3742 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3743 def_size, (char *) NULL);
3744 *pfrag = 0;
3745 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3746 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3747 }
3748 else if (lcomm)
3749 {
3750 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3751 symbol_get_frag (lcomm_sym)->fr_offset =
3752 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3753 &~ ((1 << align) - 1));
809ffe0d
ILT		 3754 if (align > symbol_get_tc (lcomm_sym)->align)
3755 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3756 }
3757
3758 if (lcomm)
3759 {
3760 /* Make sym an offset from lcomm_sym. */
3761 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3762 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3763 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3764 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3765 }
3766
3767 subseg_set (current_seg, current_subseg);
3768
3769 demand_empty_rest_of_line ();
3770}
3771
3772/* The .csect pseudo-op. This switches us into a different
3773 subsegment. The first argument is a symbol whose value is the
3774 start of the .csect. In COFF, csect symbols get special aux
3775 entries defined by the x_csect field of union internal_auxent. The
3776 optional second argument is the alignment (the default is 2). */
3777
3778static void
98027b10 3779ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3780{
3781 char *name;
3782 char endc;
3783 symbolS *sym;
931e13a6 3784 offsetT align;
252b5132
RH		 3785
3786 name = input_line_pointer;
3787 endc = get_symbol_end ();
81d4177b 3788
252b5132
RH		 3789 sym = symbol_find_or_make (name);
3790
3791 *input_line_pointer = endc;
3792
3793 if (S_GET_NAME (sym)[0] == '\0')
3794 {
3795 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3796 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3797 }
3798
931e13a6 3799 align = 2;
252b5132
RH		 3800 if (*input_line_pointer == ',')
3801 {
3802 ++input_line_pointer;
931e13a6 3803 align = get_absolute_expression ();
252b5132
RH		 3804 }
3805
931e13a6
AM		 3806 ppc_change_csect (sym, align);
3807
252b5132
RH		 3808 demand_empty_rest_of_line ();
3809}
3810
3811/* Change to a different csect. */
3812
3813static void
98027b10 3814ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3815{
3816 if (S_IS_DEFINED (sym))
809ffe0d 3817 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3818 else
3819 {
3820 symbolS **list_ptr;
3821 int after_toc;
3822 int hold_chunksize;
3823 symbolS *list;
931e13a6
AM		 3824 int is_code;
3825 segT sec;
252b5132
RH		 3826
3827 /* This is a new csect. We need to look at the symbol class to
3828 figure out whether it should go in the text section or the
3829 data section. */
3830 after_toc = 0;
931e13a6 3831 is_code = 0;
96d56e9f 3832 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3833 {
3834 case XMC_PR:
3835 case XMC_RO:
3836 case XMC_DB:
3837 case XMC_GL:
3838 case XMC_XO:
3839 case XMC_SV:
3840 case XMC_TI:
3841 case XMC_TB:
3842 S_SET_SEGMENT (sym, text_section);
809ffe0d 3843 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3844 ++ppc_text_subsegment;
3845 list_ptr = &ppc_text_csects;
931e13a6 3846 is_code = 1;
252b5132
RH		 3847 break;
3848 case XMC_RW:
3849 case XMC_TC0:
3850 case XMC_TC:
3851 case XMC_DS:
3852 case XMC_UA:
3853 case XMC_BS:
3854 case XMC_UC:
3855 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3856 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3857 == ppc_data_subsegment))
252b5132
RH		 3858 after_toc = 1;
3859 S_SET_SEGMENT (sym, data_section);
809ffe0d 3860 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3861 ++ppc_data_subsegment;
3862 list_ptr = &ppc_data_csects;
3863 break;
3864 default:
3865 abort ();
3866 }
3867
3868 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3869 changing subsegments, so that we don't use a lot of memory
3870 space for what may be a small section. */
252b5132
RH		 3871 hold_chunksize = chunksize;
3872 chunksize = 64;
3873
931e13a6
AM		 3874 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3875 symbol_get_tc (sym)->subseg);
252b5132
RH		 3876
3877 chunksize = hold_chunksize;
3878
3879 if (after_toc)
3880 ppc_after_toc_frag = frag_now;
3881
931e13a6
AM		 3882 record_alignment (sec, align);
3883 if (is_code)
3884 frag_align_code (align, 0);
3885 else
3886 frag_align (align, 0, 0);
3887
809ffe0d 3888 symbol_set_frag (sym, frag_now);
252b5132
RH		 3889 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3890
931e13a6 3891 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3892 symbol_get_tc (sym)->output = 1;
3893 symbol_get_tc (sym)->within = sym;
81d4177b 3894
252b5132 3895 for (list = *list_ptr;
809ffe0d
ILT		 3896 symbol_get_tc (list)->next != (symbolS *) NULL;
3897 list = symbol_get_tc (list)->next)
252b5132 3898 ;
809ffe0d 3899 symbol_get_tc (list)->next = sym;
81d4177b 3900
252b5132 3901 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3902 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3903 &symbol_lastP);
252b5132
RH		 3904 }
3905
3906 ppc_current_csect = sym;
3907}
3908
85645aed
TG		 3909static void
3910ppc_change_debug_section (unsigned int idx, subsegT subseg)
3911{
3912 segT sec;
3913 flagword oldflags;
3914 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3915
3916 sec = subseg_new (dw->name, subseg);
3917 oldflags = bfd_get_section_flags (stdoutput, sec);
3918 if (oldflags == SEC_NO_FLAGS)
3919 {
3920 /* Just created section. */
3921 gas_assert (dw_sections[idx].sect == NULL);
3922
3923 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3924 bfd_set_section_alignment (stdoutput, sec, 0);
3925 dw_sections[idx].sect = sec;
3926 }
3927
3928 /* Not anymore in a csect. */
3929 ppc_current_csect = NULL;
3930}
3931
3932/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3933 .dwsect flag [, opt-label ]
3934*/
3935
3936static void
3937ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3938{
3939 offsetT flag;
3940 symbolS *opt_label;
3941 const struct xcoff_dwsect_name *dw;
3942 struct dw_subsection *subseg;
3943 struct dw_section *dws;
3944 int i;
3945
3946 /* Find section. */
3947 flag = get_absolute_expression ();
3948 dw = NULL;
3949 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3950 if (xcoff_dwsect_names[i].flag == flag)
3951 {
3952 dw = &xcoff_dwsect_names[i];
3953 break;
3954 }
3955
3956 /* Parse opt-label. */
3957 if (*input_line_pointer == ',')
3958 {
3959 const char *label;
3960 char c;
3961
3962 ++input_line_pointer;
3963
3964 label = input_line_pointer;
3965 c = get_symbol_end ();
3966 opt_label = symbol_find_or_make (label);
3967 *input_line_pointer = c;
3968 }
3969 else
3970 opt_label = NULL;
3971
3972 demand_empty_rest_of_line ();
3973
3974 /* Return now in case of unknown subsection. */
3975 if (dw == NULL)
3976 {
d6ed37ed 3977 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
85645aed
TG		 3978 (unsigned)flag);
3979 return;
3980 }
3981
3982 /* Find the subsection. */
3983 dws = &dw_sections[i];
3984 subseg = NULL;
3985 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3986 {
3987 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3988 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3989 {
3990 as_bad (_("label %s was not defined in this dwarf section"),
3991 S_GET_NAME (opt_label));
3992 subseg = dws->anon_subseg;
3993 opt_label = NULL;
3994 }
3995 else
3996 subseg = symbol_get_tc (opt_label)->u.dw;
3997 }
3998
3999 if (subseg != NULL)
4000 {
4001 /* Switch to the subsection. */
4002 ppc_change_debug_section (i, subseg->subseg);
4003 }
4004 else
4005 {
4006 /* Create a new dw subsection. */
4007 subseg = (struct dw_subsection *)
4008 xmalloc (sizeof (struct dw_subsection));
4009
4010 if (opt_label == NULL)
4011 {
4012 /* The anonymous one. */
4013 subseg->subseg = 0;
4014 subseg->link = NULL;
4015 dws->anon_subseg = subseg;
4016 }
4017 else
4018 {
4019 /* A named one. */
4020 if (dws->list_subseg != NULL)
4021 subseg->subseg = dws->list_subseg->subseg + 1;
4022 else
4023 subseg->subseg = 1;
4024
4025 subseg->link = dws->list_subseg;
4026 dws->list_subseg = subseg;
4027 symbol_get_tc (opt_label)->u.dw = subseg;
4028 }
4029
4030 ppc_change_debug_section (i, subseg->subseg);
4031
4032 if (dw->def_size)
4033 {
4034 /* Add the length field. */
4035 expressionS *exp = &subseg->end_exp;
4036 int sz;
4037
4038 if (opt_label != NULL)
4039 symbol_set_value_now (opt_label);
4040
4041 /* Add the length field. Note that according to the AIX assembler
4042 manual, the size of the length field is 4 for powerpc32 but
4043 12 for powerpc64. */
4044 if (ppc_obj64)
4045 {
4046 /* Write the 64bit marker. */
4047 md_number_to_chars (frag_more (4), -1, 4);
4048 }
4049
4050 exp->X_op = O_subtract;
4051 exp->X_op_symbol = symbol_temp_new_now ();
4052 exp->X_add_symbol = symbol_temp_make ();
4053
4054 sz = ppc_obj64 ? 8 : 4;
4055 exp->X_add_number = -sz;
4056 emit_expr (exp, sz);
4057 }
4058 }
4059}
4060
252b5132
RH		 4061/* This function handles the .text and .data pseudo-ops. These
4062 pseudo-ops aren't really used by XCOFF; we implement them for the
4063 convenience of people who aren't used to XCOFF. */
4064
4065static void
98027b10 4066ppc_section (int type)
252b5132
RH		 4067{
4068 const char *name;
4069 symbolS *sym;
4070
4071 if (type == 't')
4072 name = ".text[PR]";
4073 else if (type == 'd')
4074 name = ".data[RW]";
4075 else
4076 abort ();
4077
4078 sym = symbol_find_or_make (name);
4079
931e13a6 4080 ppc_change_csect (sym, 2);
252b5132
RH		 4081
4082 demand_empty_rest_of_line ();
4083}
4084
4085/* This function handles the .section pseudo-op. This is mostly to
4086 give an error, since XCOFF only supports .text, .data and .bss, but
4087 we do permit the user to name the text or data section. */
4088
4089static void
98027b10 4090ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4091{
4092 char *user_name;
4093 const char *real_name;
4094 char c;
4095 symbolS *sym;
4096
4097 user_name = input_line_pointer;
4098 c = get_symbol_end ();
4099
4100 if (strcmp (user_name, ".text") == 0)
4101 real_name = ".text[PR]";
4102 else if (strcmp (user_name, ".data") == 0)
4103 real_name = ".data[RW]";
4104 else
4105 {
d6ed37ed 4106 as_bad (_("the XCOFF file format does not support arbitrary sections"));
252b5132
RH		 4107 *input_line_pointer = c;
4108 ignore_rest_of_line ();
4109 return;
4110 }
4111
4112 *input_line_pointer = c;
4113
4114 sym = symbol_find_or_make (real_name);
4115
931e13a6 4116 ppc_change_csect (sym, 2);
252b5132
RH		 4117
4118 demand_empty_rest_of_line ();
4119}
4120
4121/* The .extern pseudo-op. We create an undefined symbol. */
4122
4123static void
98027b10 4124ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4125{
4126 char *name;
4127 char endc;
4128
4129 name = input_line_pointer;
4130 endc = get_symbol_end ();
4131
4132 (void) symbol_find_or_make (name);
4133
4134 *input_line_pointer = endc;
4135
4136 demand_empty_rest_of_line ();
4137}
4138
4139/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4140
4141static void
98027b10 4142ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4143{
4144 char *name;
4145 char endc;
4146 symbolS *sym;
4147
4148 name = input_line_pointer;
4149 endc = get_symbol_end ();
4150
4151 sym = symbol_find_or_make (name);
4152
4153 *input_line_pointer = endc;
4154
809ffe0d 4155 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4156
4157 demand_empty_rest_of_line ();
4158}
4159
c865e45b
RS		 4160/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4161 relocations at the beginning of the current csect.
4162
4163 (In principle, there's no reason why the relocations _have_ to be at
4164 the beginning. Anywhere in the csect would do. However, inserting
4165 at the beginning is what the native assmebler does, and it helps to
4166 deal with cases where the .ref statements follow the section contents.)
4167
4168 ??? .refs don't work for empty .csects. However, the native assembler
4169 doesn't report an error in this case, and neither yet do we. */
4170
4171static void
4172ppc_ref (int ignore ATTRIBUTE_UNUSED)
4173{
4174 char *name;
4175 char c;
4176
4177 if (ppc_current_csect == NULL)
4178 {
4179 as_bad (_(".ref outside .csect"));
4180 ignore_rest_of_line ();
4181 return;
4182 }
4183
4184 do
4185 {
4186 name = input_line_pointer;
4187 c = get_symbol_end ();
4188
4189 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4190 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4191
4192 *input_line_pointer = c;
4193 SKIP_WHITESPACE ();
4194 c = *input_line_pointer;
4195 if (c == ',')
4196 {
4197 input_line_pointer++;
4198 SKIP_WHITESPACE ();
4199 if (is_end_of_line[(unsigned char) *input_line_pointer])
4200 {
4201 as_bad (_("missing symbol name"));
4202 ignore_rest_of_line ();
4203 return;
4204 }
4205 }
4206 }
4207 while (c == ',');
4208
4209 demand_empty_rest_of_line ();
4210}
4211
252b5132
RH		 4212/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4213 although I don't know why it bothers. */
4214
4215static void
98027b10 4216ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4217{
4218 char *name;
4219 char endc;
4220 symbolS *sym;
4221 int len;
4222
4223 name = input_line_pointer;
4224 endc = get_symbol_end ();
4225
4226 sym = symbol_find_or_make (name);
4227
4228 *input_line_pointer = endc;
4229
4230 if (*input_line_pointer != ',')
4231 {
4232 as_bad (_("missing rename string"));
4233 ignore_rest_of_line ();
4234 return;
4235 }
4236 ++input_line_pointer;
4237
809ffe0d 4238 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 4239
4240 demand_empty_rest_of_line ();
4241}
4242
4243/* The .stabx pseudo-op. This is similar to a normal .stabs
4244 pseudo-op, but slightly different. A sample is
4245 .stabx "main:F-1",.main,142,0
4246 The first argument is the symbol name to create. The second is the
4247 value, and the third is the storage class. The fourth seems to be
4248 always zero, and I am assuming it is the type. */
4249
4250static void
98027b10 4251ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4252{
4253 char *name;
4254 int len;
4255 symbolS *sym;
4256 expressionS exp;
4257
4258 name = demand_copy_C_string (&len);
4259
4260 if (*input_line_pointer != ',')
4261 {
4262 as_bad (_("missing value"));
4263 return;
4264 }
4265 ++input_line_pointer;
4266
b34976b6 4267 ppc_stab_symbol = TRUE;
252b5132 4268 sym = symbol_make (name);
b34976b6 4269 ppc_stab_symbol = FALSE;
252b5132 4270
809ffe0d 4271 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 4272
4273 (void) expression (&exp);
4274
4275 switch (exp.X_op)
4276 {
4277 case O_illegal:
4278 case O_absent:
4279 case O_big:
4280 as_bad (_("illegal .stabx expression; zero assumed"));
4281 exp.X_add_number = 0;
4282 /* Fall through. */
4283 case O_constant:
4284 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 4285 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 4286 break;
4287
4288 case O_symbol:
4289 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 4290 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4291 else
4292 {
4293 S_SET_VALUE (sym,
4294 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 4295 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 4296 }
4297 break;
4298
4299 default:
4300 /* The value is some complex expression. This will probably
99a814a1
AM		 4301 fail at some later point, but this is probably the right
4302 thing to do here. */
809ffe0d 4303 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4304 break;
4305 }
4306
4307 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4308 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4309
4310 if (*input_line_pointer != ',')
4311 {
4312 as_bad (_("missing class"));
4313 return;
4314 }
4315 ++input_line_pointer;
4316
4317 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4318
4319 if (*input_line_pointer != ',')
4320 {
4321 as_bad (_("missing type"));
4322 return;
4323 }
4324 ++input_line_pointer;
4325
4326 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4327
809ffe0d 4328 symbol_get_tc (sym)->output = 1;
252b5132 4329
c734e7e3
TG		 4330 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4331 {
4332 /* In this case :
252b5132 4333
c734e7e3
TG		 4334 .bs name
4335 .stabx "z",arrays_,133,0
4336 .es
99a814a1 4337
c734e7e3 4338 .comm arrays_,13768,3
99a814a1 4339
c734e7e3
TG		 4340 resolve_symbol_value will copy the exp's "within" into sym's when the
4341 offset is 0. Since this seems to be corner case problem,
4342 only do the correction for storage class C_STSYM. A better solution
4343 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 4344
c734e7e3
TG		 4345 if (exp.X_op == O_symbol)
4346 {
4347 if (ppc_current_block == NULL)
4348 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 4349
c734e7e3
TG		 4350 symbol_get_tc (sym)->within = ppc_current_block;
4351 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4352 }
4353 }
99a814a1 4354
252b5132
RH		 4355 if (exp.X_op != O_symbol
4356 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4357 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4358 ppc_frob_label (sym);
4359 else
4360 {
4361 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4362 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4363 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4364 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4365 }
4366
4367 demand_empty_rest_of_line ();
4368}
4369
4370/* The .function pseudo-op. This takes several arguments. The first
4371 argument seems to be the external name of the symbol. The second
67c1ffbe 4372 argument seems to be the label for the start of the function. gcc
252b5132
RH		 4373 uses the same name for both. I have no idea what the third and
4374 fourth arguments are meant to be. The optional fifth argument is
4375 an expression for the size of the function. In COFF this symbol
4376 gets an aux entry like that used for a csect. */
4377
4378static void
98027b10 4379ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4380{
4381 char *name;
4382 char endc;
4383 char *s;
4384 symbolS *ext_sym;
4385 symbolS *lab_sym;
4386
4387 name = input_line_pointer;
4388 endc = get_symbol_end ();
4389
4390 /* Ignore any [PR] suffix. */
4391 name = ppc_canonicalize_symbol_name (name);
4392 s = strchr (name, '[');
4393 if (s != (char *) NULL
4394 && strcmp (s + 1, "PR]") == 0)
4395 *s = '\0';
4396
4397 ext_sym = symbol_find_or_make (name);
4398
4399 *input_line_pointer = endc;
4400
4401 if (*input_line_pointer != ',')
4402 {
4403 as_bad (_("missing symbol name"));
4404 ignore_rest_of_line ();
4405 return;
4406 }
4407 ++input_line_pointer;
4408
4409 name = input_line_pointer;
4410 endc = get_symbol_end ();
4411
4412 lab_sym = symbol_find_or_make (name);
4413
4414 *input_line_pointer = endc;
4415
4416 if (ext_sym != lab_sym)
4417 {
809ffe0d
ILT		 4418 expressionS exp;
4419
4420 exp.X_op = O_symbol;
4421 exp.X_add_symbol = lab_sym;
4422 exp.X_op_symbol = NULL;
4423 exp.X_add_number = 0;
4424 exp.X_unsigned = 0;
4425 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4426 }
4427
96d56e9f
NC		 4428 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4429 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4430 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4431
4432 if (*input_line_pointer == ',')
4433 {
91d6fa6a 4434 expressionS exp;
252b5132
RH		 4435
4436 /* Ignore the third argument. */
4437 ++input_line_pointer;
91d6fa6a 4438 expression (& exp);
252b5132
RH		 4439 if (*input_line_pointer == ',')
4440 {
4441 /* Ignore the fourth argument. */
4442 ++input_line_pointer;
91d6fa6a 4443 expression (& exp);
252b5132
RH		 4444 if (*input_line_pointer == ',')
4445 {
4446 /* The fifth argument is the function size. */
4447 ++input_line_pointer;
85645aed
TG		 4448 symbol_get_tc (ext_sym)->u.size = symbol_new
4449 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4450 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4451 }
4452 }
4453 }
4454
4455 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4456 SF_SET_FUNCTION (ext_sym);
4457 SF_SET_PROCESS (ext_sym);
4458 coff_add_linesym (ext_sym);
4459
4460 demand_empty_rest_of_line ();
4461}
4462
4463/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4464 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4465 with the correct line number */
5d6255fe 4466
8642cce8 4467static symbolS *saved_bi_sym = 0;
252b5132
RH		 4468
4469static void
98027b10 4470ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4471{
4472 symbolS *sym;
4473
4474 sym = symbol_make (".bf");
4475 S_SET_SEGMENT (sym, text_section);
809ffe0d 4476 symbol_set_frag (sym, frag_now);
252b5132
RH		 4477 S_SET_VALUE (sym, frag_now_fix ());
4478 S_SET_STORAGE_CLASS (sym, C_FCN);
4479
4480 coff_line_base = get_absolute_expression ();
4481
4482 S_SET_NUMBER_AUXILIARY (sym, 1);
4483 SA_SET_SYM_LNNO (sym, coff_line_base);
4484
8642cce8 4485 /* Line number for bi. */
5d6255fe 4486 if (saved_bi_sym)
8642cce8
TR		 4487 {
4488 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4489 saved_bi_sym = 0;
4490 }
5d6255fe 4491
8642cce8 4492
809ffe0d 4493 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4494
4495 ppc_frob_label (sym);
4496
4497 demand_empty_rest_of_line ();
4498}
4499
4500/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4501 ".ef", except that the line number is absolute, not relative to the
4502 most recent ".bf" symbol. */
4503
4504static void
98027b10 4505ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4506{
4507 symbolS *sym;
4508
4509 sym = symbol_make (".ef");
4510 S_SET_SEGMENT (sym, text_section);
809ffe0d 4511 symbol_set_frag (sym, frag_now);
252b5132
RH		 4512 S_SET_VALUE (sym, frag_now_fix ());
4513 S_SET_STORAGE_CLASS (sym, C_FCN);
4514 S_SET_NUMBER_AUXILIARY (sym, 1);
4515 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4516 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4517
4518 ppc_frob_label (sym);
4519
4520 demand_empty_rest_of_line ();
4521}
4522
4523/* The .bi and .ei pseudo-ops. These take a string argument and
4524 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4525 the symbol list. The value of .bi will be know when the next .bf
4526 is encountered. */
252b5132
RH		 4527
4528static void
98027b10 4529ppc_biei (int ei)
252b5132
RH		 4530{
4531 static symbolS *last_biei;
4532
4533 char *name;
4534 int len;
4535 symbolS *sym;
4536 symbolS *look;
4537
4538 name = demand_copy_C_string (&len);
4539
4540 /* The value of these symbols is actually file offset. Here we set
4541 the value to the index into the line number entries. In
4542 ppc_frob_symbols we set the fix_line field, which will cause BFD
4543 to do the right thing. */
4544
4545 sym = symbol_make (name);
4546 /* obj-coff.c currently only handles line numbers correctly in the
4547 .text section. */
4548 S_SET_SEGMENT (sym, text_section);
4549 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4550 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4551
4552 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4553 symbol_get_tc (sym)->output = 1;
81d4177b 4554
8642cce8 4555 /* Save bi. */
5d6255fe 4556 if (ei)
8642cce8
TR		 4557 saved_bi_sym = 0;
4558 else
4559 saved_bi_sym = sym;
4560
252b5132
RH		 4561 for (look = last_biei ? last_biei : symbol_rootP;
4562 (look != (symbolS *) NULL
4563 && (S_GET_STORAGE_CLASS (look) == C_FILE
4564 || S_GET_STORAGE_CLASS (look) == C_BINCL
4565 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4566 look = symbol_next (look))
4567 ;
4568 if (look != (symbolS *) NULL)
4569 {
4570 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4571 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4572 last_biei = sym;
4573 }
4574
4575 demand_empty_rest_of_line ();
4576}
4577
4578/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4579 There is one argument, which is a csect symbol. The value of the
4580 .bs symbol is the index of this csect symbol. */
4581
4582static void
98027b10 4583ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4584{
4585 char *name;
4586 char endc;
4587 symbolS *csect;
4588 symbolS *sym;
4589
4590 if (ppc_current_block != NULL)
4591 as_bad (_("nested .bs blocks"));
4592
4593 name = input_line_pointer;
4594 endc = get_symbol_end ();
4595
4596 csect = symbol_find_or_make (name);
4597
4598 *input_line_pointer = endc;
4599
4600 sym = symbol_make (".bs");
4601 S_SET_SEGMENT (sym, now_seg);
4602 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4603 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4604 symbol_get_tc (sym)->output = 1;
252b5132 4605
809ffe0d 4606 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4607
4608 ppc_frob_label (sym);
4609
4610 ppc_current_block = sym;
4611
4612 demand_empty_rest_of_line ();
4613}
4614
4615/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4616
4617static void
98027b10 4618ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4619{
4620 symbolS *sym;
4621
4622 if (ppc_current_block == NULL)
4623 as_bad (_(".es without preceding .bs"));
4624
4625 sym = symbol_make (".es");
4626 S_SET_SEGMENT (sym, now_seg);
4627 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4628 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4629 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4630
4631 ppc_frob_label (sym);
4632
4633 ppc_current_block = NULL;
4634
4635 demand_empty_rest_of_line ();
4636}
4637
4638/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4639 line number. */
4640
4641static void
98027b10 4642ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4643{
4644 symbolS *sym;
4645
4646 sym = symbol_make (".bb");
4647 S_SET_SEGMENT (sym, text_section);
809ffe0d 4648 symbol_set_frag (sym, frag_now);
252b5132
RH		 4649 S_SET_VALUE (sym, frag_now_fix ());
4650 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4651
4652 S_SET_NUMBER_AUXILIARY (sym, 1);
4653 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4654
809ffe0d 4655 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4656
4657 SF_SET_PROCESS (sym);
4658
4659 ppc_frob_label (sym);
4660
4661 demand_empty_rest_of_line ();
4662}
4663
4664/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4665 line number. */
4666
4667static void
98027b10 4668ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4669{
4670 symbolS *sym;
4671
4672 sym = symbol_make (".eb");
4673 S_SET_SEGMENT (sym, text_section);
809ffe0d 4674 symbol_set_frag (sym, frag_now);
252b5132
RH		 4675 S_SET_VALUE (sym, frag_now_fix ());
4676 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4677 S_SET_NUMBER_AUXILIARY (sym, 1);
4678 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4679 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4680
4681 SF_SET_PROCESS (sym);
4682
4683 ppc_frob_label (sym);
4684
4685 demand_empty_rest_of_line ();
4686}
4687
4688/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4689 specified name. */
4690
4691static void
98027b10 4692ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4693{
4694 char *name;
4695 int len;
4696 symbolS *sym;
4697
4698 name = demand_copy_C_string (&len);
4699 sym = symbol_make (name);
4700 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4701 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4702 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4703 S_SET_VALUE (sym, 0);
809ffe0d 4704 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4705
4706 ppc_frob_label (sym);
4707
4708 demand_empty_rest_of_line ();
4709}
4710
4711/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4712
4713static void
98027b10 4714ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4715{
4716 symbolS *sym;
4717
4718 sym = symbol_make (".ec");
4719 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4720 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4721 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4722 S_SET_VALUE (sym, 0);
809ffe0d 4723 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4724
4725 ppc_frob_label (sym);
4726
4727 demand_empty_rest_of_line ();
4728}
4729
4730/* The .toc pseudo-op. Switch to the .toc subsegment. */
4731
4732static void
98027b10 4733ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4734{
4735 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4736 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4737 else
4738 {
4739 subsegT subseg;
4740 symbolS *sym;
4741 symbolS *list;
81d4177b 4742
252b5132
RH		 4743 subseg = ppc_data_subsegment;
4744 ++ppc_data_subsegment;
4745
4746 subseg_new (segment_name (data_section), subseg);
4747 ppc_toc_frag = frag_now;
4748
4749 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4750 symbol_set_frag (sym, frag_now);
252b5132
RH		 4751 S_SET_SEGMENT (sym, data_section);
4752 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4753 symbol_get_tc (sym)->subseg = subseg;
4754 symbol_get_tc (sym)->output = 1;
4755 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4756
4757 ppc_toc_csect = sym;
81d4177b 4758
252b5132 4759 for (list = ppc_data_csects;
809ffe0d
ILT		 4760 symbol_get_tc (list)->next != (symbolS *) NULL;
4761 list = symbol_get_tc (list)->next)
252b5132 4762 ;
809ffe0d 4763 symbol_get_tc (list)->next = sym;
252b5132
RH		 4764
4765 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4766 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4767 &symbol_lastP);
252b5132
RH		 4768 }
4769
4770 ppc_current_csect = ppc_toc_csect;
4771
4772 demand_empty_rest_of_line ();
4773}
4774
4775/* The AIX assembler automatically aligns the operands of a .long or
4776 .short pseudo-op, and we want to be compatible. */
4777
4778static void
98027b10 4779ppc_xcoff_cons (int log_size)
252b5132
RH		 4780{
4781 frag_align (log_size, 0, 0);
4782 record_alignment (now_seg, log_size);
4783 cons (1 << log_size);
4784}
4785
4786static void
98027b10 4787ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4788{
4789 expressionS exp;
4790 int byte_count;
4791
4792 (void) expression (&exp);
4793
4794 if (exp.X_op != O_constant)
4795 {
4796 as_bad (_("non-constant byte count"));
4797 return;
4798 }
4799
4800 byte_count = exp.X_add_number;
4801
4802 if (*input_line_pointer != ',')
4803 {
4804 as_bad (_("missing value"));
4805 return;
4806 }
4807
4808 ++input_line_pointer;
4809 cons (byte_count);
4810}
4811
85645aed
TG		 4812void
4813ppc_xcoff_end (void)
4814{
4815 int i;
4816
4817 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4818 {
4819 struct dw_section *dws = &dw_sections[i];
4820 struct dw_subsection *dwss;
4821
4822 if (dws->anon_subseg)
4823 {
4824 dwss = dws->anon_subseg;
4825 dwss->link = dws->list_subseg;
4826 }
4827 else
4828 dwss = dws->list_subseg;
4829
4830 for (; dwss != NULL; dwss = dwss->link)
4831 if (dwss->end_exp.X_add_symbol != NULL)
4832 {
4833 subseg_set (dws->sect, dwss->subseg);
4834 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4835 }
4836 }
4837}
4838
252b5132 4839#endif /* OBJ_XCOFF */
0baf16f2 4840#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4841\f
4842/* The .tc pseudo-op. This is used when generating either XCOFF or
4843 ELF. This takes two or more arguments.
4844
4845 When generating XCOFF output, the first argument is the name to
4846 give to this location in the toc; this will be a symbol with class
0baf16f2 4847 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4848 this location in the TOC; often there is just one more argument, a
1049f94e 4849 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4850 depends on target word size. A 32-bit target uses 4-byte values, a
4851 64-bit target uses 8-byte values.
252b5132
RH		 4852
4853 When not generating XCOFF output, the arguments are the same, but
4854 the first argument is simply ignored. */
4855
4856static void
98027b10 4857ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4858{
4859#ifdef OBJ_XCOFF
4860
4861 /* Define the TOC symbol name. */
4862 {
4863 char *name;
4864 char endc;
4865 symbolS *sym;
4866
4867 if (ppc_toc_csect == (symbolS *) NULL
4868 || ppc_toc_csect != ppc_current_csect)
4869 {
4870 as_bad (_(".tc not in .toc section"));
4871 ignore_rest_of_line ();
4872 return;
4873 }
4874
4875 name = input_line_pointer;
4876 endc = get_symbol_end ();
4877
4878 sym = symbol_find_or_make (name);
4879
4880 *input_line_pointer = endc;
4881
4882 if (S_IS_DEFINED (sym))
4883 {
4884 symbolS *label;
4885
809ffe0d 4886 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4887 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4888 {
4889 as_bad (_(".tc with no label"));
4890 ignore_rest_of_line ();
4891 return;
4892 }
4893
4894 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4895 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4896 S_SET_VALUE (label, S_GET_VALUE (sym));
4897
4898 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4899 ++input_line_pointer;
4900
4901 return;
4902 }
4903
4904 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4905 symbol_set_frag (sym, frag_now);
252b5132 4906 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4907 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4908 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4909
4910 ppc_frob_label (sym);
4911 }
4912
0baf16f2
AM		 4913#endif /* OBJ_XCOFF */
4914#ifdef OBJ_ELF
9c7977b3 4915 int align;
252b5132
RH		 4916
4917 /* Skip the TOC symbol name. */
4918 while (is_part_of_name (*input_line_pointer)
d13d4015 4919 || *input_line_pointer == ' '
252b5132
RH		 4920 || *input_line_pointer == '['
4921 || *input_line_pointer == ']'
4922 || *input_line_pointer == '{'
4923 || *input_line_pointer == '}')
4924 ++input_line_pointer;
4925
0baf16f2 4926 /* Align to a four/eight byte boundary. */
2b3c4602 4927 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4928 frag_align (align, 0, 0);
4929 record_alignment (now_seg, align);
0baf16f2 4930#endif /* OBJ_ELF */
252b5132
RH		 4931
4932 if (*input_line_pointer != ',')
4933 demand_empty_rest_of_line ();
4934 else
4935 {
4936 ++input_line_pointer;
2b3c4602 4937 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4938 }
4939}
0baf16f2
AM		 4940
4941/* Pseudo-op .machine. */
0baf16f2
AM		 4942
4943static void
98027b10 4944ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4945{
69c040df
AM		 4946 char *cpu_string;
4947#define MAX_HISTORY 100
fa452fa6 4948 static ppc_cpu_t *cpu_history;
69c040df
AM		 4949 static int curr_hist;
4950
4951 SKIP_WHITESPACE ();
4952
4953 if (*input_line_pointer == '"')
4954 {
4955 int len;
4956 cpu_string = demand_copy_C_string (&len);
4957 }
4958 else
4959 {
4960 char c;
4961 cpu_string = input_line_pointer;
4962 c = get_symbol_end ();
4963 cpu_string = xstrdup (cpu_string);
4964 *input_line_pointer = c;
4965 }
4966
4967 if (cpu_string != NULL)
4968 {
fa452fa6 4969 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4970 ppc_cpu_t new_cpu;
69c040df
AM		 4971 char *p;
4972
4973 for (p = cpu_string; *p != 0; p++)
4974 *p = TOLOWER (*p);
4975
4976 if (strcmp (cpu_string, "push") == 0)
4977 {
4978 if (cpu_history == NULL)
4979 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4980
4981 if (curr_hist >= MAX_HISTORY)
4982 as_bad (_(".machine stack overflow"));
4983 else
4984 cpu_history[curr_hist++] = ppc_cpu;
4985 }
4986 else if (strcmp (cpu_string, "pop") == 0)
4987 {
4988 if (curr_hist <= 0)
4989 as_bad (_(".machine stack underflow"));
4990 else
4991 ppc_cpu = cpu_history[--curr_hist];
4992 }
776fc418 4993 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
69fe9ce5 4994 ppc_cpu = new_cpu;
69c040df
AM		 4995 else
4996 as_bad (_("invalid machine `%s'"), cpu_string);
4997
4998 if (ppc_cpu != old_cpu)
4999 ppc_setup_opcodes ();
5000 }
5001
5002 demand_empty_rest_of_line ();
0baf16f2 5003}
0baf16f2 5004#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 5005\f
5006#ifdef TE_PE
5007
99a814a1 5008/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 5009
5010/* Set the current section. */
5011static void
98027b10 5012ppc_set_current_section (segT new)
252b5132
RH		 5013{
5014 ppc_previous_section = ppc_current_section;
5015 ppc_current_section = new;
5016}
5017
5018/* pseudo-op: .previous
5019 behaviour: toggles the current section with the previous section.
5020 errors: None
99a814a1
AM		 5021 warnings: "No previous section" */
5022
252b5132 5023static void
98027b10 5024ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132 5025{
81d4177b 5026 if (ppc_previous_section == NULL)
252b5132 5027 {
d6ed37ed 5028 as_warn (_("no previous section to return to, ignored."));
252b5132
RH		 5029 return;
5030 }
5031
99a814a1 5032 subseg_set (ppc_previous_section, 0);
252b5132 5033
99a814a1 5034 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 5035}
5036
5037/* pseudo-op: .pdata
5038 behaviour: predefined read only data section
b34976b6 5039 double word aligned
252b5132
RH		 5040 errors: None
5041 warnings: None
5042 initial: .section .pdata "adr3"
b34976b6 5043 a - don't know -- maybe a misprint
252b5132
RH		 5044 d - initialized data
5045 r - readable
5046 3 - double word aligned (that would be 4 byte boundary)
5047
5048 commentary:
5049 Tag index tables (also known as the function table) for exception
99a814a1 5050 handling, debugging, etc. */
252b5132 5051
252b5132 5052static void
98027b10 5053ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 5054{
81d4177b 5055 if (pdata_section == 0)
252b5132
RH		 5056 {
5057 pdata_section = subseg_new (".pdata", 0);
81d4177b 5058
252b5132
RH		 5059 bfd_set_section_flags (stdoutput, pdata_section,
5060 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5061 | SEC_READONLY | SEC_DATA ));
81d4177b 5062
252b5132
RH		 5063 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5064 }
5065 else
5066 {
99a814a1 5067 pdata_section = subseg_new (".pdata", 0);
252b5132 5068 }
99a814a1 5069 ppc_set_current_section (pdata_section);
252b5132
RH		 5070}
5071
5072/* pseudo-op: .ydata
5073 behaviour: predefined read only data section
b34976b6 5074 double word aligned
252b5132
RH		 5075 errors: None
5076 warnings: None
5077 initial: .section .ydata "drw3"
b34976b6 5078 a - don't know -- maybe a misprint
252b5132
RH		 5079 d - initialized data
5080 r - readable
5081 3 - double word aligned (that would be 4 byte boundary)
5082 commentary:
5083 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 5084 debugging, etc. */
5085
252b5132 5086static void
98027b10 5087ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 5088{
81d4177b 5089 if (ydata_section == 0)
252b5132
RH		 5090 {
5091 ydata_section = subseg_new (".ydata", 0);
5092 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 5093 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5094 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 5095
5096 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5097 }
5098 else
5099 {
5100 ydata_section = subseg_new (".ydata", 0);
5101 }
99a814a1 5102 ppc_set_current_section (ydata_section);
252b5132
RH		 5103}
5104
5105/* pseudo-op: .reldata
5106 behaviour: predefined read write data section
b34976b6 5107 double word aligned (4-byte)
252b5132
RH		 5108 FIXME: relocation is applied to it
5109 FIXME: what's the difference between this and .data?
5110 errors: None
5111 warnings: None
5112 initial: .section .reldata "drw3"
5113 d - initialized data
5114 r - readable
5115 w - writeable
5116 3 - double word aligned (that would be 8 byte boundary)
5117
5118 commentary:
5119 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 5120 function descriptors, etc. */
5121
252b5132 5122static void
98027b10 5123ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5124{
5125 if (reldata_section == 0)
5126 {
5127 reldata_section = subseg_new (".reldata", 0);
5128
5129 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 5130 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5131 | SEC_DATA));
252b5132
RH		 5132
5133 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5134 }
5135 else
5136 {
5137 reldata_section = subseg_new (".reldata", 0);
5138 }
99a814a1 5139 ppc_set_current_section (reldata_section);
252b5132
RH		 5140}
5141
5142/* pseudo-op: .rdata
5143 behaviour: predefined read only data section
b34976b6 5144 double word aligned
252b5132
RH		 5145 errors: None
5146 warnings: None
5147 initial: .section .rdata "dr3"
5148 d - initialized data
5149 r - readable
99a814a1
AM		 5150 3 - double word aligned (that would be 4 byte boundary) */
5151
252b5132 5152static void
98027b10 5153ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5154{
5155 if (rdata_section == 0)
5156 {
5157 rdata_section = subseg_new (".rdata", 0);
5158 bfd_set_section_flags (stdoutput, rdata_section,
5159 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5160 | SEC_READONLY | SEC_DATA ));
5161
5162 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5163 }
5164 else
5165 {
5166 rdata_section = subseg_new (".rdata", 0);
5167 }
99a814a1 5168 ppc_set_current_section (rdata_section);
252b5132
RH		 5169}
5170
5171/* pseudo-op: .ualong
81d4177b 5172 behaviour: much like .int, with the exception that no alignment is
b34976b6 5173 performed.
252b5132
RH		 5174 FIXME: test the alignment statement
5175 errors: None
99a814a1
AM		 5176 warnings: None */
5177
252b5132 5178static void
98027b10 5179ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 5180{
99a814a1
AM		 5181 /* Try for long. */
5182 cons (4);
252b5132
RH		 5183}
5184
5185/* pseudo-op: .znop <symbol name>
5186 behaviour: Issue a nop instruction
b34976b6 5187 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 5188 the supplied symbol name.
5189 errors: None
99a814a1
AM		 5190 warnings: Missing symbol name */
5191
252b5132 5192static void
98027b10 5193ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5194{
5195 unsigned long insn;
5196 const struct powerpc_opcode *opcode;
252b5132 5197 char *f;
252b5132 5198 symbolS *sym;
252b5132
RH		 5199 char *symbol_name;
5200 char c;
5201 char *name;
252b5132 5202
99a814a1 5203 /* Strip out the symbol name. */
252b5132
RH		 5204 symbol_name = input_line_pointer;
5205 c = get_symbol_end ();
5206
5207 name = xmalloc (input_line_pointer - symbol_name + 1);
5208 strcpy (name, symbol_name);
5209
5210 sym = symbol_find_or_make (name);
5211
5212 *input_line_pointer = c;
5213
5214 SKIP_WHITESPACE ();
5215
5216 /* Look up the opcode in the hash table. */
5217 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5218
99a814a1 5219 /* Stick in the nop. */
252b5132
RH		 5220 insn = opcode->opcode;
5221
5222 /* Write out the instruction. */
5223 f = frag_more (4);
5224 md_number_to_chars (f, insn, 4);
5225 fix_new (frag_now,
5226 f - frag_now->fr_literal,
5227 4,
5228 sym,
5229 0,
5230 0,
5231 BFD_RELOC_16_GOT_PCREL);
5232
5233}
5234
81d4177b
KH		 5235/* pseudo-op:
5236 behaviour:
5237 errors:
99a814a1
AM		 5238 warnings: */
5239
252b5132 5240static void
98027b10 5241ppc_pe_comm (int lcomm)
252b5132 5242{
98027b10
AM		 5243 char *name;
5244 char c;
5245 char *p;
252b5132 5246 offsetT temp;
98027b10 5247 symbolS *symbolP;
252b5132
RH		 5248 offsetT align;
5249
5250 name = input_line_pointer;
5251 c = get_symbol_end ();
5252
99a814a1 5253 /* just after name is now '\0'. */
252b5132
RH		 5254 p = input_line_pointer;
5255 *p = c;
5256 SKIP_WHITESPACE ();
5257 if (*input_line_pointer != ',')
5258 {
d6ed37ed 5259 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 5260 ignore_rest_of_line ();
5261 return;
5262 }
5263
5264 input_line_pointer++; /* skip ',' */
5265 if ((temp = get_absolute_expression ()) < 0)
5266 {
5267 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5268 ignore_rest_of_line ();
5269 return;
5270 }
5271
5272 if (! lcomm)
5273 {
5274 /* The third argument to .comm is the alignment. */
5275 if (*input_line_pointer != ',')
5276 align = 3;
5277 else
5278 {
5279 ++input_line_pointer;
5280 align = get_absolute_expression ();
5281 if (align <= 0)
5282 {
5283 as_warn (_("ignoring bad alignment"));
5284 align = 3;
5285 }
5286 }
5287 }
5288
5289 *p = 0;
5290 symbolP = symbol_find_or_make (name);
5291
5292 *p = c;
5293 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5294 {
d6ed37ed 5295 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 5296 S_GET_NAME (symbolP));
5297 ignore_rest_of_line ();
5298 return;
5299 }
5300
5301 if (S_GET_VALUE (symbolP))
5302 {
5303 if (S_GET_VALUE (symbolP) != (valueT) temp)
d6ed37ed 5304 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 5305 S_GET_NAME (symbolP),
5306 (long) S_GET_VALUE (symbolP),
5307 (long) temp);
5308 }
5309 else
5310 {
5311 S_SET_VALUE (symbolP, (valueT) temp);
5312 S_SET_EXTERNAL (symbolP);
86ebace2 5313 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 5314 }
5315
5316 demand_empty_rest_of_line ();
5317}
5318
5319/*
5320 * implement the .section pseudo op:
5321 * .section name {, "flags"}
5322 * ^ ^
5323 * | +--- optional flags: 'b' for bss
5324 * | 'i' for info
5325 * +-- section name 'l' for lib
5326 * 'n' for noload
5327 * 'o' for over
5328 * 'w' for data
5329 * 'd' (apparently m88k for data)
5330 * 'x' for text
5331 * But if the argument is not a quoted string, treat it as a
5332 * subsegment number.
5333 *
5334 * FIXME: this is a copy of the section processing from obj-coff.c, with
5335 * additions/changes for the moto-pas assembler support. There are three
5336 * categories:
5337 *
81d4177b 5338 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 5339 * setting bits that bfd probably neither understands or uses. The
5340 * correct approach (?) will have to incorporate extra fields attached
5341 * to the section to hold the system specific stuff. (krk)
5342 *
5343 * Section Contents:
5344 * 'a' - unknown - referred to in documentation, but no definition supplied
5345 * 'c' - section has code
5346 * 'd' - section has initialized data
5347 * 'u' - section has uninitialized data
5348 * 'i' - section contains directives (info)
5349 * 'n' - section can be discarded
5350 * 'R' - remove section at link time
5351 *
5352 * Section Protection:
5353 * 'r' - section is readable
5354 * 'w' - section is writeable
5355 * 'x' - section is executable
5356 * 's' - section is sharable
5357 *
5358 * Section Alignment:
5359 * '0' - align to byte boundary
5360 * '1' - align to halfword undary
5361 * '2' - align to word boundary
5362 * '3' - align to doubleword boundary
5363 * '4' - align to quadword boundary
5364 * '5' - align to 32 byte boundary
5365 * '6' - align to 64 byte boundary
5366 *
5367 */
5368
5369void
98027b10 5370ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 5371{
99a814a1 5372 /* Strip out the section name. */
252b5132
RH		 5373 char *section_name;
5374 char c;
5375 char *name;
5376 unsigned int exp;
5377 flagword flags;
5378 segT sec;
5379 int align;
5380
5381 section_name = input_line_pointer;
5382 c = get_symbol_end ();
5383
5384 name = xmalloc (input_line_pointer - section_name + 1);
5385 strcpy (name, section_name);
5386
5387 *input_line_pointer = c;
5388
5389 SKIP_WHITESPACE ();
5390
5391 exp = 0;
5392 flags = SEC_NO_FLAGS;
5393
5394 if (strcmp (name, ".idata$2") == 0)
5395 {
5396 align = 0;
5397 }
5398 else if (strcmp (name, ".idata$3") == 0)
5399 {
5400 align = 0;
5401 }
5402 else if (strcmp (name, ".idata$4") == 0)
5403 {
5404 align = 2;
5405 }
5406 else if (strcmp (name, ".idata$5") == 0)
5407 {
5408 align = 2;
5409 }
5410 else if (strcmp (name, ".idata$6") == 0)
5411 {
5412 align = 1;
5413 }
5414 else
99a814a1
AM		 5415 /* Default alignment to 16 byte boundary. */
5416 align = 4;
252b5132
RH		 5417
5418 if (*input_line_pointer == ',')
5419 {
5420 ++input_line_pointer;
5421 SKIP_WHITESPACE ();
5422 if (*input_line_pointer != '"')
5423 exp = get_absolute_expression ();
5424 else
5425 {
5426 ++input_line_pointer;
5427 while (*input_line_pointer != '"'
5428 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5429 {
5430 switch (*input_line_pointer)
5431 {
5432 /* Section Contents */
5433 case 'a': /* unknown */
d6ed37ed 5434 as_bad (_("unsupported section attribute -- 'a'"));
252b5132
RH		 5435 break;
5436 case 'c': /* code section */
81d4177b 5437 flags |= SEC_CODE;
252b5132
RH		 5438 break;
5439 case 'd': /* section has initialized data */
5440 flags |= SEC_DATA;
5441 break;
5442 case 'u': /* section has uninitialized data */
5443 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5444 in winnt.h */
5445 flags |= SEC_ROM;
5446 break;
5447 case 'i': /* section contains directives (info) */
5448 /* FIXME: This is IMAGE_SCN_LNK_INFO
5449 in winnt.h */
5450 flags |= SEC_HAS_CONTENTS;
5451 break;
5452 case 'n': /* section can be discarded */
81d4177b 5453 flags &=~ SEC_LOAD;
252b5132
RH		 5454 break;
5455 case 'R': /* Remove section at link time */
5456 flags |= SEC_NEVER_LOAD;
5457 break;
8d452c78 5458#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5459 /* Section Protection */
5460 case 'r': /* section is readable */
5461 flags |= IMAGE_SCN_MEM_READ;
5462 break;
5463 case 'w': /* section is writeable */
5464 flags |= IMAGE_SCN_MEM_WRITE;
5465 break;
5466 case 'x': /* section is executable */
5467 flags |= IMAGE_SCN_MEM_EXECUTE;
5468 break;
5469 case 's': /* section is sharable */
5470 flags |= IMAGE_SCN_MEM_SHARED;
5471 break;
5472
5473 /* Section Alignment */
5474 case '0': /* align to byte boundary */
5475 flags |= IMAGE_SCN_ALIGN_1BYTES;
5476 align = 0;
5477 break;
5478 case '1': /* align to halfword boundary */
5479 flags |= IMAGE_SCN_ALIGN_2BYTES;
5480 align = 1;
5481 break;
5482 case '2': /* align to word boundary */
5483 flags |= IMAGE_SCN_ALIGN_4BYTES;
5484 align = 2;
5485 break;
5486 case '3': /* align to doubleword boundary */
5487 flags |= IMAGE_SCN_ALIGN_8BYTES;
5488 align = 3;
5489 break;
5490 case '4': /* align to quadword boundary */
5491 flags |= IMAGE_SCN_ALIGN_16BYTES;
5492 align = 4;
5493 break;
5494 case '5': /* align to 32 byte boundary */
5495 flags |= IMAGE_SCN_ALIGN_32BYTES;
5496 align = 5;
5497 break;
5498 case '6': /* align to 64 byte boundary */
5499 flags |= IMAGE_SCN_ALIGN_64BYTES;
5500 align = 6;
5501 break;
8d452c78 5502#endif
252b5132 5503 default:
99a814a1
AM		 5504 as_bad (_("unknown section attribute '%c'"),
5505 *input_line_pointer);
252b5132
RH		 5506 break;
5507 }
5508 ++input_line_pointer;
5509 }
5510 if (*input_line_pointer == '"')
5511 ++input_line_pointer;
5512 }
5513 }
5514
5515 sec = subseg_new (name, (subsegT) exp);
5516
99a814a1 5517 ppc_set_current_section (sec);
252b5132
RH		 5518
5519 if (flags != SEC_NO_FLAGS)
5520 {
5521 if (! bfd_set_section_flags (stdoutput, sec, flags))
5522 as_bad (_("error setting flags for \"%s\": %s"),
5523 bfd_section_name (stdoutput, sec),
5524 bfd_errmsg (bfd_get_error ()));
5525 }
5526
99a814a1 5527 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5528}
5529
5530static void
98027b10 5531ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5532{
5533 char *name;
5534 char endc;
5535 symbolS *ext_sym;
5536
5537 name = input_line_pointer;
5538 endc = get_symbol_end ();
5539
5540 ext_sym = symbol_find_or_make (name);
5541
5542 *input_line_pointer = endc;
5543
5544 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5545 SF_SET_FUNCTION (ext_sym);
5546 SF_SET_PROCESS (ext_sym);
5547 coff_add_linesym (ext_sym);
5548
5549 demand_empty_rest_of_line ();
5550}
5551
5552static void
98027b10 5553ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5554{
5555 if (tocdata_section == 0)
5556 {
5557 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5558 /* FIXME: section flags won't work. */
252b5132
RH		 5559 bfd_set_section_flags (stdoutput, tocdata_section,
5560 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5561 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5562
5563 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5564 }
5565 else
5566 {
5567 rdata_section = subseg_new (".tocd", 0);
5568 }
5569
99a814a1 5570 ppc_set_current_section (tocdata_section);
252b5132
RH		 5571
5572 demand_empty_rest_of_line ();
5573}
5574
5575/* Don't adjust TOC relocs to use the section symbol. */
5576
5577int
98027b10 5578ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5579{
5580 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5581}
5582
5583#endif
5584\f
5585#ifdef OBJ_XCOFF
5586
5587/* XCOFF specific symbol and file handling. */
5588
5589/* Canonicalize the symbol name. We use the to force the suffix, if
5590 any, to use square brackets, and to be in upper case. */
5591
5592char *
98027b10 5593ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5594{
5595 char *s;
5596
5597 if (ppc_stab_symbol)
5598 return name;
5599
5600 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5601 ;
5602 if (*s != '\0')
5603 {
5604 char brac;
5605
5606 if (*s == '[')
5607 brac = ']';
5608 else
5609 {
5610 *s = '[';
5611 brac = '}';
5612 }
5613
5614 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5615 *s = TOUPPER (*s);
252b5132
RH		 5616
5617 if (*s == '\0' || s[1] != '\0')
5618 as_bad (_("bad symbol suffix"));
5619
5620 *s = ']';
5621 }
5622
5623 return name;
5624}
5625
5626/* Set the class of a symbol based on the suffix, if any. This is
5627 called whenever a new symbol is created. */
5628
5629void
98027b10 5630ppc_symbol_new_hook (symbolS *sym)
252b5132 5631{
809ffe0d 5632 struct ppc_tc_sy *tc;
252b5132
RH		 5633 const char *s;
5634
809ffe0d
ILT		 5635 tc = symbol_get_tc (sym);
5636 tc->next = NULL;
5637 tc->output = 0;
96d56e9f 5638 tc->symbol_class = -1;
809ffe0d
ILT		 5639 tc->real_name = NULL;
5640 tc->subseg = 0;
5641 tc->align = 0;
85645aed
TG		 5642 tc->u.size = NULL;
5643 tc->u.dw = NULL;
809ffe0d 5644 tc->within = NULL;
252b5132
RH		 5645
5646 if (ppc_stab_symbol)
5647 return;
5648
5649 s = strchr (S_GET_NAME (sym), '[');
5650 if (s == (const char *) NULL)
5651 {
5652 /* There is no suffix. */
5653 return;
5654 }
5655
5656 ++s;
5657
5658 switch (s[0])
5659 {
5660 case 'B':
5661 if (strcmp (s, "BS]") == 0)
96d56e9f 5662 tc->symbol_class = XMC_BS;
252b5132
RH		 5663 break;
5664 case 'D':
5665 if (strcmp (s, "DB]") == 0)
96d56e9f 5666 tc->symbol_class = XMC_DB;
252b5132 5667 else if (strcmp (s, "DS]") == 0)
96d56e9f 5668 tc->symbol_class = XMC_DS;
252b5132
RH		 5669 break;
5670 case 'G':
5671 if (strcmp (s, "GL]") == 0)
96d56e9f 5672 tc->symbol_class = XMC_GL;
252b5132
RH		 5673 break;
5674 case 'P':
5675 if (strcmp (s, "PR]") == 0)
96d56e9f 5676 tc->symbol_class = XMC_PR;
252b5132
RH		 5677 break;
5678 case 'R':
5679 if (strcmp (s, "RO]") == 0)
96d56e9f 5680 tc->symbol_class = XMC_RO;
252b5132 5681 else if (strcmp (s, "RW]") == 0)
96d56e9f 5682 tc->symbol_class = XMC_RW;
252b5132
RH		 5683 break;
5684 case 'S':
5685 if (strcmp (s, "SV]") == 0)
96d56e9f 5686 tc->symbol_class = XMC_SV;
252b5132
RH		 5687 break;
5688 case 'T':
5689 if (strcmp (s, "TC]") == 0)
96d56e9f 5690 tc->symbol_class = XMC_TC;
252b5132 5691 else if (strcmp (s, "TI]") == 0)
96d56e9f 5692 tc->symbol_class = XMC_TI;
252b5132 5693 else if (strcmp (s, "TB]") == 0)
96d56e9f 5694 tc->symbol_class = XMC_TB;
252b5132 5695 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5696 tc->symbol_class = XMC_TC0;
252b5132
RH		 5697 break;
5698 case 'U':
5699 if (strcmp (s, "UA]") == 0)
96d56e9f 5700 tc->symbol_class = XMC_UA;
252b5132 5701 else if (strcmp (s, "UC]") == 0)
96d56e9f 5702 tc->symbol_class = XMC_UC;
252b5132
RH		 5703 break;
5704 case 'X':
5705 if (strcmp (s, "XO]") == 0)
96d56e9f 5706 tc->symbol_class = XMC_XO;
252b5132
RH		 5707 break;
5708 }
5709
96d56e9f 5710 if (tc->symbol_class == -1)
d6ed37ed 5711 as_bad (_("unrecognized symbol suffix"));
252b5132
RH		 5712}
5713
5714/* Set the class of a label based on where it is defined. This
5715 handles symbols without suffixes. Also, move the symbol so that it
5716 follows the csect symbol. */
5717
5718void
98027b10 5719ppc_frob_label (symbolS *sym)
252b5132
RH		 5720{
5721 if (ppc_current_csect != (symbolS *) NULL)
5722 {
96d56e9f
NC		 5723 if (symbol_get_tc (sym)->symbol_class == -1)
5724 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5725
5726 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5727 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5728 &symbol_rootP, &symbol_lastP);
5729 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5730 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5731 }
07a53e5c
RH		 5732
5733#ifdef OBJ_ELF
5734 dwarf2_emit_label (sym);
5735#endif
252b5132
RH		 5736}
5737
5738/* This variable is set by ppc_frob_symbol if any absolute symbols are
5739 seen. It tells ppc_adjust_symtab whether it needs to look through
5740 the symbols. */
5741
b34976b6 5742static bfd_boolean ppc_saw_abs;
252b5132
RH		 5743
5744/* Change the name of a symbol just before writing it out. Set the
5745 real name if the .rename pseudo-op was used. Otherwise, remove any
5746 class suffix. Return 1 if the symbol should not be included in the
5747 symbol table. */
5748
5749int
98027b10 5750ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5751{
5752 static symbolS *ppc_last_function;
5753 static symbolS *set_end;
5754
5755 /* Discard symbols that should not be included in the output symbol
5756 table. */
809ffe0d
ILT		 5757 if (! symbol_used_in_reloc_p (sym)
5758 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5759 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5760 && ! symbol_get_tc (sym)->output
252b5132
RH		 5761 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5762 return 1;
5763
a161fe53
AM		 5764 /* This one will disappear anyway. Don't make a csect sym for it. */
5765 if (sym == abs_section_sym)
5766 return 1;
5767
809ffe0d
ILT		 5768 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5769 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5770 else
5771 {
5772 const char *name;
5773 const char *s;
5774
5775 name = S_GET_NAME (sym);
5776 s = strchr (name, '[');
5777 if (s != (char *) NULL)
5778 {
5779 unsigned int len;
5780 char *snew;
5781
5782 len = s - name;
5783 snew = xmalloc (len + 1);
5784 memcpy (snew, name, len);
5785 snew[len] = '\0';
5786
5787 S_SET_NAME (sym, snew);
5788 }
5789 }
5790
5791 if (set_end != (symbolS *) NULL)
5792 {
5793 SA_SET_SYM_ENDNDX (set_end, sym);
5794 set_end = NULL;
5795 }
5796
5797 if (SF_GET_FUNCTION (sym))
5798 {
5799 if (ppc_last_function != (symbolS *) NULL)
5800 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5801 ppc_last_function = sym;
85645aed 5802 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5803 {
85645aed 5804 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5805 SA_SET_SYM_FSIZE (sym,
85645aed 5806 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5807 }
5808 }
5809 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5810 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5811 {
5812 if (ppc_last_function == (symbolS *) NULL)
5813 as_bad (_(".ef with no preceding .function"));
5814 else
5815 {
5816 set_end = ppc_last_function;
5817 ppc_last_function = NULL;
5818
5819 /* We don't have a C_EFCN symbol, but we need to force the
5820 COFF backend to believe that it has seen one. */
5821 coff_last_function = NULL;
5822 }
5823 }
5824
670ec21d 5825 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5826 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5827 && S_GET_STORAGE_CLASS (sym) != C_FILE
5828 && S_GET_STORAGE_CLASS (sym) != C_FCN
5829 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5830 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5831 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5832 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5833 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5834 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5835 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5836
5837 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5838 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5839 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5840 {
5841 int i;
5842 union internal_auxent *a;
5843
5844 /* Create a csect aux. */
5845 i = S_GET_NUMBER_AUXILIARY (sym);
5846 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5847 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5848 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5849 {
5850 /* This is the TOC table. */
5851 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5852 a->x_csect.x_scnlen.l = 0;
5853 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5854 }
809ffe0d 5855 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5856 {
5857 /* This is a csect symbol. x_scnlen is the size of the
5858 csect. */
809ffe0d 5859 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5860 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5861 S_GET_SEGMENT (sym))
5862 - S_GET_VALUE (sym));
5863 else
5864 {
6386f3a7 5865 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5866 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5867 - S_GET_VALUE (sym));
5868 }
809ffe0d 5869 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5870 }
5871 else if (S_GET_SEGMENT (sym) == bss_section)
5872 {
5873 /* This is a common symbol. */
809ffe0d
ILT		 5874 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5875 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5876 if (S_IS_EXTERNAL (sym))
96d56e9f 5877 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5878 else
96d56e9f 5879 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5880 }
5881 else if (S_GET_SEGMENT (sym) == absolute_section)
5882 {
5883 /* This is an absolute symbol. The csect will be created by
99a814a1 5884 ppc_adjust_symtab. */
b34976b6 5885 ppc_saw_abs = TRUE;
252b5132 5886 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5887 if (symbol_get_tc (sym)->symbol_class == -1)
5888 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5889 }
5890 else if (! S_IS_DEFINED (sym))
5891 {
5892 /* This is an external symbol. */
5893 a->x_csect.x_scnlen.l = 0;
5894 a->x_csect.x_smtyp = XTY_ER;
5895 }
96d56e9f 5896 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5897 {
5898 symbolS *next;
5899
5900 /* This is a TOC definition. x_scnlen is the size of the
5901 TOC entry. */
5902 next = symbol_next (sym);
96d56e9f 5903 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5904 next = symbol_next (next);
5905 if (next == (symbolS *) NULL
96d56e9f 5906 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5907 {
5908 if (ppc_after_toc_frag == (fragS *) NULL)
5909 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5910 data_section)
5911 - S_GET_VALUE (sym));
5912 else
5913 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5914 - S_GET_VALUE (sym));
5915 }
5916 else
5917 {
6386f3a7 5918 resolve_symbol_value (next);
252b5132
RH		 5919 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5920 - S_GET_VALUE (sym));
5921 }
5922 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5923 }
5924 else
5925 {
5926 symbolS *csect;
5927
5928 /* This is a normal symbol definition. x_scnlen is the
5929 symbol index of the containing csect. */
5930 if (S_GET_SEGMENT (sym) == text_section)
5931 csect = ppc_text_csects;
5932 else if (S_GET_SEGMENT (sym) == data_section)
5933 csect = ppc_data_csects;
5934 else
5935 abort ();
5936
5937 /* Skip the initial dummy symbol. */
809ffe0d 5938 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5939
5940 if (csect == (symbolS *) NULL)
5941 {
5942 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5943 a->x_csect.x_scnlen.l = 0;
5944 }
5945 else
5946 {
809ffe0d 5947 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5948 {
6386f3a7 5949 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5950 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5951 > S_GET_VALUE (sym))
252b5132 5952 break;
809ffe0d 5953 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5954 }
5955
809ffe0d
ILT		 5956 a->x_csect.x_scnlen.p =
5957 coffsymbol (symbol_get_bfdsym (csect))->native;
5958 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5959 1;
252b5132
RH		 5960 }
5961 a->x_csect.x_smtyp = XTY_LD;
5962 }
81d4177b 5963
252b5132
RH		 5964 a->x_csect.x_parmhash = 0;
5965 a->x_csect.x_snhash = 0;
96d56e9f 5966 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5967 a->x_csect.x_smclas = XMC_PR;
5968 else
96d56e9f 5969 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5970 a->x_csect.x_stab = 0;
5971 a->x_csect.x_snstab = 0;
5972
5973 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5974 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5975 }
5976 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5977 {
5978 /* We want the value to be the symbol index of the referenced
5979 csect symbol. BFD will do that for us if we set the right
5980 flags. */
b782de16
AM		 5981 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5982 combined_entry_type *c = coffsymbol (bsym)->native;
5983
5984 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5985 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5986 }
5987 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5988 {
5989 symbolS *block;
c734e7e3 5990 valueT base;
252b5132 5991
809ffe0d 5992 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5993 if (block)
5994 {
5995 /* The value is the offset from the enclosing csect. */
5996 symbolS *csect;
5997
5998 csect = symbol_get_tc (block)->within;
5999 resolve_symbol_value (csect);
6000 base = S_GET_VALUE (csect);
6001 }
6002 else
6003 base = 0;
6004
6005 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 6006 }
6007 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
6008 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
6009 {
6010 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 6011 BFD will do that for us if we set the right flags. We have
6012 already set the value correctly. */
809ffe0d 6013 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 6014 }
6015
6016 return 0;
6017}
6018
6019/* Adjust the symbol table. This creates csect symbols for all
6020 absolute symbols. */
6021
6022void
98027b10 6023ppc_adjust_symtab (void)
252b5132
RH		 6024{
6025 symbolS *sym;
6026
6027 if (! ppc_saw_abs)
6028 return;
6029
6030 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6031 {
6032 symbolS *csect;
6033 int i;
6034 union internal_auxent *a;
6035
6036 if (S_GET_SEGMENT (sym) != absolute_section)
6037 continue;
6038
6039 csect = symbol_create (".abs[XO]", absolute_section,
6040 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 6041 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 6042 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6043 i = S_GET_NUMBER_AUXILIARY (csect);
6044 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 6045 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 6046 a->x_csect.x_scnlen.l = 0;
6047 a->x_csect.x_smtyp = XTY_SD;
6048 a->x_csect.x_parmhash = 0;
6049 a->x_csect.x_snhash = 0;
6050 a->x_csect.x_smclas = XMC_XO;
6051 a->x_csect.x_stab = 0;
6052 a->x_csect.x_snstab = 0;
6053
6054 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6055
6056 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 6057 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6058 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6059 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 6060 }
6061
b34976b6 6062 ppc_saw_abs = FALSE;
252b5132
RH		 6063}
6064
6065/* Set the VMA for a section. This is called on all the sections in
6066 turn. */
6067
6068void
98027b10 6069ppc_frob_section (asection *sec)
252b5132 6070{
931e13a6 6071 static bfd_vma vma = 0;
252b5132 6072
85645aed
TG		 6073 /* Dwarf sections start at 0. */
6074 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6075 return;
6076
931e13a6 6077 vma = md_section_align (sec, vma);
252b5132
RH		 6078 bfd_set_section_vma (stdoutput, sec, vma);
6079 vma += bfd_section_size (stdoutput, sec);
6080}
6081
6082#endif /* OBJ_XCOFF */
6083\f
252b5132 6084char *
98027b10 6085md_atof (int type, char *litp, int *sizep)
252b5132 6086{
499ac353 6087 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 6088}
6089
6090/* Write a value out to the object file, using the appropriate
6091 endianness. */
6092
6093void
98027b10 6094md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 6095{
6096 if (target_big_endian)
6097 number_to_chars_bigendian (buf, val, n);
6098 else
6099 number_to_chars_littleendian (buf, val, n);
6100}
6101
6102/* Align a section (I don't know why this is machine dependent). */
6103
6104valueT
3aeeedbb 6105md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 6106{
3aeeedbb
AM		 6107#ifdef OBJ_ELF
6108 return addr;
6109#else
252b5132
RH		 6110 int align = bfd_get_section_alignment (stdoutput, seg);
6111
6112 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 6113#endif
252b5132
RH		 6114}
6115
6116/* We don't have any form of relaxing. */
6117
6118int
98027b10
AM		 6119md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6120 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 6121{
6122 abort ();
6123 return 0;
6124}
6125
6126/* Convert a machine dependent frag. We never generate these. */
6127
6128void
98027b10
AM		 6129md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6130 asection *sec ATTRIBUTE_UNUSED,
6131 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 6132{
6133 abort ();
6134}
6135
6136/* We have no need to default values of symbols. */
6137
252b5132 6138symbolS *
98027b10 6139md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 6140{
6141 return 0;
6142}
6143\f
6144/* Functions concerning relocs. */
6145
6146/* The location from which a PC relative jump should be calculated,
6147 given a PC relative reloc. */
6148
6149long
98027b10 6150md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 6151{
6152 return fixp->fx_frag->fr_address + fixp->fx_where;
6153}
6154
6155#ifdef OBJ_XCOFF
6156
6157/* This is called to see whether a fixup should be adjusted to use a
6158 section symbol. We take the opportunity to change a fixup against
6159 a symbol in the TOC subsegment into a reloc against the
6160 corresponding .tc symbol. */
6161
6162int
98027b10 6163ppc_fix_adjustable (fixS *fix)
252b5132 6164{
b782de16
AM		 6165 valueT val = resolve_symbol_value (fix->fx_addsy);
6166 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6167 TC_SYMFIELD_TYPE *tc;
6168
6169 if (symseg == absolute_section)
6170 return 0;
252b5132 6171
85645aed
TG		 6172 /* Always adjust symbols in debugging sections. */
6173 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6174 return 1;
6175
252b5132 6176 if (ppc_toc_csect != (symbolS *) NULL
252b5132 6177 && fix->fx_addsy != ppc_toc_csect
b782de16 6178 && symseg == data_section
252b5132
RH		 6179 && val >= ppc_toc_frag->fr_address
6180 && (ppc_after_toc_frag == (fragS *) NULL
6181 || val < ppc_after_toc_frag->fr_address))
6182 {
6183 symbolS *sy;
6184
6185 for (sy = symbol_next (ppc_toc_csect);
6186 sy != (symbolS *) NULL;
6187 sy = symbol_next (sy))
6188 {
b782de16
AM		 6189 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6190
96d56e9f 6191 if (sy_tc->symbol_class == XMC_TC0)
252b5132 6192 continue;
96d56e9f 6193 if (sy_tc->symbol_class != XMC_TC)
252b5132 6194 break;
b782de16 6195 if (val == resolve_symbol_value (sy))
252b5132
RH		 6196 {
6197 fix->fx_addsy = sy;
6198 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6199 return 0;
6200 }
6201 }
6202
6203 as_bad_where (fix->fx_file, fix->fx_line,
6204 _("symbol in .toc does not match any .tc"));
6205 }
6206
6207 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 6208 tc = symbol_get_tc (fix->fx_addsy);
6209 if (tc->subseg == 0
96d56e9f
NC		 6210 && tc->symbol_class != XMC_TC0
6211 && tc->symbol_class != XMC_TC
b782de16 6212 && symseg != bss_section
252b5132 6213 /* Don't adjust if this is a reloc in the toc section. */
b782de16 6214 && (symseg != data_section
252b5132
RH		 6215 || ppc_toc_csect == NULL
6216 || val < ppc_toc_frag->fr_address
6217 || (ppc_after_toc_frag != NULL
6218 && val >= ppc_after_toc_frag->fr_address)))
6219 {
2fb4b302 6220 symbolS *csect = tc->within;
252b5132 6221
2fb4b302
TG		 6222 /* If the symbol was not declared by a label (eg: a section symbol),
6223 use the section instead of the csect. This doesn't happen in
6224 normal AIX assembly code. */
6225 if (csect == NULL)
6226 csect = seg_info (symseg)->sym;
252b5132 6227
2fb4b302
TG		 6228 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6229 fix->fx_addsy = csect;
252b5132 6230
b782de16 6231 return 0;
252b5132
RH		 6232 }
6233
6234 /* Adjust a reloc against a .lcomm symbol to be against the base
6235 .lcomm. */
b782de16 6236 if (symseg == bss_section
252b5132
RH		 6237 && ! S_IS_EXTERNAL (fix->fx_addsy))
6238 {
b782de16
AM		 6239 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6240
6241 fix->fx_offset += val - resolve_symbol_value (sy);
6242 fix->fx_addsy = sy;
252b5132
RH		 6243 }
6244
6245 return 0;
6246}
6247
6248/* A reloc from one csect to another must be kept. The assembler
6249 will, of course, keep relocs between sections, and it will keep
6250 absolute relocs, but we need to force it to keep PC relative relocs
6251 between two csects in the same section. */
6252
6253int
98027b10 6254ppc_force_relocation (fixS *fix)
252b5132
RH		 6255{
6256 /* At this point fix->fx_addsy should already have been converted to
6257 a csect symbol. If the csect does not include the fragment, then
6258 we need to force the relocation. */
6259 if (fix->fx_pcrel
6260 && fix->fx_addsy != NULL
809ffe0d
ILT		 6261 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6262 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6263 > fix->fx_frag->fr_address)
6264 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6265 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 6266 <= fix->fx_frag->fr_address))))
6267 return 1;
6268
ae6063d4 6269 return generic_force_reloc (fix);
252b5132
RH		 6270}
6271
2fb4b302
TG		 6272void
6273ppc_new_dot_label (symbolS *sym)
6274{
6275 /* Anchor this label to the current csect for relocations. */
6276 symbol_get_tc (sym)->within = ppc_current_csect;
6277}
6278
252b5132
RH		 6279#endif /* OBJ_XCOFF */
6280
0baf16f2 6281#ifdef OBJ_ELF
a161fe53
AM		 6282/* If this function returns non-zero, it guarantees that a relocation
6283 will be emitted for a fixup. */
6284
6285int
98027b10 6286ppc_force_relocation (fixS *fix)
a161fe53
AM		 6287{
6288 /* Branch prediction relocations must force a relocation, as must
6289 the vtable description relocs. */
6290 switch (fix->fx_r_type)
6291 {
6292 case BFD_RELOC_PPC_B16_BRTAKEN:
6293 case BFD_RELOC_PPC_B16_BRNTAKEN:
6294 case BFD_RELOC_PPC_BA16_BRTAKEN:
6295 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 6296 case BFD_RELOC_24_PLT_PCREL:
a161fe53 6297 case BFD_RELOC_PPC64_TOC:
a161fe53 6298 return 1;
6911b7dc
AM		 6299 case BFD_RELOC_PPC_B26:
6300 case BFD_RELOC_PPC_BA26:
6301 case BFD_RELOC_PPC_B16:
6302 case BFD_RELOC_PPC_BA16:
6303 /* All branch fixups targeting a localentry symbol must
6304 force a relocation. */
6305 if (fix->fx_addsy)
6306 {
6307 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6308 elf_symbol_type *elfsym
6309 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6310 gas_assert (elfsym);
6311 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6312 return 1;
6313 }
6314 break;
a161fe53
AM		 6315 default:
6316 break;
6317 }
6318
cdba85ec
AM		 6319 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6320 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6321 return 1;
6322
ae6063d4 6323 return generic_force_reloc (fix);
a161fe53
AM		 6324}
6325
0baf16f2 6326int
98027b10 6327ppc_fix_adjustable (fixS *fix)
252b5132 6328{
6911b7dc
AM		 6329 switch (fix->fx_r_type)
6330 {
6331 /* All branch fixups targeting a localentry symbol must
6332 continue using the symbol. */
6333 case BFD_RELOC_PPC_B26:
6334 case BFD_RELOC_PPC_BA26:
6335 case BFD_RELOC_PPC_B16:
6336 case BFD_RELOC_PPC_BA16:
6337 case BFD_RELOC_PPC_B16_BRTAKEN:
6338 case BFD_RELOC_PPC_B16_BRNTAKEN:
6339 case BFD_RELOC_PPC_BA16_BRTAKEN:
6340 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6341 if (fix->fx_addsy)
6342 {
6343 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6344 elf_symbol_type *elfsym
6345 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6346 gas_assert (elfsym);
6347 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6348 return 0;
6349 }
6350 break;
6351 default:
6352 break;
6353 }
6354
0baf16f2
AM		 6355 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6356 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6357 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6358 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 6359 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6360 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 6361 && fix->fx_r_type != BFD_RELOC_GPREL16
6362 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6363 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 6364 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 6365 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 6366}
0baf16f2 6367#endif
252b5132 6368
b9c361e0
JL		 6369void
6370ppc_frag_check (struct frag *fragP)
6371{
6372 if (!fragP->has_code)
6373 return;
6374
6375 if (ppc_mach() == bfd_mach_ppc_vle)
6376 {
6377 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6378 as_bad (_("instruction address is not a multiple of 2"));
6379 }
6380 else
6381 {
6382 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6383 as_bad (_("instruction address is not a multiple of 4"));
6384 }
6385}
6386
3aeeedbb
AM		 6387/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6388 rs_align_code frag. */
6389
6390void
6391ppc_handle_align (struct frag *fragP)
6392{
6393 valueT count = (fragP->fr_next->fr_address
6394 - (fragP->fr_address + fragP->fr_fix));
6395
b9c361e0
JL		 6396 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6397 {
6398 char *dest = fragP->fr_literal + fragP->fr_fix;
6399
6400 fragP->fr_var = 2;
6401 md_number_to_chars (dest, 0x4400, 2);
6402 }
6403 else if (count != 0 && (count & 3) == 0)
3aeeedbb
AM		 6404 {
6405 char *dest = fragP->fr_literal + fragP->fr_fix;
6406
6407 fragP->fr_var = 4;
cef4f754
AM		 6408
6409 if (count > 4 * nop_limit && count < 0x2000000)
6410 {
6411 struct frag *rest;
6412
6413 /* Make a branch, then follow with nops. Insert another
6414 frag to handle the nops. */
6415 md_number_to_chars (dest, 0x48000000 + count, 4);
6416 count -= 4;
6417 if (count == 0)
6418 return;
6419
6420 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6421 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6422 fragP->fr_next = rest;
6423 fragP = rest;
6424 rest->fr_address += rest->fr_fix + 4;
6425 rest->fr_fix = 0;
6426 /* If we leave the next frag as rs_align_code we'll come here
6427 again, resulting in a bunch of branches rather than a
6428 branch followed by nops. */
6429 rest->fr_type = rs_align;
6430 dest = rest->fr_literal;
6431 }
6432
3aeeedbb
AM		 6433 md_number_to_chars (dest, 0x60000000, 4);
6434
42240548 6435 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5817ffd1
PB		 6436 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6437 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
3aeeedbb 6438 {
5817ffd1 6439 /* For power6, power7 and power8, we want the last nop to be a group
42240548
PB		 6440 terminating one. Do this by inserting an rs_fill frag immediately
6441 after this one, with its address set to the last nop location.
6442 This will automatically reduce the number of nops in the current
6443 frag by one. */
3aeeedbb
AM		 6444 if (count > 4)
6445 {
6446 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6447
6448 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6449 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6450 group_nop->fr_fix = 0;
6451 group_nop->fr_offset = 1;
6452 group_nop->fr_type = rs_fill;
6453 fragP->fr_next = group_nop;
6454 dest = group_nop->fr_literal;
6455 }
6456
5817ffd1
PB		 6457 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6458 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
aea77599
AM		 6459 {
6460 if (ppc_cpu & PPC_OPCODE_E500MC)
6461 /* e500mc group terminating nop: "ori 0,0,0". */
6462 md_number_to_chars (dest, 0x60000000, 4);
6463 else
5817ffd1 6464 /* power7/power8 group terminating nop: "ori 2,2,0". */
aea77599
AM		 6465 md_number_to_chars (dest, 0x60420000, 4);
6466 }
42240548
PB		 6467 else
6468 /* power6 group terminating nop: "ori 1,1,0". */
6469 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6470 }
6471 }
6472}
6473
252b5132 6474/* Apply a fixup to the object code. This is called for all the
3b8b57a9 6475 fixups we generated by the calls to fix_new_exp, above. */
252b5132 6476
94f592af 6477void
62ebcb5c 6478md_apply_fix (fixS *fixP, valueT *valP, segT seg)
252b5132 6479{
94f592af 6480 valueT value = * valP;
5656a981
AM		 6481 offsetT fieldval;
6482 const struct powerpc_operand *operand;
252b5132
RH		 6483
6484#ifdef OBJ_ELF
94f592af 6485 if (fixP->fx_addsy != NULL)
252b5132 6486 {
a161fe53 6487 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6488 if (fixP->fx_pcrel)
6489 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 6490 }
6491 else
94f592af 6492 fixP->fx_done = 1;
252b5132 6493#else
a161fe53 6494 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6495 the symbol values. If we are doing this relocation the code in
6496 write.c is going to call bfd_install_relocation, which is also
6497 going to use the symbol value. That means that if the reloc is
6498 fully resolved we want to use *valP since bfd_install_relocation is
6499 not being used.
9f0eb232
RS		 6500 However, if the reloc is not fully resolved we do not want to
6501 use *valP, and must use fx_offset instead. If the relocation
6502 is PC-relative, we then need to re-apply md_pcrel_from_section
6503 to this new relocation value. */
94f592af
NC		 6504 if (fixP->fx_addsy == (symbolS *) NULL)
6505 fixP->fx_done = 1;
6506
252b5132 6507 else
9f0eb232
RS		 6508 {
6509 value = fixP->fx_offset;
6510 if (fixP->fx_pcrel)
6511 value -= md_pcrel_from_section (fixP, seg);
6512 }
a161fe53
AM		 6513#endif
6514
6515 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6516 {
a161fe53
AM		 6517 /* We can't actually support subtracting a symbol. */
6518 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6519 }
252b5132 6520
5656a981 6521 operand = NULL;
3b8b57a9 6522 if (fixP->fx_pcrel_adjust != 0)
252b5132 6523 {
5656a981 6524 /* This is a fixup on an instruction. */
3b8b57a9 6525 int opindex = fixP->fx_pcrel_adjust & 0xff;
252b5132 6526
5656a981 6527 operand = &powerpc_operands[opindex];
252b5132 6528#ifdef OBJ_XCOFF
0baf16f2
AM		 6529 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6530 does not generate a reloc. It uses the offset of `sym' within its
6531 csect. Other usages, such as `.long sym', generate relocs. This
6532 is the documented behaviour of non-TOC symbols. */
252b5132 6533 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6534 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6535 && operand->shift == 0
2b3c4602 6536 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6537 && fixP->fx_addsy != NULL
6538 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6539 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6540 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6541 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6542 {
94f592af
NC		 6543 value = fixP->fx_offset;
6544 fixP->fx_done = 1;
252b5132 6545 }
ac21e7da
TG		 6546
6547 /* During parsing of instructions, a TOC16 reloc is generated for
6548 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6549 in the toc. But at parse time, SYM may be not yet defined, so
6550 check again here. */
6551 if (fixP->fx_r_type == BFD_RELOC_16
6552 && fixP->fx_addsy != NULL
6553 && ppc_is_toc_sym (fixP->fx_addsy))
6554 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
252b5132 6555#endif
5656a981
AM		 6556 }
6557
6558 /* Calculate value to be stored in field. */
6559 fieldval = value;
6560 switch (fixP->fx_r_type)
6561 {
1ec2d25e 6562#ifdef OBJ_ELF
5656a981
AM		 6563 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6564 case BFD_RELOC_PPC_VLE_LO16A:
6565 case BFD_RELOC_PPC_VLE_LO16D:
1ec2d25e 6566#endif
5656a981
AM		 6567 case BFD_RELOC_LO16:
6568 case BFD_RELOC_LO16_PCREL:
6569 fieldval = value & 0xffff;
6570 sign_extend_16:
6571 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
f9c6b907 6572 fieldval = SEX16 (fieldval);
5656a981
AM		 6573 fixP->fx_no_overflow = 1;
6574 break;
3c9d25f4 6575
f9c6b907
AM		 6576 case BFD_RELOC_HI16:
6577 case BFD_RELOC_HI16_PCREL:
5656a981 6578#ifdef OBJ_ELF
f9c6b907
AM		 6579 if (REPORT_OVERFLOW_HI && ppc_obj64)
6580 {
6581 fieldval = value >> 16;
6582 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6583 {
6584 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6585 fieldval = ((valueT) fieldval ^ sign) - sign;
6586 }
6587 break;
6588 }
6589 /* Fall thru */
6590
5656a981
AM		 6591 case BFD_RELOC_PPC_VLE_HI16A:
6592 case BFD_RELOC_PPC_VLE_HI16D:
f9c6b907 6593 case BFD_RELOC_PPC64_ADDR16_HIGH:
5656a981 6594#endif
5656a981
AM		 6595 fieldval = PPC_HI (value);
6596 goto sign_extend_16;
0baf16f2 6597
f9c6b907
AM		 6598 case BFD_RELOC_HI16_S:
6599 case BFD_RELOC_HI16_S_PCREL:
5656a981 6600#ifdef OBJ_ELF
f9c6b907
AM		 6601 if (REPORT_OVERFLOW_HI && ppc_obj64)
6602 {
6603 fieldval = (value + 0x8000) >> 16;
6604 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6605 {
6606 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6607 fieldval = ((valueT) fieldval ^ sign) - sign;
6608 }
6609 break;
6610 }
6611 /* Fall thru */
6612
5656a981
AM		 6613 case BFD_RELOC_PPC_VLE_HA16A:
6614 case BFD_RELOC_PPC_VLE_HA16D:
f9c6b907 6615 case BFD_RELOC_PPC64_ADDR16_HIGHA:
5656a981 6616#endif
5656a981
AM		 6617 fieldval = PPC_HA (value);
6618 goto sign_extend_16;
0baf16f2 6619
3b8b57a9 6620#ifdef OBJ_ELF
5656a981
AM		 6621 case BFD_RELOC_PPC64_HIGHER:
6622 fieldval = PPC_HIGHER (value);
6623 goto sign_extend_16;
252b5132 6624
5656a981
AM		 6625 case BFD_RELOC_PPC64_HIGHER_S:
6626 fieldval = PPC_HIGHERA (value);
6627 goto sign_extend_16;
0baf16f2 6628
5656a981
AM		 6629 case BFD_RELOC_PPC64_HIGHEST:
6630 fieldval = PPC_HIGHEST (value);
6631 goto sign_extend_16;
0baf16f2 6632
5656a981
AM		 6633 case BFD_RELOC_PPC64_HIGHEST_S:
6634 fieldval = PPC_HIGHESTA (value);
6635 goto sign_extend_16;
6636#endif
6637
6638 default:
6639 break;
6640 }
6641
6642 if (operand != NULL)
6643 {
6644 /* Handle relocs in an insn. */
6645 char *where;
6646 unsigned long insn;
0baf16f2 6647
5656a981
AM		 6648 switch (fixP->fx_r_type)
6649 {
7fa9fcb6 6650#ifdef OBJ_ELF
3b8b57a9
AM		 6651 /* The following relocs can't be calculated by the assembler.
6652 Leave the field zero. */
cdba85ec
AM		 6653 case BFD_RELOC_PPC_TPREL16:
6654 case BFD_RELOC_PPC_TPREL16_LO:
6655 case BFD_RELOC_PPC_TPREL16_HI:
6656 case BFD_RELOC_PPC_TPREL16_HA:
cdba85ec
AM		 6657 case BFD_RELOC_PPC_DTPREL16:
6658 case BFD_RELOC_PPC_DTPREL16_LO:
6659 case BFD_RELOC_PPC_DTPREL16_HI:
6660 case BFD_RELOC_PPC_DTPREL16_HA:
cdba85ec
AM		 6661 case BFD_RELOC_PPC_GOT_TLSGD16:
6662 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6663 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6664 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6665 case BFD_RELOC_PPC_GOT_TLSLD16:
6666 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6667 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6668 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6669 case BFD_RELOC_PPC_GOT_TPREL16:
6670 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6671 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6672 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6673 case BFD_RELOC_PPC_GOT_DTPREL16:
6674 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6675 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6676 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6677 case BFD_RELOC_PPC64_TPREL16_DS:
6678 case BFD_RELOC_PPC64_TPREL16_LO_DS:
f9c6b907
AM		 6679 case BFD_RELOC_PPC64_TPREL16_HIGH:
6680 case BFD_RELOC_PPC64_TPREL16_HIGHA:
cdba85ec
AM		 6681 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6682 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6683 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6684 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
f9c6b907
AM		 6685 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6686 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
cdba85ec
AM		 6687 case BFD_RELOC_PPC64_DTPREL16_DS:
6688 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6689 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6690 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6691 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6692 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
3b8b57a9 6693 gas_assert (fixP->fx_addsy != NULL);
7c1d0959 6694 S_SET_THREAD_LOCAL (fixP->fx_addsy);
3b8b57a9 6695 fieldval = 0;
cdba85ec 6696 break;
3b8b57a9
AM		 6697
6698 /* These also should leave the field zero for the same
6699 reason. Note that older versions of gas wrote values
6700 here. If we want to go back to the old behaviour, then
6701 all _LO and _LO_DS cases will need to be treated like
6702 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6703 case BFD_RELOC_16_GOTOFF:
6704 case BFD_RELOC_LO16_GOTOFF:
6705 case BFD_RELOC_HI16_GOTOFF:
6706 case BFD_RELOC_HI16_S_GOTOFF:
6707 case BFD_RELOC_LO16_PLTOFF:
6708 case BFD_RELOC_HI16_PLTOFF:
6709 case BFD_RELOC_HI16_S_PLTOFF:
6710 case BFD_RELOC_GPREL16:
6711 case BFD_RELOC_16_BASEREL:
6712 case BFD_RELOC_LO16_BASEREL:
6713 case BFD_RELOC_HI16_BASEREL:
6714 case BFD_RELOC_HI16_S_BASEREL:
6715 case BFD_RELOC_PPC_TOC16:
6716 case BFD_RELOC_PPC64_TOC16_LO:
6717 case BFD_RELOC_PPC64_TOC16_HI:
6718 case BFD_RELOC_PPC64_TOC16_HA:
6719 case BFD_RELOC_PPC64_PLTGOT16:
6720 case BFD_RELOC_PPC64_PLTGOT16_LO:
6721 case BFD_RELOC_PPC64_PLTGOT16_HI:
6722 case BFD_RELOC_PPC64_PLTGOT16_HA:
6723 case BFD_RELOC_PPC64_GOT16_DS:
6724 case BFD_RELOC_PPC64_GOT16_LO_DS:
6725 case BFD_RELOC_PPC64_PLT16_LO_DS:
6726 case BFD_RELOC_PPC64_SECTOFF_DS:
6727 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6728 case BFD_RELOC_PPC64_TOC16_DS:
6729 case BFD_RELOC_PPC64_TOC16_LO_DS:
6730 case BFD_RELOC_PPC64_PLTGOT16_DS:
6731 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6732 case BFD_RELOC_PPC_EMB_NADDR16:
6733 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6734 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6735 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6736 case BFD_RELOC_PPC_EMB_SDAI16:
6737 case BFD_RELOC_PPC_EMB_SDA2I16:
6738 case BFD_RELOC_PPC_EMB_SDA2REL:
252b5132 6739 case BFD_RELOC_PPC_EMB_SDA21:
3b8b57a9
AM		 6740 case BFD_RELOC_PPC_EMB_MRKREF:
6741 case BFD_RELOC_PPC_EMB_RELSEC16:
6742 case BFD_RELOC_PPC_EMB_RELST_LO:
6743 case BFD_RELOC_PPC_EMB_RELST_HI:
6744 case BFD_RELOC_PPC_EMB_RELST_HA:
6745 case BFD_RELOC_PPC_EMB_BIT_FLD:
6746 case BFD_RELOC_PPC_EMB_RELSDA:
6747 case BFD_RELOC_PPC_VLE_SDA21:
6748 case BFD_RELOC_PPC_VLE_SDA21_LO:
6749 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6750 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6751 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6752 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6753 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6754 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6755 gas_assert (fixP->fx_addsy != NULL);
6756 /* Fall thru */
6757
6758 case BFD_RELOC_PPC_TLS:
6759 case BFD_RELOC_PPC_TLSGD:
6760 case BFD_RELOC_PPC_TLSLD:
6761 fieldval = 0;
3b8b57a9 6762 break;
7fa9fcb6
TG		 6763#endif
6764
6765#ifdef OBJ_XCOFF
6766 case BFD_RELOC_PPC_B16:
6767 /* Adjust the offset to the instruction boundary. */
6768 fieldval += 2;
6769 break;
6770#endif
252b5132 6771
3b8b57a9 6772 default:
252b5132 6773 break;
3b8b57a9 6774 }
252b5132 6775
3b8b57a9
AM		 6776#ifdef OBJ_ELF
6777/* powerpc uses RELA style relocs, so if emitting a reloc the field
6778 contents can stay at zero. */
6779#define APPLY_RELOC fixP->fx_done
6780#else
6781#define APPLY_RELOC 1
6782#endif
6783 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6784 {
6785 /* Fetch the instruction, insert the fully resolved operand
6786 value, and stuff the instruction back again. */
6787 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6788 if (target_big_endian)
31a91399 6789 {
3b8b57a9
AM		 6790 if (fixP->fx_size == 4)
6791 insn = bfd_getb32 ((unsigned char *) where);
31a91399 6792 else
3b8b57a9 6793 insn = bfd_getb16 ((unsigned char *) where);
31a91399
NC		 6794 }
6795 else
3b8b57a9
AM		 6796 {
6797 if (fixP->fx_size == 4)
6798 insn = bfd_getl32 ((unsigned char *) where);
6799 else
6800 insn = bfd_getl16 ((unsigned char *) where);
6801 }
6802 insn = ppc_insert_operand (insn, operand, fieldval,
6803 fixP->tc_fix_data.ppc_cpu,
6804 fixP->fx_file, fixP->fx_line);
6805 if (target_big_endian)
6806 {
6807 if (fixP->fx_size == 4)
6808 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6809 else
6810 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6811 }
6812 else
6813 {
6814 if (fixP->fx_size == 4)
6815 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6816 else
6817 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6818 }
6819 }
6820
6821 if (fixP->fx_done)
6822 /* Nothing else to do here. */
6823 return;
6824
6825 gas_assert (fixP->fx_addsy != NULL);
62ebcb5c 6826 if (fixP->fx_r_type == BFD_RELOC_NONE)
3b8b57a9
AM		 6827 {
6828 char *sfile;
6829 unsigned int sline;
6830
6831 /* Use expr_symbol_where to see if this is an expression
6832 symbol. */
6833 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6834 as_bad_where (fixP->fx_file, fixP->fx_line,
6835 _("unresolved expression that must be resolved"));
6836 else
6837 as_bad_where (fixP->fx_file, fixP->fx_line,
6838 _("unsupported relocation against %s"),
6839 S_GET_NAME (fixP->fx_addsy));
6840 fixP->fx_done = 1;
6841 return;
6842 }
6843 }
6844 else
6845 {
6846 /* Handle relocs in data. */
6847 switch (fixP->fx_r_type)
6848 {
252b5132 6849 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6850 if (fixP->fx_addsy
6851 && !S_IS_DEFINED (fixP->fx_addsy)
6852 && !S_IS_WEAK (fixP->fx_addsy))
6853 S_SET_WEAK (fixP->fx_addsy);
3b8b57a9 6854 /* Fall thru */
252b5132
RH		 6855
6856 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6857 fixP->fx_done = 0;
252b5132
RH		 6858 break;
6859
0baf16f2 6860#ifdef OBJ_ELF
3b8b57a9
AM		 6861 /* These can appear with @l etc. in data. */
6862 case BFD_RELOC_LO16:
3b8b57a9 6863 case BFD_RELOC_LO16_PCREL:
3b8b57a9 6864 case BFD_RELOC_HI16:
3b8b57a9 6865 case BFD_RELOC_HI16_PCREL:
3b8b57a9 6866 case BFD_RELOC_HI16_S:
3b8b57a9 6867 case BFD_RELOC_HI16_S_PCREL:
3b8b57a9 6868 case BFD_RELOC_PPC64_HIGHER:
3b8b57a9 6869 case BFD_RELOC_PPC64_HIGHER_S:
3b8b57a9 6870 case BFD_RELOC_PPC64_HIGHEST:
3b8b57a9 6871 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 6872 case BFD_RELOC_PPC64_ADDR16_HIGH:
6873 case BFD_RELOC_PPC64_ADDR16_HIGHA:
45965137 6874 case BFD_RELOC_PPC64_ADDR64_LOCAL:
3b8b57a9
AM		 6875 break;
6876
6877 case BFD_RELOC_PPC_DTPMOD:
6878 case BFD_RELOC_PPC_TPREL:
6879 case BFD_RELOC_PPC_DTPREL:
6880 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6881 break;
6882
6883 /* Just punt all of these to the linker. */
6884 case BFD_RELOC_PPC_B16_BRTAKEN:
6885 case BFD_RELOC_PPC_B16_BRNTAKEN:
6886 case BFD_RELOC_16_GOTOFF:
6887 case BFD_RELOC_LO16_GOTOFF:
6888 case BFD_RELOC_HI16_GOTOFF:
6889 case BFD_RELOC_HI16_S_GOTOFF:
6890 case BFD_RELOC_LO16_PLTOFF:
6891 case BFD_RELOC_HI16_PLTOFF:
6892 case BFD_RELOC_HI16_S_PLTOFF:
6893 case BFD_RELOC_PPC_COPY:
6894 case BFD_RELOC_PPC_GLOB_DAT:
6895 case BFD_RELOC_16_BASEREL:
6896 case BFD_RELOC_LO16_BASEREL:
6897 case BFD_RELOC_HI16_BASEREL:
6898 case BFD_RELOC_HI16_S_BASEREL:
6899 case BFD_RELOC_PPC_TLS:
6900 case BFD_RELOC_PPC_DTPREL16_LO:
6901 case BFD_RELOC_PPC_DTPREL16_HI:
6902 case BFD_RELOC_PPC_DTPREL16_HA:
6903 case BFD_RELOC_PPC_TPREL16_LO:
6904 case BFD_RELOC_PPC_TPREL16_HI:
6905 case BFD_RELOC_PPC_TPREL16_HA:
6906 case BFD_RELOC_PPC_GOT_TLSGD16:
6907 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6908 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6909 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6910 case BFD_RELOC_PPC_GOT_TLSLD16:
6911 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6912 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6913 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6914 case BFD_RELOC_PPC_GOT_DTPREL16:
6915 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6916 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6917 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6918 case BFD_RELOC_PPC_GOT_TPREL16:
6919 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6920 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6921 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6922 case BFD_RELOC_24_PLT_PCREL:
6923 case BFD_RELOC_PPC_LOCAL24PC:
6924 case BFD_RELOC_32_PLT_PCREL:
6925 case BFD_RELOC_GPREL16:
6926 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6927 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6928 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6929 case BFD_RELOC_PPC_EMB_NADDR32:
6930 case BFD_RELOC_PPC_EMB_NADDR16:
6931 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6932 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6933 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6934 case BFD_RELOC_PPC_EMB_SDAI16:
6935 case BFD_RELOC_PPC_EMB_SDA2REL:
6936 case BFD_RELOC_PPC_EMB_SDA2I16:
6937 case BFD_RELOC_PPC_EMB_SDA21:
6938 case BFD_RELOC_PPC_VLE_SDA21_LO:
6939 case BFD_RELOC_PPC_EMB_MRKREF:
6940 case BFD_RELOC_PPC_EMB_RELSEC16:
6941 case BFD_RELOC_PPC_EMB_RELST_LO:
6942 case BFD_RELOC_PPC_EMB_RELST_HI:
6943 case BFD_RELOC_PPC_EMB_RELST_HA:
6944 case BFD_RELOC_PPC_EMB_BIT_FLD:
6945 case BFD_RELOC_PPC_EMB_RELSDA:
0baf16f2 6946 case BFD_RELOC_PPC64_TOC:
3b8b57a9
AM		 6947 case BFD_RELOC_PPC_TOC16:
6948 case BFD_RELOC_PPC64_TOC16_LO:
6949 case BFD_RELOC_PPC64_TOC16_HI:
6950 case BFD_RELOC_PPC64_TOC16_HA:
f9c6b907
AM		 6951 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6952 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
3b8b57a9
AM		 6953 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6954 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6955 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6956 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
f9c6b907
AM		 6957 case BFD_RELOC_PPC64_TPREL16_HIGH:
6958 case BFD_RELOC_PPC64_TPREL16_HIGHA:
3b8b57a9
AM		 6959 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6960 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6961 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6962 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
94f592af 6963 fixP->fx_done = 0;
0baf16f2 6964 break;
0baf16f2 6965#endif
3b8b57a9
AM		 6966
6967#ifdef OBJ_XCOFF
6968 case BFD_RELOC_NONE:
3b8b57a9 6969#endif
5656a981
AM		 6970 case BFD_RELOC_CTOR:
6971 case BFD_RELOC_32:
6972 case BFD_RELOC_32_PCREL:
6973 case BFD_RELOC_RVA:
6974 case BFD_RELOC_64:
6975 case BFD_RELOC_64_PCREL:
6976 case BFD_RELOC_16:
6977 case BFD_RELOC_16_PCREL:
6978 case BFD_RELOC_8:
6979 break;
3b8b57a9 6980
252b5132 6981 default:
bc805888 6982 fprintf (stderr,
94f592af 6983 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6984 fflush (stderr);
252b5132
RH		 6985 abort ();
6986 }
46b596ff 6987
5656a981 6988 if (fixP->fx_size && APPLY_RELOC)
46b596ff 6989 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5656a981 6990 fieldval, fixP->fx_size);
bf7279d5
AM		 6991 if (warn_476
6992 && (seg->flags & SEC_CODE) != 0
6993 && fixP->fx_size == 4
6994 && fixP->fx_done
6995 && !fixP->fx_tcbit
6996 && (fixP->fx_r_type == BFD_RELOC_32
6997 || fixP->fx_r_type == BFD_RELOC_CTOR
6998 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
6999 as_warn_where (fixP->fx_file, fixP->fx_line,
7000 _("data in executable section"));
5656a981
AM		 7001 }
7002
7003 /* We are only able to convert some relocs to pc-relative. */
7004 if (!fixP->fx_done && fixP->fx_pcrel)
7005 {
7006 switch (fixP->fx_r_type)
7007 {
7008 case BFD_RELOC_LO16:
7009 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
7010 break;
7011
7012 case BFD_RELOC_HI16:
7013 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
7014 break;
7015
7016 case BFD_RELOC_HI16_S:
7017 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
7018 break;
7019
7020 case BFD_RELOC_64:
7021 fixP->fx_r_type = BFD_RELOC_64_PCREL;
7022 break;
7023
7024 case BFD_RELOC_32:
7025 fixP->fx_r_type = BFD_RELOC_32_PCREL;
7026 break;
7027
7028 case BFD_RELOC_16:
7029 fixP->fx_r_type = BFD_RELOC_16_PCREL;
7030 break;
7031
7032 /* Some of course are already pc-relative. */
7033 case BFD_RELOC_LO16_PCREL:
7034 case BFD_RELOC_HI16_PCREL:
7035 case BFD_RELOC_HI16_S_PCREL:
7036 case BFD_RELOC_64_PCREL:
7037 case BFD_RELOC_32_PCREL:
7038 case BFD_RELOC_16_PCREL:
7039 case BFD_RELOC_PPC_B16:
7040 case BFD_RELOC_PPC_B16_BRTAKEN:
7041 case BFD_RELOC_PPC_B16_BRNTAKEN:
7042 case BFD_RELOC_PPC_B26:
7043 case BFD_RELOC_PPC_LOCAL24PC:
7044 case BFD_RELOC_24_PLT_PCREL:
7045 case BFD_RELOC_32_PLT_PCREL:
7046 case BFD_RELOC_64_PLT_PCREL:
7047 case BFD_RELOC_PPC_VLE_REL8:
7048 case BFD_RELOC_PPC_VLE_REL15:
7049 case BFD_RELOC_PPC_VLE_REL24:
7050 break;
7051
7052 default:
7053 if (fixP->fx_addsy)
7054 {
7055 char *sfile;
7056 unsigned int sline;
7057
7058 /* Use expr_symbol_where to see if this is an
7059 expression symbol. */
7060 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7061 as_bad_where (fixP->fx_file, fixP->fx_line,
7062 _("unresolved expression that must"
7063 " be resolved"));
7064 else
7065 as_bad_where (fixP->fx_file, fixP->fx_line,
7066 _("cannot emit PC relative %s relocation"
7067 " against %s"),
7068 bfd_get_reloc_code_name (fixP->fx_r_type),
7069 S_GET_NAME (fixP->fx_addsy));
7070 }
7071 else
7072 as_bad_where (fixP->fx_file, fixP->fx_line,
7073 _("unable to resolve expression"));
7074 fixP->fx_done = 1;
7075 break;
7076 }
252b5132
RH		 7077 }
7078
7079#ifdef OBJ_ELF
3b8b57a9 7080 ppc_elf_validate_fix (fixP, seg);
94f592af 7081 fixP->fx_addnumber = value;
4e6935a6
AM		 7082
7083 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7084 from the section contents. If we are going to be emitting a reloc
7085 then the section contents are immaterial, so don't warn if they
7086 happen to overflow. Leave such warnings to ld. */
7087 if (!fixP->fx_done)
a38a07e0
AM		 7088 {
7089 fixP->fx_no_overflow = 1;
7090
7091 /* Arrange to emit .TOC. as a normal symbol if used in anything
7092 but .TOC.@tocbase. */
7093 if (ppc_obj64
7094 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7095 && fixP->fx_addsy != NULL
7096 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7097 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7098 }
252b5132 7099#else
94f592af
NC		 7100 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7101 fixP->fx_addnumber = 0;
252b5132
RH		 7102 else
7103 {
7104#ifdef TE_PE
94f592af 7105 fixP->fx_addnumber = 0;
252b5132 7106#else
8edcbfcd
TG		 7107 /* We want to use the offset within the toc, not the actual VMA
7108 of the symbol. */
94f592af 7109 fixP->fx_addnumber =
8edcbfcd
TG		 7110 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7111 - S_GET_VALUE (ppc_toc_csect);
ac21e7da
TG		 7112 /* Set *valP to avoid errors. */
7113 *valP = value;
252b5132
RH		 7114#endif
7115 }
7116#endif
252b5132
RH		 7117}
7118
7119/* Generate a reloc for a fixup. */
7120
7121arelent *
98027b10 7122tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 7123{
7124 arelent *reloc;
7125
7126 reloc = (arelent *) xmalloc (sizeof (arelent));
7127
49309057
ILT		 7128 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
7129 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 7130 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7131 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7132 if (reloc->howto == (reloc_howto_type *) NULL)
7133 {
7134 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 7135 _("reloc %d not supported by object file format"),
7136 (int) fixp->fx_r_type);
252b5132
RH		 7137 return NULL;
7138 }
7139 reloc->addend = fixp->fx_addnumber;
7140
7141 return reloc;
7142}
75e21f08
JJ		 7143
7144void
98027b10 7145ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 7146{
7147 cfi_add_CFA_def_cfa (1, 0);
7148}
7149
7150int
1df69f4f 7151tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 7152{
7153 unsigned int regnum = -1;
7154 unsigned int i;
7155 const char *p;
7156 char *q;
7157 static struct { char *name; int dw2regnum; } regnames[] =
7158 {
7159 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7160 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 7161 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 7162 { "spe_acc", 111 }, { "spefscr", 112 }
7163 };
7164
7165 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7166 if (strcmp (regnames[i].name, regname) == 0)
7167 return regnames[i].dw2regnum;
7168
7169 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7170 {
7171 p = regname + 1 + (regname[1] == '.');
7172 regnum = strtoul (p, &q, 10);
7173 if (p == q || *q || regnum >= 32)
7174 return -1;
7175 if (regname[0] == 'f')
b7d7dc63 7176 regnum += 32;
75e21f08 7177 else if (regname[0] == 'v')
b7d7dc63 7178 regnum += 77;
75e21f08
JJ		 7179 }
7180 else if (regname[0] == 'c' && regname[1] == 'r')
7181 {
7182 p = regname + 2 + (regname[2] == '.');
7183 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 7184 return -1;
75e21f08
JJ		 7185 regnum = p[0] - '0' + 68;
7186 }
7187 return regnum;
7188}
GDB Binutils - Deliverables
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