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* gdbtypes.c (append_composite_type_field): Correct the location of
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
783de163 3 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
783de163
AM		 181
182/* The type of processor we are assembling for. This is one or more
183 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 184ppc_cpu_t ppc_cpu = 0;
252b5132
RH		 185\f
186/* The target specific pseudo-ops which we support. */
187
188const pseudo_typeS md_pseudo_table[] =
189{
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193#ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 221 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225#endif
226
227#ifdef OBJ_ELF
0baf16f2
AM		 228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
236#endif
237
238#ifdef TE_PE
99a814a1 239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 240 { "previous", ppc_previous, 0 },
241 { "pdata", ppc_pdata, 0 },
242 { "ydata", ppc_ydata, 0 },
243 { "reldata", ppc_reldata, 0 },
244 { "rdata", ppc_rdata, 0 },
245 { "ualong", ppc_ualong, 0 },
246 { "znop", ppc_znop, 0 },
247 { "comm", ppc_pe_comm, 0 },
248 { "lcomm", ppc_pe_comm, 1 },
249 { "section", ppc_pe_section, 0 },
250 { "function", ppc_pe_function,0 },
251 { "tocd", ppc_pe_tocd, 0 },
252#endif
253
0baf16f2 254#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 255 { "tc", ppc_tc, 0 },
0baf16f2
AM		 256 { "machine", ppc_machine, 0 },
257#endif
252b5132
RH		 258
259 { NULL, NULL, 0 }
260};
261
262\f
99a814a1
AM		 263/* Predefined register names if -mregnames (or default for Windows NT).
264 In general, there are lots of them, in an attempt to be compatible
265 with a number of other Windows NT assemblers. */
252b5132
RH		 266
267/* Structure to hold information about predefined registers. */
268struct pd_reg
269 {
270 char *name;
271 int value;
272 };
273
274/* List of registers that are pre-defined:
275
276 Each general register has predefined names of the form:
277 1. r<reg_num> which has the value <reg_num>.
278 2. r.<reg_num> which has the value <reg_num>.
279
252b5132
RH		 280 Each floating point register has predefined names of the form:
281 1. f<reg_num> which has the value <reg_num>.
282 2. f.<reg_num> which has the value <reg_num>.
283
7a899fff
C		 284 Each vector unit register has predefined names of the form:
285 1. v<reg_num> which has the value <reg_num>.
286 2. v.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each condition register has predefined names of the form:
289 1. cr<reg_num> which has the value <reg_num>.
290 2. cr.<reg_num> which has the value <reg_num>.
291
292 There are individual registers as well:
293 sp or r.sp has the value 1
294 rtoc or r.toc has the value 2
295 fpscr has the value 0
296 xer has the value 1
297 lr has the value 8
298 ctr has the value 9
299 pmr has the value 0
300 dar has the value 19
301 dsisr has the value 18
302 dec has the value 22
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
306
81d4177b 307 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 308
309static const struct pd_reg pre_defined_registers[] =
310{
311 { "cr.0", 0 }, /* Condition Registers */
312 { "cr.1", 1 },
313 { "cr.2", 2 },
314 { "cr.3", 3 },
315 { "cr.4", 4 },
316 { "cr.5", 5 },
317 { "cr.6", 6 },
318 { "cr.7", 7 },
319
320 { "cr0", 0 },
321 { "cr1", 1 },
322 { "cr2", 2 },
323 { "cr3", 3 },
324 { "cr4", 4 },
325 { "cr5", 5 },
326 { "cr6", 6 },
327 { "cr7", 7 },
328
329 { "ctr", 9 },
330
331 { "dar", 19 }, /* Data Access Register */
332 { "dec", 22 }, /* Decrementer */
333 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
334
335 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 336 { "f.1", 1 },
337 { "f.10", 10 },
338 { "f.11", 11 },
339 { "f.12", 12 },
340 { "f.13", 13 },
341 { "f.14", 14 },
342 { "f.15", 15 },
343 { "f.16", 16 },
344 { "f.17", 17 },
345 { "f.18", 18 },
346 { "f.19", 19 },
347 { "f.2", 2 },
348 { "f.20", 20 },
349 { "f.21", 21 },
350 { "f.22", 22 },
351 { "f.23", 23 },
352 { "f.24", 24 },
353 { "f.25", 25 },
354 { "f.26", 26 },
355 { "f.27", 27 },
356 { "f.28", 28 },
357 { "f.29", 29 },
358 { "f.3", 3 },
252b5132
RH		 359 { "f.30", 30 },
360 { "f.31", 31 },
81d4177b
KH		 361 { "f.4", 4 },
362 { "f.5", 5 },
363 { "f.6", 6 },
364 { "f.7", 7 },
365 { "f.8", 8 },
366 { "f.9", 9 },
367
368 { "f0", 0 },
369 { "f1", 1 },
370 { "f10", 10 },
371 { "f11", 11 },
372 { "f12", 12 },
373 { "f13", 13 },
374 { "f14", 14 },
375 { "f15", 15 },
376 { "f16", 16 },
377 { "f17", 17 },
378 { "f18", 18 },
379 { "f19", 19 },
380 { "f2", 2 },
381 { "f20", 20 },
382 { "f21", 21 },
383 { "f22", 22 },
384 { "f23", 23 },
385 { "f24", 24 },
386 { "f25", 25 },
387 { "f26", 26 },
388 { "f27", 27 },
389 { "f28", 28 },
390 { "f29", 29 },
391 { "f3", 3 },
252b5132
RH		 392 { "f30", 30 },
393 { "f31", 31 },
81d4177b
KH		 394 { "f4", 4 },
395 { "f5", 5 },
396 { "f6", 6 },
397 { "f7", 7 },
398 { "f8", 8 },
399 { "f9", 9 },
252b5132
RH		 400
401 { "fpscr", 0 },
402
c3d65c1c
BE		 403 /* Quantization registers used with pair single instructions. */
404 { "gqr.0", 0 },
405 { "gqr.1", 1 },
406 { "gqr.2", 2 },
407 { "gqr.3", 3 },
408 { "gqr.4", 4 },
409 { "gqr.5", 5 },
410 { "gqr.6", 6 },
411 { "gqr.7", 7 },
412 { "gqr0", 0 },
413 { "gqr1", 1 },
414 { "gqr2", 2 },
415 { "gqr3", 3 },
416 { "gqr4", 4 },
417 { "gqr5", 5 },
418 { "gqr6", 6 },
419 { "gqr7", 7 },
420
252b5132
RH		 421 { "lr", 8 }, /* Link Register */
422
423 { "pmr", 0 },
424
425 { "r.0", 0 }, /* General Purpose Registers */
426 { "r.1", 1 },
427 { "r.10", 10 },
428 { "r.11", 11 },
429 { "r.12", 12 },
430 { "r.13", 13 },
431 { "r.14", 14 },
432 { "r.15", 15 },
433 { "r.16", 16 },
434 { "r.17", 17 },
435 { "r.18", 18 },
436 { "r.19", 19 },
437 { "r.2", 2 },
438 { "r.20", 20 },
439 { "r.21", 21 },
440 { "r.22", 22 },
441 { "r.23", 23 },
442 { "r.24", 24 },
443 { "r.25", 25 },
444 { "r.26", 26 },
445 { "r.27", 27 },
446 { "r.28", 28 },
447 { "r.29", 29 },
448 { "r.3", 3 },
449 { "r.30", 30 },
450 { "r.31", 31 },
451 { "r.4", 4 },
452 { "r.5", 5 },
453 { "r.6", 6 },
454 { "r.7", 7 },
455 { "r.8", 8 },
456 { "r.9", 9 },
457
458 { "r.sp", 1 }, /* Stack Pointer */
459
460 { "r.toc", 2 }, /* Pointer to the table of contents */
461
462 { "r0", 0 }, /* More general purpose registers */
463 { "r1", 1 },
464 { "r10", 10 },
465 { "r11", 11 },
466 { "r12", 12 },
467 { "r13", 13 },
468 { "r14", 14 },
469 { "r15", 15 },
470 { "r16", 16 },
471 { "r17", 17 },
472 { "r18", 18 },
473 { "r19", 19 },
474 { "r2", 2 },
475 { "r20", 20 },
476 { "r21", 21 },
477 { "r22", 22 },
478 { "r23", 23 },
479 { "r24", 24 },
480 { "r25", 25 },
481 { "r26", 26 },
482 { "r27", 27 },
483 { "r28", 28 },
484 { "r29", 29 },
485 { "r3", 3 },
486 { "r30", 30 },
487 { "r31", 31 },
488 { "r4", 4 },
489 { "r5", 5 },
490 { "r6", 6 },
491 { "r7", 7 },
492 { "r8", 8 },
493 { "r9", 9 },
494
495 { "rtoc", 2 }, /* Table of contents */
496
497 { "sdr1", 25 }, /* Storage Description Register 1 */
498
499 { "sp", 1 },
500
501 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
502 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 503
7a899fff 504 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 505 { "v.1", 1 },
506 { "v.10", 10 },
507 { "v.11", 11 },
508 { "v.12", 12 },
509 { "v.13", 13 },
510 { "v.14", 14 },
511 { "v.15", 15 },
512 { "v.16", 16 },
513 { "v.17", 17 },
514 { "v.18", 18 },
515 { "v.19", 19 },
516 { "v.2", 2 },
517 { "v.20", 20 },
518 { "v.21", 21 },
519 { "v.22", 22 },
520 { "v.23", 23 },
521 { "v.24", 24 },
522 { "v.25", 25 },
523 { "v.26", 26 },
524 { "v.27", 27 },
525 { "v.28", 28 },
526 { "v.29", 29 },
527 { "v.3", 3 },
7a899fff
C		 528 { "v.30", 30 },
529 { "v.31", 31 },
81d4177b
KH		 530 { "v.4", 4 },
531 { "v.5", 5 },
532 { "v.6", 6 },
533 { "v.7", 7 },
534 { "v.8", 8 },
535 { "v.9", 9 },
7a899fff
C		 536
537 { "v0", 0 },
81d4177b
KH		 538 { "v1", 1 },
539 { "v10", 10 },
540 { "v11", 11 },
541 { "v12", 12 },
542 { "v13", 13 },
543 { "v14", 14 },
544 { "v15", 15 },
545 { "v16", 16 },
546 { "v17", 17 },
547 { "v18", 18 },
548 { "v19", 19 },
549 { "v2", 2 },
550 { "v20", 20 },
551 { "v21", 21 },
552 { "v22", 22 },
553 { "v23", 23 },
554 { "v24", 24 },
555 { "v25", 25 },
556 { "v26", 26 },
557 { "v27", 27 },
558 { "v28", 28 },
559 { "v29", 29 },
560 { "v3", 3 },
7a899fff
C		 561 { "v30", 30 },
562 { "v31", 31 },
81d4177b
KH		 563 { "v4", 4 },
564 { "v5", 5 },
565 { "v6", 6 },
566 { "v7", 7 },
567 { "v8", 8 },
7a899fff 568 { "v9", 9 },
252b5132
RH		 569
570 { "xer", 1 },
571
572};
573
bc805888 574#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 575
576/* Given NAME, find the register number associated with that name, return
577 the integer value associated with the given name or -1 on failure. */
578
252b5132 579static int
98027b10 580reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 581{
582 int middle, low, high;
583 int cmp;
584
585 low = 0;
586 high = regcount - 1;
587
588 do
589 {
590 middle = (low + high) / 2;
591 cmp = strcasecmp (name, regs[middle].name);
592 if (cmp < 0)
593 high = middle - 1;
594 else if (cmp > 0)
595 low = middle + 1;
596 else
597 return regs[middle].value;
598 }
599 while (low <= high);
600
601 return -1;
602}
603
604/*
99a814a1 605 * Summary of register_name.
252b5132
RH		 606 *
607 * in: Input_line_pointer points to 1st char of operand.
608 *
609 * out: A expressionS.
610 * The operand may have been a register: in this case, X_op == O_register,
611 * X_add_number is set to the register number, and truth is returned.
612 * Input_line_pointer->(next non-blank) char after operand, or is in its
613 * original state.
614 */
615
b34976b6 616static bfd_boolean
98027b10 617register_name (expressionS *expressionP)
252b5132
RH		 618{
619 int reg_number;
620 char *name;
621 char *start;
622 char c;
623
99a814a1 624 /* Find the spelling of the operand. */
252b5132 625 start = name = input_line_pointer;
3882b010 626 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 627 name = ++input_line_pointer;
628
3882b010 629 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 630 return FALSE;
252b5132
RH		 631
632 c = get_symbol_end ();
633 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
634
468cced8
AM		 635 /* Put back the delimiting char. */
636 *input_line_pointer = c;
637
99a814a1 638 /* Look to see if it's in the register table. */
81d4177b 639 if (reg_number >= 0)
252b5132
RH		 640 {
641 expressionP->X_op = O_register;
642 expressionP->X_add_number = reg_number;
81d4177b 643
99a814a1 644 /* Make the rest nice. */
252b5132
RH		 645 expressionP->X_add_symbol = NULL;
646 expressionP->X_op_symbol = NULL;
b34976b6 647 return TRUE;
252b5132 648 }
468cced8
AM		 649
650 /* Reset the line as if we had not done anything. */
651 input_line_pointer = start;
b34976b6 652 return FALSE;
252b5132
RH		 653}
654\f
655/* This function is called for each symbol seen in an expression. It
656 handles the special parsing which PowerPC assemblers are supposed
657 to use for condition codes. */
658
659/* Whether to do the special parsing. */
b34976b6 660static bfd_boolean cr_operand;
252b5132
RH		 661
662/* Names to recognize in a condition code. This table is sorted. */
663static const struct pd_reg cr_names[] =
664{
665 { "cr0", 0 },
666 { "cr1", 1 },
667 { "cr2", 2 },
668 { "cr3", 3 },
669 { "cr4", 4 },
670 { "cr5", 5 },
671 { "cr6", 6 },
672 { "cr7", 7 },
673 { "eq", 2 },
674 { "gt", 1 },
675 { "lt", 0 },
676 { "so", 3 },
677 { "un", 3 }
678};
679
680/* Parsing function. This returns non-zero if it recognized an
681 expression. */
682
683int
98027b10 684ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH		 685{
686 int val;
687
688 if (! cr_operand)
689 return 0;
690
13abbae3
AM		 691 if (*name == '%')
692 ++name;
252b5132
RH		 693 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
694 name);
695 if (val < 0)
696 return 0;
697
698 expr->X_op = O_constant;
699 expr->X_add_number = val;
700
701 return 1;
702}
703\f
704/* Local variables. */
705
2b3c4602
AM		 706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH		 709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH		 720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH		 727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM		 804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ		 806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH		 818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM		 822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
9b4e5766
PB		 828 ppc_cpu_t retain_flags =
829 ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX | PPC_OPCODE_SPE);
b0e34bfe 830
69c040df
AM		 831 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
832 (RIOS2). */
833 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
834 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
835 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
836 else if (strcmp (arg, "pwr") == 0)
837 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
838 /* -m601 means to assemble for the PowerPC 601, which includes
839 instructions that are holdovers from the Power. */
840 else if (strcmp (arg, "601") == 0)
841 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
842 | PPC_OPCODE_601 | PPC_OPCODE_32);
843 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
844 PowerPC 603/604. */
845 else if (strcmp (arg, "ppc") == 0
846 || strcmp (arg, "ppc32") == 0
847 || strcmp (arg, "603") == 0
848 || strcmp (arg, "604") == 0)
849 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
c3d65c1c
BE		 850 /* Do all PPC750s have paired single ops? */
851 else if (strcmp (arg, "750cl") == 0)
852 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
081ba1b3 853 else if (strcmp (arg, "403") == 0)
69c040df
AM		 854 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
855 | PPC_OPCODE_403 | PPC_OPCODE_32);
081ba1b3
AM		 856 else if (strcmp (arg, "405") == 0)
857 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
858 | PPC_OPCODE_403 | PPC_OPCODE_405 | PPC_OPCODE_32);
c8187e15
PB		 859 else if (strcmp (arg, "440") == 0
860 || strcmp (arg, "464") == 0)
69c040df
AM		 861 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
862 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
863 else if (strcmp (arg, "7400") == 0
864 || strcmp (arg, "7410") == 0
865 || strcmp (arg, "7450") == 0
866 || strcmp (arg, "7455") == 0)
867 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
868 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 869 else if (strcmp (arg, "e300") == 0)
870 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
871 | PPC_OPCODE_E300);
69c040df
AM		 872 else if (strcmp (arg, "altivec") == 0)
873 {
874 if (ppc_cpu == 0)
b0e34bfe
NC		 875 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
876
9b4e5766
PB		 877 retain_flags |= PPC_OPCODE_ALTIVEC;
878 }
879 else if (strcmp (arg, "vsx") == 0)
880 {
881 if (ppc_cpu == 0)
882 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
883
884 retain_flags |= PPC_OPCODE_VSX;
69c040df
AM		 885 }
886 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
887 {
888 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
889 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
890 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
19a6653c
AM		 891 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
892 }
893 else if (strcmp (arg, "e500mc") == 0)
894 {
895 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
896 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
897 | PPC_OPCODE_RFMCI | PPC_OPCODE_E500MC);
69c040df
AM		 898 }
899 else if (strcmp (arg, "spe") == 0)
900 {
901 if (ppc_cpu == 0)
b0e34bfe
NC		 902 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_EFS;
903
9b4e5766 904 retain_flags |= PPC_OPCODE_SPE;
69c040df
AM		 905 }
906 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
907 620. */
908 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
909 {
910 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
911 }
912 else if (strcmp (arg, "ppc64bridge") == 0)
913 {
914 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
915 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
916 }
917 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
918 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
919 {
920 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
921 }
69c040df
AM		 922 else if (strcmp (arg, "power4") == 0)
923 {
924 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
925 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
926 }
b0648eec
AM		 927 else if (strcmp (arg, "power5") == 0)
928 {
929 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
930 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
931 | PPC_OPCODE_POWER5);
932 }
9622b051
AM		 933 else if (strcmp (arg, "power6") == 0)
934 {
935 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
936 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
38233209
PB		 937 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
938 | PPC_OPCODE_ALTIVEC);
9622b051 939 }
9b4e5766
PB		 940 else if (strcmp (arg, "power7") == 0)
941 {
942 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
943 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
944 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
945 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX);
946 }
ede602d7
AM		 947 else if (strcmp (arg, "cell") == 0)
948 {
949 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
950 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
38233209 951 | PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC);
ede602d7 952 }
69c040df
AM		 953 /* -mcom means assemble for the common intersection between Power
954 and PowerPC. At present, we just allow the union, rather
955 than the intersection. */
956 else if (strcmp (arg, "com") == 0)
957 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
958 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
959 else if (strcmp (arg, "any") == 0)
960 ppc_cpu |= PPC_OPCODE_ANY;
961 else
962 return 0;
963
9b4e5766
PB		 964 /* Make sure the the Altivec, VSX and SPE bits are not lost. */
965 ppc_cpu |= retain_flags;
69c040df
AM		 966 return 1;
967}
968
252b5132 969int
98027b10 970md_parse_option (int c, char *arg)
252b5132
RH		 971{
972 switch (c)
973 {
974 case 'u':
975 /* -u means that any undefined symbols should be treated as
976 external, which is the default for gas anyhow. */
977 break;
978
979#ifdef OBJ_ELF
980 case 'l':
981 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 982 sake, recognize -be also. */
252b5132
RH		 983 if (strcmp (arg, "e") == 0)
984 {
985 target_big_endian = 0;
986 set_target_endian = 1;
987 }
988 else
989 return 0;
990
991 break;
992
993 case 'b':
994 if (strcmp (arg, "e") == 0)
995 {
996 target_big_endian = 1;
997 set_target_endian = 1;
998 }
999 else
1000 return 0;
1001
1002 break;
1003
1004 case 'K':
99a814a1 1005 /* Recognize -K PIC. */
252b5132
RH		 1006 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1007 {
1008 shlib = SHLIB_PIC;
1009 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1010 }
1011 else
1012 return 0;
1013
1014 break;
1015#endif
1016
7f6d05e8
CP		 1017 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1018 case 'a':
1019 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1020 {
1021#ifdef BFD64
1022 ppc_obj64 = 1;
1023#else
1024 as_fatal (_("%s unsupported"), "-a64");
1025#endif
1026 }
7f6d05e8 1027 else if (strcmp (arg, "32") == 0)
2b3c4602 1028 ppc_obj64 = 0;
7f6d05e8
CP		 1029 else
1030 return 0;
1031 break;
81d4177b 1032
252b5132 1033 case 'm':
69c040df
AM		 1034 if (parse_cpu (arg))
1035 ;
252b5132
RH		 1036
1037 else if (strcmp (arg, "regnames") == 0)
b34976b6 1038 reg_names_p = TRUE;
252b5132
RH		 1039
1040 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1041 reg_names_p = FALSE;
252b5132
RH		 1042
1043#ifdef OBJ_ELF
99a814a1
AM		 1044 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1045 that require relocation. */
252b5132
RH		 1046 else if (strcmp (arg, "relocatable") == 0)
1047 {
5d6f4f16 1048 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1049 ppc_flags |= EF_PPC_RELOCATABLE;
1050 }
1051
1052 else if (strcmp (arg, "relocatable-lib") == 0)
1053 {
5d6f4f16 1054 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1055 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1056 }
1057
99a814a1 1058 /* -memb, set embedded bit. */
252b5132
RH		 1059 else if (strcmp (arg, "emb") == 0)
1060 ppc_flags |= EF_PPC_EMB;
1061
99a814a1
AM		 1062 /* -mlittle/-mbig set the endianess. */
1063 else if (strcmp (arg, "little") == 0
1064 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1065 {
1066 target_big_endian = 0;
1067 set_target_endian = 1;
1068 }
1069
1070 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1071 {
1072 target_big_endian = 1;
1073 set_target_endian = 1;
1074 }
1075
1076 else if (strcmp (arg, "solaris") == 0)
1077 {
b34976b6 1078 msolaris = TRUE;
252b5132
RH		 1079 ppc_comment_chars = ppc_solaris_comment_chars;
1080 }
1081
1082 else if (strcmp (arg, "no-solaris") == 0)
1083 {
b34976b6 1084 msolaris = FALSE;
252b5132
RH		 1085 ppc_comment_chars = ppc_eabi_comment_chars;
1086 }
1087#endif
1088 else
1089 {
1090 as_bad (_("invalid switch -m%s"), arg);
1091 return 0;
1092 }
1093 break;
1094
1095#ifdef OBJ_ELF
1096 /* -V: SVR4 argument to print version ID. */
1097 case 'V':
1098 print_version_id ();
1099 break;
1100
1101 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1102 should be emitted or not. FIXME: Not implemented. */
1103 case 'Q':
1104 break;
1105
1106 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1107 rather than .stabs.excl, which is ignored by the linker.
1108 FIXME: Not implemented. */
1109 case 's':
1110 if (arg)
1111 return 0;
1112
1113 break;
1114#endif
1115
1116 default:
1117 return 0;
1118 }
1119
1120 return 1;
1121}
1122
1123void
98027b10 1124md_show_usage (FILE *stream)
252b5132 1125{
bc805888 1126 fprintf (stream, _("\
252b5132 1127PowerPC options:\n\
df12615d
AM		 1128-a32 generate ELF32/XCOFF32\n\
1129-a64 generate ELF64/XCOFF64\n\
252b5132 1130-u ignored\n\
23e1d84c
AM		 1131-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1132-mpwr generate code for POWER (RIOS1)\n\
1133-m601 generate code for PowerPC 601\n\
418c1742 1134-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1135 generate code for PowerPC 603/604\n\
081ba1b3
AM		 1136-m403 generate code for PowerPC 403\n\
1137-m405 generate code for PowerPC 405\n\
3d8aea2f 1138-m440 generate code for PowerPC 440\n\
c8187e15 1139-m464 generate code for PowerPC 464\n\
f5c120c5 1140-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1141 generate code for PowerPC 7400/7410/7450/7455\n\
1142-m750cl generate code for PowerPC 750cl\n"));
df12615d 1143 fprintf (stream, _("\
23e1d84c 1144-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1145-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
2f3bb96a 1146-mbooke generate code for 32-bit PowerPC BookE\n\
23e1d84c 1147-mpower4 generate code for Power4 architecture\n\
b0648eec 1148-mpower5 generate code for Power5 architecture\n\
9622b051 1149-mpower6 generate code for Power6 architecture\n\
9b4e5766 1150-mpower7 generate code for Power7 architecture\n\
ede602d7 1151-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1152-mcom generate code Power/PowerPC common instructions\n\
df12615d 1153-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1154 fprintf (stream, _("\
df12615d 1155-maltivec generate code for AltiVec\n\
9b4e5766 1156-mvsx generate code for Vector-Scalar (VSX) instructions\n\
36ae0db3 1157-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1158-me500, -me500x2 generate code for Motorola e500 core complex\n\
19a6653c 1159-me500mc, generate code for Freescale e500mc core complex\n\
df12615d
AM		 1160-mspe generate code for Motorola SPE instructions\n\
1161-mregnames Allow symbolic names for registers\n\
1162-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1163#ifdef OBJ_ELF
bc805888 1164 fprintf (stream, _("\
252b5132
RH		 1165-mrelocatable support for GCC's -mrelocatble option\n\
1166-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1167-memb set PPC_EMB bit in ELF flags\n\
df12615d 1168-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1169 generate code for a little endian machine\n\
df12615d
AM		 1170-mbig, -mbig-endian, -b, -be\n\
1171 generate code for a big endian machine\n\
252b5132
RH		 1172-msolaris generate code for Solaris\n\
1173-mno-solaris do not generate code for Solaris\n\
1174-V print assembler version number\n\
1175-Qy, -Qn ignored\n"));
1176#endif
1177}
1178\f
1179/* Set ppc_cpu if it is not already set. */
1180
1181static void
98027b10 1182ppc_set_cpu (void)
252b5132
RH		 1183{
1184 const char *default_os = TARGET_OS;
1185 const char *default_cpu = TARGET_CPU;
1186
3c9030c1 1187 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1188 {
2a98c3a6 1189 if (ppc_obj64)
3c9030c1 1190 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1191 else if (strncmp (default_os, "aix", 3) == 0
1192 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1193 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1194 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1195 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1196 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1197 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1198 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1199 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1200 else
99a814a1
AM		 1201 as_fatal (_("Unknown default cpu = %s, os = %s"),
1202 default_cpu, default_os);
252b5132
RH		 1203 }
1204}
1205
9232bbb0
AM		 1206/* Figure out the BFD architecture to use. This function and ppc_mach
1207 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1208
1209enum bfd_architecture
98027b10 1210ppc_arch (void)
252b5132
RH		 1211{
1212 const char *default_cpu = TARGET_CPU;
1213 ppc_set_cpu ();
1214
1215 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1216 return bfd_arch_powerpc;
1217 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1218 return bfd_arch_rs6000;
1219 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1220 {
1221 if (strcmp (default_cpu, "rs6000") == 0)
1222 return bfd_arch_rs6000;
0baf16f2 1223 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1224 return bfd_arch_powerpc;
1225 }
1226
1227 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1228 return bfd_arch_unknown;
1229}
1230
7f6d05e8 1231unsigned long
98027b10 1232ppc_mach (void)
7f6d05e8 1233{
2a98c3a6
AM		 1234 if (ppc_obj64)
1235 return bfd_mach_ppc64;
1236 else if (ppc_arch () == bfd_arch_rs6000)
1237 return bfd_mach_rs6k;
1238 else
1239 return bfd_mach_ppc;
7f6d05e8
CP		 1240}
1241
81d4177b 1242extern char*
98027b10 1243ppc_target_format (void)
7f6d05e8
CP		 1244{
1245#ifdef OBJ_COFF
1246#ifdef TE_PE
99a814a1 1247 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1248#elif TE_POWERMAC
0baf16f2 1249 return "xcoff-powermac";
7f6d05e8 1250#else
eb1e0e80 1251# ifdef TE_AIX5
2b3c4602 1252 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1253# else
2b3c4602 1254 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1255# endif
7f6d05e8 1256#endif
7f6d05e8
CP		 1257#endif
1258#ifdef OBJ_ELF
9d8504b1
PB		 1259# ifdef TE_VXWORKS
1260 return "elf32-powerpc-vxworks";
1261# else
0baf16f2 1262 return (target_big_endian
2b3c4602
AM		 1263 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1264 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1265# endif
7f6d05e8
CP		 1266#endif
1267}
1268
69c040df
AM		 1269/* Insert opcodes and macros into hash tables. Called at startup and
1270 for .cpu pseudo. */
252b5132 1271
69c040df
AM		 1272static void
1273ppc_setup_opcodes (void)
252b5132 1274{
98027b10 1275 const struct powerpc_opcode *op;
252b5132
RH		 1276 const struct powerpc_opcode *op_end;
1277 const struct powerpc_macro *macro;
1278 const struct powerpc_macro *macro_end;
b84bf58a 1279 bfd_boolean bad_insn = FALSE;
252b5132 1280
69c040df
AM		 1281 if (ppc_hash != NULL)
1282 hash_die (ppc_hash);
1283 if (ppc_macro_hash != NULL)
1284 hash_die (ppc_macro_hash);
252b5132
RH		 1285
1286 /* Insert the opcodes into a hash table. */
1287 ppc_hash = hash_new ();
1288
c43a438d 1289 if (ENABLE_CHECKING)
b84bf58a 1290 {
c43a438d 1291 unsigned int i;
b84bf58a 1292
c43a438d
AM		 1293 /* Check operand masks. Code here and in the disassembler assumes
1294 all the 1's in the mask are contiguous. */
1295 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1296 {
c43a438d
AM		 1297 unsigned long mask = powerpc_operands[i].bitm;
1298 unsigned long right_bit;
1299 unsigned int j;
1300
1301 right_bit = mask & -mask;
1302 mask += right_bit;
1303 right_bit = mask & -mask;
1304 if (mask != right_bit)
1305 {
1306 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1307 bad_insn = TRUE;
1308 }
1309 for (j = i + 1; j < num_powerpc_operands; ++j)
1310 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1311 sizeof (powerpc_operands[0])) == 0)
1312 {
1313 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1314 j, i);
1315 bad_insn = TRUE;
1316 }
b84bf58a
AM		 1317 }
1318 }
1319
252b5132
RH		 1320 op_end = powerpc_opcodes + powerpc_num_opcodes;
1321 for (op = powerpc_opcodes; op < op_end; op++)
1322 {
c43a438d 1323 if (ENABLE_CHECKING)
b84bf58a 1324 {
c43a438d
AM		 1325 const unsigned char *o;
1326 unsigned long omask = op->mask;
8dbcd839 1327
d815f1a9 1328 if (op != powerpc_opcodes)
8dbcd839 1329 {
d815f1a9
AM		 1330 /* The major opcodes had better be sorted. Code in the
1331 disassembler assumes the insns are sorted according to
1332 major opcode. */
1333 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1334 {
1335 as_bad (_("major opcode is not sorted for %s"),
1336 op->name);
1337 bad_insn = TRUE;
1338 }
1339
1340 /* Warn if the table isn't more strictly ordered.
1341 Unfortunately it doesn't seem possible to order the
1342 table on much more than the major opcode, which makes
1343 it difficult to implement a binary search in the
1344 disassembler. The problem is that we have multiple
1345 ways to disassemble instructions, and we usually want
1346 to choose a more specific form (with more bits set in
1347 the opcode) than a more general form. eg. all of the
1348 following are equivalent:
1349 bne label # opcode = 0x40820000, mask = 0xff830003
1350 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1351 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1352
1353 There are also cases where the table needs to be out
1354 of order to disassemble the correct instruction for
2f3bb96a 1355 processor variants. */
d815f1a9
AM		 1356 else if (0)
1357 {
1358 unsigned long t1 = op[0].opcode;
1359 unsigned long t2 = op[-1].opcode;
1360
1361 if (((t1 ^ t2) & 0xfc0007ff) == 0
1362 && (t1 & 0xfc0006df) == 0x7c000286)
1363 {
1364 /* spr field is split. */
1365 t1 = ((t1 & ~0x1ff800)
1366 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1367 t2 = ((t2 & ~0x1ff800)
1368 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1369 }
1370 if (t1 < t2)
1371 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1372 op[0].name, op[0].opcode, op[0].mask,
1373 op[-1].name, op[-1].opcode, op[-1].mask);
1374 }
8dbcd839 1375 }
c43a438d
AM		 1376
1377 /* The mask had better not trim off opcode bits. */
1378 if ((op->opcode & omask) != op->opcode)
1379 {
1380 as_bad (_("mask trims opcode bits for %s"),
1381 op->name);
1382 bad_insn = TRUE;
1383 }
1384
1385 /* The operands must not overlap the opcode or each other. */
1386 for (o = op->operands; *o; ++o)
1387 if (*o >= num_powerpc_operands)
1388 {
1389 as_bad (_("operand index error for %s"),
1390 op->name);
1391 bad_insn = TRUE;
1392 }
1393 else
b84bf58a 1394 {
c43a438d
AM		 1395 const struct powerpc_operand *operand = &powerpc_operands[*o];
1396 if (operand->shift >= 0)
b84bf58a 1397 {
c43a438d
AM		 1398 unsigned long mask = operand->bitm << operand->shift;
1399 if (omask & mask)
1400 {
1401 as_bad (_("operand %d overlap in %s"),
1402 (int) (o - op->operands), op->name);
1403 bad_insn = TRUE;
1404 }
1405 omask |= mask;
b84bf58a 1406 }
b84bf58a 1407 }
c43a438d 1408 }
252b5132 1409
2b3c4602 1410 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1411 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1412 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1413 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1414 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
a08f0c75
PB		 1415 && ((ppc_cpu & PPC_OPCODE_POWER4) == 0
1416 || (op->flags & PPC_OPCODE_NOPOWER4) == 0))
252b5132
RH		 1417 {
1418 const char *retval;
1419
98027b10 1420 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1421 if (retval != NULL)
252b5132 1422 {
99a814a1 1423 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1424 if ((ppc_cpu & PPC_OPCODE_601) != 0
1425 && (op->flags & PPC_OPCODE_POWER) != 0)
1426 continue;
1427
b84bf58a 1428 as_bad (_("duplicate instruction %s"),
99a814a1 1429 op->name);
b84bf58a 1430 bad_insn = TRUE;
252b5132
RH		 1431 }
1432 }
1433 }
1434
3c9030c1
AM		 1435 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1436 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1437 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1438
252b5132
RH		 1439 /* Insert the macros into a hash table. */
1440 ppc_macro_hash = hash_new ();
1441
1442 macro_end = powerpc_macros + powerpc_num_macros;
1443 for (macro = powerpc_macros; macro < macro_end; macro++)
1444 {
1445 if ((macro->flags & ppc_cpu) != 0)
1446 {
1447 const char *retval;
1448
98027b10 1449 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1450 if (retval != (const char *) NULL)
1451 {
b84bf58a
AM		 1452 as_bad (_("duplicate macro %s"), macro->name);
1453 bad_insn = TRUE;
252b5132
RH		 1454 }
1455 }
1456 }
1457
b84bf58a 1458 if (bad_insn)
252b5132 1459 abort ();
69c040df
AM		 1460}
1461
1462/* This function is called when the assembler starts up. It is called
1463 after the options have been parsed and the output file has been
1464 opened. */
1465
1466void
98027b10 1467md_begin (void)
69c040df
AM		 1468{
1469 ppc_set_cpu ();
1470
1471 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1472
1473#ifdef OBJ_ELF
1474 /* Set the ELF flags if desired. */
1475 if (ppc_flags && !msolaris)
1476 bfd_set_private_flags (stdoutput, ppc_flags);
1477#endif
1478
1479 ppc_setup_opcodes ();
252b5132 1480
67c1ffbe 1481 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1482 by the user. */
252b5132
RH		 1483 if (!set_target_endian)
1484 {
1485 set_target_endian = 1;
1486 target_big_endian = PPC_BIG_ENDIAN;
1487 }
1488
1489#ifdef OBJ_XCOFF
1490 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1491
1492 /* Create dummy symbols to serve as initial csects. This forces the
1493 text csects to precede the data csects. These symbols will not
1494 be output. */
1495 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1496 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1497 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1498 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1499#endif
1500
1501#ifdef TE_PE
1502
1503 ppc_current_section = text_section;
81d4177b 1504 ppc_previous_section = 0;
252b5132
RH		 1505
1506#endif
1507}
1508
6a0c61b7 1509void
98027b10 1510ppc_cleanup (void)
6a0c61b7 1511{
dc1d03fc 1512#ifdef OBJ_ELF
6a0c61b7
EZ		 1513 if (ppc_apuinfo_list == NULL)
1514 return;
1515
1516 /* Ok, so write the section info out. We have this layout:
1517
1518 byte data what
1519 ---- ---- ----
1520 0 8 length of "APUinfo\0"
1521 4 (n*4) number of APU's (4 bytes each)
1522 8 2 note type 2
1523 12 "APUinfo\0" name
1524 20 APU#1 first APU's info
1525 24 APU#2 second APU's info
1526 ... ...
1527 */
1528 {
1529 char *p;
1530 asection *seg = now_seg;
1531 subsegT subseg = now_subseg;
1532 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1533 unsigned int i;
6a0c61b7
EZ		 1534
1535 /* Create the .PPC.EMB.apuinfo section. */
1536 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1537 bfd_set_section_flags (stdoutput,
1538 apuinfo_secp,
e1a9cb8e 1539 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1540
1541 p = frag_more (4);
1542 md_number_to_chars (p, (valueT) 8, 4);
1543
1544 p = frag_more (4);
e98d298c 1545 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1546
1547 p = frag_more (4);
1548 md_number_to_chars (p, (valueT) 2, 4);
1549
1550 p = frag_more (8);
1551 strcpy (p, "APUinfo");
1552
1553 for (i = 0; i < ppc_apuinfo_num; i++)
1554 {
b34976b6
AM		 1555 p = frag_more (4);
1556 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1557 }
1558
1559 frag_align (2, 0, 0);
1560
1561 /* We probably can't restore the current segment, for there likely
1562 isn't one yet... */
1563 if (seg && subseg)
1564 subseg_set (seg, subseg);
1565 }
dc1d03fc 1566#endif
6a0c61b7
EZ		 1567}
1568
252b5132
RH		 1569/* Insert an operand value into an instruction. */
1570
1571static unsigned long
a1867a27
AM		 1572ppc_insert_operand (unsigned long insn,
1573 const struct powerpc_operand *operand,
1574 offsetT val,
fa452fa6 1575 ppc_cpu_t ppc_cpu,
a1867a27
AM		 1576 char *file,
1577 unsigned int line)
252b5132 1578{
b84bf58a 1579 long min, max, right;
eb42fac1 1580
b84bf58a
AM		 1581 max = operand->bitm;
1582 right = max & -max;
1583 min = 0;
1584
1585 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1586 {
b84bf58a 1587 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1588 max = (max >> 1) & -right;
1589 min = ~max & -right;
b84bf58a 1590 }
252b5132 1591
b84bf58a 1592 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1593 max++;
252b5132 1594
b84bf58a 1595 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1596 {
1597 long tmp = min;
1598 min = -max;
1599 max = -tmp;
1600 }
b84bf58a 1601
a1867a27
AM		 1602 if (min <= max)
1603 {
1604 /* Some people write constants with the sign extension done by
1605 hand but only up to 32 bits. This shouldn't really be valid,
1606 but, to permit this code to assemble on a 64-bit host, we
1607 sign extend the 32-bit value to 64 bits if so doing makes the
1608 value valid. */
1609 if (val > max
1610 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1611 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1612 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1613 val = val - 0x80000000 - 0x80000000;
1614
1615 /* Similarly, people write expressions like ~(1<<15), and expect
1616 this to be OK for a 32-bit unsigned value. */
1617 else if (val < min
1618 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1619 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1620 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1621 val = val + 0x80000000 + 0x80000000;
1622
1623 else if (val < min
1624 || val > max
1625 || (val & (right - 1)) != 0)
1626 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1627 }
b84bf58a 1628
252b5132
RH		 1629 if (operand->insert)
1630 {
1631 const char *errmsg;
1632
1633 errmsg = NULL;
2b3c4602 1634 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1635 if (errmsg != (const char *) NULL)
0baf16f2 1636 as_bad_where (file, line, errmsg);
252b5132
RH		 1637 }
1638 else
b84bf58a 1639 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1640
1641 return insn;
1642}
1643
1644\f
1645#ifdef OBJ_ELF
1646/* Parse @got, etc. and return the desired relocation. */
1647static bfd_reloc_code_real_type
98027b10 1648ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1649{
1650 struct map_bfd {
1651 char *string;
b7d7dc63
AM		 1652 unsigned int length : 8;
1653 unsigned int valid32 : 1;
1654 unsigned int valid64 : 1;
1655 unsigned int reloc;
252b5132
RH		 1656 };
1657
1658 char ident[20];
1659 char *str = *str_p;
1660 char *str2;
1661 int ch;
1662 int len;
15c1449b 1663 const struct map_bfd *ptr;
252b5132 1664
b7d7dc63
AM		 1665#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1666#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1667#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1668
15c1449b 1669 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1670 MAP ("l", BFD_RELOC_LO16),
1671 MAP ("h", BFD_RELOC_HI16),
1672 MAP ("ha", BFD_RELOC_HI16_S),
1673 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1674 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1675 MAP ("got", BFD_RELOC_16_GOTOFF),
1676 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1677 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1678 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1679 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1680 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1681 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1682 MAP ("copy", BFD_RELOC_PPC_COPY),
1683 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1684 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1685 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1686 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1687 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1688 MAP ("tls", BFD_RELOC_PPC_TLS),
1689 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1690 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1691 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1692 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1693 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1694 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1695 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1696 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1697 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1698 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1699 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1700 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1701 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1702 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1703 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1704 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1705 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1706 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1707 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1708 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1709 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1710 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1711 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1712 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1713 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1714 MAP32 ("fixup", BFD_RELOC_CTOR),
1715 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1716 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1717 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1718 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1719 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1720 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1721 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1722 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1723 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1724 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1725 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1726 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1727 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1728 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1729 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1730 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1731 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1732 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1733 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1734 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1735 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1736 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1737 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1738 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1739 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1740 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1741 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1742 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1743 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1744 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1745 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1746 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1747 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1748 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1749 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1750 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1751 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1752 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1753 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1754 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1755 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1756 };
1757
1758 if (*str++ != '@')
1759 return BFD_RELOC_UNUSED;
1760
1761 for (ch = *str, str2 = ident;
1762 (str2 < ident + sizeof (ident) - 1
3882b010 1763 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1764 ch = *++str)
1765 {
3882b010 1766 *str2++ = TOLOWER (ch);
252b5132
RH		 1767 }
1768
1769 *str2 = '\0';
1770 len = str2 - ident;
1771
1772 ch = ident[0];
1773 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1774 if (ch == ptr->string[0]
1775 && len == ptr->length
b7d7dc63
AM		 1776 && memcmp (ident, ptr->string, ptr->length) == 0
1777 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1778 {
15c1449b
AM		 1779 int reloc = ptr->reloc;
1780
cdba85ec 1781 if (!ppc_obj64)
5f6db75a
AM		 1782 if (exp_p->X_add_number != 0
1783 && (reloc == (int) BFD_RELOC_16_GOTOFF
1784 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1785 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1786 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1787 as_warn (_("identifier+constant@got means identifier@got+constant"));
1788
1789 /* Now check for identifier@suffix+constant. */
1790 if (*str == '-' || *str == '+')
252b5132 1791 {
5f6db75a
AM		 1792 char *orig_line = input_line_pointer;
1793 expressionS new_exp;
1794
1795 input_line_pointer = str;
1796 expression (&new_exp);
1797 if (new_exp.X_op == O_constant)
252b5132 1798 {
5f6db75a
AM		 1799 exp_p->X_add_number += new_exp.X_add_number;
1800 str = input_line_pointer;
252b5132 1801 }
5f6db75a
AM		 1802
1803 if (&input_line_pointer != str_p)
1804 input_line_pointer = orig_line;
252b5132 1805 }
252b5132 1806 *str_p = str;
0baf16f2 1807
2b3c4602 1808 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1809 && exp_p->X_op == O_symbol
1810 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1811 {
9f2b53d7
AM		 1812 /* Change the symbol so that the dummy .TOC. symbol can be
1813 omitted from the object file. */
0baf16f2
AM		 1814 exp_p->X_add_symbol = &abs_symbol;
1815 }
1816
15c1449b 1817 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1818 }
1819
1820 return BFD_RELOC_UNUSED;
1821}
1822
99a814a1
AM		 1823/* Like normal .long/.short/.word, except support @got, etc.
1824 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1825static void
98027b10 1826ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1827{
1828 expressionS exp;
1829 bfd_reloc_code_real_type reloc;
1830
1831 if (is_it_end_of_statement ())
1832 {
1833 demand_empty_rest_of_line ();
1834 return;
1835 }
1836
1837 do
1838 {
1839 expression (&exp);
1840 if (exp.X_op == O_symbol
1841 && *input_line_pointer == '@'
99a814a1
AM		 1842 && (reloc = ppc_elf_suffix (&input_line_pointer,
1843 &exp)) != BFD_RELOC_UNUSED)
252b5132 1844 {
99a814a1
AM		 1845 reloc_howto_type *reloc_howto;
1846 int size;
1847
1848 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1849 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1850
1851 if (size > nbytes)
0baf16f2
AM		 1852 {
1853 as_bad (_("%s relocations do not fit in %d bytes\n"),
1854 reloc_howto->name, nbytes);
1855 }
252b5132
RH		 1856 else
1857 {
0baf16f2
AM		 1858 char *p;
1859 int offset;
252b5132 1860
0baf16f2
AM		 1861 p = frag_more (nbytes);
1862 offset = 0;
1863 if (target_big_endian)
1864 offset = nbytes - size;
99a814a1
AM		 1865 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1866 &exp, 0, reloc);
252b5132
RH		 1867 }
1868 }
1869 else
1870 emit_expr (&exp, (unsigned int) nbytes);
1871 }
1872 while (*input_line_pointer++ == ',');
1873
99a814a1
AM		 1874 /* Put terminator back into stream. */
1875 input_line_pointer--;
252b5132
RH		 1876 demand_empty_rest_of_line ();
1877}
1878
1879/* Solaris pseduo op to change to the .rodata section. */
1880static void
98027b10 1881ppc_elf_rdata (int xxx)
252b5132
RH		 1882{
1883 char *save_line = input_line_pointer;
1884 static char section[] = ".rodata\n";
1885
99a814a1 1886 /* Just pretend this is .section .rodata */
252b5132
RH		 1887 input_line_pointer = section;
1888 obj_elf_section (xxx);
1889
1890 input_line_pointer = save_line;
1891}
1892
99a814a1 1893/* Pseudo op to make file scope bss items. */
252b5132 1894static void
98027b10 1895ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1896{
98027b10
AM		 1897 char *name;
1898 char c;
1899 char *p;
252b5132 1900 offsetT size;
98027b10 1901 symbolS *symbolP;
252b5132
RH		 1902 offsetT align;
1903 segT old_sec;
1904 int old_subsec;
1905 char *pfrag;
1906 int align2;
1907
1908 name = input_line_pointer;
1909 c = get_symbol_end ();
1910
99a814a1 1911 /* just after name is now '\0'. */
252b5132
RH		 1912 p = input_line_pointer;
1913 *p = c;
1914 SKIP_WHITESPACE ();
1915 if (*input_line_pointer != ',')
1916 {
1917 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1918 ignore_rest_of_line ();
1919 return;
1920 }
1921
1922 input_line_pointer++; /* skip ',' */
1923 if ((size = get_absolute_expression ()) < 0)
1924 {
1925 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1926 ignore_rest_of_line ();
1927 return;
1928 }
1929
1930 /* The third argument to .lcomm is the alignment. */
1931 if (*input_line_pointer != ',')
1932 align = 8;
1933 else
1934 {
1935 ++input_line_pointer;
1936 align = get_absolute_expression ();
1937 if (align <= 0)
1938 {
1939 as_warn (_("ignoring bad alignment"));
1940 align = 8;
1941 }
1942 }
1943
1944 *p = 0;
1945 symbolP = symbol_find_or_make (name);
1946 *p = c;
1947
1948 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1949 {
1950 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1951 S_GET_NAME (symbolP));
1952 ignore_rest_of_line ();
1953 return;
1954 }
1955
1956 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1957 {
1958 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1959 S_GET_NAME (symbolP),
1960 (long) S_GET_VALUE (symbolP),
1961 (long) size);
1962
1963 ignore_rest_of_line ();
1964 return;
1965 }
1966
99a814a1 1967 /* Allocate_bss. */
252b5132
RH		 1968 old_sec = now_seg;
1969 old_subsec = now_subseg;
1970 if (align)
1971 {
99a814a1 1972 /* Convert to a power of 2 alignment. */
252b5132
RH		 1973 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1974 if (align != 1)
1975 {
1976 as_bad (_("Common alignment not a power of 2"));
1977 ignore_rest_of_line ();
1978 return;
1979 }
1980 }
1981 else
1982 align2 = 0;
1983
1984 record_alignment (bss_section, align2);
1985 subseg_set (bss_section, 0);
1986 if (align2)
1987 frag_align (align2, 0, 0);
1988 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1989 symbol_get_frag (symbolP)->fr_symbol = 0;
1990 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1991 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1992 (char *) 0);
1993 *pfrag = 0;
1994 S_SET_SIZE (symbolP, size);
1995 S_SET_SEGMENT (symbolP, bss_section);
1996 subseg_set (old_sec, old_subsec);
1997 demand_empty_rest_of_line ();
1998}
1999
2000/* Validate any relocations emitted for -mrelocatable, possibly adding
2001 fixups for word relocations in writable segments, so we can adjust
2002 them at runtime. */
2003static void
98027b10 2004ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2005{
2006 if (fixp->fx_done || fixp->fx_pcrel)
2007 return;
2008
2009 switch (shlib)
2010 {
2011 case SHLIB_NONE:
2012 case SHLIB_PIC:
2013 return;
2014
5d6f4f16 2015 case SHLIB_MRELOCATABLE:
252b5132
RH		 2016 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2017 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2018 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2019 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2020 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2021 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2022 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2023 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2024 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2025 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2026 && strcmp (segment_name (seg), ".got2") != 0
2027 && strcmp (segment_name (seg), ".dtors") != 0
2028 && strcmp (segment_name (seg), ".ctors") != 0
2029 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2030 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2031 && strcmp (segment_name (seg), ".eh_frame") != 0
2032 && strcmp (segment_name (seg), ".ex_shared") != 0)
2033 {
2034 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2035 || fixp->fx_r_type != BFD_RELOC_CTOR)
2036 {
2037 as_bad_where (fixp->fx_file, fixp->fx_line,
2038 _("Relocation cannot be done when using -mrelocatable"));
2039 }
2040 }
2041 return;
2042 }
2043}
0baf16f2 2044
7e8d4ab4
AM		 2045/* Prevent elf_frob_file_before_adjust removing a weak undefined
2046 function descriptor sym if the corresponding code sym is used. */
2047
2048void
98027b10 2049ppc_frob_file_before_adjust (void)
0baf16f2 2050{
7e8d4ab4 2051 symbolS *symp;
9232bbb0 2052 asection *toc;
0baf16f2 2053
7e8d4ab4
AM		 2054 if (!ppc_obj64)
2055 return;
2056
2057 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2058 {
7e8d4ab4
AM		 2059 const char *name;
2060 char *dotname;
2061 symbolS *dotsym;
2062 size_t len;
2063
2064 name = S_GET_NAME (symp);
2065 if (name[0] == '.')
2066 continue;
2067
2068 if (! S_IS_WEAK (symp)
2069 || S_IS_DEFINED (symp))
2070 continue;
2071
2072 len = strlen (name) + 1;
2073 dotname = xmalloc (len + 1);
2074 dotname[0] = '.';
2075 memcpy (dotname + 1, name, len);
461b725f 2076 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2077 free (dotname);
2078 if (dotsym != NULL && (symbol_used_p (dotsym)
2079 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2080 symbol_mark_used (symp);
2081
0baf16f2
AM		 2082 }
2083
9232bbb0
AM		 2084 toc = bfd_get_section_by_name (stdoutput, ".toc");
2085 if (toc != NULL
2086 && bfd_section_size (stdoutput, toc) > 0x10000)
2087 as_warn (_("TOC section size exceeds 64k"));
2088
7e8d4ab4
AM		 2089 /* Don't emit .TOC. symbol. */
2090 symp = symbol_find (".TOC.");
2091 if (symp != NULL)
2092 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2093}
252b5132
RH		 2094#endif /* OBJ_ELF */
2095\f
2096#ifdef TE_PE
2097
2098/*
99a814a1 2099 * Summary of parse_toc_entry.
252b5132
RH		 2100 *
2101 * in: Input_line_pointer points to the '[' in one of:
2102 *
2103 * [toc] [tocv] [toc32] [toc64]
2104 *
2105 * Anything else is an error of one kind or another.
2106 *
81d4177b 2107 * out:
252b5132
RH		 2108 * return value: success or failure
2109 * toc_kind: kind of toc reference
2110 * input_line_pointer:
2111 * success: first char after the ']'
2112 * failure: unchanged
2113 *
2114 * settings:
2115 *
2116 * [toc] - rv == success, toc_kind = default_toc
2117 * [tocv] - rv == success, toc_kind = data_in_toc
2118 * [toc32] - rv == success, toc_kind = must_be_32
2119 * [toc64] - rv == success, toc_kind = must_be_64
2120 *
2121 */
2122
81d4177b
KH		 2123enum toc_size_qualifier
2124{
252b5132
RH		 2125 default_toc, /* The toc cell constructed should be the system default size */
2126 data_in_toc, /* This is a direct reference to a toc cell */
2127 must_be_32, /* The toc cell constructed must be 32 bits wide */
2128 must_be_64 /* The toc cell constructed must be 64 bits wide */
2129};
2130
2131static int
98027b10 2132parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2133{
2134 char *start;
2135 char *toc_spec;
2136 char c;
2137 enum toc_size_qualifier t;
2138
99a814a1 2139 /* Save the input_line_pointer. */
252b5132
RH		 2140 start = input_line_pointer;
2141
99a814a1 2142 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2143 ++input_line_pointer;
2144 SKIP_WHITESPACE ();
81d4177b 2145
99a814a1 2146 /* Find the spelling of the operand. */
252b5132
RH		 2147 toc_spec = input_line_pointer;
2148 c = get_symbol_end ();
2149
99a814a1 2150 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2151 {
2152 t = default_toc;
2153 }
99a814a1 2154 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2155 {
2156 t = data_in_toc;
2157 }
99a814a1 2158 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2159 {
2160 t = must_be_32;
2161 }
99a814a1 2162 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2163 {
2164 t = must_be_64;
2165 }
2166 else
2167 {
2168 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2169 *input_line_pointer = c;
2170 input_line_pointer = start;
252b5132
RH		 2171 return 0;
2172 }
2173
99a814a1
AM		 2174 /* Now find the ']'. */
2175 *input_line_pointer = c;
252b5132 2176
81d4177b
KH		 2177 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2178 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2179
2180 if (c != ']')
2181 {
2182 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2183 input_line_pointer = start;
252b5132
RH		 2184 return 0;
2185 }
2186
99a814a1 2187 *toc_kind = t;
252b5132
RH		 2188 return 1;
2189}
2190#endif
2191\f
2192
dc1d03fc 2193#ifdef OBJ_ELF
6a0c61b7
EZ		 2194#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2195static void
98027b10 2196ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2197{
2198 unsigned int i;
2199
2200 /* Check we don't already exist. */
2201 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2202 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2203 return;
b34976b6 2204
6a0c61b7
EZ		 2205 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2206 {
2207 if (ppc_apuinfo_num_alloc == 0)
2208 {
2209 ppc_apuinfo_num_alloc = 4;
2210 ppc_apuinfo_list = (unsigned long *)
2211 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2212 }
2213 else
2214 {
2215 ppc_apuinfo_num_alloc += 4;
2216 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2217 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2218 }
2219 }
dc1d03fc 2220 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2221}
2222#undef APUID
dc1d03fc 2223#endif
6a0c61b7
EZ		 2224\f
2225
252b5132
RH		 2226/* We need to keep a list of fixups. We can't simply generate them as
2227 we go, because that would require us to first create the frag, and
2228 that would screw up references to ``.''. */
2229
2230struct ppc_fixup
2231{
2232 expressionS exp;
2233 int opindex;
2234 bfd_reloc_code_real_type reloc;
2235};
2236
2237#define MAX_INSN_FIXUPS (5)
2238
2239/* This routine is called for each instruction to be assembled. */
2240
2241void
98027b10 2242md_assemble (char *str)
252b5132
RH		 2243{
2244 char *s;
2245 const struct powerpc_opcode *opcode;
2246 unsigned long insn;
2247 const unsigned char *opindex_ptr;
2248 int skip_optional;
2249 int need_paren;
2250 int next_opindex;
2251 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2252 int fc;
2253 char *f;
09b935ac 2254 int addr_mod;
252b5132
RH		 2255 int i;
2256#ifdef OBJ_ELF
2257 bfd_reloc_code_real_type reloc;
2258#endif
2259
2260 /* Get the opcode. */
3882b010 2261 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2262 ;
2263 if (*s != '\0')
2264 *s++ = '\0';
2265
2266 /* Look up the opcode in the hash table. */
2267 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2268 if (opcode == (const struct powerpc_opcode *) NULL)
2269 {
2270 const struct powerpc_macro *macro;
2271
2272 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2273 if (macro == (const struct powerpc_macro *) NULL)
2274 as_bad (_("Unrecognized opcode: `%s'"), str);
2275 else
2276 ppc_macro (s, macro);
2277
2278 return;
2279 }
2280
2281 insn = opcode->opcode;
2282
2283 str = s;
3882b010 2284 while (ISSPACE (*str))
252b5132
RH		 2285 ++str;
2286
2287 /* PowerPC operands are just expressions. The only real issue is
2288 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2289 an optional operand separate the operands only with commas (in some
2290 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2291 have optional operands). Most instructions with optional operands
2292 have only one. Those that have more than one optional operand can
2293 take either all their operands or none. So, before we start seriously
2294 parsing the operands, we check to see if we have optional operands,
2295 and if we do, we count the number of commas to see which operands
2296 have been omitted. */
252b5132
RH		 2297 skip_optional = 0;
2298 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2299 {
2300 const struct powerpc_operand *operand;
2301
2302 operand = &powerpc_operands[*opindex_ptr];
2303 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2304 {
2305 unsigned int opcount;
7fe9cf6b
NC		 2306 unsigned int num_operands_expected;
2307 unsigned int i;
252b5132
RH		 2308
2309 /* There is an optional operand. Count the number of
2310 commas in the input line. */
2311 if (*str == '\0')
2312 opcount = 0;
2313 else
2314 {
2315 opcount = 1;
2316 s = str;
2317 while ((s = strchr (s, ',')) != (char *) NULL)
2318 {
2319 ++opcount;
2320 ++s;
2321 }
2322 }
2323
7fe9cf6b
NC		 2324 /* Compute the number of expected operands.
2325 Do not count fake operands. */
2326 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2327 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2328 ++ num_operands_expected;
2329
252b5132
RH		 2330 /* If there are fewer operands in the line then are called
2331 for by the instruction, we want to skip the optional
1f6c9eb0 2332 operands. */
7fe9cf6b 2333 if (opcount < num_operands_expected)
252b5132
RH		 2334 skip_optional = 1;
2335
2336 break;
2337 }
2338 }
2339
2340 /* Gather the operands. */
2341 need_paren = 0;
2342 next_opindex = 0;
2343 fc = 0;
2344 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2345 {
2346 const struct powerpc_operand *operand;
2347 const char *errmsg;
2348 char *hold;
2349 expressionS ex;
2350 char endc;
2351
2352 if (next_opindex == 0)
2353 operand = &powerpc_operands[*opindex_ptr];
2354 else
2355 {
2356 operand = &powerpc_operands[next_opindex];
2357 next_opindex = 0;
2358 }
252b5132
RH		 2359 errmsg = NULL;
2360
2361 /* If this is a fake operand, then we do not expect anything
2362 from the input. */
2363 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2364 {
2b3c4602 2365 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2366 if (errmsg != (const char *) NULL)
2367 as_bad (errmsg);
2368 continue;
2369 }
2370
2371 /* If this is an optional operand, and we are skipping it, just
2372 insert a zero. */
2373 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2374 && skip_optional)
2375 {
2376 if (operand->insert)
2377 {
2b3c4602 2378 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2379 if (errmsg != (const char *) NULL)
2380 as_bad (errmsg);
2381 }
2382 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2383 next_opindex = *opindex_ptr + 1;
2384 continue;
2385 }
2386
2387 /* Gather the operand. */
2388 hold = input_line_pointer;
2389 input_line_pointer = str;
2390
2391#ifdef TE_PE
81d4177b 2392 if (*input_line_pointer == '[')
252b5132
RH		 2393 {
2394 /* We are expecting something like the second argument here:
99a814a1
AM		 2395 *
2396 * lwz r4,[toc].GS.0.static_int(rtoc)
2397 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2398 * The argument following the `]' must be a symbol name, and the
2399 * register must be the toc register: 'rtoc' or '2'
2400 *
2401 * The effect is to 0 as the displacement field
2402 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2403 * the appropriate variation) reloc against it based on the symbol.
2404 * The linker will build the toc, and insert the resolved toc offset.
2405 *
2406 * Note:
2407 * o The size of the toc entry is currently assumed to be
2408 * 32 bits. This should not be assumed to be a hard coded
2409 * number.
2410 * o In an effort to cope with a change from 32 to 64 bits,
2411 * there are also toc entries that are specified to be
2412 * either 32 or 64 bits:
2413 * lwz r4,[toc32].GS.0.static_int(rtoc)
2414 * lwz r4,[toc64].GS.0.static_int(rtoc)
2415 * These demand toc entries of the specified size, and the
2416 * instruction probably requires it.
2417 */
252b5132
RH		 2418
2419 int valid_toc;
2420 enum toc_size_qualifier toc_kind;
2421 bfd_reloc_code_real_type toc_reloc;
2422
99a814a1
AM		 2423 /* Go parse off the [tocXX] part. */
2424 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2425
81d4177b 2426 if (!valid_toc)
252b5132 2427 {
99a814a1
AM		 2428 /* Note: message has already been issued.
2429 FIXME: what sort of recovery should we do?
2430 demand_rest_of_line (); return; ? */
252b5132
RH		 2431 }
2432
99a814a1
AM		 2433 /* Now get the symbol following the ']'. */
2434 expression (&ex);
252b5132
RH		 2435
2436 switch (toc_kind)
2437 {
2438 case default_toc:
99a814a1
AM		 2439 /* In this case, we may not have seen the symbol yet,
2440 since it is allowed to appear on a .extern or .globl
2441 or just be a label in the .data section. */
252b5132
RH		 2442 toc_reloc = BFD_RELOC_PPC_TOC16;
2443 break;
2444 case data_in_toc:
99a814a1
AM		 2445 /* 1. The symbol must be defined and either in the toc
2446 section, or a global.
2447 2. The reloc generated must have the TOCDEFN flag set
2448 in upper bit mess of the reloc type.
2449 FIXME: It's a little confusing what the tocv
2450 qualifier can be used for. At the very least, I've
2451 seen three uses, only one of which I'm sure I can
2452 explain. */
81d4177b
KH		 2453 if (ex.X_op == O_symbol)
2454 {
252b5132 2455 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2456 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2457 != tocdata_section)
252b5132 2458 {
99a814a1 2459 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2460 }
2461 }
2462
2463 toc_reloc = BFD_RELOC_PPC_TOC16;
2464 break;
2465 case must_be_32:
99a814a1
AM		 2466 /* FIXME: these next two specifically specify 32/64 bit
2467 toc entries. We don't support them today. Is this
2468 the right way to say that? */
252b5132
RH		 2469 toc_reloc = BFD_RELOC_UNUSED;
2470 as_bad (_("Unimplemented toc32 expression modifier"));
2471 break;
2472 case must_be_64:
99a814a1 2473 /* FIXME: see above. */
252b5132
RH		 2474 toc_reloc = BFD_RELOC_UNUSED;
2475 as_bad (_("Unimplemented toc64 expression modifier"));
2476 break;
2477 default:
bc805888 2478 fprintf (stderr,
99a814a1
AM		 2479 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2480 toc_kind);
bc805888 2481 abort ();
252b5132
RH		 2482 break;
2483 }
2484
2485 /* We need to generate a fixup for this expression. */
2486 if (fc >= MAX_INSN_FIXUPS)
2487 as_fatal (_("too many fixups"));
2488
2489 fixups[fc].reloc = toc_reloc;
2490 fixups[fc].exp = ex;
2491 fixups[fc].opindex = *opindex_ptr;
2492 ++fc;
2493
99a814a1
AM		 2494 /* Ok. We've set up the fixup for the instruction. Now make it
2495 look like the constant 0 was found here. */
252b5132
RH		 2496 ex.X_unsigned = 1;
2497 ex.X_op = O_constant;
2498 ex.X_add_number = 0;
2499 ex.X_add_symbol = NULL;
2500 ex.X_op_symbol = NULL;
2501 }
2502
2503 else
2504#endif /* TE_PE */
2505 {
2ad068be
AM		 2506 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2507 || !register_name (&ex))
252b5132 2508 {
13abbae3
AM		 2509 char save_lex = lex_type['%'];
2510
252b5132 2511 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2512 {
2513 cr_operand = TRUE;
2514 lex_type['%'] |= LEX_BEGIN_NAME;
2515 }
252b5132 2516 expression (&ex);
b34976b6 2517 cr_operand = FALSE;
13abbae3 2518 lex_type['%'] = save_lex;
252b5132
RH		 2519 }
2520 }
2521
2522 str = input_line_pointer;
2523 input_line_pointer = hold;
2524
2525 if (ex.X_op == O_illegal)
2526 as_bad (_("illegal operand"));
2527 else if (ex.X_op == O_absent)
2528 as_bad (_("missing operand"));
2529 else if (ex.X_op == O_register)
2530 {
2531 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2532 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2533 }
2534 else if (ex.X_op == O_constant)
2535 {
2536#ifdef OBJ_ELF
81d4177b 2537 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2538 char *orig_str = str;
2539
2540 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2541 switch (reloc)
2542 {
2543 default:
2544 str = orig_str;
2545 break;
2546
2547 case BFD_RELOC_LO16:
2548 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2549 something which cleared it, we always produce a
2550 signed value. */
2551 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2552 ex.X_add_number &= 0xffff;
2553 else
0baf16f2 2554 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2555 break;
2556
2557 case BFD_RELOC_HI16:
0baf16f2
AM		 2558 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2559 ex.X_add_number = PPC_HI (ex.X_add_number);
2560 else
2561 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2562 break;
2563
2564 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2565 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2566 ex.X_add_number = PPC_HA (ex.X_add_number);
2567 else
2568 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2569 break;
2570
0baf16f2
AM		 2571 case BFD_RELOC_PPC64_HIGHER:
2572 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2573 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2574 else
2575 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2576 break;
2577
2578 case BFD_RELOC_PPC64_HIGHER_S:
2579 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2580 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2581 else
2582 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2583 break;
0baf16f2
AM		 2584
2585 case BFD_RELOC_PPC64_HIGHEST:
2586 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2587 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2588 else
2589 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2590 break;
2591
2592 case BFD_RELOC_PPC64_HIGHEST_S:
2593 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2594 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2595 else
2596 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2597 break;
252b5132 2598 }
0baf16f2 2599#endif /* OBJ_ELF */
252b5132 2600 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2601 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2602 }
2603#ifdef OBJ_ELF
2604 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2605 {
cdba85ec
AM		 2606 /* Some TLS tweaks. */
2607 switch (reloc)
2608 {
2609 default:
2610 break;
2611 case BFD_RELOC_PPC_TLS:
2612 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
783de163 2613 ppc_cpu, (char *) NULL, 0);
cdba85ec
AM		 2614 break;
2615 /* We'll only use the 32 (or 64) bit form of these relocations
2616 in constants. Instructions get the 16 bit form. */
2617 case BFD_RELOC_PPC_DTPREL:
2618 reloc = BFD_RELOC_PPC_DTPREL16;
2619 break;
2620 case BFD_RELOC_PPC_TPREL:
2621 reloc = BFD_RELOC_PPC_TPREL16;
2622 break;
2623 }
2624
99a814a1
AM		 2625 /* For the absolute forms of branches, convert the PC
2626 relative form back into the absolute. */
252b5132
RH		 2627 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2628 {
2629 switch (reloc)
2630 {
2631 case BFD_RELOC_PPC_B26:
2632 reloc = BFD_RELOC_PPC_BA26;
2633 break;
2634 case BFD_RELOC_PPC_B16:
2635 reloc = BFD_RELOC_PPC_BA16;
2636 break;
2637 case BFD_RELOC_PPC_B16_BRTAKEN:
2638 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2639 break;
2640 case BFD_RELOC_PPC_B16_BRNTAKEN:
2641 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2642 break;
2643 default:
2644 break;
2645 }
2646 }
2647
2b3c4602 2648 if (ppc_obj64
adadcc0c 2649 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2650 {
2651 switch (reloc)
2652 {
2653 case BFD_RELOC_16:
2654 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2655 break;
2656 case BFD_RELOC_LO16:
2657 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2658 break;
2659 case BFD_RELOC_16_GOTOFF:
2660 reloc = BFD_RELOC_PPC64_GOT16_DS;
2661 break;
2662 case BFD_RELOC_LO16_GOTOFF:
2663 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2664 break;
2665 case BFD_RELOC_LO16_PLTOFF:
2666 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2667 break;
1cfc59d5 2668 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2669 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2670 break;
2671 case BFD_RELOC_LO16_BASEREL:
2672 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2673 break;
2674 case BFD_RELOC_PPC_TOC16:
2675 reloc = BFD_RELOC_PPC64_TOC16_DS;
2676 break;
2677 case BFD_RELOC_PPC64_TOC16_LO:
2678 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2679 break;
2680 case BFD_RELOC_PPC64_PLTGOT16:
2681 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2682 break;
2683 case BFD_RELOC_PPC64_PLTGOT16_LO:
2684 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2685 break;
cdba85ec
AM		 2686 case BFD_RELOC_PPC_DTPREL16:
2687 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2688 break;
2689 case BFD_RELOC_PPC_DTPREL16_LO:
2690 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2691 break;
2692 case BFD_RELOC_PPC_TPREL16:
2693 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2694 break;
2695 case BFD_RELOC_PPC_TPREL16_LO:
2696 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2697 break;
2698 case BFD_RELOC_PPC_GOT_DTPREL16:
2699 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2700 case BFD_RELOC_PPC_GOT_TPREL16:
2701 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2702 break;
0baf16f2
AM		 2703 default:
2704 as_bad (_("unsupported relocation for DS offset field"));
2705 break;
2706 }
2707 }
2708
252b5132
RH		 2709 /* We need to generate a fixup for this expression. */
2710 if (fc >= MAX_INSN_FIXUPS)
2711 as_fatal (_("too many fixups"));
2712 fixups[fc].exp = ex;
2713 fixups[fc].opindex = 0;
2714 fixups[fc].reloc = reloc;
2715 ++fc;
2716 }
2717#endif /* OBJ_ELF */
2718
2719 else
2720 {
2721 /* We need to generate a fixup for this expression. */
2722 if (fc >= MAX_INSN_FIXUPS)
2723 as_fatal (_("too many fixups"));
2724 fixups[fc].exp = ex;
2725 fixups[fc].opindex = *opindex_ptr;
2726 fixups[fc].reloc = BFD_RELOC_UNUSED;
2727 ++fc;
2728 }
2729
2730 if (need_paren)
2731 {
2732 endc = ')';
2733 need_paren = 0;
c3d65c1c
BE		 2734 /* If expecting more operands, then we want to see "),". */
2735 if (*str == endc && opindex_ptr[1] != 0)
2736 {
2737 do
2738 ++str;
2739 while (ISSPACE (*str));
2740 endc = ',';
2741 }
252b5132
RH		 2742 }
2743 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2744 {
2745 endc = '(';
2746 need_paren = 1;
2747 }
2748 else
2749 endc = ',';
2750
2751 /* The call to expression should have advanced str past any
2752 whitespace. */
2753 if (*str != endc
2754 && (endc != ',' || *str != '\0'))
2755 {
2756 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2757 break;
2758 }
2759
2760 if (*str != '\0')
2761 ++str;
2762 }
2763
3882b010 2764 while (ISSPACE (*str))
252b5132
RH		 2765 ++str;
2766
2767 if (*str != '\0')
2768 as_bad (_("junk at end of line: `%s'"), str);
2769
dc1d03fc 2770#ifdef OBJ_ELF
6a0c61b7
EZ		 2771 /* Do we need/want a APUinfo section? */
2772 if (ppc_cpu & (PPC_OPCODE_SPE
2773 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2774 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2775 | PPC_OPCODE_RFMCI))
2776 {
2777 /* These are all version "1". */
2778 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2779 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2780 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2781 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2782 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2783 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2784 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2785 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2786 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2787 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2788 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2789 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2790 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2791 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2792 }
dc1d03fc 2793#endif
6a0c61b7 2794
252b5132
RH		 2795 /* Write out the instruction. */
2796 f = frag_more (4);
09b935ac
AM		 2797 addr_mod = frag_now_fix () & 3;
2798 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2799 as_bad (_("instruction address is not a multiple of 4"));
2800 frag_now->insn_addr = addr_mod;
2801 frag_now->has_code = 1;
252b5132
RH		 2802 md_number_to_chars (f, insn, 4);
2803
5d6f4f16
GK		 2804#ifdef OBJ_ELF
2805 dwarf2_emit_insn (4);
2806#endif
2807
252b5132
RH		 2808 /* Create any fixups. At this point we do not use a
2809 bfd_reloc_code_real_type, but instead just use the
2810 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2811 handle fixups for any operand type, although that is admittedly
2812 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2813 md_apply_fix. */
252b5132
RH		 2814 for (i = 0; i < fc; i++)
2815 {
2816 const struct powerpc_operand *operand;
2817
2818 operand = &powerpc_operands[fixups[i].opindex];
2819 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2820 {
99a814a1 2821 reloc_howto_type *reloc_howto;
252b5132
RH		 2822 int size;
2823 int offset;
2824 fixS *fixP;
2825
99a814a1 2826 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2827 if (!reloc_howto)
2828 abort ();
2829
2830 size = bfd_get_reloc_size (reloc_howto);
2831 offset = target_big_endian ? (4 - size) : 0;
2832
2833 if (size < 1 || size > 4)
bc805888 2834 abort ();
252b5132 2835
99a814a1
AM		 2836 fixP = fix_new_exp (frag_now,
2837 f - frag_now->fr_literal + offset,
2838 size,
2839 &fixups[i].exp,
2840 reloc_howto->pc_relative,
252b5132
RH		 2841 fixups[i].reloc);
2842
2843 /* Turn off complaints that the addend is too large for things like
2844 foo+100000@ha. */
2845 switch (fixups[i].reloc)
2846 {
2847 case BFD_RELOC_16_GOTOFF:
2848 case BFD_RELOC_PPC_TOC16:
2849 case BFD_RELOC_LO16:
2850 case BFD_RELOC_HI16:
2851 case BFD_RELOC_HI16_S:
0baf16f2 2852#ifdef OBJ_ELF
0baf16f2
AM		 2853 case BFD_RELOC_PPC64_HIGHER:
2854 case BFD_RELOC_PPC64_HIGHER_S:
2855 case BFD_RELOC_PPC64_HIGHEST:
2856 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2857#endif
252b5132
RH		 2858 fixP->fx_no_overflow = 1;
2859 break;
2860 default:
2861 break;
2862 }
2863 }
2864 else
99a814a1
AM		 2865 fix_new_exp (frag_now,
2866 f - frag_now->fr_literal,
2867 4,
252b5132
RH		 2868 &fixups[i].exp,
2869 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2870 ((bfd_reloc_code_real_type)
99a814a1 2871 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2872 }
2873}
2874
2875/* Handle a macro. Gather all the operands, transform them as
2876 described by the macro, and call md_assemble recursively. All the
2877 operands are separated by commas; we don't accept parentheses
2878 around operands here. */
2879
2880static void
98027b10 2881ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 2882{
2883 char *operands[10];
2884 unsigned int count;
2885 char *s;
2886 unsigned int len;
2887 const char *format;
db557034 2888 unsigned int arg;
252b5132
RH		 2889 char *send;
2890 char *complete;
2891
2892 /* Gather the users operands into the operands array. */
2893 count = 0;
2894 s = str;
2895 while (1)
2896 {
2897 if (count >= sizeof operands / sizeof operands[0])
2898 break;
2899 operands[count++] = s;
2900 s = strchr (s, ',');
2901 if (s == (char *) NULL)
2902 break;
2903 *s++ = '\0';
81d4177b 2904 }
252b5132
RH		 2905
2906 if (count != macro->operands)
2907 {
2908 as_bad (_("wrong number of operands"));
2909 return;
2910 }
2911
2912 /* Work out how large the string must be (the size is unbounded
2913 because it includes user input). */
2914 len = 0;
2915 format = macro->format;
2916 while (*format != '\0')
2917 {
2918 if (*format != '%')
2919 {
2920 ++len;
2921 ++format;
2922 }
2923 else
2924 {
2925 arg = strtol (format + 1, &send, 10);
db557034 2926 know (send != format && arg < count);
252b5132
RH		 2927 len += strlen (operands[arg]);
2928 format = send;
2929 }
2930 }
2931
2932 /* Put the string together. */
2933 complete = s = (char *) alloca (len + 1);
2934 format = macro->format;
2935 while (*format != '\0')
2936 {
2937 if (*format != '%')
2938 *s++ = *format++;
2939 else
2940 {
2941 arg = strtol (format + 1, &send, 10);
2942 strcpy (s, operands[arg]);
2943 s += strlen (s);
2944 format = send;
2945 }
2946 }
2947 *s = '\0';
2948
2949 /* Assemble the constructed instruction. */
2950 md_assemble (complete);
81d4177b 2951}
252b5132
RH		 2952\f
2953#ifdef OBJ_ELF
99a814a1 2954/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2955
2956int
98027b10 2957ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 2958{
2959 if (letter == 'e')
2960 return SHF_EXCLUDE;
2961
13ae64f3 2962 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2963 return -1;
252b5132
RH		 2964}
2965
2966int
98027b10 2967ppc_section_word (char *str, size_t len)
252b5132 2968{
9de8d8f1
RH		 2969 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2970 return SHF_EXCLUDE;
252b5132 2971
9de8d8f1 2972 return -1;
252b5132
RH		 2973}
2974
2975int
98027b10 2976ppc_section_type (char *str, size_t len)
252b5132 2977{
9de8d8f1
RH		 2978 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2979 return SHT_ORDERED;
252b5132 2980
9de8d8f1 2981 return -1;
252b5132
RH		 2982}
2983
2984int
98027b10 2985ppc_section_flags (int flags, int attr, int type)
252b5132
RH		 2986{
2987 if (type == SHT_ORDERED)
2988 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2989
2990 if (attr & SHF_EXCLUDE)
2991 flags |= SEC_EXCLUDE;
2992
2993 return flags;
2994}
2995#endif /* OBJ_ELF */
2996
2997\f
2998/* Pseudo-op handling. */
2999
3000/* The .byte pseudo-op. This is similar to the normal .byte
3001 pseudo-op, but it can also take a single ASCII string. */
3002
3003static void
98027b10 3004ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3005{
3006 if (*input_line_pointer != '\"')
3007 {
3008 cons (1);
3009 return;
3010 }
3011
3012 /* Gather characters. A real double quote is doubled. Unusual
3013 characters are not permitted. */
3014 ++input_line_pointer;
3015 while (1)
3016 {
3017 char c;
3018
3019 c = *input_line_pointer++;
3020
3021 if (c == '\"')
3022 {
3023 if (*input_line_pointer != '\"')
3024 break;
3025 ++input_line_pointer;
3026 }
3027
3028 FRAG_APPEND_1_CHAR (c);
3029 }
3030
3031 demand_empty_rest_of_line ();
3032}
3033\f
3034#ifdef OBJ_XCOFF
3035
3036/* XCOFF specific pseudo-op handling. */
3037
3038/* This is set if we are creating a .stabx symbol, since we don't want
3039 to handle symbol suffixes for such symbols. */
b34976b6 3040static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3041
3042/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3043 symbols in the .bss segment as though they were local common
67c1ffbe 3044 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3045 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3046
3047static void
98027b10 3048ppc_comm (int lcomm)
252b5132
RH		 3049{
3050 asection *current_seg = now_seg;
3051 subsegT current_subseg = now_subseg;
3052 char *name;
3053 char endc;
3054 char *end_name;
3055 offsetT size;
3056 offsetT align;
3057 symbolS *lcomm_sym = NULL;
3058 symbolS *sym;
3059 char *pfrag;
3060
3061 name = input_line_pointer;
3062 endc = get_symbol_end ();
3063 end_name = input_line_pointer;
3064 *end_name = endc;
3065
3066 if (*input_line_pointer != ',')
3067 {
3068 as_bad (_("missing size"));
3069 ignore_rest_of_line ();
3070 return;
3071 }
3072 ++input_line_pointer;
3073
3074 size = get_absolute_expression ();
3075 if (size < 0)
3076 {
3077 as_bad (_("negative size"));
3078 ignore_rest_of_line ();
3079 return;
3080 }
3081
3082 if (! lcomm)
3083 {
3084 /* The third argument to .comm is the alignment. */
3085 if (*input_line_pointer != ',')
1ad63b2f 3086 align = 2;
252b5132
RH		 3087 else
3088 {
3089 ++input_line_pointer;
3090 align = get_absolute_expression ();
3091 if (align <= 0)
3092 {
3093 as_warn (_("ignoring bad alignment"));
1ad63b2f 3094 align = 2;
252b5132
RH		 3095 }
3096 }
3097 }
3098 else
3099 {
3100 char *lcomm_name;
3101 char lcomm_endc;
3102
1ad63b2f 3103 if (size <= 4)
252b5132
RH		 3104 align = 2;
3105 else
3106 align = 3;
3107
3108 /* The third argument to .lcomm appears to be the real local
3109 common symbol to create. References to the symbol named in
3110 the first argument are turned into references to the third
3111 argument. */
3112 if (*input_line_pointer != ',')
3113 {
3114 as_bad (_("missing real symbol name"));
3115 ignore_rest_of_line ();
3116 return;
3117 }
3118 ++input_line_pointer;
3119
3120 lcomm_name = input_line_pointer;
3121 lcomm_endc = get_symbol_end ();
81d4177b 3122
252b5132
RH		 3123 lcomm_sym = symbol_find_or_make (lcomm_name);
3124
3125 *input_line_pointer = lcomm_endc;
3126 }
3127
3128 *end_name = '\0';
3129 sym = symbol_find_or_make (name);
3130 *end_name = endc;
3131
3132 if (S_IS_DEFINED (sym)
3133 || S_GET_VALUE (sym) != 0)
3134 {
3135 as_bad (_("attempt to redefine symbol"));
3136 ignore_rest_of_line ();
3137 return;
3138 }
81d4177b 3139
252b5132 3140 record_alignment (bss_section, align);
81d4177b 3141
252b5132
RH		 3142 if (! lcomm
3143 || ! S_IS_DEFINED (lcomm_sym))
3144 {
3145 symbolS *def_sym;
3146 offsetT def_size;
3147
3148 if (! lcomm)
3149 {
3150 def_sym = sym;
3151 def_size = size;
3152 S_SET_EXTERNAL (sym);
3153 }
3154 else
3155 {
809ffe0d 3156 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3157 def_sym = lcomm_sym;
3158 def_size = 0;
3159 }
3160
3161 subseg_set (bss_section, 1);
3162 frag_align (align, 0, 0);
81d4177b 3163
809ffe0d 3164 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3165 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3166 def_size, (char *) NULL);
3167 *pfrag = 0;
3168 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3169 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3170 }
3171 else if (lcomm)
3172 {
3173 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3174 symbol_get_frag (lcomm_sym)->fr_offset =
3175 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3176 &~ ((1 << align) - 1));
809ffe0d
ILT		 3177 if (align > symbol_get_tc (lcomm_sym)->align)
3178 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3179 }
3180
3181 if (lcomm)
3182 {
3183 /* Make sym an offset from lcomm_sym. */
3184 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3185 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3186 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3187 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3188 }
3189
3190 subseg_set (current_seg, current_subseg);
3191
3192 demand_empty_rest_of_line ();
3193}
3194
3195/* The .csect pseudo-op. This switches us into a different
3196 subsegment. The first argument is a symbol whose value is the
3197 start of the .csect. In COFF, csect symbols get special aux
3198 entries defined by the x_csect field of union internal_auxent. The
3199 optional second argument is the alignment (the default is 2). */
3200
3201static void
98027b10 3202ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3203{
3204 char *name;
3205 char endc;
3206 symbolS *sym;
931e13a6 3207 offsetT align;
252b5132
RH		 3208
3209 name = input_line_pointer;
3210 endc = get_symbol_end ();
81d4177b 3211
252b5132
RH		 3212 sym = symbol_find_or_make (name);
3213
3214 *input_line_pointer = endc;
3215
3216 if (S_GET_NAME (sym)[0] == '\0')
3217 {
3218 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3219 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3220 }
3221
931e13a6 3222 align = 2;
252b5132
RH		 3223 if (*input_line_pointer == ',')
3224 {
3225 ++input_line_pointer;
931e13a6 3226 align = get_absolute_expression ();
252b5132
RH		 3227 }
3228
931e13a6
AM		 3229 ppc_change_csect (sym, align);
3230
252b5132
RH		 3231 demand_empty_rest_of_line ();
3232}
3233
3234/* Change to a different csect. */
3235
3236static void
98027b10 3237ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3238{
3239 if (S_IS_DEFINED (sym))
809ffe0d 3240 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3241 else
3242 {
3243 symbolS **list_ptr;
3244 int after_toc;
3245 int hold_chunksize;
3246 symbolS *list;
931e13a6
AM		 3247 int is_code;
3248 segT sec;
252b5132
RH		 3249
3250 /* This is a new csect. We need to look at the symbol class to
3251 figure out whether it should go in the text section or the
3252 data section. */
3253 after_toc = 0;
931e13a6 3254 is_code = 0;
809ffe0d 3255 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3256 {
3257 case XMC_PR:
3258 case XMC_RO:
3259 case XMC_DB:
3260 case XMC_GL:
3261 case XMC_XO:
3262 case XMC_SV:
3263 case XMC_TI:
3264 case XMC_TB:
3265 S_SET_SEGMENT (sym, text_section);
809ffe0d 3266 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3267 ++ppc_text_subsegment;
3268 list_ptr = &ppc_text_csects;
931e13a6 3269 is_code = 1;
252b5132
RH		 3270 break;
3271 case XMC_RW:
3272 case XMC_TC0:
3273 case XMC_TC:
3274 case XMC_DS:
3275 case XMC_UA:
3276 case XMC_BS:
3277 case XMC_UC:
3278 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3279 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3280 == ppc_data_subsegment))
252b5132
RH		 3281 after_toc = 1;
3282 S_SET_SEGMENT (sym, data_section);
809ffe0d 3283 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3284 ++ppc_data_subsegment;
3285 list_ptr = &ppc_data_csects;
3286 break;
3287 default:
3288 abort ();
3289 }
3290
3291 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3292 changing subsegments, so that we don't use a lot of memory
3293 space for what may be a small section. */
252b5132
RH		 3294 hold_chunksize = chunksize;
3295 chunksize = 64;
3296
931e13a6
AM		 3297 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3298 symbol_get_tc (sym)->subseg);
252b5132
RH		 3299
3300 chunksize = hold_chunksize;
3301
3302 if (after_toc)
3303 ppc_after_toc_frag = frag_now;
3304
931e13a6
AM		 3305 record_alignment (sec, align);
3306 if (is_code)
3307 frag_align_code (align, 0);
3308 else
3309 frag_align (align, 0, 0);
3310
809ffe0d 3311 symbol_set_frag (sym, frag_now);
252b5132
RH		 3312 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3313
931e13a6 3314 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3315 symbol_get_tc (sym)->output = 1;
3316 symbol_get_tc (sym)->within = sym;
81d4177b 3317
252b5132 3318 for (list = *list_ptr;
809ffe0d
ILT		 3319 symbol_get_tc (list)->next != (symbolS *) NULL;
3320 list = symbol_get_tc (list)->next)
252b5132 3321 ;
809ffe0d 3322 symbol_get_tc (list)->next = sym;
81d4177b 3323
252b5132 3324 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3325 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3326 &symbol_lastP);
252b5132
RH		 3327 }
3328
3329 ppc_current_csect = sym;
3330}
3331
3332/* This function handles the .text and .data pseudo-ops. These
3333 pseudo-ops aren't really used by XCOFF; we implement them for the
3334 convenience of people who aren't used to XCOFF. */
3335
3336static void
98027b10 3337ppc_section (int type)
252b5132
RH		 3338{
3339 const char *name;
3340 symbolS *sym;
3341
3342 if (type == 't')
3343 name = ".text[PR]";
3344 else if (type == 'd')
3345 name = ".data[RW]";
3346 else
3347 abort ();
3348
3349 sym = symbol_find_or_make (name);
3350
931e13a6 3351 ppc_change_csect (sym, 2);
252b5132
RH		 3352
3353 demand_empty_rest_of_line ();
3354}
3355
3356/* This function handles the .section pseudo-op. This is mostly to
3357 give an error, since XCOFF only supports .text, .data and .bss, but
3358 we do permit the user to name the text or data section. */
3359
3360static void
98027b10 3361ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3362{
3363 char *user_name;
3364 const char *real_name;
3365 char c;
3366 symbolS *sym;
3367
3368 user_name = input_line_pointer;
3369 c = get_symbol_end ();
3370
3371 if (strcmp (user_name, ".text") == 0)
3372 real_name = ".text[PR]";
3373 else if (strcmp (user_name, ".data") == 0)
3374 real_name = ".data[RW]";
3375 else
3376 {
3377 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3378 *input_line_pointer = c;
3379 ignore_rest_of_line ();
3380 return;
3381 }
3382
3383 *input_line_pointer = c;
3384
3385 sym = symbol_find_or_make (real_name);
3386
931e13a6 3387 ppc_change_csect (sym, 2);
252b5132
RH		 3388
3389 demand_empty_rest_of_line ();
3390}
3391
3392/* The .extern pseudo-op. We create an undefined symbol. */
3393
3394static void
98027b10 3395ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3396{
3397 char *name;
3398 char endc;
3399
3400 name = input_line_pointer;
3401 endc = get_symbol_end ();
3402
3403 (void) symbol_find_or_make (name);
3404
3405 *input_line_pointer = endc;
3406
3407 demand_empty_rest_of_line ();
3408}
3409
3410/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3411
3412static void
98027b10 3413ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3414{
3415 char *name;
3416 char endc;
3417 symbolS *sym;
3418
3419 name = input_line_pointer;
3420 endc = get_symbol_end ();
3421
3422 sym = symbol_find_or_make (name);
3423
3424 *input_line_pointer = endc;
3425
809ffe0d 3426 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3427
3428 demand_empty_rest_of_line ();
3429}
3430
3431/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3432 although I don't know why it bothers. */
3433
3434static void
98027b10 3435ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3436{
3437 char *name;
3438 char endc;
3439 symbolS *sym;
3440 int len;
3441
3442 name = input_line_pointer;
3443 endc = get_symbol_end ();
3444
3445 sym = symbol_find_or_make (name);
3446
3447 *input_line_pointer = endc;
3448
3449 if (*input_line_pointer != ',')
3450 {
3451 as_bad (_("missing rename string"));
3452 ignore_rest_of_line ();
3453 return;
3454 }
3455 ++input_line_pointer;
3456
809ffe0d 3457 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3458
3459 demand_empty_rest_of_line ();
3460}
3461
3462/* The .stabx pseudo-op. This is similar to a normal .stabs
3463 pseudo-op, but slightly different. A sample is
3464 .stabx "main:F-1",.main,142,0
3465 The first argument is the symbol name to create. The second is the
3466 value, and the third is the storage class. The fourth seems to be
3467 always zero, and I am assuming it is the type. */
3468
3469static void
98027b10 3470ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3471{
3472 char *name;
3473 int len;
3474 symbolS *sym;
3475 expressionS exp;
3476
3477 name = demand_copy_C_string (&len);
3478
3479 if (*input_line_pointer != ',')
3480 {
3481 as_bad (_("missing value"));
3482 return;
3483 }
3484 ++input_line_pointer;
3485
b34976b6 3486 ppc_stab_symbol = TRUE;
252b5132 3487 sym = symbol_make (name);
b34976b6 3488 ppc_stab_symbol = FALSE;
252b5132 3489
809ffe0d 3490 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3491
3492 (void) expression (&exp);
3493
3494 switch (exp.X_op)
3495 {
3496 case O_illegal:
3497 case O_absent:
3498 case O_big:
3499 as_bad (_("illegal .stabx expression; zero assumed"));
3500 exp.X_add_number = 0;
3501 /* Fall through. */
3502 case O_constant:
3503 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3504 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3505 break;
3506
3507 case O_symbol:
3508 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3509 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3510 else
3511 {
3512 S_SET_VALUE (sym,
3513 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3514 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3515 }
3516 break;
3517
3518 default:
3519 /* The value is some complex expression. This will probably
99a814a1
AM		 3520 fail at some later point, but this is probably the right
3521 thing to do here. */
809ffe0d 3522 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3523 break;
3524 }
3525
3526 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3527 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3528
3529 if (*input_line_pointer != ',')
3530 {
3531 as_bad (_("missing class"));
3532 return;
3533 }
3534 ++input_line_pointer;
3535
3536 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3537
3538 if (*input_line_pointer != ',')
3539 {
3540 as_bad (_("missing type"));
3541 return;
3542 }
3543 ++input_line_pointer;
3544
3545 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3546
809ffe0d 3547 symbol_get_tc (sym)->output = 1;
252b5132 3548
6877bb43 3549 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3550
809ffe0d 3551 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3552
41ea10b1 3553 /* In this case :
99a814a1 3554
41ea10b1
TR		 3555 .bs name
3556 .stabx "z",arrays_,133,0
3557 .es
99a814a1 3558
41ea10b1 3559 .comm arrays_,13768,3
99a814a1 3560
41ea10b1
TR		 3561 resolve_symbol_value will copy the exp's "within" into sym's when the
3562 offset is 0. Since this seems to be corner case problem,
3563 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3564 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3565
3566 if (exp.X_op == O_symbol)
41ea10b1
TR		 3567 {
3568 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3569 }
6877bb43 3570 }
99a814a1 3571
252b5132
RH		 3572 if (exp.X_op != O_symbol
3573 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3574 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3575 ppc_frob_label (sym);
3576 else
3577 {
3578 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3579 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3580 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3581 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3582 }
3583
3584 demand_empty_rest_of_line ();
3585}
3586
3587/* The .function pseudo-op. This takes several arguments. The first
3588 argument seems to be the external name of the symbol. The second
67c1ffbe 3589 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3590 uses the same name for both. I have no idea what the third and
3591 fourth arguments are meant to be. The optional fifth argument is
3592 an expression for the size of the function. In COFF this symbol
3593 gets an aux entry like that used for a csect. */
3594
3595static void
98027b10 3596ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3597{
3598 char *name;
3599 char endc;
3600 char *s;
3601 symbolS *ext_sym;
3602 symbolS *lab_sym;
3603
3604 name = input_line_pointer;
3605 endc = get_symbol_end ();
3606
3607 /* Ignore any [PR] suffix. */
3608 name = ppc_canonicalize_symbol_name (name);
3609 s = strchr (name, '[');
3610 if (s != (char *) NULL
3611 && strcmp (s + 1, "PR]") == 0)
3612 *s = '\0';
3613
3614 ext_sym = symbol_find_or_make (name);
3615
3616 *input_line_pointer = endc;
3617
3618 if (*input_line_pointer != ',')
3619 {
3620 as_bad (_("missing symbol name"));
3621 ignore_rest_of_line ();
3622 return;
3623 }
3624 ++input_line_pointer;
3625
3626 name = input_line_pointer;
3627 endc = get_symbol_end ();
3628
3629 lab_sym = symbol_find_or_make (name);
3630
3631 *input_line_pointer = endc;
3632
3633 if (ext_sym != lab_sym)
3634 {
809ffe0d
ILT		 3635 expressionS exp;
3636
3637 exp.X_op = O_symbol;
3638 exp.X_add_symbol = lab_sym;
3639 exp.X_op_symbol = NULL;
3640 exp.X_add_number = 0;
3641 exp.X_unsigned = 0;
3642 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3643 }
3644
809ffe0d
ILT		 3645 if (symbol_get_tc (ext_sym)->class == -1)
3646 symbol_get_tc (ext_sym)->class = XMC_PR;
3647 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3648
3649 if (*input_line_pointer == ',')
3650 {
3651 expressionS ignore;
3652
3653 /* Ignore the third argument. */
3654 ++input_line_pointer;
3655 expression (&ignore);
3656 if (*input_line_pointer == ',')
3657 {
3658 /* Ignore the fourth argument. */
3659 ++input_line_pointer;
3660 expression (&ignore);
3661 if (*input_line_pointer == ',')
3662 {
3663 /* The fifth argument is the function size. */
3664 ++input_line_pointer;
809ffe0d
ILT		 3665 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3666 absolute_section,
3667 (valueT) 0,
3668 &zero_address_frag);
3669 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3670 }
3671 }
3672 }
3673
3674 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3675 SF_SET_FUNCTION (ext_sym);
3676 SF_SET_PROCESS (ext_sym);
3677 coff_add_linesym (ext_sym);
3678
3679 demand_empty_rest_of_line ();
3680}
3681
3682/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3683 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3684 with the correct line number */
5d6255fe 3685
8642cce8 3686static symbolS *saved_bi_sym = 0;
252b5132
RH		 3687
3688static void
98027b10 3689ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3690{
3691 symbolS *sym;
3692
3693 sym = symbol_make (".bf");
3694 S_SET_SEGMENT (sym, text_section);
809ffe0d 3695 symbol_set_frag (sym, frag_now);
252b5132
RH		 3696 S_SET_VALUE (sym, frag_now_fix ());
3697 S_SET_STORAGE_CLASS (sym, C_FCN);
3698
3699 coff_line_base = get_absolute_expression ();
3700
3701 S_SET_NUMBER_AUXILIARY (sym, 1);
3702 SA_SET_SYM_LNNO (sym, coff_line_base);
3703
8642cce8 3704 /* Line number for bi. */
5d6255fe 3705 if (saved_bi_sym)
8642cce8
TR		 3706 {
3707 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3708 saved_bi_sym = 0;
3709 }
5d6255fe 3710
8642cce8 3711
809ffe0d 3712 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3713
3714 ppc_frob_label (sym);
3715
3716 demand_empty_rest_of_line ();
3717}
3718
3719/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3720 ".ef", except that the line number is absolute, not relative to the
3721 most recent ".bf" symbol. */
3722
3723static void
98027b10 3724ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3725{
3726 symbolS *sym;
3727
3728 sym = symbol_make (".ef");
3729 S_SET_SEGMENT (sym, text_section);
809ffe0d 3730 symbol_set_frag (sym, frag_now);
252b5132
RH		 3731 S_SET_VALUE (sym, frag_now_fix ());
3732 S_SET_STORAGE_CLASS (sym, C_FCN);
3733 S_SET_NUMBER_AUXILIARY (sym, 1);
3734 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3735 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3736
3737 ppc_frob_label (sym);
3738
3739 demand_empty_rest_of_line ();
3740}
3741
3742/* The .bi and .ei pseudo-ops. These take a string argument and
3743 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3744 the symbol list. The value of .bi will be know when the next .bf
3745 is encountered. */
252b5132
RH		 3746
3747static void
98027b10 3748ppc_biei (int ei)
252b5132
RH		 3749{
3750 static symbolS *last_biei;
3751
3752 char *name;
3753 int len;
3754 symbolS *sym;
3755 symbolS *look;
3756
3757 name = demand_copy_C_string (&len);
3758
3759 /* The value of these symbols is actually file offset. Here we set
3760 the value to the index into the line number entries. In
3761 ppc_frob_symbols we set the fix_line field, which will cause BFD
3762 to do the right thing. */
3763
3764 sym = symbol_make (name);
3765 /* obj-coff.c currently only handles line numbers correctly in the
3766 .text section. */
3767 S_SET_SEGMENT (sym, text_section);
3768 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3769 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3770
3771 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3772 symbol_get_tc (sym)->output = 1;
81d4177b 3773
8642cce8 3774 /* Save bi. */
5d6255fe 3775 if (ei)
8642cce8
TR		 3776 saved_bi_sym = 0;
3777 else
3778 saved_bi_sym = sym;
3779
252b5132
RH		 3780 for (look = last_biei ? last_biei : symbol_rootP;
3781 (look != (symbolS *) NULL
3782 && (S_GET_STORAGE_CLASS (look) == C_FILE
3783 || S_GET_STORAGE_CLASS (look) == C_BINCL
3784 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3785 look = symbol_next (look))
3786 ;
3787 if (look != (symbolS *) NULL)
3788 {
3789 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3790 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3791 last_biei = sym;
3792 }
3793
3794 demand_empty_rest_of_line ();
3795}
3796
3797/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3798 There is one argument, which is a csect symbol. The value of the
3799 .bs symbol is the index of this csect symbol. */
3800
3801static void
98027b10 3802ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3803{
3804 char *name;
3805 char endc;
3806 symbolS *csect;
3807 symbolS *sym;
3808
3809 if (ppc_current_block != NULL)
3810 as_bad (_("nested .bs blocks"));
3811
3812 name = input_line_pointer;
3813 endc = get_symbol_end ();
3814
3815 csect = symbol_find_or_make (name);
3816
3817 *input_line_pointer = endc;
3818
3819 sym = symbol_make (".bs");
3820 S_SET_SEGMENT (sym, now_seg);
3821 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3822 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3823 symbol_get_tc (sym)->output = 1;
252b5132 3824
809ffe0d 3825 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3826
3827 ppc_frob_label (sym);
3828
3829 ppc_current_block = sym;
3830
3831 demand_empty_rest_of_line ();
3832}
3833
3834/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3835
3836static void
98027b10 3837ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3838{
3839 symbolS *sym;
3840
3841 if (ppc_current_block == NULL)
3842 as_bad (_(".es without preceding .bs"));
3843
3844 sym = symbol_make (".es");
3845 S_SET_SEGMENT (sym, now_seg);
3846 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3847 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3848 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3849
3850 ppc_frob_label (sym);
3851
3852 ppc_current_block = NULL;
3853
3854 demand_empty_rest_of_line ();
3855}
3856
3857/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3858 line number. */
3859
3860static void
98027b10 3861ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3862{
3863 symbolS *sym;
3864
3865 sym = symbol_make (".bb");
3866 S_SET_SEGMENT (sym, text_section);
809ffe0d 3867 symbol_set_frag (sym, frag_now);
252b5132
RH		 3868 S_SET_VALUE (sym, frag_now_fix ());
3869 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3870
3871 S_SET_NUMBER_AUXILIARY (sym, 1);
3872 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3873
809ffe0d 3874 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3875
3876 SF_SET_PROCESS (sym);
3877
3878 ppc_frob_label (sym);
3879
3880 demand_empty_rest_of_line ();
3881}
3882
3883/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3884 line number. */
3885
3886static void
98027b10 3887ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3888{
3889 symbolS *sym;
3890
3891 sym = symbol_make (".eb");
3892 S_SET_SEGMENT (sym, text_section);
809ffe0d 3893 symbol_set_frag (sym, frag_now);
252b5132
RH		 3894 S_SET_VALUE (sym, frag_now_fix ());
3895 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3896 S_SET_NUMBER_AUXILIARY (sym, 1);
3897 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3898 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3899
3900 SF_SET_PROCESS (sym);
3901
3902 ppc_frob_label (sym);
3903
3904 demand_empty_rest_of_line ();
3905}
3906
3907/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3908 specified name. */
3909
3910static void
98027b10 3911ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3912{
3913 char *name;
3914 int len;
3915 symbolS *sym;
3916
3917 name = demand_copy_C_string (&len);
3918 sym = symbol_make (name);
3919 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3920 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3921 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3922 S_SET_VALUE (sym, 0);
809ffe0d 3923 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3924
3925 ppc_frob_label (sym);
3926
3927 demand_empty_rest_of_line ();
3928}
3929
3930/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3931
3932static void
98027b10 3933ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3934{
3935 symbolS *sym;
3936
3937 sym = symbol_make (".ec");
3938 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3939 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3940 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3941 S_SET_VALUE (sym, 0);
809ffe0d 3942 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3943
3944 ppc_frob_label (sym);
3945
3946 demand_empty_rest_of_line ();
3947}
3948
3949/* The .toc pseudo-op. Switch to the .toc subsegment. */
3950
3951static void
98027b10 3952ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3953{
3954 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3955 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3956 else
3957 {
3958 subsegT subseg;
3959 symbolS *sym;
3960 symbolS *list;
81d4177b 3961
252b5132
RH		 3962 subseg = ppc_data_subsegment;
3963 ++ppc_data_subsegment;
3964
3965 subseg_new (segment_name (data_section), subseg);
3966 ppc_toc_frag = frag_now;
3967
3968 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3969 symbol_set_frag (sym, frag_now);
252b5132
RH		 3970 S_SET_SEGMENT (sym, data_section);
3971 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3972 symbol_get_tc (sym)->subseg = subseg;
3973 symbol_get_tc (sym)->output = 1;
3974 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3975
3976 ppc_toc_csect = sym;
81d4177b 3977
252b5132 3978 for (list = ppc_data_csects;
809ffe0d
ILT		 3979 symbol_get_tc (list)->next != (symbolS *) NULL;
3980 list = symbol_get_tc (list)->next)
252b5132 3981 ;
809ffe0d 3982 symbol_get_tc (list)->next = sym;
252b5132
RH		 3983
3984 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3985 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3986 &symbol_lastP);
252b5132
RH		 3987 }
3988
3989 ppc_current_csect = ppc_toc_csect;
3990
3991 demand_empty_rest_of_line ();
3992}
3993
3994/* The AIX assembler automatically aligns the operands of a .long or
3995 .short pseudo-op, and we want to be compatible. */
3996
3997static void
98027b10 3998ppc_xcoff_cons (int log_size)
252b5132
RH		 3999{
4000 frag_align (log_size, 0, 0);
4001 record_alignment (now_seg, log_size);
4002 cons (1 << log_size);
4003}
4004
4005static void
98027b10 4006ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4007{
4008 expressionS exp;
4009 int byte_count;
4010
4011 (void) expression (&exp);
4012
4013 if (exp.X_op != O_constant)
4014 {
4015 as_bad (_("non-constant byte count"));
4016 return;
4017 }
4018
4019 byte_count = exp.X_add_number;
4020
4021 if (*input_line_pointer != ',')
4022 {
4023 as_bad (_("missing value"));
4024 return;
4025 }
4026
4027 ++input_line_pointer;
4028 cons (byte_count);
4029}
4030
4031#endif /* OBJ_XCOFF */
0baf16f2 4032#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4033\f
4034/* The .tc pseudo-op. This is used when generating either XCOFF or
4035 ELF. This takes two or more arguments.
4036
4037 When generating XCOFF output, the first argument is the name to
4038 give to this location in the toc; this will be a symbol with class
0baf16f2 4039 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4040 this location in the TOC; often there is just one more argument, a
1049f94e 4041 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4042 depends on target word size. A 32-bit target uses 4-byte values, a
4043 64-bit target uses 8-byte values.
252b5132
RH		 4044
4045 When not generating XCOFF output, the arguments are the same, but
4046 the first argument is simply ignored. */
4047
4048static void
98027b10 4049ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4050{
4051#ifdef OBJ_XCOFF
4052
4053 /* Define the TOC symbol name. */
4054 {
4055 char *name;
4056 char endc;
4057 symbolS *sym;
4058
4059 if (ppc_toc_csect == (symbolS *) NULL
4060 || ppc_toc_csect != ppc_current_csect)
4061 {
4062 as_bad (_(".tc not in .toc section"));
4063 ignore_rest_of_line ();
4064 return;
4065 }
4066
4067 name = input_line_pointer;
4068 endc = get_symbol_end ();
4069
4070 sym = symbol_find_or_make (name);
4071
4072 *input_line_pointer = endc;
4073
4074 if (S_IS_DEFINED (sym))
4075 {
4076 symbolS *label;
4077
809ffe0d
ILT		 4078 label = symbol_get_tc (ppc_current_csect)->within;
4079 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 4080 {
4081 as_bad (_(".tc with no label"));
4082 ignore_rest_of_line ();
4083 return;
4084 }
4085
4086 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4087 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4088 S_SET_VALUE (label, S_GET_VALUE (sym));
4089
4090 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4091 ++input_line_pointer;
4092
4093 return;
4094 }
4095
4096 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4097 symbol_set_frag (sym, frag_now);
252b5132 4098 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4099 symbol_get_tc (sym)->class = XMC_TC;
4100 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4101
4102 ppc_frob_label (sym);
4103 }
4104
0baf16f2
AM		 4105#endif /* OBJ_XCOFF */
4106#ifdef OBJ_ELF
9c7977b3 4107 int align;
252b5132
RH		 4108
4109 /* Skip the TOC symbol name. */
4110 while (is_part_of_name (*input_line_pointer)
d13d4015 4111 || *input_line_pointer == ' '
252b5132
RH		 4112 || *input_line_pointer == '['
4113 || *input_line_pointer == ']'
4114 || *input_line_pointer == '{'
4115 || *input_line_pointer == '}')
4116 ++input_line_pointer;
4117
0baf16f2 4118 /* Align to a four/eight byte boundary. */
2b3c4602 4119 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4120 frag_align (align, 0, 0);
4121 record_alignment (now_seg, align);
0baf16f2 4122#endif /* OBJ_ELF */
252b5132
RH		 4123
4124 if (*input_line_pointer != ',')
4125 demand_empty_rest_of_line ();
4126 else
4127 {
4128 ++input_line_pointer;
2b3c4602 4129 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4130 }
4131}
0baf16f2
AM		 4132
4133/* Pseudo-op .machine. */
0baf16f2
AM		 4134
4135static void
98027b10 4136ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4137{
69c040df
AM		 4138 char *cpu_string;
4139#define MAX_HISTORY 100
fa452fa6 4140 static ppc_cpu_t *cpu_history;
69c040df
AM		 4141 static int curr_hist;
4142
4143 SKIP_WHITESPACE ();
4144
4145 if (*input_line_pointer == '"')
4146 {
4147 int len;
4148 cpu_string = demand_copy_C_string (&len);
4149 }
4150 else
4151 {
4152 char c;
4153 cpu_string = input_line_pointer;
4154 c = get_symbol_end ();
4155 cpu_string = xstrdup (cpu_string);
4156 *input_line_pointer = c;
4157 }
4158
4159 if (cpu_string != NULL)
4160 {
fa452fa6 4161 ppc_cpu_t old_cpu = ppc_cpu;
69c040df
AM		 4162 char *p;
4163
4164 for (p = cpu_string; *p != 0; p++)
4165 *p = TOLOWER (*p);
4166
4167 if (strcmp (cpu_string, "push") == 0)
4168 {
4169 if (cpu_history == NULL)
4170 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4171
4172 if (curr_hist >= MAX_HISTORY)
4173 as_bad (_(".machine stack overflow"));
4174 else
4175 cpu_history[curr_hist++] = ppc_cpu;
4176 }
4177 else if (strcmp (cpu_string, "pop") == 0)
4178 {
4179 if (curr_hist <= 0)
4180 as_bad (_(".machine stack underflow"));
4181 else
4182 ppc_cpu = cpu_history[--curr_hist];
4183 }
4184 else if (parse_cpu (cpu_string))
4185 ;
4186 else
4187 as_bad (_("invalid machine `%s'"), cpu_string);
4188
4189 if (ppc_cpu != old_cpu)
4190 ppc_setup_opcodes ();
4191 }
4192
4193 demand_empty_rest_of_line ();
0baf16f2
AM		 4194}
4195
4196/* See whether a symbol is in the TOC section. */
4197
4198static int
98027b10 4199ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4200{
4201#ifdef OBJ_XCOFF
4202 return symbol_get_tc (sym)->class == XMC_TC;
4203#endif
4204#ifdef OBJ_ELF
4205 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4206 if (ppc_obj64)
0baf16f2
AM		 4207 return strcmp (sname, ".toc") == 0;
4208 else
4209 return strcmp (sname, ".got") == 0;
4210#endif
4211}
4212#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4213\f
4214#ifdef TE_PE
4215
99a814a1 4216/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4217
4218/* Set the current section. */
4219static void
98027b10 4220ppc_set_current_section (segT new)
252b5132
RH		 4221{
4222 ppc_previous_section = ppc_current_section;
4223 ppc_current_section = new;
4224}
4225
4226/* pseudo-op: .previous
4227 behaviour: toggles the current section with the previous section.
4228 errors: None
99a814a1
AM		 4229 warnings: "No previous section" */
4230
252b5132 4231static void
98027b10 4232ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4233{
4234 symbolS *tmp;
4235
81d4177b 4236 if (ppc_previous_section == NULL)
252b5132 4237 {
99a814a1 4238 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4239 return;
4240 }
4241
99a814a1 4242 subseg_set (ppc_previous_section, 0);
252b5132 4243
99a814a1 4244 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4245}
4246
4247/* pseudo-op: .pdata
4248 behaviour: predefined read only data section
b34976b6 4249 double word aligned
252b5132
RH		 4250 errors: None
4251 warnings: None
4252 initial: .section .pdata "adr3"
b34976b6 4253 a - don't know -- maybe a misprint
252b5132
RH		 4254 d - initialized data
4255 r - readable
4256 3 - double word aligned (that would be 4 byte boundary)
4257
4258 commentary:
4259 Tag index tables (also known as the function table) for exception
99a814a1 4260 handling, debugging, etc. */
252b5132 4261
252b5132 4262static void
98027b10 4263ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4264{
81d4177b 4265 if (pdata_section == 0)
252b5132
RH		 4266 {
4267 pdata_section = subseg_new (".pdata", 0);
81d4177b 4268
252b5132
RH		 4269 bfd_set_section_flags (stdoutput, pdata_section,
4270 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4271 | SEC_READONLY | SEC_DATA ));
81d4177b 4272
252b5132
RH		 4273 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4274 }
4275 else
4276 {
99a814a1 4277 pdata_section = subseg_new (".pdata", 0);
252b5132 4278 }
99a814a1 4279 ppc_set_current_section (pdata_section);
252b5132
RH		 4280}
4281
4282/* pseudo-op: .ydata
4283 behaviour: predefined read only data section
b34976b6 4284 double word aligned
252b5132
RH		 4285 errors: None
4286 warnings: None
4287 initial: .section .ydata "drw3"
b34976b6 4288 a - don't know -- maybe a misprint
252b5132
RH		 4289 d - initialized data
4290 r - readable
4291 3 - double word aligned (that would be 4 byte boundary)
4292 commentary:
4293 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4294 debugging, etc. */
4295
252b5132 4296static void
98027b10 4297ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4298{
81d4177b 4299 if (ydata_section == 0)
252b5132
RH		 4300 {
4301 ydata_section = subseg_new (".ydata", 0);
4302 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4303 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4304 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4305
4306 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4307 }
4308 else
4309 {
4310 ydata_section = subseg_new (".ydata", 0);
4311 }
99a814a1 4312 ppc_set_current_section (ydata_section);
252b5132
RH		 4313}
4314
4315/* pseudo-op: .reldata
4316 behaviour: predefined read write data section
b34976b6 4317 double word aligned (4-byte)
252b5132
RH		 4318 FIXME: relocation is applied to it
4319 FIXME: what's the difference between this and .data?
4320 errors: None
4321 warnings: None
4322 initial: .section .reldata "drw3"
4323 d - initialized data
4324 r - readable
4325 w - writeable
4326 3 - double word aligned (that would be 8 byte boundary)
4327
4328 commentary:
4329 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4330 function descriptors, etc. */
4331
252b5132 4332static void
98027b10 4333ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4334{
4335 if (reldata_section == 0)
4336 {
4337 reldata_section = subseg_new (".reldata", 0);
4338
4339 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4340 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4341 | SEC_DATA));
252b5132
RH		 4342
4343 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4344 }
4345 else
4346 {
4347 reldata_section = subseg_new (".reldata", 0);
4348 }
99a814a1 4349 ppc_set_current_section (reldata_section);
252b5132
RH		 4350}
4351
4352/* pseudo-op: .rdata
4353 behaviour: predefined read only data section
b34976b6 4354 double word aligned
252b5132
RH		 4355 errors: None
4356 warnings: None
4357 initial: .section .rdata "dr3"
4358 d - initialized data
4359 r - readable
99a814a1
AM		 4360 3 - double word aligned (that would be 4 byte boundary) */
4361
252b5132 4362static void
98027b10 4363ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4364{
4365 if (rdata_section == 0)
4366 {
4367 rdata_section = subseg_new (".rdata", 0);
4368 bfd_set_section_flags (stdoutput, rdata_section,
4369 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4370 | SEC_READONLY | SEC_DATA ));
4371
4372 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4373 }
4374 else
4375 {
4376 rdata_section = subseg_new (".rdata", 0);
4377 }
99a814a1 4378 ppc_set_current_section (rdata_section);
252b5132
RH		 4379}
4380
4381/* pseudo-op: .ualong
81d4177b 4382 behaviour: much like .int, with the exception that no alignment is
b34976b6 4383 performed.
252b5132
RH		 4384 FIXME: test the alignment statement
4385 errors: None
99a814a1
AM		 4386 warnings: None */
4387
252b5132 4388static void
98027b10 4389ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4390{
99a814a1
AM		 4391 /* Try for long. */
4392 cons (4);
252b5132
RH		 4393}
4394
4395/* pseudo-op: .znop <symbol name>
4396 behaviour: Issue a nop instruction
b34976b6 4397 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4398 the supplied symbol name.
4399 errors: None
99a814a1
AM		 4400 warnings: Missing symbol name */
4401
252b5132 4402static void
98027b10 4403ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4404{
4405 unsigned long insn;
4406 const struct powerpc_opcode *opcode;
4407 expressionS ex;
4408 char *f;
252b5132 4409 symbolS *sym;
252b5132
RH		 4410 char *symbol_name;
4411 char c;
4412 char *name;
4413 unsigned int exp;
4414 flagword flags;
4415 asection *sec;
4416
99a814a1 4417 /* Strip out the symbol name. */
252b5132
RH		 4418 symbol_name = input_line_pointer;
4419 c = get_symbol_end ();
4420
4421 name = xmalloc (input_line_pointer - symbol_name + 1);
4422 strcpy (name, symbol_name);
4423
4424 sym = symbol_find_or_make (name);
4425
4426 *input_line_pointer = c;
4427
4428 SKIP_WHITESPACE ();
4429
4430 /* Look up the opcode in the hash table. */
4431 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4432
99a814a1 4433 /* Stick in the nop. */
252b5132
RH		 4434 insn = opcode->opcode;
4435
4436 /* Write out the instruction. */
4437 f = frag_more (4);
4438 md_number_to_chars (f, insn, 4);
4439 fix_new (frag_now,
4440 f - frag_now->fr_literal,
4441 4,
4442 sym,
4443 0,
4444 0,
4445 BFD_RELOC_16_GOT_PCREL);
4446
4447}
4448
81d4177b
KH		 4449/* pseudo-op:
4450 behaviour:
4451 errors:
99a814a1
AM		 4452 warnings: */
4453
252b5132 4454static void
98027b10 4455ppc_pe_comm (int lcomm)
252b5132 4456{
98027b10
AM		 4457 char *name;
4458 char c;
4459 char *p;
252b5132 4460 offsetT temp;
98027b10 4461 symbolS *symbolP;
252b5132
RH		 4462 offsetT align;
4463
4464 name = input_line_pointer;
4465 c = get_symbol_end ();
4466
99a814a1 4467 /* just after name is now '\0'. */
252b5132
RH		 4468 p = input_line_pointer;
4469 *p = c;
4470 SKIP_WHITESPACE ();
4471 if (*input_line_pointer != ',')
4472 {
4473 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4474 ignore_rest_of_line ();
4475 return;
4476 }
4477
4478 input_line_pointer++; /* skip ',' */
4479 if ((temp = get_absolute_expression ()) < 0)
4480 {
4481 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4482 ignore_rest_of_line ();
4483 return;
4484 }
4485
4486 if (! lcomm)
4487 {
4488 /* The third argument to .comm is the alignment. */
4489 if (*input_line_pointer != ',')
4490 align = 3;
4491 else
4492 {
4493 ++input_line_pointer;
4494 align = get_absolute_expression ();
4495 if (align <= 0)
4496 {
4497 as_warn (_("ignoring bad alignment"));
4498 align = 3;
4499 }
4500 }
4501 }
4502
4503 *p = 0;
4504 symbolP = symbol_find_or_make (name);
4505
4506 *p = c;
4507 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4508 {
4509 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4510 S_GET_NAME (symbolP));
4511 ignore_rest_of_line ();
4512 return;
4513 }
4514
4515 if (S_GET_VALUE (symbolP))
4516 {
4517 if (S_GET_VALUE (symbolP) != (valueT) temp)
4518 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4519 S_GET_NAME (symbolP),
4520 (long) S_GET_VALUE (symbolP),
4521 (long) temp);
4522 }
4523 else
4524 {
4525 S_SET_VALUE (symbolP, (valueT) temp);
4526 S_SET_EXTERNAL (symbolP);
86ebace2 4527 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4528 }
4529
4530 demand_empty_rest_of_line ();
4531}
4532
4533/*
4534 * implement the .section pseudo op:
4535 * .section name {, "flags"}
4536 * ^ ^
4537 * | +--- optional flags: 'b' for bss
4538 * | 'i' for info
4539 * +-- section name 'l' for lib
4540 * 'n' for noload
4541 * 'o' for over
4542 * 'w' for data
4543 * 'd' (apparently m88k for data)
4544 * 'x' for text
4545 * But if the argument is not a quoted string, treat it as a
4546 * subsegment number.
4547 *
4548 * FIXME: this is a copy of the section processing from obj-coff.c, with
4549 * additions/changes for the moto-pas assembler support. There are three
4550 * categories:
4551 *
81d4177b 4552 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4553 * setting bits that bfd probably neither understands or uses. The
4554 * correct approach (?) will have to incorporate extra fields attached
4555 * to the section to hold the system specific stuff. (krk)
4556 *
4557 * Section Contents:
4558 * 'a' - unknown - referred to in documentation, but no definition supplied
4559 * 'c' - section has code
4560 * 'd' - section has initialized data
4561 * 'u' - section has uninitialized data
4562 * 'i' - section contains directives (info)
4563 * 'n' - section can be discarded
4564 * 'R' - remove section at link time
4565 *
4566 * Section Protection:
4567 * 'r' - section is readable
4568 * 'w' - section is writeable
4569 * 'x' - section is executable
4570 * 's' - section is sharable
4571 *
4572 * Section Alignment:
4573 * '0' - align to byte boundary
4574 * '1' - align to halfword undary
4575 * '2' - align to word boundary
4576 * '3' - align to doubleword boundary
4577 * '4' - align to quadword boundary
4578 * '5' - align to 32 byte boundary
4579 * '6' - align to 64 byte boundary
4580 *
4581 */
4582
4583void
98027b10 4584ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4585{
99a814a1 4586 /* Strip out the section name. */
252b5132
RH		 4587 char *section_name;
4588 char c;
4589 char *name;
4590 unsigned int exp;
4591 flagword flags;
4592 segT sec;
4593 int align;
4594
4595 section_name = input_line_pointer;
4596 c = get_symbol_end ();
4597
4598 name = xmalloc (input_line_pointer - section_name + 1);
4599 strcpy (name, section_name);
4600
4601 *input_line_pointer = c;
4602
4603 SKIP_WHITESPACE ();
4604
4605 exp = 0;
4606 flags = SEC_NO_FLAGS;
4607
4608 if (strcmp (name, ".idata$2") == 0)
4609 {
4610 align = 0;
4611 }
4612 else if (strcmp (name, ".idata$3") == 0)
4613 {
4614 align = 0;
4615 }
4616 else if (strcmp (name, ".idata$4") == 0)
4617 {
4618 align = 2;
4619 }
4620 else if (strcmp (name, ".idata$5") == 0)
4621 {
4622 align = 2;
4623 }
4624 else if (strcmp (name, ".idata$6") == 0)
4625 {
4626 align = 1;
4627 }
4628 else
99a814a1
AM		 4629 /* Default alignment to 16 byte boundary. */
4630 align = 4;
252b5132
RH		 4631
4632 if (*input_line_pointer == ',')
4633 {
4634 ++input_line_pointer;
4635 SKIP_WHITESPACE ();
4636 if (*input_line_pointer != '"')
4637 exp = get_absolute_expression ();
4638 else
4639 {
4640 ++input_line_pointer;
4641 while (*input_line_pointer != '"'
4642 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4643 {
4644 switch (*input_line_pointer)
4645 {
4646 /* Section Contents */
4647 case 'a': /* unknown */
4648 as_bad (_("Unsupported section attribute -- 'a'"));
4649 break;
4650 case 'c': /* code section */
81d4177b 4651 flags |= SEC_CODE;
252b5132
RH		 4652 break;
4653 case 'd': /* section has initialized data */
4654 flags |= SEC_DATA;
4655 break;
4656 case 'u': /* section has uninitialized data */
4657 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4658 in winnt.h */
4659 flags |= SEC_ROM;
4660 break;
4661 case 'i': /* section contains directives (info) */
4662 /* FIXME: This is IMAGE_SCN_LNK_INFO
4663 in winnt.h */
4664 flags |= SEC_HAS_CONTENTS;
4665 break;
4666 case 'n': /* section can be discarded */
81d4177b 4667 flags &=~ SEC_LOAD;
252b5132
RH		 4668 break;
4669 case 'R': /* Remove section at link time */
4670 flags |= SEC_NEVER_LOAD;
4671 break;
8d452c78 4672#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4673 /* Section Protection */
4674 case 'r': /* section is readable */
4675 flags |= IMAGE_SCN_MEM_READ;
4676 break;
4677 case 'w': /* section is writeable */
4678 flags |= IMAGE_SCN_MEM_WRITE;
4679 break;
4680 case 'x': /* section is executable */
4681 flags |= IMAGE_SCN_MEM_EXECUTE;
4682 break;
4683 case 's': /* section is sharable */
4684 flags |= IMAGE_SCN_MEM_SHARED;
4685 break;
4686
4687 /* Section Alignment */
4688 case '0': /* align to byte boundary */
4689 flags |= IMAGE_SCN_ALIGN_1BYTES;
4690 align = 0;
4691 break;
4692 case '1': /* align to halfword boundary */
4693 flags |= IMAGE_SCN_ALIGN_2BYTES;
4694 align = 1;
4695 break;
4696 case '2': /* align to word boundary */
4697 flags |= IMAGE_SCN_ALIGN_4BYTES;
4698 align = 2;
4699 break;
4700 case '3': /* align to doubleword boundary */
4701 flags |= IMAGE_SCN_ALIGN_8BYTES;
4702 align = 3;
4703 break;
4704 case '4': /* align to quadword boundary */
4705 flags |= IMAGE_SCN_ALIGN_16BYTES;
4706 align = 4;
4707 break;
4708 case '5': /* align to 32 byte boundary */
4709 flags |= IMAGE_SCN_ALIGN_32BYTES;
4710 align = 5;
4711 break;
4712 case '6': /* align to 64 byte boundary */
4713 flags |= IMAGE_SCN_ALIGN_64BYTES;
4714 align = 6;
4715 break;
8d452c78 4716#endif
252b5132 4717 default:
99a814a1
AM		 4718 as_bad (_("unknown section attribute '%c'"),
4719 *input_line_pointer);
252b5132
RH		 4720 break;
4721 }
4722 ++input_line_pointer;
4723 }
4724 if (*input_line_pointer == '"')
4725 ++input_line_pointer;
4726 }
4727 }
4728
4729 sec = subseg_new (name, (subsegT) exp);
4730
99a814a1 4731 ppc_set_current_section (sec);
252b5132
RH		 4732
4733 if (flags != SEC_NO_FLAGS)
4734 {
4735 if (! bfd_set_section_flags (stdoutput, sec, flags))
4736 as_bad (_("error setting flags for \"%s\": %s"),
4737 bfd_section_name (stdoutput, sec),
4738 bfd_errmsg (bfd_get_error ()));
4739 }
4740
99a814a1 4741 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4742}
4743
4744static void
98027b10 4745ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4746{
4747 char *name;
4748 char endc;
4749 symbolS *ext_sym;
4750
4751 name = input_line_pointer;
4752 endc = get_symbol_end ();
4753
4754 ext_sym = symbol_find_or_make (name);
4755
4756 *input_line_pointer = endc;
4757
4758 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4759 SF_SET_FUNCTION (ext_sym);
4760 SF_SET_PROCESS (ext_sym);
4761 coff_add_linesym (ext_sym);
4762
4763 demand_empty_rest_of_line ();
4764}
4765
4766static void
98027b10 4767ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4768{
4769 if (tocdata_section == 0)
4770 {
4771 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4772 /* FIXME: section flags won't work. */
252b5132
RH		 4773 bfd_set_section_flags (stdoutput, tocdata_section,
4774 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4775 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4776
4777 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4778 }
4779 else
4780 {
4781 rdata_section = subseg_new (".tocd", 0);
4782 }
4783
99a814a1 4784 ppc_set_current_section (tocdata_section);
252b5132
RH		 4785
4786 demand_empty_rest_of_line ();
4787}
4788
4789/* Don't adjust TOC relocs to use the section symbol. */
4790
4791int
98027b10 4792ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4793{
4794 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4795}
4796
4797#endif
4798\f
4799#ifdef OBJ_XCOFF
4800
4801/* XCOFF specific symbol and file handling. */
4802
4803/* Canonicalize the symbol name. We use the to force the suffix, if
4804 any, to use square brackets, and to be in upper case. */
4805
4806char *
98027b10 4807ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4808{
4809 char *s;
4810
4811 if (ppc_stab_symbol)
4812 return name;
4813
4814 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4815 ;
4816 if (*s != '\0')
4817 {
4818 char brac;
4819
4820 if (*s == '[')
4821 brac = ']';
4822 else
4823 {
4824 *s = '[';
4825 brac = '}';
4826 }
4827
4828 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4829 *s = TOUPPER (*s);
252b5132
RH		 4830
4831 if (*s == '\0' || s[1] != '\0')
4832 as_bad (_("bad symbol suffix"));
4833
4834 *s = ']';
4835 }
4836
4837 return name;
4838}
4839
4840/* Set the class of a symbol based on the suffix, if any. This is
4841 called whenever a new symbol is created. */
4842
4843void
98027b10 4844ppc_symbol_new_hook (symbolS *sym)
252b5132 4845{
809ffe0d 4846 struct ppc_tc_sy *tc;
252b5132
RH		 4847 const char *s;
4848
809ffe0d
ILT		 4849 tc = symbol_get_tc (sym);
4850 tc->next = NULL;
4851 tc->output = 0;
4852 tc->class = -1;
4853 tc->real_name = NULL;
4854 tc->subseg = 0;
4855 tc->align = 0;
4856 tc->size = NULL;
4857 tc->within = NULL;
252b5132
RH		 4858
4859 if (ppc_stab_symbol)
4860 return;
4861
4862 s = strchr (S_GET_NAME (sym), '[');
4863 if (s == (const char *) NULL)
4864 {
4865 /* There is no suffix. */
4866 return;
4867 }
4868
4869 ++s;
4870
4871 switch (s[0])
4872 {
4873 case 'B':
4874 if (strcmp (s, "BS]") == 0)
809ffe0d 4875 tc->class = XMC_BS;
252b5132
RH		 4876 break;
4877 case 'D':
4878 if (strcmp (s, "DB]") == 0)
809ffe0d 4879 tc->class = XMC_DB;
252b5132 4880 else if (strcmp (s, "DS]") == 0)
809ffe0d 4881 tc->class = XMC_DS;
252b5132
RH		 4882 break;
4883 case 'G':
4884 if (strcmp (s, "GL]") == 0)
809ffe0d 4885 tc->class = XMC_GL;
252b5132
RH		 4886 break;
4887 case 'P':
4888 if (strcmp (s, "PR]") == 0)
809ffe0d 4889 tc->class = XMC_PR;
252b5132
RH		 4890 break;
4891 case 'R':
4892 if (strcmp (s, "RO]") == 0)
809ffe0d 4893 tc->class = XMC_RO;
252b5132 4894 else if (strcmp (s, "RW]") == 0)
809ffe0d 4895 tc->class = XMC_RW;
252b5132
RH		 4896 break;
4897 case 'S':
4898 if (strcmp (s, "SV]") == 0)
809ffe0d 4899 tc->class = XMC_SV;
252b5132
RH		 4900 break;
4901 case 'T':
4902 if (strcmp (s, "TC]") == 0)
809ffe0d 4903 tc->class = XMC_TC;
252b5132 4904 else if (strcmp (s, "TI]") == 0)
809ffe0d 4905 tc->class = XMC_TI;
252b5132 4906 else if (strcmp (s, "TB]") == 0)
809ffe0d 4907 tc->class = XMC_TB;
252b5132 4908 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4909 tc->class = XMC_TC0;
252b5132
RH		 4910 break;
4911 case 'U':
4912 if (strcmp (s, "UA]") == 0)
809ffe0d 4913 tc->class = XMC_UA;
252b5132 4914 else if (strcmp (s, "UC]") == 0)
809ffe0d 4915 tc->class = XMC_UC;
252b5132
RH		 4916 break;
4917 case 'X':
4918 if (strcmp (s, "XO]") == 0)
809ffe0d 4919 tc->class = XMC_XO;
252b5132
RH		 4920 break;
4921 }
4922
809ffe0d 4923 if (tc->class == -1)
252b5132
RH		 4924 as_bad (_("Unrecognized symbol suffix"));
4925}
4926
4927/* Set the class of a label based on where it is defined. This
4928 handles symbols without suffixes. Also, move the symbol so that it
4929 follows the csect symbol. */
4930
4931void
98027b10 4932ppc_frob_label (symbolS *sym)
252b5132
RH		 4933{
4934 if (ppc_current_csect != (symbolS *) NULL)
4935 {
809ffe0d
ILT		 4936 if (symbol_get_tc (sym)->class == -1)
4937 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4938
4939 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4940 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4941 &symbol_rootP, &symbol_lastP);
4942 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4943 }
07a53e5c
RH		 4944
4945#ifdef OBJ_ELF
4946 dwarf2_emit_label (sym);
4947#endif
252b5132
RH		 4948}
4949
4950/* This variable is set by ppc_frob_symbol if any absolute symbols are
4951 seen. It tells ppc_adjust_symtab whether it needs to look through
4952 the symbols. */
4953
b34976b6 4954static bfd_boolean ppc_saw_abs;
252b5132
RH		 4955
4956/* Change the name of a symbol just before writing it out. Set the
4957 real name if the .rename pseudo-op was used. Otherwise, remove any
4958 class suffix. Return 1 if the symbol should not be included in the
4959 symbol table. */
4960
4961int
98027b10 4962ppc_frob_symbol (symbolS *sym)
252b5132
RH		 4963{
4964 static symbolS *ppc_last_function;
4965 static symbolS *set_end;
4966
4967 /* Discard symbols that should not be included in the output symbol
4968 table. */
809ffe0d
ILT		 4969 if (! symbol_used_in_reloc_p (sym)
4970 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4971 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4972 && ! symbol_get_tc (sym)->output
252b5132
RH		 4973 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4974 return 1;
4975
a161fe53
AM		 4976 /* This one will disappear anyway. Don't make a csect sym for it. */
4977 if (sym == abs_section_sym)
4978 return 1;
4979
809ffe0d
ILT		 4980 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4981 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4982 else
4983 {
4984 const char *name;
4985 const char *s;
4986
4987 name = S_GET_NAME (sym);
4988 s = strchr (name, '[');
4989 if (s != (char *) NULL)
4990 {
4991 unsigned int len;
4992 char *snew;
4993
4994 len = s - name;
4995 snew = xmalloc (len + 1);
4996 memcpy (snew, name, len);
4997 snew[len] = '\0';
4998
4999 S_SET_NAME (sym, snew);
5000 }
5001 }
5002
5003 if (set_end != (symbolS *) NULL)
5004 {
5005 SA_SET_SYM_ENDNDX (set_end, sym);
5006 set_end = NULL;
5007 }
5008
5009 if (SF_GET_FUNCTION (sym))
5010 {
5011 if (ppc_last_function != (symbolS *) NULL)
5012 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5013 ppc_last_function = sym;
809ffe0d 5014 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5015 {
6386f3a7 5016 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5017 SA_SET_SYM_FSIZE (sym,
5018 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5019 }
5020 }
5021 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5022 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5023 {
5024 if (ppc_last_function == (symbolS *) NULL)
5025 as_bad (_(".ef with no preceding .function"));
5026 else
5027 {
5028 set_end = ppc_last_function;
5029 ppc_last_function = NULL;
5030
5031 /* We don't have a C_EFCN symbol, but we need to force the
5032 COFF backend to believe that it has seen one. */
5033 coff_last_function = NULL;
5034 }
5035 }
5036
670ec21d 5037 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5038 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5039 && S_GET_STORAGE_CLASS (sym) != C_FILE
5040 && S_GET_STORAGE_CLASS (sym) != C_FCN
5041 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5042 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5043 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5044 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5045 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5046 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5047 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5048
5049 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5050 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5051 {
5052 int i;
5053 union internal_auxent *a;
5054
5055 /* Create a csect aux. */
5056 i = S_GET_NUMBER_AUXILIARY (sym);
5057 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 5058 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5059 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 5060 {
5061 /* This is the TOC table. */
5062 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5063 a->x_csect.x_scnlen.l = 0;
5064 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5065 }
809ffe0d 5066 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5067 {
5068 /* This is a csect symbol. x_scnlen is the size of the
5069 csect. */
809ffe0d 5070 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5071 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5072 S_GET_SEGMENT (sym))
5073 - S_GET_VALUE (sym));
5074 else
5075 {
6386f3a7 5076 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5077 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5078 - S_GET_VALUE (sym));
5079 }
809ffe0d 5080 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5081 }
5082 else if (S_GET_SEGMENT (sym) == bss_section)
5083 {
5084 /* This is a common symbol. */
809ffe0d
ILT		 5085 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5086 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5087 if (S_IS_EXTERNAL (sym))
809ffe0d 5088 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5089 else
809ffe0d 5090 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5091 }
5092 else if (S_GET_SEGMENT (sym) == absolute_section)
5093 {
5094 /* This is an absolute symbol. The csect will be created by
99a814a1 5095 ppc_adjust_symtab. */
b34976b6 5096 ppc_saw_abs = TRUE;
252b5132 5097 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5098 if (symbol_get_tc (sym)->class == -1)
5099 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5100 }
5101 else if (! S_IS_DEFINED (sym))
5102 {
5103 /* This is an external symbol. */
5104 a->x_csect.x_scnlen.l = 0;
5105 a->x_csect.x_smtyp = XTY_ER;
5106 }
809ffe0d 5107 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5108 {
5109 symbolS *next;
5110
5111 /* This is a TOC definition. x_scnlen is the size of the
5112 TOC entry. */
5113 next = symbol_next (sym);
809ffe0d 5114 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5115 next = symbol_next (next);
5116 if (next == (symbolS *) NULL
809ffe0d 5117 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5118 {
5119 if (ppc_after_toc_frag == (fragS *) NULL)
5120 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5121 data_section)
5122 - S_GET_VALUE (sym));
5123 else
5124 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5125 - S_GET_VALUE (sym));
5126 }
5127 else
5128 {
6386f3a7 5129 resolve_symbol_value (next);
252b5132
RH		 5130 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5131 - S_GET_VALUE (sym));
5132 }
5133 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5134 }
5135 else
5136 {
5137 symbolS *csect;
5138
5139 /* This is a normal symbol definition. x_scnlen is the
5140 symbol index of the containing csect. */
5141 if (S_GET_SEGMENT (sym) == text_section)
5142 csect = ppc_text_csects;
5143 else if (S_GET_SEGMENT (sym) == data_section)
5144 csect = ppc_data_csects;
5145 else
5146 abort ();
5147
5148 /* Skip the initial dummy symbol. */
809ffe0d 5149 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5150
5151 if (csect == (symbolS *) NULL)
5152 {
5153 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5154 a->x_csect.x_scnlen.l = 0;
5155 }
5156 else
5157 {
809ffe0d 5158 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5159 {
6386f3a7 5160 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5161 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5162 > S_GET_VALUE (sym))
252b5132 5163 break;
809ffe0d 5164 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5165 }
5166
809ffe0d
ILT		 5167 a->x_csect.x_scnlen.p =
5168 coffsymbol (symbol_get_bfdsym (csect))->native;
5169 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5170 1;
252b5132
RH		 5171 }
5172 a->x_csect.x_smtyp = XTY_LD;
5173 }
81d4177b 5174
252b5132
RH		 5175 a->x_csect.x_parmhash = 0;
5176 a->x_csect.x_snhash = 0;
809ffe0d 5177 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5178 a->x_csect.x_smclas = XMC_PR;
5179 else
809ffe0d 5180 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5181 a->x_csect.x_stab = 0;
5182 a->x_csect.x_snstab = 0;
5183
5184 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5185 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5186 }
5187 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5188 {
5189 /* We want the value to be the symbol index of the referenced
5190 csect symbol. BFD will do that for us if we set the right
5191 flags. */
b782de16
AM		 5192 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5193 combined_entry_type *c = coffsymbol (bsym)->native;
5194
5195 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5196 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5197 }
5198 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5199 {
5200 symbolS *block;
5201 symbolS *csect;
5202
5203 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5204 block = symbol_get_tc (sym)->within;
5205 csect = symbol_get_tc (block)->within;
6386f3a7 5206 resolve_symbol_value (csect);
252b5132
RH		 5207 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5208 }
5209 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5210 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5211 {
5212 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5213 BFD will do that for us if we set the right flags. We have
5214 already set the value correctly. */
809ffe0d 5215 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5216 }
5217
5218 return 0;
5219}
5220
5221/* Adjust the symbol table. This creates csect symbols for all
5222 absolute symbols. */
5223
5224void
98027b10 5225ppc_adjust_symtab (void)
252b5132
RH		 5226{
5227 symbolS *sym;
5228
5229 if (! ppc_saw_abs)
5230 return;
5231
5232 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5233 {
5234 symbolS *csect;
5235 int i;
5236 union internal_auxent *a;
5237
5238 if (S_GET_SEGMENT (sym) != absolute_section)
5239 continue;
5240
5241 csect = symbol_create (".abs[XO]", absolute_section,
5242 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5243 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5244 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5245 i = S_GET_NUMBER_AUXILIARY (csect);
5246 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5247 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5248 a->x_csect.x_scnlen.l = 0;
5249 a->x_csect.x_smtyp = XTY_SD;
5250 a->x_csect.x_parmhash = 0;
5251 a->x_csect.x_snhash = 0;
5252 a->x_csect.x_smclas = XMC_XO;
5253 a->x_csect.x_stab = 0;
5254 a->x_csect.x_snstab = 0;
5255
5256 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5257
5258 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5259 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5260 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5261 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5262 }
5263
b34976b6 5264 ppc_saw_abs = FALSE;
252b5132
RH		 5265}
5266
5267/* Set the VMA for a section. This is called on all the sections in
5268 turn. */
5269
5270void
98027b10 5271ppc_frob_section (asection *sec)
252b5132 5272{
931e13a6 5273 static bfd_vma vma = 0;
252b5132 5274
931e13a6 5275 vma = md_section_align (sec, vma);
252b5132
RH		 5276 bfd_set_section_vma (stdoutput, sec, vma);
5277 vma += bfd_section_size (stdoutput, sec);
5278}
5279
5280#endif /* OBJ_XCOFF */
5281\f
252b5132 5282char *
98027b10 5283md_atof (int type, char *litp, int *sizep)
252b5132 5284{
499ac353 5285 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5286}
5287
5288/* Write a value out to the object file, using the appropriate
5289 endianness. */
5290
5291void
98027b10 5292md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5293{
5294 if (target_big_endian)
5295 number_to_chars_bigendian (buf, val, n);
5296 else
5297 number_to_chars_littleendian (buf, val, n);
5298}
5299
5300/* Align a section (I don't know why this is machine dependent). */
5301
5302valueT
3aeeedbb 5303md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5304{
3aeeedbb
AM		 5305#ifdef OBJ_ELF
5306 return addr;
5307#else
252b5132
RH		 5308 int align = bfd_get_section_alignment (stdoutput, seg);
5309
5310 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5311#endif
252b5132
RH		 5312}
5313
5314/* We don't have any form of relaxing. */
5315
5316int
98027b10
AM		 5317md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5318 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5319{
5320 abort ();
5321 return 0;
5322}
5323
5324/* Convert a machine dependent frag. We never generate these. */
5325
5326void
98027b10
AM		 5327md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5328 asection *sec ATTRIBUTE_UNUSED,
5329 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5330{
5331 abort ();
5332}
5333
5334/* We have no need to default values of symbols. */
5335
252b5132 5336symbolS *
98027b10 5337md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5338{
5339 return 0;
5340}
5341\f
5342/* Functions concerning relocs. */
5343
5344/* The location from which a PC relative jump should be calculated,
5345 given a PC relative reloc. */
5346
5347long
98027b10 5348md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5349{
5350 return fixp->fx_frag->fr_address + fixp->fx_where;
5351}
5352
5353#ifdef OBJ_XCOFF
5354
5355/* This is called to see whether a fixup should be adjusted to use a
5356 section symbol. We take the opportunity to change a fixup against
5357 a symbol in the TOC subsegment into a reloc against the
5358 corresponding .tc symbol. */
5359
5360int
98027b10 5361ppc_fix_adjustable (fixS *fix)
252b5132 5362{
b782de16
AM		 5363 valueT val = resolve_symbol_value (fix->fx_addsy);
5364 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5365 TC_SYMFIELD_TYPE *tc;
5366
5367 if (symseg == absolute_section)
5368 return 0;
252b5132 5369
252b5132 5370 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5371 && fix->fx_addsy != ppc_toc_csect
b782de16 5372 && symseg == data_section
252b5132
RH		 5373 && val >= ppc_toc_frag->fr_address
5374 && (ppc_after_toc_frag == (fragS *) NULL
5375 || val < ppc_after_toc_frag->fr_address))
5376 {
5377 symbolS *sy;
5378
5379 for (sy = symbol_next (ppc_toc_csect);
5380 sy != (symbolS *) NULL;
5381 sy = symbol_next (sy))
5382 {
b782de16
AM		 5383 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5384
5385 if (sy_tc->class == XMC_TC0)
252b5132 5386 continue;
b782de16 5387 if (sy_tc->class != XMC_TC)
252b5132 5388 break;
b782de16 5389 if (val == resolve_symbol_value (sy))
252b5132
RH		 5390 {
5391 fix->fx_addsy = sy;
5392 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5393 return 0;
5394 }
5395 }
5396
5397 as_bad_where (fix->fx_file, fix->fx_line,
5398 _("symbol in .toc does not match any .tc"));
5399 }
5400
5401 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5402 tc = symbol_get_tc (fix->fx_addsy);
5403 if (tc->subseg == 0
5404 && tc->class != XMC_TC0
5405 && tc->class != XMC_TC
5406 && symseg != bss_section
252b5132 5407 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5408 && (symseg != data_section
252b5132
RH		 5409 || ppc_toc_csect == NULL
5410 || val < ppc_toc_frag->fr_address
5411 || (ppc_after_toc_frag != NULL
5412 && val >= ppc_after_toc_frag->fr_address)))
5413 {
5414 symbolS *csect;
b782de16 5415 symbolS *next_csect;
252b5132 5416
b782de16 5417 if (symseg == text_section)
252b5132 5418 csect = ppc_text_csects;
b782de16 5419 else if (symseg == data_section)
252b5132
RH		 5420 csect = ppc_data_csects;
5421 else
5422 abort ();
5423
5424 /* Skip the initial dummy symbol. */
809ffe0d 5425 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5426
5427 if (csect != (symbolS *) NULL)
5428 {
b782de16
AM		 5429 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5430 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5431 {
5432 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5433 have to look through the full symbol table to see
5434 whether this is the csect we want. Note that we will
5435 only get here if the csect has zero length. */
b782de16
AM		 5436 if (symbol_get_frag (csect)->fr_address == val
5437 && S_GET_VALUE (csect) == val)
252b5132
RH		 5438 {
5439 symbolS *scan;
5440
809ffe0d 5441 for (scan = symbol_next (csect);
252b5132 5442 scan != NULL;
809ffe0d 5443 scan = symbol_next (scan))
252b5132 5444 {
809ffe0d 5445 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5446 break;
5447 if (scan == fix->fx_addsy)
5448 break;
5449 }
5450
5451 /* If we found the symbol before the next csect
99a814a1 5452 symbol, then this is the csect we want. */
252b5132
RH		 5453 if (scan == fix->fx_addsy)
5454 break;
5455 }
5456
b782de16 5457 csect = next_csect;
252b5132
RH		 5458 }
5459
b782de16 5460 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5461 fix->fx_addsy = csect;
5462 }
b782de16 5463 return 0;
252b5132
RH		 5464 }
5465
5466 /* Adjust a reloc against a .lcomm symbol to be against the base
5467 .lcomm. */
b782de16 5468 if (symseg == bss_section
252b5132
RH		 5469 && ! S_IS_EXTERNAL (fix->fx_addsy))
5470 {
b782de16
AM		 5471 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5472
5473 fix->fx_offset += val - resolve_symbol_value (sy);
5474 fix->fx_addsy = sy;
252b5132
RH		 5475 }
5476
5477 return 0;
5478}
5479
5480/* A reloc from one csect to another must be kept. The assembler
5481 will, of course, keep relocs between sections, and it will keep
5482 absolute relocs, but we need to force it to keep PC relative relocs
5483 between two csects in the same section. */
5484
5485int
98027b10 5486ppc_force_relocation (fixS *fix)
252b5132
RH		 5487{
5488 /* At this point fix->fx_addsy should already have been converted to
5489 a csect symbol. If the csect does not include the fragment, then
5490 we need to force the relocation. */
5491 if (fix->fx_pcrel
5492 && fix->fx_addsy != NULL
809ffe0d
ILT		 5493 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5494 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5495 > fix->fx_frag->fr_address)
5496 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5497 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5498 <= fix->fx_frag->fr_address))))
5499 return 1;
5500
ae6063d4 5501 return generic_force_reloc (fix);
252b5132
RH		 5502}
5503
5504#endif /* OBJ_XCOFF */
5505
0baf16f2 5506#ifdef OBJ_ELF
a161fe53
AM		 5507/* If this function returns non-zero, it guarantees that a relocation
5508 will be emitted for a fixup. */
5509
5510int
98027b10 5511ppc_force_relocation (fixS *fix)
a161fe53
AM		 5512{
5513 /* Branch prediction relocations must force a relocation, as must
5514 the vtable description relocs. */
5515 switch (fix->fx_r_type)
5516 {
5517 case BFD_RELOC_PPC_B16_BRTAKEN:
5518 case BFD_RELOC_PPC_B16_BRNTAKEN:
5519 case BFD_RELOC_PPC_BA16_BRTAKEN:
5520 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5521 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5522 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5523 return 1;
5524 default:
5525 break;
5526 }
5527
cdba85ec
AM		 5528 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5529 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5530 return 1;
5531
ae6063d4 5532 return generic_force_reloc (fix);
a161fe53
AM		 5533}
5534
0baf16f2 5535int
98027b10 5536ppc_fix_adjustable (fixS *fix)
252b5132 5537{
0baf16f2
AM		 5538 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5539 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5540 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5541 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5542 && fix->fx_r_type != BFD_RELOC_GPREL16
5543 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5544 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5545 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5546 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5547}
0baf16f2 5548#endif
252b5132 5549
3aeeedbb
AM		 5550/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5551 rs_align_code frag. */
5552
5553void
5554ppc_handle_align (struct frag *fragP)
5555{
5556 valueT count = (fragP->fr_next->fr_address
5557 - (fragP->fr_address + fragP->fr_fix));
5558
5559 if (count != 0 && (count & 3) == 0)
5560 {
5561 char *dest = fragP->fr_literal + fragP->fr_fix;
5562
5563 fragP->fr_var = 4;
5564 md_number_to_chars (dest, 0x60000000, 4);
5565
5566 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5567 {
5568 /* For power6, we want the last nop to be a group terminating
5569 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5570 immediately after this one, with its address set to the last
5571 nop location. This will automatically reduce the number of
5572 nops in the current frag by one. */
5573 if (count > 4)
5574 {
5575 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5576
5577 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5578 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5579 group_nop->fr_fix = 0;
5580 group_nop->fr_offset = 1;
5581 group_nop->fr_type = rs_fill;
5582 fragP->fr_next = group_nop;
5583 dest = group_nop->fr_literal;
5584 }
5585
5586 md_number_to_chars (dest, 0x60210000, 4);
5587 }
5588 }
5589}
5590
252b5132
RH		 5591/* Apply a fixup to the object code. This is called for all the
5592 fixups we generated by the call to fix_new_exp, above. In the call
5593 above we used a reloc code which was the largest legal reloc code
5594 plus the operand index. Here we undo that to recover the operand
5595 index. At this point all symbol values should be fully resolved,
5596 and we attempt to completely resolve the reloc. If we can not do
5597 that, we determine the correct reloc code and put it back in the
5598 fixup. */
5599
94f592af 5600void
98027b10 5601md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5602{
94f592af 5603 valueT value = * valP;
252b5132
RH		 5604
5605#ifdef OBJ_ELF
94f592af 5606 if (fixP->fx_addsy != NULL)
252b5132 5607 {
a161fe53 5608 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5609 if (fixP->fx_pcrel)
5610 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5611 }
5612 else
94f592af 5613 fixP->fx_done = 1;
252b5132 5614#else
a161fe53 5615 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5616 the symbol values. If we are doing this relocation the code in
5617 write.c is going to call bfd_install_relocation, which is also
5618 going to use the symbol value. That means that if the reloc is
5619 fully resolved we want to use *valP since bfd_install_relocation is
5620 not being used.
252b5132 5621 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5622 *valP, and must use fx_offset instead. However, if the reloc
5623 is PC relative, we do want to use *valP since it includes the
252b5132 5624 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5625 if (fixP->fx_addsy == (symbolS *) NULL)
5626 fixP->fx_done = 1;
5627
5628 else if (fixP->fx_pcrel)
5629 ;
5630
252b5132 5631 else
a161fe53
AM		 5632 value = fixP->fx_offset;
5633#endif
5634
5635 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5636 {
a161fe53
AM		 5637 /* We can't actually support subtracting a symbol. */
5638 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5639 }
252b5132 5640
94f592af 5641 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5642 {
5643 int opindex;
5644 const struct powerpc_operand *operand;
5645 char *where;
5646 unsigned long insn;
5647
94f592af 5648 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5649
5650 operand = &powerpc_operands[opindex];
5651
5652#ifdef OBJ_XCOFF
0baf16f2
AM		 5653 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5654 does not generate a reloc. It uses the offset of `sym' within its
5655 csect. Other usages, such as `.long sym', generate relocs. This
5656 is the documented behaviour of non-TOC symbols. */
252b5132 5657 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5658 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5659 && operand->shift == 0
2b3c4602 5660 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5661 && fixP->fx_addsy != NULL
5662 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5663 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5664 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5665 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5666 {
94f592af
NC		 5667 value = fixP->fx_offset;
5668 fixP->fx_done = 1;
252b5132
RH		 5669 }
5670#endif
5671
5672 /* Fetch the instruction, insert the fully resolved operand
5673 value, and stuff the instruction back again. */
94f592af 5674 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5675 if (target_big_endian)
5676 insn = bfd_getb32 ((unsigned char *) where);
5677 else
5678 insn = bfd_getl32 ((unsigned char *) where);
5679 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5680 fixP->tc_fix_data.ppc_cpu,
94f592af 5681 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5682 if (target_big_endian)
5683 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5684 else
5685 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5686
94f592af
NC		 5687 if (fixP->fx_done)
5688 /* Nothing else to do here. */
5689 return;
252b5132 5690
94f592af 5691 assert (fixP->fx_addsy != NULL);
0baf16f2 5692
252b5132
RH		 5693 /* Determine a BFD reloc value based on the operand information.
5694 We are only prepared to turn a few of the operands into
0baf16f2 5695 relocs. */
11b37b7b 5696 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5697 && operand->bitm == 0x3fffffc
11b37b7b 5698 && operand->shift == 0)
94f592af 5699 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5700 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5701 && operand->bitm == 0xfffc
11b37b7b 5702 && operand->shift == 0)
95210096
AM		 5703 {
5704 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5705#ifdef OBJ_XCOFF
5706 fixP->fx_size = 2;
5707 if (target_big_endian)
5708 fixP->fx_where += 2;
5709#endif
5710 }
11b37b7b 5711 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5712 && operand->bitm == 0x3fffffc
11b37b7b 5713 && operand->shift == 0)
94f592af 5714 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5715 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5716 && operand->bitm == 0xfffc
11b37b7b 5717 && operand->shift == 0)
95210096
AM		 5718 {
5719 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5720#ifdef OBJ_XCOFF
5721 fixP->fx_size = 2;
5722 if (target_big_endian)
5723 fixP->fx_where += 2;
5724#endif
5725 }
0baf16f2 5726#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5727 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5728 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5729 && operand->shift == 0)
11b37b7b 5730 {
a7fc733f
AM		 5731 if (ppc_is_toc_sym (fixP->fx_addsy))
5732 {
5733 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5734#ifdef OBJ_ELF
a7fc733f
AM		 5735 if (ppc_obj64
5736 && (operand->flags & PPC_OPERAND_DS) != 0)
5737 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5738#endif
5739 }
5740 else
5741 {
5742 fixP->fx_r_type = BFD_RELOC_16;
5743#ifdef OBJ_ELF
5744 if (ppc_obj64
5745 && (operand->flags & PPC_OPERAND_DS) != 0)
5746 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5747#endif
a7fc733f 5748 }
94f592af 5749 fixP->fx_size = 2;
11b37b7b 5750 if (target_big_endian)
94f592af 5751 fixP->fx_where += 2;
11b37b7b 5752 }
0baf16f2 5753#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5754 else
252b5132
RH		 5755 {
5756 char *sfile;
5757 unsigned int sline;
5758
5759 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5760 symbol. */
94f592af
NC		 5761 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5762 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5763 _("unresolved expression that must be resolved"));
5764 else
94f592af 5765 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5766 _("unsupported relocation against %s"),
94f592af
NC		 5767 S_GET_NAME (fixP->fx_addsy));
5768 fixP->fx_done = 1;
5769 return;
252b5132
RH		 5770 }
5771 }
5772 else
5773 {
5774#ifdef OBJ_ELF
94f592af 5775 ppc_elf_validate_fix (fixP, seg);
252b5132 5776#endif
94f592af 5777 switch (fixP->fx_r_type)
252b5132 5778 {
252b5132 5779 case BFD_RELOC_CTOR:
2b3c4602 5780 if (ppc_obj64)
9c7977b3
AM		 5781 goto ctor64;
5782 /* fall through */
5783
0baf16f2 5784 case BFD_RELOC_32:
94f592af
NC		 5785 if (fixP->fx_pcrel)
5786 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5787 /* fall through */
252b5132
RH		 5788
5789 case BFD_RELOC_RVA:
5790 case BFD_RELOC_32_PCREL:
252b5132 5791 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5792 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5793 value, 4);
5794 break;
5795
7f6d05e8 5796 case BFD_RELOC_64:
9c7977b3 5797 ctor64:
94f592af
NC		 5798 if (fixP->fx_pcrel)
5799 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5800 /* fall through */
0baf16f2 5801
7f6d05e8 5802 case BFD_RELOC_64_PCREL:
94f592af 5803 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5804 value, 8);
81d4177b 5805 break;
0baf16f2 5806
252b5132
RH		 5807 case BFD_RELOC_GPREL16:
5808 case BFD_RELOC_16_GOT_PCREL:
5809 case BFD_RELOC_16_GOTOFF:
5810 case BFD_RELOC_LO16_GOTOFF:
5811 case BFD_RELOC_HI16_GOTOFF:
5812 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5813 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5814 case BFD_RELOC_LO16_BASEREL:
5815 case BFD_RELOC_HI16_BASEREL:
5816 case BFD_RELOC_HI16_S_BASEREL:
5817 case BFD_RELOC_PPC_EMB_NADDR16:
5818 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5819 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5820 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5821 case BFD_RELOC_PPC_EMB_SDAI16:
5822 case BFD_RELOC_PPC_EMB_SDA2REL:
5823 case BFD_RELOC_PPC_EMB_SDA2I16:
5824 case BFD_RELOC_PPC_EMB_RELSEC16:
5825 case BFD_RELOC_PPC_EMB_RELST_LO:
5826 case BFD_RELOC_PPC_EMB_RELST_HI:
5827 case BFD_RELOC_PPC_EMB_RELST_HA:
5828 case BFD_RELOC_PPC_EMB_RELSDA:
5829 case BFD_RELOC_PPC_TOC16:
0baf16f2 5830#ifdef OBJ_ELF
0baf16f2
AM		 5831 case BFD_RELOC_PPC64_TOC16_LO:
5832 case BFD_RELOC_PPC64_TOC16_HI:
5833 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5834#endif
94f592af 5835 if (fixP->fx_pcrel)
252b5132 5836 {
94f592af
NC		 5837 if (fixP->fx_addsy != NULL)
5838 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5839 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5840 bfd_get_reloc_code_name (fixP->fx_r_type),
5841 S_GET_NAME (fixP->fx_addsy));
252b5132 5842 else
94f592af 5843 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5844 _("cannot emit PC relative %s relocation"),
94f592af 5845 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5846 }
5847
94f592af 5848 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5849 value, 2);
5850 break;
5851
3c9d25f4
AM		 5852 case BFD_RELOC_16:
5853 if (fixP->fx_pcrel)
5854 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5855 /* fall through */
5856
5857 case BFD_RELOC_16_PCREL:
5858 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5859 value, 2);
5860 break;
5861
5862 case BFD_RELOC_LO16:
5863 if (fixP->fx_pcrel)
5864 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5865 /* fall through */
5866
5867 case BFD_RELOC_LO16_PCREL:
5868 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5869 value, 2);
5870 break;
5871
252b5132
RH		 5872 /* This case happens when you write, for example,
5873 lis %r3,(L1-L2)@ha
5874 where L1 and L2 are defined later. */
5875 case BFD_RELOC_HI16:
94f592af 5876 if (fixP->fx_pcrel)
3c9d25f4
AM		 5877 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5878 /* fall through */
5879
5880 case BFD_RELOC_HI16_PCREL:
94f592af 5881 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5882 PPC_HI (value), 2);
252b5132 5883 break;
0baf16f2 5884
252b5132 5885 case BFD_RELOC_HI16_S:
94f592af 5886 if (fixP->fx_pcrel)
3c9d25f4
AM		 5887 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5888 /* fall through */
5889
5890 case BFD_RELOC_HI16_S_PCREL:
94f592af 5891 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5892 PPC_HA (value), 2);
5893 break;
5894
5895#ifdef OBJ_ELF
0baf16f2 5896 case BFD_RELOC_PPC64_HIGHER:
94f592af 5897 if (fixP->fx_pcrel)
0baf16f2 5898 abort ();
94f592af 5899 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5900 PPC_HIGHER (value), 2);
252b5132
RH		 5901 break;
5902
0baf16f2 5903 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5904 if (fixP->fx_pcrel)
0baf16f2 5905 abort ();
94f592af 5906 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5907 PPC_HIGHERA (value), 2);
5908 break;
5909
5910 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5911 if (fixP->fx_pcrel)
0baf16f2 5912 abort ();
94f592af 5913 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5914 PPC_HIGHEST (value), 2);
5915 break;
5916
5917 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5918 if (fixP->fx_pcrel)
0baf16f2 5919 abort ();
94f592af 5920 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5921 PPC_HIGHESTA (value), 2);
5922 break;
5923
5924 case BFD_RELOC_PPC64_ADDR16_DS:
5925 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5926 case BFD_RELOC_PPC64_GOT16_DS:
5927 case BFD_RELOC_PPC64_GOT16_LO_DS:
5928 case BFD_RELOC_PPC64_PLT16_LO_DS:
5929 case BFD_RELOC_PPC64_SECTOFF_DS:
5930 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5931 case BFD_RELOC_PPC64_TOC16_DS:
5932 case BFD_RELOC_PPC64_TOC16_LO_DS:
5933 case BFD_RELOC_PPC64_PLTGOT16_DS:
5934 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5935 if (fixP->fx_pcrel)
0baf16f2
AM		 5936 abort ();
5937 {
2132e3a3 5938 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5939 unsigned long val, mask;
0baf16f2
AM		 5940
5941 if (target_big_endian)
adadcc0c 5942 val = bfd_getb32 (where - 2);
0baf16f2 5943 else
adadcc0c
AM		 5944 val = bfd_getl32 (where);
5945 mask = 0xfffc;
5946 /* lq insns reserve the four lsbs. */
5947 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5948 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5949 mask = 0xfff0;
5950 val |= value & mask;
0baf16f2
AM		 5951 if (target_big_endian)
5952 bfd_putb16 ((bfd_vma) val, where);
5953 else
5954 bfd_putl16 ((bfd_vma) val, where);
5955 }
5956 break;
cdba85ec 5957
ba0b2174
AM		 5958 case BFD_RELOC_PPC_B16_BRTAKEN:
5959 case BFD_RELOC_PPC_B16_BRNTAKEN:
5960 case BFD_RELOC_PPC_BA16_BRTAKEN:
5961 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5962 break;
5963
cdba85ec 5964 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5965 break;
5966
cdba85ec
AM		 5967 case BFD_RELOC_PPC_DTPMOD:
5968 case BFD_RELOC_PPC_TPREL16:
5969 case BFD_RELOC_PPC_TPREL16_LO:
5970 case BFD_RELOC_PPC_TPREL16_HI:
5971 case BFD_RELOC_PPC_TPREL16_HA:
5972 case BFD_RELOC_PPC_TPREL:
5973 case BFD_RELOC_PPC_DTPREL16:
5974 case BFD_RELOC_PPC_DTPREL16_LO:
5975 case BFD_RELOC_PPC_DTPREL16_HI:
5976 case BFD_RELOC_PPC_DTPREL16_HA:
5977 case BFD_RELOC_PPC_DTPREL:
5978 case BFD_RELOC_PPC_GOT_TLSGD16:
5979 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5980 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5981 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5982 case BFD_RELOC_PPC_GOT_TLSLD16:
5983 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5984 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5985 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5986 case BFD_RELOC_PPC_GOT_TPREL16:
5987 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5988 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5989 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5990 case BFD_RELOC_PPC_GOT_DTPREL16:
5991 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5992 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5993 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5994 case BFD_RELOC_PPC64_TPREL16_DS:
5995 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5996 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5997 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5998 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5999 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6000 case BFD_RELOC_PPC64_DTPREL16_DS:
6001 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6002 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6003 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6004 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6005 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6006 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6007 break;
0baf16f2 6008#endif
252b5132 6009 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6010 bytes, rather than 2, so offset it here appropriately. */
252b5132 6011 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6012 if (fixP->fx_pcrel)
252b5132
RH		 6013 abort ();
6014
94f592af 6015 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6016 + ((target_big_endian) ? 2 : 0),
6017 value, 2);
6018 break;
6019
6020 case BFD_RELOC_8:
94f592af 6021 if (fixP->fx_pcrel)
31a91399
NC		 6022 {
6023 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6024 ".byte <undefined_symbol> - ." */
31a91399
NC		 6025 if (fixP->fx_addsy)
6026 as_bad (_("Unable to handle reference to symbol %s"),
6027 S_GET_NAME (fixP->fx_addsy));
6028 else
6029 as_bad (_("Unable to resolve expression"));
6030 fixP->fx_done = 1;
6031 }
6032 else
6033 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6034 value, 1);
252b5132
RH		 6035 break;
6036
6037 case BFD_RELOC_24_PLT_PCREL:
6038 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6039 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6040 abort ();
6041
94f592af 6042 if (fixP->fx_done)
99a814a1
AM		 6043 {
6044 char *where;
6045 unsigned long insn;
6046
6047 /* Fetch the instruction, insert the fully resolved operand
6048 value, and stuff the instruction back again. */
94f592af 6049 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6050 if (target_big_endian)
6051 insn = bfd_getb32 ((unsigned char *) where);
6052 else
6053 insn = bfd_getl32 ((unsigned char *) where);
6054 if ((value & 3) != 0)
94f592af 6055 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6056 _("must branch to an address a multiple of 4"));
6057 if ((offsetT) value < -0x40000000
6058 || (offsetT) value >= 0x40000000)
94f592af 6059 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6060 _("@local or @plt branch destination is too far away, %ld bytes"),
6061 (long) value);
6062 insn = insn | (value & 0x03fffffc);
6063 if (target_big_endian)
6064 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6065 else
6066 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6067 }
252b5132
RH		 6068 break;
6069
6070 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6071 fixP->fx_done = 0;
6072 if (fixP->fx_addsy
6073 && !S_IS_DEFINED (fixP->fx_addsy)
6074 && !S_IS_WEAK (fixP->fx_addsy))
6075 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6076 break;
6077
6078 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6079 fixP->fx_done = 0;
252b5132
RH		 6080 break;
6081
0baf16f2 6082#ifdef OBJ_ELF
0baf16f2
AM		 6083 /* Generated by reference to `sym@tocbase'. The sym is
6084 ignored by the linker. */
6085 case BFD_RELOC_PPC64_TOC:
94f592af 6086 fixP->fx_done = 0;
0baf16f2 6087 break;
0baf16f2 6088#endif
252b5132 6089 default:
bc805888 6090 fprintf (stderr,
94f592af 6091 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6092 fflush (stderr);
252b5132
RH		 6093 abort ();
6094 }
6095 }
6096
6097#ifdef OBJ_ELF
94f592af 6098 fixP->fx_addnumber = value;
4e6935a6
AM		 6099
6100 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6101 from the section contents. If we are going to be emitting a reloc
6102 then the section contents are immaterial, so don't warn if they
6103 happen to overflow. Leave such warnings to ld. */
6104 if (!fixP->fx_done)
6105 fixP->fx_no_overflow = 1;
252b5132 6106#else
94f592af
NC		 6107 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6108 fixP->fx_addnumber = 0;
252b5132
RH		 6109 else
6110 {
6111#ifdef TE_PE
94f592af 6112 fixP->fx_addnumber = 0;
252b5132 6113#else
8edcbfcd
TG		 6114 /* We want to use the offset within the toc, not the actual VMA
6115 of the symbol. */
94f592af 6116 fixP->fx_addnumber =
8edcbfcd
TG		 6117 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6118 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6119#endif
6120 }
6121#endif
252b5132
RH		 6122}
6123
6124/* Generate a reloc for a fixup. */
6125
6126arelent *
98027b10 6127tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6128{
6129 arelent *reloc;
6130
6131 reloc = (arelent *) xmalloc (sizeof (arelent));
6132
49309057
ILT		 6133 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6134 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6135 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6136 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6137 if (reloc->howto == (reloc_howto_type *) NULL)
6138 {
6139 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6140 _("reloc %d not supported by object file format"),
6141 (int) fixp->fx_r_type);
252b5132
RH		 6142 return NULL;
6143 }
6144 reloc->addend = fixp->fx_addnumber;
6145
6146 return reloc;
6147}
75e21f08
JJ		 6148
6149void
98027b10 6150ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6151{
6152 cfi_add_CFA_def_cfa (1, 0);
6153}
6154
6155int
1df69f4f 6156tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6157{
6158 unsigned int regnum = -1;
6159 unsigned int i;
6160 const char *p;
6161 char *q;
6162 static struct { char *name; int dw2regnum; } regnames[] =
6163 {
6164 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6165 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6166 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6167 { "spe_acc", 111 }, { "spefscr", 112 }
6168 };
6169
6170 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6171 if (strcmp (regnames[i].name, regname) == 0)
6172 return regnames[i].dw2regnum;
6173
6174 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6175 {
6176 p = regname + 1 + (regname[1] == '.');
6177 regnum = strtoul (p, &q, 10);
6178 if (p == q || *q || regnum >= 32)
6179 return -1;
6180 if (regname[0] == 'f')
b7d7dc63 6181 regnum += 32;
75e21f08 6182 else if (regname[0] == 'v')
b7d7dc63 6183 regnum += 77;
75e21f08
JJ		 6184 }
6185 else if (regname[0] == 'c' && regname[1] == 'r')
6186 {
6187 p = regname + 2 + (regname[2] == '.');
6188 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6189 return -1;
75e21f08
JJ		 6190 regnum = p[0] - '0' + 68;
6191 }
6192 return regnum;
6193}
GDB Binutils - Deliverables
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