projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Use input_bfd in relocate_section
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
6f2750fe 2 Copyright (C) 1994-2016 Free Software Foundation, Inc.
252b5132
RH		 3 Written by Ian Lance Taylor, Cygnus Support.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
ec2655a6 9 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
252b5132 21
252b5132 22#include "as.h"
3882b010 23#include "safe-ctype.h"
252b5132 24#include "subsegs.h"
75e21f08 25#include "dw2gencfi.h"
252b5132
RH		 26#include "opcode/ppc.h"
27
28#ifdef OBJ_ELF
29#include "elf/ppc.h"
ee67d69a 30#include "elf/ppc64.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
85645aed
TG		 38#ifdef OBJ_XCOFF
39#include "coff/xcoff.h"
40#include "libxcoff.h"
41#endif
42
252b5132
RH		 43/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
44
45/* Tell the main code what the endianness is. */
46extern int target_big_endian;
47
48/* Whether or not, we've set target_big_endian. */
49static int set_target_endian = 0;
50
51/* Whether to use user friendly register names. */
52#ifndef TARGET_REG_NAMES_P
53#ifdef TE_PE
b34976b6 54#define TARGET_REG_NAMES_P TRUE
252b5132 55#else
b34976b6 56#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 57#endif
58#endif
59
0baf16f2
AM		 60/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
61 HIGHESTA. */
62
63/* #lo(value) denotes the least significant 16 bits of the indicated. */
64#define PPC_LO(v) ((v) & 0xffff)
65
66/* #hi(value) denotes bits 16 through 31 of the indicated value. */
67#define PPC_HI(v) (((v) >> 16) & 0xffff)
68
69/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
71 signed number. */
15c1449b 72#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 73
74/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 75#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 76
77/* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
15c1449b 79#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 80
81/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 82#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 83
84/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 85 compensating for #lo being treated as a signed number. */
86#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2 87
f9c6b907
AM		 88#define SEX16(val) (((val) ^ 0x8000) - 0x8000)
89
90/* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92#define REPORT_OVERFLOW_HI 0
0baf16f2 93
b34976b6 94static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 95
98027b10
AM		 96static void ppc_macro (char *, const struct powerpc_macro *);
97static void ppc_byte (int);
0baf16f2
AM		 98
99#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 100static void ppc_tc (int);
101static void ppc_machine (int);
0baf16f2 102#endif
252b5132
RH		 103
104#ifdef OBJ_XCOFF
98027b10
AM		 105static void ppc_comm (int);
106static void ppc_bb (int);
107static void ppc_bc (int);
108static void ppc_bf (int);
109static void ppc_biei (int);
110static void ppc_bs (int);
111static void ppc_eb (int);
112static void ppc_ec (int);
113static void ppc_ef (int);
114static void ppc_es (int);
115static void ppc_csect (int);
85645aed 116static void ppc_dwsect (int);
98027b10
AM		 117static void ppc_change_csect (symbolS *, offsetT);
118static void ppc_function (int);
119static void ppc_extern (int);
120static void ppc_lglobl (int);
c865e45b 121static void ppc_ref (int);
98027b10
AM		 122static void ppc_section (int);
123static void ppc_named_section (int);
124static void ppc_stabx (int);
125static void ppc_rename (int);
126static void ppc_toc (int);
127static void ppc_xcoff_cons (int);
128static void ppc_vbyte (int);
252b5132
RH		 129#endif
130
131#ifdef OBJ_ELF
98027b10
AM		 132static void ppc_elf_rdata (int);
133static void ppc_elf_lcomm (int);
6911b7dc 134static void ppc_elf_localentry (int);
ee67d69a 135static void ppc_elf_abiversion (int);
005d79fd 136static void ppc_elf_gnu_attribute (int);
252b5132
RH		 137#endif
138
139#ifdef TE_PE
98027b10
AM		 140static void ppc_previous (int);
141static void ppc_pdata (int);
142static void ppc_ydata (int);
143static void ppc_reldata (int);
144static void ppc_rdata (int);
145static void ppc_ualong (int);
146static void ppc_znop (int);
147static void ppc_pe_comm (int);
148static void ppc_pe_section (int);
149static void ppc_pe_function (int);
150static void ppc_pe_tocd (int);
252b5132
RH		 151#endif
152\f
153/* Generic assembler global variables which must be defined by all
154 targets. */
155
156#ifdef OBJ_ELF
157/* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161static const char ppc_solaris_comment_chars[] = "#!";
162static const char ppc_eabi_comment_chars[] = "#";
163
164#ifdef TARGET_SOLARIS_COMMENT
165const char *ppc_comment_chars = ppc_solaris_comment_chars;
166#else
167const char *ppc_comment_chars = ppc_eabi_comment_chars;
168#endif
169#else
170const char comment_chars[] = "#";
171#endif
172
173/* Characters which start a comment at the beginning of a line. */
174const char line_comment_chars[] = "#";
175
176/* Characters which may be used to separate multiple commands on a
177 single line. */
178const char line_separator_chars[] = ";";
179
180/* Characters which are used to indicate an exponent in a floating
181 point number. */
182const char EXP_CHARS[] = "eE";
183
184/* Characters which mean that a number is a floating point constant,
185 as in 0d1.0. */
186const char FLT_CHARS[] = "dD";
5ce8663f 187
5e02f92e 188/* Anything that can start an operand needs to be mentioned here,
ac805826 189 to stop the input scrubber eating whitespace. */
5e02f92e 190const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 191
192/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193int ppc_cie_data_alignment;
783de163 194
8fbf7334
JL		 195/* The dwarf2 minimum instruction length. */
196int ppc_dwarf2_line_min_insn_length;
197
cef4f754
AM		 198/* More than this number of nops in an alignment op gets a branch
199 instead. */
200unsigned long nop_limit = 4;
201
783de163
AM		 202/* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 204ppc_cpu_t ppc_cpu = 0;
776fc418 205ppc_cpu_t sticky = 0;
01efc3af 206
ee67d69a
AM		 207/* Value for ELF e_flags EF_PPC64_ABI. */
208unsigned int ppc_abiversion = 0;
209
05f7541e 210#ifdef OBJ_ELF
01efc3af 211/* Flags set on encountering toc relocs. */
4f2a7b51 212static enum {
01efc3af
AM		 213 has_large_toc_reloc = 1,
214 has_small_toc_reloc = 2
215} toc_reloc_types;
05f7541e 216#endif
bf7279d5
AM		 217
218/* Warn on emitting data to code sections. */
219int warn_476;
220unsigned long last_insn;
221segT last_seg;
222subsegT last_subseg;
252b5132
RH		 223\f
224/* The target specific pseudo-ops which we support. */
225
226const pseudo_typeS md_pseudo_table[] =
227{
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte, 0 },
230
231#ifdef OBJ_XCOFF
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm, 0 },
237 { "lcomm", ppc_comm, 1 },
238 { "bb", ppc_bb, 0 },
239 { "bc", ppc_bc, 0 },
240 { "bf", ppc_bf, 0 },
241 { "bi", ppc_biei, 0 },
242 { "bs", ppc_bs, 0 },
243 { "csect", ppc_csect, 0 },
85645aed 244 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 245 { "data", ppc_section, 'd' },
246 { "eb", ppc_eb, 0 },
247 { "ec", ppc_ec, 0 },
248 { "ef", ppc_ef, 0 },
249 { "ei", ppc_biei, 1 },
250 { "es", ppc_es, 0 },
251 { "extern", ppc_extern, 0 },
252 { "function", ppc_function, 0 },
253 { "lglobl", ppc_lglobl, 0 },
c865e45b 254 { "ref", ppc_ref, 0 },
252b5132
RH		 255 { "rename", ppc_rename, 0 },
256 { "section", ppc_named_section, 0 },
257 { "stabx", ppc_stabx, 0 },
258 { "text", ppc_section, 't' },
259 { "toc", ppc_toc, 0 },
260 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 261 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 262 { "word", ppc_xcoff_cons, 1 },
263 { "short", ppc_xcoff_cons, 1 },
264 { "vbyte", ppc_vbyte, 0 },
265#endif
266
267#ifdef OBJ_ELF
62ebcb5c 268 { "llong", cons, 8 },
252b5132
RH		 269 { "rdata", ppc_elf_rdata, 0 },
270 { "rodata", ppc_elf_rdata, 0 },
271 { "lcomm", ppc_elf_lcomm, 0 },
6911b7dc 272 { "localentry", ppc_elf_localentry, 0 },
ee67d69a 273 { "abiversion", ppc_elf_abiversion, 0 },
005d79fd 274 { "gnu_attribute", ppc_elf_gnu_attribute, 0},
252b5132
RH		 275#endif
276
277#ifdef TE_PE
99a814a1 278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 279 { "previous", ppc_previous, 0 },
280 { "pdata", ppc_pdata, 0 },
281 { "ydata", ppc_ydata, 0 },
282 { "reldata", ppc_reldata, 0 },
283 { "rdata", ppc_rdata, 0 },
284 { "ualong", ppc_ualong, 0 },
285 { "znop", ppc_znop, 0 },
286 { "comm", ppc_pe_comm, 0 },
287 { "lcomm", ppc_pe_comm, 1 },
288 { "section", ppc_pe_section, 0 },
289 { "function", ppc_pe_function,0 },
290 { "tocd", ppc_pe_tocd, 0 },
291#endif
292
0baf16f2 293#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 294 { "tc", ppc_tc, 0 },
0baf16f2
AM		 295 { "machine", ppc_machine, 0 },
296#endif
252b5132
RH		 297
298 { NULL, NULL, 0 }
299};
300
301\f
99a814a1
AM		 302/* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
252b5132
RH		 305
306/* Structure to hold information about predefined registers. */
307struct pd_reg
308 {
e0471c16 309 const char *name;
252b5132
RH		 310 int value;
311 };
312
313/* List of registers that are pre-defined:
314
315 Each general register has predefined names of the form:
316 1. r<reg_num> which has the value <reg_num>.
317 2. r.<reg_num> which has the value <reg_num>.
318
252b5132
RH		 319 Each floating point register has predefined names of the form:
320 1. f<reg_num> which has the value <reg_num>.
321 2. f.<reg_num> which has the value <reg_num>.
322
7a899fff
C		 323 Each vector unit register has predefined names of the form:
324 1. v<reg_num> which has the value <reg_num>.
325 2. v.<reg_num> which has the value <reg_num>.
326
252b5132
RH		 327 Each condition register has predefined names of the form:
328 1. cr<reg_num> which has the value <reg_num>.
329 2. cr.<reg_num> which has the value <reg_num>.
330
331 There are individual registers as well:
332 sp or r.sp has the value 1
333 rtoc or r.toc has the value 2
334 fpscr has the value 0
335 xer has the value 1
336 lr has the value 8
337 ctr has the value 9
338 pmr has the value 0
339 dar has the value 19
340 dsisr has the value 18
341 dec has the value 22
342 sdr1 has the value 25
343 srr0 has the value 26
344 srr1 has the value 27
345
81d4177b 346 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 347
348static const struct pd_reg pre_defined_registers[] =
349{
350 { "cr.0", 0 }, /* Condition Registers */
351 { "cr.1", 1 },
352 { "cr.2", 2 },
353 { "cr.3", 3 },
354 { "cr.4", 4 },
355 { "cr.5", 5 },
356 { "cr.6", 6 },
357 { "cr.7", 7 },
358
359 { "cr0", 0 },
360 { "cr1", 1 },
361 { "cr2", 2 },
362 { "cr3", 3 },
363 { "cr4", 4 },
364 { "cr5", 5 },
365 { "cr6", 6 },
366 { "cr7", 7 },
367
368 { "ctr", 9 },
369
370 { "dar", 19 }, /* Data Access Register */
371 { "dec", 22 }, /* Decrementer */
372 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
373
374 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 375 { "f.1", 1 },
376 { "f.10", 10 },
377 { "f.11", 11 },
378 { "f.12", 12 },
379 { "f.13", 13 },
380 { "f.14", 14 },
381 { "f.15", 15 },
382 { "f.16", 16 },
383 { "f.17", 17 },
384 { "f.18", 18 },
385 { "f.19", 19 },
386 { "f.2", 2 },
387 { "f.20", 20 },
388 { "f.21", 21 },
389 { "f.22", 22 },
390 { "f.23", 23 },
391 { "f.24", 24 },
392 { "f.25", 25 },
393 { "f.26", 26 },
394 { "f.27", 27 },
395 { "f.28", 28 },
396 { "f.29", 29 },
397 { "f.3", 3 },
252b5132
RH		 398 { "f.30", 30 },
399 { "f.31", 31 },
066be9f7
PB		 400
401 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
402 { "f.33", 33 },
403 { "f.34", 34 },
404 { "f.35", 35 },
405 { "f.36", 36 },
406 { "f.37", 37 },
407 { "f.38", 38 },
408 { "f.39", 39 },
81d4177b 409 { "f.4", 4 },
066be9f7
PB		 410 { "f.40", 40 },
411 { "f.41", 41 },
412 { "f.42", 42 },
413 { "f.43", 43 },
414 { "f.44", 44 },
415 { "f.45", 45 },
416 { "f.46", 46 },
417 { "f.47", 47 },
418 { "f.48", 48 },
419 { "f.49", 49 },
81d4177b 420 { "f.5", 5 },
066be9f7
PB		 421 { "f.50", 50 },
422 { "f.51", 51 },
423 { "f.52", 52 },
424 { "f.53", 53 },
425 { "f.54", 54 },
426 { "f.55", 55 },
427 { "f.56", 56 },
428 { "f.57", 57 },
429 { "f.58", 58 },
430 { "f.59", 59 },
81d4177b 431 { "f.6", 6 },
066be9f7
PB		 432 { "f.60", 60 },
433 { "f.61", 61 },
434 { "f.62", 62 },
435 { "f.63", 63 },
81d4177b
KH		 436 { "f.7", 7 },
437 { "f.8", 8 },
438 { "f.9", 9 },
439
440 { "f0", 0 },
441 { "f1", 1 },
442 { "f10", 10 },
443 { "f11", 11 },
444 { "f12", 12 },
445 { "f13", 13 },
446 { "f14", 14 },
447 { "f15", 15 },
448 { "f16", 16 },
449 { "f17", 17 },
450 { "f18", 18 },
451 { "f19", 19 },
452 { "f2", 2 },
453 { "f20", 20 },
454 { "f21", 21 },
455 { "f22", 22 },
456 { "f23", 23 },
457 { "f24", 24 },
458 { "f25", 25 },
459 { "f26", 26 },
460 { "f27", 27 },
461 { "f28", 28 },
462 { "f29", 29 },
463 { "f3", 3 },
252b5132
RH		 464 { "f30", 30 },
465 { "f31", 31 },
066be9f7
PB		 466
467 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
468 { "f33", 33 },
469 { "f34", 34 },
470 { "f35", 35 },
471 { "f36", 36 },
472 { "f37", 37 },
473 { "f38", 38 },
474 { "f39", 39 },
81d4177b 475 { "f4", 4 },
066be9f7
PB		 476 { "f40", 40 },
477 { "f41", 41 },
478 { "f42", 42 },
479 { "f43", 43 },
480 { "f44", 44 },
481 { "f45", 45 },
482 { "f46", 46 },
483 { "f47", 47 },
484 { "f48", 48 },
485 { "f49", 49 },
81d4177b 486 { "f5", 5 },
066be9f7
PB		 487 { "f50", 50 },
488 { "f51", 51 },
489 { "f52", 52 },
490 { "f53", 53 },
491 { "f54", 54 },
492 { "f55", 55 },
493 { "f56", 56 },
494 { "f57", 57 },
495 { "f58", 58 },
496 { "f59", 59 },
81d4177b 497 { "f6", 6 },
066be9f7
PB		 498 { "f60", 60 },
499 { "f61", 61 },
500 { "f62", 62 },
501 { "f63", 63 },
81d4177b
KH		 502 { "f7", 7 },
503 { "f8", 8 },
504 { "f9", 9 },
252b5132
RH		 505
506 { "fpscr", 0 },
507
c3d65c1c
BE		 508 /* Quantization registers used with pair single instructions. */
509 { "gqr.0", 0 },
510 { "gqr.1", 1 },
511 { "gqr.2", 2 },
512 { "gqr.3", 3 },
513 { "gqr.4", 4 },
514 { "gqr.5", 5 },
515 { "gqr.6", 6 },
516 { "gqr.7", 7 },
517 { "gqr0", 0 },
518 { "gqr1", 1 },
519 { "gqr2", 2 },
520 { "gqr3", 3 },
521 { "gqr4", 4 },
522 { "gqr5", 5 },
523 { "gqr6", 6 },
524 { "gqr7", 7 },
525
252b5132
RH		 526 { "lr", 8 }, /* Link Register */
527
528 { "pmr", 0 },
529
530 { "r.0", 0 }, /* General Purpose Registers */
531 { "r.1", 1 },
532 { "r.10", 10 },
533 { "r.11", 11 },
534 { "r.12", 12 },
535 { "r.13", 13 },
536 { "r.14", 14 },
537 { "r.15", 15 },
538 { "r.16", 16 },
539 { "r.17", 17 },
540 { "r.18", 18 },
541 { "r.19", 19 },
542 { "r.2", 2 },
543 { "r.20", 20 },
544 { "r.21", 21 },
545 { "r.22", 22 },
546 { "r.23", 23 },
547 { "r.24", 24 },
548 { "r.25", 25 },
549 { "r.26", 26 },
550 { "r.27", 27 },
551 { "r.28", 28 },
552 { "r.29", 29 },
553 { "r.3", 3 },
554 { "r.30", 30 },
555 { "r.31", 31 },
556 { "r.4", 4 },
557 { "r.5", 5 },
558 { "r.6", 6 },
559 { "r.7", 7 },
560 { "r.8", 8 },
561 { "r.9", 9 },
562
563 { "r.sp", 1 }, /* Stack Pointer */
564
565 { "r.toc", 2 }, /* Pointer to the table of contents */
566
567 { "r0", 0 }, /* More general purpose registers */
568 { "r1", 1 },
569 { "r10", 10 },
570 { "r11", 11 },
571 { "r12", 12 },
572 { "r13", 13 },
573 { "r14", 14 },
574 { "r15", 15 },
575 { "r16", 16 },
576 { "r17", 17 },
577 { "r18", 18 },
578 { "r19", 19 },
579 { "r2", 2 },
580 { "r20", 20 },
581 { "r21", 21 },
582 { "r22", 22 },
583 { "r23", 23 },
584 { "r24", 24 },
585 { "r25", 25 },
586 { "r26", 26 },
587 { "r27", 27 },
588 { "r28", 28 },
589 { "r29", 29 },
590 { "r3", 3 },
591 { "r30", 30 },
592 { "r31", 31 },
593 { "r4", 4 },
594 { "r5", 5 },
595 { "r6", 6 },
596 { "r7", 7 },
597 { "r8", 8 },
598 { "r9", 9 },
599
600 { "rtoc", 2 }, /* Table of contents */
601
602 { "sdr1", 25 }, /* Storage Description Register 1 */
603
604 { "sp", 1 },
605
606 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
607 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 608
066be9f7 609 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 610 { "v.1", 1 },
611 { "v.10", 10 },
612 { "v.11", 11 },
613 { "v.12", 12 },
614 { "v.13", 13 },
615 { "v.14", 14 },
616 { "v.15", 15 },
617 { "v.16", 16 },
618 { "v.17", 17 },
619 { "v.18", 18 },
620 { "v.19", 19 },
621 { "v.2", 2 },
622 { "v.20", 20 },
623 { "v.21", 21 },
624 { "v.22", 22 },
625 { "v.23", 23 },
626 { "v.24", 24 },
627 { "v.25", 25 },
628 { "v.26", 26 },
629 { "v.27", 27 },
630 { "v.28", 28 },
631 { "v.29", 29 },
632 { "v.3", 3 },
7a899fff
C		 633 { "v.30", 30 },
634 { "v.31", 31 },
81d4177b
KH		 635 { "v.4", 4 },
636 { "v.5", 5 },
637 { "v.6", 6 },
638 { "v.7", 7 },
639 { "v.8", 8 },
640 { "v.9", 9 },
7a899fff
C		 641
642 { "v0", 0 },
81d4177b
KH		 643 { "v1", 1 },
644 { "v10", 10 },
645 { "v11", 11 },
646 { "v12", 12 },
647 { "v13", 13 },
648 { "v14", 14 },
649 { "v15", 15 },
650 { "v16", 16 },
651 { "v17", 17 },
652 { "v18", 18 },
653 { "v19", 19 },
654 { "v2", 2 },
655 { "v20", 20 },
656 { "v21", 21 },
657 { "v22", 22 },
658 { "v23", 23 },
659 { "v24", 24 },
660 { "v25", 25 },
661 { "v26", 26 },
662 { "v27", 27 },
663 { "v28", 28 },
664 { "v29", 29 },
665 { "v3", 3 },
7a899fff
C		 666 { "v30", 30 },
667 { "v31", 31 },
81d4177b
KH		 668 { "v4", 4 },
669 { "v5", 5 },
670 { "v6", 6 },
671 { "v7", 7 },
672 { "v8", 8 },
7a899fff 673 { "v9", 9 },
252b5132 674
066be9f7
PB		 675 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
676 { "vs.1", 1 },
677 { "vs.10", 10 },
678 { "vs.11", 11 },
679 { "vs.12", 12 },
680 { "vs.13", 13 },
681 { "vs.14", 14 },
682 { "vs.15", 15 },
683 { "vs.16", 16 },
684 { "vs.17", 17 },
685 { "vs.18", 18 },
686 { "vs.19", 19 },
687 { "vs.2", 2 },
688 { "vs.20", 20 },
689 { "vs.21", 21 },
690 { "vs.22", 22 },
691 { "vs.23", 23 },
692 { "vs.24", 24 },
693 { "vs.25", 25 },
694 { "vs.26", 26 },
695 { "vs.27", 27 },
696 { "vs.28", 28 },
697 { "vs.29", 29 },
698 { "vs.3", 3 },
699 { "vs.30", 30 },
700 { "vs.31", 31 },
701 { "vs.32", 32 },
702 { "vs.33", 33 },
703 { "vs.34", 34 },
704 { "vs.35", 35 },
705 { "vs.36", 36 },
706 { "vs.37", 37 },
707 { "vs.38", 38 },
708 { "vs.39", 39 },
709 { "vs.4", 4 },
710 { "vs.40", 40 },
711 { "vs.41", 41 },
712 { "vs.42", 42 },
713 { "vs.43", 43 },
714 { "vs.44", 44 },
715 { "vs.45", 45 },
716 { "vs.46", 46 },
717 { "vs.47", 47 },
718 { "vs.48", 48 },
719 { "vs.49", 49 },
720 { "vs.5", 5 },
721 { "vs.50", 50 },
722 { "vs.51", 51 },
723 { "vs.52", 52 },
724 { "vs.53", 53 },
725 { "vs.54", 54 },
726 { "vs.55", 55 },
727 { "vs.56", 56 },
728 { "vs.57", 57 },
729 { "vs.58", 58 },
730 { "vs.59", 59 },
731 { "vs.6", 6 },
732 { "vs.60", 60 },
733 { "vs.61", 61 },
734 { "vs.62", 62 },
735 { "vs.63", 63 },
736 { "vs.7", 7 },
737 { "vs.8", 8 },
738 { "vs.9", 9 },
739
740 { "vs0", 0 },
741 { "vs1", 1 },
742 { "vs10", 10 },
743 { "vs11", 11 },
744 { "vs12", 12 },
745 { "vs13", 13 },
746 { "vs14", 14 },
747 { "vs15", 15 },
748 { "vs16", 16 },
749 { "vs17", 17 },
750 { "vs18", 18 },
751 { "vs19", 19 },
752 { "vs2", 2 },
753 { "vs20", 20 },
754 { "vs21", 21 },
755 { "vs22", 22 },
756 { "vs23", 23 },
757 { "vs24", 24 },
758 { "vs25", 25 },
759 { "vs26", 26 },
760 { "vs27", 27 },
761 { "vs28", 28 },
762 { "vs29", 29 },
763 { "vs3", 3 },
764 { "vs30", 30 },
765 { "vs31", 31 },
766 { "vs32", 32 },
767 { "vs33", 33 },
768 { "vs34", 34 },
769 { "vs35", 35 },
770 { "vs36", 36 },
771 { "vs37", 37 },
772 { "vs38", 38 },
773 { "vs39", 39 },
774 { "vs4", 4 },
775 { "vs40", 40 },
776 { "vs41", 41 },
777 { "vs42", 42 },
778 { "vs43", 43 },
779 { "vs44", 44 },
780 { "vs45", 45 },
781 { "vs46", 46 },
782 { "vs47", 47 },
783 { "vs48", 48 },
784 { "vs49", 49 },
785 { "vs5", 5 },
786 { "vs50", 50 },
787 { "vs51", 51 },
788 { "vs52", 52 },
789 { "vs53", 53 },
790 { "vs54", 54 },
791 { "vs55", 55 },
792 { "vs56", 56 },
793 { "vs57", 57 },
794 { "vs58", 58 },
795 { "vs59", 59 },
796 { "vs6", 6 },
797 { "vs60", 60 },
798 { "vs61", 61 },
799 { "vs62", 62 },
800 { "vs63", 63 },
801 { "vs7", 7 },
802 { "vs8", 8 },
803 { "vs9", 9 },
804
252b5132
RH		 805 { "xer", 1 },
806
807};
808
bc805888 809#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 810
811/* Given NAME, find the register number associated with that name, return
812 the integer value associated with the given name or -1 on failure. */
813
252b5132 814static int
98027b10 815reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 816{
817 int middle, low, high;
818 int cmp;
819
820 low = 0;
821 high = regcount - 1;
822
823 do
824 {
825 middle = (low + high) / 2;
826 cmp = strcasecmp (name, regs[middle].name);
827 if (cmp < 0)
828 high = middle - 1;
829 else if (cmp > 0)
830 low = middle + 1;
831 else
832 return regs[middle].value;
833 }
834 while (low <= high);
835
836 return -1;
837}
838
839/*
99a814a1 840 * Summary of register_name.
252b5132
RH		 841 *
842 * in: Input_line_pointer points to 1st char of operand.
843 *
844 * out: A expressionS.
845 * The operand may have been a register: in this case, X_op == O_register,
846 * X_add_number is set to the register number, and truth is returned.
847 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 * original state.
849 */
850
b34976b6 851static bfd_boolean
98027b10 852register_name (expressionS *expressionP)
252b5132
RH		 853{
854 int reg_number;
855 char *name;
856 char *start;
857 char c;
858
99a814a1 859 /* Find the spelling of the operand. */
252b5132 860 start = name = input_line_pointer;
3882b010 861 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 862 name = ++input_line_pointer;
863
3882b010 864 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 865 return FALSE;
252b5132 866
d02603dc 867 c = get_symbol_name (&name);
252b5132
RH		 868 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
869
468cced8
AM		 870 /* Put back the delimiting char. */
871 *input_line_pointer = c;
872
99a814a1 873 /* Look to see if it's in the register table. */
81d4177b 874 if (reg_number >= 0)
252b5132
RH		 875 {
876 expressionP->X_op = O_register;
877 expressionP->X_add_number = reg_number;
81d4177b 878
99a814a1 879 /* Make the rest nice. */
252b5132
RH		 880 expressionP->X_add_symbol = NULL;
881 expressionP->X_op_symbol = NULL;
b34976b6 882 return TRUE;
252b5132 883 }
468cced8
AM		 884
885 /* Reset the line as if we had not done anything. */
886 input_line_pointer = start;
b34976b6 887 return FALSE;
252b5132
RH		 888}
889\f
890/* This function is called for each symbol seen in an expression. It
891 handles the special parsing which PowerPC assemblers are supposed
892 to use for condition codes. */
893
894/* Whether to do the special parsing. */
b34976b6 895static bfd_boolean cr_operand;
252b5132
RH		 896
897/* Names to recognize in a condition code. This table is sorted. */
898static const struct pd_reg cr_names[] =
899{
900 { "cr0", 0 },
901 { "cr1", 1 },
902 { "cr2", 2 },
903 { "cr3", 3 },
904 { "cr4", 4 },
905 { "cr5", 5 },
906 { "cr6", 6 },
907 { "cr7", 7 },
908 { "eq", 2 },
909 { "gt", 1 },
910 { "lt", 0 },
911 { "so", 3 },
912 { "un", 3 }
913};
914
915/* Parsing function. This returns non-zero if it recognized an
916 expression. */
917
918int
91d6fa6a 919ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 920{
921 int val;
922
923 if (! cr_operand)
924 return 0;
925
13abbae3
AM		 926 if (*name == '%')
927 ++name;
252b5132
RH		 928 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
929 name);
930 if (val < 0)
931 return 0;
932
91d6fa6a
NC		 933 exp->X_op = O_constant;
934 exp->X_add_number = val;
252b5132
RH		 935
936 return 1;
937}
938\f
939/* Local variables. */
940
2b3c4602
AM		 941/* Whether to target xcoff64/elf64. */
942static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 943
252b5132
RH		 944/* Opcode hash table. */
945static struct hash_control *ppc_hash;
946
947/* Macro hash table. */
948static struct hash_control *ppc_macro_hash;
949
950#ifdef OBJ_ELF
99a814a1 951/* What type of shared library support to use. */
5d6f4f16 952static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 953
99a814a1 954/* Flags to set in the elf header. */
252b5132
RH		 955static flagword ppc_flags = 0;
956
957/* Whether this is Solaris or not. */
958#ifdef TARGET_SOLARIS_COMMENT
b34976b6 959#define SOLARIS_P TRUE
252b5132 960#else
b34976b6 961#define SOLARIS_P FALSE
252b5132
RH		 962#endif
963
b34976b6 964static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 965#endif
966
967#ifdef OBJ_XCOFF
968
969/* The RS/6000 assembler uses the .csect pseudo-op to generate code
970 using a bunch of different sections. These assembler sections,
971 however, are all encompassed within the .text or .data sections of
972 the final output file. We handle this by using different
973 subsegments within these main segments. */
974
975/* Next subsegment to allocate within the .text segment. */
976static subsegT ppc_text_subsegment = 2;
977
978/* Linked list of csects in the text section. */
979static symbolS *ppc_text_csects;
980
981/* Next subsegment to allocate within the .data segment. */
982static subsegT ppc_data_subsegment = 2;
983
984/* Linked list of csects in the data section. */
985static symbolS *ppc_data_csects;
986
987/* The current csect. */
988static symbolS *ppc_current_csect;
989
990/* The RS/6000 assembler uses a TOC which holds addresses of functions
991 and variables. Symbols are put in the TOC with the .tc pseudo-op.
992 A special relocation is used when accessing TOC entries. We handle
993 the TOC as a subsegment within the .data segment. We set it up if
994 we see a .toc pseudo-op, and save the csect symbol here. */
995static symbolS *ppc_toc_csect;
996
997/* The first frag in the TOC subsegment. */
998static fragS *ppc_toc_frag;
999
1000/* The first frag in the first subsegment after the TOC in the .data
1001 segment. NULL if there are no subsegments after the TOC. */
1002static fragS *ppc_after_toc_frag;
1003
1004/* The current static block. */
1005static symbolS *ppc_current_block;
1006
1007/* The COFF debugging section; set by md_begin. This is not the
1008 .debug section, but is instead the secret BFD section which will
1009 cause BFD to set the section number of a symbol to N_DEBUG. */
1010static asection *ppc_coff_debug_section;
1011
85645aed
TG		 1012/* Structure to set the length field of the dwarf sections. */
1013struct dw_subsection {
1014 /* Subsections are simply linked. */
1015 struct dw_subsection *link;
1016
1017 /* The subsection number. */
1018 subsegT subseg;
1019
1020 /* Expression to compute the length of the section. */
1021 expressionS end_exp;
1022};
1023
1024static struct dw_section {
1025 /* Corresponding section. */
1026 segT sect;
1027
1028 /* Simply linked list of subsections with a label. */
1029 struct dw_subsection *list_subseg;
1030
1031 /* The anonymous subsection. */
1032 struct dw_subsection *anon_subseg;
1033} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1034#endif /* OBJ_XCOFF */
1035
1036#ifdef TE_PE
1037
1038/* Various sections that we need for PE coff support. */
1039static segT ydata_section;
1040static segT pdata_section;
1041static segT reldata_section;
1042static segT rdata_section;
1043static segT tocdata_section;
1044
81d4177b 1045/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1046static segT ppc_previous_section;
1047static segT ppc_current_section;
1048
1049#endif /* TE_PE */
1050
1051#ifdef OBJ_ELF
1052symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1053unsigned long *ppc_apuinfo_list;
1054unsigned int ppc_apuinfo_num;
1055unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1056#endif /* OBJ_ELF */
1057\f
1058#ifdef OBJ_ELF
15c1449b 1059const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1060#else
15c1449b 1061const char *const md_shortopts = "um:";
252b5132 1062#endif
cef4f754 1063#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1064const struct option md_longopts[] = {
cef4f754 1065 {"nops", required_argument, NULL, OPTION_NOPS},
bf7279d5
AM		 1066 {"ppc476-workaround", no_argument, &warn_476, 1},
1067 {"no-ppc476-workaround", no_argument, &warn_476, 0},
252b5132
RH		 1068 {NULL, no_argument, NULL, 0}
1069};
15c1449b 1070const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1071
1072int
17b9d67d 1073md_parse_option (int c, const char *arg)
252b5132 1074{
69fe9ce5
AM		 1075 ppc_cpu_t new_cpu;
1076
252b5132
RH		 1077 switch (c)
1078 {
1079 case 'u':
1080 /* -u means that any undefined symbols should be treated as
1081 external, which is the default for gas anyhow. */
1082 break;
1083
1084#ifdef OBJ_ELF
1085 case 'l':
1086 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1087 sake, recognize -be also. */
252b5132
RH		 1088 if (strcmp (arg, "e") == 0)
1089 {
1090 target_big_endian = 0;
1091 set_target_endian = 1;
b9c361e0 1092 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1093 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1094 }
1095 else
1096 return 0;
1097
1098 break;
1099
1100 case 'b':
1101 if (strcmp (arg, "e") == 0)
1102 {
1103 target_big_endian = 1;
1104 set_target_endian = 1;
1105 }
1106 else
1107 return 0;
1108
1109 break;
1110
1111 case 'K':
99a814a1 1112 /* Recognize -K PIC. */
252b5132
RH		 1113 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1114 {
1115 shlib = SHLIB_PIC;
1116 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1117 }
1118 else
1119 return 0;
1120
1121 break;
1122#endif
1123
7f6d05e8
CP		 1124 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1125 case 'a':
1126 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1127 {
1128#ifdef BFD64
1129 ppc_obj64 = 1;
d6ed37ed
AM		 1130 if (ppc_cpu & PPC_OPCODE_VLE)
1131 as_bad (_("the use of -mvle requires -a32."));
2a98c3a6
AM		 1132#else
1133 as_fatal (_("%s unsupported"), "-a64");
1134#endif
1135 }
7f6d05e8 1136 else if (strcmp (arg, "32") == 0)
2b3c4602 1137 ppc_obj64 = 0;
7f6d05e8
CP		 1138 else
1139 return 0;
1140 break;
81d4177b 1141
252b5132 1142 case 'm':
776fc418 1143 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
b9c361e0
JL		 1144 if (new_cpu != 0)
1145 {
1146 ppc_cpu = new_cpu;
d6ed37ed
AM		 1147 if (strcmp (arg, "vle") == 0)
1148 {
1149 if (set_target_endian && target_big_endian == 0)
1150 as_bad (_("the use of -mvle requires big endian."));
1151 if (ppc_obj64)
1152 as_bad (_("the use of -mvle requires -a32."));
1153 }
b9c361e0 1154 }
252b5132
RH		 1155
1156 else if (strcmp (arg, "regnames") == 0)
b34976b6 1157 reg_names_p = TRUE;
252b5132
RH		 1158
1159 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1160 reg_names_p = FALSE;
252b5132
RH		 1161
1162#ifdef OBJ_ELF
99a814a1
AM		 1163 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1164 that require relocation. */
252b5132
RH		 1165 else if (strcmp (arg, "relocatable") == 0)
1166 {
5d6f4f16 1167 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1168 ppc_flags |= EF_PPC_RELOCATABLE;
1169 }
1170
1171 else if (strcmp (arg, "relocatable-lib") == 0)
1172 {
5d6f4f16 1173 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1174 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1175 }
1176
99a814a1 1177 /* -memb, set embedded bit. */
252b5132
RH		 1178 else if (strcmp (arg, "emb") == 0)
1179 ppc_flags |= EF_PPC_EMB;
1180
cc643b88 1181 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1182 else if (strcmp (arg, "little") == 0
1183 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1184 {
1185 target_big_endian = 0;
1186 set_target_endian = 1;
b9c361e0 1187 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1188 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1189 }
1190
1191 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1192 {
1193 target_big_endian = 1;
1194 set_target_endian = 1;
1195 }
1196
1197 else if (strcmp (arg, "solaris") == 0)
1198 {
b34976b6 1199 msolaris = TRUE;
252b5132
RH		 1200 ppc_comment_chars = ppc_solaris_comment_chars;
1201 }
1202
1203 else if (strcmp (arg, "no-solaris") == 0)
1204 {
b34976b6 1205 msolaris = FALSE;
252b5132
RH		 1206 ppc_comment_chars = ppc_eabi_comment_chars;
1207 }
1208#endif
1209 else
1210 {
1211 as_bad (_("invalid switch -m%s"), arg);
1212 return 0;
1213 }
1214 break;
1215
1216#ifdef OBJ_ELF
1217 /* -V: SVR4 argument to print version ID. */
1218 case 'V':
1219 print_version_id ();
1220 break;
1221
1222 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1223 should be emitted or not. FIXME: Not implemented. */
1224 case 'Q':
1225 break;
1226
1227 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1228 rather than .stabs.excl, which is ignored by the linker.
1229 FIXME: Not implemented. */
1230 case 's':
1231 if (arg)
1232 return 0;
1233
1234 break;
1235#endif
1236
cef4f754
AM		 1237 case OPTION_NOPS:
1238 {
1239 char *end;
1240 nop_limit = strtoul (optarg, &end, 0);
1241 if (*end)
1242 as_bad (_("--nops needs a numeric argument"));
1243 }
1244 break;
85645aed 1245
bf7279d5
AM		 1246 case 0:
1247 break;
1248
252b5132
RH		 1249 default:
1250 return 0;
1251 }
1252
1253 return 1;
1254}
1255
1256void
98027b10 1257md_show_usage (FILE *stream)
252b5132 1258{
bc805888 1259 fprintf (stream, _("\
252b5132 1260PowerPC options:\n\
ce3d2015
AM		 1261-a32 generate ELF32/XCOFF32\n\
1262-a64 generate ELF64/XCOFF64\n\
1263-u ignored\n\
1264-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1265-mpwr generate code for POWER (RIOS1)\n\
1266-m601 generate code for PowerPC 601\n\
418c1742 1267-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1268 generate code for PowerPC 603/604\n\
1269-m403 generate code for PowerPC 403\n\
1270-m405 generate code for PowerPC 405\n\
1271-m440 generate code for PowerPC 440\n\
1272-m464 generate code for PowerPC 464\n\
1273-m476 generate code for PowerPC 476\n\
f5c120c5 1274-m7400, -m7410, -m7450, -m7455\n\
ce3d2015 1275 generate code for PowerPC 7400/7410/7450/7455\n\
ef5a96d5
AM		 1276-m750cl generate code for PowerPC 750cl\n\
1277-m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
df12615d 1278 fprintf (stream, _("\
ce3d2015
AM		 1279-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1280-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1281-mbooke generate code for 32-bit PowerPC BookE\n\
1282-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1283-mpower4, -mpwr4 generate code for Power4 architecture\n\
1284-mpower5, -mpwr5, -mpwr5x\n\
1285 generate code for Power5 architecture\n\
1286-mpower6, -mpwr6 generate code for Power6 architecture\n\
1287-mpower7, -mpwr7 generate code for Power7 architecture\n\
5817ffd1 1288-mpower8, -mpwr8 generate code for Power8 architecture\n\
a680de9a 1289-mpower9, -mpwr9 generate code for Power9 architecture\n\
ce3d2015
AM		 1290-mcell generate code for Cell Broadband Engine architecture\n\
1291-mcom generate code Power/PowerPC common instructions\n\
1292-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1293 fprintf (stream, _("\
ce3d2015
AM		 1294-maltivec generate code for AltiVec\n\
1295-mvsx generate code for Vector-Scalar (VSX) instructions\n\
5817ffd1 1296-mhtm generate code for Hardware Transactional Memory\n\
ce3d2015
AM		 1297-me300 generate code for PowerPC e300 family\n\
1298-me500, -me500x2 generate code for Motorola e500 core complex\n\
1299-me500mc, generate code for Freescale e500mc core complex\n\
1300-me500mc64, generate code for Freescale e500mc64 core complex\n\
aea77599
AM		 1301-me5500, generate code for Freescale e5500 core complex\n\
1302-me6500, generate code for Freescale e6500 core complex\n\
ce3d2015 1303-mspe generate code for Motorola SPE instructions\n\
b9c361e0 1304-mvle generate code for Freescale VLE instructions\n\
ce3d2015
AM		 1305-mtitan generate code for AppliedMicro Titan core complex\n\
1306-mregnames Allow symbolic names for registers\n\
1307-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1308#ifdef OBJ_ELF
bc805888 1309 fprintf (stream, _("\
ce3d2015
AM		 1310-mrelocatable support for GCC's -mrelocatble option\n\
1311-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1312-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1313-mlittle, -mlittle-endian, -le\n\
ce3d2015 1314 generate code for a little endian machine\n\
b8b738ac 1315-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1316 generate code for a big endian machine\n\
1317-msolaris generate code for Solaris\n\
1318-mno-solaris do not generate code for Solaris\n\
b8b738ac 1319-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1320-V print assembler version number\n\
1321-Qy, -Qn ignored\n"));
252b5132 1322#endif
cef4f754 1323 fprintf (stream, _("\
bf7279d5
AM		 1324-nops=count when aligning, more than COUNT nops uses a branch\n\
1325-ppc476-workaround warn if emitting data to code sections\n"));
252b5132
RH		 1326}
1327\f
1328/* Set ppc_cpu if it is not already set. */
1329
1330static void
98027b10 1331ppc_set_cpu (void)
252b5132
RH		 1332{
1333 const char *default_os = TARGET_OS;
1334 const char *default_cpu = TARGET_CPU;
1335
7102e95e 1336 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1337 {
2a98c3a6 1338 if (ppc_obj64)
bdc70b4a 1339 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1340 else if (strncmp (default_os, "aix", 3) == 0
1341 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1342 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1343 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1344 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1345 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1346 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1347 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1348 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1349 else
d6ed37ed 1350 as_fatal (_("unknown default cpu = %s, os = %s"),
99a814a1 1351 default_cpu, default_os);
252b5132
RH		 1352 }
1353}
1354
9232bbb0
AM		 1355/* Figure out the BFD architecture to use. This function and ppc_mach
1356 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1357
1358enum bfd_architecture
98027b10 1359ppc_arch (void)
252b5132
RH		 1360{
1361 const char *default_cpu = TARGET_CPU;
1362 ppc_set_cpu ();
1363
1364 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1365 return bfd_arch_powerpc;
b9c361e0
JL		 1366 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1367 return bfd_arch_powerpc;
1368 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
252b5132 1369 return bfd_arch_rs6000;
b9c361e0 1370 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
252b5132
RH		 1371 {
1372 if (strcmp (default_cpu, "rs6000") == 0)
1373 return bfd_arch_rs6000;
0baf16f2 1374 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1375 return bfd_arch_powerpc;
1376 }
1377
d6ed37ed 1378 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
252b5132
RH		 1379 return bfd_arch_unknown;
1380}
1381
7f6d05e8 1382unsigned long
98027b10 1383ppc_mach (void)
7f6d05e8 1384{
2a98c3a6
AM		 1385 if (ppc_obj64)
1386 return bfd_mach_ppc64;
1387 else if (ppc_arch () == bfd_arch_rs6000)
1388 return bfd_mach_rs6k;
ce3d2015
AM		 1389 else if (ppc_cpu & PPC_OPCODE_TITAN)
1390 return bfd_mach_ppc_titan;
b9c361e0
JL		 1391 else if (ppc_cpu & PPC_OPCODE_VLE)
1392 return bfd_mach_ppc_vle;
2a98c3a6
AM		 1393 else
1394 return bfd_mach_ppc;
7f6d05e8
CP		 1395}
1396
e0471c16 1397extern const char*
98027b10 1398ppc_target_format (void)
7f6d05e8
CP		 1399{
1400#ifdef OBJ_COFF
1401#ifdef TE_PE
99a814a1 1402 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1403#elif TE_POWERMAC
0baf16f2 1404 return "xcoff-powermac";
7f6d05e8 1405#else
eb1e0e80 1406# ifdef TE_AIX5
edc1d652 1407 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1408# else
edc1d652 1409 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1410# endif
7f6d05e8 1411#endif
7f6d05e8
CP		 1412#endif
1413#ifdef OBJ_ELF
edc1d652
AM		 1414# ifdef TE_FreeBSD
1415 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1416# elif defined (TE_VXWORKS)
9d8504b1
PB		 1417 return "elf32-powerpc-vxworks";
1418# else
0baf16f2 1419 return (target_big_endian
2b3c4602
AM		 1420 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1421 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1422# endif
7f6d05e8
CP		 1423#endif
1424}
1425
b9c361e0
JL		 1426/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1427 Return TRUE if there's a problem, otherwise FALSE. */
1428
1429static bfd_boolean
1430insn_validate (const struct powerpc_opcode *op)
1431{
1432 const unsigned char *o;
1433 unsigned long omask = op->mask;
1434
1435 /* The mask had better not trim off opcode bits. */
1436 if ((op->opcode & omask) != op->opcode)
1437 {
1438 as_bad (_("mask trims opcode bits for %s"), op->name);
1439 return TRUE;
1440 }
1441
1442 /* The operands must not overlap the opcode or each other. */
1443 for (o = op->operands; *o; ++o)
1444 {
1445 if (*o >= num_powerpc_operands)
1446 {
1447 as_bad (_("operand index error for %s"), op->name);
1448 return TRUE;
1449 }
1450 else
1451 {
1452 const struct powerpc_operand *operand = &powerpc_operands[*o];
b6518b38 1453 if (operand->shift != (int) PPC_OPSHIFT_INV)
b9c361e0
JL		 1454 {
1455 unsigned long mask;
1456
1457 if (operand->shift >= 0)
1458 mask = operand->bitm << operand->shift;
1459 else
1460 mask = operand->bitm >> -operand->shift;
1461 if (omask & mask)
1462 {
1463 as_bad (_("operand %d overlap in %s"),
1464 (int) (o - op->operands), op->name);
1465 return TRUE;
1466 }
1467 omask |= mask;
1468 }
1469 }
1470 }
1471 return FALSE;
1472}
1473
69c040df 1474/* Insert opcodes and macros into hash tables. Called at startup and
1fe532cf 1475 for .machine pseudo. */
252b5132 1476
69c040df
AM		 1477static void
1478ppc_setup_opcodes (void)
252b5132 1479{
98027b10 1480 const struct powerpc_opcode *op;
252b5132
RH		 1481 const struct powerpc_opcode *op_end;
1482 const struct powerpc_macro *macro;
1483 const struct powerpc_macro *macro_end;
b84bf58a 1484 bfd_boolean bad_insn = FALSE;
252b5132 1485
69c040df
AM		 1486 if (ppc_hash != NULL)
1487 hash_die (ppc_hash);
1488 if (ppc_macro_hash != NULL)
1489 hash_die (ppc_macro_hash);
252b5132
RH		 1490
1491 /* Insert the opcodes into a hash table. */
1492 ppc_hash = hash_new ();
1493
c43a438d 1494 if (ENABLE_CHECKING)
b84bf58a 1495 {
c43a438d 1496 unsigned int i;
b84bf58a 1497
3b8b57a9
AM		 1498 /* An index into powerpc_operands is stored in struct fix
1499 fx_pcrel_adjust which is 8 bits wide. */
1500 gas_assert (num_powerpc_operands < 256);
1501
c43a438d
AM		 1502 /* Check operand masks. Code here and in the disassembler assumes
1503 all the 1's in the mask are contiguous. */
1504 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1505 {
c43a438d
AM		 1506 unsigned long mask = powerpc_operands[i].bitm;
1507 unsigned long right_bit;
1508 unsigned int j;
1509
1510 right_bit = mask & -mask;
1511 mask += right_bit;
1512 right_bit = mask & -mask;
1513 if (mask != right_bit)
1514 {
1515 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1516 bad_insn = TRUE;
1517 }
1518 for (j = i + 1; j < num_powerpc_operands; ++j)
1519 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1520 sizeof (powerpc_operands[0])) == 0)
1521 {
1522 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1523 j, i);
1524 bad_insn = TRUE;
1525 }
b84bf58a
AM		 1526 }
1527 }
1528
252b5132
RH		 1529 op_end = powerpc_opcodes + powerpc_num_opcodes;
1530 for (op = powerpc_opcodes; op < op_end; op++)
1531 {
c43a438d 1532 if (ENABLE_CHECKING)
b84bf58a 1533 {
d815f1a9 1534 if (op != powerpc_opcodes)
8dbcd839 1535 {
b9c361e0
JL		 1536 int old_opcode = PPC_OP (op[-1].opcode);
1537 int new_opcode = PPC_OP (op[0].opcode);
1538
1539#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1540 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1541 op->name, (unsigned int) (op - powerpc_opcodes),
1542 (unsigned int) new_opcode, (unsigned int) op->opcode,
1543 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1544#endif
1545
d815f1a9
AM		 1546 /* The major opcodes had better be sorted. Code in the
1547 disassembler assumes the insns are sorted according to
1548 major opcode. */
b9c361e0 1549 if (new_opcode < old_opcode)
d815f1a9
AM		 1550 {
1551 as_bad (_("major opcode is not sorted for %s"),
1552 op->name);
1553 bad_insn = TRUE;
1554 }
8dbcd839 1555 }
14b57c7c
AM		 1556 if ((op->flags & PPC_OPCODE_VLE) != 0)
1557 {
1558 as_bad (_("%s is enabled by vle flag"), op->name);
1559 bad_insn = TRUE;
1560 }
1561 if (PPC_OP (op->opcode) != 4
1562 && PPC_OP (op->opcode) != 31
1563 && (op->deprecated & PPC_OPCODE_VLE) == 0)
1564 {
1565 as_bad (_("%s not disabled by vle flag"), op->name);
1566 bad_insn = TRUE;
1567 }
b9c361e0
JL		 1568 bad_insn |= insn_validate (op);
1569 }
c43a438d 1570
b9c361e0
JL		 1571 if ((ppc_cpu & op->flags) != 0
1572 && !(ppc_cpu & op->deprecated))
1573 {
1574 const char *retval;
1575
1576 retval = hash_insert (ppc_hash, op->name, (void *) op);
1577 if (retval != NULL)
c43a438d 1578 {
b9c361e0 1579 as_bad (_("duplicate instruction %s"),
c43a438d
AM		 1580 op->name);
1581 bad_insn = TRUE;
1582 }
b9c361e0
JL		 1583 }
1584 }
c43a438d 1585
b9c361e0
JL		 1586 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1587 for (op = powerpc_opcodes; op < op_end; op++)
1588 hash_insert (ppc_hash, op->name, (void *) op);
1589
1590 op_end = vle_opcodes + vle_num_opcodes;
1591 for (op = vle_opcodes; op < op_end; op++)
1592 {
1593 if (ENABLE_CHECKING)
1594 {
1595 if (op != vle_opcodes)
1596 {
1597 unsigned old_seg, new_seg;
1598
1599 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1600 old_seg = VLE_OP_TO_SEG (old_seg);
1601 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1602 new_seg = VLE_OP_TO_SEG (new_seg);
1603
1604#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1605 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1606 op->name, (unsigned int) (op - powerpc_opcodes),
1607 (unsigned int) new_seg, (unsigned int) op->opcode,
1608 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1609#endif
1610 /* The major opcodes had better be sorted. Code in the
1611 disassembler assumes the insns are sorted according to
1612 major opcode. */
1613 if (new_seg < old_seg)
1614 {
1615 as_bad (_("major opcode is not sorted for %s"),
1616 op->name);
1617 bad_insn = TRUE;
1618 }
1619 }
1620
1621 bad_insn |= insn_validate (op);
c43a438d 1622 }
252b5132 1623
bdc70b4a 1624 if ((ppc_cpu & op->flags) != 0
1cb0a767 1625 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1626 {
1627 const char *retval;
1628
98027b10 1629 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1630 if (retval != NULL)
252b5132 1631 {
b84bf58a 1632 as_bad (_("duplicate instruction %s"),
99a814a1 1633 op->name);
b84bf58a 1634 bad_insn = TRUE;
252b5132
RH		 1635 }
1636 }
1637 }
1638
1639 /* Insert the macros into a hash table. */
1640 ppc_macro_hash = hash_new ();
1641
1642 macro_end = powerpc_macros + powerpc_num_macros;
1643 for (macro = powerpc_macros; macro < macro_end; macro++)
1644 {
33740db9 1645 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1646 {
1647 const char *retval;
1648
98027b10 1649 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1650 if (retval != (const char *) NULL)
1651 {
b84bf58a
AM		 1652 as_bad (_("duplicate macro %s"), macro->name);
1653 bad_insn = TRUE;
252b5132
RH		 1654 }
1655 }
1656 }
1657
b84bf58a 1658 if (bad_insn)
252b5132 1659 abort ();
69c040df
AM		 1660}
1661
1662/* This function is called when the assembler starts up. It is called
1663 after the options have been parsed and the output file has been
1664 opened. */
1665
1666void
98027b10 1667md_begin (void)
69c040df
AM		 1668{
1669 ppc_set_cpu ();
1670
1671 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
8fbf7334 1672 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
69c040df
AM		 1673
1674#ifdef OBJ_ELF
1675 /* Set the ELF flags if desired. */
1676 if (ppc_flags && !msolaris)
1677 bfd_set_private_flags (stdoutput, ppc_flags);
1678#endif
1679
1680 ppc_setup_opcodes ();
252b5132 1681
67c1ffbe 1682 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1683 by the user. */
252b5132
RH		 1684 if (!set_target_endian)
1685 {
1686 set_target_endian = 1;
1687 target_big_endian = PPC_BIG_ENDIAN;
1688 }
1689
1690#ifdef OBJ_XCOFF
1691 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1692
1693 /* Create dummy symbols to serve as initial csects. This forces the
1694 text csects to precede the data csects. These symbols will not
1695 be output. */
1696 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1697 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1698 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1699 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1700#endif
1701
1702#ifdef TE_PE
1703
1704 ppc_current_section = text_section;
81d4177b 1705 ppc_previous_section = 0;
252b5132
RH		 1706
1707#endif
1708}
1709
6a0c61b7 1710void
98027b10 1711ppc_cleanup (void)
6a0c61b7 1712{
dc1d03fc 1713#ifdef OBJ_ELF
6a0c61b7
EZ		 1714 if (ppc_apuinfo_list == NULL)
1715 return;
1716
1717 /* Ok, so write the section info out. We have this layout:
1718
1719 byte data what
1720 ---- ---- ----
1721 0 8 length of "APUinfo\0"
1722 4 (n*4) number of APU's (4 bytes each)
1723 8 2 note type 2
1724 12 "APUinfo\0" name
1725 20 APU#1 first APU's info
1726 24 APU#2 second APU's info
1727 ... ...
1728 */
1729 {
1730 char *p;
1731 asection *seg = now_seg;
1732 subsegT subseg = now_subseg;
1733 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1734 unsigned int i;
6a0c61b7
EZ		 1735
1736 /* Create the .PPC.EMB.apuinfo section. */
14b57c7c 1737 apuinfo_secp = subseg_new (APUINFO_SECTION_NAME, 0);
6a0c61b7
EZ		 1738 bfd_set_section_flags (stdoutput,
1739 apuinfo_secp,
e1a9cb8e 1740 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1741
1742 p = frag_more (4);
1743 md_number_to_chars (p, (valueT) 8, 4);
1744
1745 p = frag_more (4);
e98d298c 1746 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1747
1748 p = frag_more (4);
1749 md_number_to_chars (p, (valueT) 2, 4);
1750
1751 p = frag_more (8);
14b57c7c 1752 strcpy (p, APUINFO_LABEL);
6a0c61b7
EZ		 1753
1754 for (i = 0; i < ppc_apuinfo_num; i++)
1755 {
b34976b6
AM		 1756 p = frag_more (4);
1757 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1758 }
1759
1760 frag_align (2, 0, 0);
1761
1762 /* We probably can't restore the current segment, for there likely
1763 isn't one yet... */
1764 if (seg && subseg)
1765 subseg_set (seg, subseg);
1766 }
dc1d03fc 1767#endif
6a0c61b7
EZ		 1768}
1769
252b5132
RH		 1770/* Insert an operand value into an instruction. */
1771
1772static unsigned long
a1867a27
AM		 1773ppc_insert_operand (unsigned long insn,
1774 const struct powerpc_operand *operand,
1775 offsetT val,
91d6fa6a 1776 ppc_cpu_t cpu,
3b4dbbbf 1777 const char *file,
a1867a27 1778 unsigned int line)
252b5132 1779{
b84bf58a 1780 long min, max, right;
eb42fac1 1781
b84bf58a
AM		 1782 max = operand->bitm;
1783 right = max & -max;
1784 min = 0;
1785
a47622ac 1786 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132 1787 {
a255f00a
AM		 1788 /* Extend the allowed range for addis to [-32768, 65535].
1789 Similarly for cmpli and some VLE high part insns. For 64-bit
1790 it would be good to disable this for signed fields since the
a47622ac
AM		 1791 value is sign extended into the high 32 bits of the register.
1792 If the value is, say, an address, then we might care about
1793 the high bits. However, gcc as of 2014-06 uses unsigned
1794 values when loading the high part of 64-bit constants using
a255f00a
AM		 1795 lis. */
1796 min = ~(max >> 1) & -right;
a47622ac
AM		 1797 }
1798 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1799 {
1800 max = (max >> 1) & -right;
931774a9 1801 min = ~max & -right;
b84bf58a 1802 }
252b5132 1803
b84bf58a 1804 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1805 max++;
252b5132 1806
b84bf58a 1807 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1808 {
1809 long tmp = min;
1810 min = -max;
1811 max = -tmp;
1812 }
b84bf58a 1813
a1867a27
AM		 1814 if (min <= max)
1815 {
1816 /* Some people write constants with the sign extension done by
1817 hand but only up to 32 bits. This shouldn't really be valid,
1818 but, to permit this code to assemble on a 64-bit host, we
1819 sign extend the 32-bit value to 64 bits if so doing makes the
1820 value valid. */
1821 if (val > max
1822 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1823 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1824 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1825 val = val - 0x80000000 - 0x80000000;
1826
1827 /* Similarly, people write expressions like ~(1<<15), and expect
1828 this to be OK for a 32-bit unsigned value. */
1829 else if (val < min
1830 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1831 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1832 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1833 val = val + 0x80000000 + 0x80000000;
1834
1835 else if (val < min
1836 || val > max
1837 || (val & (right - 1)) != 0)
1838 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1839 }
b84bf58a 1840
252b5132
RH		 1841 if (operand->insert)
1842 {
1843 const char *errmsg;
1844
1845 errmsg = NULL;
91d6fa6a 1846 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1847 if (errmsg != (const char *) NULL)
ee2c9aa9 1848 as_bad_where (file, line, "%s", errmsg);
252b5132 1849 }
b9c361e0 1850 else if (operand->shift >= 0)
b84bf58a 1851 insn |= ((long) val & operand->bitm) << operand->shift;
b9c361e0
JL		 1852 else
1853 insn |= ((long) val & operand->bitm) >> -operand->shift;
252b5132
RH		 1854
1855 return insn;
1856}
1857
1858\f
1859#ifdef OBJ_ELF
1860/* Parse @got, etc. and return the desired relocation. */
1861static bfd_reloc_code_real_type
98027b10 1862ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1863{
1864 struct map_bfd {
e0471c16 1865 const char *string;
b7d7dc63
AM		 1866 unsigned int length : 8;
1867 unsigned int valid32 : 1;
1868 unsigned int valid64 : 1;
1869 unsigned int reloc;
252b5132
RH		 1870 };
1871
1872 char ident[20];
1873 char *str = *str_p;
1874 char *str2;
1875 int ch;
1876 int len;
15c1449b 1877 const struct map_bfd *ptr;
252b5132 1878
b7d7dc63
AM		 1879#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1880#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1881#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1882
15c1449b 1883 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1884 MAP ("l", BFD_RELOC_LO16),
1885 MAP ("h", BFD_RELOC_HI16),
1886 MAP ("ha", BFD_RELOC_HI16_S),
1887 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1888 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1889 MAP ("got", BFD_RELOC_16_GOTOFF),
1890 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1891 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1892 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1893 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1894 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1895 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1896 MAP ("copy", BFD_RELOC_PPC_COPY),
1897 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1898 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1899 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1900 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1901 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1902 MAP ("tls", BFD_RELOC_PPC_TLS),
1903 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1904 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1905 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1906 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1907 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1908 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1909 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1910 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1911 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1912 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1913 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1914 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1915 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1916 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1917 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1918 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1919 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1920 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1921 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1922 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1923 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1924 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1925 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1926 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1927 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1928 MAP32 ("fixup", BFD_RELOC_CTOR),
1929 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1930 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1931 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1932 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1933 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1934 MAP32 ("sdarel", BFD_RELOC_GPREL16),
b9c361e0
JL		 1935 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1936 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1937 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
b7d7dc63
AM		 1938 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1939 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1940 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1941 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1942 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1943 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1944 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1945 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1946 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
b9c361e0 1947 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
b7d7dc63
AM		 1948 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1949 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1950 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1951 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1952 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1953 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1954 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1955 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
f9c6b907
AM		 1956 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1957 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
b7d7dc63
AM		 1958 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1959 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1960 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1961 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1962 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1963 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1964 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1965 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1966 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
f9c6b907
AM		 1967 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1968 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
b7d7dc63
AM		 1969 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1970 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1971 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1972 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
45965137 1973 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
f9c6b907
AM		 1974 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1975 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
b7d7dc63
AM		 1976 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1977 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1978 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1979 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
62ebcb5c 1980 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
252b5132
RH		 1981 };
1982
1983 if (*str++ != '@')
62ebcb5c 1984 return BFD_RELOC_NONE;
252b5132
RH		 1985
1986 for (ch = *str, str2 = ident;
1987 (str2 < ident + sizeof (ident) - 1
3882b010 1988 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1989 ch = *++str)
1990 {
3882b010 1991 *str2++ = TOLOWER (ch);
252b5132
RH		 1992 }
1993
1994 *str2 = '\0';
1995 len = str2 - ident;
1996
1997 ch = ident[0];
1998 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1999 if (ch == ptr->string[0]
2000 && len == ptr->length
b7d7dc63
AM		 2001 && memcmp (ident, ptr->string, ptr->length) == 0
2002 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 2003 {
15c1449b
AM		 2004 int reloc = ptr->reloc;
2005
727fc41e
AM		 2006 if (!ppc_obj64 && exp_p->X_add_number != 0)
2007 {
2008 switch (reloc)
2009 {
2010 case BFD_RELOC_16_GOTOFF:
2011 case BFD_RELOC_LO16_GOTOFF:
2012 case BFD_RELOC_HI16_GOTOFF:
2013 case BFD_RELOC_HI16_S_GOTOFF:
2014 as_warn (_("identifier+constant@got means "
2015 "identifier@got+constant"));
2016 break;
2017
2018 case BFD_RELOC_PPC_GOT_TLSGD16:
2019 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2020 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2021 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2022 case BFD_RELOC_PPC_GOT_TLSLD16:
2023 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2024 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2025 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2026 case BFD_RELOC_PPC_GOT_DTPREL16:
2027 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2028 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2029 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2030 case BFD_RELOC_PPC_GOT_TPREL16:
2031 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2032 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2033 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2034 as_bad (_("symbol+offset not supported for got tls"));
2035 break;
2036 }
2037 }
5f6db75a
AM		 2038
2039 /* Now check for identifier@suffix+constant. */
2040 if (*str == '-' || *str == '+')
252b5132 2041 {
5f6db75a
AM		 2042 char *orig_line = input_line_pointer;
2043 expressionS new_exp;
2044
2045 input_line_pointer = str;
2046 expression (&new_exp);
2047 if (new_exp.X_op == O_constant)
252b5132 2048 {
5f6db75a
AM		 2049 exp_p->X_add_number += new_exp.X_add_number;
2050 str = input_line_pointer;
252b5132 2051 }
5f6db75a
AM		 2052
2053 if (&input_line_pointer != str_p)
2054 input_line_pointer = orig_line;
252b5132 2055 }
252b5132 2056 *str_p = str;
0baf16f2 2057
2b3c4602 2058 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 2059 && exp_p->X_op == O_symbol
2060 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 2061 {
9f2b53d7
AM		 2062 /* Change the symbol so that the dummy .TOC. symbol can be
2063 omitted from the object file. */
0baf16f2
AM		 2064 exp_p->X_add_symbol = &abs_symbol;
2065 }
2066
15c1449b 2067 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 2068 }
2069
62ebcb5c 2070 return BFD_RELOC_NONE;
252b5132
RH		 2071}
2072
62ebcb5c 2073/* Support @got, etc. on constants emitted via .short, .int etc. */
99a814a1 2074
62ebcb5c
AM		 2075bfd_reloc_code_real_type
2076ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2077{
2078 expression (exp);
2079 if (nbytes >= 2 && *input_line_pointer == '@')
2080 return ppc_elf_suffix (&input_line_pointer, exp);
2081 return BFD_RELOC_NONE;
252b5132
RH		 2082}
2083
bf7279d5
AM		 2084/* Warn when emitting data to code sections, unless we are emitting
2085 a relocation that ld --ppc476-workaround uses to recognise data
2086 *and* there was an unconditional branch prior to the data. */
2087
2088void
2089ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2090 unsigned int nbytes, fixS *fix)
2091{
2092 if (warn_476
2093 && (now_seg->flags & SEC_CODE) != 0
2094 && (nbytes != 4
2095 || fix == NULL
2096 || !(fix->fx_r_type == BFD_RELOC_32
2097 || fix->fx_r_type == BFD_RELOC_CTOR
2098 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2099 || !(last_seg == now_seg && last_subseg == now_subseg)
2100 || !((last_insn & (0x3f << 26)) == (18u << 26)
2101 || ((last_insn & (0x3f << 26)) == (16u << 26)
2102 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2103 || ((last_insn & (0x3f << 26)) == (19u << 26)
2104 && (last_insn & (0x3ff << 1)) == (16u << 1)
2105 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2106 {
2107 /* Flag that we've warned. */
2108 if (fix != NULL)
2109 fix->fx_tcbit = 1;
2110
2111 as_warn (_("data in executable section"));
2112 }
2113}
2114
252b5132
RH		 2115/* Solaris pseduo op to change to the .rodata section. */
2116static void
98027b10 2117ppc_elf_rdata (int xxx)
252b5132
RH		 2118{
2119 char *save_line = input_line_pointer;
2120 static char section[] = ".rodata\n";
2121
99a814a1 2122 /* Just pretend this is .section .rodata */
252b5132
RH		 2123 input_line_pointer = section;
2124 obj_elf_section (xxx);
2125
2126 input_line_pointer = save_line;
2127}
2128
99a814a1 2129/* Pseudo op to make file scope bss items. */
252b5132 2130static void
98027b10 2131ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2132{
98027b10
AM		 2133 char *name;
2134 char c;
2135 char *p;
252b5132 2136 offsetT size;
98027b10 2137 symbolS *symbolP;
252b5132
RH		 2138 offsetT align;
2139 segT old_sec;
2140 int old_subsec;
2141 char *pfrag;
2142 int align2;
2143
d02603dc 2144 c = get_symbol_name (&name);
252b5132 2145
d02603dc 2146 /* Just after name is now '\0'. */
252b5132
RH		 2147 p = input_line_pointer;
2148 *p = c;
d02603dc 2149 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 2150 if (*input_line_pointer != ',')
2151 {
d6ed37ed 2152 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 2153 ignore_rest_of_line ();
2154 return;
2155 }
2156
2157 input_line_pointer++; /* skip ',' */
2158 if ((size = get_absolute_expression ()) < 0)
2159 {
2160 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2161 ignore_rest_of_line ();
2162 return;
2163 }
2164
2165 /* The third argument to .lcomm is the alignment. */
2166 if (*input_line_pointer != ',')
2167 align = 8;
2168 else
2169 {
2170 ++input_line_pointer;
2171 align = get_absolute_expression ();
2172 if (align <= 0)
2173 {
2174 as_warn (_("ignoring bad alignment"));
2175 align = 8;
2176 }
2177 }
2178
2179 *p = 0;
2180 symbolP = symbol_find_or_make (name);
2181 *p = c;
2182
2183 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2184 {
d6ed37ed 2185 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 2186 S_GET_NAME (symbolP));
2187 ignore_rest_of_line ();
2188 return;
2189 }
2190
2191 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2192 {
d6ed37ed 2193 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 2194 S_GET_NAME (symbolP),
2195 (long) S_GET_VALUE (symbolP),
2196 (long) size);
2197
2198 ignore_rest_of_line ();
2199 return;
2200 }
2201
99a814a1 2202 /* Allocate_bss. */
252b5132
RH		 2203 old_sec = now_seg;
2204 old_subsec = now_subseg;
2205 if (align)
2206 {
99a814a1 2207 /* Convert to a power of 2 alignment. */
252b5132
RH		 2208 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2209 if (align != 1)
2210 {
d6ed37ed 2211 as_bad (_("common alignment not a power of 2"));
252b5132
RH		 2212 ignore_rest_of_line ();
2213 return;
2214 }
2215 }
2216 else
2217 align2 = 0;
2218
2219 record_alignment (bss_section, align2);
cbe02d4f 2220 subseg_set (bss_section, 1);
252b5132
RH		 2221 if (align2)
2222 frag_align (align2, 0, 0);
2223 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2224 symbol_get_frag (symbolP)->fr_symbol = 0;
2225 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2226 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2227 (char *) 0);
2228 *pfrag = 0;
2229 S_SET_SIZE (symbolP, size);
2230 S_SET_SEGMENT (symbolP, bss_section);
2231 subseg_set (old_sec, old_subsec);
2232 demand_empty_rest_of_line ();
2233}
2234
6911b7dc
AM		 2235/* Pseudo op to set symbol local entry point. */
2236static void
2237ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2238{
d02603dc
NC		 2239 char *name;
2240 char c = get_symbol_name (&name);
6911b7dc
AM		 2241 char *p;
2242 expressionS exp;
2243 symbolS *sym;
2244 asymbol *bfdsym;
2245 elf_symbol_type *elfsym;
2246
2247 p = input_line_pointer;
2248 *p = c;
d02603dc 2249 SKIP_WHITESPACE_AFTER_NAME ();
6911b7dc
AM		 2250 if (*input_line_pointer != ',')
2251 {
2252 *p = 0;
2253 as_bad (_("expected comma after name `%s' in .localentry directive"),
2254 name);
2255 *p = c;
2256 ignore_rest_of_line ();
2257 return;
2258 }
2259 input_line_pointer++;
2260 expression (&exp);
2261 if (exp.X_op == O_absent)
2262 {
2263 as_bad (_("missing expression in .localentry directive"));
2264 exp.X_op = O_constant;
2265 exp.X_add_number = 0;
2266 }
2267 *p = 0;
2268 sym = symbol_find_or_make (name);
2269 *p = c;
2270
2271 if (resolve_expression (&exp)
2272 && exp.X_op == O_constant)
2273 {
2274 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2275
e2b5892e 2276 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
6911b7dc
AM		 2277 as_bad (_(".localentry expression for `%s' "
2278 "is not a valid power of 2"), S_GET_NAME (sym));
2279 else
2280 {
2281 bfdsym = symbol_get_bfdsym (sym);
2282 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2283 gas_assert (elfsym);
2284 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2285 elfsym->internal_elf_sym.st_other |= encoded;
2286 if (ppc_abiversion == 0)
2287 ppc_abiversion = 2;
2288 }
2289 }
2290 else
2291 as_bad (_(".localentry expression for `%s' "
2292 "does not evaluate to a constant"), S_GET_NAME (sym));
2293
2294 demand_empty_rest_of_line ();
2295}
2296
ee67d69a
AM		 2297/* Pseudo op to set ABI version. */
2298static void
2299ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2300{
2301 expressionS exp;
2302
2303 expression (&exp);
2304 if (exp.X_op == O_absent)
2305 {
2306 as_bad (_("missing expression in .abiversion directive"));
2307 exp.X_op = O_constant;
2308 exp.X_add_number = 0;
2309 }
2310
2311 if (resolve_expression (&exp)
2312 && exp.X_op == O_constant)
2313 ppc_abiversion = exp.X_add_number;
2314 else
2315 as_bad (_(".abiversion expression does not evaluate to a constant"));
2316 demand_empty_rest_of_line ();
2317}
2318
005d79fd
AM		 2319/* Parse a .gnu_attribute directive. */
2320static void
2321ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED)
2322{
2323 int tag = obj_elf_vendor_attribute (OBJ_ATTR_GNU);
2324
2325 /* Check validity of defined powerpc tags. */
2326 if (tag == Tag_GNU_Power_ABI_FP
2327 || tag == Tag_GNU_Power_ABI_Vector
2328 || tag == Tag_GNU_Power_ABI_Struct_Return)
2329 {
2330 unsigned int val;
2331
2332 val = bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_GNU, tag);
2333
2334 if ((tag == Tag_GNU_Power_ABI_FP && val > 15)
2335 || (tag == Tag_GNU_Power_ABI_Vector && val > 3)
2336 || (tag == Tag_GNU_Power_ABI_Struct_Return && val > 2))
2337 as_warn (_("unknown .gnu_attribute value"));
2338 }
2339}
2340
ee67d69a
AM		 2341/* Set ABI version in output file. */
2342void
2343ppc_elf_end (void)
2344{
2345 if (ppc_obj64 && ppc_abiversion != 0)
2346 {
2347 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2348 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2349 }
2350}
2351
252b5132
RH		 2352/* Validate any relocations emitted for -mrelocatable, possibly adding
2353 fixups for word relocations in writable segments, so we can adjust
2354 them at runtime. */
2355static void
98027b10 2356ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2357{
2358 if (fixp->fx_done || fixp->fx_pcrel)
2359 return;
2360
2361 switch (shlib)
2362 {
2363 case SHLIB_NONE:
2364 case SHLIB_PIC:
2365 return;
2366
5d6f4f16 2367 case SHLIB_MRELOCATABLE:
62ebcb5c 2368 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
252b5132
RH		 2369 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2370 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2371 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2372 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2373 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2374 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2375 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2376 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2377 && strcmp (segment_name (seg), ".got2") != 0
2378 && strcmp (segment_name (seg), ".dtors") != 0
2379 && strcmp (segment_name (seg), ".ctors") != 0
2380 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2381 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2382 && strcmp (segment_name (seg), ".eh_frame") != 0
2383 && strcmp (segment_name (seg), ".ex_shared") != 0)
2384 {
2385 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2386 || fixp->fx_r_type != BFD_RELOC_CTOR)
2387 {
2388 as_bad_where (fixp->fx_file, fixp->fx_line,
d6ed37ed 2389 _("relocation cannot be done when using -mrelocatable"));
252b5132
RH		 2390 }
2391 }
2392 return;
2393 }
2394}
0baf16f2 2395
7e8d4ab4
AM		 2396/* Prevent elf_frob_file_before_adjust removing a weak undefined
2397 function descriptor sym if the corresponding code sym is used. */
2398
2399void
98027b10 2400ppc_frob_file_before_adjust (void)
0baf16f2 2401{
7e8d4ab4 2402 symbolS *symp;
9232bbb0 2403 asection *toc;
0baf16f2 2404
7e8d4ab4
AM		 2405 if (!ppc_obj64)
2406 return;
2407
2408 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2409 {
7e8d4ab4
AM		 2410 const char *name;
2411 char *dotname;
2412 symbolS *dotsym;
7e8d4ab4
AM		 2413
2414 name = S_GET_NAME (symp);
2415 if (name[0] == '.')
2416 continue;
2417
2418 if (! S_IS_WEAK (symp)
2419 || S_IS_DEFINED (symp))
2420 continue;
2421
a44e2901 2422 dotname = concat (".", name, (char *) NULL);
461b725f 2423 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2424 free (dotname);
2425 if (dotsym != NULL && (symbol_used_p (dotsym)
2426 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2427 symbol_mark_used (symp);
2428
0baf16f2
AM		 2429 }
2430
9232bbb0
AM		 2431 toc = bfd_get_section_by_name (stdoutput, ".toc");
2432 if (toc != NULL
01efc3af 2433 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2434 && bfd_section_size (stdoutput, toc) > 0x10000)
2435 as_warn (_("TOC section size exceeds 64k"));
a38a07e0
AM		 2436}
2437
2438/* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2439 emitted. Other uses of .TOC. will cause the symbol to be marked
2440 with BSF_KEEP in md_apply_fix. */
9232bbb0 2441
a38a07e0
AM		 2442void
2443ppc_elf_adjust_symtab (void)
2444{
2445 if (ppc_obj64)
2446 {
2447 symbolS *symp;
2448 symp = symbol_find (".TOC.");
2449 if (symp != NULL)
2450 {
2451 asymbol *bsym = symbol_get_bfdsym (symp);
2452 if ((bsym->flags & BSF_KEEP) == 0)
2453 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
a38a07e0
AM		 2454 }
2455 }
0baf16f2 2456}
252b5132
RH		 2457#endif /* OBJ_ELF */
2458\f
2459#ifdef TE_PE
2460
2461/*
99a814a1 2462 * Summary of parse_toc_entry.
252b5132
RH		 2463 *
2464 * in: Input_line_pointer points to the '[' in one of:
2465 *
2466 * [toc] [tocv] [toc32] [toc64]
2467 *
2468 * Anything else is an error of one kind or another.
2469 *
81d4177b 2470 * out:
252b5132
RH		 2471 * return value: success or failure
2472 * toc_kind: kind of toc reference
2473 * input_line_pointer:
2474 * success: first char after the ']'
2475 * failure: unchanged
2476 *
2477 * settings:
2478 *
2479 * [toc] - rv == success, toc_kind = default_toc
2480 * [tocv] - rv == success, toc_kind = data_in_toc
2481 * [toc32] - rv == success, toc_kind = must_be_32
2482 * [toc64] - rv == success, toc_kind = must_be_64
2483 *
2484 */
2485
81d4177b
KH		 2486enum toc_size_qualifier
2487{
252b5132
RH		 2488 default_toc, /* The toc cell constructed should be the system default size */
2489 data_in_toc, /* This is a direct reference to a toc cell */
2490 must_be_32, /* The toc cell constructed must be 32 bits wide */
2491 must_be_64 /* The toc cell constructed must be 64 bits wide */
2492};
2493
2494static int
98027b10 2495parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2496{
2497 char *start;
2498 char *toc_spec;
2499 char c;
2500 enum toc_size_qualifier t;
2501
99a814a1 2502 /* Save the input_line_pointer. */
252b5132
RH		 2503 start = input_line_pointer;
2504
99a814a1 2505 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2506 ++input_line_pointer;
2507 SKIP_WHITESPACE ();
81d4177b 2508
99a814a1 2509 /* Find the spelling of the operand. */
d02603dc 2510 c = get_symbol_name (&toc_spec);
252b5132 2511
99a814a1 2512 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2513 {
2514 t = default_toc;
2515 }
99a814a1 2516 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2517 {
2518 t = data_in_toc;
2519 }
99a814a1 2520 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2521 {
2522 t = must_be_32;
2523 }
99a814a1 2524 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2525 {
2526 t = must_be_64;
2527 }
2528 else
2529 {
2530 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2531 *input_line_pointer = c;
2532 input_line_pointer = start;
252b5132
RH		 2533 return 0;
2534 }
2535
99a814a1
AM		 2536 /* Now find the ']'. */
2537 *input_line_pointer = c;
252b5132 2538
d02603dc 2539 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
81d4177b 2540 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2541
2542 if (c != ']')
2543 {
2544 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2545 input_line_pointer = start;
252b5132
RH		 2546 return 0;
2547 }
2548
99a814a1 2549 *toc_kind = t;
252b5132
RH		 2550 return 1;
2551}
2552#endif
3b8b57a9 2553
3e60bf4d 2554#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3b8b57a9
AM		 2555/* See whether a symbol is in the TOC section. */
2556
2557static int
2558ppc_is_toc_sym (symbolS *sym)
2559{
3e60bf4d 2560#ifdef OBJ_XCOFF
9f6e76f4
TG		 2561 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2562 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
f50c47f1 2563#endif
3e60bf4d
AM		 2564#ifdef OBJ_ELF
2565 const char *sname = segment_name (S_GET_SEGMENT (sym));
2566 if (ppc_obj64)
2567 return strcmp (sname, ".toc") == 0;
2568 else
2569 return strcmp (sname, ".got") == 0;
2570#endif
2571}
2572#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 2573\f
2574
dc1d03fc 2575#ifdef OBJ_ELF
6a0c61b7
EZ		 2576#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2577static void
98027b10 2578ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2579{
2580 unsigned int i;
2581
2582 /* Check we don't already exist. */
2583 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2584 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2585 return;
b34976b6 2586
6a0c61b7
EZ		 2587 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2588 {
2589 if (ppc_apuinfo_num_alloc == 0)
2590 {
2591 ppc_apuinfo_num_alloc = 4;
325801bd 2592 ppc_apuinfo_list = XNEWVEC (unsigned long, ppc_apuinfo_num_alloc);
6a0c61b7
EZ		 2593 }
2594 else
2595 {
2596 ppc_apuinfo_num_alloc += 4;
325801bd
TS		 2597 ppc_apuinfo_list = XRESIZEVEC (unsigned long, ppc_apuinfo_list,
2598 ppc_apuinfo_num_alloc);
6a0c61b7
EZ		 2599 }
2600 }
dc1d03fc 2601 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2602}
2603#undef APUID
dc1d03fc 2604#endif
6a0c61b7
EZ		 2605\f
2606
252b5132
RH		 2607/* We need to keep a list of fixups. We can't simply generate them as
2608 we go, because that would require us to first create the frag, and
2609 that would screw up references to ``.''. */
2610
2611struct ppc_fixup
2612{
2613 expressionS exp;
2614 int opindex;
2615 bfd_reloc_code_real_type reloc;
2616};
2617
2618#define MAX_INSN_FIXUPS (5)
2619
b9c361e0
JL		 2620/* Form I16L. */
2621#define E_OR2I_INSN 0x7000C000
2622#define E_AND2I_DOT_INSN 0x7000C800
2623#define E_OR2IS_INSN 0x7000D000
2624#define E_LIS_INSN 0x7000E000
2625#define E_AND2IS_DOT_INSN 0x7000E800
2626
2627/* Form I16A. */
2628#define E_ADD2I_DOT_INSN 0x70008800
2629#define E_ADD2IS_INSN 0x70009000
2630#define E_CMP16I_INSN 0x70009800
2631#define E_MULL2I_INSN 0x7000A000
2632#define E_CMPL16I_INSN 0x7000A800
2633#define E_CMPH16I_INSN 0x7000B000
2634#define E_CMPHL16I_INSN 0x7000B800
2635
252b5132
RH		 2636/* This routine is called for each instruction to be assembled. */
2637
2638void
98027b10 2639md_assemble (char *str)
252b5132
RH		 2640{
2641 char *s;
2642 const struct powerpc_opcode *opcode;
2643 unsigned long insn;
2644 const unsigned char *opindex_ptr;
2645 int skip_optional;
2646 int need_paren;
2647 int next_opindex;
2648 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2649 int fc;
2650 char *f;
09b935ac 2651 int addr_mod;
252b5132 2652 int i;
b9c361e0 2653 unsigned int insn_length;
252b5132
RH		 2654
2655 /* Get the opcode. */
3882b010 2656 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2657 ;
2658 if (*s != '\0')
2659 *s++ = '\0';
2660
2661 /* Look up the opcode in the hash table. */
2662 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2663 if (opcode == (const struct powerpc_opcode *) NULL)
2664 {
2665 const struct powerpc_macro *macro;
2666
2667 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2668 if (macro == (const struct powerpc_macro *) NULL)
d6ed37ed 2669 as_bad (_("unrecognized opcode: `%s'"), str);
252b5132
RH		 2670 else
2671 ppc_macro (s, macro);
2672
2673 return;
2674 }
2675
2676 insn = opcode->opcode;
2677
2678 str = s;
3882b010 2679 while (ISSPACE (*str))
252b5132
RH		 2680 ++str;
2681
2682 /* PowerPC operands are just expressions. The only real issue is
2683 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2684 an optional operand separate the operands only with commas (in some
2685 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2686 have optional operands). Most instructions with optional operands
2687 have only one. Those that have more than one optional operand can
2688 take either all their operands or none. So, before we start seriously
2689 parsing the operands, we check to see if we have optional operands,
2690 and if we do, we count the number of commas to see which operands
2691 have been omitted. */
252b5132
RH		 2692 skip_optional = 0;
2693 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2694 {
2695 const struct powerpc_operand *operand;
2696
2697 operand = &powerpc_operands[*opindex_ptr];
a5721ba2
AM		 2698 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2699 && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64))
252b5132
RH		 2700 {
2701 unsigned int opcount;
7fe9cf6b 2702 unsigned int num_operands_expected;
252b5132
RH		 2703
2704 /* There is an optional operand. Count the number of
2705 commas in the input line. */
2706 if (*str == '\0')
2707 opcount = 0;
2708 else
2709 {
2710 opcount = 1;
2711 s = str;
2712 while ((s = strchr (s, ',')) != (char *) NULL)
2713 {
2714 ++opcount;
2715 ++s;
2716 }
2717 }
2718
7fe9cf6b
NC		 2719 /* Compute the number of expected operands.
2720 Do not count fake operands. */
2721 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2722 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2723 ++ num_operands_expected;
2724
252b5132
RH		 2725 /* If there are fewer operands in the line then are called
2726 for by the instruction, we want to skip the optional
1f6c9eb0 2727 operands. */
7fe9cf6b 2728 if (opcount < num_operands_expected)
252b5132
RH		 2729 skip_optional = 1;
2730
2731 break;
2732 }
2733 }
2734
2735 /* Gather the operands. */
2736 need_paren = 0;
2737 next_opindex = 0;
2738 fc = 0;
2739 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2740 {
2741 const struct powerpc_operand *operand;
2742 const char *errmsg;
2743 char *hold;
2744 expressionS ex;
2745 char endc;
2746
2747 if (next_opindex == 0)
2748 operand = &powerpc_operands[*opindex_ptr];
2749 else
2750 {
2751 operand = &powerpc_operands[next_opindex];
2752 next_opindex = 0;
2753 }
252b5132
RH		 2754 errmsg = NULL;
2755
2756 /* If this is a fake operand, then we do not expect anything
2757 from the input. */
2758 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2759 {
2b3c4602 2760 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2761 if (errmsg != (const char *) NULL)
ee2c9aa9 2762 as_bad ("%s", errmsg);
252b5132
RH		 2763 continue;
2764 }
2765
2766 /* If this is an optional operand, and we are skipping it, just
2767 insert a zero. */
2768 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
a5721ba2 2769 && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64)
252b5132
RH		 2770 && skip_optional)
2771 {
11a0cf2e 2772 long val = ppc_optional_operand_value (operand);
252b5132
RH		 2773 if (operand->insert)
2774 {
11a0cf2e 2775 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg);
252b5132 2776 if (errmsg != (const char *) NULL)
ee2c9aa9 2777 as_bad ("%s", errmsg);
252b5132 2778 }
11a0cf2e
PB		 2779 else if (operand->shift >= 0)
2780 insn |= ((long) val & operand->bitm) << operand->shift;
2781 else
2782 insn |= ((long) val & operand->bitm) >> -operand->shift;
2783
252b5132
RH		 2784 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2785 next_opindex = *opindex_ptr + 1;
2786 continue;
2787 }
2788
2789 /* Gather the operand. */
2790 hold = input_line_pointer;
2791 input_line_pointer = str;
2792
2793#ifdef TE_PE
81d4177b 2794 if (*input_line_pointer == '[')
252b5132
RH		 2795 {
2796 /* We are expecting something like the second argument here:
99a814a1
AM		 2797 *
2798 * lwz r4,[toc].GS.0.static_int(rtoc)
2799 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2800 * The argument following the `]' must be a symbol name, and the
2801 * register must be the toc register: 'rtoc' or '2'
2802 *
2803 * The effect is to 0 as the displacement field
2804 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2805 * the appropriate variation) reloc against it based on the symbol.
2806 * The linker will build the toc, and insert the resolved toc offset.
2807 *
2808 * Note:
2809 * o The size of the toc entry is currently assumed to be
2810 * 32 bits. This should not be assumed to be a hard coded
2811 * number.
2812 * o In an effort to cope with a change from 32 to 64 bits,
2813 * there are also toc entries that are specified to be
2814 * either 32 or 64 bits:
2815 * lwz r4,[toc32].GS.0.static_int(rtoc)
2816 * lwz r4,[toc64].GS.0.static_int(rtoc)
2817 * These demand toc entries of the specified size, and the
2818 * instruction probably requires it.
2819 */
252b5132
RH		 2820
2821 int valid_toc;
2822 enum toc_size_qualifier toc_kind;
2823 bfd_reloc_code_real_type toc_reloc;
2824
99a814a1
AM		 2825 /* Go parse off the [tocXX] part. */
2826 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2827
81d4177b 2828 if (!valid_toc)
252b5132 2829 {
a5840dce
AM		 2830 ignore_rest_of_line ();
2831 break;
252b5132
RH		 2832 }
2833
99a814a1
AM		 2834 /* Now get the symbol following the ']'. */
2835 expression (&ex);
252b5132
RH		 2836
2837 switch (toc_kind)
2838 {
2839 case default_toc:
99a814a1
AM		 2840 /* In this case, we may not have seen the symbol yet,
2841 since it is allowed to appear on a .extern or .globl
2842 or just be a label in the .data section. */
252b5132
RH		 2843 toc_reloc = BFD_RELOC_PPC_TOC16;
2844 break;
2845 case data_in_toc:
99a814a1
AM		 2846 /* 1. The symbol must be defined and either in the toc
2847 section, or a global.
2848 2. The reloc generated must have the TOCDEFN flag set
2849 in upper bit mess of the reloc type.
2850 FIXME: It's a little confusing what the tocv
2851 qualifier can be used for. At the very least, I've
2852 seen three uses, only one of which I'm sure I can
2853 explain. */
81d4177b
KH		 2854 if (ex.X_op == O_symbol)
2855 {
9c2799c2 2856 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2857 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2858 != tocdata_section)
252b5132 2859 {
99a814a1 2860 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2861 }
2862 }
2863
2864 toc_reloc = BFD_RELOC_PPC_TOC16;
2865 break;
2866 case must_be_32:
99a814a1
AM		 2867 /* FIXME: these next two specifically specify 32/64 bit
2868 toc entries. We don't support them today. Is this
2869 the right way to say that? */
62ebcb5c 2870 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2871 as_bad (_("unimplemented toc32 expression modifier"));
252b5132
RH		 2872 break;
2873 case must_be_64:
99a814a1 2874 /* FIXME: see above. */
62ebcb5c 2875 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2876 as_bad (_("unimplemented toc64 expression modifier"));
252b5132
RH		 2877 break;
2878 default:
bc805888 2879 fprintf (stderr,
99a814a1
AM		 2880 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2881 toc_kind);
bc805888 2882 abort ();
252b5132
RH		 2883 break;
2884 }
2885
2886 /* We need to generate a fixup for this expression. */
2887 if (fc >= MAX_INSN_FIXUPS)
2888 as_fatal (_("too many fixups"));
2889
2890 fixups[fc].reloc = toc_reloc;
2891 fixups[fc].exp = ex;
2892 fixups[fc].opindex = *opindex_ptr;
2893 ++fc;
2894
99a814a1
AM		 2895 /* Ok. We've set up the fixup for the instruction. Now make it
2896 look like the constant 0 was found here. */
252b5132
RH		 2897 ex.X_unsigned = 1;
2898 ex.X_op = O_constant;
2899 ex.X_add_number = 0;
2900 ex.X_add_symbol = NULL;
2901 ex.X_op_symbol = NULL;
2902 }
2903
2904 else
2905#endif /* TE_PE */
2906 {
b9c361e0
JL		 2907 if ((reg_names_p
2908 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2909 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2ad068be 2910 || !register_name (&ex))
252b5132 2911 {
13abbae3
AM		 2912 char save_lex = lex_type['%'];
2913
b9c361e0
JL		 2914 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2915 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
13abbae3
AM		 2916 {
2917 cr_operand = TRUE;
2918 lex_type['%'] |= LEX_BEGIN_NAME;
2919 }
252b5132 2920 expression (&ex);
b34976b6 2921 cr_operand = FALSE;
13abbae3 2922 lex_type['%'] = save_lex;
252b5132
RH		 2923 }
2924 }
2925
2926 str = input_line_pointer;
2927 input_line_pointer = hold;
2928
2929 if (ex.X_op == O_illegal)
2930 as_bad (_("illegal operand"));
2931 else if (ex.X_op == O_absent)
2932 as_bad (_("missing operand"));
2933 else if (ex.X_op == O_register)
2934 {
2935 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2936 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2937 }
2938 else if (ex.X_op == O_constant)
2939 {
2940#ifdef OBJ_ELF
81d4177b 2941 /* Allow @HA, @L, @H on constants. */
3b8b57a9 2942 bfd_reloc_code_real_type reloc;
252b5132
RH		 2943 char *orig_str = str;
2944
62ebcb5c 2945 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
252b5132
RH		 2946 switch (reloc)
2947 {
2948 default:
2949 str = orig_str;
2950 break;
2951
2952 case BFD_RELOC_LO16:
f9c6b907
AM		 2953 ex.X_add_number &= 0xffff;
2954 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
0baf16f2 2955 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2956 break;
2957
2958 case BFD_RELOC_HI16:
f9c6b907
AM		 2959 if (REPORT_OVERFLOW_HI && ppc_obj64)
2960 {
2961 /* PowerPC64 @h is tested for overflow. */
2962 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2963 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2964 {
2965 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2966 ex.X_add_number
2967 = ((addressT) ex.X_add_number ^ sign) - sign;
2968 }
2969 break;
2970 }
2971 /* Fall thru */
2972
2973 case BFD_RELOC_PPC64_ADDR16_HIGH:
2974 ex.X_add_number = PPC_HI (ex.X_add_number);
2975 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2976 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2977 break;
2978
2979 case BFD_RELOC_HI16_S:
f9c6b907
AM		 2980 if (REPORT_OVERFLOW_HI && ppc_obj64)
2981 {
2982 /* PowerPC64 @ha is tested for overflow. */
2983 ex.X_add_number
2984 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2985 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2986 {
2987 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2988 ex.X_add_number
2989 = ((addressT) ex.X_add_number ^ sign) - sign;
2990 }
2991 break;
2992 }
2993 /* Fall thru */
2994
2995 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2996 ex.X_add_number = PPC_HA (ex.X_add_number);
2997 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2998 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2999 break;
3000
0baf16f2 3001 case BFD_RELOC_PPC64_HIGHER:
f9c6b907
AM		 3002 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
3003 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3004 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 3005 break;
3006
3007 case BFD_RELOC_PPC64_HIGHER_S:
f9c6b907
AM		 3008 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
3009 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3010 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132 3011 break;
0baf16f2
AM		 3012
3013 case BFD_RELOC_PPC64_HIGHEST:
f9c6b907
AM		 3014 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
3015 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3016 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 3017 break;
3018
3019 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 3020 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
3021 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3022 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2 3023 break;
252b5132 3024 }
0baf16f2 3025#endif /* OBJ_ELF */
252b5132 3026 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 3027 ppc_cpu, (char *) NULL, 0);
252b5132 3028 }
727fc41e 3029 else
252b5132 3030 {
62ebcb5c 3031 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3b8b57a9 3032#ifdef OBJ_ELF
727fc41e 3033 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 3034 {
727fc41e
AM		 3035 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3036 if (sym_name[0] == '.')
3037 ++sym_name;
cdba85ec 3038
727fc41e 3039 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 3040 {
727fc41e
AM		 3041 expressionS tls_exp;
3042
3043 hold = input_line_pointer;
3044 input_line_pointer = str + 1;
3045 expression (&tls_exp);
3046 if (tls_exp.X_op == O_symbol)
3047 {
62ebcb5c 3048 reloc = BFD_RELOC_NONE;
727fc41e
AM		 3049 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3050 {
3051 reloc = BFD_RELOC_PPC_TLSGD;
3052 input_line_pointer += 7;
3053 }
3054 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3055 {
3056 reloc = BFD_RELOC_PPC_TLSLD;
3057 input_line_pointer += 7;
3058 }
62ebcb5c 3059 if (reloc != BFD_RELOC_NONE)
727fc41e
AM		 3060 {
3061 SKIP_WHITESPACE ();
3062 str = input_line_pointer;
3063
3064 if (fc >= MAX_INSN_FIXUPS)
3065 as_fatal (_("too many fixups"));
3066 fixups[fc].exp = tls_exp;
3067 fixups[fc].opindex = *opindex_ptr;
3068 fixups[fc].reloc = reloc;
3069 ++fc;
3070 }
3071 }
3072 input_line_pointer = hold;
252b5132
RH		 3073 }
3074 }
3075
62ebcb5c 3076 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
0baf16f2 3077 {
727fc41e 3078 /* Some TLS tweaks. */
0baf16f2
AM		 3079 switch (reloc)
3080 {
727fc41e 3081 default:
cdba85ec 3082 break;
727fc41e
AM		 3083
3084 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 3085 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3086 as_bad (_("@tls may not be used with \"%s\" operands"),
3087 opcode->name);
3088 else if (operand->shift != 11)
3089 as_bad (_("@tls may only be used in last operand"));
3090 else
3091 insn = ppc_insert_operand (insn, operand,
3092 ppc_obj64 ? 13 : 2,
3093 ppc_cpu, (char *) NULL, 0);
cdba85ec 3094 break;
727fc41e
AM		 3095
3096 /* We'll only use the 32 (or 64) bit form of these relocations
3097 in constants. Instructions get the 16 bit form. */
3098 case BFD_RELOC_PPC_DTPREL:
3099 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 3100 break;
727fc41e
AM		 3101 case BFD_RELOC_PPC_TPREL:
3102 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 3103 break;
3104 }
727fc41e 3105
a680de9a
PB		 3106 /* addpcis. */
3107 if (opcode->opcode == (19 << 26) + (2 << 1)
3108 && reloc == BFD_RELOC_HI16_S)
3109 reloc = BFD_RELOC_PPC_REL16DX_HA;
3110
b9c361e0
JL		 3111 /* If VLE-mode convert LO/HI/HA relocations. */
3112 if (opcode->flags & PPC_OPCODE_VLE)
3113 {
3114 int tmp_insn = insn & opcode->mask;
3739860c 3115
b9c361e0
JL		 3116 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3117 || tmp_insn == E_AND2I_DOT_INSN
3118 || tmp_insn == E_OR2IS_INSN
3119 || tmp_insn == E_LIS_INSN
3120 || tmp_insn == E_AND2IS_DOT_INSN);
3121
3122
3123 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3124 || tmp_insn == E_ADD2IS_INSN
3125 || tmp_insn == E_CMP16I_INSN
3126 || tmp_insn == E_MULL2I_INSN
3127 || tmp_insn == E_CMPL16I_INSN
3128 || tmp_insn == E_CMPH16I_INSN
3129 || tmp_insn == E_CMPHL16I_INSN);
3130
3131 switch (reloc)
3132 {
3133 default:
3134 break;
3135
3136 case BFD_RELOC_PPC_EMB_SDA21:
3137 reloc = BFD_RELOC_PPC_VLE_SDA21;
3138 break;
3139
3140 case BFD_RELOC_LO16:
3141 if (use_d_reloc)
3142 reloc = BFD_RELOC_PPC_VLE_LO16D;
3143 else if (use_a_reloc)
3144 reloc = BFD_RELOC_PPC_VLE_LO16A;
3145 break;
3146
3147 case BFD_RELOC_HI16:
3148 if (use_d_reloc)
3149 reloc = BFD_RELOC_PPC_VLE_HI16D;
3150 else if (use_a_reloc)
3151 reloc = BFD_RELOC_PPC_VLE_HI16A;
3152 break;
3739860c 3153
b9c361e0
JL		 3154 case BFD_RELOC_HI16_S:
3155 if (use_d_reloc)
3156 reloc = BFD_RELOC_PPC_VLE_HA16D;
3157 else if (use_a_reloc)
3158 reloc = BFD_RELOC_PPC_VLE_HA16A;
3159 break;
3160
3161 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3162 if (use_d_reloc)
3163 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3164 break;
3165
3166 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3167 if (use_d_reloc)
3168 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3169 break;
3170
3171 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3172 if (use_d_reloc)
3173 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3174 break;
3175 }
3176 }
0baf16f2 3177 }
3b8b57a9
AM		 3178#endif /* OBJ_ELF */
3179
62ebcb5c 3180 if (reloc != BFD_RELOC_NONE)
3b8b57a9
AM		 3181 ;
3182 /* Determine a BFD reloc value based on the operand information.
3183 We are only prepared to turn a few of the operands into
3184 relocs. */
a0593ad9
AM		 3185 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3186 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3187 && operand->bitm == 0x3fffffc
3188 && operand->shift == 0)
3189 reloc = BFD_RELOC_PPC_B26;
a0593ad9
AM		 3190 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3191 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3192 && operand->bitm == 0xfffc
3193 && operand->shift == 0)
3194 reloc = BFD_RELOC_PPC_B16;
3195 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3196 && operand->bitm == 0x1fe
3197 && operand->shift == -1)
3198 reloc = BFD_RELOC_PPC_VLE_REL8;
3199 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3200 && operand->bitm == 0xfffe
3201 && operand->shift == 0)
3202 reloc = BFD_RELOC_PPC_VLE_REL15;
3203 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3204 && operand->bitm == 0x1fffffe
3205 && operand->shift == 0)
3206 reloc = BFD_RELOC_PPC_VLE_REL24;
a0593ad9 3207 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3b8b57a9
AM		 3208 && (operand->bitm & 0xfff0) == 0xfff0
3209 && operand->shift == 0)
3210 {
f50c47f1 3211 reloc = BFD_RELOC_16;
3e60bf4d 3212#if defined OBJ_XCOFF || defined OBJ_ELF
f50c47f1 3213 /* Note: the symbol may be not yet defined. */
a0593ad9
AM		 3214 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3215 && ppc_is_toc_sym (ex.X_add_symbol))
3e60bf4d
AM		 3216 {
3217 reloc = BFD_RELOC_PPC_TOC16;
3218#ifdef OBJ_ELF
3219 as_warn (_("assuming %s on symbol"),
3220 ppc_obj64 ? "@toc" : "@xgot");
3221#endif
3222 }
3b8b57a9 3223#endif
3b8b57a9 3224 }
a0593ad9
AM		 3225
3226 /* For the absolute forms of branches, convert the PC
3227 relative form back into the absolute. */
3228 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3229 {
3230 switch (reloc)
3231 {
3232 case BFD_RELOC_PPC_B26:
3233 reloc = BFD_RELOC_PPC_BA26;
3234 break;
3235 case BFD_RELOC_PPC_B16:
3236 reloc = BFD_RELOC_PPC_BA16;
3237 break;
3238#ifdef OBJ_ELF
3239 case BFD_RELOC_PPC_B16_BRTAKEN:
3240 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3241 break;
3242 case BFD_RELOC_PPC_B16_BRNTAKEN:
3243 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3244 break;
3245#endif
3246 default:
3247 break;
3248 }
3249 }
3250
3251#ifdef OBJ_ELF
3252 switch (reloc)
3253 {
3254 case BFD_RELOC_PPC_TOC16:
3255 toc_reloc_types |= has_small_toc_reloc;
3256 break;
3257 case BFD_RELOC_PPC64_TOC16_LO:
3258 case BFD_RELOC_PPC64_TOC16_HI:
3259 case BFD_RELOC_PPC64_TOC16_HA:
3260 toc_reloc_types |= has_large_toc_reloc;
3261 break;
3262 default:
3263 break;
3264 }
3265
3266 if (ppc_obj64
3267 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3268 {
3269 switch (reloc)
3270 {
3271 case BFD_RELOC_16:
3272 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3273 break;
3274 case BFD_RELOC_LO16:
3275 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3276 break;
3277 case BFD_RELOC_16_GOTOFF:
3278 reloc = BFD_RELOC_PPC64_GOT16_DS;
3279 break;
3280 case BFD_RELOC_LO16_GOTOFF:
3281 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3282 break;
3283 case BFD_RELOC_LO16_PLTOFF:
3284 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3285 break;
3286 case BFD_RELOC_16_BASEREL:
3287 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3288 break;
3289 case BFD_RELOC_LO16_BASEREL:
3290 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3291 break;
3292 case BFD_RELOC_PPC_TOC16:
3293 reloc = BFD_RELOC_PPC64_TOC16_DS;
3294 break;
3295 case BFD_RELOC_PPC64_TOC16_LO:
3296 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3297 break;
3298 case BFD_RELOC_PPC64_PLTGOT16:
3299 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3300 break;
3301 case BFD_RELOC_PPC64_PLTGOT16_LO:
3302 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3303 break;
3304 case BFD_RELOC_PPC_DTPREL16:
3305 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3306 break;
3307 case BFD_RELOC_PPC_DTPREL16_LO:
3308 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3309 break;
3310 case BFD_RELOC_PPC_TPREL16:
3311 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3312 break;
3313 case BFD_RELOC_PPC_TPREL16_LO:
3314 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3315 break;
3316 case BFD_RELOC_PPC_GOT_DTPREL16:
3317 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3318 case BFD_RELOC_PPC_GOT_TPREL16:
3319 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3320 break;
3321 default:
3322 as_bad (_("unsupported relocation for DS offset field"));
3323 break;
3324 }
3325 }
3326#endif
0baf16f2 3327
252b5132
RH		 3328 /* We need to generate a fixup for this expression. */
3329 if (fc >= MAX_INSN_FIXUPS)
3330 as_fatal (_("too many fixups"));
3331 fixups[fc].exp = ex;
727fc41e 3332 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 3333 fixups[fc].reloc = reloc;
3334 ++fc;
3335 }
252b5132
RH		 3336
3337 if (need_paren)
3338 {
3339 endc = ')';
3340 need_paren = 0;
c3d65c1c
BE		 3341 /* If expecting more operands, then we want to see "),". */
3342 if (*str == endc && opindex_ptr[1] != 0)
3343 {
3344 do
3345 ++str;
3346 while (ISSPACE (*str));
3347 endc = ',';
3348 }
252b5132
RH		 3349 }
3350 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3351 {
3352 endc = '(';
3353 need_paren = 1;
3354 }
3355 else
3356 endc = ',';
3357
3358 /* The call to expression should have advanced str past any
3359 whitespace. */
3360 if (*str != endc
3361 && (endc != ',' || *str != '\0'))
3362 {
5a938047
AM		 3363 if (*str == '\0')
3364 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3365 else
3366 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 3367 break;
3368 }
3369
3370 if (*str != '\0')
3371 ++str;
3372 }
3373
3882b010 3374 while (ISSPACE (*str))
252b5132
RH		 3375 ++str;
3376
3377 if (*str != '\0')
3378 as_bad (_("junk at end of line: `%s'"), str);
3379
dc1d03fc 3380#ifdef OBJ_ELF
b9c361e0 3381 /* Do we need/want an APUinfo section? */
4faf939a
JM		 3382 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3383 && !ppc_obj64)
6a0c61b7
EZ		 3384 {
3385 /* These are all version "1". */
3386 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 3387 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 3388 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 3389 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 3390 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 3391 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 3392 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 3393 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 3394 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 3395 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 3396 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 3397 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 3398 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 3399 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
fbd94057
MR		 3400 /* Only set the VLE flag if the instruction has been pulled via
3401 the VLE instruction set. This way the flag is guaranteed to
3402 be set for VLE-only instructions or for VLE-only processors,
3403 however it'll remain clear for dual-mode instructions on
3404 dual-mode and, more importantly, standard-mode processors. */
3405 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
f7d69005
AM		 3406 {
3407 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
3408 if (elf_section_data (now_seg) != NULL)
3409 elf_section_data (now_seg)->this_hdr.sh_flags |= SHF_PPC_VLE;
3410 }
6a0c61b7 3411 }
dc1d03fc 3412#endif
6a0c61b7 3413
252b5132 3414 /* Write out the instruction. */
b9c361e0 3415 /* Differentiate between two and four byte insns. */
f7d69005 3416 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
b9c361e0
JL		 3417 {
3418 if (PPC_OP_SE_VLE (insn))
3419 insn_length = 2;
3420 else
3421 insn_length = 4;
3422 addr_mod = frag_now_fix () & 1;
3423 }
3424 else
3425 {
3426 insn_length = 4;
3427 addr_mod = frag_now_fix () & 3;
3428 }
3429 /* All instructions can start on a 2 byte boundary for VLE. */
3430 f = frag_more (insn_length);
09b935ac 3431 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
b9c361e0 3432 {
f7d69005 3433 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
b9c361e0
JL		 3434 as_bad (_("instruction address is not a multiple of 2"));
3435 else
3436 as_bad (_("instruction address is not a multiple of 4"));
3437 }
09b935ac
AM		 3438 frag_now->insn_addr = addr_mod;
3439 frag_now->has_code = 1;
b9c361e0 3440 md_number_to_chars (f, insn, insn_length);
bf7279d5
AM		 3441 last_insn = insn;
3442 last_seg = now_seg;
3443 last_subseg = now_subseg;
252b5132 3444
5d6f4f16 3445#ifdef OBJ_ELF
b9c361e0 3446 dwarf2_emit_insn (insn_length);
5d6f4f16
GK		 3447#endif
3448
3b8b57a9 3449 /* Create any fixups. */
252b5132
RH		 3450 for (i = 0; i < fc; i++)
3451 {
3b8b57a9 3452 fixS *fixP;
62ebcb5c 3453 if (fixups[i].reloc != BFD_RELOC_NONE)
252b5132 3454 {
99a814a1 3455 reloc_howto_type *reloc_howto;
252b5132
RH		 3456 int size;
3457 int offset;
252b5132 3458
99a814a1 3459 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3460 if (!reloc_howto)
3461 abort ();
3462
3463 size = bfd_get_reloc_size (reloc_howto);
3b8b57a9 3464 offset = target_big_endian ? (insn_length - size) : 0;
252b5132 3465
99a814a1
AM		 3466 fixP = fix_new_exp (frag_now,
3467 f - frag_now->fr_literal + offset,
3468 size,
3469 &fixups[i].exp,
3470 reloc_howto->pc_relative,
252b5132 3471 fixups[i].reloc);
252b5132
RH		 3472 }
3473 else
727fc41e
AM		 3474 {
3475 const struct powerpc_operand *operand;
3476
3477 operand = &powerpc_operands[fixups[i].opindex];
3b8b57a9
AM		 3478 fixP = fix_new_exp (frag_now,
3479 f - frag_now->fr_literal,
3480 insn_length,
3481 &fixups[i].exp,
3482 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
62ebcb5c 3483 BFD_RELOC_NONE);
727fc41e 3484 }
3b8b57a9 3485 fixP->fx_pcrel_adjust = fixups[i].opindex;
252b5132
RH		 3486 }
3487}
3488
3489/* Handle a macro. Gather all the operands, transform them as
3490 described by the macro, and call md_assemble recursively. All the
3491 operands are separated by commas; we don't accept parentheses
3492 around operands here. */
3493
3494static void
98027b10 3495ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3496{
3497 char *operands[10];
3498 unsigned int count;
3499 char *s;
3500 unsigned int len;
3501 const char *format;
db557034 3502 unsigned int arg;
252b5132
RH		 3503 char *send;
3504 char *complete;
3505
3506 /* Gather the users operands into the operands array. */
3507 count = 0;
3508 s = str;
3509 while (1)
3510 {
3511 if (count >= sizeof operands / sizeof operands[0])
3512 break;
3513 operands[count++] = s;
3514 s = strchr (s, ',');
3515 if (s == (char *) NULL)
3516 break;
3517 *s++ = '\0';
81d4177b 3518 }
252b5132
RH		 3519
3520 if (count != macro->operands)
3521 {
3522 as_bad (_("wrong number of operands"));
3523 return;
3524 }
3525
3526 /* Work out how large the string must be (the size is unbounded
3527 because it includes user input). */
3528 len = 0;
3529 format = macro->format;
3530 while (*format != '\0')
3531 {
3532 if (*format != '%')
3533 {
3534 ++len;
3535 ++format;
3536 }
3537 else
3538 {
3539 arg = strtol (format + 1, &send, 10);
db557034 3540 know (send != format && arg < count);
252b5132
RH		 3541 len += strlen (operands[arg]);
3542 format = send;
3543 }
3544 }
3545
3546 /* Put the string together. */
325801bd 3547 complete = s = XNEWVEC (char, len + 1);
252b5132
RH		 3548 format = macro->format;
3549 while (*format != '\0')
3550 {
3551 if (*format != '%')
3552 *s++ = *format++;
3553 else
3554 {
3555 arg = strtol (format + 1, &send, 10);
3556 strcpy (s, operands[arg]);
3557 s += strlen (s);
3558 format = send;
3559 }
3560 }
3561 *s = '\0';
3562
3563 /* Assemble the constructed instruction. */
3564 md_assemble (complete);
e1fa0163 3565 free (complete);
81d4177b 3566}
252b5132
RH		 3567\f
3568#ifdef OBJ_ELF
18ae9cc1 3569/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3570
3571int
98027b10 3572ppc_section_type (char *str, size_t len)
252b5132 3573{
9de8d8f1
RH		 3574 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3575 return SHT_ORDERED;
252b5132 3576
9de8d8f1 3577 return -1;
252b5132
RH		 3578}
3579
3580int
1239de13 3581ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3582{
3583 if (type == SHT_ORDERED)
3584 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3585
252b5132
RH		 3586 return flags;
3587}
3588#endif /* OBJ_ELF */
3589
3590\f
3591/* Pseudo-op handling. */
3592
3593/* The .byte pseudo-op. This is similar to the normal .byte
3594 pseudo-op, but it can also take a single ASCII string. */
3595
3596static void
98027b10 3597ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132 3598{
bf7279d5
AM		 3599 int count = 0;
3600
252b5132
RH		 3601 if (*input_line_pointer != '\"')
3602 {
3603 cons (1);
3604 return;
3605 }
3606
3607 /* Gather characters. A real double quote is doubled. Unusual
3608 characters are not permitted. */
3609 ++input_line_pointer;
3610 while (1)
3611 {
3612 char c;
3613
3614 c = *input_line_pointer++;
3615
3616 if (c == '\"')
3617 {
3618 if (*input_line_pointer != '\"')
3619 break;
3620 ++input_line_pointer;
3621 }
3622
3623 FRAG_APPEND_1_CHAR (c);
bf7279d5 3624 ++count;
252b5132
RH		 3625 }
3626
bf7279d5
AM		 3627 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3628 as_warn (_("data in executable section"));
252b5132
RH		 3629 demand_empty_rest_of_line ();
3630}
3631\f
3632#ifdef OBJ_XCOFF
3633
3634/* XCOFF specific pseudo-op handling. */
3635
3636/* This is set if we are creating a .stabx symbol, since we don't want
3637 to handle symbol suffixes for such symbols. */
b34976b6 3638static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3639
3640/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3641 symbols in the .bss segment as though they were local common
67c1ffbe 3642 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3643 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3644
3645static void
98027b10 3646ppc_comm (int lcomm)
252b5132
RH		 3647{
3648 asection *current_seg = now_seg;
3649 subsegT current_subseg = now_subseg;
3650 char *name;
3651 char endc;
3652 char *end_name;
3653 offsetT size;
3654 offsetT align;
3655 symbolS *lcomm_sym = NULL;
3656 symbolS *sym;
3657 char *pfrag;
3658
d02603dc 3659 endc = get_symbol_name (&name);
252b5132 3660 end_name = input_line_pointer;
d02603dc 3661 (void) restore_line_pointer (endc);
252b5132
RH		 3662
3663 if (*input_line_pointer != ',')
3664 {
3665 as_bad (_("missing size"));
3666 ignore_rest_of_line ();
3667 return;
3668 }
3669 ++input_line_pointer;
3670
3671 size = get_absolute_expression ();
3672 if (size < 0)
3673 {
3674 as_bad (_("negative size"));
3675 ignore_rest_of_line ();
3676 return;
3677 }
3678
3679 if (! lcomm)
3680 {
3681 /* The third argument to .comm is the alignment. */
3682 if (*input_line_pointer != ',')
1ad63b2f 3683 align = 2;
252b5132
RH		 3684 else
3685 {
3686 ++input_line_pointer;
3687 align = get_absolute_expression ();
3688 if (align <= 0)
3689 {
3690 as_warn (_("ignoring bad alignment"));
1ad63b2f 3691 align = 2;
252b5132
RH		 3692 }
3693 }
3694 }
3695 else
3696 {
3697 char *lcomm_name;
3698 char lcomm_endc;
3699
252b5132
RH		 3700 /* The third argument to .lcomm appears to be the real local
3701 common symbol to create. References to the symbol named in
3702 the first argument are turned into references to the third
3703 argument. */
3704 if (*input_line_pointer != ',')
3705 {
3706 as_bad (_("missing real symbol name"));
3707 ignore_rest_of_line ();
3708 return;
3709 }
3710 ++input_line_pointer;
3711
d02603dc 3712 lcomm_endc = get_symbol_name (&lcomm_name);
81d4177b 3713
252b5132
RH		 3714 lcomm_sym = symbol_find_or_make (lcomm_name);
3715
d02603dc 3716 (void) restore_line_pointer (lcomm_endc);
3c02c47f
DE		 3717
3718 /* The fourth argument to .lcomm is the alignment. */
3719 if (*input_line_pointer != ',')
3720 {
3721 if (size <= 4)
3722 align = 2;
3723 else
3724 align = 3;
3725 }
3726 else
3727 {
3728 ++input_line_pointer;
3729 align = get_absolute_expression ();
3730 if (align <= 0)
3731 {
3732 as_warn (_("ignoring bad alignment"));
3733 align = 2;
3734 }
3735 }
252b5132
RH		 3736 }
3737
3738 *end_name = '\0';
3739 sym = symbol_find_or_make (name);
3740 *end_name = endc;
3741
3742 if (S_IS_DEFINED (sym)
3743 || S_GET_VALUE (sym) != 0)
3744 {
3745 as_bad (_("attempt to redefine symbol"));
3746 ignore_rest_of_line ();
3747 return;
3748 }
81d4177b 3749
252b5132 3750 record_alignment (bss_section, align);
81d4177b 3751
252b5132
RH		 3752 if (! lcomm
3753 || ! S_IS_DEFINED (lcomm_sym))
3754 {
3755 symbolS *def_sym;
3756 offsetT def_size;
3757
3758 if (! lcomm)
3759 {
3760 def_sym = sym;
3761 def_size = size;
3762 S_SET_EXTERNAL (sym);
3763 }
3764 else
3765 {
809ffe0d 3766 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3767 def_sym = lcomm_sym;
3768 def_size = 0;
3769 }
3770
3771 subseg_set (bss_section, 1);
3772 frag_align (align, 0, 0);
81d4177b 3773
809ffe0d 3774 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3775 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3776 def_size, (char *) NULL);
3777 *pfrag = 0;
3778 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3779 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3780 }
3781 else if (lcomm)
3782 {
3783 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3784 symbol_get_frag (lcomm_sym)->fr_offset =
3785 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3786 &~ ((1 << align) - 1));
809ffe0d
ILT		 3787 if (align > symbol_get_tc (lcomm_sym)->align)
3788 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3789 }
3790
3791 if (lcomm)
3792 {
3793 /* Make sym an offset from lcomm_sym. */
3794 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3795 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3796 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3797 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3798 }
3799
3800 subseg_set (current_seg, current_subseg);
3801
3802 demand_empty_rest_of_line ();
3803}
3804
3805/* The .csect pseudo-op. This switches us into a different
3806 subsegment. The first argument is a symbol whose value is the
3807 start of the .csect. In COFF, csect symbols get special aux
3808 entries defined by the x_csect field of union internal_auxent. The
3809 optional second argument is the alignment (the default is 2). */
3810
3811static void
98027b10 3812ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3813{
3814 char *name;
3815 char endc;
3816 symbolS *sym;
931e13a6 3817 offsetT align;
252b5132 3818
d02603dc 3819 endc = get_symbol_name (&name);
81d4177b 3820
252b5132
RH		 3821 sym = symbol_find_or_make (name);
3822
d02603dc 3823 (void) restore_line_pointer (endc);
252b5132
RH		 3824
3825 if (S_GET_NAME (sym)[0] == '\0')
3826 {
3827 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3828 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3829 }
3830
931e13a6 3831 align = 2;
252b5132
RH		 3832 if (*input_line_pointer == ',')
3833 {
3834 ++input_line_pointer;
931e13a6 3835 align = get_absolute_expression ();
252b5132
RH		 3836 }
3837
931e13a6
AM		 3838 ppc_change_csect (sym, align);
3839
252b5132
RH		 3840 demand_empty_rest_of_line ();
3841}
3842
3843/* Change to a different csect. */
3844
3845static void
98027b10 3846ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3847{
3848 if (S_IS_DEFINED (sym))
809ffe0d 3849 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3850 else
3851 {
3852 symbolS **list_ptr;
3853 int after_toc;
3854 int hold_chunksize;
3855 symbolS *list;
931e13a6
AM		 3856 int is_code;
3857 segT sec;
252b5132
RH		 3858
3859 /* This is a new csect. We need to look at the symbol class to
3860 figure out whether it should go in the text section or the
3861 data section. */
3862 after_toc = 0;
931e13a6 3863 is_code = 0;
96d56e9f 3864 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3865 {
3866 case XMC_PR:
3867 case XMC_RO:
3868 case XMC_DB:
3869 case XMC_GL:
3870 case XMC_XO:
3871 case XMC_SV:
3872 case XMC_TI:
3873 case XMC_TB:
3874 S_SET_SEGMENT (sym, text_section);
809ffe0d 3875 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3876 ++ppc_text_subsegment;
3877 list_ptr = &ppc_text_csects;
931e13a6 3878 is_code = 1;
252b5132
RH		 3879 break;
3880 case XMC_RW:
3881 case XMC_TC0:
3882 case XMC_TC:
3883 case XMC_DS:
3884 case XMC_UA:
3885 case XMC_BS:
3886 case XMC_UC:
3887 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3888 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3889 == ppc_data_subsegment))
252b5132
RH		 3890 after_toc = 1;
3891 S_SET_SEGMENT (sym, data_section);
809ffe0d 3892 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3893 ++ppc_data_subsegment;
3894 list_ptr = &ppc_data_csects;
3895 break;
3896 default:
3897 abort ();
3898 }
3899
3900 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3901 changing subsegments, so that we don't use a lot of memory
3902 space for what may be a small section. */
252b5132
RH		 3903 hold_chunksize = chunksize;
3904 chunksize = 64;
3905
931e13a6
AM		 3906 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3907 symbol_get_tc (sym)->subseg);
252b5132
RH		 3908
3909 chunksize = hold_chunksize;
3910
3911 if (after_toc)
3912 ppc_after_toc_frag = frag_now;
3913
931e13a6
AM		 3914 record_alignment (sec, align);
3915 if (is_code)
3916 frag_align_code (align, 0);
3917 else
3918 frag_align (align, 0, 0);
3919
809ffe0d 3920 symbol_set_frag (sym, frag_now);
252b5132
RH		 3921 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3922
931e13a6 3923 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3924 symbol_get_tc (sym)->output = 1;
3925 symbol_get_tc (sym)->within = sym;
81d4177b 3926
252b5132 3927 for (list = *list_ptr;
809ffe0d
ILT		 3928 symbol_get_tc (list)->next != (symbolS *) NULL;
3929 list = symbol_get_tc (list)->next)
252b5132 3930 ;
809ffe0d 3931 symbol_get_tc (list)->next = sym;
81d4177b 3932
252b5132 3933 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3934 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3935 &symbol_lastP);
252b5132
RH		 3936 }
3937
3938 ppc_current_csect = sym;
3939}
3940
85645aed
TG		 3941static void
3942ppc_change_debug_section (unsigned int idx, subsegT subseg)
3943{
3944 segT sec;
3945 flagword oldflags;
3946 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3947
3948 sec = subseg_new (dw->name, subseg);
3949 oldflags = bfd_get_section_flags (stdoutput, sec);
3950 if (oldflags == SEC_NO_FLAGS)
3951 {
3952 /* Just created section. */
3953 gas_assert (dw_sections[idx].sect == NULL);
3954
3955 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3956 bfd_set_section_alignment (stdoutput, sec, 0);
3957 dw_sections[idx].sect = sec;
3958 }
3959
3960 /* Not anymore in a csect. */
3961 ppc_current_csect = NULL;
3962}
3963
3964/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3965 .dwsect flag [, opt-label ]
3966*/
3967
3968static void
3969ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3970{
3971 offsetT flag;
3972 symbolS *opt_label;
3973 const struct xcoff_dwsect_name *dw;
3974 struct dw_subsection *subseg;
3975 struct dw_section *dws;
3976 int i;
3977
3978 /* Find section. */
3979 flag = get_absolute_expression ();
3980 dw = NULL;
3981 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3982 if (xcoff_dwsect_names[i].flag == flag)
3983 {
3984 dw = &xcoff_dwsect_names[i];
3985 break;
3986 }
3987
3988 /* Parse opt-label. */
3989 if (*input_line_pointer == ',')
3990 {
d02603dc 3991 char *label;
85645aed
TG		 3992 char c;
3993
3994 ++input_line_pointer;
3995
d02603dc 3996 c = get_symbol_name (&label);
85645aed 3997 opt_label = symbol_find_or_make (label);
d02603dc 3998 (void) restore_line_pointer (c);
85645aed
TG		 3999 }
4000 else
4001 opt_label = NULL;
4002
4003 demand_empty_rest_of_line ();
4004
4005 /* Return now in case of unknown subsection. */
4006 if (dw == NULL)
4007 {
d6ed37ed 4008 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
85645aed
TG		 4009 (unsigned)flag);
4010 return;
4011 }
4012
4013 /* Find the subsection. */
4014 dws = &dw_sections[i];
4015 subseg = NULL;
4016 if (opt_label != NULL && S_IS_DEFINED (opt_label))
4017 {
4018 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4019 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
4020 {
4021 as_bad (_("label %s was not defined in this dwarf section"),
4022 S_GET_NAME (opt_label));
4023 subseg = dws->anon_subseg;
4024 opt_label = NULL;
4025 }
4026 else
4027 subseg = symbol_get_tc (opt_label)->u.dw;
4028 }
4029
4030 if (subseg != NULL)
4031 {
4032 /* Switch to the subsection. */
4033 ppc_change_debug_section (i, subseg->subseg);
4034 }
4035 else
4036 {
4037 /* Create a new dw subsection. */
325801bd 4038 subseg = XNEW (struct dw_subsection);
85645aed
TG		 4039
4040 if (opt_label == NULL)
4041 {
4042 /* The anonymous one. */
4043 subseg->subseg = 0;
4044 subseg->link = NULL;
4045 dws->anon_subseg = subseg;
4046 }
4047 else
4048 {
4049 /* A named one. */
4050 if (dws->list_subseg != NULL)
4051 subseg->subseg = dws->list_subseg->subseg + 1;
4052 else
4053 subseg->subseg = 1;
4054
4055 subseg->link = dws->list_subseg;
4056 dws->list_subseg = subseg;
4057 symbol_get_tc (opt_label)->u.dw = subseg;
4058 }
4059
4060 ppc_change_debug_section (i, subseg->subseg);
4061
4062 if (dw->def_size)
4063 {
4064 /* Add the length field. */
4065 expressionS *exp = &subseg->end_exp;
4066 int sz;
4067
4068 if (opt_label != NULL)
4069 symbol_set_value_now (opt_label);
4070
4071 /* Add the length field. Note that according to the AIX assembler
4072 manual, the size of the length field is 4 for powerpc32 but
4073 12 for powerpc64. */
4074 if (ppc_obj64)
4075 {
4076 /* Write the 64bit marker. */
4077 md_number_to_chars (frag_more (4), -1, 4);
4078 }
4079
4080 exp->X_op = O_subtract;
4081 exp->X_op_symbol = symbol_temp_new_now ();
4082 exp->X_add_symbol = symbol_temp_make ();
4083
4084 sz = ppc_obj64 ? 8 : 4;
4085 exp->X_add_number = -sz;
4086 emit_expr (exp, sz);
4087 }
4088 }
4089}
4090
252b5132
RH		 4091/* This function handles the .text and .data pseudo-ops. These
4092 pseudo-ops aren't really used by XCOFF; we implement them for the
4093 convenience of people who aren't used to XCOFF. */
4094
4095static void
98027b10 4096ppc_section (int type)
252b5132
RH		 4097{
4098 const char *name;
4099 symbolS *sym;
4100
4101 if (type == 't')
4102 name = ".text[PR]";
4103 else if (type == 'd')
4104 name = ".data[RW]";
4105 else
4106 abort ();
4107
4108 sym = symbol_find_or_make (name);
4109
931e13a6 4110 ppc_change_csect (sym, 2);
252b5132
RH		 4111
4112 demand_empty_rest_of_line ();
4113}
4114
4115/* This function handles the .section pseudo-op. This is mostly to
4116 give an error, since XCOFF only supports .text, .data and .bss, but
4117 we do permit the user to name the text or data section. */
4118
4119static void
98027b10 4120ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4121{
4122 char *user_name;
4123 const char *real_name;
4124 char c;
4125 symbolS *sym;
4126
d02603dc 4127 c = get_symbol_name (&user_name);
252b5132
RH		 4128
4129 if (strcmp (user_name, ".text") == 0)
4130 real_name = ".text[PR]";
4131 else if (strcmp (user_name, ".data") == 0)
4132 real_name = ".data[RW]";
4133 else
4134 {
d6ed37ed 4135 as_bad (_("the XCOFF file format does not support arbitrary sections"));
d02603dc 4136 (void) restore_line_pointer (c);
252b5132
RH		 4137 ignore_rest_of_line ();
4138 return;
4139 }
4140
d02603dc 4141 (void) restore_line_pointer (c);
252b5132
RH		 4142
4143 sym = symbol_find_or_make (real_name);
4144
931e13a6 4145 ppc_change_csect (sym, 2);
252b5132
RH		 4146
4147 demand_empty_rest_of_line ();
4148}
4149
4150/* The .extern pseudo-op. We create an undefined symbol. */
4151
4152static void
98027b10 4153ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4154{
4155 char *name;
4156 char endc;
4157
d02603dc 4158 endc = get_symbol_name (&name);
252b5132
RH		 4159
4160 (void) symbol_find_or_make (name);
4161
d02603dc 4162 (void) restore_line_pointer (endc);
252b5132
RH		 4163
4164 demand_empty_rest_of_line ();
4165}
4166
4167/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4168
4169static void
98027b10 4170ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4171{
4172 char *name;
4173 char endc;
4174 symbolS *sym;
4175
d02603dc 4176 endc = get_symbol_name (&name);
252b5132
RH		 4177
4178 sym = symbol_find_or_make (name);
4179
d02603dc 4180 (void) restore_line_pointer (endc);
252b5132 4181
809ffe0d 4182 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4183
4184 demand_empty_rest_of_line ();
4185}
4186
c865e45b
RS		 4187/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4188 relocations at the beginning of the current csect.
4189
4190 (In principle, there's no reason why the relocations _have_ to be at
4191 the beginning. Anywhere in the csect would do. However, inserting
4192 at the beginning is what the native assmebler does, and it helps to
4193 deal with cases where the .ref statements follow the section contents.)
4194
4195 ??? .refs don't work for empty .csects. However, the native assembler
4196 doesn't report an error in this case, and neither yet do we. */
4197
4198static void
4199ppc_ref (int ignore ATTRIBUTE_UNUSED)
4200{
4201 char *name;
4202 char c;
4203
4204 if (ppc_current_csect == NULL)
4205 {
4206 as_bad (_(".ref outside .csect"));
4207 ignore_rest_of_line ();
4208 return;
4209 }
4210
4211 do
4212 {
d02603dc 4213 c = get_symbol_name (&name);
c865e45b
RS		 4214
4215 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4216 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4217
4218 *input_line_pointer = c;
d02603dc 4219 SKIP_WHITESPACE_AFTER_NAME ();
c865e45b
RS		 4220 c = *input_line_pointer;
4221 if (c == ',')
4222 {
4223 input_line_pointer++;
4224 SKIP_WHITESPACE ();
4225 if (is_end_of_line[(unsigned char) *input_line_pointer])
4226 {
4227 as_bad (_("missing symbol name"));
4228 ignore_rest_of_line ();
4229 return;
4230 }
4231 }
4232 }
4233 while (c == ',');
4234
4235 demand_empty_rest_of_line ();
4236}
4237
252b5132
RH		 4238/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4239 although I don't know why it bothers. */
4240
4241static void
98027b10 4242ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4243{
4244 char *name;
4245 char endc;
4246 symbolS *sym;
4247 int len;
4248
d02603dc 4249 endc = get_symbol_name (&name);
252b5132
RH		 4250
4251 sym = symbol_find_or_make (name);
4252
d02603dc 4253 (void) restore_line_pointer (endc);
252b5132
RH		 4254
4255 if (*input_line_pointer != ',')
4256 {
4257 as_bad (_("missing rename string"));
4258 ignore_rest_of_line ();
4259 return;
4260 }
4261 ++input_line_pointer;
4262
809ffe0d 4263 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 4264
4265 demand_empty_rest_of_line ();
4266}
4267
4268/* The .stabx pseudo-op. This is similar to a normal .stabs
4269 pseudo-op, but slightly different. A sample is
4270 .stabx "main:F-1",.main,142,0
4271 The first argument is the symbol name to create. The second is the
4272 value, and the third is the storage class. The fourth seems to be
4273 always zero, and I am assuming it is the type. */
4274
4275static void
98027b10 4276ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4277{
4278 char *name;
4279 int len;
4280 symbolS *sym;
4281 expressionS exp;
4282
4283 name = demand_copy_C_string (&len);
4284
4285 if (*input_line_pointer != ',')
4286 {
4287 as_bad (_("missing value"));
4288 return;
4289 }
4290 ++input_line_pointer;
4291
b34976b6 4292 ppc_stab_symbol = TRUE;
252b5132 4293 sym = symbol_make (name);
b34976b6 4294 ppc_stab_symbol = FALSE;
252b5132 4295
809ffe0d 4296 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 4297
4298 (void) expression (&exp);
4299
4300 switch (exp.X_op)
4301 {
4302 case O_illegal:
4303 case O_absent:
4304 case O_big:
4305 as_bad (_("illegal .stabx expression; zero assumed"));
4306 exp.X_add_number = 0;
4307 /* Fall through. */
4308 case O_constant:
4309 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 4310 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 4311 break;
4312
4313 case O_symbol:
4314 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 4315 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4316 else
4317 {
4318 S_SET_VALUE (sym,
4319 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 4320 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 4321 }
4322 break;
4323
4324 default:
4325 /* The value is some complex expression. This will probably
99a814a1
AM		 4326 fail at some later point, but this is probably the right
4327 thing to do here. */
809ffe0d 4328 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4329 break;
4330 }
4331
4332 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4333 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4334
4335 if (*input_line_pointer != ',')
4336 {
4337 as_bad (_("missing class"));
4338 return;
4339 }
4340 ++input_line_pointer;
4341
4342 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4343
4344 if (*input_line_pointer != ',')
4345 {
4346 as_bad (_("missing type"));
4347 return;
4348 }
4349 ++input_line_pointer;
4350
4351 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4352
809ffe0d 4353 symbol_get_tc (sym)->output = 1;
252b5132 4354
c734e7e3
TG		 4355 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4356 {
4357 /* In this case :
252b5132 4358
c734e7e3
TG		 4359 .bs name
4360 .stabx "z",arrays_,133,0
4361 .es
99a814a1 4362
c734e7e3 4363 .comm arrays_,13768,3
99a814a1 4364
c734e7e3
TG		 4365 resolve_symbol_value will copy the exp's "within" into sym's when the
4366 offset is 0. Since this seems to be corner case problem,
4367 only do the correction for storage class C_STSYM. A better solution
4368 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 4369
c734e7e3
TG		 4370 if (exp.X_op == O_symbol)
4371 {
4372 if (ppc_current_block == NULL)
4373 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 4374
c734e7e3
TG		 4375 symbol_get_tc (sym)->within = ppc_current_block;
4376 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4377 }
4378 }
99a814a1 4379
252b5132
RH		 4380 if (exp.X_op != O_symbol
4381 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4382 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4383 ppc_frob_label (sym);
4384 else
4385 {
4386 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4387 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4388 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4389 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4390 }
4391
4392 demand_empty_rest_of_line ();
4393}
4394
4395/* The .function pseudo-op. This takes several arguments. The first
4396 argument seems to be the external name of the symbol. The second
67c1ffbe 4397 argument seems to be the label for the start of the function. gcc
252b5132
RH		 4398 uses the same name for both. I have no idea what the third and
4399 fourth arguments are meant to be. The optional fifth argument is
4400 an expression for the size of the function. In COFF this symbol
4401 gets an aux entry like that used for a csect. */
4402
4403static void
98027b10 4404ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4405{
4406 char *name;
4407 char endc;
4408 char *s;
4409 symbolS *ext_sym;
4410 symbolS *lab_sym;
4411
d02603dc 4412 endc = get_symbol_name (&name);
252b5132
RH		 4413
4414 /* Ignore any [PR] suffix. */
4415 name = ppc_canonicalize_symbol_name (name);
4416 s = strchr (name, '[');
4417 if (s != (char *) NULL
4418 && strcmp (s + 1, "PR]") == 0)
4419 *s = '\0';
4420
4421 ext_sym = symbol_find_or_make (name);
4422
d02603dc 4423 (void) restore_line_pointer (endc);
252b5132
RH		 4424
4425 if (*input_line_pointer != ',')
4426 {
4427 as_bad (_("missing symbol name"));
4428 ignore_rest_of_line ();
4429 return;
4430 }
4431 ++input_line_pointer;
4432
d02603dc 4433 endc = get_symbol_name (&name);
252b5132
RH		 4434
4435 lab_sym = symbol_find_or_make (name);
4436
d02603dc 4437 (void) restore_line_pointer (endc);
252b5132
RH		 4438
4439 if (ext_sym != lab_sym)
4440 {
809ffe0d
ILT		 4441 expressionS exp;
4442
4443 exp.X_op = O_symbol;
4444 exp.X_add_symbol = lab_sym;
4445 exp.X_op_symbol = NULL;
4446 exp.X_add_number = 0;
4447 exp.X_unsigned = 0;
4448 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4449 }
4450
96d56e9f
NC		 4451 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4452 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4453 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4454
4455 if (*input_line_pointer == ',')
4456 {
91d6fa6a 4457 expressionS exp;
252b5132
RH		 4458
4459 /* Ignore the third argument. */
4460 ++input_line_pointer;
91d6fa6a 4461 expression (& exp);
252b5132
RH		 4462 if (*input_line_pointer == ',')
4463 {
4464 /* Ignore the fourth argument. */
4465 ++input_line_pointer;
91d6fa6a 4466 expression (& exp);
252b5132
RH		 4467 if (*input_line_pointer == ',')
4468 {
4469 /* The fifth argument is the function size. */
4470 ++input_line_pointer;
85645aed
TG		 4471 symbol_get_tc (ext_sym)->u.size = symbol_new
4472 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4473 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4474 }
4475 }
4476 }
4477
4478 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4479 SF_SET_FUNCTION (ext_sym);
4480 SF_SET_PROCESS (ext_sym);
4481 coff_add_linesym (ext_sym);
4482
4483 demand_empty_rest_of_line ();
4484}
4485
4486/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4487 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4488 with the correct line number */
5d6255fe 4489
8642cce8 4490static symbolS *saved_bi_sym = 0;
252b5132
RH		 4491
4492static void
98027b10 4493ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4494{
4495 symbolS *sym;
4496
4497 sym = symbol_make (".bf");
4498 S_SET_SEGMENT (sym, text_section);
809ffe0d 4499 symbol_set_frag (sym, frag_now);
252b5132
RH		 4500 S_SET_VALUE (sym, frag_now_fix ());
4501 S_SET_STORAGE_CLASS (sym, C_FCN);
4502
4503 coff_line_base = get_absolute_expression ();
4504
4505 S_SET_NUMBER_AUXILIARY (sym, 1);
4506 SA_SET_SYM_LNNO (sym, coff_line_base);
4507
8642cce8 4508 /* Line number for bi. */
5d6255fe 4509 if (saved_bi_sym)
8642cce8
TR		 4510 {
4511 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4512 saved_bi_sym = 0;
4513 }
5d6255fe 4514
8642cce8 4515
809ffe0d 4516 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4517
4518 ppc_frob_label (sym);
4519
4520 demand_empty_rest_of_line ();
4521}
4522
4523/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4524 ".ef", except that the line number is absolute, not relative to the
4525 most recent ".bf" symbol. */
4526
4527static void
98027b10 4528ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4529{
4530 symbolS *sym;
4531
4532 sym = symbol_make (".ef");
4533 S_SET_SEGMENT (sym, text_section);
809ffe0d 4534 symbol_set_frag (sym, frag_now);
252b5132
RH		 4535 S_SET_VALUE (sym, frag_now_fix ());
4536 S_SET_STORAGE_CLASS (sym, C_FCN);
4537 S_SET_NUMBER_AUXILIARY (sym, 1);
4538 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4539 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4540
4541 ppc_frob_label (sym);
4542
4543 demand_empty_rest_of_line ();
4544}
4545
4546/* The .bi and .ei pseudo-ops. These take a string argument and
4547 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4548 the symbol list. The value of .bi will be know when the next .bf
4549 is encountered. */
252b5132
RH		 4550
4551static void
98027b10 4552ppc_biei (int ei)
252b5132
RH		 4553{
4554 static symbolS *last_biei;
4555
4556 char *name;
4557 int len;
4558 symbolS *sym;
4559 symbolS *look;
4560
4561 name = demand_copy_C_string (&len);
4562
4563 /* The value of these symbols is actually file offset. Here we set
4564 the value to the index into the line number entries. In
4565 ppc_frob_symbols we set the fix_line field, which will cause BFD
4566 to do the right thing. */
4567
4568 sym = symbol_make (name);
4569 /* obj-coff.c currently only handles line numbers correctly in the
4570 .text section. */
4571 S_SET_SEGMENT (sym, text_section);
4572 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4573 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4574
4575 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4576 symbol_get_tc (sym)->output = 1;
81d4177b 4577
8642cce8 4578 /* Save bi. */
5d6255fe 4579 if (ei)
8642cce8
TR		 4580 saved_bi_sym = 0;
4581 else
4582 saved_bi_sym = sym;
4583
252b5132
RH		 4584 for (look = last_biei ? last_biei : symbol_rootP;
4585 (look != (symbolS *) NULL
4586 && (S_GET_STORAGE_CLASS (look) == C_FILE
4587 || S_GET_STORAGE_CLASS (look) == C_BINCL
4588 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4589 look = symbol_next (look))
4590 ;
4591 if (look != (symbolS *) NULL)
4592 {
4593 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4594 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4595 last_biei = sym;
4596 }
4597
4598 demand_empty_rest_of_line ();
4599}
4600
4601/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4602 There is one argument, which is a csect symbol. The value of the
4603 .bs symbol is the index of this csect symbol. */
4604
4605static void
98027b10 4606ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4607{
4608 char *name;
4609 char endc;
4610 symbolS *csect;
4611 symbolS *sym;
4612
4613 if (ppc_current_block != NULL)
4614 as_bad (_("nested .bs blocks"));
4615
d02603dc 4616 endc = get_symbol_name (&name);
252b5132
RH		 4617
4618 csect = symbol_find_or_make (name);
4619
d02603dc 4620 (void) restore_line_pointer (endc);
252b5132
RH		 4621
4622 sym = symbol_make (".bs");
4623 S_SET_SEGMENT (sym, now_seg);
4624 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4625 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4626 symbol_get_tc (sym)->output = 1;
252b5132 4627
809ffe0d 4628 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4629
4630 ppc_frob_label (sym);
4631
4632 ppc_current_block = sym;
4633
4634 demand_empty_rest_of_line ();
4635}
4636
4637/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4638
4639static void
98027b10 4640ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4641{
4642 symbolS *sym;
4643
4644 if (ppc_current_block == NULL)
4645 as_bad (_(".es without preceding .bs"));
4646
4647 sym = symbol_make (".es");
4648 S_SET_SEGMENT (sym, now_seg);
4649 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4650 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4651 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4652
4653 ppc_frob_label (sym);
4654
4655 ppc_current_block = NULL;
4656
4657 demand_empty_rest_of_line ();
4658}
4659
4660/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4661 line number. */
4662
4663static void
98027b10 4664ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4665{
4666 symbolS *sym;
4667
4668 sym = symbol_make (".bb");
4669 S_SET_SEGMENT (sym, text_section);
809ffe0d 4670 symbol_set_frag (sym, frag_now);
252b5132
RH		 4671 S_SET_VALUE (sym, frag_now_fix ());
4672 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4673
4674 S_SET_NUMBER_AUXILIARY (sym, 1);
4675 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4676
809ffe0d 4677 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4678
4679 SF_SET_PROCESS (sym);
4680
4681 ppc_frob_label (sym);
4682
4683 demand_empty_rest_of_line ();
4684}
4685
4686/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4687 line number. */
4688
4689static void
98027b10 4690ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4691{
4692 symbolS *sym;
4693
4694 sym = symbol_make (".eb");
4695 S_SET_SEGMENT (sym, text_section);
809ffe0d 4696 symbol_set_frag (sym, frag_now);
252b5132
RH		 4697 S_SET_VALUE (sym, frag_now_fix ());
4698 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4699 S_SET_NUMBER_AUXILIARY (sym, 1);
4700 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4701 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4702
4703 SF_SET_PROCESS (sym);
4704
4705 ppc_frob_label (sym);
4706
4707 demand_empty_rest_of_line ();
4708}
4709
4710/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4711 specified name. */
4712
4713static void
98027b10 4714ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4715{
4716 char *name;
4717 int len;
4718 symbolS *sym;
4719
4720 name = demand_copy_C_string (&len);
4721 sym = symbol_make (name);
4722 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4723 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4724 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4725 S_SET_VALUE (sym, 0);
809ffe0d 4726 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4727
4728 ppc_frob_label (sym);
4729
4730 demand_empty_rest_of_line ();
4731}
4732
4733/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4734
4735static void
98027b10 4736ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4737{
4738 symbolS *sym;
4739
4740 sym = symbol_make (".ec");
4741 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4742 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4743 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4744 S_SET_VALUE (sym, 0);
809ffe0d 4745 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4746
4747 ppc_frob_label (sym);
4748
4749 demand_empty_rest_of_line ();
4750}
4751
4752/* The .toc pseudo-op. Switch to the .toc subsegment. */
4753
4754static void
98027b10 4755ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4756{
4757 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4758 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4759 else
4760 {
4761 subsegT subseg;
4762 symbolS *sym;
4763 symbolS *list;
81d4177b 4764
252b5132
RH		 4765 subseg = ppc_data_subsegment;
4766 ++ppc_data_subsegment;
4767
4768 subseg_new (segment_name (data_section), subseg);
4769 ppc_toc_frag = frag_now;
4770
4771 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4772 symbol_set_frag (sym, frag_now);
252b5132
RH		 4773 S_SET_SEGMENT (sym, data_section);
4774 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4775 symbol_get_tc (sym)->subseg = subseg;
4776 symbol_get_tc (sym)->output = 1;
4777 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4778
4779 ppc_toc_csect = sym;
81d4177b 4780
252b5132 4781 for (list = ppc_data_csects;
809ffe0d
ILT		 4782 symbol_get_tc (list)->next != (symbolS *) NULL;
4783 list = symbol_get_tc (list)->next)
252b5132 4784 ;
809ffe0d 4785 symbol_get_tc (list)->next = sym;
252b5132
RH		 4786
4787 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4788 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4789 &symbol_lastP);
252b5132
RH		 4790 }
4791
4792 ppc_current_csect = ppc_toc_csect;
4793
4794 demand_empty_rest_of_line ();
4795}
4796
4797/* The AIX assembler automatically aligns the operands of a .long or
4798 .short pseudo-op, and we want to be compatible. */
4799
4800static void
98027b10 4801ppc_xcoff_cons (int log_size)
252b5132
RH		 4802{
4803 frag_align (log_size, 0, 0);
4804 record_alignment (now_seg, log_size);
4805 cons (1 << log_size);
4806}
4807
4808static void
98027b10 4809ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4810{
4811 expressionS exp;
4812 int byte_count;
4813
4814 (void) expression (&exp);
4815
4816 if (exp.X_op != O_constant)
4817 {
4818 as_bad (_("non-constant byte count"));
4819 return;
4820 }
4821
4822 byte_count = exp.X_add_number;
4823
4824 if (*input_line_pointer != ',')
4825 {
4826 as_bad (_("missing value"));
4827 return;
4828 }
4829
4830 ++input_line_pointer;
4831 cons (byte_count);
4832}
4833
85645aed
TG		 4834void
4835ppc_xcoff_end (void)
4836{
4837 int i;
4838
4839 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4840 {
4841 struct dw_section *dws = &dw_sections[i];
4842 struct dw_subsection *dwss;
4843
4844 if (dws->anon_subseg)
4845 {
4846 dwss = dws->anon_subseg;
4847 dwss->link = dws->list_subseg;
4848 }
4849 else
4850 dwss = dws->list_subseg;
4851
4852 for (; dwss != NULL; dwss = dwss->link)
4853 if (dwss->end_exp.X_add_symbol != NULL)
4854 {
4855 subseg_set (dws->sect, dwss->subseg);
4856 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4857 }
4858 }
4859}
4860
252b5132 4861#endif /* OBJ_XCOFF */
0baf16f2 4862#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4863\f
4864/* The .tc pseudo-op. This is used when generating either XCOFF or
4865 ELF. This takes two or more arguments.
4866
4867 When generating XCOFF output, the first argument is the name to
4868 give to this location in the toc; this will be a symbol with class
0baf16f2 4869 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4870 this location in the TOC; often there is just one more argument, a
1049f94e 4871 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4872 depends on target word size. A 32-bit target uses 4-byte values, a
4873 64-bit target uses 8-byte values.
252b5132
RH		 4874
4875 When not generating XCOFF output, the arguments are the same, but
4876 the first argument is simply ignored. */
4877
4878static void
98027b10 4879ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4880{
4881#ifdef OBJ_XCOFF
4882
4883 /* Define the TOC symbol name. */
4884 {
4885 char *name;
4886 char endc;
4887 symbolS *sym;
4888
4889 if (ppc_toc_csect == (symbolS *) NULL
4890 || ppc_toc_csect != ppc_current_csect)
4891 {
4892 as_bad (_(".tc not in .toc section"));
4893 ignore_rest_of_line ();
4894 return;
4895 }
4896
d02603dc 4897 endc = get_symbol_name (&name);
252b5132
RH		 4898
4899 sym = symbol_find_or_make (name);
4900
d02603dc 4901 (void) restore_line_pointer (endc);
252b5132
RH		 4902
4903 if (S_IS_DEFINED (sym))
4904 {
4905 symbolS *label;
4906
809ffe0d 4907 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4908 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4909 {
4910 as_bad (_(".tc with no label"));
4911 ignore_rest_of_line ();
4912 return;
4913 }
4914
4915 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4916 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4917 S_SET_VALUE (label, S_GET_VALUE (sym));
4918
4919 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4920 ++input_line_pointer;
4921
4922 return;
4923 }
4924
4925 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4926 symbol_set_frag (sym, frag_now);
252b5132 4927 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4928 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4929 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4930
4931 ppc_frob_label (sym);
4932 }
4933
0baf16f2
AM		 4934#endif /* OBJ_XCOFF */
4935#ifdef OBJ_ELF
9c7977b3 4936 int align;
252b5132
RH		 4937
4938 /* Skip the TOC symbol name. */
4939 while (is_part_of_name (*input_line_pointer)
d13d4015 4940 || *input_line_pointer == ' '
252b5132
RH		 4941 || *input_line_pointer == '['
4942 || *input_line_pointer == ']'
4943 || *input_line_pointer == '{'
4944 || *input_line_pointer == '}')
4945 ++input_line_pointer;
4946
0baf16f2 4947 /* Align to a four/eight byte boundary. */
2b3c4602 4948 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4949 frag_align (align, 0, 0);
4950 record_alignment (now_seg, align);
0baf16f2 4951#endif /* OBJ_ELF */
252b5132
RH		 4952
4953 if (*input_line_pointer != ',')
4954 demand_empty_rest_of_line ();
4955 else
4956 {
4957 ++input_line_pointer;
2b3c4602 4958 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4959 }
4960}
0baf16f2
AM		 4961
4962/* Pseudo-op .machine. */
0baf16f2
AM		 4963
4964static void
98027b10 4965ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4966{
d02603dc 4967 char c;
69c040df
AM		 4968 char *cpu_string;
4969#define MAX_HISTORY 100
fa452fa6 4970 static ppc_cpu_t *cpu_history;
69c040df
AM		 4971 static int curr_hist;
4972
4973 SKIP_WHITESPACE ();
4974
d02603dc
NC		 4975 c = get_symbol_name (&cpu_string);
4976 cpu_string = xstrdup (cpu_string);
4977 (void) restore_line_pointer (c);
69c040df
AM		 4978
4979 if (cpu_string != NULL)
4980 {
fa452fa6 4981 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4982 ppc_cpu_t new_cpu;
69c040df
AM		 4983 char *p;
4984
4985 for (p = cpu_string; *p != 0; p++)
4986 *p = TOLOWER (*p);
4987
4988 if (strcmp (cpu_string, "push") == 0)
4989 {
4990 if (cpu_history == NULL)
325801bd 4991 cpu_history = XNEWVEC (ppc_cpu_t, MAX_HISTORY);
69c040df
AM		 4992
4993 if (curr_hist >= MAX_HISTORY)
4994 as_bad (_(".machine stack overflow"));
4995 else
4996 cpu_history[curr_hist++] = ppc_cpu;
4997 }
4998 else if (strcmp (cpu_string, "pop") == 0)
4999 {
5000 if (curr_hist <= 0)
5001 as_bad (_(".machine stack underflow"));
5002 else
5003 ppc_cpu = cpu_history[--curr_hist];
5004 }
776fc418 5005 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
69fe9ce5 5006 ppc_cpu = new_cpu;
69c040df
AM		 5007 else
5008 as_bad (_("invalid machine `%s'"), cpu_string);
5009
5010 if (ppc_cpu != old_cpu)
5011 ppc_setup_opcodes ();
5012 }
5013
5014 demand_empty_rest_of_line ();
0baf16f2 5015}
0baf16f2 5016#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 5017\f
5018#ifdef TE_PE
5019
99a814a1 5020/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 5021
5022/* Set the current section. */
5023static void
98027b10 5024ppc_set_current_section (segT new)
252b5132
RH		 5025{
5026 ppc_previous_section = ppc_current_section;
5027 ppc_current_section = new;
5028}
5029
5030/* pseudo-op: .previous
5031 behaviour: toggles the current section with the previous section.
5032 errors: None
99a814a1
AM		 5033 warnings: "No previous section" */
5034
252b5132 5035static void
98027b10 5036ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132 5037{
81d4177b 5038 if (ppc_previous_section == NULL)
252b5132 5039 {
d6ed37ed 5040 as_warn (_("no previous section to return to, ignored."));
252b5132
RH		 5041 return;
5042 }
5043
99a814a1 5044 subseg_set (ppc_previous_section, 0);
252b5132 5045
99a814a1 5046 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 5047}
5048
5049/* pseudo-op: .pdata
5050 behaviour: predefined read only data section
b34976b6 5051 double word aligned
252b5132
RH		 5052 errors: None
5053 warnings: None
5054 initial: .section .pdata "adr3"
b34976b6 5055 a - don't know -- maybe a misprint
252b5132
RH		 5056 d - initialized data
5057 r - readable
5058 3 - double word aligned (that would be 4 byte boundary)
5059
5060 commentary:
5061 Tag index tables (also known as the function table) for exception
99a814a1 5062 handling, debugging, etc. */
252b5132 5063
252b5132 5064static void
98027b10 5065ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 5066{
81d4177b 5067 if (pdata_section == 0)
252b5132
RH		 5068 {
5069 pdata_section = subseg_new (".pdata", 0);
81d4177b 5070
252b5132
RH		 5071 bfd_set_section_flags (stdoutput, pdata_section,
5072 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5073 | SEC_READONLY | SEC_DATA ));
81d4177b 5074
252b5132
RH		 5075 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5076 }
5077 else
5078 {
99a814a1 5079 pdata_section = subseg_new (".pdata", 0);
252b5132 5080 }
99a814a1 5081 ppc_set_current_section (pdata_section);
252b5132
RH		 5082}
5083
5084/* pseudo-op: .ydata
5085 behaviour: predefined read only data section
b34976b6 5086 double word aligned
252b5132
RH		 5087 errors: None
5088 warnings: None
5089 initial: .section .ydata "drw3"
b34976b6 5090 a - don't know -- maybe a misprint
252b5132
RH		 5091 d - initialized data
5092 r - readable
5093 3 - double word aligned (that would be 4 byte boundary)
5094 commentary:
5095 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 5096 debugging, etc. */
5097
252b5132 5098static void
98027b10 5099ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 5100{
81d4177b 5101 if (ydata_section == 0)
252b5132
RH		 5102 {
5103 ydata_section = subseg_new (".ydata", 0);
5104 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 5105 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5106 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 5107
5108 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5109 }
5110 else
5111 {
5112 ydata_section = subseg_new (".ydata", 0);
5113 }
99a814a1 5114 ppc_set_current_section (ydata_section);
252b5132
RH		 5115}
5116
5117/* pseudo-op: .reldata
5118 behaviour: predefined read write data section
b34976b6 5119 double word aligned (4-byte)
252b5132
RH		 5120 FIXME: relocation is applied to it
5121 FIXME: what's the difference between this and .data?
5122 errors: None
5123 warnings: None
5124 initial: .section .reldata "drw3"
5125 d - initialized data
5126 r - readable
5127 w - writeable
5128 3 - double word aligned (that would be 8 byte boundary)
5129
5130 commentary:
5131 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 5132 function descriptors, etc. */
5133
252b5132 5134static void
98027b10 5135ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5136{
5137 if (reldata_section == 0)
5138 {
5139 reldata_section = subseg_new (".reldata", 0);
5140
5141 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 5142 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5143 | SEC_DATA));
252b5132
RH		 5144
5145 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5146 }
5147 else
5148 {
5149 reldata_section = subseg_new (".reldata", 0);
5150 }
99a814a1 5151 ppc_set_current_section (reldata_section);
252b5132
RH		 5152}
5153
5154/* pseudo-op: .rdata
5155 behaviour: predefined read only data section
b34976b6 5156 double word aligned
252b5132
RH		 5157 errors: None
5158 warnings: None
5159 initial: .section .rdata "dr3"
5160 d - initialized data
5161 r - readable
99a814a1
AM		 5162 3 - double word aligned (that would be 4 byte boundary) */
5163
252b5132 5164static void
98027b10 5165ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5166{
5167 if (rdata_section == 0)
5168 {
5169 rdata_section = subseg_new (".rdata", 0);
5170 bfd_set_section_flags (stdoutput, rdata_section,
5171 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5172 | SEC_READONLY | SEC_DATA ));
5173
5174 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5175 }
5176 else
5177 {
5178 rdata_section = subseg_new (".rdata", 0);
5179 }
99a814a1 5180 ppc_set_current_section (rdata_section);
252b5132
RH		 5181}
5182
5183/* pseudo-op: .ualong
81d4177b 5184 behaviour: much like .int, with the exception that no alignment is
b34976b6 5185 performed.
252b5132
RH		 5186 FIXME: test the alignment statement
5187 errors: None
99a814a1
AM		 5188 warnings: None */
5189
252b5132 5190static void
98027b10 5191ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 5192{
99a814a1
AM		 5193 /* Try for long. */
5194 cons (4);
252b5132
RH		 5195}
5196
5197/* pseudo-op: .znop <symbol name>
5198 behaviour: Issue a nop instruction
b34976b6 5199 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 5200 the supplied symbol name.
5201 errors: None
99a814a1
AM		 5202 warnings: Missing symbol name */
5203
252b5132 5204static void
98027b10 5205ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5206{
5207 unsigned long insn;
5208 const struct powerpc_opcode *opcode;
252b5132 5209 char *f;
252b5132 5210 symbolS *sym;
252b5132
RH		 5211 char *symbol_name;
5212 char c;
5213 char *name;
252b5132 5214
99a814a1 5215 /* Strip out the symbol name. */
d02603dc 5216 c = get_symbol_name (&symbol_name);
252b5132 5217
a44e2901 5218 name = xstrdup (symbol_name);
252b5132
RH		 5219
5220 sym = symbol_find_or_make (name);
5221
5222 *input_line_pointer = c;
5223
d02603dc 5224 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 5225
5226 /* Look up the opcode in the hash table. */
5227 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5228
99a814a1 5229 /* Stick in the nop. */
252b5132
RH		 5230 insn = opcode->opcode;
5231
5232 /* Write out the instruction. */
5233 f = frag_more (4);
5234 md_number_to_chars (f, insn, 4);
5235 fix_new (frag_now,
5236 f - frag_now->fr_literal,
5237 4,
5238 sym,
5239 0,
5240 0,
5241 BFD_RELOC_16_GOT_PCREL);
5242
5243}
5244
81d4177b
KH		 5245/* pseudo-op:
5246 behaviour:
5247 errors:
99a814a1
AM		 5248 warnings: */
5249
252b5132 5250static void
98027b10 5251ppc_pe_comm (int lcomm)
252b5132 5252{
98027b10
AM		 5253 char *name;
5254 char c;
5255 char *p;
252b5132 5256 offsetT temp;
98027b10 5257 symbolS *symbolP;
252b5132
RH		 5258 offsetT align;
5259
d02603dc 5260 c = get_symbol_name (&name);
252b5132 5261
99a814a1 5262 /* just after name is now '\0'. */
252b5132
RH		 5263 p = input_line_pointer;
5264 *p = c;
d02603dc 5265 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 5266 if (*input_line_pointer != ',')
5267 {
d6ed37ed 5268 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 5269 ignore_rest_of_line ();
5270 return;
5271 }
5272
5273 input_line_pointer++; /* skip ',' */
5274 if ((temp = get_absolute_expression ()) < 0)
5275 {
5276 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5277 ignore_rest_of_line ();
5278 return;
5279 }
5280
5281 if (! lcomm)
5282 {
5283 /* The third argument to .comm is the alignment. */
5284 if (*input_line_pointer != ',')
5285 align = 3;
5286 else
5287 {
5288 ++input_line_pointer;
5289 align = get_absolute_expression ();
5290 if (align <= 0)
5291 {
5292 as_warn (_("ignoring bad alignment"));
5293 align = 3;
5294 }
5295 }
5296 }
5297
5298 *p = 0;
5299 symbolP = symbol_find_or_make (name);
5300
5301 *p = c;
5302 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5303 {
d6ed37ed 5304 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 5305 S_GET_NAME (symbolP));
5306 ignore_rest_of_line ();
5307 return;
5308 }
5309
5310 if (S_GET_VALUE (symbolP))
5311 {
5312 if (S_GET_VALUE (symbolP) != (valueT) temp)
d6ed37ed 5313 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 5314 S_GET_NAME (symbolP),
5315 (long) S_GET_VALUE (symbolP),
5316 (long) temp);
5317 }
5318 else
5319 {
5320 S_SET_VALUE (symbolP, (valueT) temp);
5321 S_SET_EXTERNAL (symbolP);
86ebace2 5322 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 5323 }
5324
5325 demand_empty_rest_of_line ();
5326}
5327
5328/*
5329 * implement the .section pseudo op:
5330 * .section name {, "flags"}
5331 * ^ ^
5332 * | +--- optional flags: 'b' for bss
5333 * | 'i' for info
5334 * +-- section name 'l' for lib
5335 * 'n' for noload
5336 * 'o' for over
5337 * 'w' for data
5338 * 'd' (apparently m88k for data)
5339 * 'x' for text
5340 * But if the argument is not a quoted string, treat it as a
5341 * subsegment number.
5342 *
5343 * FIXME: this is a copy of the section processing from obj-coff.c, with
5344 * additions/changes for the moto-pas assembler support. There are three
5345 * categories:
5346 *
81d4177b 5347 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 5348 * setting bits that bfd probably neither understands or uses. The
5349 * correct approach (?) will have to incorporate extra fields attached
5350 * to the section to hold the system specific stuff. (krk)
5351 *
5352 * Section Contents:
5353 * 'a' - unknown - referred to in documentation, but no definition supplied
5354 * 'c' - section has code
5355 * 'd' - section has initialized data
5356 * 'u' - section has uninitialized data
5357 * 'i' - section contains directives (info)
5358 * 'n' - section can be discarded
5359 * 'R' - remove section at link time
5360 *
5361 * Section Protection:
5362 * 'r' - section is readable
5363 * 'w' - section is writeable
5364 * 'x' - section is executable
5365 * 's' - section is sharable
5366 *
5367 * Section Alignment:
5368 * '0' - align to byte boundary
5369 * '1' - align to halfword undary
5370 * '2' - align to word boundary
5371 * '3' - align to doubleword boundary
5372 * '4' - align to quadword boundary
5373 * '5' - align to 32 byte boundary
5374 * '6' - align to 64 byte boundary
5375 *
5376 */
5377
5378void
98027b10 5379ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 5380{
99a814a1 5381 /* Strip out the section name. */
252b5132
RH		 5382 char *section_name;
5383 char c;
5384 char *name;
5385 unsigned int exp;
5386 flagword flags;
5387 segT sec;
5388 int align;
5389
d02603dc 5390 c = get_symbol_name (&section_name);
252b5132 5391
a44e2901 5392 name = xstrdup (section_name);
252b5132
RH		 5393
5394 *input_line_pointer = c;
5395
d02603dc 5396 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 5397
5398 exp = 0;
5399 flags = SEC_NO_FLAGS;
5400
5401 if (strcmp (name, ".idata$2") == 0)
5402 {
5403 align = 0;
5404 }
5405 else if (strcmp (name, ".idata$3") == 0)
5406 {
5407 align = 0;
5408 }
5409 else if (strcmp (name, ".idata$4") == 0)
5410 {
5411 align = 2;
5412 }
5413 else if (strcmp (name, ".idata$5") == 0)
5414 {
5415 align = 2;
5416 }
5417 else if (strcmp (name, ".idata$6") == 0)
5418 {
5419 align = 1;
5420 }
5421 else
99a814a1
AM		 5422 /* Default alignment to 16 byte boundary. */
5423 align = 4;
252b5132
RH		 5424
5425 if (*input_line_pointer == ',')
5426 {
5427 ++input_line_pointer;
5428 SKIP_WHITESPACE ();
5429 if (*input_line_pointer != '"')
5430 exp = get_absolute_expression ();
5431 else
5432 {
5433 ++input_line_pointer;
5434 while (*input_line_pointer != '"'
5435 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5436 {
5437 switch (*input_line_pointer)
5438 {
5439 /* Section Contents */
5440 case 'a': /* unknown */
d6ed37ed 5441 as_bad (_("unsupported section attribute -- 'a'"));
252b5132
RH		 5442 break;
5443 case 'c': /* code section */
81d4177b 5444 flags |= SEC_CODE;
252b5132
RH		 5445 break;
5446 case 'd': /* section has initialized data */
5447 flags |= SEC_DATA;
5448 break;
5449 case 'u': /* section has uninitialized data */
5450 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5451 in winnt.h */
5452 flags |= SEC_ROM;
5453 break;
5454 case 'i': /* section contains directives (info) */
5455 /* FIXME: This is IMAGE_SCN_LNK_INFO
5456 in winnt.h */
5457 flags |= SEC_HAS_CONTENTS;
5458 break;
5459 case 'n': /* section can be discarded */
81d4177b 5460 flags &=~ SEC_LOAD;
252b5132
RH		 5461 break;
5462 case 'R': /* Remove section at link time */
5463 flags |= SEC_NEVER_LOAD;
5464 break;
8d452c78 5465#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5466 /* Section Protection */
5467 case 'r': /* section is readable */
5468 flags |= IMAGE_SCN_MEM_READ;
5469 break;
5470 case 'w': /* section is writeable */
5471 flags |= IMAGE_SCN_MEM_WRITE;
5472 break;
5473 case 'x': /* section is executable */
5474 flags |= IMAGE_SCN_MEM_EXECUTE;
5475 break;
5476 case 's': /* section is sharable */
5477 flags |= IMAGE_SCN_MEM_SHARED;
5478 break;
5479
5480 /* Section Alignment */
5481 case '0': /* align to byte boundary */
5482 flags |= IMAGE_SCN_ALIGN_1BYTES;
5483 align = 0;
5484 break;
5485 case '1': /* align to halfword boundary */
5486 flags |= IMAGE_SCN_ALIGN_2BYTES;
5487 align = 1;
5488 break;
5489 case '2': /* align to word boundary */
5490 flags |= IMAGE_SCN_ALIGN_4BYTES;
5491 align = 2;
5492 break;
5493 case '3': /* align to doubleword boundary */
5494 flags |= IMAGE_SCN_ALIGN_8BYTES;
5495 align = 3;
5496 break;
5497 case '4': /* align to quadword boundary */
5498 flags |= IMAGE_SCN_ALIGN_16BYTES;
5499 align = 4;
5500 break;
5501 case '5': /* align to 32 byte boundary */
5502 flags |= IMAGE_SCN_ALIGN_32BYTES;
5503 align = 5;
5504 break;
5505 case '6': /* align to 64 byte boundary */
5506 flags |= IMAGE_SCN_ALIGN_64BYTES;
5507 align = 6;
5508 break;
8d452c78 5509#endif
252b5132 5510 default:
99a814a1
AM		 5511 as_bad (_("unknown section attribute '%c'"),
5512 *input_line_pointer);
252b5132
RH		 5513 break;
5514 }
5515 ++input_line_pointer;
5516 }
5517 if (*input_line_pointer == '"')
5518 ++input_line_pointer;
5519 }
5520 }
5521
5522 sec = subseg_new (name, (subsegT) exp);
5523
99a814a1 5524 ppc_set_current_section (sec);
252b5132
RH		 5525
5526 if (flags != SEC_NO_FLAGS)
5527 {
5528 if (! bfd_set_section_flags (stdoutput, sec, flags))
5529 as_bad (_("error setting flags for \"%s\": %s"),
5530 bfd_section_name (stdoutput, sec),
5531 bfd_errmsg (bfd_get_error ()));
5532 }
5533
99a814a1 5534 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5535}
5536
5537static void
98027b10 5538ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5539{
5540 char *name;
5541 char endc;
5542 symbolS *ext_sym;
5543
d02603dc 5544 endc = get_symbol_name (&name);
252b5132
RH		 5545
5546 ext_sym = symbol_find_or_make (name);
5547
d02603dc 5548 (void) restore_line_pointer (endc);
252b5132
RH		 5549
5550 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5551 SF_SET_FUNCTION (ext_sym);
5552 SF_SET_PROCESS (ext_sym);
5553 coff_add_linesym (ext_sym);
5554
5555 demand_empty_rest_of_line ();
5556}
5557
5558static void
98027b10 5559ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5560{
5561 if (tocdata_section == 0)
5562 {
5563 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5564 /* FIXME: section flags won't work. */
252b5132
RH		 5565 bfd_set_section_flags (stdoutput, tocdata_section,
5566 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5567 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5568
5569 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5570 }
5571 else
5572 {
5573 rdata_section = subseg_new (".tocd", 0);
5574 }
5575
99a814a1 5576 ppc_set_current_section (tocdata_section);
252b5132
RH		 5577
5578 demand_empty_rest_of_line ();
5579}
5580
5581/* Don't adjust TOC relocs to use the section symbol. */
5582
5583int
98027b10 5584ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5585{
5586 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5587}
5588
5589#endif
5590\f
5591#ifdef OBJ_XCOFF
5592
5593/* XCOFF specific symbol and file handling. */
5594
5595/* Canonicalize the symbol name. We use the to force the suffix, if
5596 any, to use square brackets, and to be in upper case. */
5597
5598char *
98027b10 5599ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5600{
5601 char *s;
5602
5603 if (ppc_stab_symbol)
5604 return name;
5605
5606 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5607 ;
5608 if (*s != '\0')
5609 {
5610 char brac;
5611
5612 if (*s == '[')
5613 brac = ']';
5614 else
5615 {
5616 *s = '[';
5617 brac = '}';
5618 }
5619
5620 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5621 *s = TOUPPER (*s);
252b5132
RH		 5622
5623 if (*s == '\0' || s[1] != '\0')
5624 as_bad (_("bad symbol suffix"));
5625
5626 *s = ']';
5627 }
5628
5629 return name;
5630}
5631
5632/* Set the class of a symbol based on the suffix, if any. This is
5633 called whenever a new symbol is created. */
5634
5635void
98027b10 5636ppc_symbol_new_hook (symbolS *sym)
252b5132 5637{
809ffe0d 5638 struct ppc_tc_sy *tc;
252b5132
RH		 5639 const char *s;
5640
809ffe0d
ILT		 5641 tc = symbol_get_tc (sym);
5642 tc->next = NULL;
5643 tc->output = 0;
96d56e9f 5644 tc->symbol_class = -1;
809ffe0d
ILT		 5645 tc->real_name = NULL;
5646 tc->subseg = 0;
5647 tc->align = 0;
85645aed
TG		 5648 tc->u.size = NULL;
5649 tc->u.dw = NULL;
809ffe0d 5650 tc->within = NULL;
252b5132
RH		 5651
5652 if (ppc_stab_symbol)
5653 return;
5654
5655 s = strchr (S_GET_NAME (sym), '[');
5656 if (s == (const char *) NULL)
5657 {
5658 /* There is no suffix. */
5659 return;
5660 }
5661
5662 ++s;
5663
5664 switch (s[0])
5665 {
5666 case 'B':
5667 if (strcmp (s, "BS]") == 0)
96d56e9f 5668 tc->symbol_class = XMC_BS;
252b5132
RH		 5669 break;
5670 case 'D':
5671 if (strcmp (s, "DB]") == 0)
96d56e9f 5672 tc->symbol_class = XMC_DB;
252b5132 5673 else if (strcmp (s, "DS]") == 0)
96d56e9f 5674 tc->symbol_class = XMC_DS;
252b5132
RH		 5675 break;
5676 case 'G':
5677 if (strcmp (s, "GL]") == 0)
96d56e9f 5678 tc->symbol_class = XMC_GL;
252b5132
RH		 5679 break;
5680 case 'P':
5681 if (strcmp (s, "PR]") == 0)
96d56e9f 5682 tc->symbol_class = XMC_PR;
252b5132
RH		 5683 break;
5684 case 'R':
5685 if (strcmp (s, "RO]") == 0)
96d56e9f 5686 tc->symbol_class = XMC_RO;
252b5132 5687 else if (strcmp (s, "RW]") == 0)
96d56e9f 5688 tc->symbol_class = XMC_RW;
252b5132
RH		 5689 break;
5690 case 'S':
5691 if (strcmp (s, "SV]") == 0)
96d56e9f 5692 tc->symbol_class = XMC_SV;
252b5132
RH		 5693 break;
5694 case 'T':
5695 if (strcmp (s, "TC]") == 0)
96d56e9f 5696 tc->symbol_class = XMC_TC;
252b5132 5697 else if (strcmp (s, "TI]") == 0)
96d56e9f 5698 tc->symbol_class = XMC_TI;
252b5132 5699 else if (strcmp (s, "TB]") == 0)
96d56e9f 5700 tc->symbol_class = XMC_TB;
252b5132 5701 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5702 tc->symbol_class = XMC_TC0;
252b5132
RH		 5703 break;
5704 case 'U':
5705 if (strcmp (s, "UA]") == 0)
96d56e9f 5706 tc->symbol_class = XMC_UA;
252b5132 5707 else if (strcmp (s, "UC]") == 0)
96d56e9f 5708 tc->symbol_class = XMC_UC;
252b5132
RH		 5709 break;
5710 case 'X':
5711 if (strcmp (s, "XO]") == 0)
96d56e9f 5712 tc->symbol_class = XMC_XO;
252b5132
RH		 5713 break;
5714 }
5715
96d56e9f 5716 if (tc->symbol_class == -1)
d6ed37ed 5717 as_bad (_("unrecognized symbol suffix"));
252b5132
RH		 5718}
5719
5720/* Set the class of a label based on where it is defined. This
5721 handles symbols without suffixes. Also, move the symbol so that it
5722 follows the csect symbol. */
5723
5724void
98027b10 5725ppc_frob_label (symbolS *sym)
252b5132
RH		 5726{
5727 if (ppc_current_csect != (symbolS *) NULL)
5728 {
96d56e9f
NC		 5729 if (symbol_get_tc (sym)->symbol_class == -1)
5730 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5731
5732 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5733 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5734 &symbol_rootP, &symbol_lastP);
5735 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5736 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5737 }
07a53e5c
RH		 5738
5739#ifdef OBJ_ELF
5740 dwarf2_emit_label (sym);
5741#endif
252b5132
RH		 5742}
5743
5744/* This variable is set by ppc_frob_symbol if any absolute symbols are
5745 seen. It tells ppc_adjust_symtab whether it needs to look through
5746 the symbols. */
5747
b34976b6 5748static bfd_boolean ppc_saw_abs;
252b5132
RH		 5749
5750/* Change the name of a symbol just before writing it out. Set the
5751 real name if the .rename pseudo-op was used. Otherwise, remove any
5752 class suffix. Return 1 if the symbol should not be included in the
5753 symbol table. */
5754
5755int
98027b10 5756ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5757{
5758 static symbolS *ppc_last_function;
5759 static symbolS *set_end;
5760
5761 /* Discard symbols that should not be included in the output symbol
5762 table. */
809ffe0d
ILT		 5763 if (! symbol_used_in_reloc_p (sym)
5764 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5765 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5766 && ! symbol_get_tc (sym)->output
252b5132
RH		 5767 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5768 return 1;
5769
a161fe53
AM		 5770 /* This one will disappear anyway. Don't make a csect sym for it. */
5771 if (sym == abs_section_sym)
5772 return 1;
5773
809ffe0d
ILT		 5774 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5775 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5776 else
5777 {
5778 const char *name;
5779 const char *s;
5780
5781 name = S_GET_NAME (sym);
5782 s = strchr (name, '[');
5783 if (s != (char *) NULL)
5784 {
5785 unsigned int len;
5786 char *snew;
5787
5788 len = s - name;
a44e2901 5789 snew = xstrndup (name, len);
252b5132
RH		 5790
5791 S_SET_NAME (sym, snew);
5792 }
5793 }
5794
5795 if (set_end != (symbolS *) NULL)
5796 {
5797 SA_SET_SYM_ENDNDX (set_end, sym);
5798 set_end = NULL;
5799 }
5800
5801 if (SF_GET_FUNCTION (sym))
5802 {
5803 if (ppc_last_function != (symbolS *) NULL)
5804 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5805 ppc_last_function = sym;
85645aed 5806 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5807 {
85645aed 5808 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5809 SA_SET_SYM_FSIZE (sym,
85645aed 5810 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5811 }
5812 }
5813 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5814 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5815 {
5816 if (ppc_last_function == (symbolS *) NULL)
5817 as_bad (_(".ef with no preceding .function"));
5818 else
5819 {
5820 set_end = ppc_last_function;
5821 ppc_last_function = NULL;
5822
5823 /* We don't have a C_EFCN symbol, but we need to force the
5824 COFF backend to believe that it has seen one. */
5825 coff_last_function = NULL;
5826 }
5827 }
5828
670ec21d 5829 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5830 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5831 && S_GET_STORAGE_CLASS (sym) != C_FILE
5832 && S_GET_STORAGE_CLASS (sym) != C_FCN
5833 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5834 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5835 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5836 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5837 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5838 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5839 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5840
5841 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5842 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5843 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5844 {
5845 int i;
5846 union internal_auxent *a;
5847
5848 /* Create a csect aux. */
5849 i = S_GET_NUMBER_AUXILIARY (sym);
5850 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5851 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5852 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5853 {
5854 /* This is the TOC table. */
5855 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5856 a->x_csect.x_scnlen.l = 0;
5857 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5858 }
809ffe0d 5859 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5860 {
5861 /* This is a csect symbol. x_scnlen is the size of the
5862 csect. */
809ffe0d 5863 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5864 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5865 S_GET_SEGMENT (sym))
5866 - S_GET_VALUE (sym));
5867 else
5868 {
6386f3a7 5869 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5870 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5871 - S_GET_VALUE (sym));
5872 }
809ffe0d 5873 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5874 }
5875 else if (S_GET_SEGMENT (sym) == bss_section)
5876 {
5877 /* This is a common symbol. */
809ffe0d
ILT		 5878 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5879 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5880 if (S_IS_EXTERNAL (sym))
96d56e9f 5881 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5882 else
96d56e9f 5883 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5884 }
5885 else if (S_GET_SEGMENT (sym) == absolute_section)
5886 {
5887 /* This is an absolute symbol. The csect will be created by
99a814a1 5888 ppc_adjust_symtab. */
b34976b6 5889 ppc_saw_abs = TRUE;
252b5132 5890 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5891 if (symbol_get_tc (sym)->symbol_class == -1)
5892 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5893 }
5894 else if (! S_IS_DEFINED (sym))
5895 {
5896 /* This is an external symbol. */
5897 a->x_csect.x_scnlen.l = 0;
5898 a->x_csect.x_smtyp = XTY_ER;
5899 }
96d56e9f 5900 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5901 {
5902 symbolS *next;
5903
5904 /* This is a TOC definition. x_scnlen is the size of the
5905 TOC entry. */
5906 next = symbol_next (sym);
96d56e9f 5907 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5908 next = symbol_next (next);
5909 if (next == (symbolS *) NULL
96d56e9f 5910 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5911 {
5912 if (ppc_after_toc_frag == (fragS *) NULL)
5913 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5914 data_section)
5915 - S_GET_VALUE (sym));
5916 else
5917 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5918 - S_GET_VALUE (sym));
5919 }
5920 else
5921 {
6386f3a7 5922 resolve_symbol_value (next);
252b5132
RH		 5923 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5924 - S_GET_VALUE (sym));
5925 }
5926 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5927 }
5928 else
5929 {
5930 symbolS *csect;
5931
5932 /* This is a normal symbol definition. x_scnlen is the
5933 symbol index of the containing csect. */
5934 if (S_GET_SEGMENT (sym) == text_section)
5935 csect = ppc_text_csects;
5936 else if (S_GET_SEGMENT (sym) == data_section)
5937 csect = ppc_data_csects;
5938 else
5939 abort ();
5940
5941 /* Skip the initial dummy symbol. */
809ffe0d 5942 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5943
5944 if (csect == (symbolS *) NULL)
5945 {
5946 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5947 a->x_csect.x_scnlen.l = 0;
5948 }
5949 else
5950 {
809ffe0d 5951 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5952 {
6386f3a7 5953 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5954 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5955 > S_GET_VALUE (sym))
252b5132 5956 break;
809ffe0d 5957 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5958 }
5959
809ffe0d
ILT		 5960 a->x_csect.x_scnlen.p =
5961 coffsymbol (symbol_get_bfdsym (csect))->native;
5962 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5963 1;
252b5132
RH		 5964 }
5965 a->x_csect.x_smtyp = XTY_LD;
5966 }
81d4177b 5967
252b5132
RH		 5968 a->x_csect.x_parmhash = 0;
5969 a->x_csect.x_snhash = 0;
96d56e9f 5970 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5971 a->x_csect.x_smclas = XMC_PR;
5972 else
96d56e9f 5973 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5974 a->x_csect.x_stab = 0;
5975 a->x_csect.x_snstab = 0;
5976
5977 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5978 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5979 }
5980 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5981 {
5982 /* We want the value to be the symbol index of the referenced
5983 csect symbol. BFD will do that for us if we set the right
5984 flags. */
b782de16
AM		 5985 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5986 combined_entry_type *c = coffsymbol (bsym)->native;
5987
5988 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5989 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5990 }
5991 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5992 {
5993 symbolS *block;
c734e7e3 5994 valueT base;
252b5132 5995
809ffe0d 5996 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5997 if (block)
5998 {
5999 /* The value is the offset from the enclosing csect. */
6000 symbolS *csect;
6001
6002 csect = symbol_get_tc (block)->within;
6003 resolve_symbol_value (csect);
6004 base = S_GET_VALUE (csect);
6005 }
6006 else
6007 base = 0;
6008
6009 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 6010 }
6011 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
6012 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
6013 {
6014 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 6015 BFD will do that for us if we set the right flags. We have
6016 already set the value correctly. */
809ffe0d 6017 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 6018 }
6019
6020 return 0;
6021}
6022
6023/* Adjust the symbol table. This creates csect symbols for all
6024 absolute symbols. */
6025
6026void
98027b10 6027ppc_adjust_symtab (void)
252b5132
RH		 6028{
6029 symbolS *sym;
6030
6031 if (! ppc_saw_abs)
6032 return;
6033
6034 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6035 {
6036 symbolS *csect;
6037 int i;
6038 union internal_auxent *a;
6039
6040 if (S_GET_SEGMENT (sym) != absolute_section)
6041 continue;
6042
6043 csect = symbol_create (".abs[XO]", absolute_section,
6044 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 6045 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 6046 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6047 i = S_GET_NUMBER_AUXILIARY (csect);
6048 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 6049 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 6050 a->x_csect.x_scnlen.l = 0;
6051 a->x_csect.x_smtyp = XTY_SD;
6052 a->x_csect.x_parmhash = 0;
6053 a->x_csect.x_snhash = 0;
6054 a->x_csect.x_smclas = XMC_XO;
6055 a->x_csect.x_stab = 0;
6056 a->x_csect.x_snstab = 0;
6057
6058 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6059
6060 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 6061 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6062 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6063 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 6064 }
6065
b34976b6 6066 ppc_saw_abs = FALSE;
252b5132
RH		 6067}
6068
6069/* Set the VMA for a section. This is called on all the sections in
6070 turn. */
6071
6072void
98027b10 6073ppc_frob_section (asection *sec)
252b5132 6074{
931e13a6 6075 static bfd_vma vma = 0;
252b5132 6076
85645aed
TG		 6077 /* Dwarf sections start at 0. */
6078 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6079 return;
6080
931e13a6 6081 vma = md_section_align (sec, vma);
252b5132
RH		 6082 bfd_set_section_vma (stdoutput, sec, vma);
6083 vma += bfd_section_size (stdoutput, sec);
6084}
6085
6086#endif /* OBJ_XCOFF */
6087\f
6d4af3c2 6088const char *
98027b10 6089md_atof (int type, char *litp, int *sizep)
252b5132 6090{
499ac353 6091 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 6092}
6093
6094/* Write a value out to the object file, using the appropriate
6095 endianness. */
6096
6097void
98027b10 6098md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 6099{
6100 if (target_big_endian)
6101 number_to_chars_bigendian (buf, val, n);
6102 else
6103 number_to_chars_littleendian (buf, val, n);
6104}
6105
6106/* Align a section (I don't know why this is machine dependent). */
6107
6108valueT
3aeeedbb 6109md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 6110{
3aeeedbb
AM		 6111#ifdef OBJ_ELF
6112 return addr;
6113#else
252b5132
RH		 6114 int align = bfd_get_section_alignment (stdoutput, seg);
6115
8d3842cd 6116 return ((addr + (1 << align) - 1) & -(1 << align));
3aeeedbb 6117#endif
252b5132
RH		 6118}
6119
6120/* We don't have any form of relaxing. */
6121
6122int
98027b10
AM		 6123md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6124 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 6125{
6126 abort ();
6127 return 0;
6128}
6129
6130/* Convert a machine dependent frag. We never generate these. */
6131
6132void
98027b10
AM		 6133md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6134 asection *sec ATTRIBUTE_UNUSED,
6135 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 6136{
6137 abort ();
6138}
6139
6140/* We have no need to default values of symbols. */
6141
252b5132 6142symbolS *
98027b10 6143md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 6144{
6145 return 0;
6146}
6147\f
6148/* Functions concerning relocs. */
6149
6150/* The location from which a PC relative jump should be calculated,
6151 given a PC relative reloc. */
6152
6153long
98027b10 6154md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 6155{
6156 return fixp->fx_frag->fr_address + fixp->fx_where;
6157}
6158
6159#ifdef OBJ_XCOFF
6160
6161/* This is called to see whether a fixup should be adjusted to use a
6162 section symbol. We take the opportunity to change a fixup against
6163 a symbol in the TOC subsegment into a reloc against the
6164 corresponding .tc symbol. */
6165
6166int
98027b10 6167ppc_fix_adjustable (fixS *fix)
252b5132 6168{
b782de16
AM		 6169 valueT val = resolve_symbol_value (fix->fx_addsy);
6170 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6171 TC_SYMFIELD_TYPE *tc;
6172
6173 if (symseg == absolute_section)
6174 return 0;
252b5132 6175
85645aed
TG		 6176 /* Always adjust symbols in debugging sections. */
6177 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6178 return 1;
6179
252b5132 6180 if (ppc_toc_csect != (symbolS *) NULL
252b5132 6181 && fix->fx_addsy != ppc_toc_csect
b782de16 6182 && symseg == data_section
252b5132
RH		 6183 && val >= ppc_toc_frag->fr_address
6184 && (ppc_after_toc_frag == (fragS *) NULL
6185 || val < ppc_after_toc_frag->fr_address))
6186 {
6187 symbolS *sy;
6188
6189 for (sy = symbol_next (ppc_toc_csect);
6190 sy != (symbolS *) NULL;
6191 sy = symbol_next (sy))
6192 {
b782de16
AM		 6193 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6194
96d56e9f 6195 if (sy_tc->symbol_class == XMC_TC0)
252b5132 6196 continue;
96d56e9f 6197 if (sy_tc->symbol_class != XMC_TC)
252b5132 6198 break;
b782de16 6199 if (val == resolve_symbol_value (sy))
252b5132
RH		 6200 {
6201 fix->fx_addsy = sy;
6202 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6203 return 0;
6204 }
6205 }
6206
6207 as_bad_where (fix->fx_file, fix->fx_line,
6208 _("symbol in .toc does not match any .tc"));
6209 }
6210
6211 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 6212 tc = symbol_get_tc (fix->fx_addsy);
6213 if (tc->subseg == 0
96d56e9f
NC		 6214 && tc->symbol_class != XMC_TC0
6215 && tc->symbol_class != XMC_TC
b782de16 6216 && symseg != bss_section
252b5132 6217 /* Don't adjust if this is a reloc in the toc section. */
b782de16 6218 && (symseg != data_section
252b5132
RH		 6219 || ppc_toc_csect == NULL
6220 || val < ppc_toc_frag->fr_address
6221 || (ppc_after_toc_frag != NULL
6222 && val >= ppc_after_toc_frag->fr_address)))
6223 {
2fb4b302 6224 symbolS *csect = tc->within;
252b5132 6225
2fb4b302
TG		 6226 /* If the symbol was not declared by a label (eg: a section symbol),
6227 use the section instead of the csect. This doesn't happen in
6228 normal AIX assembly code. */
6229 if (csect == NULL)
6230 csect = seg_info (symseg)->sym;
252b5132 6231
2fb4b302
TG		 6232 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6233 fix->fx_addsy = csect;
252b5132 6234
b782de16 6235 return 0;
252b5132
RH		 6236 }
6237
6238 /* Adjust a reloc against a .lcomm symbol to be against the base
6239 .lcomm. */
b782de16 6240 if (symseg == bss_section
252b5132
RH		 6241 && ! S_IS_EXTERNAL (fix->fx_addsy))
6242 {
b782de16
AM		 6243 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6244
6245 fix->fx_offset += val - resolve_symbol_value (sy);
6246 fix->fx_addsy = sy;
252b5132
RH		 6247 }
6248
6249 return 0;
6250}
6251
6252/* A reloc from one csect to another must be kept. The assembler
6253 will, of course, keep relocs between sections, and it will keep
6254 absolute relocs, but we need to force it to keep PC relative relocs
6255 between two csects in the same section. */
6256
6257int
98027b10 6258ppc_force_relocation (fixS *fix)
252b5132
RH		 6259{
6260 /* At this point fix->fx_addsy should already have been converted to
6261 a csect symbol. If the csect does not include the fragment, then
6262 we need to force the relocation. */
6263 if (fix->fx_pcrel
6264 && fix->fx_addsy != NULL
809ffe0d
ILT		 6265 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6266 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6267 > fix->fx_frag->fr_address)
6268 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6269 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 6270 <= fix->fx_frag->fr_address))))
6271 return 1;
6272
ae6063d4 6273 return generic_force_reloc (fix);
252b5132
RH		 6274}
6275
2fb4b302
TG		 6276void
6277ppc_new_dot_label (symbolS *sym)
6278{
6279 /* Anchor this label to the current csect for relocations. */
6280 symbol_get_tc (sym)->within = ppc_current_csect;
6281}
6282
252b5132
RH		 6283#endif /* OBJ_XCOFF */
6284
0baf16f2 6285#ifdef OBJ_ELF
a161fe53
AM		 6286/* If this function returns non-zero, it guarantees that a relocation
6287 will be emitted for a fixup. */
6288
6289int
98027b10 6290ppc_force_relocation (fixS *fix)
a161fe53
AM		 6291{
6292 /* Branch prediction relocations must force a relocation, as must
6293 the vtable description relocs. */
6294 switch (fix->fx_r_type)
6295 {
6296 case BFD_RELOC_PPC_B16_BRTAKEN:
6297 case BFD_RELOC_PPC_B16_BRNTAKEN:
6298 case BFD_RELOC_PPC_BA16_BRTAKEN:
6299 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 6300 case BFD_RELOC_24_PLT_PCREL:
a161fe53 6301 case BFD_RELOC_PPC64_TOC:
a161fe53 6302 return 1;
6911b7dc
AM		 6303 case BFD_RELOC_PPC_B26:
6304 case BFD_RELOC_PPC_BA26:
6305 case BFD_RELOC_PPC_B16:
6306 case BFD_RELOC_PPC_BA16:
6307 /* All branch fixups targeting a localentry symbol must
6308 force a relocation. */
6309 if (fix->fx_addsy)
6310 {
6311 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6312 elf_symbol_type *elfsym
6313 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6314 gas_assert (elfsym);
6315 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6316 return 1;
6317 }
6318 break;
a161fe53
AM		 6319 default:
6320 break;
6321 }
6322
cdba85ec
AM		 6323 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6324 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6325 return 1;
6326
ae6063d4 6327 return generic_force_reloc (fix);
a161fe53
AM		 6328}
6329
0baf16f2 6330int
98027b10 6331ppc_fix_adjustable (fixS *fix)
252b5132 6332{
6911b7dc
AM		 6333 switch (fix->fx_r_type)
6334 {
6335 /* All branch fixups targeting a localentry symbol must
6336 continue using the symbol. */
6337 case BFD_RELOC_PPC_B26:
6338 case BFD_RELOC_PPC_BA26:
6339 case BFD_RELOC_PPC_B16:
6340 case BFD_RELOC_PPC_BA16:
6341 case BFD_RELOC_PPC_B16_BRTAKEN:
6342 case BFD_RELOC_PPC_B16_BRNTAKEN:
6343 case BFD_RELOC_PPC_BA16_BRTAKEN:
6344 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6345 if (fix->fx_addsy)
6346 {
6347 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6348 elf_symbol_type *elfsym
6349 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6350 gas_assert (elfsym);
6351 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6352 return 0;
6353 }
6354 break;
6355 default:
6356 break;
6357 }
6358
0baf16f2
AM		 6359 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6360 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6361 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6362 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 6363 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6364 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 6365 && fix->fx_r_type != BFD_RELOC_GPREL16
6366 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6367 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 6368 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 6369 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 6370}
0baf16f2 6371#endif
252b5132 6372
b9c361e0
JL		 6373void
6374ppc_frag_check (struct frag *fragP)
6375{
6376 if (!fragP->has_code)
6377 return;
6378
f7d69005 6379 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
b9c361e0
JL		 6380 {
6381 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6382 as_bad (_("instruction address is not a multiple of 2"));
6383 }
6384 else
6385 {
6386 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6387 as_bad (_("instruction address is not a multiple of 4"));
6388 }
6389}
6390
3aeeedbb
AM		 6391/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6392 rs_align_code frag. */
6393
6394void
6395ppc_handle_align (struct frag *fragP)
6396{
6397 valueT count = (fragP->fr_next->fr_address
6398 - (fragP->fr_address + fragP->fr_fix));
6399
f7d69005 6400 if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && count != 0 && (count & 1) == 0)
b9c361e0
JL		 6401 {
6402 char *dest = fragP->fr_literal + fragP->fr_fix;
6403
6404 fragP->fr_var = 2;
6405 md_number_to_chars (dest, 0x4400, 2);
6406 }
6407 else if (count != 0 && (count & 3) == 0)
3aeeedbb
AM		 6408 {
6409 char *dest = fragP->fr_literal + fragP->fr_fix;
6410
6411 fragP->fr_var = 4;
cef4f754
AM		 6412
6413 if (count > 4 * nop_limit && count < 0x2000000)
6414 {
6415 struct frag *rest;
6416
6417 /* Make a branch, then follow with nops. Insert another
6418 frag to handle the nops. */
6419 md_number_to_chars (dest, 0x48000000 + count, 4);
6420 count -= 4;
6421 if (count == 0)
6422 return;
6423
6424 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6425 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6426 fragP->fr_next = rest;
6427 fragP = rest;
6428 rest->fr_address += rest->fr_fix + 4;
6429 rest->fr_fix = 0;
6430 /* If we leave the next frag as rs_align_code we'll come here
6431 again, resulting in a bunch of branches rather than a
6432 branch followed by nops. */
6433 rest->fr_type = rs_align;
6434 dest = rest->fr_literal;
6435 }
6436
3aeeedbb
AM		 6437 md_number_to_chars (dest, 0x60000000, 4);
6438
42240548 6439 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5817ffd1 6440 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
a680de9a
PB		 6441 || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6442 || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
3aeeedbb 6443 {
a680de9a
PB		 6444 /* For power6, power7, power8 and power9, we want the last nop to be
6445 a group terminating one. Do this by inserting an rs_fill frag
6446 immediately after this one, with its address set to the last nop
6447 location. This will automatically reduce the number of nops in
6448 the current frag by one. */
3aeeedbb
AM		 6449 if (count > 4)
6450 {
6451 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6452
6453 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6454 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6455 group_nop->fr_fix = 0;
6456 group_nop->fr_offset = 1;
6457 group_nop->fr_type = rs_fill;
6458 fragP->fr_next = group_nop;
6459 dest = group_nop->fr_literal;
6460 }
6461
5817ffd1 6462 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
a680de9a
PB		 6463 || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6464 || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
aea77599
AM		 6465 {
6466 if (ppc_cpu & PPC_OPCODE_E500MC)
6467 /* e500mc group terminating nop: "ori 0,0,0". */
6468 md_number_to_chars (dest, 0x60000000, 4);
6469 else
a680de9a 6470 /* power7/power8/power9 group terminating nop: "ori 2,2,0". */
aea77599
AM		 6471 md_number_to_chars (dest, 0x60420000, 4);
6472 }
42240548
PB		 6473 else
6474 /* power6 group terminating nop: "ori 1,1,0". */
6475 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6476 }
6477 }
6478}
6479
252b5132 6480/* Apply a fixup to the object code. This is called for all the
3b8b57a9 6481 fixups we generated by the calls to fix_new_exp, above. */
252b5132 6482
94f592af 6483void
62ebcb5c 6484md_apply_fix (fixS *fixP, valueT *valP, segT seg)
252b5132 6485{
94f592af 6486 valueT value = * valP;
5656a981
AM		 6487 offsetT fieldval;
6488 const struct powerpc_operand *operand;
252b5132
RH		 6489
6490#ifdef OBJ_ELF
94f592af 6491 if (fixP->fx_addsy != NULL)
252b5132 6492 {
a161fe53 6493 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6494 if (fixP->fx_pcrel)
6495 value += fixP->fx_frag->fr_address + fixP->fx_where;
a680de9a
PB		 6496
6497 if (fixP->fx_addsy == abs_section_sym)
6498 fixP->fx_done = 1;
252b5132
RH		 6499 }
6500 else
94f592af 6501 fixP->fx_done = 1;
252b5132 6502#else
a161fe53 6503 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6504 the symbol values. If we are doing this relocation the code in
6505 write.c is going to call bfd_install_relocation, which is also
6506 going to use the symbol value. That means that if the reloc is
6507 fully resolved we want to use *valP since bfd_install_relocation is
6508 not being used.
9f0eb232
RS		 6509 However, if the reloc is not fully resolved we do not want to
6510 use *valP, and must use fx_offset instead. If the relocation
6511 is PC-relative, we then need to re-apply md_pcrel_from_section
6512 to this new relocation value. */
94f592af
NC		 6513 if (fixP->fx_addsy == (symbolS *) NULL)
6514 fixP->fx_done = 1;
6515
252b5132 6516 else
9f0eb232
RS		 6517 {
6518 value = fixP->fx_offset;
6519 if (fixP->fx_pcrel)
6520 value -= md_pcrel_from_section (fixP, seg);
6521 }
a161fe53
AM		 6522#endif
6523
6524 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6525 {
a161fe53
AM		 6526 /* We can't actually support subtracting a symbol. */
6527 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6528 }
252b5132 6529
5656a981 6530 operand = NULL;
3b8b57a9 6531 if (fixP->fx_pcrel_adjust != 0)
252b5132 6532 {
5656a981 6533 /* This is a fixup on an instruction. */
3b8b57a9 6534 int opindex = fixP->fx_pcrel_adjust & 0xff;
252b5132 6535
5656a981 6536 operand = &powerpc_operands[opindex];
252b5132 6537#ifdef OBJ_XCOFF
0baf16f2
AM		 6538 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6539 does not generate a reloc. It uses the offset of `sym' within its
6540 csect. Other usages, such as `.long sym', generate relocs. This
6541 is the documented behaviour of non-TOC symbols. */
252b5132 6542 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6543 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6544 && operand->shift == 0
2b3c4602 6545 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6546 && fixP->fx_addsy != NULL
6547 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6548 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6549 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6550 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6551 {
94f592af
NC		 6552 value = fixP->fx_offset;
6553 fixP->fx_done = 1;
252b5132 6554 }
ac21e7da
TG		 6555
6556 /* During parsing of instructions, a TOC16 reloc is generated for
6557 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6558 in the toc. But at parse time, SYM may be not yet defined, so
6559 check again here. */
6560 if (fixP->fx_r_type == BFD_RELOC_16
6561 && fixP->fx_addsy != NULL
6562 && ppc_is_toc_sym (fixP->fx_addsy))
6563 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
252b5132 6564#endif
5656a981
AM		 6565 }
6566
6567 /* Calculate value to be stored in field. */
6568 fieldval = value;
6569 switch (fixP->fx_r_type)
6570 {
1ec2d25e 6571#ifdef OBJ_ELF
5656a981
AM		 6572 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6573 case BFD_RELOC_PPC_VLE_LO16A:
6574 case BFD_RELOC_PPC_VLE_LO16D:
1ec2d25e 6575#endif
5656a981
AM		 6576 case BFD_RELOC_LO16:
6577 case BFD_RELOC_LO16_PCREL:
6578 fieldval = value & 0xffff;
6579 sign_extend_16:
6580 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
f9c6b907 6581 fieldval = SEX16 (fieldval);
5656a981
AM		 6582 fixP->fx_no_overflow = 1;
6583 break;
3c9d25f4 6584
f9c6b907
AM		 6585 case BFD_RELOC_HI16:
6586 case BFD_RELOC_HI16_PCREL:
5656a981 6587#ifdef OBJ_ELF
f9c6b907
AM		 6588 if (REPORT_OVERFLOW_HI && ppc_obj64)
6589 {
6590 fieldval = value >> 16;
6591 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6592 {
6593 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6594 fieldval = ((valueT) fieldval ^ sign) - sign;
6595 }
6596 break;
6597 }
6598 /* Fall thru */
6599
5656a981
AM		 6600 case BFD_RELOC_PPC_VLE_HI16A:
6601 case BFD_RELOC_PPC_VLE_HI16D:
f9c6b907 6602 case BFD_RELOC_PPC64_ADDR16_HIGH:
5656a981 6603#endif
5656a981
AM		 6604 fieldval = PPC_HI (value);
6605 goto sign_extend_16;
0baf16f2 6606
f9c6b907
AM		 6607 case BFD_RELOC_HI16_S:
6608 case BFD_RELOC_HI16_S_PCREL:
a680de9a 6609 case BFD_RELOC_PPC_REL16DX_HA:
5656a981 6610#ifdef OBJ_ELF
f9c6b907
AM		 6611 if (REPORT_OVERFLOW_HI && ppc_obj64)
6612 {
6613 fieldval = (value + 0x8000) >> 16;
6614 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6615 {
6616 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6617 fieldval = ((valueT) fieldval ^ sign) - sign;
6618 }
6619 break;
6620 }
6621 /* Fall thru */
6622
5656a981
AM		 6623 case BFD_RELOC_PPC_VLE_HA16A:
6624 case BFD_RELOC_PPC_VLE_HA16D:
f9c6b907 6625 case BFD_RELOC_PPC64_ADDR16_HIGHA:
5656a981 6626#endif
5656a981
AM		 6627 fieldval = PPC_HA (value);
6628 goto sign_extend_16;
0baf16f2 6629
3b8b57a9 6630#ifdef OBJ_ELF
5656a981
AM		 6631 case BFD_RELOC_PPC64_HIGHER:
6632 fieldval = PPC_HIGHER (value);
6633 goto sign_extend_16;
252b5132 6634
5656a981
AM		 6635 case BFD_RELOC_PPC64_HIGHER_S:
6636 fieldval = PPC_HIGHERA (value);
6637 goto sign_extend_16;
0baf16f2 6638
5656a981
AM		 6639 case BFD_RELOC_PPC64_HIGHEST:
6640 fieldval = PPC_HIGHEST (value);
6641 goto sign_extend_16;
0baf16f2 6642
5656a981
AM		 6643 case BFD_RELOC_PPC64_HIGHEST_S:
6644 fieldval = PPC_HIGHESTA (value);
6645 goto sign_extend_16;
6646#endif
6647
6648 default:
6649 break;
6650 }
6651
6652 if (operand != NULL)
6653 {
6654 /* Handle relocs in an insn. */
5656a981
AM		 6655 switch (fixP->fx_r_type)
6656 {
7fa9fcb6 6657#ifdef OBJ_ELF
3b8b57a9
AM		 6658 /* The following relocs can't be calculated by the assembler.
6659 Leave the field zero. */
cdba85ec
AM		 6660 case BFD_RELOC_PPC_TPREL16:
6661 case BFD_RELOC_PPC_TPREL16_LO:
6662 case BFD_RELOC_PPC_TPREL16_HI:
6663 case BFD_RELOC_PPC_TPREL16_HA:
cdba85ec
AM		 6664 case BFD_RELOC_PPC_DTPREL16:
6665 case BFD_RELOC_PPC_DTPREL16_LO:
6666 case BFD_RELOC_PPC_DTPREL16_HI:
6667 case BFD_RELOC_PPC_DTPREL16_HA:
cdba85ec
AM		 6668 case BFD_RELOC_PPC_GOT_TLSGD16:
6669 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6670 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6671 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6672 case BFD_RELOC_PPC_GOT_TLSLD16:
6673 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6674 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6675 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6676 case BFD_RELOC_PPC_GOT_TPREL16:
6677 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6678 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6679 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6680 case BFD_RELOC_PPC_GOT_DTPREL16:
6681 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6682 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6683 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6684 case BFD_RELOC_PPC64_TPREL16_DS:
6685 case BFD_RELOC_PPC64_TPREL16_LO_DS:
f9c6b907
AM		 6686 case BFD_RELOC_PPC64_TPREL16_HIGH:
6687 case BFD_RELOC_PPC64_TPREL16_HIGHA:
cdba85ec
AM		 6688 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6689 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6690 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6691 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
f9c6b907
AM		 6692 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6693 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
cdba85ec
AM		 6694 case BFD_RELOC_PPC64_DTPREL16_DS:
6695 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6696 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6697 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6698 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6699 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
3b8b57a9 6700 gas_assert (fixP->fx_addsy != NULL);
7c1d0959 6701 S_SET_THREAD_LOCAL (fixP->fx_addsy);
3b8b57a9 6702 fieldval = 0;
cdba85ec 6703 break;
3b8b57a9
AM		 6704
6705 /* These also should leave the field zero for the same
6706 reason. Note that older versions of gas wrote values
6707 here. If we want to go back to the old behaviour, then
6708 all _LO and _LO_DS cases will need to be treated like
6709 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6710 case BFD_RELOC_16_GOTOFF:
6711 case BFD_RELOC_LO16_GOTOFF:
6712 case BFD_RELOC_HI16_GOTOFF:
6713 case BFD_RELOC_HI16_S_GOTOFF:
6714 case BFD_RELOC_LO16_PLTOFF:
6715 case BFD_RELOC_HI16_PLTOFF:
6716 case BFD_RELOC_HI16_S_PLTOFF:
6717 case BFD_RELOC_GPREL16:
6718 case BFD_RELOC_16_BASEREL:
6719 case BFD_RELOC_LO16_BASEREL:
6720 case BFD_RELOC_HI16_BASEREL:
6721 case BFD_RELOC_HI16_S_BASEREL:
6722 case BFD_RELOC_PPC_TOC16:
6723 case BFD_RELOC_PPC64_TOC16_LO:
6724 case BFD_RELOC_PPC64_TOC16_HI:
6725 case BFD_RELOC_PPC64_TOC16_HA:
6726 case BFD_RELOC_PPC64_PLTGOT16:
6727 case BFD_RELOC_PPC64_PLTGOT16_LO:
6728 case BFD_RELOC_PPC64_PLTGOT16_HI:
6729 case BFD_RELOC_PPC64_PLTGOT16_HA:
6730 case BFD_RELOC_PPC64_GOT16_DS:
6731 case BFD_RELOC_PPC64_GOT16_LO_DS:
6732 case BFD_RELOC_PPC64_PLT16_LO_DS:
6733 case BFD_RELOC_PPC64_SECTOFF_DS:
6734 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6735 case BFD_RELOC_PPC64_TOC16_DS:
6736 case BFD_RELOC_PPC64_TOC16_LO_DS:
6737 case BFD_RELOC_PPC64_PLTGOT16_DS:
6738 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6739 case BFD_RELOC_PPC_EMB_NADDR16:
6740 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6741 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6742 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6743 case BFD_RELOC_PPC_EMB_SDAI16:
6744 case BFD_RELOC_PPC_EMB_SDA2I16:
6745 case BFD_RELOC_PPC_EMB_SDA2REL:
252b5132 6746 case BFD_RELOC_PPC_EMB_SDA21:
3b8b57a9
AM		 6747 case BFD_RELOC_PPC_EMB_MRKREF:
6748 case BFD_RELOC_PPC_EMB_RELSEC16:
6749 case BFD_RELOC_PPC_EMB_RELST_LO:
6750 case BFD_RELOC_PPC_EMB_RELST_HI:
6751 case BFD_RELOC_PPC_EMB_RELST_HA:
6752 case BFD_RELOC_PPC_EMB_BIT_FLD:
6753 case BFD_RELOC_PPC_EMB_RELSDA:
6754 case BFD_RELOC_PPC_VLE_SDA21:
6755 case BFD_RELOC_PPC_VLE_SDA21_LO:
6756 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6757 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6758 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6759 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6760 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6761 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6762 gas_assert (fixP->fx_addsy != NULL);
6763 /* Fall thru */
6764
6765 case BFD_RELOC_PPC_TLS:
6766 case BFD_RELOC_PPC_TLSGD:
6767 case BFD_RELOC_PPC_TLSLD:
6768 fieldval = 0;
3b8b57a9 6769 break;
7fa9fcb6
TG		 6770#endif
6771
6772#ifdef OBJ_XCOFF
6773 case BFD_RELOC_PPC_B16:
6774 /* Adjust the offset to the instruction boundary. */
6775 fieldval += 2;
6776 break;
6777#endif
252b5132 6778
f728387b
AM		 6779 case BFD_RELOC_VTABLE_INHERIT:
6780 case BFD_RELOC_VTABLE_ENTRY:
6781 case BFD_RELOC_PPC_DTPMOD:
6782 case BFD_RELOC_PPC_TPREL:
6783 case BFD_RELOC_PPC_DTPREL:
6784 case BFD_RELOC_PPC_COPY:
6785 case BFD_RELOC_PPC_GLOB_DAT:
6786 case BFD_RELOC_32_PLT_PCREL:
6787 case BFD_RELOC_PPC_EMB_NADDR32:
6788 case BFD_RELOC_PPC64_TOC:
6789 case BFD_RELOC_CTOR:
6790 case BFD_RELOC_32:
6791 case BFD_RELOC_32_PCREL:
6792 case BFD_RELOC_RVA:
6793 case BFD_RELOC_64:
6794 case BFD_RELOC_64_PCREL:
6795 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6796 as_bad_where (fixP->fx_file, fixP->fx_line,
6797 _("%s unsupported as instruction fixup"),
6798 bfd_get_reloc_code_name (fixP->fx_r_type));
6799 fixP->fx_done = 1;
6800 return;
6801
3b8b57a9 6802 default:
252b5132 6803 break;
3b8b57a9 6804 }
252b5132 6805
3b8b57a9
AM		 6806#ifdef OBJ_ELF
6807/* powerpc uses RELA style relocs, so if emitting a reloc the field
6808 contents can stay at zero. */
6809#define APPLY_RELOC fixP->fx_done
6810#else
6811#define APPLY_RELOC 1
6812#endif
6813 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6814 {
487b24d8
AM		 6815 unsigned long insn;
6816 unsigned char *where;
6817
3b8b57a9
AM		 6818 /* Fetch the instruction, insert the fully resolved operand
6819 value, and stuff the instruction back again. */
487b24d8 6820 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
3b8b57a9 6821 if (target_big_endian)
31a91399 6822 {
3b8b57a9 6823 if (fixP->fx_size == 4)
487b24d8 6824 insn = bfd_getb32 (where);
31a91399 6825 else
487b24d8 6826 insn = bfd_getb16 (where);
31a91399
NC		 6827 }
6828 else
3b8b57a9
AM		 6829 {
6830 if (fixP->fx_size == 4)
487b24d8 6831 insn = bfd_getl32 (where);
3b8b57a9 6832 else
487b24d8 6833 insn = bfd_getl16 (where);
3b8b57a9
AM		 6834 }
6835 insn = ppc_insert_operand (insn, operand, fieldval,
6836 fixP->tc_fix_data.ppc_cpu,
6837 fixP->fx_file, fixP->fx_line);
6838 if (target_big_endian)
6839 {
6840 if (fixP->fx_size == 4)
487b24d8 6841 bfd_putb32 (insn, where);
3b8b57a9 6842 else
487b24d8 6843 bfd_putb16 (insn, where);
3b8b57a9
AM		 6844 }
6845 else
6846 {
6847 if (fixP->fx_size == 4)
487b24d8 6848 bfd_putl32 (insn, where);
3b8b57a9 6849 else
487b24d8 6850 bfd_putl16 (insn, where);
3b8b57a9
AM		 6851 }
6852 }
6853
6854 if (fixP->fx_done)
6855 /* Nothing else to do here. */
6856 return;
6857
6858 gas_assert (fixP->fx_addsy != NULL);
62ebcb5c 6859 if (fixP->fx_r_type == BFD_RELOC_NONE)
3b8b57a9 6860 {
3b4dbbbf 6861 const char *sfile;
3b8b57a9
AM		 6862 unsigned int sline;
6863
6864 /* Use expr_symbol_where to see if this is an expression
6865 symbol. */
6866 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6867 as_bad_where (fixP->fx_file, fixP->fx_line,
6868 _("unresolved expression that must be resolved"));
6869 else
6870 as_bad_where (fixP->fx_file, fixP->fx_line,
6871 _("unsupported relocation against %s"),
6872 S_GET_NAME (fixP->fx_addsy));
6873 fixP->fx_done = 1;
6874 return;
6875 }
6876 }
6877 else
6878 {
6879 /* Handle relocs in data. */
6880 switch (fixP->fx_r_type)
6881 {
252b5132 6882 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6883 if (fixP->fx_addsy
6884 && !S_IS_DEFINED (fixP->fx_addsy)
6885 && !S_IS_WEAK (fixP->fx_addsy))
6886 S_SET_WEAK (fixP->fx_addsy);
3b8b57a9 6887 /* Fall thru */
252b5132
RH		 6888
6889 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6890 fixP->fx_done = 0;
252b5132
RH		 6891 break;
6892
0baf16f2 6893#ifdef OBJ_ELF
3b8b57a9
AM		 6894 /* These can appear with @l etc. in data. */
6895 case BFD_RELOC_LO16:
3b8b57a9 6896 case BFD_RELOC_LO16_PCREL:
3b8b57a9 6897 case BFD_RELOC_HI16:
3b8b57a9 6898 case BFD_RELOC_HI16_PCREL:
3b8b57a9 6899 case BFD_RELOC_HI16_S:
3b8b57a9 6900 case BFD_RELOC_HI16_S_PCREL:
3b8b57a9 6901 case BFD_RELOC_PPC64_HIGHER:
3b8b57a9 6902 case BFD_RELOC_PPC64_HIGHER_S:
3b8b57a9 6903 case BFD_RELOC_PPC64_HIGHEST:
3b8b57a9 6904 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 6905 case BFD_RELOC_PPC64_ADDR16_HIGH:
6906 case BFD_RELOC_PPC64_ADDR16_HIGHA:
45965137 6907 case BFD_RELOC_PPC64_ADDR64_LOCAL:
3b8b57a9
AM		 6908 break;
6909
6910 case BFD_RELOC_PPC_DTPMOD:
6911 case BFD_RELOC_PPC_TPREL:
6912 case BFD_RELOC_PPC_DTPREL:
6913 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6914 break;
6915
6916 /* Just punt all of these to the linker. */
6917 case BFD_RELOC_PPC_B16_BRTAKEN:
6918 case BFD_RELOC_PPC_B16_BRNTAKEN:
6919 case BFD_RELOC_16_GOTOFF:
6920 case BFD_RELOC_LO16_GOTOFF:
6921 case BFD_RELOC_HI16_GOTOFF:
6922 case BFD_RELOC_HI16_S_GOTOFF:
6923 case BFD_RELOC_LO16_PLTOFF:
6924 case BFD_RELOC_HI16_PLTOFF:
6925 case BFD_RELOC_HI16_S_PLTOFF:
6926 case BFD_RELOC_PPC_COPY:
6927 case BFD_RELOC_PPC_GLOB_DAT:
6928 case BFD_RELOC_16_BASEREL:
6929 case BFD_RELOC_LO16_BASEREL:
6930 case BFD_RELOC_HI16_BASEREL:
6931 case BFD_RELOC_HI16_S_BASEREL:
6932 case BFD_RELOC_PPC_TLS:
6933 case BFD_RELOC_PPC_DTPREL16_LO:
6934 case BFD_RELOC_PPC_DTPREL16_HI:
6935 case BFD_RELOC_PPC_DTPREL16_HA:
6936 case BFD_RELOC_PPC_TPREL16_LO:
6937 case BFD_RELOC_PPC_TPREL16_HI:
6938 case BFD_RELOC_PPC_TPREL16_HA:
6939 case BFD_RELOC_PPC_GOT_TLSGD16:
6940 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6941 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6942 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6943 case BFD_RELOC_PPC_GOT_TLSLD16:
6944 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6945 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6946 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6947 case BFD_RELOC_PPC_GOT_DTPREL16:
6948 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6949 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6950 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6951 case BFD_RELOC_PPC_GOT_TPREL16:
6952 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6953 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6954 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6955 case BFD_RELOC_24_PLT_PCREL:
6956 case BFD_RELOC_PPC_LOCAL24PC:
6957 case BFD_RELOC_32_PLT_PCREL:
6958 case BFD_RELOC_GPREL16:
6959 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6960 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6961 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6962 case BFD_RELOC_PPC_EMB_NADDR32:
6963 case BFD_RELOC_PPC_EMB_NADDR16:
6964 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6965 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6966 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6967 case BFD_RELOC_PPC_EMB_SDAI16:
6968 case BFD_RELOC_PPC_EMB_SDA2REL:
6969 case BFD_RELOC_PPC_EMB_SDA2I16:
6970 case BFD_RELOC_PPC_EMB_SDA21:
6971 case BFD_RELOC_PPC_VLE_SDA21_LO:
6972 case BFD_RELOC_PPC_EMB_MRKREF:
6973 case BFD_RELOC_PPC_EMB_RELSEC16:
6974 case BFD_RELOC_PPC_EMB_RELST_LO:
6975 case BFD_RELOC_PPC_EMB_RELST_HI:
6976 case BFD_RELOC_PPC_EMB_RELST_HA:
6977 case BFD_RELOC_PPC_EMB_BIT_FLD:
6978 case BFD_RELOC_PPC_EMB_RELSDA:
0baf16f2 6979 case BFD_RELOC_PPC64_TOC:
3b8b57a9
AM		 6980 case BFD_RELOC_PPC_TOC16:
6981 case BFD_RELOC_PPC64_TOC16_LO:
6982 case BFD_RELOC_PPC64_TOC16_HI:
6983 case BFD_RELOC_PPC64_TOC16_HA:
f9c6b907
AM		 6984 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6985 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
3b8b57a9
AM		 6986 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6987 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6988 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6989 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
f9c6b907
AM		 6990 case BFD_RELOC_PPC64_TPREL16_HIGH:
6991 case BFD_RELOC_PPC64_TPREL16_HIGHA:
3b8b57a9
AM		 6992 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6993 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6994 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6995 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
94f592af 6996 fixP->fx_done = 0;
0baf16f2 6997 break;
0baf16f2 6998#endif
3b8b57a9
AM		 6999
7000#ifdef OBJ_XCOFF
7001 case BFD_RELOC_NONE:
3b8b57a9 7002#endif
5656a981
AM		 7003 case BFD_RELOC_CTOR:
7004 case BFD_RELOC_32:
7005 case BFD_RELOC_32_PCREL:
7006 case BFD_RELOC_RVA:
7007 case BFD_RELOC_64:
7008 case BFD_RELOC_64_PCREL:
7009 case BFD_RELOC_16:
7010 case BFD_RELOC_16_PCREL:
7011 case BFD_RELOC_8:
7012 break;
3b8b57a9 7013
252b5132 7014 default:
bc805888 7015 fprintf (stderr,
94f592af 7016 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 7017 fflush (stderr);
252b5132
RH		 7018 abort ();
7019 }
46b596ff 7020
5656a981 7021 if (fixP->fx_size && APPLY_RELOC)
46b596ff 7022 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5656a981 7023 fieldval, fixP->fx_size);
bf7279d5
AM		 7024 if (warn_476
7025 && (seg->flags & SEC_CODE) != 0
7026 && fixP->fx_size == 4
7027 && fixP->fx_done
7028 && !fixP->fx_tcbit
7029 && (fixP->fx_r_type == BFD_RELOC_32
7030 || fixP->fx_r_type == BFD_RELOC_CTOR
7031 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
7032 as_warn_where (fixP->fx_file, fixP->fx_line,
7033 _("data in executable section"));
5656a981
AM		 7034 }
7035
7036 /* We are only able to convert some relocs to pc-relative. */
7037 if (!fixP->fx_done && fixP->fx_pcrel)
7038 {
7039 switch (fixP->fx_r_type)
7040 {
7041 case BFD_RELOC_LO16:
7042 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
7043 break;
7044
7045 case BFD_RELOC_HI16:
7046 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
7047 break;
7048
7049 case BFD_RELOC_HI16_S:
7050 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
7051 break;
7052
7053 case BFD_RELOC_64:
7054 fixP->fx_r_type = BFD_RELOC_64_PCREL;
7055 break;
7056
7057 case BFD_RELOC_32:
7058 fixP->fx_r_type = BFD_RELOC_32_PCREL;
7059 break;
7060
7061 case BFD_RELOC_16:
7062 fixP->fx_r_type = BFD_RELOC_16_PCREL;
7063 break;
7064
7065 /* Some of course are already pc-relative. */
7066 case BFD_RELOC_LO16_PCREL:
7067 case BFD_RELOC_HI16_PCREL:
7068 case BFD_RELOC_HI16_S_PCREL:
a680de9a 7069 case BFD_RELOC_PPC_REL16DX_HA:
5656a981
AM		 7070 case BFD_RELOC_64_PCREL:
7071 case BFD_RELOC_32_PCREL:
7072 case BFD_RELOC_16_PCREL:
7073 case BFD_RELOC_PPC_B16:
7074 case BFD_RELOC_PPC_B16_BRTAKEN:
7075 case BFD_RELOC_PPC_B16_BRNTAKEN:
7076 case BFD_RELOC_PPC_B26:
7077 case BFD_RELOC_PPC_LOCAL24PC:
7078 case BFD_RELOC_24_PLT_PCREL:
7079 case BFD_RELOC_32_PLT_PCREL:
7080 case BFD_RELOC_64_PLT_PCREL:
7081 case BFD_RELOC_PPC_VLE_REL8:
7082 case BFD_RELOC_PPC_VLE_REL15:
7083 case BFD_RELOC_PPC_VLE_REL24:
7084 break;
7085
7086 default:
7087 if (fixP->fx_addsy)
7088 {
3b4dbbbf 7089 const char *sfile;
5656a981
AM		 7090 unsigned int sline;
7091
7092 /* Use expr_symbol_where to see if this is an
7093 expression symbol. */
7094 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7095 as_bad_where (fixP->fx_file, fixP->fx_line,
7096 _("unresolved expression that must"
7097 " be resolved"));
7098 else
7099 as_bad_where (fixP->fx_file, fixP->fx_line,
7100 _("cannot emit PC relative %s relocation"
7101 " against %s"),
7102 bfd_get_reloc_code_name (fixP->fx_r_type),
7103 S_GET_NAME (fixP->fx_addsy));
7104 }
7105 else
7106 as_bad_where (fixP->fx_file, fixP->fx_line,
7107 _("unable to resolve expression"));
7108 fixP->fx_done = 1;
7109 break;
7110 }
252b5132
RH		 7111 }
7112
7113#ifdef OBJ_ELF
3b8b57a9 7114 ppc_elf_validate_fix (fixP, seg);
94f592af 7115 fixP->fx_addnumber = value;
4e6935a6
AM		 7116
7117 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7118 from the section contents. If we are going to be emitting a reloc
7119 then the section contents are immaterial, so don't warn if they
7120 happen to overflow. Leave such warnings to ld. */
7121 if (!fixP->fx_done)
a38a07e0
AM		 7122 {
7123 fixP->fx_no_overflow = 1;
7124
7125 /* Arrange to emit .TOC. as a normal symbol if used in anything
7126 but .TOC.@tocbase. */
7127 if (ppc_obj64
7128 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7129 && fixP->fx_addsy != NULL
7130 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7131 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7132 }
252b5132 7133#else
94f592af
NC		 7134 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7135 fixP->fx_addnumber = 0;
252b5132
RH		 7136 else
7137 {
7138#ifdef TE_PE
94f592af 7139 fixP->fx_addnumber = 0;
252b5132 7140#else
8edcbfcd
TG		 7141 /* We want to use the offset within the toc, not the actual VMA
7142 of the symbol. */
94f592af 7143 fixP->fx_addnumber =
8edcbfcd
TG		 7144 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7145 - S_GET_VALUE (ppc_toc_csect);
ac21e7da
TG		 7146 /* Set *valP to avoid errors. */
7147 *valP = value;
252b5132
RH		 7148#endif
7149 }
7150#endif
252b5132
RH		 7151}
7152
7153/* Generate a reloc for a fixup. */
7154
7155arelent *
98027b10 7156tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 7157{
7158 arelent *reloc;
7159
325801bd 7160 reloc = XNEW (arelent);
252b5132 7161
325801bd 7162 reloc->sym_ptr_ptr = XNEW (asymbol *);
49309057 7163 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 7164 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7165 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7166 if (reloc->howto == (reloc_howto_type *) NULL)
7167 {
7168 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 7169 _("reloc %d not supported by object file format"),
7170 (int) fixp->fx_r_type);
252b5132
RH		 7171 return NULL;
7172 }
7173 reloc->addend = fixp->fx_addnumber;
7174
7175 return reloc;
7176}
75e21f08
JJ		 7177
7178void
98027b10 7179ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 7180{
7181 cfi_add_CFA_def_cfa (1, 0);
7182}
7183
7184int
1df69f4f 7185tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 7186{
7187 unsigned int regnum = -1;
7188 unsigned int i;
7189 const char *p;
7190 char *q;
e0471c16 7191 static struct { const char *name; int dw2regnum; } regnames[] =
75e21f08
JJ		 7192 {
7193 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7194 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 7195 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 7196 { "spe_acc", 111 }, { "spefscr", 112 }
7197 };
7198
7199 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7200 if (strcmp (regnames[i].name, regname) == 0)
7201 return regnames[i].dw2regnum;
7202
7203 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7204 {
7205 p = regname + 1 + (regname[1] == '.');
7206 regnum = strtoul (p, &q, 10);
7207 if (p == q || *q || regnum >= 32)
7208 return -1;
7209 if (regname[0] == 'f')
b7d7dc63 7210 regnum += 32;
75e21f08 7211 else if (regname[0] == 'v')
b7d7dc63 7212 regnum += 77;
75e21f08
JJ		 7213 }
7214 else if (regname[0] == 'c' && regname[1] == 'r')
7215 {
7216 p = regname + 2 + (regname[2] == '.');
7217 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 7218 return -1;
75e21f08
JJ		 7219 regnum = p[0] - '0' + 68;
7220 }
7221 return regnum;
7222}
GDB Binutils - Deliverables
This page took 1.418381 seconds and 4 git commands to generate.