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[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
b84bf58a 3 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
b34976b6 87static bfd_boolean register_name PARAMS ((expressionS *));
252b5132 88static void ppc_set_cpu PARAMS ((void));
252b5132
RH		 89static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
90static void ppc_byte PARAMS ((int));
0baf16f2
AM		 91
92#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 93static int ppc_is_toc_sym PARAMS ((symbolS *sym));
94static void ppc_tc PARAMS ((int));
0baf16f2
AM		 95static void ppc_machine PARAMS ((int));
96#endif
252b5132
RH		 97
98#ifdef OBJ_XCOFF
99static void ppc_comm PARAMS ((int));
100static void ppc_bb PARAMS ((int));
101static void ppc_bc PARAMS ((int));
102static void ppc_bf PARAMS ((int));
103static void ppc_biei PARAMS ((int));
104static void ppc_bs PARAMS ((int));
105static void ppc_eb PARAMS ((int));
106static void ppc_ec PARAMS ((int));
107static void ppc_ef PARAMS ((int));
108static void ppc_es PARAMS ((int));
109static void ppc_csect PARAMS ((int));
931e13a6 110static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH		 111static void ppc_function PARAMS ((int));
112static void ppc_extern PARAMS ((int));
113static void ppc_lglobl PARAMS ((int));
114static void ppc_section PARAMS ((int));
115static void ppc_named_section PARAMS ((int));
116static void ppc_stabx PARAMS ((int));
117static void ppc_rename PARAMS ((int));
118static void ppc_toc PARAMS ((int));
119static void ppc_xcoff_cons PARAMS ((int));
120static void ppc_vbyte PARAMS ((int));
121#endif
122
123#ifdef OBJ_ELF
124static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
125static void ppc_elf_cons PARAMS ((int));
126static void ppc_elf_rdata PARAMS ((int));
127static void ppc_elf_lcomm PARAMS ((int));
128static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 129static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 130#endif
131
132#ifdef TE_PE
133static void ppc_set_current_section PARAMS ((segT));
134static void ppc_previous PARAMS ((int));
135static void ppc_pdata PARAMS ((int));
136static void ppc_ydata PARAMS ((int));
137static void ppc_reldata PARAMS ((int));
138static void ppc_rdata PARAMS ((int));
139static void ppc_ualong PARAMS ((int));
140static void ppc_znop PARAMS ((int));
141static void ppc_pe_comm PARAMS ((int));
142static void ppc_pe_section PARAMS ((int));
143static void ppc_pe_function PARAMS ((int));
144static void ppc_pe_tocd PARAMS ((int));
145#endif
146\f
147/* Generic assembler global variables which must be defined by all
148 targets. */
149
150#ifdef OBJ_ELF
151/* This string holds the chars that always start a comment. If the
152 pre-processor is disabled, these aren't very useful. The macro
153 tc_comment_chars points to this. We use this, rather than the
154 usual comment_chars, so that we can switch for Solaris conventions. */
155static const char ppc_solaris_comment_chars[] = "#!";
156static const char ppc_eabi_comment_chars[] = "#";
157
158#ifdef TARGET_SOLARIS_COMMENT
159const char *ppc_comment_chars = ppc_solaris_comment_chars;
160#else
161const char *ppc_comment_chars = ppc_eabi_comment_chars;
162#endif
163#else
164const char comment_chars[] = "#";
165#endif
166
167/* Characters which start a comment at the beginning of a line. */
168const char line_comment_chars[] = "#";
169
170/* Characters which may be used to separate multiple commands on a
171 single line. */
172const char line_separator_chars[] = ";";
173
174/* Characters which are used to indicate an exponent in a floating
175 point number. */
176const char EXP_CHARS[] = "eE";
177
178/* Characters which mean that a number is a floating point constant,
179 as in 0d1.0. */
180const char FLT_CHARS[] = "dD";
5ce8663f 181
5e02f92e 182/* Anything that can start an operand needs to be mentioned here,
ac805826 183 to stop the input scrubber eating whitespace. */
5e02f92e 184const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 185
186/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
187int ppc_cie_data_alignment;
252b5132
RH		 188\f
189/* The target specific pseudo-ops which we support. */
190
191const pseudo_typeS md_pseudo_table[] =
192{
193 /* Pseudo-ops which must be overridden. */
194 { "byte", ppc_byte, 0 },
195
196#ifdef OBJ_XCOFF
197 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
198 legitimately belong in the obj-*.c file. However, XCOFF is based
199 on COFF, and is only implemented for the RS/6000. We just use
200 obj-coff.c, and add what we need here. */
201 { "comm", ppc_comm, 0 },
202 { "lcomm", ppc_comm, 1 },
203 { "bb", ppc_bb, 0 },
204 { "bc", ppc_bc, 0 },
205 { "bf", ppc_bf, 0 },
206 { "bi", ppc_biei, 0 },
207 { "bs", ppc_bs, 0 },
208 { "csect", ppc_csect, 0 },
209 { "data", ppc_section, 'd' },
210 { "eb", ppc_eb, 0 },
211 { "ec", ppc_ec, 0 },
212 { "ef", ppc_ef, 0 },
213 { "ei", ppc_biei, 1 },
214 { "es", ppc_es, 0 },
215 { "extern", ppc_extern, 0 },
216 { "function", ppc_function, 0 },
217 { "lglobl", ppc_lglobl, 0 },
218 { "rename", ppc_rename, 0 },
219 { "section", ppc_named_section, 0 },
220 { "stabx", ppc_stabx, 0 },
221 { "text", ppc_section, 't' },
222 { "toc", ppc_toc, 0 },
223 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 224 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 225 { "word", ppc_xcoff_cons, 1 },
226 { "short", ppc_xcoff_cons, 1 },
227 { "vbyte", ppc_vbyte, 0 },
228#endif
229
230#ifdef OBJ_ELF
0baf16f2
AM		 231 { "llong", ppc_elf_cons, 8 },
232 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 233 { "long", ppc_elf_cons, 4 },
234 { "word", ppc_elf_cons, 2 },
235 { "short", ppc_elf_cons, 2 },
236 { "rdata", ppc_elf_rdata, 0 },
237 { "rodata", ppc_elf_rdata, 0 },
238 { "lcomm", ppc_elf_lcomm, 0 },
239#endif
240
241#ifdef TE_PE
99a814a1 242 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 243 { "previous", ppc_previous, 0 },
244 { "pdata", ppc_pdata, 0 },
245 { "ydata", ppc_ydata, 0 },
246 { "reldata", ppc_reldata, 0 },
247 { "rdata", ppc_rdata, 0 },
248 { "ualong", ppc_ualong, 0 },
249 { "znop", ppc_znop, 0 },
250 { "comm", ppc_pe_comm, 0 },
251 { "lcomm", ppc_pe_comm, 1 },
252 { "section", ppc_pe_section, 0 },
253 { "function", ppc_pe_function,0 },
254 { "tocd", ppc_pe_tocd, 0 },
255#endif
256
0baf16f2 257#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 258 { "tc", ppc_tc, 0 },
0baf16f2
AM		 259 { "machine", ppc_machine, 0 },
260#endif
252b5132
RH		 261
262 { NULL, NULL, 0 }
263};
264
265\f
99a814a1
AM		 266/* Predefined register names if -mregnames (or default for Windows NT).
267 In general, there are lots of them, in an attempt to be compatible
268 with a number of other Windows NT assemblers. */
252b5132
RH		 269
270/* Structure to hold information about predefined registers. */
271struct pd_reg
272 {
273 char *name;
274 int value;
275 };
276
277/* List of registers that are pre-defined:
278
279 Each general register has predefined names of the form:
280 1. r<reg_num> which has the value <reg_num>.
281 2. r.<reg_num> which has the value <reg_num>.
282
252b5132
RH		 283 Each floating point register has predefined names of the form:
284 1. f<reg_num> which has the value <reg_num>.
285 2. f.<reg_num> which has the value <reg_num>.
286
7a899fff
C		 287 Each vector unit register has predefined names of the form:
288 1. v<reg_num> which has the value <reg_num>.
289 2. v.<reg_num> which has the value <reg_num>.
290
252b5132
RH		 291 Each condition register has predefined names of the form:
292 1. cr<reg_num> which has the value <reg_num>.
293 2. cr.<reg_num> which has the value <reg_num>.
294
295 There are individual registers as well:
296 sp or r.sp has the value 1
297 rtoc or r.toc has the value 2
298 fpscr has the value 0
299 xer has the value 1
300 lr has the value 8
301 ctr has the value 9
302 pmr has the value 0
303 dar has the value 19
304 dsisr has the value 18
305 dec has the value 22
306 sdr1 has the value 25
307 srr0 has the value 26
308 srr1 has the value 27
309
81d4177b 310 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 311
312static const struct pd_reg pre_defined_registers[] =
313{
314 { "cr.0", 0 }, /* Condition Registers */
315 { "cr.1", 1 },
316 { "cr.2", 2 },
317 { "cr.3", 3 },
318 { "cr.4", 4 },
319 { "cr.5", 5 },
320 { "cr.6", 6 },
321 { "cr.7", 7 },
322
323 { "cr0", 0 },
324 { "cr1", 1 },
325 { "cr2", 2 },
326 { "cr3", 3 },
327 { "cr4", 4 },
328 { "cr5", 5 },
329 { "cr6", 6 },
330 { "cr7", 7 },
331
332 { "ctr", 9 },
333
334 { "dar", 19 }, /* Data Access Register */
335 { "dec", 22 }, /* Decrementer */
336 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
337
338 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 339 { "f.1", 1 },
340 { "f.10", 10 },
341 { "f.11", 11 },
342 { "f.12", 12 },
343 { "f.13", 13 },
344 { "f.14", 14 },
345 { "f.15", 15 },
346 { "f.16", 16 },
347 { "f.17", 17 },
348 { "f.18", 18 },
349 { "f.19", 19 },
350 { "f.2", 2 },
351 { "f.20", 20 },
352 { "f.21", 21 },
353 { "f.22", 22 },
354 { "f.23", 23 },
355 { "f.24", 24 },
356 { "f.25", 25 },
357 { "f.26", 26 },
358 { "f.27", 27 },
359 { "f.28", 28 },
360 { "f.29", 29 },
361 { "f.3", 3 },
252b5132
RH		 362 { "f.30", 30 },
363 { "f.31", 31 },
81d4177b
KH		 364 { "f.4", 4 },
365 { "f.5", 5 },
366 { "f.6", 6 },
367 { "f.7", 7 },
368 { "f.8", 8 },
369 { "f.9", 9 },
370
371 { "f0", 0 },
372 { "f1", 1 },
373 { "f10", 10 },
374 { "f11", 11 },
375 { "f12", 12 },
376 { "f13", 13 },
377 { "f14", 14 },
378 { "f15", 15 },
379 { "f16", 16 },
380 { "f17", 17 },
381 { "f18", 18 },
382 { "f19", 19 },
383 { "f2", 2 },
384 { "f20", 20 },
385 { "f21", 21 },
386 { "f22", 22 },
387 { "f23", 23 },
388 { "f24", 24 },
389 { "f25", 25 },
390 { "f26", 26 },
391 { "f27", 27 },
392 { "f28", 28 },
393 { "f29", 29 },
394 { "f3", 3 },
252b5132
RH		 395 { "f30", 30 },
396 { "f31", 31 },
81d4177b
KH		 397 { "f4", 4 },
398 { "f5", 5 },
399 { "f6", 6 },
400 { "f7", 7 },
401 { "f8", 8 },
402 { "f9", 9 },
252b5132
RH		 403
404 { "fpscr", 0 },
405
406 { "lr", 8 }, /* Link Register */
407
408 { "pmr", 0 },
409
410 { "r.0", 0 }, /* General Purpose Registers */
411 { "r.1", 1 },
412 { "r.10", 10 },
413 { "r.11", 11 },
414 { "r.12", 12 },
415 { "r.13", 13 },
416 { "r.14", 14 },
417 { "r.15", 15 },
418 { "r.16", 16 },
419 { "r.17", 17 },
420 { "r.18", 18 },
421 { "r.19", 19 },
422 { "r.2", 2 },
423 { "r.20", 20 },
424 { "r.21", 21 },
425 { "r.22", 22 },
426 { "r.23", 23 },
427 { "r.24", 24 },
428 { "r.25", 25 },
429 { "r.26", 26 },
430 { "r.27", 27 },
431 { "r.28", 28 },
432 { "r.29", 29 },
433 { "r.3", 3 },
434 { "r.30", 30 },
435 { "r.31", 31 },
436 { "r.4", 4 },
437 { "r.5", 5 },
438 { "r.6", 6 },
439 { "r.7", 7 },
440 { "r.8", 8 },
441 { "r.9", 9 },
442
443 { "r.sp", 1 }, /* Stack Pointer */
444
445 { "r.toc", 2 }, /* Pointer to the table of contents */
446
447 { "r0", 0 }, /* More general purpose registers */
448 { "r1", 1 },
449 { "r10", 10 },
450 { "r11", 11 },
451 { "r12", 12 },
452 { "r13", 13 },
453 { "r14", 14 },
454 { "r15", 15 },
455 { "r16", 16 },
456 { "r17", 17 },
457 { "r18", 18 },
458 { "r19", 19 },
459 { "r2", 2 },
460 { "r20", 20 },
461 { "r21", 21 },
462 { "r22", 22 },
463 { "r23", 23 },
464 { "r24", 24 },
465 { "r25", 25 },
466 { "r26", 26 },
467 { "r27", 27 },
468 { "r28", 28 },
469 { "r29", 29 },
470 { "r3", 3 },
471 { "r30", 30 },
472 { "r31", 31 },
473 { "r4", 4 },
474 { "r5", 5 },
475 { "r6", 6 },
476 { "r7", 7 },
477 { "r8", 8 },
478 { "r9", 9 },
479
480 { "rtoc", 2 }, /* Table of contents */
481
482 { "sdr1", 25 }, /* Storage Description Register 1 */
483
484 { "sp", 1 },
485
486 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
487 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 488
7a899fff 489 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 490 { "v.1", 1 },
491 { "v.10", 10 },
492 { "v.11", 11 },
493 { "v.12", 12 },
494 { "v.13", 13 },
495 { "v.14", 14 },
496 { "v.15", 15 },
497 { "v.16", 16 },
498 { "v.17", 17 },
499 { "v.18", 18 },
500 { "v.19", 19 },
501 { "v.2", 2 },
502 { "v.20", 20 },
503 { "v.21", 21 },
504 { "v.22", 22 },
505 { "v.23", 23 },
506 { "v.24", 24 },
507 { "v.25", 25 },
508 { "v.26", 26 },
509 { "v.27", 27 },
510 { "v.28", 28 },
511 { "v.29", 29 },
512 { "v.3", 3 },
7a899fff
C		 513 { "v.30", 30 },
514 { "v.31", 31 },
81d4177b
KH		 515 { "v.4", 4 },
516 { "v.5", 5 },
517 { "v.6", 6 },
518 { "v.7", 7 },
519 { "v.8", 8 },
520 { "v.9", 9 },
7a899fff
C		 521
522 { "v0", 0 },
81d4177b
KH		 523 { "v1", 1 },
524 { "v10", 10 },
525 { "v11", 11 },
526 { "v12", 12 },
527 { "v13", 13 },
528 { "v14", 14 },
529 { "v15", 15 },
530 { "v16", 16 },
531 { "v17", 17 },
532 { "v18", 18 },
533 { "v19", 19 },
534 { "v2", 2 },
535 { "v20", 20 },
536 { "v21", 21 },
537 { "v22", 22 },
538 { "v23", 23 },
539 { "v24", 24 },
540 { "v25", 25 },
541 { "v26", 26 },
542 { "v27", 27 },
543 { "v28", 28 },
544 { "v29", 29 },
545 { "v3", 3 },
7a899fff
C		 546 { "v30", 30 },
547 { "v31", 31 },
81d4177b
KH		 548 { "v4", 4 },
549 { "v5", 5 },
550 { "v6", 6 },
551 { "v7", 7 },
552 { "v8", 8 },
7a899fff 553 { "v9", 9 },
252b5132
RH		 554
555 { "xer", 1 },
556
557};
558
bc805888 559#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 560
561/* Given NAME, find the register number associated with that name, return
562 the integer value associated with the given name or -1 on failure. */
563
564static int reg_name_search
565 PARAMS ((const struct pd_reg *, int, const char * name));
566
567static int
568reg_name_search (regs, regcount, name)
569 const struct pd_reg *regs;
570 int regcount;
571 const char *name;
572{
573 int middle, low, high;
574 int cmp;
575
576 low = 0;
577 high = regcount - 1;
578
579 do
580 {
581 middle = (low + high) / 2;
582 cmp = strcasecmp (name, regs[middle].name);
583 if (cmp < 0)
584 high = middle - 1;
585 else if (cmp > 0)
586 low = middle + 1;
587 else
588 return regs[middle].value;
589 }
590 while (low <= high);
591
592 return -1;
593}
594
595/*
99a814a1 596 * Summary of register_name.
252b5132
RH		 597 *
598 * in: Input_line_pointer points to 1st char of operand.
599 *
600 * out: A expressionS.
601 * The operand may have been a register: in this case, X_op == O_register,
602 * X_add_number is set to the register number, and truth is returned.
603 * Input_line_pointer->(next non-blank) char after operand, or is in its
604 * original state.
605 */
606
b34976b6 607static bfd_boolean
252b5132
RH		 608register_name (expressionP)
609 expressionS *expressionP;
610{
611 int reg_number;
612 char *name;
613 char *start;
614 char c;
615
99a814a1 616 /* Find the spelling of the operand. */
252b5132 617 start = name = input_line_pointer;
3882b010 618 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 619 name = ++input_line_pointer;
620
3882b010 621 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 622 return FALSE;
252b5132
RH		 623
624 c = get_symbol_end ();
625 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
626
468cced8
AM		 627 /* Put back the delimiting char. */
628 *input_line_pointer = c;
629
99a814a1 630 /* Look to see if it's in the register table. */
81d4177b 631 if (reg_number >= 0)
252b5132
RH		 632 {
633 expressionP->X_op = O_register;
634 expressionP->X_add_number = reg_number;
81d4177b 635
99a814a1 636 /* Make the rest nice. */
252b5132
RH		 637 expressionP->X_add_symbol = NULL;
638 expressionP->X_op_symbol = NULL;
b34976b6 639 return TRUE;
252b5132 640 }
468cced8
AM		 641
642 /* Reset the line as if we had not done anything. */
643 input_line_pointer = start;
b34976b6 644 return FALSE;
252b5132
RH		 645}
646\f
647/* This function is called for each symbol seen in an expression. It
648 handles the special parsing which PowerPC assemblers are supposed
649 to use for condition codes. */
650
651/* Whether to do the special parsing. */
b34976b6 652static bfd_boolean cr_operand;
252b5132
RH		 653
654/* Names to recognize in a condition code. This table is sorted. */
655static const struct pd_reg cr_names[] =
656{
657 { "cr0", 0 },
658 { "cr1", 1 },
659 { "cr2", 2 },
660 { "cr3", 3 },
661 { "cr4", 4 },
662 { "cr5", 5 },
663 { "cr6", 6 },
664 { "cr7", 7 },
665 { "eq", 2 },
666 { "gt", 1 },
667 { "lt", 0 },
668 { "so", 3 },
669 { "un", 3 }
670};
671
672/* Parsing function. This returns non-zero if it recognized an
673 expression. */
674
675int
676ppc_parse_name (name, expr)
677 const char *name;
678 expressionS *expr;
679{
680 int val;
681
682 if (! cr_operand)
683 return 0;
684
685 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
686 name);
687 if (val < 0)
688 return 0;
689
690 expr->X_op = O_constant;
691 expr->X_add_number = val;
692
693 return 1;
694}
695\f
696/* Local variables. */
697
698/* The type of processor we are assembling for. This is one or more
699 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 700static unsigned long ppc_cpu = 0;
252b5132 701
2b3c4602
AM		 702/* Whether to target xcoff64/elf64. */
703static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 704
252b5132
RH		 705/* Opcode hash table. */
706static struct hash_control *ppc_hash;
707
708/* Macro hash table. */
709static struct hash_control *ppc_macro_hash;
710
711#ifdef OBJ_ELF
99a814a1 712/* What type of shared library support to use. */
5d6f4f16 713static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 714
99a814a1 715/* Flags to set in the elf header. */
252b5132
RH		 716static flagword ppc_flags = 0;
717
718/* Whether this is Solaris or not. */
719#ifdef TARGET_SOLARIS_COMMENT
b34976b6 720#define SOLARIS_P TRUE
252b5132 721#else
b34976b6 722#define SOLARIS_P FALSE
252b5132
RH		 723#endif
724
b34976b6 725static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 726#endif
727
728#ifdef OBJ_XCOFF
729
730/* The RS/6000 assembler uses the .csect pseudo-op to generate code
731 using a bunch of different sections. These assembler sections,
732 however, are all encompassed within the .text or .data sections of
733 the final output file. We handle this by using different
734 subsegments within these main segments. */
735
736/* Next subsegment to allocate within the .text segment. */
737static subsegT ppc_text_subsegment = 2;
738
739/* Linked list of csects in the text section. */
740static symbolS *ppc_text_csects;
741
742/* Next subsegment to allocate within the .data segment. */
743static subsegT ppc_data_subsegment = 2;
744
745/* Linked list of csects in the data section. */
746static symbolS *ppc_data_csects;
747
748/* The current csect. */
749static symbolS *ppc_current_csect;
750
751/* The RS/6000 assembler uses a TOC which holds addresses of functions
752 and variables. Symbols are put in the TOC with the .tc pseudo-op.
753 A special relocation is used when accessing TOC entries. We handle
754 the TOC as a subsegment within the .data segment. We set it up if
755 we see a .toc pseudo-op, and save the csect symbol here. */
756static symbolS *ppc_toc_csect;
757
758/* The first frag in the TOC subsegment. */
759static fragS *ppc_toc_frag;
760
761/* The first frag in the first subsegment after the TOC in the .data
762 segment. NULL if there are no subsegments after the TOC. */
763static fragS *ppc_after_toc_frag;
764
765/* The current static block. */
766static symbolS *ppc_current_block;
767
768/* The COFF debugging section; set by md_begin. This is not the
769 .debug section, but is instead the secret BFD section which will
770 cause BFD to set the section number of a symbol to N_DEBUG. */
771static asection *ppc_coff_debug_section;
772
773#endif /* OBJ_XCOFF */
774
775#ifdef TE_PE
776
777/* Various sections that we need for PE coff support. */
778static segT ydata_section;
779static segT pdata_section;
780static segT reldata_section;
781static segT rdata_section;
782static segT tocdata_section;
783
81d4177b 784/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 785static segT ppc_previous_section;
786static segT ppc_current_section;
787
788#endif /* TE_PE */
789
790#ifdef OBJ_ELF
791symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 792#define PPC_APUINFO_ISEL 0x40
793#define PPC_APUINFO_PMR 0x41
794#define PPC_APUINFO_RFMCI 0x42
795#define PPC_APUINFO_CACHELCK 0x43
796#define PPC_APUINFO_SPE 0x100
797#define PPC_APUINFO_EFS 0x101
798#define PPC_APUINFO_BRLOCK 0x102
799
b34976b6
AM		 800/*
801 * We keep a list of APUinfo
6a0c61b7
EZ		 802 */
803unsigned long *ppc_apuinfo_list;
804unsigned int ppc_apuinfo_num;
805unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 806#endif /* OBJ_ELF */
807\f
808#ifdef OBJ_ELF
15c1449b 809const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 810#else
15c1449b 811const char *const md_shortopts = "um:";
252b5132 812#endif
15c1449b 813const struct option md_longopts[] = {
252b5132
RH		 814 {NULL, no_argument, NULL, 0}
815};
15c1449b 816const size_t md_longopts_size = sizeof (md_longopts);
252b5132 817
69c040df
AM		 818
819/* Handle -m options that set cpu type, and .machine arg. */
820
821static int
822parse_cpu (const char *arg)
823{
824 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
825 (RIOS2). */
826 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
827 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
828 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
829 else if (strcmp (arg, "pwr") == 0)
830 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
831 /* -m601 means to assemble for the PowerPC 601, which includes
832 instructions that are holdovers from the Power. */
833 else if (strcmp (arg, "601") == 0)
834 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
835 | PPC_OPCODE_601 | PPC_OPCODE_32);
836 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
837 PowerPC 603/604. */
838 else if (strcmp (arg, "ppc") == 0
839 || strcmp (arg, "ppc32") == 0
840 || strcmp (arg, "603") == 0
841 || strcmp (arg, "604") == 0)
842 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
843 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
844 else if (strcmp (arg, "403") == 0
845 || strcmp (arg, "405") == 0)
846 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
847 | PPC_OPCODE_403 | PPC_OPCODE_32);
848 else if (strcmp (arg, "440") == 0)
849 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
850 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
851 else if (strcmp (arg, "7400") == 0
852 || strcmp (arg, "7410") == 0
853 || strcmp (arg, "7450") == 0
854 || strcmp (arg, "7455") == 0)
855 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
856 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 857 else if (strcmp (arg, "e300") == 0)
858 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
859 | PPC_OPCODE_E300);
69c040df
AM		 860 else if (strcmp (arg, "altivec") == 0)
861 {
862 if (ppc_cpu == 0)
863 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
864 else
865 ppc_cpu |= PPC_OPCODE_ALTIVEC;
866 }
867 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
868 {
869 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
870 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
871 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
872 | PPC_OPCODE_RFMCI);
873 }
874 else if (strcmp (arg, "spe") == 0)
875 {
876 if (ppc_cpu == 0)
877 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
878 else
879 ppc_cpu |= PPC_OPCODE_SPE;
880 }
881 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
882 620. */
883 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
884 {
885 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
886 }
887 else if (strcmp (arg, "ppc64bridge") == 0)
888 {
889 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
890 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
891 }
892 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
893 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
894 {
895 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
896 }
897 /* -mbooke64 means enable 64-bit BookE support. */
898 else if (strcmp (arg, "booke64") == 0)
899 {
900 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
901 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
902 }
903 else if (strcmp (arg, "power4") == 0)
904 {
905 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
906 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
907 }
b0648eec
AM		 908 else if (strcmp (arg, "power5") == 0)
909 {
910 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
911 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
912 | PPC_OPCODE_POWER5);
913 }
9622b051
AM		 914 else if (strcmp (arg, "power6") == 0)
915 {
916 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
917 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
918 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
919 }
ede602d7
AM		 920 else if (strcmp (arg, "cell") == 0)
921 {
922 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
923 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
924 | PPC_OPCODE_CELL);
925 }
69c040df
AM		 926 /* -mcom means assemble for the common intersection between Power
927 and PowerPC. At present, we just allow the union, rather
928 than the intersection. */
929 else if (strcmp (arg, "com") == 0)
930 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
931 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
932 else if (strcmp (arg, "any") == 0)
933 ppc_cpu |= PPC_OPCODE_ANY;
934 else
935 return 0;
936
937 return 1;
938}
939
252b5132
RH		 940int
941md_parse_option (c, arg)
942 int c;
943 char *arg;
944{
945 switch (c)
946 {
947 case 'u':
948 /* -u means that any undefined symbols should be treated as
949 external, which is the default for gas anyhow. */
950 break;
951
952#ifdef OBJ_ELF
953 case 'l':
954 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 955 sake, recognize -be also. */
252b5132
RH		 956 if (strcmp (arg, "e") == 0)
957 {
958 target_big_endian = 0;
959 set_target_endian = 1;
960 }
961 else
962 return 0;
963
964 break;
965
966 case 'b':
967 if (strcmp (arg, "e") == 0)
968 {
969 target_big_endian = 1;
970 set_target_endian = 1;
971 }
972 else
973 return 0;
974
975 break;
976
977 case 'K':
99a814a1 978 /* Recognize -K PIC. */
252b5132
RH		 979 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
980 {
981 shlib = SHLIB_PIC;
982 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
983 }
984 else
985 return 0;
986
987 break;
988#endif
989
7f6d05e8
CP		 990 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
991 case 'a':
992 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 993 {
994#ifdef BFD64
995 ppc_obj64 = 1;
996#else
997 as_fatal (_("%s unsupported"), "-a64");
998#endif
999 }
7f6d05e8 1000 else if (strcmp (arg, "32") == 0)
2b3c4602 1001 ppc_obj64 = 0;
7f6d05e8
CP		 1002 else
1003 return 0;
1004 break;
81d4177b 1005
252b5132 1006 case 'm':
69c040df
AM		 1007 if (parse_cpu (arg))
1008 ;
252b5132
RH		 1009
1010 else if (strcmp (arg, "regnames") == 0)
b34976b6 1011 reg_names_p = TRUE;
252b5132
RH		 1012
1013 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1014 reg_names_p = FALSE;
252b5132
RH		 1015
1016#ifdef OBJ_ELF
99a814a1
AM		 1017 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1018 that require relocation. */
252b5132
RH		 1019 else if (strcmp (arg, "relocatable") == 0)
1020 {
5d6f4f16 1021 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1022 ppc_flags |= EF_PPC_RELOCATABLE;
1023 }
1024
1025 else if (strcmp (arg, "relocatable-lib") == 0)
1026 {
5d6f4f16 1027 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1028 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1029 }
1030
99a814a1 1031 /* -memb, set embedded bit. */
252b5132
RH		 1032 else if (strcmp (arg, "emb") == 0)
1033 ppc_flags |= EF_PPC_EMB;
1034
99a814a1
AM		 1035 /* -mlittle/-mbig set the endianess. */
1036 else if (strcmp (arg, "little") == 0
1037 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1038 {
1039 target_big_endian = 0;
1040 set_target_endian = 1;
1041 }
1042
1043 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1044 {
1045 target_big_endian = 1;
1046 set_target_endian = 1;
1047 }
1048
1049 else if (strcmp (arg, "solaris") == 0)
1050 {
b34976b6 1051 msolaris = TRUE;
252b5132
RH		 1052 ppc_comment_chars = ppc_solaris_comment_chars;
1053 }
1054
1055 else if (strcmp (arg, "no-solaris") == 0)
1056 {
b34976b6 1057 msolaris = FALSE;
252b5132
RH		 1058 ppc_comment_chars = ppc_eabi_comment_chars;
1059 }
1060#endif
1061 else
1062 {
1063 as_bad (_("invalid switch -m%s"), arg);
1064 return 0;
1065 }
1066 break;
1067
1068#ifdef OBJ_ELF
1069 /* -V: SVR4 argument to print version ID. */
1070 case 'V':
1071 print_version_id ();
1072 break;
1073
1074 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1075 should be emitted or not. FIXME: Not implemented. */
1076 case 'Q':
1077 break;
1078
1079 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1080 rather than .stabs.excl, which is ignored by the linker.
1081 FIXME: Not implemented. */
1082 case 's':
1083 if (arg)
1084 return 0;
1085
1086 break;
1087#endif
1088
1089 default:
1090 return 0;
1091 }
1092
1093 return 1;
1094}
1095
1096void
1097md_show_usage (stream)
1098 FILE *stream;
1099{
bc805888 1100 fprintf (stream, _("\
252b5132 1101PowerPC options:\n\
df12615d
AM		 1102-a32 generate ELF32/XCOFF32\n\
1103-a64 generate ELF64/XCOFF64\n\
252b5132 1104-u ignored\n\
23e1d84c
AM		 1105-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1106-mpwr generate code for POWER (RIOS1)\n\
1107-m601 generate code for PowerPC 601\n\
418c1742 1108-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1109 generate code for PowerPC 603/604\n\
df12615d 1110-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1111-m440 generate code for PowerPC 440\n\
f5c120c5 1112-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1113 generate code For PowerPC 7400/7410/7450/7455\n"));
1114 fprintf (stream, _("\
23e1d84c 1115-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1116-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1117-mbooke64 generate code for 64-bit PowerPC BookE\n\
1118-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1119-mpower4 generate code for Power4 architecture\n\
b0648eec 1120-mpower5 generate code for Power5 architecture\n\
9622b051 1121-mpower6 generate code for Power6 architecture\n\
ede602d7 1122-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1123-mcom generate code Power/PowerPC common instructions\n\
df12615d 1124-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1125 fprintf (stream, _("\
df12615d 1126-maltivec generate code for AltiVec\n\
36ae0db3 1127-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1128-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1129-mspe generate code for Motorola SPE instructions\n\
1130-mregnames Allow symbolic names for registers\n\
1131-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1132#ifdef OBJ_ELF
bc805888 1133 fprintf (stream, _("\
252b5132
RH		 1134-mrelocatable support for GCC's -mrelocatble option\n\
1135-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1136-memb set PPC_EMB bit in ELF flags\n\
df12615d 1137-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1138 generate code for a little endian machine\n\
df12615d
AM		 1139-mbig, -mbig-endian, -b, -be\n\
1140 generate code for a big endian machine\n\
252b5132
RH		 1141-msolaris generate code for Solaris\n\
1142-mno-solaris do not generate code for Solaris\n\
1143-V print assembler version number\n\
1144-Qy, -Qn ignored\n"));
1145#endif
1146}
1147\f
1148/* Set ppc_cpu if it is not already set. */
1149
1150static void
1151ppc_set_cpu ()
1152{
1153 const char *default_os = TARGET_OS;
1154 const char *default_cpu = TARGET_CPU;
1155
3c9030c1 1156 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1157 {
2a98c3a6 1158 if (ppc_obj64)
3c9030c1 1159 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1160 else if (strncmp (default_os, "aix", 3) == 0
1161 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1162 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1163 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1164 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1165 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1166 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1167 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1168 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1169 else
99a814a1
AM		 1170 as_fatal (_("Unknown default cpu = %s, os = %s"),
1171 default_cpu, default_os);
252b5132
RH		 1172 }
1173}
1174
9232bbb0
AM		 1175/* Figure out the BFD architecture to use. This function and ppc_mach
1176 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1177
1178enum bfd_architecture
1179ppc_arch ()
1180{
1181 const char *default_cpu = TARGET_CPU;
1182 ppc_set_cpu ();
1183
1184 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1185 return bfd_arch_powerpc;
1186 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1187 return bfd_arch_rs6000;
1188 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1189 {
1190 if (strcmp (default_cpu, "rs6000") == 0)
1191 return bfd_arch_rs6000;
0baf16f2 1192 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1193 return bfd_arch_powerpc;
1194 }
1195
1196 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1197 return bfd_arch_unknown;
1198}
1199
7f6d05e8
CP		 1200unsigned long
1201ppc_mach ()
1202{
2a98c3a6
AM		 1203 if (ppc_obj64)
1204 return bfd_mach_ppc64;
1205 else if (ppc_arch () == bfd_arch_rs6000)
1206 return bfd_mach_rs6k;
1207 else
1208 return bfd_mach_ppc;
7f6d05e8
CP		 1209}
1210
81d4177b 1211extern char*
99a814a1 1212ppc_target_format ()
7f6d05e8
CP		 1213{
1214#ifdef OBJ_COFF
1215#ifdef TE_PE
99a814a1 1216 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1217#elif TE_POWERMAC
0baf16f2 1218 return "xcoff-powermac";
7f6d05e8 1219#else
eb1e0e80 1220# ifdef TE_AIX5
2b3c4602 1221 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1222# else
2b3c4602 1223 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1224# endif
7f6d05e8 1225#endif
7f6d05e8
CP		 1226#endif
1227#ifdef OBJ_ELF
9d8504b1
PB		 1228# ifdef TE_VXWORKS
1229 return "elf32-powerpc-vxworks";
1230# else
0baf16f2 1231 return (target_big_endian
2b3c4602
AM		 1232 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1233 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1234# endif
7f6d05e8
CP		 1235#endif
1236}
1237
69c040df
AM		 1238/* Insert opcodes and macros into hash tables. Called at startup and
1239 for .cpu pseudo. */
252b5132 1240
69c040df
AM		 1241static void
1242ppc_setup_opcodes (void)
252b5132
RH		 1243{
1244 register const struct powerpc_opcode *op;
1245 const struct powerpc_opcode *op_end;
1246 const struct powerpc_macro *macro;
1247 const struct powerpc_macro *macro_end;
b84bf58a 1248 bfd_boolean bad_insn = FALSE;
252b5132 1249
69c040df
AM		 1250 if (ppc_hash != NULL)
1251 hash_die (ppc_hash);
1252 if (ppc_macro_hash != NULL)
1253 hash_die (ppc_macro_hash);
252b5132
RH		 1254
1255 /* Insert the opcodes into a hash table. */
1256 ppc_hash = hash_new ();
1257
c43a438d 1258 if (ENABLE_CHECKING)
b84bf58a 1259 {
c43a438d 1260 unsigned int i;
b84bf58a 1261
c43a438d
AM		 1262 /* Check operand masks. Code here and in the disassembler assumes
1263 all the 1's in the mask are contiguous. */
1264 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1265 {
c43a438d
AM		 1266 unsigned long mask = powerpc_operands[i].bitm;
1267 unsigned long right_bit;
1268 unsigned int j;
1269
1270 right_bit = mask & -mask;
1271 mask += right_bit;
1272 right_bit = mask & -mask;
1273 if (mask != right_bit)
1274 {
1275 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1276 bad_insn = TRUE;
1277 }
1278 for (j = i + 1; j < num_powerpc_operands; ++j)
1279 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1280 sizeof (powerpc_operands[0])) == 0)
1281 {
1282 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1283 j, i);
1284 bad_insn = TRUE;
1285 }
b84bf58a
AM		 1286 }
1287 }
1288
252b5132
RH		 1289 op_end = powerpc_opcodes + powerpc_num_opcodes;
1290 for (op = powerpc_opcodes; op < op_end; op++)
1291 {
c43a438d 1292 if (ENABLE_CHECKING)
b84bf58a 1293 {
c43a438d
AM		 1294 const unsigned char *o;
1295 unsigned long omask = op->mask;
1296
1297 /* The mask had better not trim off opcode bits. */
1298 if ((op->opcode & omask) != op->opcode)
1299 {
1300 as_bad (_("mask trims opcode bits for %s"),
1301 op->name);
1302 bad_insn = TRUE;
1303 }
1304
1305 /* The operands must not overlap the opcode or each other. */
1306 for (o = op->operands; *o; ++o)
1307 if (*o >= num_powerpc_operands)
1308 {
1309 as_bad (_("operand index error for %s"),
1310 op->name);
1311 bad_insn = TRUE;
1312 }
1313 else
b84bf58a 1314 {
c43a438d
AM		 1315 const struct powerpc_operand *operand = &powerpc_operands[*o];
1316 if (operand->shift >= 0)
b84bf58a 1317 {
c43a438d
AM		 1318 unsigned long mask = operand->bitm << operand->shift;
1319 if (omask & mask)
1320 {
1321 as_bad (_("operand %d overlap in %s"),
1322 (int) (o - op->operands), op->name);
1323 bad_insn = TRUE;
1324 }
1325 omask |= mask;
b84bf58a 1326 }
b84bf58a 1327 }
c43a438d 1328 }
252b5132 1329
2b3c4602 1330 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1331 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1332 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1333 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1334 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1335 /* Certain instructions (eg: extsw) do not exist in the
1336 32-bit BookE instruction set, but they do exist in the
1337 64-bit BookE instruction set, and other PPC instruction
1338 sets. Check to see if the opcode has the BOOKE64 flag set.
1339 If it does make sure that the target CPU is not the BookE32. */
1340 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1341 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1342 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1343 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1344 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1345 == (ppc_cpu & PPC_OPCODE_POWER4)))
1346 && ((op->flags & PPC_OPCODE_POWER5) == 0
1347 || ((op->flags & PPC_OPCODE_POWER5)
9622b051
AM		 1348 == (ppc_cpu & PPC_OPCODE_POWER5)))
1349 && ((op->flags & PPC_OPCODE_POWER6) == 0
1350 || ((op->flags & PPC_OPCODE_POWER6)
1351 == (ppc_cpu & PPC_OPCODE_POWER6))))
252b5132
RH		 1352 {
1353 const char *retval;
1354
1355 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1356 if (retval != NULL)
252b5132 1357 {
99a814a1 1358 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1359 if ((ppc_cpu & PPC_OPCODE_601) != 0
1360 && (op->flags & PPC_OPCODE_POWER) != 0)
1361 continue;
1362
b84bf58a 1363 as_bad (_("duplicate instruction %s"),
99a814a1 1364 op->name);
b84bf58a 1365 bad_insn = TRUE;
252b5132
RH		 1366 }
1367 }
1368 }
1369
3c9030c1
AM		 1370 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1371 for (op = powerpc_opcodes; op < op_end; op++)
1372 hash_insert (ppc_hash, op->name, (PTR) op);
1373
252b5132
RH		 1374 /* Insert the macros into a hash table. */
1375 ppc_macro_hash = hash_new ();
1376
1377 macro_end = powerpc_macros + powerpc_num_macros;
1378 for (macro = powerpc_macros; macro < macro_end; macro++)
1379 {
1380 if ((macro->flags & ppc_cpu) != 0)
1381 {
1382 const char *retval;
1383
1384 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1385 if (retval != (const char *) NULL)
1386 {
b84bf58a
AM		 1387 as_bad (_("duplicate macro %s"), macro->name);
1388 bad_insn = TRUE;
252b5132
RH		 1389 }
1390 }
1391 }
1392
b84bf58a 1393 if (bad_insn)
252b5132 1394 abort ();
69c040df
AM		 1395}
1396
1397/* This function is called when the assembler starts up. It is called
1398 after the options have been parsed and the output file has been
1399 opened. */
1400
1401void
1402md_begin ()
1403{
1404 ppc_set_cpu ();
1405
1406 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1407
1408#ifdef OBJ_ELF
1409 /* Set the ELF flags if desired. */
1410 if (ppc_flags && !msolaris)
1411 bfd_set_private_flags (stdoutput, ppc_flags);
1412#endif
1413
1414 ppc_setup_opcodes ();
252b5132 1415
67c1ffbe 1416 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1417 by the user. */
252b5132
RH		 1418 if (!set_target_endian)
1419 {
1420 set_target_endian = 1;
1421 target_big_endian = PPC_BIG_ENDIAN;
1422 }
1423
1424#ifdef OBJ_XCOFF
1425 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1426
1427 /* Create dummy symbols to serve as initial csects. This forces the
1428 text csects to precede the data csects. These symbols will not
1429 be output. */
1430 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1431 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1432 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1433 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1434#endif
1435
1436#ifdef TE_PE
1437
1438 ppc_current_section = text_section;
81d4177b 1439 ppc_previous_section = 0;
252b5132
RH		 1440
1441#endif
1442}
1443
6a0c61b7
EZ		 1444void
1445ppc_cleanup ()
1446{
dc1d03fc 1447#ifdef OBJ_ELF
6a0c61b7
EZ		 1448 if (ppc_apuinfo_list == NULL)
1449 return;
1450
1451 /* Ok, so write the section info out. We have this layout:
1452
1453 byte data what
1454 ---- ---- ----
1455 0 8 length of "APUinfo\0"
1456 4 (n*4) number of APU's (4 bytes each)
1457 8 2 note type 2
1458 12 "APUinfo\0" name
1459 20 APU#1 first APU's info
1460 24 APU#2 second APU's info
1461 ... ...
1462 */
1463 {
1464 char *p;
1465 asection *seg = now_seg;
1466 subsegT subseg = now_subseg;
1467 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1468 unsigned int i;
6a0c61b7
EZ		 1469
1470 /* Create the .PPC.EMB.apuinfo section. */
1471 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1472 bfd_set_section_flags (stdoutput,
1473 apuinfo_secp,
e1a9cb8e 1474 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1475
1476 p = frag_more (4);
1477 md_number_to_chars (p, (valueT) 8, 4);
1478
1479 p = frag_more (4);
e98d298c 1480 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1481
1482 p = frag_more (4);
1483 md_number_to_chars (p, (valueT) 2, 4);
1484
1485 p = frag_more (8);
1486 strcpy (p, "APUinfo");
1487
1488 for (i = 0; i < ppc_apuinfo_num; i++)
1489 {
b34976b6
AM		 1490 p = frag_more (4);
1491 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1492 }
1493
1494 frag_align (2, 0, 0);
1495
1496 /* We probably can't restore the current segment, for there likely
1497 isn't one yet... */
1498 if (seg && subseg)
1499 subseg_set (seg, subseg);
1500 }
dc1d03fc 1501#endif
6a0c61b7
EZ		 1502}
1503
252b5132
RH		 1504/* Insert an operand value into an instruction. */
1505
1506static unsigned long
a1867a27
AM		 1507ppc_insert_operand (unsigned long insn,
1508 const struct powerpc_operand *operand,
1509 offsetT val,
1510 char *file,
1511 unsigned int line)
252b5132 1512{
b84bf58a 1513 long min, max, right;
eb42fac1 1514
b84bf58a
AM		 1515 max = operand->bitm;
1516 right = max & -max;
1517 min = 0;
1518
1519 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1520 {
b84bf58a 1521 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1522 max = (max >> 1) & -right;
1523 min = ~max & -right;
b84bf58a 1524 }
252b5132 1525
b84bf58a 1526 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1527 max++;
252b5132 1528
b84bf58a 1529 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1530 {
1531 long tmp = min;
1532 min = -max;
1533 max = -tmp;
1534 }
b84bf58a 1535
a1867a27
AM		 1536 if (min <= max)
1537 {
1538 /* Some people write constants with the sign extension done by
1539 hand but only up to 32 bits. This shouldn't really be valid,
1540 but, to permit this code to assemble on a 64-bit host, we
1541 sign extend the 32-bit value to 64 bits if so doing makes the
1542 value valid. */
1543 if (val > max
1544 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1545 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1546 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1547 val = val - 0x80000000 - 0x80000000;
1548
1549 /* Similarly, people write expressions like ~(1<<15), and expect
1550 this to be OK for a 32-bit unsigned value. */
1551 else if (val < min
1552 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1553 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1554 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1555 val = val + 0x80000000 + 0x80000000;
1556
1557 else if (val < min
1558 || val > max
1559 || (val & (right - 1)) != 0)
1560 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1561 }
b84bf58a 1562
252b5132
RH		 1563 if (operand->insert)
1564 {
1565 const char *errmsg;
1566
1567 errmsg = NULL;
2b3c4602 1568 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1569 if (errmsg != (const char *) NULL)
0baf16f2 1570 as_bad_where (file, line, errmsg);
252b5132
RH		 1571 }
1572 else
b84bf58a 1573 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1574
1575 return insn;
1576}
1577
1578\f
1579#ifdef OBJ_ELF
1580/* Parse @got, etc. and return the desired relocation. */
1581static bfd_reloc_code_real_type
1582ppc_elf_suffix (str_p, exp_p)
1583 char **str_p;
1584 expressionS *exp_p;
1585{
1586 struct map_bfd {
1587 char *string;
b7d7dc63
AM		 1588 unsigned int length : 8;
1589 unsigned int valid32 : 1;
1590 unsigned int valid64 : 1;
1591 unsigned int reloc;
252b5132
RH		 1592 };
1593
1594 char ident[20];
1595 char *str = *str_p;
1596 char *str2;
1597 int ch;
1598 int len;
15c1449b 1599 const struct map_bfd *ptr;
252b5132 1600
b7d7dc63
AM		 1601#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1602#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1603#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1604
15c1449b 1605 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1606 MAP ("l", BFD_RELOC_LO16),
1607 MAP ("h", BFD_RELOC_HI16),
1608 MAP ("ha", BFD_RELOC_HI16_S),
1609 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1610 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1611 MAP ("got", BFD_RELOC_16_GOTOFF),
1612 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1613 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1614 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1615 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1616 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1617 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1618 MAP ("copy", BFD_RELOC_PPC_COPY),
1619 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1620 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1621 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1622 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1623 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1624 MAP ("tls", BFD_RELOC_PPC_TLS),
1625 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1626 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1627 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1628 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1629 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1630 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1631 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1632 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1633 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1634 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1635 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1636 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1637 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1638 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1639 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1640 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1641 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1642 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1643 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1644 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1645 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1646 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1647 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1648 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1649 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1650 MAP32 ("fixup", BFD_RELOC_CTOR),
1651 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1652 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1653 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1654 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1655 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1656 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1657 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1658 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1659 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1660 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1661 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1662 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1663 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1664 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1665 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1666 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1667 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1668 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1669 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1670 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1671 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1672 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1673 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1674 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1675 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1676 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1677 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1678 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1679 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1680 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1681 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1682 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1683 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1684 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1685 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1686 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1687 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1688 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1689 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1690 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1691 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1692 };
1693
1694 if (*str++ != '@')
1695 return BFD_RELOC_UNUSED;
1696
1697 for (ch = *str, str2 = ident;
1698 (str2 < ident + sizeof (ident) - 1
3882b010 1699 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1700 ch = *++str)
1701 {
3882b010 1702 *str2++ = TOLOWER (ch);
252b5132
RH		 1703 }
1704
1705 *str2 = '\0';
1706 len = str2 - ident;
1707
1708 ch = ident[0];
1709 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1710 if (ch == ptr->string[0]
1711 && len == ptr->length
b7d7dc63
AM		 1712 && memcmp (ident, ptr->string, ptr->length) == 0
1713 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1714 {
15c1449b
AM		 1715 int reloc = ptr->reloc;
1716
cdba85ec 1717 if (!ppc_obj64)
5f6db75a
AM		 1718 if (exp_p->X_add_number != 0
1719 && (reloc == (int) BFD_RELOC_16_GOTOFF
1720 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1721 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1722 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1723 as_warn (_("identifier+constant@got means identifier@got+constant"));
1724
1725 /* Now check for identifier@suffix+constant. */
1726 if (*str == '-' || *str == '+')
252b5132 1727 {
5f6db75a
AM		 1728 char *orig_line = input_line_pointer;
1729 expressionS new_exp;
1730
1731 input_line_pointer = str;
1732 expression (&new_exp);
1733 if (new_exp.X_op == O_constant)
252b5132 1734 {
5f6db75a
AM		 1735 exp_p->X_add_number += new_exp.X_add_number;
1736 str = input_line_pointer;
252b5132 1737 }
5f6db75a
AM		 1738
1739 if (&input_line_pointer != str_p)
1740 input_line_pointer = orig_line;
252b5132 1741 }
252b5132 1742 *str_p = str;
0baf16f2 1743
2b3c4602 1744 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1745 && exp_p->X_op == O_symbol
1746 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1747 {
9f2b53d7
AM		 1748 /* Change the symbol so that the dummy .TOC. symbol can be
1749 omitted from the object file. */
0baf16f2
AM		 1750 exp_p->X_add_symbol = &abs_symbol;
1751 }
1752
15c1449b 1753 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1754 }
1755
1756 return BFD_RELOC_UNUSED;
1757}
1758
99a814a1
AM		 1759/* Like normal .long/.short/.word, except support @got, etc.
1760 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1761static void
1762ppc_elf_cons (nbytes)
0baf16f2 1763 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1764{
1765 expressionS exp;
1766 bfd_reloc_code_real_type reloc;
1767
1768 if (is_it_end_of_statement ())
1769 {
1770 demand_empty_rest_of_line ();
1771 return;
1772 }
1773
1774 do
1775 {
1776 expression (&exp);
1777 if (exp.X_op == O_symbol
1778 && *input_line_pointer == '@'
99a814a1
AM		 1779 && (reloc = ppc_elf_suffix (&input_line_pointer,
1780 &exp)) != BFD_RELOC_UNUSED)
252b5132 1781 {
99a814a1
AM		 1782 reloc_howto_type *reloc_howto;
1783 int size;
1784
1785 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1786 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1787
1788 if (size > nbytes)
0baf16f2
AM		 1789 {
1790 as_bad (_("%s relocations do not fit in %d bytes\n"),
1791 reloc_howto->name, nbytes);
1792 }
252b5132
RH		 1793 else
1794 {
0baf16f2
AM		 1795 char *p;
1796 int offset;
252b5132 1797
0baf16f2
AM		 1798 p = frag_more (nbytes);
1799 offset = 0;
1800 if (target_big_endian)
1801 offset = nbytes - size;
99a814a1
AM		 1802 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1803 &exp, 0, reloc);
252b5132
RH		 1804 }
1805 }
1806 else
1807 emit_expr (&exp, (unsigned int) nbytes);
1808 }
1809 while (*input_line_pointer++ == ',');
1810
99a814a1
AM		 1811 /* Put terminator back into stream. */
1812 input_line_pointer--;
252b5132
RH		 1813 demand_empty_rest_of_line ();
1814}
1815
1816/* Solaris pseduo op to change to the .rodata section. */
1817static void
1818ppc_elf_rdata (xxx)
1819 int xxx;
1820{
1821 char *save_line = input_line_pointer;
1822 static char section[] = ".rodata\n";
1823
99a814a1 1824 /* Just pretend this is .section .rodata */
252b5132
RH		 1825 input_line_pointer = section;
1826 obj_elf_section (xxx);
1827
1828 input_line_pointer = save_line;
1829}
1830
99a814a1 1831/* Pseudo op to make file scope bss items. */
252b5132 1832static void
99a814a1 1833ppc_elf_lcomm (xxx)
92161534 1834 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1835{
1836 register char *name;
1837 register char c;
1838 register char *p;
1839 offsetT size;
1840 register symbolS *symbolP;
1841 offsetT align;
1842 segT old_sec;
1843 int old_subsec;
1844 char *pfrag;
1845 int align2;
1846
1847 name = input_line_pointer;
1848 c = get_symbol_end ();
1849
99a814a1 1850 /* just after name is now '\0'. */
252b5132
RH		 1851 p = input_line_pointer;
1852 *p = c;
1853 SKIP_WHITESPACE ();
1854 if (*input_line_pointer != ',')
1855 {
1856 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1857 ignore_rest_of_line ();
1858 return;
1859 }
1860
1861 input_line_pointer++; /* skip ',' */
1862 if ((size = get_absolute_expression ()) < 0)
1863 {
1864 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1865 ignore_rest_of_line ();
1866 return;
1867 }
1868
1869 /* The third argument to .lcomm is the alignment. */
1870 if (*input_line_pointer != ',')
1871 align = 8;
1872 else
1873 {
1874 ++input_line_pointer;
1875 align = get_absolute_expression ();
1876 if (align <= 0)
1877 {
1878 as_warn (_("ignoring bad alignment"));
1879 align = 8;
1880 }
1881 }
1882
1883 *p = 0;
1884 symbolP = symbol_find_or_make (name);
1885 *p = c;
1886
1887 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1888 {
1889 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1890 S_GET_NAME (symbolP));
1891 ignore_rest_of_line ();
1892 return;
1893 }
1894
1895 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1896 {
1897 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1898 S_GET_NAME (symbolP),
1899 (long) S_GET_VALUE (symbolP),
1900 (long) size);
1901
1902 ignore_rest_of_line ();
1903 return;
1904 }
1905
99a814a1 1906 /* Allocate_bss. */
252b5132
RH		 1907 old_sec = now_seg;
1908 old_subsec = now_subseg;
1909 if (align)
1910 {
99a814a1 1911 /* Convert to a power of 2 alignment. */
252b5132
RH		 1912 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1913 if (align != 1)
1914 {
1915 as_bad (_("Common alignment not a power of 2"));
1916 ignore_rest_of_line ();
1917 return;
1918 }
1919 }
1920 else
1921 align2 = 0;
1922
1923 record_alignment (bss_section, align2);
1924 subseg_set (bss_section, 0);
1925 if (align2)
1926 frag_align (align2, 0, 0);
1927 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1928 symbol_get_frag (symbolP)->fr_symbol = 0;
1929 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1930 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1931 (char *) 0);
1932 *pfrag = 0;
1933 S_SET_SIZE (symbolP, size);
1934 S_SET_SEGMENT (symbolP, bss_section);
1935 subseg_set (old_sec, old_subsec);
1936 demand_empty_rest_of_line ();
1937}
1938
1939/* Validate any relocations emitted for -mrelocatable, possibly adding
1940 fixups for word relocations in writable segments, so we can adjust
1941 them at runtime. */
1942static void
1943ppc_elf_validate_fix (fixp, seg)
1944 fixS *fixp;
1945 segT seg;
1946{
1947 if (fixp->fx_done || fixp->fx_pcrel)
1948 return;
1949
1950 switch (shlib)
1951 {
1952 case SHLIB_NONE:
1953 case SHLIB_PIC:
1954 return;
1955
5d6f4f16 1956 case SHLIB_MRELOCATABLE:
252b5132
RH		 1957 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1958 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1959 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1960 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1961 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1962 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1963 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1964 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1965 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1966 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1967 && strcmp (segment_name (seg), ".got2") != 0
1968 && strcmp (segment_name (seg), ".dtors") != 0
1969 && strcmp (segment_name (seg), ".ctors") != 0
1970 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1971 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1972 && strcmp (segment_name (seg), ".eh_frame") != 0
1973 && strcmp (segment_name (seg), ".ex_shared") != 0)
1974 {
1975 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1976 || fixp->fx_r_type != BFD_RELOC_CTOR)
1977 {
1978 as_bad_where (fixp->fx_file, fixp->fx_line,
1979 _("Relocation cannot be done when using -mrelocatable"));
1980 }
1981 }
1982 return;
1983 }
1984}
0baf16f2 1985
7e8d4ab4
AM		 1986/* Prevent elf_frob_file_before_adjust removing a weak undefined
1987 function descriptor sym if the corresponding code sym is used. */
1988
1989void
1990ppc_frob_file_before_adjust ()
0baf16f2 1991{
7e8d4ab4 1992 symbolS *symp;
9232bbb0 1993 asection *toc;
0baf16f2 1994
7e8d4ab4
AM		 1995 if (!ppc_obj64)
1996 return;
1997
1998 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1999 {
7e8d4ab4
AM		 2000 const char *name;
2001 char *dotname;
2002 symbolS *dotsym;
2003 size_t len;
2004
2005 name = S_GET_NAME (symp);
2006 if (name[0] == '.')
2007 continue;
2008
2009 if (! S_IS_WEAK (symp)
2010 || S_IS_DEFINED (symp))
2011 continue;
2012
2013 len = strlen (name) + 1;
2014 dotname = xmalloc (len + 1);
2015 dotname[0] = '.';
2016 memcpy (dotname + 1, name, len);
461b725f 2017 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2018 free (dotname);
2019 if (dotsym != NULL && (symbol_used_p (dotsym)
2020 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2021 symbol_mark_used (symp);
2022
0baf16f2
AM		 2023 }
2024
9232bbb0
AM		 2025 toc = bfd_get_section_by_name (stdoutput, ".toc");
2026 if (toc != NULL
2027 && bfd_section_size (stdoutput, toc) > 0x10000)
2028 as_warn (_("TOC section size exceeds 64k"));
2029
7e8d4ab4
AM		 2030 /* Don't emit .TOC. symbol. */
2031 symp = symbol_find (".TOC.");
2032 if (symp != NULL)
2033 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2034}
252b5132
RH		 2035#endif /* OBJ_ELF */
2036\f
2037#ifdef TE_PE
2038
2039/*
99a814a1 2040 * Summary of parse_toc_entry.
252b5132
RH		 2041 *
2042 * in: Input_line_pointer points to the '[' in one of:
2043 *
2044 * [toc] [tocv] [toc32] [toc64]
2045 *
2046 * Anything else is an error of one kind or another.
2047 *
81d4177b 2048 * out:
252b5132
RH		 2049 * return value: success or failure
2050 * toc_kind: kind of toc reference
2051 * input_line_pointer:
2052 * success: first char after the ']'
2053 * failure: unchanged
2054 *
2055 * settings:
2056 *
2057 * [toc] - rv == success, toc_kind = default_toc
2058 * [tocv] - rv == success, toc_kind = data_in_toc
2059 * [toc32] - rv == success, toc_kind = must_be_32
2060 * [toc64] - rv == success, toc_kind = must_be_64
2061 *
2062 */
2063
81d4177b
KH		 2064enum toc_size_qualifier
2065{
252b5132
RH		 2066 default_toc, /* The toc cell constructed should be the system default size */
2067 data_in_toc, /* This is a direct reference to a toc cell */
2068 must_be_32, /* The toc cell constructed must be 32 bits wide */
2069 must_be_64 /* The toc cell constructed must be 64 bits wide */
2070};
2071
2072static int
99a814a1 2073parse_toc_entry (toc_kind)
252b5132
RH		 2074 enum toc_size_qualifier *toc_kind;
2075{
2076 char *start;
2077 char *toc_spec;
2078 char c;
2079 enum toc_size_qualifier t;
2080
99a814a1 2081 /* Save the input_line_pointer. */
252b5132
RH		 2082 start = input_line_pointer;
2083
99a814a1 2084 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2085 ++input_line_pointer;
2086 SKIP_WHITESPACE ();
81d4177b 2087
99a814a1 2088 /* Find the spelling of the operand. */
252b5132
RH		 2089 toc_spec = input_line_pointer;
2090 c = get_symbol_end ();
2091
99a814a1 2092 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2093 {
2094 t = default_toc;
2095 }
99a814a1 2096 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2097 {
2098 t = data_in_toc;
2099 }
99a814a1 2100 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2101 {
2102 t = must_be_32;
2103 }
99a814a1 2104 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2105 {
2106 t = must_be_64;
2107 }
2108 else
2109 {
2110 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2111 *input_line_pointer = c;
2112 input_line_pointer = start;
252b5132
RH		 2113 return 0;
2114 }
2115
99a814a1
AM		 2116 /* Now find the ']'. */
2117 *input_line_pointer = c;
252b5132 2118
81d4177b
KH		 2119 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2120 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2121
2122 if (c != ']')
2123 {
2124 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2125 input_line_pointer = start;
252b5132
RH		 2126 return 0;
2127 }
2128
99a814a1 2129 *toc_kind = t;
252b5132
RH		 2130 return 1;
2131}
2132#endif
2133\f
2134
dc1d03fc 2135#ifdef OBJ_ELF
6a0c61b7
EZ		 2136#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2137static void
dc1d03fc 2138ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2139 unsigned int apu, version;
2140{
2141 unsigned int i;
2142
2143 /* Check we don't already exist. */
2144 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2145 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2146 return;
b34976b6 2147
6a0c61b7
EZ		 2148 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2149 {
2150 if (ppc_apuinfo_num_alloc == 0)
2151 {
2152 ppc_apuinfo_num_alloc = 4;
2153 ppc_apuinfo_list = (unsigned long *)
2154 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2155 }
2156 else
2157 {
2158 ppc_apuinfo_num_alloc += 4;
2159 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2160 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2161 }
2162 }
dc1d03fc 2163 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2164}
2165#undef APUID
dc1d03fc 2166#endif
6a0c61b7
EZ		 2167\f
2168
252b5132
RH		 2169/* We need to keep a list of fixups. We can't simply generate them as
2170 we go, because that would require us to first create the frag, and
2171 that would screw up references to ``.''. */
2172
2173struct ppc_fixup
2174{
2175 expressionS exp;
2176 int opindex;
2177 bfd_reloc_code_real_type reloc;
2178};
2179
2180#define MAX_INSN_FIXUPS (5)
2181
2182/* This routine is called for each instruction to be assembled. */
2183
2184void
2185md_assemble (str)
2186 char *str;
2187{
2188 char *s;
2189 const struct powerpc_opcode *opcode;
2190 unsigned long insn;
2191 const unsigned char *opindex_ptr;
2192 int skip_optional;
2193 int need_paren;
2194 int next_opindex;
2195 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2196 int fc;
2197 char *f;
09b935ac 2198 int addr_mod;
252b5132
RH		 2199 int i;
2200#ifdef OBJ_ELF
2201 bfd_reloc_code_real_type reloc;
2202#endif
2203
2204 /* Get the opcode. */
3882b010 2205 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2206 ;
2207 if (*s != '\0')
2208 *s++ = '\0';
2209
2210 /* Look up the opcode in the hash table. */
2211 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2212 if (opcode == (const struct powerpc_opcode *) NULL)
2213 {
2214 const struct powerpc_macro *macro;
2215
2216 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2217 if (macro == (const struct powerpc_macro *) NULL)
2218 as_bad (_("Unrecognized opcode: `%s'"), str);
2219 else
2220 ppc_macro (s, macro);
2221
2222 return;
2223 }
2224
2225 insn = opcode->opcode;
2226
2227 str = s;
3882b010 2228 while (ISSPACE (*str))
252b5132
RH		 2229 ++str;
2230
2231 /* PowerPC operands are just expressions. The only real issue is
2232 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2233 an optional operand separate the operands only with commas (in some
2234 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2235 have optional operands). Most instructions with optional operands
2236 have only one. Those that have more than one optional operand can
2237 take either all their operands or none. So, before we start seriously
2238 parsing the operands, we check to see if we have optional operands,
2239 and if we do, we count the number of commas to see which operands
2240 have been omitted. */
252b5132
RH		 2241 skip_optional = 0;
2242 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2243 {
2244 const struct powerpc_operand *operand;
2245
2246 operand = &powerpc_operands[*opindex_ptr];
2247 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2248 {
2249 unsigned int opcount;
7fe9cf6b
NC		 2250 unsigned int num_operands_expected;
2251 unsigned int i;
252b5132
RH		 2252
2253 /* There is an optional operand. Count the number of
2254 commas in the input line. */
2255 if (*str == '\0')
2256 opcount = 0;
2257 else
2258 {
2259 opcount = 1;
2260 s = str;
2261 while ((s = strchr (s, ',')) != (char *) NULL)
2262 {
2263 ++opcount;
2264 ++s;
2265 }
2266 }
2267
7fe9cf6b
NC		 2268 /* Compute the number of expected operands.
2269 Do not count fake operands. */
2270 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2271 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2272 ++ num_operands_expected;
2273
252b5132
RH		 2274 /* If there are fewer operands in the line then are called
2275 for by the instruction, we want to skip the optional
1f6c9eb0 2276 operands. */
7fe9cf6b 2277 if (opcount < num_operands_expected)
252b5132
RH		 2278 skip_optional = 1;
2279
2280 break;
2281 }
2282 }
2283
2284 /* Gather the operands. */
2285 need_paren = 0;
2286 next_opindex = 0;
2287 fc = 0;
2288 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2289 {
2290 const struct powerpc_operand *operand;
2291 const char *errmsg;
2292 char *hold;
2293 expressionS ex;
2294 char endc;
2295
2296 if (next_opindex == 0)
2297 operand = &powerpc_operands[*opindex_ptr];
2298 else
2299 {
2300 operand = &powerpc_operands[next_opindex];
2301 next_opindex = 0;
2302 }
252b5132
RH		 2303 errmsg = NULL;
2304
2305 /* If this is a fake operand, then we do not expect anything
2306 from the input. */
2307 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2308 {
2b3c4602 2309 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2310 if (errmsg != (const char *) NULL)
2311 as_bad (errmsg);
2312 continue;
2313 }
2314
2315 /* If this is an optional operand, and we are skipping it, just
2316 insert a zero. */
2317 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2318 && skip_optional)
2319 {
2320 if (operand->insert)
2321 {
2b3c4602 2322 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2323 if (errmsg != (const char *) NULL)
2324 as_bad (errmsg);
2325 }
2326 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2327 next_opindex = *opindex_ptr + 1;
2328 continue;
2329 }
2330
2331 /* Gather the operand. */
2332 hold = input_line_pointer;
2333 input_line_pointer = str;
2334
2335#ifdef TE_PE
81d4177b 2336 if (*input_line_pointer == '[')
252b5132
RH		 2337 {
2338 /* We are expecting something like the second argument here:
99a814a1
AM		 2339 *
2340 * lwz r4,[toc].GS.0.static_int(rtoc)
2341 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2342 * The argument following the `]' must be a symbol name, and the
2343 * register must be the toc register: 'rtoc' or '2'
2344 *
2345 * The effect is to 0 as the displacement field
2346 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2347 * the appropriate variation) reloc against it based on the symbol.
2348 * The linker will build the toc, and insert the resolved toc offset.
2349 *
2350 * Note:
2351 * o The size of the toc entry is currently assumed to be
2352 * 32 bits. This should not be assumed to be a hard coded
2353 * number.
2354 * o In an effort to cope with a change from 32 to 64 bits,
2355 * there are also toc entries that are specified to be
2356 * either 32 or 64 bits:
2357 * lwz r4,[toc32].GS.0.static_int(rtoc)
2358 * lwz r4,[toc64].GS.0.static_int(rtoc)
2359 * These demand toc entries of the specified size, and the
2360 * instruction probably requires it.
2361 */
252b5132
RH		 2362
2363 int valid_toc;
2364 enum toc_size_qualifier toc_kind;
2365 bfd_reloc_code_real_type toc_reloc;
2366
99a814a1
AM		 2367 /* Go parse off the [tocXX] part. */
2368 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2369
81d4177b 2370 if (!valid_toc)
252b5132 2371 {
99a814a1
AM		 2372 /* Note: message has already been issued.
2373 FIXME: what sort of recovery should we do?
2374 demand_rest_of_line (); return; ? */
252b5132
RH		 2375 }
2376
99a814a1
AM		 2377 /* Now get the symbol following the ']'. */
2378 expression (&ex);
252b5132
RH		 2379
2380 switch (toc_kind)
2381 {
2382 case default_toc:
99a814a1
AM		 2383 /* In this case, we may not have seen the symbol yet,
2384 since it is allowed to appear on a .extern or .globl
2385 or just be a label in the .data section. */
252b5132
RH		 2386 toc_reloc = BFD_RELOC_PPC_TOC16;
2387 break;
2388 case data_in_toc:
99a814a1
AM		 2389 /* 1. The symbol must be defined and either in the toc
2390 section, or a global.
2391 2. The reloc generated must have the TOCDEFN flag set
2392 in upper bit mess of the reloc type.
2393 FIXME: It's a little confusing what the tocv
2394 qualifier can be used for. At the very least, I've
2395 seen three uses, only one of which I'm sure I can
2396 explain. */
81d4177b
KH		 2397 if (ex.X_op == O_symbol)
2398 {
252b5132 2399 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2400 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2401 != tocdata_section)
252b5132 2402 {
99a814a1 2403 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2404 }
2405 }
2406
2407 toc_reloc = BFD_RELOC_PPC_TOC16;
2408 break;
2409 case must_be_32:
99a814a1
AM		 2410 /* FIXME: these next two specifically specify 32/64 bit
2411 toc entries. We don't support them today. Is this
2412 the right way to say that? */
252b5132
RH		 2413 toc_reloc = BFD_RELOC_UNUSED;
2414 as_bad (_("Unimplemented toc32 expression modifier"));
2415 break;
2416 case must_be_64:
99a814a1 2417 /* FIXME: see above. */
252b5132
RH		 2418 toc_reloc = BFD_RELOC_UNUSED;
2419 as_bad (_("Unimplemented toc64 expression modifier"));
2420 break;
2421 default:
bc805888 2422 fprintf (stderr,
99a814a1
AM		 2423 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2424 toc_kind);
bc805888 2425 abort ();
252b5132
RH		 2426 break;
2427 }
2428
2429 /* We need to generate a fixup for this expression. */
2430 if (fc >= MAX_INSN_FIXUPS)
2431 as_fatal (_("too many fixups"));
2432
2433 fixups[fc].reloc = toc_reloc;
2434 fixups[fc].exp = ex;
2435 fixups[fc].opindex = *opindex_ptr;
2436 ++fc;
2437
99a814a1
AM		 2438 /* Ok. We've set up the fixup for the instruction. Now make it
2439 look like the constant 0 was found here. */
252b5132
RH		 2440 ex.X_unsigned = 1;
2441 ex.X_op = O_constant;
2442 ex.X_add_number = 0;
2443 ex.X_add_symbol = NULL;
2444 ex.X_op_symbol = NULL;
2445 }
2446
2447 else
2448#endif /* TE_PE */
2449 {
2450 if (! register_name (&ex))
2451 {
2452 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2453 cr_operand = TRUE;
252b5132 2454 expression (&ex);
b34976b6 2455 cr_operand = FALSE;
252b5132
RH		 2456 }
2457 }
2458
2459 str = input_line_pointer;
2460 input_line_pointer = hold;
2461
2462 if (ex.X_op == O_illegal)
2463 as_bad (_("illegal operand"));
2464 else if (ex.X_op == O_absent)
2465 as_bad (_("missing operand"));
2466 else if (ex.X_op == O_register)
2467 {
2468 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2469 (char *) NULL, 0);
2470 }
2471 else if (ex.X_op == O_constant)
2472 {
2473#ifdef OBJ_ELF
81d4177b 2474 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2475 char *orig_str = str;
2476
2477 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2478 switch (reloc)
2479 {
2480 default:
2481 str = orig_str;
2482 break;
2483
2484 case BFD_RELOC_LO16:
2485 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2486 something which cleared it, we always produce a
2487 signed value. */
2488 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2489 ex.X_add_number &= 0xffff;
2490 else
0baf16f2 2491 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2492 break;
2493
2494 case BFD_RELOC_HI16:
0baf16f2
AM		 2495 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2496 ex.X_add_number = PPC_HI (ex.X_add_number);
2497 else
2498 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2499 break;
2500
2501 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2502 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2503 ex.X_add_number = PPC_HA (ex.X_add_number);
2504 else
2505 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2506 break;
2507
0baf16f2
AM		 2508 case BFD_RELOC_PPC64_HIGHER:
2509 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2510 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2511 else
2512 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2513 break;
2514
2515 case BFD_RELOC_PPC64_HIGHER_S:
2516 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2517 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2518 else
2519 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2520 break;
0baf16f2
AM		 2521
2522 case BFD_RELOC_PPC64_HIGHEST:
2523 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2524 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2525 else
2526 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2527 break;
2528
2529 case BFD_RELOC_PPC64_HIGHEST_S:
2530 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2531 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2532 else
2533 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2534 break;
252b5132 2535 }
0baf16f2 2536#endif /* OBJ_ELF */
252b5132
RH		 2537 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2538 (char *) NULL, 0);
2539 }
2540#ifdef OBJ_ELF
2541 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2542 {
cdba85ec
AM		 2543 /* Some TLS tweaks. */
2544 switch (reloc)
2545 {
2546 default:
2547 break;
2548 case BFD_RELOC_PPC_TLS:
2549 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2550 (char *) NULL, 0);
2551 break;
2552 /* We'll only use the 32 (or 64) bit form of these relocations
2553 in constants. Instructions get the 16 bit form. */
2554 case BFD_RELOC_PPC_DTPREL:
2555 reloc = BFD_RELOC_PPC_DTPREL16;
2556 break;
2557 case BFD_RELOC_PPC_TPREL:
2558 reloc = BFD_RELOC_PPC_TPREL16;
2559 break;
2560 }
2561
99a814a1
AM		 2562 /* For the absolute forms of branches, convert the PC
2563 relative form back into the absolute. */
252b5132
RH		 2564 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2565 {
2566 switch (reloc)
2567 {
2568 case BFD_RELOC_PPC_B26:
2569 reloc = BFD_RELOC_PPC_BA26;
2570 break;
2571 case BFD_RELOC_PPC_B16:
2572 reloc = BFD_RELOC_PPC_BA16;
2573 break;
2574 case BFD_RELOC_PPC_B16_BRTAKEN:
2575 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2576 break;
2577 case BFD_RELOC_PPC_B16_BRNTAKEN:
2578 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2579 break;
2580 default:
2581 break;
2582 }
2583 }
2584
2b3c4602 2585 if (ppc_obj64
adadcc0c 2586 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2587 {
2588 switch (reloc)
2589 {
2590 case BFD_RELOC_16:
2591 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2592 break;
2593 case BFD_RELOC_LO16:
2594 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2595 break;
2596 case BFD_RELOC_16_GOTOFF:
2597 reloc = BFD_RELOC_PPC64_GOT16_DS;
2598 break;
2599 case BFD_RELOC_LO16_GOTOFF:
2600 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2601 break;
2602 case BFD_RELOC_LO16_PLTOFF:
2603 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2604 break;
1cfc59d5 2605 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2606 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2607 break;
2608 case BFD_RELOC_LO16_BASEREL:
2609 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2610 break;
2611 case BFD_RELOC_PPC_TOC16:
2612 reloc = BFD_RELOC_PPC64_TOC16_DS;
2613 break;
2614 case BFD_RELOC_PPC64_TOC16_LO:
2615 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2616 break;
2617 case BFD_RELOC_PPC64_PLTGOT16:
2618 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2619 break;
2620 case BFD_RELOC_PPC64_PLTGOT16_LO:
2621 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2622 break;
cdba85ec
AM		 2623 case BFD_RELOC_PPC_DTPREL16:
2624 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2625 break;
2626 case BFD_RELOC_PPC_DTPREL16_LO:
2627 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2628 break;
2629 case BFD_RELOC_PPC_TPREL16:
2630 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2631 break;
2632 case BFD_RELOC_PPC_TPREL16_LO:
2633 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2634 break;
2635 case BFD_RELOC_PPC_GOT_DTPREL16:
2636 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2637 case BFD_RELOC_PPC_GOT_TPREL16:
2638 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2639 break;
0baf16f2
AM		 2640 default:
2641 as_bad (_("unsupported relocation for DS offset field"));
2642 break;
2643 }
2644 }
2645
252b5132
RH		 2646 /* We need to generate a fixup for this expression. */
2647 if (fc >= MAX_INSN_FIXUPS)
2648 as_fatal (_("too many fixups"));
2649 fixups[fc].exp = ex;
2650 fixups[fc].opindex = 0;
2651 fixups[fc].reloc = reloc;
2652 ++fc;
2653 }
2654#endif /* OBJ_ELF */
2655
2656 else
2657 {
2658 /* We need to generate a fixup for this expression. */
2659 if (fc >= MAX_INSN_FIXUPS)
2660 as_fatal (_("too many fixups"));
2661 fixups[fc].exp = ex;
2662 fixups[fc].opindex = *opindex_ptr;
2663 fixups[fc].reloc = BFD_RELOC_UNUSED;
2664 ++fc;
2665 }
2666
2667 if (need_paren)
2668 {
2669 endc = ')';
2670 need_paren = 0;
2671 }
2672 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2673 {
2674 endc = '(';
2675 need_paren = 1;
2676 }
2677 else
2678 endc = ',';
2679
2680 /* The call to expression should have advanced str past any
2681 whitespace. */
2682 if (*str != endc
2683 && (endc != ',' || *str != '\0'))
2684 {
2685 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2686 break;
2687 }
2688
2689 if (*str != '\0')
2690 ++str;
2691 }
2692
3882b010 2693 while (ISSPACE (*str))
252b5132
RH		 2694 ++str;
2695
2696 if (*str != '\0')
2697 as_bad (_("junk at end of line: `%s'"), str);
2698
dc1d03fc 2699#ifdef OBJ_ELF
6a0c61b7
EZ		 2700 /* Do we need/want a APUinfo section? */
2701 if (ppc_cpu & (PPC_OPCODE_SPE
2702 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2703 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2704 | PPC_OPCODE_RFMCI))
2705 {
2706 /* These are all version "1". */
2707 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2708 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2709 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2710 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2711 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2712 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2713 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2714 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2715 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2716 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2717 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2718 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2719 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2720 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2721 }
dc1d03fc 2722#endif
6a0c61b7 2723
252b5132
RH		 2724 /* Write out the instruction. */
2725 f = frag_more (4);
09b935ac
AM		 2726 addr_mod = frag_now_fix () & 3;
2727 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2728 as_bad (_("instruction address is not a multiple of 4"));
2729 frag_now->insn_addr = addr_mod;
2730 frag_now->has_code = 1;
252b5132
RH		 2731 md_number_to_chars (f, insn, 4);
2732
5d6f4f16
GK		 2733#ifdef OBJ_ELF
2734 dwarf2_emit_insn (4);
2735#endif
2736
252b5132
RH		 2737 /* Create any fixups. At this point we do not use a
2738 bfd_reloc_code_real_type, but instead just use the
2739 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2740 handle fixups for any operand type, although that is admittedly
2741 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2742 md_apply_fix. */
252b5132
RH		 2743 for (i = 0; i < fc; i++)
2744 {
2745 const struct powerpc_operand *operand;
2746
2747 operand = &powerpc_operands[fixups[i].opindex];
2748 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2749 {
99a814a1 2750 reloc_howto_type *reloc_howto;
252b5132
RH		 2751 int size;
2752 int offset;
2753 fixS *fixP;
2754
99a814a1 2755 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2756 if (!reloc_howto)
2757 abort ();
2758
2759 size = bfd_get_reloc_size (reloc_howto);
2760 offset = target_big_endian ? (4 - size) : 0;
2761
2762 if (size < 1 || size > 4)
bc805888 2763 abort ();
252b5132 2764
99a814a1
AM		 2765 fixP = fix_new_exp (frag_now,
2766 f - frag_now->fr_literal + offset,
2767 size,
2768 &fixups[i].exp,
2769 reloc_howto->pc_relative,
252b5132
RH		 2770 fixups[i].reloc);
2771
2772 /* Turn off complaints that the addend is too large for things like
2773 foo+100000@ha. */
2774 switch (fixups[i].reloc)
2775 {
2776 case BFD_RELOC_16_GOTOFF:
2777 case BFD_RELOC_PPC_TOC16:
2778 case BFD_RELOC_LO16:
2779 case BFD_RELOC_HI16:
2780 case BFD_RELOC_HI16_S:
0baf16f2 2781#ifdef OBJ_ELF
0baf16f2
AM		 2782 case BFD_RELOC_PPC64_HIGHER:
2783 case BFD_RELOC_PPC64_HIGHER_S:
2784 case BFD_RELOC_PPC64_HIGHEST:
2785 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2786#endif
252b5132
RH		 2787 fixP->fx_no_overflow = 1;
2788 break;
2789 default:
2790 break;
2791 }
2792 }
2793 else
99a814a1
AM		 2794 fix_new_exp (frag_now,
2795 f - frag_now->fr_literal,
2796 4,
252b5132
RH		 2797 &fixups[i].exp,
2798 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2799 ((bfd_reloc_code_real_type)
99a814a1 2800 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2801 }
2802}
2803
2804/* Handle a macro. Gather all the operands, transform them as
2805 described by the macro, and call md_assemble recursively. All the
2806 operands are separated by commas; we don't accept parentheses
2807 around operands here. */
2808
2809static void
2810ppc_macro (str, macro)
2811 char *str;
2812 const struct powerpc_macro *macro;
2813{
2814 char *operands[10];
2815 unsigned int count;
2816 char *s;
2817 unsigned int len;
2818 const char *format;
db557034 2819 unsigned int arg;
252b5132
RH		 2820 char *send;
2821 char *complete;
2822
2823 /* Gather the users operands into the operands array. */
2824 count = 0;
2825 s = str;
2826 while (1)
2827 {
2828 if (count >= sizeof operands / sizeof operands[0])
2829 break;
2830 operands[count++] = s;
2831 s = strchr (s, ',');
2832 if (s == (char *) NULL)
2833 break;
2834 *s++ = '\0';
81d4177b 2835 }
252b5132
RH		 2836
2837 if (count != macro->operands)
2838 {
2839 as_bad (_("wrong number of operands"));
2840 return;
2841 }
2842
2843 /* Work out how large the string must be (the size is unbounded
2844 because it includes user input). */
2845 len = 0;
2846 format = macro->format;
2847 while (*format != '\0')
2848 {
2849 if (*format != '%')
2850 {
2851 ++len;
2852 ++format;
2853 }
2854 else
2855 {
2856 arg = strtol (format + 1, &send, 10);
db557034 2857 know (send != format && arg < count);
252b5132
RH		 2858 len += strlen (operands[arg]);
2859 format = send;
2860 }
2861 }
2862
2863 /* Put the string together. */
2864 complete = s = (char *) alloca (len + 1);
2865 format = macro->format;
2866 while (*format != '\0')
2867 {
2868 if (*format != '%')
2869 *s++ = *format++;
2870 else
2871 {
2872 arg = strtol (format + 1, &send, 10);
2873 strcpy (s, operands[arg]);
2874 s += strlen (s);
2875 format = send;
2876 }
2877 }
2878 *s = '\0';
2879
2880 /* Assemble the constructed instruction. */
2881 md_assemble (complete);
81d4177b 2882}
252b5132
RH		 2883\f
2884#ifdef OBJ_ELF
99a814a1 2885/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2886
2887int
2888ppc_section_letter (letter, ptr_msg)
2889 int letter;
2890 char **ptr_msg;
2891{
2892 if (letter == 'e')
2893 return SHF_EXCLUDE;
2894
13ae64f3 2895 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2896 return -1;
252b5132
RH		 2897}
2898
2899int
9de8d8f1
RH		 2900ppc_section_word (str, len)
2901 char *str;
2902 size_t len;
252b5132 2903{
9de8d8f1
RH		 2904 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2905 return SHF_EXCLUDE;
252b5132 2906
9de8d8f1 2907 return -1;
252b5132
RH		 2908}
2909
2910int
9de8d8f1
RH		 2911ppc_section_type (str, len)
2912 char *str;
2913 size_t len;
252b5132 2914{
9de8d8f1
RH		 2915 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2916 return SHT_ORDERED;
252b5132 2917
9de8d8f1 2918 return -1;
252b5132
RH		 2919}
2920
2921int
2922ppc_section_flags (flags, attr, type)
2923 int flags;
2924 int attr;
2925 int type;
2926{
2927 if (type == SHT_ORDERED)
2928 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2929
2930 if (attr & SHF_EXCLUDE)
2931 flags |= SEC_EXCLUDE;
2932
2933 return flags;
2934}
2935#endif /* OBJ_ELF */
2936
2937\f
2938/* Pseudo-op handling. */
2939
2940/* The .byte pseudo-op. This is similar to the normal .byte
2941 pseudo-op, but it can also take a single ASCII string. */
2942
2943static void
2944ppc_byte (ignore)
92161534 2945 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2946{
2947 if (*input_line_pointer != '\"')
2948 {
2949 cons (1);
2950 return;
2951 }
2952
2953 /* Gather characters. A real double quote is doubled. Unusual
2954 characters are not permitted. */
2955 ++input_line_pointer;
2956 while (1)
2957 {
2958 char c;
2959
2960 c = *input_line_pointer++;
2961
2962 if (c == '\"')
2963 {
2964 if (*input_line_pointer != '\"')
2965 break;
2966 ++input_line_pointer;
2967 }
2968
2969 FRAG_APPEND_1_CHAR (c);
2970 }
2971
2972 demand_empty_rest_of_line ();
2973}
2974\f
2975#ifdef OBJ_XCOFF
2976
2977/* XCOFF specific pseudo-op handling. */
2978
2979/* This is set if we are creating a .stabx symbol, since we don't want
2980 to handle symbol suffixes for such symbols. */
b34976b6 2981static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2982
2983/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2984 symbols in the .bss segment as though they were local common
67c1ffbe 2985 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2986 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2987
2988static void
2989ppc_comm (lcomm)
2990 int lcomm;
2991{
2992 asection *current_seg = now_seg;
2993 subsegT current_subseg = now_subseg;
2994 char *name;
2995 char endc;
2996 char *end_name;
2997 offsetT size;
2998 offsetT align;
2999 symbolS *lcomm_sym = NULL;
3000 symbolS *sym;
3001 char *pfrag;
3002
3003 name = input_line_pointer;
3004 endc = get_symbol_end ();
3005 end_name = input_line_pointer;
3006 *end_name = endc;
3007
3008 if (*input_line_pointer != ',')
3009 {
3010 as_bad (_("missing size"));
3011 ignore_rest_of_line ();
3012 return;
3013 }
3014 ++input_line_pointer;
3015
3016 size = get_absolute_expression ();
3017 if (size < 0)
3018 {
3019 as_bad (_("negative size"));
3020 ignore_rest_of_line ();
3021 return;
3022 }
3023
3024 if (! lcomm)
3025 {
3026 /* The third argument to .comm is the alignment. */
3027 if (*input_line_pointer != ',')
1ad63b2f 3028 align = 2;
252b5132
RH		 3029 else
3030 {
3031 ++input_line_pointer;
3032 align = get_absolute_expression ();
3033 if (align <= 0)
3034 {
3035 as_warn (_("ignoring bad alignment"));
1ad63b2f 3036 align = 2;
252b5132
RH		 3037 }
3038 }
3039 }
3040 else
3041 {
3042 char *lcomm_name;
3043 char lcomm_endc;
3044
1ad63b2f 3045 if (size <= 4)
252b5132
RH		 3046 align = 2;
3047 else
3048 align = 3;
3049
3050 /* The third argument to .lcomm appears to be the real local
3051 common symbol to create. References to the symbol named in
3052 the first argument are turned into references to the third
3053 argument. */
3054 if (*input_line_pointer != ',')
3055 {
3056 as_bad (_("missing real symbol name"));
3057 ignore_rest_of_line ();
3058 return;
3059 }
3060 ++input_line_pointer;
3061
3062 lcomm_name = input_line_pointer;
3063 lcomm_endc = get_symbol_end ();
81d4177b 3064
252b5132
RH		 3065 lcomm_sym = symbol_find_or_make (lcomm_name);
3066
3067 *input_line_pointer = lcomm_endc;
3068 }
3069
3070 *end_name = '\0';
3071 sym = symbol_find_or_make (name);
3072 *end_name = endc;
3073
3074 if (S_IS_DEFINED (sym)
3075 || S_GET_VALUE (sym) != 0)
3076 {
3077 as_bad (_("attempt to redefine symbol"));
3078 ignore_rest_of_line ();
3079 return;
3080 }
81d4177b 3081
252b5132 3082 record_alignment (bss_section, align);
81d4177b 3083
252b5132
RH		 3084 if (! lcomm
3085 || ! S_IS_DEFINED (lcomm_sym))
3086 {
3087 symbolS *def_sym;
3088 offsetT def_size;
3089
3090 if (! lcomm)
3091 {
3092 def_sym = sym;
3093 def_size = size;
3094 S_SET_EXTERNAL (sym);
3095 }
3096 else
3097 {
809ffe0d 3098 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3099 def_sym = lcomm_sym;
3100 def_size = 0;
3101 }
3102
3103 subseg_set (bss_section, 1);
3104 frag_align (align, 0, 0);
81d4177b 3105
809ffe0d 3106 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3107 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3108 def_size, (char *) NULL);
3109 *pfrag = 0;
3110 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3111 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3112 }
3113 else if (lcomm)
3114 {
3115 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3116 symbol_get_frag (lcomm_sym)->fr_offset =
3117 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3118 &~ ((1 << align) - 1));
809ffe0d
ILT		 3119 if (align > symbol_get_tc (lcomm_sym)->align)
3120 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3121 }
3122
3123 if (lcomm)
3124 {
3125 /* Make sym an offset from lcomm_sym. */
3126 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3127 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3128 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3129 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3130 }
3131
3132 subseg_set (current_seg, current_subseg);
3133
3134 demand_empty_rest_of_line ();
3135}
3136
3137/* The .csect pseudo-op. This switches us into a different
3138 subsegment. The first argument is a symbol whose value is the
3139 start of the .csect. In COFF, csect symbols get special aux
3140 entries defined by the x_csect field of union internal_auxent. The
3141 optional second argument is the alignment (the default is 2). */
3142
3143static void
3144ppc_csect (ignore)
5480ccf3 3145 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3146{
3147 char *name;
3148 char endc;
3149 symbolS *sym;
931e13a6 3150 offsetT align;
252b5132
RH		 3151
3152 name = input_line_pointer;
3153 endc = get_symbol_end ();
81d4177b 3154
252b5132
RH		 3155 sym = symbol_find_or_make (name);
3156
3157 *input_line_pointer = endc;
3158
3159 if (S_GET_NAME (sym)[0] == '\0')
3160 {
3161 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3162 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3163 }
3164
931e13a6 3165 align = 2;
252b5132
RH		 3166 if (*input_line_pointer == ',')
3167 {
3168 ++input_line_pointer;
931e13a6 3169 align = get_absolute_expression ();
252b5132
RH		 3170 }
3171
931e13a6
AM		 3172 ppc_change_csect (sym, align);
3173
252b5132
RH		 3174 demand_empty_rest_of_line ();
3175}
3176
3177/* Change to a different csect. */
3178
3179static void
931e13a6 3180ppc_change_csect (sym, align)
252b5132 3181 symbolS *sym;
931e13a6 3182 offsetT align;
252b5132
RH		 3183{
3184 if (S_IS_DEFINED (sym))
809ffe0d 3185 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3186 else
3187 {
3188 symbolS **list_ptr;
3189 int after_toc;
3190 int hold_chunksize;
3191 symbolS *list;
931e13a6
AM		 3192 int is_code;
3193 segT sec;
252b5132
RH		 3194
3195 /* This is a new csect. We need to look at the symbol class to
3196 figure out whether it should go in the text section or the
3197 data section. */
3198 after_toc = 0;
931e13a6 3199 is_code = 0;
809ffe0d 3200 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3201 {
3202 case XMC_PR:
3203 case XMC_RO:
3204 case XMC_DB:
3205 case XMC_GL:
3206 case XMC_XO:
3207 case XMC_SV:
3208 case XMC_TI:
3209 case XMC_TB:
3210 S_SET_SEGMENT (sym, text_section);
809ffe0d 3211 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3212 ++ppc_text_subsegment;
3213 list_ptr = &ppc_text_csects;
931e13a6 3214 is_code = 1;
252b5132
RH		 3215 break;
3216 case XMC_RW:
3217 case XMC_TC0:
3218 case XMC_TC:
3219 case XMC_DS:
3220 case XMC_UA:
3221 case XMC_BS:
3222 case XMC_UC:
3223 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3224 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3225 == ppc_data_subsegment))
252b5132
RH		 3226 after_toc = 1;
3227 S_SET_SEGMENT (sym, data_section);
809ffe0d 3228 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3229 ++ppc_data_subsegment;
3230 list_ptr = &ppc_data_csects;
3231 break;
3232 default:
3233 abort ();
3234 }
3235
3236 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3237 changing subsegments, so that we don't use a lot of memory
3238 space for what may be a small section. */
252b5132
RH		 3239 hold_chunksize = chunksize;
3240 chunksize = 64;
3241
931e13a6
AM		 3242 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3243 symbol_get_tc (sym)->subseg);
252b5132
RH		 3244
3245 chunksize = hold_chunksize;
3246
3247 if (after_toc)
3248 ppc_after_toc_frag = frag_now;
3249
931e13a6
AM		 3250 record_alignment (sec, align);
3251 if (is_code)
3252 frag_align_code (align, 0);
3253 else
3254 frag_align (align, 0, 0);
3255
809ffe0d 3256 symbol_set_frag (sym, frag_now);
252b5132
RH		 3257 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3258
931e13a6 3259 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3260 symbol_get_tc (sym)->output = 1;
3261 symbol_get_tc (sym)->within = sym;
81d4177b 3262
252b5132 3263 for (list = *list_ptr;
809ffe0d
ILT		 3264 symbol_get_tc (list)->next != (symbolS *) NULL;
3265 list = symbol_get_tc (list)->next)
252b5132 3266 ;
809ffe0d 3267 symbol_get_tc (list)->next = sym;
81d4177b 3268
252b5132 3269 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3270 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3271 &symbol_lastP);
252b5132
RH		 3272 }
3273
3274 ppc_current_csect = sym;
3275}
3276
3277/* This function handles the .text and .data pseudo-ops. These
3278 pseudo-ops aren't really used by XCOFF; we implement them for the
3279 convenience of people who aren't used to XCOFF. */
3280
3281static void
3282ppc_section (type)
3283 int type;
3284{
3285 const char *name;
3286 symbolS *sym;
3287
3288 if (type == 't')
3289 name = ".text[PR]";
3290 else if (type == 'd')
3291 name = ".data[RW]";
3292 else
3293 abort ();
3294
3295 sym = symbol_find_or_make (name);
3296
931e13a6 3297 ppc_change_csect (sym, 2);
252b5132
RH		 3298
3299 demand_empty_rest_of_line ();
3300}
3301
3302/* This function handles the .section pseudo-op. This is mostly to
3303 give an error, since XCOFF only supports .text, .data and .bss, but
3304 we do permit the user to name the text or data section. */
3305
3306static void
3307ppc_named_section (ignore)
5480ccf3 3308 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3309{
3310 char *user_name;
3311 const char *real_name;
3312 char c;
3313 symbolS *sym;
3314
3315 user_name = input_line_pointer;
3316 c = get_symbol_end ();
3317
3318 if (strcmp (user_name, ".text") == 0)
3319 real_name = ".text[PR]";
3320 else if (strcmp (user_name, ".data") == 0)
3321 real_name = ".data[RW]";
3322 else
3323 {
3324 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3325 *input_line_pointer = c;
3326 ignore_rest_of_line ();
3327 return;
3328 }
3329
3330 *input_line_pointer = c;
3331
3332 sym = symbol_find_or_make (real_name);
3333
931e13a6 3334 ppc_change_csect (sym, 2);
252b5132
RH		 3335
3336 demand_empty_rest_of_line ();
3337}
3338
3339/* The .extern pseudo-op. We create an undefined symbol. */
3340
3341static void
3342ppc_extern (ignore)
5480ccf3 3343 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3344{
3345 char *name;
3346 char endc;
3347
3348 name = input_line_pointer;
3349 endc = get_symbol_end ();
3350
3351 (void) symbol_find_or_make (name);
3352
3353 *input_line_pointer = endc;
3354
3355 demand_empty_rest_of_line ();
3356}
3357
3358/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3359
3360static void
3361ppc_lglobl (ignore)
5480ccf3 3362 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3363{
3364 char *name;
3365 char endc;
3366 symbolS *sym;
3367
3368 name = input_line_pointer;
3369 endc = get_symbol_end ();
3370
3371 sym = symbol_find_or_make (name);
3372
3373 *input_line_pointer = endc;
3374
809ffe0d 3375 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3376
3377 demand_empty_rest_of_line ();
3378}
3379
3380/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3381 although I don't know why it bothers. */
3382
3383static void
3384ppc_rename (ignore)
5480ccf3 3385 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3386{
3387 char *name;
3388 char endc;
3389 symbolS *sym;
3390 int len;
3391
3392 name = input_line_pointer;
3393 endc = get_symbol_end ();
3394
3395 sym = symbol_find_or_make (name);
3396
3397 *input_line_pointer = endc;
3398
3399 if (*input_line_pointer != ',')
3400 {
3401 as_bad (_("missing rename string"));
3402 ignore_rest_of_line ();
3403 return;
3404 }
3405 ++input_line_pointer;
3406
809ffe0d 3407 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3408
3409 demand_empty_rest_of_line ();
3410}
3411
3412/* The .stabx pseudo-op. This is similar to a normal .stabs
3413 pseudo-op, but slightly different. A sample is
3414 .stabx "main:F-1",.main,142,0
3415 The first argument is the symbol name to create. The second is the
3416 value, and the third is the storage class. The fourth seems to be
3417 always zero, and I am assuming it is the type. */
3418
3419static void
3420ppc_stabx (ignore)
5480ccf3 3421 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3422{
3423 char *name;
3424 int len;
3425 symbolS *sym;
3426 expressionS exp;
3427
3428 name = demand_copy_C_string (&len);
3429
3430 if (*input_line_pointer != ',')
3431 {
3432 as_bad (_("missing value"));
3433 return;
3434 }
3435 ++input_line_pointer;
3436
b34976b6 3437 ppc_stab_symbol = TRUE;
252b5132 3438 sym = symbol_make (name);
b34976b6 3439 ppc_stab_symbol = FALSE;
252b5132 3440
809ffe0d 3441 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3442
3443 (void) expression (&exp);
3444
3445 switch (exp.X_op)
3446 {
3447 case O_illegal:
3448 case O_absent:
3449 case O_big:
3450 as_bad (_("illegal .stabx expression; zero assumed"));
3451 exp.X_add_number = 0;
3452 /* Fall through. */
3453 case O_constant:
3454 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3455 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3456 break;
3457
3458 case O_symbol:
3459 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3460 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3461 else
3462 {
3463 S_SET_VALUE (sym,
3464 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3465 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3466 }
3467 break;
3468
3469 default:
3470 /* The value is some complex expression. This will probably
99a814a1
AM		 3471 fail at some later point, but this is probably the right
3472 thing to do here. */
809ffe0d 3473 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3474 break;
3475 }
3476
3477 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3478 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3479
3480 if (*input_line_pointer != ',')
3481 {
3482 as_bad (_("missing class"));
3483 return;
3484 }
3485 ++input_line_pointer;
3486
3487 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3488
3489 if (*input_line_pointer != ',')
3490 {
3491 as_bad (_("missing type"));
3492 return;
3493 }
3494 ++input_line_pointer;
3495
3496 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3497
809ffe0d 3498 symbol_get_tc (sym)->output = 1;
252b5132 3499
6877bb43 3500 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3501
809ffe0d 3502 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3503
41ea10b1 3504 /* In this case :
99a814a1 3505
41ea10b1
TR		 3506 .bs name
3507 .stabx "z",arrays_,133,0
3508 .es
99a814a1 3509
41ea10b1 3510 .comm arrays_,13768,3
99a814a1 3511
41ea10b1
TR		 3512 resolve_symbol_value will copy the exp's "within" into sym's when the
3513 offset is 0. Since this seems to be corner case problem,
3514 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3515 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3516
3517 if (exp.X_op == O_symbol)
41ea10b1
TR		 3518 {
3519 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3520 }
6877bb43 3521 }
99a814a1 3522
252b5132
RH		 3523 if (exp.X_op != O_symbol
3524 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3525 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3526 ppc_frob_label (sym);
3527 else
3528 {
3529 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3530 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3531 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3532 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3533 }
3534
3535 demand_empty_rest_of_line ();
3536}
3537
3538/* The .function pseudo-op. This takes several arguments. The first
3539 argument seems to be the external name of the symbol. The second
67c1ffbe 3540 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3541 uses the same name for both. I have no idea what the third and
3542 fourth arguments are meant to be. The optional fifth argument is
3543 an expression for the size of the function. In COFF this symbol
3544 gets an aux entry like that used for a csect. */
3545
3546static void
3547ppc_function (ignore)
5480ccf3 3548 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3549{
3550 char *name;
3551 char endc;
3552 char *s;
3553 symbolS *ext_sym;
3554 symbolS *lab_sym;
3555
3556 name = input_line_pointer;
3557 endc = get_symbol_end ();
3558
3559 /* Ignore any [PR] suffix. */
3560 name = ppc_canonicalize_symbol_name (name);
3561 s = strchr (name, '[');
3562 if (s != (char *) NULL
3563 && strcmp (s + 1, "PR]") == 0)
3564 *s = '\0';
3565
3566 ext_sym = symbol_find_or_make (name);
3567
3568 *input_line_pointer = endc;
3569
3570 if (*input_line_pointer != ',')
3571 {
3572 as_bad (_("missing symbol name"));
3573 ignore_rest_of_line ();
3574 return;
3575 }
3576 ++input_line_pointer;
3577
3578 name = input_line_pointer;
3579 endc = get_symbol_end ();
3580
3581 lab_sym = symbol_find_or_make (name);
3582
3583 *input_line_pointer = endc;
3584
3585 if (ext_sym != lab_sym)
3586 {
809ffe0d
ILT		 3587 expressionS exp;
3588
3589 exp.X_op = O_symbol;
3590 exp.X_add_symbol = lab_sym;
3591 exp.X_op_symbol = NULL;
3592 exp.X_add_number = 0;
3593 exp.X_unsigned = 0;
3594 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3595 }
3596
809ffe0d
ILT		 3597 if (symbol_get_tc (ext_sym)->class == -1)
3598 symbol_get_tc (ext_sym)->class = XMC_PR;
3599 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3600
3601 if (*input_line_pointer == ',')
3602 {
3603 expressionS ignore;
3604
3605 /* Ignore the third argument. */
3606 ++input_line_pointer;
3607 expression (&ignore);
3608 if (*input_line_pointer == ',')
3609 {
3610 /* Ignore the fourth argument. */
3611 ++input_line_pointer;
3612 expression (&ignore);
3613 if (*input_line_pointer == ',')
3614 {
3615 /* The fifth argument is the function size. */
3616 ++input_line_pointer;
809ffe0d
ILT		 3617 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3618 absolute_section,
3619 (valueT) 0,
3620 &zero_address_frag);
3621 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3622 }
3623 }
3624 }
3625
3626 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3627 SF_SET_FUNCTION (ext_sym);
3628 SF_SET_PROCESS (ext_sym);
3629 coff_add_linesym (ext_sym);
3630
3631 demand_empty_rest_of_line ();
3632}
3633
3634/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3635 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3636 with the correct line number */
5d6255fe 3637
8642cce8 3638static symbolS *saved_bi_sym = 0;
252b5132
RH		 3639
3640static void
3641ppc_bf (ignore)
5480ccf3 3642 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3643{
3644 symbolS *sym;
3645
3646 sym = symbol_make (".bf");
3647 S_SET_SEGMENT (sym, text_section);
809ffe0d 3648 symbol_set_frag (sym, frag_now);
252b5132
RH		 3649 S_SET_VALUE (sym, frag_now_fix ());
3650 S_SET_STORAGE_CLASS (sym, C_FCN);
3651
3652 coff_line_base = get_absolute_expression ();
3653
3654 S_SET_NUMBER_AUXILIARY (sym, 1);
3655 SA_SET_SYM_LNNO (sym, coff_line_base);
3656
8642cce8 3657 /* Line number for bi. */
5d6255fe 3658 if (saved_bi_sym)
8642cce8
TR		 3659 {
3660 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3661 saved_bi_sym = 0;
3662 }
5d6255fe 3663
8642cce8 3664
809ffe0d 3665 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3666
3667 ppc_frob_label (sym);
3668
3669 demand_empty_rest_of_line ();
3670}
3671
3672/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3673 ".ef", except that the line number is absolute, not relative to the
3674 most recent ".bf" symbol. */
3675
3676static void
3677ppc_ef (ignore)
5480ccf3 3678 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3679{
3680 symbolS *sym;
3681
3682 sym = symbol_make (".ef");
3683 S_SET_SEGMENT (sym, text_section);
809ffe0d 3684 symbol_set_frag (sym, frag_now);
252b5132
RH		 3685 S_SET_VALUE (sym, frag_now_fix ());
3686 S_SET_STORAGE_CLASS (sym, C_FCN);
3687 S_SET_NUMBER_AUXILIARY (sym, 1);
3688 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3689 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3690
3691 ppc_frob_label (sym);
3692
3693 demand_empty_rest_of_line ();
3694}
3695
3696/* The .bi and .ei pseudo-ops. These take a string argument and
3697 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3698 the symbol list. The value of .bi will be know when the next .bf
3699 is encountered. */
252b5132
RH		 3700
3701static void
3702ppc_biei (ei)
3703 int ei;
3704{
3705 static symbolS *last_biei;
3706
3707 char *name;
3708 int len;
3709 symbolS *sym;
3710 symbolS *look;
3711
3712 name = demand_copy_C_string (&len);
3713
3714 /* The value of these symbols is actually file offset. Here we set
3715 the value to the index into the line number entries. In
3716 ppc_frob_symbols we set the fix_line field, which will cause BFD
3717 to do the right thing. */
3718
3719 sym = symbol_make (name);
3720 /* obj-coff.c currently only handles line numbers correctly in the
3721 .text section. */
3722 S_SET_SEGMENT (sym, text_section);
3723 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3724 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3725
3726 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3727 symbol_get_tc (sym)->output = 1;
81d4177b 3728
8642cce8 3729 /* Save bi. */
5d6255fe 3730 if (ei)
8642cce8
TR		 3731 saved_bi_sym = 0;
3732 else
3733 saved_bi_sym = sym;
3734
252b5132
RH		 3735 for (look = last_biei ? last_biei : symbol_rootP;
3736 (look != (symbolS *) NULL
3737 && (S_GET_STORAGE_CLASS (look) == C_FILE
3738 || S_GET_STORAGE_CLASS (look) == C_BINCL
3739 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3740 look = symbol_next (look))
3741 ;
3742 if (look != (symbolS *) NULL)
3743 {
3744 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3745 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3746 last_biei = sym;
3747 }
3748
3749 demand_empty_rest_of_line ();
3750}
3751
3752/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3753 There is one argument, which is a csect symbol. The value of the
3754 .bs symbol is the index of this csect symbol. */
3755
3756static void
3757ppc_bs (ignore)
5480ccf3 3758 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3759{
3760 char *name;
3761 char endc;
3762 symbolS *csect;
3763 symbolS *sym;
3764
3765 if (ppc_current_block != NULL)
3766 as_bad (_("nested .bs blocks"));
3767
3768 name = input_line_pointer;
3769 endc = get_symbol_end ();
3770
3771 csect = symbol_find_or_make (name);
3772
3773 *input_line_pointer = endc;
3774
3775 sym = symbol_make (".bs");
3776 S_SET_SEGMENT (sym, now_seg);
3777 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3778 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3779 symbol_get_tc (sym)->output = 1;
252b5132 3780
809ffe0d 3781 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3782
3783 ppc_frob_label (sym);
3784
3785 ppc_current_block = sym;
3786
3787 demand_empty_rest_of_line ();
3788}
3789
3790/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3791
3792static void
3793ppc_es (ignore)
5480ccf3 3794 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3795{
3796 symbolS *sym;
3797
3798 if (ppc_current_block == NULL)
3799 as_bad (_(".es without preceding .bs"));
3800
3801 sym = symbol_make (".es");
3802 S_SET_SEGMENT (sym, now_seg);
3803 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3804 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3805 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3806
3807 ppc_frob_label (sym);
3808
3809 ppc_current_block = NULL;
3810
3811 demand_empty_rest_of_line ();
3812}
3813
3814/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3815 line number. */
3816
3817static void
3818ppc_bb (ignore)
5480ccf3 3819 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3820{
3821 symbolS *sym;
3822
3823 sym = symbol_make (".bb");
3824 S_SET_SEGMENT (sym, text_section);
809ffe0d 3825 symbol_set_frag (sym, frag_now);
252b5132
RH		 3826 S_SET_VALUE (sym, frag_now_fix ());
3827 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3828
3829 S_SET_NUMBER_AUXILIARY (sym, 1);
3830 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3831
809ffe0d 3832 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3833
3834 SF_SET_PROCESS (sym);
3835
3836 ppc_frob_label (sym);
3837
3838 demand_empty_rest_of_line ();
3839}
3840
3841/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3842 line number. */
3843
3844static void
3845ppc_eb (ignore)
5480ccf3 3846 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3847{
3848 symbolS *sym;
3849
3850 sym = symbol_make (".eb");
3851 S_SET_SEGMENT (sym, text_section);
809ffe0d 3852 symbol_set_frag (sym, frag_now);
252b5132
RH		 3853 S_SET_VALUE (sym, frag_now_fix ());
3854 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3855 S_SET_NUMBER_AUXILIARY (sym, 1);
3856 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3857 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3858
3859 SF_SET_PROCESS (sym);
3860
3861 ppc_frob_label (sym);
3862
3863 demand_empty_rest_of_line ();
3864}
3865
3866/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3867 specified name. */
3868
3869static void
3870ppc_bc (ignore)
5480ccf3 3871 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3872{
3873 char *name;
3874 int len;
3875 symbolS *sym;
3876
3877 name = demand_copy_C_string (&len);
3878 sym = symbol_make (name);
3879 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3880 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3881 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3882 S_SET_VALUE (sym, 0);
809ffe0d 3883 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3884
3885 ppc_frob_label (sym);
3886
3887 demand_empty_rest_of_line ();
3888}
3889
3890/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3891
3892static void
3893ppc_ec (ignore)
5480ccf3 3894 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3895{
3896 symbolS *sym;
3897
3898 sym = symbol_make (".ec");
3899 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3900 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3901 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3902 S_SET_VALUE (sym, 0);
809ffe0d 3903 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3904
3905 ppc_frob_label (sym);
3906
3907 demand_empty_rest_of_line ();
3908}
3909
3910/* The .toc pseudo-op. Switch to the .toc subsegment. */
3911
3912static void
3913ppc_toc (ignore)
5480ccf3 3914 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3915{
3916 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3917 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3918 else
3919 {
3920 subsegT subseg;
3921 symbolS *sym;
3922 symbolS *list;
81d4177b 3923
252b5132
RH		 3924 subseg = ppc_data_subsegment;
3925 ++ppc_data_subsegment;
3926
3927 subseg_new (segment_name (data_section), subseg);
3928 ppc_toc_frag = frag_now;
3929
3930 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3931 symbol_set_frag (sym, frag_now);
252b5132
RH		 3932 S_SET_SEGMENT (sym, data_section);
3933 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3934 symbol_get_tc (sym)->subseg = subseg;
3935 symbol_get_tc (sym)->output = 1;
3936 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3937
3938 ppc_toc_csect = sym;
81d4177b 3939
252b5132 3940 for (list = ppc_data_csects;
809ffe0d
ILT		 3941 symbol_get_tc (list)->next != (symbolS *) NULL;
3942 list = symbol_get_tc (list)->next)
252b5132 3943 ;
809ffe0d 3944 symbol_get_tc (list)->next = sym;
252b5132
RH		 3945
3946 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3947 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3948 &symbol_lastP);
252b5132
RH		 3949 }
3950
3951 ppc_current_csect = ppc_toc_csect;
3952
3953 demand_empty_rest_of_line ();
3954}
3955
3956/* The AIX assembler automatically aligns the operands of a .long or
3957 .short pseudo-op, and we want to be compatible. */
3958
3959static void
3960ppc_xcoff_cons (log_size)
3961 int log_size;
3962{
3963 frag_align (log_size, 0, 0);
3964 record_alignment (now_seg, log_size);
3965 cons (1 << log_size);
3966}
3967
3968static void
3969ppc_vbyte (dummy)
5480ccf3 3970 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3971{
3972 expressionS exp;
3973 int byte_count;
3974
3975 (void) expression (&exp);
3976
3977 if (exp.X_op != O_constant)
3978 {
3979 as_bad (_("non-constant byte count"));
3980 return;
3981 }
3982
3983 byte_count = exp.X_add_number;
3984
3985 if (*input_line_pointer != ',')
3986 {
3987 as_bad (_("missing value"));
3988 return;
3989 }
3990
3991 ++input_line_pointer;
3992 cons (byte_count);
3993}
3994
3995#endif /* OBJ_XCOFF */
0baf16f2 3996#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3997\f
3998/* The .tc pseudo-op. This is used when generating either XCOFF or
3999 ELF. This takes two or more arguments.
4000
4001 When generating XCOFF output, the first argument is the name to
4002 give to this location in the toc; this will be a symbol with class
0baf16f2 4003 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4004 this location in the TOC; often there is just one more argument, a
1049f94e 4005 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4006 depends on target word size. A 32-bit target uses 4-byte values, a
4007 64-bit target uses 8-byte values.
252b5132
RH		 4008
4009 When not generating XCOFF output, the arguments are the same, but
4010 the first argument is simply ignored. */
4011
4012static void
4013ppc_tc (ignore)
92161534 4014 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4015{
4016#ifdef OBJ_XCOFF
4017
4018 /* Define the TOC symbol name. */
4019 {
4020 char *name;
4021 char endc;
4022 symbolS *sym;
4023
4024 if (ppc_toc_csect == (symbolS *) NULL
4025 || ppc_toc_csect != ppc_current_csect)
4026 {
4027 as_bad (_(".tc not in .toc section"));
4028 ignore_rest_of_line ();
4029 return;
4030 }
4031
4032 name = input_line_pointer;
4033 endc = get_symbol_end ();
4034
4035 sym = symbol_find_or_make (name);
4036
4037 *input_line_pointer = endc;
4038
4039 if (S_IS_DEFINED (sym))
4040 {
4041 symbolS *label;
4042
809ffe0d
ILT		 4043 label = symbol_get_tc (ppc_current_csect)->within;
4044 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 4045 {
4046 as_bad (_(".tc with no label"));
4047 ignore_rest_of_line ();
4048 return;
4049 }
4050
4051 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4052 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4053 S_SET_VALUE (label, S_GET_VALUE (sym));
4054
4055 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4056 ++input_line_pointer;
4057
4058 return;
4059 }
4060
4061 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4062 symbol_set_frag (sym, frag_now);
252b5132 4063 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4064 symbol_get_tc (sym)->class = XMC_TC;
4065 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4066
4067 ppc_frob_label (sym);
4068 }
4069
0baf16f2
AM		 4070#endif /* OBJ_XCOFF */
4071#ifdef OBJ_ELF
9c7977b3 4072 int align;
252b5132
RH		 4073
4074 /* Skip the TOC symbol name. */
4075 while (is_part_of_name (*input_line_pointer)
4076 || *input_line_pointer == '['
4077 || *input_line_pointer == ']'
4078 || *input_line_pointer == '{'
4079 || *input_line_pointer == '}')
4080 ++input_line_pointer;
4081
0baf16f2 4082 /* Align to a four/eight byte boundary. */
2b3c4602 4083 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4084 frag_align (align, 0, 0);
4085 record_alignment (now_seg, align);
0baf16f2 4086#endif /* OBJ_ELF */
252b5132
RH		 4087
4088 if (*input_line_pointer != ',')
4089 demand_empty_rest_of_line ();
4090 else
4091 {
4092 ++input_line_pointer;
2b3c4602 4093 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4094 }
4095}
0baf16f2
AM		 4096
4097/* Pseudo-op .machine. */
0baf16f2
AM		 4098
4099static void
4100ppc_machine (ignore)
4101 int ignore ATTRIBUTE_UNUSED;
4102{
69c040df
AM		 4103 char *cpu_string;
4104#define MAX_HISTORY 100
4105 static unsigned long *cpu_history;
4106 static int curr_hist;
4107
4108 SKIP_WHITESPACE ();
4109
4110 if (*input_line_pointer == '"')
4111 {
4112 int len;
4113 cpu_string = demand_copy_C_string (&len);
4114 }
4115 else
4116 {
4117 char c;
4118 cpu_string = input_line_pointer;
4119 c = get_symbol_end ();
4120 cpu_string = xstrdup (cpu_string);
4121 *input_line_pointer = c;
4122 }
4123
4124 if (cpu_string != NULL)
4125 {
4126 unsigned long old_cpu = ppc_cpu;
4127 char *p;
4128
4129 for (p = cpu_string; *p != 0; p++)
4130 *p = TOLOWER (*p);
4131
4132 if (strcmp (cpu_string, "push") == 0)
4133 {
4134 if (cpu_history == NULL)
4135 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4136
4137 if (curr_hist >= MAX_HISTORY)
4138 as_bad (_(".machine stack overflow"));
4139 else
4140 cpu_history[curr_hist++] = ppc_cpu;
4141 }
4142 else if (strcmp (cpu_string, "pop") == 0)
4143 {
4144 if (curr_hist <= 0)
4145 as_bad (_(".machine stack underflow"));
4146 else
4147 ppc_cpu = cpu_history[--curr_hist];
4148 }
4149 else if (parse_cpu (cpu_string))
4150 ;
4151 else
4152 as_bad (_("invalid machine `%s'"), cpu_string);
4153
4154 if (ppc_cpu != old_cpu)
4155 ppc_setup_opcodes ();
4156 }
4157
4158 demand_empty_rest_of_line ();
0baf16f2
AM		 4159}
4160
4161/* See whether a symbol is in the TOC section. */
4162
4163static int
4164ppc_is_toc_sym (sym)
4165 symbolS *sym;
4166{
4167#ifdef OBJ_XCOFF
4168 return symbol_get_tc (sym)->class == XMC_TC;
4169#endif
4170#ifdef OBJ_ELF
4171 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4172 if (ppc_obj64)
0baf16f2
AM		 4173 return strcmp (sname, ".toc") == 0;
4174 else
4175 return strcmp (sname, ".got") == 0;
4176#endif
4177}
4178#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4179\f
4180#ifdef TE_PE
4181
99a814a1 4182/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4183
4184/* Set the current section. */
4185static void
4186ppc_set_current_section (new)
4187 segT new;
4188{
4189 ppc_previous_section = ppc_current_section;
4190 ppc_current_section = new;
4191}
4192
4193/* pseudo-op: .previous
4194 behaviour: toggles the current section with the previous section.
4195 errors: None
99a814a1
AM		 4196 warnings: "No previous section" */
4197
252b5132 4198static void
99a814a1 4199ppc_previous (ignore)
5480ccf3 4200 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4201{
4202 symbolS *tmp;
4203
81d4177b 4204 if (ppc_previous_section == NULL)
252b5132 4205 {
99a814a1 4206 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4207 return;
4208 }
4209
99a814a1 4210 subseg_set (ppc_previous_section, 0);
252b5132 4211
99a814a1 4212 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4213}
4214
4215/* pseudo-op: .pdata
4216 behaviour: predefined read only data section
b34976b6 4217 double word aligned
252b5132
RH		 4218 errors: None
4219 warnings: None
4220 initial: .section .pdata "adr3"
b34976b6 4221 a - don't know -- maybe a misprint
252b5132
RH		 4222 d - initialized data
4223 r - readable
4224 3 - double word aligned (that would be 4 byte boundary)
4225
4226 commentary:
4227 Tag index tables (also known as the function table) for exception
99a814a1 4228 handling, debugging, etc. */
252b5132 4229
252b5132 4230static void
99a814a1 4231ppc_pdata (ignore)
5480ccf3 4232 int ignore ATTRIBUTE_UNUSED;
252b5132 4233{
81d4177b 4234 if (pdata_section == 0)
252b5132
RH		 4235 {
4236 pdata_section = subseg_new (".pdata", 0);
81d4177b 4237
252b5132
RH		 4238 bfd_set_section_flags (stdoutput, pdata_section,
4239 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4240 | SEC_READONLY | SEC_DATA ));
81d4177b 4241
252b5132
RH		 4242 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4243 }
4244 else
4245 {
99a814a1 4246 pdata_section = subseg_new (".pdata", 0);
252b5132 4247 }
99a814a1 4248 ppc_set_current_section (pdata_section);
252b5132
RH		 4249}
4250
4251/* pseudo-op: .ydata
4252 behaviour: predefined read only data section
b34976b6 4253 double word aligned
252b5132
RH		 4254 errors: None
4255 warnings: None
4256 initial: .section .ydata "drw3"
b34976b6 4257 a - don't know -- maybe a misprint
252b5132
RH		 4258 d - initialized data
4259 r - readable
4260 3 - double word aligned (that would be 4 byte boundary)
4261 commentary:
4262 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4263 debugging, etc. */
4264
252b5132 4265static void
99a814a1 4266ppc_ydata (ignore)
5480ccf3 4267 int ignore ATTRIBUTE_UNUSED;
252b5132 4268{
81d4177b 4269 if (ydata_section == 0)
252b5132
RH		 4270 {
4271 ydata_section = subseg_new (".ydata", 0);
4272 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4273 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4274 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4275
4276 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4277 }
4278 else
4279 {
4280 ydata_section = subseg_new (".ydata", 0);
4281 }
99a814a1 4282 ppc_set_current_section (ydata_section);
252b5132
RH		 4283}
4284
4285/* pseudo-op: .reldata
4286 behaviour: predefined read write data section
b34976b6 4287 double word aligned (4-byte)
252b5132
RH		 4288 FIXME: relocation is applied to it
4289 FIXME: what's the difference between this and .data?
4290 errors: None
4291 warnings: None
4292 initial: .section .reldata "drw3"
4293 d - initialized data
4294 r - readable
4295 w - writeable
4296 3 - double word aligned (that would be 8 byte boundary)
4297
4298 commentary:
4299 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4300 function descriptors, etc. */
4301
252b5132 4302static void
99a814a1 4303ppc_reldata (ignore)
5480ccf3 4304 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4305{
4306 if (reldata_section == 0)
4307 {
4308 reldata_section = subseg_new (".reldata", 0);
4309
4310 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4311 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4312 | SEC_DATA));
252b5132
RH		 4313
4314 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4315 }
4316 else
4317 {
4318 reldata_section = subseg_new (".reldata", 0);
4319 }
99a814a1 4320 ppc_set_current_section (reldata_section);
252b5132
RH		 4321}
4322
4323/* pseudo-op: .rdata
4324 behaviour: predefined read only data section
b34976b6 4325 double word aligned
252b5132
RH		 4326 errors: None
4327 warnings: None
4328 initial: .section .rdata "dr3"
4329 d - initialized data
4330 r - readable
99a814a1
AM		 4331 3 - double word aligned (that would be 4 byte boundary) */
4332
252b5132 4333static void
99a814a1 4334ppc_rdata (ignore)
5480ccf3 4335 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4336{
4337 if (rdata_section == 0)
4338 {
4339 rdata_section = subseg_new (".rdata", 0);
4340 bfd_set_section_flags (stdoutput, rdata_section,
4341 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4342 | SEC_READONLY | SEC_DATA ));
4343
4344 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4345 }
4346 else
4347 {
4348 rdata_section = subseg_new (".rdata", 0);
4349 }
99a814a1 4350 ppc_set_current_section (rdata_section);
252b5132
RH		 4351}
4352
4353/* pseudo-op: .ualong
81d4177b 4354 behaviour: much like .int, with the exception that no alignment is
b34976b6 4355 performed.
252b5132
RH		 4356 FIXME: test the alignment statement
4357 errors: None
99a814a1
AM		 4358 warnings: None */
4359
252b5132 4360static void
99a814a1 4361ppc_ualong (ignore)
5480ccf3 4362 int ignore ATTRIBUTE_UNUSED;
252b5132 4363{
99a814a1
AM		 4364 /* Try for long. */
4365 cons (4);
252b5132
RH		 4366}
4367
4368/* pseudo-op: .znop <symbol name>
4369 behaviour: Issue a nop instruction
b34976b6 4370 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4371 the supplied symbol name.
4372 errors: None
99a814a1
AM		 4373 warnings: Missing symbol name */
4374
252b5132 4375static void
99a814a1 4376ppc_znop (ignore)
5480ccf3 4377 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4378{
4379 unsigned long insn;
4380 const struct powerpc_opcode *opcode;
4381 expressionS ex;
4382 char *f;
252b5132 4383 symbolS *sym;
252b5132
RH		 4384 char *symbol_name;
4385 char c;
4386 char *name;
4387 unsigned int exp;
4388 flagword flags;
4389 asection *sec;
4390
99a814a1 4391 /* Strip out the symbol name. */
252b5132
RH		 4392 symbol_name = input_line_pointer;
4393 c = get_symbol_end ();
4394
4395 name = xmalloc (input_line_pointer - symbol_name + 1);
4396 strcpy (name, symbol_name);
4397
4398 sym = symbol_find_or_make (name);
4399
4400 *input_line_pointer = c;
4401
4402 SKIP_WHITESPACE ();
4403
4404 /* Look up the opcode in the hash table. */
4405 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4406
99a814a1 4407 /* Stick in the nop. */
252b5132
RH		 4408 insn = opcode->opcode;
4409
4410 /* Write out the instruction. */
4411 f = frag_more (4);
4412 md_number_to_chars (f, insn, 4);
4413 fix_new (frag_now,
4414 f - frag_now->fr_literal,
4415 4,
4416 sym,
4417 0,
4418 0,
4419 BFD_RELOC_16_GOT_PCREL);
4420
4421}
4422
81d4177b
KH		 4423/* pseudo-op:
4424 behaviour:
4425 errors:
99a814a1
AM		 4426 warnings: */
4427
252b5132 4428static void
99a814a1 4429ppc_pe_comm (lcomm)
252b5132
RH		 4430 int lcomm;
4431{
4432 register char *name;
4433 register char c;
4434 register char *p;
4435 offsetT temp;
4436 register symbolS *symbolP;
4437 offsetT align;
4438
4439 name = input_line_pointer;
4440 c = get_symbol_end ();
4441
99a814a1 4442 /* just after name is now '\0'. */
252b5132
RH		 4443 p = input_line_pointer;
4444 *p = c;
4445 SKIP_WHITESPACE ();
4446 if (*input_line_pointer != ',')
4447 {
4448 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4449 ignore_rest_of_line ();
4450 return;
4451 }
4452
4453 input_line_pointer++; /* skip ',' */
4454 if ((temp = get_absolute_expression ()) < 0)
4455 {
4456 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4457 ignore_rest_of_line ();
4458 return;
4459 }
4460
4461 if (! lcomm)
4462 {
4463 /* The third argument to .comm is the alignment. */
4464 if (*input_line_pointer != ',')
4465 align = 3;
4466 else
4467 {
4468 ++input_line_pointer;
4469 align = get_absolute_expression ();
4470 if (align <= 0)
4471 {
4472 as_warn (_("ignoring bad alignment"));
4473 align = 3;
4474 }
4475 }
4476 }
4477
4478 *p = 0;
4479 symbolP = symbol_find_or_make (name);
4480
4481 *p = c;
4482 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4483 {
4484 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4485 S_GET_NAME (symbolP));
4486 ignore_rest_of_line ();
4487 return;
4488 }
4489
4490 if (S_GET_VALUE (symbolP))
4491 {
4492 if (S_GET_VALUE (symbolP) != (valueT) temp)
4493 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4494 S_GET_NAME (symbolP),
4495 (long) S_GET_VALUE (symbolP),
4496 (long) temp);
4497 }
4498 else
4499 {
4500 S_SET_VALUE (symbolP, (valueT) temp);
4501 S_SET_EXTERNAL (symbolP);
86ebace2 4502 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4503 }
4504
4505 demand_empty_rest_of_line ();
4506}
4507
4508/*
4509 * implement the .section pseudo op:
4510 * .section name {, "flags"}
4511 * ^ ^
4512 * | +--- optional flags: 'b' for bss
4513 * | 'i' for info
4514 * +-- section name 'l' for lib
4515 * 'n' for noload
4516 * 'o' for over
4517 * 'w' for data
4518 * 'd' (apparently m88k for data)
4519 * 'x' for text
4520 * But if the argument is not a quoted string, treat it as a
4521 * subsegment number.
4522 *
4523 * FIXME: this is a copy of the section processing from obj-coff.c, with
4524 * additions/changes for the moto-pas assembler support. There are three
4525 * categories:
4526 *
81d4177b 4527 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4528 * setting bits that bfd probably neither understands or uses. The
4529 * correct approach (?) will have to incorporate extra fields attached
4530 * to the section to hold the system specific stuff. (krk)
4531 *
4532 * Section Contents:
4533 * 'a' - unknown - referred to in documentation, but no definition supplied
4534 * 'c' - section has code
4535 * 'd' - section has initialized data
4536 * 'u' - section has uninitialized data
4537 * 'i' - section contains directives (info)
4538 * 'n' - section can be discarded
4539 * 'R' - remove section at link time
4540 *
4541 * Section Protection:
4542 * 'r' - section is readable
4543 * 'w' - section is writeable
4544 * 'x' - section is executable
4545 * 's' - section is sharable
4546 *
4547 * Section Alignment:
4548 * '0' - align to byte boundary
4549 * '1' - align to halfword undary
4550 * '2' - align to word boundary
4551 * '3' - align to doubleword boundary
4552 * '4' - align to quadword boundary
4553 * '5' - align to 32 byte boundary
4554 * '6' - align to 64 byte boundary
4555 *
4556 */
4557
4558void
4559ppc_pe_section (ignore)
5480ccf3 4560 int ignore ATTRIBUTE_UNUSED;
252b5132 4561{
99a814a1 4562 /* Strip out the section name. */
252b5132
RH		 4563 char *section_name;
4564 char c;
4565 char *name;
4566 unsigned int exp;
4567 flagword flags;
4568 segT sec;
4569 int align;
4570
4571 section_name = input_line_pointer;
4572 c = get_symbol_end ();
4573
4574 name = xmalloc (input_line_pointer - section_name + 1);
4575 strcpy (name, section_name);
4576
4577 *input_line_pointer = c;
4578
4579 SKIP_WHITESPACE ();
4580
4581 exp = 0;
4582 flags = SEC_NO_FLAGS;
4583
4584 if (strcmp (name, ".idata$2") == 0)
4585 {
4586 align = 0;
4587 }
4588 else if (strcmp (name, ".idata$3") == 0)
4589 {
4590 align = 0;
4591 }
4592 else if (strcmp (name, ".idata$4") == 0)
4593 {
4594 align = 2;
4595 }
4596 else if (strcmp (name, ".idata$5") == 0)
4597 {
4598 align = 2;
4599 }
4600 else if (strcmp (name, ".idata$6") == 0)
4601 {
4602 align = 1;
4603 }
4604 else
99a814a1
AM		 4605 /* Default alignment to 16 byte boundary. */
4606 align = 4;
252b5132
RH		 4607
4608 if (*input_line_pointer == ',')
4609 {
4610 ++input_line_pointer;
4611 SKIP_WHITESPACE ();
4612 if (*input_line_pointer != '"')
4613 exp = get_absolute_expression ();
4614 else
4615 {
4616 ++input_line_pointer;
4617 while (*input_line_pointer != '"'
4618 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4619 {
4620 switch (*input_line_pointer)
4621 {
4622 /* Section Contents */
4623 case 'a': /* unknown */
4624 as_bad (_("Unsupported section attribute -- 'a'"));
4625 break;
4626 case 'c': /* code section */
81d4177b 4627 flags |= SEC_CODE;
252b5132
RH		 4628 break;
4629 case 'd': /* section has initialized data */
4630 flags |= SEC_DATA;
4631 break;
4632 case 'u': /* section has uninitialized data */
4633 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4634 in winnt.h */
4635 flags |= SEC_ROM;
4636 break;
4637 case 'i': /* section contains directives (info) */
4638 /* FIXME: This is IMAGE_SCN_LNK_INFO
4639 in winnt.h */
4640 flags |= SEC_HAS_CONTENTS;
4641 break;
4642 case 'n': /* section can be discarded */
81d4177b 4643 flags &=~ SEC_LOAD;
252b5132
RH		 4644 break;
4645 case 'R': /* Remove section at link time */
4646 flags |= SEC_NEVER_LOAD;
4647 break;
4648
4649 /* Section Protection */
4650 case 'r': /* section is readable */
4651 flags |= IMAGE_SCN_MEM_READ;
4652 break;
4653 case 'w': /* section is writeable */
4654 flags |= IMAGE_SCN_MEM_WRITE;
4655 break;
4656 case 'x': /* section is executable */
4657 flags |= IMAGE_SCN_MEM_EXECUTE;
4658 break;
4659 case 's': /* section is sharable */
4660 flags |= IMAGE_SCN_MEM_SHARED;
4661 break;
4662
4663 /* Section Alignment */
4664 case '0': /* align to byte boundary */
4665 flags |= IMAGE_SCN_ALIGN_1BYTES;
4666 align = 0;
4667 break;
4668 case '1': /* align to halfword boundary */
4669 flags |= IMAGE_SCN_ALIGN_2BYTES;
4670 align = 1;
4671 break;
4672 case '2': /* align to word boundary */
4673 flags |= IMAGE_SCN_ALIGN_4BYTES;
4674 align = 2;
4675 break;
4676 case '3': /* align to doubleword boundary */
4677 flags |= IMAGE_SCN_ALIGN_8BYTES;
4678 align = 3;
4679 break;
4680 case '4': /* align to quadword boundary */
4681 flags |= IMAGE_SCN_ALIGN_16BYTES;
4682 align = 4;
4683 break;
4684 case '5': /* align to 32 byte boundary */
4685 flags |= IMAGE_SCN_ALIGN_32BYTES;
4686 align = 5;
4687 break;
4688 case '6': /* align to 64 byte boundary */
4689 flags |= IMAGE_SCN_ALIGN_64BYTES;
4690 align = 6;
4691 break;
4692
4693 default:
99a814a1
AM		 4694 as_bad (_("unknown section attribute '%c'"),
4695 *input_line_pointer);
252b5132
RH		 4696 break;
4697 }
4698 ++input_line_pointer;
4699 }
4700 if (*input_line_pointer == '"')
4701 ++input_line_pointer;
4702 }
4703 }
4704
4705 sec = subseg_new (name, (subsegT) exp);
4706
99a814a1 4707 ppc_set_current_section (sec);
252b5132
RH		 4708
4709 if (flags != SEC_NO_FLAGS)
4710 {
4711 if (! bfd_set_section_flags (stdoutput, sec, flags))
4712 as_bad (_("error setting flags for \"%s\": %s"),
4713 bfd_section_name (stdoutput, sec),
4714 bfd_errmsg (bfd_get_error ()));
4715 }
4716
99a814a1 4717 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4718
4719}
4720
4721static void
4722ppc_pe_function (ignore)
5480ccf3 4723 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4724{
4725 char *name;
4726 char endc;
4727 symbolS *ext_sym;
4728
4729 name = input_line_pointer;
4730 endc = get_symbol_end ();
4731
4732 ext_sym = symbol_find_or_make (name);
4733
4734 *input_line_pointer = endc;
4735
4736 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4737 SF_SET_FUNCTION (ext_sym);
4738 SF_SET_PROCESS (ext_sym);
4739 coff_add_linesym (ext_sym);
4740
4741 demand_empty_rest_of_line ();
4742}
4743
4744static void
4745ppc_pe_tocd (ignore)
5480ccf3 4746 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4747{
4748 if (tocdata_section == 0)
4749 {
4750 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4751 /* FIXME: section flags won't work. */
252b5132
RH		 4752 bfd_set_section_flags (stdoutput, tocdata_section,
4753 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4754 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4755
4756 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4757 }
4758 else
4759 {
4760 rdata_section = subseg_new (".tocd", 0);
4761 }
4762
99a814a1 4763 ppc_set_current_section (tocdata_section);
252b5132
RH		 4764
4765 demand_empty_rest_of_line ();
4766}
4767
4768/* Don't adjust TOC relocs to use the section symbol. */
4769
4770int
4771ppc_pe_fix_adjustable (fix)
4772 fixS *fix;
4773{
4774 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4775}
4776
4777#endif
4778\f
4779#ifdef OBJ_XCOFF
4780
4781/* XCOFF specific symbol and file handling. */
4782
4783/* Canonicalize the symbol name. We use the to force the suffix, if
4784 any, to use square brackets, and to be in upper case. */
4785
4786char *
4787ppc_canonicalize_symbol_name (name)
4788 char *name;
4789{
4790 char *s;
4791
4792 if (ppc_stab_symbol)
4793 return name;
4794
4795 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4796 ;
4797 if (*s != '\0')
4798 {
4799 char brac;
4800
4801 if (*s == '[')
4802 brac = ']';
4803 else
4804 {
4805 *s = '[';
4806 brac = '}';
4807 }
4808
4809 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4810 *s = TOUPPER (*s);
252b5132
RH		 4811
4812 if (*s == '\0' || s[1] != '\0')
4813 as_bad (_("bad symbol suffix"));
4814
4815 *s = ']';
4816 }
4817
4818 return name;
4819}
4820
4821/* Set the class of a symbol based on the suffix, if any. This is
4822 called whenever a new symbol is created. */
4823
4824void
4825ppc_symbol_new_hook (sym)
4826 symbolS *sym;
4827{
809ffe0d 4828 struct ppc_tc_sy *tc;
252b5132
RH		 4829 const char *s;
4830
809ffe0d
ILT		 4831 tc = symbol_get_tc (sym);
4832 tc->next = NULL;
4833 tc->output = 0;
4834 tc->class = -1;
4835 tc->real_name = NULL;
4836 tc->subseg = 0;
4837 tc->align = 0;
4838 tc->size = NULL;
4839 tc->within = NULL;
252b5132
RH		 4840
4841 if (ppc_stab_symbol)
4842 return;
4843
4844 s = strchr (S_GET_NAME (sym), '[');
4845 if (s == (const char *) NULL)
4846 {
4847 /* There is no suffix. */
4848 return;
4849 }
4850
4851 ++s;
4852
4853 switch (s[0])
4854 {
4855 case 'B':
4856 if (strcmp (s, "BS]") == 0)
809ffe0d 4857 tc->class = XMC_BS;
252b5132
RH		 4858 break;
4859 case 'D':
4860 if (strcmp (s, "DB]") == 0)
809ffe0d 4861 tc->class = XMC_DB;
252b5132 4862 else if (strcmp (s, "DS]") == 0)
809ffe0d 4863 tc->class = XMC_DS;
252b5132
RH		 4864 break;
4865 case 'G':
4866 if (strcmp (s, "GL]") == 0)
809ffe0d 4867 tc->class = XMC_GL;
252b5132
RH		 4868 break;
4869 case 'P':
4870 if (strcmp (s, "PR]") == 0)
809ffe0d 4871 tc->class = XMC_PR;
252b5132
RH		 4872 break;
4873 case 'R':
4874 if (strcmp (s, "RO]") == 0)
809ffe0d 4875 tc->class = XMC_RO;
252b5132 4876 else if (strcmp (s, "RW]") == 0)
809ffe0d 4877 tc->class = XMC_RW;
252b5132
RH		 4878 break;
4879 case 'S':
4880 if (strcmp (s, "SV]") == 0)
809ffe0d 4881 tc->class = XMC_SV;
252b5132
RH		 4882 break;
4883 case 'T':
4884 if (strcmp (s, "TC]") == 0)
809ffe0d 4885 tc->class = XMC_TC;
252b5132 4886 else if (strcmp (s, "TI]") == 0)
809ffe0d 4887 tc->class = XMC_TI;
252b5132 4888 else if (strcmp (s, "TB]") == 0)
809ffe0d 4889 tc->class = XMC_TB;
252b5132 4890 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4891 tc->class = XMC_TC0;
252b5132
RH		 4892 break;
4893 case 'U':
4894 if (strcmp (s, "UA]") == 0)
809ffe0d 4895 tc->class = XMC_UA;
252b5132 4896 else if (strcmp (s, "UC]") == 0)
809ffe0d 4897 tc->class = XMC_UC;
252b5132
RH		 4898 break;
4899 case 'X':
4900 if (strcmp (s, "XO]") == 0)
809ffe0d 4901 tc->class = XMC_XO;
252b5132
RH		 4902 break;
4903 }
4904
809ffe0d 4905 if (tc->class == -1)
252b5132
RH		 4906 as_bad (_("Unrecognized symbol suffix"));
4907}
4908
4909/* Set the class of a label based on where it is defined. This
4910 handles symbols without suffixes. Also, move the symbol so that it
4911 follows the csect symbol. */
4912
4913void
4914ppc_frob_label (sym)
4915 symbolS *sym;
4916{
4917 if (ppc_current_csect != (symbolS *) NULL)
4918 {
809ffe0d
ILT		 4919 if (symbol_get_tc (sym)->class == -1)
4920 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4921
4922 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4923 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4924 &symbol_rootP, &symbol_lastP);
4925 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4926 }
07a53e5c
RH		 4927
4928#ifdef OBJ_ELF
4929 dwarf2_emit_label (sym);
4930#endif
252b5132
RH		 4931}
4932
4933/* This variable is set by ppc_frob_symbol if any absolute symbols are
4934 seen. It tells ppc_adjust_symtab whether it needs to look through
4935 the symbols. */
4936
b34976b6 4937static bfd_boolean ppc_saw_abs;
252b5132
RH		 4938
4939/* Change the name of a symbol just before writing it out. Set the
4940 real name if the .rename pseudo-op was used. Otherwise, remove any
4941 class suffix. Return 1 if the symbol should not be included in the
4942 symbol table. */
4943
4944int
4945ppc_frob_symbol (sym)
4946 symbolS *sym;
4947{
4948 static symbolS *ppc_last_function;
4949 static symbolS *set_end;
4950
4951 /* Discard symbols that should not be included in the output symbol
4952 table. */
809ffe0d
ILT		 4953 if (! symbol_used_in_reloc_p (sym)
4954 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4955 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4956 && ! symbol_get_tc (sym)->output
252b5132
RH		 4957 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4958 return 1;
4959
a161fe53
AM		 4960 /* This one will disappear anyway. Don't make a csect sym for it. */
4961 if (sym == abs_section_sym)
4962 return 1;
4963
809ffe0d
ILT		 4964 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4965 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4966 else
4967 {
4968 const char *name;
4969 const char *s;
4970
4971 name = S_GET_NAME (sym);
4972 s = strchr (name, '[');
4973 if (s != (char *) NULL)
4974 {
4975 unsigned int len;
4976 char *snew;
4977
4978 len = s - name;
4979 snew = xmalloc (len + 1);
4980 memcpy (snew, name, len);
4981 snew[len] = '\0';
4982
4983 S_SET_NAME (sym, snew);
4984 }
4985 }
4986
4987 if (set_end != (symbolS *) NULL)
4988 {
4989 SA_SET_SYM_ENDNDX (set_end, sym);
4990 set_end = NULL;
4991 }
4992
4993 if (SF_GET_FUNCTION (sym))
4994 {
4995 if (ppc_last_function != (symbolS *) NULL)
4996 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4997 ppc_last_function = sym;
809ffe0d 4998 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4999 {
6386f3a7 5000 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5001 SA_SET_SYM_FSIZE (sym,
5002 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5003 }
5004 }
5005 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5006 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5007 {
5008 if (ppc_last_function == (symbolS *) NULL)
5009 as_bad (_(".ef with no preceding .function"));
5010 else
5011 {
5012 set_end = ppc_last_function;
5013 ppc_last_function = NULL;
5014
5015 /* We don't have a C_EFCN symbol, but we need to force the
5016 COFF backend to believe that it has seen one. */
5017 coff_last_function = NULL;
5018 }
5019 }
5020
670ec21d 5021 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5022 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5023 && S_GET_STORAGE_CLASS (sym) != C_FILE
5024 && S_GET_STORAGE_CLASS (sym) != C_FCN
5025 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5026 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5027 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5028 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5029 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5030 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5031 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5032
5033 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5034 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5035 {
5036 int i;
5037 union internal_auxent *a;
5038
5039 /* Create a csect aux. */
5040 i = S_GET_NUMBER_AUXILIARY (sym);
5041 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 5042 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5043 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 5044 {
5045 /* This is the TOC table. */
5046 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5047 a->x_csect.x_scnlen.l = 0;
5048 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5049 }
809ffe0d 5050 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5051 {
5052 /* This is a csect symbol. x_scnlen is the size of the
5053 csect. */
809ffe0d 5054 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5055 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5056 S_GET_SEGMENT (sym))
5057 - S_GET_VALUE (sym));
5058 else
5059 {
6386f3a7 5060 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5061 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5062 - S_GET_VALUE (sym));
5063 }
809ffe0d 5064 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5065 }
5066 else if (S_GET_SEGMENT (sym) == bss_section)
5067 {
5068 /* This is a common symbol. */
809ffe0d
ILT		 5069 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5070 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5071 if (S_IS_EXTERNAL (sym))
809ffe0d 5072 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5073 else
809ffe0d 5074 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5075 }
5076 else if (S_GET_SEGMENT (sym) == absolute_section)
5077 {
5078 /* This is an absolute symbol. The csect will be created by
99a814a1 5079 ppc_adjust_symtab. */
b34976b6 5080 ppc_saw_abs = TRUE;
252b5132 5081 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5082 if (symbol_get_tc (sym)->class == -1)
5083 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5084 }
5085 else if (! S_IS_DEFINED (sym))
5086 {
5087 /* This is an external symbol. */
5088 a->x_csect.x_scnlen.l = 0;
5089 a->x_csect.x_smtyp = XTY_ER;
5090 }
809ffe0d 5091 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5092 {
5093 symbolS *next;
5094
5095 /* This is a TOC definition. x_scnlen is the size of the
5096 TOC entry. */
5097 next = symbol_next (sym);
809ffe0d 5098 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5099 next = symbol_next (next);
5100 if (next == (symbolS *) NULL
809ffe0d 5101 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5102 {
5103 if (ppc_after_toc_frag == (fragS *) NULL)
5104 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5105 data_section)
5106 - S_GET_VALUE (sym));
5107 else
5108 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5109 - S_GET_VALUE (sym));
5110 }
5111 else
5112 {
6386f3a7 5113 resolve_symbol_value (next);
252b5132
RH		 5114 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5115 - S_GET_VALUE (sym));
5116 }
5117 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5118 }
5119 else
5120 {
5121 symbolS *csect;
5122
5123 /* This is a normal symbol definition. x_scnlen is the
5124 symbol index of the containing csect. */
5125 if (S_GET_SEGMENT (sym) == text_section)
5126 csect = ppc_text_csects;
5127 else if (S_GET_SEGMENT (sym) == data_section)
5128 csect = ppc_data_csects;
5129 else
5130 abort ();
5131
5132 /* Skip the initial dummy symbol. */
809ffe0d 5133 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5134
5135 if (csect == (symbolS *) NULL)
5136 {
5137 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5138 a->x_csect.x_scnlen.l = 0;
5139 }
5140 else
5141 {
809ffe0d 5142 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5143 {
6386f3a7 5144 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5145 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5146 > S_GET_VALUE (sym))
252b5132 5147 break;
809ffe0d 5148 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5149 }
5150
809ffe0d
ILT		 5151 a->x_csect.x_scnlen.p =
5152 coffsymbol (symbol_get_bfdsym (csect))->native;
5153 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5154 1;
252b5132
RH		 5155 }
5156 a->x_csect.x_smtyp = XTY_LD;
5157 }
81d4177b 5158
252b5132
RH		 5159 a->x_csect.x_parmhash = 0;
5160 a->x_csect.x_snhash = 0;
809ffe0d 5161 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5162 a->x_csect.x_smclas = XMC_PR;
5163 else
809ffe0d 5164 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5165 a->x_csect.x_stab = 0;
5166 a->x_csect.x_snstab = 0;
5167
5168 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5169 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5170 }
5171 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5172 {
5173 /* We want the value to be the symbol index of the referenced
5174 csect symbol. BFD will do that for us if we set the right
5175 flags. */
b782de16
AM		 5176 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5177 combined_entry_type *c = coffsymbol (bsym)->native;
5178
5179 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5180 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5181 }
5182 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5183 {
5184 symbolS *block;
5185 symbolS *csect;
5186
5187 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5188 block = symbol_get_tc (sym)->within;
5189 csect = symbol_get_tc (block)->within;
6386f3a7 5190 resolve_symbol_value (csect);
252b5132
RH		 5191 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5192 }
5193 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5194 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5195 {
5196 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5197 BFD will do that for us if we set the right flags. We have
5198 already set the value correctly. */
809ffe0d 5199 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5200 }
5201
5202 return 0;
5203}
5204
5205/* Adjust the symbol table. This creates csect symbols for all
5206 absolute symbols. */
5207
5208void
5209ppc_adjust_symtab ()
5210{
5211 symbolS *sym;
5212
5213 if (! ppc_saw_abs)
5214 return;
5215
5216 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5217 {
5218 symbolS *csect;
5219 int i;
5220 union internal_auxent *a;
5221
5222 if (S_GET_SEGMENT (sym) != absolute_section)
5223 continue;
5224
5225 csect = symbol_create (".abs[XO]", absolute_section,
5226 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5227 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5228 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5229 i = S_GET_NUMBER_AUXILIARY (csect);
5230 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5231 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5232 a->x_csect.x_scnlen.l = 0;
5233 a->x_csect.x_smtyp = XTY_SD;
5234 a->x_csect.x_parmhash = 0;
5235 a->x_csect.x_snhash = 0;
5236 a->x_csect.x_smclas = XMC_XO;
5237 a->x_csect.x_stab = 0;
5238 a->x_csect.x_snstab = 0;
5239
5240 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5241
5242 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5243 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5244 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5245 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5246 }
5247
b34976b6 5248 ppc_saw_abs = FALSE;
252b5132
RH		 5249}
5250
5251/* Set the VMA for a section. This is called on all the sections in
5252 turn. */
5253
5254void
5255ppc_frob_section (sec)
5256 asection *sec;
5257{
931e13a6 5258 static bfd_vma vma = 0;
252b5132 5259
931e13a6 5260 vma = md_section_align (sec, vma);
252b5132
RH		 5261 bfd_set_section_vma (stdoutput, sec, vma);
5262 vma += bfd_section_size (stdoutput, sec);
5263}
5264
5265#endif /* OBJ_XCOFF */
5266\f
5267/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5268 of type TYPE, and store the appropriate bytes in *LITP. The number
5269 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5270 returned, or NULL on OK. */
5271
5272char *
5273md_atof (type, litp, sizep)
5274 int type;
5275 char *litp;
5276 int *sizep;
5277{
5278 int prec;
5279 LITTLENUM_TYPE words[4];
5280 char *t;
5281 int i;
5282
5283 switch (type)
5284 {
5285 case 'f':
5286 prec = 2;
5287 break;
5288
5289 case 'd':
5290 prec = 4;
5291 break;
5292
5293 default:
5294 *sizep = 0;
5295 return _("bad call to md_atof");
5296 }
5297
5298 t = atof_ieee (input_line_pointer, type, words);
5299 if (t)
5300 input_line_pointer = t;
5301
5302 *sizep = prec * 2;
5303
5304 if (target_big_endian)
5305 {
5306 for (i = 0; i < prec; i++)
5307 {
5308 md_number_to_chars (litp, (valueT) words[i], 2);
5309 litp += 2;
5310 }
5311 }
5312 else
5313 {
5314 for (i = prec - 1; i >= 0; i--)
5315 {
5316 md_number_to_chars (litp, (valueT) words[i], 2);
5317 litp += 2;
5318 }
5319 }
81d4177b 5320
252b5132
RH		 5321 return NULL;
5322}
5323
5324/* Write a value out to the object file, using the appropriate
5325 endianness. */
5326
5327void
5328md_number_to_chars (buf, val, n)
5329 char *buf;
5330 valueT val;
5331 int n;
5332{
5333 if (target_big_endian)
5334 number_to_chars_bigendian (buf, val, n);
5335 else
5336 number_to_chars_littleendian (buf, val, n);
5337}
5338
5339/* Align a section (I don't know why this is machine dependent). */
5340
5341valueT
3aeeedbb 5342md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5343{
3aeeedbb
AM		 5344#ifdef OBJ_ELF
5345 return addr;
5346#else
252b5132
RH		 5347 int align = bfd_get_section_alignment (stdoutput, seg);
5348
5349 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5350#endif
252b5132
RH		 5351}
5352
5353/* We don't have any form of relaxing. */
5354
5355int
5356md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5357 fragS *fragp ATTRIBUTE_UNUSED;
5358 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5359{
5360 abort ();
5361 return 0;
5362}
5363
5364/* Convert a machine dependent frag. We never generate these. */
5365
5366void
5367md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5368 bfd *abfd ATTRIBUTE_UNUSED;
5369 asection *sec ATTRIBUTE_UNUSED;
5370 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5371{
5372 abort ();
5373}
5374
5375/* We have no need to default values of symbols. */
5376
252b5132
RH		 5377symbolS *
5378md_undefined_symbol (name)
92161534 5379 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5380{
5381 return 0;
5382}
5383\f
5384/* Functions concerning relocs. */
5385
5386/* The location from which a PC relative jump should be calculated,
5387 given a PC relative reloc. */
5388
5389long
5390md_pcrel_from_section (fixp, sec)
5391 fixS *fixp;
92161534 5392 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5393{
5394 return fixp->fx_frag->fr_address + fixp->fx_where;
5395}
5396
5397#ifdef OBJ_XCOFF
5398
5399/* This is called to see whether a fixup should be adjusted to use a
5400 section symbol. We take the opportunity to change a fixup against
5401 a symbol in the TOC subsegment into a reloc against the
5402 corresponding .tc symbol. */
5403
5404int
5405ppc_fix_adjustable (fix)
5406 fixS *fix;
5407{
b782de16
AM		 5408 valueT val = resolve_symbol_value (fix->fx_addsy);
5409 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5410 TC_SYMFIELD_TYPE *tc;
5411
5412 if (symseg == absolute_section)
5413 return 0;
252b5132 5414
252b5132 5415 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5416 && fix->fx_addsy != ppc_toc_csect
b782de16 5417 && symseg == data_section
252b5132
RH		 5418 && val >= ppc_toc_frag->fr_address
5419 && (ppc_after_toc_frag == (fragS *) NULL
5420 || val < ppc_after_toc_frag->fr_address))
5421 {
5422 symbolS *sy;
5423
5424 for (sy = symbol_next (ppc_toc_csect);
5425 sy != (symbolS *) NULL;
5426 sy = symbol_next (sy))
5427 {
b782de16
AM		 5428 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5429
5430 if (sy_tc->class == XMC_TC0)
252b5132 5431 continue;
b782de16 5432 if (sy_tc->class != XMC_TC)
252b5132 5433 break;
b782de16 5434 if (val == resolve_symbol_value (sy))
252b5132
RH		 5435 {
5436 fix->fx_addsy = sy;
5437 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5438 return 0;
5439 }
5440 }
5441
5442 as_bad_where (fix->fx_file, fix->fx_line,
5443 _("symbol in .toc does not match any .tc"));
5444 }
5445
5446 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5447 tc = symbol_get_tc (fix->fx_addsy);
5448 if (tc->subseg == 0
5449 && tc->class != XMC_TC0
5450 && tc->class != XMC_TC
5451 && symseg != bss_section
252b5132 5452 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5453 && (symseg != data_section
252b5132
RH		 5454 || ppc_toc_csect == NULL
5455 || val < ppc_toc_frag->fr_address
5456 || (ppc_after_toc_frag != NULL
5457 && val >= ppc_after_toc_frag->fr_address)))
5458 {
5459 symbolS *csect;
b782de16 5460 symbolS *next_csect;
252b5132 5461
b782de16 5462 if (symseg == text_section)
252b5132 5463 csect = ppc_text_csects;
b782de16 5464 else if (symseg == data_section)
252b5132
RH		 5465 csect = ppc_data_csects;
5466 else
5467 abort ();
5468
5469 /* Skip the initial dummy symbol. */
809ffe0d 5470 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5471
5472 if (csect != (symbolS *) NULL)
5473 {
b782de16
AM		 5474 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5475 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5476 {
5477 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5478 have to look through the full symbol table to see
5479 whether this is the csect we want. Note that we will
5480 only get here if the csect has zero length. */
b782de16
AM		 5481 if (symbol_get_frag (csect)->fr_address == val
5482 && S_GET_VALUE (csect) == val)
252b5132
RH		 5483 {
5484 symbolS *scan;
5485
809ffe0d 5486 for (scan = symbol_next (csect);
252b5132 5487 scan != NULL;
809ffe0d 5488 scan = symbol_next (scan))
252b5132 5489 {
809ffe0d 5490 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5491 break;
5492 if (scan == fix->fx_addsy)
5493 break;
5494 }
5495
5496 /* If we found the symbol before the next csect
99a814a1 5497 symbol, then this is the csect we want. */
252b5132
RH		 5498 if (scan == fix->fx_addsy)
5499 break;
5500 }
5501
b782de16 5502 csect = next_csect;
252b5132
RH		 5503 }
5504
b782de16 5505 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5506 fix->fx_addsy = csect;
5507 }
b782de16 5508 return 0;
252b5132
RH		 5509 }
5510
5511 /* Adjust a reloc against a .lcomm symbol to be against the base
5512 .lcomm. */
b782de16 5513 if (symseg == bss_section
252b5132
RH		 5514 && ! S_IS_EXTERNAL (fix->fx_addsy))
5515 {
b782de16
AM		 5516 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5517
5518 fix->fx_offset += val - resolve_symbol_value (sy);
5519 fix->fx_addsy = sy;
252b5132
RH		 5520 }
5521
5522 return 0;
5523}
5524
5525/* A reloc from one csect to another must be kept. The assembler
5526 will, of course, keep relocs between sections, and it will keep
5527 absolute relocs, but we need to force it to keep PC relative relocs
5528 between two csects in the same section. */
5529
5530int
5531ppc_force_relocation (fix)
5532 fixS *fix;
5533{
5534 /* At this point fix->fx_addsy should already have been converted to
5535 a csect symbol. If the csect does not include the fragment, then
5536 we need to force the relocation. */
5537 if (fix->fx_pcrel
5538 && fix->fx_addsy != NULL
809ffe0d
ILT		 5539 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5540 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5541 > fix->fx_frag->fr_address)
5542 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5543 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5544 <= fix->fx_frag->fr_address))))
5545 return 1;
5546
ae6063d4 5547 return generic_force_reloc (fix);
252b5132
RH		 5548}
5549
5550#endif /* OBJ_XCOFF */
5551
0baf16f2 5552#ifdef OBJ_ELF
a161fe53
AM		 5553/* If this function returns non-zero, it guarantees that a relocation
5554 will be emitted for a fixup. */
5555
5556int
5557ppc_force_relocation (fix)
5558 fixS *fix;
5559{
5560 /* Branch prediction relocations must force a relocation, as must
5561 the vtable description relocs. */
5562 switch (fix->fx_r_type)
5563 {
5564 case BFD_RELOC_PPC_B16_BRTAKEN:
5565 case BFD_RELOC_PPC_B16_BRNTAKEN:
5566 case BFD_RELOC_PPC_BA16_BRTAKEN:
5567 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5568 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5569 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5570 return 1;
5571 default:
5572 break;
5573 }
5574
cdba85ec
AM		 5575 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5576 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5577 return 1;
5578
ae6063d4 5579 return generic_force_reloc (fix);
a161fe53
AM		 5580}
5581
0baf16f2
AM		 5582int
5583ppc_fix_adjustable (fix)
5584 fixS *fix;
252b5132 5585{
0baf16f2
AM		 5586 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5587 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5588 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5589 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5590 && fix->fx_r_type != BFD_RELOC_GPREL16
5591 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5592 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5593 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5594 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5595}
0baf16f2 5596#endif
252b5132 5597
3aeeedbb
AM		 5598/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5599 rs_align_code frag. */
5600
5601void
5602ppc_handle_align (struct frag *fragP)
5603{
5604 valueT count = (fragP->fr_next->fr_address
5605 - (fragP->fr_address + fragP->fr_fix));
5606
5607 if (count != 0 && (count & 3) == 0)
5608 {
5609 char *dest = fragP->fr_literal + fragP->fr_fix;
5610
5611 fragP->fr_var = 4;
5612 md_number_to_chars (dest, 0x60000000, 4);
5613
5614 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5615 {
5616 /* For power6, we want the last nop to be a group terminating
5617 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5618 immediately after this one, with its address set to the last
5619 nop location. This will automatically reduce the number of
5620 nops in the current frag by one. */
5621 if (count > 4)
5622 {
5623 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5624
5625 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5626 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5627 group_nop->fr_fix = 0;
5628 group_nop->fr_offset = 1;
5629 group_nop->fr_type = rs_fill;
5630 fragP->fr_next = group_nop;
5631 dest = group_nop->fr_literal;
5632 }
5633
5634 md_number_to_chars (dest, 0x60210000, 4);
5635 }
5636 }
5637}
5638
252b5132
RH		 5639/* Apply a fixup to the object code. This is called for all the
5640 fixups we generated by the call to fix_new_exp, above. In the call
5641 above we used a reloc code which was the largest legal reloc code
5642 plus the operand index. Here we undo that to recover the operand
5643 index. At this point all symbol values should be fully resolved,
5644 and we attempt to completely resolve the reloc. If we can not do
5645 that, we determine the correct reloc code and put it back in the
5646 fixup. */
5647
94f592af 5648void
55cf6793 5649md_apply_fix (fixP, valP, seg)
94f592af
NC		 5650 fixS *fixP;
5651 valueT * valP;
0baf16f2 5652 segT seg ATTRIBUTE_UNUSED;
252b5132 5653{
94f592af 5654 valueT value = * valP;
252b5132
RH		 5655
5656#ifdef OBJ_ELF
94f592af 5657 if (fixP->fx_addsy != NULL)
252b5132 5658 {
a161fe53 5659 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5660 if (fixP->fx_pcrel)
5661 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5662 }
5663 else
94f592af 5664 fixP->fx_done = 1;
252b5132 5665#else
a161fe53 5666 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5667 the symbol values. If we are doing this relocation the code in
5668 write.c is going to call bfd_install_relocation, which is also
5669 going to use the symbol value. That means that if the reloc is
5670 fully resolved we want to use *valP since bfd_install_relocation is
5671 not being used.
252b5132 5672 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5673 *valP, and must use fx_offset instead. However, if the reloc
5674 is PC relative, we do want to use *valP since it includes the
252b5132 5675 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5676 if (fixP->fx_addsy == (symbolS *) NULL)
5677 fixP->fx_done = 1;
5678
5679 else if (fixP->fx_pcrel)
5680 ;
5681
252b5132 5682 else
a161fe53
AM		 5683 value = fixP->fx_offset;
5684#endif
5685
5686 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5687 {
a161fe53
AM		 5688 /* We can't actually support subtracting a symbol. */
5689 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5690 }
252b5132 5691
94f592af 5692 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5693 {
5694 int opindex;
5695 const struct powerpc_operand *operand;
5696 char *where;
5697 unsigned long insn;
5698
94f592af 5699 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5700
5701 operand = &powerpc_operands[opindex];
5702
5703#ifdef OBJ_XCOFF
0baf16f2
AM		 5704 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5705 does not generate a reloc. It uses the offset of `sym' within its
5706 csect. Other usages, such as `.long sym', generate relocs. This
5707 is the documented behaviour of non-TOC symbols. */
252b5132 5708 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5709 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5710 && operand->shift == 0
2b3c4602 5711 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5712 && fixP->fx_addsy != NULL
5713 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5714 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5715 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5716 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5717 {
94f592af
NC		 5718 value = fixP->fx_offset;
5719 fixP->fx_done = 1;
252b5132
RH		 5720 }
5721#endif
5722
5723 /* Fetch the instruction, insert the fully resolved operand
5724 value, and stuff the instruction back again. */
94f592af 5725 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5726 if (target_big_endian)
5727 insn = bfd_getb32 ((unsigned char *) where);
5728 else
5729 insn = bfd_getl32 ((unsigned char *) where);
5730 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5731 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5732 if (target_big_endian)
5733 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5734 else
5735 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5736
94f592af
NC		 5737 if (fixP->fx_done)
5738 /* Nothing else to do here. */
5739 return;
252b5132 5740
94f592af 5741 assert (fixP->fx_addsy != NULL);
0baf16f2 5742
252b5132
RH		 5743 /* Determine a BFD reloc value based on the operand information.
5744 We are only prepared to turn a few of the operands into
0baf16f2 5745 relocs. */
11b37b7b 5746 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5747 && operand->bitm == 0x3fffffc
11b37b7b 5748 && operand->shift == 0)
94f592af 5749 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5750 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5751 && operand->bitm == 0xfffc
11b37b7b 5752 && operand->shift == 0)
95210096
AM		 5753 {
5754 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5755#ifdef OBJ_XCOFF
5756 fixP->fx_size = 2;
5757 if (target_big_endian)
5758 fixP->fx_where += 2;
5759#endif
5760 }
11b37b7b 5761 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5762 && operand->bitm == 0x3fffffc
11b37b7b 5763 && operand->shift == 0)
94f592af 5764 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5765 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5766 && operand->bitm == 0xfffc
11b37b7b 5767 && operand->shift == 0)
95210096
AM		 5768 {
5769 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5770#ifdef OBJ_XCOFF
5771 fixP->fx_size = 2;
5772 if (target_big_endian)
5773 fixP->fx_where += 2;
5774#endif
5775 }
0baf16f2 5776#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5777 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5778 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5779 && operand->shift == 0)
11b37b7b 5780 {
a7fc733f
AM		 5781 if (ppc_is_toc_sym (fixP->fx_addsy))
5782 {
5783 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5784#ifdef OBJ_ELF
a7fc733f
AM		 5785 if (ppc_obj64
5786 && (operand->flags & PPC_OPERAND_DS) != 0)
5787 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5788#endif
5789 }
5790 else
5791 {
5792 fixP->fx_r_type = BFD_RELOC_16;
5793#ifdef OBJ_ELF
5794 if (ppc_obj64
5795 && (operand->flags & PPC_OPERAND_DS) != 0)
5796 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5797#endif
a7fc733f 5798 }
94f592af 5799 fixP->fx_size = 2;
11b37b7b 5800 if (target_big_endian)
94f592af 5801 fixP->fx_where += 2;
11b37b7b 5802 }
0baf16f2 5803#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5804 else
252b5132
RH		 5805 {
5806 char *sfile;
5807 unsigned int sline;
5808
5809 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5810 symbol. */
94f592af
NC		 5811 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5812 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5813 _("unresolved expression that must be resolved"));
5814 else
94f592af 5815 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5816 _("unsupported relocation against %s"),
94f592af
NC		 5817 S_GET_NAME (fixP->fx_addsy));
5818 fixP->fx_done = 1;
5819 return;
252b5132
RH		 5820 }
5821 }
5822 else
5823 {
5824#ifdef OBJ_ELF
94f592af 5825 ppc_elf_validate_fix (fixP, seg);
252b5132 5826#endif
94f592af 5827 switch (fixP->fx_r_type)
252b5132 5828 {
252b5132 5829 case BFD_RELOC_CTOR:
2b3c4602 5830 if (ppc_obj64)
9c7977b3
AM		 5831 goto ctor64;
5832 /* fall through */
5833
0baf16f2 5834 case BFD_RELOC_32:
94f592af
NC		 5835 if (fixP->fx_pcrel)
5836 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5837 /* fall through */
252b5132
RH		 5838
5839 case BFD_RELOC_RVA:
5840 case BFD_RELOC_32_PCREL:
252b5132 5841 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5842 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5843 value, 4);
5844 break;
5845
7f6d05e8 5846 case BFD_RELOC_64:
9c7977b3 5847 ctor64:
94f592af
NC		 5848 if (fixP->fx_pcrel)
5849 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5850 /* fall through */
0baf16f2 5851
7f6d05e8 5852 case BFD_RELOC_64_PCREL:
94f592af 5853 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5854 value, 8);
81d4177b 5855 break;
0baf16f2 5856
252b5132
RH		 5857 case BFD_RELOC_GPREL16:
5858 case BFD_RELOC_16_GOT_PCREL:
5859 case BFD_RELOC_16_GOTOFF:
5860 case BFD_RELOC_LO16_GOTOFF:
5861 case BFD_RELOC_HI16_GOTOFF:
5862 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5863 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5864 case BFD_RELOC_LO16_BASEREL:
5865 case BFD_RELOC_HI16_BASEREL:
5866 case BFD_RELOC_HI16_S_BASEREL:
5867 case BFD_RELOC_PPC_EMB_NADDR16:
5868 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5869 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5870 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5871 case BFD_RELOC_PPC_EMB_SDAI16:
5872 case BFD_RELOC_PPC_EMB_SDA2REL:
5873 case BFD_RELOC_PPC_EMB_SDA2I16:
5874 case BFD_RELOC_PPC_EMB_RELSEC16:
5875 case BFD_RELOC_PPC_EMB_RELST_LO:
5876 case BFD_RELOC_PPC_EMB_RELST_HI:
5877 case BFD_RELOC_PPC_EMB_RELST_HA:
5878 case BFD_RELOC_PPC_EMB_RELSDA:
5879 case BFD_RELOC_PPC_TOC16:
0baf16f2 5880#ifdef OBJ_ELF
0baf16f2
AM		 5881 case BFD_RELOC_PPC64_TOC16_LO:
5882 case BFD_RELOC_PPC64_TOC16_HI:
5883 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5884#endif
94f592af 5885 if (fixP->fx_pcrel)
252b5132 5886 {
94f592af
NC		 5887 if (fixP->fx_addsy != NULL)
5888 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5889 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5890 bfd_get_reloc_code_name (fixP->fx_r_type),
5891 S_GET_NAME (fixP->fx_addsy));
252b5132 5892 else
94f592af 5893 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5894 _("cannot emit PC relative %s relocation"),
94f592af 5895 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5896 }
5897
94f592af 5898 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5899 value, 2);
5900 break;
5901
3c9d25f4
AM		 5902 case BFD_RELOC_16:
5903 if (fixP->fx_pcrel)
5904 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5905 /* fall through */
5906
5907 case BFD_RELOC_16_PCREL:
5908 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5909 value, 2);
5910 break;
5911
5912 case BFD_RELOC_LO16:
5913 if (fixP->fx_pcrel)
5914 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5915 /* fall through */
5916
5917 case BFD_RELOC_LO16_PCREL:
5918 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5919 value, 2);
5920 break;
5921
252b5132
RH		 5922 /* This case happens when you write, for example,
5923 lis %r3,(L1-L2)@ha
5924 where L1 and L2 are defined later. */
5925 case BFD_RELOC_HI16:
94f592af 5926 if (fixP->fx_pcrel)
3c9d25f4
AM		 5927 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5928 /* fall through */
5929
5930 case BFD_RELOC_HI16_PCREL:
94f592af 5931 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5932 PPC_HI (value), 2);
252b5132 5933 break;
0baf16f2 5934
252b5132 5935 case BFD_RELOC_HI16_S:
94f592af 5936 if (fixP->fx_pcrel)
3c9d25f4
AM		 5937 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5938 /* fall through */
5939
5940 case BFD_RELOC_HI16_S_PCREL:
94f592af 5941 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5942 PPC_HA (value), 2);
5943 break;
5944
5945#ifdef OBJ_ELF
0baf16f2 5946 case BFD_RELOC_PPC64_HIGHER:
94f592af 5947 if (fixP->fx_pcrel)
0baf16f2 5948 abort ();
94f592af 5949 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5950 PPC_HIGHER (value), 2);
252b5132
RH		 5951 break;
5952
0baf16f2 5953 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5954 if (fixP->fx_pcrel)
0baf16f2 5955 abort ();
94f592af 5956 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5957 PPC_HIGHERA (value), 2);
5958 break;
5959
5960 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5961 if (fixP->fx_pcrel)
0baf16f2 5962 abort ();
94f592af 5963 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5964 PPC_HIGHEST (value), 2);
5965 break;
5966
5967 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5968 if (fixP->fx_pcrel)
0baf16f2 5969 abort ();
94f592af 5970 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5971 PPC_HIGHESTA (value), 2);
5972 break;
5973
5974 case BFD_RELOC_PPC64_ADDR16_DS:
5975 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5976 case BFD_RELOC_PPC64_GOT16_DS:
5977 case BFD_RELOC_PPC64_GOT16_LO_DS:
5978 case BFD_RELOC_PPC64_PLT16_LO_DS:
5979 case BFD_RELOC_PPC64_SECTOFF_DS:
5980 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5981 case BFD_RELOC_PPC64_TOC16_DS:
5982 case BFD_RELOC_PPC64_TOC16_LO_DS:
5983 case BFD_RELOC_PPC64_PLTGOT16_DS:
5984 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5985 if (fixP->fx_pcrel)
0baf16f2
AM		 5986 abort ();
5987 {
2132e3a3 5988 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5989 unsigned long val, mask;
0baf16f2
AM		 5990
5991 if (target_big_endian)
adadcc0c 5992 val = bfd_getb32 (where - 2);
0baf16f2 5993 else
adadcc0c
AM		 5994 val = bfd_getl32 (where);
5995 mask = 0xfffc;
5996 /* lq insns reserve the four lsbs. */
5997 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5998 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5999 mask = 0xfff0;
6000 val |= value & mask;
0baf16f2
AM		 6001 if (target_big_endian)
6002 bfd_putb16 ((bfd_vma) val, where);
6003 else
6004 bfd_putl16 ((bfd_vma) val, where);
6005 }
6006 break;
cdba85ec 6007
ba0b2174
AM		 6008 case BFD_RELOC_PPC_B16_BRTAKEN:
6009 case BFD_RELOC_PPC_B16_BRNTAKEN:
6010 case BFD_RELOC_PPC_BA16_BRTAKEN:
6011 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6012 break;
6013
cdba85ec 6014 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 6015 break;
6016
cdba85ec
AM		 6017 case BFD_RELOC_PPC_DTPMOD:
6018 case BFD_RELOC_PPC_TPREL16:
6019 case BFD_RELOC_PPC_TPREL16_LO:
6020 case BFD_RELOC_PPC_TPREL16_HI:
6021 case BFD_RELOC_PPC_TPREL16_HA:
6022 case BFD_RELOC_PPC_TPREL:
6023 case BFD_RELOC_PPC_DTPREL16:
6024 case BFD_RELOC_PPC_DTPREL16_LO:
6025 case BFD_RELOC_PPC_DTPREL16_HI:
6026 case BFD_RELOC_PPC_DTPREL16_HA:
6027 case BFD_RELOC_PPC_DTPREL:
6028 case BFD_RELOC_PPC_GOT_TLSGD16:
6029 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6030 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6031 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6032 case BFD_RELOC_PPC_GOT_TLSLD16:
6033 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6034 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6035 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6036 case BFD_RELOC_PPC_GOT_TPREL16:
6037 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6038 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6039 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6040 case BFD_RELOC_PPC_GOT_DTPREL16:
6041 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6042 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6043 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6044 case BFD_RELOC_PPC64_TPREL16_DS:
6045 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6046 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6047 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6048 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6049 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6050 case BFD_RELOC_PPC64_DTPREL16_DS:
6051 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6052 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6053 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6054 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6055 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6056 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6057 break;
0baf16f2 6058#endif
252b5132 6059 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6060 bytes, rather than 2, so offset it here appropriately. */
252b5132 6061 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6062 if (fixP->fx_pcrel)
252b5132
RH		 6063 abort ();
6064
94f592af 6065 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6066 + ((target_big_endian) ? 2 : 0),
6067 value, 2);
6068 break;
6069
6070 case BFD_RELOC_8:
94f592af 6071 if (fixP->fx_pcrel)
31a91399
NC		 6072 {
6073 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6074 ".byte <undefined_symbol> - ." */
31a91399
NC		 6075 if (fixP->fx_addsy)
6076 as_bad (_("Unable to handle reference to symbol %s"),
6077 S_GET_NAME (fixP->fx_addsy));
6078 else
6079 as_bad (_("Unable to resolve expression"));
6080 fixP->fx_done = 1;
6081 }
6082 else
6083 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6084 value, 1);
252b5132
RH		 6085 break;
6086
6087 case BFD_RELOC_24_PLT_PCREL:
6088 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6089 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6090 abort ();
6091
94f592af 6092 if (fixP->fx_done)
99a814a1
AM		 6093 {
6094 char *where;
6095 unsigned long insn;
6096
6097 /* Fetch the instruction, insert the fully resolved operand
6098 value, and stuff the instruction back again. */
94f592af 6099 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6100 if (target_big_endian)
6101 insn = bfd_getb32 ((unsigned char *) where);
6102 else
6103 insn = bfd_getl32 ((unsigned char *) where);
6104 if ((value & 3) != 0)
94f592af 6105 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6106 _("must branch to an address a multiple of 4"));
6107 if ((offsetT) value < -0x40000000
6108 || (offsetT) value >= 0x40000000)
94f592af 6109 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6110 _("@local or @plt branch destination is too far away, %ld bytes"),
6111 (long) value);
6112 insn = insn | (value & 0x03fffffc);
6113 if (target_big_endian)
6114 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6115 else
6116 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6117 }
252b5132
RH		 6118 break;
6119
6120 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6121 fixP->fx_done = 0;
6122 if (fixP->fx_addsy
6123 && !S_IS_DEFINED (fixP->fx_addsy)
6124 && !S_IS_WEAK (fixP->fx_addsy))
6125 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6126 break;
6127
6128 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6129 fixP->fx_done = 0;
252b5132
RH		 6130 break;
6131
0baf16f2 6132#ifdef OBJ_ELF
0baf16f2
AM		 6133 /* Generated by reference to `sym@tocbase'. The sym is
6134 ignored by the linker. */
6135 case BFD_RELOC_PPC64_TOC:
94f592af 6136 fixP->fx_done = 0;
0baf16f2 6137 break;
0baf16f2 6138#endif
252b5132 6139 default:
bc805888 6140 fprintf (stderr,
94f592af 6141 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6142 fflush (stderr);
252b5132
RH		 6143 abort ();
6144 }
6145 }
6146
6147#ifdef OBJ_ELF
94f592af 6148 fixP->fx_addnumber = value;
4e6935a6
AM		 6149
6150 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6151 from the section contents. If we are going to be emitting a reloc
6152 then the section contents are immaterial, so don't warn if they
6153 happen to overflow. Leave such warnings to ld. */
6154 if (!fixP->fx_done)
6155 fixP->fx_no_overflow = 1;
252b5132 6156#else
94f592af
NC		 6157 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6158 fixP->fx_addnumber = 0;
252b5132
RH		 6159 else
6160 {
6161#ifdef TE_PE
94f592af 6162 fixP->fx_addnumber = 0;
252b5132
RH		 6163#else
6164 /* We want to use the offset within the data segment of the
6165 symbol, not the actual VMA of the symbol. */
94f592af
NC		 6166 fixP->fx_addnumber =
6167 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 6168#endif
6169 }
6170#endif
252b5132
RH		 6171}
6172
6173/* Generate a reloc for a fixup. */
6174
6175arelent *
6176tc_gen_reloc (seg, fixp)
92161534 6177 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 6178 fixS *fixp;
6179{
6180 arelent *reloc;
6181
6182 reloc = (arelent *) xmalloc (sizeof (arelent));
6183
49309057
ILT		 6184 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6185 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6186 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6187 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6188 if (reloc->howto == (reloc_howto_type *) NULL)
6189 {
6190 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6191 _("reloc %d not supported by object file format"),
6192 (int) fixp->fx_r_type);
252b5132
RH		 6193 return NULL;
6194 }
6195 reloc->addend = fixp->fx_addnumber;
6196
6197 return reloc;
6198}
75e21f08
JJ		 6199
6200void
6201ppc_cfi_frame_initial_instructions ()
6202{
6203 cfi_add_CFA_def_cfa (1, 0);
6204}
6205
6206int
1df69f4f 6207tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6208{
6209 unsigned int regnum = -1;
6210 unsigned int i;
6211 const char *p;
6212 char *q;
6213 static struct { char *name; int dw2regnum; } regnames[] =
6214 {
6215 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6216 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6217 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6218 { "spe_acc", 111 }, { "spefscr", 112 }
6219 };
6220
6221 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6222 if (strcmp (regnames[i].name, regname) == 0)
6223 return regnames[i].dw2regnum;
6224
6225 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6226 {
6227 p = regname + 1 + (regname[1] == '.');
6228 regnum = strtoul (p, &q, 10);
6229 if (p == q || *q || regnum >= 32)
6230 return -1;
6231 if (regname[0] == 'f')
b7d7dc63 6232 regnum += 32;
75e21f08 6233 else if (regname[0] == 'v')
b7d7dc63 6234 regnum += 77;
75e21f08
JJ		 6235 }
6236 else if (regname[0] == 'c' && regname[1] == 'r')
6237 {
6238 p = regname + 2 + (regname[2] == '.');
6239 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6240 return -1;
75e21f08
JJ		 6241 regnum = p[0] - '0' + 68;
6242 }
6243 return regnum;
6244}
GDB Binutils - Deliverables
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