* elf-bfd.h (struct elf_link_hash_table): Delete init_refcount and
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2132e3a3 3 2004, 2005 Free Software Foundation, Inc.
252b5132
RH
4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132
RH
22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH
28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH
33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH
53#endif
54#endif
55
0baf16f2
AM
56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM
69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM
72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM
76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM
79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM
81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM
83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH
89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM
95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH
97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM
99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH
101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
931e13a6 114static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH
115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH
134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
5ce8663f 185
b7d7dc63 186/* '+' and '-' can be used as postfix predicate predictors for conditional
5ce8663f
NC
187 branches. So they need to be accepted as symbol characters. */
188const char ppc_symbol_chars[] = "+-";
75e21f08
JJ
189
190/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
191int ppc_cie_data_alignment;
252b5132
RH
192\f
193/* The target specific pseudo-ops which we support. */
194
195const pseudo_typeS md_pseudo_table[] =
196{
197 /* Pseudo-ops which must be overridden. */
198 { "byte", ppc_byte, 0 },
199
200#ifdef OBJ_XCOFF
201 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
202 legitimately belong in the obj-*.c file. However, XCOFF is based
203 on COFF, and is only implemented for the RS/6000. We just use
204 obj-coff.c, and add what we need here. */
205 { "comm", ppc_comm, 0 },
206 { "lcomm", ppc_comm, 1 },
207 { "bb", ppc_bb, 0 },
208 { "bc", ppc_bc, 0 },
209 { "bf", ppc_bf, 0 },
210 { "bi", ppc_biei, 0 },
211 { "bs", ppc_bs, 0 },
212 { "csect", ppc_csect, 0 },
213 { "data", ppc_section, 'd' },
214 { "eb", ppc_eb, 0 },
215 { "ec", ppc_ec, 0 },
216 { "ef", ppc_ef, 0 },
217 { "ei", ppc_biei, 1 },
218 { "es", ppc_es, 0 },
219 { "extern", ppc_extern, 0 },
220 { "function", ppc_function, 0 },
221 { "lglobl", ppc_lglobl, 0 },
222 { "rename", ppc_rename, 0 },
223 { "section", ppc_named_section, 0 },
224 { "stabx", ppc_stabx, 0 },
225 { "text", ppc_section, 't' },
226 { "toc", ppc_toc, 0 },
227 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 228 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH
229 { "word", ppc_xcoff_cons, 1 },
230 { "short", ppc_xcoff_cons, 1 },
231 { "vbyte", ppc_vbyte, 0 },
232#endif
233
234#ifdef OBJ_ELF
0baf16f2
AM
235 { "llong", ppc_elf_cons, 8 },
236 { "quad", ppc_elf_cons, 8 },
252b5132
RH
237 { "long", ppc_elf_cons, 4 },
238 { "word", ppc_elf_cons, 2 },
239 { "short", ppc_elf_cons, 2 },
240 { "rdata", ppc_elf_rdata, 0 },
241 { "rodata", ppc_elf_rdata, 0 },
242 { "lcomm", ppc_elf_lcomm, 0 },
243#endif
244
245#ifdef TE_PE
99a814a1 246 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH
247 { "previous", ppc_previous, 0 },
248 { "pdata", ppc_pdata, 0 },
249 { "ydata", ppc_ydata, 0 },
250 { "reldata", ppc_reldata, 0 },
251 { "rdata", ppc_rdata, 0 },
252 { "ualong", ppc_ualong, 0 },
253 { "znop", ppc_znop, 0 },
254 { "comm", ppc_pe_comm, 0 },
255 { "lcomm", ppc_pe_comm, 1 },
256 { "section", ppc_pe_section, 0 },
257 { "function", ppc_pe_function,0 },
258 { "tocd", ppc_pe_tocd, 0 },
259#endif
260
0baf16f2 261#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 262 { "tc", ppc_tc, 0 },
0baf16f2
AM
263 { "machine", ppc_machine, 0 },
264#endif
252b5132
RH
265
266 { NULL, NULL, 0 }
267};
268
269\f
99a814a1
AM
270/* Predefined register names if -mregnames (or default for Windows NT).
271 In general, there are lots of them, in an attempt to be compatible
272 with a number of other Windows NT assemblers. */
252b5132
RH
273
274/* Structure to hold information about predefined registers. */
275struct pd_reg
276 {
277 char *name;
278 int value;
279 };
280
281/* List of registers that are pre-defined:
282
283 Each general register has predefined names of the form:
284 1. r<reg_num> which has the value <reg_num>.
285 2. r.<reg_num> which has the value <reg_num>.
286
252b5132
RH
287 Each floating point register has predefined names of the form:
288 1. f<reg_num> which has the value <reg_num>.
289 2. f.<reg_num> which has the value <reg_num>.
290
7a899fff
C
291 Each vector unit register has predefined names of the form:
292 1. v<reg_num> which has the value <reg_num>.
293 2. v.<reg_num> which has the value <reg_num>.
294
252b5132
RH
295 Each condition register has predefined names of the form:
296 1. cr<reg_num> which has the value <reg_num>.
297 2. cr.<reg_num> which has the value <reg_num>.
298
299 There are individual registers as well:
300 sp or r.sp has the value 1
301 rtoc or r.toc has the value 2
302 fpscr has the value 0
303 xer has the value 1
304 lr has the value 8
305 ctr has the value 9
306 pmr has the value 0
307 dar has the value 19
308 dsisr has the value 18
309 dec has the value 22
310 sdr1 has the value 25
311 srr0 has the value 26
312 srr1 has the value 27
313
81d4177b 314 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH
315
316static const struct pd_reg pre_defined_registers[] =
317{
318 { "cr.0", 0 }, /* Condition Registers */
319 { "cr.1", 1 },
320 { "cr.2", 2 },
321 { "cr.3", 3 },
322 { "cr.4", 4 },
323 { "cr.5", 5 },
324 { "cr.6", 6 },
325 { "cr.7", 7 },
326
327 { "cr0", 0 },
328 { "cr1", 1 },
329 { "cr2", 2 },
330 { "cr3", 3 },
331 { "cr4", 4 },
332 { "cr5", 5 },
333 { "cr6", 6 },
334 { "cr7", 7 },
335
336 { "ctr", 9 },
337
338 { "dar", 19 }, /* Data Access Register */
339 { "dec", 22 }, /* Decrementer */
340 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
341
342 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH
343 { "f.1", 1 },
344 { "f.10", 10 },
345 { "f.11", 11 },
346 { "f.12", 12 },
347 { "f.13", 13 },
348 { "f.14", 14 },
349 { "f.15", 15 },
350 { "f.16", 16 },
351 { "f.17", 17 },
352 { "f.18", 18 },
353 { "f.19", 19 },
354 { "f.2", 2 },
355 { "f.20", 20 },
356 { "f.21", 21 },
357 { "f.22", 22 },
358 { "f.23", 23 },
359 { "f.24", 24 },
360 { "f.25", 25 },
361 { "f.26", 26 },
362 { "f.27", 27 },
363 { "f.28", 28 },
364 { "f.29", 29 },
365 { "f.3", 3 },
252b5132
RH
366 { "f.30", 30 },
367 { "f.31", 31 },
81d4177b
KH
368 { "f.4", 4 },
369 { "f.5", 5 },
370 { "f.6", 6 },
371 { "f.7", 7 },
372 { "f.8", 8 },
373 { "f.9", 9 },
374
375 { "f0", 0 },
376 { "f1", 1 },
377 { "f10", 10 },
378 { "f11", 11 },
379 { "f12", 12 },
380 { "f13", 13 },
381 { "f14", 14 },
382 { "f15", 15 },
383 { "f16", 16 },
384 { "f17", 17 },
385 { "f18", 18 },
386 { "f19", 19 },
387 { "f2", 2 },
388 { "f20", 20 },
389 { "f21", 21 },
390 { "f22", 22 },
391 { "f23", 23 },
392 { "f24", 24 },
393 { "f25", 25 },
394 { "f26", 26 },
395 { "f27", 27 },
396 { "f28", 28 },
397 { "f29", 29 },
398 { "f3", 3 },
252b5132
RH
399 { "f30", 30 },
400 { "f31", 31 },
81d4177b
KH
401 { "f4", 4 },
402 { "f5", 5 },
403 { "f6", 6 },
404 { "f7", 7 },
405 { "f8", 8 },
406 { "f9", 9 },
252b5132
RH
407
408 { "fpscr", 0 },
409
410 { "lr", 8 }, /* Link Register */
411
412 { "pmr", 0 },
413
414 { "r.0", 0 }, /* General Purpose Registers */
415 { "r.1", 1 },
416 { "r.10", 10 },
417 { "r.11", 11 },
418 { "r.12", 12 },
419 { "r.13", 13 },
420 { "r.14", 14 },
421 { "r.15", 15 },
422 { "r.16", 16 },
423 { "r.17", 17 },
424 { "r.18", 18 },
425 { "r.19", 19 },
426 { "r.2", 2 },
427 { "r.20", 20 },
428 { "r.21", 21 },
429 { "r.22", 22 },
430 { "r.23", 23 },
431 { "r.24", 24 },
432 { "r.25", 25 },
433 { "r.26", 26 },
434 { "r.27", 27 },
435 { "r.28", 28 },
436 { "r.29", 29 },
437 { "r.3", 3 },
438 { "r.30", 30 },
439 { "r.31", 31 },
440 { "r.4", 4 },
441 { "r.5", 5 },
442 { "r.6", 6 },
443 { "r.7", 7 },
444 { "r.8", 8 },
445 { "r.9", 9 },
446
447 { "r.sp", 1 }, /* Stack Pointer */
448
449 { "r.toc", 2 }, /* Pointer to the table of contents */
450
451 { "r0", 0 }, /* More general purpose registers */
452 { "r1", 1 },
453 { "r10", 10 },
454 { "r11", 11 },
455 { "r12", 12 },
456 { "r13", 13 },
457 { "r14", 14 },
458 { "r15", 15 },
459 { "r16", 16 },
460 { "r17", 17 },
461 { "r18", 18 },
462 { "r19", 19 },
463 { "r2", 2 },
464 { "r20", 20 },
465 { "r21", 21 },
466 { "r22", 22 },
467 { "r23", 23 },
468 { "r24", 24 },
469 { "r25", 25 },
470 { "r26", 26 },
471 { "r27", 27 },
472 { "r28", 28 },
473 { "r29", 29 },
474 { "r3", 3 },
475 { "r30", 30 },
476 { "r31", 31 },
477 { "r4", 4 },
478 { "r5", 5 },
479 { "r6", 6 },
480 { "r7", 7 },
481 { "r8", 8 },
482 { "r9", 9 },
483
484 { "rtoc", 2 }, /* Table of contents */
485
486 { "sdr1", 25 }, /* Storage Description Register 1 */
487
488 { "sp", 1 },
489
490 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
491 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 492
7a899fff 493 { "v.0", 0 }, /* Vector registers */
81d4177b
KH
494 { "v.1", 1 },
495 { "v.10", 10 },
496 { "v.11", 11 },
497 { "v.12", 12 },
498 { "v.13", 13 },
499 { "v.14", 14 },
500 { "v.15", 15 },
501 { "v.16", 16 },
502 { "v.17", 17 },
503 { "v.18", 18 },
504 { "v.19", 19 },
505 { "v.2", 2 },
506 { "v.20", 20 },
507 { "v.21", 21 },
508 { "v.22", 22 },
509 { "v.23", 23 },
510 { "v.24", 24 },
511 { "v.25", 25 },
512 { "v.26", 26 },
513 { "v.27", 27 },
514 { "v.28", 28 },
515 { "v.29", 29 },
516 { "v.3", 3 },
7a899fff
C
517 { "v.30", 30 },
518 { "v.31", 31 },
81d4177b
KH
519 { "v.4", 4 },
520 { "v.5", 5 },
521 { "v.6", 6 },
522 { "v.7", 7 },
523 { "v.8", 8 },
524 { "v.9", 9 },
7a899fff
C
525
526 { "v0", 0 },
81d4177b
KH
527 { "v1", 1 },
528 { "v10", 10 },
529 { "v11", 11 },
530 { "v12", 12 },
531 { "v13", 13 },
532 { "v14", 14 },
533 { "v15", 15 },
534 { "v16", 16 },
535 { "v17", 17 },
536 { "v18", 18 },
537 { "v19", 19 },
538 { "v2", 2 },
539 { "v20", 20 },
540 { "v21", 21 },
541 { "v22", 22 },
542 { "v23", 23 },
543 { "v24", 24 },
544 { "v25", 25 },
545 { "v26", 26 },
546 { "v27", 27 },
547 { "v28", 28 },
548 { "v29", 29 },
549 { "v3", 3 },
7a899fff
C
550 { "v30", 30 },
551 { "v31", 31 },
81d4177b
KH
552 { "v4", 4 },
553 { "v5", 5 },
554 { "v6", 6 },
555 { "v7", 7 },
556 { "v8", 8 },
7a899fff 557 { "v9", 9 },
252b5132
RH
558
559 { "xer", 1 },
560
561};
562
bc805888 563#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH
564
565/* Given NAME, find the register number associated with that name, return
566 the integer value associated with the given name or -1 on failure. */
567
568static int reg_name_search
569 PARAMS ((const struct pd_reg *, int, const char * name));
570
571static int
572reg_name_search (regs, regcount, name)
573 const struct pd_reg *regs;
574 int regcount;
575 const char *name;
576{
577 int middle, low, high;
578 int cmp;
579
580 low = 0;
581 high = regcount - 1;
582
583 do
584 {
585 middle = (low + high) / 2;
586 cmp = strcasecmp (name, regs[middle].name);
587 if (cmp < 0)
588 high = middle - 1;
589 else if (cmp > 0)
590 low = middle + 1;
591 else
592 return regs[middle].value;
593 }
594 while (low <= high);
595
596 return -1;
597}
598
599/*
99a814a1 600 * Summary of register_name.
252b5132
RH
601 *
602 * in: Input_line_pointer points to 1st char of operand.
603 *
604 * out: A expressionS.
605 * The operand may have been a register: in this case, X_op == O_register,
606 * X_add_number is set to the register number, and truth is returned.
607 * Input_line_pointer->(next non-blank) char after operand, or is in its
608 * original state.
609 */
610
b34976b6 611static bfd_boolean
252b5132
RH
612register_name (expressionP)
613 expressionS *expressionP;
614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH
623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH
627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM
631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH
636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH
641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM
645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH
649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH
657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
680ppc_parse_name (name, expr)
681 const char *name;
682 expressionS *expr;
683{
684 int val;
685
686 if (! cr_operand)
687 return 0;
688
689 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
690 name);
691 if (val < 0)
692 return 0;
693
694 expr->X_op = O_constant;
695 expr->X_add_number = val;
696
697 return 1;
698}
699\f
700/* Local variables. */
701
702/* The type of processor we are assembling for. This is one or more
703 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 704static unsigned long ppc_cpu = 0;
252b5132 705
2b3c4602
AM
706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH
709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH
720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH
727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH
730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH
789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ
796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM
804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ
806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH
810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH
818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM
822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
828 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
829 (RIOS2). */
830 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
831 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
832 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
833 else if (strcmp (arg, "pwr") == 0)
834 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
835 /* -m601 means to assemble for the PowerPC 601, which includes
836 instructions that are holdovers from the Power. */
837 else if (strcmp (arg, "601") == 0)
838 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
839 | PPC_OPCODE_601 | PPC_OPCODE_32);
840 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
841 PowerPC 603/604. */
842 else if (strcmp (arg, "ppc") == 0
843 || strcmp (arg, "ppc32") == 0
844 || strcmp (arg, "603") == 0
845 || strcmp (arg, "604") == 0)
846 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
847 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
848 else if (strcmp (arg, "403") == 0
849 || strcmp (arg, "405") == 0)
850 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
851 | PPC_OPCODE_403 | PPC_OPCODE_32);
852 else if (strcmp (arg, "440") == 0)
853 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
854 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
855 else if (strcmp (arg, "7400") == 0
856 || strcmp (arg, "7410") == 0
857 || strcmp (arg, "7450") == 0
858 || strcmp (arg, "7455") == 0)
859 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
860 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
861 else if (strcmp (arg, "altivec") == 0)
862 {
863 if (ppc_cpu == 0)
864 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
865 else
866 ppc_cpu |= PPC_OPCODE_ALTIVEC;
867 }
868 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
869 {
870 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
871 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
872 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
873 | PPC_OPCODE_RFMCI);
874 }
875 else if (strcmp (arg, "spe") == 0)
876 {
877 if (ppc_cpu == 0)
878 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
879 else
880 ppc_cpu |= PPC_OPCODE_SPE;
881 }
882 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
883 620. */
884 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
885 {
886 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
887 }
888 else if (strcmp (arg, "ppc64bridge") == 0)
889 {
890 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
891 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
892 }
893 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
894 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
895 {
896 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
897 }
898 /* -mbooke64 means enable 64-bit BookE support. */
899 else if (strcmp (arg, "booke64") == 0)
900 {
901 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
902 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
903 }
904 else if (strcmp (arg, "power4") == 0)
905 {
906 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
907 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
908 }
b0648eec
AM
909 else if (strcmp (arg, "power5") == 0)
910 {
911 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
912 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
913 | PPC_OPCODE_POWER5);
914 }
69c040df
AM
915 /* -mcom means assemble for the common intersection between Power
916 and PowerPC. At present, we just allow the union, rather
917 than the intersection. */
918 else if (strcmp (arg, "com") == 0)
919 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
920 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
921 else if (strcmp (arg, "any") == 0)
922 ppc_cpu |= PPC_OPCODE_ANY;
923 else
924 return 0;
925
926 return 1;
927}
928
252b5132
RH
929int
930md_parse_option (c, arg)
931 int c;
932 char *arg;
933{
934 switch (c)
935 {
936 case 'u':
937 /* -u means that any undefined symbols should be treated as
938 external, which is the default for gas anyhow. */
939 break;
940
941#ifdef OBJ_ELF
942 case 'l':
943 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 944 sake, recognize -be also. */
252b5132
RH
945 if (strcmp (arg, "e") == 0)
946 {
947 target_big_endian = 0;
948 set_target_endian = 1;
949 }
950 else
951 return 0;
952
953 break;
954
955 case 'b':
956 if (strcmp (arg, "e") == 0)
957 {
958 target_big_endian = 1;
959 set_target_endian = 1;
960 }
961 else
962 return 0;
963
964 break;
965
966 case 'K':
99a814a1 967 /* Recognize -K PIC. */
252b5132
RH
968 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
969 {
970 shlib = SHLIB_PIC;
971 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
972 }
973 else
974 return 0;
975
976 break;
977#endif
978
7f6d05e8
CP
979 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
980 case 'a':
981 if (strcmp (arg, "64") == 0)
2a98c3a6
AM
982 {
983#ifdef BFD64
984 ppc_obj64 = 1;
985#else
986 as_fatal (_("%s unsupported"), "-a64");
987#endif
988 }
7f6d05e8 989 else if (strcmp (arg, "32") == 0)
2b3c4602 990 ppc_obj64 = 0;
7f6d05e8
CP
991 else
992 return 0;
993 break;
81d4177b 994
252b5132 995 case 'm':
69c040df
AM
996 if (parse_cpu (arg))
997 ;
252b5132
RH
998
999 else if (strcmp (arg, "regnames") == 0)
b34976b6 1000 reg_names_p = TRUE;
252b5132
RH
1001
1002 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1003 reg_names_p = FALSE;
252b5132
RH
1004
1005#ifdef OBJ_ELF
99a814a1
AM
1006 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1007 that require relocation. */
252b5132
RH
1008 else if (strcmp (arg, "relocatable") == 0)
1009 {
5d6f4f16 1010 shlib = SHLIB_MRELOCATABLE;
252b5132
RH
1011 ppc_flags |= EF_PPC_RELOCATABLE;
1012 }
1013
1014 else if (strcmp (arg, "relocatable-lib") == 0)
1015 {
5d6f4f16 1016 shlib = SHLIB_MRELOCATABLE;
252b5132
RH
1017 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1018 }
1019
99a814a1 1020 /* -memb, set embedded bit. */
252b5132
RH
1021 else if (strcmp (arg, "emb") == 0)
1022 ppc_flags |= EF_PPC_EMB;
1023
99a814a1
AM
1024 /* -mlittle/-mbig set the endianess. */
1025 else if (strcmp (arg, "little") == 0
1026 || strcmp (arg, "little-endian") == 0)
252b5132
RH
1027 {
1028 target_big_endian = 0;
1029 set_target_endian = 1;
1030 }
1031
1032 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1033 {
1034 target_big_endian = 1;
1035 set_target_endian = 1;
1036 }
1037
1038 else if (strcmp (arg, "solaris") == 0)
1039 {
b34976b6 1040 msolaris = TRUE;
252b5132
RH
1041 ppc_comment_chars = ppc_solaris_comment_chars;
1042 }
1043
1044 else if (strcmp (arg, "no-solaris") == 0)
1045 {
b34976b6 1046 msolaris = FALSE;
252b5132
RH
1047 ppc_comment_chars = ppc_eabi_comment_chars;
1048 }
1049#endif
1050 else
1051 {
1052 as_bad (_("invalid switch -m%s"), arg);
1053 return 0;
1054 }
1055 break;
1056
1057#ifdef OBJ_ELF
1058 /* -V: SVR4 argument to print version ID. */
1059 case 'V':
1060 print_version_id ();
1061 break;
1062
1063 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1064 should be emitted or not. FIXME: Not implemented. */
1065 case 'Q':
1066 break;
1067
1068 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1069 rather than .stabs.excl, which is ignored by the linker.
1070 FIXME: Not implemented. */
1071 case 's':
1072 if (arg)
1073 return 0;
1074
1075 break;
1076#endif
1077
1078 default:
1079 return 0;
1080 }
1081
1082 return 1;
1083}
1084
1085void
1086md_show_usage (stream)
1087 FILE *stream;
1088{
bc805888 1089 fprintf (stream, _("\
252b5132 1090PowerPC options:\n\
df12615d
AM
1091-a32 generate ELF32/XCOFF32\n\
1092-a64 generate ELF64/XCOFF64\n\
252b5132 1093-u ignored\n\
23e1d84c
AM
1094-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1095-mpwr generate code for POWER (RIOS1)\n\
1096-m601 generate code for PowerPC 601\n\
418c1742 1097-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1098 generate code for PowerPC 603/604\n\
df12615d 1099-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1100-m440 generate code for PowerPC 440\n\
f5c120c5 1101-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM
1102 generate code For PowerPC 7400/7410/7450/7455\n"));
1103 fprintf (stream, _("\
23e1d84c 1104-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1105-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG
1106-mbooke64 generate code for 64-bit PowerPC BookE\n\
1107-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1108-mpower4 generate code for Power4 architecture\n\
b0648eec 1109-mpower5 generate code for Power5 architecture\n\
252b5132 1110-mcom generate code Power/PowerPC common instructions\n\
df12615d 1111-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1112 fprintf (stream, _("\
df12615d 1113-maltivec generate code for AltiVec\n\
6a0c61b7 1114-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM
1115-mspe generate code for Motorola SPE instructions\n\
1116-mregnames Allow symbolic names for registers\n\
1117-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1118#ifdef OBJ_ELF
bc805888 1119 fprintf (stream, _("\
252b5132
RH
1120-mrelocatable support for GCC's -mrelocatble option\n\
1121-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1122-memb set PPC_EMB bit in ELF flags\n\
df12615d 1123-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1124 generate code for a little endian machine\n\
df12615d
AM
1125-mbig, -mbig-endian, -b, -be\n\
1126 generate code for a big endian machine\n\
252b5132
RH
1127-msolaris generate code for Solaris\n\
1128-mno-solaris do not generate code for Solaris\n\
1129-V print assembler version number\n\
1130-Qy, -Qn ignored\n"));
1131#endif
1132}
1133\f
1134/* Set ppc_cpu if it is not already set. */
1135
1136static void
1137ppc_set_cpu ()
1138{
1139 const char *default_os = TARGET_OS;
1140 const char *default_cpu = TARGET_CPU;
1141
3c9030c1 1142 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1143 {
2a98c3a6 1144 if (ppc_obj64)
3c9030c1 1145 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM
1146 else if (strncmp (default_os, "aix", 3) == 0
1147 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1148 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1149 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1150 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1151 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1152 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1153 else if (strncmp (default_cpu, "powerpc", 7) == 0)
b34976b6
AM
1154 {
1155 if (default_cpu[7] == '6' && default_cpu[8] == '4')
3c9030c1 1156 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
b34976b6 1157 else
3c9030c1 1158 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
b34976b6 1159 }
252b5132 1160 else
99a814a1
AM
1161 as_fatal (_("Unknown default cpu = %s, os = %s"),
1162 default_cpu, default_os);
252b5132
RH
1163 }
1164}
1165
9232bbb0
AM
1166/* Figure out the BFD architecture to use. This function and ppc_mach
1167 are called well before md_begin, when the output file is opened. */
252b5132
RH
1168
1169enum bfd_architecture
1170ppc_arch ()
1171{
1172 const char *default_cpu = TARGET_CPU;
1173 ppc_set_cpu ();
1174
1175 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1176 return bfd_arch_powerpc;
1177 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1178 return bfd_arch_rs6000;
1179 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1180 {
1181 if (strcmp (default_cpu, "rs6000") == 0)
1182 return bfd_arch_rs6000;
0baf16f2 1183 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH
1184 return bfd_arch_powerpc;
1185 }
1186
1187 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1188 return bfd_arch_unknown;
1189}
1190
7f6d05e8
CP
1191unsigned long
1192ppc_mach ()
1193{
2a98c3a6
AM
1194 if (ppc_obj64)
1195 return bfd_mach_ppc64;
1196 else if (ppc_arch () == bfd_arch_rs6000)
1197 return bfd_mach_rs6k;
1198 else
1199 return bfd_mach_ppc;
7f6d05e8
CP
1200}
1201
81d4177b 1202extern char*
99a814a1 1203ppc_target_format ()
7f6d05e8
CP
1204{
1205#ifdef OBJ_COFF
1206#ifdef TE_PE
99a814a1 1207 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1208#elif TE_POWERMAC
0baf16f2 1209 return "xcoff-powermac";
7f6d05e8 1210#else
eb1e0e80 1211# ifdef TE_AIX5
2b3c4602 1212 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1213# else
2b3c4602 1214 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1215# endif
7f6d05e8 1216#endif
7f6d05e8
CP
1217#endif
1218#ifdef OBJ_ELF
0baf16f2 1219 return (target_big_endian
2b3c4602
AM
1220 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1221 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
7f6d05e8
CP
1222#endif
1223}
1224
69c040df
AM
1225/* Insert opcodes and macros into hash tables. Called at startup and
1226 for .cpu pseudo. */
252b5132 1227
69c040df
AM
1228static void
1229ppc_setup_opcodes (void)
252b5132
RH
1230{
1231 register const struct powerpc_opcode *op;
1232 const struct powerpc_opcode *op_end;
1233 const struct powerpc_macro *macro;
1234 const struct powerpc_macro *macro_end;
b34976b6 1235 bfd_boolean dup_insn = FALSE;
252b5132 1236
69c040df
AM
1237 if (ppc_hash != NULL)
1238 hash_die (ppc_hash);
1239 if (ppc_macro_hash != NULL)
1240 hash_die (ppc_macro_hash);
252b5132
RH
1241
1242 /* Insert the opcodes into a hash table. */
1243 ppc_hash = hash_new ();
1244
1245 op_end = powerpc_opcodes + powerpc_num_opcodes;
1246 for (op = powerpc_opcodes; op < op_end; op++)
1247 {
1248 know ((op->opcode & op->mask) == op->opcode);
1249
2b3c4602 1250 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1251 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM
1252 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1253 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1254 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC
1255 /* Certain instructions (eg: extsw) do not exist in the
1256 32-bit BookE instruction set, but they do exist in the
1257 64-bit BookE instruction set, and other PPC instruction
1258 sets. Check to see if the opcode has the BOOKE64 flag set.
1259 If it does make sure that the target CPU is not the BookE32. */
1260 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1261 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1262 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM
1263 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1264 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM
1265 == (ppc_cpu & PPC_OPCODE_POWER4)))
1266 && ((op->flags & PPC_OPCODE_POWER5) == 0
1267 || ((op->flags & PPC_OPCODE_POWER5)
1268 == (ppc_cpu & PPC_OPCODE_POWER5))))
252b5132
RH
1269 {
1270 const char *retval;
1271
1272 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1273 if (retval != NULL)
252b5132 1274 {
99a814a1 1275 /* Ignore Power duplicates for -m601. */
252b5132
RH
1276 if ((ppc_cpu & PPC_OPCODE_601) != 0
1277 && (op->flags & PPC_OPCODE_POWER) != 0)
1278 continue;
1279
99a814a1
AM
1280 as_bad (_("Internal assembler error for instruction %s"),
1281 op->name);
b34976b6 1282 dup_insn = TRUE;
252b5132
RH
1283 }
1284 }
1285 }
1286
3c9030c1
AM
1287 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1288 for (op = powerpc_opcodes; op < op_end; op++)
1289 hash_insert (ppc_hash, op->name, (PTR) op);
1290
252b5132
RH
1291 /* Insert the macros into a hash table. */
1292 ppc_macro_hash = hash_new ();
1293
1294 macro_end = powerpc_macros + powerpc_num_macros;
1295 for (macro = powerpc_macros; macro < macro_end; macro++)
1296 {
1297 if ((macro->flags & ppc_cpu) != 0)
1298 {
1299 const char *retval;
1300
1301 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1302 if (retval != (const char *) NULL)
1303 {
1304 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1305 dup_insn = TRUE;
252b5132
RH
1306 }
1307 }
1308 }
1309
1310 if (dup_insn)
1311 abort ();
69c040df
AM
1312}
1313
1314/* This function is called when the assembler starts up. It is called
1315 after the options have been parsed and the output file has been
1316 opened. */
1317
1318void
1319md_begin ()
1320{
1321 ppc_set_cpu ();
1322
1323 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1324
1325#ifdef OBJ_ELF
1326 /* Set the ELF flags if desired. */
1327 if (ppc_flags && !msolaris)
1328 bfd_set_private_flags (stdoutput, ppc_flags);
1329#endif
1330
1331 ppc_setup_opcodes ();
252b5132 1332
67c1ffbe 1333 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1334 by the user. */
252b5132
RH
1335 if (!set_target_endian)
1336 {
1337 set_target_endian = 1;
1338 target_big_endian = PPC_BIG_ENDIAN;
1339 }
1340
1341#ifdef OBJ_XCOFF
1342 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1343
1344 /* Create dummy symbols to serve as initial csects. This forces the
1345 text csects to precede the data csects. These symbols will not
1346 be output. */
1347 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1348 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1349 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1350 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH
1351#endif
1352
1353#ifdef TE_PE
1354
1355 ppc_current_section = text_section;
81d4177b 1356 ppc_previous_section = 0;
252b5132
RH
1357
1358#endif
1359}
1360
6a0c61b7
EZ
1361void
1362ppc_cleanup ()
1363{
dc1d03fc 1364#ifdef OBJ_ELF
6a0c61b7
EZ
1365 if (ppc_apuinfo_list == NULL)
1366 return;
1367
1368 /* Ok, so write the section info out. We have this layout:
1369
1370 byte data what
1371 ---- ---- ----
1372 0 8 length of "APUinfo\0"
1373 4 (n*4) number of APU's (4 bytes each)
1374 8 2 note type 2
1375 12 "APUinfo\0" name
1376 20 APU#1 first APU's info
1377 24 APU#2 second APU's info
1378 ... ...
1379 */
1380 {
1381 char *p;
1382 asection *seg = now_seg;
1383 subsegT subseg = now_subseg;
1384 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1385 unsigned int i;
6a0c61b7
EZ
1386
1387 /* Create the .PPC.EMB.apuinfo section. */
1388 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1389 bfd_set_section_flags (stdoutput,
1390 apuinfo_secp,
e1a9cb8e 1391 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ
1392
1393 p = frag_more (4);
1394 md_number_to_chars (p, (valueT) 8, 4);
1395
1396 p = frag_more (4);
e98d298c 1397 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ
1398
1399 p = frag_more (4);
1400 md_number_to_chars (p, (valueT) 2, 4);
1401
1402 p = frag_more (8);
1403 strcpy (p, "APUinfo");
1404
1405 for (i = 0; i < ppc_apuinfo_num; i++)
1406 {
b34976b6
AM
1407 p = frag_more (4);
1408 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ
1409 }
1410
1411 frag_align (2, 0, 0);
1412
1413 /* We probably can't restore the current segment, for there likely
1414 isn't one yet... */
1415 if (seg && subseg)
1416 subseg_set (seg, subseg);
1417 }
dc1d03fc 1418#endif
6a0c61b7
EZ
1419}
1420
252b5132
RH
1421/* Insert an operand value into an instruction. */
1422
1423static unsigned long
1424ppc_insert_operand (insn, operand, val, file, line)
1425 unsigned long insn;
1426 const struct powerpc_operand *operand;
1427 offsetT val;
1428 char *file;
1429 unsigned int line;
1430{
1431 if (operand->bits != 32)
1432 {
1433 long min, max;
1434 offsetT test;
1435
1436 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1437 {
d0e9a01c 1438 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH
1439 max = (1 << operand->bits) - 1;
1440 else
1441 max = (1 << (operand->bits - 1)) - 1;
1442 min = - (1 << (operand->bits - 1));
1443
2b3c4602 1444 if (!ppc_obj64)
252b5132
RH
1445 {
1446 /* Some people write 32 bit hex constants with the sign
1447 extension done by hand. This shouldn't really be
1448 valid, but, to permit this code to assemble on a 64
1449 bit host, we sign extend the 32 bit value. */
1450 if (val > 0
92161534
ILT
1451 && (val & (offsetT) 0x80000000) != 0
1452 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH
1453 {
1454 val -= 0x80000000;
1455 val -= 0x80000000;
1456 }
1457 }
1458 }
1459 else
1460 {
1461 max = (1 << operand->bits) - 1;
1462 min = 0;
1463 }
1464
1465 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1466 test = - val;
1467 else
1468 test = val;
1469
1470 if (test < (offsetT) min || test > (offsetT) max)
e5976317 1471 as_bad_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
252b5132
RH
1472 }
1473
1474 if (operand->insert)
1475 {
1476 const char *errmsg;
1477
1478 errmsg = NULL;
2b3c4602 1479 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1480 if (errmsg != (const char *) NULL)
0baf16f2 1481 as_bad_where (file, line, errmsg);
252b5132
RH
1482 }
1483 else
1484 insn |= (((long) val & ((1 << operand->bits) - 1))
1485 << operand->shift);
1486
1487 return insn;
1488}
1489
1490\f
1491#ifdef OBJ_ELF
1492/* Parse @got, etc. and return the desired relocation. */
1493static bfd_reloc_code_real_type
1494ppc_elf_suffix (str_p, exp_p)
1495 char **str_p;
1496 expressionS *exp_p;
1497{
1498 struct map_bfd {
1499 char *string;
b7d7dc63
AM
1500 unsigned int length : 8;
1501 unsigned int valid32 : 1;
1502 unsigned int valid64 : 1;
1503 unsigned int reloc;
252b5132
RH
1504 };
1505
1506 char ident[20];
1507 char *str = *str_p;
1508 char *str2;
1509 int ch;
1510 int len;
15c1449b 1511 const struct map_bfd *ptr;
252b5132 1512
b7d7dc63
AM
1513#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1514#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1515#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1516
15c1449b 1517 static const struct map_bfd mapping[] = {
b7d7dc63
AM
1518 MAP ("l", BFD_RELOC_LO16),
1519 MAP ("h", BFD_RELOC_HI16),
1520 MAP ("ha", BFD_RELOC_HI16_S),
1521 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1522 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1523 MAP ("got", BFD_RELOC_16_GOTOFF),
1524 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1525 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1526 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1527 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1528 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1529 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1530 MAP ("copy", BFD_RELOC_PPC_COPY),
1531 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1532 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1533 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1534 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1535 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1536 MAP ("tls", BFD_RELOC_PPC_TLS),
1537 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1538 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1539 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1540 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1541 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1542 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1543 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1544 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1545 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1546 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1547 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1548 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1549 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1550 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1551 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1552 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1553 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1554 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1555 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1556 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1557 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1558 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1559 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1560 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1561 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1562 MAP32 ("fixup", BFD_RELOC_CTOR),
1563 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1564 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1565 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1566 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1567 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1568 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1569 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1570 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1571 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1572 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1573 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1574 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1575 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1576 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1577 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1578 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1579 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1580 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1581 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1582 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1583 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1584 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1585 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1586 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1587 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1588 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1589 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1590 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1591 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1592 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1593 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1594 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1595 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1596 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1597 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1598 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1599 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1600 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1601 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1602 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1603 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH
1604 };
1605
1606 if (*str++ != '@')
1607 return BFD_RELOC_UNUSED;
1608
1609 for (ch = *str, str2 = ident;
1610 (str2 < ident + sizeof (ident) - 1
3882b010 1611 && (ISALNUM (ch) || ch == '@'));
252b5132
RH
1612 ch = *++str)
1613 {
3882b010 1614 *str2++ = TOLOWER (ch);
252b5132
RH
1615 }
1616
1617 *str2 = '\0';
1618 len = str2 - ident;
1619
1620 ch = ident[0];
1621 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1622 if (ch == ptr->string[0]
1623 && len == ptr->length
b7d7dc63
AM
1624 && memcmp (ident, ptr->string, ptr->length) == 0
1625 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1626 {
15c1449b
AM
1627 int reloc = ptr->reloc;
1628
cdba85ec 1629 if (!ppc_obj64)
5f6db75a
AM
1630 if (exp_p->X_add_number != 0
1631 && (reloc == (int) BFD_RELOC_16_GOTOFF
1632 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1633 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1634 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1635 as_warn (_("identifier+constant@got means identifier@got+constant"));
1636
1637 /* Now check for identifier@suffix+constant. */
1638 if (*str == '-' || *str == '+')
252b5132 1639 {
5f6db75a
AM
1640 char *orig_line = input_line_pointer;
1641 expressionS new_exp;
1642
1643 input_line_pointer = str;
1644 expression (&new_exp);
1645 if (new_exp.X_op == O_constant)
252b5132 1646 {
5f6db75a
AM
1647 exp_p->X_add_number += new_exp.X_add_number;
1648 str = input_line_pointer;
252b5132 1649 }
5f6db75a
AM
1650
1651 if (&input_line_pointer != str_p)
1652 input_line_pointer = orig_line;
252b5132 1653 }
252b5132 1654 *str_p = str;
0baf16f2 1655
2b3c4602 1656 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM
1657 && exp_p->X_op == O_symbol
1658 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1659 {
9f2b53d7
AM
1660 /* Change the symbol so that the dummy .TOC. symbol can be
1661 omitted from the object file. */
0baf16f2
AM
1662 exp_p->X_add_symbol = &abs_symbol;
1663 }
1664
15c1449b 1665 return (bfd_reloc_code_real_type) reloc;
252b5132
RH
1666 }
1667
1668 return BFD_RELOC_UNUSED;
1669}
1670
99a814a1
AM
1671/* Like normal .long/.short/.word, except support @got, etc.
1672 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH
1673static void
1674ppc_elf_cons (nbytes)
0baf16f2 1675 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH
1676{
1677 expressionS exp;
1678 bfd_reloc_code_real_type reloc;
1679
1680 if (is_it_end_of_statement ())
1681 {
1682 demand_empty_rest_of_line ();
1683 return;
1684 }
1685
1686 do
1687 {
1688 expression (&exp);
1689 if (exp.X_op == O_symbol
1690 && *input_line_pointer == '@'
99a814a1
AM
1691 && (reloc = ppc_elf_suffix (&input_line_pointer,
1692 &exp)) != BFD_RELOC_UNUSED)
252b5132 1693 {
99a814a1
AM
1694 reloc_howto_type *reloc_howto;
1695 int size;
1696
1697 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1698 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH
1699
1700 if (size > nbytes)
0baf16f2
AM
1701 {
1702 as_bad (_("%s relocations do not fit in %d bytes\n"),
1703 reloc_howto->name, nbytes);
1704 }
252b5132
RH
1705 else
1706 {
0baf16f2
AM
1707 char *p;
1708 int offset;
252b5132 1709
0baf16f2
AM
1710 p = frag_more (nbytes);
1711 offset = 0;
1712 if (target_big_endian)
1713 offset = nbytes - size;
99a814a1
AM
1714 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1715 &exp, 0, reloc);
252b5132
RH
1716 }
1717 }
1718 else
1719 emit_expr (&exp, (unsigned int) nbytes);
1720 }
1721 while (*input_line_pointer++ == ',');
1722
99a814a1
AM
1723 /* Put terminator back into stream. */
1724 input_line_pointer--;
252b5132
RH
1725 demand_empty_rest_of_line ();
1726}
1727
1728/* Solaris pseduo op to change to the .rodata section. */
1729static void
1730ppc_elf_rdata (xxx)
1731 int xxx;
1732{
1733 char *save_line = input_line_pointer;
1734 static char section[] = ".rodata\n";
1735
99a814a1 1736 /* Just pretend this is .section .rodata */
252b5132
RH
1737 input_line_pointer = section;
1738 obj_elf_section (xxx);
1739
1740 input_line_pointer = save_line;
1741}
1742
99a814a1 1743/* Pseudo op to make file scope bss items. */
252b5132 1744static void
99a814a1 1745ppc_elf_lcomm (xxx)
92161534 1746 int xxx ATTRIBUTE_UNUSED;
252b5132
RH
1747{
1748 register char *name;
1749 register char c;
1750 register char *p;
1751 offsetT size;
1752 register symbolS *symbolP;
1753 offsetT align;
1754 segT old_sec;
1755 int old_subsec;
1756 char *pfrag;
1757 int align2;
1758
1759 name = input_line_pointer;
1760 c = get_symbol_end ();
1761
99a814a1 1762 /* just after name is now '\0'. */
252b5132
RH
1763 p = input_line_pointer;
1764 *p = c;
1765 SKIP_WHITESPACE ();
1766 if (*input_line_pointer != ',')
1767 {
1768 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1769 ignore_rest_of_line ();
1770 return;
1771 }
1772
1773 input_line_pointer++; /* skip ',' */
1774 if ((size = get_absolute_expression ()) < 0)
1775 {
1776 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1777 ignore_rest_of_line ();
1778 return;
1779 }
1780
1781 /* The third argument to .lcomm is the alignment. */
1782 if (*input_line_pointer != ',')
1783 align = 8;
1784 else
1785 {
1786 ++input_line_pointer;
1787 align = get_absolute_expression ();
1788 if (align <= 0)
1789 {
1790 as_warn (_("ignoring bad alignment"));
1791 align = 8;
1792 }
1793 }
1794
1795 *p = 0;
1796 symbolP = symbol_find_or_make (name);
1797 *p = c;
1798
1799 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1800 {
1801 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1802 S_GET_NAME (symbolP));
1803 ignore_rest_of_line ();
1804 return;
1805 }
1806
1807 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1808 {
1809 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1810 S_GET_NAME (symbolP),
1811 (long) S_GET_VALUE (symbolP),
1812 (long) size);
1813
1814 ignore_rest_of_line ();
1815 return;
1816 }
1817
99a814a1 1818 /* Allocate_bss. */
252b5132
RH
1819 old_sec = now_seg;
1820 old_subsec = now_subseg;
1821 if (align)
1822 {
99a814a1 1823 /* Convert to a power of 2 alignment. */
252b5132
RH
1824 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1825 if (align != 1)
1826 {
1827 as_bad (_("Common alignment not a power of 2"));
1828 ignore_rest_of_line ();
1829 return;
1830 }
1831 }
1832 else
1833 align2 = 0;
1834
1835 record_alignment (bss_section, align2);
1836 subseg_set (bss_section, 0);
1837 if (align2)
1838 frag_align (align2, 0, 0);
1839 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT
1840 symbol_get_frag (symbolP)->fr_symbol = 0;
1841 symbol_set_frag (symbolP, frag_now);
252b5132
RH
1842 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1843 (char *) 0);
1844 *pfrag = 0;
1845 S_SET_SIZE (symbolP, size);
1846 S_SET_SEGMENT (symbolP, bss_section);
1847 subseg_set (old_sec, old_subsec);
1848 demand_empty_rest_of_line ();
1849}
1850
1851/* Validate any relocations emitted for -mrelocatable, possibly adding
1852 fixups for word relocations in writable segments, so we can adjust
1853 them at runtime. */
1854static void
1855ppc_elf_validate_fix (fixp, seg)
1856 fixS *fixp;
1857 segT seg;
1858{
1859 if (fixp->fx_done || fixp->fx_pcrel)
1860 return;
1861
1862 switch (shlib)
1863 {
1864 case SHLIB_NONE:
1865 case SHLIB_PIC:
1866 return;
1867
5d6f4f16 1868 case SHLIB_MRELOCATABLE:
252b5132
RH
1869 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1870 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1871 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1872 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1873 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1874 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH
1875 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1876 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1877 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1878 && (seg->flags & SEC_LOAD) != 0
252b5132
RH
1879 && strcmp (segment_name (seg), ".got2") != 0
1880 && strcmp (segment_name (seg), ".dtors") != 0
1881 && strcmp (segment_name (seg), ".ctors") != 0
1882 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH
1883 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1884 && strcmp (segment_name (seg), ".eh_frame") != 0
1885 && strcmp (segment_name (seg), ".ex_shared") != 0)
1886 {
1887 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1888 || fixp->fx_r_type != BFD_RELOC_CTOR)
1889 {
1890 as_bad_where (fixp->fx_file, fixp->fx_line,
1891 _("Relocation cannot be done when using -mrelocatable"));
1892 }
1893 }
1894 return;
1895 }
1896}
0baf16f2 1897
7e8d4ab4
AM
1898/* Prevent elf_frob_file_before_adjust removing a weak undefined
1899 function descriptor sym if the corresponding code sym is used. */
1900
1901void
1902ppc_frob_file_before_adjust ()
0baf16f2 1903{
7e8d4ab4 1904 symbolS *symp;
9232bbb0 1905 asection *toc;
0baf16f2 1906
7e8d4ab4
AM
1907 if (!ppc_obj64)
1908 return;
1909
1910 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1911 {
7e8d4ab4
AM
1912 const char *name;
1913 char *dotname;
1914 symbolS *dotsym;
1915 size_t len;
1916
1917 name = S_GET_NAME (symp);
1918 if (name[0] == '.')
1919 continue;
1920
1921 if (! S_IS_WEAK (symp)
1922 || S_IS_DEFINED (symp))
1923 continue;
1924
1925 len = strlen (name) + 1;
1926 dotname = xmalloc (len + 1);
1927 dotname[0] = '.';
1928 memcpy (dotname + 1, name, len);
1929 dotsym = symbol_find (dotname);
1930 free (dotname);
1931 if (dotsym != NULL && (symbol_used_p (dotsym)
1932 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC
1933 symbol_mark_used (symp);
1934
0baf16f2
AM
1935 }
1936
9232bbb0
AM
1937 toc = bfd_get_section_by_name (stdoutput, ".toc");
1938 if (toc != NULL
1939 && bfd_section_size (stdoutput, toc) > 0x10000)
1940 as_warn (_("TOC section size exceeds 64k"));
1941
7e8d4ab4
AM
1942 /* Don't emit .TOC. symbol. */
1943 symp = symbol_find (".TOC.");
1944 if (symp != NULL)
1945 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1946}
252b5132
RH
1947#endif /* OBJ_ELF */
1948\f
1949#ifdef TE_PE
1950
1951/*
99a814a1 1952 * Summary of parse_toc_entry.
252b5132
RH
1953 *
1954 * in: Input_line_pointer points to the '[' in one of:
1955 *
1956 * [toc] [tocv] [toc32] [toc64]
1957 *
1958 * Anything else is an error of one kind or another.
1959 *
81d4177b 1960 * out:
252b5132
RH
1961 * return value: success or failure
1962 * toc_kind: kind of toc reference
1963 * input_line_pointer:
1964 * success: first char after the ']'
1965 * failure: unchanged
1966 *
1967 * settings:
1968 *
1969 * [toc] - rv == success, toc_kind = default_toc
1970 * [tocv] - rv == success, toc_kind = data_in_toc
1971 * [toc32] - rv == success, toc_kind = must_be_32
1972 * [toc64] - rv == success, toc_kind = must_be_64
1973 *
1974 */
1975
81d4177b
KH
1976enum toc_size_qualifier
1977{
252b5132
RH
1978 default_toc, /* The toc cell constructed should be the system default size */
1979 data_in_toc, /* This is a direct reference to a toc cell */
1980 must_be_32, /* The toc cell constructed must be 32 bits wide */
1981 must_be_64 /* The toc cell constructed must be 64 bits wide */
1982};
1983
1984static int
99a814a1 1985parse_toc_entry (toc_kind)
252b5132
RH
1986 enum toc_size_qualifier *toc_kind;
1987{
1988 char *start;
1989 char *toc_spec;
1990 char c;
1991 enum toc_size_qualifier t;
1992
99a814a1 1993 /* Save the input_line_pointer. */
252b5132
RH
1994 start = input_line_pointer;
1995
99a814a1 1996 /* Skip over the '[' , and whitespace. */
252b5132
RH
1997 ++input_line_pointer;
1998 SKIP_WHITESPACE ();
81d4177b 1999
99a814a1 2000 /* Find the spelling of the operand. */
252b5132
RH
2001 toc_spec = input_line_pointer;
2002 c = get_symbol_end ();
2003
99a814a1 2004 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH
2005 {
2006 t = default_toc;
2007 }
99a814a1 2008 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH
2009 {
2010 t = data_in_toc;
2011 }
99a814a1 2012 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH
2013 {
2014 t = must_be_32;
2015 }
99a814a1 2016 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH
2017 {
2018 t = must_be_64;
2019 }
2020 else
2021 {
2022 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM
2023 *input_line_pointer = c;
2024 input_line_pointer = start;
252b5132
RH
2025 return 0;
2026 }
2027
99a814a1
AM
2028 /* Now find the ']'. */
2029 *input_line_pointer = c;
252b5132 2030
81d4177b
KH
2031 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2032 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH
2033
2034 if (c != ']')
2035 {
2036 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2037 input_line_pointer = start;
252b5132
RH
2038 return 0;
2039 }
2040
99a814a1 2041 *toc_kind = t;
252b5132
RH
2042 return 1;
2043}
2044#endif
2045\f
2046
dc1d03fc 2047#ifdef OBJ_ELF
6a0c61b7
EZ
2048#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2049static void
dc1d03fc 2050ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ
2051 unsigned int apu, version;
2052{
2053 unsigned int i;
2054
2055 /* Check we don't already exist. */
2056 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2057 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2058 return;
b34976b6 2059
6a0c61b7
EZ
2060 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2061 {
2062 if (ppc_apuinfo_num_alloc == 0)
2063 {
2064 ppc_apuinfo_num_alloc = 4;
2065 ppc_apuinfo_list = (unsigned long *)
2066 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2067 }
2068 else
2069 {
2070 ppc_apuinfo_num_alloc += 4;
2071 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2072 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2073 }
2074 }
dc1d03fc 2075 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ
2076}
2077#undef APUID
dc1d03fc 2078#endif
6a0c61b7
EZ
2079\f
2080
252b5132
RH
2081/* We need to keep a list of fixups. We can't simply generate them as
2082 we go, because that would require us to first create the frag, and
2083 that would screw up references to ``.''. */
2084
2085struct ppc_fixup
2086{
2087 expressionS exp;
2088 int opindex;
2089 bfd_reloc_code_real_type reloc;
2090};
2091
2092#define MAX_INSN_FIXUPS (5)
2093
2094/* This routine is called for each instruction to be assembled. */
2095
2096void
2097md_assemble (str)
2098 char *str;
2099{
2100 char *s;
2101 const struct powerpc_opcode *opcode;
2102 unsigned long insn;
2103 const unsigned char *opindex_ptr;
2104 int skip_optional;
2105 int need_paren;
2106 int next_opindex;
2107 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2108 int fc;
2109 char *f;
09b935ac 2110 int addr_mod;
252b5132
RH
2111 int i;
2112#ifdef OBJ_ELF
2113 bfd_reloc_code_real_type reloc;
2114#endif
2115
2116 /* Get the opcode. */
3882b010 2117 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH
2118 ;
2119 if (*s != '\0')
2120 *s++ = '\0';
2121
2122 /* Look up the opcode in the hash table. */
2123 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2124 if (opcode == (const struct powerpc_opcode *) NULL)
2125 {
2126 const struct powerpc_macro *macro;
2127
2128 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2129 if (macro == (const struct powerpc_macro *) NULL)
2130 as_bad (_("Unrecognized opcode: `%s'"), str);
2131 else
2132 ppc_macro (s, macro);
2133
2134 return;
2135 }
2136
2137 insn = opcode->opcode;
2138
2139 str = s;
3882b010 2140 while (ISSPACE (*str))
252b5132
RH
2141 ++str;
2142
2143 /* PowerPC operands are just expressions. The only real issue is
2144 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW
2145 an optional operand separate the operands only with commas (in some
2146 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2147 have optional operands). Most instructions with optional operands
2148 have only one. Those that have more than one optional operand can
2149 take either all their operands or none. So, before we start seriously
2150 parsing the operands, we check to see if we have optional operands,
2151 and if we do, we count the number of commas to see which operands
2152 have been omitted. */
252b5132
RH
2153 skip_optional = 0;
2154 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2155 {
2156 const struct powerpc_operand *operand;
2157
2158 operand = &powerpc_operands[*opindex_ptr];
2159 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2160 {
2161 unsigned int opcount;
7fe9cf6b
NC
2162 unsigned int num_operands_expected;
2163 unsigned int i;
252b5132
RH
2164
2165 /* There is an optional operand. Count the number of
2166 commas in the input line. */
2167 if (*str == '\0')
2168 opcount = 0;
2169 else
2170 {
2171 opcount = 1;
2172 s = str;
2173 while ((s = strchr (s, ',')) != (char *) NULL)
2174 {
2175 ++opcount;
2176 ++s;
2177 }
2178 }
2179
7fe9cf6b
NC
2180 /* Compute the number of expected operands.
2181 Do not count fake operands. */
2182 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2183 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2184 ++ num_operands_expected;
2185
252b5132
RH
2186 /* If there are fewer operands in the line then are called
2187 for by the instruction, we want to skip the optional
1f6c9eb0 2188 operands. */
7fe9cf6b 2189 if (opcount < num_operands_expected)
252b5132
RH
2190 skip_optional = 1;
2191
2192 break;
2193 }
2194 }
2195
2196 /* Gather the operands. */
2197 need_paren = 0;
2198 next_opindex = 0;
2199 fc = 0;
2200 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2201 {
2202 const struct powerpc_operand *operand;
2203 const char *errmsg;
2204 char *hold;
2205 expressionS ex;
2206 char endc;
2207
2208 if (next_opindex == 0)
2209 operand = &powerpc_operands[*opindex_ptr];
2210 else
2211 {
2212 operand = &powerpc_operands[next_opindex];
2213 next_opindex = 0;
2214 }
252b5132
RH
2215 errmsg = NULL;
2216
2217 /* If this is a fake operand, then we do not expect anything
2218 from the input. */
2219 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2220 {
2b3c4602 2221 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH
2222 if (errmsg != (const char *) NULL)
2223 as_bad (errmsg);
2224 continue;
2225 }
2226
2227 /* If this is an optional operand, and we are skipping it, just
2228 insert a zero. */
2229 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2230 && skip_optional)
2231 {
2232 if (operand->insert)
2233 {
2b3c4602 2234 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH
2235 if (errmsg != (const char *) NULL)
2236 as_bad (errmsg);
2237 }
2238 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2239 next_opindex = *opindex_ptr + 1;
2240 continue;
2241 }
2242
2243 /* Gather the operand. */
2244 hold = input_line_pointer;
2245 input_line_pointer = str;
2246
2247#ifdef TE_PE
81d4177b 2248 if (*input_line_pointer == '[')
252b5132
RH
2249 {
2250 /* We are expecting something like the second argument here:
99a814a1
AM
2251 *
2252 * lwz r4,[toc].GS.0.static_int(rtoc)
2253 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2254 * The argument following the `]' must be a symbol name, and the
2255 * register must be the toc register: 'rtoc' or '2'
2256 *
2257 * The effect is to 0 as the displacement field
2258 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2259 * the appropriate variation) reloc against it based on the symbol.
2260 * The linker will build the toc, and insert the resolved toc offset.
2261 *
2262 * Note:
2263 * o The size of the toc entry is currently assumed to be
2264 * 32 bits. This should not be assumed to be a hard coded
2265 * number.
2266 * o In an effort to cope with a change from 32 to 64 bits,
2267 * there are also toc entries that are specified to be
2268 * either 32 or 64 bits:
2269 * lwz r4,[toc32].GS.0.static_int(rtoc)
2270 * lwz r4,[toc64].GS.0.static_int(rtoc)
2271 * These demand toc entries of the specified size, and the
2272 * instruction probably requires it.
2273 */
252b5132
RH
2274
2275 int valid_toc;
2276 enum toc_size_qualifier toc_kind;
2277 bfd_reloc_code_real_type toc_reloc;
2278
99a814a1
AM
2279 /* Go parse off the [tocXX] part. */
2280 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2281
81d4177b 2282 if (!valid_toc)
252b5132 2283 {
99a814a1
AM
2284 /* Note: message has already been issued.
2285 FIXME: what sort of recovery should we do?
2286 demand_rest_of_line (); return; ? */
252b5132
RH
2287 }
2288
99a814a1
AM
2289 /* Now get the symbol following the ']'. */
2290 expression (&ex);
252b5132
RH
2291
2292 switch (toc_kind)
2293 {
2294 case default_toc:
99a814a1
AM
2295 /* In this case, we may not have seen the symbol yet,
2296 since it is allowed to appear on a .extern or .globl
2297 or just be a label in the .data section. */
252b5132
RH
2298 toc_reloc = BFD_RELOC_PPC_TOC16;
2299 break;
2300 case data_in_toc:
99a814a1
AM
2301 /* 1. The symbol must be defined and either in the toc
2302 section, or a global.
2303 2. The reloc generated must have the TOCDEFN flag set
2304 in upper bit mess of the reloc type.
2305 FIXME: It's a little confusing what the tocv
2306 qualifier can be used for. At the very least, I've
2307 seen three uses, only one of which I'm sure I can
2308 explain. */
81d4177b
KH
2309 if (ex.X_op == O_symbol)
2310 {
252b5132 2311 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT
2312 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2313 != tocdata_section)
252b5132 2314 {
99a814a1 2315 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH
2316 }
2317 }
2318
2319 toc_reloc = BFD_RELOC_PPC_TOC16;
2320 break;
2321 case must_be_32:
99a814a1
AM
2322 /* FIXME: these next two specifically specify 32/64 bit
2323 toc entries. We don't support them today. Is this
2324 the right way to say that? */
252b5132
RH
2325 toc_reloc = BFD_RELOC_UNUSED;
2326 as_bad (_("Unimplemented toc32 expression modifier"));
2327 break;
2328 case must_be_64:
99a814a1 2329 /* FIXME: see above. */
252b5132
RH
2330 toc_reloc = BFD_RELOC_UNUSED;
2331 as_bad (_("Unimplemented toc64 expression modifier"));
2332 break;
2333 default:
bc805888 2334 fprintf (stderr,
99a814a1
AM
2335 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2336 toc_kind);
bc805888 2337 abort ();
252b5132
RH
2338 break;
2339 }
2340
2341 /* We need to generate a fixup for this expression. */
2342 if (fc >= MAX_INSN_FIXUPS)
2343 as_fatal (_("too many fixups"));
2344
2345 fixups[fc].reloc = toc_reloc;
2346 fixups[fc].exp = ex;
2347 fixups[fc].opindex = *opindex_ptr;
2348 ++fc;
2349
99a814a1
AM
2350 /* Ok. We've set up the fixup for the instruction. Now make it
2351 look like the constant 0 was found here. */
252b5132
RH
2352 ex.X_unsigned = 1;
2353 ex.X_op = O_constant;
2354 ex.X_add_number = 0;
2355 ex.X_add_symbol = NULL;
2356 ex.X_op_symbol = NULL;
2357 }
2358
2359 else
2360#endif /* TE_PE */
2361 {
2362 if (! register_name (&ex))
2363 {
2364 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2365 cr_operand = TRUE;
252b5132 2366 expression (&ex);
b34976b6 2367 cr_operand = FALSE;
252b5132
RH
2368 }
2369 }
2370
2371 str = input_line_pointer;
2372 input_line_pointer = hold;
2373
2374 if (ex.X_op == O_illegal)
2375 as_bad (_("illegal operand"));
2376 else if (ex.X_op == O_absent)
2377 as_bad (_("missing operand"));
2378 else if (ex.X_op == O_register)
2379 {
2380 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2381 (char *) NULL, 0);
2382 }
2383 else if (ex.X_op == O_constant)
2384 {
2385#ifdef OBJ_ELF
81d4177b 2386 /* Allow @HA, @L, @H on constants. */
252b5132
RH
2387 char *orig_str = str;
2388
2389 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2390 switch (reloc)
2391 {
2392 default:
2393 str = orig_str;
2394 break;
2395
2396 case BFD_RELOC_LO16:
2397 /* X_unsigned is the default, so if the user has done
0baf16f2
AM
2398 something which cleared it, we always produce a
2399 signed value. */
2400 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH
2401 ex.X_add_number &= 0xffff;
2402 else
0baf16f2 2403 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH
2404 break;
2405
2406 case BFD_RELOC_HI16:
0baf16f2
AM
2407 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2408 ex.X_add_number = PPC_HI (ex.X_add_number);
2409 else
2410 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH
2411 break;
2412
2413 case BFD_RELOC_HI16_S:
0baf16f2
AM
2414 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2415 ex.X_add_number = PPC_HA (ex.X_add_number);
2416 else
2417 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2418 break;
2419
0baf16f2
AM
2420 case BFD_RELOC_PPC64_HIGHER:
2421 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2422 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2423 else
2424 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2425 break;
2426
2427 case BFD_RELOC_PPC64_HIGHER_S:
2428 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2429 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2430 else
2431 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2432 break;
0baf16f2
AM
2433
2434 case BFD_RELOC_PPC64_HIGHEST:
2435 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2436 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2437 else
2438 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2439 break;
2440
2441 case BFD_RELOC_PPC64_HIGHEST_S:
2442 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2443 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2444 else
2445 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2446 break;
252b5132 2447 }
0baf16f2 2448#endif /* OBJ_ELF */
252b5132
RH
2449 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2450 (char *) NULL, 0);
2451 }
2452#ifdef OBJ_ELF
2453 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2454 {
cdba85ec
AM
2455 /* Some TLS tweaks. */
2456 switch (reloc)
2457 {
2458 default:
2459 break;
2460 case BFD_RELOC_PPC_TLS:
2461 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2462 (char *) NULL, 0);
2463 break;
2464 /* We'll only use the 32 (or 64) bit form of these relocations
2465 in constants. Instructions get the 16 bit form. */
2466 case BFD_RELOC_PPC_DTPREL:
2467 reloc = BFD_RELOC_PPC_DTPREL16;
2468 break;
2469 case BFD_RELOC_PPC_TPREL:
2470 reloc = BFD_RELOC_PPC_TPREL16;
2471 break;
2472 }
2473
99a814a1
AM
2474 /* For the absolute forms of branches, convert the PC
2475 relative form back into the absolute. */
252b5132
RH
2476 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2477 {
2478 switch (reloc)
2479 {
2480 case BFD_RELOC_PPC_B26:
2481 reloc = BFD_RELOC_PPC_BA26;
2482 break;
2483 case BFD_RELOC_PPC_B16:
2484 reloc = BFD_RELOC_PPC_BA16;
2485 break;
2486 case BFD_RELOC_PPC_B16_BRTAKEN:
2487 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2488 break;
2489 case BFD_RELOC_PPC_B16_BRNTAKEN:
2490 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2491 break;
2492 default:
2493 break;
2494 }
2495 }
2496
2b3c4602 2497 if (ppc_obj64
adadcc0c 2498 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM
2499 {
2500 switch (reloc)
2501 {
2502 case BFD_RELOC_16:
2503 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2504 break;
2505 case BFD_RELOC_LO16:
2506 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2507 break;
2508 case BFD_RELOC_16_GOTOFF:
2509 reloc = BFD_RELOC_PPC64_GOT16_DS;
2510 break;
2511 case BFD_RELOC_LO16_GOTOFF:
2512 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2513 break;
2514 case BFD_RELOC_LO16_PLTOFF:
2515 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2516 break;
1cfc59d5 2517 case BFD_RELOC_16_BASEREL:
0baf16f2
AM
2518 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2519 break;
2520 case BFD_RELOC_LO16_BASEREL:
2521 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2522 break;
2523 case BFD_RELOC_PPC_TOC16:
2524 reloc = BFD_RELOC_PPC64_TOC16_DS;
2525 break;
2526 case BFD_RELOC_PPC64_TOC16_LO:
2527 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2528 break;
2529 case BFD_RELOC_PPC64_PLTGOT16:
2530 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2531 break;
2532 case BFD_RELOC_PPC64_PLTGOT16_LO:
2533 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2534 break;
cdba85ec
AM
2535 case BFD_RELOC_PPC_DTPREL16:
2536 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2537 break;
2538 case BFD_RELOC_PPC_DTPREL16_LO:
2539 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2540 break;
2541 case BFD_RELOC_PPC_TPREL16:
2542 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2543 break;
2544 case BFD_RELOC_PPC_TPREL16_LO:
2545 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2546 break;
2547 case BFD_RELOC_PPC_GOT_DTPREL16:
2548 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2549 case BFD_RELOC_PPC_GOT_TPREL16:
2550 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2551 break;
0baf16f2
AM
2552 default:
2553 as_bad (_("unsupported relocation for DS offset field"));
2554 break;
2555 }
2556 }
2557
252b5132
RH
2558 /* We need to generate a fixup for this expression. */
2559 if (fc >= MAX_INSN_FIXUPS)
2560 as_fatal (_("too many fixups"));
2561 fixups[fc].exp = ex;
2562 fixups[fc].opindex = 0;
2563 fixups[fc].reloc = reloc;
2564 ++fc;
2565 }
2566#endif /* OBJ_ELF */
2567
2568 else
2569 {
2570 /* We need to generate a fixup for this expression. */
2571 if (fc >= MAX_INSN_FIXUPS)
2572 as_fatal (_("too many fixups"));
2573 fixups[fc].exp = ex;
2574 fixups[fc].opindex = *opindex_ptr;
2575 fixups[fc].reloc = BFD_RELOC_UNUSED;
2576 ++fc;
2577 }
2578
2579 if (need_paren)
2580 {
2581 endc = ')';
2582 need_paren = 0;
2583 }
2584 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2585 {
2586 endc = '(';
2587 need_paren = 1;
2588 }
2589 else
2590 endc = ',';
2591
2592 /* The call to expression should have advanced str past any
2593 whitespace. */
2594 if (*str != endc
2595 && (endc != ',' || *str != '\0'))
2596 {
2597 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2598 break;
2599 }
2600
2601 if (*str != '\0')
2602 ++str;
2603 }
2604
3882b010 2605 while (ISSPACE (*str))
252b5132
RH
2606 ++str;
2607
2608 if (*str != '\0')
2609 as_bad (_("junk at end of line: `%s'"), str);
2610
dc1d03fc 2611#ifdef OBJ_ELF
6a0c61b7
EZ
2612 /* Do we need/want a APUinfo section? */
2613 if (ppc_cpu & (PPC_OPCODE_SPE
2614 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2615 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2616 | PPC_OPCODE_RFMCI))
2617 {
2618 /* These are all version "1". */
2619 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2620 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2621 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2622 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2623 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2624 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2625 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2626 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2627 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2628 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2629 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2630 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2631 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2632 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2633 }
dc1d03fc 2634#endif
6a0c61b7 2635
252b5132
RH
2636 /* Write out the instruction. */
2637 f = frag_more (4);
09b935ac
AM
2638 addr_mod = frag_now_fix () & 3;
2639 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2640 as_bad (_("instruction address is not a multiple of 4"));
2641 frag_now->insn_addr = addr_mod;
2642 frag_now->has_code = 1;
252b5132
RH
2643 md_number_to_chars (f, insn, 4);
2644
5d6f4f16
GK
2645#ifdef OBJ_ELF
2646 dwarf2_emit_insn (4);
2647#endif
2648
252b5132
RH
2649 /* Create any fixups. At this point we do not use a
2650 bfd_reloc_code_real_type, but instead just use the
2651 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2652 handle fixups for any operand type, although that is admittedly
2653 not a very exciting feature. We pick a BFD reloc type in
94f592af 2654 md_apply_fix3. */
252b5132
RH
2655 for (i = 0; i < fc; i++)
2656 {
2657 const struct powerpc_operand *operand;
2658
2659 operand = &powerpc_operands[fixups[i].opindex];
2660 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2661 {
99a814a1 2662 reloc_howto_type *reloc_howto;
252b5132
RH
2663 int size;
2664 int offset;
2665 fixS *fixP;
2666
99a814a1 2667 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH
2668 if (!reloc_howto)
2669 abort ();
2670
2671 size = bfd_get_reloc_size (reloc_howto);
2672 offset = target_big_endian ? (4 - size) : 0;
2673
2674 if (size < 1 || size > 4)
bc805888 2675 abort ();
252b5132 2676
99a814a1
AM
2677 fixP = fix_new_exp (frag_now,
2678 f - frag_now->fr_literal + offset,
2679 size,
2680 &fixups[i].exp,
2681 reloc_howto->pc_relative,
252b5132
RH
2682 fixups[i].reloc);
2683
2684 /* Turn off complaints that the addend is too large for things like
2685 foo+100000@ha. */
2686 switch (fixups[i].reloc)
2687 {
2688 case BFD_RELOC_16_GOTOFF:
2689 case BFD_RELOC_PPC_TOC16:
2690 case BFD_RELOC_LO16:
2691 case BFD_RELOC_HI16:
2692 case BFD_RELOC_HI16_S:
0baf16f2 2693#ifdef OBJ_ELF
0baf16f2
AM
2694 case BFD_RELOC_PPC64_HIGHER:
2695 case BFD_RELOC_PPC64_HIGHER_S:
2696 case BFD_RELOC_PPC64_HIGHEST:
2697 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2698#endif
252b5132
RH
2699 fixP->fx_no_overflow = 1;
2700 break;
2701 default:
2702 break;
2703 }
2704 }
2705 else
99a814a1
AM
2706 fix_new_exp (frag_now,
2707 f - frag_now->fr_literal,
2708 4,
252b5132
RH
2709 &fixups[i].exp,
2710 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2711 ((bfd_reloc_code_real_type)
99a814a1 2712 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH
2713 }
2714}
2715
2716/* Handle a macro. Gather all the operands, transform them as
2717 described by the macro, and call md_assemble recursively. All the
2718 operands are separated by commas; we don't accept parentheses
2719 around operands here. */
2720
2721static void
2722ppc_macro (str, macro)
2723 char *str;
2724 const struct powerpc_macro *macro;
2725{
2726 char *operands[10];
2727 unsigned int count;
2728 char *s;
2729 unsigned int len;
2730 const char *format;
2731 int arg;
2732 char *send;
2733 char *complete;
2734
2735 /* Gather the users operands into the operands array. */
2736 count = 0;
2737 s = str;
2738 while (1)
2739 {
2740 if (count >= sizeof operands / sizeof operands[0])
2741 break;
2742 operands[count++] = s;
2743 s = strchr (s, ',');
2744 if (s == (char *) NULL)
2745 break;
2746 *s++ = '\0';
81d4177b 2747 }
252b5132
RH
2748
2749 if (count != macro->operands)
2750 {
2751 as_bad (_("wrong number of operands"));
2752 return;
2753 }
2754
2755 /* Work out how large the string must be (the size is unbounded
2756 because it includes user input). */
2757 len = 0;
2758 format = macro->format;
2759 while (*format != '\0')
2760 {
2761 if (*format != '%')
2762 {
2763 ++len;
2764 ++format;
2765 }
2766 else
2767 {
2768 arg = strtol (format + 1, &send, 10);
2769 know (send != format && arg >= 0 && arg < count);
2770 len += strlen (operands[arg]);
2771 format = send;
2772 }
2773 }
2774
2775 /* Put the string together. */
2776 complete = s = (char *) alloca (len + 1);
2777 format = macro->format;
2778 while (*format != '\0')
2779 {
2780 if (*format != '%')
2781 *s++ = *format++;
2782 else
2783 {
2784 arg = strtol (format + 1, &send, 10);
2785 strcpy (s, operands[arg]);
2786 s += strlen (s);
2787 format = send;
2788 }
2789 }
2790 *s = '\0';
2791
2792 /* Assemble the constructed instruction. */
2793 md_assemble (complete);
81d4177b 2794}
252b5132
RH
2795\f
2796#ifdef OBJ_ELF
99a814a1 2797/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH
2798
2799int
2800ppc_section_letter (letter, ptr_msg)
2801 int letter;
2802 char **ptr_msg;
2803{
2804 if (letter == 'e')
2805 return SHF_EXCLUDE;
2806
13ae64f3 2807 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2808 return -1;
252b5132
RH
2809}
2810
2811int
9de8d8f1
RH
2812ppc_section_word (str, len)
2813 char *str;
2814 size_t len;
252b5132 2815{
9de8d8f1
RH
2816 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2817 return SHF_EXCLUDE;
252b5132 2818
9de8d8f1 2819 return -1;
252b5132
RH
2820}
2821
2822int
9de8d8f1
RH
2823ppc_section_type (str, len)
2824 char *str;
2825 size_t len;
252b5132 2826{
9de8d8f1
RH
2827 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2828 return SHT_ORDERED;
252b5132 2829
9de8d8f1 2830 return -1;
252b5132
RH
2831}
2832
2833int
2834ppc_section_flags (flags, attr, type)
2835 int flags;
2836 int attr;
2837 int type;
2838{
2839 if (type == SHT_ORDERED)
2840 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2841
2842 if (attr & SHF_EXCLUDE)
2843 flags |= SEC_EXCLUDE;
2844
2845 return flags;
2846}
2847#endif /* OBJ_ELF */
2848
2849\f
2850/* Pseudo-op handling. */
2851
2852/* The .byte pseudo-op. This is similar to the normal .byte
2853 pseudo-op, but it can also take a single ASCII string. */
2854
2855static void
2856ppc_byte (ignore)
92161534 2857 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
2858{
2859 if (*input_line_pointer != '\"')
2860 {
2861 cons (1);
2862 return;
2863 }
2864
2865 /* Gather characters. A real double quote is doubled. Unusual
2866 characters are not permitted. */
2867 ++input_line_pointer;
2868 while (1)
2869 {
2870 char c;
2871
2872 c = *input_line_pointer++;
2873
2874 if (c == '\"')
2875 {
2876 if (*input_line_pointer != '\"')
2877 break;
2878 ++input_line_pointer;
2879 }
2880
2881 FRAG_APPEND_1_CHAR (c);
2882 }
2883
2884 demand_empty_rest_of_line ();
2885}
2886\f
2887#ifdef OBJ_XCOFF
2888
2889/* XCOFF specific pseudo-op handling. */
2890
2891/* This is set if we are creating a .stabx symbol, since we don't want
2892 to handle symbol suffixes for such symbols. */
b34976b6 2893static bfd_boolean ppc_stab_symbol;
252b5132
RH
2894
2895/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2896 symbols in the .bss segment as though they were local common
67c1ffbe 2897 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2898 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH
2899
2900static void
2901ppc_comm (lcomm)
2902 int lcomm;
2903{
2904 asection *current_seg = now_seg;
2905 subsegT current_subseg = now_subseg;
2906 char *name;
2907 char endc;
2908 char *end_name;
2909 offsetT size;
2910 offsetT align;
2911 symbolS *lcomm_sym = NULL;
2912 symbolS *sym;
2913 char *pfrag;
2914
2915 name = input_line_pointer;
2916 endc = get_symbol_end ();
2917 end_name = input_line_pointer;
2918 *end_name = endc;
2919
2920 if (*input_line_pointer != ',')
2921 {
2922 as_bad (_("missing size"));
2923 ignore_rest_of_line ();
2924 return;
2925 }
2926 ++input_line_pointer;
2927
2928 size = get_absolute_expression ();
2929 if (size < 0)
2930 {
2931 as_bad (_("negative size"));
2932 ignore_rest_of_line ();
2933 return;
2934 }
2935
2936 if (! lcomm)
2937 {
2938 /* The third argument to .comm is the alignment. */
2939 if (*input_line_pointer != ',')
1ad63b2f 2940 align = 2;
252b5132
RH
2941 else
2942 {
2943 ++input_line_pointer;
2944 align = get_absolute_expression ();
2945 if (align <= 0)
2946 {
2947 as_warn (_("ignoring bad alignment"));
1ad63b2f 2948 align = 2;
252b5132
RH
2949 }
2950 }
2951 }
2952 else
2953 {
2954 char *lcomm_name;
2955 char lcomm_endc;
2956
1ad63b2f 2957 if (size <= 4)
252b5132
RH
2958 align = 2;
2959 else
2960 align = 3;
2961
2962 /* The third argument to .lcomm appears to be the real local
2963 common symbol to create. References to the symbol named in
2964 the first argument are turned into references to the third
2965 argument. */
2966 if (*input_line_pointer != ',')
2967 {
2968 as_bad (_("missing real symbol name"));
2969 ignore_rest_of_line ();
2970 return;
2971 }
2972 ++input_line_pointer;
2973
2974 lcomm_name = input_line_pointer;
2975 lcomm_endc = get_symbol_end ();
81d4177b 2976
252b5132
RH
2977 lcomm_sym = symbol_find_or_make (lcomm_name);
2978
2979 *input_line_pointer = lcomm_endc;
2980 }
2981
2982 *end_name = '\0';
2983 sym = symbol_find_or_make (name);
2984 *end_name = endc;
2985
2986 if (S_IS_DEFINED (sym)
2987 || S_GET_VALUE (sym) != 0)
2988 {
2989 as_bad (_("attempt to redefine symbol"));
2990 ignore_rest_of_line ();
2991 return;
2992 }
81d4177b 2993
252b5132 2994 record_alignment (bss_section, align);
81d4177b 2995
252b5132
RH
2996 if (! lcomm
2997 || ! S_IS_DEFINED (lcomm_sym))
2998 {
2999 symbolS *def_sym;
3000 offsetT def_size;
3001
3002 if (! lcomm)
3003 {
3004 def_sym = sym;
3005 def_size = size;
3006 S_SET_EXTERNAL (sym);
3007 }
3008 else
3009 {
809ffe0d 3010 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH
3011 def_sym = lcomm_sym;
3012 def_size = 0;
3013 }
3014
3015 subseg_set (bss_section, 1);
3016 frag_align (align, 0, 0);
81d4177b 3017
809ffe0d 3018 symbol_set_frag (def_sym, frag_now);
252b5132
RH
3019 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3020 def_size, (char *) NULL);
3021 *pfrag = 0;
3022 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3023 symbol_get_tc (def_sym)->align = align;
252b5132
RH
3024 }
3025 else if (lcomm)
3026 {
3027 /* Align the size of lcomm_sym. */
809ffe0d
ILT
3028 symbol_get_frag (lcomm_sym)->fr_offset =
3029 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3030 &~ ((1 << align) - 1));
809ffe0d
ILT
3031 if (align > symbol_get_tc (lcomm_sym)->align)
3032 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH
3033 }
3034
3035 if (lcomm)
3036 {
3037 /* Make sym an offset from lcomm_sym. */
3038 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT
3039 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3040 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3041 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH
3042 }
3043
3044 subseg_set (current_seg, current_subseg);
3045
3046 demand_empty_rest_of_line ();
3047}
3048
3049/* The .csect pseudo-op. This switches us into a different
3050 subsegment. The first argument is a symbol whose value is the
3051 start of the .csect. In COFF, csect symbols get special aux
3052 entries defined by the x_csect field of union internal_auxent. The
3053 optional second argument is the alignment (the default is 2). */
3054
3055static void
3056ppc_csect (ignore)
5480ccf3 3057 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3058{
3059 char *name;
3060 char endc;
3061 symbolS *sym;
931e13a6 3062 offsetT align;
252b5132
RH
3063
3064 name = input_line_pointer;
3065 endc = get_symbol_end ();
81d4177b 3066
252b5132
RH
3067 sym = symbol_find_or_make (name);
3068
3069 *input_line_pointer = endc;
3070
3071 if (S_GET_NAME (sym)[0] == '\0')
3072 {
3073 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3074 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH
3075 }
3076
931e13a6 3077 align = 2;
252b5132
RH
3078 if (*input_line_pointer == ',')
3079 {
3080 ++input_line_pointer;
931e13a6 3081 align = get_absolute_expression ();
252b5132
RH
3082 }
3083
931e13a6
AM
3084 ppc_change_csect (sym, align);
3085
252b5132
RH
3086 demand_empty_rest_of_line ();
3087}
3088
3089/* Change to a different csect. */
3090
3091static void
931e13a6 3092ppc_change_csect (sym, align)
252b5132 3093 symbolS *sym;
931e13a6 3094 offsetT align;
252b5132
RH
3095{
3096 if (S_IS_DEFINED (sym))
809ffe0d 3097 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH
3098 else
3099 {
3100 symbolS **list_ptr;
3101 int after_toc;
3102 int hold_chunksize;
3103 symbolS *list;
931e13a6
AM
3104 int is_code;
3105 segT sec;
252b5132
RH
3106
3107 /* This is a new csect. We need to look at the symbol class to
3108 figure out whether it should go in the text section or the
3109 data section. */
3110 after_toc = 0;
931e13a6 3111 is_code = 0;
809ffe0d 3112 switch (symbol_get_tc (sym)->class)
252b5132
RH
3113 {
3114 case XMC_PR:
3115 case XMC_RO:
3116 case XMC_DB:
3117 case XMC_GL:
3118 case XMC_XO:
3119 case XMC_SV:
3120 case XMC_TI:
3121 case XMC_TB:
3122 S_SET_SEGMENT (sym, text_section);
809ffe0d 3123 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH
3124 ++ppc_text_subsegment;
3125 list_ptr = &ppc_text_csects;
931e13a6 3126 is_code = 1;
252b5132
RH
3127 break;
3128 case XMC_RW:
3129 case XMC_TC0:
3130 case XMC_TC:
3131 case XMC_DS:
3132 case XMC_UA:
3133 case XMC_BS:
3134 case XMC_UC:
3135 if (ppc_toc_csect != NULL
809ffe0d
ILT
3136 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3137 == ppc_data_subsegment))
252b5132
RH
3138 after_toc = 1;
3139 S_SET_SEGMENT (sym, data_section);
809ffe0d 3140 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH
3141 ++ppc_data_subsegment;
3142 list_ptr = &ppc_data_csects;
3143 break;
3144 default:
3145 abort ();
3146 }
3147
3148 /* We set the obstack chunk size to a small value before
99a814a1
AM
3149 changing subsegments, so that we don't use a lot of memory
3150 space for what may be a small section. */
252b5132
RH
3151 hold_chunksize = chunksize;
3152 chunksize = 64;
3153
931e13a6
AM
3154 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3155 symbol_get_tc (sym)->subseg);
252b5132
RH
3156
3157 chunksize = hold_chunksize;
3158
3159 if (after_toc)
3160 ppc_after_toc_frag = frag_now;
3161
931e13a6
AM
3162 record_alignment (sec, align);
3163 if (is_code)
3164 frag_align_code (align, 0);
3165 else
3166 frag_align (align, 0, 0);
3167
809ffe0d 3168 symbol_set_frag (sym, frag_now);
252b5132
RH
3169 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3170
931e13a6 3171 symbol_get_tc (sym)->align = align;
809ffe0d
ILT
3172 symbol_get_tc (sym)->output = 1;
3173 symbol_get_tc (sym)->within = sym;
81d4177b 3174
252b5132 3175 for (list = *list_ptr;
809ffe0d
ILT
3176 symbol_get_tc (list)->next != (symbolS *) NULL;
3177 list = symbol_get_tc (list)->next)
252b5132 3178 ;
809ffe0d 3179 symbol_get_tc (list)->next = sym;
81d4177b 3180
252b5132 3181 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
3182 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3183 &symbol_lastP);
252b5132
RH
3184 }
3185
3186 ppc_current_csect = sym;
3187}
3188
3189/* This function handles the .text and .data pseudo-ops. These
3190 pseudo-ops aren't really used by XCOFF; we implement them for the
3191 convenience of people who aren't used to XCOFF. */
3192
3193static void
3194ppc_section (type)
3195 int type;
3196{
3197 const char *name;
3198 symbolS *sym;
3199
3200 if (type == 't')
3201 name = ".text[PR]";
3202 else if (type == 'd')
3203 name = ".data[RW]";
3204 else
3205 abort ();
3206
3207 sym = symbol_find_or_make (name);
3208
931e13a6 3209 ppc_change_csect (sym, 2);
252b5132
RH
3210
3211 demand_empty_rest_of_line ();
3212}
3213
3214/* This function handles the .section pseudo-op. This is mostly to
3215 give an error, since XCOFF only supports .text, .data and .bss, but
3216 we do permit the user to name the text or data section. */
3217
3218static void
3219ppc_named_section (ignore)
5480ccf3 3220 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3221{
3222 char *user_name;
3223 const char *real_name;
3224 char c;
3225 symbolS *sym;
3226
3227 user_name = input_line_pointer;
3228 c = get_symbol_end ();
3229
3230 if (strcmp (user_name, ".text") == 0)
3231 real_name = ".text[PR]";
3232 else if (strcmp (user_name, ".data") == 0)
3233 real_name = ".data[RW]";
3234 else
3235 {
3236 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3237 *input_line_pointer = c;
3238 ignore_rest_of_line ();
3239 return;
3240 }
3241
3242 *input_line_pointer = c;
3243
3244 sym = symbol_find_or_make (real_name);
3245
931e13a6 3246 ppc_change_csect (sym, 2);
252b5132
RH
3247
3248 demand_empty_rest_of_line ();
3249}
3250
3251/* The .extern pseudo-op. We create an undefined symbol. */
3252
3253static void
3254ppc_extern (ignore)
5480ccf3 3255 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3256{
3257 char *name;
3258 char endc;
3259
3260 name = input_line_pointer;
3261 endc = get_symbol_end ();
3262
3263 (void) symbol_find_or_make (name);
3264
3265 *input_line_pointer = endc;
3266
3267 demand_empty_rest_of_line ();
3268}
3269
3270/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3271
3272static void
3273ppc_lglobl (ignore)
5480ccf3 3274 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3275{
3276 char *name;
3277 char endc;
3278 symbolS *sym;
3279
3280 name = input_line_pointer;
3281 endc = get_symbol_end ();
3282
3283 sym = symbol_find_or_make (name);
3284
3285 *input_line_pointer = endc;
3286
809ffe0d 3287 symbol_get_tc (sym)->output = 1;
252b5132
RH
3288
3289 demand_empty_rest_of_line ();
3290}
3291
3292/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3293 although I don't know why it bothers. */
3294
3295static void
3296ppc_rename (ignore)
5480ccf3 3297 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3298{
3299 char *name;
3300 char endc;
3301 symbolS *sym;
3302 int len;
3303
3304 name = input_line_pointer;
3305 endc = get_symbol_end ();
3306
3307 sym = symbol_find_or_make (name);
3308
3309 *input_line_pointer = endc;
3310
3311 if (*input_line_pointer != ',')
3312 {
3313 as_bad (_("missing rename string"));
3314 ignore_rest_of_line ();
3315 return;
3316 }
3317 ++input_line_pointer;
3318
809ffe0d 3319 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH
3320
3321 demand_empty_rest_of_line ();
3322}
3323
3324/* The .stabx pseudo-op. This is similar to a normal .stabs
3325 pseudo-op, but slightly different. A sample is
3326 .stabx "main:F-1",.main,142,0
3327 The first argument is the symbol name to create. The second is the
3328 value, and the third is the storage class. The fourth seems to be
3329 always zero, and I am assuming it is the type. */
3330
3331static void
3332ppc_stabx (ignore)
5480ccf3 3333 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3334{
3335 char *name;
3336 int len;
3337 symbolS *sym;
3338 expressionS exp;
3339
3340 name = demand_copy_C_string (&len);
3341
3342 if (*input_line_pointer != ',')
3343 {
3344 as_bad (_("missing value"));
3345 return;
3346 }
3347 ++input_line_pointer;
3348
b34976b6 3349 ppc_stab_symbol = TRUE;
252b5132 3350 sym = symbol_make (name);
b34976b6 3351 ppc_stab_symbol = FALSE;
252b5132 3352
809ffe0d 3353 symbol_get_tc (sym)->real_name = name;
252b5132
RH
3354
3355 (void) expression (&exp);
3356
3357 switch (exp.X_op)
3358 {
3359 case O_illegal:
3360 case O_absent:
3361 case O_big:
3362 as_bad (_("illegal .stabx expression; zero assumed"));
3363 exp.X_add_number = 0;
3364 /* Fall through. */
3365 case O_constant:
3366 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3367 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH
3368 break;
3369
3370 case O_symbol:
3371 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3372 symbol_set_value_expression (sym, &exp);
252b5132
RH
3373 else
3374 {
3375 S_SET_VALUE (sym,
3376 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3377 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH
3378 }
3379 break;
3380
3381 default:
3382 /* The value is some complex expression. This will probably
99a814a1
AM
3383 fail at some later point, but this is probably the right
3384 thing to do here. */
809ffe0d 3385 symbol_set_value_expression (sym, &exp);
252b5132
RH
3386 break;
3387 }
3388
3389 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3390 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3391
3392 if (*input_line_pointer != ',')
3393 {
3394 as_bad (_("missing class"));
3395 return;
3396 }
3397 ++input_line_pointer;
3398
3399 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3400
3401 if (*input_line_pointer != ',')
3402 {
3403 as_bad (_("missing type"));
3404 return;
3405 }
3406 ++input_line_pointer;
3407
3408 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3409
809ffe0d 3410 symbol_get_tc (sym)->output = 1;
252b5132 3411
6877bb43 3412 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3413
809ffe0d 3414 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3415
41ea10b1 3416 /* In this case :
99a814a1 3417
41ea10b1
TR
3418 .bs name
3419 .stabx "z",arrays_,133,0
3420 .es
99a814a1 3421
41ea10b1 3422 .comm arrays_,13768,3
99a814a1 3423
41ea10b1
TR
3424 resolve_symbol_value will copy the exp's "within" into sym's when the
3425 offset is 0. Since this seems to be corner case problem,
3426 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3427 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM
3428
3429 if (exp.X_op == O_symbol)
41ea10b1
TR
3430 {
3431 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3432 }
6877bb43 3433 }
99a814a1 3434
252b5132
RH
3435 if (exp.X_op != O_symbol
3436 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3437 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3438 ppc_frob_label (sym);
3439 else
3440 {
3441 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3442 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
3443 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3444 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH
3445 }
3446
3447 demand_empty_rest_of_line ();
3448}
3449
3450/* The .function pseudo-op. This takes several arguments. The first
3451 argument seems to be the external name of the symbol. The second
67c1ffbe 3452 argument seems to be the label for the start of the function. gcc
252b5132
RH
3453 uses the same name for both. I have no idea what the third and
3454 fourth arguments are meant to be. The optional fifth argument is
3455 an expression for the size of the function. In COFF this symbol
3456 gets an aux entry like that used for a csect. */
3457
3458static void
3459ppc_function (ignore)
5480ccf3 3460 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3461{
3462 char *name;
3463 char endc;
3464 char *s;
3465 symbolS *ext_sym;
3466 symbolS *lab_sym;
3467
3468 name = input_line_pointer;
3469 endc = get_symbol_end ();
3470
3471 /* Ignore any [PR] suffix. */
3472 name = ppc_canonicalize_symbol_name (name);
3473 s = strchr (name, '[');
3474 if (s != (char *) NULL
3475 && strcmp (s + 1, "PR]") == 0)
3476 *s = '\0';
3477
3478 ext_sym = symbol_find_or_make (name);
3479
3480 *input_line_pointer = endc;
3481
3482 if (*input_line_pointer != ',')
3483 {
3484 as_bad (_("missing symbol name"));
3485 ignore_rest_of_line ();
3486 return;
3487 }
3488 ++input_line_pointer;
3489
3490 name = input_line_pointer;
3491 endc = get_symbol_end ();
3492
3493 lab_sym = symbol_find_or_make (name);
3494
3495 *input_line_pointer = endc;
3496
3497 if (ext_sym != lab_sym)
3498 {
809ffe0d
ILT
3499 expressionS exp;
3500
3501 exp.X_op = O_symbol;
3502 exp.X_add_symbol = lab_sym;
3503 exp.X_op_symbol = NULL;
3504 exp.X_add_number = 0;
3505 exp.X_unsigned = 0;
3506 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH
3507 }
3508
809ffe0d
ILT
3509 if (symbol_get_tc (ext_sym)->class == -1)
3510 symbol_get_tc (ext_sym)->class = XMC_PR;
3511 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH
3512
3513 if (*input_line_pointer == ',')
3514 {
3515 expressionS ignore;
3516
3517 /* Ignore the third argument. */
3518 ++input_line_pointer;
3519 expression (&ignore);
3520 if (*input_line_pointer == ',')
3521 {
3522 /* Ignore the fourth argument. */
3523 ++input_line_pointer;
3524 expression (&ignore);
3525 if (*input_line_pointer == ',')
3526 {
3527 /* The fifth argument is the function size. */
3528 ++input_line_pointer;
809ffe0d
ILT
3529 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3530 absolute_section,
3531 (valueT) 0,
3532 &zero_address_frag);
3533 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH
3534 }
3535 }
3536 }
3537
3538 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3539 SF_SET_FUNCTION (ext_sym);
3540 SF_SET_PROCESS (ext_sym);
3541 coff_add_linesym (ext_sym);
3542
3543 demand_empty_rest_of_line ();
3544}
3545
3546/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR
3547 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3548 with the correct line number */
5d6255fe 3549
8642cce8 3550static symbolS *saved_bi_sym = 0;
252b5132
RH
3551
3552static void
3553ppc_bf (ignore)
5480ccf3 3554 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3555{
3556 symbolS *sym;
3557
3558 sym = symbol_make (".bf");
3559 S_SET_SEGMENT (sym, text_section);
809ffe0d 3560 symbol_set_frag (sym, frag_now);
252b5132
RH
3561 S_SET_VALUE (sym, frag_now_fix ());
3562 S_SET_STORAGE_CLASS (sym, C_FCN);
3563
3564 coff_line_base = get_absolute_expression ();
3565
3566 S_SET_NUMBER_AUXILIARY (sym, 1);
3567 SA_SET_SYM_LNNO (sym, coff_line_base);
3568
8642cce8 3569 /* Line number for bi. */
5d6255fe 3570 if (saved_bi_sym)
8642cce8
TR
3571 {
3572 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3573 saved_bi_sym = 0;
3574 }
5d6255fe 3575
8642cce8 3576
809ffe0d 3577 symbol_get_tc (sym)->output = 1;
252b5132
RH
3578
3579 ppc_frob_label (sym);
3580
3581 demand_empty_rest_of_line ();
3582}
3583
3584/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3585 ".ef", except that the line number is absolute, not relative to the
3586 most recent ".bf" symbol. */
3587
3588static void
3589ppc_ef (ignore)
5480ccf3 3590 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3591{
3592 symbolS *sym;
3593
3594 sym = symbol_make (".ef");
3595 S_SET_SEGMENT (sym, text_section);
809ffe0d 3596 symbol_set_frag (sym, frag_now);
252b5132
RH
3597 S_SET_VALUE (sym, frag_now_fix ());
3598 S_SET_STORAGE_CLASS (sym, C_FCN);
3599 S_SET_NUMBER_AUXILIARY (sym, 1);
3600 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3601 symbol_get_tc (sym)->output = 1;
252b5132
RH
3602
3603 ppc_frob_label (sym);
3604
3605 demand_empty_rest_of_line ();
3606}
3607
3608/* The .bi and .ei pseudo-ops. These take a string argument and
3609 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR
3610 the symbol list. The value of .bi will be know when the next .bf
3611 is encountered. */
252b5132
RH
3612
3613static void
3614ppc_biei (ei)
3615 int ei;
3616{
3617 static symbolS *last_biei;
3618
3619 char *name;
3620 int len;
3621 symbolS *sym;
3622 symbolS *look;
3623
3624 name = demand_copy_C_string (&len);
3625
3626 /* The value of these symbols is actually file offset. Here we set
3627 the value to the index into the line number entries. In
3628 ppc_frob_symbols we set the fix_line field, which will cause BFD
3629 to do the right thing. */
3630
3631 sym = symbol_make (name);
3632 /* obj-coff.c currently only handles line numbers correctly in the
3633 .text section. */
3634 S_SET_SEGMENT (sym, text_section);
3635 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3636 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3637
3638 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3639 symbol_get_tc (sym)->output = 1;
81d4177b 3640
8642cce8 3641 /* Save bi. */
5d6255fe 3642 if (ei)
8642cce8
TR
3643 saved_bi_sym = 0;
3644 else
3645 saved_bi_sym = sym;
3646
252b5132
RH
3647 for (look = last_biei ? last_biei : symbol_rootP;
3648 (look != (symbolS *) NULL
3649 && (S_GET_STORAGE_CLASS (look) == C_FILE
3650 || S_GET_STORAGE_CLASS (look) == C_BINCL
3651 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3652 look = symbol_next (look))
3653 ;
3654 if (look != (symbolS *) NULL)
3655 {
3656 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3657 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3658 last_biei = sym;
3659 }
3660
3661 demand_empty_rest_of_line ();
3662}
3663
3664/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3665 There is one argument, which is a csect symbol. The value of the
3666 .bs symbol is the index of this csect symbol. */
3667
3668static void
3669ppc_bs (ignore)
5480ccf3 3670 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3671{
3672 char *name;
3673 char endc;
3674 symbolS *csect;
3675 symbolS *sym;
3676
3677 if (ppc_current_block != NULL)
3678 as_bad (_("nested .bs blocks"));
3679
3680 name = input_line_pointer;
3681 endc = get_symbol_end ();
3682
3683 csect = symbol_find_or_make (name);
3684
3685 *input_line_pointer = endc;
3686
3687 sym = symbol_make (".bs");
3688 S_SET_SEGMENT (sym, now_seg);
3689 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT
3690 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3691 symbol_get_tc (sym)->output = 1;
252b5132 3692
809ffe0d 3693 symbol_get_tc (sym)->within = csect;
252b5132
RH
3694
3695 ppc_frob_label (sym);
3696
3697 ppc_current_block = sym;
3698
3699 demand_empty_rest_of_line ();
3700}
3701
3702/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3703
3704static void
3705ppc_es (ignore)
5480ccf3 3706 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3707{
3708 symbolS *sym;
3709
3710 if (ppc_current_block == NULL)
3711 as_bad (_(".es without preceding .bs"));
3712
3713 sym = symbol_make (".es");
3714 S_SET_SEGMENT (sym, now_seg);
3715 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT
3716 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3717 symbol_get_tc (sym)->output = 1;
252b5132
RH
3718
3719 ppc_frob_label (sym);
3720
3721 ppc_current_block = NULL;
3722
3723 demand_empty_rest_of_line ();
3724}
3725
3726/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3727 line number. */
3728
3729static void
3730ppc_bb (ignore)
5480ccf3 3731 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3732{
3733 symbolS *sym;
3734
3735 sym = symbol_make (".bb");
3736 S_SET_SEGMENT (sym, text_section);
809ffe0d 3737 symbol_set_frag (sym, frag_now);
252b5132
RH
3738 S_SET_VALUE (sym, frag_now_fix ());
3739 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3740
3741 S_SET_NUMBER_AUXILIARY (sym, 1);
3742 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3743
809ffe0d 3744 symbol_get_tc (sym)->output = 1;
252b5132
RH
3745
3746 SF_SET_PROCESS (sym);
3747
3748 ppc_frob_label (sym);
3749
3750 demand_empty_rest_of_line ();
3751}
3752
3753/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3754 line number. */
3755
3756static void
3757ppc_eb (ignore)
5480ccf3 3758 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3759{
3760 symbolS *sym;
3761
3762 sym = symbol_make (".eb");
3763 S_SET_SEGMENT (sym, text_section);
809ffe0d 3764 symbol_set_frag (sym, frag_now);
252b5132
RH
3765 S_SET_VALUE (sym, frag_now_fix ());
3766 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3767 S_SET_NUMBER_AUXILIARY (sym, 1);
3768 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3769 symbol_get_tc (sym)->output = 1;
252b5132
RH
3770
3771 SF_SET_PROCESS (sym);
3772
3773 ppc_frob_label (sym);
3774
3775 demand_empty_rest_of_line ();
3776}
3777
3778/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3779 specified name. */
3780
3781static void
3782ppc_bc (ignore)
5480ccf3 3783 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3784{
3785 char *name;
3786 int len;
3787 symbolS *sym;
3788
3789 name = demand_copy_C_string (&len);
3790 sym = symbol_make (name);
3791 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3792 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3793 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3794 S_SET_VALUE (sym, 0);
809ffe0d 3795 symbol_get_tc (sym)->output = 1;
252b5132
RH
3796
3797 ppc_frob_label (sym);
3798
3799 demand_empty_rest_of_line ();
3800}
3801
3802/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3803
3804static void
3805ppc_ec (ignore)
5480ccf3 3806 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3807{
3808 symbolS *sym;
3809
3810 sym = symbol_make (".ec");
3811 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3812 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH
3813 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3814 S_SET_VALUE (sym, 0);
809ffe0d 3815 symbol_get_tc (sym)->output = 1;
252b5132
RH
3816
3817 ppc_frob_label (sym);
3818
3819 demand_empty_rest_of_line ();
3820}
3821
3822/* The .toc pseudo-op. Switch to the .toc subsegment. */
3823
3824static void
3825ppc_toc (ignore)
5480ccf3 3826 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3827{
3828 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3829 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH
3830 else
3831 {
3832 subsegT subseg;
3833 symbolS *sym;
3834 symbolS *list;
81d4177b 3835
252b5132
RH
3836 subseg = ppc_data_subsegment;
3837 ++ppc_data_subsegment;
3838
3839 subseg_new (segment_name (data_section), subseg);
3840 ppc_toc_frag = frag_now;
3841
3842 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3843 symbol_set_frag (sym, frag_now);
252b5132
RH
3844 S_SET_SEGMENT (sym, data_section);
3845 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT
3846 symbol_get_tc (sym)->subseg = subseg;
3847 symbol_get_tc (sym)->output = 1;
3848 symbol_get_tc (sym)->within = sym;
252b5132
RH
3849
3850 ppc_toc_csect = sym;
81d4177b 3851
252b5132 3852 for (list = ppc_data_csects;
809ffe0d
ILT
3853 symbol_get_tc (list)->next != (symbolS *) NULL;
3854 list = symbol_get_tc (list)->next)
252b5132 3855 ;
809ffe0d 3856 symbol_get_tc (list)->next = sym;
252b5132
RH
3857
3858 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
3859 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3860 &symbol_lastP);
252b5132
RH
3861 }
3862
3863 ppc_current_csect = ppc_toc_csect;
3864
3865 demand_empty_rest_of_line ();
3866}
3867
3868/* The AIX assembler automatically aligns the operands of a .long or
3869 .short pseudo-op, and we want to be compatible. */
3870
3871static void
3872ppc_xcoff_cons (log_size)
3873 int log_size;
3874{
3875 frag_align (log_size, 0, 0);
3876 record_alignment (now_seg, log_size);
3877 cons (1 << log_size);
3878}
3879
3880static void
3881ppc_vbyte (dummy)
5480ccf3 3882 int dummy ATTRIBUTE_UNUSED;
252b5132
RH
3883{
3884 expressionS exp;
3885 int byte_count;
3886
3887 (void) expression (&exp);
3888
3889 if (exp.X_op != O_constant)
3890 {
3891 as_bad (_("non-constant byte count"));
3892 return;
3893 }
3894
3895 byte_count = exp.X_add_number;
3896
3897 if (*input_line_pointer != ',')
3898 {
3899 as_bad (_("missing value"));
3900 return;
3901 }
3902
3903 ++input_line_pointer;
3904 cons (byte_count);
3905}
3906
3907#endif /* OBJ_XCOFF */
0baf16f2 3908#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH
3909\f
3910/* The .tc pseudo-op. This is used when generating either XCOFF or
3911 ELF. This takes two or more arguments.
3912
3913 When generating XCOFF output, the first argument is the name to
3914 give to this location in the toc; this will be a symbol with class
0baf16f2 3915 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3916 this location in the TOC; often there is just one more argument, a
1049f94e 3917 relocatable symbol reference. The size of the value to store
0baf16f2
AM
3918 depends on target word size. A 32-bit target uses 4-byte values, a
3919 64-bit target uses 8-byte values.
252b5132
RH
3920
3921 When not generating XCOFF output, the arguments are the same, but
3922 the first argument is simply ignored. */
3923
3924static void
3925ppc_tc (ignore)
92161534 3926 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
3927{
3928#ifdef OBJ_XCOFF
3929
3930 /* Define the TOC symbol name. */
3931 {
3932 char *name;
3933 char endc;
3934 symbolS *sym;
3935
3936 if (ppc_toc_csect == (symbolS *) NULL
3937 || ppc_toc_csect != ppc_current_csect)
3938 {
3939 as_bad (_(".tc not in .toc section"));
3940 ignore_rest_of_line ();
3941 return;
3942 }
3943
3944 name = input_line_pointer;
3945 endc = get_symbol_end ();
3946
3947 sym = symbol_find_or_make (name);
3948
3949 *input_line_pointer = endc;
3950
3951 if (S_IS_DEFINED (sym))
3952 {
3953 symbolS *label;
3954
809ffe0d
ILT
3955 label = symbol_get_tc (ppc_current_csect)->within;
3956 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH
3957 {
3958 as_bad (_(".tc with no label"));
3959 ignore_rest_of_line ();
3960 return;
3961 }
3962
3963 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3964 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH
3965 S_SET_VALUE (label, S_GET_VALUE (sym));
3966
3967 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3968 ++input_line_pointer;
3969
3970 return;
3971 }
3972
3973 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3974 symbol_set_frag (sym, frag_now);
252b5132 3975 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT
3976 symbol_get_tc (sym)->class = XMC_TC;
3977 symbol_get_tc (sym)->output = 1;
252b5132
RH
3978
3979 ppc_frob_label (sym);
3980 }
3981
0baf16f2
AM
3982#endif /* OBJ_XCOFF */
3983#ifdef OBJ_ELF
9c7977b3 3984 int align;
252b5132
RH
3985
3986 /* Skip the TOC symbol name. */
3987 while (is_part_of_name (*input_line_pointer)
3988 || *input_line_pointer == '['
3989 || *input_line_pointer == ']'
3990 || *input_line_pointer == '{'
3991 || *input_line_pointer == '}')
3992 ++input_line_pointer;
3993
0baf16f2 3994 /* Align to a four/eight byte boundary. */
2b3c4602 3995 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM
3996 frag_align (align, 0, 0);
3997 record_alignment (now_seg, align);
0baf16f2 3998#endif /* OBJ_ELF */
252b5132
RH
3999
4000 if (*input_line_pointer != ',')
4001 demand_empty_rest_of_line ();
4002 else
4003 {
4004 ++input_line_pointer;
2b3c4602 4005 cons (ppc_obj64 ? 8 : 4);
252b5132
RH
4006 }
4007}
0baf16f2
AM
4008
4009/* Pseudo-op .machine. */
0baf16f2
AM
4010
4011static void
4012ppc_machine (ignore)
4013 int ignore ATTRIBUTE_UNUSED;
4014{
69c040df
AM
4015 char *cpu_string;
4016#define MAX_HISTORY 100
4017 static unsigned long *cpu_history;
4018 static int curr_hist;
4019
4020 SKIP_WHITESPACE ();
4021
4022 if (*input_line_pointer == '"')
4023 {
4024 int len;
4025 cpu_string = demand_copy_C_string (&len);
4026 }
4027 else
4028 {
4029 char c;
4030 cpu_string = input_line_pointer;
4031 c = get_symbol_end ();
4032 cpu_string = xstrdup (cpu_string);
4033 *input_line_pointer = c;
4034 }
4035
4036 if (cpu_string != NULL)
4037 {
4038 unsigned long old_cpu = ppc_cpu;
4039 char *p;
4040
4041 for (p = cpu_string; *p != 0; p++)
4042 *p = TOLOWER (*p);
4043
4044 if (strcmp (cpu_string, "push") == 0)
4045 {
4046 if (cpu_history == NULL)
4047 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4048
4049 if (curr_hist >= MAX_HISTORY)
4050 as_bad (_(".machine stack overflow"));
4051 else
4052 cpu_history[curr_hist++] = ppc_cpu;
4053 }
4054 else if (strcmp (cpu_string, "pop") == 0)
4055 {
4056 if (curr_hist <= 0)
4057 as_bad (_(".machine stack underflow"));
4058 else
4059 ppc_cpu = cpu_history[--curr_hist];
4060 }
4061 else if (parse_cpu (cpu_string))
4062 ;
4063 else
4064 as_bad (_("invalid machine `%s'"), cpu_string);
4065
4066 if (ppc_cpu != old_cpu)
4067 ppc_setup_opcodes ();
4068 }
4069
4070 demand_empty_rest_of_line ();
0baf16f2
AM
4071}
4072
4073/* See whether a symbol is in the TOC section. */
4074
4075static int
4076ppc_is_toc_sym (sym)
4077 symbolS *sym;
4078{
4079#ifdef OBJ_XCOFF
4080 return symbol_get_tc (sym)->class == XMC_TC;
4081#endif
4082#ifdef OBJ_ELF
4083 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4084 if (ppc_obj64)
0baf16f2
AM
4085 return strcmp (sname, ".toc") == 0;
4086 else
4087 return strcmp (sname, ".got") == 0;
4088#endif
4089}
4090#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH
4091\f
4092#ifdef TE_PE
4093
99a814a1 4094/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH
4095
4096/* Set the current section. */
4097static void
4098ppc_set_current_section (new)
4099 segT new;
4100{
4101 ppc_previous_section = ppc_current_section;
4102 ppc_current_section = new;
4103}
4104
4105/* pseudo-op: .previous
4106 behaviour: toggles the current section with the previous section.
4107 errors: None
99a814a1
AM
4108 warnings: "No previous section" */
4109
252b5132 4110static void
99a814a1 4111ppc_previous (ignore)
5480ccf3 4112 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4113{
4114 symbolS *tmp;
4115
81d4177b 4116 if (ppc_previous_section == NULL)
252b5132 4117 {
99a814a1 4118 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH
4119 return;
4120 }
4121
99a814a1 4122 subseg_set (ppc_previous_section, 0);
252b5132 4123
99a814a1 4124 ppc_set_current_section (ppc_previous_section);
252b5132
RH
4125}
4126
4127/* pseudo-op: .pdata
4128 behaviour: predefined read only data section
b34976b6 4129 double word aligned
252b5132
RH
4130 errors: None
4131 warnings: None
4132 initial: .section .pdata "adr3"
b34976b6 4133 a - don't know -- maybe a misprint
252b5132
RH
4134 d - initialized data
4135 r - readable
4136 3 - double word aligned (that would be 4 byte boundary)
4137
4138 commentary:
4139 Tag index tables (also known as the function table) for exception
99a814a1 4140 handling, debugging, etc. */
252b5132 4141
252b5132 4142static void
99a814a1 4143ppc_pdata (ignore)
5480ccf3 4144 int ignore ATTRIBUTE_UNUSED;
252b5132 4145{
81d4177b 4146 if (pdata_section == 0)
252b5132
RH
4147 {
4148 pdata_section = subseg_new (".pdata", 0);
81d4177b 4149
252b5132
RH
4150 bfd_set_section_flags (stdoutput, pdata_section,
4151 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4152 | SEC_READONLY | SEC_DATA ));
81d4177b 4153
252b5132
RH
4154 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4155 }
4156 else
4157 {
99a814a1 4158 pdata_section = subseg_new (".pdata", 0);
252b5132 4159 }
99a814a1 4160 ppc_set_current_section (pdata_section);
252b5132
RH
4161}
4162
4163/* pseudo-op: .ydata
4164 behaviour: predefined read only data section
b34976b6 4165 double word aligned
252b5132
RH
4166 errors: None
4167 warnings: None
4168 initial: .section .ydata "drw3"
b34976b6 4169 a - don't know -- maybe a misprint
252b5132
RH
4170 d - initialized data
4171 r - readable
4172 3 - double word aligned (that would be 4 byte boundary)
4173 commentary:
4174 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM
4175 debugging, etc. */
4176
252b5132 4177static void
99a814a1 4178ppc_ydata (ignore)
5480ccf3 4179 int ignore ATTRIBUTE_UNUSED;
252b5132 4180{
81d4177b 4181 if (ydata_section == 0)
252b5132
RH
4182 {
4183 ydata_section = subseg_new (".ydata", 0);
4184 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM
4185 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4186 | SEC_READONLY | SEC_DATA ));
252b5132
RH
4187
4188 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4189 }
4190 else
4191 {
4192 ydata_section = subseg_new (".ydata", 0);
4193 }
99a814a1 4194 ppc_set_current_section (ydata_section);
252b5132
RH
4195}
4196
4197/* pseudo-op: .reldata
4198 behaviour: predefined read write data section
b34976b6 4199 double word aligned (4-byte)
252b5132
RH
4200 FIXME: relocation is applied to it
4201 FIXME: what's the difference between this and .data?
4202 errors: None
4203 warnings: None
4204 initial: .section .reldata "drw3"
4205 d - initialized data
4206 r - readable
4207 w - writeable
4208 3 - double word aligned (that would be 8 byte boundary)
4209
4210 commentary:
4211 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM
4212 function descriptors, etc. */
4213
252b5132 4214static void
99a814a1 4215ppc_reldata (ignore)
5480ccf3 4216 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4217{
4218 if (reldata_section == 0)
4219 {
4220 reldata_section = subseg_new (".reldata", 0);
4221
4222 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM
4223 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4224 | SEC_DATA));
252b5132
RH
4225
4226 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4227 }
4228 else
4229 {
4230 reldata_section = subseg_new (".reldata", 0);
4231 }
99a814a1 4232 ppc_set_current_section (reldata_section);
252b5132
RH
4233}
4234
4235/* pseudo-op: .rdata
4236 behaviour: predefined read only data section
b34976b6 4237 double word aligned
252b5132
RH
4238 errors: None
4239 warnings: None
4240 initial: .section .rdata "dr3"
4241 d - initialized data
4242 r - readable
99a814a1
AM
4243 3 - double word aligned (that would be 4 byte boundary) */
4244
252b5132 4245static void
99a814a1 4246ppc_rdata (ignore)
5480ccf3 4247 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4248{
4249 if (rdata_section == 0)
4250 {
4251 rdata_section = subseg_new (".rdata", 0);
4252 bfd_set_section_flags (stdoutput, rdata_section,
4253 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4254 | SEC_READONLY | SEC_DATA ));
4255
4256 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4257 }
4258 else
4259 {
4260 rdata_section = subseg_new (".rdata", 0);
4261 }
99a814a1 4262 ppc_set_current_section (rdata_section);
252b5132
RH
4263}
4264
4265/* pseudo-op: .ualong
81d4177b 4266 behaviour: much like .int, with the exception that no alignment is
b34976b6 4267 performed.
252b5132
RH
4268 FIXME: test the alignment statement
4269 errors: None
99a814a1
AM
4270 warnings: None */
4271
252b5132 4272static void
99a814a1 4273ppc_ualong (ignore)
5480ccf3 4274 int ignore ATTRIBUTE_UNUSED;
252b5132 4275{
99a814a1
AM
4276 /* Try for long. */
4277 cons (4);
252b5132
RH
4278}
4279
4280/* pseudo-op: .znop <symbol name>
4281 behaviour: Issue a nop instruction
b34976b6 4282 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH
4283 the supplied symbol name.
4284 errors: None
99a814a1
AM
4285 warnings: Missing symbol name */
4286
252b5132 4287static void
99a814a1 4288ppc_znop (ignore)
5480ccf3 4289 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4290{
4291 unsigned long insn;
4292 const struct powerpc_opcode *opcode;
4293 expressionS ex;
4294 char *f;
252b5132 4295 symbolS *sym;
252b5132
RH
4296 char *symbol_name;
4297 char c;
4298 char *name;
4299 unsigned int exp;
4300 flagword flags;
4301 asection *sec;
4302
99a814a1 4303 /* Strip out the symbol name. */
252b5132
RH
4304 symbol_name = input_line_pointer;
4305 c = get_symbol_end ();
4306
4307 name = xmalloc (input_line_pointer - symbol_name + 1);
4308 strcpy (name, symbol_name);
4309
4310 sym = symbol_find_or_make (name);
4311
4312 *input_line_pointer = c;
4313
4314 SKIP_WHITESPACE ();
4315
4316 /* Look up the opcode in the hash table. */
4317 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4318
99a814a1 4319 /* Stick in the nop. */
252b5132
RH
4320 insn = opcode->opcode;
4321
4322 /* Write out the instruction. */
4323 f = frag_more (4);
4324 md_number_to_chars (f, insn, 4);
4325 fix_new (frag_now,
4326 f - frag_now->fr_literal,
4327 4,
4328 sym,
4329 0,
4330 0,
4331 BFD_RELOC_16_GOT_PCREL);
4332
4333}
4334
81d4177b
KH
4335/* pseudo-op:
4336 behaviour:
4337 errors:
99a814a1
AM
4338 warnings: */
4339
252b5132 4340static void
99a814a1 4341ppc_pe_comm (lcomm)
252b5132
RH
4342 int lcomm;
4343{
4344 register char *name;
4345 register char c;
4346 register char *p;
4347 offsetT temp;
4348 register symbolS *symbolP;
4349 offsetT align;
4350
4351 name = input_line_pointer;
4352 c = get_symbol_end ();
4353
99a814a1 4354 /* just after name is now '\0'. */
252b5132
RH
4355 p = input_line_pointer;
4356 *p = c;
4357 SKIP_WHITESPACE ();
4358 if (*input_line_pointer != ',')
4359 {
4360 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4361 ignore_rest_of_line ();
4362 return;
4363 }
4364
4365 input_line_pointer++; /* skip ',' */
4366 if ((temp = get_absolute_expression ()) < 0)
4367 {
4368 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4369 ignore_rest_of_line ();
4370 return;
4371 }
4372
4373 if (! lcomm)
4374 {
4375 /* The third argument to .comm is the alignment. */
4376 if (*input_line_pointer != ',')
4377 align = 3;
4378 else
4379 {
4380 ++input_line_pointer;
4381 align = get_absolute_expression ();
4382 if (align <= 0)
4383 {
4384 as_warn (_("ignoring bad alignment"));
4385 align = 3;
4386 }
4387 }
4388 }
4389
4390 *p = 0;
4391 symbolP = symbol_find_or_make (name);
4392
4393 *p = c;
4394 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4395 {
4396 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4397 S_GET_NAME (symbolP));
4398 ignore_rest_of_line ();
4399 return;
4400 }
4401
4402 if (S_GET_VALUE (symbolP))
4403 {
4404 if (S_GET_VALUE (symbolP) != (valueT) temp)
4405 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4406 S_GET_NAME (symbolP),
4407 (long) S_GET_VALUE (symbolP),
4408 (long) temp);
4409 }
4410 else
4411 {
4412 S_SET_VALUE (symbolP, (valueT) temp);
4413 S_SET_EXTERNAL (symbolP);
4414 }
4415
4416 demand_empty_rest_of_line ();
4417}
4418
4419/*
4420 * implement the .section pseudo op:
4421 * .section name {, "flags"}
4422 * ^ ^
4423 * | +--- optional flags: 'b' for bss
4424 * | 'i' for info
4425 * +-- section name 'l' for lib
4426 * 'n' for noload
4427 * 'o' for over
4428 * 'w' for data
4429 * 'd' (apparently m88k for data)
4430 * 'x' for text
4431 * But if the argument is not a quoted string, treat it as a
4432 * subsegment number.
4433 *
4434 * FIXME: this is a copy of the section processing from obj-coff.c, with
4435 * additions/changes for the moto-pas assembler support. There are three
4436 * categories:
4437 *
81d4177b 4438 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH
4439 * setting bits that bfd probably neither understands or uses. The
4440 * correct approach (?) will have to incorporate extra fields attached
4441 * to the section to hold the system specific stuff. (krk)
4442 *
4443 * Section Contents:
4444 * 'a' - unknown - referred to in documentation, but no definition supplied
4445 * 'c' - section has code
4446 * 'd' - section has initialized data
4447 * 'u' - section has uninitialized data
4448 * 'i' - section contains directives (info)
4449 * 'n' - section can be discarded
4450 * 'R' - remove section at link time
4451 *
4452 * Section Protection:
4453 * 'r' - section is readable
4454 * 'w' - section is writeable
4455 * 'x' - section is executable
4456 * 's' - section is sharable
4457 *
4458 * Section Alignment:
4459 * '0' - align to byte boundary
4460 * '1' - align to halfword undary
4461 * '2' - align to word boundary
4462 * '3' - align to doubleword boundary
4463 * '4' - align to quadword boundary
4464 * '5' - align to 32 byte boundary
4465 * '6' - align to 64 byte boundary
4466 *
4467 */
4468
4469void
4470ppc_pe_section (ignore)
5480ccf3 4471 int ignore ATTRIBUTE_UNUSED;
252b5132 4472{
99a814a1 4473 /* Strip out the section name. */
252b5132
RH
4474 char *section_name;
4475 char c;
4476 char *name;
4477 unsigned int exp;
4478 flagword flags;
4479 segT sec;
4480 int align;
4481
4482 section_name = input_line_pointer;
4483 c = get_symbol_end ();
4484
4485 name = xmalloc (input_line_pointer - section_name + 1);
4486 strcpy (name, section_name);
4487
4488 *input_line_pointer = c;
4489
4490 SKIP_WHITESPACE ();
4491
4492 exp = 0;
4493 flags = SEC_NO_FLAGS;
4494
4495 if (strcmp (name, ".idata$2") == 0)
4496 {
4497 align = 0;
4498 }
4499 else if (strcmp (name, ".idata$3") == 0)
4500 {
4501 align = 0;
4502 }
4503 else if (strcmp (name, ".idata$4") == 0)
4504 {
4505 align = 2;
4506 }
4507 else if (strcmp (name, ".idata$5") == 0)
4508 {
4509 align = 2;
4510 }
4511 else if (strcmp (name, ".idata$6") == 0)
4512 {
4513 align = 1;
4514 }
4515 else
99a814a1
AM
4516 /* Default alignment to 16 byte boundary. */
4517 align = 4;
252b5132
RH
4518
4519 if (*input_line_pointer == ',')
4520 {
4521 ++input_line_pointer;
4522 SKIP_WHITESPACE ();
4523 if (*input_line_pointer != '"')
4524 exp = get_absolute_expression ();
4525 else
4526 {
4527 ++input_line_pointer;
4528 while (*input_line_pointer != '"'
4529 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4530 {
4531 switch (*input_line_pointer)
4532 {
4533 /* Section Contents */
4534 case 'a': /* unknown */
4535 as_bad (_("Unsupported section attribute -- 'a'"));
4536 break;
4537 case 'c': /* code section */
81d4177b 4538 flags |= SEC_CODE;
252b5132
RH
4539 break;
4540 case 'd': /* section has initialized data */
4541 flags |= SEC_DATA;
4542 break;
4543 case 'u': /* section has uninitialized data */
4544 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4545 in winnt.h */
4546 flags |= SEC_ROM;
4547 break;
4548 case 'i': /* section contains directives (info) */
4549 /* FIXME: This is IMAGE_SCN_LNK_INFO
4550 in winnt.h */
4551 flags |= SEC_HAS_CONTENTS;
4552 break;
4553 case 'n': /* section can be discarded */
81d4177b 4554 flags &=~ SEC_LOAD;
252b5132
RH
4555 break;
4556 case 'R': /* Remove section at link time */
4557 flags |= SEC_NEVER_LOAD;
4558 break;
4559
4560 /* Section Protection */
4561 case 'r': /* section is readable */
4562 flags |= IMAGE_SCN_MEM_READ;
4563 break;
4564 case 'w': /* section is writeable */
4565 flags |= IMAGE_SCN_MEM_WRITE;
4566 break;
4567 case 'x': /* section is executable */
4568 flags |= IMAGE_SCN_MEM_EXECUTE;
4569 break;
4570 case 's': /* section is sharable */
4571 flags |= IMAGE_SCN_MEM_SHARED;
4572 break;
4573
4574 /* Section Alignment */
4575 case '0': /* align to byte boundary */
4576 flags |= IMAGE_SCN_ALIGN_1BYTES;
4577 align = 0;
4578 break;
4579 case '1': /* align to halfword boundary */
4580 flags |= IMAGE_SCN_ALIGN_2BYTES;
4581 align = 1;
4582 break;
4583 case '2': /* align to word boundary */
4584 flags |= IMAGE_SCN_ALIGN_4BYTES;
4585 align = 2;
4586 break;
4587 case '3': /* align to doubleword boundary */
4588 flags |= IMAGE_SCN_ALIGN_8BYTES;
4589 align = 3;
4590 break;
4591 case '4': /* align to quadword boundary */
4592 flags |= IMAGE_SCN_ALIGN_16BYTES;
4593 align = 4;
4594 break;
4595 case '5': /* align to 32 byte boundary */
4596 flags |= IMAGE_SCN_ALIGN_32BYTES;
4597 align = 5;
4598 break;
4599 case '6': /* align to 64 byte boundary */
4600 flags |= IMAGE_SCN_ALIGN_64BYTES;
4601 align = 6;
4602 break;
4603
4604 default:
99a814a1
AM
4605 as_bad (_("unknown section attribute '%c'"),
4606 *input_line_pointer);
252b5132
RH
4607 break;
4608 }
4609 ++input_line_pointer;
4610 }
4611 if (*input_line_pointer == '"')
4612 ++input_line_pointer;
4613 }
4614 }
4615
4616 sec = subseg_new (name, (subsegT) exp);
4617
99a814a1 4618 ppc_set_current_section (sec);
252b5132
RH
4619
4620 if (flags != SEC_NO_FLAGS)
4621 {
4622 if (! bfd_set_section_flags (stdoutput, sec, flags))
4623 as_bad (_("error setting flags for \"%s\": %s"),
4624 bfd_section_name (stdoutput, sec),
4625 bfd_errmsg (bfd_get_error ()));
4626 }
4627
99a814a1 4628 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH
4629
4630}
4631
4632static void
4633ppc_pe_function (ignore)
5480ccf3 4634 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4635{
4636 char *name;
4637 char endc;
4638 symbolS *ext_sym;
4639
4640 name = input_line_pointer;
4641 endc = get_symbol_end ();
4642
4643 ext_sym = symbol_find_or_make (name);
4644
4645 *input_line_pointer = endc;
4646
4647 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4648 SF_SET_FUNCTION (ext_sym);
4649 SF_SET_PROCESS (ext_sym);
4650 coff_add_linesym (ext_sym);
4651
4652 demand_empty_rest_of_line ();
4653}
4654
4655static void
4656ppc_pe_tocd (ignore)
5480ccf3 4657 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
4658{
4659 if (tocdata_section == 0)
4660 {
4661 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4662 /* FIXME: section flags won't work. */
252b5132
RH
4663 bfd_set_section_flags (stdoutput, tocdata_section,
4664 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4665 | SEC_READONLY | SEC_DATA));
252b5132
RH
4666
4667 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4668 }
4669 else
4670 {
4671 rdata_section = subseg_new (".tocd", 0);
4672 }
4673
99a814a1 4674 ppc_set_current_section (tocdata_section);
252b5132
RH
4675
4676 demand_empty_rest_of_line ();
4677}
4678
4679/* Don't adjust TOC relocs to use the section symbol. */
4680
4681int
4682ppc_pe_fix_adjustable (fix)
4683 fixS *fix;
4684{
4685 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4686}
4687
4688#endif
4689\f
4690#ifdef OBJ_XCOFF
4691
4692/* XCOFF specific symbol and file handling. */
4693
4694/* Canonicalize the symbol name. We use the to force the suffix, if
4695 any, to use square brackets, and to be in upper case. */
4696
4697char *
4698ppc_canonicalize_symbol_name (name)
4699 char *name;
4700{
4701 char *s;
4702
4703 if (ppc_stab_symbol)
4704 return name;
4705
4706 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4707 ;
4708 if (*s != '\0')
4709 {
4710 char brac;
4711
4712 if (*s == '[')
4713 brac = ']';
4714 else
4715 {
4716 *s = '[';
4717 brac = '}';
4718 }
4719
4720 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4721 *s = TOUPPER (*s);
252b5132
RH
4722
4723 if (*s == '\0' || s[1] != '\0')
4724 as_bad (_("bad symbol suffix"));
4725
4726 *s = ']';
4727 }
4728
4729 return name;
4730}
4731
4732/* Set the class of a symbol based on the suffix, if any. This is
4733 called whenever a new symbol is created. */
4734
4735void
4736ppc_symbol_new_hook (sym)
4737 symbolS *sym;
4738{
809ffe0d 4739 struct ppc_tc_sy *tc;
252b5132
RH
4740 const char *s;
4741
809ffe0d
ILT
4742 tc = symbol_get_tc (sym);
4743 tc->next = NULL;
4744 tc->output = 0;
4745 tc->class = -1;
4746 tc->real_name = NULL;
4747 tc->subseg = 0;
4748 tc->align = 0;
4749 tc->size = NULL;
4750 tc->within = NULL;
252b5132
RH
4751
4752 if (ppc_stab_symbol)
4753 return;
4754
4755 s = strchr (S_GET_NAME (sym), '[');
4756 if (s == (const char *) NULL)
4757 {
4758 /* There is no suffix. */
4759 return;
4760 }
4761
4762 ++s;
4763
4764 switch (s[0])
4765 {
4766 case 'B':
4767 if (strcmp (s, "BS]") == 0)
809ffe0d 4768 tc->class = XMC_BS;
252b5132
RH
4769 break;
4770 case 'D':
4771 if (strcmp (s, "DB]") == 0)
809ffe0d 4772 tc->class = XMC_DB;
252b5132 4773 else if (strcmp (s, "DS]") == 0)
809ffe0d 4774 tc->class = XMC_DS;
252b5132
RH
4775 break;
4776 case 'G':
4777 if (strcmp (s, "GL]") == 0)
809ffe0d 4778 tc->class = XMC_GL;
252b5132
RH
4779 break;
4780 case 'P':
4781 if (strcmp (s, "PR]") == 0)
809ffe0d 4782 tc->class = XMC_PR;
252b5132
RH
4783 break;
4784 case 'R':
4785 if (strcmp (s, "RO]") == 0)
809ffe0d 4786 tc->class = XMC_RO;
252b5132 4787 else if (strcmp (s, "RW]") == 0)
809ffe0d 4788 tc->class = XMC_RW;
252b5132
RH
4789 break;
4790 case 'S':
4791 if (strcmp (s, "SV]") == 0)
809ffe0d 4792 tc->class = XMC_SV;
252b5132
RH
4793 break;
4794 case 'T':
4795 if (strcmp (s, "TC]") == 0)
809ffe0d 4796 tc->class = XMC_TC;
252b5132 4797 else if (strcmp (s, "TI]") == 0)
809ffe0d 4798 tc->class = XMC_TI;
252b5132 4799 else if (strcmp (s, "TB]") == 0)
809ffe0d 4800 tc->class = XMC_TB;
252b5132 4801 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4802 tc->class = XMC_TC0;
252b5132
RH
4803 break;
4804 case 'U':
4805 if (strcmp (s, "UA]") == 0)
809ffe0d 4806 tc->class = XMC_UA;
252b5132 4807 else if (strcmp (s, "UC]") == 0)
809ffe0d 4808 tc->class = XMC_UC;
252b5132
RH
4809 break;
4810 case 'X':
4811 if (strcmp (s, "XO]") == 0)
809ffe0d 4812 tc->class = XMC_XO;
252b5132
RH
4813 break;
4814 }
4815
809ffe0d 4816 if (tc->class == -1)
252b5132
RH
4817 as_bad (_("Unrecognized symbol suffix"));
4818}
4819
4820/* Set the class of a label based on where it is defined. This
4821 handles symbols without suffixes. Also, move the symbol so that it
4822 follows the csect symbol. */
4823
4824void
4825ppc_frob_label (sym)
4826 symbolS *sym;
4827{
4828 if (ppc_current_csect != (symbolS *) NULL)
4829 {
809ffe0d
ILT
4830 if (symbol_get_tc (sym)->class == -1)
4831 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH
4832
4833 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT
4834 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4835 &symbol_rootP, &symbol_lastP);
4836 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH
4837 }
4838}
4839
4840/* This variable is set by ppc_frob_symbol if any absolute symbols are
4841 seen. It tells ppc_adjust_symtab whether it needs to look through
4842 the symbols. */
4843
b34976b6 4844static bfd_boolean ppc_saw_abs;
252b5132
RH
4845
4846/* Change the name of a symbol just before writing it out. Set the
4847 real name if the .rename pseudo-op was used. Otherwise, remove any
4848 class suffix. Return 1 if the symbol should not be included in the
4849 symbol table. */
4850
4851int
4852ppc_frob_symbol (sym)
4853 symbolS *sym;
4854{
4855 static symbolS *ppc_last_function;
4856 static symbolS *set_end;
4857
4858 /* Discard symbols that should not be included in the output symbol
4859 table. */
809ffe0d
ILT
4860 if (! symbol_used_in_reloc_p (sym)
4861 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4862 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4863 && ! symbol_get_tc (sym)->output
252b5132
RH
4864 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4865 return 1;
4866
a161fe53
AM
4867 /* This one will disappear anyway. Don't make a csect sym for it. */
4868 if (sym == abs_section_sym)
4869 return 1;
4870
809ffe0d
ILT
4871 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4872 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH
4873 else
4874 {
4875 const char *name;
4876 const char *s;
4877
4878 name = S_GET_NAME (sym);
4879 s = strchr (name, '[');
4880 if (s != (char *) NULL)
4881 {
4882 unsigned int len;
4883 char *snew;
4884
4885 len = s - name;
4886 snew = xmalloc (len + 1);
4887 memcpy (snew, name, len);
4888 snew[len] = '\0';
4889
4890 S_SET_NAME (sym, snew);
4891 }
4892 }
4893
4894 if (set_end != (symbolS *) NULL)
4895 {
4896 SA_SET_SYM_ENDNDX (set_end, sym);
4897 set_end = NULL;
4898 }
4899
4900 if (SF_GET_FUNCTION (sym))
4901 {
4902 if (ppc_last_function != (symbolS *) NULL)
4903 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4904 ppc_last_function = sym;
809ffe0d 4905 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4906 {
6386f3a7 4907 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT
4908 SA_SET_SYM_FSIZE (sym,
4909 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH
4910 }
4911 }
4912 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4913 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4914 {
4915 if (ppc_last_function == (symbolS *) NULL)
4916 as_bad (_(".ef with no preceding .function"));
4917 else
4918 {
4919 set_end = ppc_last_function;
4920 ppc_last_function = NULL;
4921
4922 /* We don't have a C_EFCN symbol, but we need to force the
4923 COFF backend to believe that it has seen one. */
4924 coff_last_function = NULL;
4925 }
4926 }
4927
670ec21d 4928 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4929 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH
4930 && S_GET_STORAGE_CLASS (sym) != C_FILE
4931 && S_GET_STORAGE_CLASS (sym) != C_FCN
4932 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4933 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4934 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4935 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4936 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4937 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4938 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4939
4940 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4941 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4942 {
4943 int i;
4944 union internal_auxent *a;
4945
4946 /* Create a csect aux. */
4947 i = S_GET_NUMBER_AUXILIARY (sym);
4948 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT
4949 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4950 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH
4951 {
4952 /* This is the TOC table. */
4953 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4954 a->x_csect.x_scnlen.l = 0;
4955 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4956 }
809ffe0d 4957 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH
4958 {
4959 /* This is a csect symbol. x_scnlen is the size of the
4960 csect. */
809ffe0d 4961 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH
4962 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4963 S_GET_SEGMENT (sym))
4964 - S_GET_VALUE (sym));
4965 else
4966 {
6386f3a7 4967 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4968 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH
4969 - S_GET_VALUE (sym));
4970 }
809ffe0d 4971 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH
4972 }
4973 else if (S_GET_SEGMENT (sym) == bss_section)
4974 {
4975 /* This is a common symbol. */
809ffe0d
ILT
4976 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4977 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4978 if (S_IS_EXTERNAL (sym))
809ffe0d 4979 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4980 else
809ffe0d 4981 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH
4982 }
4983 else if (S_GET_SEGMENT (sym) == absolute_section)
4984 {
4985 /* This is an absolute symbol. The csect will be created by
99a814a1 4986 ppc_adjust_symtab. */
b34976b6 4987 ppc_saw_abs = TRUE;
252b5132 4988 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT
4989 if (symbol_get_tc (sym)->class == -1)
4990 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH
4991 }
4992 else if (! S_IS_DEFINED (sym))
4993 {
4994 /* This is an external symbol. */
4995 a->x_csect.x_scnlen.l = 0;
4996 a->x_csect.x_smtyp = XTY_ER;
4997 }
809ffe0d 4998 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH
4999 {
5000 symbolS *next;
5001
5002 /* This is a TOC definition. x_scnlen is the size of the
5003 TOC entry. */
5004 next = symbol_next (sym);
809ffe0d 5005 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH
5006 next = symbol_next (next);
5007 if (next == (symbolS *) NULL
809ffe0d 5008 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH
5009 {
5010 if (ppc_after_toc_frag == (fragS *) NULL)
5011 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5012 data_section)
5013 - S_GET_VALUE (sym));
5014 else
5015 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5016 - S_GET_VALUE (sym));
5017 }
5018 else
5019 {
6386f3a7 5020 resolve_symbol_value (next);
252b5132
RH
5021 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5022 - S_GET_VALUE (sym));
5023 }
5024 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5025 }
5026 else
5027 {
5028 symbolS *csect;
5029
5030 /* This is a normal symbol definition. x_scnlen is the
5031 symbol index of the containing csect. */
5032 if (S_GET_SEGMENT (sym) == text_section)
5033 csect = ppc_text_csects;
5034 else if (S_GET_SEGMENT (sym) == data_section)
5035 csect = ppc_data_csects;
5036 else
5037 abort ();
5038
5039 /* Skip the initial dummy symbol. */
809ffe0d 5040 csect = symbol_get_tc (csect)->next;
252b5132
RH
5041
5042 if (csect == (symbolS *) NULL)
5043 {
5044 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5045 a->x_csect.x_scnlen.l = 0;
5046 }
5047 else
5048 {
809ffe0d 5049 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5050 {
6386f3a7 5051 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT
5052 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5053 > S_GET_VALUE (sym))
252b5132 5054 break;
809ffe0d 5055 csect = symbol_get_tc (csect)->next;
252b5132
RH
5056 }
5057
809ffe0d
ILT
5058 a->x_csect.x_scnlen.p =
5059 coffsymbol (symbol_get_bfdsym (csect))->native;
5060 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5061 1;
252b5132
RH
5062 }
5063 a->x_csect.x_smtyp = XTY_LD;
5064 }
81d4177b 5065
252b5132
RH
5066 a->x_csect.x_parmhash = 0;
5067 a->x_csect.x_snhash = 0;
809ffe0d 5068 if (symbol_get_tc (sym)->class == -1)
252b5132
RH
5069 a->x_csect.x_smclas = XMC_PR;
5070 else
809ffe0d 5071 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH
5072 a->x_csect.x_stab = 0;
5073 a->x_csect.x_snstab = 0;
5074
5075 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5076 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH
5077 }
5078 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5079 {
5080 /* We want the value to be the symbol index of the referenced
5081 csect symbol. BFD will do that for us if we set the right
5082 flags. */
b782de16
AM
5083 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5084 combined_entry_type *c = coffsymbol (bsym)->native;
5085
5086 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5087 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH
5088 }
5089 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5090 {
5091 symbolS *block;
5092 symbolS *csect;
5093
5094 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT
5095 block = symbol_get_tc (sym)->within;
5096 csect = symbol_get_tc (block)->within;
6386f3a7 5097 resolve_symbol_value (csect);
252b5132
RH
5098 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5099 }
5100 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5101 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5102 {
5103 /* We want the value to be a file offset into the line numbers.
99a814a1
AM
5104 BFD will do that for us if we set the right flags. We have
5105 already set the value correctly. */
809ffe0d 5106 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH
5107 }
5108
5109 return 0;
5110}
5111
5112/* Adjust the symbol table. This creates csect symbols for all
5113 absolute symbols. */
5114
5115void
5116ppc_adjust_symtab ()
5117{
5118 symbolS *sym;
5119
5120 if (! ppc_saw_abs)
5121 return;
5122
5123 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5124 {
5125 symbolS *csect;
5126 int i;
5127 union internal_auxent *a;
5128
5129 if (S_GET_SEGMENT (sym) != absolute_section)
5130 continue;
5131
5132 csect = symbol_create (".abs[XO]", absolute_section,
5133 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5134 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH
5135 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5136 i = S_GET_NUMBER_AUXILIARY (csect);
5137 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5138 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH
5139 a->x_csect.x_scnlen.l = 0;
5140 a->x_csect.x_smtyp = XTY_SD;
5141 a->x_csect.x_parmhash = 0;
5142 a->x_csect.x_snhash = 0;
5143 a->x_csect.x_smclas = XMC_XO;
5144 a->x_csect.x_stab = 0;
5145 a->x_csect.x_snstab = 0;
5146
5147 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5148
5149 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT
5150 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5151 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5152 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH
5153 }
5154
b34976b6 5155 ppc_saw_abs = FALSE;
252b5132
RH
5156}
5157
5158/* Set the VMA for a section. This is called on all the sections in
5159 turn. */
5160
5161void
5162ppc_frob_section (sec)
5163 asection *sec;
5164{
931e13a6 5165 static bfd_vma vma = 0;
252b5132 5166
931e13a6 5167 vma = md_section_align (sec, vma);
252b5132
RH
5168 bfd_set_section_vma (stdoutput, sec, vma);
5169 vma += bfd_section_size (stdoutput, sec);
5170}
5171
5172#endif /* OBJ_XCOFF */
5173\f
5174/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC
5175 of type TYPE, and store the appropriate bytes in *LITP. The number
5176 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH
5177 returned, or NULL on OK. */
5178
5179char *
5180md_atof (type, litp, sizep)
5181 int type;
5182 char *litp;
5183 int *sizep;
5184{
5185 int prec;
5186 LITTLENUM_TYPE words[4];
5187 char *t;
5188 int i;
5189
5190 switch (type)
5191 {
5192 case 'f':
5193 prec = 2;
5194 break;
5195
5196 case 'd':
5197 prec = 4;
5198 break;
5199
5200 default:
5201 *sizep = 0;
5202 return _("bad call to md_atof");
5203 }
5204
5205 t = atof_ieee (input_line_pointer, type, words);
5206 if (t)
5207 input_line_pointer = t;
5208
5209 *sizep = prec * 2;
5210
5211 if (target_big_endian)
5212 {
5213 for (i = 0; i < prec; i++)
5214 {
5215 md_number_to_chars (litp, (valueT) words[i], 2);
5216 litp += 2;
5217 }
5218 }
5219 else
5220 {
5221 for (i = prec - 1; i >= 0; i--)
5222 {
5223 md_number_to_chars (litp, (valueT) words[i], 2);
5224 litp += 2;
5225 }
5226 }
81d4177b 5227
252b5132
RH
5228 return NULL;
5229}
5230
5231/* Write a value out to the object file, using the appropriate
5232 endianness. */
5233
5234void
5235md_number_to_chars (buf, val, n)
5236 char *buf;
5237 valueT val;
5238 int n;
5239{
5240 if (target_big_endian)
5241 number_to_chars_bigendian (buf, val, n);
5242 else
5243 number_to_chars_littleendian (buf, val, n);
5244}
5245
5246/* Align a section (I don't know why this is machine dependent). */
5247
5248valueT
5249md_section_align (seg, addr)
5250 asection *seg;
5251 valueT addr;
5252{
5253 int align = bfd_get_section_alignment (stdoutput, seg);
5254
5255 return ((addr + (1 << align) - 1) & (-1 << align));
5256}
5257
5258/* We don't have any form of relaxing. */
5259
5260int
5261md_estimate_size_before_relax (fragp, seg)
92161534
ILT
5262 fragS *fragp ATTRIBUTE_UNUSED;
5263 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
5264{
5265 abort ();
5266 return 0;
5267}
5268
5269/* Convert a machine dependent frag. We never generate these. */
5270
5271void
5272md_convert_frag (abfd, sec, fragp)
92161534
ILT
5273 bfd *abfd ATTRIBUTE_UNUSED;
5274 asection *sec ATTRIBUTE_UNUSED;
5275 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH
5276{
5277 abort ();
5278}
5279
5280/* We have no need to default values of symbols. */
5281
252b5132
RH
5282symbolS *
5283md_undefined_symbol (name)
92161534 5284 char *name ATTRIBUTE_UNUSED;
252b5132
RH
5285{
5286 return 0;
5287}
5288\f
5289/* Functions concerning relocs. */
5290
5291/* The location from which a PC relative jump should be calculated,
5292 given a PC relative reloc. */
5293
5294long
5295md_pcrel_from_section (fixp, sec)
5296 fixS *fixp;
92161534 5297 segT sec ATTRIBUTE_UNUSED;
252b5132
RH
5298{
5299 return fixp->fx_frag->fr_address + fixp->fx_where;
5300}
5301
5302#ifdef OBJ_XCOFF
5303
5304/* This is called to see whether a fixup should be adjusted to use a
5305 section symbol. We take the opportunity to change a fixup against
5306 a symbol in the TOC subsegment into a reloc against the
5307 corresponding .tc symbol. */
5308
5309int
5310ppc_fix_adjustable (fix)
5311 fixS *fix;
5312{
b782de16
AM
5313 valueT val = resolve_symbol_value (fix->fx_addsy);
5314 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5315 TC_SYMFIELD_TYPE *tc;
5316
5317 if (symseg == absolute_section)
5318 return 0;
252b5132 5319
252b5132 5320 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5321 && fix->fx_addsy != ppc_toc_csect
b782de16 5322 && symseg == data_section
252b5132
RH
5323 && val >= ppc_toc_frag->fr_address
5324 && (ppc_after_toc_frag == (fragS *) NULL
5325 || val < ppc_after_toc_frag->fr_address))
5326 {
5327 symbolS *sy;
5328
5329 for (sy = symbol_next (ppc_toc_csect);
5330 sy != (symbolS *) NULL;
5331 sy = symbol_next (sy))
5332 {
b782de16
AM
5333 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5334
5335 if (sy_tc->class == XMC_TC0)
252b5132 5336 continue;
b782de16 5337 if (sy_tc->class != XMC_TC)
252b5132 5338 break;
b782de16 5339 if (val == resolve_symbol_value (sy))
252b5132
RH
5340 {
5341 fix->fx_addsy = sy;
5342 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5343 return 0;
5344 }
5345 }
5346
5347 as_bad_where (fix->fx_file, fix->fx_line,
5348 _("symbol in .toc does not match any .tc"));
5349 }
5350
5351 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM
5352 tc = symbol_get_tc (fix->fx_addsy);
5353 if (tc->subseg == 0
5354 && tc->class != XMC_TC0
5355 && tc->class != XMC_TC
5356 && symseg != bss_section
252b5132 5357 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5358 && (symseg != data_section
252b5132
RH
5359 || ppc_toc_csect == NULL
5360 || val < ppc_toc_frag->fr_address
5361 || (ppc_after_toc_frag != NULL
5362 && val >= ppc_after_toc_frag->fr_address)))
5363 {
5364 symbolS *csect;
b782de16 5365 symbolS *next_csect;
252b5132 5366
b782de16 5367 if (symseg == text_section)
252b5132 5368 csect = ppc_text_csects;
b782de16 5369 else if (symseg == data_section)
252b5132
RH
5370 csect = ppc_data_csects;
5371 else
5372 abort ();
5373
5374 /* Skip the initial dummy symbol. */
809ffe0d 5375 csect = symbol_get_tc (csect)->next;
252b5132
RH
5376
5377 if (csect != (symbolS *) NULL)
5378 {
b782de16
AM
5379 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5380 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH
5381 {
5382 /* If the csect address equals the symbol value, then we
99a814a1
AM
5383 have to look through the full symbol table to see
5384 whether this is the csect we want. Note that we will
5385 only get here if the csect has zero length. */
b782de16
AM
5386 if (symbol_get_frag (csect)->fr_address == val
5387 && S_GET_VALUE (csect) == val)
252b5132
RH
5388 {
5389 symbolS *scan;
5390
809ffe0d 5391 for (scan = symbol_next (csect);
252b5132 5392 scan != NULL;
809ffe0d 5393 scan = symbol_next (scan))
252b5132 5394 {
809ffe0d 5395 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH
5396 break;
5397 if (scan == fix->fx_addsy)
5398 break;
5399 }
5400
5401 /* If we found the symbol before the next csect
99a814a1 5402 symbol, then this is the csect we want. */
252b5132
RH
5403 if (scan == fix->fx_addsy)
5404 break;
5405 }
5406
b782de16 5407 csect = next_csect;
252b5132
RH
5408 }
5409
b782de16 5410 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH
5411 fix->fx_addsy = csect;
5412 }
b782de16 5413 return 0;
252b5132
RH
5414 }
5415
5416 /* Adjust a reloc against a .lcomm symbol to be against the base
5417 .lcomm. */
b782de16 5418 if (symseg == bss_section
252b5132
RH
5419 && ! S_IS_EXTERNAL (fix->fx_addsy))
5420 {
b782de16
AM
5421 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5422
5423 fix->fx_offset += val - resolve_symbol_value (sy);
5424 fix->fx_addsy = sy;
252b5132
RH
5425 }
5426
5427 return 0;
5428}
5429
5430/* A reloc from one csect to another must be kept. The assembler
5431 will, of course, keep relocs between sections, and it will keep
5432 absolute relocs, but we need to force it to keep PC relative relocs
5433 between two csects in the same section. */
5434
5435int
5436ppc_force_relocation (fix)
5437 fixS *fix;
5438{
5439 /* At this point fix->fx_addsy should already have been converted to
5440 a csect symbol. If the csect does not include the fragment, then
5441 we need to force the relocation. */
5442 if (fix->fx_pcrel
5443 && fix->fx_addsy != NULL
809ffe0d
ILT
5444 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5445 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5446 > fix->fx_frag->fr_address)
5447 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5448 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH
5449 <= fix->fx_frag->fr_address))))
5450 return 1;
5451
ae6063d4 5452 return generic_force_reloc (fix);
252b5132
RH
5453}
5454
5455#endif /* OBJ_XCOFF */
5456
0baf16f2 5457#ifdef OBJ_ELF
a161fe53
AM
5458/* If this function returns non-zero, it guarantees that a relocation
5459 will be emitted for a fixup. */
5460
5461int
5462ppc_force_relocation (fix)
5463 fixS *fix;
5464{
5465 /* Branch prediction relocations must force a relocation, as must
5466 the vtable description relocs. */
5467 switch (fix->fx_r_type)
5468 {
5469 case BFD_RELOC_PPC_B16_BRTAKEN:
5470 case BFD_RELOC_PPC_B16_BRNTAKEN:
5471 case BFD_RELOC_PPC_BA16_BRTAKEN:
5472 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5473 case BFD_RELOC_PPC64_TOC:
a161fe53
AM
5474 return 1;
5475 default:
5476 break;
5477 }
5478
cdba85ec
AM
5479 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5480 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5481 return 1;
5482
ae6063d4 5483 return generic_force_reloc (fix);
a161fe53
AM
5484}
5485
0baf16f2
AM
5486int
5487ppc_fix_adjustable (fix)
5488 fixS *fix;
252b5132 5489{
0baf16f2
AM
5490 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5491 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5492 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5493 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5494 && fix->fx_r_type != BFD_RELOC_GPREL16
5495 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5496 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5497 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5498 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5499}
0baf16f2 5500#endif
252b5132
RH
5501
5502/* Apply a fixup to the object code. This is called for all the
5503 fixups we generated by the call to fix_new_exp, above. In the call
5504 above we used a reloc code which was the largest legal reloc code
5505 plus the operand index. Here we undo that to recover the operand
5506 index. At this point all symbol values should be fully resolved,
5507 and we attempt to completely resolve the reloc. If we can not do
5508 that, we determine the correct reloc code and put it back in the
5509 fixup. */
5510
94f592af
NC
5511void
5512md_apply_fix3 (fixP, valP, seg)
5513 fixS *fixP;
5514 valueT * valP;
0baf16f2 5515 segT seg ATTRIBUTE_UNUSED;
252b5132 5516{
94f592af 5517 valueT value = * valP;
252b5132
RH
5518
5519#ifdef OBJ_ELF
94f592af 5520 if (fixP->fx_addsy != NULL)
252b5132 5521 {
a161fe53 5522 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC
5523 if (fixP->fx_pcrel)
5524 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH
5525 }
5526 else
94f592af 5527 fixP->fx_done = 1;
252b5132 5528#else
a161fe53 5529 /* FIXME FIXME FIXME: The value we are passed in *valP includes
252b5132
RH
5530 the symbol values. Since we are using BFD_ASSEMBLER, if we are
5531 doing this relocation the code in write.c is going to call
5532 bfd_install_relocation, which is also going to use the symbol
5533 value. That means that if the reloc is fully resolved we want to
a161fe53 5534 use *valP since bfd_install_relocation is not being used.
252b5132 5535 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM
5536 *valP, and must use fx_offset instead. However, if the reloc
5537 is PC relative, we do want to use *valP since it includes the
252b5132 5538 result of md_pcrel_from. This is confusing. */
94f592af
NC
5539 if (fixP->fx_addsy == (symbolS *) NULL)
5540 fixP->fx_done = 1;
5541
5542 else if (fixP->fx_pcrel)
5543 ;
5544
252b5132 5545 else
a161fe53
AM
5546 value = fixP->fx_offset;
5547#endif
5548
5549 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5550 {
a161fe53
AM
5551 /* We can't actually support subtracting a symbol. */
5552 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5553 }
252b5132 5554
94f592af 5555 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH
5556 {
5557 int opindex;
5558 const struct powerpc_operand *operand;
5559 char *where;
5560 unsigned long insn;
5561
94f592af 5562 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH
5563
5564 operand = &powerpc_operands[opindex];
5565
5566#ifdef OBJ_XCOFF
0baf16f2
AM
5567 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5568 does not generate a reloc. It uses the offset of `sym' within its
5569 csect. Other usages, such as `.long sym', generate relocs. This
5570 is the documented behaviour of non-TOC symbols. */
252b5132
RH
5571 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5572 && operand->bits == 16
5573 && operand->shift == 0
2b3c4602 5574 && (operand->insert == NULL || ppc_obj64)
94f592af
NC
5575 && fixP->fx_addsy != NULL
5576 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5577 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5578 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5579 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5580 {
94f592af
NC
5581 value = fixP->fx_offset;
5582 fixP->fx_done = 1;
252b5132
RH
5583 }
5584#endif
5585
5586 /* Fetch the instruction, insert the fully resolved operand
5587 value, and stuff the instruction back again. */
94f592af 5588 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH
5589 if (target_big_endian)
5590 insn = bfd_getb32 ((unsigned char *) where);
5591 else
5592 insn = bfd_getl32 ((unsigned char *) where);
5593 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5594 fixP->fx_file, fixP->fx_line);
252b5132
RH
5595 if (target_big_endian)
5596 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5597 else
5598 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5599
94f592af
NC
5600 if (fixP->fx_done)
5601 /* Nothing else to do here. */
5602 return;
252b5132 5603
94f592af 5604 assert (fixP->fx_addsy != NULL);
0baf16f2 5605
252b5132
RH
5606 /* Determine a BFD reloc value based on the operand information.
5607 We are only prepared to turn a few of the operands into
0baf16f2 5608 relocs. */
11b37b7b
AM
5609 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5610 && operand->bits == 26
5611 && operand->shift == 0)
94f592af 5612 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM
5613 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5614 && operand->bits == 16
5615 && operand->shift == 0)
95210096
AM
5616 {
5617 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5618#ifdef OBJ_XCOFF
5619 fixP->fx_size = 2;
5620 if (target_big_endian)
5621 fixP->fx_where += 2;
5622#endif
5623 }
11b37b7b
AM
5624 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5625 && operand->bits == 26
5626 && operand->shift == 0)
94f592af 5627 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM
5628 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5629 && operand->bits == 16
5630 && operand->shift == 0)
95210096
AM
5631 {
5632 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5633#ifdef OBJ_XCOFF
5634 fixP->fx_size = 2;
5635 if (target_big_endian)
5636 fixP->fx_where += 2;
5637#endif
5638 }
0baf16f2 5639#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM
5640 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5641 && operand->bits == 16
a7fc733f 5642 && operand->shift == 0)
11b37b7b 5643 {
a7fc733f
AM
5644 if (ppc_is_toc_sym (fixP->fx_addsy))
5645 {
5646 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5647#ifdef OBJ_ELF
a7fc733f
AM
5648 if (ppc_obj64
5649 && (operand->flags & PPC_OPERAND_DS) != 0)
5650 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5651#endif
5652 }
5653 else
5654 {
5655 fixP->fx_r_type = BFD_RELOC_16;
5656#ifdef OBJ_ELF
5657 if (ppc_obj64
5658 && (operand->flags & PPC_OPERAND_DS) != 0)
5659 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5660#endif
a7fc733f 5661 }
94f592af 5662 fixP->fx_size = 2;
11b37b7b 5663 if (target_big_endian)
94f592af 5664 fixP->fx_where += 2;
11b37b7b 5665 }
0baf16f2 5666#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5667 else
252b5132
RH
5668 {
5669 char *sfile;
5670 unsigned int sline;
5671
5672 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5673 symbol. */
94f592af
NC
5674 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5675 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH
5676 _("unresolved expression that must be resolved"));
5677 else
94f592af 5678 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5679 _("unsupported relocation against %s"),
94f592af
NC
5680 S_GET_NAME (fixP->fx_addsy));
5681 fixP->fx_done = 1;
5682 return;
252b5132
RH
5683 }
5684 }
5685 else
5686 {
5687#ifdef OBJ_ELF
94f592af 5688 ppc_elf_validate_fix (fixP, seg);
252b5132 5689#endif
94f592af 5690 switch (fixP->fx_r_type)
252b5132 5691 {
252b5132 5692 case BFD_RELOC_CTOR:
2b3c4602 5693 if (ppc_obj64)
9c7977b3
AM
5694 goto ctor64;
5695 /* fall through */
5696
0baf16f2 5697 case BFD_RELOC_32:
94f592af
NC
5698 if (fixP->fx_pcrel)
5699 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5700 /* fall through */
252b5132
RH
5701
5702 case BFD_RELOC_RVA:
5703 case BFD_RELOC_32_PCREL:
252b5132 5704 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5705 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH
5706 value, 4);
5707 break;
5708
7f6d05e8 5709 case BFD_RELOC_64:
9c7977b3 5710 ctor64:
94f592af
NC
5711 if (fixP->fx_pcrel)
5712 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5713 /* fall through */
0baf16f2 5714
7f6d05e8 5715 case BFD_RELOC_64_PCREL:
94f592af 5716 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5717 value, 8);
81d4177b 5718 break;
0baf16f2 5719
252b5132
RH
5720 case BFD_RELOC_GPREL16:
5721 case BFD_RELOC_16_GOT_PCREL:
5722 case BFD_RELOC_16_GOTOFF:
5723 case BFD_RELOC_LO16_GOTOFF:
5724 case BFD_RELOC_HI16_GOTOFF:
5725 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5726 case BFD_RELOC_16_BASEREL:
252b5132
RH
5727 case BFD_RELOC_LO16_BASEREL:
5728 case BFD_RELOC_HI16_BASEREL:
5729 case BFD_RELOC_HI16_S_BASEREL:
5730 case BFD_RELOC_PPC_EMB_NADDR16:
5731 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5732 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5733 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5734 case BFD_RELOC_PPC_EMB_SDAI16:
5735 case BFD_RELOC_PPC_EMB_SDA2REL:
5736 case BFD_RELOC_PPC_EMB_SDA2I16:
5737 case BFD_RELOC_PPC_EMB_RELSEC16:
5738 case BFD_RELOC_PPC_EMB_RELST_LO:
5739 case BFD_RELOC_PPC_EMB_RELST_HI:
5740 case BFD_RELOC_PPC_EMB_RELST_HA:
5741 case BFD_RELOC_PPC_EMB_RELSDA:
5742 case BFD_RELOC_PPC_TOC16:
0baf16f2 5743#ifdef OBJ_ELF
0baf16f2
AM
5744 case BFD_RELOC_PPC64_TOC16_LO:
5745 case BFD_RELOC_PPC64_TOC16_HI:
5746 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5747#endif
94f592af 5748 if (fixP->fx_pcrel)
252b5132 5749 {
94f592af
NC
5750 if (fixP->fx_addsy != NULL)
5751 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5752 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC
5753 bfd_get_reloc_code_name (fixP->fx_r_type),
5754 S_GET_NAME (fixP->fx_addsy));
252b5132 5755 else
94f592af 5756 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5757 _("cannot emit PC relative %s relocation"),
94f592af 5758 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH
5759 }
5760
94f592af 5761 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH
5762 value, 2);
5763 break;
5764
3c9d25f4
AM
5765 case BFD_RELOC_16:
5766 if (fixP->fx_pcrel)
5767 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5768 /* fall through */
5769
5770 case BFD_RELOC_16_PCREL:
5771 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5772 value, 2);
5773 break;
5774
5775 case BFD_RELOC_LO16:
5776 if (fixP->fx_pcrel)
5777 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5778 /* fall through */
5779
5780 case BFD_RELOC_LO16_PCREL:
5781 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5782 value, 2);
5783 break;
5784
252b5132
RH
5785 /* This case happens when you write, for example,
5786 lis %r3,(L1-L2)@ha
5787 where L1 and L2 are defined later. */
5788 case BFD_RELOC_HI16:
94f592af 5789 if (fixP->fx_pcrel)
3c9d25f4
AM
5790 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5791 /* fall through */
5792
5793 case BFD_RELOC_HI16_PCREL:
94f592af 5794 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5795 PPC_HI (value), 2);
252b5132 5796 break;
0baf16f2 5797
252b5132 5798 case BFD_RELOC_HI16_S:
94f592af 5799 if (fixP->fx_pcrel)
3c9d25f4
AM
5800 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5801 /* fall through */
5802
5803 case BFD_RELOC_HI16_S_PCREL:
94f592af 5804 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5805 PPC_HA (value), 2);
5806 break;
5807
5808#ifdef OBJ_ELF
0baf16f2 5809 case BFD_RELOC_PPC64_HIGHER:
94f592af 5810 if (fixP->fx_pcrel)
0baf16f2 5811 abort ();
94f592af 5812 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5813 PPC_HIGHER (value), 2);
252b5132
RH
5814 break;
5815
0baf16f2 5816 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5817 if (fixP->fx_pcrel)
0baf16f2 5818 abort ();
94f592af 5819 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5820 PPC_HIGHERA (value), 2);
5821 break;
5822
5823 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5824 if (fixP->fx_pcrel)
0baf16f2 5825 abort ();
94f592af 5826 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5827 PPC_HIGHEST (value), 2);
5828 break;
5829
5830 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5831 if (fixP->fx_pcrel)
0baf16f2 5832 abort ();
94f592af 5833 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM
5834 PPC_HIGHESTA (value), 2);
5835 break;
5836
5837 case BFD_RELOC_PPC64_ADDR16_DS:
5838 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5839 case BFD_RELOC_PPC64_GOT16_DS:
5840 case BFD_RELOC_PPC64_GOT16_LO_DS:
5841 case BFD_RELOC_PPC64_PLT16_LO_DS:
5842 case BFD_RELOC_PPC64_SECTOFF_DS:
5843 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5844 case BFD_RELOC_PPC64_TOC16_DS:
5845 case BFD_RELOC_PPC64_TOC16_LO_DS:
5846 case BFD_RELOC_PPC64_PLTGOT16_DS:
5847 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5848 if (fixP->fx_pcrel)
0baf16f2
AM
5849 abort ();
5850 {
2132e3a3 5851 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5852 unsigned long val, mask;
0baf16f2
AM
5853
5854 if (target_big_endian)
adadcc0c 5855 val = bfd_getb32 (where - 2);
0baf16f2 5856 else
adadcc0c
AM
5857 val = bfd_getl32 (where);
5858 mask = 0xfffc;
5859 /* lq insns reserve the four lsbs. */
5860 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5861 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM
5862 mask = 0xfff0;
5863 val |= value & mask;
0baf16f2
AM
5864 if (target_big_endian)
5865 bfd_putb16 ((bfd_vma) val, where);
5866 else
5867 bfd_putl16 ((bfd_vma) val, where);
5868 }
5869 break;
cdba85ec 5870
ba0b2174
AM
5871 case BFD_RELOC_PPC_B16_BRTAKEN:
5872 case BFD_RELOC_PPC_B16_BRNTAKEN:
5873 case BFD_RELOC_PPC_BA16_BRTAKEN:
5874 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5875 break;
5876
cdba85ec 5877 case BFD_RELOC_PPC_TLS:
7c1d0959
L
5878 break;
5879
cdba85ec
AM
5880 case BFD_RELOC_PPC_DTPMOD:
5881 case BFD_RELOC_PPC_TPREL16:
5882 case BFD_RELOC_PPC_TPREL16_LO:
5883 case BFD_RELOC_PPC_TPREL16_HI:
5884 case BFD_RELOC_PPC_TPREL16_HA:
5885 case BFD_RELOC_PPC_TPREL:
5886 case BFD_RELOC_PPC_DTPREL16:
5887 case BFD_RELOC_PPC_DTPREL16_LO:
5888 case BFD_RELOC_PPC_DTPREL16_HI:
5889 case BFD_RELOC_PPC_DTPREL16_HA:
5890 case BFD_RELOC_PPC_DTPREL:
5891 case BFD_RELOC_PPC_GOT_TLSGD16:
5892 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5893 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5894 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5895 case BFD_RELOC_PPC_GOT_TLSLD16:
5896 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5897 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5898 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5899 case BFD_RELOC_PPC_GOT_TPREL16:
5900 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5901 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5902 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5903 case BFD_RELOC_PPC_GOT_DTPREL16:
5904 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5905 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5906 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5907 case BFD_RELOC_PPC64_TPREL16_DS:
5908 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5909 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5910 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5911 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5912 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5913 case BFD_RELOC_PPC64_DTPREL16_DS:
5914 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5915 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5916 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5917 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5918 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 5919 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 5920 break;
0baf16f2 5921#endif
252b5132 5922 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5923 bytes, rather than 2, so offset it here appropriately. */
252b5132 5924 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5925 if (fixP->fx_pcrel)
252b5132
RH
5926 abort ();
5927
94f592af 5928 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH
5929 + ((target_big_endian) ? 2 : 0),
5930 value, 2);
5931 break;
5932
5933 case BFD_RELOC_8:
94f592af 5934 if (fixP->fx_pcrel)
31a91399
NC
5935 {
5936 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 5937 ".byte <undefined_symbol> - ." */
31a91399
NC
5938 if (fixP->fx_addsy)
5939 as_bad (_("Unable to handle reference to symbol %s"),
5940 S_GET_NAME (fixP->fx_addsy));
5941 else
5942 as_bad (_("Unable to resolve expression"));
5943 fixP->fx_done = 1;
5944 }
5945 else
5946 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5947 value, 1);
252b5132
RH
5948 break;
5949
5950 case BFD_RELOC_24_PLT_PCREL:
5951 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5952 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH
5953 abort ();
5954
94f592af 5955 if (fixP->fx_done)
99a814a1
AM
5956 {
5957 char *where;
5958 unsigned long insn;
5959
5960 /* Fetch the instruction, insert the fully resolved operand
5961 value, and stuff the instruction back again. */
94f592af 5962 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM
5963 if (target_big_endian)
5964 insn = bfd_getb32 ((unsigned char *) where);
5965 else
5966 insn = bfd_getl32 ((unsigned char *) where);
5967 if ((value & 3) != 0)
94f592af 5968 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM
5969 _("must branch to an address a multiple of 4"));
5970 if ((offsetT) value < -0x40000000
5971 || (offsetT) value >= 0x40000000)
94f592af 5972 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM
5973 _("@local or @plt branch destination is too far away, %ld bytes"),
5974 (long) value);
5975 insn = insn | (value & 0x03fffffc);
5976 if (target_big_endian)
5977 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5978 else
5979 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5980 }
252b5132
RH
5981 break;
5982
5983 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC
5984 fixP->fx_done = 0;
5985 if (fixP->fx_addsy
5986 && !S_IS_DEFINED (fixP->fx_addsy)
5987 && !S_IS_WEAK (fixP->fx_addsy))
5988 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH
5989 break;
5990
5991 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5992 fixP->fx_done = 0;
252b5132
RH
5993 break;
5994
0baf16f2 5995#ifdef OBJ_ELF
0baf16f2
AM
5996 /* Generated by reference to `sym@tocbase'. The sym is
5997 ignored by the linker. */
5998 case BFD_RELOC_PPC64_TOC:
94f592af 5999 fixP->fx_done = 0;
0baf16f2 6000 break;
0baf16f2 6001#endif
252b5132 6002 default:
bc805888 6003 fprintf (stderr,
94f592af 6004 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6005 fflush (stderr);
252b5132
RH
6006 abort ();
6007 }
6008 }
6009
6010#ifdef OBJ_ELF
94f592af 6011 fixP->fx_addnumber = value;
252b5132 6012#else
94f592af
NC
6013 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6014 fixP->fx_addnumber = 0;
252b5132
RH
6015 else
6016 {
6017#ifdef TE_PE
94f592af 6018 fixP->fx_addnumber = 0;
252b5132
RH
6019#else
6020 /* We want to use the offset within the data segment of the
6021 symbol, not the actual VMA of the symbol. */
94f592af
NC
6022 fixP->fx_addnumber =
6023 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH
6024#endif
6025 }
6026#endif
252b5132
RH
6027}
6028
6029/* Generate a reloc for a fixup. */
6030
6031arelent *
6032tc_gen_reloc (seg, fixp)
92161534 6033 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
6034 fixS *fixp;
6035{
6036 arelent *reloc;
6037
6038 reloc = (arelent *) xmalloc (sizeof (arelent));
6039
49309057
ILT
6040 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6041 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
6042 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6043 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6044 if (reloc->howto == (reloc_howto_type *) NULL)
6045 {
6046 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM
6047 _("reloc %d not supported by object file format"),
6048 (int) fixp->fx_r_type);
252b5132
RH
6049 return NULL;
6050 }
6051 reloc->addend = fixp->fx_addnumber;
6052
6053 return reloc;
6054}
75e21f08
JJ
6055
6056void
6057ppc_cfi_frame_initial_instructions ()
6058{
6059 cfi_add_CFA_def_cfa (1, 0);
6060}
6061
6062int
6063tc_ppc_regname_to_dw2regnum (const char *regname)
6064{
6065 unsigned int regnum = -1;
6066 unsigned int i;
6067 const char *p;
6068 char *q;
6069 static struct { char *name; int dw2regnum; } regnames[] =
6070 {
6071 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6072 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6073 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ
6074 { "spe_acc", 111 }, { "spefscr", 112 }
6075 };
6076
6077 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6078 if (strcmp (regnames[i].name, regname) == 0)
6079 return regnames[i].dw2regnum;
6080
6081 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6082 {
6083 p = regname + 1 + (regname[1] == '.');
6084 regnum = strtoul (p, &q, 10);
6085 if (p == q || *q || regnum >= 32)
6086 return -1;
6087 if (regname[0] == 'f')
b7d7dc63 6088 regnum += 32;
75e21f08 6089 else if (regname[0] == 'v')
b7d7dc63 6090 regnum += 77;
75e21f08
JJ
6091 }
6092 else if (regname[0] == 'c' && regname[1] == 'r')
6093 {
6094 p = regname + 2 + (regname[2] == '.');
6095 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6096 return -1;
75e21f08
JJ
6097 regnum = p[0] - '0' + 68;
6098 }
6099 return regnum;
6100}
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