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Call initialize_tdesc_x32/initialize_tdesc_x32_avx
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
aea77599 3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
cc643b88 4 Free Software Foundation, Inc.
252b5132
RH		 5 Written by Ian Lance Taylor, Cygnus Support.
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
ec2655a6 11 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 02110-1301, USA. */
252b5132 23
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
85645aed
TG		 39#ifdef OBJ_XCOFF
40#include "coff/xcoff.h"
41#include "libxcoff.h"
42#endif
43
252b5132
RH		 44/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45
46/* Tell the main code what the endianness is. */
47extern int target_big_endian;
48
49/* Whether or not, we've set target_big_endian. */
50static int set_target_endian = 0;
51
52/* Whether to use user friendly register names. */
53#ifndef TARGET_REG_NAMES_P
54#ifdef TE_PE
b34976b6 55#define TARGET_REG_NAMES_P TRUE
252b5132 56#else
b34976b6 57#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 58#endif
59#endif
60
0baf16f2
AM		 61/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
62 HIGHESTA. */
63
64/* #lo(value) denotes the least significant 16 bits of the indicated. */
65#define PPC_LO(v) ((v) & 0xffff)
66
67/* #hi(value) denotes bits 16 through 31 of the indicated value. */
68#define PPC_HI(v) (((v) >> 16) & 0xffff)
69
70/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
71 the indicated value, compensating for #lo() being treated as a
72 signed number. */
15c1449b 73#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 74
75/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 76#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 77
78/* #highera(value) denotes bits 32 through 47 of the indicated value,
79 compensating for #lo() being treated as a signed number. */
15c1449b 80#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 81
82/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 83#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 84
85/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 86 compensating for #lo being treated as a signed number. */
87#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 88
89#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
90
b34976b6 91static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 92
98027b10
AM		 93static void ppc_macro (char *, const struct powerpc_macro *);
94static void ppc_byte (int);
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 97static void ppc_tc (int);
98static void ppc_machine (int);
0baf16f2 99#endif
252b5132
RH		 100
101#ifdef OBJ_XCOFF
98027b10
AM		 102static void ppc_comm (int);
103static void ppc_bb (int);
104static void ppc_bc (int);
105static void ppc_bf (int);
106static void ppc_biei (int);
107static void ppc_bs (int);
108static void ppc_eb (int);
109static void ppc_ec (int);
110static void ppc_ef (int);
111static void ppc_es (int);
112static void ppc_csect (int);
85645aed 113static void ppc_dwsect (int);
98027b10
AM		 114static void ppc_change_csect (symbolS *, offsetT);
115static void ppc_function (int);
116static void ppc_extern (int);
117static void ppc_lglobl (int);
c865e45b 118static void ppc_ref (int);
98027b10
AM		 119static void ppc_section (int);
120static void ppc_named_section (int);
121static void ppc_stabx (int);
122static void ppc_rename (int);
123static void ppc_toc (int);
124static void ppc_xcoff_cons (int);
125static void ppc_vbyte (int);
252b5132
RH		 126#endif
127
128#ifdef OBJ_ELF
98027b10
AM		 129static void ppc_elf_cons (int);
130static void ppc_elf_rdata (int);
131static void ppc_elf_lcomm (int);
252b5132
RH		 132#endif
133
134#ifdef TE_PE
98027b10
AM		 135static void ppc_previous (int);
136static void ppc_pdata (int);
137static void ppc_ydata (int);
138static void ppc_reldata (int);
139static void ppc_rdata (int);
140static void ppc_ualong (int);
141static void ppc_znop (int);
142static void ppc_pe_comm (int);
143static void ppc_pe_section (int);
144static void ppc_pe_function (int);
145static void ppc_pe_tocd (int);
252b5132
RH		 146#endif
147\f
148/* Generic assembler global variables which must be defined by all
149 targets. */
150
151#ifdef OBJ_ELF
152/* This string holds the chars that always start a comment. If the
153 pre-processor is disabled, these aren't very useful. The macro
154 tc_comment_chars points to this. We use this, rather than the
155 usual comment_chars, so that we can switch for Solaris conventions. */
156static const char ppc_solaris_comment_chars[] = "#!";
157static const char ppc_eabi_comment_chars[] = "#";
158
159#ifdef TARGET_SOLARIS_COMMENT
160const char *ppc_comment_chars = ppc_solaris_comment_chars;
161#else
162const char *ppc_comment_chars = ppc_eabi_comment_chars;
163#endif
164#else
165const char comment_chars[] = "#";
166#endif
167
168/* Characters which start a comment at the beginning of a line. */
169const char line_comment_chars[] = "#";
170
171/* Characters which may be used to separate multiple commands on a
172 single line. */
173const char line_separator_chars[] = ";";
174
175/* Characters which are used to indicate an exponent in a floating
176 point number. */
177const char EXP_CHARS[] = "eE";
178
179/* Characters which mean that a number is a floating point constant,
180 as in 0d1.0. */
181const char FLT_CHARS[] = "dD";
5ce8663f 182
5e02f92e 183/* Anything that can start an operand needs to be mentioned here,
ac805826 184 to stop the input scrubber eating whitespace. */
5e02f92e 185const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 186
187/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
188int ppc_cie_data_alignment;
783de163 189
cef4f754
AM		 190/* More than this number of nops in an alignment op gets a branch
191 instead. */
192unsigned long nop_limit = 4;
193
783de163
AM		 194/* The type of processor we are assembling for. This is one or more
195 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 196ppc_cpu_t ppc_cpu = 0;
01efc3af
AM		 197
198/* Flags set on encountering toc relocs. */
199enum {
200 has_large_toc_reloc = 1,
201 has_small_toc_reloc = 2
202} toc_reloc_types;
252b5132
RH		 203\f
204/* The target specific pseudo-ops which we support. */
205
206const pseudo_typeS md_pseudo_table[] =
207{
208 /* Pseudo-ops which must be overridden. */
209 { "byte", ppc_byte, 0 },
210
211#ifdef OBJ_XCOFF
212 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
213 legitimately belong in the obj-*.c file. However, XCOFF is based
214 on COFF, and is only implemented for the RS/6000. We just use
215 obj-coff.c, and add what we need here. */
216 { "comm", ppc_comm, 0 },
217 { "lcomm", ppc_comm, 1 },
218 { "bb", ppc_bb, 0 },
219 { "bc", ppc_bc, 0 },
220 { "bf", ppc_bf, 0 },
221 { "bi", ppc_biei, 0 },
222 { "bs", ppc_bs, 0 },
223 { "csect", ppc_csect, 0 },
85645aed 224 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 225 { "data", ppc_section, 'd' },
226 { "eb", ppc_eb, 0 },
227 { "ec", ppc_ec, 0 },
228 { "ef", ppc_ef, 0 },
229 { "ei", ppc_biei, 1 },
230 { "es", ppc_es, 0 },
231 { "extern", ppc_extern, 0 },
232 { "function", ppc_function, 0 },
233 { "lglobl", ppc_lglobl, 0 },
c865e45b 234 { "ref", ppc_ref, 0 },
252b5132
RH		 235 { "rename", ppc_rename, 0 },
236 { "section", ppc_named_section, 0 },
237 { "stabx", ppc_stabx, 0 },
238 { "text", ppc_section, 't' },
239 { "toc", ppc_toc, 0 },
240 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 241 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 242 { "word", ppc_xcoff_cons, 1 },
243 { "short", ppc_xcoff_cons, 1 },
244 { "vbyte", ppc_vbyte, 0 },
245#endif
246
247#ifdef OBJ_ELF
0baf16f2
AM		 248 { "llong", ppc_elf_cons, 8 },
249 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 250 { "long", ppc_elf_cons, 4 },
251 { "word", ppc_elf_cons, 2 },
252 { "short", ppc_elf_cons, 2 },
253 { "rdata", ppc_elf_rdata, 0 },
254 { "rodata", ppc_elf_rdata, 0 },
255 { "lcomm", ppc_elf_lcomm, 0 },
256#endif
257
258#ifdef TE_PE
99a814a1 259 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 260 { "previous", ppc_previous, 0 },
261 { "pdata", ppc_pdata, 0 },
262 { "ydata", ppc_ydata, 0 },
263 { "reldata", ppc_reldata, 0 },
264 { "rdata", ppc_rdata, 0 },
265 { "ualong", ppc_ualong, 0 },
266 { "znop", ppc_znop, 0 },
267 { "comm", ppc_pe_comm, 0 },
268 { "lcomm", ppc_pe_comm, 1 },
269 { "section", ppc_pe_section, 0 },
270 { "function", ppc_pe_function,0 },
271 { "tocd", ppc_pe_tocd, 0 },
272#endif
273
0baf16f2 274#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 275 { "tc", ppc_tc, 0 },
0baf16f2
AM		 276 { "machine", ppc_machine, 0 },
277#endif
252b5132
RH		 278
279 { NULL, NULL, 0 }
280};
281
282\f
99a814a1
AM		 283/* Predefined register names if -mregnames (or default for Windows NT).
284 In general, there are lots of them, in an attempt to be compatible
285 with a number of other Windows NT assemblers. */
252b5132
RH		 286
287/* Structure to hold information about predefined registers. */
288struct pd_reg
289 {
290 char *name;
291 int value;
292 };
293
294/* List of registers that are pre-defined:
295
296 Each general register has predefined names of the form:
297 1. r<reg_num> which has the value <reg_num>.
298 2. r.<reg_num> which has the value <reg_num>.
299
252b5132
RH		 300 Each floating point register has predefined names of the form:
301 1. f<reg_num> which has the value <reg_num>.
302 2. f.<reg_num> which has the value <reg_num>.
303
7a899fff
C		 304 Each vector unit register has predefined names of the form:
305 1. v<reg_num> which has the value <reg_num>.
306 2. v.<reg_num> which has the value <reg_num>.
307
252b5132
RH		 308 Each condition register has predefined names of the form:
309 1. cr<reg_num> which has the value <reg_num>.
310 2. cr.<reg_num> which has the value <reg_num>.
311
312 There are individual registers as well:
313 sp or r.sp has the value 1
314 rtoc or r.toc has the value 2
315 fpscr has the value 0
316 xer has the value 1
317 lr has the value 8
318 ctr has the value 9
319 pmr has the value 0
320 dar has the value 19
321 dsisr has the value 18
322 dec has the value 22
323 sdr1 has the value 25
324 srr0 has the value 26
325 srr1 has the value 27
326
81d4177b 327 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 328
329static const struct pd_reg pre_defined_registers[] =
330{
331 { "cr.0", 0 }, /* Condition Registers */
332 { "cr.1", 1 },
333 { "cr.2", 2 },
334 { "cr.3", 3 },
335 { "cr.4", 4 },
336 { "cr.5", 5 },
337 { "cr.6", 6 },
338 { "cr.7", 7 },
339
340 { "cr0", 0 },
341 { "cr1", 1 },
342 { "cr2", 2 },
343 { "cr3", 3 },
344 { "cr4", 4 },
345 { "cr5", 5 },
346 { "cr6", 6 },
347 { "cr7", 7 },
348
349 { "ctr", 9 },
350
351 { "dar", 19 }, /* Data Access Register */
352 { "dec", 22 }, /* Decrementer */
353 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
354
355 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 356 { "f.1", 1 },
357 { "f.10", 10 },
358 { "f.11", 11 },
359 { "f.12", 12 },
360 { "f.13", 13 },
361 { "f.14", 14 },
362 { "f.15", 15 },
363 { "f.16", 16 },
364 { "f.17", 17 },
365 { "f.18", 18 },
366 { "f.19", 19 },
367 { "f.2", 2 },
368 { "f.20", 20 },
369 { "f.21", 21 },
370 { "f.22", 22 },
371 { "f.23", 23 },
372 { "f.24", 24 },
373 { "f.25", 25 },
374 { "f.26", 26 },
375 { "f.27", 27 },
376 { "f.28", 28 },
377 { "f.29", 29 },
378 { "f.3", 3 },
252b5132
RH		 379 { "f.30", 30 },
380 { "f.31", 31 },
066be9f7
PB		 381
382 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
383 { "f.33", 33 },
384 { "f.34", 34 },
385 { "f.35", 35 },
386 { "f.36", 36 },
387 { "f.37", 37 },
388 { "f.38", 38 },
389 { "f.39", 39 },
81d4177b 390 { "f.4", 4 },
066be9f7
PB		 391 { "f.40", 40 },
392 { "f.41", 41 },
393 { "f.42", 42 },
394 { "f.43", 43 },
395 { "f.44", 44 },
396 { "f.45", 45 },
397 { "f.46", 46 },
398 { "f.47", 47 },
399 { "f.48", 48 },
400 { "f.49", 49 },
81d4177b 401 { "f.5", 5 },
066be9f7
PB		 402 { "f.50", 50 },
403 { "f.51", 51 },
404 { "f.52", 52 },
405 { "f.53", 53 },
406 { "f.54", 54 },
407 { "f.55", 55 },
408 { "f.56", 56 },
409 { "f.57", 57 },
410 { "f.58", 58 },
411 { "f.59", 59 },
81d4177b 412 { "f.6", 6 },
066be9f7
PB		 413 { "f.60", 60 },
414 { "f.61", 61 },
415 { "f.62", 62 },
416 { "f.63", 63 },
81d4177b
KH		 417 { "f.7", 7 },
418 { "f.8", 8 },
419 { "f.9", 9 },
420
421 { "f0", 0 },
422 { "f1", 1 },
423 { "f10", 10 },
424 { "f11", 11 },
425 { "f12", 12 },
426 { "f13", 13 },
427 { "f14", 14 },
428 { "f15", 15 },
429 { "f16", 16 },
430 { "f17", 17 },
431 { "f18", 18 },
432 { "f19", 19 },
433 { "f2", 2 },
434 { "f20", 20 },
435 { "f21", 21 },
436 { "f22", 22 },
437 { "f23", 23 },
438 { "f24", 24 },
439 { "f25", 25 },
440 { "f26", 26 },
441 { "f27", 27 },
442 { "f28", 28 },
443 { "f29", 29 },
444 { "f3", 3 },
252b5132
RH		 445 { "f30", 30 },
446 { "f31", 31 },
066be9f7
PB		 447
448 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
449 { "f33", 33 },
450 { "f34", 34 },
451 { "f35", 35 },
452 { "f36", 36 },
453 { "f37", 37 },
454 { "f38", 38 },
455 { "f39", 39 },
81d4177b 456 { "f4", 4 },
066be9f7
PB		 457 { "f40", 40 },
458 { "f41", 41 },
459 { "f42", 42 },
460 { "f43", 43 },
461 { "f44", 44 },
462 { "f45", 45 },
463 { "f46", 46 },
464 { "f47", 47 },
465 { "f48", 48 },
466 { "f49", 49 },
81d4177b 467 { "f5", 5 },
066be9f7
PB		 468 { "f50", 50 },
469 { "f51", 51 },
470 { "f52", 52 },
471 { "f53", 53 },
472 { "f54", 54 },
473 { "f55", 55 },
474 { "f56", 56 },
475 { "f57", 57 },
476 { "f58", 58 },
477 { "f59", 59 },
81d4177b 478 { "f6", 6 },
066be9f7
PB		 479 { "f60", 60 },
480 { "f61", 61 },
481 { "f62", 62 },
482 { "f63", 63 },
81d4177b
KH		 483 { "f7", 7 },
484 { "f8", 8 },
485 { "f9", 9 },
252b5132
RH		 486
487 { "fpscr", 0 },
488
c3d65c1c
BE		 489 /* Quantization registers used with pair single instructions. */
490 { "gqr.0", 0 },
491 { "gqr.1", 1 },
492 { "gqr.2", 2 },
493 { "gqr.3", 3 },
494 { "gqr.4", 4 },
495 { "gqr.5", 5 },
496 { "gqr.6", 6 },
497 { "gqr.7", 7 },
498 { "gqr0", 0 },
499 { "gqr1", 1 },
500 { "gqr2", 2 },
501 { "gqr3", 3 },
502 { "gqr4", 4 },
503 { "gqr5", 5 },
504 { "gqr6", 6 },
505 { "gqr7", 7 },
506
252b5132
RH		 507 { "lr", 8 }, /* Link Register */
508
509 { "pmr", 0 },
510
511 { "r.0", 0 }, /* General Purpose Registers */
512 { "r.1", 1 },
513 { "r.10", 10 },
514 { "r.11", 11 },
515 { "r.12", 12 },
516 { "r.13", 13 },
517 { "r.14", 14 },
518 { "r.15", 15 },
519 { "r.16", 16 },
520 { "r.17", 17 },
521 { "r.18", 18 },
522 { "r.19", 19 },
523 { "r.2", 2 },
524 { "r.20", 20 },
525 { "r.21", 21 },
526 { "r.22", 22 },
527 { "r.23", 23 },
528 { "r.24", 24 },
529 { "r.25", 25 },
530 { "r.26", 26 },
531 { "r.27", 27 },
532 { "r.28", 28 },
533 { "r.29", 29 },
534 { "r.3", 3 },
535 { "r.30", 30 },
536 { "r.31", 31 },
537 { "r.4", 4 },
538 { "r.5", 5 },
539 { "r.6", 6 },
540 { "r.7", 7 },
541 { "r.8", 8 },
542 { "r.9", 9 },
543
544 { "r.sp", 1 }, /* Stack Pointer */
545
546 { "r.toc", 2 }, /* Pointer to the table of contents */
547
548 { "r0", 0 }, /* More general purpose registers */
549 { "r1", 1 },
550 { "r10", 10 },
551 { "r11", 11 },
552 { "r12", 12 },
553 { "r13", 13 },
554 { "r14", 14 },
555 { "r15", 15 },
556 { "r16", 16 },
557 { "r17", 17 },
558 { "r18", 18 },
559 { "r19", 19 },
560 { "r2", 2 },
561 { "r20", 20 },
562 { "r21", 21 },
563 { "r22", 22 },
564 { "r23", 23 },
565 { "r24", 24 },
566 { "r25", 25 },
567 { "r26", 26 },
568 { "r27", 27 },
569 { "r28", 28 },
570 { "r29", 29 },
571 { "r3", 3 },
572 { "r30", 30 },
573 { "r31", 31 },
574 { "r4", 4 },
575 { "r5", 5 },
576 { "r6", 6 },
577 { "r7", 7 },
578 { "r8", 8 },
579 { "r9", 9 },
580
581 { "rtoc", 2 }, /* Table of contents */
582
583 { "sdr1", 25 }, /* Storage Description Register 1 */
584
585 { "sp", 1 },
586
587 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
588 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 589
066be9f7 590 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 591 { "v.1", 1 },
592 { "v.10", 10 },
593 { "v.11", 11 },
594 { "v.12", 12 },
595 { "v.13", 13 },
596 { "v.14", 14 },
597 { "v.15", 15 },
598 { "v.16", 16 },
599 { "v.17", 17 },
600 { "v.18", 18 },
601 { "v.19", 19 },
602 { "v.2", 2 },
603 { "v.20", 20 },
604 { "v.21", 21 },
605 { "v.22", 22 },
606 { "v.23", 23 },
607 { "v.24", 24 },
608 { "v.25", 25 },
609 { "v.26", 26 },
610 { "v.27", 27 },
611 { "v.28", 28 },
612 { "v.29", 29 },
613 { "v.3", 3 },
7a899fff
C		 614 { "v.30", 30 },
615 { "v.31", 31 },
81d4177b
KH		 616 { "v.4", 4 },
617 { "v.5", 5 },
618 { "v.6", 6 },
619 { "v.7", 7 },
620 { "v.8", 8 },
621 { "v.9", 9 },
7a899fff
C		 622
623 { "v0", 0 },
81d4177b
KH		 624 { "v1", 1 },
625 { "v10", 10 },
626 { "v11", 11 },
627 { "v12", 12 },
628 { "v13", 13 },
629 { "v14", 14 },
630 { "v15", 15 },
631 { "v16", 16 },
632 { "v17", 17 },
633 { "v18", 18 },
634 { "v19", 19 },
635 { "v2", 2 },
636 { "v20", 20 },
637 { "v21", 21 },
638 { "v22", 22 },
639 { "v23", 23 },
640 { "v24", 24 },
641 { "v25", 25 },
642 { "v26", 26 },
643 { "v27", 27 },
644 { "v28", 28 },
645 { "v29", 29 },
646 { "v3", 3 },
7a899fff
C		 647 { "v30", 30 },
648 { "v31", 31 },
81d4177b
KH		 649 { "v4", 4 },
650 { "v5", 5 },
651 { "v6", 6 },
652 { "v7", 7 },
653 { "v8", 8 },
7a899fff 654 { "v9", 9 },
252b5132 655
066be9f7
PB		 656 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
657 { "vs.1", 1 },
658 { "vs.10", 10 },
659 { "vs.11", 11 },
660 { "vs.12", 12 },
661 { "vs.13", 13 },
662 { "vs.14", 14 },
663 { "vs.15", 15 },
664 { "vs.16", 16 },
665 { "vs.17", 17 },
666 { "vs.18", 18 },
667 { "vs.19", 19 },
668 { "vs.2", 2 },
669 { "vs.20", 20 },
670 { "vs.21", 21 },
671 { "vs.22", 22 },
672 { "vs.23", 23 },
673 { "vs.24", 24 },
674 { "vs.25", 25 },
675 { "vs.26", 26 },
676 { "vs.27", 27 },
677 { "vs.28", 28 },
678 { "vs.29", 29 },
679 { "vs.3", 3 },
680 { "vs.30", 30 },
681 { "vs.31", 31 },
682 { "vs.32", 32 },
683 { "vs.33", 33 },
684 { "vs.34", 34 },
685 { "vs.35", 35 },
686 { "vs.36", 36 },
687 { "vs.37", 37 },
688 { "vs.38", 38 },
689 { "vs.39", 39 },
690 { "vs.4", 4 },
691 { "vs.40", 40 },
692 { "vs.41", 41 },
693 { "vs.42", 42 },
694 { "vs.43", 43 },
695 { "vs.44", 44 },
696 { "vs.45", 45 },
697 { "vs.46", 46 },
698 { "vs.47", 47 },
699 { "vs.48", 48 },
700 { "vs.49", 49 },
701 { "vs.5", 5 },
702 { "vs.50", 50 },
703 { "vs.51", 51 },
704 { "vs.52", 52 },
705 { "vs.53", 53 },
706 { "vs.54", 54 },
707 { "vs.55", 55 },
708 { "vs.56", 56 },
709 { "vs.57", 57 },
710 { "vs.58", 58 },
711 { "vs.59", 59 },
712 { "vs.6", 6 },
713 { "vs.60", 60 },
714 { "vs.61", 61 },
715 { "vs.62", 62 },
716 { "vs.63", 63 },
717 { "vs.7", 7 },
718 { "vs.8", 8 },
719 { "vs.9", 9 },
720
721 { "vs0", 0 },
722 { "vs1", 1 },
723 { "vs10", 10 },
724 { "vs11", 11 },
725 { "vs12", 12 },
726 { "vs13", 13 },
727 { "vs14", 14 },
728 { "vs15", 15 },
729 { "vs16", 16 },
730 { "vs17", 17 },
731 { "vs18", 18 },
732 { "vs19", 19 },
733 { "vs2", 2 },
734 { "vs20", 20 },
735 { "vs21", 21 },
736 { "vs22", 22 },
737 { "vs23", 23 },
738 { "vs24", 24 },
739 { "vs25", 25 },
740 { "vs26", 26 },
741 { "vs27", 27 },
742 { "vs28", 28 },
743 { "vs29", 29 },
744 { "vs3", 3 },
745 { "vs30", 30 },
746 { "vs31", 31 },
747 { "vs32", 32 },
748 { "vs33", 33 },
749 { "vs34", 34 },
750 { "vs35", 35 },
751 { "vs36", 36 },
752 { "vs37", 37 },
753 { "vs38", 38 },
754 { "vs39", 39 },
755 { "vs4", 4 },
756 { "vs40", 40 },
757 { "vs41", 41 },
758 { "vs42", 42 },
759 { "vs43", 43 },
760 { "vs44", 44 },
761 { "vs45", 45 },
762 { "vs46", 46 },
763 { "vs47", 47 },
764 { "vs48", 48 },
765 { "vs49", 49 },
766 { "vs5", 5 },
767 { "vs50", 50 },
768 { "vs51", 51 },
769 { "vs52", 52 },
770 { "vs53", 53 },
771 { "vs54", 54 },
772 { "vs55", 55 },
773 { "vs56", 56 },
774 { "vs57", 57 },
775 { "vs58", 58 },
776 { "vs59", 59 },
777 { "vs6", 6 },
778 { "vs60", 60 },
779 { "vs61", 61 },
780 { "vs62", 62 },
781 { "vs63", 63 },
782 { "vs7", 7 },
783 { "vs8", 8 },
784 { "vs9", 9 },
785
252b5132
RH		 786 { "xer", 1 },
787
788};
789
bc805888 790#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 791
792/* Given NAME, find the register number associated with that name, return
793 the integer value associated with the given name or -1 on failure. */
794
252b5132 795static int
98027b10 796reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 797{
798 int middle, low, high;
799 int cmp;
800
801 low = 0;
802 high = regcount - 1;
803
804 do
805 {
806 middle = (low + high) / 2;
807 cmp = strcasecmp (name, regs[middle].name);
808 if (cmp < 0)
809 high = middle - 1;
810 else if (cmp > 0)
811 low = middle + 1;
812 else
813 return regs[middle].value;
814 }
815 while (low <= high);
816
817 return -1;
818}
819
820/*
99a814a1 821 * Summary of register_name.
252b5132
RH		 822 *
823 * in: Input_line_pointer points to 1st char of operand.
824 *
825 * out: A expressionS.
826 * The operand may have been a register: in this case, X_op == O_register,
827 * X_add_number is set to the register number, and truth is returned.
828 * Input_line_pointer->(next non-blank) char after operand, or is in its
829 * original state.
830 */
831
b34976b6 832static bfd_boolean
98027b10 833register_name (expressionS *expressionP)
252b5132
RH		 834{
835 int reg_number;
836 char *name;
837 char *start;
838 char c;
839
99a814a1 840 /* Find the spelling of the operand. */
252b5132 841 start = name = input_line_pointer;
3882b010 842 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 843 name = ++input_line_pointer;
844
3882b010 845 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 846 return FALSE;
252b5132
RH		 847
848 c = get_symbol_end ();
849 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
850
468cced8
AM		 851 /* Put back the delimiting char. */
852 *input_line_pointer = c;
853
99a814a1 854 /* Look to see if it's in the register table. */
81d4177b 855 if (reg_number >= 0)
252b5132
RH		 856 {
857 expressionP->X_op = O_register;
858 expressionP->X_add_number = reg_number;
81d4177b 859
99a814a1 860 /* Make the rest nice. */
252b5132
RH		 861 expressionP->X_add_symbol = NULL;
862 expressionP->X_op_symbol = NULL;
b34976b6 863 return TRUE;
252b5132 864 }
468cced8
AM		 865
866 /* Reset the line as if we had not done anything. */
867 input_line_pointer = start;
b34976b6 868 return FALSE;
252b5132
RH		 869}
870\f
871/* This function is called for each symbol seen in an expression. It
872 handles the special parsing which PowerPC assemblers are supposed
873 to use for condition codes. */
874
875/* Whether to do the special parsing. */
b34976b6 876static bfd_boolean cr_operand;
252b5132
RH		 877
878/* Names to recognize in a condition code. This table is sorted. */
879static const struct pd_reg cr_names[] =
880{
881 { "cr0", 0 },
882 { "cr1", 1 },
883 { "cr2", 2 },
884 { "cr3", 3 },
885 { "cr4", 4 },
886 { "cr5", 5 },
887 { "cr6", 6 },
888 { "cr7", 7 },
889 { "eq", 2 },
890 { "gt", 1 },
891 { "lt", 0 },
892 { "so", 3 },
893 { "un", 3 }
894};
895
896/* Parsing function. This returns non-zero if it recognized an
897 expression. */
898
899int
91d6fa6a 900ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 901{
902 int val;
903
904 if (! cr_operand)
905 return 0;
906
13abbae3
AM		 907 if (*name == '%')
908 ++name;
252b5132
RH		 909 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
910 name);
911 if (val < 0)
912 return 0;
913
91d6fa6a
NC		 914 exp->X_op = O_constant;
915 exp->X_add_number = val;
252b5132
RH		 916
917 return 1;
918}
919\f
920/* Local variables. */
921
2b3c4602
AM		 922/* Whether to target xcoff64/elf64. */
923static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 924
252b5132
RH		 925/* Opcode hash table. */
926static struct hash_control *ppc_hash;
927
928/* Macro hash table. */
929static struct hash_control *ppc_macro_hash;
930
931#ifdef OBJ_ELF
99a814a1 932/* What type of shared library support to use. */
5d6f4f16 933static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 934
99a814a1 935/* Flags to set in the elf header. */
252b5132
RH		 936static flagword ppc_flags = 0;
937
938/* Whether this is Solaris or not. */
939#ifdef TARGET_SOLARIS_COMMENT
b34976b6 940#define SOLARIS_P TRUE
252b5132 941#else
b34976b6 942#define SOLARIS_P FALSE
252b5132
RH		 943#endif
944
b34976b6 945static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 946#endif
947
948#ifdef OBJ_XCOFF
949
950/* The RS/6000 assembler uses the .csect pseudo-op to generate code
951 using a bunch of different sections. These assembler sections,
952 however, are all encompassed within the .text or .data sections of
953 the final output file. We handle this by using different
954 subsegments within these main segments. */
955
956/* Next subsegment to allocate within the .text segment. */
957static subsegT ppc_text_subsegment = 2;
958
959/* Linked list of csects in the text section. */
960static symbolS *ppc_text_csects;
961
962/* Next subsegment to allocate within the .data segment. */
963static subsegT ppc_data_subsegment = 2;
964
965/* Linked list of csects in the data section. */
966static symbolS *ppc_data_csects;
967
968/* The current csect. */
969static symbolS *ppc_current_csect;
970
971/* The RS/6000 assembler uses a TOC which holds addresses of functions
972 and variables. Symbols are put in the TOC with the .tc pseudo-op.
973 A special relocation is used when accessing TOC entries. We handle
974 the TOC as a subsegment within the .data segment. We set it up if
975 we see a .toc pseudo-op, and save the csect symbol here. */
976static symbolS *ppc_toc_csect;
977
978/* The first frag in the TOC subsegment. */
979static fragS *ppc_toc_frag;
980
981/* The first frag in the first subsegment after the TOC in the .data
982 segment. NULL if there are no subsegments after the TOC. */
983static fragS *ppc_after_toc_frag;
984
985/* The current static block. */
986static symbolS *ppc_current_block;
987
988/* The COFF debugging section; set by md_begin. This is not the
989 .debug section, but is instead the secret BFD section which will
990 cause BFD to set the section number of a symbol to N_DEBUG. */
991static asection *ppc_coff_debug_section;
992
85645aed
TG		 993/* Structure to set the length field of the dwarf sections. */
994struct dw_subsection {
995 /* Subsections are simply linked. */
996 struct dw_subsection *link;
997
998 /* The subsection number. */
999 subsegT subseg;
1000
1001 /* Expression to compute the length of the section. */
1002 expressionS end_exp;
1003};
1004
1005static struct dw_section {
1006 /* Corresponding section. */
1007 segT sect;
1008
1009 /* Simply linked list of subsections with a label. */
1010 struct dw_subsection *list_subseg;
1011
1012 /* The anonymous subsection. */
1013 struct dw_subsection *anon_subseg;
1014} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1015#endif /* OBJ_XCOFF */
1016
1017#ifdef TE_PE
1018
1019/* Various sections that we need for PE coff support. */
1020static segT ydata_section;
1021static segT pdata_section;
1022static segT reldata_section;
1023static segT rdata_section;
1024static segT tocdata_section;
1025
81d4177b 1026/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1027static segT ppc_previous_section;
1028static segT ppc_current_section;
1029
1030#endif /* TE_PE */
1031
1032#ifdef OBJ_ELF
1033symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1034#define PPC_APUINFO_ISEL 0x40
1035#define PPC_APUINFO_PMR 0x41
1036#define PPC_APUINFO_RFMCI 0x42
1037#define PPC_APUINFO_CACHELCK 0x43
1038#define PPC_APUINFO_SPE 0x100
1039#define PPC_APUINFO_EFS 0x101
1040#define PPC_APUINFO_BRLOCK 0x102
1041
b34976b6
AM		 1042/*
1043 * We keep a list of APUinfo
6a0c61b7
EZ		 1044 */
1045unsigned long *ppc_apuinfo_list;
1046unsigned int ppc_apuinfo_num;
1047unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1048#endif /* OBJ_ELF */
1049\f
1050#ifdef OBJ_ELF
15c1449b 1051const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1052#else
15c1449b 1053const char *const md_shortopts = "um:";
252b5132 1054#endif
cef4f754 1055#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1056const struct option md_longopts[] = {
cef4f754 1057 {"nops", required_argument, NULL, OPTION_NOPS},
252b5132
RH		 1058 {NULL, no_argument, NULL, 0}
1059};
15c1449b 1060const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1061
1062int
98027b10 1063md_parse_option (int c, char *arg)
252b5132 1064{
69fe9ce5
AM		 1065 ppc_cpu_t new_cpu;
1066
252b5132
RH		 1067 switch (c)
1068 {
1069 case 'u':
1070 /* -u means that any undefined symbols should be treated as
1071 external, which is the default for gas anyhow. */
1072 break;
1073
1074#ifdef OBJ_ELF
1075 case 'l':
1076 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1077 sake, recognize -be also. */
252b5132
RH		 1078 if (strcmp (arg, "e") == 0)
1079 {
1080 target_big_endian = 0;
1081 set_target_endian = 1;
1082 }
1083 else
1084 return 0;
1085
1086 break;
1087
1088 case 'b':
1089 if (strcmp (arg, "e") == 0)
1090 {
1091 target_big_endian = 1;
1092 set_target_endian = 1;
1093 }
1094 else
1095 return 0;
1096
1097 break;
1098
1099 case 'K':
99a814a1 1100 /* Recognize -K PIC. */
252b5132
RH		 1101 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1102 {
1103 shlib = SHLIB_PIC;
1104 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1105 }
1106 else
1107 return 0;
1108
1109 break;
1110#endif
1111
7f6d05e8
CP		 1112 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1113 case 'a':
1114 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1115 {
1116#ifdef BFD64
1117 ppc_obj64 = 1;
1118#else
1119 as_fatal (_("%s unsupported"), "-a64");
1120#endif
1121 }
7f6d05e8 1122 else if (strcmp (arg, "32") == 0)
2b3c4602 1123 ppc_obj64 = 0;
7f6d05e8
CP		 1124 else
1125 return 0;
1126 break;
81d4177b 1127
252b5132 1128 case 'm':
69fe9ce5
AM		 1129 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1130 ppc_cpu = new_cpu;
252b5132
RH		 1131
1132 else if (strcmp (arg, "regnames") == 0)
b34976b6 1133 reg_names_p = TRUE;
252b5132
RH		 1134
1135 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1136 reg_names_p = FALSE;
252b5132
RH		 1137
1138#ifdef OBJ_ELF
99a814a1
AM		 1139 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1140 that require relocation. */
252b5132
RH		 1141 else if (strcmp (arg, "relocatable") == 0)
1142 {
5d6f4f16 1143 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1144 ppc_flags |= EF_PPC_RELOCATABLE;
1145 }
1146
1147 else if (strcmp (arg, "relocatable-lib") == 0)
1148 {
5d6f4f16 1149 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1150 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1151 }
1152
99a814a1 1153 /* -memb, set embedded bit. */
252b5132
RH		 1154 else if (strcmp (arg, "emb") == 0)
1155 ppc_flags |= EF_PPC_EMB;
1156
cc643b88 1157 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1158 else if (strcmp (arg, "little") == 0
1159 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1160 {
1161 target_big_endian = 0;
1162 set_target_endian = 1;
1163 }
1164
1165 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1166 {
1167 target_big_endian = 1;
1168 set_target_endian = 1;
1169 }
1170
1171 else if (strcmp (arg, "solaris") == 0)
1172 {
b34976b6 1173 msolaris = TRUE;
252b5132
RH		 1174 ppc_comment_chars = ppc_solaris_comment_chars;
1175 }
1176
1177 else if (strcmp (arg, "no-solaris") == 0)
1178 {
b34976b6 1179 msolaris = FALSE;
252b5132
RH		 1180 ppc_comment_chars = ppc_eabi_comment_chars;
1181 }
1182#endif
1183 else
1184 {
1185 as_bad (_("invalid switch -m%s"), arg);
1186 return 0;
1187 }
1188 break;
1189
1190#ifdef OBJ_ELF
1191 /* -V: SVR4 argument to print version ID. */
1192 case 'V':
1193 print_version_id ();
1194 break;
1195
1196 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1197 should be emitted or not. FIXME: Not implemented. */
1198 case 'Q':
1199 break;
1200
1201 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1202 rather than .stabs.excl, which is ignored by the linker.
1203 FIXME: Not implemented. */
1204 case 's':
1205 if (arg)
1206 return 0;
1207
1208 break;
1209#endif
1210
cef4f754
AM		 1211 case OPTION_NOPS:
1212 {
1213 char *end;
1214 nop_limit = strtoul (optarg, &end, 0);
1215 if (*end)
1216 as_bad (_("--nops needs a numeric argument"));
1217 }
1218 break;
85645aed 1219
252b5132
RH		 1220 default:
1221 return 0;
1222 }
1223
1224 return 1;
1225}
1226
1227void
98027b10 1228md_show_usage (FILE *stream)
252b5132 1229{
bc805888 1230 fprintf (stream, _("\
252b5132 1231PowerPC options:\n\
ce3d2015
AM		 1232-a32 generate ELF32/XCOFF32\n\
1233-a64 generate ELF64/XCOFF64\n\
1234-u ignored\n\
1235-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1236-mpwr generate code for POWER (RIOS1)\n\
1237-m601 generate code for PowerPC 601\n\
418c1742 1238-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1239 generate code for PowerPC 603/604\n\
1240-m403 generate code for PowerPC 403\n\
1241-m405 generate code for PowerPC 405\n\
1242-m440 generate code for PowerPC 440\n\
1243-m464 generate code for PowerPC 464\n\
1244-m476 generate code for PowerPC 476\n\
f5c120c5 1245-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1246 generate code for PowerPC 7400/7410/7450/7455\n\
1247-m750cl generate code for PowerPC 750cl\n"));
df12615d 1248 fprintf (stream, _("\
ce3d2015
AM		 1249-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1250-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1251-mbooke generate code for 32-bit PowerPC BookE\n\
1252-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1253-mpower4, -mpwr4 generate code for Power4 architecture\n\
1254-mpower5, -mpwr5, -mpwr5x\n\
1255 generate code for Power5 architecture\n\
1256-mpower6, -mpwr6 generate code for Power6 architecture\n\
1257-mpower7, -mpwr7 generate code for Power7 architecture\n\
ce3d2015
AM		 1258-mcell generate code for Cell Broadband Engine architecture\n\
1259-mcom generate code Power/PowerPC common instructions\n\
1260-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1261 fprintf (stream, _("\
ce3d2015
AM		 1262-maltivec generate code for AltiVec\n\
1263-mvsx generate code for Vector-Scalar (VSX) instructions\n\
1264-me300 generate code for PowerPC e300 family\n\
1265-me500, -me500x2 generate code for Motorola e500 core complex\n\
1266-me500mc, generate code for Freescale e500mc core complex\n\
1267-me500mc64, generate code for Freescale e500mc64 core complex\n\
aea77599
AM		 1268-me5500, generate code for Freescale e5500 core complex\n\
1269-me6500, generate code for Freescale e6500 core complex\n\
ce3d2015
AM		 1270-mspe generate code for Motorola SPE instructions\n\
1271-mtitan generate code for AppliedMicro Titan core complex\n\
1272-mregnames Allow symbolic names for registers\n\
1273-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1274#ifdef OBJ_ELF
bc805888 1275 fprintf (stream, _("\
ce3d2015
AM		 1276-mrelocatable support for GCC's -mrelocatble option\n\
1277-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1278-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1279-mlittle, -mlittle-endian, -le\n\
ce3d2015 1280 generate code for a little endian machine\n\
b8b738ac 1281-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1282 generate code for a big endian machine\n\
1283-msolaris generate code for Solaris\n\
1284-mno-solaris do not generate code for Solaris\n\
b8b738ac 1285-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1286-V print assembler version number\n\
1287-Qy, -Qn ignored\n"));
252b5132 1288#endif
cef4f754
AM		 1289 fprintf (stream, _("\
1290-nops=count when aligning, more than COUNT nops uses a branch\n"));
252b5132
RH		 1291}
1292\f
1293/* Set ppc_cpu if it is not already set. */
1294
1295static void
98027b10 1296ppc_set_cpu (void)
252b5132
RH		 1297{
1298 const char *default_os = TARGET_OS;
1299 const char *default_cpu = TARGET_CPU;
1300
7102e95e 1301 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1302 {
2a98c3a6 1303 if (ppc_obj64)
bdc70b4a 1304 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1305 else if (strncmp (default_os, "aix", 3) == 0
1306 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1307 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1308 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1309 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1310 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1311 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1312 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1313 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1314 else
99a814a1
AM		 1315 as_fatal (_("Unknown default cpu = %s, os = %s"),
1316 default_cpu, default_os);
252b5132
RH		 1317 }
1318}
1319
9232bbb0
AM		 1320/* Figure out the BFD architecture to use. This function and ppc_mach
1321 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1322
1323enum bfd_architecture
98027b10 1324ppc_arch (void)
252b5132
RH		 1325{
1326 const char *default_cpu = TARGET_CPU;
1327 ppc_set_cpu ();
1328
1329 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1330 return bfd_arch_powerpc;
1331 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1332 return bfd_arch_rs6000;
1333 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1334 {
1335 if (strcmp (default_cpu, "rs6000") == 0)
1336 return bfd_arch_rs6000;
0baf16f2 1337 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1338 return bfd_arch_powerpc;
1339 }
1340
1341 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1342 return bfd_arch_unknown;
1343}
1344
7f6d05e8 1345unsigned long
98027b10 1346ppc_mach (void)
7f6d05e8 1347{
2a98c3a6
AM		 1348 if (ppc_obj64)
1349 return bfd_mach_ppc64;
1350 else if (ppc_arch () == bfd_arch_rs6000)
1351 return bfd_mach_rs6k;
ce3d2015
AM		 1352 else if (ppc_cpu & PPC_OPCODE_TITAN)
1353 return bfd_mach_ppc_titan;
2a98c3a6
AM		 1354 else
1355 return bfd_mach_ppc;
7f6d05e8
CP		 1356}
1357
81d4177b 1358extern char*
98027b10 1359ppc_target_format (void)
7f6d05e8
CP		 1360{
1361#ifdef OBJ_COFF
1362#ifdef TE_PE
99a814a1 1363 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1364#elif TE_POWERMAC
0baf16f2 1365 return "xcoff-powermac";
7f6d05e8 1366#else
eb1e0e80 1367# ifdef TE_AIX5
edc1d652 1368 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1369# else
edc1d652 1370 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1371# endif
7f6d05e8 1372#endif
7f6d05e8
CP		 1373#endif
1374#ifdef OBJ_ELF
edc1d652
AM		 1375# ifdef TE_FreeBSD
1376 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1377# elif defined (TE_VXWORKS)
9d8504b1
PB		 1378 return "elf32-powerpc-vxworks";
1379# else
0baf16f2 1380 return (target_big_endian
2b3c4602
AM		 1381 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1382 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1383# endif
7f6d05e8
CP		 1384#endif
1385}
1386
69c040df
AM		 1387/* Insert opcodes and macros into hash tables. Called at startup and
1388 for .cpu pseudo. */
252b5132 1389
69c040df
AM		 1390static void
1391ppc_setup_opcodes (void)
252b5132 1392{
98027b10 1393 const struct powerpc_opcode *op;
252b5132
RH		 1394 const struct powerpc_opcode *op_end;
1395 const struct powerpc_macro *macro;
1396 const struct powerpc_macro *macro_end;
b84bf58a 1397 bfd_boolean bad_insn = FALSE;
252b5132 1398
69c040df
AM		 1399 if (ppc_hash != NULL)
1400 hash_die (ppc_hash);
1401 if (ppc_macro_hash != NULL)
1402 hash_die (ppc_macro_hash);
252b5132
RH		 1403
1404 /* Insert the opcodes into a hash table. */
1405 ppc_hash = hash_new ();
1406
c43a438d 1407 if (ENABLE_CHECKING)
b84bf58a 1408 {
c43a438d 1409 unsigned int i;
b84bf58a 1410
c43a438d
AM		 1411 /* Check operand masks. Code here and in the disassembler assumes
1412 all the 1's in the mask are contiguous. */
1413 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1414 {
c43a438d
AM		 1415 unsigned long mask = powerpc_operands[i].bitm;
1416 unsigned long right_bit;
1417 unsigned int j;
1418
1419 right_bit = mask & -mask;
1420 mask += right_bit;
1421 right_bit = mask & -mask;
1422 if (mask != right_bit)
1423 {
1424 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1425 bad_insn = TRUE;
1426 }
1427 for (j = i + 1; j < num_powerpc_operands; ++j)
1428 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1429 sizeof (powerpc_operands[0])) == 0)
1430 {
1431 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1432 j, i);
1433 bad_insn = TRUE;
1434 }
b84bf58a
AM		 1435 }
1436 }
1437
252b5132
RH		 1438 op_end = powerpc_opcodes + powerpc_num_opcodes;
1439 for (op = powerpc_opcodes; op < op_end; op++)
1440 {
c43a438d 1441 if (ENABLE_CHECKING)
b84bf58a 1442 {
c43a438d
AM		 1443 const unsigned char *o;
1444 unsigned long omask = op->mask;
8dbcd839 1445
d815f1a9 1446 if (op != powerpc_opcodes)
8dbcd839 1447 {
d815f1a9
AM		 1448 /* The major opcodes had better be sorted. Code in the
1449 disassembler assumes the insns are sorted according to
1450 major opcode. */
1451 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1452 {
1453 as_bad (_("major opcode is not sorted for %s"),
1454 op->name);
1455 bad_insn = TRUE;
1456 }
1457
1458 /* Warn if the table isn't more strictly ordered.
1459 Unfortunately it doesn't seem possible to order the
1460 table on much more than the major opcode, which makes
1461 it difficult to implement a binary search in the
1462 disassembler. The problem is that we have multiple
1463 ways to disassemble instructions, and we usually want
1464 to choose a more specific form (with more bits set in
1465 the opcode) than a more general form. eg. all of the
1466 following are equivalent:
1467 bne label # opcode = 0x40820000, mask = 0xff830003
1468 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1469 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1470
1471 There are also cases where the table needs to be out
1472 of order to disassemble the correct instruction for
2f3bb96a 1473 processor variants. */
d815f1a9
AM		 1474 else if (0)
1475 {
1476 unsigned long t1 = op[0].opcode;
1477 unsigned long t2 = op[-1].opcode;
1478
1479 if (((t1 ^ t2) & 0xfc0007ff) == 0
1480 && (t1 & 0xfc0006df) == 0x7c000286)
1481 {
1482 /* spr field is split. */
1483 t1 = ((t1 & ~0x1ff800)
1484 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1485 t2 = ((t2 & ~0x1ff800)
1486 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1487 }
1488 if (t1 < t2)
1489 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1490 op[0].name, op[0].opcode, op[0].mask,
1491 op[-1].name, op[-1].opcode, op[-1].mask);
1492 }
8dbcd839 1493 }
c43a438d
AM		 1494
1495 /* The mask had better not trim off opcode bits. */
1496 if ((op->opcode & omask) != op->opcode)
1497 {
1498 as_bad (_("mask trims opcode bits for %s"),
1499 op->name);
1500 bad_insn = TRUE;
1501 }
1502
1503 /* The operands must not overlap the opcode or each other. */
1504 for (o = op->operands; *o; ++o)
1505 if (*o >= num_powerpc_operands)
1506 {
1507 as_bad (_("operand index error for %s"),
1508 op->name);
1509 bad_insn = TRUE;
1510 }
1511 else
b84bf58a 1512 {
c43a438d
AM		 1513 const struct powerpc_operand *operand = &powerpc_operands[*o];
1514 if (operand->shift >= 0)
b84bf58a 1515 {
c43a438d
AM		 1516 unsigned long mask = operand->bitm << operand->shift;
1517 if (omask & mask)
1518 {
1519 as_bad (_("operand %d overlap in %s"),
1520 (int) (o - op->operands), op->name);
1521 bad_insn = TRUE;
1522 }
1523 omask |= mask;
b84bf58a 1524 }
b84bf58a 1525 }
c43a438d 1526 }
252b5132 1527
bdc70b4a 1528 if ((ppc_cpu & op->flags) != 0
1cb0a767 1529 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1530 {
1531 const char *retval;
1532
98027b10 1533 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1534 if (retval != NULL)
252b5132 1535 {
b84bf58a 1536 as_bad (_("duplicate instruction %s"),
99a814a1 1537 op->name);
b84bf58a 1538 bad_insn = TRUE;
252b5132
RH		 1539 }
1540 }
1541 }
1542
3c9030c1
AM		 1543 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1544 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1545 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1546
252b5132
RH		 1547 /* Insert the macros into a hash table. */
1548 ppc_macro_hash = hash_new ();
1549
1550 macro_end = powerpc_macros + powerpc_num_macros;
1551 for (macro = powerpc_macros; macro < macro_end; macro++)
1552 {
33740db9 1553 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1554 {
1555 const char *retval;
1556
98027b10 1557 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1558 if (retval != (const char *) NULL)
1559 {
b84bf58a
AM		 1560 as_bad (_("duplicate macro %s"), macro->name);
1561 bad_insn = TRUE;
252b5132
RH		 1562 }
1563 }
1564 }
1565
b84bf58a 1566 if (bad_insn)
252b5132 1567 abort ();
69c040df
AM		 1568}
1569
1570/* This function is called when the assembler starts up. It is called
1571 after the options have been parsed and the output file has been
1572 opened. */
1573
1574void
98027b10 1575md_begin (void)
69c040df
AM		 1576{
1577 ppc_set_cpu ();
1578
1579 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1580
1581#ifdef OBJ_ELF
1582 /* Set the ELF flags if desired. */
1583 if (ppc_flags && !msolaris)
1584 bfd_set_private_flags (stdoutput, ppc_flags);
1585#endif
1586
1587 ppc_setup_opcodes ();
252b5132 1588
67c1ffbe 1589 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1590 by the user. */
252b5132
RH		 1591 if (!set_target_endian)
1592 {
1593 set_target_endian = 1;
1594 target_big_endian = PPC_BIG_ENDIAN;
1595 }
1596
1597#ifdef OBJ_XCOFF
1598 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1599
1600 /* Create dummy symbols to serve as initial csects. This forces the
1601 text csects to precede the data csects. These symbols will not
1602 be output. */
1603 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1604 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1605 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1606 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1607#endif
1608
1609#ifdef TE_PE
1610
1611 ppc_current_section = text_section;
81d4177b 1612 ppc_previous_section = 0;
252b5132
RH		 1613
1614#endif
1615}
1616
6a0c61b7 1617void
98027b10 1618ppc_cleanup (void)
6a0c61b7 1619{
dc1d03fc 1620#ifdef OBJ_ELF
6a0c61b7
EZ		 1621 if (ppc_apuinfo_list == NULL)
1622 return;
1623
1624 /* Ok, so write the section info out. We have this layout:
1625
1626 byte data what
1627 ---- ---- ----
1628 0 8 length of "APUinfo\0"
1629 4 (n*4) number of APU's (4 bytes each)
1630 8 2 note type 2
1631 12 "APUinfo\0" name
1632 20 APU#1 first APU's info
1633 24 APU#2 second APU's info
1634 ... ...
1635 */
1636 {
1637 char *p;
1638 asection *seg = now_seg;
1639 subsegT subseg = now_subseg;
1640 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1641 unsigned int i;
6a0c61b7
EZ		 1642
1643 /* Create the .PPC.EMB.apuinfo section. */
1644 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1645 bfd_set_section_flags (stdoutput,
1646 apuinfo_secp,
e1a9cb8e 1647 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1648
1649 p = frag_more (4);
1650 md_number_to_chars (p, (valueT) 8, 4);
1651
1652 p = frag_more (4);
e98d298c 1653 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1654
1655 p = frag_more (4);
1656 md_number_to_chars (p, (valueT) 2, 4);
1657
1658 p = frag_more (8);
1659 strcpy (p, "APUinfo");
1660
1661 for (i = 0; i < ppc_apuinfo_num; i++)
1662 {
b34976b6
AM		 1663 p = frag_more (4);
1664 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1665 }
1666
1667 frag_align (2, 0, 0);
1668
1669 /* We probably can't restore the current segment, for there likely
1670 isn't one yet... */
1671 if (seg && subseg)
1672 subseg_set (seg, subseg);
1673 }
dc1d03fc 1674#endif
6a0c61b7
EZ		 1675}
1676
252b5132
RH		 1677/* Insert an operand value into an instruction. */
1678
1679static unsigned long
a1867a27
AM		 1680ppc_insert_operand (unsigned long insn,
1681 const struct powerpc_operand *operand,
1682 offsetT val,
91d6fa6a 1683 ppc_cpu_t cpu,
a1867a27
AM		 1684 char *file,
1685 unsigned int line)
252b5132 1686{
b84bf58a 1687 long min, max, right;
eb42fac1 1688
b84bf58a
AM		 1689 max = operand->bitm;
1690 right = max & -max;
1691 min = 0;
1692
1693 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1694 {
b84bf58a 1695 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1696 max = (max >> 1) & -right;
1697 min = ~max & -right;
b84bf58a 1698 }
252b5132 1699
b84bf58a 1700 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1701 max++;
252b5132 1702
b84bf58a 1703 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1704 {
1705 long tmp = min;
1706 min = -max;
1707 max = -tmp;
1708 }
b84bf58a 1709
a1867a27
AM		 1710 if (min <= max)
1711 {
1712 /* Some people write constants with the sign extension done by
1713 hand but only up to 32 bits. This shouldn't really be valid,
1714 but, to permit this code to assemble on a 64-bit host, we
1715 sign extend the 32-bit value to 64 bits if so doing makes the
1716 value valid. */
1717 if (val > max
1718 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1719 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1720 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1721 val = val - 0x80000000 - 0x80000000;
1722
1723 /* Similarly, people write expressions like ~(1<<15), and expect
1724 this to be OK for a 32-bit unsigned value. */
1725 else if (val < min
1726 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1727 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1728 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1729 val = val + 0x80000000 + 0x80000000;
1730
1731 else if (val < min
1732 || val > max
1733 || (val & (right - 1)) != 0)
1734 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1735 }
b84bf58a 1736
252b5132
RH		 1737 if (operand->insert)
1738 {
1739 const char *errmsg;
1740
1741 errmsg = NULL;
91d6fa6a 1742 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1743 if (errmsg != (const char *) NULL)
ee2c9aa9 1744 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1745 }
1746 else
b84bf58a 1747 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1748
1749 return insn;
1750}
1751
1752\f
1753#ifdef OBJ_ELF
1754/* Parse @got, etc. and return the desired relocation. */
1755static bfd_reloc_code_real_type
98027b10 1756ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1757{
1758 struct map_bfd {
1759 char *string;
b7d7dc63
AM		 1760 unsigned int length : 8;
1761 unsigned int valid32 : 1;
1762 unsigned int valid64 : 1;
1763 unsigned int reloc;
252b5132
RH		 1764 };
1765
1766 char ident[20];
1767 char *str = *str_p;
1768 char *str2;
1769 int ch;
1770 int len;
15c1449b 1771 const struct map_bfd *ptr;
252b5132 1772
b7d7dc63
AM		 1773#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1774#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1775#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1776
15c1449b 1777 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1778 MAP ("l", BFD_RELOC_LO16),
1779 MAP ("h", BFD_RELOC_HI16),
1780 MAP ("ha", BFD_RELOC_HI16_S),
1781 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1782 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1783 MAP ("got", BFD_RELOC_16_GOTOFF),
1784 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1785 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1786 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1787 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1788 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1789 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1790 MAP ("copy", BFD_RELOC_PPC_COPY),
1791 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1792 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1793 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1794 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1795 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1796 MAP ("tls", BFD_RELOC_PPC_TLS),
1797 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1798 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1799 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1800 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1801 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1802 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1803 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1804 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1805 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1806 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1807 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1808 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1809 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1810 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1811 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1812 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1813 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1814 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1815 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1816 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1817 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1818 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1819 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1820 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1821 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1822 MAP32 ("fixup", BFD_RELOC_CTOR),
1823 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1824 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1825 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1826 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1827 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1828 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1829 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1830 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1831 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1832 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1833 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1834 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1835 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1836 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1837 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1838 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1839 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1840 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1841 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1842 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1843 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1844 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1845 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1846 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1847 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1848 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1849 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1850 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1851 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1852 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1853 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1854 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1855 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1856 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1857 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1858 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1859 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1860 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1861 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1862 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1863 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1864 };
1865
1866 if (*str++ != '@')
1867 return BFD_RELOC_UNUSED;
1868
1869 for (ch = *str, str2 = ident;
1870 (str2 < ident + sizeof (ident) - 1
3882b010 1871 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1872 ch = *++str)
1873 {
3882b010 1874 *str2++ = TOLOWER (ch);
252b5132
RH		 1875 }
1876
1877 *str2 = '\0';
1878 len = str2 - ident;
1879
1880 ch = ident[0];
1881 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1882 if (ch == ptr->string[0]
1883 && len == ptr->length
b7d7dc63
AM		 1884 && memcmp (ident, ptr->string, ptr->length) == 0
1885 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1886 {
15c1449b
AM		 1887 int reloc = ptr->reloc;
1888
727fc41e
AM		 1889 if (!ppc_obj64 && exp_p->X_add_number != 0)
1890 {
1891 switch (reloc)
1892 {
1893 case BFD_RELOC_16_GOTOFF:
1894 case BFD_RELOC_LO16_GOTOFF:
1895 case BFD_RELOC_HI16_GOTOFF:
1896 case BFD_RELOC_HI16_S_GOTOFF:
1897 as_warn (_("identifier+constant@got means "
1898 "identifier@got+constant"));
1899 break;
1900
1901 case BFD_RELOC_PPC_GOT_TLSGD16:
1902 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1903 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1904 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1905 case BFD_RELOC_PPC_GOT_TLSLD16:
1906 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1907 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1908 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1909 case BFD_RELOC_PPC_GOT_DTPREL16:
1910 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1911 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1912 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1913 case BFD_RELOC_PPC_GOT_TPREL16:
1914 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1915 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1916 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1917 as_bad (_("symbol+offset not supported for got tls"));
1918 break;
1919 }
1920 }
5f6db75a
AM		 1921
1922 /* Now check for identifier@suffix+constant. */
1923 if (*str == '-' || *str == '+')
252b5132 1924 {
5f6db75a
AM		 1925 char *orig_line = input_line_pointer;
1926 expressionS new_exp;
1927
1928 input_line_pointer = str;
1929 expression (&new_exp);
1930 if (new_exp.X_op == O_constant)
252b5132 1931 {
5f6db75a
AM		 1932 exp_p->X_add_number += new_exp.X_add_number;
1933 str = input_line_pointer;
252b5132 1934 }
5f6db75a
AM		 1935
1936 if (&input_line_pointer != str_p)
1937 input_line_pointer = orig_line;
252b5132 1938 }
252b5132 1939 *str_p = str;
0baf16f2 1940
2b3c4602 1941 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1942 && exp_p->X_op == O_symbol
1943 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1944 {
9f2b53d7
AM		 1945 /* Change the symbol so that the dummy .TOC. symbol can be
1946 omitted from the object file. */
0baf16f2
AM		 1947 exp_p->X_add_symbol = &abs_symbol;
1948 }
1949
15c1449b 1950 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1951 }
1952
1953 return BFD_RELOC_UNUSED;
1954}
1955
99a814a1
AM		 1956/* Like normal .long/.short/.word, except support @got, etc.
1957 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1958static void
98027b10 1959ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1960{
1961 expressionS exp;
1962 bfd_reloc_code_real_type reloc;
1963
1964 if (is_it_end_of_statement ())
1965 {
1966 demand_empty_rest_of_line ();
1967 return;
1968 }
1969
1970 do
1971 {
1972 expression (&exp);
1973 if (exp.X_op == O_symbol
1974 && *input_line_pointer == '@'
99a814a1
AM		 1975 && (reloc = ppc_elf_suffix (&input_line_pointer,
1976 &exp)) != BFD_RELOC_UNUSED)
252b5132 1977 {
99a814a1
AM		 1978 reloc_howto_type *reloc_howto;
1979 int size;
1980
1981 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1982 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1983
1984 if (size > nbytes)
0baf16f2
AM		 1985 {
1986 as_bad (_("%s relocations do not fit in %d bytes\n"),
1987 reloc_howto->name, nbytes);
1988 }
252b5132
RH		 1989 else
1990 {
0baf16f2
AM		 1991 char *p;
1992 int offset;
252b5132 1993
0baf16f2 1994 p = frag_more (nbytes);
aa0c8c1a 1995 memset (p, 0, nbytes);
0baf16f2
AM		 1996 offset = 0;
1997 if (target_big_endian)
1998 offset = nbytes - size;
99a814a1
AM		 1999 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
2000 &exp, 0, reloc);
252b5132
RH		 2001 }
2002 }
2003 else
2004 emit_expr (&exp, (unsigned int) nbytes);
2005 }
2006 while (*input_line_pointer++ == ',');
2007
99a814a1
AM		 2008 /* Put terminator back into stream. */
2009 input_line_pointer--;
252b5132
RH		 2010 demand_empty_rest_of_line ();
2011}
2012
2013/* Solaris pseduo op to change to the .rodata section. */
2014static void
98027b10 2015ppc_elf_rdata (int xxx)
252b5132
RH		 2016{
2017 char *save_line = input_line_pointer;
2018 static char section[] = ".rodata\n";
2019
99a814a1 2020 /* Just pretend this is .section .rodata */
252b5132
RH		 2021 input_line_pointer = section;
2022 obj_elf_section (xxx);
2023
2024 input_line_pointer = save_line;
2025}
2026
99a814a1 2027/* Pseudo op to make file scope bss items. */
252b5132 2028static void
98027b10 2029ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2030{
98027b10
AM		 2031 char *name;
2032 char c;
2033 char *p;
252b5132 2034 offsetT size;
98027b10 2035 symbolS *symbolP;
252b5132
RH		 2036 offsetT align;
2037 segT old_sec;
2038 int old_subsec;
2039 char *pfrag;
2040 int align2;
2041
2042 name = input_line_pointer;
2043 c = get_symbol_end ();
2044
99a814a1 2045 /* just after name is now '\0'. */
252b5132
RH		 2046 p = input_line_pointer;
2047 *p = c;
2048 SKIP_WHITESPACE ();
2049 if (*input_line_pointer != ',')
2050 {
2051 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
2052 ignore_rest_of_line ();
2053 return;
2054 }
2055
2056 input_line_pointer++; /* skip ',' */
2057 if ((size = get_absolute_expression ()) < 0)
2058 {
2059 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2060 ignore_rest_of_line ();
2061 return;
2062 }
2063
2064 /* The third argument to .lcomm is the alignment. */
2065 if (*input_line_pointer != ',')
2066 align = 8;
2067 else
2068 {
2069 ++input_line_pointer;
2070 align = get_absolute_expression ();
2071 if (align <= 0)
2072 {
2073 as_warn (_("ignoring bad alignment"));
2074 align = 8;
2075 }
2076 }
2077
2078 *p = 0;
2079 symbolP = symbol_find_or_make (name);
2080 *p = c;
2081
2082 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2083 {
2084 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2085 S_GET_NAME (symbolP));
2086 ignore_rest_of_line ();
2087 return;
2088 }
2089
2090 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2091 {
2092 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2093 S_GET_NAME (symbolP),
2094 (long) S_GET_VALUE (symbolP),
2095 (long) size);
2096
2097 ignore_rest_of_line ();
2098 return;
2099 }
2100
99a814a1 2101 /* Allocate_bss. */
252b5132
RH		 2102 old_sec = now_seg;
2103 old_subsec = now_subseg;
2104 if (align)
2105 {
99a814a1 2106 /* Convert to a power of 2 alignment. */
252b5132
RH		 2107 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2108 if (align != 1)
2109 {
2110 as_bad (_("Common alignment not a power of 2"));
2111 ignore_rest_of_line ();
2112 return;
2113 }
2114 }
2115 else
2116 align2 = 0;
2117
2118 record_alignment (bss_section, align2);
2119 subseg_set (bss_section, 0);
2120 if (align2)
2121 frag_align (align2, 0, 0);
2122 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2123 symbol_get_frag (symbolP)->fr_symbol = 0;
2124 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2125 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2126 (char *) 0);
2127 *pfrag = 0;
2128 S_SET_SIZE (symbolP, size);
2129 S_SET_SEGMENT (symbolP, bss_section);
2130 subseg_set (old_sec, old_subsec);
2131 demand_empty_rest_of_line ();
2132}
2133
2134/* Validate any relocations emitted for -mrelocatable, possibly adding
2135 fixups for word relocations in writable segments, so we can adjust
2136 them at runtime. */
2137static void
98027b10 2138ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2139{
2140 if (fixp->fx_done || fixp->fx_pcrel)
2141 return;
2142
2143 switch (shlib)
2144 {
2145 case SHLIB_NONE:
2146 case SHLIB_PIC:
2147 return;
2148
5d6f4f16 2149 case SHLIB_MRELOCATABLE:
252b5132
RH		 2150 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2151 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2152 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2153 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2154 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2155 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2156 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2157 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2158 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2159 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2160 && strcmp (segment_name (seg), ".got2") != 0
2161 && strcmp (segment_name (seg), ".dtors") != 0
2162 && strcmp (segment_name (seg), ".ctors") != 0
2163 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2164 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2165 && strcmp (segment_name (seg), ".eh_frame") != 0
2166 && strcmp (segment_name (seg), ".ex_shared") != 0)
2167 {
2168 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2169 || fixp->fx_r_type != BFD_RELOC_CTOR)
2170 {
2171 as_bad_where (fixp->fx_file, fixp->fx_line,
2172 _("Relocation cannot be done when using -mrelocatable"));
2173 }
2174 }
2175 return;
2176 }
2177}
0baf16f2 2178
7e8d4ab4
AM		 2179/* Prevent elf_frob_file_before_adjust removing a weak undefined
2180 function descriptor sym if the corresponding code sym is used. */
2181
2182void
98027b10 2183ppc_frob_file_before_adjust (void)
0baf16f2 2184{
7e8d4ab4 2185 symbolS *symp;
9232bbb0 2186 asection *toc;
0baf16f2 2187
7e8d4ab4
AM		 2188 if (!ppc_obj64)
2189 return;
2190
2191 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2192 {
7e8d4ab4
AM		 2193 const char *name;
2194 char *dotname;
2195 symbolS *dotsym;
2196 size_t len;
2197
2198 name = S_GET_NAME (symp);
2199 if (name[0] == '.')
2200 continue;
2201
2202 if (! S_IS_WEAK (symp)
2203 || S_IS_DEFINED (symp))
2204 continue;
2205
2206 len = strlen (name) + 1;
2207 dotname = xmalloc (len + 1);
2208 dotname[0] = '.';
2209 memcpy (dotname + 1, name, len);
461b725f 2210 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2211 free (dotname);
2212 if (dotsym != NULL && (symbol_used_p (dotsym)
2213 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2214 symbol_mark_used (symp);
2215
0baf16f2
AM		 2216 }
2217
9232bbb0
AM		 2218 toc = bfd_get_section_by_name (stdoutput, ".toc");
2219 if (toc != NULL
01efc3af 2220 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2221 && bfd_section_size (stdoutput, toc) > 0x10000)
2222 as_warn (_("TOC section size exceeds 64k"));
2223
7e8d4ab4
AM		 2224 /* Don't emit .TOC. symbol. */
2225 symp = symbol_find (".TOC.");
2226 if (symp != NULL)
2227 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2228}
252b5132
RH		 2229#endif /* OBJ_ELF */
2230\f
2231#ifdef TE_PE
2232
2233/*
99a814a1 2234 * Summary of parse_toc_entry.
252b5132
RH		 2235 *
2236 * in: Input_line_pointer points to the '[' in one of:
2237 *
2238 * [toc] [tocv] [toc32] [toc64]
2239 *
2240 * Anything else is an error of one kind or another.
2241 *
81d4177b 2242 * out:
252b5132
RH		 2243 * return value: success or failure
2244 * toc_kind: kind of toc reference
2245 * input_line_pointer:
2246 * success: first char after the ']'
2247 * failure: unchanged
2248 *
2249 * settings:
2250 *
2251 * [toc] - rv == success, toc_kind = default_toc
2252 * [tocv] - rv == success, toc_kind = data_in_toc
2253 * [toc32] - rv == success, toc_kind = must_be_32
2254 * [toc64] - rv == success, toc_kind = must_be_64
2255 *
2256 */
2257
81d4177b
KH		 2258enum toc_size_qualifier
2259{
252b5132
RH		 2260 default_toc, /* The toc cell constructed should be the system default size */
2261 data_in_toc, /* This is a direct reference to a toc cell */
2262 must_be_32, /* The toc cell constructed must be 32 bits wide */
2263 must_be_64 /* The toc cell constructed must be 64 bits wide */
2264};
2265
2266static int
98027b10 2267parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2268{
2269 char *start;
2270 char *toc_spec;
2271 char c;
2272 enum toc_size_qualifier t;
2273
99a814a1 2274 /* Save the input_line_pointer. */
252b5132
RH		 2275 start = input_line_pointer;
2276
99a814a1 2277 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2278 ++input_line_pointer;
2279 SKIP_WHITESPACE ();
81d4177b 2280
99a814a1 2281 /* Find the spelling of the operand. */
252b5132
RH		 2282 toc_spec = input_line_pointer;
2283 c = get_symbol_end ();
2284
99a814a1 2285 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2286 {
2287 t = default_toc;
2288 }
99a814a1 2289 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2290 {
2291 t = data_in_toc;
2292 }
99a814a1 2293 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2294 {
2295 t = must_be_32;
2296 }
99a814a1 2297 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2298 {
2299 t = must_be_64;
2300 }
2301 else
2302 {
2303 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2304 *input_line_pointer = c;
2305 input_line_pointer = start;
252b5132
RH		 2306 return 0;
2307 }
2308
99a814a1
AM		 2309 /* Now find the ']'. */
2310 *input_line_pointer = c;
252b5132 2311
81d4177b
KH		 2312 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2313 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2314
2315 if (c != ']')
2316 {
2317 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2318 input_line_pointer = start;
252b5132
RH		 2319 return 0;
2320 }
2321
99a814a1 2322 *toc_kind = t;
252b5132
RH		 2323 return 1;
2324}
2325#endif
2326\f
2327
dc1d03fc 2328#ifdef OBJ_ELF
6a0c61b7
EZ		 2329#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2330static void
98027b10 2331ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2332{
2333 unsigned int i;
2334
2335 /* Check we don't already exist. */
2336 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2337 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2338 return;
b34976b6 2339
6a0c61b7
EZ		 2340 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2341 {
2342 if (ppc_apuinfo_num_alloc == 0)
2343 {
2344 ppc_apuinfo_num_alloc = 4;
2345 ppc_apuinfo_list = (unsigned long *)
2346 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2347 }
2348 else
2349 {
2350 ppc_apuinfo_num_alloc += 4;
2351 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2352 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2353 }
2354 }
dc1d03fc 2355 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2356}
2357#undef APUID
dc1d03fc 2358#endif
6a0c61b7
EZ		 2359\f
2360
252b5132
RH		 2361/* We need to keep a list of fixups. We can't simply generate them as
2362 we go, because that would require us to first create the frag, and
2363 that would screw up references to ``.''. */
2364
2365struct ppc_fixup
2366{
2367 expressionS exp;
2368 int opindex;
2369 bfd_reloc_code_real_type reloc;
2370};
2371
2372#define MAX_INSN_FIXUPS (5)
2373
2374/* This routine is called for each instruction to be assembled. */
2375
2376void
98027b10 2377md_assemble (char *str)
252b5132
RH		 2378{
2379 char *s;
2380 const struct powerpc_opcode *opcode;
2381 unsigned long insn;
2382 const unsigned char *opindex_ptr;
2383 int skip_optional;
2384 int need_paren;
2385 int next_opindex;
2386 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2387 int fc;
2388 char *f;
09b935ac 2389 int addr_mod;
252b5132
RH		 2390 int i;
2391#ifdef OBJ_ELF
2392 bfd_reloc_code_real_type reloc;
2393#endif
2394
2395 /* Get the opcode. */
3882b010 2396 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2397 ;
2398 if (*s != '\0')
2399 *s++ = '\0';
2400
2401 /* Look up the opcode in the hash table. */
2402 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2403 if (opcode == (const struct powerpc_opcode *) NULL)
2404 {
2405 const struct powerpc_macro *macro;
2406
2407 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2408 if (macro == (const struct powerpc_macro *) NULL)
2409 as_bad (_("Unrecognized opcode: `%s'"), str);
2410 else
2411 ppc_macro (s, macro);
2412
2413 return;
2414 }
2415
2416 insn = opcode->opcode;
2417
2418 str = s;
3882b010 2419 while (ISSPACE (*str))
252b5132
RH		 2420 ++str;
2421
2422 /* PowerPC operands are just expressions. The only real issue is
2423 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2424 an optional operand separate the operands only with commas (in some
2425 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2426 have optional operands). Most instructions with optional operands
2427 have only one. Those that have more than one optional operand can
2428 take either all their operands or none. So, before we start seriously
2429 parsing the operands, we check to see if we have optional operands,
2430 and if we do, we count the number of commas to see which operands
2431 have been omitted. */
252b5132
RH		 2432 skip_optional = 0;
2433 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2434 {
2435 const struct powerpc_operand *operand;
2436
2437 operand = &powerpc_operands[*opindex_ptr];
2438 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2439 {
2440 unsigned int opcount;
7fe9cf6b 2441 unsigned int num_operands_expected;
252b5132
RH		 2442
2443 /* There is an optional operand. Count the number of
2444 commas in the input line. */
2445 if (*str == '\0')
2446 opcount = 0;
2447 else
2448 {
2449 opcount = 1;
2450 s = str;
2451 while ((s = strchr (s, ',')) != (char *) NULL)
2452 {
2453 ++opcount;
2454 ++s;
2455 }
2456 }
2457
7fe9cf6b
NC		 2458 /* Compute the number of expected operands.
2459 Do not count fake operands. */
2460 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2461 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2462 ++ num_operands_expected;
2463
252b5132
RH		 2464 /* If there are fewer operands in the line then are called
2465 for by the instruction, we want to skip the optional
1f6c9eb0 2466 operands. */
7fe9cf6b 2467 if (opcount < num_operands_expected)
252b5132
RH		 2468 skip_optional = 1;
2469
2470 break;
2471 }
2472 }
2473
2474 /* Gather the operands. */
2475 need_paren = 0;
2476 next_opindex = 0;
2477 fc = 0;
2478 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2479 {
2480 const struct powerpc_operand *operand;
2481 const char *errmsg;
2482 char *hold;
2483 expressionS ex;
2484 char endc;
2485
2486 if (next_opindex == 0)
2487 operand = &powerpc_operands[*opindex_ptr];
2488 else
2489 {
2490 operand = &powerpc_operands[next_opindex];
2491 next_opindex = 0;
2492 }
252b5132
RH		 2493 errmsg = NULL;
2494
2495 /* If this is a fake operand, then we do not expect anything
2496 from the input. */
2497 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2498 {
2b3c4602 2499 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2500 if (errmsg != (const char *) NULL)
ee2c9aa9 2501 as_bad ("%s", errmsg);
252b5132
RH		 2502 continue;
2503 }
2504
2505 /* If this is an optional operand, and we are skipping it, just
2506 insert a zero. */
2507 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2508 && skip_optional)
2509 {
2510 if (operand->insert)
2511 {
2b3c4602 2512 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2513 if (errmsg != (const char *) NULL)
ee2c9aa9 2514 as_bad ("%s", errmsg);
252b5132
RH		 2515 }
2516 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2517 next_opindex = *opindex_ptr + 1;
2518 continue;
2519 }
2520
2521 /* Gather the operand. */
2522 hold = input_line_pointer;
2523 input_line_pointer = str;
2524
2525#ifdef TE_PE
81d4177b 2526 if (*input_line_pointer == '[')
252b5132
RH		 2527 {
2528 /* We are expecting something like the second argument here:
99a814a1
AM		 2529 *
2530 * lwz r4,[toc].GS.0.static_int(rtoc)
2531 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2532 * The argument following the `]' must be a symbol name, and the
2533 * register must be the toc register: 'rtoc' or '2'
2534 *
2535 * The effect is to 0 as the displacement field
2536 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2537 * the appropriate variation) reloc against it based on the symbol.
2538 * The linker will build the toc, and insert the resolved toc offset.
2539 *
2540 * Note:
2541 * o The size of the toc entry is currently assumed to be
2542 * 32 bits. This should not be assumed to be a hard coded
2543 * number.
2544 * o In an effort to cope with a change from 32 to 64 bits,
2545 * there are also toc entries that are specified to be
2546 * either 32 or 64 bits:
2547 * lwz r4,[toc32].GS.0.static_int(rtoc)
2548 * lwz r4,[toc64].GS.0.static_int(rtoc)
2549 * These demand toc entries of the specified size, and the
2550 * instruction probably requires it.
2551 */
252b5132
RH		 2552
2553 int valid_toc;
2554 enum toc_size_qualifier toc_kind;
2555 bfd_reloc_code_real_type toc_reloc;
2556
99a814a1
AM		 2557 /* Go parse off the [tocXX] part. */
2558 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2559
81d4177b 2560 if (!valid_toc)
252b5132 2561 {
99a814a1
AM		 2562 /* Note: message has already been issued.
2563 FIXME: what sort of recovery should we do?
2564 demand_rest_of_line (); return; ? */
252b5132
RH		 2565 }
2566
99a814a1
AM		 2567 /* Now get the symbol following the ']'. */
2568 expression (&ex);
252b5132
RH		 2569
2570 switch (toc_kind)
2571 {
2572 case default_toc:
99a814a1
AM		 2573 /* In this case, we may not have seen the symbol yet,
2574 since it is allowed to appear on a .extern or .globl
2575 or just be a label in the .data section. */
252b5132
RH		 2576 toc_reloc = BFD_RELOC_PPC_TOC16;
2577 break;
2578 case data_in_toc:
99a814a1
AM		 2579 /* 1. The symbol must be defined and either in the toc
2580 section, or a global.
2581 2. The reloc generated must have the TOCDEFN flag set
2582 in upper bit mess of the reloc type.
2583 FIXME: It's a little confusing what the tocv
2584 qualifier can be used for. At the very least, I've
2585 seen three uses, only one of which I'm sure I can
2586 explain. */
81d4177b
KH		 2587 if (ex.X_op == O_symbol)
2588 {
9c2799c2 2589 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2590 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2591 != tocdata_section)
252b5132 2592 {
99a814a1 2593 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2594 }
2595 }
2596
2597 toc_reloc = BFD_RELOC_PPC_TOC16;
2598 break;
2599 case must_be_32:
99a814a1
AM		 2600 /* FIXME: these next two specifically specify 32/64 bit
2601 toc entries. We don't support them today. Is this
2602 the right way to say that? */
252b5132
RH		 2603 toc_reloc = BFD_RELOC_UNUSED;
2604 as_bad (_("Unimplemented toc32 expression modifier"));
2605 break;
2606 case must_be_64:
99a814a1 2607 /* FIXME: see above. */
252b5132
RH		 2608 toc_reloc = BFD_RELOC_UNUSED;
2609 as_bad (_("Unimplemented toc64 expression modifier"));
2610 break;
2611 default:
bc805888 2612 fprintf (stderr,
99a814a1
AM		 2613 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2614 toc_kind);
bc805888 2615 abort ();
252b5132
RH		 2616 break;
2617 }
2618
2619 /* We need to generate a fixup for this expression. */
2620 if (fc >= MAX_INSN_FIXUPS)
2621 as_fatal (_("too many fixups"));
2622
2623 fixups[fc].reloc = toc_reloc;
2624 fixups[fc].exp = ex;
2625 fixups[fc].opindex = *opindex_ptr;
2626 ++fc;
2627
99a814a1
AM		 2628 /* Ok. We've set up the fixup for the instruction. Now make it
2629 look like the constant 0 was found here. */
252b5132
RH		 2630 ex.X_unsigned = 1;
2631 ex.X_op = O_constant;
2632 ex.X_add_number = 0;
2633 ex.X_add_symbol = NULL;
2634 ex.X_op_symbol = NULL;
2635 }
2636
2637 else
2638#endif /* TE_PE */
2639 {
2ad068be
AM		 2640 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2641 || !register_name (&ex))
252b5132 2642 {
13abbae3
AM		 2643 char save_lex = lex_type['%'];
2644
252b5132 2645 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2646 {
2647 cr_operand = TRUE;
2648 lex_type['%'] |= LEX_BEGIN_NAME;
2649 }
252b5132 2650 expression (&ex);
b34976b6 2651 cr_operand = FALSE;
13abbae3 2652 lex_type['%'] = save_lex;
252b5132
RH		 2653 }
2654 }
2655
2656 str = input_line_pointer;
2657 input_line_pointer = hold;
2658
2659 if (ex.X_op == O_illegal)
2660 as_bad (_("illegal operand"));
2661 else if (ex.X_op == O_absent)
2662 as_bad (_("missing operand"));
2663 else if (ex.X_op == O_register)
2664 {
2665 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2666 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2667 }
2668 else if (ex.X_op == O_constant)
2669 {
2670#ifdef OBJ_ELF
81d4177b 2671 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2672 char *orig_str = str;
2673
2674 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2675 switch (reloc)
2676 {
2677 default:
2678 str = orig_str;
2679 break;
2680
2681 case BFD_RELOC_LO16:
2682 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2683 something which cleared it, we always produce a
2684 signed value. */
2685 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2686 ex.X_add_number &= 0xffff;
2687 else
0baf16f2 2688 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2689 break;
2690
2691 case BFD_RELOC_HI16:
0baf16f2
AM		 2692 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2693 ex.X_add_number = PPC_HI (ex.X_add_number);
2694 else
2695 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2696 break;
2697
2698 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2699 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2700 ex.X_add_number = PPC_HA (ex.X_add_number);
2701 else
2702 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2703 break;
2704
0baf16f2
AM		 2705 case BFD_RELOC_PPC64_HIGHER:
2706 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2707 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2708 else
2709 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2710 break;
2711
2712 case BFD_RELOC_PPC64_HIGHER_S:
2713 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2714 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2715 else
2716 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2717 break;
0baf16f2
AM		 2718
2719 case BFD_RELOC_PPC64_HIGHEST:
2720 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2721 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2722 else
2723 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2724 break;
2725
2726 case BFD_RELOC_PPC64_HIGHEST_S:
2727 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2728 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2729 else
2730 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2731 break;
252b5132 2732 }
0baf16f2 2733#endif /* OBJ_ELF */
252b5132 2734 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2735 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2736 }
2737#ifdef OBJ_ELF
727fc41e 2738 else
252b5132 2739 {
727fc41e 2740 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2741 {
727fc41e
AM		 2742 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2743 if (sym_name[0] == '.')
2744 ++sym_name;
cdba85ec 2745
727fc41e 2746 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2747 {
727fc41e
AM		 2748 expressionS tls_exp;
2749
2750 hold = input_line_pointer;
2751 input_line_pointer = str + 1;
2752 expression (&tls_exp);
2753 if (tls_exp.X_op == O_symbol)
2754 {
2755 reloc = BFD_RELOC_UNUSED;
2756 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2757 {
2758 reloc = BFD_RELOC_PPC_TLSGD;
2759 input_line_pointer += 7;
2760 }
2761 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2762 {
2763 reloc = BFD_RELOC_PPC_TLSLD;
2764 input_line_pointer += 7;
2765 }
2766 if (reloc != BFD_RELOC_UNUSED)
2767 {
2768 SKIP_WHITESPACE ();
2769 str = input_line_pointer;
2770
2771 if (fc >= MAX_INSN_FIXUPS)
2772 as_fatal (_("too many fixups"));
2773 fixups[fc].exp = tls_exp;
2774 fixups[fc].opindex = *opindex_ptr;
2775 fixups[fc].reloc = reloc;
2776 ++fc;
2777 }
2778 }
2779 input_line_pointer = hold;
252b5132
RH		 2780 }
2781 }
2782
727fc41e 2783 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2784 {
727fc41e 2785 /* Some TLS tweaks. */
0baf16f2
AM		 2786 switch (reloc)
2787 {
727fc41e 2788 default:
cdba85ec 2789 break;
727fc41e
AM		 2790
2791 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2792 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2793 as_bad (_("@tls may not be used with \"%s\" operands"),
2794 opcode->name);
2795 else if (operand->shift != 11)
2796 as_bad (_("@tls may only be used in last operand"));
2797 else
2798 insn = ppc_insert_operand (insn, operand,
2799 ppc_obj64 ? 13 : 2,
2800 ppc_cpu, (char *) NULL, 0);
cdba85ec 2801 break;
727fc41e
AM		 2802
2803 /* We'll only use the 32 (or 64) bit form of these relocations
2804 in constants. Instructions get the 16 bit form. */
2805 case BFD_RELOC_PPC_DTPREL:
2806 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2807 break;
727fc41e
AM		 2808 case BFD_RELOC_PPC_TPREL:
2809 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2810 break;
2811 }
727fc41e
AM		 2812
2813 /* For the absolute forms of branches, convert the PC
2814 relative form back into the absolute. */
2815 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2816 {
2817 switch (reloc)
2818 {
2819 case BFD_RELOC_PPC_B26:
2820 reloc = BFD_RELOC_PPC_BA26;
2821 break;
2822 case BFD_RELOC_PPC_B16:
2823 reloc = BFD_RELOC_PPC_BA16;
2824 break;
2825 case BFD_RELOC_PPC_B16_BRTAKEN:
2826 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2827 break;
2828 case BFD_RELOC_PPC_B16_BRNTAKEN:
2829 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2830 break;
2831 default:
2832 break;
2833 }
2834 }
2835
01efc3af
AM		 2836 switch (reloc)
2837 {
2838 case BFD_RELOC_PPC_TOC16:
2839 toc_reloc_types |= has_small_toc_reloc;
2840 break;
2841 case BFD_RELOC_PPC64_TOC16_LO:
2842 case BFD_RELOC_PPC64_TOC16_HI:
2843 case BFD_RELOC_PPC64_TOC16_HA:
2844 toc_reloc_types |= has_large_toc_reloc;
2845 break;
2846 default:
2847 break;
2848 }
2849
727fc41e
AM		 2850 if (ppc_obj64
2851 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2852 {
2853 switch (reloc)
2854 {
2855 case BFD_RELOC_16:
2856 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2857 break;
2858 case BFD_RELOC_LO16:
2859 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2860 break;
2861 case BFD_RELOC_16_GOTOFF:
2862 reloc = BFD_RELOC_PPC64_GOT16_DS;
2863 break;
2864 case BFD_RELOC_LO16_GOTOFF:
2865 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2866 break;
2867 case BFD_RELOC_LO16_PLTOFF:
2868 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2869 break;
2870 case BFD_RELOC_16_BASEREL:
2871 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2872 break;
2873 case BFD_RELOC_LO16_BASEREL:
2874 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2875 break;
2876 case BFD_RELOC_PPC_TOC16:
2877 reloc = BFD_RELOC_PPC64_TOC16_DS;
2878 break;
2879 case BFD_RELOC_PPC64_TOC16_LO:
2880 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2881 break;
2882 case BFD_RELOC_PPC64_PLTGOT16:
2883 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2884 break;
2885 case BFD_RELOC_PPC64_PLTGOT16_LO:
2886 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2887 break;
2888 case BFD_RELOC_PPC_DTPREL16:
2889 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2890 break;
2891 case BFD_RELOC_PPC_DTPREL16_LO:
2892 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2893 break;
2894 case BFD_RELOC_PPC_TPREL16:
2895 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2896 break;
2897 case BFD_RELOC_PPC_TPREL16_LO:
2898 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2899 break;
2900 case BFD_RELOC_PPC_GOT_DTPREL16:
2901 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2902 case BFD_RELOC_PPC_GOT_TPREL16:
2903 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2904 break;
2905 default:
2906 as_bad (_("unsupported relocation for DS offset field"));
2907 break;
2908 }
2909 }
0baf16f2
AM		 2910 }
2911
252b5132
RH		 2912 /* We need to generate a fixup for this expression. */
2913 if (fc >= MAX_INSN_FIXUPS)
2914 as_fatal (_("too many fixups"));
2915 fixups[fc].exp = ex;
727fc41e 2916 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2917 fixups[fc].reloc = reloc;
2918 ++fc;
2919 }
727fc41e 2920#else /* OBJ_ELF */
252b5132
RH		 2921 else
2922 {
2923 /* We need to generate a fixup for this expression. */
2924 if (fc >= MAX_INSN_FIXUPS)
2925 as_fatal (_("too many fixups"));
2926 fixups[fc].exp = ex;
2927 fixups[fc].opindex = *opindex_ptr;
2928 fixups[fc].reloc = BFD_RELOC_UNUSED;
2929 ++fc;
2930 }
727fc41e 2931#endif /* OBJ_ELF */
252b5132
RH		 2932
2933 if (need_paren)
2934 {
2935 endc = ')';
2936 need_paren = 0;
c3d65c1c
BE		 2937 /* If expecting more operands, then we want to see "),". */
2938 if (*str == endc && opindex_ptr[1] != 0)
2939 {
2940 do
2941 ++str;
2942 while (ISSPACE (*str));
2943 endc = ',';
2944 }
252b5132
RH		 2945 }
2946 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2947 {
2948 endc = '(';
2949 need_paren = 1;
2950 }
2951 else
2952 endc = ',';
2953
2954 /* The call to expression should have advanced str past any
2955 whitespace. */
2956 if (*str != endc
2957 && (endc != ',' || *str != '\0'))
2958 {
5a938047
AM		 2959 if (*str == '\0')
2960 as_bad (_("syntax error; end of line, expected `%c'"), endc);
2961 else
2962 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 2963 break;
2964 }
2965
2966 if (*str != '\0')
2967 ++str;
2968 }
2969
3882b010 2970 while (ISSPACE (*str))
252b5132
RH		 2971 ++str;
2972
2973 if (*str != '\0')
2974 as_bad (_("junk at end of line: `%s'"), str);
2975
dc1d03fc 2976#ifdef OBJ_ELF
6a0c61b7 2977 /* Do we need/want a APUinfo section? */
e01d869a 2978 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC)) != 0)
6a0c61b7
EZ		 2979 {
2980 /* These are all version "1". */
2981 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2982 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2983 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2984 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2985 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2986 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2987 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2988 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2989 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2990 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2991 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2992 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2993 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2994 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2995 }
dc1d03fc 2996#endif
6a0c61b7 2997
252b5132
RH		 2998 /* Write out the instruction. */
2999 f = frag_more (4);
09b935ac
AM		 3000 addr_mod = frag_now_fix () & 3;
3001 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
3002 as_bad (_("instruction address is not a multiple of 4"));
3003 frag_now->insn_addr = addr_mod;
3004 frag_now->has_code = 1;
252b5132
RH		 3005 md_number_to_chars (f, insn, 4);
3006
5d6f4f16
GK		 3007#ifdef OBJ_ELF
3008 dwarf2_emit_insn (4);
3009#endif
3010
252b5132
RH		 3011 /* Create any fixups. At this point we do not use a
3012 bfd_reloc_code_real_type, but instead just use the
3013 BFD_RELOC_UNUSED plus the operand index. This lets us easily
3014 handle fixups for any operand type, although that is admittedly
3015 not a very exciting feature. We pick a BFD reloc type in
55cf6793 3016 md_apply_fix. */
252b5132
RH		 3017 for (i = 0; i < fc; i++)
3018 {
252b5132
RH		 3019 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3020 {
99a814a1 3021 reloc_howto_type *reloc_howto;
252b5132
RH		 3022 int size;
3023 int offset;
3024 fixS *fixP;
3025
99a814a1 3026 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3027 if (!reloc_howto)
3028 abort ();
3029
3030 size = bfd_get_reloc_size (reloc_howto);
3031 offset = target_big_endian ? (4 - size) : 0;
3032
3033 if (size < 1 || size > 4)
bc805888 3034 abort ();
252b5132 3035
99a814a1
AM		 3036 fixP = fix_new_exp (frag_now,
3037 f - frag_now->fr_literal + offset,
3038 size,
3039 &fixups[i].exp,
3040 reloc_howto->pc_relative,
252b5132
RH		 3041 fixups[i].reloc);
3042
3043 /* Turn off complaints that the addend is too large for things like
3044 foo+100000@ha. */
3045 switch (fixups[i].reloc)
3046 {
3047 case BFD_RELOC_16_GOTOFF:
3048 case BFD_RELOC_PPC_TOC16:
3049 case BFD_RELOC_LO16:
3050 case BFD_RELOC_HI16:
3051 case BFD_RELOC_HI16_S:
0baf16f2 3052#ifdef OBJ_ELF
0baf16f2
AM		 3053 case BFD_RELOC_PPC64_HIGHER:
3054 case BFD_RELOC_PPC64_HIGHER_S:
3055 case BFD_RELOC_PPC64_HIGHEST:
3056 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 3057#endif
252b5132
RH		 3058 fixP->fx_no_overflow = 1;
3059 break;
3060 default:
3061 break;
3062 }
3063 }
3064 else
727fc41e
AM		 3065 {
3066 const struct powerpc_operand *operand;
3067
3068 operand = &powerpc_operands[fixups[i].opindex];
3069 fix_new_exp (frag_now,
3070 f - frag_now->fr_literal,
3071 4,
3072 &fixups[i].exp,
3073 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3074 ((bfd_reloc_code_real_type)
3075 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3076 }
252b5132
RH		 3077 }
3078}
3079
3080/* Handle a macro. Gather all the operands, transform them as
3081 described by the macro, and call md_assemble recursively. All the
3082 operands are separated by commas; we don't accept parentheses
3083 around operands here. */
3084
3085static void
98027b10 3086ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3087{
3088 char *operands[10];
3089 unsigned int count;
3090 char *s;
3091 unsigned int len;
3092 const char *format;
db557034 3093 unsigned int arg;
252b5132
RH		 3094 char *send;
3095 char *complete;
3096
3097 /* Gather the users operands into the operands array. */
3098 count = 0;
3099 s = str;
3100 while (1)
3101 {
3102 if (count >= sizeof operands / sizeof operands[0])
3103 break;
3104 operands[count++] = s;
3105 s = strchr (s, ',');
3106 if (s == (char *) NULL)
3107 break;
3108 *s++ = '\0';
81d4177b 3109 }
252b5132
RH		 3110
3111 if (count != macro->operands)
3112 {
3113 as_bad (_("wrong number of operands"));
3114 return;
3115 }
3116
3117 /* Work out how large the string must be (the size is unbounded
3118 because it includes user input). */
3119 len = 0;
3120 format = macro->format;
3121 while (*format != '\0')
3122 {
3123 if (*format != '%')
3124 {
3125 ++len;
3126 ++format;
3127 }
3128 else
3129 {
3130 arg = strtol (format + 1, &send, 10);
db557034 3131 know (send != format && arg < count);
252b5132
RH		 3132 len += strlen (operands[arg]);
3133 format = send;
3134 }
3135 }
3136
3137 /* Put the string together. */
3138 complete = s = (char *) alloca (len + 1);
3139 format = macro->format;
3140 while (*format != '\0')
3141 {
3142 if (*format != '%')
3143 *s++ = *format++;
3144 else
3145 {
3146 arg = strtol (format + 1, &send, 10);
3147 strcpy (s, operands[arg]);
3148 s += strlen (s);
3149 format = send;
3150 }
3151 }
3152 *s = '\0';
3153
3154 /* Assemble the constructed instruction. */
3155 md_assemble (complete);
81d4177b 3156}
252b5132
RH		 3157\f
3158#ifdef OBJ_ELF
18ae9cc1 3159/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3160
3161int
98027b10 3162ppc_section_type (char *str, size_t len)
252b5132 3163{
9de8d8f1
RH		 3164 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3165 return SHT_ORDERED;
252b5132 3166
9de8d8f1 3167 return -1;
252b5132
RH		 3168}
3169
3170int
1239de13 3171ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3172{
3173 if (type == SHT_ORDERED)
3174 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3175
252b5132
RH		 3176 return flags;
3177}
3178#endif /* OBJ_ELF */
3179
3180\f
3181/* Pseudo-op handling. */
3182
3183/* The .byte pseudo-op. This is similar to the normal .byte
3184 pseudo-op, but it can also take a single ASCII string. */
3185
3186static void
98027b10 3187ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3188{
3189 if (*input_line_pointer != '\"')
3190 {
3191 cons (1);
3192 return;
3193 }
3194
3195 /* Gather characters. A real double quote is doubled. Unusual
3196 characters are not permitted. */
3197 ++input_line_pointer;
3198 while (1)
3199 {
3200 char c;
3201
3202 c = *input_line_pointer++;
3203
3204 if (c == '\"')
3205 {
3206 if (*input_line_pointer != '\"')
3207 break;
3208 ++input_line_pointer;
3209 }
3210
3211 FRAG_APPEND_1_CHAR (c);
3212 }
3213
3214 demand_empty_rest_of_line ();
3215}
3216\f
3217#ifdef OBJ_XCOFF
3218
3219/* XCOFF specific pseudo-op handling. */
3220
3221/* This is set if we are creating a .stabx symbol, since we don't want
3222 to handle symbol suffixes for such symbols. */
b34976b6 3223static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3224
3225/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3226 symbols in the .bss segment as though they were local common
67c1ffbe 3227 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3228 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3229
3230static void
98027b10 3231ppc_comm (int lcomm)
252b5132
RH		 3232{
3233 asection *current_seg = now_seg;
3234 subsegT current_subseg = now_subseg;
3235 char *name;
3236 char endc;
3237 char *end_name;
3238 offsetT size;
3239 offsetT align;
3240 symbolS *lcomm_sym = NULL;
3241 symbolS *sym;
3242 char *pfrag;
3243
3244 name = input_line_pointer;
3245 endc = get_symbol_end ();
3246 end_name = input_line_pointer;
3247 *end_name = endc;
3248
3249 if (*input_line_pointer != ',')
3250 {
3251 as_bad (_("missing size"));
3252 ignore_rest_of_line ();
3253 return;
3254 }
3255 ++input_line_pointer;
3256
3257 size = get_absolute_expression ();
3258 if (size < 0)
3259 {
3260 as_bad (_("negative size"));
3261 ignore_rest_of_line ();
3262 return;
3263 }
3264
3265 if (! lcomm)
3266 {
3267 /* The third argument to .comm is the alignment. */
3268 if (*input_line_pointer != ',')
1ad63b2f 3269 align = 2;
252b5132
RH		 3270 else
3271 {
3272 ++input_line_pointer;
3273 align = get_absolute_expression ();
3274 if (align <= 0)
3275 {
3276 as_warn (_("ignoring bad alignment"));
1ad63b2f 3277 align = 2;
252b5132
RH		 3278 }
3279 }
3280 }
3281 else
3282 {
3283 char *lcomm_name;
3284 char lcomm_endc;
3285
1ad63b2f 3286 if (size <= 4)
252b5132
RH		 3287 align = 2;
3288 else
3289 align = 3;
3290
3291 /* The third argument to .lcomm appears to be the real local
3292 common symbol to create. References to the symbol named in
3293 the first argument are turned into references to the third
3294 argument. */
3295 if (*input_line_pointer != ',')
3296 {
3297 as_bad (_("missing real symbol name"));
3298 ignore_rest_of_line ();
3299 return;
3300 }
3301 ++input_line_pointer;
3302
3303 lcomm_name = input_line_pointer;
3304 lcomm_endc = get_symbol_end ();
81d4177b 3305
252b5132
RH		 3306 lcomm_sym = symbol_find_or_make (lcomm_name);
3307
3308 *input_line_pointer = lcomm_endc;
3309 }
3310
3311 *end_name = '\0';
3312 sym = symbol_find_or_make (name);
3313 *end_name = endc;
3314
3315 if (S_IS_DEFINED (sym)
3316 || S_GET_VALUE (sym) != 0)
3317 {
3318 as_bad (_("attempt to redefine symbol"));
3319 ignore_rest_of_line ();
3320 return;
3321 }
81d4177b 3322
252b5132 3323 record_alignment (bss_section, align);
81d4177b 3324
252b5132
RH		 3325 if (! lcomm
3326 || ! S_IS_DEFINED (lcomm_sym))
3327 {
3328 symbolS *def_sym;
3329 offsetT def_size;
3330
3331 if (! lcomm)
3332 {
3333 def_sym = sym;
3334 def_size = size;
3335 S_SET_EXTERNAL (sym);
3336 }
3337 else
3338 {
809ffe0d 3339 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3340 def_sym = lcomm_sym;
3341 def_size = 0;
3342 }
3343
3344 subseg_set (bss_section, 1);
3345 frag_align (align, 0, 0);
81d4177b 3346
809ffe0d 3347 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3348 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3349 def_size, (char *) NULL);
3350 *pfrag = 0;
3351 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3352 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3353 }
3354 else if (lcomm)
3355 {
3356 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3357 symbol_get_frag (lcomm_sym)->fr_offset =
3358 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3359 &~ ((1 << align) - 1));
809ffe0d
ILT		 3360 if (align > symbol_get_tc (lcomm_sym)->align)
3361 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3362 }
3363
3364 if (lcomm)
3365 {
3366 /* Make sym an offset from lcomm_sym. */
3367 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3368 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3369 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3370 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3371 }
3372
3373 subseg_set (current_seg, current_subseg);
3374
3375 demand_empty_rest_of_line ();
3376}
3377
3378/* The .csect pseudo-op. This switches us into a different
3379 subsegment. The first argument is a symbol whose value is the
3380 start of the .csect. In COFF, csect symbols get special aux
3381 entries defined by the x_csect field of union internal_auxent. The
3382 optional second argument is the alignment (the default is 2). */
3383
3384static void
98027b10 3385ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3386{
3387 char *name;
3388 char endc;
3389 symbolS *sym;
931e13a6 3390 offsetT align;
252b5132
RH		 3391
3392 name = input_line_pointer;
3393 endc = get_symbol_end ();
81d4177b 3394
252b5132
RH		 3395 sym = symbol_find_or_make (name);
3396
3397 *input_line_pointer = endc;
3398
3399 if (S_GET_NAME (sym)[0] == '\0')
3400 {
3401 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3402 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3403 }
3404
931e13a6 3405 align = 2;
252b5132
RH		 3406 if (*input_line_pointer == ',')
3407 {
3408 ++input_line_pointer;
931e13a6 3409 align = get_absolute_expression ();
252b5132
RH		 3410 }
3411
931e13a6
AM		 3412 ppc_change_csect (sym, align);
3413
252b5132
RH		 3414 demand_empty_rest_of_line ();
3415}
3416
3417/* Change to a different csect. */
3418
3419static void
98027b10 3420ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3421{
3422 if (S_IS_DEFINED (sym))
809ffe0d 3423 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3424 else
3425 {
3426 symbolS **list_ptr;
3427 int after_toc;
3428 int hold_chunksize;
3429 symbolS *list;
931e13a6
AM		 3430 int is_code;
3431 segT sec;
252b5132
RH		 3432
3433 /* This is a new csect. We need to look at the symbol class to
3434 figure out whether it should go in the text section or the
3435 data section. */
3436 after_toc = 0;
931e13a6 3437 is_code = 0;
96d56e9f 3438 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3439 {
3440 case XMC_PR:
3441 case XMC_RO:
3442 case XMC_DB:
3443 case XMC_GL:
3444 case XMC_XO:
3445 case XMC_SV:
3446 case XMC_TI:
3447 case XMC_TB:
3448 S_SET_SEGMENT (sym, text_section);
809ffe0d 3449 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3450 ++ppc_text_subsegment;
3451 list_ptr = &ppc_text_csects;
931e13a6 3452 is_code = 1;
252b5132
RH		 3453 break;
3454 case XMC_RW:
3455 case XMC_TC0:
3456 case XMC_TC:
3457 case XMC_DS:
3458 case XMC_UA:
3459 case XMC_BS:
3460 case XMC_UC:
3461 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3462 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3463 == ppc_data_subsegment))
252b5132
RH		 3464 after_toc = 1;
3465 S_SET_SEGMENT (sym, data_section);
809ffe0d 3466 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3467 ++ppc_data_subsegment;
3468 list_ptr = &ppc_data_csects;
3469 break;
3470 default:
3471 abort ();
3472 }
3473
3474 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3475 changing subsegments, so that we don't use a lot of memory
3476 space for what may be a small section. */
252b5132
RH		 3477 hold_chunksize = chunksize;
3478 chunksize = 64;
3479
931e13a6
AM		 3480 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3481 symbol_get_tc (sym)->subseg);
252b5132
RH		 3482
3483 chunksize = hold_chunksize;
3484
3485 if (after_toc)
3486 ppc_after_toc_frag = frag_now;
3487
931e13a6
AM		 3488 record_alignment (sec, align);
3489 if (is_code)
3490 frag_align_code (align, 0);
3491 else
3492 frag_align (align, 0, 0);
3493
809ffe0d 3494 symbol_set_frag (sym, frag_now);
252b5132
RH		 3495 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3496
931e13a6 3497 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3498 symbol_get_tc (sym)->output = 1;
3499 symbol_get_tc (sym)->within = sym;
81d4177b 3500
252b5132 3501 for (list = *list_ptr;
809ffe0d
ILT		 3502 symbol_get_tc (list)->next != (symbolS *) NULL;
3503 list = symbol_get_tc (list)->next)
252b5132 3504 ;
809ffe0d 3505 symbol_get_tc (list)->next = sym;
81d4177b 3506
252b5132 3507 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3508 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3509 &symbol_lastP);
252b5132
RH		 3510 }
3511
3512 ppc_current_csect = sym;
3513}
3514
85645aed
TG		 3515static void
3516ppc_change_debug_section (unsigned int idx, subsegT subseg)
3517{
3518 segT sec;
3519 flagword oldflags;
3520 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3521
3522 sec = subseg_new (dw->name, subseg);
3523 oldflags = bfd_get_section_flags (stdoutput, sec);
3524 if (oldflags == SEC_NO_FLAGS)
3525 {
3526 /* Just created section. */
3527 gas_assert (dw_sections[idx].sect == NULL);
3528
3529 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3530 bfd_set_section_alignment (stdoutput, sec, 0);
3531 dw_sections[idx].sect = sec;
3532 }
3533
3534 /* Not anymore in a csect. */
3535 ppc_current_csect = NULL;
3536}
3537
3538/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3539 .dwsect flag [, opt-label ]
3540*/
3541
3542static void
3543ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3544{
3545 offsetT flag;
3546 symbolS *opt_label;
3547 const struct xcoff_dwsect_name *dw;
3548 struct dw_subsection *subseg;
3549 struct dw_section *dws;
3550 int i;
3551
3552 /* Find section. */
3553 flag = get_absolute_expression ();
3554 dw = NULL;
3555 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3556 if (xcoff_dwsect_names[i].flag == flag)
3557 {
3558 dw = &xcoff_dwsect_names[i];
3559 break;
3560 }
3561
3562 /* Parse opt-label. */
3563 if (*input_line_pointer == ',')
3564 {
3565 const char *label;
3566 char c;
3567
3568 ++input_line_pointer;
3569
3570 label = input_line_pointer;
3571 c = get_symbol_end ();
3572 opt_label = symbol_find_or_make (label);
3573 *input_line_pointer = c;
3574 }
3575 else
3576 opt_label = NULL;
3577
3578 demand_empty_rest_of_line ();
3579
3580 /* Return now in case of unknown subsection. */
3581 if (dw == NULL)
3582 {
3583 as_bad (_("No known dwarf XCOFF section for flag 0x%08x\n"),
3584 (unsigned)flag);
3585 return;
3586 }
3587
3588 /* Find the subsection. */
3589 dws = &dw_sections[i];
3590 subseg = NULL;
3591 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3592 {
3593 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3594 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3595 {
3596 as_bad (_("label %s was not defined in this dwarf section"),
3597 S_GET_NAME (opt_label));
3598 subseg = dws->anon_subseg;
3599 opt_label = NULL;
3600 }
3601 else
3602 subseg = symbol_get_tc (opt_label)->u.dw;
3603 }
3604
3605 if (subseg != NULL)
3606 {
3607 /* Switch to the subsection. */
3608 ppc_change_debug_section (i, subseg->subseg);
3609 }
3610 else
3611 {
3612 /* Create a new dw subsection. */
3613 subseg = (struct dw_subsection *)
3614 xmalloc (sizeof (struct dw_subsection));
3615
3616 if (opt_label == NULL)
3617 {
3618 /* The anonymous one. */
3619 subseg->subseg = 0;
3620 subseg->link = NULL;
3621 dws->anon_subseg = subseg;
3622 }
3623 else
3624 {
3625 /* A named one. */
3626 if (dws->list_subseg != NULL)
3627 subseg->subseg = dws->list_subseg->subseg + 1;
3628 else
3629 subseg->subseg = 1;
3630
3631 subseg->link = dws->list_subseg;
3632 dws->list_subseg = subseg;
3633 symbol_get_tc (opt_label)->u.dw = subseg;
3634 }
3635
3636 ppc_change_debug_section (i, subseg->subseg);
3637
3638 if (dw->def_size)
3639 {
3640 /* Add the length field. */
3641 expressionS *exp = &subseg->end_exp;
3642 int sz;
3643
3644 if (opt_label != NULL)
3645 symbol_set_value_now (opt_label);
3646
3647 /* Add the length field. Note that according to the AIX assembler
3648 manual, the size of the length field is 4 for powerpc32 but
3649 12 for powerpc64. */
3650 if (ppc_obj64)
3651 {
3652 /* Write the 64bit marker. */
3653 md_number_to_chars (frag_more (4), -1, 4);
3654 }
3655
3656 exp->X_op = O_subtract;
3657 exp->X_op_symbol = symbol_temp_new_now ();
3658 exp->X_add_symbol = symbol_temp_make ();
3659
3660 sz = ppc_obj64 ? 8 : 4;
3661 exp->X_add_number = -sz;
3662 emit_expr (exp, sz);
3663 }
3664 }
3665}
3666
252b5132
RH		 3667/* This function handles the .text and .data pseudo-ops. These
3668 pseudo-ops aren't really used by XCOFF; we implement them for the
3669 convenience of people who aren't used to XCOFF. */
3670
3671static void
98027b10 3672ppc_section (int type)
252b5132
RH		 3673{
3674 const char *name;
3675 symbolS *sym;
3676
3677 if (type == 't')
3678 name = ".text[PR]";
3679 else if (type == 'd')
3680 name = ".data[RW]";
3681 else
3682 abort ();
3683
3684 sym = symbol_find_or_make (name);
3685
931e13a6 3686 ppc_change_csect (sym, 2);
252b5132
RH		 3687
3688 demand_empty_rest_of_line ();
3689}
3690
3691/* This function handles the .section pseudo-op. This is mostly to
3692 give an error, since XCOFF only supports .text, .data and .bss, but
3693 we do permit the user to name the text or data section. */
3694
3695static void
98027b10 3696ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3697{
3698 char *user_name;
3699 const char *real_name;
3700 char c;
3701 symbolS *sym;
3702
3703 user_name = input_line_pointer;
3704 c = get_symbol_end ();
3705
3706 if (strcmp (user_name, ".text") == 0)
3707 real_name = ".text[PR]";
3708 else if (strcmp (user_name, ".data") == 0)
3709 real_name = ".data[RW]";
3710 else
3711 {
3712 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3713 *input_line_pointer = c;
3714 ignore_rest_of_line ();
3715 return;
3716 }
3717
3718 *input_line_pointer = c;
3719
3720 sym = symbol_find_or_make (real_name);
3721
931e13a6 3722 ppc_change_csect (sym, 2);
252b5132
RH		 3723
3724 demand_empty_rest_of_line ();
3725}
3726
3727/* The .extern pseudo-op. We create an undefined symbol. */
3728
3729static void
98027b10 3730ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3731{
3732 char *name;
3733 char endc;
3734
3735 name = input_line_pointer;
3736 endc = get_symbol_end ();
3737
3738 (void) symbol_find_or_make (name);
3739
3740 *input_line_pointer = endc;
3741
3742 demand_empty_rest_of_line ();
3743}
3744
3745/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3746
3747static void
98027b10 3748ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3749{
3750 char *name;
3751 char endc;
3752 symbolS *sym;
3753
3754 name = input_line_pointer;
3755 endc = get_symbol_end ();
3756
3757 sym = symbol_find_or_make (name);
3758
3759 *input_line_pointer = endc;
3760
809ffe0d 3761 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3762
3763 demand_empty_rest_of_line ();
3764}
3765
c865e45b
RS		 3766/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
3767 relocations at the beginning of the current csect.
3768
3769 (In principle, there's no reason why the relocations _have_ to be at
3770 the beginning. Anywhere in the csect would do. However, inserting
3771 at the beginning is what the native assmebler does, and it helps to
3772 deal with cases where the .ref statements follow the section contents.)
3773
3774 ??? .refs don't work for empty .csects. However, the native assembler
3775 doesn't report an error in this case, and neither yet do we. */
3776
3777static void
3778ppc_ref (int ignore ATTRIBUTE_UNUSED)
3779{
3780 char *name;
3781 char c;
3782
3783 if (ppc_current_csect == NULL)
3784 {
3785 as_bad (_(".ref outside .csect"));
3786 ignore_rest_of_line ();
3787 return;
3788 }
3789
3790 do
3791 {
3792 name = input_line_pointer;
3793 c = get_symbol_end ();
3794
3795 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
3796 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
3797
3798 *input_line_pointer = c;
3799 SKIP_WHITESPACE ();
3800 c = *input_line_pointer;
3801 if (c == ',')
3802 {
3803 input_line_pointer++;
3804 SKIP_WHITESPACE ();
3805 if (is_end_of_line[(unsigned char) *input_line_pointer])
3806 {
3807 as_bad (_("missing symbol name"));
3808 ignore_rest_of_line ();
3809 return;
3810 }
3811 }
3812 }
3813 while (c == ',');
3814
3815 demand_empty_rest_of_line ();
3816}
3817
252b5132
RH		 3818/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3819 although I don't know why it bothers. */
3820
3821static void
98027b10 3822ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3823{
3824 char *name;
3825 char endc;
3826 symbolS *sym;
3827 int len;
3828
3829 name = input_line_pointer;
3830 endc = get_symbol_end ();
3831
3832 sym = symbol_find_or_make (name);
3833
3834 *input_line_pointer = endc;
3835
3836 if (*input_line_pointer != ',')
3837 {
3838 as_bad (_("missing rename string"));
3839 ignore_rest_of_line ();
3840 return;
3841 }
3842 ++input_line_pointer;
3843
809ffe0d 3844 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3845
3846 demand_empty_rest_of_line ();
3847}
3848
3849/* The .stabx pseudo-op. This is similar to a normal .stabs
3850 pseudo-op, but slightly different. A sample is
3851 .stabx "main:F-1",.main,142,0
3852 The first argument is the symbol name to create. The second is the
3853 value, and the third is the storage class. The fourth seems to be
3854 always zero, and I am assuming it is the type. */
3855
3856static void
98027b10 3857ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3858{
3859 char *name;
3860 int len;
3861 symbolS *sym;
3862 expressionS exp;
3863
3864 name = demand_copy_C_string (&len);
3865
3866 if (*input_line_pointer != ',')
3867 {
3868 as_bad (_("missing value"));
3869 return;
3870 }
3871 ++input_line_pointer;
3872
b34976b6 3873 ppc_stab_symbol = TRUE;
252b5132 3874 sym = symbol_make (name);
b34976b6 3875 ppc_stab_symbol = FALSE;
252b5132 3876
809ffe0d 3877 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3878
3879 (void) expression (&exp);
3880
3881 switch (exp.X_op)
3882 {
3883 case O_illegal:
3884 case O_absent:
3885 case O_big:
3886 as_bad (_("illegal .stabx expression; zero assumed"));
3887 exp.X_add_number = 0;
3888 /* Fall through. */
3889 case O_constant:
3890 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3891 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3892 break;
3893
3894 case O_symbol:
3895 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3896 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3897 else
3898 {
3899 S_SET_VALUE (sym,
3900 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3901 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3902 }
3903 break;
3904
3905 default:
3906 /* The value is some complex expression. This will probably
99a814a1
AM		 3907 fail at some later point, but this is probably the right
3908 thing to do here. */
809ffe0d 3909 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3910 break;
3911 }
3912
3913 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3914 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3915
3916 if (*input_line_pointer != ',')
3917 {
3918 as_bad (_("missing class"));
3919 return;
3920 }
3921 ++input_line_pointer;
3922
3923 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3924
3925 if (*input_line_pointer != ',')
3926 {
3927 as_bad (_("missing type"));
3928 return;
3929 }
3930 ++input_line_pointer;
3931
3932 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3933
809ffe0d 3934 symbol_get_tc (sym)->output = 1;
252b5132 3935
c734e7e3
TG		 3936 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
3937 {
3938 /* In this case :
252b5132 3939
c734e7e3
TG		 3940 .bs name
3941 .stabx "z",arrays_,133,0
3942 .es
99a814a1 3943
c734e7e3 3944 .comm arrays_,13768,3
99a814a1 3945
c734e7e3
TG		 3946 resolve_symbol_value will copy the exp's "within" into sym's when the
3947 offset is 0. Since this seems to be corner case problem,
3948 only do the correction for storage class C_STSYM. A better solution
3949 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 3950
c734e7e3
TG		 3951 if (exp.X_op == O_symbol)
3952 {
3953 if (ppc_current_block == NULL)
3954 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 3955
c734e7e3
TG		 3956 symbol_get_tc (sym)->within = ppc_current_block;
3957 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3958 }
3959 }
99a814a1 3960
252b5132
RH		 3961 if (exp.X_op != O_symbol
3962 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3963 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3964 ppc_frob_label (sym);
3965 else
3966 {
3967 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3968 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3969 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3970 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3971 }
3972
3973 demand_empty_rest_of_line ();
3974}
3975
3976/* The .function pseudo-op. This takes several arguments. The first
3977 argument seems to be the external name of the symbol. The second
67c1ffbe 3978 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3979 uses the same name for both. I have no idea what the third and
3980 fourth arguments are meant to be. The optional fifth argument is
3981 an expression for the size of the function. In COFF this symbol
3982 gets an aux entry like that used for a csect. */
3983
3984static void
98027b10 3985ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3986{
3987 char *name;
3988 char endc;
3989 char *s;
3990 symbolS *ext_sym;
3991 symbolS *lab_sym;
3992
3993 name = input_line_pointer;
3994 endc = get_symbol_end ();
3995
3996 /* Ignore any [PR] suffix. */
3997 name = ppc_canonicalize_symbol_name (name);
3998 s = strchr (name, '[');
3999 if (s != (char *) NULL
4000 && strcmp (s + 1, "PR]") == 0)
4001 *s = '\0';
4002
4003 ext_sym = symbol_find_or_make (name);
4004
4005 *input_line_pointer = endc;
4006
4007 if (*input_line_pointer != ',')
4008 {
4009 as_bad (_("missing symbol name"));
4010 ignore_rest_of_line ();
4011 return;
4012 }
4013 ++input_line_pointer;
4014
4015 name = input_line_pointer;
4016 endc = get_symbol_end ();
4017
4018 lab_sym = symbol_find_or_make (name);
4019
4020 *input_line_pointer = endc;
4021
4022 if (ext_sym != lab_sym)
4023 {
809ffe0d
ILT		 4024 expressionS exp;
4025
4026 exp.X_op = O_symbol;
4027 exp.X_add_symbol = lab_sym;
4028 exp.X_op_symbol = NULL;
4029 exp.X_add_number = 0;
4030 exp.X_unsigned = 0;
4031 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4032 }
4033
96d56e9f
NC		 4034 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4035 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4036 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4037
4038 if (*input_line_pointer == ',')
4039 {
91d6fa6a 4040 expressionS exp;
252b5132
RH		 4041
4042 /* Ignore the third argument. */
4043 ++input_line_pointer;
91d6fa6a 4044 expression (& exp);
252b5132
RH		 4045 if (*input_line_pointer == ',')
4046 {
4047 /* Ignore the fourth argument. */
4048 ++input_line_pointer;
91d6fa6a 4049 expression (& exp);
252b5132
RH		 4050 if (*input_line_pointer == ',')
4051 {
4052 /* The fifth argument is the function size. */
4053 ++input_line_pointer;
85645aed
TG		 4054 symbol_get_tc (ext_sym)->u.size = symbol_new
4055 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4056 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4057 }
4058 }
4059 }
4060
4061 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4062 SF_SET_FUNCTION (ext_sym);
4063 SF_SET_PROCESS (ext_sym);
4064 coff_add_linesym (ext_sym);
4065
4066 demand_empty_rest_of_line ();
4067}
4068
4069/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4070 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4071 with the correct line number */
5d6255fe 4072
8642cce8 4073static symbolS *saved_bi_sym = 0;
252b5132
RH		 4074
4075static void
98027b10 4076ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4077{
4078 symbolS *sym;
4079
4080 sym = symbol_make (".bf");
4081 S_SET_SEGMENT (sym, text_section);
809ffe0d 4082 symbol_set_frag (sym, frag_now);
252b5132
RH		 4083 S_SET_VALUE (sym, frag_now_fix ());
4084 S_SET_STORAGE_CLASS (sym, C_FCN);
4085
4086 coff_line_base = get_absolute_expression ();
4087
4088 S_SET_NUMBER_AUXILIARY (sym, 1);
4089 SA_SET_SYM_LNNO (sym, coff_line_base);
4090
8642cce8 4091 /* Line number for bi. */
5d6255fe 4092 if (saved_bi_sym)
8642cce8
TR		 4093 {
4094 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4095 saved_bi_sym = 0;
4096 }
5d6255fe 4097
8642cce8 4098
809ffe0d 4099 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4100
4101 ppc_frob_label (sym);
4102
4103 demand_empty_rest_of_line ();
4104}
4105
4106/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4107 ".ef", except that the line number is absolute, not relative to the
4108 most recent ".bf" symbol. */
4109
4110static void
98027b10 4111ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4112{
4113 symbolS *sym;
4114
4115 sym = symbol_make (".ef");
4116 S_SET_SEGMENT (sym, text_section);
809ffe0d 4117 symbol_set_frag (sym, frag_now);
252b5132
RH		 4118 S_SET_VALUE (sym, frag_now_fix ());
4119 S_SET_STORAGE_CLASS (sym, C_FCN);
4120 S_SET_NUMBER_AUXILIARY (sym, 1);
4121 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4122 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4123
4124 ppc_frob_label (sym);
4125
4126 demand_empty_rest_of_line ();
4127}
4128
4129/* The .bi and .ei pseudo-ops. These take a string argument and
4130 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4131 the symbol list. The value of .bi will be know when the next .bf
4132 is encountered. */
252b5132
RH		 4133
4134static void
98027b10 4135ppc_biei (int ei)
252b5132
RH		 4136{
4137 static symbolS *last_biei;
4138
4139 char *name;
4140 int len;
4141 symbolS *sym;
4142 symbolS *look;
4143
4144 name = demand_copy_C_string (&len);
4145
4146 /* The value of these symbols is actually file offset. Here we set
4147 the value to the index into the line number entries. In
4148 ppc_frob_symbols we set the fix_line field, which will cause BFD
4149 to do the right thing. */
4150
4151 sym = symbol_make (name);
4152 /* obj-coff.c currently only handles line numbers correctly in the
4153 .text section. */
4154 S_SET_SEGMENT (sym, text_section);
4155 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4156 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4157
4158 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4159 symbol_get_tc (sym)->output = 1;
81d4177b 4160
8642cce8 4161 /* Save bi. */
5d6255fe 4162 if (ei)
8642cce8
TR		 4163 saved_bi_sym = 0;
4164 else
4165 saved_bi_sym = sym;
4166
252b5132
RH		 4167 for (look = last_biei ? last_biei : symbol_rootP;
4168 (look != (symbolS *) NULL
4169 && (S_GET_STORAGE_CLASS (look) == C_FILE
4170 || S_GET_STORAGE_CLASS (look) == C_BINCL
4171 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4172 look = symbol_next (look))
4173 ;
4174 if (look != (symbolS *) NULL)
4175 {
4176 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4177 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4178 last_biei = sym;
4179 }
4180
4181 demand_empty_rest_of_line ();
4182}
4183
4184/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4185 There is one argument, which is a csect symbol. The value of the
4186 .bs symbol is the index of this csect symbol. */
4187
4188static void
98027b10 4189ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4190{
4191 char *name;
4192 char endc;
4193 symbolS *csect;
4194 symbolS *sym;
4195
4196 if (ppc_current_block != NULL)
4197 as_bad (_("nested .bs blocks"));
4198
4199 name = input_line_pointer;
4200 endc = get_symbol_end ();
4201
4202 csect = symbol_find_or_make (name);
4203
4204 *input_line_pointer = endc;
4205
4206 sym = symbol_make (".bs");
4207 S_SET_SEGMENT (sym, now_seg);
4208 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4209 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4210 symbol_get_tc (sym)->output = 1;
252b5132 4211
809ffe0d 4212 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4213
4214 ppc_frob_label (sym);
4215
4216 ppc_current_block = sym;
4217
4218 demand_empty_rest_of_line ();
4219}
4220
4221/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4222
4223static void
98027b10 4224ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4225{
4226 symbolS *sym;
4227
4228 if (ppc_current_block == NULL)
4229 as_bad (_(".es without preceding .bs"));
4230
4231 sym = symbol_make (".es");
4232 S_SET_SEGMENT (sym, now_seg);
4233 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4234 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4235 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4236
4237 ppc_frob_label (sym);
4238
4239 ppc_current_block = NULL;
4240
4241 demand_empty_rest_of_line ();
4242}
4243
4244/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4245 line number. */
4246
4247static void
98027b10 4248ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4249{
4250 symbolS *sym;
4251
4252 sym = symbol_make (".bb");
4253 S_SET_SEGMENT (sym, text_section);
809ffe0d 4254 symbol_set_frag (sym, frag_now);
252b5132
RH		 4255 S_SET_VALUE (sym, frag_now_fix ());
4256 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4257
4258 S_SET_NUMBER_AUXILIARY (sym, 1);
4259 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4260
809ffe0d 4261 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4262
4263 SF_SET_PROCESS (sym);
4264
4265 ppc_frob_label (sym);
4266
4267 demand_empty_rest_of_line ();
4268}
4269
4270/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4271 line number. */
4272
4273static void
98027b10 4274ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4275{
4276 symbolS *sym;
4277
4278 sym = symbol_make (".eb");
4279 S_SET_SEGMENT (sym, text_section);
809ffe0d 4280 symbol_set_frag (sym, frag_now);
252b5132
RH		 4281 S_SET_VALUE (sym, frag_now_fix ());
4282 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4283 S_SET_NUMBER_AUXILIARY (sym, 1);
4284 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4285 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4286
4287 SF_SET_PROCESS (sym);
4288
4289 ppc_frob_label (sym);
4290
4291 demand_empty_rest_of_line ();
4292}
4293
4294/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4295 specified name. */
4296
4297static void
98027b10 4298ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4299{
4300 char *name;
4301 int len;
4302 symbolS *sym;
4303
4304 name = demand_copy_C_string (&len);
4305 sym = symbol_make (name);
4306 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4307 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4308 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4309 S_SET_VALUE (sym, 0);
809ffe0d 4310 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4311
4312 ppc_frob_label (sym);
4313
4314 demand_empty_rest_of_line ();
4315}
4316
4317/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4318
4319static void
98027b10 4320ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4321{
4322 symbolS *sym;
4323
4324 sym = symbol_make (".ec");
4325 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4326 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4327 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4328 S_SET_VALUE (sym, 0);
809ffe0d 4329 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4330
4331 ppc_frob_label (sym);
4332
4333 demand_empty_rest_of_line ();
4334}
4335
4336/* The .toc pseudo-op. Switch to the .toc subsegment. */
4337
4338static void
98027b10 4339ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4340{
4341 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4342 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4343 else
4344 {
4345 subsegT subseg;
4346 symbolS *sym;
4347 symbolS *list;
81d4177b 4348
252b5132
RH		 4349 subseg = ppc_data_subsegment;
4350 ++ppc_data_subsegment;
4351
4352 subseg_new (segment_name (data_section), subseg);
4353 ppc_toc_frag = frag_now;
4354
4355 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4356 symbol_set_frag (sym, frag_now);
252b5132
RH		 4357 S_SET_SEGMENT (sym, data_section);
4358 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4359 symbol_get_tc (sym)->subseg = subseg;
4360 symbol_get_tc (sym)->output = 1;
4361 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4362
4363 ppc_toc_csect = sym;
81d4177b 4364
252b5132 4365 for (list = ppc_data_csects;
809ffe0d
ILT		 4366 symbol_get_tc (list)->next != (symbolS *) NULL;
4367 list = symbol_get_tc (list)->next)
252b5132 4368 ;
809ffe0d 4369 symbol_get_tc (list)->next = sym;
252b5132
RH		 4370
4371 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4372 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4373 &symbol_lastP);
252b5132
RH		 4374 }
4375
4376 ppc_current_csect = ppc_toc_csect;
4377
4378 demand_empty_rest_of_line ();
4379}
4380
4381/* The AIX assembler automatically aligns the operands of a .long or
4382 .short pseudo-op, and we want to be compatible. */
4383
4384static void
98027b10 4385ppc_xcoff_cons (int log_size)
252b5132
RH		 4386{
4387 frag_align (log_size, 0, 0);
4388 record_alignment (now_seg, log_size);
4389 cons (1 << log_size);
4390}
4391
4392static void
98027b10 4393ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4394{
4395 expressionS exp;
4396 int byte_count;
4397
4398 (void) expression (&exp);
4399
4400 if (exp.X_op != O_constant)
4401 {
4402 as_bad (_("non-constant byte count"));
4403 return;
4404 }
4405
4406 byte_count = exp.X_add_number;
4407
4408 if (*input_line_pointer != ',')
4409 {
4410 as_bad (_("missing value"));
4411 return;
4412 }
4413
4414 ++input_line_pointer;
4415 cons (byte_count);
4416}
4417
85645aed
TG		 4418void
4419ppc_xcoff_end (void)
4420{
4421 int i;
4422
4423 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4424 {
4425 struct dw_section *dws = &dw_sections[i];
4426 struct dw_subsection *dwss;
4427
4428 if (dws->anon_subseg)
4429 {
4430 dwss = dws->anon_subseg;
4431 dwss->link = dws->list_subseg;
4432 }
4433 else
4434 dwss = dws->list_subseg;
4435
4436 for (; dwss != NULL; dwss = dwss->link)
4437 if (dwss->end_exp.X_add_symbol != NULL)
4438 {
4439 subseg_set (dws->sect, dwss->subseg);
4440 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4441 }
4442 }
4443}
4444
252b5132 4445#endif /* OBJ_XCOFF */
0baf16f2 4446#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4447\f
4448/* The .tc pseudo-op. This is used when generating either XCOFF or
4449 ELF. This takes two or more arguments.
4450
4451 When generating XCOFF output, the first argument is the name to
4452 give to this location in the toc; this will be a symbol with class
0baf16f2 4453 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4454 this location in the TOC; often there is just one more argument, a
1049f94e 4455 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4456 depends on target word size. A 32-bit target uses 4-byte values, a
4457 64-bit target uses 8-byte values.
252b5132
RH		 4458
4459 When not generating XCOFF output, the arguments are the same, but
4460 the first argument is simply ignored. */
4461
4462static void
98027b10 4463ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4464{
4465#ifdef OBJ_XCOFF
4466
4467 /* Define the TOC symbol name. */
4468 {
4469 char *name;
4470 char endc;
4471 symbolS *sym;
4472
4473 if (ppc_toc_csect == (symbolS *) NULL
4474 || ppc_toc_csect != ppc_current_csect)
4475 {
4476 as_bad (_(".tc not in .toc section"));
4477 ignore_rest_of_line ();
4478 return;
4479 }
4480
4481 name = input_line_pointer;
4482 endc = get_symbol_end ();
4483
4484 sym = symbol_find_or_make (name);
4485
4486 *input_line_pointer = endc;
4487
4488 if (S_IS_DEFINED (sym))
4489 {
4490 symbolS *label;
4491
809ffe0d 4492 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4493 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4494 {
4495 as_bad (_(".tc with no label"));
4496 ignore_rest_of_line ();
4497 return;
4498 }
4499
4500 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4501 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4502 S_SET_VALUE (label, S_GET_VALUE (sym));
4503
4504 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4505 ++input_line_pointer;
4506
4507 return;
4508 }
4509
4510 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4511 symbol_set_frag (sym, frag_now);
252b5132 4512 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4513 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4514 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4515
4516 ppc_frob_label (sym);
4517 }
4518
0baf16f2
AM		 4519#endif /* OBJ_XCOFF */
4520#ifdef OBJ_ELF
9c7977b3 4521 int align;
252b5132
RH		 4522
4523 /* Skip the TOC symbol name. */
4524 while (is_part_of_name (*input_line_pointer)
d13d4015 4525 || *input_line_pointer == ' '
252b5132
RH		 4526 || *input_line_pointer == '['
4527 || *input_line_pointer == ']'
4528 || *input_line_pointer == '{'
4529 || *input_line_pointer == '}')
4530 ++input_line_pointer;
4531
0baf16f2 4532 /* Align to a four/eight byte boundary. */
2b3c4602 4533 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4534 frag_align (align, 0, 0);
4535 record_alignment (now_seg, align);
0baf16f2 4536#endif /* OBJ_ELF */
252b5132
RH		 4537
4538 if (*input_line_pointer != ',')
4539 demand_empty_rest_of_line ();
4540 else
4541 {
4542 ++input_line_pointer;
2b3c4602 4543 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4544 }
4545}
0baf16f2
AM		 4546
4547/* Pseudo-op .machine. */
0baf16f2
AM		 4548
4549static void
98027b10 4550ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4551{
69c040df
AM		 4552 char *cpu_string;
4553#define MAX_HISTORY 100
fa452fa6 4554 static ppc_cpu_t *cpu_history;
69c040df
AM		 4555 static int curr_hist;
4556
4557 SKIP_WHITESPACE ();
4558
4559 if (*input_line_pointer == '"')
4560 {
4561 int len;
4562 cpu_string = demand_copy_C_string (&len);
4563 }
4564 else
4565 {
4566 char c;
4567 cpu_string = input_line_pointer;
4568 c = get_symbol_end ();
4569 cpu_string = xstrdup (cpu_string);
4570 *input_line_pointer = c;
4571 }
4572
4573 if (cpu_string != NULL)
4574 {
fa452fa6 4575 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4576 ppc_cpu_t new_cpu;
69c040df
AM		 4577 char *p;
4578
4579 for (p = cpu_string; *p != 0; p++)
4580 *p = TOLOWER (*p);
4581
4582 if (strcmp (cpu_string, "push") == 0)
4583 {
4584 if (cpu_history == NULL)
4585 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4586
4587 if (curr_hist >= MAX_HISTORY)
4588 as_bad (_(".machine stack overflow"));
4589 else
4590 cpu_history[curr_hist++] = ppc_cpu;
4591 }
4592 else if (strcmp (cpu_string, "pop") == 0)
4593 {
4594 if (curr_hist <= 0)
4595 as_bad (_(".machine stack underflow"));
4596 else
4597 ppc_cpu = cpu_history[--curr_hist];
4598 }
69fe9ce5
AM		 4599 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4600 ppc_cpu = new_cpu;
69c040df
AM		 4601 else
4602 as_bad (_("invalid machine `%s'"), cpu_string);
4603
4604 if (ppc_cpu != old_cpu)
4605 ppc_setup_opcodes ();
4606 }
4607
4608 demand_empty_rest_of_line ();
0baf16f2
AM		 4609}
4610
4611/* See whether a symbol is in the TOC section. */
4612
4613static int
98027b10 4614ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4615{
4616#ifdef OBJ_XCOFF
96d56e9f 4617 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4618#endif
4619#ifdef OBJ_ELF
4620 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4621 if (ppc_obj64)
0baf16f2
AM		 4622 return strcmp (sname, ".toc") == 0;
4623 else
4624 return strcmp (sname, ".got") == 0;
4625#endif
4626}
4627#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4628\f
4629#ifdef TE_PE
4630
99a814a1 4631/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4632
4633/* Set the current section. */
4634static void
98027b10 4635ppc_set_current_section (segT new)
252b5132
RH		 4636{
4637 ppc_previous_section = ppc_current_section;
4638 ppc_current_section = new;
4639}
4640
4641/* pseudo-op: .previous
4642 behaviour: toggles the current section with the previous section.
4643 errors: None
99a814a1
AM		 4644 warnings: "No previous section" */
4645
252b5132 4646static void
98027b10 4647ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4648{
4649 symbolS *tmp;
4650
81d4177b 4651 if (ppc_previous_section == NULL)
252b5132 4652 {
99a814a1 4653 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4654 return;
4655 }
4656
99a814a1 4657 subseg_set (ppc_previous_section, 0);
252b5132 4658
99a814a1 4659 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4660}
4661
4662/* pseudo-op: .pdata
4663 behaviour: predefined read only data section
b34976b6 4664 double word aligned
252b5132
RH		 4665 errors: None
4666 warnings: None
4667 initial: .section .pdata "adr3"
b34976b6 4668 a - don't know -- maybe a misprint
252b5132
RH		 4669 d - initialized data
4670 r - readable
4671 3 - double word aligned (that would be 4 byte boundary)
4672
4673 commentary:
4674 Tag index tables (also known as the function table) for exception
99a814a1 4675 handling, debugging, etc. */
252b5132 4676
252b5132 4677static void
98027b10 4678ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4679{
81d4177b 4680 if (pdata_section == 0)
252b5132
RH		 4681 {
4682 pdata_section = subseg_new (".pdata", 0);
81d4177b 4683
252b5132
RH		 4684 bfd_set_section_flags (stdoutput, pdata_section,
4685 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4686 | SEC_READONLY | SEC_DATA ));
81d4177b 4687
252b5132
RH		 4688 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4689 }
4690 else
4691 {
99a814a1 4692 pdata_section = subseg_new (".pdata", 0);
252b5132 4693 }
99a814a1 4694 ppc_set_current_section (pdata_section);
252b5132
RH		 4695}
4696
4697/* pseudo-op: .ydata
4698 behaviour: predefined read only data section
b34976b6 4699 double word aligned
252b5132
RH		 4700 errors: None
4701 warnings: None
4702 initial: .section .ydata "drw3"
b34976b6 4703 a - don't know -- maybe a misprint
252b5132
RH		 4704 d - initialized data
4705 r - readable
4706 3 - double word aligned (that would be 4 byte boundary)
4707 commentary:
4708 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4709 debugging, etc. */
4710
252b5132 4711static void
98027b10 4712ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4713{
81d4177b 4714 if (ydata_section == 0)
252b5132
RH		 4715 {
4716 ydata_section = subseg_new (".ydata", 0);
4717 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4718 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4719 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4720
4721 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4722 }
4723 else
4724 {
4725 ydata_section = subseg_new (".ydata", 0);
4726 }
99a814a1 4727 ppc_set_current_section (ydata_section);
252b5132
RH		 4728}
4729
4730/* pseudo-op: .reldata
4731 behaviour: predefined read write data section
b34976b6 4732 double word aligned (4-byte)
252b5132
RH		 4733 FIXME: relocation is applied to it
4734 FIXME: what's the difference between this and .data?
4735 errors: None
4736 warnings: None
4737 initial: .section .reldata "drw3"
4738 d - initialized data
4739 r - readable
4740 w - writeable
4741 3 - double word aligned (that would be 8 byte boundary)
4742
4743 commentary:
4744 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4745 function descriptors, etc. */
4746
252b5132 4747static void
98027b10 4748ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4749{
4750 if (reldata_section == 0)
4751 {
4752 reldata_section = subseg_new (".reldata", 0);
4753
4754 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4755 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4756 | SEC_DATA));
252b5132
RH		 4757
4758 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4759 }
4760 else
4761 {
4762 reldata_section = subseg_new (".reldata", 0);
4763 }
99a814a1 4764 ppc_set_current_section (reldata_section);
252b5132
RH		 4765}
4766
4767/* pseudo-op: .rdata
4768 behaviour: predefined read only data section
b34976b6 4769 double word aligned
252b5132
RH		 4770 errors: None
4771 warnings: None
4772 initial: .section .rdata "dr3"
4773 d - initialized data
4774 r - readable
99a814a1
AM		 4775 3 - double word aligned (that would be 4 byte boundary) */
4776
252b5132 4777static void
98027b10 4778ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4779{
4780 if (rdata_section == 0)
4781 {
4782 rdata_section = subseg_new (".rdata", 0);
4783 bfd_set_section_flags (stdoutput, rdata_section,
4784 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4785 | SEC_READONLY | SEC_DATA ));
4786
4787 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4788 }
4789 else
4790 {
4791 rdata_section = subseg_new (".rdata", 0);
4792 }
99a814a1 4793 ppc_set_current_section (rdata_section);
252b5132
RH		 4794}
4795
4796/* pseudo-op: .ualong
81d4177b 4797 behaviour: much like .int, with the exception that no alignment is
b34976b6 4798 performed.
252b5132
RH		 4799 FIXME: test the alignment statement
4800 errors: None
99a814a1
AM		 4801 warnings: None */
4802
252b5132 4803static void
98027b10 4804ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4805{
99a814a1
AM		 4806 /* Try for long. */
4807 cons (4);
252b5132
RH		 4808}
4809
4810/* pseudo-op: .znop <symbol name>
4811 behaviour: Issue a nop instruction
b34976b6 4812 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4813 the supplied symbol name.
4814 errors: None
99a814a1
AM		 4815 warnings: Missing symbol name */
4816
252b5132 4817static void
98027b10 4818ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4819{
4820 unsigned long insn;
4821 const struct powerpc_opcode *opcode;
4822 expressionS ex;
4823 char *f;
252b5132 4824 symbolS *sym;
252b5132
RH		 4825 char *symbol_name;
4826 char c;
4827 char *name;
4828 unsigned int exp;
4829 flagword flags;
4830 asection *sec;
4831
99a814a1 4832 /* Strip out the symbol name. */
252b5132
RH		 4833 symbol_name = input_line_pointer;
4834 c = get_symbol_end ();
4835
4836 name = xmalloc (input_line_pointer - symbol_name + 1);
4837 strcpy (name, symbol_name);
4838
4839 sym = symbol_find_or_make (name);
4840
4841 *input_line_pointer = c;
4842
4843 SKIP_WHITESPACE ();
4844
4845 /* Look up the opcode in the hash table. */
4846 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4847
99a814a1 4848 /* Stick in the nop. */
252b5132
RH		 4849 insn = opcode->opcode;
4850
4851 /* Write out the instruction. */
4852 f = frag_more (4);
4853 md_number_to_chars (f, insn, 4);
4854 fix_new (frag_now,
4855 f - frag_now->fr_literal,
4856 4,
4857 sym,
4858 0,
4859 0,
4860 BFD_RELOC_16_GOT_PCREL);
4861
4862}
4863
81d4177b
KH		 4864/* pseudo-op:
4865 behaviour:
4866 errors:
99a814a1
AM		 4867 warnings: */
4868
252b5132 4869static void
98027b10 4870ppc_pe_comm (int lcomm)
252b5132 4871{
98027b10
AM		 4872 char *name;
4873 char c;
4874 char *p;
252b5132 4875 offsetT temp;
98027b10 4876 symbolS *symbolP;
252b5132
RH		 4877 offsetT align;
4878
4879 name = input_line_pointer;
4880 c = get_symbol_end ();
4881
99a814a1 4882 /* just after name is now '\0'. */
252b5132
RH		 4883 p = input_line_pointer;
4884 *p = c;
4885 SKIP_WHITESPACE ();
4886 if (*input_line_pointer != ',')
4887 {
4888 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4889 ignore_rest_of_line ();
4890 return;
4891 }
4892
4893 input_line_pointer++; /* skip ',' */
4894 if ((temp = get_absolute_expression ()) < 0)
4895 {
4896 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4897 ignore_rest_of_line ();
4898 return;
4899 }
4900
4901 if (! lcomm)
4902 {
4903 /* The third argument to .comm is the alignment. */
4904 if (*input_line_pointer != ',')
4905 align = 3;
4906 else
4907 {
4908 ++input_line_pointer;
4909 align = get_absolute_expression ();
4910 if (align <= 0)
4911 {
4912 as_warn (_("ignoring bad alignment"));
4913 align = 3;
4914 }
4915 }
4916 }
4917
4918 *p = 0;
4919 symbolP = symbol_find_or_make (name);
4920
4921 *p = c;
4922 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4923 {
4924 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4925 S_GET_NAME (symbolP));
4926 ignore_rest_of_line ();
4927 return;
4928 }
4929
4930 if (S_GET_VALUE (symbolP))
4931 {
4932 if (S_GET_VALUE (symbolP) != (valueT) temp)
4933 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4934 S_GET_NAME (symbolP),
4935 (long) S_GET_VALUE (symbolP),
4936 (long) temp);
4937 }
4938 else
4939 {
4940 S_SET_VALUE (symbolP, (valueT) temp);
4941 S_SET_EXTERNAL (symbolP);
86ebace2 4942 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4943 }
4944
4945 demand_empty_rest_of_line ();
4946}
4947
4948/*
4949 * implement the .section pseudo op:
4950 * .section name {, "flags"}
4951 * ^ ^
4952 * | +--- optional flags: 'b' for bss
4953 * | 'i' for info
4954 * +-- section name 'l' for lib
4955 * 'n' for noload
4956 * 'o' for over
4957 * 'w' for data
4958 * 'd' (apparently m88k for data)
4959 * 'x' for text
4960 * But if the argument is not a quoted string, treat it as a
4961 * subsegment number.
4962 *
4963 * FIXME: this is a copy of the section processing from obj-coff.c, with
4964 * additions/changes for the moto-pas assembler support. There are three
4965 * categories:
4966 *
81d4177b 4967 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4968 * setting bits that bfd probably neither understands or uses. The
4969 * correct approach (?) will have to incorporate extra fields attached
4970 * to the section to hold the system specific stuff. (krk)
4971 *
4972 * Section Contents:
4973 * 'a' - unknown - referred to in documentation, but no definition supplied
4974 * 'c' - section has code
4975 * 'd' - section has initialized data
4976 * 'u' - section has uninitialized data
4977 * 'i' - section contains directives (info)
4978 * 'n' - section can be discarded
4979 * 'R' - remove section at link time
4980 *
4981 * Section Protection:
4982 * 'r' - section is readable
4983 * 'w' - section is writeable
4984 * 'x' - section is executable
4985 * 's' - section is sharable
4986 *
4987 * Section Alignment:
4988 * '0' - align to byte boundary
4989 * '1' - align to halfword undary
4990 * '2' - align to word boundary
4991 * '3' - align to doubleword boundary
4992 * '4' - align to quadword boundary
4993 * '5' - align to 32 byte boundary
4994 * '6' - align to 64 byte boundary
4995 *
4996 */
4997
4998void
98027b10 4999ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 5000{
99a814a1 5001 /* Strip out the section name. */
252b5132
RH		 5002 char *section_name;
5003 char c;
5004 char *name;
5005 unsigned int exp;
5006 flagword flags;
5007 segT sec;
5008 int align;
5009
5010 section_name = input_line_pointer;
5011 c = get_symbol_end ();
5012
5013 name = xmalloc (input_line_pointer - section_name + 1);
5014 strcpy (name, section_name);
5015
5016 *input_line_pointer = c;
5017
5018 SKIP_WHITESPACE ();
5019
5020 exp = 0;
5021 flags = SEC_NO_FLAGS;
5022
5023 if (strcmp (name, ".idata$2") == 0)
5024 {
5025 align = 0;
5026 }
5027 else if (strcmp (name, ".idata$3") == 0)
5028 {
5029 align = 0;
5030 }
5031 else if (strcmp (name, ".idata$4") == 0)
5032 {
5033 align = 2;
5034 }
5035 else if (strcmp (name, ".idata$5") == 0)
5036 {
5037 align = 2;
5038 }
5039 else if (strcmp (name, ".idata$6") == 0)
5040 {
5041 align = 1;
5042 }
5043 else
99a814a1
AM		 5044 /* Default alignment to 16 byte boundary. */
5045 align = 4;
252b5132
RH		 5046
5047 if (*input_line_pointer == ',')
5048 {
5049 ++input_line_pointer;
5050 SKIP_WHITESPACE ();
5051 if (*input_line_pointer != '"')
5052 exp = get_absolute_expression ();
5053 else
5054 {
5055 ++input_line_pointer;
5056 while (*input_line_pointer != '"'
5057 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5058 {
5059 switch (*input_line_pointer)
5060 {
5061 /* Section Contents */
5062 case 'a': /* unknown */
5063 as_bad (_("Unsupported section attribute -- 'a'"));
5064 break;
5065 case 'c': /* code section */
81d4177b 5066 flags |= SEC_CODE;
252b5132
RH		 5067 break;
5068 case 'd': /* section has initialized data */
5069 flags |= SEC_DATA;
5070 break;
5071 case 'u': /* section has uninitialized data */
5072 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5073 in winnt.h */
5074 flags |= SEC_ROM;
5075 break;
5076 case 'i': /* section contains directives (info) */
5077 /* FIXME: This is IMAGE_SCN_LNK_INFO
5078 in winnt.h */
5079 flags |= SEC_HAS_CONTENTS;
5080 break;
5081 case 'n': /* section can be discarded */
81d4177b 5082 flags &=~ SEC_LOAD;
252b5132
RH		 5083 break;
5084 case 'R': /* Remove section at link time */
5085 flags |= SEC_NEVER_LOAD;
5086 break;
8d452c78 5087#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5088 /* Section Protection */
5089 case 'r': /* section is readable */
5090 flags |= IMAGE_SCN_MEM_READ;
5091 break;
5092 case 'w': /* section is writeable */
5093 flags |= IMAGE_SCN_MEM_WRITE;
5094 break;
5095 case 'x': /* section is executable */
5096 flags |= IMAGE_SCN_MEM_EXECUTE;
5097 break;
5098 case 's': /* section is sharable */
5099 flags |= IMAGE_SCN_MEM_SHARED;
5100 break;
5101
5102 /* Section Alignment */
5103 case '0': /* align to byte boundary */
5104 flags |= IMAGE_SCN_ALIGN_1BYTES;
5105 align = 0;
5106 break;
5107 case '1': /* align to halfword boundary */
5108 flags |= IMAGE_SCN_ALIGN_2BYTES;
5109 align = 1;
5110 break;
5111 case '2': /* align to word boundary */
5112 flags |= IMAGE_SCN_ALIGN_4BYTES;
5113 align = 2;
5114 break;
5115 case '3': /* align to doubleword boundary */
5116 flags |= IMAGE_SCN_ALIGN_8BYTES;
5117 align = 3;
5118 break;
5119 case '4': /* align to quadword boundary */
5120 flags |= IMAGE_SCN_ALIGN_16BYTES;
5121 align = 4;
5122 break;
5123 case '5': /* align to 32 byte boundary */
5124 flags |= IMAGE_SCN_ALIGN_32BYTES;
5125 align = 5;
5126 break;
5127 case '6': /* align to 64 byte boundary */
5128 flags |= IMAGE_SCN_ALIGN_64BYTES;
5129 align = 6;
5130 break;
8d452c78 5131#endif
252b5132 5132 default:
99a814a1
AM		 5133 as_bad (_("unknown section attribute '%c'"),
5134 *input_line_pointer);
252b5132
RH		 5135 break;
5136 }
5137 ++input_line_pointer;
5138 }
5139 if (*input_line_pointer == '"')
5140 ++input_line_pointer;
5141 }
5142 }
5143
5144 sec = subseg_new (name, (subsegT) exp);
5145
99a814a1 5146 ppc_set_current_section (sec);
252b5132
RH		 5147
5148 if (flags != SEC_NO_FLAGS)
5149 {
5150 if (! bfd_set_section_flags (stdoutput, sec, flags))
5151 as_bad (_("error setting flags for \"%s\": %s"),
5152 bfd_section_name (stdoutput, sec),
5153 bfd_errmsg (bfd_get_error ()));
5154 }
5155
99a814a1 5156 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5157}
5158
5159static void
98027b10 5160ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5161{
5162 char *name;
5163 char endc;
5164 symbolS *ext_sym;
5165
5166 name = input_line_pointer;
5167 endc = get_symbol_end ();
5168
5169 ext_sym = symbol_find_or_make (name);
5170
5171 *input_line_pointer = endc;
5172
5173 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5174 SF_SET_FUNCTION (ext_sym);
5175 SF_SET_PROCESS (ext_sym);
5176 coff_add_linesym (ext_sym);
5177
5178 demand_empty_rest_of_line ();
5179}
5180
5181static void
98027b10 5182ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5183{
5184 if (tocdata_section == 0)
5185 {
5186 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5187 /* FIXME: section flags won't work. */
252b5132
RH		 5188 bfd_set_section_flags (stdoutput, tocdata_section,
5189 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5190 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5191
5192 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5193 }
5194 else
5195 {
5196 rdata_section = subseg_new (".tocd", 0);
5197 }
5198
99a814a1 5199 ppc_set_current_section (tocdata_section);
252b5132
RH		 5200
5201 demand_empty_rest_of_line ();
5202}
5203
5204/* Don't adjust TOC relocs to use the section symbol. */
5205
5206int
98027b10 5207ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5208{
5209 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5210}
5211
5212#endif
5213\f
5214#ifdef OBJ_XCOFF
5215
5216/* XCOFF specific symbol and file handling. */
5217
5218/* Canonicalize the symbol name. We use the to force the suffix, if
5219 any, to use square brackets, and to be in upper case. */
5220
5221char *
98027b10 5222ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5223{
5224 char *s;
5225
5226 if (ppc_stab_symbol)
5227 return name;
5228
5229 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5230 ;
5231 if (*s != '\0')
5232 {
5233 char brac;
5234
5235 if (*s == '[')
5236 brac = ']';
5237 else
5238 {
5239 *s = '[';
5240 brac = '}';
5241 }
5242
5243 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5244 *s = TOUPPER (*s);
252b5132
RH		 5245
5246 if (*s == '\0' || s[1] != '\0')
5247 as_bad (_("bad symbol suffix"));
5248
5249 *s = ']';
5250 }
5251
5252 return name;
5253}
5254
5255/* Set the class of a symbol based on the suffix, if any. This is
5256 called whenever a new symbol is created. */
5257
5258void
98027b10 5259ppc_symbol_new_hook (symbolS *sym)
252b5132 5260{
809ffe0d 5261 struct ppc_tc_sy *tc;
252b5132
RH		 5262 const char *s;
5263
809ffe0d
ILT		 5264 tc = symbol_get_tc (sym);
5265 tc->next = NULL;
5266 tc->output = 0;
96d56e9f 5267 tc->symbol_class = -1;
809ffe0d
ILT		 5268 tc->real_name = NULL;
5269 tc->subseg = 0;
5270 tc->align = 0;
85645aed
TG		 5271 tc->u.size = NULL;
5272 tc->u.dw = NULL;
809ffe0d 5273 tc->within = NULL;
252b5132
RH		 5274
5275 if (ppc_stab_symbol)
5276 return;
5277
5278 s = strchr (S_GET_NAME (sym), '[');
5279 if (s == (const char *) NULL)
5280 {
5281 /* There is no suffix. */
5282 return;
5283 }
5284
5285 ++s;
5286
5287 switch (s[0])
5288 {
5289 case 'B':
5290 if (strcmp (s, "BS]") == 0)
96d56e9f 5291 tc->symbol_class = XMC_BS;
252b5132
RH		 5292 break;
5293 case 'D':
5294 if (strcmp (s, "DB]") == 0)
96d56e9f 5295 tc->symbol_class = XMC_DB;
252b5132 5296 else if (strcmp (s, "DS]") == 0)
96d56e9f 5297 tc->symbol_class = XMC_DS;
252b5132
RH		 5298 break;
5299 case 'G':
5300 if (strcmp (s, "GL]") == 0)
96d56e9f 5301 tc->symbol_class = XMC_GL;
252b5132
RH		 5302 break;
5303 case 'P':
5304 if (strcmp (s, "PR]") == 0)
96d56e9f 5305 tc->symbol_class = XMC_PR;
252b5132
RH		 5306 break;
5307 case 'R':
5308 if (strcmp (s, "RO]") == 0)
96d56e9f 5309 tc->symbol_class = XMC_RO;
252b5132 5310 else if (strcmp (s, "RW]") == 0)
96d56e9f 5311 tc->symbol_class = XMC_RW;
252b5132
RH		 5312 break;
5313 case 'S':
5314 if (strcmp (s, "SV]") == 0)
96d56e9f 5315 tc->symbol_class = XMC_SV;
252b5132
RH		 5316 break;
5317 case 'T':
5318 if (strcmp (s, "TC]") == 0)
96d56e9f 5319 tc->symbol_class = XMC_TC;
252b5132 5320 else if (strcmp (s, "TI]") == 0)
96d56e9f 5321 tc->symbol_class = XMC_TI;
252b5132 5322 else if (strcmp (s, "TB]") == 0)
96d56e9f 5323 tc->symbol_class = XMC_TB;
252b5132 5324 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5325 tc->symbol_class = XMC_TC0;
252b5132
RH		 5326 break;
5327 case 'U':
5328 if (strcmp (s, "UA]") == 0)
96d56e9f 5329 tc->symbol_class = XMC_UA;
252b5132 5330 else if (strcmp (s, "UC]") == 0)
96d56e9f 5331 tc->symbol_class = XMC_UC;
252b5132
RH		 5332 break;
5333 case 'X':
5334 if (strcmp (s, "XO]") == 0)
96d56e9f 5335 tc->symbol_class = XMC_XO;
252b5132
RH		 5336 break;
5337 }
5338
96d56e9f 5339 if (tc->symbol_class == -1)
252b5132
RH		 5340 as_bad (_("Unrecognized symbol suffix"));
5341}
5342
5343/* Set the class of a label based on where it is defined. This
5344 handles symbols without suffixes. Also, move the symbol so that it
5345 follows the csect symbol. */
5346
5347void
98027b10 5348ppc_frob_label (symbolS *sym)
252b5132
RH		 5349{
5350 if (ppc_current_csect != (symbolS *) NULL)
5351 {
96d56e9f
NC		 5352 if (symbol_get_tc (sym)->symbol_class == -1)
5353 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5354
5355 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5356 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5357 &symbol_rootP, &symbol_lastP);
5358 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5359 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5360 }
07a53e5c
RH		 5361
5362#ifdef OBJ_ELF
5363 dwarf2_emit_label (sym);
5364#endif
252b5132
RH		 5365}
5366
5367/* This variable is set by ppc_frob_symbol if any absolute symbols are
5368 seen. It tells ppc_adjust_symtab whether it needs to look through
5369 the symbols. */
5370
b34976b6 5371static bfd_boolean ppc_saw_abs;
252b5132
RH		 5372
5373/* Change the name of a symbol just before writing it out. Set the
5374 real name if the .rename pseudo-op was used. Otherwise, remove any
5375 class suffix. Return 1 if the symbol should not be included in the
5376 symbol table. */
5377
5378int
98027b10 5379ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5380{
5381 static symbolS *ppc_last_function;
5382 static symbolS *set_end;
5383
5384 /* Discard symbols that should not be included in the output symbol
5385 table. */
809ffe0d
ILT		 5386 if (! symbol_used_in_reloc_p (sym)
5387 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5388 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5389 && ! symbol_get_tc (sym)->output
252b5132
RH		 5390 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5391 return 1;
5392
a161fe53
AM		 5393 /* This one will disappear anyway. Don't make a csect sym for it. */
5394 if (sym == abs_section_sym)
5395 return 1;
5396
809ffe0d
ILT		 5397 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5398 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5399 else
5400 {
5401 const char *name;
5402 const char *s;
5403
5404 name = S_GET_NAME (sym);
5405 s = strchr (name, '[');
5406 if (s != (char *) NULL)
5407 {
5408 unsigned int len;
5409 char *snew;
5410
5411 len = s - name;
5412 snew = xmalloc (len + 1);
5413 memcpy (snew, name, len);
5414 snew[len] = '\0';
5415
5416 S_SET_NAME (sym, snew);
5417 }
5418 }
5419
5420 if (set_end != (symbolS *) NULL)
5421 {
5422 SA_SET_SYM_ENDNDX (set_end, sym);
5423 set_end = NULL;
5424 }
5425
5426 if (SF_GET_FUNCTION (sym))
5427 {
5428 if (ppc_last_function != (symbolS *) NULL)
5429 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5430 ppc_last_function = sym;
85645aed 5431 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5432 {
85645aed 5433 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5434 SA_SET_SYM_FSIZE (sym,
85645aed 5435 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5436 }
5437 }
5438 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5439 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5440 {
5441 if (ppc_last_function == (symbolS *) NULL)
5442 as_bad (_(".ef with no preceding .function"));
5443 else
5444 {
5445 set_end = ppc_last_function;
5446 ppc_last_function = NULL;
5447
5448 /* We don't have a C_EFCN symbol, but we need to force the
5449 COFF backend to believe that it has seen one. */
5450 coff_last_function = NULL;
5451 }
5452 }
5453
670ec21d 5454 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5455 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5456 && S_GET_STORAGE_CLASS (sym) != C_FILE
5457 && S_GET_STORAGE_CLASS (sym) != C_FCN
5458 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5459 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5460 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5461 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5462 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5463 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5464 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5465
5466 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5467 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5468 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5469 {
5470 int i;
5471 union internal_auxent *a;
5472
5473 /* Create a csect aux. */
5474 i = S_GET_NUMBER_AUXILIARY (sym);
5475 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5476 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5477 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5478 {
5479 /* This is the TOC table. */
5480 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5481 a->x_csect.x_scnlen.l = 0;
5482 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5483 }
809ffe0d 5484 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5485 {
5486 /* This is a csect symbol. x_scnlen is the size of the
5487 csect. */
809ffe0d 5488 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5489 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5490 S_GET_SEGMENT (sym))
5491 - S_GET_VALUE (sym));
5492 else
5493 {
6386f3a7 5494 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5495 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5496 - S_GET_VALUE (sym));
5497 }
809ffe0d 5498 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5499 }
5500 else if (S_GET_SEGMENT (sym) == bss_section)
5501 {
5502 /* This is a common symbol. */
809ffe0d
ILT		 5503 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5504 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5505 if (S_IS_EXTERNAL (sym))
96d56e9f 5506 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5507 else
96d56e9f 5508 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5509 }
5510 else if (S_GET_SEGMENT (sym) == absolute_section)
5511 {
5512 /* This is an absolute symbol. The csect will be created by
99a814a1 5513 ppc_adjust_symtab. */
b34976b6 5514 ppc_saw_abs = TRUE;
252b5132 5515 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5516 if (symbol_get_tc (sym)->symbol_class == -1)
5517 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5518 }
5519 else if (! S_IS_DEFINED (sym))
5520 {
5521 /* This is an external symbol. */
5522 a->x_csect.x_scnlen.l = 0;
5523 a->x_csect.x_smtyp = XTY_ER;
5524 }
96d56e9f 5525 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5526 {
5527 symbolS *next;
5528
5529 /* This is a TOC definition. x_scnlen is the size of the
5530 TOC entry. */
5531 next = symbol_next (sym);
96d56e9f 5532 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5533 next = symbol_next (next);
5534 if (next == (symbolS *) NULL
96d56e9f 5535 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5536 {
5537 if (ppc_after_toc_frag == (fragS *) NULL)
5538 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5539 data_section)
5540 - S_GET_VALUE (sym));
5541 else
5542 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5543 - S_GET_VALUE (sym));
5544 }
5545 else
5546 {
6386f3a7 5547 resolve_symbol_value (next);
252b5132
RH		 5548 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5549 - S_GET_VALUE (sym));
5550 }
5551 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5552 }
5553 else
5554 {
5555 symbolS *csect;
5556
5557 /* This is a normal symbol definition. x_scnlen is the
5558 symbol index of the containing csect. */
5559 if (S_GET_SEGMENT (sym) == text_section)
5560 csect = ppc_text_csects;
5561 else if (S_GET_SEGMENT (sym) == data_section)
5562 csect = ppc_data_csects;
5563 else
5564 abort ();
5565
5566 /* Skip the initial dummy symbol. */
809ffe0d 5567 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5568
5569 if (csect == (symbolS *) NULL)
5570 {
5571 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5572 a->x_csect.x_scnlen.l = 0;
5573 }
5574 else
5575 {
809ffe0d 5576 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5577 {
6386f3a7 5578 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5579 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5580 > S_GET_VALUE (sym))
252b5132 5581 break;
809ffe0d 5582 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5583 }
5584
809ffe0d
ILT		 5585 a->x_csect.x_scnlen.p =
5586 coffsymbol (symbol_get_bfdsym (csect))->native;
5587 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5588 1;
252b5132
RH		 5589 }
5590 a->x_csect.x_smtyp = XTY_LD;
5591 }
81d4177b 5592
252b5132
RH		 5593 a->x_csect.x_parmhash = 0;
5594 a->x_csect.x_snhash = 0;
96d56e9f 5595 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5596 a->x_csect.x_smclas = XMC_PR;
5597 else
96d56e9f 5598 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5599 a->x_csect.x_stab = 0;
5600 a->x_csect.x_snstab = 0;
5601
5602 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5603 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5604 }
5605 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5606 {
5607 /* We want the value to be the symbol index of the referenced
5608 csect symbol. BFD will do that for us if we set the right
5609 flags. */
b782de16
AM		 5610 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5611 combined_entry_type *c = coffsymbol (bsym)->native;
5612
5613 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5614 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5615 }
5616 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5617 {
5618 symbolS *block;
c734e7e3 5619 valueT base;
252b5132 5620
809ffe0d 5621 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5622 if (block)
5623 {
5624 /* The value is the offset from the enclosing csect. */
5625 symbolS *csect;
5626
5627 csect = symbol_get_tc (block)->within;
5628 resolve_symbol_value (csect);
5629 base = S_GET_VALUE (csect);
5630 }
5631 else
5632 base = 0;
5633
5634 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 5635 }
5636 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5637 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5638 {
5639 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5640 BFD will do that for us if we set the right flags. We have
5641 already set the value correctly. */
809ffe0d 5642 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5643 }
5644
5645 return 0;
5646}
5647
5648/* Adjust the symbol table. This creates csect symbols for all
5649 absolute symbols. */
5650
5651void
98027b10 5652ppc_adjust_symtab (void)
252b5132
RH		 5653{
5654 symbolS *sym;
5655
5656 if (! ppc_saw_abs)
5657 return;
5658
5659 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5660 {
5661 symbolS *csect;
5662 int i;
5663 union internal_auxent *a;
5664
5665 if (S_GET_SEGMENT (sym) != absolute_section)
5666 continue;
5667
5668 csect = symbol_create (".abs[XO]", absolute_section,
5669 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5670 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5671 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5672 i = S_GET_NUMBER_AUXILIARY (csect);
5673 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5674 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5675 a->x_csect.x_scnlen.l = 0;
5676 a->x_csect.x_smtyp = XTY_SD;
5677 a->x_csect.x_parmhash = 0;
5678 a->x_csect.x_snhash = 0;
5679 a->x_csect.x_smclas = XMC_XO;
5680 a->x_csect.x_stab = 0;
5681 a->x_csect.x_snstab = 0;
5682
5683 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5684
5685 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5686 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5687 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5688 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5689 }
5690
b34976b6 5691 ppc_saw_abs = FALSE;
252b5132
RH		 5692}
5693
5694/* Set the VMA for a section. This is called on all the sections in
5695 turn. */
5696
5697void
98027b10 5698ppc_frob_section (asection *sec)
252b5132 5699{
931e13a6 5700 static bfd_vma vma = 0;
252b5132 5701
85645aed
TG		 5702 /* Dwarf sections start at 0. */
5703 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
5704 return;
5705
931e13a6 5706 vma = md_section_align (sec, vma);
252b5132
RH		 5707 bfd_set_section_vma (stdoutput, sec, vma);
5708 vma += bfd_section_size (stdoutput, sec);
5709}
5710
5711#endif /* OBJ_XCOFF */
5712\f
252b5132 5713char *
98027b10 5714md_atof (int type, char *litp, int *sizep)
252b5132 5715{
499ac353 5716 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5717}
5718
5719/* Write a value out to the object file, using the appropriate
5720 endianness. */
5721
5722void
98027b10 5723md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5724{
5725 if (target_big_endian)
5726 number_to_chars_bigendian (buf, val, n);
5727 else
5728 number_to_chars_littleendian (buf, val, n);
5729}
5730
5731/* Align a section (I don't know why this is machine dependent). */
5732
5733valueT
3aeeedbb 5734md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5735{
3aeeedbb
AM		 5736#ifdef OBJ_ELF
5737 return addr;
5738#else
252b5132
RH		 5739 int align = bfd_get_section_alignment (stdoutput, seg);
5740
5741 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5742#endif
252b5132
RH		 5743}
5744
5745/* We don't have any form of relaxing. */
5746
5747int
98027b10
AM		 5748md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5749 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5750{
5751 abort ();
5752 return 0;
5753}
5754
5755/* Convert a machine dependent frag. We never generate these. */
5756
5757void
98027b10
AM		 5758md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5759 asection *sec ATTRIBUTE_UNUSED,
5760 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5761{
5762 abort ();
5763}
5764
5765/* We have no need to default values of symbols. */
5766
252b5132 5767symbolS *
98027b10 5768md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5769{
5770 return 0;
5771}
5772\f
5773/* Functions concerning relocs. */
5774
5775/* The location from which a PC relative jump should be calculated,
5776 given a PC relative reloc. */
5777
5778long
98027b10 5779md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5780{
5781 return fixp->fx_frag->fr_address + fixp->fx_where;
5782}
5783
5784#ifdef OBJ_XCOFF
5785
5786/* This is called to see whether a fixup should be adjusted to use a
5787 section symbol. We take the opportunity to change a fixup against
5788 a symbol in the TOC subsegment into a reloc against the
5789 corresponding .tc symbol. */
5790
5791int
98027b10 5792ppc_fix_adjustable (fixS *fix)
252b5132 5793{
b782de16
AM		 5794 valueT val = resolve_symbol_value (fix->fx_addsy);
5795 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5796 TC_SYMFIELD_TYPE *tc;
5797
5798 if (symseg == absolute_section)
5799 return 0;
252b5132 5800
85645aed
TG		 5801 /* Always adjust symbols in debugging sections. */
5802 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
5803 return 1;
5804
252b5132 5805 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5806 && fix->fx_addsy != ppc_toc_csect
b782de16 5807 && symseg == data_section
252b5132
RH		 5808 && val >= ppc_toc_frag->fr_address
5809 && (ppc_after_toc_frag == (fragS *) NULL
5810 || val < ppc_after_toc_frag->fr_address))
5811 {
5812 symbolS *sy;
5813
5814 for (sy = symbol_next (ppc_toc_csect);
5815 sy != (symbolS *) NULL;
5816 sy = symbol_next (sy))
5817 {
b782de16
AM		 5818 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5819
96d56e9f 5820 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5821 continue;
96d56e9f 5822 if (sy_tc->symbol_class != XMC_TC)
252b5132 5823 break;
b782de16 5824 if (val == resolve_symbol_value (sy))
252b5132
RH		 5825 {
5826 fix->fx_addsy = sy;
5827 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5828 return 0;
5829 }
5830 }
5831
5832 as_bad_where (fix->fx_file, fix->fx_line,
5833 _("symbol in .toc does not match any .tc"));
5834 }
5835
5836 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5837 tc = symbol_get_tc (fix->fx_addsy);
5838 if (tc->subseg == 0
96d56e9f
NC		 5839 && tc->symbol_class != XMC_TC0
5840 && tc->symbol_class != XMC_TC
b782de16 5841 && symseg != bss_section
252b5132 5842 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5843 && (symseg != data_section
252b5132
RH		 5844 || ppc_toc_csect == NULL
5845 || val < ppc_toc_frag->fr_address
5846 || (ppc_after_toc_frag != NULL
5847 && val >= ppc_after_toc_frag->fr_address)))
5848 {
2fb4b302 5849 symbolS *csect = tc->within;
252b5132 5850
2fb4b302
TG		 5851 /* If the symbol was not declared by a label (eg: a section symbol),
5852 use the section instead of the csect. This doesn't happen in
5853 normal AIX assembly code. */
5854 if (csect == NULL)
5855 csect = seg_info (symseg)->sym;
252b5132 5856
2fb4b302
TG		 5857 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
5858 fix->fx_addsy = csect;
252b5132 5859
b782de16 5860 return 0;
252b5132
RH		 5861 }
5862
5863 /* Adjust a reloc against a .lcomm symbol to be against the base
5864 .lcomm. */
b782de16 5865 if (symseg == bss_section
252b5132
RH		 5866 && ! S_IS_EXTERNAL (fix->fx_addsy))
5867 {
b782de16
AM		 5868 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5869
5870 fix->fx_offset += val - resolve_symbol_value (sy);
5871 fix->fx_addsy = sy;
252b5132
RH		 5872 }
5873
5874 return 0;
5875}
5876
5877/* A reloc from one csect to another must be kept. The assembler
5878 will, of course, keep relocs between sections, and it will keep
5879 absolute relocs, but we need to force it to keep PC relative relocs
5880 between two csects in the same section. */
5881
5882int
98027b10 5883ppc_force_relocation (fixS *fix)
252b5132
RH		 5884{
5885 /* At this point fix->fx_addsy should already have been converted to
5886 a csect symbol. If the csect does not include the fragment, then
5887 we need to force the relocation. */
5888 if (fix->fx_pcrel
5889 && fix->fx_addsy != NULL
809ffe0d
ILT		 5890 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5891 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5892 > fix->fx_frag->fr_address)
5893 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5894 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5895 <= fix->fx_frag->fr_address))))
5896 return 1;
5897
ae6063d4 5898 return generic_force_reloc (fix);
252b5132
RH		 5899}
5900
2fb4b302
TG		 5901void
5902ppc_new_dot_label (symbolS *sym)
5903{
5904 /* Anchor this label to the current csect for relocations. */
5905 symbol_get_tc (sym)->within = ppc_current_csect;
5906}
5907
252b5132
RH		 5908#endif /* OBJ_XCOFF */
5909
0baf16f2 5910#ifdef OBJ_ELF
a161fe53
AM		 5911/* If this function returns non-zero, it guarantees that a relocation
5912 will be emitted for a fixup. */
5913
5914int
98027b10 5915ppc_force_relocation (fixS *fix)
a161fe53
AM		 5916{
5917 /* Branch prediction relocations must force a relocation, as must
5918 the vtable description relocs. */
5919 switch (fix->fx_r_type)
5920 {
5921 case BFD_RELOC_PPC_B16_BRTAKEN:
5922 case BFD_RELOC_PPC_B16_BRNTAKEN:
5923 case BFD_RELOC_PPC_BA16_BRTAKEN:
5924 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5925 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5926 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5927 return 1;
5928 default:
5929 break;
5930 }
5931
cdba85ec
AM		 5932 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5933 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5934 return 1;
5935
ae6063d4 5936 return generic_force_reloc (fix);
a161fe53
AM		 5937}
5938
0baf16f2 5939int
98027b10 5940ppc_fix_adjustable (fixS *fix)
252b5132 5941{
0baf16f2
AM		 5942 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5943 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5944 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5945 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 5946 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
5947 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 5948 && fix->fx_r_type != BFD_RELOC_GPREL16
5949 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5950 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5951 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5952 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5953}
0baf16f2 5954#endif
252b5132 5955
3aeeedbb
AM		 5956/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5957 rs_align_code frag. */
5958
5959void
5960ppc_handle_align (struct frag *fragP)
5961{
5962 valueT count = (fragP->fr_next->fr_address
5963 - (fragP->fr_address + fragP->fr_fix));
5964
5965 if (count != 0 && (count & 3) == 0)
5966 {
5967 char *dest = fragP->fr_literal + fragP->fr_fix;
5968
5969 fragP->fr_var = 4;
cef4f754
AM		 5970
5971 if (count > 4 * nop_limit && count < 0x2000000)
5972 {
5973 struct frag *rest;
5974
5975 /* Make a branch, then follow with nops. Insert another
5976 frag to handle the nops. */
5977 md_number_to_chars (dest, 0x48000000 + count, 4);
5978 count -= 4;
5979 if (count == 0)
5980 return;
5981
5982 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5983 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
5984 fragP->fr_next = rest;
5985 fragP = rest;
5986 rest->fr_address += rest->fr_fix + 4;
5987 rest->fr_fix = 0;
5988 /* If we leave the next frag as rs_align_code we'll come here
5989 again, resulting in a bunch of branches rather than a
5990 branch followed by nops. */
5991 rest->fr_type = rs_align;
5992 dest = rest->fr_literal;
5993 }
5994
3aeeedbb
AM		 5995 md_number_to_chars (dest, 0x60000000, 4);
5996
42240548
PB		 5997 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5998 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 5999 {
42240548
PB		 6000 /* For power6 and power7, we want the last nop to be a group
6001 terminating one. Do this by inserting an rs_fill frag immediately
6002 after this one, with its address set to the last nop location.
6003 This will automatically reduce the number of nops in the current
6004 frag by one. */
3aeeedbb
AM		 6005 if (count > 4)
6006 {
6007 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6008
6009 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6010 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6011 group_nop->fr_fix = 0;
6012 group_nop->fr_offset = 1;
6013 group_nop->fr_type = rs_fill;
6014 fragP->fr_next = group_nop;
6015 dest = group_nop->fr_literal;
6016 }
6017
42240548 6018 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
aea77599
AM		 6019 {
6020 if (ppc_cpu & PPC_OPCODE_E500MC)
6021 /* e500mc group terminating nop: "ori 0,0,0". */
6022 md_number_to_chars (dest, 0x60000000, 4);
6023 else
6024 /* power7 group terminating nop: "ori 2,2,0". */
6025 md_number_to_chars (dest, 0x60420000, 4);
6026 }
42240548
PB		 6027 else
6028 /* power6 group terminating nop: "ori 1,1,0". */
6029 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6030 }
6031 }
6032}
6033
252b5132
RH		 6034/* Apply a fixup to the object code. This is called for all the
6035 fixups we generated by the call to fix_new_exp, above. In the call
6036 above we used a reloc code which was the largest legal reloc code
6037 plus the operand index. Here we undo that to recover the operand
6038 index. At this point all symbol values should be fully resolved,
6039 and we attempt to completely resolve the reloc. If we can not do
6040 that, we determine the correct reloc code and put it back in the
6041 fixup. */
6042
94f592af 6043void
98027b10 6044md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 6045{
94f592af 6046 valueT value = * valP;
252b5132
RH		 6047
6048#ifdef OBJ_ELF
94f592af 6049 if (fixP->fx_addsy != NULL)
252b5132 6050 {
a161fe53 6051 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6052 if (fixP->fx_pcrel)
6053 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 6054 }
6055 else
94f592af 6056 fixP->fx_done = 1;
252b5132 6057#else
a161fe53 6058 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6059 the symbol values. If we are doing this relocation the code in
6060 write.c is going to call bfd_install_relocation, which is also
6061 going to use the symbol value. That means that if the reloc is
6062 fully resolved we want to use *valP since bfd_install_relocation is
6063 not being used.
9f0eb232
RS		 6064 However, if the reloc is not fully resolved we do not want to
6065 use *valP, and must use fx_offset instead. If the relocation
6066 is PC-relative, we then need to re-apply md_pcrel_from_section
6067 to this new relocation value. */
94f592af
NC		 6068 if (fixP->fx_addsy == (symbolS *) NULL)
6069 fixP->fx_done = 1;
6070
252b5132 6071 else
9f0eb232
RS		 6072 {
6073 value = fixP->fx_offset;
6074 if (fixP->fx_pcrel)
6075 value -= md_pcrel_from_section (fixP, seg);
6076 }
a161fe53
AM		 6077#endif
6078
6079 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6080 {
a161fe53
AM		 6081 /* We can't actually support subtracting a symbol. */
6082 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6083 }
252b5132 6084
94f592af 6085 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 6086 {
6087 int opindex;
6088 const struct powerpc_operand *operand;
6089 char *where;
6090 unsigned long insn;
6091
94f592af 6092 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 6093
6094 operand = &powerpc_operands[opindex];
6095
6096#ifdef OBJ_XCOFF
0baf16f2
AM		 6097 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6098 does not generate a reloc. It uses the offset of `sym' within its
6099 csect. Other usages, such as `.long sym', generate relocs. This
6100 is the documented behaviour of non-TOC symbols. */
252b5132 6101 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6102 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6103 && operand->shift == 0
2b3c4602 6104 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6105 && fixP->fx_addsy != NULL
6106 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6107 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6108 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6109 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6110 {
94f592af
NC		 6111 value = fixP->fx_offset;
6112 fixP->fx_done = 1;
252b5132
RH		 6113 }
6114#endif
6115
6116 /* Fetch the instruction, insert the fully resolved operand
6117 value, and stuff the instruction back again. */
94f592af 6118 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 6119 if (target_big_endian)
6120 insn = bfd_getb32 ((unsigned char *) where);
6121 else
6122 insn = bfd_getl32 ((unsigned char *) where);
6123 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 6124 fixP->tc_fix_data.ppc_cpu,
94f592af 6125 fixP->fx_file, fixP->fx_line);
252b5132
RH		 6126 if (target_big_endian)
6127 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6128 else
6129 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6130
94f592af
NC		 6131 if (fixP->fx_done)
6132 /* Nothing else to do here. */
6133 return;
252b5132 6134
9c2799c2 6135 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 6136
252b5132
RH		 6137 /* Determine a BFD reloc value based on the operand information.
6138 We are only prepared to turn a few of the operands into
0baf16f2 6139 relocs. */
11b37b7b 6140 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 6141 && operand->bitm == 0x3fffffc
11b37b7b 6142 && operand->shift == 0)
94f592af 6143 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 6144 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 6145 && operand->bitm == 0xfffc
11b37b7b 6146 && operand->shift == 0)
95210096
AM		 6147 {
6148 fixP->fx_r_type = BFD_RELOC_PPC_B16;
6149#ifdef OBJ_XCOFF
6150 fixP->fx_size = 2;
6151 if (target_big_endian)
6152 fixP->fx_where += 2;
6153#endif
6154 }
11b37b7b 6155 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 6156 && operand->bitm == 0x3fffffc
11b37b7b 6157 && operand->shift == 0)
94f592af 6158 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 6159 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 6160 && operand->bitm == 0xfffc
11b37b7b 6161 && operand->shift == 0)
95210096
AM		 6162 {
6163 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
6164#ifdef OBJ_XCOFF
6165 fixP->fx_size = 2;
6166 if (target_big_endian)
6167 fixP->fx_where += 2;
6168#endif
6169 }
0baf16f2 6170#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 6171 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6172 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 6173 && operand->shift == 0)
11b37b7b 6174 {
a7fc733f
AM		 6175 if (ppc_is_toc_sym (fixP->fx_addsy))
6176 {
6177 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 6178#ifdef OBJ_ELF
a7fc733f
AM		 6179 if (ppc_obj64
6180 && (operand->flags & PPC_OPERAND_DS) != 0)
6181 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
6182#endif
6183 }
6184 else
6185 {
6186 fixP->fx_r_type = BFD_RELOC_16;
6187#ifdef OBJ_ELF
6188 if (ppc_obj64
6189 && (operand->flags & PPC_OPERAND_DS) != 0)
6190 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 6191#endif
a7fc733f 6192 }
94f592af 6193 fixP->fx_size = 2;
11b37b7b 6194 if (target_big_endian)
94f592af 6195 fixP->fx_where += 2;
11b37b7b 6196 }
0baf16f2 6197#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 6198 else
252b5132
RH		 6199 {
6200 char *sfile;
6201 unsigned int sline;
6202
6203 /* Use expr_symbol_where to see if this is an expression
0baf16f2 6204 symbol. */
94f592af
NC		 6205 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6206 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 6207 _("unresolved expression that must be resolved"));
6208 else
94f592af 6209 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 6210 _("unsupported relocation against %s"),
94f592af
NC		 6211 S_GET_NAME (fixP->fx_addsy));
6212 fixP->fx_done = 1;
6213 return;
252b5132
RH		 6214 }
6215 }
6216 else
6217 {
6218#ifdef OBJ_ELF
94f592af 6219 ppc_elf_validate_fix (fixP, seg);
252b5132 6220#endif
94f592af 6221 switch (fixP->fx_r_type)
252b5132 6222 {
252b5132 6223 case BFD_RELOC_CTOR:
2b3c4602 6224 if (ppc_obj64)
9c7977b3
AM		 6225 goto ctor64;
6226 /* fall through */
6227
0baf16f2 6228 case BFD_RELOC_32:
94f592af
NC		 6229 if (fixP->fx_pcrel)
6230 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 6231 /* fall through */
252b5132
RH		 6232
6233 case BFD_RELOC_RVA:
6234 case BFD_RELOC_32_PCREL:
252b5132 6235 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 6236 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6237 value, 4);
6238 break;
6239
7f6d05e8 6240 case BFD_RELOC_64:
9c7977b3 6241 ctor64:
94f592af
NC		 6242 if (fixP->fx_pcrel)
6243 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 6244 /* fall through */
0baf16f2 6245
7f6d05e8 6246 case BFD_RELOC_64_PCREL:
94f592af 6247 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 6248 value, 8);
81d4177b 6249 break;
0baf16f2 6250
252b5132
RH		 6251 case BFD_RELOC_GPREL16:
6252 case BFD_RELOC_16_GOT_PCREL:
6253 case BFD_RELOC_16_GOTOFF:
6254 case BFD_RELOC_LO16_GOTOFF:
6255 case BFD_RELOC_HI16_GOTOFF:
6256 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 6257 case BFD_RELOC_16_BASEREL:
252b5132
RH		 6258 case BFD_RELOC_LO16_BASEREL:
6259 case BFD_RELOC_HI16_BASEREL:
6260 case BFD_RELOC_HI16_S_BASEREL:
6261 case BFD_RELOC_PPC_EMB_NADDR16:
6262 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6263 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6264 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6265 case BFD_RELOC_PPC_EMB_SDAI16:
6266 case BFD_RELOC_PPC_EMB_SDA2REL:
6267 case BFD_RELOC_PPC_EMB_SDA2I16:
6268 case BFD_RELOC_PPC_EMB_RELSEC16:
6269 case BFD_RELOC_PPC_EMB_RELST_LO:
6270 case BFD_RELOC_PPC_EMB_RELST_HI:
6271 case BFD_RELOC_PPC_EMB_RELST_HA:
6272 case BFD_RELOC_PPC_EMB_RELSDA:
6273 case BFD_RELOC_PPC_TOC16:
0baf16f2 6274#ifdef OBJ_ELF
0baf16f2
AM		 6275 case BFD_RELOC_PPC64_TOC16_LO:
6276 case BFD_RELOC_PPC64_TOC16_HI:
6277 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 6278#endif
94f592af 6279 if (fixP->fx_pcrel)
252b5132 6280 {
94f592af
NC		 6281 if (fixP->fx_addsy != NULL)
6282 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6283 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 6284 bfd_get_reloc_code_name (fixP->fx_r_type),
6285 S_GET_NAME (fixP->fx_addsy));
252b5132 6286 else
94f592af 6287 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6288 _("cannot emit PC relative %s relocation"),
94f592af 6289 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 6290 }
6291
94f592af 6292 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6293 value, 2);
6294 break;
6295
3c9d25f4
AM		 6296 case BFD_RELOC_16:
6297 if (fixP->fx_pcrel)
6298 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6299 /* fall through */
6300
6301 case BFD_RELOC_16_PCREL:
6302 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6303 value, 2);
6304 break;
6305
6306 case BFD_RELOC_LO16:
6307 if (fixP->fx_pcrel)
6308 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6309 /* fall through */
6310
6311 case BFD_RELOC_LO16_PCREL:
6312 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6313 value, 2);
6314 break;
6315
252b5132
RH		 6316 /* This case happens when you write, for example,
6317 lis %r3,(L1-L2)@ha
6318 where L1 and L2 are defined later. */
6319 case BFD_RELOC_HI16:
94f592af 6320 if (fixP->fx_pcrel)
3c9d25f4
AM		 6321 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6322 /* fall through */
6323
6324 case BFD_RELOC_HI16_PCREL:
94f592af 6325 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6326 PPC_HI (value), 2);
252b5132 6327 break;
0baf16f2 6328
252b5132 6329 case BFD_RELOC_HI16_S:
94f592af 6330 if (fixP->fx_pcrel)
3c9d25f4
AM		 6331 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6332 /* fall through */
6333
6334 case BFD_RELOC_HI16_S_PCREL:
94f592af 6335 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6336 PPC_HA (value), 2);
6337 break;
6338
c865e45b
RS		 6339#ifdef OBJ_XCOFF
6340 case BFD_RELOC_NONE:
6341 break;
6342#endif
6343
0baf16f2 6344#ifdef OBJ_ELF
0baf16f2 6345 case BFD_RELOC_PPC64_HIGHER:
94f592af 6346 if (fixP->fx_pcrel)
0baf16f2 6347 abort ();
94f592af 6348 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6349 PPC_HIGHER (value), 2);
252b5132
RH		 6350 break;
6351
0baf16f2 6352 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6353 if (fixP->fx_pcrel)
0baf16f2 6354 abort ();
94f592af 6355 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6356 PPC_HIGHERA (value), 2);
6357 break;
6358
6359 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6360 if (fixP->fx_pcrel)
0baf16f2 6361 abort ();
94f592af 6362 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6363 PPC_HIGHEST (value), 2);
6364 break;
6365
6366 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6367 if (fixP->fx_pcrel)
0baf16f2 6368 abort ();
94f592af 6369 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6370 PPC_HIGHESTA (value), 2);
6371 break;
6372
6373 case BFD_RELOC_PPC64_ADDR16_DS:
6374 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6375 case BFD_RELOC_PPC64_GOT16_DS:
6376 case BFD_RELOC_PPC64_GOT16_LO_DS:
6377 case BFD_RELOC_PPC64_PLT16_LO_DS:
6378 case BFD_RELOC_PPC64_SECTOFF_DS:
6379 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6380 case BFD_RELOC_PPC64_TOC16_DS:
6381 case BFD_RELOC_PPC64_TOC16_LO_DS:
6382 case BFD_RELOC_PPC64_PLTGOT16_DS:
6383 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6384 if (fixP->fx_pcrel)
0baf16f2
AM		 6385 abort ();
6386 {
2132e3a3 6387 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6388 unsigned long val, mask;
0baf16f2
AM		 6389
6390 if (target_big_endian)
adadcc0c 6391 val = bfd_getb32 (where - 2);
0baf16f2 6392 else
adadcc0c
AM		 6393 val = bfd_getl32 (where);
6394 mask = 0xfffc;
6395 /* lq insns reserve the four lsbs. */
6396 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6397 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6398 mask = 0xfff0;
6399 val |= value & mask;
0baf16f2
AM		 6400 if (target_big_endian)
6401 bfd_putb16 ((bfd_vma) val, where);
6402 else
6403 bfd_putl16 ((bfd_vma) val, where);
6404 }
6405 break;
cdba85ec 6406
ba0b2174
AM		 6407 case BFD_RELOC_PPC_B16_BRTAKEN:
6408 case BFD_RELOC_PPC_B16_BRNTAKEN:
6409 case BFD_RELOC_PPC_BA16_BRTAKEN:
6410 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6411 break;
6412
cdba85ec 6413 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6414 case BFD_RELOC_PPC_TLSGD:
6415 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6416 break;
6417
cdba85ec
AM		 6418 case BFD_RELOC_PPC_DTPMOD:
6419 case BFD_RELOC_PPC_TPREL16:
6420 case BFD_RELOC_PPC_TPREL16_LO:
6421 case BFD_RELOC_PPC_TPREL16_HI:
6422 case BFD_RELOC_PPC_TPREL16_HA:
6423 case BFD_RELOC_PPC_TPREL:
6424 case BFD_RELOC_PPC_DTPREL16:
6425 case BFD_RELOC_PPC_DTPREL16_LO:
6426 case BFD_RELOC_PPC_DTPREL16_HI:
6427 case BFD_RELOC_PPC_DTPREL16_HA:
6428 case BFD_RELOC_PPC_DTPREL:
6429 case BFD_RELOC_PPC_GOT_TLSGD16:
6430 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6431 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6432 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6433 case BFD_RELOC_PPC_GOT_TLSLD16:
6434 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6435 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6436 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6437 case BFD_RELOC_PPC_GOT_TPREL16:
6438 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6439 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6440 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6441 case BFD_RELOC_PPC_GOT_DTPREL16:
6442 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6443 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6444 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6445 case BFD_RELOC_PPC64_TPREL16_DS:
6446 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6447 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6448 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6449 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6450 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6451 case BFD_RELOC_PPC64_DTPREL16_DS:
6452 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6453 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6454 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6455 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6456 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6457 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6458 break;
0baf16f2 6459#endif
252b5132 6460 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6461 bytes, rather than 2, so offset it here appropriately. */
252b5132 6462 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6463 if (fixP->fx_pcrel)
252b5132
RH		 6464 abort ();
6465
94f592af 6466 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6467 + ((target_big_endian) ? 2 : 0),
6468 value, 2);
6469 break;
6470
6471 case BFD_RELOC_8:
94f592af 6472 if (fixP->fx_pcrel)
31a91399
NC		 6473 {
6474 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6475 ".byte <undefined_symbol> - ." */
31a91399
NC		 6476 if (fixP->fx_addsy)
6477 as_bad (_("Unable to handle reference to symbol %s"),
6478 S_GET_NAME (fixP->fx_addsy));
6479 else
6480 as_bad (_("Unable to resolve expression"));
6481 fixP->fx_done = 1;
6482 }
6483 else
6484 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6485 value, 1);
252b5132
RH		 6486 break;
6487
6488 case BFD_RELOC_24_PLT_PCREL:
6489 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6490 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6491 abort ();
6492
94f592af 6493 if (fixP->fx_done)
99a814a1
AM		 6494 {
6495 char *where;
6496 unsigned long insn;
6497
6498 /* Fetch the instruction, insert the fully resolved operand
6499 value, and stuff the instruction back again. */
94f592af 6500 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6501 if (target_big_endian)
6502 insn = bfd_getb32 ((unsigned char *) where);
6503 else
6504 insn = bfd_getl32 ((unsigned char *) where);
6505 if ((value & 3) != 0)
94f592af 6506 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6507 _("must branch to an address a multiple of 4"));
6508 if ((offsetT) value < -0x40000000
6509 || (offsetT) value >= 0x40000000)
94f592af 6510 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6511 _("@local or @plt branch destination is too far away, %ld bytes"),
6512 (long) value);
6513 insn = insn | (value & 0x03fffffc);
6514 if (target_big_endian)
6515 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6516 else
6517 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6518 }
252b5132
RH		 6519 break;
6520
6521 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6522 fixP->fx_done = 0;
6523 if (fixP->fx_addsy
6524 && !S_IS_DEFINED (fixP->fx_addsy)
6525 && !S_IS_WEAK (fixP->fx_addsy))
6526 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6527 break;
6528
6529 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6530 fixP->fx_done = 0;
252b5132
RH		 6531 break;
6532
0baf16f2 6533#ifdef OBJ_ELF
0baf16f2
AM		 6534 /* Generated by reference to `sym@tocbase'. The sym is
6535 ignored by the linker. */
6536 case BFD_RELOC_PPC64_TOC:
94f592af 6537 fixP->fx_done = 0;
0baf16f2 6538 break;
0baf16f2 6539#endif
252b5132 6540 default:
bc805888 6541 fprintf (stderr,
94f592af 6542 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6543 fflush (stderr);
252b5132
RH		 6544 abort ();
6545 }
6546 }
6547
6548#ifdef OBJ_ELF
94f592af 6549 fixP->fx_addnumber = value;
4e6935a6
AM		 6550
6551 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6552 from the section contents. If we are going to be emitting a reloc
6553 then the section contents are immaterial, so don't warn if they
6554 happen to overflow. Leave such warnings to ld. */
6555 if (!fixP->fx_done)
6556 fixP->fx_no_overflow = 1;
252b5132 6557#else
94f592af
NC		 6558 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6559 fixP->fx_addnumber = 0;
252b5132
RH		 6560 else
6561 {
6562#ifdef TE_PE
94f592af 6563 fixP->fx_addnumber = 0;
252b5132 6564#else
8edcbfcd
TG		 6565 /* We want to use the offset within the toc, not the actual VMA
6566 of the symbol. */
94f592af 6567 fixP->fx_addnumber =
8edcbfcd
TG		 6568 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6569 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6570#endif
6571 }
6572#endif
252b5132
RH		 6573}
6574
6575/* Generate a reloc for a fixup. */
6576
6577arelent *
98027b10 6578tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6579{
6580 arelent *reloc;
6581
6582 reloc = (arelent *) xmalloc (sizeof (arelent));
6583
49309057
ILT		 6584 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6585 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6586 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6587 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6588 if (reloc->howto == (reloc_howto_type *) NULL)
6589 {
6590 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6591 _("reloc %d not supported by object file format"),
6592 (int) fixp->fx_r_type);
252b5132
RH		 6593 return NULL;
6594 }
6595 reloc->addend = fixp->fx_addnumber;
6596
6597 return reloc;
6598}
75e21f08
JJ		 6599
6600void
98027b10 6601ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6602{
6603 cfi_add_CFA_def_cfa (1, 0);
6604}
6605
6606int
1df69f4f 6607tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6608{
6609 unsigned int regnum = -1;
6610 unsigned int i;
6611 const char *p;
6612 char *q;
6613 static struct { char *name; int dw2regnum; } regnames[] =
6614 {
6615 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6616 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6617 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6618 { "spe_acc", 111 }, { "spefscr", 112 }
6619 };
6620
6621 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6622 if (strcmp (regnames[i].name, regname) == 0)
6623 return regnames[i].dw2regnum;
6624
6625 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6626 {
6627 p = regname + 1 + (regname[1] == '.');
6628 regnum = strtoul (p, &q, 10);
6629 if (p == q || *q || regnum >= 32)
6630 return -1;
6631 if (regname[0] == 'f')
b7d7dc63 6632 regnum += 32;
75e21f08 6633 else if (regname[0] == 'v')
b7d7dc63 6634 regnum += 77;
75e21f08
JJ		 6635 }
6636 else if (regname[0] == 'c' && regname[1] == 'r')
6637 {
6638 p = regname + 2 + (regname[2] == '.');
6639 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6640 return -1;
75e21f08
JJ		 6641 regnum = p[0] - '0' + 68;
6642 }
6643 return regnum;
6644}
GDB Binutils - Deliverables
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