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include/opcode/
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
0dc93057 3 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
c865e45b 111static void ppc_ref (int);
98027b10
AM		 112static void ppc_section (int);
113static void ppc_named_section (int);
114static void ppc_stabx (int);
115static void ppc_rename (int);
116static void ppc_toc (int);
117static void ppc_xcoff_cons (int);
118static void ppc_vbyte (int);
252b5132
RH		 119#endif
120
121#ifdef OBJ_ELF
98027b10
AM		 122static void ppc_elf_cons (int);
123static void ppc_elf_rdata (int);
124static void ppc_elf_lcomm (int);
252b5132
RH		 125#endif
126
127#ifdef TE_PE
98027b10
AM		 128static void ppc_previous (int);
129static void ppc_pdata (int);
130static void ppc_ydata (int);
131static void ppc_reldata (int);
132static void ppc_rdata (int);
133static void ppc_ualong (int);
134static void ppc_znop (int);
135static void ppc_pe_comm (int);
136static void ppc_pe_section (int);
137static void ppc_pe_function (int);
138static void ppc_pe_tocd (int);
252b5132
RH		 139#endif
140\f
141/* Generic assembler global variables which must be defined by all
142 targets. */
143
144#ifdef OBJ_ELF
145/* This string holds the chars that always start a comment. If the
146 pre-processor is disabled, these aren't very useful. The macro
147 tc_comment_chars points to this. We use this, rather than the
148 usual comment_chars, so that we can switch for Solaris conventions. */
149static const char ppc_solaris_comment_chars[] = "#!";
150static const char ppc_eabi_comment_chars[] = "#";
151
152#ifdef TARGET_SOLARIS_COMMENT
153const char *ppc_comment_chars = ppc_solaris_comment_chars;
154#else
155const char *ppc_comment_chars = ppc_eabi_comment_chars;
156#endif
157#else
158const char comment_chars[] = "#";
159#endif
160
161/* Characters which start a comment at the beginning of a line. */
162const char line_comment_chars[] = "#";
163
164/* Characters which may be used to separate multiple commands on a
165 single line. */
166const char line_separator_chars[] = ";";
167
168/* Characters which are used to indicate an exponent in a floating
169 point number. */
170const char EXP_CHARS[] = "eE";
171
172/* Characters which mean that a number is a floating point constant,
173 as in 0d1.0. */
174const char FLT_CHARS[] = "dD";
5ce8663f 175
5e02f92e 176/* Anything that can start an operand needs to be mentioned here,
ac805826 177 to stop the input scrubber eating whitespace. */
5e02f92e 178const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 179
180/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
181int ppc_cie_data_alignment;
783de163
AM		 182
183/* The type of processor we are assembling for. This is one or more
184 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 185ppc_cpu_t ppc_cpu = 0;
01efc3af
AM		 186
187/* Flags set on encountering toc relocs. */
188enum {
189 has_large_toc_reloc = 1,
190 has_small_toc_reloc = 2
191} toc_reloc_types;
252b5132
RH		 192\f
193/* The target specific pseudo-ops which we support. */
194
195const pseudo_typeS md_pseudo_table[] =
196{
197 /* Pseudo-ops which must be overridden. */
198 { "byte", ppc_byte, 0 },
199
200#ifdef OBJ_XCOFF
201 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
202 legitimately belong in the obj-*.c file. However, XCOFF is based
203 on COFF, and is only implemented for the RS/6000. We just use
204 obj-coff.c, and add what we need here. */
205 { "comm", ppc_comm, 0 },
206 { "lcomm", ppc_comm, 1 },
207 { "bb", ppc_bb, 0 },
208 { "bc", ppc_bc, 0 },
209 { "bf", ppc_bf, 0 },
210 { "bi", ppc_biei, 0 },
211 { "bs", ppc_bs, 0 },
212 { "csect", ppc_csect, 0 },
213 { "data", ppc_section, 'd' },
214 { "eb", ppc_eb, 0 },
215 { "ec", ppc_ec, 0 },
216 { "ef", ppc_ef, 0 },
217 { "ei", ppc_biei, 1 },
218 { "es", ppc_es, 0 },
219 { "extern", ppc_extern, 0 },
220 { "function", ppc_function, 0 },
221 { "lglobl", ppc_lglobl, 0 },
c865e45b 222 { "ref", ppc_ref, 0 },
252b5132
RH		 223 { "rename", ppc_rename, 0 },
224 { "section", ppc_named_section, 0 },
225 { "stabx", ppc_stabx, 0 },
226 { "text", ppc_section, 't' },
227 { "toc", ppc_toc, 0 },
228 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 229 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 230 { "word", ppc_xcoff_cons, 1 },
231 { "short", ppc_xcoff_cons, 1 },
232 { "vbyte", ppc_vbyte, 0 },
233#endif
234
235#ifdef OBJ_ELF
0baf16f2
AM		 236 { "llong", ppc_elf_cons, 8 },
237 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 238 { "long", ppc_elf_cons, 4 },
239 { "word", ppc_elf_cons, 2 },
240 { "short", ppc_elf_cons, 2 },
241 { "rdata", ppc_elf_rdata, 0 },
242 { "rodata", ppc_elf_rdata, 0 },
243 { "lcomm", ppc_elf_lcomm, 0 },
244#endif
245
246#ifdef TE_PE
99a814a1 247 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 248 { "previous", ppc_previous, 0 },
249 { "pdata", ppc_pdata, 0 },
250 { "ydata", ppc_ydata, 0 },
251 { "reldata", ppc_reldata, 0 },
252 { "rdata", ppc_rdata, 0 },
253 { "ualong", ppc_ualong, 0 },
254 { "znop", ppc_znop, 0 },
255 { "comm", ppc_pe_comm, 0 },
256 { "lcomm", ppc_pe_comm, 1 },
257 { "section", ppc_pe_section, 0 },
258 { "function", ppc_pe_function,0 },
259 { "tocd", ppc_pe_tocd, 0 },
260#endif
261
0baf16f2 262#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 263 { "tc", ppc_tc, 0 },
0baf16f2
AM		 264 { "machine", ppc_machine, 0 },
265#endif
252b5132
RH		 266
267 { NULL, NULL, 0 }
268};
269
270\f
99a814a1
AM		 271/* Predefined register names if -mregnames (or default for Windows NT).
272 In general, there are lots of them, in an attempt to be compatible
273 with a number of other Windows NT assemblers. */
252b5132
RH		 274
275/* Structure to hold information about predefined registers. */
276struct pd_reg
277 {
278 char *name;
279 int value;
280 };
281
282/* List of registers that are pre-defined:
283
284 Each general register has predefined names of the form:
285 1. r<reg_num> which has the value <reg_num>.
286 2. r.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each floating point register has predefined names of the form:
289 1. f<reg_num> which has the value <reg_num>.
290 2. f.<reg_num> which has the value <reg_num>.
291
7a899fff
C		 292 Each vector unit register has predefined names of the form:
293 1. v<reg_num> which has the value <reg_num>.
294 2. v.<reg_num> which has the value <reg_num>.
295
252b5132
RH		 296 Each condition register has predefined names of the form:
297 1. cr<reg_num> which has the value <reg_num>.
298 2. cr.<reg_num> which has the value <reg_num>.
299
300 There are individual registers as well:
301 sp or r.sp has the value 1
302 rtoc or r.toc has the value 2
303 fpscr has the value 0
304 xer has the value 1
305 lr has the value 8
306 ctr has the value 9
307 pmr has the value 0
308 dar has the value 19
309 dsisr has the value 18
310 dec has the value 22
311 sdr1 has the value 25
312 srr0 has the value 26
313 srr1 has the value 27
314
81d4177b 315 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 316
317static const struct pd_reg pre_defined_registers[] =
318{
319 { "cr.0", 0 }, /* Condition Registers */
320 { "cr.1", 1 },
321 { "cr.2", 2 },
322 { "cr.3", 3 },
323 { "cr.4", 4 },
324 { "cr.5", 5 },
325 { "cr.6", 6 },
326 { "cr.7", 7 },
327
328 { "cr0", 0 },
329 { "cr1", 1 },
330 { "cr2", 2 },
331 { "cr3", 3 },
332 { "cr4", 4 },
333 { "cr5", 5 },
334 { "cr6", 6 },
335 { "cr7", 7 },
336
337 { "ctr", 9 },
338
339 { "dar", 19 }, /* Data Access Register */
340 { "dec", 22 }, /* Decrementer */
341 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
342
343 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 344 { "f.1", 1 },
345 { "f.10", 10 },
346 { "f.11", 11 },
347 { "f.12", 12 },
348 { "f.13", 13 },
349 { "f.14", 14 },
350 { "f.15", 15 },
351 { "f.16", 16 },
352 { "f.17", 17 },
353 { "f.18", 18 },
354 { "f.19", 19 },
355 { "f.2", 2 },
356 { "f.20", 20 },
357 { "f.21", 21 },
358 { "f.22", 22 },
359 { "f.23", 23 },
360 { "f.24", 24 },
361 { "f.25", 25 },
362 { "f.26", 26 },
363 { "f.27", 27 },
364 { "f.28", 28 },
365 { "f.29", 29 },
366 { "f.3", 3 },
252b5132
RH		 367 { "f.30", 30 },
368 { "f.31", 31 },
066be9f7
PB		 369
370 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
371 { "f.33", 33 },
372 { "f.34", 34 },
373 { "f.35", 35 },
374 { "f.36", 36 },
375 { "f.37", 37 },
376 { "f.38", 38 },
377 { "f.39", 39 },
81d4177b 378 { "f.4", 4 },
066be9f7
PB		 379 { "f.40", 40 },
380 { "f.41", 41 },
381 { "f.42", 42 },
382 { "f.43", 43 },
383 { "f.44", 44 },
384 { "f.45", 45 },
385 { "f.46", 46 },
386 { "f.47", 47 },
387 { "f.48", 48 },
388 { "f.49", 49 },
81d4177b 389 { "f.5", 5 },
066be9f7
PB		 390 { "f.50", 50 },
391 { "f.51", 51 },
392 { "f.52", 52 },
393 { "f.53", 53 },
394 { "f.54", 54 },
395 { "f.55", 55 },
396 { "f.56", 56 },
397 { "f.57", 57 },
398 { "f.58", 58 },
399 { "f.59", 59 },
81d4177b 400 { "f.6", 6 },
066be9f7
PB		 401 { "f.60", 60 },
402 { "f.61", 61 },
403 { "f.62", 62 },
404 { "f.63", 63 },
81d4177b
KH		 405 { "f.7", 7 },
406 { "f.8", 8 },
407 { "f.9", 9 },
408
409 { "f0", 0 },
410 { "f1", 1 },
411 { "f10", 10 },
412 { "f11", 11 },
413 { "f12", 12 },
414 { "f13", 13 },
415 { "f14", 14 },
416 { "f15", 15 },
417 { "f16", 16 },
418 { "f17", 17 },
419 { "f18", 18 },
420 { "f19", 19 },
421 { "f2", 2 },
422 { "f20", 20 },
423 { "f21", 21 },
424 { "f22", 22 },
425 { "f23", 23 },
426 { "f24", 24 },
427 { "f25", 25 },
428 { "f26", 26 },
429 { "f27", 27 },
430 { "f28", 28 },
431 { "f29", 29 },
432 { "f3", 3 },
252b5132
RH		 433 { "f30", 30 },
434 { "f31", 31 },
066be9f7
PB		 435
436 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
437 { "f33", 33 },
438 { "f34", 34 },
439 { "f35", 35 },
440 { "f36", 36 },
441 { "f37", 37 },
442 { "f38", 38 },
443 { "f39", 39 },
81d4177b 444 { "f4", 4 },
066be9f7
PB		 445 { "f40", 40 },
446 { "f41", 41 },
447 { "f42", 42 },
448 { "f43", 43 },
449 { "f44", 44 },
450 { "f45", 45 },
451 { "f46", 46 },
452 { "f47", 47 },
453 { "f48", 48 },
454 { "f49", 49 },
81d4177b 455 { "f5", 5 },
066be9f7
PB		 456 { "f50", 50 },
457 { "f51", 51 },
458 { "f52", 52 },
459 { "f53", 53 },
460 { "f54", 54 },
461 { "f55", 55 },
462 { "f56", 56 },
463 { "f57", 57 },
464 { "f58", 58 },
465 { "f59", 59 },
81d4177b 466 { "f6", 6 },
066be9f7
PB		 467 { "f60", 60 },
468 { "f61", 61 },
469 { "f62", 62 },
470 { "f63", 63 },
81d4177b
KH		 471 { "f7", 7 },
472 { "f8", 8 },
473 { "f9", 9 },
252b5132
RH		 474
475 { "fpscr", 0 },
476
c3d65c1c
BE		 477 /* Quantization registers used with pair single instructions. */
478 { "gqr.0", 0 },
479 { "gqr.1", 1 },
480 { "gqr.2", 2 },
481 { "gqr.3", 3 },
482 { "gqr.4", 4 },
483 { "gqr.5", 5 },
484 { "gqr.6", 6 },
485 { "gqr.7", 7 },
486 { "gqr0", 0 },
487 { "gqr1", 1 },
488 { "gqr2", 2 },
489 { "gqr3", 3 },
490 { "gqr4", 4 },
491 { "gqr5", 5 },
492 { "gqr6", 6 },
493 { "gqr7", 7 },
494
252b5132
RH		 495 { "lr", 8 }, /* Link Register */
496
497 { "pmr", 0 },
498
499 { "r.0", 0 }, /* General Purpose Registers */
500 { "r.1", 1 },
501 { "r.10", 10 },
502 { "r.11", 11 },
503 { "r.12", 12 },
504 { "r.13", 13 },
505 { "r.14", 14 },
506 { "r.15", 15 },
507 { "r.16", 16 },
508 { "r.17", 17 },
509 { "r.18", 18 },
510 { "r.19", 19 },
511 { "r.2", 2 },
512 { "r.20", 20 },
513 { "r.21", 21 },
514 { "r.22", 22 },
515 { "r.23", 23 },
516 { "r.24", 24 },
517 { "r.25", 25 },
518 { "r.26", 26 },
519 { "r.27", 27 },
520 { "r.28", 28 },
521 { "r.29", 29 },
522 { "r.3", 3 },
523 { "r.30", 30 },
524 { "r.31", 31 },
525 { "r.4", 4 },
526 { "r.5", 5 },
527 { "r.6", 6 },
528 { "r.7", 7 },
529 { "r.8", 8 },
530 { "r.9", 9 },
531
532 { "r.sp", 1 }, /* Stack Pointer */
533
534 { "r.toc", 2 }, /* Pointer to the table of contents */
535
536 { "r0", 0 }, /* More general purpose registers */
537 { "r1", 1 },
538 { "r10", 10 },
539 { "r11", 11 },
540 { "r12", 12 },
541 { "r13", 13 },
542 { "r14", 14 },
543 { "r15", 15 },
544 { "r16", 16 },
545 { "r17", 17 },
546 { "r18", 18 },
547 { "r19", 19 },
548 { "r2", 2 },
549 { "r20", 20 },
550 { "r21", 21 },
551 { "r22", 22 },
552 { "r23", 23 },
553 { "r24", 24 },
554 { "r25", 25 },
555 { "r26", 26 },
556 { "r27", 27 },
557 { "r28", 28 },
558 { "r29", 29 },
559 { "r3", 3 },
560 { "r30", 30 },
561 { "r31", 31 },
562 { "r4", 4 },
563 { "r5", 5 },
564 { "r6", 6 },
565 { "r7", 7 },
566 { "r8", 8 },
567 { "r9", 9 },
568
569 { "rtoc", 2 }, /* Table of contents */
570
571 { "sdr1", 25 }, /* Storage Description Register 1 */
572
573 { "sp", 1 },
574
575 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
576 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 577
066be9f7 578 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 579 { "v.1", 1 },
580 { "v.10", 10 },
581 { "v.11", 11 },
582 { "v.12", 12 },
583 { "v.13", 13 },
584 { "v.14", 14 },
585 { "v.15", 15 },
586 { "v.16", 16 },
587 { "v.17", 17 },
588 { "v.18", 18 },
589 { "v.19", 19 },
590 { "v.2", 2 },
591 { "v.20", 20 },
592 { "v.21", 21 },
593 { "v.22", 22 },
594 { "v.23", 23 },
595 { "v.24", 24 },
596 { "v.25", 25 },
597 { "v.26", 26 },
598 { "v.27", 27 },
599 { "v.28", 28 },
600 { "v.29", 29 },
601 { "v.3", 3 },
7a899fff
C		 602 { "v.30", 30 },
603 { "v.31", 31 },
81d4177b
KH		 604 { "v.4", 4 },
605 { "v.5", 5 },
606 { "v.6", 6 },
607 { "v.7", 7 },
608 { "v.8", 8 },
609 { "v.9", 9 },
7a899fff
C		 610
611 { "v0", 0 },
81d4177b
KH		 612 { "v1", 1 },
613 { "v10", 10 },
614 { "v11", 11 },
615 { "v12", 12 },
616 { "v13", 13 },
617 { "v14", 14 },
618 { "v15", 15 },
619 { "v16", 16 },
620 { "v17", 17 },
621 { "v18", 18 },
622 { "v19", 19 },
623 { "v2", 2 },
624 { "v20", 20 },
625 { "v21", 21 },
626 { "v22", 22 },
627 { "v23", 23 },
628 { "v24", 24 },
629 { "v25", 25 },
630 { "v26", 26 },
631 { "v27", 27 },
632 { "v28", 28 },
633 { "v29", 29 },
634 { "v3", 3 },
7a899fff
C		 635 { "v30", 30 },
636 { "v31", 31 },
81d4177b
KH		 637 { "v4", 4 },
638 { "v5", 5 },
639 { "v6", 6 },
640 { "v7", 7 },
641 { "v8", 8 },
7a899fff 642 { "v9", 9 },
252b5132 643
066be9f7
PB		 644 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
645 { "vs.1", 1 },
646 { "vs.10", 10 },
647 { "vs.11", 11 },
648 { "vs.12", 12 },
649 { "vs.13", 13 },
650 { "vs.14", 14 },
651 { "vs.15", 15 },
652 { "vs.16", 16 },
653 { "vs.17", 17 },
654 { "vs.18", 18 },
655 { "vs.19", 19 },
656 { "vs.2", 2 },
657 { "vs.20", 20 },
658 { "vs.21", 21 },
659 { "vs.22", 22 },
660 { "vs.23", 23 },
661 { "vs.24", 24 },
662 { "vs.25", 25 },
663 { "vs.26", 26 },
664 { "vs.27", 27 },
665 { "vs.28", 28 },
666 { "vs.29", 29 },
667 { "vs.3", 3 },
668 { "vs.30", 30 },
669 { "vs.31", 31 },
670 { "vs.32", 32 },
671 { "vs.33", 33 },
672 { "vs.34", 34 },
673 { "vs.35", 35 },
674 { "vs.36", 36 },
675 { "vs.37", 37 },
676 { "vs.38", 38 },
677 { "vs.39", 39 },
678 { "vs.4", 4 },
679 { "vs.40", 40 },
680 { "vs.41", 41 },
681 { "vs.42", 42 },
682 { "vs.43", 43 },
683 { "vs.44", 44 },
684 { "vs.45", 45 },
685 { "vs.46", 46 },
686 { "vs.47", 47 },
687 { "vs.48", 48 },
688 { "vs.49", 49 },
689 { "vs.5", 5 },
690 { "vs.50", 50 },
691 { "vs.51", 51 },
692 { "vs.52", 52 },
693 { "vs.53", 53 },
694 { "vs.54", 54 },
695 { "vs.55", 55 },
696 { "vs.56", 56 },
697 { "vs.57", 57 },
698 { "vs.58", 58 },
699 { "vs.59", 59 },
700 { "vs.6", 6 },
701 { "vs.60", 60 },
702 { "vs.61", 61 },
703 { "vs.62", 62 },
704 { "vs.63", 63 },
705 { "vs.7", 7 },
706 { "vs.8", 8 },
707 { "vs.9", 9 },
708
709 { "vs0", 0 },
710 { "vs1", 1 },
711 { "vs10", 10 },
712 { "vs11", 11 },
713 { "vs12", 12 },
714 { "vs13", 13 },
715 { "vs14", 14 },
716 { "vs15", 15 },
717 { "vs16", 16 },
718 { "vs17", 17 },
719 { "vs18", 18 },
720 { "vs19", 19 },
721 { "vs2", 2 },
722 { "vs20", 20 },
723 { "vs21", 21 },
724 { "vs22", 22 },
725 { "vs23", 23 },
726 { "vs24", 24 },
727 { "vs25", 25 },
728 { "vs26", 26 },
729 { "vs27", 27 },
730 { "vs28", 28 },
731 { "vs29", 29 },
732 { "vs3", 3 },
733 { "vs30", 30 },
734 { "vs31", 31 },
735 { "vs32", 32 },
736 { "vs33", 33 },
737 { "vs34", 34 },
738 { "vs35", 35 },
739 { "vs36", 36 },
740 { "vs37", 37 },
741 { "vs38", 38 },
742 { "vs39", 39 },
743 { "vs4", 4 },
744 { "vs40", 40 },
745 { "vs41", 41 },
746 { "vs42", 42 },
747 { "vs43", 43 },
748 { "vs44", 44 },
749 { "vs45", 45 },
750 { "vs46", 46 },
751 { "vs47", 47 },
752 { "vs48", 48 },
753 { "vs49", 49 },
754 { "vs5", 5 },
755 { "vs50", 50 },
756 { "vs51", 51 },
757 { "vs52", 52 },
758 { "vs53", 53 },
759 { "vs54", 54 },
760 { "vs55", 55 },
761 { "vs56", 56 },
762 { "vs57", 57 },
763 { "vs58", 58 },
764 { "vs59", 59 },
765 { "vs6", 6 },
766 { "vs60", 60 },
767 { "vs61", 61 },
768 { "vs62", 62 },
769 { "vs63", 63 },
770 { "vs7", 7 },
771 { "vs8", 8 },
772 { "vs9", 9 },
773
252b5132
RH		 774 { "xer", 1 },
775
776};
777
bc805888 778#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 779
780/* Given NAME, find the register number associated with that name, return
781 the integer value associated with the given name or -1 on failure. */
782
252b5132 783static int
98027b10 784reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 785{
786 int middle, low, high;
787 int cmp;
788
789 low = 0;
790 high = regcount - 1;
791
792 do
793 {
794 middle = (low + high) / 2;
795 cmp = strcasecmp (name, regs[middle].name);
796 if (cmp < 0)
797 high = middle - 1;
798 else if (cmp > 0)
799 low = middle + 1;
800 else
801 return regs[middle].value;
802 }
803 while (low <= high);
804
805 return -1;
806}
807
808/*
99a814a1 809 * Summary of register_name.
252b5132
RH		 810 *
811 * in: Input_line_pointer points to 1st char of operand.
812 *
813 * out: A expressionS.
814 * The operand may have been a register: in this case, X_op == O_register,
815 * X_add_number is set to the register number, and truth is returned.
816 * Input_line_pointer->(next non-blank) char after operand, or is in its
817 * original state.
818 */
819
b34976b6 820static bfd_boolean
98027b10 821register_name (expressionS *expressionP)
252b5132
RH		 822{
823 int reg_number;
824 char *name;
825 char *start;
826 char c;
827
99a814a1 828 /* Find the spelling of the operand. */
252b5132 829 start = name = input_line_pointer;
3882b010 830 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 831 name = ++input_line_pointer;
832
3882b010 833 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 834 return FALSE;
252b5132
RH		 835
836 c = get_symbol_end ();
837 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
838
468cced8
AM		 839 /* Put back the delimiting char. */
840 *input_line_pointer = c;
841
99a814a1 842 /* Look to see if it's in the register table. */
81d4177b 843 if (reg_number >= 0)
252b5132
RH		 844 {
845 expressionP->X_op = O_register;
846 expressionP->X_add_number = reg_number;
81d4177b 847
99a814a1 848 /* Make the rest nice. */
252b5132
RH		 849 expressionP->X_add_symbol = NULL;
850 expressionP->X_op_symbol = NULL;
b34976b6 851 return TRUE;
252b5132 852 }
468cced8
AM		 853
854 /* Reset the line as if we had not done anything. */
855 input_line_pointer = start;
b34976b6 856 return FALSE;
252b5132
RH		 857}
858\f
859/* This function is called for each symbol seen in an expression. It
860 handles the special parsing which PowerPC assemblers are supposed
861 to use for condition codes. */
862
863/* Whether to do the special parsing. */
b34976b6 864static bfd_boolean cr_operand;
252b5132
RH		 865
866/* Names to recognize in a condition code. This table is sorted. */
867static const struct pd_reg cr_names[] =
868{
869 { "cr0", 0 },
870 { "cr1", 1 },
871 { "cr2", 2 },
872 { "cr3", 3 },
873 { "cr4", 4 },
874 { "cr5", 5 },
875 { "cr6", 6 },
876 { "cr7", 7 },
877 { "eq", 2 },
878 { "gt", 1 },
879 { "lt", 0 },
880 { "so", 3 },
881 { "un", 3 }
882};
883
884/* Parsing function. This returns non-zero if it recognized an
885 expression. */
886
887int
91d6fa6a 888ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 889{
890 int val;
891
892 if (! cr_operand)
893 return 0;
894
13abbae3
AM		 895 if (*name == '%')
896 ++name;
252b5132
RH		 897 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
898 name);
899 if (val < 0)
900 return 0;
901
91d6fa6a
NC		 902 exp->X_op = O_constant;
903 exp->X_add_number = val;
252b5132
RH		 904
905 return 1;
906}
907\f
908/* Local variables. */
909
2b3c4602
AM		 910/* Whether to target xcoff64/elf64. */
911static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 912
252b5132
RH		 913/* Opcode hash table. */
914static struct hash_control *ppc_hash;
915
916/* Macro hash table. */
917static struct hash_control *ppc_macro_hash;
918
919#ifdef OBJ_ELF
99a814a1 920/* What type of shared library support to use. */
5d6f4f16 921static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 922
99a814a1 923/* Flags to set in the elf header. */
252b5132
RH		 924static flagword ppc_flags = 0;
925
926/* Whether this is Solaris or not. */
927#ifdef TARGET_SOLARIS_COMMENT
b34976b6 928#define SOLARIS_P TRUE
252b5132 929#else
b34976b6 930#define SOLARIS_P FALSE
252b5132
RH		 931#endif
932
b34976b6 933static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 934#endif
935
936#ifdef OBJ_XCOFF
937
938/* The RS/6000 assembler uses the .csect pseudo-op to generate code
939 using a bunch of different sections. These assembler sections,
940 however, are all encompassed within the .text or .data sections of
941 the final output file. We handle this by using different
942 subsegments within these main segments. */
943
944/* Next subsegment to allocate within the .text segment. */
945static subsegT ppc_text_subsegment = 2;
946
947/* Linked list of csects in the text section. */
948static symbolS *ppc_text_csects;
949
950/* Next subsegment to allocate within the .data segment. */
951static subsegT ppc_data_subsegment = 2;
952
953/* Linked list of csects in the data section. */
954static symbolS *ppc_data_csects;
955
956/* The current csect. */
957static symbolS *ppc_current_csect;
958
959/* The RS/6000 assembler uses a TOC which holds addresses of functions
960 and variables. Symbols are put in the TOC with the .tc pseudo-op.
961 A special relocation is used when accessing TOC entries. We handle
962 the TOC as a subsegment within the .data segment. We set it up if
963 we see a .toc pseudo-op, and save the csect symbol here. */
964static symbolS *ppc_toc_csect;
965
966/* The first frag in the TOC subsegment. */
967static fragS *ppc_toc_frag;
968
969/* The first frag in the first subsegment after the TOC in the .data
970 segment. NULL if there are no subsegments after the TOC. */
971static fragS *ppc_after_toc_frag;
972
973/* The current static block. */
974static symbolS *ppc_current_block;
975
976/* The COFF debugging section; set by md_begin. This is not the
977 .debug section, but is instead the secret BFD section which will
978 cause BFD to set the section number of a symbol to N_DEBUG. */
979static asection *ppc_coff_debug_section;
980
981#endif /* OBJ_XCOFF */
982
983#ifdef TE_PE
984
985/* Various sections that we need for PE coff support. */
986static segT ydata_section;
987static segT pdata_section;
988static segT reldata_section;
989static segT rdata_section;
990static segT tocdata_section;
991
81d4177b 992/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 993static segT ppc_previous_section;
994static segT ppc_current_section;
995
996#endif /* TE_PE */
997
998#ifdef OBJ_ELF
999symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1000#define PPC_APUINFO_ISEL 0x40
1001#define PPC_APUINFO_PMR 0x41
1002#define PPC_APUINFO_RFMCI 0x42
1003#define PPC_APUINFO_CACHELCK 0x43
1004#define PPC_APUINFO_SPE 0x100
1005#define PPC_APUINFO_EFS 0x101
1006#define PPC_APUINFO_BRLOCK 0x102
1007
b34976b6
AM		 1008/*
1009 * We keep a list of APUinfo
6a0c61b7
EZ		 1010 */
1011unsigned long *ppc_apuinfo_list;
1012unsigned int ppc_apuinfo_num;
1013unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1014#endif /* OBJ_ELF */
1015\f
1016#ifdef OBJ_ELF
15c1449b 1017const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1018#else
15c1449b 1019const char *const md_shortopts = "um:";
252b5132 1020#endif
15c1449b 1021const struct option md_longopts[] = {
252b5132
RH		 1022 {NULL, no_argument, NULL, 0}
1023};
15c1449b 1024const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1025
1026int
98027b10 1027md_parse_option (int c, char *arg)
252b5132 1028{
69fe9ce5
AM		 1029 ppc_cpu_t new_cpu;
1030
252b5132
RH		 1031 switch (c)
1032 {
1033 case 'u':
1034 /* -u means that any undefined symbols should be treated as
1035 external, which is the default for gas anyhow. */
1036 break;
1037
1038#ifdef OBJ_ELF
1039 case 'l':
1040 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1041 sake, recognize -be also. */
252b5132
RH		 1042 if (strcmp (arg, "e") == 0)
1043 {
1044 target_big_endian = 0;
1045 set_target_endian = 1;
1046 }
1047 else
1048 return 0;
1049
1050 break;
1051
1052 case 'b':
1053 if (strcmp (arg, "e") == 0)
1054 {
1055 target_big_endian = 1;
1056 set_target_endian = 1;
1057 }
1058 else
1059 return 0;
1060
1061 break;
1062
1063 case 'K':
99a814a1 1064 /* Recognize -K PIC. */
252b5132
RH		 1065 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1066 {
1067 shlib = SHLIB_PIC;
1068 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1069 }
1070 else
1071 return 0;
1072
1073 break;
1074#endif
1075
7f6d05e8
CP		 1076 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1077 case 'a':
1078 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1079 {
1080#ifdef BFD64
1081 ppc_obj64 = 1;
1082#else
1083 as_fatal (_("%s unsupported"), "-a64");
1084#endif
1085 }
7f6d05e8 1086 else if (strcmp (arg, "32") == 0)
2b3c4602 1087 ppc_obj64 = 0;
7f6d05e8
CP		 1088 else
1089 return 0;
1090 break;
81d4177b 1091
252b5132 1092 case 'm':
69fe9ce5
AM		 1093 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1094 ppc_cpu = new_cpu;
252b5132
RH		 1095
1096 else if (strcmp (arg, "regnames") == 0)
b34976b6 1097 reg_names_p = TRUE;
252b5132
RH		 1098
1099 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1100 reg_names_p = FALSE;
252b5132
RH		 1101
1102#ifdef OBJ_ELF
99a814a1
AM		 1103 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1104 that require relocation. */
252b5132
RH		 1105 else if (strcmp (arg, "relocatable") == 0)
1106 {
5d6f4f16 1107 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1108 ppc_flags |= EF_PPC_RELOCATABLE;
1109 }
1110
1111 else if (strcmp (arg, "relocatable-lib") == 0)
1112 {
5d6f4f16 1113 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1114 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1115 }
1116
99a814a1 1117 /* -memb, set embedded bit. */
252b5132
RH		 1118 else if (strcmp (arg, "emb") == 0)
1119 ppc_flags |= EF_PPC_EMB;
1120
99a814a1
AM		 1121 /* -mlittle/-mbig set the endianess. */
1122 else if (strcmp (arg, "little") == 0
1123 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1124 {
1125 target_big_endian = 0;
1126 set_target_endian = 1;
1127 }
1128
1129 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1130 {
1131 target_big_endian = 1;
1132 set_target_endian = 1;
1133 }
1134
1135 else if (strcmp (arg, "solaris") == 0)
1136 {
b34976b6 1137 msolaris = TRUE;
252b5132
RH		 1138 ppc_comment_chars = ppc_solaris_comment_chars;
1139 }
1140
1141 else if (strcmp (arg, "no-solaris") == 0)
1142 {
b34976b6 1143 msolaris = FALSE;
252b5132
RH		 1144 ppc_comment_chars = ppc_eabi_comment_chars;
1145 }
1146#endif
1147 else
1148 {
1149 as_bad (_("invalid switch -m%s"), arg);
1150 return 0;
1151 }
1152 break;
1153
1154#ifdef OBJ_ELF
1155 /* -V: SVR4 argument to print version ID. */
1156 case 'V':
1157 print_version_id ();
1158 break;
1159
1160 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1161 should be emitted or not. FIXME: Not implemented. */
1162 case 'Q':
1163 break;
1164
1165 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1166 rather than .stabs.excl, which is ignored by the linker.
1167 FIXME: Not implemented. */
1168 case 's':
1169 if (arg)
1170 return 0;
1171
1172 break;
1173#endif
1174
1175 default:
1176 return 0;
1177 }
1178
1179 return 1;
1180}
1181
1182void
98027b10 1183md_show_usage (FILE *stream)
252b5132 1184{
bc805888 1185 fprintf (stream, _("\
252b5132 1186PowerPC options:\n\
ce3d2015
AM		 1187-a32 generate ELF32/XCOFF32\n\
1188-a64 generate ELF64/XCOFF64\n\
1189-u ignored\n\
1190-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1191-mpwr generate code for POWER (RIOS1)\n\
1192-m601 generate code for PowerPC 601\n\
418c1742 1193-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1194 generate code for PowerPC 603/604\n\
1195-m403 generate code for PowerPC 403\n\
1196-m405 generate code for PowerPC 405\n\
1197-m440 generate code for PowerPC 440\n\
1198-m464 generate code for PowerPC 464\n\
1199-m476 generate code for PowerPC 476\n\
f5c120c5 1200-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1201 generate code for PowerPC 7400/7410/7450/7455\n\
1202-m750cl generate code for PowerPC 750cl\n"));
df12615d 1203 fprintf (stream, _("\
ce3d2015
AM		 1204-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1205-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1206-mbooke generate code for 32-bit PowerPC BookE\n\
1207-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1208-mpower4, -mpwr4 generate code for Power4 architecture\n\
1209-mpower5, -mpwr5, -mpwr5x\n\
1210 generate code for Power5 architecture\n\
1211-mpower6, -mpwr6 generate code for Power6 architecture\n\
1212-mpower7, -mpwr7 generate code for Power7 architecture\n\
ce3d2015
AM		 1213-mcell generate code for Cell Broadband Engine architecture\n\
1214-mcom generate code Power/PowerPC common instructions\n\
1215-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1216 fprintf (stream, _("\
ce3d2015
AM		 1217-maltivec generate code for AltiVec\n\
1218-mvsx generate code for Vector-Scalar (VSX) instructions\n\
1219-me300 generate code for PowerPC e300 family\n\
1220-me500, -me500x2 generate code for Motorola e500 core complex\n\
1221-me500mc, generate code for Freescale e500mc core complex\n\
1222-me500mc64, generate code for Freescale e500mc64 core complex\n\
1223-mspe generate code for Motorola SPE instructions\n\
1224-mtitan generate code for AppliedMicro Titan core complex\n\
1225-mregnames Allow symbolic names for registers\n\
1226-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1227#ifdef OBJ_ELF
bc805888 1228 fprintf (stream, _("\
ce3d2015
AM		 1229-mrelocatable support for GCC's -mrelocatble option\n\
1230-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1231-memb set PPC_EMB bit in ELF flags\n\
df12615d 1232-mlittle, -mlittle-endian, -l, -le\n\
ce3d2015 1233 generate code for a little endian machine\n\
df12615d 1234-mbig, -mbig-endian, -b, -be\n\
ce3d2015
AM		 1235 generate code for a big endian machine\n\
1236-msolaris generate code for Solaris\n\
1237-mno-solaris do not generate code for Solaris\n\
1238-V print assembler version number\n\
1239-Qy, -Qn ignored\n"));
252b5132
RH		 1240#endif
1241}
1242\f
1243/* Set ppc_cpu if it is not already set. */
1244
1245static void
98027b10 1246ppc_set_cpu (void)
252b5132
RH		 1247{
1248 const char *default_os = TARGET_OS;
1249 const char *default_cpu = TARGET_CPU;
1250
3c9030c1 1251 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1252 {
2a98c3a6 1253 if (ppc_obj64)
bdc70b4a 1254 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1255 else if (strncmp (default_os, "aix", 3) == 0
1256 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1257 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1258 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1259 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1260 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1261 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1262 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1263 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1264 else
99a814a1
AM		 1265 as_fatal (_("Unknown default cpu = %s, os = %s"),
1266 default_cpu, default_os);
252b5132
RH		 1267 }
1268}
1269
9232bbb0
AM		 1270/* Figure out the BFD architecture to use. This function and ppc_mach
1271 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1272
1273enum bfd_architecture
98027b10 1274ppc_arch (void)
252b5132
RH		 1275{
1276 const char *default_cpu = TARGET_CPU;
1277 ppc_set_cpu ();
1278
1279 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1280 return bfd_arch_powerpc;
1281 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1282 return bfd_arch_rs6000;
1283 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1284 {
1285 if (strcmp (default_cpu, "rs6000") == 0)
1286 return bfd_arch_rs6000;
0baf16f2 1287 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1288 return bfd_arch_powerpc;
1289 }
1290
1291 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1292 return bfd_arch_unknown;
1293}
1294
7f6d05e8 1295unsigned long
98027b10 1296ppc_mach (void)
7f6d05e8 1297{
2a98c3a6
AM		 1298 if (ppc_obj64)
1299 return bfd_mach_ppc64;
1300 else if (ppc_arch () == bfd_arch_rs6000)
1301 return bfd_mach_rs6k;
ce3d2015
AM		 1302 else if (ppc_cpu & PPC_OPCODE_TITAN)
1303 return bfd_mach_ppc_titan;
2a98c3a6
AM		 1304 else
1305 return bfd_mach_ppc;
7f6d05e8
CP		 1306}
1307
81d4177b 1308extern char*
98027b10 1309ppc_target_format (void)
7f6d05e8
CP		 1310{
1311#ifdef OBJ_COFF
1312#ifdef TE_PE
99a814a1 1313 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1314#elif TE_POWERMAC
0baf16f2 1315 return "xcoff-powermac";
7f6d05e8 1316#else
eb1e0e80 1317# ifdef TE_AIX5
2b3c4602 1318 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1319# else
2b3c4602 1320 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1321# endif
7f6d05e8 1322#endif
7f6d05e8
CP		 1323#endif
1324#ifdef OBJ_ELF
9d8504b1
PB		 1325# ifdef TE_VXWORKS
1326 return "elf32-powerpc-vxworks";
1327# else
0baf16f2 1328 return (target_big_endian
2b3c4602
AM		 1329 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1330 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1331# endif
7f6d05e8
CP		 1332#endif
1333}
1334
69c040df
AM		 1335/* Insert opcodes and macros into hash tables. Called at startup and
1336 for .cpu pseudo. */
252b5132 1337
69c040df
AM		 1338static void
1339ppc_setup_opcodes (void)
252b5132 1340{
98027b10 1341 const struct powerpc_opcode *op;
252b5132
RH		 1342 const struct powerpc_opcode *op_end;
1343 const struct powerpc_macro *macro;
1344 const struct powerpc_macro *macro_end;
b84bf58a 1345 bfd_boolean bad_insn = FALSE;
252b5132 1346
69c040df
AM		 1347 if (ppc_hash != NULL)
1348 hash_die (ppc_hash);
1349 if (ppc_macro_hash != NULL)
1350 hash_die (ppc_macro_hash);
252b5132
RH		 1351
1352 /* Insert the opcodes into a hash table. */
1353 ppc_hash = hash_new ();
1354
c43a438d 1355 if (ENABLE_CHECKING)
b84bf58a 1356 {
c43a438d 1357 unsigned int i;
b84bf58a 1358
c43a438d
AM		 1359 /* Check operand masks. Code here and in the disassembler assumes
1360 all the 1's in the mask are contiguous. */
1361 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1362 {
c43a438d
AM		 1363 unsigned long mask = powerpc_operands[i].bitm;
1364 unsigned long right_bit;
1365 unsigned int j;
1366
1367 right_bit = mask & -mask;
1368 mask += right_bit;
1369 right_bit = mask & -mask;
1370 if (mask != right_bit)
1371 {
1372 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1373 bad_insn = TRUE;
1374 }
1375 for (j = i + 1; j < num_powerpc_operands; ++j)
1376 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1377 sizeof (powerpc_operands[0])) == 0)
1378 {
1379 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1380 j, i);
1381 bad_insn = TRUE;
1382 }
b84bf58a
AM		 1383 }
1384 }
1385
252b5132
RH		 1386 op_end = powerpc_opcodes + powerpc_num_opcodes;
1387 for (op = powerpc_opcodes; op < op_end; op++)
1388 {
c43a438d 1389 if (ENABLE_CHECKING)
b84bf58a 1390 {
c43a438d
AM		 1391 const unsigned char *o;
1392 unsigned long omask = op->mask;
8dbcd839 1393
d815f1a9 1394 if (op != powerpc_opcodes)
8dbcd839 1395 {
d815f1a9
AM		 1396 /* The major opcodes had better be sorted. Code in the
1397 disassembler assumes the insns are sorted according to
1398 major opcode. */
1399 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1400 {
1401 as_bad (_("major opcode is not sorted for %s"),
1402 op->name);
1403 bad_insn = TRUE;
1404 }
1405
1406 /* Warn if the table isn't more strictly ordered.
1407 Unfortunately it doesn't seem possible to order the
1408 table on much more than the major opcode, which makes
1409 it difficult to implement a binary search in the
1410 disassembler. The problem is that we have multiple
1411 ways to disassemble instructions, and we usually want
1412 to choose a more specific form (with more bits set in
1413 the opcode) than a more general form. eg. all of the
1414 following are equivalent:
1415 bne label # opcode = 0x40820000, mask = 0xff830003
1416 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1417 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1418
1419 There are also cases where the table needs to be out
1420 of order to disassemble the correct instruction for
2f3bb96a 1421 processor variants. */
d815f1a9
AM		 1422 else if (0)
1423 {
1424 unsigned long t1 = op[0].opcode;
1425 unsigned long t2 = op[-1].opcode;
1426
1427 if (((t1 ^ t2) & 0xfc0007ff) == 0
1428 && (t1 & 0xfc0006df) == 0x7c000286)
1429 {
1430 /* spr field is split. */
1431 t1 = ((t1 & ~0x1ff800)
1432 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1433 t2 = ((t2 & ~0x1ff800)
1434 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1435 }
1436 if (t1 < t2)
1437 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1438 op[0].name, op[0].opcode, op[0].mask,
1439 op[-1].name, op[-1].opcode, op[-1].mask);
1440 }
8dbcd839 1441 }
c43a438d
AM		 1442
1443 /* The mask had better not trim off opcode bits. */
1444 if ((op->opcode & omask) != op->opcode)
1445 {
1446 as_bad (_("mask trims opcode bits for %s"),
1447 op->name);
1448 bad_insn = TRUE;
1449 }
1450
1451 /* The operands must not overlap the opcode or each other. */
1452 for (o = op->operands; *o; ++o)
1453 if (*o >= num_powerpc_operands)
1454 {
1455 as_bad (_("operand index error for %s"),
1456 op->name);
1457 bad_insn = TRUE;
1458 }
1459 else
b84bf58a 1460 {
c43a438d
AM		 1461 const struct powerpc_operand *operand = &powerpc_operands[*o];
1462 if (operand->shift >= 0)
b84bf58a 1463 {
c43a438d
AM		 1464 unsigned long mask = operand->bitm << operand->shift;
1465 if (omask & mask)
1466 {
1467 as_bad (_("operand %d overlap in %s"),
1468 (int) (o - op->operands), op->name);
1469 bad_insn = TRUE;
1470 }
1471 omask |= mask;
b84bf58a 1472 }
b84bf58a 1473 }
c43a438d 1474 }
252b5132 1475
bdc70b4a 1476 if ((ppc_cpu & op->flags) != 0
1cb0a767 1477 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1478 {
1479 const char *retval;
1480
98027b10 1481 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1482 if (retval != NULL)
252b5132 1483 {
b84bf58a 1484 as_bad (_("duplicate instruction %s"),
99a814a1 1485 op->name);
b84bf58a 1486 bad_insn = TRUE;
252b5132
RH		 1487 }
1488 }
1489 }
1490
3c9030c1
AM		 1491 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1492 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1493 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1494
252b5132
RH		 1495 /* Insert the macros into a hash table. */
1496 ppc_macro_hash = hash_new ();
1497
1498 macro_end = powerpc_macros + powerpc_num_macros;
1499 for (macro = powerpc_macros; macro < macro_end; macro++)
1500 {
1501 if ((macro->flags & ppc_cpu) != 0)
1502 {
1503 const char *retval;
1504
98027b10 1505 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1506 if (retval != (const char *) NULL)
1507 {
b84bf58a
AM		 1508 as_bad (_("duplicate macro %s"), macro->name);
1509 bad_insn = TRUE;
252b5132
RH		 1510 }
1511 }
1512 }
1513
b84bf58a 1514 if (bad_insn)
252b5132 1515 abort ();
69c040df
AM		 1516}
1517
1518/* This function is called when the assembler starts up. It is called
1519 after the options have been parsed and the output file has been
1520 opened. */
1521
1522void
98027b10 1523md_begin (void)
69c040df
AM		 1524{
1525 ppc_set_cpu ();
1526
1527 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1528
1529#ifdef OBJ_ELF
1530 /* Set the ELF flags if desired. */
1531 if (ppc_flags && !msolaris)
1532 bfd_set_private_flags (stdoutput, ppc_flags);
1533#endif
1534
1535 ppc_setup_opcodes ();
252b5132 1536
67c1ffbe 1537 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1538 by the user. */
252b5132
RH		 1539 if (!set_target_endian)
1540 {
1541 set_target_endian = 1;
1542 target_big_endian = PPC_BIG_ENDIAN;
1543 }
1544
1545#ifdef OBJ_XCOFF
1546 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1547
1548 /* Create dummy symbols to serve as initial csects. This forces the
1549 text csects to precede the data csects. These symbols will not
1550 be output. */
1551 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1552 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1553 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1554 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1555#endif
1556
1557#ifdef TE_PE
1558
1559 ppc_current_section = text_section;
81d4177b 1560 ppc_previous_section = 0;
252b5132
RH		 1561
1562#endif
1563}
1564
6a0c61b7 1565void
98027b10 1566ppc_cleanup (void)
6a0c61b7 1567{
dc1d03fc 1568#ifdef OBJ_ELF
6a0c61b7
EZ		 1569 if (ppc_apuinfo_list == NULL)
1570 return;
1571
1572 /* Ok, so write the section info out. We have this layout:
1573
1574 byte data what
1575 ---- ---- ----
1576 0 8 length of "APUinfo\0"
1577 4 (n*4) number of APU's (4 bytes each)
1578 8 2 note type 2
1579 12 "APUinfo\0" name
1580 20 APU#1 first APU's info
1581 24 APU#2 second APU's info
1582 ... ...
1583 */
1584 {
1585 char *p;
1586 asection *seg = now_seg;
1587 subsegT subseg = now_subseg;
1588 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1589 unsigned int i;
6a0c61b7
EZ		 1590
1591 /* Create the .PPC.EMB.apuinfo section. */
1592 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1593 bfd_set_section_flags (stdoutput,
1594 apuinfo_secp,
e1a9cb8e 1595 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1596
1597 p = frag_more (4);
1598 md_number_to_chars (p, (valueT) 8, 4);
1599
1600 p = frag_more (4);
e98d298c 1601 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1602
1603 p = frag_more (4);
1604 md_number_to_chars (p, (valueT) 2, 4);
1605
1606 p = frag_more (8);
1607 strcpy (p, "APUinfo");
1608
1609 for (i = 0; i < ppc_apuinfo_num; i++)
1610 {
b34976b6
AM		 1611 p = frag_more (4);
1612 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1613 }
1614
1615 frag_align (2, 0, 0);
1616
1617 /* We probably can't restore the current segment, for there likely
1618 isn't one yet... */
1619 if (seg && subseg)
1620 subseg_set (seg, subseg);
1621 }
dc1d03fc 1622#endif
6a0c61b7
EZ		 1623}
1624
252b5132
RH		 1625/* Insert an operand value into an instruction. */
1626
1627static unsigned long
a1867a27
AM		 1628ppc_insert_operand (unsigned long insn,
1629 const struct powerpc_operand *operand,
1630 offsetT val,
91d6fa6a 1631 ppc_cpu_t cpu,
a1867a27
AM		 1632 char *file,
1633 unsigned int line)
252b5132 1634{
b84bf58a 1635 long min, max, right;
eb42fac1 1636
b84bf58a
AM		 1637 max = operand->bitm;
1638 right = max & -max;
1639 min = 0;
1640
1641 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1642 {
b84bf58a 1643 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1644 max = (max >> 1) & -right;
1645 min = ~max & -right;
b84bf58a 1646 }
252b5132 1647
b84bf58a 1648 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1649 max++;
252b5132 1650
b84bf58a 1651 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1652 {
1653 long tmp = min;
1654 min = -max;
1655 max = -tmp;
1656 }
b84bf58a 1657
a1867a27
AM		 1658 if (min <= max)
1659 {
1660 /* Some people write constants with the sign extension done by
1661 hand but only up to 32 bits. This shouldn't really be valid,
1662 but, to permit this code to assemble on a 64-bit host, we
1663 sign extend the 32-bit value to 64 bits if so doing makes the
1664 value valid. */
1665 if (val > max
1666 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1667 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1668 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1669 val = val - 0x80000000 - 0x80000000;
1670
1671 /* Similarly, people write expressions like ~(1<<15), and expect
1672 this to be OK for a 32-bit unsigned value. */
1673 else if (val < min
1674 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1675 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1676 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1677 val = val + 0x80000000 + 0x80000000;
1678
1679 else if (val < min
1680 || val > max
1681 || (val & (right - 1)) != 0)
1682 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1683 }
b84bf58a 1684
252b5132
RH		 1685 if (operand->insert)
1686 {
1687 const char *errmsg;
1688
1689 errmsg = NULL;
91d6fa6a 1690 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1691 if (errmsg != (const char *) NULL)
ee2c9aa9 1692 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1693 }
1694 else
b84bf58a 1695 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1696
1697 return insn;
1698}
1699
1700\f
1701#ifdef OBJ_ELF
1702/* Parse @got, etc. and return the desired relocation. */
1703static bfd_reloc_code_real_type
98027b10 1704ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1705{
1706 struct map_bfd {
1707 char *string;
b7d7dc63
AM		 1708 unsigned int length : 8;
1709 unsigned int valid32 : 1;
1710 unsigned int valid64 : 1;
1711 unsigned int reloc;
252b5132
RH		 1712 };
1713
1714 char ident[20];
1715 char *str = *str_p;
1716 char *str2;
1717 int ch;
1718 int len;
15c1449b 1719 const struct map_bfd *ptr;
252b5132 1720
b7d7dc63
AM		 1721#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1722#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1723#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1724
15c1449b 1725 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1726 MAP ("l", BFD_RELOC_LO16),
1727 MAP ("h", BFD_RELOC_HI16),
1728 MAP ("ha", BFD_RELOC_HI16_S),
1729 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1730 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1731 MAP ("got", BFD_RELOC_16_GOTOFF),
1732 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1733 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1734 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1735 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1736 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1737 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1738 MAP ("copy", BFD_RELOC_PPC_COPY),
1739 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1740 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1741 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1742 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1743 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1744 MAP ("tls", BFD_RELOC_PPC_TLS),
1745 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1746 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1747 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1748 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1749 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1750 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1751 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1752 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1753 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1754 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1755 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1756 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1757 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1758 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1759 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1760 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1761 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1762 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1763 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1764 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1765 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1766 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1767 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1768 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1769 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1770 MAP32 ("fixup", BFD_RELOC_CTOR),
1771 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1772 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1773 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1774 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1775 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1776 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1777 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1778 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1779 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1780 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1781 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1782 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1783 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1784 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1785 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1786 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1787 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1788 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1789 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1790 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1791 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1792 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1793 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1794 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1795 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1796 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1797 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1798 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1799 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1800 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1801 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1802 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1803 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1804 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1805 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1806 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1807 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1808 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1809 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1810 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1811 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1812 };
1813
1814 if (*str++ != '@')
1815 return BFD_RELOC_UNUSED;
1816
1817 for (ch = *str, str2 = ident;
1818 (str2 < ident + sizeof (ident) - 1
3882b010 1819 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1820 ch = *++str)
1821 {
3882b010 1822 *str2++ = TOLOWER (ch);
252b5132
RH		 1823 }
1824
1825 *str2 = '\0';
1826 len = str2 - ident;
1827
1828 ch = ident[0];
1829 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1830 if (ch == ptr->string[0]
1831 && len == ptr->length
b7d7dc63
AM		 1832 && memcmp (ident, ptr->string, ptr->length) == 0
1833 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1834 {
15c1449b
AM		 1835 int reloc = ptr->reloc;
1836
727fc41e
AM		 1837 if (!ppc_obj64 && exp_p->X_add_number != 0)
1838 {
1839 switch (reloc)
1840 {
1841 case BFD_RELOC_16_GOTOFF:
1842 case BFD_RELOC_LO16_GOTOFF:
1843 case BFD_RELOC_HI16_GOTOFF:
1844 case BFD_RELOC_HI16_S_GOTOFF:
1845 as_warn (_("identifier+constant@got means "
1846 "identifier@got+constant"));
1847 break;
1848
1849 case BFD_RELOC_PPC_GOT_TLSGD16:
1850 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1851 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1852 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1853 case BFD_RELOC_PPC_GOT_TLSLD16:
1854 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1855 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1856 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1857 case BFD_RELOC_PPC_GOT_DTPREL16:
1858 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1859 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1860 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1861 case BFD_RELOC_PPC_GOT_TPREL16:
1862 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1863 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1864 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1865 as_bad (_("symbol+offset not supported for got tls"));
1866 break;
1867 }
1868 }
5f6db75a
AM		 1869
1870 /* Now check for identifier@suffix+constant. */
1871 if (*str == '-' || *str == '+')
252b5132 1872 {
5f6db75a
AM		 1873 char *orig_line = input_line_pointer;
1874 expressionS new_exp;
1875
1876 input_line_pointer = str;
1877 expression (&new_exp);
1878 if (new_exp.X_op == O_constant)
252b5132 1879 {
5f6db75a
AM		 1880 exp_p->X_add_number += new_exp.X_add_number;
1881 str = input_line_pointer;
252b5132 1882 }
5f6db75a
AM		 1883
1884 if (&input_line_pointer != str_p)
1885 input_line_pointer = orig_line;
252b5132 1886 }
252b5132 1887 *str_p = str;
0baf16f2 1888
2b3c4602 1889 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1890 && exp_p->X_op == O_symbol
1891 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1892 {
9f2b53d7
AM		 1893 /* Change the symbol so that the dummy .TOC. symbol can be
1894 omitted from the object file. */
0baf16f2
AM		 1895 exp_p->X_add_symbol = &abs_symbol;
1896 }
1897
15c1449b 1898 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1899 }
1900
1901 return BFD_RELOC_UNUSED;
1902}
1903
99a814a1
AM		 1904/* Like normal .long/.short/.word, except support @got, etc.
1905 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1906static void
98027b10 1907ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1908{
1909 expressionS exp;
1910 bfd_reloc_code_real_type reloc;
1911
1912 if (is_it_end_of_statement ())
1913 {
1914 demand_empty_rest_of_line ();
1915 return;
1916 }
1917
1918 do
1919 {
1920 expression (&exp);
1921 if (exp.X_op == O_symbol
1922 && *input_line_pointer == '@'
99a814a1
AM		 1923 && (reloc = ppc_elf_suffix (&input_line_pointer,
1924 &exp)) != BFD_RELOC_UNUSED)
252b5132 1925 {
99a814a1
AM		 1926 reloc_howto_type *reloc_howto;
1927 int size;
1928
1929 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1930 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1931
1932 if (size > nbytes)
0baf16f2
AM		 1933 {
1934 as_bad (_("%s relocations do not fit in %d bytes\n"),
1935 reloc_howto->name, nbytes);
1936 }
252b5132
RH		 1937 else
1938 {
0baf16f2
AM		 1939 char *p;
1940 int offset;
252b5132 1941
0baf16f2 1942 p = frag_more (nbytes);
aa0c8c1a 1943 memset (p, 0, nbytes);
0baf16f2
AM		 1944 offset = 0;
1945 if (target_big_endian)
1946 offset = nbytes - size;
99a814a1
AM		 1947 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1948 &exp, 0, reloc);
252b5132
RH		 1949 }
1950 }
1951 else
1952 emit_expr (&exp, (unsigned int) nbytes);
1953 }
1954 while (*input_line_pointer++ == ',');
1955
99a814a1
AM		 1956 /* Put terminator back into stream. */
1957 input_line_pointer--;
252b5132
RH		 1958 demand_empty_rest_of_line ();
1959}
1960
1961/* Solaris pseduo op to change to the .rodata section. */
1962static void
98027b10 1963ppc_elf_rdata (int xxx)
252b5132
RH		 1964{
1965 char *save_line = input_line_pointer;
1966 static char section[] = ".rodata\n";
1967
99a814a1 1968 /* Just pretend this is .section .rodata */
252b5132
RH		 1969 input_line_pointer = section;
1970 obj_elf_section (xxx);
1971
1972 input_line_pointer = save_line;
1973}
1974
99a814a1 1975/* Pseudo op to make file scope bss items. */
252b5132 1976static void
98027b10 1977ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1978{
98027b10
AM		 1979 char *name;
1980 char c;
1981 char *p;
252b5132 1982 offsetT size;
98027b10 1983 symbolS *symbolP;
252b5132
RH		 1984 offsetT align;
1985 segT old_sec;
1986 int old_subsec;
1987 char *pfrag;
1988 int align2;
1989
1990 name = input_line_pointer;
1991 c = get_symbol_end ();
1992
99a814a1 1993 /* just after name is now '\0'. */
252b5132
RH		 1994 p = input_line_pointer;
1995 *p = c;
1996 SKIP_WHITESPACE ();
1997 if (*input_line_pointer != ',')
1998 {
1999 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
2000 ignore_rest_of_line ();
2001 return;
2002 }
2003
2004 input_line_pointer++; /* skip ',' */
2005 if ((size = get_absolute_expression ()) < 0)
2006 {
2007 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2008 ignore_rest_of_line ();
2009 return;
2010 }
2011
2012 /* The third argument to .lcomm is the alignment. */
2013 if (*input_line_pointer != ',')
2014 align = 8;
2015 else
2016 {
2017 ++input_line_pointer;
2018 align = get_absolute_expression ();
2019 if (align <= 0)
2020 {
2021 as_warn (_("ignoring bad alignment"));
2022 align = 8;
2023 }
2024 }
2025
2026 *p = 0;
2027 symbolP = symbol_find_or_make (name);
2028 *p = c;
2029
2030 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2031 {
2032 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2033 S_GET_NAME (symbolP));
2034 ignore_rest_of_line ();
2035 return;
2036 }
2037
2038 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2039 {
2040 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2041 S_GET_NAME (symbolP),
2042 (long) S_GET_VALUE (symbolP),
2043 (long) size);
2044
2045 ignore_rest_of_line ();
2046 return;
2047 }
2048
99a814a1 2049 /* Allocate_bss. */
252b5132
RH		 2050 old_sec = now_seg;
2051 old_subsec = now_subseg;
2052 if (align)
2053 {
99a814a1 2054 /* Convert to a power of 2 alignment. */
252b5132
RH		 2055 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2056 if (align != 1)
2057 {
2058 as_bad (_("Common alignment not a power of 2"));
2059 ignore_rest_of_line ();
2060 return;
2061 }
2062 }
2063 else
2064 align2 = 0;
2065
2066 record_alignment (bss_section, align2);
2067 subseg_set (bss_section, 0);
2068 if (align2)
2069 frag_align (align2, 0, 0);
2070 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2071 symbol_get_frag (symbolP)->fr_symbol = 0;
2072 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2073 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2074 (char *) 0);
2075 *pfrag = 0;
2076 S_SET_SIZE (symbolP, size);
2077 S_SET_SEGMENT (symbolP, bss_section);
2078 subseg_set (old_sec, old_subsec);
2079 demand_empty_rest_of_line ();
2080}
2081
2082/* Validate any relocations emitted for -mrelocatable, possibly adding
2083 fixups for word relocations in writable segments, so we can adjust
2084 them at runtime. */
2085static void
98027b10 2086ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2087{
2088 if (fixp->fx_done || fixp->fx_pcrel)
2089 return;
2090
2091 switch (shlib)
2092 {
2093 case SHLIB_NONE:
2094 case SHLIB_PIC:
2095 return;
2096
5d6f4f16 2097 case SHLIB_MRELOCATABLE:
252b5132
RH		 2098 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2099 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2100 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2101 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2102 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2103 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2104 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2105 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2106 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2107 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2108 && strcmp (segment_name (seg), ".got2") != 0
2109 && strcmp (segment_name (seg), ".dtors") != 0
2110 && strcmp (segment_name (seg), ".ctors") != 0
2111 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2112 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2113 && strcmp (segment_name (seg), ".eh_frame") != 0
2114 && strcmp (segment_name (seg), ".ex_shared") != 0)
2115 {
2116 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2117 || fixp->fx_r_type != BFD_RELOC_CTOR)
2118 {
2119 as_bad_where (fixp->fx_file, fixp->fx_line,
2120 _("Relocation cannot be done when using -mrelocatable"));
2121 }
2122 }
2123 return;
2124 }
2125}
0baf16f2 2126
7e8d4ab4
AM		 2127/* Prevent elf_frob_file_before_adjust removing a weak undefined
2128 function descriptor sym if the corresponding code sym is used. */
2129
2130void
98027b10 2131ppc_frob_file_before_adjust (void)
0baf16f2 2132{
7e8d4ab4 2133 symbolS *symp;
9232bbb0 2134 asection *toc;
0baf16f2 2135
7e8d4ab4
AM		 2136 if (!ppc_obj64)
2137 return;
2138
2139 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2140 {
7e8d4ab4
AM		 2141 const char *name;
2142 char *dotname;
2143 symbolS *dotsym;
2144 size_t len;
2145
2146 name = S_GET_NAME (symp);
2147 if (name[0] == '.')
2148 continue;
2149
2150 if (! S_IS_WEAK (symp)
2151 || S_IS_DEFINED (symp))
2152 continue;
2153
2154 len = strlen (name) + 1;
2155 dotname = xmalloc (len + 1);
2156 dotname[0] = '.';
2157 memcpy (dotname + 1, name, len);
461b725f 2158 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2159 free (dotname);
2160 if (dotsym != NULL && (symbol_used_p (dotsym)
2161 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2162 symbol_mark_used (symp);
2163
0baf16f2
AM		 2164 }
2165
9232bbb0
AM		 2166 toc = bfd_get_section_by_name (stdoutput, ".toc");
2167 if (toc != NULL
01efc3af 2168 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2169 && bfd_section_size (stdoutput, toc) > 0x10000)
2170 as_warn (_("TOC section size exceeds 64k"));
2171
7e8d4ab4
AM		 2172 /* Don't emit .TOC. symbol. */
2173 symp = symbol_find (".TOC.");
2174 if (symp != NULL)
2175 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2176}
252b5132
RH		 2177#endif /* OBJ_ELF */
2178\f
2179#ifdef TE_PE
2180
2181/*
99a814a1 2182 * Summary of parse_toc_entry.
252b5132
RH		 2183 *
2184 * in: Input_line_pointer points to the '[' in one of:
2185 *
2186 * [toc] [tocv] [toc32] [toc64]
2187 *
2188 * Anything else is an error of one kind or another.
2189 *
81d4177b 2190 * out:
252b5132
RH		 2191 * return value: success or failure
2192 * toc_kind: kind of toc reference
2193 * input_line_pointer:
2194 * success: first char after the ']'
2195 * failure: unchanged
2196 *
2197 * settings:
2198 *
2199 * [toc] - rv == success, toc_kind = default_toc
2200 * [tocv] - rv == success, toc_kind = data_in_toc
2201 * [toc32] - rv == success, toc_kind = must_be_32
2202 * [toc64] - rv == success, toc_kind = must_be_64
2203 *
2204 */
2205
81d4177b
KH		 2206enum toc_size_qualifier
2207{
252b5132
RH		 2208 default_toc, /* The toc cell constructed should be the system default size */
2209 data_in_toc, /* This is a direct reference to a toc cell */
2210 must_be_32, /* The toc cell constructed must be 32 bits wide */
2211 must_be_64 /* The toc cell constructed must be 64 bits wide */
2212};
2213
2214static int
98027b10 2215parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2216{
2217 char *start;
2218 char *toc_spec;
2219 char c;
2220 enum toc_size_qualifier t;
2221
99a814a1 2222 /* Save the input_line_pointer. */
252b5132
RH		 2223 start = input_line_pointer;
2224
99a814a1 2225 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2226 ++input_line_pointer;
2227 SKIP_WHITESPACE ();
81d4177b 2228
99a814a1 2229 /* Find the spelling of the operand. */
252b5132
RH		 2230 toc_spec = input_line_pointer;
2231 c = get_symbol_end ();
2232
99a814a1 2233 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2234 {
2235 t = default_toc;
2236 }
99a814a1 2237 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2238 {
2239 t = data_in_toc;
2240 }
99a814a1 2241 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2242 {
2243 t = must_be_32;
2244 }
99a814a1 2245 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2246 {
2247 t = must_be_64;
2248 }
2249 else
2250 {
2251 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2252 *input_line_pointer = c;
2253 input_line_pointer = start;
252b5132
RH		 2254 return 0;
2255 }
2256
99a814a1
AM		 2257 /* Now find the ']'. */
2258 *input_line_pointer = c;
252b5132 2259
81d4177b
KH		 2260 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2261 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2262
2263 if (c != ']')
2264 {
2265 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2266 input_line_pointer = start;
252b5132
RH		 2267 return 0;
2268 }
2269
99a814a1 2270 *toc_kind = t;
252b5132
RH		 2271 return 1;
2272}
2273#endif
2274\f
2275
dc1d03fc 2276#ifdef OBJ_ELF
6a0c61b7
EZ		 2277#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2278static void
98027b10 2279ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2280{
2281 unsigned int i;
2282
2283 /* Check we don't already exist. */
2284 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2285 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2286 return;
b34976b6 2287
6a0c61b7
EZ		 2288 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2289 {
2290 if (ppc_apuinfo_num_alloc == 0)
2291 {
2292 ppc_apuinfo_num_alloc = 4;
2293 ppc_apuinfo_list = (unsigned long *)
2294 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2295 }
2296 else
2297 {
2298 ppc_apuinfo_num_alloc += 4;
2299 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2300 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2301 }
2302 }
dc1d03fc 2303 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2304}
2305#undef APUID
dc1d03fc 2306#endif
6a0c61b7
EZ		 2307\f
2308
252b5132
RH		 2309/* We need to keep a list of fixups. We can't simply generate them as
2310 we go, because that would require us to first create the frag, and
2311 that would screw up references to ``.''. */
2312
2313struct ppc_fixup
2314{
2315 expressionS exp;
2316 int opindex;
2317 bfd_reloc_code_real_type reloc;
2318};
2319
2320#define MAX_INSN_FIXUPS (5)
2321
2322/* This routine is called for each instruction to be assembled. */
2323
2324void
98027b10 2325md_assemble (char *str)
252b5132
RH		 2326{
2327 char *s;
2328 const struct powerpc_opcode *opcode;
2329 unsigned long insn;
2330 const unsigned char *opindex_ptr;
2331 int skip_optional;
2332 int need_paren;
2333 int next_opindex;
2334 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2335 int fc;
2336 char *f;
09b935ac 2337 int addr_mod;
252b5132
RH		 2338 int i;
2339#ifdef OBJ_ELF
2340 bfd_reloc_code_real_type reloc;
2341#endif
2342
2343 /* Get the opcode. */
3882b010 2344 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2345 ;
2346 if (*s != '\0')
2347 *s++ = '\0';
2348
2349 /* Look up the opcode in the hash table. */
2350 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2351 if (opcode == (const struct powerpc_opcode *) NULL)
2352 {
2353 const struct powerpc_macro *macro;
2354
2355 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2356 if (macro == (const struct powerpc_macro *) NULL)
2357 as_bad (_("Unrecognized opcode: `%s'"), str);
2358 else
2359 ppc_macro (s, macro);
2360
2361 return;
2362 }
2363
2364 insn = opcode->opcode;
2365
2366 str = s;
3882b010 2367 while (ISSPACE (*str))
252b5132
RH		 2368 ++str;
2369
2370 /* PowerPC operands are just expressions. The only real issue is
2371 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2372 an optional operand separate the operands only with commas (in some
2373 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2374 have optional operands). Most instructions with optional operands
2375 have only one. Those that have more than one optional operand can
2376 take either all their operands or none. So, before we start seriously
2377 parsing the operands, we check to see if we have optional operands,
2378 and if we do, we count the number of commas to see which operands
2379 have been omitted. */
252b5132
RH		 2380 skip_optional = 0;
2381 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2382 {
2383 const struct powerpc_operand *operand;
2384
2385 operand = &powerpc_operands[*opindex_ptr];
2386 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2387 {
2388 unsigned int opcount;
7fe9cf6b 2389 unsigned int num_operands_expected;
252b5132
RH		 2390
2391 /* There is an optional operand. Count the number of
2392 commas in the input line. */
2393 if (*str == '\0')
2394 opcount = 0;
2395 else
2396 {
2397 opcount = 1;
2398 s = str;
2399 while ((s = strchr (s, ',')) != (char *) NULL)
2400 {
2401 ++opcount;
2402 ++s;
2403 }
2404 }
2405
7fe9cf6b
NC		 2406 /* Compute the number of expected operands.
2407 Do not count fake operands. */
2408 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2409 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2410 ++ num_operands_expected;
2411
252b5132
RH		 2412 /* If there are fewer operands in the line then are called
2413 for by the instruction, we want to skip the optional
1f6c9eb0 2414 operands. */
7fe9cf6b 2415 if (opcount < num_operands_expected)
252b5132
RH		 2416 skip_optional = 1;
2417
2418 break;
2419 }
2420 }
2421
2422 /* Gather the operands. */
2423 need_paren = 0;
2424 next_opindex = 0;
2425 fc = 0;
2426 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2427 {
2428 const struct powerpc_operand *operand;
2429 const char *errmsg;
2430 char *hold;
2431 expressionS ex;
2432 char endc;
2433
2434 if (next_opindex == 0)
2435 operand = &powerpc_operands[*opindex_ptr];
2436 else
2437 {
2438 operand = &powerpc_operands[next_opindex];
2439 next_opindex = 0;
2440 }
252b5132
RH		 2441 errmsg = NULL;
2442
2443 /* If this is a fake operand, then we do not expect anything
2444 from the input. */
2445 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2446 {
2b3c4602 2447 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2448 if (errmsg != (const char *) NULL)
ee2c9aa9 2449 as_bad ("%s", errmsg);
252b5132
RH		 2450 continue;
2451 }
2452
2453 /* If this is an optional operand, and we are skipping it, just
2454 insert a zero. */
2455 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2456 && skip_optional)
2457 {
2458 if (operand->insert)
2459 {
2b3c4602 2460 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2461 if (errmsg != (const char *) NULL)
ee2c9aa9 2462 as_bad ("%s", errmsg);
252b5132
RH		 2463 }
2464 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2465 next_opindex = *opindex_ptr + 1;
2466 continue;
2467 }
2468
2469 /* Gather the operand. */
2470 hold = input_line_pointer;
2471 input_line_pointer = str;
2472
2473#ifdef TE_PE
81d4177b 2474 if (*input_line_pointer == '[')
252b5132
RH		 2475 {
2476 /* We are expecting something like the second argument here:
99a814a1
AM		 2477 *
2478 * lwz r4,[toc].GS.0.static_int(rtoc)
2479 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2480 * The argument following the `]' must be a symbol name, and the
2481 * register must be the toc register: 'rtoc' or '2'
2482 *
2483 * The effect is to 0 as the displacement field
2484 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2485 * the appropriate variation) reloc against it based on the symbol.
2486 * The linker will build the toc, and insert the resolved toc offset.
2487 *
2488 * Note:
2489 * o The size of the toc entry is currently assumed to be
2490 * 32 bits. This should not be assumed to be a hard coded
2491 * number.
2492 * o In an effort to cope with a change from 32 to 64 bits,
2493 * there are also toc entries that are specified to be
2494 * either 32 or 64 bits:
2495 * lwz r4,[toc32].GS.0.static_int(rtoc)
2496 * lwz r4,[toc64].GS.0.static_int(rtoc)
2497 * These demand toc entries of the specified size, and the
2498 * instruction probably requires it.
2499 */
252b5132
RH		 2500
2501 int valid_toc;
2502 enum toc_size_qualifier toc_kind;
2503 bfd_reloc_code_real_type toc_reloc;
2504
99a814a1
AM		 2505 /* Go parse off the [tocXX] part. */
2506 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2507
81d4177b 2508 if (!valid_toc)
252b5132 2509 {
99a814a1
AM		 2510 /* Note: message has already been issued.
2511 FIXME: what sort of recovery should we do?
2512 demand_rest_of_line (); return; ? */
252b5132
RH		 2513 }
2514
99a814a1
AM		 2515 /* Now get the symbol following the ']'. */
2516 expression (&ex);
252b5132
RH		 2517
2518 switch (toc_kind)
2519 {
2520 case default_toc:
99a814a1
AM		 2521 /* In this case, we may not have seen the symbol yet,
2522 since it is allowed to appear on a .extern or .globl
2523 or just be a label in the .data section. */
252b5132
RH		 2524 toc_reloc = BFD_RELOC_PPC_TOC16;
2525 break;
2526 case data_in_toc:
99a814a1
AM		 2527 /* 1. The symbol must be defined and either in the toc
2528 section, or a global.
2529 2. The reloc generated must have the TOCDEFN flag set
2530 in upper bit mess of the reloc type.
2531 FIXME: It's a little confusing what the tocv
2532 qualifier can be used for. At the very least, I've
2533 seen three uses, only one of which I'm sure I can
2534 explain. */
81d4177b
KH		 2535 if (ex.X_op == O_symbol)
2536 {
9c2799c2 2537 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2538 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2539 != tocdata_section)
252b5132 2540 {
99a814a1 2541 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2542 }
2543 }
2544
2545 toc_reloc = BFD_RELOC_PPC_TOC16;
2546 break;
2547 case must_be_32:
99a814a1
AM		 2548 /* FIXME: these next two specifically specify 32/64 bit
2549 toc entries. We don't support them today. Is this
2550 the right way to say that? */
252b5132
RH		 2551 toc_reloc = BFD_RELOC_UNUSED;
2552 as_bad (_("Unimplemented toc32 expression modifier"));
2553 break;
2554 case must_be_64:
99a814a1 2555 /* FIXME: see above. */
252b5132
RH		 2556 toc_reloc = BFD_RELOC_UNUSED;
2557 as_bad (_("Unimplemented toc64 expression modifier"));
2558 break;
2559 default:
bc805888 2560 fprintf (stderr,
99a814a1
AM		 2561 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2562 toc_kind);
bc805888 2563 abort ();
252b5132
RH		 2564 break;
2565 }
2566
2567 /* We need to generate a fixup for this expression. */
2568 if (fc >= MAX_INSN_FIXUPS)
2569 as_fatal (_("too many fixups"));
2570
2571 fixups[fc].reloc = toc_reloc;
2572 fixups[fc].exp = ex;
2573 fixups[fc].opindex = *opindex_ptr;
2574 ++fc;
2575
99a814a1
AM		 2576 /* Ok. We've set up the fixup for the instruction. Now make it
2577 look like the constant 0 was found here. */
252b5132
RH		 2578 ex.X_unsigned = 1;
2579 ex.X_op = O_constant;
2580 ex.X_add_number = 0;
2581 ex.X_add_symbol = NULL;
2582 ex.X_op_symbol = NULL;
2583 }
2584
2585 else
2586#endif /* TE_PE */
2587 {
2ad068be
AM		 2588 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2589 || !register_name (&ex))
252b5132 2590 {
13abbae3
AM		 2591 char save_lex = lex_type['%'];
2592
252b5132 2593 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2594 {
2595 cr_operand = TRUE;
2596 lex_type['%'] |= LEX_BEGIN_NAME;
2597 }
252b5132 2598 expression (&ex);
b34976b6 2599 cr_operand = FALSE;
13abbae3 2600 lex_type['%'] = save_lex;
252b5132
RH		 2601 }
2602 }
2603
2604 str = input_line_pointer;
2605 input_line_pointer = hold;
2606
2607 if (ex.X_op == O_illegal)
2608 as_bad (_("illegal operand"));
2609 else if (ex.X_op == O_absent)
2610 as_bad (_("missing operand"));
2611 else if (ex.X_op == O_register)
2612 {
2613 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2614 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2615 }
2616 else if (ex.X_op == O_constant)
2617 {
2618#ifdef OBJ_ELF
81d4177b 2619 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2620 char *orig_str = str;
2621
2622 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2623 switch (reloc)
2624 {
2625 default:
2626 str = orig_str;
2627 break;
2628
2629 case BFD_RELOC_LO16:
2630 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2631 something which cleared it, we always produce a
2632 signed value. */
2633 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2634 ex.X_add_number &= 0xffff;
2635 else
0baf16f2 2636 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2637 break;
2638
2639 case BFD_RELOC_HI16:
0baf16f2
AM		 2640 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2641 ex.X_add_number = PPC_HI (ex.X_add_number);
2642 else
2643 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2644 break;
2645
2646 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2647 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2648 ex.X_add_number = PPC_HA (ex.X_add_number);
2649 else
2650 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2651 break;
2652
0baf16f2
AM		 2653 case BFD_RELOC_PPC64_HIGHER:
2654 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2655 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2656 else
2657 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2658 break;
2659
2660 case BFD_RELOC_PPC64_HIGHER_S:
2661 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2662 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2663 else
2664 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2665 break;
0baf16f2
AM		 2666
2667 case BFD_RELOC_PPC64_HIGHEST:
2668 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2669 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2670 else
2671 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2672 break;
2673
2674 case BFD_RELOC_PPC64_HIGHEST_S:
2675 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2676 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2677 else
2678 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2679 break;
252b5132 2680 }
0baf16f2 2681#endif /* OBJ_ELF */
252b5132 2682 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2683 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2684 }
2685#ifdef OBJ_ELF
727fc41e 2686 else
252b5132 2687 {
727fc41e 2688 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2689 {
727fc41e
AM		 2690 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2691 if (sym_name[0] == '.')
2692 ++sym_name;
cdba85ec 2693
727fc41e 2694 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2695 {
727fc41e
AM		 2696 expressionS tls_exp;
2697
2698 hold = input_line_pointer;
2699 input_line_pointer = str + 1;
2700 expression (&tls_exp);
2701 if (tls_exp.X_op == O_symbol)
2702 {
2703 reloc = BFD_RELOC_UNUSED;
2704 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2705 {
2706 reloc = BFD_RELOC_PPC_TLSGD;
2707 input_line_pointer += 7;
2708 }
2709 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2710 {
2711 reloc = BFD_RELOC_PPC_TLSLD;
2712 input_line_pointer += 7;
2713 }
2714 if (reloc != BFD_RELOC_UNUSED)
2715 {
2716 SKIP_WHITESPACE ();
2717 str = input_line_pointer;
2718
2719 if (fc >= MAX_INSN_FIXUPS)
2720 as_fatal (_("too many fixups"));
2721 fixups[fc].exp = tls_exp;
2722 fixups[fc].opindex = *opindex_ptr;
2723 fixups[fc].reloc = reloc;
2724 ++fc;
2725 }
2726 }
2727 input_line_pointer = hold;
252b5132
RH		 2728 }
2729 }
2730
727fc41e 2731 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2732 {
727fc41e 2733 /* Some TLS tweaks. */
0baf16f2
AM		 2734 switch (reloc)
2735 {
727fc41e 2736 default:
cdba85ec 2737 break;
727fc41e
AM		 2738
2739 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2740 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2741 as_bad (_("@tls may not be used with \"%s\" operands"),
2742 opcode->name);
2743 else if (operand->shift != 11)
2744 as_bad (_("@tls may only be used in last operand"));
2745 else
2746 insn = ppc_insert_operand (insn, operand,
2747 ppc_obj64 ? 13 : 2,
2748 ppc_cpu, (char *) NULL, 0);
cdba85ec 2749 break;
727fc41e
AM		 2750
2751 /* We'll only use the 32 (or 64) bit form of these relocations
2752 in constants. Instructions get the 16 bit form. */
2753 case BFD_RELOC_PPC_DTPREL:
2754 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2755 break;
727fc41e
AM		 2756 case BFD_RELOC_PPC_TPREL:
2757 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2758 break;
2759 }
727fc41e
AM		 2760
2761 /* For the absolute forms of branches, convert the PC
2762 relative form back into the absolute. */
2763 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2764 {
2765 switch (reloc)
2766 {
2767 case BFD_RELOC_PPC_B26:
2768 reloc = BFD_RELOC_PPC_BA26;
2769 break;
2770 case BFD_RELOC_PPC_B16:
2771 reloc = BFD_RELOC_PPC_BA16;
2772 break;
2773 case BFD_RELOC_PPC_B16_BRTAKEN:
2774 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2775 break;
2776 case BFD_RELOC_PPC_B16_BRNTAKEN:
2777 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2778 break;
2779 default:
2780 break;
2781 }
2782 }
2783
01efc3af
AM		 2784 switch (reloc)
2785 {
2786 case BFD_RELOC_PPC_TOC16:
2787 toc_reloc_types |= has_small_toc_reloc;
2788 break;
2789 case BFD_RELOC_PPC64_TOC16_LO:
2790 case BFD_RELOC_PPC64_TOC16_HI:
2791 case BFD_RELOC_PPC64_TOC16_HA:
2792 toc_reloc_types |= has_large_toc_reloc;
2793 break;
2794 default:
2795 break;
2796 }
2797
727fc41e
AM		 2798 if (ppc_obj64
2799 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2800 {
2801 switch (reloc)
2802 {
2803 case BFD_RELOC_16:
2804 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2805 break;
2806 case BFD_RELOC_LO16:
2807 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2808 break;
2809 case BFD_RELOC_16_GOTOFF:
2810 reloc = BFD_RELOC_PPC64_GOT16_DS;
2811 break;
2812 case BFD_RELOC_LO16_GOTOFF:
2813 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2814 break;
2815 case BFD_RELOC_LO16_PLTOFF:
2816 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2817 break;
2818 case BFD_RELOC_16_BASEREL:
2819 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2820 break;
2821 case BFD_RELOC_LO16_BASEREL:
2822 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2823 break;
2824 case BFD_RELOC_PPC_TOC16:
2825 reloc = BFD_RELOC_PPC64_TOC16_DS;
2826 break;
2827 case BFD_RELOC_PPC64_TOC16_LO:
2828 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2829 break;
2830 case BFD_RELOC_PPC64_PLTGOT16:
2831 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2832 break;
2833 case BFD_RELOC_PPC64_PLTGOT16_LO:
2834 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2835 break;
2836 case BFD_RELOC_PPC_DTPREL16:
2837 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2838 break;
2839 case BFD_RELOC_PPC_DTPREL16_LO:
2840 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2841 break;
2842 case BFD_RELOC_PPC_TPREL16:
2843 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2844 break;
2845 case BFD_RELOC_PPC_TPREL16_LO:
2846 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2847 break;
2848 case BFD_RELOC_PPC_GOT_DTPREL16:
2849 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2850 case BFD_RELOC_PPC_GOT_TPREL16:
2851 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2852 break;
2853 default:
2854 as_bad (_("unsupported relocation for DS offset field"));
2855 break;
2856 }
2857 }
0baf16f2
AM		 2858 }
2859
252b5132
RH		 2860 /* We need to generate a fixup for this expression. */
2861 if (fc >= MAX_INSN_FIXUPS)
2862 as_fatal (_("too many fixups"));
2863 fixups[fc].exp = ex;
727fc41e 2864 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2865 fixups[fc].reloc = reloc;
2866 ++fc;
2867 }
727fc41e 2868#else /* OBJ_ELF */
252b5132
RH		 2869 else
2870 {
2871 /* We need to generate a fixup for this expression. */
2872 if (fc >= MAX_INSN_FIXUPS)
2873 as_fatal (_("too many fixups"));
2874 fixups[fc].exp = ex;
2875 fixups[fc].opindex = *opindex_ptr;
2876 fixups[fc].reloc = BFD_RELOC_UNUSED;
2877 ++fc;
2878 }
727fc41e 2879#endif /* OBJ_ELF */
252b5132
RH		 2880
2881 if (need_paren)
2882 {
2883 endc = ')';
2884 need_paren = 0;
c3d65c1c
BE		 2885 /* If expecting more operands, then we want to see "),". */
2886 if (*str == endc && opindex_ptr[1] != 0)
2887 {
2888 do
2889 ++str;
2890 while (ISSPACE (*str));
2891 endc = ',';
2892 }
252b5132
RH		 2893 }
2894 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2895 {
2896 endc = '(';
2897 need_paren = 1;
2898 }
2899 else
2900 endc = ',';
2901
2902 /* The call to expression should have advanced str past any
2903 whitespace. */
2904 if (*str != endc
2905 && (endc != ',' || *str != '\0'))
2906 {
2907 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2908 break;
2909 }
2910
2911 if (*str != '\0')
2912 ++str;
2913 }
2914
3882b010 2915 while (ISSPACE (*str))
252b5132
RH		 2916 ++str;
2917
2918 if (*str != '\0')
2919 as_bad (_("junk at end of line: `%s'"), str);
2920
dc1d03fc 2921#ifdef OBJ_ELF
6a0c61b7 2922 /* Do we need/want a APUinfo section? */
e01d869a 2923 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC)) != 0)
6a0c61b7
EZ		 2924 {
2925 /* These are all version "1". */
2926 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2927 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2928 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2929 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2930 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2931 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2932 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2933 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2934 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2935 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2936 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2937 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2938 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2939 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2940 }
dc1d03fc 2941#endif
6a0c61b7 2942
252b5132
RH		 2943 /* Write out the instruction. */
2944 f = frag_more (4);
09b935ac
AM		 2945 addr_mod = frag_now_fix () & 3;
2946 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2947 as_bad (_("instruction address is not a multiple of 4"));
2948 frag_now->insn_addr = addr_mod;
2949 frag_now->has_code = 1;
252b5132
RH		 2950 md_number_to_chars (f, insn, 4);
2951
5d6f4f16
GK		 2952#ifdef OBJ_ELF
2953 dwarf2_emit_insn (4);
2954#endif
2955
252b5132
RH		 2956 /* Create any fixups. At this point we do not use a
2957 bfd_reloc_code_real_type, but instead just use the
2958 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2959 handle fixups for any operand type, although that is admittedly
2960 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2961 md_apply_fix. */
252b5132
RH		 2962 for (i = 0; i < fc; i++)
2963 {
252b5132
RH		 2964 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2965 {
99a814a1 2966 reloc_howto_type *reloc_howto;
252b5132
RH		 2967 int size;
2968 int offset;
2969 fixS *fixP;
2970
99a814a1 2971 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2972 if (!reloc_howto)
2973 abort ();
2974
2975 size = bfd_get_reloc_size (reloc_howto);
2976 offset = target_big_endian ? (4 - size) : 0;
2977
2978 if (size < 1 || size > 4)
bc805888 2979 abort ();
252b5132 2980
99a814a1
AM		 2981 fixP = fix_new_exp (frag_now,
2982 f - frag_now->fr_literal + offset,
2983 size,
2984 &fixups[i].exp,
2985 reloc_howto->pc_relative,
252b5132
RH		 2986 fixups[i].reloc);
2987
2988 /* Turn off complaints that the addend is too large for things like
2989 foo+100000@ha. */
2990 switch (fixups[i].reloc)
2991 {
2992 case BFD_RELOC_16_GOTOFF:
2993 case BFD_RELOC_PPC_TOC16:
2994 case BFD_RELOC_LO16:
2995 case BFD_RELOC_HI16:
2996 case BFD_RELOC_HI16_S:
0baf16f2 2997#ifdef OBJ_ELF
0baf16f2
AM		 2998 case BFD_RELOC_PPC64_HIGHER:
2999 case BFD_RELOC_PPC64_HIGHER_S:
3000 case BFD_RELOC_PPC64_HIGHEST:
3001 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 3002#endif
252b5132
RH		 3003 fixP->fx_no_overflow = 1;
3004 break;
3005 default:
3006 break;
3007 }
3008 }
3009 else
727fc41e
AM		 3010 {
3011 const struct powerpc_operand *operand;
3012
3013 operand = &powerpc_operands[fixups[i].opindex];
3014 fix_new_exp (frag_now,
3015 f - frag_now->fr_literal,
3016 4,
3017 &fixups[i].exp,
3018 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3019 ((bfd_reloc_code_real_type)
3020 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3021 }
252b5132
RH		 3022 }
3023}
3024
3025/* Handle a macro. Gather all the operands, transform them as
3026 described by the macro, and call md_assemble recursively. All the
3027 operands are separated by commas; we don't accept parentheses
3028 around operands here. */
3029
3030static void
98027b10 3031ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3032{
3033 char *operands[10];
3034 unsigned int count;
3035 char *s;
3036 unsigned int len;
3037 const char *format;
db557034 3038 unsigned int arg;
252b5132
RH		 3039 char *send;
3040 char *complete;
3041
3042 /* Gather the users operands into the operands array. */
3043 count = 0;
3044 s = str;
3045 while (1)
3046 {
3047 if (count >= sizeof operands / sizeof operands[0])
3048 break;
3049 operands[count++] = s;
3050 s = strchr (s, ',');
3051 if (s == (char *) NULL)
3052 break;
3053 *s++ = '\0';
81d4177b 3054 }
252b5132
RH		 3055
3056 if (count != macro->operands)
3057 {
3058 as_bad (_("wrong number of operands"));
3059 return;
3060 }
3061
3062 /* Work out how large the string must be (the size is unbounded
3063 because it includes user input). */
3064 len = 0;
3065 format = macro->format;
3066 while (*format != '\0')
3067 {
3068 if (*format != '%')
3069 {
3070 ++len;
3071 ++format;
3072 }
3073 else
3074 {
3075 arg = strtol (format + 1, &send, 10);
db557034 3076 know (send != format && arg < count);
252b5132
RH		 3077 len += strlen (operands[arg]);
3078 format = send;
3079 }
3080 }
3081
3082 /* Put the string together. */
3083 complete = s = (char *) alloca (len + 1);
3084 format = macro->format;
3085 while (*format != '\0')
3086 {
3087 if (*format != '%')
3088 *s++ = *format++;
3089 else
3090 {
3091 arg = strtol (format + 1, &send, 10);
3092 strcpy (s, operands[arg]);
3093 s += strlen (s);
3094 format = send;
3095 }
3096 }
3097 *s = '\0';
3098
3099 /* Assemble the constructed instruction. */
3100 md_assemble (complete);
81d4177b 3101}
252b5132
RH		 3102\f
3103#ifdef OBJ_ELF
18ae9cc1 3104/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3105
3106int
98027b10 3107ppc_section_type (char *str, size_t len)
252b5132 3108{
9de8d8f1
RH		 3109 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3110 return SHT_ORDERED;
252b5132 3111
9de8d8f1 3112 return -1;
252b5132
RH		 3113}
3114
3115int
1239de13 3116ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3117{
3118 if (type == SHT_ORDERED)
3119 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3120
252b5132
RH		 3121 return flags;
3122}
3123#endif /* OBJ_ELF */
3124
3125\f
3126/* Pseudo-op handling. */
3127
3128/* The .byte pseudo-op. This is similar to the normal .byte
3129 pseudo-op, but it can also take a single ASCII string. */
3130
3131static void
98027b10 3132ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3133{
3134 if (*input_line_pointer != '\"')
3135 {
3136 cons (1);
3137 return;
3138 }
3139
3140 /* Gather characters. A real double quote is doubled. Unusual
3141 characters are not permitted. */
3142 ++input_line_pointer;
3143 while (1)
3144 {
3145 char c;
3146
3147 c = *input_line_pointer++;
3148
3149 if (c == '\"')
3150 {
3151 if (*input_line_pointer != '\"')
3152 break;
3153 ++input_line_pointer;
3154 }
3155
3156 FRAG_APPEND_1_CHAR (c);
3157 }
3158
3159 demand_empty_rest_of_line ();
3160}
3161\f
3162#ifdef OBJ_XCOFF
3163
3164/* XCOFF specific pseudo-op handling. */
3165
3166/* This is set if we are creating a .stabx symbol, since we don't want
3167 to handle symbol suffixes for such symbols. */
b34976b6 3168static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3169
3170/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3171 symbols in the .bss segment as though they were local common
67c1ffbe 3172 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3173 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3174
3175static void
98027b10 3176ppc_comm (int lcomm)
252b5132
RH		 3177{
3178 asection *current_seg = now_seg;
3179 subsegT current_subseg = now_subseg;
3180 char *name;
3181 char endc;
3182 char *end_name;
3183 offsetT size;
3184 offsetT align;
3185 symbolS *lcomm_sym = NULL;
3186 symbolS *sym;
3187 char *pfrag;
3188
3189 name = input_line_pointer;
3190 endc = get_symbol_end ();
3191 end_name = input_line_pointer;
3192 *end_name = endc;
3193
3194 if (*input_line_pointer != ',')
3195 {
3196 as_bad (_("missing size"));
3197 ignore_rest_of_line ();
3198 return;
3199 }
3200 ++input_line_pointer;
3201
3202 size = get_absolute_expression ();
3203 if (size < 0)
3204 {
3205 as_bad (_("negative size"));
3206 ignore_rest_of_line ();
3207 return;
3208 }
3209
3210 if (! lcomm)
3211 {
3212 /* The third argument to .comm is the alignment. */
3213 if (*input_line_pointer != ',')
1ad63b2f 3214 align = 2;
252b5132
RH		 3215 else
3216 {
3217 ++input_line_pointer;
3218 align = get_absolute_expression ();
3219 if (align <= 0)
3220 {
3221 as_warn (_("ignoring bad alignment"));
1ad63b2f 3222 align = 2;
252b5132
RH		 3223 }
3224 }
3225 }
3226 else
3227 {
3228 char *lcomm_name;
3229 char lcomm_endc;
3230
1ad63b2f 3231 if (size <= 4)
252b5132
RH		 3232 align = 2;
3233 else
3234 align = 3;
3235
3236 /* The third argument to .lcomm appears to be the real local
3237 common symbol to create. References to the symbol named in
3238 the first argument are turned into references to the third
3239 argument. */
3240 if (*input_line_pointer != ',')
3241 {
3242 as_bad (_("missing real symbol name"));
3243 ignore_rest_of_line ();
3244 return;
3245 }
3246 ++input_line_pointer;
3247
3248 lcomm_name = input_line_pointer;
3249 lcomm_endc = get_symbol_end ();
81d4177b 3250
252b5132
RH		 3251 lcomm_sym = symbol_find_or_make (lcomm_name);
3252
3253 *input_line_pointer = lcomm_endc;
3254 }
3255
3256 *end_name = '\0';
3257 sym = symbol_find_or_make (name);
3258 *end_name = endc;
3259
3260 if (S_IS_DEFINED (sym)
3261 || S_GET_VALUE (sym) != 0)
3262 {
3263 as_bad (_("attempt to redefine symbol"));
3264 ignore_rest_of_line ();
3265 return;
3266 }
81d4177b 3267
252b5132 3268 record_alignment (bss_section, align);
81d4177b 3269
252b5132
RH		 3270 if (! lcomm
3271 || ! S_IS_DEFINED (lcomm_sym))
3272 {
3273 symbolS *def_sym;
3274 offsetT def_size;
3275
3276 if (! lcomm)
3277 {
3278 def_sym = sym;
3279 def_size = size;
3280 S_SET_EXTERNAL (sym);
3281 }
3282 else
3283 {
809ffe0d 3284 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3285 def_sym = lcomm_sym;
3286 def_size = 0;
3287 }
3288
3289 subseg_set (bss_section, 1);
3290 frag_align (align, 0, 0);
81d4177b 3291
809ffe0d 3292 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3293 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3294 def_size, (char *) NULL);
3295 *pfrag = 0;
3296 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3297 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3298 }
3299 else if (lcomm)
3300 {
3301 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3302 symbol_get_frag (lcomm_sym)->fr_offset =
3303 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3304 &~ ((1 << align) - 1));
809ffe0d
ILT		 3305 if (align > symbol_get_tc (lcomm_sym)->align)
3306 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3307 }
3308
3309 if (lcomm)
3310 {
3311 /* Make sym an offset from lcomm_sym. */
3312 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3313 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3314 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3315 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3316 }
3317
3318 subseg_set (current_seg, current_subseg);
3319
3320 demand_empty_rest_of_line ();
3321}
3322
3323/* The .csect pseudo-op. This switches us into a different
3324 subsegment. The first argument is a symbol whose value is the
3325 start of the .csect. In COFF, csect symbols get special aux
3326 entries defined by the x_csect field of union internal_auxent. The
3327 optional second argument is the alignment (the default is 2). */
3328
3329static void
98027b10 3330ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3331{
3332 char *name;
3333 char endc;
3334 symbolS *sym;
931e13a6 3335 offsetT align;
252b5132
RH		 3336
3337 name = input_line_pointer;
3338 endc = get_symbol_end ();
81d4177b 3339
252b5132
RH		 3340 sym = symbol_find_or_make (name);
3341
3342 *input_line_pointer = endc;
3343
3344 if (S_GET_NAME (sym)[0] == '\0')
3345 {
3346 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3347 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3348 }
3349
931e13a6 3350 align = 2;
252b5132
RH		 3351 if (*input_line_pointer == ',')
3352 {
3353 ++input_line_pointer;
931e13a6 3354 align = get_absolute_expression ();
252b5132
RH		 3355 }
3356
931e13a6
AM		 3357 ppc_change_csect (sym, align);
3358
252b5132
RH		 3359 demand_empty_rest_of_line ();
3360}
3361
3362/* Change to a different csect. */
3363
3364static void
98027b10 3365ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3366{
3367 if (S_IS_DEFINED (sym))
809ffe0d 3368 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3369 else
3370 {
3371 symbolS **list_ptr;
3372 int after_toc;
3373 int hold_chunksize;
3374 symbolS *list;
931e13a6
AM		 3375 int is_code;
3376 segT sec;
252b5132
RH		 3377
3378 /* This is a new csect. We need to look at the symbol class to
3379 figure out whether it should go in the text section or the
3380 data section. */
3381 after_toc = 0;
931e13a6 3382 is_code = 0;
96d56e9f 3383 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3384 {
3385 case XMC_PR:
3386 case XMC_RO:
3387 case XMC_DB:
3388 case XMC_GL:
3389 case XMC_XO:
3390 case XMC_SV:
3391 case XMC_TI:
3392 case XMC_TB:
3393 S_SET_SEGMENT (sym, text_section);
809ffe0d 3394 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3395 ++ppc_text_subsegment;
3396 list_ptr = &ppc_text_csects;
931e13a6 3397 is_code = 1;
252b5132
RH		 3398 break;
3399 case XMC_RW:
3400 case XMC_TC0:
3401 case XMC_TC:
3402 case XMC_DS:
3403 case XMC_UA:
3404 case XMC_BS:
3405 case XMC_UC:
3406 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3407 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3408 == ppc_data_subsegment))
252b5132
RH		 3409 after_toc = 1;
3410 S_SET_SEGMENT (sym, data_section);
809ffe0d 3411 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3412 ++ppc_data_subsegment;
3413 list_ptr = &ppc_data_csects;
3414 break;
3415 default:
3416 abort ();
3417 }
3418
3419 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3420 changing subsegments, so that we don't use a lot of memory
3421 space for what may be a small section. */
252b5132
RH		 3422 hold_chunksize = chunksize;
3423 chunksize = 64;
3424
931e13a6
AM		 3425 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3426 symbol_get_tc (sym)->subseg);
252b5132
RH		 3427
3428 chunksize = hold_chunksize;
3429
3430 if (after_toc)
3431 ppc_after_toc_frag = frag_now;
3432
931e13a6
AM		 3433 record_alignment (sec, align);
3434 if (is_code)
3435 frag_align_code (align, 0);
3436 else
3437 frag_align (align, 0, 0);
3438
809ffe0d 3439 symbol_set_frag (sym, frag_now);
252b5132
RH		 3440 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3441
931e13a6 3442 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3443 symbol_get_tc (sym)->output = 1;
3444 symbol_get_tc (sym)->within = sym;
81d4177b 3445
252b5132 3446 for (list = *list_ptr;
809ffe0d
ILT		 3447 symbol_get_tc (list)->next != (symbolS *) NULL;
3448 list = symbol_get_tc (list)->next)
252b5132 3449 ;
809ffe0d 3450 symbol_get_tc (list)->next = sym;
81d4177b 3451
252b5132 3452 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3453 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3454 &symbol_lastP);
252b5132
RH		 3455 }
3456
3457 ppc_current_csect = sym;
3458}
3459
3460/* This function handles the .text and .data pseudo-ops. These
3461 pseudo-ops aren't really used by XCOFF; we implement them for the
3462 convenience of people who aren't used to XCOFF. */
3463
3464static void
98027b10 3465ppc_section (int type)
252b5132
RH		 3466{
3467 const char *name;
3468 symbolS *sym;
3469
3470 if (type == 't')
3471 name = ".text[PR]";
3472 else if (type == 'd')
3473 name = ".data[RW]";
3474 else
3475 abort ();
3476
3477 sym = symbol_find_or_make (name);
3478
931e13a6 3479 ppc_change_csect (sym, 2);
252b5132
RH		 3480
3481 demand_empty_rest_of_line ();
3482}
3483
3484/* This function handles the .section pseudo-op. This is mostly to
3485 give an error, since XCOFF only supports .text, .data and .bss, but
3486 we do permit the user to name the text or data section. */
3487
3488static void
98027b10 3489ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3490{
3491 char *user_name;
3492 const char *real_name;
3493 char c;
3494 symbolS *sym;
3495
3496 user_name = input_line_pointer;
3497 c = get_symbol_end ();
3498
3499 if (strcmp (user_name, ".text") == 0)
3500 real_name = ".text[PR]";
3501 else if (strcmp (user_name, ".data") == 0)
3502 real_name = ".data[RW]";
3503 else
3504 {
3505 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3506 *input_line_pointer = c;
3507 ignore_rest_of_line ();
3508 return;
3509 }
3510
3511 *input_line_pointer = c;
3512
3513 sym = symbol_find_or_make (real_name);
3514
931e13a6 3515 ppc_change_csect (sym, 2);
252b5132
RH		 3516
3517 demand_empty_rest_of_line ();
3518}
3519
3520/* The .extern pseudo-op. We create an undefined symbol. */
3521
3522static void
98027b10 3523ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3524{
3525 char *name;
3526 char endc;
3527
3528 name = input_line_pointer;
3529 endc = get_symbol_end ();
3530
3531 (void) symbol_find_or_make (name);
3532
3533 *input_line_pointer = endc;
3534
3535 demand_empty_rest_of_line ();
3536}
3537
3538/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3539
3540static void
98027b10 3541ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3542{
3543 char *name;
3544 char endc;
3545 symbolS *sym;
3546
3547 name = input_line_pointer;
3548 endc = get_symbol_end ();
3549
3550 sym = symbol_find_or_make (name);
3551
3552 *input_line_pointer = endc;
3553
809ffe0d 3554 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3555
3556 demand_empty_rest_of_line ();
3557}
3558
c865e45b
RS		 3559/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
3560 relocations at the beginning of the current csect.
3561
3562 (In principle, there's no reason why the relocations _have_ to be at
3563 the beginning. Anywhere in the csect would do. However, inserting
3564 at the beginning is what the native assmebler does, and it helps to
3565 deal with cases where the .ref statements follow the section contents.)
3566
3567 ??? .refs don't work for empty .csects. However, the native assembler
3568 doesn't report an error in this case, and neither yet do we. */
3569
3570static void
3571ppc_ref (int ignore ATTRIBUTE_UNUSED)
3572{
3573 char *name;
3574 char c;
3575
3576 if (ppc_current_csect == NULL)
3577 {
3578 as_bad (_(".ref outside .csect"));
3579 ignore_rest_of_line ();
3580 return;
3581 }
3582
3583 do
3584 {
3585 name = input_line_pointer;
3586 c = get_symbol_end ();
3587
3588 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
3589 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
3590
3591 *input_line_pointer = c;
3592 SKIP_WHITESPACE ();
3593 c = *input_line_pointer;
3594 if (c == ',')
3595 {
3596 input_line_pointer++;
3597 SKIP_WHITESPACE ();
3598 if (is_end_of_line[(unsigned char) *input_line_pointer])
3599 {
3600 as_bad (_("missing symbol name"));
3601 ignore_rest_of_line ();
3602 return;
3603 }
3604 }
3605 }
3606 while (c == ',');
3607
3608 demand_empty_rest_of_line ();
3609}
3610
252b5132
RH		 3611/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3612 although I don't know why it bothers. */
3613
3614static void
98027b10 3615ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3616{
3617 char *name;
3618 char endc;
3619 symbolS *sym;
3620 int len;
3621
3622 name = input_line_pointer;
3623 endc = get_symbol_end ();
3624
3625 sym = symbol_find_or_make (name);
3626
3627 *input_line_pointer = endc;
3628
3629 if (*input_line_pointer != ',')
3630 {
3631 as_bad (_("missing rename string"));
3632 ignore_rest_of_line ();
3633 return;
3634 }
3635 ++input_line_pointer;
3636
809ffe0d 3637 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3638
3639 demand_empty_rest_of_line ();
3640}
3641
3642/* The .stabx pseudo-op. This is similar to a normal .stabs
3643 pseudo-op, but slightly different. A sample is
3644 .stabx "main:F-1",.main,142,0
3645 The first argument is the symbol name to create. The second is the
3646 value, and the third is the storage class. The fourth seems to be
3647 always zero, and I am assuming it is the type. */
3648
3649static void
98027b10 3650ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3651{
3652 char *name;
3653 int len;
3654 symbolS *sym;
3655 expressionS exp;
3656
3657 name = demand_copy_C_string (&len);
3658
3659 if (*input_line_pointer != ',')
3660 {
3661 as_bad (_("missing value"));
3662 return;
3663 }
3664 ++input_line_pointer;
3665
b34976b6 3666 ppc_stab_symbol = TRUE;
252b5132 3667 sym = symbol_make (name);
b34976b6 3668 ppc_stab_symbol = FALSE;
252b5132 3669
809ffe0d 3670 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3671
3672 (void) expression (&exp);
3673
3674 switch (exp.X_op)
3675 {
3676 case O_illegal:
3677 case O_absent:
3678 case O_big:
3679 as_bad (_("illegal .stabx expression; zero assumed"));
3680 exp.X_add_number = 0;
3681 /* Fall through. */
3682 case O_constant:
3683 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3684 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3685 break;
3686
3687 case O_symbol:
3688 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3689 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3690 else
3691 {
3692 S_SET_VALUE (sym,
3693 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3694 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3695 }
3696 break;
3697
3698 default:
3699 /* The value is some complex expression. This will probably
99a814a1
AM		 3700 fail at some later point, but this is probably the right
3701 thing to do here. */
809ffe0d 3702 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3703 break;
3704 }
3705
3706 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3707 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3708
3709 if (*input_line_pointer != ',')
3710 {
3711 as_bad (_("missing class"));
3712 return;
3713 }
3714 ++input_line_pointer;
3715
3716 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3717
3718 if (*input_line_pointer != ',')
3719 {
3720 as_bad (_("missing type"));
3721 return;
3722 }
3723 ++input_line_pointer;
3724
3725 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3726
809ffe0d 3727 symbol_get_tc (sym)->output = 1;
252b5132 3728
6877bb43 3729 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3730
809ffe0d 3731 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3732
41ea10b1 3733 /* In this case :
99a814a1 3734
41ea10b1
TR		 3735 .bs name
3736 .stabx "z",arrays_,133,0
3737 .es
99a814a1 3738
41ea10b1 3739 .comm arrays_,13768,3
99a814a1 3740
41ea10b1
TR		 3741 resolve_symbol_value will copy the exp's "within" into sym's when the
3742 offset is 0. Since this seems to be corner case problem,
3743 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3744 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3745
3746 if (exp.X_op == O_symbol)
41ea10b1
TR		 3747 {
3748 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3749 }
6877bb43 3750 }
99a814a1 3751
252b5132
RH		 3752 if (exp.X_op != O_symbol
3753 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3754 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3755 ppc_frob_label (sym);
3756 else
3757 {
3758 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3759 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3760 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3761 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3762 }
3763
3764 demand_empty_rest_of_line ();
3765}
3766
3767/* The .function pseudo-op. This takes several arguments. The first
3768 argument seems to be the external name of the symbol. The second
67c1ffbe 3769 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3770 uses the same name for both. I have no idea what the third and
3771 fourth arguments are meant to be. The optional fifth argument is
3772 an expression for the size of the function. In COFF this symbol
3773 gets an aux entry like that used for a csect. */
3774
3775static void
98027b10 3776ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3777{
3778 char *name;
3779 char endc;
3780 char *s;
3781 symbolS *ext_sym;
3782 symbolS *lab_sym;
3783
3784 name = input_line_pointer;
3785 endc = get_symbol_end ();
3786
3787 /* Ignore any [PR] suffix. */
3788 name = ppc_canonicalize_symbol_name (name);
3789 s = strchr (name, '[');
3790 if (s != (char *) NULL
3791 && strcmp (s + 1, "PR]") == 0)
3792 *s = '\0';
3793
3794 ext_sym = symbol_find_or_make (name);
3795
3796 *input_line_pointer = endc;
3797
3798 if (*input_line_pointer != ',')
3799 {
3800 as_bad (_("missing symbol name"));
3801 ignore_rest_of_line ();
3802 return;
3803 }
3804 ++input_line_pointer;
3805
3806 name = input_line_pointer;
3807 endc = get_symbol_end ();
3808
3809 lab_sym = symbol_find_or_make (name);
3810
3811 *input_line_pointer = endc;
3812
3813 if (ext_sym != lab_sym)
3814 {
809ffe0d
ILT		 3815 expressionS exp;
3816
3817 exp.X_op = O_symbol;
3818 exp.X_add_symbol = lab_sym;
3819 exp.X_op_symbol = NULL;
3820 exp.X_add_number = 0;
3821 exp.X_unsigned = 0;
3822 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3823 }
3824
96d56e9f
NC		 3825 if (symbol_get_tc (ext_sym)->symbol_class == -1)
3826 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 3827 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3828
3829 if (*input_line_pointer == ',')
3830 {
91d6fa6a 3831 expressionS exp;
252b5132
RH		 3832
3833 /* Ignore the third argument. */
3834 ++input_line_pointer;
91d6fa6a 3835 expression (& exp);
252b5132
RH		 3836 if (*input_line_pointer == ',')
3837 {
3838 /* Ignore the fourth argument. */
3839 ++input_line_pointer;
91d6fa6a 3840 expression (& exp);
252b5132
RH		 3841 if (*input_line_pointer == ',')
3842 {
3843 /* The fifth argument is the function size. */
3844 ++input_line_pointer;
809ffe0d
ILT		 3845 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3846 absolute_section,
3847 (valueT) 0,
3848 &zero_address_frag);
3849 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3850 }
3851 }
3852 }
3853
3854 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3855 SF_SET_FUNCTION (ext_sym);
3856 SF_SET_PROCESS (ext_sym);
3857 coff_add_linesym (ext_sym);
3858
3859 demand_empty_rest_of_line ();
3860}
3861
3862/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3863 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3864 with the correct line number */
5d6255fe 3865
8642cce8 3866static symbolS *saved_bi_sym = 0;
252b5132
RH		 3867
3868static void
98027b10 3869ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3870{
3871 symbolS *sym;
3872
3873 sym = symbol_make (".bf");
3874 S_SET_SEGMENT (sym, text_section);
809ffe0d 3875 symbol_set_frag (sym, frag_now);
252b5132
RH		 3876 S_SET_VALUE (sym, frag_now_fix ());
3877 S_SET_STORAGE_CLASS (sym, C_FCN);
3878
3879 coff_line_base = get_absolute_expression ();
3880
3881 S_SET_NUMBER_AUXILIARY (sym, 1);
3882 SA_SET_SYM_LNNO (sym, coff_line_base);
3883
8642cce8 3884 /* Line number for bi. */
5d6255fe 3885 if (saved_bi_sym)
8642cce8
TR		 3886 {
3887 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3888 saved_bi_sym = 0;
3889 }
5d6255fe 3890
8642cce8 3891
809ffe0d 3892 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3893
3894 ppc_frob_label (sym);
3895
3896 demand_empty_rest_of_line ();
3897}
3898
3899/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3900 ".ef", except that the line number is absolute, not relative to the
3901 most recent ".bf" symbol. */
3902
3903static void
98027b10 3904ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3905{
3906 symbolS *sym;
3907
3908 sym = symbol_make (".ef");
3909 S_SET_SEGMENT (sym, text_section);
809ffe0d 3910 symbol_set_frag (sym, frag_now);
252b5132
RH		 3911 S_SET_VALUE (sym, frag_now_fix ());
3912 S_SET_STORAGE_CLASS (sym, C_FCN);
3913 S_SET_NUMBER_AUXILIARY (sym, 1);
3914 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3915 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3916
3917 ppc_frob_label (sym);
3918
3919 demand_empty_rest_of_line ();
3920}
3921
3922/* The .bi and .ei pseudo-ops. These take a string argument and
3923 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3924 the symbol list. The value of .bi will be know when the next .bf
3925 is encountered. */
252b5132
RH		 3926
3927static void
98027b10 3928ppc_biei (int ei)
252b5132
RH		 3929{
3930 static symbolS *last_biei;
3931
3932 char *name;
3933 int len;
3934 symbolS *sym;
3935 symbolS *look;
3936
3937 name = demand_copy_C_string (&len);
3938
3939 /* The value of these symbols is actually file offset. Here we set
3940 the value to the index into the line number entries. In
3941 ppc_frob_symbols we set the fix_line field, which will cause BFD
3942 to do the right thing. */
3943
3944 sym = symbol_make (name);
3945 /* obj-coff.c currently only handles line numbers correctly in the
3946 .text section. */
3947 S_SET_SEGMENT (sym, text_section);
3948 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3949 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3950
3951 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3952 symbol_get_tc (sym)->output = 1;
81d4177b 3953
8642cce8 3954 /* Save bi. */
5d6255fe 3955 if (ei)
8642cce8
TR		 3956 saved_bi_sym = 0;
3957 else
3958 saved_bi_sym = sym;
3959
252b5132
RH		 3960 for (look = last_biei ? last_biei : symbol_rootP;
3961 (look != (symbolS *) NULL
3962 && (S_GET_STORAGE_CLASS (look) == C_FILE
3963 || S_GET_STORAGE_CLASS (look) == C_BINCL
3964 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3965 look = symbol_next (look))
3966 ;
3967 if (look != (symbolS *) NULL)
3968 {
3969 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3970 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3971 last_biei = sym;
3972 }
3973
3974 demand_empty_rest_of_line ();
3975}
3976
3977/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3978 There is one argument, which is a csect symbol. The value of the
3979 .bs symbol is the index of this csect symbol. */
3980
3981static void
98027b10 3982ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3983{
3984 char *name;
3985 char endc;
3986 symbolS *csect;
3987 symbolS *sym;
3988
3989 if (ppc_current_block != NULL)
3990 as_bad (_("nested .bs blocks"));
3991
3992 name = input_line_pointer;
3993 endc = get_symbol_end ();
3994
3995 csect = symbol_find_or_make (name);
3996
3997 *input_line_pointer = endc;
3998
3999 sym = symbol_make (".bs");
4000 S_SET_SEGMENT (sym, now_seg);
4001 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4002 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4003 symbol_get_tc (sym)->output = 1;
252b5132 4004
809ffe0d 4005 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4006
4007 ppc_frob_label (sym);
4008
4009 ppc_current_block = sym;
4010
4011 demand_empty_rest_of_line ();
4012}
4013
4014/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4015
4016static void
98027b10 4017ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4018{
4019 symbolS *sym;
4020
4021 if (ppc_current_block == NULL)
4022 as_bad (_(".es without preceding .bs"));
4023
4024 sym = symbol_make (".es");
4025 S_SET_SEGMENT (sym, now_seg);
4026 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4027 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4028 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4029
4030 ppc_frob_label (sym);
4031
4032 ppc_current_block = NULL;
4033
4034 demand_empty_rest_of_line ();
4035}
4036
4037/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4038 line number. */
4039
4040static void
98027b10 4041ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4042{
4043 symbolS *sym;
4044
4045 sym = symbol_make (".bb");
4046 S_SET_SEGMENT (sym, text_section);
809ffe0d 4047 symbol_set_frag (sym, frag_now);
252b5132
RH		 4048 S_SET_VALUE (sym, frag_now_fix ());
4049 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4050
4051 S_SET_NUMBER_AUXILIARY (sym, 1);
4052 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4053
809ffe0d 4054 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4055
4056 SF_SET_PROCESS (sym);
4057
4058 ppc_frob_label (sym);
4059
4060 demand_empty_rest_of_line ();
4061}
4062
4063/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4064 line number. */
4065
4066static void
98027b10 4067ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4068{
4069 symbolS *sym;
4070
4071 sym = symbol_make (".eb");
4072 S_SET_SEGMENT (sym, text_section);
809ffe0d 4073 symbol_set_frag (sym, frag_now);
252b5132
RH		 4074 S_SET_VALUE (sym, frag_now_fix ());
4075 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4076 S_SET_NUMBER_AUXILIARY (sym, 1);
4077 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4078 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4079
4080 SF_SET_PROCESS (sym);
4081
4082 ppc_frob_label (sym);
4083
4084 demand_empty_rest_of_line ();
4085}
4086
4087/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4088 specified name. */
4089
4090static void
98027b10 4091ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4092{
4093 char *name;
4094 int len;
4095 symbolS *sym;
4096
4097 name = demand_copy_C_string (&len);
4098 sym = symbol_make (name);
4099 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4100 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4101 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4102 S_SET_VALUE (sym, 0);
809ffe0d 4103 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4104
4105 ppc_frob_label (sym);
4106
4107 demand_empty_rest_of_line ();
4108}
4109
4110/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4111
4112static void
98027b10 4113ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4114{
4115 symbolS *sym;
4116
4117 sym = symbol_make (".ec");
4118 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4119 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4120 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4121 S_SET_VALUE (sym, 0);
809ffe0d 4122 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4123
4124 ppc_frob_label (sym);
4125
4126 demand_empty_rest_of_line ();
4127}
4128
4129/* The .toc pseudo-op. Switch to the .toc subsegment. */
4130
4131static void
98027b10 4132ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4133{
4134 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4135 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4136 else
4137 {
4138 subsegT subseg;
4139 symbolS *sym;
4140 symbolS *list;
81d4177b 4141
252b5132
RH		 4142 subseg = ppc_data_subsegment;
4143 ++ppc_data_subsegment;
4144
4145 subseg_new (segment_name (data_section), subseg);
4146 ppc_toc_frag = frag_now;
4147
4148 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4149 symbol_set_frag (sym, frag_now);
252b5132
RH		 4150 S_SET_SEGMENT (sym, data_section);
4151 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4152 symbol_get_tc (sym)->subseg = subseg;
4153 symbol_get_tc (sym)->output = 1;
4154 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4155
4156 ppc_toc_csect = sym;
81d4177b 4157
252b5132 4158 for (list = ppc_data_csects;
809ffe0d
ILT		 4159 symbol_get_tc (list)->next != (symbolS *) NULL;
4160 list = symbol_get_tc (list)->next)
252b5132 4161 ;
809ffe0d 4162 symbol_get_tc (list)->next = sym;
252b5132
RH		 4163
4164 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4165 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4166 &symbol_lastP);
252b5132
RH		 4167 }
4168
4169 ppc_current_csect = ppc_toc_csect;
4170
4171 demand_empty_rest_of_line ();
4172}
4173
4174/* The AIX assembler automatically aligns the operands of a .long or
4175 .short pseudo-op, and we want to be compatible. */
4176
4177static void
98027b10 4178ppc_xcoff_cons (int log_size)
252b5132
RH		 4179{
4180 frag_align (log_size, 0, 0);
4181 record_alignment (now_seg, log_size);
4182 cons (1 << log_size);
4183}
4184
4185static void
98027b10 4186ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4187{
4188 expressionS exp;
4189 int byte_count;
4190
4191 (void) expression (&exp);
4192
4193 if (exp.X_op != O_constant)
4194 {
4195 as_bad (_("non-constant byte count"));
4196 return;
4197 }
4198
4199 byte_count = exp.X_add_number;
4200
4201 if (*input_line_pointer != ',')
4202 {
4203 as_bad (_("missing value"));
4204 return;
4205 }
4206
4207 ++input_line_pointer;
4208 cons (byte_count);
4209}
4210
4211#endif /* OBJ_XCOFF */
0baf16f2 4212#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4213\f
4214/* The .tc pseudo-op. This is used when generating either XCOFF or
4215 ELF. This takes two or more arguments.
4216
4217 When generating XCOFF output, the first argument is the name to
4218 give to this location in the toc; this will be a symbol with class
0baf16f2 4219 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4220 this location in the TOC; often there is just one more argument, a
1049f94e 4221 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4222 depends on target word size. A 32-bit target uses 4-byte values, a
4223 64-bit target uses 8-byte values.
252b5132
RH		 4224
4225 When not generating XCOFF output, the arguments are the same, but
4226 the first argument is simply ignored. */
4227
4228static void
98027b10 4229ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4230{
4231#ifdef OBJ_XCOFF
4232
4233 /* Define the TOC symbol name. */
4234 {
4235 char *name;
4236 char endc;
4237 symbolS *sym;
4238
4239 if (ppc_toc_csect == (symbolS *) NULL
4240 || ppc_toc_csect != ppc_current_csect)
4241 {
4242 as_bad (_(".tc not in .toc section"));
4243 ignore_rest_of_line ();
4244 return;
4245 }
4246
4247 name = input_line_pointer;
4248 endc = get_symbol_end ();
4249
4250 sym = symbol_find_or_make (name);
4251
4252 *input_line_pointer = endc;
4253
4254 if (S_IS_DEFINED (sym))
4255 {
4256 symbolS *label;
4257
809ffe0d 4258 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4259 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4260 {
4261 as_bad (_(".tc with no label"));
4262 ignore_rest_of_line ();
4263 return;
4264 }
4265
4266 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4267 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4268 S_SET_VALUE (label, S_GET_VALUE (sym));
4269
4270 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4271 ++input_line_pointer;
4272
4273 return;
4274 }
4275
4276 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4277 symbol_set_frag (sym, frag_now);
252b5132 4278 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4279 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4280 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4281
4282 ppc_frob_label (sym);
4283 }
4284
0baf16f2
AM		 4285#endif /* OBJ_XCOFF */
4286#ifdef OBJ_ELF
9c7977b3 4287 int align;
252b5132
RH		 4288
4289 /* Skip the TOC symbol name. */
4290 while (is_part_of_name (*input_line_pointer)
d13d4015 4291 || *input_line_pointer == ' '
252b5132
RH		 4292 || *input_line_pointer == '['
4293 || *input_line_pointer == ']'
4294 || *input_line_pointer == '{'
4295 || *input_line_pointer == '}')
4296 ++input_line_pointer;
4297
0baf16f2 4298 /* Align to a four/eight byte boundary. */
2b3c4602 4299 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4300 frag_align (align, 0, 0);
4301 record_alignment (now_seg, align);
0baf16f2 4302#endif /* OBJ_ELF */
252b5132
RH		 4303
4304 if (*input_line_pointer != ',')
4305 demand_empty_rest_of_line ();
4306 else
4307 {
4308 ++input_line_pointer;
2b3c4602 4309 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4310 }
4311}
0baf16f2
AM		 4312
4313/* Pseudo-op .machine. */
0baf16f2
AM		 4314
4315static void
98027b10 4316ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4317{
69c040df
AM		 4318 char *cpu_string;
4319#define MAX_HISTORY 100
fa452fa6 4320 static ppc_cpu_t *cpu_history;
69c040df
AM		 4321 static int curr_hist;
4322
4323 SKIP_WHITESPACE ();
4324
4325 if (*input_line_pointer == '"')
4326 {
4327 int len;
4328 cpu_string = demand_copy_C_string (&len);
4329 }
4330 else
4331 {
4332 char c;
4333 cpu_string = input_line_pointer;
4334 c = get_symbol_end ();
4335 cpu_string = xstrdup (cpu_string);
4336 *input_line_pointer = c;
4337 }
4338
4339 if (cpu_string != NULL)
4340 {
fa452fa6 4341 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4342 ppc_cpu_t new_cpu;
69c040df
AM		 4343 char *p;
4344
4345 for (p = cpu_string; *p != 0; p++)
4346 *p = TOLOWER (*p);
4347
4348 if (strcmp (cpu_string, "push") == 0)
4349 {
4350 if (cpu_history == NULL)
4351 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4352
4353 if (curr_hist >= MAX_HISTORY)
4354 as_bad (_(".machine stack overflow"));
4355 else
4356 cpu_history[curr_hist++] = ppc_cpu;
4357 }
4358 else if (strcmp (cpu_string, "pop") == 0)
4359 {
4360 if (curr_hist <= 0)
4361 as_bad (_(".machine stack underflow"));
4362 else
4363 ppc_cpu = cpu_history[--curr_hist];
4364 }
69fe9ce5
AM		 4365 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4366 ppc_cpu = new_cpu;
69c040df
AM		 4367 else
4368 as_bad (_("invalid machine `%s'"), cpu_string);
4369
4370 if (ppc_cpu != old_cpu)
4371 ppc_setup_opcodes ();
4372 }
4373
4374 demand_empty_rest_of_line ();
0baf16f2
AM		 4375}
4376
4377/* See whether a symbol is in the TOC section. */
4378
4379static int
98027b10 4380ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4381{
4382#ifdef OBJ_XCOFF
96d56e9f 4383 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4384#endif
4385#ifdef OBJ_ELF
4386 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4387 if (ppc_obj64)
0baf16f2
AM		 4388 return strcmp (sname, ".toc") == 0;
4389 else
4390 return strcmp (sname, ".got") == 0;
4391#endif
4392}
4393#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4394\f
4395#ifdef TE_PE
4396
99a814a1 4397/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4398
4399/* Set the current section. */
4400static void
98027b10 4401ppc_set_current_section (segT new)
252b5132
RH		 4402{
4403 ppc_previous_section = ppc_current_section;
4404 ppc_current_section = new;
4405}
4406
4407/* pseudo-op: .previous
4408 behaviour: toggles the current section with the previous section.
4409 errors: None
99a814a1
AM		 4410 warnings: "No previous section" */
4411
252b5132 4412static void
98027b10 4413ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4414{
4415 symbolS *tmp;
4416
81d4177b 4417 if (ppc_previous_section == NULL)
252b5132 4418 {
99a814a1 4419 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4420 return;
4421 }
4422
99a814a1 4423 subseg_set (ppc_previous_section, 0);
252b5132 4424
99a814a1 4425 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4426}
4427
4428/* pseudo-op: .pdata
4429 behaviour: predefined read only data section
b34976b6 4430 double word aligned
252b5132
RH		 4431 errors: None
4432 warnings: None
4433 initial: .section .pdata "adr3"
b34976b6 4434 a - don't know -- maybe a misprint
252b5132
RH		 4435 d - initialized data
4436 r - readable
4437 3 - double word aligned (that would be 4 byte boundary)
4438
4439 commentary:
4440 Tag index tables (also known as the function table) for exception
99a814a1 4441 handling, debugging, etc. */
252b5132 4442
252b5132 4443static void
98027b10 4444ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4445{
81d4177b 4446 if (pdata_section == 0)
252b5132
RH		 4447 {
4448 pdata_section = subseg_new (".pdata", 0);
81d4177b 4449
252b5132
RH		 4450 bfd_set_section_flags (stdoutput, pdata_section,
4451 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4452 | SEC_READONLY | SEC_DATA ));
81d4177b 4453
252b5132
RH		 4454 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4455 }
4456 else
4457 {
99a814a1 4458 pdata_section = subseg_new (".pdata", 0);
252b5132 4459 }
99a814a1 4460 ppc_set_current_section (pdata_section);
252b5132
RH		 4461}
4462
4463/* pseudo-op: .ydata
4464 behaviour: predefined read only data section
b34976b6 4465 double word aligned
252b5132
RH		 4466 errors: None
4467 warnings: None
4468 initial: .section .ydata "drw3"
b34976b6 4469 a - don't know -- maybe a misprint
252b5132
RH		 4470 d - initialized data
4471 r - readable
4472 3 - double word aligned (that would be 4 byte boundary)
4473 commentary:
4474 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4475 debugging, etc. */
4476
252b5132 4477static void
98027b10 4478ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4479{
81d4177b 4480 if (ydata_section == 0)
252b5132
RH		 4481 {
4482 ydata_section = subseg_new (".ydata", 0);
4483 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4484 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4485 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4486
4487 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4488 }
4489 else
4490 {
4491 ydata_section = subseg_new (".ydata", 0);
4492 }
99a814a1 4493 ppc_set_current_section (ydata_section);
252b5132
RH		 4494}
4495
4496/* pseudo-op: .reldata
4497 behaviour: predefined read write data section
b34976b6 4498 double word aligned (4-byte)
252b5132
RH		 4499 FIXME: relocation is applied to it
4500 FIXME: what's the difference between this and .data?
4501 errors: None
4502 warnings: None
4503 initial: .section .reldata "drw3"
4504 d - initialized data
4505 r - readable
4506 w - writeable
4507 3 - double word aligned (that would be 8 byte boundary)
4508
4509 commentary:
4510 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4511 function descriptors, etc. */
4512
252b5132 4513static void
98027b10 4514ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4515{
4516 if (reldata_section == 0)
4517 {
4518 reldata_section = subseg_new (".reldata", 0);
4519
4520 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4521 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4522 | SEC_DATA));
252b5132
RH		 4523
4524 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4525 }
4526 else
4527 {
4528 reldata_section = subseg_new (".reldata", 0);
4529 }
99a814a1 4530 ppc_set_current_section (reldata_section);
252b5132
RH		 4531}
4532
4533/* pseudo-op: .rdata
4534 behaviour: predefined read only data section
b34976b6 4535 double word aligned
252b5132
RH		 4536 errors: None
4537 warnings: None
4538 initial: .section .rdata "dr3"
4539 d - initialized data
4540 r - readable
99a814a1
AM		 4541 3 - double word aligned (that would be 4 byte boundary) */
4542
252b5132 4543static void
98027b10 4544ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4545{
4546 if (rdata_section == 0)
4547 {
4548 rdata_section = subseg_new (".rdata", 0);
4549 bfd_set_section_flags (stdoutput, rdata_section,
4550 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4551 | SEC_READONLY | SEC_DATA ));
4552
4553 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4554 }
4555 else
4556 {
4557 rdata_section = subseg_new (".rdata", 0);
4558 }
99a814a1 4559 ppc_set_current_section (rdata_section);
252b5132
RH		 4560}
4561
4562/* pseudo-op: .ualong
81d4177b 4563 behaviour: much like .int, with the exception that no alignment is
b34976b6 4564 performed.
252b5132
RH		 4565 FIXME: test the alignment statement
4566 errors: None
99a814a1
AM		 4567 warnings: None */
4568
252b5132 4569static void
98027b10 4570ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4571{
99a814a1
AM		 4572 /* Try for long. */
4573 cons (4);
252b5132
RH		 4574}
4575
4576/* pseudo-op: .znop <symbol name>
4577 behaviour: Issue a nop instruction
b34976b6 4578 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4579 the supplied symbol name.
4580 errors: None
99a814a1
AM		 4581 warnings: Missing symbol name */
4582
252b5132 4583static void
98027b10 4584ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4585{
4586 unsigned long insn;
4587 const struct powerpc_opcode *opcode;
4588 expressionS ex;
4589 char *f;
252b5132 4590 symbolS *sym;
252b5132
RH		 4591 char *symbol_name;
4592 char c;
4593 char *name;
4594 unsigned int exp;
4595 flagword flags;
4596 asection *sec;
4597
99a814a1 4598 /* Strip out the symbol name. */
252b5132
RH		 4599 symbol_name = input_line_pointer;
4600 c = get_symbol_end ();
4601
4602 name = xmalloc (input_line_pointer - symbol_name + 1);
4603 strcpy (name, symbol_name);
4604
4605 sym = symbol_find_or_make (name);
4606
4607 *input_line_pointer = c;
4608
4609 SKIP_WHITESPACE ();
4610
4611 /* Look up the opcode in the hash table. */
4612 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4613
99a814a1 4614 /* Stick in the nop. */
252b5132
RH		 4615 insn = opcode->opcode;
4616
4617 /* Write out the instruction. */
4618 f = frag_more (4);
4619 md_number_to_chars (f, insn, 4);
4620 fix_new (frag_now,
4621 f - frag_now->fr_literal,
4622 4,
4623 sym,
4624 0,
4625 0,
4626 BFD_RELOC_16_GOT_PCREL);
4627
4628}
4629
81d4177b
KH		 4630/* pseudo-op:
4631 behaviour:
4632 errors:
99a814a1
AM		 4633 warnings: */
4634
252b5132 4635static void
98027b10 4636ppc_pe_comm (int lcomm)
252b5132 4637{
98027b10
AM		 4638 char *name;
4639 char c;
4640 char *p;
252b5132 4641 offsetT temp;
98027b10 4642 symbolS *symbolP;
252b5132
RH		 4643 offsetT align;
4644
4645 name = input_line_pointer;
4646 c = get_symbol_end ();
4647
99a814a1 4648 /* just after name is now '\0'. */
252b5132
RH		 4649 p = input_line_pointer;
4650 *p = c;
4651 SKIP_WHITESPACE ();
4652 if (*input_line_pointer != ',')
4653 {
4654 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4655 ignore_rest_of_line ();
4656 return;
4657 }
4658
4659 input_line_pointer++; /* skip ',' */
4660 if ((temp = get_absolute_expression ()) < 0)
4661 {
4662 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4663 ignore_rest_of_line ();
4664 return;
4665 }
4666
4667 if (! lcomm)
4668 {
4669 /* The third argument to .comm is the alignment. */
4670 if (*input_line_pointer != ',')
4671 align = 3;
4672 else
4673 {
4674 ++input_line_pointer;
4675 align = get_absolute_expression ();
4676 if (align <= 0)
4677 {
4678 as_warn (_("ignoring bad alignment"));
4679 align = 3;
4680 }
4681 }
4682 }
4683
4684 *p = 0;
4685 symbolP = symbol_find_or_make (name);
4686
4687 *p = c;
4688 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4689 {
4690 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4691 S_GET_NAME (symbolP));
4692 ignore_rest_of_line ();
4693 return;
4694 }
4695
4696 if (S_GET_VALUE (symbolP))
4697 {
4698 if (S_GET_VALUE (symbolP) != (valueT) temp)
4699 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4700 S_GET_NAME (symbolP),
4701 (long) S_GET_VALUE (symbolP),
4702 (long) temp);
4703 }
4704 else
4705 {
4706 S_SET_VALUE (symbolP, (valueT) temp);
4707 S_SET_EXTERNAL (symbolP);
86ebace2 4708 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4709 }
4710
4711 demand_empty_rest_of_line ();
4712}
4713
4714/*
4715 * implement the .section pseudo op:
4716 * .section name {, "flags"}
4717 * ^ ^
4718 * | +--- optional flags: 'b' for bss
4719 * | 'i' for info
4720 * +-- section name 'l' for lib
4721 * 'n' for noload
4722 * 'o' for over
4723 * 'w' for data
4724 * 'd' (apparently m88k for data)
4725 * 'x' for text
4726 * But if the argument is not a quoted string, treat it as a
4727 * subsegment number.
4728 *
4729 * FIXME: this is a copy of the section processing from obj-coff.c, with
4730 * additions/changes for the moto-pas assembler support. There are three
4731 * categories:
4732 *
81d4177b 4733 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4734 * setting bits that bfd probably neither understands or uses. The
4735 * correct approach (?) will have to incorporate extra fields attached
4736 * to the section to hold the system specific stuff. (krk)
4737 *
4738 * Section Contents:
4739 * 'a' - unknown - referred to in documentation, but no definition supplied
4740 * 'c' - section has code
4741 * 'd' - section has initialized data
4742 * 'u' - section has uninitialized data
4743 * 'i' - section contains directives (info)
4744 * 'n' - section can be discarded
4745 * 'R' - remove section at link time
4746 *
4747 * Section Protection:
4748 * 'r' - section is readable
4749 * 'w' - section is writeable
4750 * 'x' - section is executable
4751 * 's' - section is sharable
4752 *
4753 * Section Alignment:
4754 * '0' - align to byte boundary
4755 * '1' - align to halfword undary
4756 * '2' - align to word boundary
4757 * '3' - align to doubleword boundary
4758 * '4' - align to quadword boundary
4759 * '5' - align to 32 byte boundary
4760 * '6' - align to 64 byte boundary
4761 *
4762 */
4763
4764void
98027b10 4765ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4766{
99a814a1 4767 /* Strip out the section name. */
252b5132
RH		 4768 char *section_name;
4769 char c;
4770 char *name;
4771 unsigned int exp;
4772 flagword flags;
4773 segT sec;
4774 int align;
4775
4776 section_name = input_line_pointer;
4777 c = get_symbol_end ();
4778
4779 name = xmalloc (input_line_pointer - section_name + 1);
4780 strcpy (name, section_name);
4781
4782 *input_line_pointer = c;
4783
4784 SKIP_WHITESPACE ();
4785
4786 exp = 0;
4787 flags = SEC_NO_FLAGS;
4788
4789 if (strcmp (name, ".idata$2") == 0)
4790 {
4791 align = 0;
4792 }
4793 else if (strcmp (name, ".idata$3") == 0)
4794 {
4795 align = 0;
4796 }
4797 else if (strcmp (name, ".idata$4") == 0)
4798 {
4799 align = 2;
4800 }
4801 else if (strcmp (name, ".idata$5") == 0)
4802 {
4803 align = 2;
4804 }
4805 else if (strcmp (name, ".idata$6") == 0)
4806 {
4807 align = 1;
4808 }
4809 else
99a814a1
AM		 4810 /* Default alignment to 16 byte boundary. */
4811 align = 4;
252b5132
RH		 4812
4813 if (*input_line_pointer == ',')
4814 {
4815 ++input_line_pointer;
4816 SKIP_WHITESPACE ();
4817 if (*input_line_pointer != '"')
4818 exp = get_absolute_expression ();
4819 else
4820 {
4821 ++input_line_pointer;
4822 while (*input_line_pointer != '"'
4823 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4824 {
4825 switch (*input_line_pointer)
4826 {
4827 /* Section Contents */
4828 case 'a': /* unknown */
4829 as_bad (_("Unsupported section attribute -- 'a'"));
4830 break;
4831 case 'c': /* code section */
81d4177b 4832 flags |= SEC_CODE;
252b5132
RH		 4833 break;
4834 case 'd': /* section has initialized data */
4835 flags |= SEC_DATA;
4836 break;
4837 case 'u': /* section has uninitialized data */
4838 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4839 in winnt.h */
4840 flags |= SEC_ROM;
4841 break;
4842 case 'i': /* section contains directives (info) */
4843 /* FIXME: This is IMAGE_SCN_LNK_INFO
4844 in winnt.h */
4845 flags |= SEC_HAS_CONTENTS;
4846 break;
4847 case 'n': /* section can be discarded */
81d4177b 4848 flags &=~ SEC_LOAD;
252b5132
RH		 4849 break;
4850 case 'R': /* Remove section at link time */
4851 flags |= SEC_NEVER_LOAD;
4852 break;
8d452c78 4853#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4854 /* Section Protection */
4855 case 'r': /* section is readable */
4856 flags |= IMAGE_SCN_MEM_READ;
4857 break;
4858 case 'w': /* section is writeable */
4859 flags |= IMAGE_SCN_MEM_WRITE;
4860 break;
4861 case 'x': /* section is executable */
4862 flags |= IMAGE_SCN_MEM_EXECUTE;
4863 break;
4864 case 's': /* section is sharable */
4865 flags |= IMAGE_SCN_MEM_SHARED;
4866 break;
4867
4868 /* Section Alignment */
4869 case '0': /* align to byte boundary */
4870 flags |= IMAGE_SCN_ALIGN_1BYTES;
4871 align = 0;
4872 break;
4873 case '1': /* align to halfword boundary */
4874 flags |= IMAGE_SCN_ALIGN_2BYTES;
4875 align = 1;
4876 break;
4877 case '2': /* align to word boundary */
4878 flags |= IMAGE_SCN_ALIGN_4BYTES;
4879 align = 2;
4880 break;
4881 case '3': /* align to doubleword boundary */
4882 flags |= IMAGE_SCN_ALIGN_8BYTES;
4883 align = 3;
4884 break;
4885 case '4': /* align to quadword boundary */
4886 flags |= IMAGE_SCN_ALIGN_16BYTES;
4887 align = 4;
4888 break;
4889 case '5': /* align to 32 byte boundary */
4890 flags |= IMAGE_SCN_ALIGN_32BYTES;
4891 align = 5;
4892 break;
4893 case '6': /* align to 64 byte boundary */
4894 flags |= IMAGE_SCN_ALIGN_64BYTES;
4895 align = 6;
4896 break;
8d452c78 4897#endif
252b5132 4898 default:
99a814a1
AM		 4899 as_bad (_("unknown section attribute '%c'"),
4900 *input_line_pointer);
252b5132
RH		 4901 break;
4902 }
4903 ++input_line_pointer;
4904 }
4905 if (*input_line_pointer == '"')
4906 ++input_line_pointer;
4907 }
4908 }
4909
4910 sec = subseg_new (name, (subsegT) exp);
4911
99a814a1 4912 ppc_set_current_section (sec);
252b5132
RH		 4913
4914 if (flags != SEC_NO_FLAGS)
4915 {
4916 if (! bfd_set_section_flags (stdoutput, sec, flags))
4917 as_bad (_("error setting flags for \"%s\": %s"),
4918 bfd_section_name (stdoutput, sec),
4919 bfd_errmsg (bfd_get_error ()));
4920 }
4921
99a814a1 4922 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4923}
4924
4925static void
98027b10 4926ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4927{
4928 char *name;
4929 char endc;
4930 symbolS *ext_sym;
4931
4932 name = input_line_pointer;
4933 endc = get_symbol_end ();
4934
4935 ext_sym = symbol_find_or_make (name);
4936
4937 *input_line_pointer = endc;
4938
4939 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4940 SF_SET_FUNCTION (ext_sym);
4941 SF_SET_PROCESS (ext_sym);
4942 coff_add_linesym (ext_sym);
4943
4944 demand_empty_rest_of_line ();
4945}
4946
4947static void
98027b10 4948ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4949{
4950 if (tocdata_section == 0)
4951 {
4952 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4953 /* FIXME: section flags won't work. */
252b5132
RH		 4954 bfd_set_section_flags (stdoutput, tocdata_section,
4955 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4956 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4957
4958 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4959 }
4960 else
4961 {
4962 rdata_section = subseg_new (".tocd", 0);
4963 }
4964
99a814a1 4965 ppc_set_current_section (tocdata_section);
252b5132
RH		 4966
4967 demand_empty_rest_of_line ();
4968}
4969
4970/* Don't adjust TOC relocs to use the section symbol. */
4971
4972int
98027b10 4973ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4974{
4975 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4976}
4977
4978#endif
4979\f
4980#ifdef OBJ_XCOFF
4981
4982/* XCOFF specific symbol and file handling. */
4983
4984/* Canonicalize the symbol name. We use the to force the suffix, if
4985 any, to use square brackets, and to be in upper case. */
4986
4987char *
98027b10 4988ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4989{
4990 char *s;
4991
4992 if (ppc_stab_symbol)
4993 return name;
4994
4995 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4996 ;
4997 if (*s != '\0')
4998 {
4999 char brac;
5000
5001 if (*s == '[')
5002 brac = ']';
5003 else
5004 {
5005 *s = '[';
5006 brac = '}';
5007 }
5008
5009 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5010 *s = TOUPPER (*s);
252b5132
RH		 5011
5012 if (*s == '\0' || s[1] != '\0')
5013 as_bad (_("bad symbol suffix"));
5014
5015 *s = ']';
5016 }
5017
5018 return name;
5019}
5020
5021/* Set the class of a symbol based on the suffix, if any. This is
5022 called whenever a new symbol is created. */
5023
5024void
98027b10 5025ppc_symbol_new_hook (symbolS *sym)
252b5132 5026{
809ffe0d 5027 struct ppc_tc_sy *tc;
252b5132
RH		 5028 const char *s;
5029
809ffe0d
ILT		 5030 tc = symbol_get_tc (sym);
5031 tc->next = NULL;
5032 tc->output = 0;
96d56e9f 5033 tc->symbol_class = -1;
809ffe0d
ILT		 5034 tc->real_name = NULL;
5035 tc->subseg = 0;
5036 tc->align = 0;
5037 tc->size = NULL;
5038 tc->within = NULL;
252b5132
RH		 5039
5040 if (ppc_stab_symbol)
5041 return;
5042
5043 s = strchr (S_GET_NAME (sym), '[');
5044 if (s == (const char *) NULL)
5045 {
5046 /* There is no suffix. */
5047 return;
5048 }
5049
5050 ++s;
5051
5052 switch (s[0])
5053 {
5054 case 'B':
5055 if (strcmp (s, "BS]") == 0)
96d56e9f 5056 tc->symbol_class = XMC_BS;
252b5132
RH		 5057 break;
5058 case 'D':
5059 if (strcmp (s, "DB]") == 0)
96d56e9f 5060 tc->symbol_class = XMC_DB;
252b5132 5061 else if (strcmp (s, "DS]") == 0)
96d56e9f 5062 tc->symbol_class = XMC_DS;
252b5132
RH		 5063 break;
5064 case 'G':
5065 if (strcmp (s, "GL]") == 0)
96d56e9f 5066 tc->symbol_class = XMC_GL;
252b5132
RH		 5067 break;
5068 case 'P':
5069 if (strcmp (s, "PR]") == 0)
96d56e9f 5070 tc->symbol_class = XMC_PR;
252b5132
RH		 5071 break;
5072 case 'R':
5073 if (strcmp (s, "RO]") == 0)
96d56e9f 5074 tc->symbol_class = XMC_RO;
252b5132 5075 else if (strcmp (s, "RW]") == 0)
96d56e9f 5076 tc->symbol_class = XMC_RW;
252b5132
RH		 5077 break;
5078 case 'S':
5079 if (strcmp (s, "SV]") == 0)
96d56e9f 5080 tc->symbol_class = XMC_SV;
252b5132
RH		 5081 break;
5082 case 'T':
5083 if (strcmp (s, "TC]") == 0)
96d56e9f 5084 tc->symbol_class = XMC_TC;
252b5132 5085 else if (strcmp (s, "TI]") == 0)
96d56e9f 5086 tc->symbol_class = XMC_TI;
252b5132 5087 else if (strcmp (s, "TB]") == 0)
96d56e9f 5088 tc->symbol_class = XMC_TB;
252b5132 5089 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5090 tc->symbol_class = XMC_TC0;
252b5132
RH		 5091 break;
5092 case 'U':
5093 if (strcmp (s, "UA]") == 0)
96d56e9f 5094 tc->symbol_class = XMC_UA;
252b5132 5095 else if (strcmp (s, "UC]") == 0)
96d56e9f 5096 tc->symbol_class = XMC_UC;
252b5132
RH		 5097 break;
5098 case 'X':
5099 if (strcmp (s, "XO]") == 0)
96d56e9f 5100 tc->symbol_class = XMC_XO;
252b5132
RH		 5101 break;
5102 }
5103
96d56e9f 5104 if (tc->symbol_class == -1)
252b5132
RH		 5105 as_bad (_("Unrecognized symbol suffix"));
5106}
5107
5108/* Set the class of a label based on where it is defined. This
5109 handles symbols without suffixes. Also, move the symbol so that it
5110 follows the csect symbol. */
5111
5112void
98027b10 5113ppc_frob_label (symbolS *sym)
252b5132
RH		 5114{
5115 if (ppc_current_csect != (symbolS *) NULL)
5116 {
96d56e9f
NC		 5117 if (symbol_get_tc (sym)->symbol_class == -1)
5118 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5119
5120 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5121 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5122 &symbol_rootP, &symbol_lastP);
5123 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 5124 }
07a53e5c
RH		 5125
5126#ifdef OBJ_ELF
5127 dwarf2_emit_label (sym);
5128#endif
252b5132
RH		 5129}
5130
5131/* This variable is set by ppc_frob_symbol if any absolute symbols are
5132 seen. It tells ppc_adjust_symtab whether it needs to look through
5133 the symbols. */
5134
b34976b6 5135static bfd_boolean ppc_saw_abs;
252b5132
RH		 5136
5137/* Change the name of a symbol just before writing it out. Set the
5138 real name if the .rename pseudo-op was used. Otherwise, remove any
5139 class suffix. Return 1 if the symbol should not be included in the
5140 symbol table. */
5141
5142int
98027b10 5143ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5144{
5145 static symbolS *ppc_last_function;
5146 static symbolS *set_end;
5147
5148 /* Discard symbols that should not be included in the output symbol
5149 table. */
809ffe0d
ILT		 5150 if (! symbol_used_in_reloc_p (sym)
5151 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5152 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5153 && ! symbol_get_tc (sym)->output
252b5132
RH		 5154 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5155 return 1;
5156
a161fe53
AM		 5157 /* This one will disappear anyway. Don't make a csect sym for it. */
5158 if (sym == abs_section_sym)
5159 return 1;
5160
809ffe0d
ILT		 5161 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5162 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5163 else
5164 {
5165 const char *name;
5166 const char *s;
5167
5168 name = S_GET_NAME (sym);
5169 s = strchr (name, '[');
5170 if (s != (char *) NULL)
5171 {
5172 unsigned int len;
5173 char *snew;
5174
5175 len = s - name;
5176 snew = xmalloc (len + 1);
5177 memcpy (snew, name, len);
5178 snew[len] = '\0';
5179
5180 S_SET_NAME (sym, snew);
5181 }
5182 }
5183
5184 if (set_end != (symbolS *) NULL)
5185 {
5186 SA_SET_SYM_ENDNDX (set_end, sym);
5187 set_end = NULL;
5188 }
5189
5190 if (SF_GET_FUNCTION (sym))
5191 {
5192 if (ppc_last_function != (symbolS *) NULL)
5193 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5194 ppc_last_function = sym;
809ffe0d 5195 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5196 {
6386f3a7 5197 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5198 SA_SET_SYM_FSIZE (sym,
5199 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5200 }
5201 }
5202 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5203 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5204 {
5205 if (ppc_last_function == (symbolS *) NULL)
5206 as_bad (_(".ef with no preceding .function"));
5207 else
5208 {
5209 set_end = ppc_last_function;
5210 ppc_last_function = NULL;
5211
5212 /* We don't have a C_EFCN symbol, but we need to force the
5213 COFF backend to believe that it has seen one. */
5214 coff_last_function = NULL;
5215 }
5216 }
5217
670ec21d 5218 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5219 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5220 && S_GET_STORAGE_CLASS (sym) != C_FILE
5221 && S_GET_STORAGE_CLASS (sym) != C_FCN
5222 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5223 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5224 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5225 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5226 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5227 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5228 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5229
5230 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5231 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5232 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5233 {
5234 int i;
5235 union internal_auxent *a;
5236
5237 /* Create a csect aux. */
5238 i = S_GET_NUMBER_AUXILIARY (sym);
5239 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5240 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5241 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5242 {
5243 /* This is the TOC table. */
5244 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5245 a->x_csect.x_scnlen.l = 0;
5246 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5247 }
809ffe0d 5248 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5249 {
5250 /* This is a csect symbol. x_scnlen is the size of the
5251 csect. */
809ffe0d 5252 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5253 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5254 S_GET_SEGMENT (sym))
5255 - S_GET_VALUE (sym));
5256 else
5257 {
6386f3a7 5258 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5259 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5260 - S_GET_VALUE (sym));
5261 }
809ffe0d 5262 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5263 }
5264 else if (S_GET_SEGMENT (sym) == bss_section)
5265 {
5266 /* This is a common symbol. */
809ffe0d
ILT		 5267 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5268 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5269 if (S_IS_EXTERNAL (sym))
96d56e9f 5270 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5271 else
96d56e9f 5272 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5273 }
5274 else if (S_GET_SEGMENT (sym) == absolute_section)
5275 {
5276 /* This is an absolute symbol. The csect will be created by
99a814a1 5277 ppc_adjust_symtab. */
b34976b6 5278 ppc_saw_abs = TRUE;
252b5132 5279 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5280 if (symbol_get_tc (sym)->symbol_class == -1)
5281 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5282 }
5283 else if (! S_IS_DEFINED (sym))
5284 {
5285 /* This is an external symbol. */
5286 a->x_csect.x_scnlen.l = 0;
5287 a->x_csect.x_smtyp = XTY_ER;
5288 }
96d56e9f 5289 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5290 {
5291 symbolS *next;
5292
5293 /* This is a TOC definition. x_scnlen is the size of the
5294 TOC entry. */
5295 next = symbol_next (sym);
96d56e9f 5296 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5297 next = symbol_next (next);
5298 if (next == (symbolS *) NULL
96d56e9f 5299 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5300 {
5301 if (ppc_after_toc_frag == (fragS *) NULL)
5302 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5303 data_section)
5304 - S_GET_VALUE (sym));
5305 else
5306 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5307 - S_GET_VALUE (sym));
5308 }
5309 else
5310 {
6386f3a7 5311 resolve_symbol_value (next);
252b5132
RH		 5312 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5313 - S_GET_VALUE (sym));
5314 }
5315 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5316 }
5317 else
5318 {
5319 symbolS *csect;
5320
5321 /* This is a normal symbol definition. x_scnlen is the
5322 symbol index of the containing csect. */
5323 if (S_GET_SEGMENT (sym) == text_section)
5324 csect = ppc_text_csects;
5325 else if (S_GET_SEGMENT (sym) == data_section)
5326 csect = ppc_data_csects;
5327 else
5328 abort ();
5329
5330 /* Skip the initial dummy symbol. */
809ffe0d 5331 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5332
5333 if (csect == (symbolS *) NULL)
5334 {
5335 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5336 a->x_csect.x_scnlen.l = 0;
5337 }
5338 else
5339 {
809ffe0d 5340 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5341 {
6386f3a7 5342 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5343 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5344 > S_GET_VALUE (sym))
252b5132 5345 break;
809ffe0d 5346 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5347 }
5348
809ffe0d
ILT		 5349 a->x_csect.x_scnlen.p =
5350 coffsymbol (symbol_get_bfdsym (csect))->native;
5351 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5352 1;
252b5132
RH		 5353 }
5354 a->x_csect.x_smtyp = XTY_LD;
5355 }
81d4177b 5356
252b5132
RH		 5357 a->x_csect.x_parmhash = 0;
5358 a->x_csect.x_snhash = 0;
96d56e9f 5359 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5360 a->x_csect.x_smclas = XMC_PR;
5361 else
96d56e9f 5362 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5363 a->x_csect.x_stab = 0;
5364 a->x_csect.x_snstab = 0;
5365
5366 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5367 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5368 }
5369 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5370 {
5371 /* We want the value to be the symbol index of the referenced
5372 csect symbol. BFD will do that for us if we set the right
5373 flags. */
b782de16
AM		 5374 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5375 combined_entry_type *c = coffsymbol (bsym)->native;
5376
5377 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5378 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5379 }
5380 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5381 {
5382 symbolS *block;
5383 symbolS *csect;
5384
5385 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5386 block = symbol_get_tc (sym)->within;
5387 csect = symbol_get_tc (block)->within;
6386f3a7 5388 resolve_symbol_value (csect);
252b5132
RH		 5389 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5390 }
5391 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5392 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5393 {
5394 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5395 BFD will do that for us if we set the right flags. We have
5396 already set the value correctly. */
809ffe0d 5397 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5398 }
5399
5400 return 0;
5401}
5402
5403/* Adjust the symbol table. This creates csect symbols for all
5404 absolute symbols. */
5405
5406void
98027b10 5407ppc_adjust_symtab (void)
252b5132
RH		 5408{
5409 symbolS *sym;
5410
5411 if (! ppc_saw_abs)
5412 return;
5413
5414 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5415 {
5416 symbolS *csect;
5417 int i;
5418 union internal_auxent *a;
5419
5420 if (S_GET_SEGMENT (sym) != absolute_section)
5421 continue;
5422
5423 csect = symbol_create (".abs[XO]", absolute_section,
5424 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5425 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5426 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5427 i = S_GET_NUMBER_AUXILIARY (csect);
5428 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5429 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5430 a->x_csect.x_scnlen.l = 0;
5431 a->x_csect.x_smtyp = XTY_SD;
5432 a->x_csect.x_parmhash = 0;
5433 a->x_csect.x_snhash = 0;
5434 a->x_csect.x_smclas = XMC_XO;
5435 a->x_csect.x_stab = 0;
5436 a->x_csect.x_snstab = 0;
5437
5438 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5439
5440 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5441 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5442 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5443 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5444 }
5445
b34976b6 5446 ppc_saw_abs = FALSE;
252b5132
RH		 5447}
5448
5449/* Set the VMA for a section. This is called on all the sections in
5450 turn. */
5451
5452void
98027b10 5453ppc_frob_section (asection *sec)
252b5132 5454{
931e13a6 5455 static bfd_vma vma = 0;
252b5132 5456
931e13a6 5457 vma = md_section_align (sec, vma);
252b5132
RH		 5458 bfd_set_section_vma (stdoutput, sec, vma);
5459 vma += bfd_section_size (stdoutput, sec);
5460}
5461
5462#endif /* OBJ_XCOFF */
5463\f
252b5132 5464char *
98027b10 5465md_atof (int type, char *litp, int *sizep)
252b5132 5466{
499ac353 5467 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5468}
5469
5470/* Write a value out to the object file, using the appropriate
5471 endianness. */
5472
5473void
98027b10 5474md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5475{
5476 if (target_big_endian)
5477 number_to_chars_bigendian (buf, val, n);
5478 else
5479 number_to_chars_littleendian (buf, val, n);
5480}
5481
5482/* Align a section (I don't know why this is machine dependent). */
5483
5484valueT
3aeeedbb 5485md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5486{
3aeeedbb
AM		 5487#ifdef OBJ_ELF
5488 return addr;
5489#else
252b5132
RH		 5490 int align = bfd_get_section_alignment (stdoutput, seg);
5491
5492 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5493#endif
252b5132
RH		 5494}
5495
5496/* We don't have any form of relaxing. */
5497
5498int
98027b10
AM		 5499md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5500 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5501{
5502 abort ();
5503 return 0;
5504}
5505
5506/* Convert a machine dependent frag. We never generate these. */
5507
5508void
98027b10
AM		 5509md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5510 asection *sec ATTRIBUTE_UNUSED,
5511 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5512{
5513 abort ();
5514}
5515
5516/* We have no need to default values of symbols. */
5517
252b5132 5518symbolS *
98027b10 5519md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5520{
5521 return 0;
5522}
5523\f
5524/* Functions concerning relocs. */
5525
5526/* The location from which a PC relative jump should be calculated,
5527 given a PC relative reloc. */
5528
5529long
98027b10 5530md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5531{
5532 return fixp->fx_frag->fr_address + fixp->fx_where;
5533}
5534
5535#ifdef OBJ_XCOFF
5536
5537/* This is called to see whether a fixup should be adjusted to use a
5538 section symbol. We take the opportunity to change a fixup against
5539 a symbol in the TOC subsegment into a reloc against the
5540 corresponding .tc symbol. */
5541
5542int
98027b10 5543ppc_fix_adjustable (fixS *fix)
252b5132 5544{
b782de16
AM		 5545 valueT val = resolve_symbol_value (fix->fx_addsy);
5546 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5547 TC_SYMFIELD_TYPE *tc;
5548
5549 if (symseg == absolute_section)
5550 return 0;
252b5132 5551
252b5132 5552 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5553 && fix->fx_addsy != ppc_toc_csect
b782de16 5554 && symseg == data_section
252b5132
RH		 5555 && val >= ppc_toc_frag->fr_address
5556 && (ppc_after_toc_frag == (fragS *) NULL
5557 || val < ppc_after_toc_frag->fr_address))
5558 {
5559 symbolS *sy;
5560
5561 for (sy = symbol_next (ppc_toc_csect);
5562 sy != (symbolS *) NULL;
5563 sy = symbol_next (sy))
5564 {
b782de16
AM		 5565 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5566
96d56e9f 5567 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5568 continue;
96d56e9f 5569 if (sy_tc->symbol_class != XMC_TC)
252b5132 5570 break;
b782de16 5571 if (val == resolve_symbol_value (sy))
252b5132
RH		 5572 {
5573 fix->fx_addsy = sy;
5574 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5575 return 0;
5576 }
5577 }
5578
5579 as_bad_where (fix->fx_file, fix->fx_line,
5580 _("symbol in .toc does not match any .tc"));
5581 }
5582
5583 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5584 tc = symbol_get_tc (fix->fx_addsy);
5585 if (tc->subseg == 0
96d56e9f
NC		 5586 && tc->symbol_class != XMC_TC0
5587 && tc->symbol_class != XMC_TC
b782de16 5588 && symseg != bss_section
252b5132 5589 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5590 && (symseg != data_section
252b5132
RH		 5591 || ppc_toc_csect == NULL
5592 || val < ppc_toc_frag->fr_address
5593 || (ppc_after_toc_frag != NULL
5594 && val >= ppc_after_toc_frag->fr_address)))
5595 {
5596 symbolS *csect;
b782de16 5597 symbolS *next_csect;
252b5132 5598
b782de16 5599 if (symseg == text_section)
252b5132 5600 csect = ppc_text_csects;
b782de16 5601 else if (symseg == data_section)
252b5132
RH		 5602 csect = ppc_data_csects;
5603 else
5604 abort ();
5605
5606 /* Skip the initial dummy symbol. */
809ffe0d 5607 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5608
5609 if (csect != (symbolS *) NULL)
5610 {
b782de16
AM		 5611 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5612 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5613 {
5614 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5615 have to look through the full symbol table to see
5616 whether this is the csect we want. Note that we will
5617 only get here if the csect has zero length. */
b782de16
AM		 5618 if (symbol_get_frag (csect)->fr_address == val
5619 && S_GET_VALUE (csect) == val)
252b5132
RH		 5620 {
5621 symbolS *scan;
5622
809ffe0d 5623 for (scan = symbol_next (csect);
252b5132 5624 scan != NULL;
809ffe0d 5625 scan = symbol_next (scan))
252b5132 5626 {
809ffe0d 5627 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5628 break;
5629 if (scan == fix->fx_addsy)
5630 break;
5631 }
5632
5633 /* If we found the symbol before the next csect
99a814a1 5634 symbol, then this is the csect we want. */
252b5132
RH		 5635 if (scan == fix->fx_addsy)
5636 break;
5637 }
5638
b782de16 5639 csect = next_csect;
252b5132
RH		 5640 }
5641
b782de16 5642 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5643 fix->fx_addsy = csect;
5644 }
b782de16 5645 return 0;
252b5132
RH		 5646 }
5647
5648 /* Adjust a reloc against a .lcomm symbol to be against the base
5649 .lcomm. */
b782de16 5650 if (symseg == bss_section
252b5132
RH		 5651 && ! S_IS_EXTERNAL (fix->fx_addsy))
5652 {
b782de16
AM		 5653 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5654
5655 fix->fx_offset += val - resolve_symbol_value (sy);
5656 fix->fx_addsy = sy;
252b5132
RH		 5657 }
5658
5659 return 0;
5660}
5661
5662/* A reloc from one csect to another must be kept. The assembler
5663 will, of course, keep relocs between sections, and it will keep
5664 absolute relocs, but we need to force it to keep PC relative relocs
5665 between two csects in the same section. */
5666
5667int
98027b10 5668ppc_force_relocation (fixS *fix)
252b5132
RH		 5669{
5670 /* At this point fix->fx_addsy should already have been converted to
5671 a csect symbol. If the csect does not include the fragment, then
5672 we need to force the relocation. */
5673 if (fix->fx_pcrel
5674 && fix->fx_addsy != NULL
809ffe0d
ILT		 5675 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5676 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5677 > fix->fx_frag->fr_address)
5678 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5679 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5680 <= fix->fx_frag->fr_address))))
5681 return 1;
5682
ae6063d4 5683 return generic_force_reloc (fix);
252b5132
RH		 5684}
5685
5686#endif /* OBJ_XCOFF */
5687
0baf16f2 5688#ifdef OBJ_ELF
a161fe53
AM		 5689/* If this function returns non-zero, it guarantees that a relocation
5690 will be emitted for a fixup. */
5691
5692int
98027b10 5693ppc_force_relocation (fixS *fix)
a161fe53
AM		 5694{
5695 /* Branch prediction relocations must force a relocation, as must
5696 the vtable description relocs. */
5697 switch (fix->fx_r_type)
5698 {
5699 case BFD_RELOC_PPC_B16_BRTAKEN:
5700 case BFD_RELOC_PPC_B16_BRNTAKEN:
5701 case BFD_RELOC_PPC_BA16_BRTAKEN:
5702 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5703 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5704 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5705 return 1;
5706 default:
5707 break;
5708 }
5709
cdba85ec
AM		 5710 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5711 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5712 return 1;
5713
ae6063d4 5714 return generic_force_reloc (fix);
a161fe53
AM		 5715}
5716
0baf16f2 5717int
98027b10 5718ppc_fix_adjustable (fixS *fix)
252b5132 5719{
0baf16f2
AM		 5720 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5721 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5722 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5723 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5724 && fix->fx_r_type != BFD_RELOC_GPREL16
5725 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5726 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5727 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5728 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5729}
0baf16f2 5730#endif
252b5132 5731
3aeeedbb
AM		 5732/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5733 rs_align_code frag. */
5734
5735void
5736ppc_handle_align (struct frag *fragP)
5737{
5738 valueT count = (fragP->fr_next->fr_address
5739 - (fragP->fr_address + fragP->fr_fix));
5740
5741 if (count != 0 && (count & 3) == 0)
5742 {
5743 char *dest = fragP->fr_literal + fragP->fr_fix;
5744
5745 fragP->fr_var = 4;
5746 md_number_to_chars (dest, 0x60000000, 4);
5747
42240548
PB		 5748 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5749 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 5750 {
42240548
PB		 5751 /* For power6 and power7, we want the last nop to be a group
5752 terminating one. Do this by inserting an rs_fill frag immediately
5753 after this one, with its address set to the last nop location.
5754 This will automatically reduce the number of nops in the current
5755 frag by one. */
3aeeedbb
AM		 5756 if (count > 4)
5757 {
5758 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5759
5760 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5761 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5762 group_nop->fr_fix = 0;
5763 group_nop->fr_offset = 1;
5764 group_nop->fr_type = rs_fill;
5765 fragP->fr_next = group_nop;
5766 dest = group_nop->fr_literal;
5767 }
5768
42240548
PB		 5769 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
5770 /* power7 group terminating nop: "ori 2,2,0". */
5771 md_number_to_chars (dest, 0x60420000, 4);
5772 else
5773 /* power6 group terminating nop: "ori 1,1,0". */
5774 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 5775 }
5776 }
5777}
5778
252b5132
RH		 5779/* Apply a fixup to the object code. This is called for all the
5780 fixups we generated by the call to fix_new_exp, above. In the call
5781 above we used a reloc code which was the largest legal reloc code
5782 plus the operand index. Here we undo that to recover the operand
5783 index. At this point all symbol values should be fully resolved,
5784 and we attempt to completely resolve the reloc. If we can not do
5785 that, we determine the correct reloc code and put it back in the
5786 fixup. */
5787
94f592af 5788void
98027b10 5789md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5790{
94f592af 5791 valueT value = * valP;
252b5132
RH		 5792
5793#ifdef OBJ_ELF
94f592af 5794 if (fixP->fx_addsy != NULL)
252b5132 5795 {
a161fe53 5796 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5797 if (fixP->fx_pcrel)
5798 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5799 }
5800 else
94f592af 5801 fixP->fx_done = 1;
252b5132 5802#else
a161fe53 5803 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5804 the symbol values. If we are doing this relocation the code in
5805 write.c is going to call bfd_install_relocation, which is also
5806 going to use the symbol value. That means that if the reloc is
5807 fully resolved we want to use *valP since bfd_install_relocation is
5808 not being used.
9f0eb232
RS		 5809 However, if the reloc is not fully resolved we do not want to
5810 use *valP, and must use fx_offset instead. If the relocation
5811 is PC-relative, we then need to re-apply md_pcrel_from_section
5812 to this new relocation value. */
94f592af
NC		 5813 if (fixP->fx_addsy == (symbolS *) NULL)
5814 fixP->fx_done = 1;
5815
252b5132 5816 else
9f0eb232
RS		 5817 {
5818 value = fixP->fx_offset;
5819 if (fixP->fx_pcrel)
5820 value -= md_pcrel_from_section (fixP, seg);
5821 }
a161fe53
AM		 5822#endif
5823
5824 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5825 {
a161fe53
AM		 5826 /* We can't actually support subtracting a symbol. */
5827 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5828 }
252b5132 5829
94f592af 5830 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5831 {
5832 int opindex;
5833 const struct powerpc_operand *operand;
5834 char *where;
5835 unsigned long insn;
5836
94f592af 5837 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5838
5839 operand = &powerpc_operands[opindex];
5840
5841#ifdef OBJ_XCOFF
0baf16f2
AM		 5842 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5843 does not generate a reloc. It uses the offset of `sym' within its
5844 csect. Other usages, such as `.long sym', generate relocs. This
5845 is the documented behaviour of non-TOC symbols. */
252b5132 5846 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5847 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5848 && operand->shift == 0
2b3c4602 5849 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5850 && fixP->fx_addsy != NULL
5851 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 5852 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
5853 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 5854 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5855 {
94f592af
NC		 5856 value = fixP->fx_offset;
5857 fixP->fx_done = 1;
252b5132
RH		 5858 }
5859#endif
5860
5861 /* Fetch the instruction, insert the fully resolved operand
5862 value, and stuff the instruction back again. */
94f592af 5863 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5864 if (target_big_endian)
5865 insn = bfd_getb32 ((unsigned char *) where);
5866 else
5867 insn = bfd_getl32 ((unsigned char *) where);
5868 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5869 fixP->tc_fix_data.ppc_cpu,
94f592af 5870 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5871 if (target_big_endian)
5872 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5873 else
5874 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5875
94f592af
NC		 5876 if (fixP->fx_done)
5877 /* Nothing else to do here. */
5878 return;
252b5132 5879
9c2799c2 5880 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 5881
252b5132
RH		 5882 /* Determine a BFD reloc value based on the operand information.
5883 We are only prepared to turn a few of the operands into
0baf16f2 5884 relocs. */
11b37b7b 5885 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5886 && operand->bitm == 0x3fffffc
11b37b7b 5887 && operand->shift == 0)
94f592af 5888 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5889 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5890 && operand->bitm == 0xfffc
11b37b7b 5891 && operand->shift == 0)
95210096
AM		 5892 {
5893 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5894#ifdef OBJ_XCOFF
5895 fixP->fx_size = 2;
5896 if (target_big_endian)
5897 fixP->fx_where += 2;
5898#endif
5899 }
11b37b7b 5900 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5901 && operand->bitm == 0x3fffffc
11b37b7b 5902 && operand->shift == 0)
94f592af 5903 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5904 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5905 && operand->bitm == 0xfffc
11b37b7b 5906 && operand->shift == 0)
95210096
AM		 5907 {
5908 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5909#ifdef OBJ_XCOFF
5910 fixP->fx_size = 2;
5911 if (target_big_endian)
5912 fixP->fx_where += 2;
5913#endif
5914 }
0baf16f2 5915#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5916 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5917 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5918 && operand->shift == 0)
11b37b7b 5919 {
a7fc733f
AM		 5920 if (ppc_is_toc_sym (fixP->fx_addsy))
5921 {
5922 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5923#ifdef OBJ_ELF
a7fc733f
AM		 5924 if (ppc_obj64
5925 && (operand->flags & PPC_OPERAND_DS) != 0)
5926 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5927#endif
5928 }
5929 else
5930 {
5931 fixP->fx_r_type = BFD_RELOC_16;
5932#ifdef OBJ_ELF
5933 if (ppc_obj64
5934 && (operand->flags & PPC_OPERAND_DS) != 0)
5935 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5936#endif
a7fc733f 5937 }
94f592af 5938 fixP->fx_size = 2;
11b37b7b 5939 if (target_big_endian)
94f592af 5940 fixP->fx_where += 2;
11b37b7b 5941 }
0baf16f2 5942#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5943 else
252b5132
RH		 5944 {
5945 char *sfile;
5946 unsigned int sline;
5947
5948 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5949 symbol. */
94f592af
NC		 5950 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5951 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5952 _("unresolved expression that must be resolved"));
5953 else
94f592af 5954 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5955 _("unsupported relocation against %s"),
94f592af
NC		 5956 S_GET_NAME (fixP->fx_addsy));
5957 fixP->fx_done = 1;
5958 return;
252b5132
RH		 5959 }
5960 }
5961 else
5962 {
5963#ifdef OBJ_ELF
94f592af 5964 ppc_elf_validate_fix (fixP, seg);
252b5132 5965#endif
94f592af 5966 switch (fixP->fx_r_type)
252b5132 5967 {
252b5132 5968 case BFD_RELOC_CTOR:
2b3c4602 5969 if (ppc_obj64)
9c7977b3
AM		 5970 goto ctor64;
5971 /* fall through */
5972
0baf16f2 5973 case BFD_RELOC_32:
94f592af
NC		 5974 if (fixP->fx_pcrel)
5975 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5976 /* fall through */
252b5132
RH		 5977
5978 case BFD_RELOC_RVA:
5979 case BFD_RELOC_32_PCREL:
252b5132 5980 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5981 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5982 value, 4);
5983 break;
5984
7f6d05e8 5985 case BFD_RELOC_64:
9c7977b3 5986 ctor64:
94f592af
NC		 5987 if (fixP->fx_pcrel)
5988 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5989 /* fall through */
0baf16f2 5990
7f6d05e8 5991 case BFD_RELOC_64_PCREL:
94f592af 5992 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5993 value, 8);
81d4177b 5994 break;
0baf16f2 5995
252b5132
RH		 5996 case BFD_RELOC_GPREL16:
5997 case BFD_RELOC_16_GOT_PCREL:
5998 case BFD_RELOC_16_GOTOFF:
5999 case BFD_RELOC_LO16_GOTOFF:
6000 case BFD_RELOC_HI16_GOTOFF:
6001 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 6002 case BFD_RELOC_16_BASEREL:
252b5132
RH		 6003 case BFD_RELOC_LO16_BASEREL:
6004 case BFD_RELOC_HI16_BASEREL:
6005 case BFD_RELOC_HI16_S_BASEREL:
6006 case BFD_RELOC_PPC_EMB_NADDR16:
6007 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6008 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6009 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6010 case BFD_RELOC_PPC_EMB_SDAI16:
6011 case BFD_RELOC_PPC_EMB_SDA2REL:
6012 case BFD_RELOC_PPC_EMB_SDA2I16:
6013 case BFD_RELOC_PPC_EMB_RELSEC16:
6014 case BFD_RELOC_PPC_EMB_RELST_LO:
6015 case BFD_RELOC_PPC_EMB_RELST_HI:
6016 case BFD_RELOC_PPC_EMB_RELST_HA:
6017 case BFD_RELOC_PPC_EMB_RELSDA:
6018 case BFD_RELOC_PPC_TOC16:
0baf16f2 6019#ifdef OBJ_ELF
0baf16f2
AM		 6020 case BFD_RELOC_PPC64_TOC16_LO:
6021 case BFD_RELOC_PPC64_TOC16_HI:
6022 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 6023#endif
94f592af 6024 if (fixP->fx_pcrel)
252b5132 6025 {
94f592af
NC		 6026 if (fixP->fx_addsy != NULL)
6027 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6028 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 6029 bfd_get_reloc_code_name (fixP->fx_r_type),
6030 S_GET_NAME (fixP->fx_addsy));
252b5132 6031 else
94f592af 6032 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6033 _("cannot emit PC relative %s relocation"),
94f592af 6034 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 6035 }
6036
94f592af 6037 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6038 value, 2);
6039 break;
6040
3c9d25f4
AM		 6041 case BFD_RELOC_16:
6042 if (fixP->fx_pcrel)
6043 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6044 /* fall through */
6045
6046 case BFD_RELOC_16_PCREL:
6047 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6048 value, 2);
6049 break;
6050
6051 case BFD_RELOC_LO16:
6052 if (fixP->fx_pcrel)
6053 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6054 /* fall through */
6055
6056 case BFD_RELOC_LO16_PCREL:
6057 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6058 value, 2);
6059 break;
6060
252b5132
RH		 6061 /* This case happens when you write, for example,
6062 lis %r3,(L1-L2)@ha
6063 where L1 and L2 are defined later. */
6064 case BFD_RELOC_HI16:
94f592af 6065 if (fixP->fx_pcrel)
3c9d25f4
AM		 6066 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6067 /* fall through */
6068
6069 case BFD_RELOC_HI16_PCREL:
94f592af 6070 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6071 PPC_HI (value), 2);
252b5132 6072 break;
0baf16f2 6073
252b5132 6074 case BFD_RELOC_HI16_S:
94f592af 6075 if (fixP->fx_pcrel)
3c9d25f4
AM		 6076 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6077 /* fall through */
6078
6079 case BFD_RELOC_HI16_S_PCREL:
94f592af 6080 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6081 PPC_HA (value), 2);
6082 break;
6083
c865e45b
RS		 6084#ifdef OBJ_XCOFF
6085 case BFD_RELOC_NONE:
6086 break;
6087#endif
6088
0baf16f2 6089#ifdef OBJ_ELF
0baf16f2 6090 case BFD_RELOC_PPC64_HIGHER:
94f592af 6091 if (fixP->fx_pcrel)
0baf16f2 6092 abort ();
94f592af 6093 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6094 PPC_HIGHER (value), 2);
252b5132
RH		 6095 break;
6096
0baf16f2 6097 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6098 if (fixP->fx_pcrel)
0baf16f2 6099 abort ();
94f592af 6100 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6101 PPC_HIGHERA (value), 2);
6102 break;
6103
6104 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6105 if (fixP->fx_pcrel)
0baf16f2 6106 abort ();
94f592af 6107 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6108 PPC_HIGHEST (value), 2);
6109 break;
6110
6111 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6112 if (fixP->fx_pcrel)
0baf16f2 6113 abort ();
94f592af 6114 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6115 PPC_HIGHESTA (value), 2);
6116 break;
6117
6118 case BFD_RELOC_PPC64_ADDR16_DS:
6119 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6120 case BFD_RELOC_PPC64_GOT16_DS:
6121 case BFD_RELOC_PPC64_GOT16_LO_DS:
6122 case BFD_RELOC_PPC64_PLT16_LO_DS:
6123 case BFD_RELOC_PPC64_SECTOFF_DS:
6124 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6125 case BFD_RELOC_PPC64_TOC16_DS:
6126 case BFD_RELOC_PPC64_TOC16_LO_DS:
6127 case BFD_RELOC_PPC64_PLTGOT16_DS:
6128 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6129 if (fixP->fx_pcrel)
0baf16f2
AM		 6130 abort ();
6131 {
2132e3a3 6132 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6133 unsigned long val, mask;
0baf16f2
AM		 6134
6135 if (target_big_endian)
adadcc0c 6136 val = bfd_getb32 (where - 2);
0baf16f2 6137 else
adadcc0c
AM		 6138 val = bfd_getl32 (where);
6139 mask = 0xfffc;
6140 /* lq insns reserve the four lsbs. */
6141 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6142 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6143 mask = 0xfff0;
6144 val |= value & mask;
0baf16f2
AM		 6145 if (target_big_endian)
6146 bfd_putb16 ((bfd_vma) val, where);
6147 else
6148 bfd_putl16 ((bfd_vma) val, where);
6149 }
6150 break;
cdba85ec 6151
ba0b2174
AM		 6152 case BFD_RELOC_PPC_B16_BRTAKEN:
6153 case BFD_RELOC_PPC_B16_BRNTAKEN:
6154 case BFD_RELOC_PPC_BA16_BRTAKEN:
6155 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6156 break;
6157
cdba85ec 6158 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6159 case BFD_RELOC_PPC_TLSGD:
6160 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6161 break;
6162
cdba85ec
AM		 6163 case BFD_RELOC_PPC_DTPMOD:
6164 case BFD_RELOC_PPC_TPREL16:
6165 case BFD_RELOC_PPC_TPREL16_LO:
6166 case BFD_RELOC_PPC_TPREL16_HI:
6167 case BFD_RELOC_PPC_TPREL16_HA:
6168 case BFD_RELOC_PPC_TPREL:
6169 case BFD_RELOC_PPC_DTPREL16:
6170 case BFD_RELOC_PPC_DTPREL16_LO:
6171 case BFD_RELOC_PPC_DTPREL16_HI:
6172 case BFD_RELOC_PPC_DTPREL16_HA:
6173 case BFD_RELOC_PPC_DTPREL:
6174 case BFD_RELOC_PPC_GOT_TLSGD16:
6175 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6176 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6177 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6178 case BFD_RELOC_PPC_GOT_TLSLD16:
6179 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6180 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6181 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6182 case BFD_RELOC_PPC_GOT_TPREL16:
6183 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6184 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6185 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6186 case BFD_RELOC_PPC_GOT_DTPREL16:
6187 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6188 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6189 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6190 case BFD_RELOC_PPC64_TPREL16_DS:
6191 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6192 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6193 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6194 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6195 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6196 case BFD_RELOC_PPC64_DTPREL16_DS:
6197 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6198 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6199 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6200 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6201 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6202 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6203 break;
0baf16f2 6204#endif
252b5132 6205 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6206 bytes, rather than 2, so offset it here appropriately. */
252b5132 6207 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6208 if (fixP->fx_pcrel)
252b5132
RH		 6209 abort ();
6210
94f592af 6211 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6212 + ((target_big_endian) ? 2 : 0),
6213 value, 2);
6214 break;
6215
6216 case BFD_RELOC_8:
94f592af 6217 if (fixP->fx_pcrel)
31a91399
NC		 6218 {
6219 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6220 ".byte <undefined_symbol> - ." */
31a91399
NC		 6221 if (fixP->fx_addsy)
6222 as_bad (_("Unable to handle reference to symbol %s"),
6223 S_GET_NAME (fixP->fx_addsy));
6224 else
6225 as_bad (_("Unable to resolve expression"));
6226 fixP->fx_done = 1;
6227 }
6228 else
6229 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6230 value, 1);
252b5132
RH		 6231 break;
6232
6233 case BFD_RELOC_24_PLT_PCREL:
6234 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6235 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6236 abort ();
6237
94f592af 6238 if (fixP->fx_done)
99a814a1
AM		 6239 {
6240 char *where;
6241 unsigned long insn;
6242
6243 /* Fetch the instruction, insert the fully resolved operand
6244 value, and stuff the instruction back again. */
94f592af 6245 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6246 if (target_big_endian)
6247 insn = bfd_getb32 ((unsigned char *) where);
6248 else
6249 insn = bfd_getl32 ((unsigned char *) where);
6250 if ((value & 3) != 0)
94f592af 6251 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6252 _("must branch to an address a multiple of 4"));
6253 if ((offsetT) value < -0x40000000
6254 || (offsetT) value >= 0x40000000)
94f592af 6255 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6256 _("@local or @plt branch destination is too far away, %ld bytes"),
6257 (long) value);
6258 insn = insn | (value & 0x03fffffc);
6259 if (target_big_endian)
6260 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6261 else
6262 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6263 }
252b5132
RH		 6264 break;
6265
6266 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6267 fixP->fx_done = 0;
6268 if (fixP->fx_addsy
6269 && !S_IS_DEFINED (fixP->fx_addsy)
6270 && !S_IS_WEAK (fixP->fx_addsy))
6271 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6272 break;
6273
6274 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6275 fixP->fx_done = 0;
252b5132
RH		 6276 break;
6277
0baf16f2 6278#ifdef OBJ_ELF
0baf16f2
AM		 6279 /* Generated by reference to `sym@tocbase'. The sym is
6280 ignored by the linker. */
6281 case BFD_RELOC_PPC64_TOC:
94f592af 6282 fixP->fx_done = 0;
0baf16f2 6283 break;
0baf16f2 6284#endif
252b5132 6285 default:
bc805888 6286 fprintf (stderr,
94f592af 6287 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6288 fflush (stderr);
252b5132
RH		 6289 abort ();
6290 }
6291 }
6292
6293#ifdef OBJ_ELF
94f592af 6294 fixP->fx_addnumber = value;
4e6935a6
AM		 6295
6296 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6297 from the section contents. If we are going to be emitting a reloc
6298 then the section contents are immaterial, so don't warn if they
6299 happen to overflow. Leave such warnings to ld. */
6300 if (!fixP->fx_done)
6301 fixP->fx_no_overflow = 1;
252b5132 6302#else
94f592af
NC		 6303 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6304 fixP->fx_addnumber = 0;
252b5132
RH		 6305 else
6306 {
6307#ifdef TE_PE
94f592af 6308 fixP->fx_addnumber = 0;
252b5132 6309#else
8edcbfcd
TG		 6310 /* We want to use the offset within the toc, not the actual VMA
6311 of the symbol. */
94f592af 6312 fixP->fx_addnumber =
8edcbfcd
TG		 6313 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6314 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6315#endif
6316 }
6317#endif
252b5132
RH		 6318}
6319
6320/* Generate a reloc for a fixup. */
6321
6322arelent *
98027b10 6323tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6324{
6325 arelent *reloc;
6326
6327 reloc = (arelent *) xmalloc (sizeof (arelent));
6328
49309057
ILT		 6329 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6330 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6331 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6332 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6333 if (reloc->howto == (reloc_howto_type *) NULL)
6334 {
6335 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6336 _("reloc %d not supported by object file format"),
6337 (int) fixp->fx_r_type);
252b5132
RH		 6338 return NULL;
6339 }
6340 reloc->addend = fixp->fx_addnumber;
6341
6342 return reloc;
6343}
75e21f08
JJ		 6344
6345void
98027b10 6346ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6347{
6348 cfi_add_CFA_def_cfa (1, 0);
6349}
6350
6351int
1df69f4f 6352tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6353{
6354 unsigned int regnum = -1;
6355 unsigned int i;
6356 const char *p;
6357 char *q;
6358 static struct { char *name; int dw2regnum; } regnames[] =
6359 {
6360 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6361 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6362 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6363 { "spe_acc", 111 }, { "spefscr", 112 }
6364 };
6365
6366 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6367 if (strcmp (regnames[i].name, regname) == 0)
6368 return regnames[i].dw2regnum;
6369
6370 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6371 {
6372 p = regname + 1 + (regname[1] == '.');
6373 regnum = strtoul (p, &q, 10);
6374 if (p == q || *q || regnum >= 32)
6375 return -1;
6376 if (regname[0] == 'f')
b7d7dc63 6377 regnum += 32;
75e21f08 6378 else if (regname[0] == 'v')
b7d7dc63 6379 regnum += 77;
75e21f08
JJ		 6380 }
6381 else if (regname[0] == 'c' && regname[1] == 'r')
6382 {
6383 p = regname + 2 + (regname[2] == '.');
6384 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6385 return -1;
75e21f08
JJ		 6386 regnum = p[0] - '0' + 68;
6387 }
6388 return regnum;
6389}
GDB Binutils - Deliverables
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