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[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
6f2750fe 2 Copyright (C) 1994-2016 Free Software Foundation, Inc.
252b5132
RH		 3 Written by Ian Lance Taylor, Cygnus Support.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
ec2655a6 9 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
252b5132 21
252b5132 22#include "as.h"
3882b010 23#include "safe-ctype.h"
252b5132 24#include "subsegs.h"
75e21f08 25#include "dw2gencfi.h"
252b5132
RH		 26#include "opcode/ppc.h"
27
28#ifdef OBJ_ELF
29#include "elf/ppc.h"
ee67d69a 30#include "elf/ppc64.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
85645aed
TG		 38#ifdef OBJ_XCOFF
39#include "coff/xcoff.h"
40#include "libxcoff.h"
41#endif
42
252b5132
RH		 43/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
44
45/* Tell the main code what the endianness is. */
46extern int target_big_endian;
47
48/* Whether or not, we've set target_big_endian. */
49static int set_target_endian = 0;
50
51/* Whether to use user friendly register names. */
52#ifndef TARGET_REG_NAMES_P
53#ifdef TE_PE
b34976b6 54#define TARGET_REG_NAMES_P TRUE
252b5132 55#else
b34976b6 56#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 57#endif
58#endif
59
0baf16f2
AM		 60/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
61 HIGHESTA. */
62
63/* #lo(value) denotes the least significant 16 bits of the indicated. */
64#define PPC_LO(v) ((v) & 0xffff)
65
66/* #hi(value) denotes bits 16 through 31 of the indicated value. */
67#define PPC_HI(v) (((v) >> 16) & 0xffff)
68
69/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
71 signed number. */
15c1449b 72#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 73
74/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 75#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 76
77/* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
15c1449b 79#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 80
81/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 82#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 83
84/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 85 compensating for #lo being treated as a signed number. */
86#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2 87
f9c6b907
AM		 88#define SEX16(val) (((val) ^ 0x8000) - 0x8000)
89
90/* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92#define REPORT_OVERFLOW_HI 0
0baf16f2 93
b34976b6 94static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 95
98027b10
AM		 96static void ppc_macro (char *, const struct powerpc_macro *);
97static void ppc_byte (int);
0baf16f2
AM		 98
99#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 100static void ppc_tc (int);
101static void ppc_machine (int);
0baf16f2 102#endif
252b5132
RH		 103
104#ifdef OBJ_XCOFF
98027b10
AM		 105static void ppc_comm (int);
106static void ppc_bb (int);
107static void ppc_bc (int);
108static void ppc_bf (int);
109static void ppc_biei (int);
110static void ppc_bs (int);
111static void ppc_eb (int);
112static void ppc_ec (int);
113static void ppc_ef (int);
114static void ppc_es (int);
115static void ppc_csect (int);
85645aed 116static void ppc_dwsect (int);
98027b10
AM		 117static void ppc_change_csect (symbolS *, offsetT);
118static void ppc_function (int);
119static void ppc_extern (int);
120static void ppc_lglobl (int);
c865e45b 121static void ppc_ref (int);
98027b10
AM		 122static void ppc_section (int);
123static void ppc_named_section (int);
124static void ppc_stabx (int);
125static void ppc_rename (int);
126static void ppc_toc (int);
127static void ppc_xcoff_cons (int);
128static void ppc_vbyte (int);
252b5132
RH		 129#endif
130
131#ifdef OBJ_ELF
98027b10
AM		 132static void ppc_elf_rdata (int);
133static void ppc_elf_lcomm (int);
6911b7dc 134static void ppc_elf_localentry (int);
ee67d69a 135static void ppc_elf_abiversion (int);
252b5132
RH		 136#endif
137
138#ifdef TE_PE
98027b10
AM		 139static void ppc_previous (int);
140static void ppc_pdata (int);
141static void ppc_ydata (int);
142static void ppc_reldata (int);
143static void ppc_rdata (int);
144static void ppc_ualong (int);
145static void ppc_znop (int);
146static void ppc_pe_comm (int);
147static void ppc_pe_section (int);
148static void ppc_pe_function (int);
149static void ppc_pe_tocd (int);
252b5132
RH		 150#endif
151\f
152/* Generic assembler global variables which must be defined by all
153 targets. */
154
155#ifdef OBJ_ELF
156/* This string holds the chars that always start a comment. If the
157 pre-processor is disabled, these aren't very useful. The macro
158 tc_comment_chars points to this. We use this, rather than the
159 usual comment_chars, so that we can switch for Solaris conventions. */
160static const char ppc_solaris_comment_chars[] = "#!";
161static const char ppc_eabi_comment_chars[] = "#";
162
163#ifdef TARGET_SOLARIS_COMMENT
164const char *ppc_comment_chars = ppc_solaris_comment_chars;
165#else
166const char *ppc_comment_chars = ppc_eabi_comment_chars;
167#endif
168#else
169const char comment_chars[] = "#";
170#endif
171
172/* Characters which start a comment at the beginning of a line. */
173const char line_comment_chars[] = "#";
174
175/* Characters which may be used to separate multiple commands on a
176 single line. */
177const char line_separator_chars[] = ";";
178
179/* Characters which are used to indicate an exponent in a floating
180 point number. */
181const char EXP_CHARS[] = "eE";
182
183/* Characters which mean that a number is a floating point constant,
184 as in 0d1.0. */
185const char FLT_CHARS[] = "dD";
5ce8663f 186
5e02f92e 187/* Anything that can start an operand needs to be mentioned here,
ac805826 188 to stop the input scrubber eating whitespace. */
5e02f92e 189const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 190
191/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
192int ppc_cie_data_alignment;
783de163 193
8fbf7334
JL		 194/* The dwarf2 minimum instruction length. */
195int ppc_dwarf2_line_min_insn_length;
196
cef4f754
AM		 197/* More than this number of nops in an alignment op gets a branch
198 instead. */
199unsigned long nop_limit = 4;
200
783de163
AM		 201/* The type of processor we are assembling for. This is one or more
202 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 203ppc_cpu_t ppc_cpu = 0;
776fc418 204ppc_cpu_t sticky = 0;
01efc3af 205
ee67d69a
AM		 206/* Value for ELF e_flags EF_PPC64_ABI. */
207unsigned int ppc_abiversion = 0;
208
01efc3af
AM		 209/* Flags set on encountering toc relocs. */
210enum {
211 has_large_toc_reloc = 1,
212 has_small_toc_reloc = 2
213} toc_reloc_types;
bf7279d5
AM		 214
215/* Warn on emitting data to code sections. */
216int warn_476;
217unsigned long last_insn;
218segT last_seg;
219subsegT last_subseg;
252b5132
RH		 220\f
221/* The target specific pseudo-ops which we support. */
222
223const pseudo_typeS md_pseudo_table[] =
224{
225 /* Pseudo-ops which must be overridden. */
226 { "byte", ppc_byte, 0 },
227
228#ifdef OBJ_XCOFF
229 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
230 legitimately belong in the obj-*.c file. However, XCOFF is based
231 on COFF, and is only implemented for the RS/6000. We just use
232 obj-coff.c, and add what we need here. */
233 { "comm", ppc_comm, 0 },
234 { "lcomm", ppc_comm, 1 },
235 { "bb", ppc_bb, 0 },
236 { "bc", ppc_bc, 0 },
237 { "bf", ppc_bf, 0 },
238 { "bi", ppc_biei, 0 },
239 { "bs", ppc_bs, 0 },
240 { "csect", ppc_csect, 0 },
85645aed 241 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 242 { "data", ppc_section, 'd' },
243 { "eb", ppc_eb, 0 },
244 { "ec", ppc_ec, 0 },
245 { "ef", ppc_ef, 0 },
246 { "ei", ppc_biei, 1 },
247 { "es", ppc_es, 0 },
248 { "extern", ppc_extern, 0 },
249 { "function", ppc_function, 0 },
250 { "lglobl", ppc_lglobl, 0 },
c865e45b 251 { "ref", ppc_ref, 0 },
252b5132
RH		 252 { "rename", ppc_rename, 0 },
253 { "section", ppc_named_section, 0 },
254 { "stabx", ppc_stabx, 0 },
255 { "text", ppc_section, 't' },
256 { "toc", ppc_toc, 0 },
257 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 258 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 259 { "word", ppc_xcoff_cons, 1 },
260 { "short", ppc_xcoff_cons, 1 },
261 { "vbyte", ppc_vbyte, 0 },
262#endif
263
264#ifdef OBJ_ELF
62ebcb5c 265 { "llong", cons, 8 },
252b5132
RH		 266 { "rdata", ppc_elf_rdata, 0 },
267 { "rodata", ppc_elf_rdata, 0 },
268 { "lcomm", ppc_elf_lcomm, 0 },
6911b7dc 269 { "localentry", ppc_elf_localentry, 0 },
ee67d69a 270 { "abiversion", ppc_elf_abiversion, 0 },
252b5132
RH		 271#endif
272
273#ifdef TE_PE
99a814a1 274 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 275 { "previous", ppc_previous, 0 },
276 { "pdata", ppc_pdata, 0 },
277 { "ydata", ppc_ydata, 0 },
278 { "reldata", ppc_reldata, 0 },
279 { "rdata", ppc_rdata, 0 },
280 { "ualong", ppc_ualong, 0 },
281 { "znop", ppc_znop, 0 },
282 { "comm", ppc_pe_comm, 0 },
283 { "lcomm", ppc_pe_comm, 1 },
284 { "section", ppc_pe_section, 0 },
285 { "function", ppc_pe_function,0 },
286 { "tocd", ppc_pe_tocd, 0 },
287#endif
288
0baf16f2 289#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 290 { "tc", ppc_tc, 0 },
0baf16f2
AM		 291 { "machine", ppc_machine, 0 },
292#endif
252b5132
RH		 293
294 { NULL, NULL, 0 }
295};
296
297\f
99a814a1
AM		 298/* Predefined register names if -mregnames (or default for Windows NT).
299 In general, there are lots of them, in an attempt to be compatible
300 with a number of other Windows NT assemblers. */
252b5132
RH		 301
302/* Structure to hold information about predefined registers. */
303struct pd_reg
304 {
e0471c16 305 const char *name;
252b5132
RH		 306 int value;
307 };
308
309/* List of registers that are pre-defined:
310
311 Each general register has predefined names of the form:
312 1. r<reg_num> which has the value <reg_num>.
313 2. r.<reg_num> which has the value <reg_num>.
314
252b5132
RH		 315 Each floating point register has predefined names of the form:
316 1. f<reg_num> which has the value <reg_num>.
317 2. f.<reg_num> which has the value <reg_num>.
318
7a899fff
C		 319 Each vector unit register has predefined names of the form:
320 1. v<reg_num> which has the value <reg_num>.
321 2. v.<reg_num> which has the value <reg_num>.
322
252b5132
RH		 323 Each condition register has predefined names of the form:
324 1. cr<reg_num> which has the value <reg_num>.
325 2. cr.<reg_num> which has the value <reg_num>.
326
327 There are individual registers as well:
328 sp or r.sp has the value 1
329 rtoc or r.toc has the value 2
330 fpscr has the value 0
331 xer has the value 1
332 lr has the value 8
333 ctr has the value 9
334 pmr has the value 0
335 dar has the value 19
336 dsisr has the value 18
337 dec has the value 22
338 sdr1 has the value 25
339 srr0 has the value 26
340 srr1 has the value 27
341
81d4177b 342 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 343
344static const struct pd_reg pre_defined_registers[] =
345{
346 { "cr.0", 0 }, /* Condition Registers */
347 { "cr.1", 1 },
348 { "cr.2", 2 },
349 { "cr.3", 3 },
350 { "cr.4", 4 },
351 { "cr.5", 5 },
352 { "cr.6", 6 },
353 { "cr.7", 7 },
354
355 { "cr0", 0 },
356 { "cr1", 1 },
357 { "cr2", 2 },
358 { "cr3", 3 },
359 { "cr4", 4 },
360 { "cr5", 5 },
361 { "cr6", 6 },
362 { "cr7", 7 },
363
364 { "ctr", 9 },
365
366 { "dar", 19 }, /* Data Access Register */
367 { "dec", 22 }, /* Decrementer */
368 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
369
370 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 371 { "f.1", 1 },
372 { "f.10", 10 },
373 { "f.11", 11 },
374 { "f.12", 12 },
375 { "f.13", 13 },
376 { "f.14", 14 },
377 { "f.15", 15 },
378 { "f.16", 16 },
379 { "f.17", 17 },
380 { "f.18", 18 },
381 { "f.19", 19 },
382 { "f.2", 2 },
383 { "f.20", 20 },
384 { "f.21", 21 },
385 { "f.22", 22 },
386 { "f.23", 23 },
387 { "f.24", 24 },
388 { "f.25", 25 },
389 { "f.26", 26 },
390 { "f.27", 27 },
391 { "f.28", 28 },
392 { "f.29", 29 },
393 { "f.3", 3 },
252b5132
RH		 394 { "f.30", 30 },
395 { "f.31", 31 },
066be9f7
PB		 396
397 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
398 { "f.33", 33 },
399 { "f.34", 34 },
400 { "f.35", 35 },
401 { "f.36", 36 },
402 { "f.37", 37 },
403 { "f.38", 38 },
404 { "f.39", 39 },
81d4177b 405 { "f.4", 4 },
066be9f7
PB		 406 { "f.40", 40 },
407 { "f.41", 41 },
408 { "f.42", 42 },
409 { "f.43", 43 },
410 { "f.44", 44 },
411 { "f.45", 45 },
412 { "f.46", 46 },
413 { "f.47", 47 },
414 { "f.48", 48 },
415 { "f.49", 49 },
81d4177b 416 { "f.5", 5 },
066be9f7
PB		 417 { "f.50", 50 },
418 { "f.51", 51 },
419 { "f.52", 52 },
420 { "f.53", 53 },
421 { "f.54", 54 },
422 { "f.55", 55 },
423 { "f.56", 56 },
424 { "f.57", 57 },
425 { "f.58", 58 },
426 { "f.59", 59 },
81d4177b 427 { "f.6", 6 },
066be9f7
PB		 428 { "f.60", 60 },
429 { "f.61", 61 },
430 { "f.62", 62 },
431 { "f.63", 63 },
81d4177b
KH		 432 { "f.7", 7 },
433 { "f.8", 8 },
434 { "f.9", 9 },
435
436 { "f0", 0 },
437 { "f1", 1 },
438 { "f10", 10 },
439 { "f11", 11 },
440 { "f12", 12 },
441 { "f13", 13 },
442 { "f14", 14 },
443 { "f15", 15 },
444 { "f16", 16 },
445 { "f17", 17 },
446 { "f18", 18 },
447 { "f19", 19 },
448 { "f2", 2 },
449 { "f20", 20 },
450 { "f21", 21 },
451 { "f22", 22 },
452 { "f23", 23 },
453 { "f24", 24 },
454 { "f25", 25 },
455 { "f26", 26 },
456 { "f27", 27 },
457 { "f28", 28 },
458 { "f29", 29 },
459 { "f3", 3 },
252b5132
RH		 460 { "f30", 30 },
461 { "f31", 31 },
066be9f7
PB		 462
463 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
464 { "f33", 33 },
465 { "f34", 34 },
466 { "f35", 35 },
467 { "f36", 36 },
468 { "f37", 37 },
469 { "f38", 38 },
470 { "f39", 39 },
81d4177b 471 { "f4", 4 },
066be9f7
PB		 472 { "f40", 40 },
473 { "f41", 41 },
474 { "f42", 42 },
475 { "f43", 43 },
476 { "f44", 44 },
477 { "f45", 45 },
478 { "f46", 46 },
479 { "f47", 47 },
480 { "f48", 48 },
481 { "f49", 49 },
81d4177b 482 { "f5", 5 },
066be9f7
PB		 483 { "f50", 50 },
484 { "f51", 51 },
485 { "f52", 52 },
486 { "f53", 53 },
487 { "f54", 54 },
488 { "f55", 55 },
489 { "f56", 56 },
490 { "f57", 57 },
491 { "f58", 58 },
492 { "f59", 59 },
81d4177b 493 { "f6", 6 },
066be9f7
PB		 494 { "f60", 60 },
495 { "f61", 61 },
496 { "f62", 62 },
497 { "f63", 63 },
81d4177b
KH		 498 { "f7", 7 },
499 { "f8", 8 },
500 { "f9", 9 },
252b5132
RH		 501
502 { "fpscr", 0 },
503
c3d65c1c
BE		 504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0 },
506 { "gqr.1", 1 },
507 { "gqr.2", 2 },
508 { "gqr.3", 3 },
509 { "gqr.4", 4 },
510 { "gqr.5", 5 },
511 { "gqr.6", 6 },
512 { "gqr.7", 7 },
513 { "gqr0", 0 },
514 { "gqr1", 1 },
515 { "gqr2", 2 },
516 { "gqr3", 3 },
517 { "gqr4", 4 },
518 { "gqr5", 5 },
519 { "gqr6", 6 },
520 { "gqr7", 7 },
521
252b5132
RH		 522 { "lr", 8 }, /* Link Register */
523
524 { "pmr", 0 },
525
526 { "r.0", 0 }, /* General Purpose Registers */
527 { "r.1", 1 },
528 { "r.10", 10 },
529 { "r.11", 11 },
530 { "r.12", 12 },
531 { "r.13", 13 },
532 { "r.14", 14 },
533 { "r.15", 15 },
534 { "r.16", 16 },
535 { "r.17", 17 },
536 { "r.18", 18 },
537 { "r.19", 19 },
538 { "r.2", 2 },
539 { "r.20", 20 },
540 { "r.21", 21 },
541 { "r.22", 22 },
542 { "r.23", 23 },
543 { "r.24", 24 },
544 { "r.25", 25 },
545 { "r.26", 26 },
546 { "r.27", 27 },
547 { "r.28", 28 },
548 { "r.29", 29 },
549 { "r.3", 3 },
550 { "r.30", 30 },
551 { "r.31", 31 },
552 { "r.4", 4 },
553 { "r.5", 5 },
554 { "r.6", 6 },
555 { "r.7", 7 },
556 { "r.8", 8 },
557 { "r.9", 9 },
558
559 { "r.sp", 1 }, /* Stack Pointer */
560
561 { "r.toc", 2 }, /* Pointer to the table of contents */
562
563 { "r0", 0 }, /* More general purpose registers */
564 { "r1", 1 },
565 { "r10", 10 },
566 { "r11", 11 },
567 { "r12", 12 },
568 { "r13", 13 },
569 { "r14", 14 },
570 { "r15", 15 },
571 { "r16", 16 },
572 { "r17", 17 },
573 { "r18", 18 },
574 { "r19", 19 },
575 { "r2", 2 },
576 { "r20", 20 },
577 { "r21", 21 },
578 { "r22", 22 },
579 { "r23", 23 },
580 { "r24", 24 },
581 { "r25", 25 },
582 { "r26", 26 },
583 { "r27", 27 },
584 { "r28", 28 },
585 { "r29", 29 },
586 { "r3", 3 },
587 { "r30", 30 },
588 { "r31", 31 },
589 { "r4", 4 },
590 { "r5", 5 },
591 { "r6", 6 },
592 { "r7", 7 },
593 { "r8", 8 },
594 { "r9", 9 },
595
596 { "rtoc", 2 }, /* Table of contents */
597
598 { "sdr1", 25 }, /* Storage Description Register 1 */
599
600 { "sp", 1 },
601
602 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
603 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 604
066be9f7 605 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 606 { "v.1", 1 },
607 { "v.10", 10 },
608 { "v.11", 11 },
609 { "v.12", 12 },
610 { "v.13", 13 },
611 { "v.14", 14 },
612 { "v.15", 15 },
613 { "v.16", 16 },
614 { "v.17", 17 },
615 { "v.18", 18 },
616 { "v.19", 19 },
617 { "v.2", 2 },
618 { "v.20", 20 },
619 { "v.21", 21 },
620 { "v.22", 22 },
621 { "v.23", 23 },
622 { "v.24", 24 },
623 { "v.25", 25 },
624 { "v.26", 26 },
625 { "v.27", 27 },
626 { "v.28", 28 },
627 { "v.29", 29 },
628 { "v.3", 3 },
7a899fff
C		 629 { "v.30", 30 },
630 { "v.31", 31 },
81d4177b
KH		 631 { "v.4", 4 },
632 { "v.5", 5 },
633 { "v.6", 6 },
634 { "v.7", 7 },
635 { "v.8", 8 },
636 { "v.9", 9 },
7a899fff
C		 637
638 { "v0", 0 },
81d4177b
KH		 639 { "v1", 1 },
640 { "v10", 10 },
641 { "v11", 11 },
642 { "v12", 12 },
643 { "v13", 13 },
644 { "v14", 14 },
645 { "v15", 15 },
646 { "v16", 16 },
647 { "v17", 17 },
648 { "v18", 18 },
649 { "v19", 19 },
650 { "v2", 2 },
651 { "v20", 20 },
652 { "v21", 21 },
653 { "v22", 22 },
654 { "v23", 23 },
655 { "v24", 24 },
656 { "v25", 25 },
657 { "v26", 26 },
658 { "v27", 27 },
659 { "v28", 28 },
660 { "v29", 29 },
661 { "v3", 3 },
7a899fff
C		 662 { "v30", 30 },
663 { "v31", 31 },
81d4177b
KH		 664 { "v4", 4 },
665 { "v5", 5 },
666 { "v6", 6 },
667 { "v7", 7 },
668 { "v8", 8 },
7a899fff 669 { "v9", 9 },
252b5132 670
066be9f7
PB		 671 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.1", 1 },
673 { "vs.10", 10 },
674 { "vs.11", 11 },
675 { "vs.12", 12 },
676 { "vs.13", 13 },
677 { "vs.14", 14 },
678 { "vs.15", 15 },
679 { "vs.16", 16 },
680 { "vs.17", 17 },
681 { "vs.18", 18 },
682 { "vs.19", 19 },
683 { "vs.2", 2 },
684 { "vs.20", 20 },
685 { "vs.21", 21 },
686 { "vs.22", 22 },
687 { "vs.23", 23 },
688 { "vs.24", 24 },
689 { "vs.25", 25 },
690 { "vs.26", 26 },
691 { "vs.27", 27 },
692 { "vs.28", 28 },
693 { "vs.29", 29 },
694 { "vs.3", 3 },
695 { "vs.30", 30 },
696 { "vs.31", 31 },
697 { "vs.32", 32 },
698 { "vs.33", 33 },
699 { "vs.34", 34 },
700 { "vs.35", 35 },
701 { "vs.36", 36 },
702 { "vs.37", 37 },
703 { "vs.38", 38 },
704 { "vs.39", 39 },
705 { "vs.4", 4 },
706 { "vs.40", 40 },
707 { "vs.41", 41 },
708 { "vs.42", 42 },
709 { "vs.43", 43 },
710 { "vs.44", 44 },
711 { "vs.45", 45 },
712 { "vs.46", 46 },
713 { "vs.47", 47 },
714 { "vs.48", 48 },
715 { "vs.49", 49 },
716 { "vs.5", 5 },
717 { "vs.50", 50 },
718 { "vs.51", 51 },
719 { "vs.52", 52 },
720 { "vs.53", 53 },
721 { "vs.54", 54 },
722 { "vs.55", 55 },
723 { "vs.56", 56 },
724 { "vs.57", 57 },
725 { "vs.58", 58 },
726 { "vs.59", 59 },
727 { "vs.6", 6 },
728 { "vs.60", 60 },
729 { "vs.61", 61 },
730 { "vs.62", 62 },
731 { "vs.63", 63 },
732 { "vs.7", 7 },
733 { "vs.8", 8 },
734 { "vs.9", 9 },
735
736 { "vs0", 0 },
737 { "vs1", 1 },
738 { "vs10", 10 },
739 { "vs11", 11 },
740 { "vs12", 12 },
741 { "vs13", 13 },
742 { "vs14", 14 },
743 { "vs15", 15 },
744 { "vs16", 16 },
745 { "vs17", 17 },
746 { "vs18", 18 },
747 { "vs19", 19 },
748 { "vs2", 2 },
749 { "vs20", 20 },
750 { "vs21", 21 },
751 { "vs22", 22 },
752 { "vs23", 23 },
753 { "vs24", 24 },
754 { "vs25", 25 },
755 { "vs26", 26 },
756 { "vs27", 27 },
757 { "vs28", 28 },
758 { "vs29", 29 },
759 { "vs3", 3 },
760 { "vs30", 30 },
761 { "vs31", 31 },
762 { "vs32", 32 },
763 { "vs33", 33 },
764 { "vs34", 34 },
765 { "vs35", 35 },
766 { "vs36", 36 },
767 { "vs37", 37 },
768 { "vs38", 38 },
769 { "vs39", 39 },
770 { "vs4", 4 },
771 { "vs40", 40 },
772 { "vs41", 41 },
773 { "vs42", 42 },
774 { "vs43", 43 },
775 { "vs44", 44 },
776 { "vs45", 45 },
777 { "vs46", 46 },
778 { "vs47", 47 },
779 { "vs48", 48 },
780 { "vs49", 49 },
781 { "vs5", 5 },
782 { "vs50", 50 },
783 { "vs51", 51 },
784 { "vs52", 52 },
785 { "vs53", 53 },
786 { "vs54", 54 },
787 { "vs55", 55 },
788 { "vs56", 56 },
789 { "vs57", 57 },
790 { "vs58", 58 },
791 { "vs59", 59 },
792 { "vs6", 6 },
793 { "vs60", 60 },
794 { "vs61", 61 },
795 { "vs62", 62 },
796 { "vs63", 63 },
797 { "vs7", 7 },
798 { "vs8", 8 },
799 { "vs9", 9 },
800
252b5132
RH		 801 { "xer", 1 },
802
803};
804
bc805888 805#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 806
807/* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
809
252b5132 810static int
98027b10 811reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 812{
813 int middle, low, high;
814 int cmp;
815
816 low = 0;
817 high = regcount - 1;
818
819 do
820 {
821 middle = (low + high) / 2;
822 cmp = strcasecmp (name, regs[middle].name);
823 if (cmp < 0)
824 high = middle - 1;
825 else if (cmp > 0)
826 low = middle + 1;
827 else
828 return regs[middle].value;
829 }
830 while (low <= high);
831
832 return -1;
833}
834
835/*
99a814a1 836 * Summary of register_name.
252b5132
RH		 837 *
838 * in: Input_line_pointer points to 1st char of operand.
839 *
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
844 * original state.
845 */
846
b34976b6 847static bfd_boolean
98027b10 848register_name (expressionS *expressionP)
252b5132
RH		 849{
850 int reg_number;
851 char *name;
852 char *start;
853 char c;
854
99a814a1 855 /* Find the spelling of the operand. */
252b5132 856 start = name = input_line_pointer;
3882b010 857 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 858 name = ++input_line_pointer;
859
3882b010 860 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 861 return FALSE;
252b5132 862
d02603dc 863 c = get_symbol_name (&name);
252b5132
RH		 864 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
865
468cced8
AM		 866 /* Put back the delimiting char. */
867 *input_line_pointer = c;
868
99a814a1 869 /* Look to see if it's in the register table. */
81d4177b 870 if (reg_number >= 0)
252b5132
RH		 871 {
872 expressionP->X_op = O_register;
873 expressionP->X_add_number = reg_number;
81d4177b 874
99a814a1 875 /* Make the rest nice. */
252b5132
RH		 876 expressionP->X_add_symbol = NULL;
877 expressionP->X_op_symbol = NULL;
b34976b6 878 return TRUE;
252b5132 879 }
468cced8
AM		 880
881 /* Reset the line as if we had not done anything. */
882 input_line_pointer = start;
b34976b6 883 return FALSE;
252b5132
RH		 884}
885\f
886/* This function is called for each symbol seen in an expression. It
887 handles the special parsing which PowerPC assemblers are supposed
888 to use for condition codes. */
889
890/* Whether to do the special parsing. */
b34976b6 891static bfd_boolean cr_operand;
252b5132
RH		 892
893/* Names to recognize in a condition code. This table is sorted. */
894static const struct pd_reg cr_names[] =
895{
896 { "cr0", 0 },
897 { "cr1", 1 },
898 { "cr2", 2 },
899 { "cr3", 3 },
900 { "cr4", 4 },
901 { "cr5", 5 },
902 { "cr6", 6 },
903 { "cr7", 7 },
904 { "eq", 2 },
905 { "gt", 1 },
906 { "lt", 0 },
907 { "so", 3 },
908 { "un", 3 }
909};
910
911/* Parsing function. This returns non-zero if it recognized an
912 expression. */
913
914int
91d6fa6a 915ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 916{
917 int val;
918
919 if (! cr_operand)
920 return 0;
921
13abbae3
AM		 922 if (*name == '%')
923 ++name;
252b5132
RH		 924 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
925 name);
926 if (val < 0)
927 return 0;
928
91d6fa6a
NC		 929 exp->X_op = O_constant;
930 exp->X_add_number = val;
252b5132
RH		 931
932 return 1;
933}
934\f
935/* Local variables. */
936
2b3c4602
AM		 937/* Whether to target xcoff64/elf64. */
938static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 939
252b5132
RH		 940/* Opcode hash table. */
941static struct hash_control *ppc_hash;
942
943/* Macro hash table. */
944static struct hash_control *ppc_macro_hash;
945
946#ifdef OBJ_ELF
99a814a1 947/* What type of shared library support to use. */
5d6f4f16 948static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 949
99a814a1 950/* Flags to set in the elf header. */
252b5132
RH		 951static flagword ppc_flags = 0;
952
953/* Whether this is Solaris or not. */
954#ifdef TARGET_SOLARIS_COMMENT
b34976b6 955#define SOLARIS_P TRUE
252b5132 956#else
b34976b6 957#define SOLARIS_P FALSE
252b5132
RH		 958#endif
959
b34976b6 960static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 961#endif
962
963#ifdef OBJ_XCOFF
964
965/* The RS/6000 assembler uses the .csect pseudo-op to generate code
966 using a bunch of different sections. These assembler sections,
967 however, are all encompassed within the .text or .data sections of
968 the final output file. We handle this by using different
969 subsegments within these main segments. */
970
971/* Next subsegment to allocate within the .text segment. */
972static subsegT ppc_text_subsegment = 2;
973
974/* Linked list of csects in the text section. */
975static symbolS *ppc_text_csects;
976
977/* Next subsegment to allocate within the .data segment. */
978static subsegT ppc_data_subsegment = 2;
979
980/* Linked list of csects in the data section. */
981static symbolS *ppc_data_csects;
982
983/* The current csect. */
984static symbolS *ppc_current_csect;
985
986/* The RS/6000 assembler uses a TOC which holds addresses of functions
987 and variables. Symbols are put in the TOC with the .tc pseudo-op.
988 A special relocation is used when accessing TOC entries. We handle
989 the TOC as a subsegment within the .data segment. We set it up if
990 we see a .toc pseudo-op, and save the csect symbol here. */
991static symbolS *ppc_toc_csect;
992
993/* The first frag in the TOC subsegment. */
994static fragS *ppc_toc_frag;
995
996/* The first frag in the first subsegment after the TOC in the .data
997 segment. NULL if there are no subsegments after the TOC. */
998static fragS *ppc_after_toc_frag;
999
1000/* The current static block. */
1001static symbolS *ppc_current_block;
1002
1003/* The COFF debugging section; set by md_begin. This is not the
1004 .debug section, but is instead the secret BFD section which will
1005 cause BFD to set the section number of a symbol to N_DEBUG. */
1006static asection *ppc_coff_debug_section;
1007
85645aed
TG		 1008/* Structure to set the length field of the dwarf sections. */
1009struct dw_subsection {
1010 /* Subsections are simply linked. */
1011 struct dw_subsection *link;
1012
1013 /* The subsection number. */
1014 subsegT subseg;
1015
1016 /* Expression to compute the length of the section. */
1017 expressionS end_exp;
1018};
1019
1020static struct dw_section {
1021 /* Corresponding section. */
1022 segT sect;
1023
1024 /* Simply linked list of subsections with a label. */
1025 struct dw_subsection *list_subseg;
1026
1027 /* The anonymous subsection. */
1028 struct dw_subsection *anon_subseg;
1029} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1030#endif /* OBJ_XCOFF */
1031
1032#ifdef TE_PE
1033
1034/* Various sections that we need for PE coff support. */
1035static segT ydata_section;
1036static segT pdata_section;
1037static segT reldata_section;
1038static segT rdata_section;
1039static segT tocdata_section;
1040
81d4177b 1041/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1042static segT ppc_previous_section;
1043static segT ppc_current_section;
1044
1045#endif /* TE_PE */
1046
1047#ifdef OBJ_ELF
1048symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1049#define PPC_APUINFO_ISEL 0x40
1050#define PPC_APUINFO_PMR 0x41
1051#define PPC_APUINFO_RFMCI 0x42
1052#define PPC_APUINFO_CACHELCK 0x43
1053#define PPC_APUINFO_SPE 0x100
1054#define PPC_APUINFO_EFS 0x101
1055#define PPC_APUINFO_BRLOCK 0x102
b9c361e0 1056#define PPC_APUINFO_VLE 0x104
6a0c61b7 1057
b34976b6
AM		 1058/*
1059 * We keep a list of APUinfo
6a0c61b7
EZ		 1060 */
1061unsigned long *ppc_apuinfo_list;
1062unsigned int ppc_apuinfo_num;
1063unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1064#endif /* OBJ_ELF */
1065\f
1066#ifdef OBJ_ELF
15c1449b 1067const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1068#else
15c1449b 1069const char *const md_shortopts = "um:";
252b5132 1070#endif
cef4f754 1071#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1072const struct option md_longopts[] = {
cef4f754 1073 {"nops", required_argument, NULL, OPTION_NOPS},
bf7279d5
AM		 1074 {"ppc476-workaround", no_argument, &warn_476, 1},
1075 {"no-ppc476-workaround", no_argument, &warn_476, 0},
252b5132
RH		 1076 {NULL, no_argument, NULL, 0}
1077};
15c1449b 1078const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1079
1080int
17b9d67d 1081md_parse_option (int c, const char *arg)
252b5132 1082{
69fe9ce5
AM		 1083 ppc_cpu_t new_cpu;
1084
252b5132
RH		 1085 switch (c)
1086 {
1087 case 'u':
1088 /* -u means that any undefined symbols should be treated as
1089 external, which is the default for gas anyhow. */
1090 break;
1091
1092#ifdef OBJ_ELF
1093 case 'l':
1094 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1095 sake, recognize -be also. */
252b5132
RH		 1096 if (strcmp (arg, "e") == 0)
1097 {
1098 target_big_endian = 0;
1099 set_target_endian = 1;
b9c361e0 1100 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1101 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1102 }
1103 else
1104 return 0;
1105
1106 break;
1107
1108 case 'b':
1109 if (strcmp (arg, "e") == 0)
1110 {
1111 target_big_endian = 1;
1112 set_target_endian = 1;
1113 }
1114 else
1115 return 0;
1116
1117 break;
1118
1119 case 'K':
99a814a1 1120 /* Recognize -K PIC. */
252b5132
RH		 1121 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1122 {
1123 shlib = SHLIB_PIC;
1124 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1125 }
1126 else
1127 return 0;
1128
1129 break;
1130#endif
1131
7f6d05e8
CP		 1132 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1133 case 'a':
1134 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1135 {
1136#ifdef BFD64
1137 ppc_obj64 = 1;
d6ed37ed
AM		 1138 if (ppc_cpu & PPC_OPCODE_VLE)
1139 as_bad (_("the use of -mvle requires -a32."));
2a98c3a6
AM		 1140#else
1141 as_fatal (_("%s unsupported"), "-a64");
1142#endif
1143 }
7f6d05e8 1144 else if (strcmp (arg, "32") == 0)
2b3c4602 1145 ppc_obj64 = 0;
7f6d05e8
CP		 1146 else
1147 return 0;
1148 break;
81d4177b 1149
252b5132 1150 case 'm':
776fc418 1151 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
b9c361e0
JL		 1152 if (new_cpu != 0)
1153 {
1154 ppc_cpu = new_cpu;
d6ed37ed
AM		 1155 if (strcmp (arg, "vle") == 0)
1156 {
1157 if (set_target_endian && target_big_endian == 0)
1158 as_bad (_("the use of -mvle requires big endian."));
1159 if (ppc_obj64)
1160 as_bad (_("the use of -mvle requires -a32."));
1161 }
b9c361e0 1162 }
252b5132
RH		 1163
1164 else if (strcmp (arg, "regnames") == 0)
b34976b6 1165 reg_names_p = TRUE;
252b5132
RH		 1166
1167 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1168 reg_names_p = FALSE;
252b5132
RH		 1169
1170#ifdef OBJ_ELF
99a814a1
AM		 1171 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1172 that require relocation. */
252b5132
RH		 1173 else if (strcmp (arg, "relocatable") == 0)
1174 {
5d6f4f16 1175 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1176 ppc_flags |= EF_PPC_RELOCATABLE;
1177 }
1178
1179 else if (strcmp (arg, "relocatable-lib") == 0)
1180 {
5d6f4f16 1181 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1182 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1183 }
1184
99a814a1 1185 /* -memb, set embedded bit. */
252b5132
RH		 1186 else if (strcmp (arg, "emb") == 0)
1187 ppc_flags |= EF_PPC_EMB;
1188
cc643b88 1189 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1190 else if (strcmp (arg, "little") == 0
1191 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1192 {
1193 target_big_endian = 0;
1194 set_target_endian = 1;
b9c361e0 1195 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1196 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1197 }
1198
1199 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1200 {
1201 target_big_endian = 1;
1202 set_target_endian = 1;
1203 }
1204
1205 else if (strcmp (arg, "solaris") == 0)
1206 {
b34976b6 1207 msolaris = TRUE;
252b5132
RH		 1208 ppc_comment_chars = ppc_solaris_comment_chars;
1209 }
1210
1211 else if (strcmp (arg, "no-solaris") == 0)
1212 {
b34976b6 1213 msolaris = FALSE;
252b5132
RH		 1214 ppc_comment_chars = ppc_eabi_comment_chars;
1215 }
1216#endif
1217 else
1218 {
1219 as_bad (_("invalid switch -m%s"), arg);
1220 return 0;
1221 }
1222 break;
1223
1224#ifdef OBJ_ELF
1225 /* -V: SVR4 argument to print version ID. */
1226 case 'V':
1227 print_version_id ();
1228 break;
1229
1230 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1231 should be emitted or not. FIXME: Not implemented. */
1232 case 'Q':
1233 break;
1234
1235 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1236 rather than .stabs.excl, which is ignored by the linker.
1237 FIXME: Not implemented. */
1238 case 's':
1239 if (arg)
1240 return 0;
1241
1242 break;
1243#endif
1244
cef4f754
AM		 1245 case OPTION_NOPS:
1246 {
1247 char *end;
1248 nop_limit = strtoul (optarg, &end, 0);
1249 if (*end)
1250 as_bad (_("--nops needs a numeric argument"));
1251 }
1252 break;
85645aed 1253
bf7279d5
AM		 1254 case 0:
1255 break;
1256
252b5132
RH		 1257 default:
1258 return 0;
1259 }
1260
1261 return 1;
1262}
1263
1264void
98027b10 1265md_show_usage (FILE *stream)
252b5132 1266{
bc805888 1267 fprintf (stream, _("\
252b5132 1268PowerPC options:\n\
ce3d2015
AM		 1269-a32 generate ELF32/XCOFF32\n\
1270-a64 generate ELF64/XCOFF64\n\
1271-u ignored\n\
1272-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1273-mpwr generate code for POWER (RIOS1)\n\
1274-m601 generate code for PowerPC 601\n\
418c1742 1275-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1276 generate code for PowerPC 603/604\n\
1277-m403 generate code for PowerPC 403\n\
1278-m405 generate code for PowerPC 405\n\
1279-m440 generate code for PowerPC 440\n\
1280-m464 generate code for PowerPC 464\n\
1281-m476 generate code for PowerPC 476\n\
f5c120c5 1282-m7400, -m7410, -m7450, -m7455\n\
ce3d2015 1283 generate code for PowerPC 7400/7410/7450/7455\n\
ef5a96d5
AM		 1284-m750cl generate code for PowerPC 750cl\n\
1285-m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
df12615d 1286 fprintf (stream, _("\
ce3d2015
AM		 1287-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1288-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1289-mbooke generate code for 32-bit PowerPC BookE\n\
1290-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1291-mpower4, -mpwr4 generate code for Power4 architecture\n\
1292-mpower5, -mpwr5, -mpwr5x\n\
1293 generate code for Power5 architecture\n\
1294-mpower6, -mpwr6 generate code for Power6 architecture\n\
1295-mpower7, -mpwr7 generate code for Power7 architecture\n\
5817ffd1 1296-mpower8, -mpwr8 generate code for Power8 architecture\n\
a680de9a 1297-mpower9, -mpwr9 generate code for Power9 architecture\n\
ce3d2015
AM		 1298-mcell generate code for Cell Broadband Engine architecture\n\
1299-mcom generate code Power/PowerPC common instructions\n\
1300-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1301 fprintf (stream, _("\
ce3d2015
AM		 1302-maltivec generate code for AltiVec\n\
1303-mvsx generate code for Vector-Scalar (VSX) instructions\n\
5817ffd1 1304-mhtm generate code for Hardware Transactional Memory\n\
ce3d2015
AM		 1305-me300 generate code for PowerPC e300 family\n\
1306-me500, -me500x2 generate code for Motorola e500 core complex\n\
1307-me500mc, generate code for Freescale e500mc core complex\n\
1308-me500mc64, generate code for Freescale e500mc64 core complex\n\
aea77599
AM		 1309-me5500, generate code for Freescale e5500 core complex\n\
1310-me6500, generate code for Freescale e6500 core complex\n\
ce3d2015 1311-mspe generate code for Motorola SPE instructions\n\
b9c361e0 1312-mvle generate code for Freescale VLE instructions\n\
ce3d2015
AM		 1313-mtitan generate code for AppliedMicro Titan core complex\n\
1314-mregnames Allow symbolic names for registers\n\
1315-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1316#ifdef OBJ_ELF
bc805888 1317 fprintf (stream, _("\
ce3d2015
AM		 1318-mrelocatable support for GCC's -mrelocatble option\n\
1319-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1320-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1321-mlittle, -mlittle-endian, -le\n\
ce3d2015 1322 generate code for a little endian machine\n\
b8b738ac 1323-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1324 generate code for a big endian machine\n\
1325-msolaris generate code for Solaris\n\
1326-mno-solaris do not generate code for Solaris\n\
b8b738ac 1327-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1328-V print assembler version number\n\
1329-Qy, -Qn ignored\n"));
252b5132 1330#endif
cef4f754 1331 fprintf (stream, _("\
bf7279d5
AM		 1332-nops=count when aligning, more than COUNT nops uses a branch\n\
1333-ppc476-workaround warn if emitting data to code sections\n"));
252b5132
RH		 1334}
1335\f
1336/* Set ppc_cpu if it is not already set. */
1337
1338static void
98027b10 1339ppc_set_cpu (void)
252b5132
RH		 1340{
1341 const char *default_os = TARGET_OS;
1342 const char *default_cpu = TARGET_CPU;
1343
7102e95e 1344 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1345 {
2a98c3a6 1346 if (ppc_obj64)
bdc70b4a 1347 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1348 else if (strncmp (default_os, "aix", 3) == 0
1349 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1350 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1351 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1352 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1353 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1354 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1355 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1356 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1357 else
d6ed37ed 1358 as_fatal (_("unknown default cpu = %s, os = %s"),
99a814a1 1359 default_cpu, default_os);
252b5132
RH		 1360 }
1361}
1362
9232bbb0
AM		 1363/* Figure out the BFD architecture to use. This function and ppc_mach
1364 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1365
1366enum bfd_architecture
98027b10 1367ppc_arch (void)
252b5132
RH		 1368{
1369 const char *default_cpu = TARGET_CPU;
1370 ppc_set_cpu ();
1371
1372 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1373 return bfd_arch_powerpc;
b9c361e0
JL		 1374 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1375 return bfd_arch_powerpc;
1376 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
252b5132 1377 return bfd_arch_rs6000;
b9c361e0 1378 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
252b5132
RH		 1379 {
1380 if (strcmp (default_cpu, "rs6000") == 0)
1381 return bfd_arch_rs6000;
0baf16f2 1382 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1383 return bfd_arch_powerpc;
1384 }
1385
d6ed37ed 1386 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
252b5132
RH		 1387 return bfd_arch_unknown;
1388}
1389
7f6d05e8 1390unsigned long
98027b10 1391ppc_mach (void)
7f6d05e8 1392{
2a98c3a6
AM		 1393 if (ppc_obj64)
1394 return bfd_mach_ppc64;
1395 else if (ppc_arch () == bfd_arch_rs6000)
1396 return bfd_mach_rs6k;
ce3d2015
AM		 1397 else if (ppc_cpu & PPC_OPCODE_TITAN)
1398 return bfd_mach_ppc_titan;
b9c361e0
JL		 1399 else if (ppc_cpu & PPC_OPCODE_VLE)
1400 return bfd_mach_ppc_vle;
2a98c3a6
AM		 1401 else
1402 return bfd_mach_ppc;
7f6d05e8
CP		 1403}
1404
e0471c16 1405extern const char*
98027b10 1406ppc_target_format (void)
7f6d05e8
CP		 1407{
1408#ifdef OBJ_COFF
1409#ifdef TE_PE
99a814a1 1410 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1411#elif TE_POWERMAC
0baf16f2 1412 return "xcoff-powermac";
7f6d05e8 1413#else
eb1e0e80 1414# ifdef TE_AIX5
edc1d652 1415 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1416# else
edc1d652 1417 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1418# endif
7f6d05e8 1419#endif
7f6d05e8
CP		 1420#endif
1421#ifdef OBJ_ELF
edc1d652
AM		 1422# ifdef TE_FreeBSD
1423 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1424# elif defined (TE_VXWORKS)
9d8504b1
PB		 1425 return "elf32-powerpc-vxworks";
1426# else
0baf16f2 1427 return (target_big_endian
2b3c4602
AM		 1428 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1429 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1430# endif
7f6d05e8
CP		 1431#endif
1432}
1433
b9c361e0
JL		 1434/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1435 Return TRUE if there's a problem, otherwise FALSE. */
1436
1437static bfd_boolean
1438insn_validate (const struct powerpc_opcode *op)
1439{
1440 const unsigned char *o;
1441 unsigned long omask = op->mask;
1442
1443 /* The mask had better not trim off opcode bits. */
1444 if ((op->opcode & omask) != op->opcode)
1445 {
1446 as_bad (_("mask trims opcode bits for %s"), op->name);
1447 return TRUE;
1448 }
1449
1450 /* The operands must not overlap the opcode or each other. */
1451 for (o = op->operands; *o; ++o)
1452 {
1453 if (*o >= num_powerpc_operands)
1454 {
1455 as_bad (_("operand index error for %s"), op->name);
1456 return TRUE;
1457 }
1458 else
1459 {
1460 const struct powerpc_operand *operand = &powerpc_operands[*o];
b6518b38 1461 if (operand->shift != (int) PPC_OPSHIFT_INV)
b9c361e0
JL		 1462 {
1463 unsigned long mask;
1464
1465 if (operand->shift >= 0)
1466 mask = operand->bitm << operand->shift;
1467 else
1468 mask = operand->bitm >> -operand->shift;
1469 if (omask & mask)
1470 {
1471 as_bad (_("operand %d overlap in %s"),
1472 (int) (o - op->operands), op->name);
1473 return TRUE;
1474 }
1475 omask |= mask;
1476 }
1477 }
1478 }
1479 return FALSE;
1480}
1481
69c040df 1482/* Insert opcodes and macros into hash tables. Called at startup and
1fe532cf 1483 for .machine pseudo. */
252b5132 1484
69c040df
AM		 1485static void
1486ppc_setup_opcodes (void)
252b5132 1487{
98027b10 1488 const struct powerpc_opcode *op;
252b5132
RH		 1489 const struct powerpc_opcode *op_end;
1490 const struct powerpc_macro *macro;
1491 const struct powerpc_macro *macro_end;
b84bf58a 1492 bfd_boolean bad_insn = FALSE;
252b5132 1493
69c040df
AM		 1494 if (ppc_hash != NULL)
1495 hash_die (ppc_hash);
1496 if (ppc_macro_hash != NULL)
1497 hash_die (ppc_macro_hash);
252b5132
RH		 1498
1499 /* Insert the opcodes into a hash table. */
1500 ppc_hash = hash_new ();
1501
c43a438d 1502 if (ENABLE_CHECKING)
b84bf58a 1503 {
c43a438d 1504 unsigned int i;
b84bf58a 1505
3b8b57a9
AM		 1506 /* An index into powerpc_operands is stored in struct fix
1507 fx_pcrel_adjust which is 8 bits wide. */
1508 gas_assert (num_powerpc_operands < 256);
1509
c43a438d
AM		 1510 /* Check operand masks. Code here and in the disassembler assumes
1511 all the 1's in the mask are contiguous. */
1512 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1513 {
c43a438d
AM		 1514 unsigned long mask = powerpc_operands[i].bitm;
1515 unsigned long right_bit;
1516 unsigned int j;
1517
1518 right_bit = mask & -mask;
1519 mask += right_bit;
1520 right_bit = mask & -mask;
1521 if (mask != right_bit)
1522 {
1523 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1524 bad_insn = TRUE;
1525 }
1526 for (j = i + 1; j < num_powerpc_operands; ++j)
1527 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1528 sizeof (powerpc_operands[0])) == 0)
1529 {
1530 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1531 j, i);
1532 bad_insn = TRUE;
1533 }
b84bf58a
AM		 1534 }
1535 }
1536
252b5132
RH		 1537 op_end = powerpc_opcodes + powerpc_num_opcodes;
1538 for (op = powerpc_opcodes; op < op_end; op++)
1539 {
c43a438d 1540 if (ENABLE_CHECKING)
b84bf58a 1541 {
d815f1a9 1542 if (op != powerpc_opcodes)
8dbcd839 1543 {
b9c361e0
JL		 1544 int old_opcode = PPC_OP (op[-1].opcode);
1545 int new_opcode = PPC_OP (op[0].opcode);
1546
1547#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1548 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1549 op->name, (unsigned int) (op - powerpc_opcodes),
1550 (unsigned int) new_opcode, (unsigned int) op->opcode,
1551 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1552#endif
1553
d815f1a9
AM		 1554 /* The major opcodes had better be sorted. Code in the
1555 disassembler assumes the insns are sorted according to
1556 major opcode. */
b9c361e0 1557 if (new_opcode < old_opcode)
d815f1a9
AM		 1558 {
1559 as_bad (_("major opcode is not sorted for %s"),
1560 op->name);
1561 bad_insn = TRUE;
1562 }
8dbcd839 1563 }
b9c361e0
JL		 1564 bad_insn |= insn_validate (op);
1565 }
c43a438d 1566
b9c361e0
JL		 1567 if ((ppc_cpu & op->flags) != 0
1568 && !(ppc_cpu & op->deprecated))
1569 {
1570 const char *retval;
1571
1572 retval = hash_insert (ppc_hash, op->name, (void *) op);
1573 if (retval != NULL)
c43a438d 1574 {
b9c361e0 1575 as_bad (_("duplicate instruction %s"),
c43a438d
AM		 1576 op->name);
1577 bad_insn = TRUE;
1578 }
b9c361e0
JL		 1579 }
1580 }
c43a438d 1581
b9c361e0
JL		 1582 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1583 for (op = powerpc_opcodes; op < op_end; op++)
1584 hash_insert (ppc_hash, op->name, (void *) op);
1585
1586 op_end = vle_opcodes + vle_num_opcodes;
1587 for (op = vle_opcodes; op < op_end; op++)
1588 {
1589 if (ENABLE_CHECKING)
1590 {
1591 if (op != vle_opcodes)
1592 {
1593 unsigned old_seg, new_seg;
1594
1595 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1596 old_seg = VLE_OP_TO_SEG (old_seg);
1597 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1598 new_seg = VLE_OP_TO_SEG (new_seg);
1599
1600#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1601 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1602 op->name, (unsigned int) (op - powerpc_opcodes),
1603 (unsigned int) new_seg, (unsigned int) op->opcode,
1604 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1605#endif
1606 /* The major opcodes had better be sorted. Code in the
1607 disassembler assumes the insns are sorted according to
1608 major opcode. */
1609 if (new_seg < old_seg)
1610 {
1611 as_bad (_("major opcode is not sorted for %s"),
1612 op->name);
1613 bad_insn = TRUE;
1614 }
1615 }
1616
1617 bad_insn |= insn_validate (op);
c43a438d 1618 }
252b5132 1619
bdc70b4a 1620 if ((ppc_cpu & op->flags) != 0
1cb0a767 1621 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1622 {
1623 const char *retval;
1624
98027b10 1625 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1626 if (retval != NULL)
252b5132 1627 {
b84bf58a 1628 as_bad (_("duplicate instruction %s"),
99a814a1 1629 op->name);
b84bf58a 1630 bad_insn = TRUE;
252b5132
RH		 1631 }
1632 }
1633 }
1634
b9c361e0
JL		 1635 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1636 for (op = vle_opcodes; op < op_end; op++)
98027b10 1637 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1638
252b5132
RH		 1639 /* Insert the macros into a hash table. */
1640 ppc_macro_hash = hash_new ();
1641
1642 macro_end = powerpc_macros + powerpc_num_macros;
1643 for (macro = powerpc_macros; macro < macro_end; macro++)
1644 {
33740db9 1645 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1646 {
1647 const char *retval;
1648
98027b10 1649 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1650 if (retval != (const char *) NULL)
1651 {
b84bf58a
AM		 1652 as_bad (_("duplicate macro %s"), macro->name);
1653 bad_insn = TRUE;
252b5132
RH		 1654 }
1655 }
1656 }
1657
b84bf58a 1658 if (bad_insn)
252b5132 1659 abort ();
69c040df
AM		 1660}
1661
1662/* This function is called when the assembler starts up. It is called
1663 after the options have been parsed and the output file has been
1664 opened. */
1665
1666void
98027b10 1667md_begin (void)
69c040df
AM		 1668{
1669 ppc_set_cpu ();
1670
1671 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
8fbf7334 1672 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
69c040df
AM		 1673
1674#ifdef OBJ_ELF
1675 /* Set the ELF flags if desired. */
1676 if (ppc_flags && !msolaris)
1677 bfd_set_private_flags (stdoutput, ppc_flags);
1678#endif
1679
1680 ppc_setup_opcodes ();
252b5132 1681
67c1ffbe 1682 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1683 by the user. */
252b5132
RH		 1684 if (!set_target_endian)
1685 {
1686 set_target_endian = 1;
1687 target_big_endian = PPC_BIG_ENDIAN;
1688 }
1689
1690#ifdef OBJ_XCOFF
1691 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1692
1693 /* Create dummy symbols to serve as initial csects. This forces the
1694 text csects to precede the data csects. These symbols will not
1695 be output. */
1696 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1697 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1698 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1699 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1700#endif
1701
1702#ifdef TE_PE
1703
1704 ppc_current_section = text_section;
81d4177b 1705 ppc_previous_section = 0;
252b5132
RH		 1706
1707#endif
1708}
1709
6a0c61b7 1710void
98027b10 1711ppc_cleanup (void)
6a0c61b7 1712{
dc1d03fc 1713#ifdef OBJ_ELF
6a0c61b7
EZ		 1714 if (ppc_apuinfo_list == NULL)
1715 return;
1716
1717 /* Ok, so write the section info out. We have this layout:
1718
1719 byte data what
1720 ---- ---- ----
1721 0 8 length of "APUinfo\0"
1722 4 (n*4) number of APU's (4 bytes each)
1723 8 2 note type 2
1724 12 "APUinfo\0" name
1725 20 APU#1 first APU's info
1726 24 APU#2 second APU's info
1727 ... ...
1728 */
1729 {
1730 char *p;
1731 asection *seg = now_seg;
1732 subsegT subseg = now_subseg;
1733 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1734 unsigned int i;
6a0c61b7
EZ		 1735
1736 /* Create the .PPC.EMB.apuinfo section. */
1737 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1738 bfd_set_section_flags (stdoutput,
1739 apuinfo_secp,
e1a9cb8e 1740 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1741
1742 p = frag_more (4);
1743 md_number_to_chars (p, (valueT) 8, 4);
1744
1745 p = frag_more (4);
e98d298c 1746 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1747
1748 p = frag_more (4);
1749 md_number_to_chars (p, (valueT) 2, 4);
1750
1751 p = frag_more (8);
1752 strcpy (p, "APUinfo");
1753
1754 for (i = 0; i < ppc_apuinfo_num; i++)
1755 {
b34976b6
AM		 1756 p = frag_more (4);
1757 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1758 }
1759
1760 frag_align (2, 0, 0);
1761
1762 /* We probably can't restore the current segment, for there likely
1763 isn't one yet... */
1764 if (seg && subseg)
1765 subseg_set (seg, subseg);
1766 }
dc1d03fc 1767#endif
6a0c61b7
EZ		 1768}
1769
252b5132
RH		 1770/* Insert an operand value into an instruction. */
1771
1772static unsigned long
a1867a27
AM		 1773ppc_insert_operand (unsigned long insn,
1774 const struct powerpc_operand *operand,
1775 offsetT val,
91d6fa6a 1776 ppc_cpu_t cpu,
3b4dbbbf 1777 const char *file,
a1867a27 1778 unsigned int line)
252b5132 1779{
b84bf58a 1780 long min, max, right;
eb42fac1 1781
b84bf58a
AM		 1782 max = operand->bitm;
1783 right = max & -max;
1784 min = 0;
1785
a47622ac 1786 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132 1787 {
a47622ac
AM		 1788 /* Extend the allowed range for addis to [-65536, 65535].
1789 Similarly for some VLE high part insns. For 64-bit it
1790 would be good to disable this for signed fields since the
1791 value is sign extended into the high 32 bits of the register.
1792 If the value is, say, an address, then we might care about
1793 the high bits. However, gcc as of 2014-06 uses unsigned
1794 values when loading the high part of 64-bit constants using
1795 lis.
1796 Use the same extended range for cmpli, to allow at least
1797 [-32768, 65535]. */
1798 min = ~max & -right;
1799 }
1800 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1801 {
1802 max = (max >> 1) & -right;
931774a9 1803 min = ~max & -right;
b84bf58a 1804 }
252b5132 1805
b84bf58a 1806 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1807 max++;
252b5132 1808
b84bf58a 1809 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1810 {
1811 long tmp = min;
1812 min = -max;
1813 max = -tmp;
1814 }
b84bf58a 1815
a1867a27
AM		 1816 if (min <= max)
1817 {
1818 /* Some people write constants with the sign extension done by
1819 hand but only up to 32 bits. This shouldn't really be valid,
1820 but, to permit this code to assemble on a 64-bit host, we
1821 sign extend the 32-bit value to 64 bits if so doing makes the
1822 value valid. */
1823 if (val > max
1824 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1825 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1826 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1827 val = val - 0x80000000 - 0x80000000;
1828
1829 /* Similarly, people write expressions like ~(1<<15), and expect
1830 this to be OK for a 32-bit unsigned value. */
1831 else if (val < min
1832 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1833 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1834 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1835 val = val + 0x80000000 + 0x80000000;
1836
1837 else if (val < min
1838 || val > max
1839 || (val & (right - 1)) != 0)
1840 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1841 }
b84bf58a 1842
252b5132
RH		 1843 if (operand->insert)
1844 {
1845 const char *errmsg;
1846
1847 errmsg = NULL;
91d6fa6a 1848 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1849 if (errmsg != (const char *) NULL)
ee2c9aa9 1850 as_bad_where (file, line, "%s", errmsg);
252b5132 1851 }
b9c361e0 1852 else if (operand->shift >= 0)
b84bf58a 1853 insn |= ((long) val & operand->bitm) << operand->shift;
b9c361e0
JL		 1854 else
1855 insn |= ((long) val & operand->bitm) >> -operand->shift;
252b5132
RH		 1856
1857 return insn;
1858}
1859
1860\f
1861#ifdef OBJ_ELF
1862/* Parse @got, etc. and return the desired relocation. */
1863static bfd_reloc_code_real_type
98027b10 1864ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1865{
1866 struct map_bfd {
e0471c16 1867 const char *string;
b7d7dc63
AM		 1868 unsigned int length : 8;
1869 unsigned int valid32 : 1;
1870 unsigned int valid64 : 1;
1871 unsigned int reloc;
252b5132
RH		 1872 };
1873
1874 char ident[20];
1875 char *str = *str_p;
1876 char *str2;
1877 int ch;
1878 int len;
15c1449b 1879 const struct map_bfd *ptr;
252b5132 1880
b7d7dc63
AM		 1881#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1882#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1883#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1884
15c1449b 1885 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1886 MAP ("l", BFD_RELOC_LO16),
1887 MAP ("h", BFD_RELOC_HI16),
1888 MAP ("ha", BFD_RELOC_HI16_S),
1889 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1890 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1891 MAP ("got", BFD_RELOC_16_GOTOFF),
1892 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1893 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1894 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1895 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1896 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1897 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1898 MAP ("copy", BFD_RELOC_PPC_COPY),
1899 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1900 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1901 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1902 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1903 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1904 MAP ("tls", BFD_RELOC_PPC_TLS),
1905 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1906 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1907 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1908 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1909 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1910 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1911 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1912 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1913 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1914 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1915 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1916 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1917 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1918 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1919 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1920 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1921 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1922 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1923 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1924 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1925 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1926 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1927 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1928 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1929 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1930 MAP32 ("fixup", BFD_RELOC_CTOR),
1931 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1932 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1933 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1934 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1935 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1936 MAP32 ("sdarel", BFD_RELOC_GPREL16),
b9c361e0
JL		 1937 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1938 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1939 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
b7d7dc63
AM		 1940 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1941 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1942 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1943 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1944 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1945 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1946 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1947 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1948 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
b9c361e0 1949 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
b7d7dc63
AM		 1950 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1951 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1952 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1953 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1954 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1955 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1956 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1957 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
f9c6b907
AM		 1958 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1959 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
b7d7dc63
AM		 1960 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1961 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1962 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1963 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1964 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1965 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1966 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1967 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1968 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
f9c6b907
AM		 1969 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1970 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
b7d7dc63
AM		 1971 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1972 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1973 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1974 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
45965137 1975 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
f9c6b907
AM		 1976 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1977 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
b7d7dc63
AM		 1978 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1979 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1980 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1981 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
62ebcb5c 1982 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
252b5132
RH		 1983 };
1984
1985 if (*str++ != '@')
62ebcb5c 1986 return BFD_RELOC_NONE;
252b5132
RH		 1987
1988 for (ch = *str, str2 = ident;
1989 (str2 < ident + sizeof (ident) - 1
3882b010 1990 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1991 ch = *++str)
1992 {
3882b010 1993 *str2++ = TOLOWER (ch);
252b5132
RH		 1994 }
1995
1996 *str2 = '\0';
1997 len = str2 - ident;
1998
1999 ch = ident[0];
2000 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
2001 if (ch == ptr->string[0]
2002 && len == ptr->length
b7d7dc63
AM		 2003 && memcmp (ident, ptr->string, ptr->length) == 0
2004 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 2005 {
15c1449b
AM		 2006 int reloc = ptr->reloc;
2007
727fc41e
AM		 2008 if (!ppc_obj64 && exp_p->X_add_number != 0)
2009 {
2010 switch (reloc)
2011 {
2012 case BFD_RELOC_16_GOTOFF:
2013 case BFD_RELOC_LO16_GOTOFF:
2014 case BFD_RELOC_HI16_GOTOFF:
2015 case BFD_RELOC_HI16_S_GOTOFF:
2016 as_warn (_("identifier+constant@got means "
2017 "identifier@got+constant"));
2018 break;
2019
2020 case BFD_RELOC_PPC_GOT_TLSGD16:
2021 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2022 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2023 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2024 case BFD_RELOC_PPC_GOT_TLSLD16:
2025 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2026 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2027 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2028 case BFD_RELOC_PPC_GOT_DTPREL16:
2029 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2030 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2031 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2032 case BFD_RELOC_PPC_GOT_TPREL16:
2033 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2034 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2035 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2036 as_bad (_("symbol+offset not supported for got tls"));
2037 break;
2038 }
2039 }
5f6db75a
AM		 2040
2041 /* Now check for identifier@suffix+constant. */
2042 if (*str == '-' || *str == '+')
252b5132 2043 {
5f6db75a
AM		 2044 char *orig_line = input_line_pointer;
2045 expressionS new_exp;
2046
2047 input_line_pointer = str;
2048 expression (&new_exp);
2049 if (new_exp.X_op == O_constant)
252b5132 2050 {
5f6db75a
AM		 2051 exp_p->X_add_number += new_exp.X_add_number;
2052 str = input_line_pointer;
252b5132 2053 }
5f6db75a
AM		 2054
2055 if (&input_line_pointer != str_p)
2056 input_line_pointer = orig_line;
252b5132 2057 }
252b5132 2058 *str_p = str;
0baf16f2 2059
2b3c4602 2060 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 2061 && exp_p->X_op == O_symbol
2062 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 2063 {
9f2b53d7
AM		 2064 /* Change the symbol so that the dummy .TOC. symbol can be
2065 omitted from the object file. */
0baf16f2
AM		 2066 exp_p->X_add_symbol = &abs_symbol;
2067 }
2068
15c1449b 2069 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 2070 }
2071
62ebcb5c 2072 return BFD_RELOC_NONE;
252b5132
RH		 2073}
2074
62ebcb5c 2075/* Support @got, etc. on constants emitted via .short, .int etc. */
99a814a1 2076
62ebcb5c
AM		 2077bfd_reloc_code_real_type
2078ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2079{
2080 expression (exp);
2081 if (nbytes >= 2 && *input_line_pointer == '@')
2082 return ppc_elf_suffix (&input_line_pointer, exp);
2083 return BFD_RELOC_NONE;
252b5132
RH		 2084}
2085
bf7279d5
AM		 2086/* Warn when emitting data to code sections, unless we are emitting
2087 a relocation that ld --ppc476-workaround uses to recognise data
2088 *and* there was an unconditional branch prior to the data. */
2089
2090void
2091ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2092 unsigned int nbytes, fixS *fix)
2093{
2094 if (warn_476
2095 && (now_seg->flags & SEC_CODE) != 0
2096 && (nbytes != 4
2097 || fix == NULL
2098 || !(fix->fx_r_type == BFD_RELOC_32
2099 || fix->fx_r_type == BFD_RELOC_CTOR
2100 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2101 || !(last_seg == now_seg && last_subseg == now_subseg)
2102 || !((last_insn & (0x3f << 26)) == (18u << 26)
2103 || ((last_insn & (0x3f << 26)) == (16u << 26)
2104 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2105 || ((last_insn & (0x3f << 26)) == (19u << 26)
2106 && (last_insn & (0x3ff << 1)) == (16u << 1)
2107 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2108 {
2109 /* Flag that we've warned. */
2110 if (fix != NULL)
2111 fix->fx_tcbit = 1;
2112
2113 as_warn (_("data in executable section"));
2114 }
2115}
2116
252b5132
RH		 2117/* Solaris pseduo op to change to the .rodata section. */
2118static void
98027b10 2119ppc_elf_rdata (int xxx)
252b5132
RH		 2120{
2121 char *save_line = input_line_pointer;
2122 static char section[] = ".rodata\n";
2123
99a814a1 2124 /* Just pretend this is .section .rodata */
252b5132
RH		 2125 input_line_pointer = section;
2126 obj_elf_section (xxx);
2127
2128 input_line_pointer = save_line;
2129}
2130
99a814a1 2131/* Pseudo op to make file scope bss items. */
252b5132 2132static void
98027b10 2133ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2134{
98027b10
AM		 2135 char *name;
2136 char c;
2137 char *p;
252b5132 2138 offsetT size;
98027b10 2139 symbolS *symbolP;
252b5132
RH		 2140 offsetT align;
2141 segT old_sec;
2142 int old_subsec;
2143 char *pfrag;
2144 int align2;
2145
d02603dc 2146 c = get_symbol_name (&name);
252b5132 2147
d02603dc 2148 /* Just after name is now '\0'. */
252b5132
RH		 2149 p = input_line_pointer;
2150 *p = c;
d02603dc 2151 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 2152 if (*input_line_pointer != ',')
2153 {
d6ed37ed 2154 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 2155 ignore_rest_of_line ();
2156 return;
2157 }
2158
2159 input_line_pointer++; /* skip ',' */
2160 if ((size = get_absolute_expression ()) < 0)
2161 {
2162 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2163 ignore_rest_of_line ();
2164 return;
2165 }
2166
2167 /* The third argument to .lcomm is the alignment. */
2168 if (*input_line_pointer != ',')
2169 align = 8;
2170 else
2171 {
2172 ++input_line_pointer;
2173 align = get_absolute_expression ();
2174 if (align <= 0)
2175 {
2176 as_warn (_("ignoring bad alignment"));
2177 align = 8;
2178 }
2179 }
2180
2181 *p = 0;
2182 symbolP = symbol_find_or_make (name);
2183 *p = c;
2184
2185 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2186 {
d6ed37ed 2187 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 2188 S_GET_NAME (symbolP));
2189 ignore_rest_of_line ();
2190 return;
2191 }
2192
2193 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2194 {
d6ed37ed 2195 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 2196 S_GET_NAME (symbolP),
2197 (long) S_GET_VALUE (symbolP),
2198 (long) size);
2199
2200 ignore_rest_of_line ();
2201 return;
2202 }
2203
99a814a1 2204 /* Allocate_bss. */
252b5132
RH		 2205 old_sec = now_seg;
2206 old_subsec = now_subseg;
2207 if (align)
2208 {
99a814a1 2209 /* Convert to a power of 2 alignment. */
252b5132
RH		 2210 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2211 if (align != 1)
2212 {
d6ed37ed 2213 as_bad (_("common alignment not a power of 2"));
252b5132
RH		 2214 ignore_rest_of_line ();
2215 return;
2216 }
2217 }
2218 else
2219 align2 = 0;
2220
2221 record_alignment (bss_section, align2);
cbe02d4f 2222 subseg_set (bss_section, 1);
252b5132
RH		 2223 if (align2)
2224 frag_align (align2, 0, 0);
2225 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2226 symbol_get_frag (symbolP)->fr_symbol = 0;
2227 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2228 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2229 (char *) 0);
2230 *pfrag = 0;
2231 S_SET_SIZE (symbolP, size);
2232 S_SET_SEGMENT (symbolP, bss_section);
2233 subseg_set (old_sec, old_subsec);
2234 demand_empty_rest_of_line ();
2235}
2236
6911b7dc
AM		 2237/* Pseudo op to set symbol local entry point. */
2238static void
2239ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2240{
d02603dc
NC		 2241 char *name;
2242 char c = get_symbol_name (&name);
6911b7dc
AM		 2243 char *p;
2244 expressionS exp;
2245 symbolS *sym;
2246 asymbol *bfdsym;
2247 elf_symbol_type *elfsym;
2248
2249 p = input_line_pointer;
2250 *p = c;
d02603dc 2251 SKIP_WHITESPACE_AFTER_NAME ();
6911b7dc
AM		 2252 if (*input_line_pointer != ',')
2253 {
2254 *p = 0;
2255 as_bad (_("expected comma after name `%s' in .localentry directive"),
2256 name);
2257 *p = c;
2258 ignore_rest_of_line ();
2259 return;
2260 }
2261 input_line_pointer++;
2262 expression (&exp);
2263 if (exp.X_op == O_absent)
2264 {
2265 as_bad (_("missing expression in .localentry directive"));
2266 exp.X_op = O_constant;
2267 exp.X_add_number = 0;
2268 }
2269 *p = 0;
2270 sym = symbol_find_or_make (name);
2271 *p = c;
2272
2273 if (resolve_expression (&exp)
2274 && exp.X_op == O_constant)
2275 {
2276 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2277
e2b5892e 2278 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
6911b7dc
AM		 2279 as_bad (_(".localentry expression for `%s' "
2280 "is not a valid power of 2"), S_GET_NAME (sym));
2281 else
2282 {
2283 bfdsym = symbol_get_bfdsym (sym);
2284 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2285 gas_assert (elfsym);
2286 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2287 elfsym->internal_elf_sym.st_other |= encoded;
2288 if (ppc_abiversion == 0)
2289 ppc_abiversion = 2;
2290 }
2291 }
2292 else
2293 as_bad (_(".localentry expression for `%s' "
2294 "does not evaluate to a constant"), S_GET_NAME (sym));
2295
2296 demand_empty_rest_of_line ();
2297}
2298
ee67d69a
AM		 2299/* Pseudo op to set ABI version. */
2300static void
2301ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2302{
2303 expressionS exp;
2304
2305 expression (&exp);
2306 if (exp.X_op == O_absent)
2307 {
2308 as_bad (_("missing expression in .abiversion directive"));
2309 exp.X_op = O_constant;
2310 exp.X_add_number = 0;
2311 }
2312
2313 if (resolve_expression (&exp)
2314 && exp.X_op == O_constant)
2315 ppc_abiversion = exp.X_add_number;
2316 else
2317 as_bad (_(".abiversion expression does not evaluate to a constant"));
2318 demand_empty_rest_of_line ();
2319}
2320
2321/* Set ABI version in output file. */
2322void
2323ppc_elf_end (void)
2324{
2325 if (ppc_obj64 && ppc_abiversion != 0)
2326 {
2327 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2328 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2329 }
2330}
2331
252b5132
RH		 2332/* Validate any relocations emitted for -mrelocatable, possibly adding
2333 fixups for word relocations in writable segments, so we can adjust
2334 them at runtime. */
2335static void
98027b10 2336ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2337{
2338 if (fixp->fx_done || fixp->fx_pcrel)
2339 return;
2340
2341 switch (shlib)
2342 {
2343 case SHLIB_NONE:
2344 case SHLIB_PIC:
2345 return;
2346
5d6f4f16 2347 case SHLIB_MRELOCATABLE:
62ebcb5c 2348 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
252b5132
RH		 2349 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2350 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2351 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2352 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2353 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2354 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2355 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2356 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2357 && strcmp (segment_name (seg), ".got2") != 0
2358 && strcmp (segment_name (seg), ".dtors") != 0
2359 && strcmp (segment_name (seg), ".ctors") != 0
2360 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2361 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2362 && strcmp (segment_name (seg), ".eh_frame") != 0
2363 && strcmp (segment_name (seg), ".ex_shared") != 0)
2364 {
2365 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2366 || fixp->fx_r_type != BFD_RELOC_CTOR)
2367 {
2368 as_bad_where (fixp->fx_file, fixp->fx_line,
d6ed37ed 2369 _("relocation cannot be done when using -mrelocatable"));
252b5132
RH		 2370 }
2371 }
2372 return;
2373 }
2374}
0baf16f2 2375
7e8d4ab4
AM		 2376/* Prevent elf_frob_file_before_adjust removing a weak undefined
2377 function descriptor sym if the corresponding code sym is used. */
2378
2379void
98027b10 2380ppc_frob_file_before_adjust (void)
0baf16f2 2381{
7e8d4ab4 2382 symbolS *symp;
9232bbb0 2383 asection *toc;
0baf16f2 2384
7e8d4ab4
AM		 2385 if (!ppc_obj64)
2386 return;
2387
2388 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2389 {
7e8d4ab4
AM		 2390 const char *name;
2391 char *dotname;
2392 symbolS *dotsym;
7e8d4ab4
AM		 2393
2394 name = S_GET_NAME (symp);
2395 if (name[0] == '.')
2396 continue;
2397
2398 if (! S_IS_WEAK (symp)
2399 || S_IS_DEFINED (symp))
2400 continue;
2401
a44e2901 2402 dotname = concat (".", name, (char *) NULL);
461b725f 2403 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2404 free (dotname);
2405 if (dotsym != NULL && (symbol_used_p (dotsym)
2406 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2407 symbol_mark_used (symp);
2408
0baf16f2
AM		 2409 }
2410
9232bbb0
AM		 2411 toc = bfd_get_section_by_name (stdoutput, ".toc");
2412 if (toc != NULL
01efc3af 2413 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2414 && bfd_section_size (stdoutput, toc) > 0x10000)
2415 as_warn (_("TOC section size exceeds 64k"));
a38a07e0
AM		 2416}
2417
2418/* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2419 emitted. Other uses of .TOC. will cause the symbol to be marked
2420 with BSF_KEEP in md_apply_fix. */
9232bbb0 2421
a38a07e0
AM		 2422void
2423ppc_elf_adjust_symtab (void)
2424{
2425 if (ppc_obj64)
2426 {
2427 symbolS *symp;
2428 symp = symbol_find (".TOC.");
2429 if (symp != NULL)
2430 {
2431 asymbol *bsym = symbol_get_bfdsym (symp);
2432 if ((bsym->flags & BSF_KEEP) == 0)
2433 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
a38a07e0
AM		 2434 }
2435 }
0baf16f2 2436}
252b5132
RH		 2437#endif /* OBJ_ELF */
2438\f
2439#ifdef TE_PE
2440
2441/*
99a814a1 2442 * Summary of parse_toc_entry.
252b5132
RH		 2443 *
2444 * in: Input_line_pointer points to the '[' in one of:
2445 *
2446 * [toc] [tocv] [toc32] [toc64]
2447 *
2448 * Anything else is an error of one kind or another.
2449 *
81d4177b 2450 * out:
252b5132
RH		 2451 * return value: success or failure
2452 * toc_kind: kind of toc reference
2453 * input_line_pointer:
2454 * success: first char after the ']'
2455 * failure: unchanged
2456 *
2457 * settings:
2458 *
2459 * [toc] - rv == success, toc_kind = default_toc
2460 * [tocv] - rv == success, toc_kind = data_in_toc
2461 * [toc32] - rv == success, toc_kind = must_be_32
2462 * [toc64] - rv == success, toc_kind = must_be_64
2463 *
2464 */
2465
81d4177b
KH		 2466enum toc_size_qualifier
2467{
252b5132
RH		 2468 default_toc, /* The toc cell constructed should be the system default size */
2469 data_in_toc, /* This is a direct reference to a toc cell */
2470 must_be_32, /* The toc cell constructed must be 32 bits wide */
2471 must_be_64 /* The toc cell constructed must be 64 bits wide */
2472};
2473
2474static int
98027b10 2475parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2476{
2477 char *start;
2478 char *toc_spec;
2479 char c;
2480 enum toc_size_qualifier t;
2481
99a814a1 2482 /* Save the input_line_pointer. */
252b5132
RH		 2483 start = input_line_pointer;
2484
99a814a1 2485 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2486 ++input_line_pointer;
2487 SKIP_WHITESPACE ();
81d4177b 2488
99a814a1 2489 /* Find the spelling of the operand. */
d02603dc 2490 c = get_symbol_name (&toc_spec);
252b5132 2491
99a814a1 2492 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2493 {
2494 t = default_toc;
2495 }
99a814a1 2496 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2497 {
2498 t = data_in_toc;
2499 }
99a814a1 2500 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2501 {
2502 t = must_be_32;
2503 }
99a814a1 2504 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2505 {
2506 t = must_be_64;
2507 }
2508 else
2509 {
2510 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2511 *input_line_pointer = c;
2512 input_line_pointer = start;
252b5132
RH		 2513 return 0;
2514 }
2515
99a814a1
AM		 2516 /* Now find the ']'. */
2517 *input_line_pointer = c;
252b5132 2518
d02603dc 2519 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
81d4177b 2520 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2521
2522 if (c != ']')
2523 {
2524 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2525 input_line_pointer = start;
252b5132
RH		 2526 return 0;
2527 }
2528
99a814a1 2529 *toc_kind = t;
252b5132
RH		 2530 return 1;
2531}
2532#endif
3b8b57a9 2533
3e60bf4d 2534#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3b8b57a9
AM		 2535/* See whether a symbol is in the TOC section. */
2536
2537static int
2538ppc_is_toc_sym (symbolS *sym)
2539{
3e60bf4d 2540#ifdef OBJ_XCOFF
9f6e76f4
TG		 2541 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2542 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
f50c47f1 2543#endif
3e60bf4d
AM		 2544#ifdef OBJ_ELF
2545 const char *sname = segment_name (S_GET_SEGMENT (sym));
2546 if (ppc_obj64)
2547 return strcmp (sname, ".toc") == 0;
2548 else
2549 return strcmp (sname, ".got") == 0;
2550#endif
2551}
2552#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 2553\f
2554
dc1d03fc 2555#ifdef OBJ_ELF
6a0c61b7
EZ		 2556#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2557static void
98027b10 2558ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2559{
2560 unsigned int i;
2561
2562 /* Check we don't already exist. */
2563 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2564 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2565 return;
b34976b6 2566
6a0c61b7
EZ		 2567 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2568 {
2569 if (ppc_apuinfo_num_alloc == 0)
2570 {
2571 ppc_apuinfo_num_alloc = 4;
2572 ppc_apuinfo_list = (unsigned long *)
2573 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2574 }
2575 else
2576 {
2577 ppc_apuinfo_num_alloc += 4;
2578 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2579 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2580 }
2581 }
dc1d03fc 2582 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2583}
2584#undef APUID
dc1d03fc 2585#endif
6a0c61b7
EZ		 2586\f
2587
252b5132
RH		 2588/* We need to keep a list of fixups. We can't simply generate them as
2589 we go, because that would require us to first create the frag, and
2590 that would screw up references to ``.''. */
2591
2592struct ppc_fixup
2593{
2594 expressionS exp;
2595 int opindex;
2596 bfd_reloc_code_real_type reloc;
2597};
2598
2599#define MAX_INSN_FIXUPS (5)
2600
b9c361e0
JL		 2601/* Form I16L. */
2602#define E_OR2I_INSN 0x7000C000
2603#define E_AND2I_DOT_INSN 0x7000C800
2604#define E_OR2IS_INSN 0x7000D000
2605#define E_LIS_INSN 0x7000E000
2606#define E_AND2IS_DOT_INSN 0x7000E800
2607
2608/* Form I16A. */
2609#define E_ADD2I_DOT_INSN 0x70008800
2610#define E_ADD2IS_INSN 0x70009000
2611#define E_CMP16I_INSN 0x70009800
2612#define E_MULL2I_INSN 0x7000A000
2613#define E_CMPL16I_INSN 0x7000A800
2614#define E_CMPH16I_INSN 0x7000B000
2615#define E_CMPHL16I_INSN 0x7000B800
2616
252b5132
RH		 2617/* This routine is called for each instruction to be assembled. */
2618
2619void
98027b10 2620md_assemble (char *str)
252b5132
RH		 2621{
2622 char *s;
2623 const struct powerpc_opcode *opcode;
2624 unsigned long insn;
2625 const unsigned char *opindex_ptr;
2626 int skip_optional;
2627 int need_paren;
2628 int next_opindex;
2629 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2630 int fc;
2631 char *f;
09b935ac 2632 int addr_mod;
252b5132 2633 int i;
b9c361e0 2634 unsigned int insn_length;
252b5132
RH		 2635
2636 /* Get the opcode. */
3882b010 2637 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2638 ;
2639 if (*s != '\0')
2640 *s++ = '\0';
2641
2642 /* Look up the opcode in the hash table. */
2643 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2644 if (opcode == (const struct powerpc_opcode *) NULL)
2645 {
2646 const struct powerpc_macro *macro;
2647
2648 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2649 if (macro == (const struct powerpc_macro *) NULL)
d6ed37ed 2650 as_bad (_("unrecognized opcode: `%s'"), str);
252b5132
RH		 2651 else
2652 ppc_macro (s, macro);
2653
2654 return;
2655 }
2656
2657 insn = opcode->opcode;
2658
2659 str = s;
3882b010 2660 while (ISSPACE (*str))
252b5132
RH		 2661 ++str;
2662
2663 /* PowerPC operands are just expressions. The only real issue is
2664 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2665 an optional operand separate the operands only with commas (in some
2666 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2667 have optional operands). Most instructions with optional operands
2668 have only one. Those that have more than one optional operand can
2669 take either all their operands or none. So, before we start seriously
2670 parsing the operands, we check to see if we have optional operands,
2671 and if we do, we count the number of commas to see which operands
2672 have been omitted. */
252b5132
RH		 2673 skip_optional = 0;
2674 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2675 {
2676 const struct powerpc_operand *operand;
2677
2678 operand = &powerpc_operands[*opindex_ptr];
2679 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2680 {
2681 unsigned int opcount;
7fe9cf6b 2682 unsigned int num_operands_expected;
252b5132
RH		 2683
2684 /* There is an optional operand. Count the number of
2685 commas in the input line. */
2686 if (*str == '\0')
2687 opcount = 0;
2688 else
2689 {
2690 opcount = 1;
2691 s = str;
2692 while ((s = strchr (s, ',')) != (char *) NULL)
2693 {
2694 ++opcount;
2695 ++s;
2696 }
2697 }
2698
7fe9cf6b
NC		 2699 /* Compute the number of expected operands.
2700 Do not count fake operands. */
2701 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2702 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2703 ++ num_operands_expected;
2704
252b5132
RH		 2705 /* If there are fewer operands in the line then are called
2706 for by the instruction, we want to skip the optional
1f6c9eb0 2707 operands. */
7fe9cf6b 2708 if (opcount < num_operands_expected)
252b5132
RH		 2709 skip_optional = 1;
2710
2711 break;
2712 }
2713 }
2714
2715 /* Gather the operands. */
2716 need_paren = 0;
2717 next_opindex = 0;
2718 fc = 0;
2719 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2720 {
2721 const struct powerpc_operand *operand;
2722 const char *errmsg;
2723 char *hold;
2724 expressionS ex;
2725 char endc;
2726
2727 if (next_opindex == 0)
2728 operand = &powerpc_operands[*opindex_ptr];
2729 else
2730 {
2731 operand = &powerpc_operands[next_opindex];
2732 next_opindex = 0;
2733 }
252b5132
RH		 2734 errmsg = NULL;
2735
2736 /* If this is a fake operand, then we do not expect anything
2737 from the input. */
2738 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2739 {
2b3c4602 2740 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2741 if (errmsg != (const char *) NULL)
ee2c9aa9 2742 as_bad ("%s", errmsg);
252b5132
RH		 2743 continue;
2744 }
2745
2746 /* If this is an optional operand, and we are skipping it, just
2747 insert a zero. */
2748 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2749 && skip_optional)
2750 {
11a0cf2e 2751 long val = ppc_optional_operand_value (operand);
252b5132
RH		 2752 if (operand->insert)
2753 {
11a0cf2e 2754 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg);
252b5132 2755 if (errmsg != (const char *) NULL)
ee2c9aa9 2756 as_bad ("%s", errmsg);
252b5132 2757 }
11a0cf2e
PB		 2758 else if (operand->shift >= 0)
2759 insn |= ((long) val & operand->bitm) << operand->shift;
2760 else
2761 insn |= ((long) val & operand->bitm) >> -operand->shift;
2762
252b5132
RH		 2763 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2764 next_opindex = *opindex_ptr + 1;
2765 continue;
2766 }
2767
2768 /* Gather the operand. */
2769 hold = input_line_pointer;
2770 input_line_pointer = str;
2771
2772#ifdef TE_PE
81d4177b 2773 if (*input_line_pointer == '[')
252b5132
RH		 2774 {
2775 /* We are expecting something like the second argument here:
99a814a1
AM		 2776 *
2777 * lwz r4,[toc].GS.0.static_int(rtoc)
2778 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2779 * The argument following the `]' must be a symbol name, and the
2780 * register must be the toc register: 'rtoc' or '2'
2781 *
2782 * The effect is to 0 as the displacement field
2783 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2784 * the appropriate variation) reloc against it based on the symbol.
2785 * The linker will build the toc, and insert the resolved toc offset.
2786 *
2787 * Note:
2788 * o The size of the toc entry is currently assumed to be
2789 * 32 bits. This should not be assumed to be a hard coded
2790 * number.
2791 * o In an effort to cope with a change from 32 to 64 bits,
2792 * there are also toc entries that are specified to be
2793 * either 32 or 64 bits:
2794 * lwz r4,[toc32].GS.0.static_int(rtoc)
2795 * lwz r4,[toc64].GS.0.static_int(rtoc)
2796 * These demand toc entries of the specified size, and the
2797 * instruction probably requires it.
2798 */
252b5132
RH		 2799
2800 int valid_toc;
2801 enum toc_size_qualifier toc_kind;
2802 bfd_reloc_code_real_type toc_reloc;
2803
99a814a1
AM		 2804 /* Go parse off the [tocXX] part. */
2805 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2806
81d4177b 2807 if (!valid_toc)
252b5132 2808 {
a5840dce
AM		 2809 ignore_rest_of_line ();
2810 break;
252b5132
RH		 2811 }
2812
99a814a1
AM		 2813 /* Now get the symbol following the ']'. */
2814 expression (&ex);
252b5132
RH		 2815
2816 switch (toc_kind)
2817 {
2818 case default_toc:
99a814a1
AM		 2819 /* In this case, we may not have seen the symbol yet,
2820 since it is allowed to appear on a .extern or .globl
2821 or just be a label in the .data section. */
252b5132
RH		 2822 toc_reloc = BFD_RELOC_PPC_TOC16;
2823 break;
2824 case data_in_toc:
99a814a1
AM		 2825 /* 1. The symbol must be defined and either in the toc
2826 section, or a global.
2827 2. The reloc generated must have the TOCDEFN flag set
2828 in upper bit mess of the reloc type.
2829 FIXME: It's a little confusing what the tocv
2830 qualifier can be used for. At the very least, I've
2831 seen three uses, only one of which I'm sure I can
2832 explain. */
81d4177b
KH		 2833 if (ex.X_op == O_symbol)
2834 {
9c2799c2 2835 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2836 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2837 != tocdata_section)
252b5132 2838 {
99a814a1 2839 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2840 }
2841 }
2842
2843 toc_reloc = BFD_RELOC_PPC_TOC16;
2844 break;
2845 case must_be_32:
99a814a1
AM		 2846 /* FIXME: these next two specifically specify 32/64 bit
2847 toc entries. We don't support them today. Is this
2848 the right way to say that? */
62ebcb5c 2849 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2850 as_bad (_("unimplemented toc32 expression modifier"));
252b5132
RH		 2851 break;
2852 case must_be_64:
99a814a1 2853 /* FIXME: see above. */
62ebcb5c 2854 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2855 as_bad (_("unimplemented toc64 expression modifier"));
252b5132
RH		 2856 break;
2857 default:
bc805888 2858 fprintf (stderr,
99a814a1
AM		 2859 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2860 toc_kind);
bc805888 2861 abort ();
252b5132
RH		 2862 break;
2863 }
2864
2865 /* We need to generate a fixup for this expression. */
2866 if (fc >= MAX_INSN_FIXUPS)
2867 as_fatal (_("too many fixups"));
2868
2869 fixups[fc].reloc = toc_reloc;
2870 fixups[fc].exp = ex;
2871 fixups[fc].opindex = *opindex_ptr;
2872 ++fc;
2873
99a814a1
AM		 2874 /* Ok. We've set up the fixup for the instruction. Now make it
2875 look like the constant 0 was found here. */
252b5132
RH		 2876 ex.X_unsigned = 1;
2877 ex.X_op = O_constant;
2878 ex.X_add_number = 0;
2879 ex.X_add_symbol = NULL;
2880 ex.X_op_symbol = NULL;
2881 }
2882
2883 else
2884#endif /* TE_PE */
2885 {
b9c361e0
JL		 2886 if ((reg_names_p
2887 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2888 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2ad068be 2889 || !register_name (&ex))
252b5132 2890 {
13abbae3
AM		 2891 char save_lex = lex_type['%'];
2892
b9c361e0
JL		 2893 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2894 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
13abbae3
AM		 2895 {
2896 cr_operand = TRUE;
2897 lex_type['%'] |= LEX_BEGIN_NAME;
2898 }
252b5132 2899 expression (&ex);
b34976b6 2900 cr_operand = FALSE;
13abbae3 2901 lex_type['%'] = save_lex;
252b5132
RH		 2902 }
2903 }
2904
2905 str = input_line_pointer;
2906 input_line_pointer = hold;
2907
2908 if (ex.X_op == O_illegal)
2909 as_bad (_("illegal operand"));
2910 else if (ex.X_op == O_absent)
2911 as_bad (_("missing operand"));
2912 else if (ex.X_op == O_register)
2913 {
2914 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2915 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2916 }
2917 else if (ex.X_op == O_constant)
2918 {
2919#ifdef OBJ_ELF
81d4177b 2920 /* Allow @HA, @L, @H on constants. */
3b8b57a9 2921 bfd_reloc_code_real_type reloc;
252b5132
RH		 2922 char *orig_str = str;
2923
62ebcb5c 2924 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
252b5132
RH		 2925 switch (reloc)
2926 {
2927 default:
2928 str = orig_str;
2929 break;
2930
2931 case BFD_RELOC_LO16:
f9c6b907
AM		 2932 ex.X_add_number &= 0xffff;
2933 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
0baf16f2 2934 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2935 break;
2936
2937 case BFD_RELOC_HI16:
f9c6b907
AM		 2938 if (REPORT_OVERFLOW_HI && ppc_obj64)
2939 {
2940 /* PowerPC64 @h is tested for overflow. */
2941 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2942 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2943 {
2944 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2945 ex.X_add_number
2946 = ((addressT) ex.X_add_number ^ sign) - sign;
2947 }
2948 break;
2949 }
2950 /* Fall thru */
2951
2952 case BFD_RELOC_PPC64_ADDR16_HIGH:
2953 ex.X_add_number = PPC_HI (ex.X_add_number);
2954 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2955 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2956 break;
2957
2958 case BFD_RELOC_HI16_S:
f9c6b907
AM		 2959 if (REPORT_OVERFLOW_HI && ppc_obj64)
2960 {
2961 /* PowerPC64 @ha is tested for overflow. */
2962 ex.X_add_number
2963 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2964 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2965 {
2966 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2967 ex.X_add_number
2968 = ((addressT) ex.X_add_number ^ sign) - sign;
2969 }
2970 break;
2971 }
2972 /* Fall thru */
2973
2974 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2975 ex.X_add_number = PPC_HA (ex.X_add_number);
2976 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2977 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2978 break;
2979
0baf16f2 2980 case BFD_RELOC_PPC64_HIGHER:
f9c6b907
AM		 2981 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2982 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2983 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2984 break;
2985
2986 case BFD_RELOC_PPC64_HIGHER_S:
f9c6b907
AM		 2987 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2988 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2989 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132 2990 break;
0baf16f2
AM		 2991
2992 case BFD_RELOC_PPC64_HIGHEST:
f9c6b907
AM		 2993 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2994 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2995 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2996 break;
2997
2998 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 2999 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
3000 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3001 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2 3002 break;
252b5132 3003 }
0baf16f2 3004#endif /* OBJ_ELF */
252b5132 3005 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 3006 ppc_cpu, (char *) NULL, 0);
252b5132 3007 }
727fc41e 3008 else
252b5132 3009 {
62ebcb5c 3010 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3b8b57a9 3011#ifdef OBJ_ELF
727fc41e 3012 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 3013 {
727fc41e
AM		 3014 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3015 if (sym_name[0] == '.')
3016 ++sym_name;
cdba85ec 3017
727fc41e 3018 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 3019 {
727fc41e
AM		 3020 expressionS tls_exp;
3021
3022 hold = input_line_pointer;
3023 input_line_pointer = str + 1;
3024 expression (&tls_exp);
3025 if (tls_exp.X_op == O_symbol)
3026 {
62ebcb5c 3027 reloc = BFD_RELOC_NONE;
727fc41e
AM		 3028 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3029 {
3030 reloc = BFD_RELOC_PPC_TLSGD;
3031 input_line_pointer += 7;
3032 }
3033 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3034 {
3035 reloc = BFD_RELOC_PPC_TLSLD;
3036 input_line_pointer += 7;
3037 }
62ebcb5c 3038 if (reloc != BFD_RELOC_NONE)
727fc41e
AM		 3039 {
3040 SKIP_WHITESPACE ();
3041 str = input_line_pointer;
3042
3043 if (fc >= MAX_INSN_FIXUPS)
3044 as_fatal (_("too many fixups"));
3045 fixups[fc].exp = tls_exp;
3046 fixups[fc].opindex = *opindex_ptr;
3047 fixups[fc].reloc = reloc;
3048 ++fc;
3049 }
3050 }
3051 input_line_pointer = hold;
252b5132
RH		 3052 }
3053 }
3054
62ebcb5c 3055 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
0baf16f2 3056 {
727fc41e 3057 /* Some TLS tweaks. */
0baf16f2
AM		 3058 switch (reloc)
3059 {
727fc41e 3060 default:
cdba85ec 3061 break;
727fc41e
AM		 3062
3063 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 3064 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3065 as_bad (_("@tls may not be used with \"%s\" operands"),
3066 opcode->name);
3067 else if (operand->shift != 11)
3068 as_bad (_("@tls may only be used in last operand"));
3069 else
3070 insn = ppc_insert_operand (insn, operand,
3071 ppc_obj64 ? 13 : 2,
3072 ppc_cpu, (char *) NULL, 0);
cdba85ec 3073 break;
727fc41e
AM		 3074
3075 /* We'll only use the 32 (or 64) bit form of these relocations
3076 in constants. Instructions get the 16 bit form. */
3077 case BFD_RELOC_PPC_DTPREL:
3078 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 3079 break;
727fc41e
AM		 3080 case BFD_RELOC_PPC_TPREL:
3081 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 3082 break;
3083 }
727fc41e 3084
a680de9a
PB		 3085 /* addpcis. */
3086 if (opcode->opcode == (19 << 26) + (2 << 1)
3087 && reloc == BFD_RELOC_HI16_S)
3088 reloc = BFD_RELOC_PPC_REL16DX_HA;
3089
b9c361e0
JL		 3090 /* If VLE-mode convert LO/HI/HA relocations. */
3091 if (opcode->flags & PPC_OPCODE_VLE)
3092 {
3093 int tmp_insn = insn & opcode->mask;
3739860c 3094
b9c361e0
JL		 3095 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3096 || tmp_insn == E_AND2I_DOT_INSN
3097 || tmp_insn == E_OR2IS_INSN
3098 || tmp_insn == E_LIS_INSN
3099 || tmp_insn == E_AND2IS_DOT_INSN);
3100
3101
3102 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3103 || tmp_insn == E_ADD2IS_INSN
3104 || tmp_insn == E_CMP16I_INSN
3105 || tmp_insn == E_MULL2I_INSN
3106 || tmp_insn == E_CMPL16I_INSN
3107 || tmp_insn == E_CMPH16I_INSN
3108 || tmp_insn == E_CMPHL16I_INSN);
3109
3110 switch (reloc)
3111 {
3112 default:
3113 break;
3114
3115 case BFD_RELOC_PPC_EMB_SDA21:
3116 reloc = BFD_RELOC_PPC_VLE_SDA21;
3117 break;
3118
3119 case BFD_RELOC_LO16:
3120 if (use_d_reloc)
3121 reloc = BFD_RELOC_PPC_VLE_LO16D;
3122 else if (use_a_reloc)
3123 reloc = BFD_RELOC_PPC_VLE_LO16A;
3124 break;
3125
3126 case BFD_RELOC_HI16:
3127 if (use_d_reloc)
3128 reloc = BFD_RELOC_PPC_VLE_HI16D;
3129 else if (use_a_reloc)
3130 reloc = BFD_RELOC_PPC_VLE_HI16A;
3131 break;
3739860c 3132
b9c361e0
JL		 3133 case BFD_RELOC_HI16_S:
3134 if (use_d_reloc)
3135 reloc = BFD_RELOC_PPC_VLE_HA16D;
3136 else if (use_a_reloc)
3137 reloc = BFD_RELOC_PPC_VLE_HA16A;
3138 break;
3139
3140 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3141 if (use_d_reloc)
3142 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3143 break;
3144
3145 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3146 if (use_d_reloc)
3147 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3148 break;
3149
3150 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3151 if (use_d_reloc)
3152 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3153 break;
3154 }
3155 }
0baf16f2 3156 }
3b8b57a9
AM		 3157#endif /* OBJ_ELF */
3158
62ebcb5c 3159 if (reloc != BFD_RELOC_NONE)
3b8b57a9
AM		 3160 ;
3161 /* Determine a BFD reloc value based on the operand information.
3162 We are only prepared to turn a few of the operands into
3163 relocs. */
a0593ad9
AM		 3164 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3165 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3166 && operand->bitm == 0x3fffffc
3167 && operand->shift == 0)
3168 reloc = BFD_RELOC_PPC_B26;
a0593ad9
AM		 3169 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3170 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3171 && operand->bitm == 0xfffc
3172 && operand->shift == 0)
3173 reloc = BFD_RELOC_PPC_B16;
3174 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3175 && operand->bitm == 0x1fe
3176 && operand->shift == -1)
3177 reloc = BFD_RELOC_PPC_VLE_REL8;
3178 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3179 && operand->bitm == 0xfffe
3180 && operand->shift == 0)
3181 reloc = BFD_RELOC_PPC_VLE_REL15;
3182 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3183 && operand->bitm == 0x1fffffe
3184 && operand->shift == 0)
3185 reloc = BFD_RELOC_PPC_VLE_REL24;
a0593ad9 3186 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3b8b57a9
AM		 3187 && (operand->bitm & 0xfff0) == 0xfff0
3188 && operand->shift == 0)
3189 {
f50c47f1 3190 reloc = BFD_RELOC_16;
3e60bf4d 3191#if defined OBJ_XCOFF || defined OBJ_ELF
f50c47f1 3192 /* Note: the symbol may be not yet defined. */
a0593ad9
AM		 3193 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3194 && ppc_is_toc_sym (ex.X_add_symbol))
3e60bf4d
AM		 3195 {
3196 reloc = BFD_RELOC_PPC_TOC16;
3197#ifdef OBJ_ELF
3198 as_warn (_("assuming %s on symbol"),
3199 ppc_obj64 ? "@toc" : "@xgot");
3200#endif
3201 }
3b8b57a9 3202#endif
3b8b57a9 3203 }
a0593ad9
AM		 3204
3205 /* For the absolute forms of branches, convert the PC
3206 relative form back into the absolute. */
3207 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3208 {
3209 switch (reloc)
3210 {
3211 case BFD_RELOC_PPC_B26:
3212 reloc = BFD_RELOC_PPC_BA26;
3213 break;
3214 case BFD_RELOC_PPC_B16:
3215 reloc = BFD_RELOC_PPC_BA16;
3216 break;
3217#ifdef OBJ_ELF
3218 case BFD_RELOC_PPC_B16_BRTAKEN:
3219 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3220 break;
3221 case BFD_RELOC_PPC_B16_BRNTAKEN:
3222 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3223 break;
3224#endif
3225 default:
3226 break;
3227 }
3228 }
3229
3230#ifdef OBJ_ELF
3231 switch (reloc)
3232 {
3233 case BFD_RELOC_PPC_TOC16:
3234 toc_reloc_types |= has_small_toc_reloc;
3235 break;
3236 case BFD_RELOC_PPC64_TOC16_LO:
3237 case BFD_RELOC_PPC64_TOC16_HI:
3238 case BFD_RELOC_PPC64_TOC16_HA:
3239 toc_reloc_types |= has_large_toc_reloc;
3240 break;
3241 default:
3242 break;
3243 }
3244
3245 if (ppc_obj64
3246 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3247 {
3248 switch (reloc)
3249 {
3250 case BFD_RELOC_16:
3251 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3252 break;
3253 case BFD_RELOC_LO16:
3254 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3255 break;
3256 case BFD_RELOC_16_GOTOFF:
3257 reloc = BFD_RELOC_PPC64_GOT16_DS;
3258 break;
3259 case BFD_RELOC_LO16_GOTOFF:
3260 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3261 break;
3262 case BFD_RELOC_LO16_PLTOFF:
3263 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3264 break;
3265 case BFD_RELOC_16_BASEREL:
3266 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3267 break;
3268 case BFD_RELOC_LO16_BASEREL:
3269 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3270 break;
3271 case BFD_RELOC_PPC_TOC16:
3272 reloc = BFD_RELOC_PPC64_TOC16_DS;
3273 break;
3274 case BFD_RELOC_PPC64_TOC16_LO:
3275 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3276 break;
3277 case BFD_RELOC_PPC64_PLTGOT16:
3278 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3279 break;
3280 case BFD_RELOC_PPC64_PLTGOT16_LO:
3281 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3282 break;
3283 case BFD_RELOC_PPC_DTPREL16:
3284 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3285 break;
3286 case BFD_RELOC_PPC_DTPREL16_LO:
3287 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3288 break;
3289 case BFD_RELOC_PPC_TPREL16:
3290 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3291 break;
3292 case BFD_RELOC_PPC_TPREL16_LO:
3293 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3294 break;
3295 case BFD_RELOC_PPC_GOT_DTPREL16:
3296 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3297 case BFD_RELOC_PPC_GOT_TPREL16:
3298 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3299 break;
3300 default:
3301 as_bad (_("unsupported relocation for DS offset field"));
3302 break;
3303 }
3304 }
3305#endif
0baf16f2 3306
252b5132
RH		 3307 /* We need to generate a fixup for this expression. */
3308 if (fc >= MAX_INSN_FIXUPS)
3309 as_fatal (_("too many fixups"));
3310 fixups[fc].exp = ex;
727fc41e 3311 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 3312 fixups[fc].reloc = reloc;
3313 ++fc;
3314 }
252b5132
RH		 3315
3316 if (need_paren)
3317 {
3318 endc = ')';
3319 need_paren = 0;
c3d65c1c
BE		 3320 /* If expecting more operands, then we want to see "),". */
3321 if (*str == endc && opindex_ptr[1] != 0)
3322 {
3323 do
3324 ++str;
3325 while (ISSPACE (*str));
3326 endc = ',';
3327 }
252b5132
RH		 3328 }
3329 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3330 {
3331 endc = '(';
3332 need_paren = 1;
3333 }
3334 else
3335 endc = ',';
3336
3337 /* The call to expression should have advanced str past any
3338 whitespace. */
3339 if (*str != endc
3340 && (endc != ',' || *str != '\0'))
3341 {
5a938047
AM		 3342 if (*str == '\0')
3343 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3344 else
3345 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 3346 break;
3347 }
3348
3349 if (*str != '\0')
3350 ++str;
3351 }
3352
3882b010 3353 while (ISSPACE (*str))
252b5132
RH		 3354 ++str;
3355
3356 if (*str != '\0')
3357 as_bad (_("junk at end of line: `%s'"), str);
3358
dc1d03fc 3359#ifdef OBJ_ELF
b9c361e0 3360 /* Do we need/want an APUinfo section? */
4faf939a
JM		 3361 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3362 && !ppc_obj64)
6a0c61b7
EZ		 3363 {
3364 /* These are all version "1". */
3365 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 3366 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 3367 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 3368 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 3369 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 3370 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 3371 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 3372 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 3373 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 3374 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 3375 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 3376 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 3377 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 3378 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
fbd94057
MR		 3379 /* Only set the VLE flag if the instruction has been pulled via
3380 the VLE instruction set. This way the flag is guaranteed to
3381 be set for VLE-only instructions or for VLE-only processors,
3382 however it'll remain clear for dual-mode instructions on
3383 dual-mode and, more importantly, standard-mode processors. */
3384 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
b9c361e0 3385 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
6a0c61b7 3386 }
dc1d03fc 3387#endif
6a0c61b7 3388
252b5132 3389 /* Write out the instruction. */
b9c361e0
JL		 3390 /* Differentiate between two and four byte insns. */
3391 if (ppc_mach () == bfd_mach_ppc_vle)
3392 {
3393 if (PPC_OP_SE_VLE (insn))
3394 insn_length = 2;
3395 else
3396 insn_length = 4;
3397 addr_mod = frag_now_fix () & 1;
3398 }
3399 else
3400 {
3401 insn_length = 4;
3402 addr_mod = frag_now_fix () & 3;
3403 }
3404 /* All instructions can start on a 2 byte boundary for VLE. */
3405 f = frag_more (insn_length);
09b935ac 3406 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
b9c361e0
JL		 3407 {
3408 if (ppc_mach() == bfd_mach_ppc_vle)
3409 as_bad (_("instruction address is not a multiple of 2"));
3410 else
3411 as_bad (_("instruction address is not a multiple of 4"));
3412 }
09b935ac
AM		 3413 frag_now->insn_addr = addr_mod;
3414 frag_now->has_code = 1;
b9c361e0 3415 md_number_to_chars (f, insn, insn_length);
bf7279d5
AM		 3416 last_insn = insn;
3417 last_seg = now_seg;
3418 last_subseg = now_subseg;
252b5132 3419
5d6f4f16 3420#ifdef OBJ_ELF
b9c361e0 3421 dwarf2_emit_insn (insn_length);
5d6f4f16
GK		 3422#endif
3423
3b8b57a9 3424 /* Create any fixups. */
252b5132
RH		 3425 for (i = 0; i < fc; i++)
3426 {
3b8b57a9 3427 fixS *fixP;
62ebcb5c 3428 if (fixups[i].reloc != BFD_RELOC_NONE)
252b5132 3429 {
99a814a1 3430 reloc_howto_type *reloc_howto;
252b5132
RH		 3431 int size;
3432 int offset;
252b5132 3433
99a814a1 3434 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3435 if (!reloc_howto)
3436 abort ();
3437
3438 size = bfd_get_reloc_size (reloc_howto);
3b8b57a9 3439 offset = target_big_endian ? (insn_length - size) : 0;
252b5132 3440
99a814a1
AM		 3441 fixP = fix_new_exp (frag_now,
3442 f - frag_now->fr_literal + offset,
3443 size,
3444 &fixups[i].exp,
3445 reloc_howto->pc_relative,
252b5132 3446 fixups[i].reloc);
252b5132
RH		 3447 }
3448 else
727fc41e
AM		 3449 {
3450 const struct powerpc_operand *operand;
3451
3452 operand = &powerpc_operands[fixups[i].opindex];
3b8b57a9
AM		 3453 fixP = fix_new_exp (frag_now,
3454 f - frag_now->fr_literal,
3455 insn_length,
3456 &fixups[i].exp,
3457 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
62ebcb5c 3458 BFD_RELOC_NONE);
727fc41e 3459 }
3b8b57a9 3460 fixP->fx_pcrel_adjust = fixups[i].opindex;
252b5132
RH		 3461 }
3462}
3463
3464/* Handle a macro. Gather all the operands, transform them as
3465 described by the macro, and call md_assemble recursively. All the
3466 operands are separated by commas; we don't accept parentheses
3467 around operands here. */
3468
3469static void
98027b10 3470ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3471{
3472 char *operands[10];
3473 unsigned int count;
3474 char *s;
3475 unsigned int len;
3476 const char *format;
db557034 3477 unsigned int arg;
252b5132
RH		 3478 char *send;
3479 char *complete;
3480
3481 /* Gather the users operands into the operands array. */
3482 count = 0;
3483 s = str;
3484 while (1)
3485 {
3486 if (count >= sizeof operands / sizeof operands[0])
3487 break;
3488 operands[count++] = s;
3489 s = strchr (s, ',');
3490 if (s == (char *) NULL)
3491 break;
3492 *s++ = '\0';
81d4177b 3493 }
252b5132
RH		 3494
3495 if (count != macro->operands)
3496 {
3497 as_bad (_("wrong number of operands"));
3498 return;
3499 }
3500
3501 /* Work out how large the string must be (the size is unbounded
3502 because it includes user input). */
3503 len = 0;
3504 format = macro->format;
3505 while (*format != '\0')
3506 {
3507 if (*format != '%')
3508 {
3509 ++len;
3510 ++format;
3511 }
3512 else
3513 {
3514 arg = strtol (format + 1, &send, 10);
db557034 3515 know (send != format && arg < count);
252b5132
RH		 3516 len += strlen (operands[arg]);
3517 format = send;
3518 }
3519 }
3520
3521 /* Put the string together. */
e1fa0163 3522 complete = s = (char *) xmalloc (len + 1);
252b5132
RH		 3523 format = macro->format;
3524 while (*format != '\0')
3525 {
3526 if (*format != '%')
3527 *s++ = *format++;
3528 else
3529 {
3530 arg = strtol (format + 1, &send, 10);
3531 strcpy (s, operands[arg]);
3532 s += strlen (s);
3533 format = send;
3534 }
3535 }
3536 *s = '\0';
3537
3538 /* Assemble the constructed instruction. */
3539 md_assemble (complete);
e1fa0163 3540 free (complete);
81d4177b 3541}
252b5132
RH		 3542\f
3543#ifdef OBJ_ELF
18ae9cc1 3544/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3545
3546int
98027b10 3547ppc_section_type (char *str, size_t len)
252b5132 3548{
9de8d8f1
RH		 3549 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3550 return SHT_ORDERED;
252b5132 3551
9de8d8f1 3552 return -1;
252b5132
RH		 3553}
3554
3555int
1239de13 3556ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3557{
3558 if (type == SHT_ORDERED)
3559 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3560
252b5132
RH		 3561 return flags;
3562}
3563#endif /* OBJ_ELF */
3564
3565\f
3566/* Pseudo-op handling. */
3567
3568/* The .byte pseudo-op. This is similar to the normal .byte
3569 pseudo-op, but it can also take a single ASCII string. */
3570
3571static void
98027b10 3572ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132 3573{
bf7279d5
AM		 3574 int count = 0;
3575
252b5132
RH		 3576 if (*input_line_pointer != '\"')
3577 {
3578 cons (1);
3579 return;
3580 }
3581
3582 /* Gather characters. A real double quote is doubled. Unusual
3583 characters are not permitted. */
3584 ++input_line_pointer;
3585 while (1)
3586 {
3587 char c;
3588
3589 c = *input_line_pointer++;
3590
3591 if (c == '\"')
3592 {
3593 if (*input_line_pointer != '\"')
3594 break;
3595 ++input_line_pointer;
3596 }
3597
3598 FRAG_APPEND_1_CHAR (c);
bf7279d5 3599 ++count;
252b5132
RH		 3600 }
3601
bf7279d5
AM		 3602 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3603 as_warn (_("data in executable section"));
252b5132
RH		 3604 demand_empty_rest_of_line ();
3605}
3606\f
3607#ifdef OBJ_XCOFF
3608
3609/* XCOFF specific pseudo-op handling. */
3610
3611/* This is set if we are creating a .stabx symbol, since we don't want
3612 to handle symbol suffixes for such symbols. */
b34976b6 3613static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3614
3615/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3616 symbols in the .bss segment as though they were local common
67c1ffbe 3617 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3618 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3619
3620static void
98027b10 3621ppc_comm (int lcomm)
252b5132
RH		 3622{
3623 asection *current_seg = now_seg;
3624 subsegT current_subseg = now_subseg;
3625 char *name;
3626 char endc;
3627 char *end_name;
3628 offsetT size;
3629 offsetT align;
3630 symbolS *lcomm_sym = NULL;
3631 symbolS *sym;
3632 char *pfrag;
3633
d02603dc 3634 endc = get_symbol_name (&name);
252b5132 3635 end_name = input_line_pointer;
d02603dc 3636 (void) restore_line_pointer (endc);
252b5132
RH		 3637
3638 if (*input_line_pointer != ',')
3639 {
3640 as_bad (_("missing size"));
3641 ignore_rest_of_line ();
3642 return;
3643 }
3644 ++input_line_pointer;
3645
3646 size = get_absolute_expression ();
3647 if (size < 0)
3648 {
3649 as_bad (_("negative size"));
3650 ignore_rest_of_line ();
3651 return;
3652 }
3653
3654 if (! lcomm)
3655 {
3656 /* The third argument to .comm is the alignment. */
3657 if (*input_line_pointer != ',')
1ad63b2f 3658 align = 2;
252b5132
RH		 3659 else
3660 {
3661 ++input_line_pointer;
3662 align = get_absolute_expression ();
3663 if (align <= 0)
3664 {
3665 as_warn (_("ignoring bad alignment"));
1ad63b2f 3666 align = 2;
252b5132
RH		 3667 }
3668 }
3669 }
3670 else
3671 {
3672 char *lcomm_name;
3673 char lcomm_endc;
3674
252b5132
RH		 3675 /* The third argument to .lcomm appears to be the real local
3676 common symbol to create. References to the symbol named in
3677 the first argument are turned into references to the third
3678 argument. */
3679 if (*input_line_pointer != ',')
3680 {
3681 as_bad (_("missing real symbol name"));
3682 ignore_rest_of_line ();
3683 return;
3684 }
3685 ++input_line_pointer;
3686
d02603dc 3687 lcomm_endc = get_symbol_name (&lcomm_name);
81d4177b 3688
252b5132
RH		 3689 lcomm_sym = symbol_find_or_make (lcomm_name);
3690
d02603dc 3691 (void) restore_line_pointer (lcomm_endc);
3c02c47f
DE		 3692
3693 /* The fourth argument to .lcomm is the alignment. */
3694 if (*input_line_pointer != ',')
3695 {
3696 if (size <= 4)
3697 align = 2;
3698 else
3699 align = 3;
3700 }
3701 else
3702 {
3703 ++input_line_pointer;
3704 align = get_absolute_expression ();
3705 if (align <= 0)
3706 {
3707 as_warn (_("ignoring bad alignment"));
3708 align = 2;
3709 }
3710 }
252b5132
RH		 3711 }
3712
3713 *end_name = '\0';
3714 sym = symbol_find_or_make (name);
3715 *end_name = endc;
3716
3717 if (S_IS_DEFINED (sym)
3718 || S_GET_VALUE (sym) != 0)
3719 {
3720 as_bad (_("attempt to redefine symbol"));
3721 ignore_rest_of_line ();
3722 return;
3723 }
81d4177b 3724
252b5132 3725 record_alignment (bss_section, align);
81d4177b 3726
252b5132
RH		 3727 if (! lcomm
3728 || ! S_IS_DEFINED (lcomm_sym))
3729 {
3730 symbolS *def_sym;
3731 offsetT def_size;
3732
3733 if (! lcomm)
3734 {
3735 def_sym = sym;
3736 def_size = size;
3737 S_SET_EXTERNAL (sym);
3738 }
3739 else
3740 {
809ffe0d 3741 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3742 def_sym = lcomm_sym;
3743 def_size = 0;
3744 }
3745
3746 subseg_set (bss_section, 1);
3747 frag_align (align, 0, 0);
81d4177b 3748
809ffe0d 3749 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3750 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3751 def_size, (char *) NULL);
3752 *pfrag = 0;
3753 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3754 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3755 }
3756 else if (lcomm)
3757 {
3758 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3759 symbol_get_frag (lcomm_sym)->fr_offset =
3760 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3761 &~ ((1 << align) - 1));
809ffe0d
ILT		 3762 if (align > symbol_get_tc (lcomm_sym)->align)
3763 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3764 }
3765
3766 if (lcomm)
3767 {
3768 /* Make sym an offset from lcomm_sym. */
3769 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3770 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3771 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3772 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3773 }
3774
3775 subseg_set (current_seg, current_subseg);
3776
3777 demand_empty_rest_of_line ();
3778}
3779
3780/* The .csect pseudo-op. This switches us into a different
3781 subsegment. The first argument is a symbol whose value is the
3782 start of the .csect. In COFF, csect symbols get special aux
3783 entries defined by the x_csect field of union internal_auxent. The
3784 optional second argument is the alignment (the default is 2). */
3785
3786static void
98027b10 3787ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3788{
3789 char *name;
3790 char endc;
3791 symbolS *sym;
931e13a6 3792 offsetT align;
252b5132 3793
d02603dc 3794 endc = get_symbol_name (&name);
81d4177b 3795
252b5132
RH		 3796 sym = symbol_find_or_make (name);
3797
d02603dc 3798 (void) restore_line_pointer (endc);
252b5132
RH		 3799
3800 if (S_GET_NAME (sym)[0] == '\0')
3801 {
3802 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3803 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3804 }
3805
931e13a6 3806 align = 2;
252b5132
RH		 3807 if (*input_line_pointer == ',')
3808 {
3809 ++input_line_pointer;
931e13a6 3810 align = get_absolute_expression ();
252b5132
RH		 3811 }
3812
931e13a6
AM		 3813 ppc_change_csect (sym, align);
3814
252b5132
RH		 3815 demand_empty_rest_of_line ();
3816}
3817
3818/* Change to a different csect. */
3819
3820static void
98027b10 3821ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3822{
3823 if (S_IS_DEFINED (sym))
809ffe0d 3824 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3825 else
3826 {
3827 symbolS **list_ptr;
3828 int after_toc;
3829 int hold_chunksize;
3830 symbolS *list;
931e13a6
AM		 3831 int is_code;
3832 segT sec;
252b5132
RH		 3833
3834 /* This is a new csect. We need to look at the symbol class to
3835 figure out whether it should go in the text section or the
3836 data section. */
3837 after_toc = 0;
931e13a6 3838 is_code = 0;
96d56e9f 3839 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3840 {
3841 case XMC_PR:
3842 case XMC_RO:
3843 case XMC_DB:
3844 case XMC_GL:
3845 case XMC_XO:
3846 case XMC_SV:
3847 case XMC_TI:
3848 case XMC_TB:
3849 S_SET_SEGMENT (sym, text_section);
809ffe0d 3850 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3851 ++ppc_text_subsegment;
3852 list_ptr = &ppc_text_csects;
931e13a6 3853 is_code = 1;
252b5132
RH		 3854 break;
3855 case XMC_RW:
3856 case XMC_TC0:
3857 case XMC_TC:
3858 case XMC_DS:
3859 case XMC_UA:
3860 case XMC_BS:
3861 case XMC_UC:
3862 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3863 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3864 == ppc_data_subsegment))
252b5132
RH		 3865 after_toc = 1;
3866 S_SET_SEGMENT (sym, data_section);
809ffe0d 3867 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3868 ++ppc_data_subsegment;
3869 list_ptr = &ppc_data_csects;
3870 break;
3871 default:
3872 abort ();
3873 }
3874
3875 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3876 changing subsegments, so that we don't use a lot of memory
3877 space for what may be a small section. */
252b5132
RH		 3878 hold_chunksize = chunksize;
3879 chunksize = 64;
3880
931e13a6
AM		 3881 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3882 symbol_get_tc (sym)->subseg);
252b5132
RH		 3883
3884 chunksize = hold_chunksize;
3885
3886 if (after_toc)
3887 ppc_after_toc_frag = frag_now;
3888
931e13a6
AM		 3889 record_alignment (sec, align);
3890 if (is_code)
3891 frag_align_code (align, 0);
3892 else
3893 frag_align (align, 0, 0);
3894
809ffe0d 3895 symbol_set_frag (sym, frag_now);
252b5132
RH		 3896 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3897
931e13a6 3898 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3899 symbol_get_tc (sym)->output = 1;
3900 symbol_get_tc (sym)->within = sym;
81d4177b 3901
252b5132 3902 for (list = *list_ptr;
809ffe0d
ILT		 3903 symbol_get_tc (list)->next != (symbolS *) NULL;
3904 list = symbol_get_tc (list)->next)
252b5132 3905 ;
809ffe0d 3906 symbol_get_tc (list)->next = sym;
81d4177b 3907
252b5132 3908 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3909 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3910 &symbol_lastP);
252b5132
RH		 3911 }
3912
3913 ppc_current_csect = sym;
3914}
3915
85645aed
TG		 3916static void
3917ppc_change_debug_section (unsigned int idx, subsegT subseg)
3918{
3919 segT sec;
3920 flagword oldflags;
3921 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3922
3923 sec = subseg_new (dw->name, subseg);
3924 oldflags = bfd_get_section_flags (stdoutput, sec);
3925 if (oldflags == SEC_NO_FLAGS)
3926 {
3927 /* Just created section. */
3928 gas_assert (dw_sections[idx].sect == NULL);
3929
3930 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3931 bfd_set_section_alignment (stdoutput, sec, 0);
3932 dw_sections[idx].sect = sec;
3933 }
3934
3935 /* Not anymore in a csect. */
3936 ppc_current_csect = NULL;
3937}
3938
3939/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3940 .dwsect flag [, opt-label ]
3941*/
3942
3943static void
3944ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3945{
3946 offsetT flag;
3947 symbolS *opt_label;
3948 const struct xcoff_dwsect_name *dw;
3949 struct dw_subsection *subseg;
3950 struct dw_section *dws;
3951 int i;
3952
3953 /* Find section. */
3954 flag = get_absolute_expression ();
3955 dw = NULL;
3956 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3957 if (xcoff_dwsect_names[i].flag == flag)
3958 {
3959 dw = &xcoff_dwsect_names[i];
3960 break;
3961 }
3962
3963 /* Parse opt-label. */
3964 if (*input_line_pointer == ',')
3965 {
d02603dc 3966 char *label;
85645aed
TG		 3967 char c;
3968
3969 ++input_line_pointer;
3970
d02603dc 3971 c = get_symbol_name (&label);
85645aed 3972 opt_label = symbol_find_or_make (label);
d02603dc 3973 (void) restore_line_pointer (c);
85645aed
TG		 3974 }
3975 else
3976 opt_label = NULL;
3977
3978 demand_empty_rest_of_line ();
3979
3980 /* Return now in case of unknown subsection. */
3981 if (dw == NULL)
3982 {
d6ed37ed 3983 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
85645aed
TG		 3984 (unsigned)flag);
3985 return;
3986 }
3987
3988 /* Find the subsection. */
3989 dws = &dw_sections[i];
3990 subseg = NULL;
3991 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3992 {
3993 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3994 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3995 {
3996 as_bad (_("label %s was not defined in this dwarf section"),
3997 S_GET_NAME (opt_label));
3998 subseg = dws->anon_subseg;
3999 opt_label = NULL;
4000 }
4001 else
4002 subseg = symbol_get_tc (opt_label)->u.dw;
4003 }
4004
4005 if (subseg != NULL)
4006 {
4007 /* Switch to the subsection. */
4008 ppc_change_debug_section (i, subseg->subseg);
4009 }
4010 else
4011 {
4012 /* Create a new dw subsection. */
4013 subseg = (struct dw_subsection *)
4014 xmalloc (sizeof (struct dw_subsection));
4015
4016 if (opt_label == NULL)
4017 {
4018 /* The anonymous one. */
4019 subseg->subseg = 0;
4020 subseg->link = NULL;
4021 dws->anon_subseg = subseg;
4022 }
4023 else
4024 {
4025 /* A named one. */
4026 if (dws->list_subseg != NULL)
4027 subseg->subseg = dws->list_subseg->subseg + 1;
4028 else
4029 subseg->subseg = 1;
4030
4031 subseg->link = dws->list_subseg;
4032 dws->list_subseg = subseg;
4033 symbol_get_tc (opt_label)->u.dw = subseg;
4034 }
4035
4036 ppc_change_debug_section (i, subseg->subseg);
4037
4038 if (dw->def_size)
4039 {
4040 /* Add the length field. */
4041 expressionS *exp = &subseg->end_exp;
4042 int sz;
4043
4044 if (opt_label != NULL)
4045 symbol_set_value_now (opt_label);
4046
4047 /* Add the length field. Note that according to the AIX assembler
4048 manual, the size of the length field is 4 for powerpc32 but
4049 12 for powerpc64. */
4050 if (ppc_obj64)
4051 {
4052 /* Write the 64bit marker. */
4053 md_number_to_chars (frag_more (4), -1, 4);
4054 }
4055
4056 exp->X_op = O_subtract;
4057 exp->X_op_symbol = symbol_temp_new_now ();
4058 exp->X_add_symbol = symbol_temp_make ();
4059
4060 sz = ppc_obj64 ? 8 : 4;
4061 exp->X_add_number = -sz;
4062 emit_expr (exp, sz);
4063 }
4064 }
4065}
4066
252b5132
RH		 4067/* This function handles the .text and .data pseudo-ops. These
4068 pseudo-ops aren't really used by XCOFF; we implement them for the
4069 convenience of people who aren't used to XCOFF. */
4070
4071static void
98027b10 4072ppc_section (int type)
252b5132
RH		 4073{
4074 const char *name;
4075 symbolS *sym;
4076
4077 if (type == 't')
4078 name = ".text[PR]";
4079 else if (type == 'd')
4080 name = ".data[RW]";
4081 else
4082 abort ();
4083
4084 sym = symbol_find_or_make (name);
4085
931e13a6 4086 ppc_change_csect (sym, 2);
252b5132
RH		 4087
4088 demand_empty_rest_of_line ();
4089}
4090
4091/* This function handles the .section pseudo-op. This is mostly to
4092 give an error, since XCOFF only supports .text, .data and .bss, but
4093 we do permit the user to name the text or data section. */
4094
4095static void
98027b10 4096ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4097{
4098 char *user_name;
4099 const char *real_name;
4100 char c;
4101 symbolS *sym;
4102
d02603dc 4103 c = get_symbol_name (&user_name);
252b5132
RH		 4104
4105 if (strcmp (user_name, ".text") == 0)
4106 real_name = ".text[PR]";
4107 else if (strcmp (user_name, ".data") == 0)
4108 real_name = ".data[RW]";
4109 else
4110 {
d6ed37ed 4111 as_bad (_("the XCOFF file format does not support arbitrary sections"));
d02603dc 4112 (void) restore_line_pointer (c);
252b5132
RH		 4113 ignore_rest_of_line ();
4114 return;
4115 }
4116
d02603dc 4117 (void) restore_line_pointer (c);
252b5132
RH		 4118
4119 sym = symbol_find_or_make (real_name);
4120
931e13a6 4121 ppc_change_csect (sym, 2);
252b5132
RH		 4122
4123 demand_empty_rest_of_line ();
4124}
4125
4126/* The .extern pseudo-op. We create an undefined symbol. */
4127
4128static void
98027b10 4129ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4130{
4131 char *name;
4132 char endc;
4133
d02603dc 4134 endc = get_symbol_name (&name);
252b5132
RH		 4135
4136 (void) symbol_find_or_make (name);
4137
d02603dc 4138 (void) restore_line_pointer (endc);
252b5132
RH		 4139
4140 demand_empty_rest_of_line ();
4141}
4142
4143/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4144
4145static void
98027b10 4146ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4147{
4148 char *name;
4149 char endc;
4150 symbolS *sym;
4151
d02603dc 4152 endc = get_symbol_name (&name);
252b5132
RH		 4153
4154 sym = symbol_find_or_make (name);
4155
d02603dc 4156 (void) restore_line_pointer (endc);
252b5132 4157
809ffe0d 4158 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4159
4160 demand_empty_rest_of_line ();
4161}
4162
c865e45b
RS		 4163/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4164 relocations at the beginning of the current csect.
4165
4166 (In principle, there's no reason why the relocations _have_ to be at
4167 the beginning. Anywhere in the csect would do. However, inserting
4168 at the beginning is what the native assmebler does, and it helps to
4169 deal with cases where the .ref statements follow the section contents.)
4170
4171 ??? .refs don't work for empty .csects. However, the native assembler
4172 doesn't report an error in this case, and neither yet do we. */
4173
4174static void
4175ppc_ref (int ignore ATTRIBUTE_UNUSED)
4176{
4177 char *name;
4178 char c;
4179
4180 if (ppc_current_csect == NULL)
4181 {
4182 as_bad (_(".ref outside .csect"));
4183 ignore_rest_of_line ();
4184 return;
4185 }
4186
4187 do
4188 {
d02603dc 4189 c = get_symbol_name (&name);
c865e45b
RS		 4190
4191 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4192 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4193
4194 *input_line_pointer = c;
d02603dc 4195 SKIP_WHITESPACE_AFTER_NAME ();
c865e45b
RS		 4196 c = *input_line_pointer;
4197 if (c == ',')
4198 {
4199 input_line_pointer++;
4200 SKIP_WHITESPACE ();
4201 if (is_end_of_line[(unsigned char) *input_line_pointer])
4202 {
4203 as_bad (_("missing symbol name"));
4204 ignore_rest_of_line ();
4205 return;
4206 }
4207 }
4208 }
4209 while (c == ',');
4210
4211 demand_empty_rest_of_line ();
4212}
4213
252b5132
RH		 4214/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4215 although I don't know why it bothers. */
4216
4217static void
98027b10 4218ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4219{
4220 char *name;
4221 char endc;
4222 symbolS *sym;
4223 int len;
4224
d02603dc 4225 endc = get_symbol_name (&name);
252b5132
RH		 4226
4227 sym = symbol_find_or_make (name);
4228
d02603dc 4229 (void) restore_line_pointer (endc);
252b5132
RH		 4230
4231 if (*input_line_pointer != ',')
4232 {
4233 as_bad (_("missing rename string"));
4234 ignore_rest_of_line ();
4235 return;
4236 }
4237 ++input_line_pointer;
4238
809ffe0d 4239 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 4240
4241 demand_empty_rest_of_line ();
4242}
4243
4244/* The .stabx pseudo-op. This is similar to a normal .stabs
4245 pseudo-op, but slightly different. A sample is
4246 .stabx "main:F-1",.main,142,0
4247 The first argument is the symbol name to create. The second is the
4248 value, and the third is the storage class. The fourth seems to be
4249 always zero, and I am assuming it is the type. */
4250
4251static void
98027b10 4252ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4253{
4254 char *name;
4255 int len;
4256 symbolS *sym;
4257 expressionS exp;
4258
4259 name = demand_copy_C_string (&len);
4260
4261 if (*input_line_pointer != ',')
4262 {
4263 as_bad (_("missing value"));
4264 return;
4265 }
4266 ++input_line_pointer;
4267
b34976b6 4268 ppc_stab_symbol = TRUE;
252b5132 4269 sym = symbol_make (name);
b34976b6 4270 ppc_stab_symbol = FALSE;
252b5132 4271
809ffe0d 4272 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 4273
4274 (void) expression (&exp);
4275
4276 switch (exp.X_op)
4277 {
4278 case O_illegal:
4279 case O_absent:
4280 case O_big:
4281 as_bad (_("illegal .stabx expression; zero assumed"));
4282 exp.X_add_number = 0;
4283 /* Fall through. */
4284 case O_constant:
4285 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 4286 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 4287 break;
4288
4289 case O_symbol:
4290 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 4291 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4292 else
4293 {
4294 S_SET_VALUE (sym,
4295 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 4296 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 4297 }
4298 break;
4299
4300 default:
4301 /* The value is some complex expression. This will probably
99a814a1
AM		 4302 fail at some later point, but this is probably the right
4303 thing to do here. */
809ffe0d 4304 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4305 break;
4306 }
4307
4308 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4309 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4310
4311 if (*input_line_pointer != ',')
4312 {
4313 as_bad (_("missing class"));
4314 return;
4315 }
4316 ++input_line_pointer;
4317
4318 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4319
4320 if (*input_line_pointer != ',')
4321 {
4322 as_bad (_("missing type"));
4323 return;
4324 }
4325 ++input_line_pointer;
4326
4327 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4328
809ffe0d 4329 symbol_get_tc (sym)->output = 1;
252b5132 4330
c734e7e3
TG		 4331 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4332 {
4333 /* In this case :
252b5132 4334
c734e7e3
TG		 4335 .bs name
4336 .stabx "z",arrays_,133,0
4337 .es
99a814a1 4338
c734e7e3 4339 .comm arrays_,13768,3
99a814a1 4340
c734e7e3
TG		 4341 resolve_symbol_value will copy the exp's "within" into sym's when the
4342 offset is 0. Since this seems to be corner case problem,
4343 only do the correction for storage class C_STSYM. A better solution
4344 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 4345
c734e7e3
TG		 4346 if (exp.X_op == O_symbol)
4347 {
4348 if (ppc_current_block == NULL)
4349 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 4350
c734e7e3
TG		 4351 symbol_get_tc (sym)->within = ppc_current_block;
4352 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4353 }
4354 }
99a814a1 4355
252b5132
RH		 4356 if (exp.X_op != O_symbol
4357 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4358 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4359 ppc_frob_label (sym);
4360 else
4361 {
4362 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4363 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4364 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4365 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4366 }
4367
4368 demand_empty_rest_of_line ();
4369}
4370
4371/* The .function pseudo-op. This takes several arguments. The first
4372 argument seems to be the external name of the symbol. The second
67c1ffbe 4373 argument seems to be the label for the start of the function. gcc
252b5132
RH		 4374 uses the same name for both. I have no idea what the third and
4375 fourth arguments are meant to be. The optional fifth argument is
4376 an expression for the size of the function. In COFF this symbol
4377 gets an aux entry like that used for a csect. */
4378
4379static void
98027b10 4380ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4381{
4382 char *name;
4383 char endc;
4384 char *s;
4385 symbolS *ext_sym;
4386 symbolS *lab_sym;
4387
d02603dc 4388 endc = get_symbol_name (&name);
252b5132
RH		 4389
4390 /* Ignore any [PR] suffix. */
4391 name = ppc_canonicalize_symbol_name (name);
4392 s = strchr (name, '[');
4393 if (s != (char *) NULL
4394 && strcmp (s + 1, "PR]") == 0)
4395 *s = '\0';
4396
4397 ext_sym = symbol_find_or_make (name);
4398
d02603dc 4399 (void) restore_line_pointer (endc);
252b5132
RH		 4400
4401 if (*input_line_pointer != ',')
4402 {
4403 as_bad (_("missing symbol name"));
4404 ignore_rest_of_line ();
4405 return;
4406 }
4407 ++input_line_pointer;
4408
d02603dc 4409 endc = get_symbol_name (&name);
252b5132
RH		 4410
4411 lab_sym = symbol_find_or_make (name);
4412
d02603dc 4413 (void) restore_line_pointer (endc);
252b5132
RH		 4414
4415 if (ext_sym != lab_sym)
4416 {
809ffe0d
ILT		 4417 expressionS exp;
4418
4419 exp.X_op = O_symbol;
4420 exp.X_add_symbol = lab_sym;
4421 exp.X_op_symbol = NULL;
4422 exp.X_add_number = 0;
4423 exp.X_unsigned = 0;
4424 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4425 }
4426
96d56e9f
NC		 4427 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4428 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4429 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4430
4431 if (*input_line_pointer == ',')
4432 {
91d6fa6a 4433 expressionS exp;
252b5132
RH		 4434
4435 /* Ignore the third argument. */
4436 ++input_line_pointer;
91d6fa6a 4437 expression (& exp);
252b5132
RH		 4438 if (*input_line_pointer == ',')
4439 {
4440 /* Ignore the fourth argument. */
4441 ++input_line_pointer;
91d6fa6a 4442 expression (& exp);
252b5132
RH		 4443 if (*input_line_pointer == ',')
4444 {
4445 /* The fifth argument is the function size. */
4446 ++input_line_pointer;
85645aed
TG		 4447 symbol_get_tc (ext_sym)->u.size = symbol_new
4448 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4449 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4450 }
4451 }
4452 }
4453
4454 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4455 SF_SET_FUNCTION (ext_sym);
4456 SF_SET_PROCESS (ext_sym);
4457 coff_add_linesym (ext_sym);
4458
4459 demand_empty_rest_of_line ();
4460}
4461
4462/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4463 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4464 with the correct line number */
5d6255fe 4465
8642cce8 4466static symbolS *saved_bi_sym = 0;
252b5132
RH		 4467
4468static void
98027b10 4469ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4470{
4471 symbolS *sym;
4472
4473 sym = symbol_make (".bf");
4474 S_SET_SEGMENT (sym, text_section);
809ffe0d 4475 symbol_set_frag (sym, frag_now);
252b5132
RH		 4476 S_SET_VALUE (sym, frag_now_fix ());
4477 S_SET_STORAGE_CLASS (sym, C_FCN);
4478
4479 coff_line_base = get_absolute_expression ();
4480
4481 S_SET_NUMBER_AUXILIARY (sym, 1);
4482 SA_SET_SYM_LNNO (sym, coff_line_base);
4483
8642cce8 4484 /* Line number for bi. */
5d6255fe 4485 if (saved_bi_sym)
8642cce8
TR		 4486 {
4487 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4488 saved_bi_sym = 0;
4489 }
5d6255fe 4490
8642cce8 4491
809ffe0d 4492 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4493
4494 ppc_frob_label (sym);
4495
4496 demand_empty_rest_of_line ();
4497}
4498
4499/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4500 ".ef", except that the line number is absolute, not relative to the
4501 most recent ".bf" symbol. */
4502
4503static void
98027b10 4504ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4505{
4506 symbolS *sym;
4507
4508 sym = symbol_make (".ef");
4509 S_SET_SEGMENT (sym, text_section);
809ffe0d 4510 symbol_set_frag (sym, frag_now);
252b5132
RH		 4511 S_SET_VALUE (sym, frag_now_fix ());
4512 S_SET_STORAGE_CLASS (sym, C_FCN);
4513 S_SET_NUMBER_AUXILIARY (sym, 1);
4514 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4515 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4516
4517 ppc_frob_label (sym);
4518
4519 demand_empty_rest_of_line ();
4520}
4521
4522/* The .bi and .ei pseudo-ops. These take a string argument and
4523 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4524 the symbol list. The value of .bi will be know when the next .bf
4525 is encountered. */
252b5132
RH		 4526
4527static void
98027b10 4528ppc_biei (int ei)
252b5132
RH		 4529{
4530 static symbolS *last_biei;
4531
4532 char *name;
4533 int len;
4534 symbolS *sym;
4535 symbolS *look;
4536
4537 name = demand_copy_C_string (&len);
4538
4539 /* The value of these symbols is actually file offset. Here we set
4540 the value to the index into the line number entries. In
4541 ppc_frob_symbols we set the fix_line field, which will cause BFD
4542 to do the right thing. */
4543
4544 sym = symbol_make (name);
4545 /* obj-coff.c currently only handles line numbers correctly in the
4546 .text section. */
4547 S_SET_SEGMENT (sym, text_section);
4548 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4549 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4550
4551 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4552 symbol_get_tc (sym)->output = 1;
81d4177b 4553
8642cce8 4554 /* Save bi. */
5d6255fe 4555 if (ei)
8642cce8
TR		 4556 saved_bi_sym = 0;
4557 else
4558 saved_bi_sym = sym;
4559
252b5132
RH		 4560 for (look = last_biei ? last_biei : symbol_rootP;
4561 (look != (symbolS *) NULL
4562 && (S_GET_STORAGE_CLASS (look) == C_FILE
4563 || S_GET_STORAGE_CLASS (look) == C_BINCL
4564 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4565 look = symbol_next (look))
4566 ;
4567 if (look != (symbolS *) NULL)
4568 {
4569 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4570 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4571 last_biei = sym;
4572 }
4573
4574 demand_empty_rest_of_line ();
4575}
4576
4577/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4578 There is one argument, which is a csect symbol. The value of the
4579 .bs symbol is the index of this csect symbol. */
4580
4581static void
98027b10 4582ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4583{
4584 char *name;
4585 char endc;
4586 symbolS *csect;
4587 symbolS *sym;
4588
4589 if (ppc_current_block != NULL)
4590 as_bad (_("nested .bs blocks"));
4591
d02603dc 4592 endc = get_symbol_name (&name);
252b5132
RH		 4593
4594 csect = symbol_find_or_make (name);
4595
d02603dc 4596 (void) restore_line_pointer (endc);
252b5132
RH		 4597
4598 sym = symbol_make (".bs");
4599 S_SET_SEGMENT (sym, now_seg);
4600 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4601 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4602 symbol_get_tc (sym)->output = 1;
252b5132 4603
809ffe0d 4604 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4605
4606 ppc_frob_label (sym);
4607
4608 ppc_current_block = sym;
4609
4610 demand_empty_rest_of_line ();
4611}
4612
4613/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4614
4615static void
98027b10 4616ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4617{
4618 symbolS *sym;
4619
4620 if (ppc_current_block == NULL)
4621 as_bad (_(".es without preceding .bs"));
4622
4623 sym = symbol_make (".es");
4624 S_SET_SEGMENT (sym, now_seg);
4625 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4626 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4627 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4628
4629 ppc_frob_label (sym);
4630
4631 ppc_current_block = NULL;
4632
4633 demand_empty_rest_of_line ();
4634}
4635
4636/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4637 line number. */
4638
4639static void
98027b10 4640ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4641{
4642 symbolS *sym;
4643
4644 sym = symbol_make (".bb");
4645 S_SET_SEGMENT (sym, text_section);
809ffe0d 4646 symbol_set_frag (sym, frag_now);
252b5132
RH		 4647 S_SET_VALUE (sym, frag_now_fix ());
4648 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4649
4650 S_SET_NUMBER_AUXILIARY (sym, 1);
4651 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4652
809ffe0d 4653 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4654
4655 SF_SET_PROCESS (sym);
4656
4657 ppc_frob_label (sym);
4658
4659 demand_empty_rest_of_line ();
4660}
4661
4662/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4663 line number. */
4664
4665static void
98027b10 4666ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4667{
4668 symbolS *sym;
4669
4670 sym = symbol_make (".eb");
4671 S_SET_SEGMENT (sym, text_section);
809ffe0d 4672 symbol_set_frag (sym, frag_now);
252b5132
RH		 4673 S_SET_VALUE (sym, frag_now_fix ());
4674 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4675 S_SET_NUMBER_AUXILIARY (sym, 1);
4676 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4677 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4678
4679 SF_SET_PROCESS (sym);
4680
4681 ppc_frob_label (sym);
4682
4683 demand_empty_rest_of_line ();
4684}
4685
4686/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4687 specified name. */
4688
4689static void
98027b10 4690ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4691{
4692 char *name;
4693 int len;
4694 symbolS *sym;
4695
4696 name = demand_copy_C_string (&len);
4697 sym = symbol_make (name);
4698 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4699 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4700 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4701 S_SET_VALUE (sym, 0);
809ffe0d 4702 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4703
4704 ppc_frob_label (sym);
4705
4706 demand_empty_rest_of_line ();
4707}
4708
4709/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4710
4711static void
98027b10 4712ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4713{
4714 symbolS *sym;
4715
4716 sym = symbol_make (".ec");
4717 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4718 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4719 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4720 S_SET_VALUE (sym, 0);
809ffe0d 4721 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4722
4723 ppc_frob_label (sym);
4724
4725 demand_empty_rest_of_line ();
4726}
4727
4728/* The .toc pseudo-op. Switch to the .toc subsegment. */
4729
4730static void
98027b10 4731ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4732{
4733 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4734 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4735 else
4736 {
4737 subsegT subseg;
4738 symbolS *sym;
4739 symbolS *list;
81d4177b 4740
252b5132
RH		 4741 subseg = ppc_data_subsegment;
4742 ++ppc_data_subsegment;
4743
4744 subseg_new (segment_name (data_section), subseg);
4745 ppc_toc_frag = frag_now;
4746
4747 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4748 symbol_set_frag (sym, frag_now);
252b5132
RH		 4749 S_SET_SEGMENT (sym, data_section);
4750 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4751 symbol_get_tc (sym)->subseg = subseg;
4752 symbol_get_tc (sym)->output = 1;
4753 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4754
4755 ppc_toc_csect = sym;
81d4177b 4756
252b5132 4757 for (list = ppc_data_csects;
809ffe0d
ILT		 4758 symbol_get_tc (list)->next != (symbolS *) NULL;
4759 list = symbol_get_tc (list)->next)
252b5132 4760 ;
809ffe0d 4761 symbol_get_tc (list)->next = sym;
252b5132
RH		 4762
4763 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4764 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4765 &symbol_lastP);
252b5132
RH		 4766 }
4767
4768 ppc_current_csect = ppc_toc_csect;
4769
4770 demand_empty_rest_of_line ();
4771}
4772
4773/* The AIX assembler automatically aligns the operands of a .long or
4774 .short pseudo-op, and we want to be compatible. */
4775
4776static void
98027b10 4777ppc_xcoff_cons (int log_size)
252b5132
RH		 4778{
4779 frag_align (log_size, 0, 0);
4780 record_alignment (now_seg, log_size);
4781 cons (1 << log_size);
4782}
4783
4784static void
98027b10 4785ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4786{
4787 expressionS exp;
4788 int byte_count;
4789
4790 (void) expression (&exp);
4791
4792 if (exp.X_op != O_constant)
4793 {
4794 as_bad (_("non-constant byte count"));
4795 return;
4796 }
4797
4798 byte_count = exp.X_add_number;
4799
4800 if (*input_line_pointer != ',')
4801 {
4802 as_bad (_("missing value"));
4803 return;
4804 }
4805
4806 ++input_line_pointer;
4807 cons (byte_count);
4808}
4809
85645aed
TG		 4810void
4811ppc_xcoff_end (void)
4812{
4813 int i;
4814
4815 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4816 {
4817 struct dw_section *dws = &dw_sections[i];
4818 struct dw_subsection *dwss;
4819
4820 if (dws->anon_subseg)
4821 {
4822 dwss = dws->anon_subseg;
4823 dwss->link = dws->list_subseg;
4824 }
4825 else
4826 dwss = dws->list_subseg;
4827
4828 for (; dwss != NULL; dwss = dwss->link)
4829 if (dwss->end_exp.X_add_symbol != NULL)
4830 {
4831 subseg_set (dws->sect, dwss->subseg);
4832 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4833 }
4834 }
4835}
4836
252b5132 4837#endif /* OBJ_XCOFF */
0baf16f2 4838#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4839\f
4840/* The .tc pseudo-op. This is used when generating either XCOFF or
4841 ELF. This takes two or more arguments.
4842
4843 When generating XCOFF output, the first argument is the name to
4844 give to this location in the toc; this will be a symbol with class
0baf16f2 4845 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4846 this location in the TOC; often there is just one more argument, a
1049f94e 4847 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4848 depends on target word size. A 32-bit target uses 4-byte values, a
4849 64-bit target uses 8-byte values.
252b5132
RH		 4850
4851 When not generating XCOFF output, the arguments are the same, but
4852 the first argument is simply ignored. */
4853
4854static void
98027b10 4855ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4856{
4857#ifdef OBJ_XCOFF
4858
4859 /* Define the TOC symbol name. */
4860 {
4861 char *name;
4862 char endc;
4863 symbolS *sym;
4864
4865 if (ppc_toc_csect == (symbolS *) NULL
4866 || ppc_toc_csect != ppc_current_csect)
4867 {
4868 as_bad (_(".tc not in .toc section"));
4869 ignore_rest_of_line ();
4870 return;
4871 }
4872
d02603dc 4873 endc = get_symbol_name (&name);
252b5132
RH		 4874
4875 sym = symbol_find_or_make (name);
4876
d02603dc 4877 (void) restore_line_pointer (endc);
252b5132
RH		 4878
4879 if (S_IS_DEFINED (sym))
4880 {
4881 symbolS *label;
4882
809ffe0d 4883 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4884 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4885 {
4886 as_bad (_(".tc with no label"));
4887 ignore_rest_of_line ();
4888 return;
4889 }
4890
4891 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4892 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4893 S_SET_VALUE (label, S_GET_VALUE (sym));
4894
4895 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4896 ++input_line_pointer;
4897
4898 return;
4899 }
4900
4901 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4902 symbol_set_frag (sym, frag_now);
252b5132 4903 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4904 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4905 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4906
4907 ppc_frob_label (sym);
4908 }
4909
0baf16f2
AM		 4910#endif /* OBJ_XCOFF */
4911#ifdef OBJ_ELF
9c7977b3 4912 int align;
252b5132
RH		 4913
4914 /* Skip the TOC symbol name. */
4915 while (is_part_of_name (*input_line_pointer)
d13d4015 4916 || *input_line_pointer == ' '
252b5132
RH		 4917 || *input_line_pointer == '['
4918 || *input_line_pointer == ']'
4919 || *input_line_pointer == '{'
4920 || *input_line_pointer == '}')
4921 ++input_line_pointer;
4922
0baf16f2 4923 /* Align to a four/eight byte boundary. */
2b3c4602 4924 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4925 frag_align (align, 0, 0);
4926 record_alignment (now_seg, align);
0baf16f2 4927#endif /* OBJ_ELF */
252b5132
RH		 4928
4929 if (*input_line_pointer != ',')
4930 demand_empty_rest_of_line ();
4931 else
4932 {
4933 ++input_line_pointer;
2b3c4602 4934 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4935 }
4936}
0baf16f2
AM		 4937
4938/* Pseudo-op .machine. */
0baf16f2
AM		 4939
4940static void
98027b10 4941ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4942{
d02603dc 4943 char c;
69c040df
AM		 4944 char *cpu_string;
4945#define MAX_HISTORY 100
fa452fa6 4946 static ppc_cpu_t *cpu_history;
69c040df
AM		 4947 static int curr_hist;
4948
4949 SKIP_WHITESPACE ();
4950
d02603dc
NC		 4951 c = get_symbol_name (&cpu_string);
4952 cpu_string = xstrdup (cpu_string);
4953 (void) restore_line_pointer (c);
69c040df
AM		 4954
4955 if (cpu_string != NULL)
4956 {
fa452fa6 4957 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4958 ppc_cpu_t new_cpu;
69c040df
AM		 4959 char *p;
4960
4961 for (p = cpu_string; *p != 0; p++)
4962 *p = TOLOWER (*p);
4963
4964 if (strcmp (cpu_string, "push") == 0)
4965 {
4966 if (cpu_history == NULL)
4967 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4968
4969 if (curr_hist >= MAX_HISTORY)
4970 as_bad (_(".machine stack overflow"));
4971 else
4972 cpu_history[curr_hist++] = ppc_cpu;
4973 }
4974 else if (strcmp (cpu_string, "pop") == 0)
4975 {
4976 if (curr_hist <= 0)
4977 as_bad (_(".machine stack underflow"));
4978 else
4979 ppc_cpu = cpu_history[--curr_hist];
4980 }
776fc418 4981 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
69fe9ce5 4982 ppc_cpu = new_cpu;
69c040df
AM		 4983 else
4984 as_bad (_("invalid machine `%s'"), cpu_string);
4985
4986 if (ppc_cpu != old_cpu)
4987 ppc_setup_opcodes ();
4988 }
4989
4990 demand_empty_rest_of_line ();
0baf16f2 4991}
0baf16f2 4992#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4993\f
4994#ifdef TE_PE
4995
99a814a1 4996/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4997
4998/* Set the current section. */
4999static void
98027b10 5000ppc_set_current_section (segT new)
252b5132
RH		 5001{
5002 ppc_previous_section = ppc_current_section;
5003 ppc_current_section = new;
5004}
5005
5006/* pseudo-op: .previous
5007 behaviour: toggles the current section with the previous section.
5008 errors: None
99a814a1
AM		 5009 warnings: "No previous section" */
5010
252b5132 5011static void
98027b10 5012ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132 5013{
81d4177b 5014 if (ppc_previous_section == NULL)
252b5132 5015 {
d6ed37ed 5016 as_warn (_("no previous section to return to, ignored."));
252b5132
RH		 5017 return;
5018 }
5019
99a814a1 5020 subseg_set (ppc_previous_section, 0);
252b5132 5021
99a814a1 5022 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 5023}
5024
5025/* pseudo-op: .pdata
5026 behaviour: predefined read only data section
b34976b6 5027 double word aligned
252b5132
RH		 5028 errors: None
5029 warnings: None
5030 initial: .section .pdata "adr3"
b34976b6 5031 a - don't know -- maybe a misprint
252b5132
RH		 5032 d - initialized data
5033 r - readable
5034 3 - double word aligned (that would be 4 byte boundary)
5035
5036 commentary:
5037 Tag index tables (also known as the function table) for exception
99a814a1 5038 handling, debugging, etc. */
252b5132 5039
252b5132 5040static void
98027b10 5041ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 5042{
81d4177b 5043 if (pdata_section == 0)
252b5132
RH		 5044 {
5045 pdata_section = subseg_new (".pdata", 0);
81d4177b 5046
252b5132
RH		 5047 bfd_set_section_flags (stdoutput, pdata_section,
5048 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5049 | SEC_READONLY | SEC_DATA ));
81d4177b 5050
252b5132
RH		 5051 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5052 }
5053 else
5054 {
99a814a1 5055 pdata_section = subseg_new (".pdata", 0);
252b5132 5056 }
99a814a1 5057 ppc_set_current_section (pdata_section);
252b5132
RH		 5058}
5059
5060/* pseudo-op: .ydata
5061 behaviour: predefined read only data section
b34976b6 5062 double word aligned
252b5132
RH		 5063 errors: None
5064 warnings: None
5065 initial: .section .ydata "drw3"
b34976b6 5066 a - don't know -- maybe a misprint
252b5132
RH		 5067 d - initialized data
5068 r - readable
5069 3 - double word aligned (that would be 4 byte boundary)
5070 commentary:
5071 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 5072 debugging, etc. */
5073
252b5132 5074static void
98027b10 5075ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 5076{
81d4177b 5077 if (ydata_section == 0)
252b5132
RH		 5078 {
5079 ydata_section = subseg_new (".ydata", 0);
5080 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 5081 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5082 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 5083
5084 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5085 }
5086 else
5087 {
5088 ydata_section = subseg_new (".ydata", 0);
5089 }
99a814a1 5090 ppc_set_current_section (ydata_section);
252b5132
RH		 5091}
5092
5093/* pseudo-op: .reldata
5094 behaviour: predefined read write data section
b34976b6 5095 double word aligned (4-byte)
252b5132
RH		 5096 FIXME: relocation is applied to it
5097 FIXME: what's the difference between this and .data?
5098 errors: None
5099 warnings: None
5100 initial: .section .reldata "drw3"
5101 d - initialized data
5102 r - readable
5103 w - writeable
5104 3 - double word aligned (that would be 8 byte boundary)
5105
5106 commentary:
5107 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 5108 function descriptors, etc. */
5109
252b5132 5110static void
98027b10 5111ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5112{
5113 if (reldata_section == 0)
5114 {
5115 reldata_section = subseg_new (".reldata", 0);
5116
5117 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 5118 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5119 | SEC_DATA));
252b5132
RH		 5120
5121 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5122 }
5123 else
5124 {
5125 reldata_section = subseg_new (".reldata", 0);
5126 }
99a814a1 5127 ppc_set_current_section (reldata_section);
252b5132
RH		 5128}
5129
5130/* pseudo-op: .rdata
5131 behaviour: predefined read only data section
b34976b6 5132 double word aligned
252b5132
RH		 5133 errors: None
5134 warnings: None
5135 initial: .section .rdata "dr3"
5136 d - initialized data
5137 r - readable
99a814a1
AM		 5138 3 - double word aligned (that would be 4 byte boundary) */
5139
252b5132 5140static void
98027b10 5141ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5142{
5143 if (rdata_section == 0)
5144 {
5145 rdata_section = subseg_new (".rdata", 0);
5146 bfd_set_section_flags (stdoutput, rdata_section,
5147 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5148 | SEC_READONLY | SEC_DATA ));
5149
5150 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5151 }
5152 else
5153 {
5154 rdata_section = subseg_new (".rdata", 0);
5155 }
99a814a1 5156 ppc_set_current_section (rdata_section);
252b5132
RH		 5157}
5158
5159/* pseudo-op: .ualong
81d4177b 5160 behaviour: much like .int, with the exception that no alignment is
b34976b6 5161 performed.
252b5132
RH		 5162 FIXME: test the alignment statement
5163 errors: None
99a814a1
AM		 5164 warnings: None */
5165
252b5132 5166static void
98027b10 5167ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 5168{
99a814a1
AM		 5169 /* Try for long. */
5170 cons (4);
252b5132
RH		 5171}
5172
5173/* pseudo-op: .znop <symbol name>
5174 behaviour: Issue a nop instruction
b34976b6 5175 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 5176 the supplied symbol name.
5177 errors: None
99a814a1
AM		 5178 warnings: Missing symbol name */
5179
252b5132 5180static void
98027b10 5181ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5182{
5183 unsigned long insn;
5184 const struct powerpc_opcode *opcode;
252b5132 5185 char *f;
252b5132 5186 symbolS *sym;
252b5132
RH		 5187 char *symbol_name;
5188 char c;
5189 char *name;
252b5132 5190
99a814a1 5191 /* Strip out the symbol name. */
d02603dc 5192 c = get_symbol_name (&symbol_name);
252b5132 5193
a44e2901 5194 name = xstrdup (symbol_name);
252b5132
RH		 5195
5196 sym = symbol_find_or_make (name);
5197
5198 *input_line_pointer = c;
5199
d02603dc 5200 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 5201
5202 /* Look up the opcode in the hash table. */
5203 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5204
99a814a1 5205 /* Stick in the nop. */
252b5132
RH		 5206 insn = opcode->opcode;
5207
5208 /* Write out the instruction. */
5209 f = frag_more (4);
5210 md_number_to_chars (f, insn, 4);
5211 fix_new (frag_now,
5212 f - frag_now->fr_literal,
5213 4,
5214 sym,
5215 0,
5216 0,
5217 BFD_RELOC_16_GOT_PCREL);
5218
5219}
5220
81d4177b
KH		 5221/* pseudo-op:
5222 behaviour:
5223 errors:
99a814a1
AM		 5224 warnings: */
5225
252b5132 5226static void
98027b10 5227ppc_pe_comm (int lcomm)
252b5132 5228{
98027b10
AM		 5229 char *name;
5230 char c;
5231 char *p;
252b5132 5232 offsetT temp;
98027b10 5233 symbolS *symbolP;
252b5132
RH		 5234 offsetT align;
5235
d02603dc 5236 c = get_symbol_name (&name);
252b5132 5237
99a814a1 5238 /* just after name is now '\0'. */
252b5132
RH		 5239 p = input_line_pointer;
5240 *p = c;
d02603dc 5241 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 5242 if (*input_line_pointer != ',')
5243 {
d6ed37ed 5244 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 5245 ignore_rest_of_line ();
5246 return;
5247 }
5248
5249 input_line_pointer++; /* skip ',' */
5250 if ((temp = get_absolute_expression ()) < 0)
5251 {
5252 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5253 ignore_rest_of_line ();
5254 return;
5255 }
5256
5257 if (! lcomm)
5258 {
5259 /* The third argument to .comm is the alignment. */
5260 if (*input_line_pointer != ',')
5261 align = 3;
5262 else
5263 {
5264 ++input_line_pointer;
5265 align = get_absolute_expression ();
5266 if (align <= 0)
5267 {
5268 as_warn (_("ignoring bad alignment"));
5269 align = 3;
5270 }
5271 }
5272 }
5273
5274 *p = 0;
5275 symbolP = symbol_find_or_make (name);
5276
5277 *p = c;
5278 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5279 {
d6ed37ed 5280 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 5281 S_GET_NAME (symbolP));
5282 ignore_rest_of_line ();
5283 return;
5284 }
5285
5286 if (S_GET_VALUE (symbolP))
5287 {
5288 if (S_GET_VALUE (symbolP) != (valueT) temp)
d6ed37ed 5289 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 5290 S_GET_NAME (symbolP),
5291 (long) S_GET_VALUE (symbolP),
5292 (long) temp);
5293 }
5294 else
5295 {
5296 S_SET_VALUE (symbolP, (valueT) temp);
5297 S_SET_EXTERNAL (symbolP);
86ebace2 5298 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 5299 }
5300
5301 demand_empty_rest_of_line ();
5302}
5303
5304/*
5305 * implement the .section pseudo op:
5306 * .section name {, "flags"}
5307 * ^ ^
5308 * | +--- optional flags: 'b' for bss
5309 * | 'i' for info
5310 * +-- section name 'l' for lib
5311 * 'n' for noload
5312 * 'o' for over
5313 * 'w' for data
5314 * 'd' (apparently m88k for data)
5315 * 'x' for text
5316 * But if the argument is not a quoted string, treat it as a
5317 * subsegment number.
5318 *
5319 * FIXME: this is a copy of the section processing from obj-coff.c, with
5320 * additions/changes for the moto-pas assembler support. There are three
5321 * categories:
5322 *
81d4177b 5323 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 5324 * setting bits that bfd probably neither understands or uses. The
5325 * correct approach (?) will have to incorporate extra fields attached
5326 * to the section to hold the system specific stuff. (krk)
5327 *
5328 * Section Contents:
5329 * 'a' - unknown - referred to in documentation, but no definition supplied
5330 * 'c' - section has code
5331 * 'd' - section has initialized data
5332 * 'u' - section has uninitialized data
5333 * 'i' - section contains directives (info)
5334 * 'n' - section can be discarded
5335 * 'R' - remove section at link time
5336 *
5337 * Section Protection:
5338 * 'r' - section is readable
5339 * 'w' - section is writeable
5340 * 'x' - section is executable
5341 * 's' - section is sharable
5342 *
5343 * Section Alignment:
5344 * '0' - align to byte boundary
5345 * '1' - align to halfword undary
5346 * '2' - align to word boundary
5347 * '3' - align to doubleword boundary
5348 * '4' - align to quadword boundary
5349 * '5' - align to 32 byte boundary
5350 * '6' - align to 64 byte boundary
5351 *
5352 */
5353
5354void
98027b10 5355ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 5356{
99a814a1 5357 /* Strip out the section name. */
252b5132
RH		 5358 char *section_name;
5359 char c;
5360 char *name;
5361 unsigned int exp;
5362 flagword flags;
5363 segT sec;
5364 int align;
5365
d02603dc 5366 c = get_symbol_name (&section_name);
252b5132 5367
a44e2901 5368 name = xstrdup (section_name);
252b5132
RH		 5369
5370 *input_line_pointer = c;
5371
d02603dc 5372 SKIP_WHITESPACE_AFTER_NAME ();
252b5132
RH		 5373
5374 exp = 0;
5375 flags = SEC_NO_FLAGS;
5376
5377 if (strcmp (name, ".idata$2") == 0)
5378 {
5379 align = 0;
5380 }
5381 else if (strcmp (name, ".idata$3") == 0)
5382 {
5383 align = 0;
5384 }
5385 else if (strcmp (name, ".idata$4") == 0)
5386 {
5387 align = 2;
5388 }
5389 else if (strcmp (name, ".idata$5") == 0)
5390 {
5391 align = 2;
5392 }
5393 else if (strcmp (name, ".idata$6") == 0)
5394 {
5395 align = 1;
5396 }
5397 else
99a814a1
AM		 5398 /* Default alignment to 16 byte boundary. */
5399 align = 4;
252b5132
RH		 5400
5401 if (*input_line_pointer == ',')
5402 {
5403 ++input_line_pointer;
5404 SKIP_WHITESPACE ();
5405 if (*input_line_pointer != '"')
5406 exp = get_absolute_expression ();
5407 else
5408 {
5409 ++input_line_pointer;
5410 while (*input_line_pointer != '"'
5411 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5412 {
5413 switch (*input_line_pointer)
5414 {
5415 /* Section Contents */
5416 case 'a': /* unknown */
d6ed37ed 5417 as_bad (_("unsupported section attribute -- 'a'"));
252b5132
RH		 5418 break;
5419 case 'c': /* code section */
81d4177b 5420 flags |= SEC_CODE;
252b5132
RH		 5421 break;
5422 case 'd': /* section has initialized data */
5423 flags |= SEC_DATA;
5424 break;
5425 case 'u': /* section has uninitialized data */
5426 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5427 in winnt.h */
5428 flags |= SEC_ROM;
5429 break;
5430 case 'i': /* section contains directives (info) */
5431 /* FIXME: This is IMAGE_SCN_LNK_INFO
5432 in winnt.h */
5433 flags |= SEC_HAS_CONTENTS;
5434 break;
5435 case 'n': /* section can be discarded */
81d4177b 5436 flags &=~ SEC_LOAD;
252b5132
RH		 5437 break;
5438 case 'R': /* Remove section at link time */
5439 flags |= SEC_NEVER_LOAD;
5440 break;
8d452c78 5441#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5442 /* Section Protection */
5443 case 'r': /* section is readable */
5444 flags |= IMAGE_SCN_MEM_READ;
5445 break;
5446 case 'w': /* section is writeable */
5447 flags |= IMAGE_SCN_MEM_WRITE;
5448 break;
5449 case 'x': /* section is executable */
5450 flags |= IMAGE_SCN_MEM_EXECUTE;
5451 break;
5452 case 's': /* section is sharable */
5453 flags |= IMAGE_SCN_MEM_SHARED;
5454 break;
5455
5456 /* Section Alignment */
5457 case '0': /* align to byte boundary */
5458 flags |= IMAGE_SCN_ALIGN_1BYTES;
5459 align = 0;
5460 break;
5461 case '1': /* align to halfword boundary */
5462 flags |= IMAGE_SCN_ALIGN_2BYTES;
5463 align = 1;
5464 break;
5465 case '2': /* align to word boundary */
5466 flags |= IMAGE_SCN_ALIGN_4BYTES;
5467 align = 2;
5468 break;
5469 case '3': /* align to doubleword boundary */
5470 flags |= IMAGE_SCN_ALIGN_8BYTES;
5471 align = 3;
5472 break;
5473 case '4': /* align to quadword boundary */
5474 flags |= IMAGE_SCN_ALIGN_16BYTES;
5475 align = 4;
5476 break;
5477 case '5': /* align to 32 byte boundary */
5478 flags |= IMAGE_SCN_ALIGN_32BYTES;
5479 align = 5;
5480 break;
5481 case '6': /* align to 64 byte boundary */
5482 flags |= IMAGE_SCN_ALIGN_64BYTES;
5483 align = 6;
5484 break;
8d452c78 5485#endif
252b5132 5486 default:
99a814a1
AM		 5487 as_bad (_("unknown section attribute '%c'"),
5488 *input_line_pointer);
252b5132
RH		 5489 break;
5490 }
5491 ++input_line_pointer;
5492 }
5493 if (*input_line_pointer == '"')
5494 ++input_line_pointer;
5495 }
5496 }
5497
5498 sec = subseg_new (name, (subsegT) exp);
5499
99a814a1 5500 ppc_set_current_section (sec);
252b5132
RH		 5501
5502 if (flags != SEC_NO_FLAGS)
5503 {
5504 if (! bfd_set_section_flags (stdoutput, sec, flags))
5505 as_bad (_("error setting flags for \"%s\": %s"),
5506 bfd_section_name (stdoutput, sec),
5507 bfd_errmsg (bfd_get_error ()));
5508 }
5509
99a814a1 5510 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5511}
5512
5513static void
98027b10 5514ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5515{
5516 char *name;
5517 char endc;
5518 symbolS *ext_sym;
5519
d02603dc 5520 endc = get_symbol_name (&name);
252b5132
RH		 5521
5522 ext_sym = symbol_find_or_make (name);
5523
d02603dc 5524 (void) restore_line_pointer (endc);
252b5132
RH		 5525
5526 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5527 SF_SET_FUNCTION (ext_sym);
5528 SF_SET_PROCESS (ext_sym);
5529 coff_add_linesym (ext_sym);
5530
5531 demand_empty_rest_of_line ();
5532}
5533
5534static void
98027b10 5535ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5536{
5537 if (tocdata_section == 0)
5538 {
5539 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5540 /* FIXME: section flags won't work. */
252b5132
RH		 5541 bfd_set_section_flags (stdoutput, tocdata_section,
5542 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5543 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5544
5545 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5546 }
5547 else
5548 {
5549 rdata_section = subseg_new (".tocd", 0);
5550 }
5551
99a814a1 5552 ppc_set_current_section (tocdata_section);
252b5132
RH		 5553
5554 demand_empty_rest_of_line ();
5555}
5556
5557/* Don't adjust TOC relocs to use the section symbol. */
5558
5559int
98027b10 5560ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5561{
5562 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5563}
5564
5565#endif
5566\f
5567#ifdef OBJ_XCOFF
5568
5569/* XCOFF specific symbol and file handling. */
5570
5571/* Canonicalize the symbol name. We use the to force the suffix, if
5572 any, to use square brackets, and to be in upper case. */
5573
5574char *
98027b10 5575ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5576{
5577 char *s;
5578
5579 if (ppc_stab_symbol)
5580 return name;
5581
5582 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5583 ;
5584 if (*s != '\0')
5585 {
5586 char brac;
5587
5588 if (*s == '[')
5589 brac = ']';
5590 else
5591 {
5592 *s = '[';
5593 brac = '}';
5594 }
5595
5596 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5597 *s = TOUPPER (*s);
252b5132
RH		 5598
5599 if (*s == '\0' || s[1] != '\0')
5600 as_bad (_("bad symbol suffix"));
5601
5602 *s = ']';
5603 }
5604
5605 return name;
5606}
5607
5608/* Set the class of a symbol based on the suffix, if any. This is
5609 called whenever a new symbol is created. */
5610
5611void
98027b10 5612ppc_symbol_new_hook (symbolS *sym)
252b5132 5613{
809ffe0d 5614 struct ppc_tc_sy *tc;
252b5132
RH		 5615 const char *s;
5616
809ffe0d
ILT		 5617 tc = symbol_get_tc (sym);
5618 tc->next = NULL;
5619 tc->output = 0;
96d56e9f 5620 tc->symbol_class = -1;
809ffe0d
ILT		 5621 tc->real_name = NULL;
5622 tc->subseg = 0;
5623 tc->align = 0;
85645aed
TG		 5624 tc->u.size = NULL;
5625 tc->u.dw = NULL;
809ffe0d 5626 tc->within = NULL;
252b5132
RH		 5627
5628 if (ppc_stab_symbol)
5629 return;
5630
5631 s = strchr (S_GET_NAME (sym), '[');
5632 if (s == (const char *) NULL)
5633 {
5634 /* There is no suffix. */
5635 return;
5636 }
5637
5638 ++s;
5639
5640 switch (s[0])
5641 {
5642 case 'B':
5643 if (strcmp (s, "BS]") == 0)
96d56e9f 5644 tc->symbol_class = XMC_BS;
252b5132
RH		 5645 break;
5646 case 'D':
5647 if (strcmp (s, "DB]") == 0)
96d56e9f 5648 tc->symbol_class = XMC_DB;
252b5132 5649 else if (strcmp (s, "DS]") == 0)
96d56e9f 5650 tc->symbol_class = XMC_DS;
252b5132
RH		 5651 break;
5652 case 'G':
5653 if (strcmp (s, "GL]") == 0)
96d56e9f 5654 tc->symbol_class = XMC_GL;
252b5132
RH		 5655 break;
5656 case 'P':
5657 if (strcmp (s, "PR]") == 0)
96d56e9f 5658 tc->symbol_class = XMC_PR;
252b5132
RH		 5659 break;
5660 case 'R':
5661 if (strcmp (s, "RO]") == 0)
96d56e9f 5662 tc->symbol_class = XMC_RO;
252b5132 5663 else if (strcmp (s, "RW]") == 0)
96d56e9f 5664 tc->symbol_class = XMC_RW;
252b5132
RH		 5665 break;
5666 case 'S':
5667 if (strcmp (s, "SV]") == 0)
96d56e9f 5668 tc->symbol_class = XMC_SV;
252b5132
RH		 5669 break;
5670 case 'T':
5671 if (strcmp (s, "TC]") == 0)
96d56e9f 5672 tc->symbol_class = XMC_TC;
252b5132 5673 else if (strcmp (s, "TI]") == 0)
96d56e9f 5674 tc->symbol_class = XMC_TI;
252b5132 5675 else if (strcmp (s, "TB]") == 0)
96d56e9f 5676 tc->symbol_class = XMC_TB;
252b5132 5677 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5678 tc->symbol_class = XMC_TC0;
252b5132
RH		 5679 break;
5680 case 'U':
5681 if (strcmp (s, "UA]") == 0)
96d56e9f 5682 tc->symbol_class = XMC_UA;
252b5132 5683 else if (strcmp (s, "UC]") == 0)
96d56e9f 5684 tc->symbol_class = XMC_UC;
252b5132
RH		 5685 break;
5686 case 'X':
5687 if (strcmp (s, "XO]") == 0)
96d56e9f 5688 tc->symbol_class = XMC_XO;
252b5132
RH		 5689 break;
5690 }
5691
96d56e9f 5692 if (tc->symbol_class == -1)
d6ed37ed 5693 as_bad (_("unrecognized symbol suffix"));
252b5132
RH		 5694}
5695
5696/* Set the class of a label based on where it is defined. This
5697 handles symbols without suffixes. Also, move the symbol so that it
5698 follows the csect symbol. */
5699
5700void
98027b10 5701ppc_frob_label (symbolS *sym)
252b5132
RH		 5702{
5703 if (ppc_current_csect != (symbolS *) NULL)
5704 {
96d56e9f
NC		 5705 if (symbol_get_tc (sym)->symbol_class == -1)
5706 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5707
5708 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5709 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5710 &symbol_rootP, &symbol_lastP);
5711 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5712 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5713 }
07a53e5c
RH		 5714
5715#ifdef OBJ_ELF
5716 dwarf2_emit_label (sym);
5717#endif
252b5132
RH		 5718}
5719
5720/* This variable is set by ppc_frob_symbol if any absolute symbols are
5721 seen. It tells ppc_adjust_symtab whether it needs to look through
5722 the symbols. */
5723
b34976b6 5724static bfd_boolean ppc_saw_abs;
252b5132
RH		 5725
5726/* Change the name of a symbol just before writing it out. Set the
5727 real name if the .rename pseudo-op was used. Otherwise, remove any
5728 class suffix. Return 1 if the symbol should not be included in the
5729 symbol table. */
5730
5731int
98027b10 5732ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5733{
5734 static symbolS *ppc_last_function;
5735 static symbolS *set_end;
5736
5737 /* Discard symbols that should not be included in the output symbol
5738 table. */
809ffe0d
ILT		 5739 if (! symbol_used_in_reloc_p (sym)
5740 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5741 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5742 && ! symbol_get_tc (sym)->output
252b5132
RH		 5743 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5744 return 1;
5745
a161fe53
AM		 5746 /* This one will disappear anyway. Don't make a csect sym for it. */
5747 if (sym == abs_section_sym)
5748 return 1;
5749
809ffe0d
ILT		 5750 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5751 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5752 else
5753 {
5754 const char *name;
5755 const char *s;
5756
5757 name = S_GET_NAME (sym);
5758 s = strchr (name, '[');
5759 if (s != (char *) NULL)
5760 {
5761 unsigned int len;
5762 char *snew;
5763
5764 len = s - name;
a44e2901 5765 snew = xstrndup (name, len);
252b5132
RH		 5766
5767 S_SET_NAME (sym, snew);
5768 }
5769 }
5770
5771 if (set_end != (symbolS *) NULL)
5772 {
5773 SA_SET_SYM_ENDNDX (set_end, sym);
5774 set_end = NULL;
5775 }
5776
5777 if (SF_GET_FUNCTION (sym))
5778 {
5779 if (ppc_last_function != (symbolS *) NULL)
5780 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5781 ppc_last_function = sym;
85645aed 5782 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5783 {
85645aed 5784 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5785 SA_SET_SYM_FSIZE (sym,
85645aed 5786 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5787 }
5788 }
5789 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5790 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5791 {
5792 if (ppc_last_function == (symbolS *) NULL)
5793 as_bad (_(".ef with no preceding .function"));
5794 else
5795 {
5796 set_end = ppc_last_function;
5797 ppc_last_function = NULL;
5798
5799 /* We don't have a C_EFCN symbol, but we need to force the
5800 COFF backend to believe that it has seen one. */
5801 coff_last_function = NULL;
5802 }
5803 }
5804
670ec21d 5805 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5806 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5807 && S_GET_STORAGE_CLASS (sym) != C_FILE
5808 && S_GET_STORAGE_CLASS (sym) != C_FCN
5809 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5810 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5811 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5812 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5813 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5814 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5815 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5816
5817 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5818 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5819 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5820 {
5821 int i;
5822 union internal_auxent *a;
5823
5824 /* Create a csect aux. */
5825 i = S_GET_NUMBER_AUXILIARY (sym);
5826 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5827 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5828 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5829 {
5830 /* This is the TOC table. */
5831 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5832 a->x_csect.x_scnlen.l = 0;
5833 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5834 }
809ffe0d 5835 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5836 {
5837 /* This is a csect symbol. x_scnlen is the size of the
5838 csect. */
809ffe0d 5839 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5840 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5841 S_GET_SEGMENT (sym))
5842 - S_GET_VALUE (sym));
5843 else
5844 {
6386f3a7 5845 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5846 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5847 - S_GET_VALUE (sym));
5848 }
809ffe0d 5849 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5850 }
5851 else if (S_GET_SEGMENT (sym) == bss_section)
5852 {
5853 /* This is a common symbol. */
809ffe0d
ILT		 5854 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5855 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5856 if (S_IS_EXTERNAL (sym))
96d56e9f 5857 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5858 else
96d56e9f 5859 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5860 }
5861 else if (S_GET_SEGMENT (sym) == absolute_section)
5862 {
5863 /* This is an absolute symbol. The csect will be created by
99a814a1 5864 ppc_adjust_symtab. */
b34976b6 5865 ppc_saw_abs = TRUE;
252b5132 5866 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5867 if (symbol_get_tc (sym)->symbol_class == -1)
5868 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5869 }
5870 else if (! S_IS_DEFINED (sym))
5871 {
5872 /* This is an external symbol. */
5873 a->x_csect.x_scnlen.l = 0;
5874 a->x_csect.x_smtyp = XTY_ER;
5875 }
96d56e9f 5876 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5877 {
5878 symbolS *next;
5879
5880 /* This is a TOC definition. x_scnlen is the size of the
5881 TOC entry. */
5882 next = symbol_next (sym);
96d56e9f 5883 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5884 next = symbol_next (next);
5885 if (next == (symbolS *) NULL
96d56e9f 5886 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5887 {
5888 if (ppc_after_toc_frag == (fragS *) NULL)
5889 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5890 data_section)
5891 - S_GET_VALUE (sym));
5892 else
5893 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5894 - S_GET_VALUE (sym));
5895 }
5896 else
5897 {
6386f3a7 5898 resolve_symbol_value (next);
252b5132
RH		 5899 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5900 - S_GET_VALUE (sym));
5901 }
5902 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5903 }
5904 else
5905 {
5906 symbolS *csect;
5907
5908 /* This is a normal symbol definition. x_scnlen is the
5909 symbol index of the containing csect. */
5910 if (S_GET_SEGMENT (sym) == text_section)
5911 csect = ppc_text_csects;
5912 else if (S_GET_SEGMENT (sym) == data_section)
5913 csect = ppc_data_csects;
5914 else
5915 abort ();
5916
5917 /* Skip the initial dummy symbol. */
809ffe0d 5918 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5919
5920 if (csect == (symbolS *) NULL)
5921 {
5922 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5923 a->x_csect.x_scnlen.l = 0;
5924 }
5925 else
5926 {
809ffe0d 5927 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5928 {
6386f3a7 5929 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5930 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5931 > S_GET_VALUE (sym))
252b5132 5932 break;
809ffe0d 5933 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5934 }
5935
809ffe0d
ILT		 5936 a->x_csect.x_scnlen.p =
5937 coffsymbol (symbol_get_bfdsym (csect))->native;
5938 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5939 1;
252b5132
RH		 5940 }
5941 a->x_csect.x_smtyp = XTY_LD;
5942 }
81d4177b 5943
252b5132
RH		 5944 a->x_csect.x_parmhash = 0;
5945 a->x_csect.x_snhash = 0;
96d56e9f 5946 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5947 a->x_csect.x_smclas = XMC_PR;
5948 else
96d56e9f 5949 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5950 a->x_csect.x_stab = 0;
5951 a->x_csect.x_snstab = 0;
5952
5953 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5954 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5955 }
5956 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5957 {
5958 /* We want the value to be the symbol index of the referenced
5959 csect symbol. BFD will do that for us if we set the right
5960 flags. */
b782de16
AM		 5961 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5962 combined_entry_type *c = coffsymbol (bsym)->native;
5963
5964 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5965 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5966 }
5967 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5968 {
5969 symbolS *block;
c734e7e3 5970 valueT base;
252b5132 5971
809ffe0d 5972 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5973 if (block)
5974 {
5975 /* The value is the offset from the enclosing csect. */
5976 symbolS *csect;
5977
5978 csect = symbol_get_tc (block)->within;
5979 resolve_symbol_value (csect);
5980 base = S_GET_VALUE (csect);
5981 }
5982 else
5983 base = 0;
5984
5985 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 5986 }
5987 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5988 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5989 {
5990 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5991 BFD will do that for us if we set the right flags. We have
5992 already set the value correctly. */
809ffe0d 5993 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5994 }
5995
5996 return 0;
5997}
5998
5999/* Adjust the symbol table. This creates csect symbols for all
6000 absolute symbols. */
6001
6002void
98027b10 6003ppc_adjust_symtab (void)
252b5132
RH		 6004{
6005 symbolS *sym;
6006
6007 if (! ppc_saw_abs)
6008 return;
6009
6010 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6011 {
6012 symbolS *csect;
6013 int i;
6014 union internal_auxent *a;
6015
6016 if (S_GET_SEGMENT (sym) != absolute_section)
6017 continue;
6018
6019 csect = symbol_create (".abs[XO]", absolute_section,
6020 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 6021 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 6022 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6023 i = S_GET_NUMBER_AUXILIARY (csect);
6024 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 6025 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 6026 a->x_csect.x_scnlen.l = 0;
6027 a->x_csect.x_smtyp = XTY_SD;
6028 a->x_csect.x_parmhash = 0;
6029 a->x_csect.x_snhash = 0;
6030 a->x_csect.x_smclas = XMC_XO;
6031 a->x_csect.x_stab = 0;
6032 a->x_csect.x_snstab = 0;
6033
6034 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6035
6036 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 6037 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6038 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6039 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 6040 }
6041
b34976b6 6042 ppc_saw_abs = FALSE;
252b5132
RH		 6043}
6044
6045/* Set the VMA for a section. This is called on all the sections in
6046 turn. */
6047
6048void
98027b10 6049ppc_frob_section (asection *sec)
252b5132 6050{
931e13a6 6051 static bfd_vma vma = 0;
252b5132 6052
85645aed
TG		 6053 /* Dwarf sections start at 0. */
6054 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6055 return;
6056
931e13a6 6057 vma = md_section_align (sec, vma);
252b5132
RH		 6058 bfd_set_section_vma (stdoutput, sec, vma);
6059 vma += bfd_section_size (stdoutput, sec);
6060}
6061
6062#endif /* OBJ_XCOFF */
6063\f
6d4af3c2 6064const char *
98027b10 6065md_atof (int type, char *litp, int *sizep)
252b5132 6066{
499ac353 6067 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 6068}
6069
6070/* Write a value out to the object file, using the appropriate
6071 endianness. */
6072
6073void
98027b10 6074md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 6075{
6076 if (target_big_endian)
6077 number_to_chars_bigendian (buf, val, n);
6078 else
6079 number_to_chars_littleendian (buf, val, n);
6080}
6081
6082/* Align a section (I don't know why this is machine dependent). */
6083
6084valueT
3aeeedbb 6085md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 6086{
3aeeedbb
AM		 6087#ifdef OBJ_ELF
6088 return addr;
6089#else
252b5132
RH		 6090 int align = bfd_get_section_alignment (stdoutput, seg);
6091
8d3842cd 6092 return ((addr + (1 << align) - 1) & -(1 << align));
3aeeedbb 6093#endif
252b5132
RH		 6094}
6095
6096/* We don't have any form of relaxing. */
6097
6098int
98027b10
AM		 6099md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6100 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 6101{
6102 abort ();
6103 return 0;
6104}
6105
6106/* Convert a machine dependent frag. We never generate these. */
6107
6108void
98027b10
AM		 6109md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6110 asection *sec ATTRIBUTE_UNUSED,
6111 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 6112{
6113 abort ();
6114}
6115
6116/* We have no need to default values of symbols. */
6117
252b5132 6118symbolS *
98027b10 6119md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 6120{
6121 return 0;
6122}
6123\f
6124/* Functions concerning relocs. */
6125
6126/* The location from which a PC relative jump should be calculated,
6127 given a PC relative reloc. */
6128
6129long
98027b10 6130md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 6131{
6132 return fixp->fx_frag->fr_address + fixp->fx_where;
6133}
6134
6135#ifdef OBJ_XCOFF
6136
6137/* This is called to see whether a fixup should be adjusted to use a
6138 section symbol. We take the opportunity to change a fixup against
6139 a symbol in the TOC subsegment into a reloc against the
6140 corresponding .tc symbol. */
6141
6142int
98027b10 6143ppc_fix_adjustable (fixS *fix)
252b5132 6144{
b782de16
AM		 6145 valueT val = resolve_symbol_value (fix->fx_addsy);
6146 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6147 TC_SYMFIELD_TYPE *tc;
6148
6149 if (symseg == absolute_section)
6150 return 0;
252b5132 6151
85645aed
TG		 6152 /* Always adjust symbols in debugging sections. */
6153 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6154 return 1;
6155
252b5132 6156 if (ppc_toc_csect != (symbolS *) NULL
252b5132 6157 && fix->fx_addsy != ppc_toc_csect
b782de16 6158 && symseg == data_section
252b5132
RH		 6159 && val >= ppc_toc_frag->fr_address
6160 && (ppc_after_toc_frag == (fragS *) NULL
6161 || val < ppc_after_toc_frag->fr_address))
6162 {
6163 symbolS *sy;
6164
6165 for (sy = symbol_next (ppc_toc_csect);
6166 sy != (symbolS *) NULL;
6167 sy = symbol_next (sy))
6168 {
b782de16
AM		 6169 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6170
96d56e9f 6171 if (sy_tc->symbol_class == XMC_TC0)
252b5132 6172 continue;
96d56e9f 6173 if (sy_tc->symbol_class != XMC_TC)
252b5132 6174 break;
b782de16 6175 if (val == resolve_symbol_value (sy))
252b5132
RH		 6176 {
6177 fix->fx_addsy = sy;
6178 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6179 return 0;
6180 }
6181 }
6182
6183 as_bad_where (fix->fx_file, fix->fx_line,
6184 _("symbol in .toc does not match any .tc"));
6185 }
6186
6187 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 6188 tc = symbol_get_tc (fix->fx_addsy);
6189 if (tc->subseg == 0
96d56e9f
NC		 6190 && tc->symbol_class != XMC_TC0
6191 && tc->symbol_class != XMC_TC
b782de16 6192 && symseg != bss_section
252b5132 6193 /* Don't adjust if this is a reloc in the toc section. */
b782de16 6194 && (symseg != data_section
252b5132
RH		 6195 || ppc_toc_csect == NULL
6196 || val < ppc_toc_frag->fr_address
6197 || (ppc_after_toc_frag != NULL
6198 && val >= ppc_after_toc_frag->fr_address)))
6199 {
2fb4b302 6200 symbolS *csect = tc->within;
252b5132 6201
2fb4b302
TG		 6202 /* If the symbol was not declared by a label (eg: a section symbol),
6203 use the section instead of the csect. This doesn't happen in
6204 normal AIX assembly code. */
6205 if (csect == NULL)
6206 csect = seg_info (symseg)->sym;
252b5132 6207
2fb4b302
TG		 6208 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6209 fix->fx_addsy = csect;
252b5132 6210
b782de16 6211 return 0;
252b5132
RH		 6212 }
6213
6214 /* Adjust a reloc against a .lcomm symbol to be against the base
6215 .lcomm. */
b782de16 6216 if (symseg == bss_section
252b5132
RH		 6217 && ! S_IS_EXTERNAL (fix->fx_addsy))
6218 {
b782de16
AM		 6219 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6220
6221 fix->fx_offset += val - resolve_symbol_value (sy);
6222 fix->fx_addsy = sy;
252b5132
RH		 6223 }
6224
6225 return 0;
6226}
6227
6228/* A reloc from one csect to another must be kept. The assembler
6229 will, of course, keep relocs between sections, and it will keep
6230 absolute relocs, but we need to force it to keep PC relative relocs
6231 between two csects in the same section. */
6232
6233int
98027b10 6234ppc_force_relocation (fixS *fix)
252b5132
RH		 6235{
6236 /* At this point fix->fx_addsy should already have been converted to
6237 a csect symbol. If the csect does not include the fragment, then
6238 we need to force the relocation. */
6239 if (fix->fx_pcrel
6240 && fix->fx_addsy != NULL
809ffe0d
ILT		 6241 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6242 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6243 > fix->fx_frag->fr_address)
6244 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6245 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 6246 <= fix->fx_frag->fr_address))))
6247 return 1;
6248
ae6063d4 6249 return generic_force_reloc (fix);
252b5132
RH		 6250}
6251
2fb4b302
TG		 6252void
6253ppc_new_dot_label (symbolS *sym)
6254{
6255 /* Anchor this label to the current csect for relocations. */
6256 symbol_get_tc (sym)->within = ppc_current_csect;
6257}
6258
252b5132
RH		 6259#endif /* OBJ_XCOFF */
6260
0baf16f2 6261#ifdef OBJ_ELF
a161fe53
AM		 6262/* If this function returns non-zero, it guarantees that a relocation
6263 will be emitted for a fixup. */
6264
6265int
98027b10 6266ppc_force_relocation (fixS *fix)
a161fe53
AM		 6267{
6268 /* Branch prediction relocations must force a relocation, as must
6269 the vtable description relocs. */
6270 switch (fix->fx_r_type)
6271 {
6272 case BFD_RELOC_PPC_B16_BRTAKEN:
6273 case BFD_RELOC_PPC_B16_BRNTAKEN:
6274 case BFD_RELOC_PPC_BA16_BRTAKEN:
6275 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 6276 case BFD_RELOC_24_PLT_PCREL:
a161fe53 6277 case BFD_RELOC_PPC64_TOC:
a161fe53 6278 return 1;
6911b7dc
AM		 6279 case BFD_RELOC_PPC_B26:
6280 case BFD_RELOC_PPC_BA26:
6281 case BFD_RELOC_PPC_B16:
6282 case BFD_RELOC_PPC_BA16:
6283 /* All branch fixups targeting a localentry symbol must
6284 force a relocation. */
6285 if (fix->fx_addsy)
6286 {
6287 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6288 elf_symbol_type *elfsym
6289 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6290 gas_assert (elfsym);
6291 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6292 return 1;
6293 }
6294 break;
a161fe53
AM		 6295 default:
6296 break;
6297 }
6298
cdba85ec
AM		 6299 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6300 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6301 return 1;
6302
ae6063d4 6303 return generic_force_reloc (fix);
a161fe53
AM		 6304}
6305
0baf16f2 6306int
98027b10 6307ppc_fix_adjustable (fixS *fix)
252b5132 6308{
6911b7dc
AM		 6309 switch (fix->fx_r_type)
6310 {
6311 /* All branch fixups targeting a localentry symbol must
6312 continue using the symbol. */
6313 case BFD_RELOC_PPC_B26:
6314 case BFD_RELOC_PPC_BA26:
6315 case BFD_RELOC_PPC_B16:
6316 case BFD_RELOC_PPC_BA16:
6317 case BFD_RELOC_PPC_B16_BRTAKEN:
6318 case BFD_RELOC_PPC_B16_BRNTAKEN:
6319 case BFD_RELOC_PPC_BA16_BRTAKEN:
6320 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6321 if (fix->fx_addsy)
6322 {
6323 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6324 elf_symbol_type *elfsym
6325 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6326 gas_assert (elfsym);
6327 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6328 return 0;
6329 }
6330 break;
6331 default:
6332 break;
6333 }
6334
0baf16f2
AM		 6335 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6336 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6337 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6338 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 6339 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6340 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 6341 && fix->fx_r_type != BFD_RELOC_GPREL16
6342 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6343 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 6344 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 6345 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 6346}
0baf16f2 6347#endif
252b5132 6348
b9c361e0
JL		 6349void
6350ppc_frag_check (struct frag *fragP)
6351{
6352 if (!fragP->has_code)
6353 return;
6354
6355 if (ppc_mach() == bfd_mach_ppc_vle)
6356 {
6357 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6358 as_bad (_("instruction address is not a multiple of 2"));
6359 }
6360 else
6361 {
6362 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6363 as_bad (_("instruction address is not a multiple of 4"));
6364 }
6365}
6366
3aeeedbb
AM		 6367/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6368 rs_align_code frag. */
6369
6370void
6371ppc_handle_align (struct frag *fragP)
6372{
6373 valueT count = (fragP->fr_next->fr_address
6374 - (fragP->fr_address + fragP->fr_fix));
6375
b9c361e0
JL		 6376 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6377 {
6378 char *dest = fragP->fr_literal + fragP->fr_fix;
6379
6380 fragP->fr_var = 2;
6381 md_number_to_chars (dest, 0x4400, 2);
6382 }
6383 else if (count != 0 && (count & 3) == 0)
3aeeedbb
AM		 6384 {
6385 char *dest = fragP->fr_literal + fragP->fr_fix;
6386
6387 fragP->fr_var = 4;
cef4f754
AM		 6388
6389 if (count > 4 * nop_limit && count < 0x2000000)
6390 {
6391 struct frag *rest;
6392
6393 /* Make a branch, then follow with nops. Insert another
6394 frag to handle the nops. */
6395 md_number_to_chars (dest, 0x48000000 + count, 4);
6396 count -= 4;
6397 if (count == 0)
6398 return;
6399
6400 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6401 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6402 fragP->fr_next = rest;
6403 fragP = rest;
6404 rest->fr_address += rest->fr_fix + 4;
6405 rest->fr_fix = 0;
6406 /* If we leave the next frag as rs_align_code we'll come here
6407 again, resulting in a bunch of branches rather than a
6408 branch followed by nops. */
6409 rest->fr_type = rs_align;
6410 dest = rest->fr_literal;
6411 }
6412
3aeeedbb
AM		 6413 md_number_to_chars (dest, 0x60000000, 4);
6414
42240548 6415 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5817ffd1 6416 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
a680de9a
PB		 6417 || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6418 || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
3aeeedbb 6419 {
a680de9a
PB		 6420 /* For power6, power7, power8 and power9, we want the last nop to be
6421 a group terminating one. Do this by inserting an rs_fill frag
6422 immediately after this one, with its address set to the last nop
6423 location. This will automatically reduce the number of nops in
6424 the current frag by one. */
3aeeedbb
AM		 6425 if (count > 4)
6426 {
6427 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6428
6429 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6430 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6431 group_nop->fr_fix = 0;
6432 group_nop->fr_offset = 1;
6433 group_nop->fr_type = rs_fill;
6434 fragP->fr_next = group_nop;
6435 dest = group_nop->fr_literal;
6436 }
6437
5817ffd1 6438 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
a680de9a
PB		 6439 || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6440 || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
aea77599
AM		 6441 {
6442 if (ppc_cpu & PPC_OPCODE_E500MC)
6443 /* e500mc group terminating nop: "ori 0,0,0". */
6444 md_number_to_chars (dest, 0x60000000, 4);
6445 else
a680de9a 6446 /* power7/power8/power9 group terminating nop: "ori 2,2,0". */
aea77599
AM		 6447 md_number_to_chars (dest, 0x60420000, 4);
6448 }
42240548
PB		 6449 else
6450 /* power6 group terminating nop: "ori 1,1,0". */
6451 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6452 }
6453 }
6454}
6455
252b5132 6456/* Apply a fixup to the object code. This is called for all the
3b8b57a9 6457 fixups we generated by the calls to fix_new_exp, above. */
252b5132 6458
94f592af 6459void
62ebcb5c 6460md_apply_fix (fixS *fixP, valueT *valP, segT seg)
252b5132 6461{
94f592af 6462 valueT value = * valP;
5656a981
AM		 6463 offsetT fieldval;
6464 const struct powerpc_operand *operand;
252b5132
RH		 6465
6466#ifdef OBJ_ELF
94f592af 6467 if (fixP->fx_addsy != NULL)
252b5132 6468 {
a161fe53 6469 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6470 if (fixP->fx_pcrel)
6471 value += fixP->fx_frag->fr_address + fixP->fx_where;
a680de9a
PB		 6472
6473 if (fixP->fx_addsy == abs_section_sym)
6474 fixP->fx_done = 1;
252b5132
RH		 6475 }
6476 else
94f592af 6477 fixP->fx_done = 1;
252b5132 6478#else
a161fe53 6479 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6480 the symbol values. If we are doing this relocation the code in
6481 write.c is going to call bfd_install_relocation, which is also
6482 going to use the symbol value. That means that if the reloc is
6483 fully resolved we want to use *valP since bfd_install_relocation is
6484 not being used.
9f0eb232
RS		 6485 However, if the reloc is not fully resolved we do not want to
6486 use *valP, and must use fx_offset instead. If the relocation
6487 is PC-relative, we then need to re-apply md_pcrel_from_section
6488 to this new relocation value. */
94f592af
NC		 6489 if (fixP->fx_addsy == (symbolS *) NULL)
6490 fixP->fx_done = 1;
6491
252b5132 6492 else
9f0eb232
RS		 6493 {
6494 value = fixP->fx_offset;
6495 if (fixP->fx_pcrel)
6496 value -= md_pcrel_from_section (fixP, seg);
6497 }
a161fe53
AM		 6498#endif
6499
6500 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6501 {
a161fe53
AM		 6502 /* We can't actually support subtracting a symbol. */
6503 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6504 }
252b5132 6505
5656a981 6506 operand = NULL;
3b8b57a9 6507 if (fixP->fx_pcrel_adjust != 0)
252b5132 6508 {
5656a981 6509 /* This is a fixup on an instruction. */
3b8b57a9 6510 int opindex = fixP->fx_pcrel_adjust & 0xff;
252b5132 6511
5656a981 6512 operand = &powerpc_operands[opindex];
252b5132 6513#ifdef OBJ_XCOFF
0baf16f2
AM		 6514 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6515 does not generate a reloc. It uses the offset of `sym' within its
6516 csect. Other usages, such as `.long sym', generate relocs. This
6517 is the documented behaviour of non-TOC symbols. */
252b5132 6518 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6519 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6520 && operand->shift == 0
2b3c4602 6521 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6522 && fixP->fx_addsy != NULL
6523 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6524 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6525 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6526 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6527 {
94f592af
NC		 6528 value = fixP->fx_offset;
6529 fixP->fx_done = 1;
252b5132 6530 }
ac21e7da
TG		 6531
6532 /* During parsing of instructions, a TOC16 reloc is generated for
6533 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6534 in the toc. But at parse time, SYM may be not yet defined, so
6535 check again here. */
6536 if (fixP->fx_r_type == BFD_RELOC_16
6537 && fixP->fx_addsy != NULL
6538 && ppc_is_toc_sym (fixP->fx_addsy))
6539 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
252b5132 6540#endif
5656a981
AM		 6541 }
6542
6543 /* Calculate value to be stored in field. */
6544 fieldval = value;
6545 switch (fixP->fx_r_type)
6546 {
1ec2d25e 6547#ifdef OBJ_ELF
5656a981
AM		 6548 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6549 case BFD_RELOC_PPC_VLE_LO16A:
6550 case BFD_RELOC_PPC_VLE_LO16D:
1ec2d25e 6551#endif
5656a981
AM		 6552 case BFD_RELOC_LO16:
6553 case BFD_RELOC_LO16_PCREL:
6554 fieldval = value & 0xffff;
6555 sign_extend_16:
6556 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
f9c6b907 6557 fieldval = SEX16 (fieldval);
5656a981
AM		 6558 fixP->fx_no_overflow = 1;
6559 break;
3c9d25f4 6560
f9c6b907
AM		 6561 case BFD_RELOC_HI16:
6562 case BFD_RELOC_HI16_PCREL:
5656a981 6563#ifdef OBJ_ELF
f9c6b907
AM		 6564 if (REPORT_OVERFLOW_HI && ppc_obj64)
6565 {
6566 fieldval = value >> 16;
6567 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6568 {
6569 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6570 fieldval = ((valueT) fieldval ^ sign) - sign;
6571 }
6572 break;
6573 }
6574 /* Fall thru */
6575
5656a981
AM		 6576 case BFD_RELOC_PPC_VLE_HI16A:
6577 case BFD_RELOC_PPC_VLE_HI16D:
f9c6b907 6578 case BFD_RELOC_PPC64_ADDR16_HIGH:
5656a981 6579#endif
5656a981
AM		 6580 fieldval = PPC_HI (value);
6581 goto sign_extend_16;
0baf16f2 6582
f9c6b907
AM		 6583 case BFD_RELOC_HI16_S:
6584 case BFD_RELOC_HI16_S_PCREL:
a680de9a 6585 case BFD_RELOC_PPC_REL16DX_HA:
5656a981 6586#ifdef OBJ_ELF
f9c6b907
AM		 6587 if (REPORT_OVERFLOW_HI && ppc_obj64)
6588 {
6589 fieldval = (value + 0x8000) >> 16;
6590 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6591 {
6592 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6593 fieldval = ((valueT) fieldval ^ sign) - sign;
6594 }
6595 break;
6596 }
6597 /* Fall thru */
6598
5656a981
AM		 6599 case BFD_RELOC_PPC_VLE_HA16A:
6600 case BFD_RELOC_PPC_VLE_HA16D:
f9c6b907 6601 case BFD_RELOC_PPC64_ADDR16_HIGHA:
5656a981 6602#endif
5656a981
AM		 6603 fieldval = PPC_HA (value);
6604 goto sign_extend_16;
0baf16f2 6605
3b8b57a9 6606#ifdef OBJ_ELF
5656a981
AM		 6607 case BFD_RELOC_PPC64_HIGHER:
6608 fieldval = PPC_HIGHER (value);
6609 goto sign_extend_16;
252b5132 6610
5656a981
AM		 6611 case BFD_RELOC_PPC64_HIGHER_S:
6612 fieldval = PPC_HIGHERA (value);
6613 goto sign_extend_16;
0baf16f2 6614
5656a981
AM		 6615 case BFD_RELOC_PPC64_HIGHEST:
6616 fieldval = PPC_HIGHEST (value);
6617 goto sign_extend_16;
0baf16f2 6618
5656a981
AM		 6619 case BFD_RELOC_PPC64_HIGHEST_S:
6620 fieldval = PPC_HIGHESTA (value);
6621 goto sign_extend_16;
6622#endif
6623
6624 default:
6625 break;
6626 }
6627
6628 if (operand != NULL)
6629 {
6630 /* Handle relocs in an insn. */
5656a981
AM		 6631 switch (fixP->fx_r_type)
6632 {
7fa9fcb6 6633#ifdef OBJ_ELF
3b8b57a9
AM		 6634 /* The following relocs can't be calculated by the assembler.
6635 Leave the field zero. */
cdba85ec
AM		 6636 case BFD_RELOC_PPC_TPREL16:
6637 case BFD_RELOC_PPC_TPREL16_LO:
6638 case BFD_RELOC_PPC_TPREL16_HI:
6639 case BFD_RELOC_PPC_TPREL16_HA:
cdba85ec
AM		 6640 case BFD_RELOC_PPC_DTPREL16:
6641 case BFD_RELOC_PPC_DTPREL16_LO:
6642 case BFD_RELOC_PPC_DTPREL16_HI:
6643 case BFD_RELOC_PPC_DTPREL16_HA:
cdba85ec
AM		 6644 case BFD_RELOC_PPC_GOT_TLSGD16:
6645 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6646 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6647 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6648 case BFD_RELOC_PPC_GOT_TLSLD16:
6649 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6650 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6651 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6652 case BFD_RELOC_PPC_GOT_TPREL16:
6653 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6654 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6655 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6656 case BFD_RELOC_PPC_GOT_DTPREL16:
6657 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6658 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6659 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6660 case BFD_RELOC_PPC64_TPREL16_DS:
6661 case BFD_RELOC_PPC64_TPREL16_LO_DS:
f9c6b907
AM		 6662 case BFD_RELOC_PPC64_TPREL16_HIGH:
6663 case BFD_RELOC_PPC64_TPREL16_HIGHA:
cdba85ec
AM		 6664 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6665 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6666 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6667 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
f9c6b907
AM		 6668 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6669 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
cdba85ec
AM		 6670 case BFD_RELOC_PPC64_DTPREL16_DS:
6671 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6672 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6673 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6674 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6675 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
3b8b57a9 6676 gas_assert (fixP->fx_addsy != NULL);
7c1d0959 6677 S_SET_THREAD_LOCAL (fixP->fx_addsy);
3b8b57a9 6678 fieldval = 0;
cdba85ec 6679 break;
3b8b57a9
AM		 6680
6681 /* These also should leave the field zero for the same
6682 reason. Note that older versions of gas wrote values
6683 here. If we want to go back to the old behaviour, then
6684 all _LO and _LO_DS cases will need to be treated like
6685 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6686 case BFD_RELOC_16_GOTOFF:
6687 case BFD_RELOC_LO16_GOTOFF:
6688 case BFD_RELOC_HI16_GOTOFF:
6689 case BFD_RELOC_HI16_S_GOTOFF:
6690 case BFD_RELOC_LO16_PLTOFF:
6691 case BFD_RELOC_HI16_PLTOFF:
6692 case BFD_RELOC_HI16_S_PLTOFF:
6693 case BFD_RELOC_GPREL16:
6694 case BFD_RELOC_16_BASEREL:
6695 case BFD_RELOC_LO16_BASEREL:
6696 case BFD_RELOC_HI16_BASEREL:
6697 case BFD_RELOC_HI16_S_BASEREL:
6698 case BFD_RELOC_PPC_TOC16:
6699 case BFD_RELOC_PPC64_TOC16_LO:
6700 case BFD_RELOC_PPC64_TOC16_HI:
6701 case BFD_RELOC_PPC64_TOC16_HA:
6702 case BFD_RELOC_PPC64_PLTGOT16:
6703 case BFD_RELOC_PPC64_PLTGOT16_LO:
6704 case BFD_RELOC_PPC64_PLTGOT16_HI:
6705 case BFD_RELOC_PPC64_PLTGOT16_HA:
6706 case BFD_RELOC_PPC64_GOT16_DS:
6707 case BFD_RELOC_PPC64_GOT16_LO_DS:
6708 case BFD_RELOC_PPC64_PLT16_LO_DS:
6709 case BFD_RELOC_PPC64_SECTOFF_DS:
6710 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6711 case BFD_RELOC_PPC64_TOC16_DS:
6712 case BFD_RELOC_PPC64_TOC16_LO_DS:
6713 case BFD_RELOC_PPC64_PLTGOT16_DS:
6714 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6715 case BFD_RELOC_PPC_EMB_NADDR16:
6716 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6717 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6718 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6719 case BFD_RELOC_PPC_EMB_SDAI16:
6720 case BFD_RELOC_PPC_EMB_SDA2I16:
6721 case BFD_RELOC_PPC_EMB_SDA2REL:
252b5132 6722 case BFD_RELOC_PPC_EMB_SDA21:
3b8b57a9
AM		 6723 case BFD_RELOC_PPC_EMB_MRKREF:
6724 case BFD_RELOC_PPC_EMB_RELSEC16:
6725 case BFD_RELOC_PPC_EMB_RELST_LO:
6726 case BFD_RELOC_PPC_EMB_RELST_HI:
6727 case BFD_RELOC_PPC_EMB_RELST_HA:
6728 case BFD_RELOC_PPC_EMB_BIT_FLD:
6729 case BFD_RELOC_PPC_EMB_RELSDA:
6730 case BFD_RELOC_PPC_VLE_SDA21:
6731 case BFD_RELOC_PPC_VLE_SDA21_LO:
6732 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6733 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6734 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6735 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6736 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6737 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6738 gas_assert (fixP->fx_addsy != NULL);
6739 /* Fall thru */
6740
6741 case BFD_RELOC_PPC_TLS:
6742 case BFD_RELOC_PPC_TLSGD:
6743 case BFD_RELOC_PPC_TLSLD:
6744 fieldval = 0;
3b8b57a9 6745 break;
7fa9fcb6
TG		 6746#endif
6747
6748#ifdef OBJ_XCOFF
6749 case BFD_RELOC_PPC_B16:
6750 /* Adjust the offset to the instruction boundary. */
6751 fieldval += 2;
6752 break;
6753#endif
252b5132 6754
f728387b
AM		 6755 case BFD_RELOC_VTABLE_INHERIT:
6756 case BFD_RELOC_VTABLE_ENTRY:
6757 case BFD_RELOC_PPC_DTPMOD:
6758 case BFD_RELOC_PPC_TPREL:
6759 case BFD_RELOC_PPC_DTPREL:
6760 case BFD_RELOC_PPC_COPY:
6761 case BFD_RELOC_PPC_GLOB_DAT:
6762 case BFD_RELOC_32_PLT_PCREL:
6763 case BFD_RELOC_PPC_EMB_NADDR32:
6764 case BFD_RELOC_PPC64_TOC:
6765 case BFD_RELOC_CTOR:
6766 case BFD_RELOC_32:
6767 case BFD_RELOC_32_PCREL:
6768 case BFD_RELOC_RVA:
6769 case BFD_RELOC_64:
6770 case BFD_RELOC_64_PCREL:
6771 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6772 as_bad_where (fixP->fx_file, fixP->fx_line,
6773 _("%s unsupported as instruction fixup"),
6774 bfd_get_reloc_code_name (fixP->fx_r_type));
6775 fixP->fx_done = 1;
6776 return;
6777
3b8b57a9 6778 default:
252b5132 6779 break;
3b8b57a9 6780 }
252b5132 6781
3b8b57a9
AM		 6782#ifdef OBJ_ELF
6783/* powerpc uses RELA style relocs, so if emitting a reloc the field
6784 contents can stay at zero. */
6785#define APPLY_RELOC fixP->fx_done
6786#else
6787#define APPLY_RELOC 1
6788#endif
6789 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6790 {
487b24d8
AM		 6791 unsigned long insn;
6792 unsigned char *where;
6793
3b8b57a9
AM		 6794 /* Fetch the instruction, insert the fully resolved operand
6795 value, and stuff the instruction back again. */
487b24d8 6796 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
3b8b57a9 6797 if (target_big_endian)
31a91399 6798 {
3b8b57a9 6799 if (fixP->fx_size == 4)
487b24d8 6800 insn = bfd_getb32 (where);
31a91399 6801 else
487b24d8 6802 insn = bfd_getb16 (where);
31a91399
NC		 6803 }
6804 else
3b8b57a9
AM		 6805 {
6806 if (fixP->fx_size == 4)
487b24d8 6807 insn = bfd_getl32 (where);
3b8b57a9 6808 else
487b24d8 6809 insn = bfd_getl16 (where);
3b8b57a9
AM		 6810 }
6811 insn = ppc_insert_operand (insn, operand, fieldval,
6812 fixP->tc_fix_data.ppc_cpu,
6813 fixP->fx_file, fixP->fx_line);
6814 if (target_big_endian)
6815 {
6816 if (fixP->fx_size == 4)
487b24d8 6817 bfd_putb32 (insn, where);
3b8b57a9 6818 else
487b24d8 6819 bfd_putb16 (insn, where);
3b8b57a9
AM		 6820 }
6821 else
6822 {
6823 if (fixP->fx_size == 4)
487b24d8 6824 bfd_putl32 (insn, where);
3b8b57a9 6825 else
487b24d8 6826 bfd_putl16 (insn, where);
3b8b57a9
AM		 6827 }
6828 }
6829
6830 if (fixP->fx_done)
6831 /* Nothing else to do here. */
6832 return;
6833
6834 gas_assert (fixP->fx_addsy != NULL);
62ebcb5c 6835 if (fixP->fx_r_type == BFD_RELOC_NONE)
3b8b57a9 6836 {
3b4dbbbf 6837 const char *sfile;
3b8b57a9
AM		 6838 unsigned int sline;
6839
6840 /* Use expr_symbol_where to see if this is an expression
6841 symbol. */
6842 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6843 as_bad_where (fixP->fx_file, fixP->fx_line,
6844 _("unresolved expression that must be resolved"));
6845 else
6846 as_bad_where (fixP->fx_file, fixP->fx_line,
6847 _("unsupported relocation against %s"),
6848 S_GET_NAME (fixP->fx_addsy));
6849 fixP->fx_done = 1;
6850 return;
6851 }
6852 }
6853 else
6854 {
6855 /* Handle relocs in data. */
6856 switch (fixP->fx_r_type)
6857 {
252b5132 6858 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6859 if (fixP->fx_addsy
6860 && !S_IS_DEFINED (fixP->fx_addsy)
6861 && !S_IS_WEAK (fixP->fx_addsy))
6862 S_SET_WEAK (fixP->fx_addsy);
3b8b57a9 6863 /* Fall thru */
252b5132
RH		 6864
6865 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6866 fixP->fx_done = 0;
252b5132
RH		 6867 break;
6868
0baf16f2 6869#ifdef OBJ_ELF
3b8b57a9
AM		 6870 /* These can appear with @l etc. in data. */
6871 case BFD_RELOC_LO16:
3b8b57a9 6872 case BFD_RELOC_LO16_PCREL:
3b8b57a9 6873 case BFD_RELOC_HI16:
3b8b57a9 6874 case BFD_RELOC_HI16_PCREL:
3b8b57a9 6875 case BFD_RELOC_HI16_S:
3b8b57a9 6876 case BFD_RELOC_HI16_S_PCREL:
3b8b57a9 6877 case BFD_RELOC_PPC64_HIGHER:
3b8b57a9 6878 case BFD_RELOC_PPC64_HIGHER_S:
3b8b57a9 6879 case BFD_RELOC_PPC64_HIGHEST:
3b8b57a9 6880 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 6881 case BFD_RELOC_PPC64_ADDR16_HIGH:
6882 case BFD_RELOC_PPC64_ADDR16_HIGHA:
45965137 6883 case BFD_RELOC_PPC64_ADDR64_LOCAL:
3b8b57a9
AM		 6884 break;
6885
6886 case BFD_RELOC_PPC_DTPMOD:
6887 case BFD_RELOC_PPC_TPREL:
6888 case BFD_RELOC_PPC_DTPREL:
6889 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6890 break;
6891
6892 /* Just punt all of these to the linker. */
6893 case BFD_RELOC_PPC_B16_BRTAKEN:
6894 case BFD_RELOC_PPC_B16_BRNTAKEN:
6895 case BFD_RELOC_16_GOTOFF:
6896 case BFD_RELOC_LO16_GOTOFF:
6897 case BFD_RELOC_HI16_GOTOFF:
6898 case BFD_RELOC_HI16_S_GOTOFF:
6899 case BFD_RELOC_LO16_PLTOFF:
6900 case BFD_RELOC_HI16_PLTOFF:
6901 case BFD_RELOC_HI16_S_PLTOFF:
6902 case BFD_RELOC_PPC_COPY:
6903 case BFD_RELOC_PPC_GLOB_DAT:
6904 case BFD_RELOC_16_BASEREL:
6905 case BFD_RELOC_LO16_BASEREL:
6906 case BFD_RELOC_HI16_BASEREL:
6907 case BFD_RELOC_HI16_S_BASEREL:
6908 case BFD_RELOC_PPC_TLS:
6909 case BFD_RELOC_PPC_DTPREL16_LO:
6910 case BFD_RELOC_PPC_DTPREL16_HI:
6911 case BFD_RELOC_PPC_DTPREL16_HA:
6912 case BFD_RELOC_PPC_TPREL16_LO:
6913 case BFD_RELOC_PPC_TPREL16_HI:
6914 case BFD_RELOC_PPC_TPREL16_HA:
6915 case BFD_RELOC_PPC_GOT_TLSGD16:
6916 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6917 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6918 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6919 case BFD_RELOC_PPC_GOT_TLSLD16:
6920 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6921 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6922 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6923 case BFD_RELOC_PPC_GOT_DTPREL16:
6924 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6925 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6926 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6927 case BFD_RELOC_PPC_GOT_TPREL16:
6928 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6929 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6930 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6931 case BFD_RELOC_24_PLT_PCREL:
6932 case BFD_RELOC_PPC_LOCAL24PC:
6933 case BFD_RELOC_32_PLT_PCREL:
6934 case BFD_RELOC_GPREL16:
6935 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6936 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6937 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6938 case BFD_RELOC_PPC_EMB_NADDR32:
6939 case BFD_RELOC_PPC_EMB_NADDR16:
6940 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6941 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6942 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6943 case BFD_RELOC_PPC_EMB_SDAI16:
6944 case BFD_RELOC_PPC_EMB_SDA2REL:
6945 case BFD_RELOC_PPC_EMB_SDA2I16:
6946 case BFD_RELOC_PPC_EMB_SDA21:
6947 case BFD_RELOC_PPC_VLE_SDA21_LO:
6948 case BFD_RELOC_PPC_EMB_MRKREF:
6949 case BFD_RELOC_PPC_EMB_RELSEC16:
6950 case BFD_RELOC_PPC_EMB_RELST_LO:
6951 case BFD_RELOC_PPC_EMB_RELST_HI:
6952 case BFD_RELOC_PPC_EMB_RELST_HA:
6953 case BFD_RELOC_PPC_EMB_BIT_FLD:
6954 case BFD_RELOC_PPC_EMB_RELSDA:
0baf16f2 6955 case BFD_RELOC_PPC64_TOC:
3b8b57a9
AM		 6956 case BFD_RELOC_PPC_TOC16:
6957 case BFD_RELOC_PPC64_TOC16_LO:
6958 case BFD_RELOC_PPC64_TOC16_HI:
6959 case BFD_RELOC_PPC64_TOC16_HA:
f9c6b907
AM		 6960 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6961 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
3b8b57a9
AM		 6962 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6963 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6964 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6965 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
f9c6b907
AM		 6966 case BFD_RELOC_PPC64_TPREL16_HIGH:
6967 case BFD_RELOC_PPC64_TPREL16_HIGHA:
3b8b57a9
AM		 6968 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6969 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6970 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6971 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
94f592af 6972 fixP->fx_done = 0;
0baf16f2 6973 break;
0baf16f2 6974#endif
3b8b57a9
AM		 6975
6976#ifdef OBJ_XCOFF
6977 case BFD_RELOC_NONE:
3b8b57a9 6978#endif
5656a981
AM		 6979 case BFD_RELOC_CTOR:
6980 case BFD_RELOC_32:
6981 case BFD_RELOC_32_PCREL:
6982 case BFD_RELOC_RVA:
6983 case BFD_RELOC_64:
6984 case BFD_RELOC_64_PCREL:
6985 case BFD_RELOC_16:
6986 case BFD_RELOC_16_PCREL:
6987 case BFD_RELOC_8:
6988 break;
3b8b57a9 6989
252b5132 6990 default:
bc805888 6991 fprintf (stderr,
94f592af 6992 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6993 fflush (stderr);
252b5132
RH		 6994 abort ();
6995 }
46b596ff 6996
5656a981 6997 if (fixP->fx_size && APPLY_RELOC)
46b596ff 6998 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5656a981 6999 fieldval, fixP->fx_size);
bf7279d5
AM		 7000 if (warn_476
7001 && (seg->flags & SEC_CODE) != 0
7002 && fixP->fx_size == 4
7003 && fixP->fx_done
7004 && !fixP->fx_tcbit
7005 && (fixP->fx_r_type == BFD_RELOC_32
7006 || fixP->fx_r_type == BFD_RELOC_CTOR
7007 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
7008 as_warn_where (fixP->fx_file, fixP->fx_line,
7009 _("data in executable section"));
5656a981
AM		 7010 }
7011
7012 /* We are only able to convert some relocs to pc-relative. */
7013 if (!fixP->fx_done && fixP->fx_pcrel)
7014 {
7015 switch (fixP->fx_r_type)
7016 {
7017 case BFD_RELOC_LO16:
7018 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
7019 break;
7020
7021 case BFD_RELOC_HI16:
7022 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
7023 break;
7024
7025 case BFD_RELOC_HI16_S:
7026 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
7027 break;
7028
7029 case BFD_RELOC_64:
7030 fixP->fx_r_type = BFD_RELOC_64_PCREL;
7031 break;
7032
7033 case BFD_RELOC_32:
7034 fixP->fx_r_type = BFD_RELOC_32_PCREL;
7035 break;
7036
7037 case BFD_RELOC_16:
7038 fixP->fx_r_type = BFD_RELOC_16_PCREL;
7039 break;
7040
7041 /* Some of course are already pc-relative. */
7042 case BFD_RELOC_LO16_PCREL:
7043 case BFD_RELOC_HI16_PCREL:
7044 case BFD_RELOC_HI16_S_PCREL:
a680de9a 7045 case BFD_RELOC_PPC_REL16DX_HA:
5656a981
AM		 7046 case BFD_RELOC_64_PCREL:
7047 case BFD_RELOC_32_PCREL:
7048 case BFD_RELOC_16_PCREL:
7049 case BFD_RELOC_PPC_B16:
7050 case BFD_RELOC_PPC_B16_BRTAKEN:
7051 case BFD_RELOC_PPC_B16_BRNTAKEN:
7052 case BFD_RELOC_PPC_B26:
7053 case BFD_RELOC_PPC_LOCAL24PC:
7054 case BFD_RELOC_24_PLT_PCREL:
7055 case BFD_RELOC_32_PLT_PCREL:
7056 case BFD_RELOC_64_PLT_PCREL:
7057 case BFD_RELOC_PPC_VLE_REL8:
7058 case BFD_RELOC_PPC_VLE_REL15:
7059 case BFD_RELOC_PPC_VLE_REL24:
7060 break;
7061
7062 default:
7063 if (fixP->fx_addsy)
7064 {
3b4dbbbf 7065 const char *sfile;
5656a981
AM		 7066 unsigned int sline;
7067
7068 /* Use expr_symbol_where to see if this is an
7069 expression symbol. */
7070 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7071 as_bad_where (fixP->fx_file, fixP->fx_line,
7072 _("unresolved expression that must"
7073 " be resolved"));
7074 else
7075 as_bad_where (fixP->fx_file, fixP->fx_line,
7076 _("cannot emit PC relative %s relocation"
7077 " against %s"),
7078 bfd_get_reloc_code_name (fixP->fx_r_type),
7079 S_GET_NAME (fixP->fx_addsy));
7080 }
7081 else
7082 as_bad_where (fixP->fx_file, fixP->fx_line,
7083 _("unable to resolve expression"));
7084 fixP->fx_done = 1;
7085 break;
7086 }
252b5132
RH		 7087 }
7088
7089#ifdef OBJ_ELF
3b8b57a9 7090 ppc_elf_validate_fix (fixP, seg);
94f592af 7091 fixP->fx_addnumber = value;
4e6935a6
AM		 7092
7093 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7094 from the section contents. If we are going to be emitting a reloc
7095 then the section contents are immaterial, so don't warn if they
7096 happen to overflow. Leave such warnings to ld. */
7097 if (!fixP->fx_done)
a38a07e0
AM		 7098 {
7099 fixP->fx_no_overflow = 1;
7100
7101 /* Arrange to emit .TOC. as a normal symbol if used in anything
7102 but .TOC.@tocbase. */
7103 if (ppc_obj64
7104 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7105 && fixP->fx_addsy != NULL
7106 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7107 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7108 }
252b5132 7109#else
94f592af
NC		 7110 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7111 fixP->fx_addnumber = 0;
252b5132
RH		 7112 else
7113 {
7114#ifdef TE_PE
94f592af 7115 fixP->fx_addnumber = 0;
252b5132 7116#else
8edcbfcd
TG		 7117 /* We want to use the offset within the toc, not the actual VMA
7118 of the symbol. */
94f592af 7119 fixP->fx_addnumber =
8edcbfcd
TG		 7120 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7121 - S_GET_VALUE (ppc_toc_csect);
ac21e7da
TG		 7122 /* Set *valP to avoid errors. */
7123 *valP = value;
252b5132
RH		 7124#endif
7125 }
7126#endif
252b5132
RH		 7127}
7128
7129/* Generate a reloc for a fixup. */
7130
7131arelent *
98027b10 7132tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 7133{
7134 arelent *reloc;
7135
7136 reloc = (arelent *) xmalloc (sizeof (arelent));
7137
49309057
ILT		 7138 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
7139 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 7140 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7141 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7142 if (reloc->howto == (reloc_howto_type *) NULL)
7143 {
7144 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 7145 _("reloc %d not supported by object file format"),
7146 (int) fixp->fx_r_type);
252b5132
RH		 7147 return NULL;
7148 }
7149 reloc->addend = fixp->fx_addnumber;
7150
7151 return reloc;
7152}
75e21f08
JJ		 7153
7154void
98027b10 7155ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 7156{
7157 cfi_add_CFA_def_cfa (1, 0);
7158}
7159
7160int
1df69f4f 7161tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 7162{
7163 unsigned int regnum = -1;
7164 unsigned int i;
7165 const char *p;
7166 char *q;
e0471c16 7167 static struct { const char *name; int dw2regnum; } regnames[] =
75e21f08
JJ		 7168 {
7169 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7170 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 7171 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 7172 { "spe_acc", 111 }, { "spefscr", 112 }
7173 };
7174
7175 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7176 if (strcmp (regnames[i].name, regname) == 0)
7177 return regnames[i].dw2regnum;
7178
7179 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7180 {
7181 p = regname + 1 + (regname[1] == '.');
7182 regnum = strtoul (p, &q, 10);
7183 if (p == q || *q || regnum >= 32)
7184 return -1;
7185 if (regname[0] == 'f')
b7d7dc63 7186 regnum += 32;
75e21f08 7187 else if (regname[0] == 'v')
b7d7dc63 7188 regnum += 77;
75e21f08
JJ		 7189 }
7190 else if (regname[0] == 'c' && regname[1] == 'r')
7191 {
7192 p = regname + 2 + (regname[2] == '.');
7193 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 7194 return -1;
75e21f08
JJ		 7195 regnum = p[0] - '0' + 68;
7196 }
7197 return regnum;
7198}
GDB Binutils - Deliverables
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