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2003-02-05 Keith Seitz <keiths@redhat.com>
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
ae6063d4 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
2c1c4c62 3 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
81d4177b 21 02111-1307, USA. */
252b5132
RH		 22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132
RH		 26#include "subsegs.h"
27
28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 53#endif
54#endif
55
0baf16f2
AM		 56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM		 99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH		 101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
114static void ppc_change_csect PARAMS ((symbolS *));
115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
185\f
186/* The target specific pseudo-ops which we support. */
187
188const pseudo_typeS md_pseudo_table[] =
189{
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193#ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 221 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225#endif
226
227#ifdef OBJ_ELF
0baf16f2
AM		 228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
2b3c4602 236 { "file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 },
5d6f4f16 237 { "loc", dwarf2_directive_loc, 0 },
252b5132
RH		 238#endif
239
240#ifdef TE_PE
99a814a1 241 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 242 { "previous", ppc_previous, 0 },
243 { "pdata", ppc_pdata, 0 },
244 { "ydata", ppc_ydata, 0 },
245 { "reldata", ppc_reldata, 0 },
246 { "rdata", ppc_rdata, 0 },
247 { "ualong", ppc_ualong, 0 },
248 { "znop", ppc_znop, 0 },
249 { "comm", ppc_pe_comm, 0 },
250 { "lcomm", ppc_pe_comm, 1 },
251 { "section", ppc_pe_section, 0 },
252 { "function", ppc_pe_function,0 },
253 { "tocd", ppc_pe_tocd, 0 },
254#endif
255
0baf16f2 256#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 257 { "tc", ppc_tc, 0 },
0baf16f2
AM		 258 { "machine", ppc_machine, 0 },
259#endif
252b5132
RH		 260
261 { NULL, NULL, 0 }
262};
263
264\f
99a814a1
AM		 265/* Predefined register names if -mregnames (or default for Windows NT).
266 In general, there are lots of them, in an attempt to be compatible
267 with a number of other Windows NT assemblers. */
252b5132
RH		 268
269/* Structure to hold information about predefined registers. */
270struct pd_reg
271 {
272 char *name;
273 int value;
274 };
275
276/* List of registers that are pre-defined:
277
278 Each general register has predefined names of the form:
279 1. r<reg_num> which has the value <reg_num>.
280 2. r.<reg_num> which has the value <reg_num>.
281
252b5132
RH		 282 Each floating point register has predefined names of the form:
283 1. f<reg_num> which has the value <reg_num>.
284 2. f.<reg_num> which has the value <reg_num>.
285
7a899fff
C		 286 Each vector unit register has predefined names of the form:
287 1. v<reg_num> which has the value <reg_num>.
288 2. v.<reg_num> which has the value <reg_num>.
289
252b5132
RH		 290 Each condition register has predefined names of the form:
291 1. cr<reg_num> which has the value <reg_num>.
292 2. cr.<reg_num> which has the value <reg_num>.
293
294 There are individual registers as well:
295 sp or r.sp has the value 1
296 rtoc or r.toc has the value 2
297 fpscr has the value 0
298 xer has the value 1
299 lr has the value 8
300 ctr has the value 9
301 pmr has the value 0
302 dar has the value 19
303 dsisr has the value 18
304 dec has the value 22
305 sdr1 has the value 25
306 srr0 has the value 26
307 srr1 has the value 27
308
81d4177b 309 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 310
311static const struct pd_reg pre_defined_registers[] =
312{
313 { "cr.0", 0 }, /* Condition Registers */
314 { "cr.1", 1 },
315 { "cr.2", 2 },
316 { "cr.3", 3 },
317 { "cr.4", 4 },
318 { "cr.5", 5 },
319 { "cr.6", 6 },
320 { "cr.7", 7 },
321
322 { "cr0", 0 },
323 { "cr1", 1 },
324 { "cr2", 2 },
325 { "cr3", 3 },
326 { "cr4", 4 },
327 { "cr5", 5 },
328 { "cr6", 6 },
329 { "cr7", 7 },
330
331 { "ctr", 9 },
332
333 { "dar", 19 }, /* Data Access Register */
334 { "dec", 22 }, /* Decrementer */
335 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
336
337 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 338 { "f.1", 1 },
339 { "f.10", 10 },
340 { "f.11", 11 },
341 { "f.12", 12 },
342 { "f.13", 13 },
343 { "f.14", 14 },
344 { "f.15", 15 },
345 { "f.16", 16 },
346 { "f.17", 17 },
347 { "f.18", 18 },
348 { "f.19", 19 },
349 { "f.2", 2 },
350 { "f.20", 20 },
351 { "f.21", 21 },
352 { "f.22", 22 },
353 { "f.23", 23 },
354 { "f.24", 24 },
355 { "f.25", 25 },
356 { "f.26", 26 },
357 { "f.27", 27 },
358 { "f.28", 28 },
359 { "f.29", 29 },
360 { "f.3", 3 },
252b5132
RH		 361 { "f.30", 30 },
362 { "f.31", 31 },
81d4177b
KH		 363 { "f.4", 4 },
364 { "f.5", 5 },
365 { "f.6", 6 },
366 { "f.7", 7 },
367 { "f.8", 8 },
368 { "f.9", 9 },
369
370 { "f0", 0 },
371 { "f1", 1 },
372 { "f10", 10 },
373 { "f11", 11 },
374 { "f12", 12 },
375 { "f13", 13 },
376 { "f14", 14 },
377 { "f15", 15 },
378 { "f16", 16 },
379 { "f17", 17 },
380 { "f18", 18 },
381 { "f19", 19 },
382 { "f2", 2 },
383 { "f20", 20 },
384 { "f21", 21 },
385 { "f22", 22 },
386 { "f23", 23 },
387 { "f24", 24 },
388 { "f25", 25 },
389 { "f26", 26 },
390 { "f27", 27 },
391 { "f28", 28 },
392 { "f29", 29 },
393 { "f3", 3 },
252b5132
RH		 394 { "f30", 30 },
395 { "f31", 31 },
81d4177b
KH		 396 { "f4", 4 },
397 { "f5", 5 },
398 { "f6", 6 },
399 { "f7", 7 },
400 { "f8", 8 },
401 { "f9", 9 },
252b5132
RH		 402
403 { "fpscr", 0 },
404
405 { "lr", 8 }, /* Link Register */
406
407 { "pmr", 0 },
408
409 { "r.0", 0 }, /* General Purpose Registers */
410 { "r.1", 1 },
411 { "r.10", 10 },
412 { "r.11", 11 },
413 { "r.12", 12 },
414 { "r.13", 13 },
415 { "r.14", 14 },
416 { "r.15", 15 },
417 { "r.16", 16 },
418 { "r.17", 17 },
419 { "r.18", 18 },
420 { "r.19", 19 },
421 { "r.2", 2 },
422 { "r.20", 20 },
423 { "r.21", 21 },
424 { "r.22", 22 },
425 { "r.23", 23 },
426 { "r.24", 24 },
427 { "r.25", 25 },
428 { "r.26", 26 },
429 { "r.27", 27 },
430 { "r.28", 28 },
431 { "r.29", 29 },
432 { "r.3", 3 },
433 { "r.30", 30 },
434 { "r.31", 31 },
435 { "r.4", 4 },
436 { "r.5", 5 },
437 { "r.6", 6 },
438 { "r.7", 7 },
439 { "r.8", 8 },
440 { "r.9", 9 },
441
442 { "r.sp", 1 }, /* Stack Pointer */
443
444 { "r.toc", 2 }, /* Pointer to the table of contents */
445
446 { "r0", 0 }, /* More general purpose registers */
447 { "r1", 1 },
448 { "r10", 10 },
449 { "r11", 11 },
450 { "r12", 12 },
451 { "r13", 13 },
452 { "r14", 14 },
453 { "r15", 15 },
454 { "r16", 16 },
455 { "r17", 17 },
456 { "r18", 18 },
457 { "r19", 19 },
458 { "r2", 2 },
459 { "r20", 20 },
460 { "r21", 21 },
461 { "r22", 22 },
462 { "r23", 23 },
463 { "r24", 24 },
464 { "r25", 25 },
465 { "r26", 26 },
466 { "r27", 27 },
467 { "r28", 28 },
468 { "r29", 29 },
469 { "r3", 3 },
470 { "r30", 30 },
471 { "r31", 31 },
472 { "r4", 4 },
473 { "r5", 5 },
474 { "r6", 6 },
475 { "r7", 7 },
476 { "r8", 8 },
477 { "r9", 9 },
478
479 { "rtoc", 2 }, /* Table of contents */
480
481 { "sdr1", 25 }, /* Storage Description Register 1 */
482
483 { "sp", 1 },
484
485 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
486 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 487
7a899fff 488 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 489 { "v.1", 1 },
490 { "v.10", 10 },
491 { "v.11", 11 },
492 { "v.12", 12 },
493 { "v.13", 13 },
494 { "v.14", 14 },
495 { "v.15", 15 },
496 { "v.16", 16 },
497 { "v.17", 17 },
498 { "v.18", 18 },
499 { "v.19", 19 },
500 { "v.2", 2 },
501 { "v.20", 20 },
502 { "v.21", 21 },
503 { "v.22", 22 },
504 { "v.23", 23 },
505 { "v.24", 24 },
506 { "v.25", 25 },
507 { "v.26", 26 },
508 { "v.27", 27 },
509 { "v.28", 28 },
510 { "v.29", 29 },
511 { "v.3", 3 },
7a899fff
C		 512 { "v.30", 30 },
513 { "v.31", 31 },
81d4177b
KH		 514 { "v.4", 4 },
515 { "v.5", 5 },
516 { "v.6", 6 },
517 { "v.7", 7 },
518 { "v.8", 8 },
519 { "v.9", 9 },
7a899fff
C		 520
521 { "v0", 0 },
81d4177b
KH		 522 { "v1", 1 },
523 { "v10", 10 },
524 { "v11", 11 },
525 { "v12", 12 },
526 { "v13", 13 },
527 { "v14", 14 },
528 { "v15", 15 },
529 { "v16", 16 },
530 { "v17", 17 },
531 { "v18", 18 },
532 { "v19", 19 },
533 { "v2", 2 },
534 { "v20", 20 },
535 { "v21", 21 },
536 { "v22", 22 },
537 { "v23", 23 },
538 { "v24", 24 },
539 { "v25", 25 },
540 { "v26", 26 },
541 { "v27", 27 },
542 { "v28", 28 },
543 { "v29", 29 },
544 { "v3", 3 },
7a899fff
C		 545 { "v30", 30 },
546 { "v31", 31 },
81d4177b
KH		 547 { "v4", 4 },
548 { "v5", 5 },
549 { "v6", 6 },
550 { "v7", 7 },
551 { "v8", 8 },
7a899fff 552 { "v9", 9 },
252b5132
RH		 553
554 { "xer", 1 },
555
556};
557
bc805888 558#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 559
560/* Given NAME, find the register number associated with that name, return
561 the integer value associated with the given name or -1 on failure. */
562
563static int reg_name_search
564 PARAMS ((const struct pd_reg *, int, const char * name));
565
566static int
567reg_name_search (regs, regcount, name)
568 const struct pd_reg *regs;
569 int regcount;
570 const char *name;
571{
572 int middle, low, high;
573 int cmp;
574
575 low = 0;
576 high = regcount - 1;
577
578 do
579 {
580 middle = (low + high) / 2;
581 cmp = strcasecmp (name, regs[middle].name);
582 if (cmp < 0)
583 high = middle - 1;
584 else if (cmp > 0)
585 low = middle + 1;
586 else
587 return regs[middle].value;
588 }
589 while (low <= high);
590
591 return -1;
592}
593
594/*
99a814a1 595 * Summary of register_name.
252b5132
RH		 596 *
597 * in: Input_line_pointer points to 1st char of operand.
598 *
599 * out: A expressionS.
600 * The operand may have been a register: in this case, X_op == O_register,
601 * X_add_number is set to the register number, and truth is returned.
602 * Input_line_pointer->(next non-blank) char after operand, or is in its
603 * original state.
604 */
605
b34976b6 606static bfd_boolean
252b5132
RH		 607register_name (expressionP)
608 expressionS *expressionP;
609{
610 int reg_number;
611 char *name;
612 char *start;
613 char c;
614
99a814a1 615 /* Find the spelling of the operand. */
252b5132 616 start = name = input_line_pointer;
3882b010 617 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 618 name = ++input_line_pointer;
619
3882b010 620 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 621 return FALSE;
252b5132
RH		 622
623 c = get_symbol_end ();
624 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
625
468cced8
AM		 626 /* Put back the delimiting char. */
627 *input_line_pointer = c;
628
99a814a1 629 /* Look to see if it's in the register table. */
81d4177b 630 if (reg_number >= 0)
252b5132
RH		 631 {
632 expressionP->X_op = O_register;
633 expressionP->X_add_number = reg_number;
81d4177b 634
99a814a1 635 /* Make the rest nice. */
252b5132
RH		 636 expressionP->X_add_symbol = NULL;
637 expressionP->X_op_symbol = NULL;
b34976b6 638 return TRUE;
252b5132 639 }
468cced8
AM		 640
641 /* Reset the line as if we had not done anything. */
642 input_line_pointer = start;
b34976b6 643 return FALSE;
252b5132
RH		 644}
645\f
646/* This function is called for each symbol seen in an expression. It
647 handles the special parsing which PowerPC assemblers are supposed
648 to use for condition codes. */
649
650/* Whether to do the special parsing. */
b34976b6 651static bfd_boolean cr_operand;
252b5132
RH		 652
653/* Names to recognize in a condition code. This table is sorted. */
654static const struct pd_reg cr_names[] =
655{
656 { "cr0", 0 },
657 { "cr1", 1 },
658 { "cr2", 2 },
659 { "cr3", 3 },
660 { "cr4", 4 },
661 { "cr5", 5 },
662 { "cr6", 6 },
663 { "cr7", 7 },
664 { "eq", 2 },
665 { "gt", 1 },
666 { "lt", 0 },
667 { "so", 3 },
668 { "un", 3 }
669};
670
671/* Parsing function. This returns non-zero if it recognized an
672 expression. */
673
674int
675ppc_parse_name (name, expr)
676 const char *name;
677 expressionS *expr;
678{
679 int val;
680
681 if (! cr_operand)
682 return 0;
683
684 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
685 name);
686 if (val < 0)
687 return 0;
688
689 expr->X_op = O_constant;
690 expr->X_add_number = val;
691
692 return 1;
693}
694\f
695/* Local variables. */
696
697/* The type of processor we are assembling for. This is one or more
698 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 699static unsigned long ppc_cpu = 0;
252b5132 700
2b3c4602
AM		 701/* Whether to target xcoff64/elf64. */
702static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 703
252b5132
RH		 704/* Opcode hash table. */
705static struct hash_control *ppc_hash;
706
707/* Macro hash table. */
708static struct hash_control *ppc_macro_hash;
709
710#ifdef OBJ_ELF
99a814a1 711/* What type of shared library support to use. */
5d6f4f16 712static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 713
99a814a1 714/* Flags to set in the elf header. */
252b5132
RH		 715static flagword ppc_flags = 0;
716
717/* Whether this is Solaris or not. */
718#ifdef TARGET_SOLARIS_COMMENT
b34976b6 719#define SOLARIS_P TRUE
252b5132 720#else
b34976b6 721#define SOLARIS_P FALSE
252b5132
RH		 722#endif
723
b34976b6 724static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 725#endif
726
727#ifdef OBJ_XCOFF
728
729/* The RS/6000 assembler uses the .csect pseudo-op to generate code
730 using a bunch of different sections. These assembler sections,
731 however, are all encompassed within the .text or .data sections of
732 the final output file. We handle this by using different
733 subsegments within these main segments. */
734
735/* Next subsegment to allocate within the .text segment. */
736static subsegT ppc_text_subsegment = 2;
737
738/* Linked list of csects in the text section. */
739static symbolS *ppc_text_csects;
740
741/* Next subsegment to allocate within the .data segment. */
742static subsegT ppc_data_subsegment = 2;
743
744/* Linked list of csects in the data section. */
745static symbolS *ppc_data_csects;
746
747/* The current csect. */
748static symbolS *ppc_current_csect;
749
750/* The RS/6000 assembler uses a TOC which holds addresses of functions
751 and variables. Symbols are put in the TOC with the .tc pseudo-op.
752 A special relocation is used when accessing TOC entries. We handle
753 the TOC as a subsegment within the .data segment. We set it up if
754 we see a .toc pseudo-op, and save the csect symbol here. */
755static symbolS *ppc_toc_csect;
756
757/* The first frag in the TOC subsegment. */
758static fragS *ppc_toc_frag;
759
760/* The first frag in the first subsegment after the TOC in the .data
761 segment. NULL if there are no subsegments after the TOC. */
762static fragS *ppc_after_toc_frag;
763
764/* The current static block. */
765static symbolS *ppc_current_block;
766
767/* The COFF debugging section; set by md_begin. This is not the
768 .debug section, but is instead the secret BFD section which will
769 cause BFD to set the section number of a symbol to N_DEBUG. */
770static asection *ppc_coff_debug_section;
771
772#endif /* OBJ_XCOFF */
773
774#ifdef TE_PE
775
776/* Various sections that we need for PE coff support. */
777static segT ydata_section;
778static segT pdata_section;
779static segT reldata_section;
780static segT rdata_section;
781static segT tocdata_section;
782
81d4177b 783/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 784static segT ppc_previous_section;
785static segT ppc_current_section;
786
787#endif /* TE_PE */
788
789#ifdef OBJ_ELF
790symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 791#define PPC_APUINFO_ISEL 0x40
792#define PPC_APUINFO_PMR 0x41
793#define PPC_APUINFO_RFMCI 0x42
794#define PPC_APUINFO_CACHELCK 0x43
795#define PPC_APUINFO_SPE 0x100
796#define PPC_APUINFO_EFS 0x101
797#define PPC_APUINFO_BRLOCK 0x102
798
b34976b6
AM		 799/*
800 * We keep a list of APUinfo
6a0c61b7
EZ		 801 */
802unsigned long *ppc_apuinfo_list;
803unsigned int ppc_apuinfo_num;
804unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 805#endif /* OBJ_ELF */
806\f
807#ifdef OBJ_ELF
15c1449b 808const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 809#else
15c1449b 810const char *const md_shortopts = "um:";
252b5132 811#endif
15c1449b 812const struct option md_longopts[] = {
252b5132
RH		 813 {NULL, no_argument, NULL, 0}
814};
15c1449b 815const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 816
817int
818md_parse_option (c, arg)
819 int c;
820 char *arg;
821{
822 switch (c)
823 {
824 case 'u':
825 /* -u means that any undefined symbols should be treated as
826 external, which is the default for gas anyhow. */
827 break;
828
829#ifdef OBJ_ELF
830 case 'l':
831 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 832 sake, recognize -be also. */
252b5132
RH		 833 if (strcmp (arg, "e") == 0)
834 {
835 target_big_endian = 0;
836 set_target_endian = 1;
837 }
838 else
839 return 0;
840
841 break;
842
843 case 'b':
844 if (strcmp (arg, "e") == 0)
845 {
846 target_big_endian = 1;
847 set_target_endian = 1;
848 }
849 else
850 return 0;
851
852 break;
853
854 case 'K':
99a814a1 855 /* Recognize -K PIC. */
252b5132
RH		 856 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
857 {
858 shlib = SHLIB_PIC;
859 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
860 }
861 else
862 return 0;
863
864 break;
865#endif
866
7f6d05e8
CP		 867 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
868 case 'a':
869 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 870 {
871#ifdef BFD64
872 ppc_obj64 = 1;
873#else
874 as_fatal (_("%s unsupported"), "-a64");
875#endif
876 }
7f6d05e8 877 else if (strcmp (arg, "32") == 0)
2b3c4602 878 ppc_obj64 = 0;
7f6d05e8
CP		 879 else
880 return 0;
881 break;
81d4177b 882
252b5132
RH		 883 case 'm':
884 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
99a814a1 885 (RIOS2). */
252b5132 886 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
2b3c4602 887 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
252b5132
RH		 888 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
889 else if (strcmp (arg, "pwr") == 0)
2b3c4602 890 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
23e1d84c 891 /* -m601 means to assemble for the PowerPC 601, which includes
99a814a1 892 instructions that are holdovers from the Power. */
252b5132 893 else if (strcmp (arg, "601") == 0)
b34976b6
AM		 894 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
895 | PPC_OPCODE_601 | PPC_OPCODE_32);
252b5132 896 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
23e1d84c 897 PowerPC 603/604. */
252b5132
RH		 898 else if (strcmp (arg, "ppc") == 0
899 || strcmp (arg, "ppc32") == 0
252b5132
RH		 900 || strcmp (arg, "603") == 0
901 || strcmp (arg, "604") == 0)
6a0c61b7 902 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
23e1d84c 903 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
418c1742 904 else if (strcmp (arg, "403") == 0
b34976b6
AM		 905 || strcmp (arg, "405") == 0)
906 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
907 | PPC_OPCODE_403 | PPC_OPCODE_32);
418c1742 908 else if (strcmp (arg, "7400") == 0
b34976b6
AM		 909 || strcmp (arg, "7410") == 0
910 || strcmp (arg, "7450") == 0
911 || strcmp (arg, "7455") == 0)
912 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
913 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
418c1742 914 else if (strcmp (arg, "altivec") == 0)
b34976b6
AM		 915 {
916 if (ppc_cpu == 0)
917 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
918 else
919 ppc_cpu |= PPC_OPCODE_ALTIVEC;
920 }
6a0c61b7
EZ		 921 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
922 {
b34976b6
AM		 923 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
924 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
925 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
926 | PPC_OPCODE_RFMCI);
927 }
6a0c61b7
EZ		 928 else if (strcmp (arg, "spe") == 0)
929 {
930 if (ppc_cpu == 0)
931 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
932 else
933 ppc_cpu |= PPC_OPCODE_SPE;
934 }
252b5132 935 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
99a814a1 936 620. */
252b5132
RH		 937 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
938 {
6a0c61b7 939 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
252b5132 940 }
d0e9a01c
RH		 941 else if (strcmp (arg, "ppc64bridge") == 0)
942 {
b34976b6
AM		 943 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
944 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
418c1742
MG		 945 }
946 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
947 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
6a0c61b7
EZ		 948 {
949 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
950 }
418c1742
MG		 951 /* -mbooke64 means enable 64-bit BookE support. */
952 else if (strcmp (arg, "booke64") == 0)
953 {
b34976b6
AM		 954 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
955 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
d0e9a01c 956 }
23e1d84c
AM		 957 else if (strcmp (arg, "power4") == 0)
958 {
b34976b6
AM		 959 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
960 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
23e1d84c 961 }
252b5132
RH		 962 /* -mcom means assemble for the common intersection between Power
963 and PowerPC. At present, we just allow the union, rather
964 than the intersection. */
965 else if (strcmp (arg, "com") == 0)
2b3c4602 966 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132
RH		 967 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
968 else if (strcmp (arg, "any") == 0)
2b3c4602 969 ppc_cpu = PPC_OPCODE_ANY | PPC_OPCODE_32;
252b5132
RH		 970
971 else if (strcmp (arg, "regnames") == 0)
b34976b6 972 reg_names_p = TRUE;
252b5132
RH		 973
974 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 975 reg_names_p = FALSE;
252b5132
RH		 976
977#ifdef OBJ_ELF
99a814a1
AM		 978 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
979 that require relocation. */
252b5132
RH		 980 else if (strcmp (arg, "relocatable") == 0)
981 {
5d6f4f16 982 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 983 ppc_flags |= EF_PPC_RELOCATABLE;
984 }
985
986 else if (strcmp (arg, "relocatable-lib") == 0)
987 {
5d6f4f16 988 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 989 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
990 }
991
99a814a1 992 /* -memb, set embedded bit. */
252b5132
RH		 993 else if (strcmp (arg, "emb") == 0)
994 ppc_flags |= EF_PPC_EMB;
995
99a814a1
AM		 996 /* -mlittle/-mbig set the endianess. */
997 else if (strcmp (arg, "little") == 0
998 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 999 {
1000 target_big_endian = 0;
1001 set_target_endian = 1;
1002 }
1003
1004 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1005 {
1006 target_big_endian = 1;
1007 set_target_endian = 1;
1008 }
1009
1010 else if (strcmp (arg, "solaris") == 0)
1011 {
b34976b6 1012 msolaris = TRUE;
252b5132
RH		 1013 ppc_comment_chars = ppc_solaris_comment_chars;
1014 }
1015
1016 else if (strcmp (arg, "no-solaris") == 0)
1017 {
b34976b6 1018 msolaris = FALSE;
252b5132
RH		 1019 ppc_comment_chars = ppc_eabi_comment_chars;
1020 }
1021#endif
1022 else
1023 {
1024 as_bad (_("invalid switch -m%s"), arg);
1025 return 0;
1026 }
1027 break;
1028
1029#ifdef OBJ_ELF
1030 /* -V: SVR4 argument to print version ID. */
1031 case 'V':
1032 print_version_id ();
1033 break;
1034
1035 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1036 should be emitted or not. FIXME: Not implemented. */
1037 case 'Q':
1038 break;
1039
1040 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1041 rather than .stabs.excl, which is ignored by the linker.
1042 FIXME: Not implemented. */
1043 case 's':
1044 if (arg)
1045 return 0;
1046
1047 break;
1048#endif
1049
1050 default:
1051 return 0;
1052 }
1053
1054 return 1;
1055}
1056
1057void
1058md_show_usage (stream)
1059 FILE *stream;
1060{
bc805888 1061 fprintf (stream, _("\
252b5132
RH		 1062PowerPC options:\n\
1063-u ignored\n\
23e1d84c
AM		 1064-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1065-mpwr generate code for POWER (RIOS1)\n\
1066-m601 generate code for PowerPC 601\n\
418c1742 1067-mppc, -mppc32, -m603, -m604\n\
23e1d84c
AM		 1068 generate code for PowerPC 603/604\n\
1069-m403, -m405 generate code for PowerPC 403/405\n\
f5c120c5 1070-m7400, -m7410, -m7450, -m7455\n\
23e1d84c
AM		 1071 generate code For PowerPC 7400/7410/7450/7455\n\
1072-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1073-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1074-mbooke64 generate code for 64-bit PowerPC BookE\n\
1075-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1076-mpower4 generate code for Power4 architecture\n\
f5c120c5 1077-maltivec generate code for AltiVec\n\
252b5132
RH		 1078-mcom generate code Power/PowerPC common instructions\n\
1079-many generate code for any architecture (PWR/PWRX/PPC)\n\
1080-mregnames Allow symbolic names for registers\n\
1081-mno-regnames Do not allow symbolic names for registers\n"));
6a0c61b7
EZ		 1082 fprintf (stream, _("\
1083-me500, -me500x2 generate code for Motorola e500 core complex\n\
1084-mspe generate code for Motorola SPE instructions\n"));
252b5132 1085#ifdef OBJ_ELF
bc805888 1086 fprintf (stream, _("\
252b5132
RH		 1087-mrelocatable support for GCC's -mrelocatble option\n\
1088-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1089-memb set PPC_EMB bit in ELF flags\n\
1090-mlittle, -mlittle-endian\n\
1091 generate code for a little endian machine\n\
1092-mbig, -mbig-endian generate code for a big endian machine\n\
1093-msolaris generate code for Solaris\n\
1094-mno-solaris do not generate code for Solaris\n\
1095-V print assembler version number\n\
1096-Qy, -Qn ignored\n"));
1097#endif
1098}
1099\f
1100/* Set ppc_cpu if it is not already set. */
1101
1102static void
1103ppc_set_cpu ()
1104{
1105 const char *default_os = TARGET_OS;
1106 const char *default_cpu = TARGET_CPU;
1107
1108 if (ppc_cpu == 0)
1109 {
2a98c3a6
AM		 1110 if (ppc_obj64)
1111 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
1112 else if (strncmp (default_os, "aix", 3) == 0
1113 && default_os[3] >= '4' && default_os[3] <= '9')
2b3c4602 1114 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1115 else if (strncmp (default_os, "aix3", 4) == 0)
2b3c4602 1116 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1117 else if (strcmp (default_cpu, "rs6000") == 0)
2b3c4602 1118 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1119 else if (strncmp (default_cpu, "powerpc", 7) == 0)
b34976b6
AM		 1120 {
1121 if (default_cpu[7] == '6' && default_cpu[8] == '4')
1122 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
1123 else
1124 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
1125 }
252b5132 1126 else
99a814a1
AM		 1127 as_fatal (_("Unknown default cpu = %s, os = %s"),
1128 default_cpu, default_os);
252b5132
RH		 1129 }
1130}
1131
1132/* Figure out the BFD architecture to use. */
1133
1134enum bfd_architecture
1135ppc_arch ()
1136{
1137 const char *default_cpu = TARGET_CPU;
1138 ppc_set_cpu ();
1139
1140 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1141 return bfd_arch_powerpc;
1142 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1143 return bfd_arch_rs6000;
1144 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1145 {
1146 if (strcmp (default_cpu, "rs6000") == 0)
1147 return bfd_arch_rs6000;
0baf16f2 1148 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1149 return bfd_arch_powerpc;
1150 }
1151
1152 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1153 return bfd_arch_unknown;
1154}
1155
7f6d05e8
CP		 1156unsigned long
1157ppc_mach ()
1158{
2a98c3a6
AM		 1159 if (ppc_obj64)
1160 return bfd_mach_ppc64;
1161 else if (ppc_arch () == bfd_arch_rs6000)
1162 return bfd_mach_rs6k;
1163 else
1164 return bfd_mach_ppc;
7f6d05e8
CP		 1165}
1166
81d4177b 1167extern char*
99a814a1 1168ppc_target_format ()
7f6d05e8
CP		 1169{
1170#ifdef OBJ_COFF
1171#ifdef TE_PE
99a814a1 1172 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1173#elif TE_POWERMAC
0baf16f2 1174 return "xcoff-powermac";
7f6d05e8 1175#else
eb1e0e80 1176# ifdef TE_AIX5
2b3c4602 1177 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1178# else
2b3c4602 1179 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1180# endif
7f6d05e8 1181#endif
7f6d05e8
CP		 1182#endif
1183#ifdef OBJ_ELF
0baf16f2 1184 return (target_big_endian
2b3c4602
AM		 1185 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1186 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
7f6d05e8
CP		 1187#endif
1188}
1189
252b5132
RH		 1190/* This function is called when the assembler starts up. It is called
1191 after the options have been parsed and the output file has been
1192 opened. */
1193
1194void
1195md_begin ()
1196{
1197 register const struct powerpc_opcode *op;
1198 const struct powerpc_opcode *op_end;
1199 const struct powerpc_macro *macro;
1200 const struct powerpc_macro *macro_end;
b34976b6 1201 bfd_boolean dup_insn = FALSE;
252b5132
RH		 1202
1203 ppc_set_cpu ();
1204
1205#ifdef OBJ_ELF
81d4177b 1206 /* Set the ELF flags if desired. */
252b5132
RH		 1207 if (ppc_flags && !msolaris)
1208 bfd_set_private_flags (stdoutput, ppc_flags);
1209#endif
1210
1211 /* Insert the opcodes into a hash table. */
1212 ppc_hash = hash_new ();
1213
1214 op_end = powerpc_opcodes + powerpc_num_opcodes;
1215 for (op = powerpc_opcodes; op < op_end; op++)
1216 {
1217 know ((op->opcode & op->mask) == op->opcode);
1218
2b3c4602 1219 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1220 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1221 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1222 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1223 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1224 /* Certain instructions (eg: extsw) do not exist in the
1225 32-bit BookE instruction set, but they do exist in the
1226 64-bit BookE instruction set, and other PPC instruction
1227 sets. Check to see if the opcode has the BOOKE64 flag set.
1228 If it does make sure that the target CPU is not the BookE32. */
1229 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1230 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1231 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1232 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1233 || ((op->flags & PPC_OPCODE_POWER4)
1234 == (ppc_cpu & PPC_OPCODE_POWER4))))
252b5132
RH		 1235 {
1236 const char *retval;
1237
1238 retval = hash_insert (ppc_hash, op->name, (PTR) op);
1239 if (retval != (const char *) NULL)
1240 {
99a814a1 1241 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1242 if ((ppc_cpu & PPC_OPCODE_601) != 0
1243 && (op->flags & PPC_OPCODE_POWER) != 0)
1244 continue;
1245
99a814a1
AM		 1246 as_bad (_("Internal assembler error for instruction %s"),
1247 op->name);
b34976b6 1248 dup_insn = TRUE;
252b5132
RH		 1249 }
1250 }
1251 }
1252
1253 /* Insert the macros into a hash table. */
1254 ppc_macro_hash = hash_new ();
1255
1256 macro_end = powerpc_macros + powerpc_num_macros;
1257 for (macro = powerpc_macros; macro < macro_end; macro++)
1258 {
1259 if ((macro->flags & ppc_cpu) != 0)
1260 {
1261 const char *retval;
1262
1263 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1264 if (retval != (const char *) NULL)
1265 {
1266 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1267 dup_insn = TRUE;
252b5132
RH		 1268 }
1269 }
1270 }
1271
1272 if (dup_insn)
1273 abort ();
1274
99a814a1
AM		 1275 /* Tell the main code what the endianness is if it is not overidden
1276 by the user. */
252b5132
RH		 1277 if (!set_target_endian)
1278 {
1279 set_target_endian = 1;
1280 target_big_endian = PPC_BIG_ENDIAN;
1281 }
1282
1283#ifdef OBJ_XCOFF
1284 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1285
1286 /* Create dummy symbols to serve as initial csects. This forces the
1287 text csects to precede the data csects. These symbols will not
1288 be output. */
1289 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1290 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1291 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1292 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1293#endif
1294
1295#ifdef TE_PE
1296
1297 ppc_current_section = text_section;
81d4177b 1298 ppc_previous_section = 0;
252b5132
RH		 1299
1300#endif
1301}
1302
6a0c61b7
EZ		 1303void
1304ppc_cleanup ()
1305{
dc1d03fc 1306#ifdef OBJ_ELF
6a0c61b7
EZ		 1307 if (ppc_apuinfo_list == NULL)
1308 return;
1309
1310 /* Ok, so write the section info out. We have this layout:
1311
1312 byte data what
1313 ---- ---- ----
1314 0 8 length of "APUinfo\0"
1315 4 (n*4) number of APU's (4 bytes each)
1316 8 2 note type 2
1317 12 "APUinfo\0" name
1318 20 APU#1 first APU's info
1319 24 APU#2 second APU's info
1320 ... ...
1321 */
1322 {
1323 char *p;
1324 asection *seg = now_seg;
1325 subsegT subseg = now_subseg;
1326 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1327 unsigned int i;
6a0c61b7
EZ		 1328
1329 /* Create the .PPC.EMB.apuinfo section. */
1330 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1331 bfd_set_section_flags (stdoutput,
1332 apuinfo_secp,
e1a9cb8e 1333 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1334
1335 p = frag_more (4);
1336 md_number_to_chars (p, (valueT) 8, 4);
1337
1338 p = frag_more (4);
1339 md_number_to_chars (p, (valueT) ppc_apuinfo_num, 4);
1340
1341 p = frag_more (4);
1342 md_number_to_chars (p, (valueT) 2, 4);
1343
1344 p = frag_more (8);
1345 strcpy (p, "APUinfo");
1346
1347 for (i = 0; i < ppc_apuinfo_num; i++)
1348 {
b34976b6
AM		 1349 p = frag_more (4);
1350 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1351 }
1352
1353 frag_align (2, 0, 0);
1354
1355 /* We probably can't restore the current segment, for there likely
1356 isn't one yet... */
1357 if (seg && subseg)
1358 subseg_set (seg, subseg);
1359 }
dc1d03fc 1360#endif
6a0c61b7
EZ		 1361}
1362
252b5132
RH		 1363/* Insert an operand value into an instruction. */
1364
1365static unsigned long
1366ppc_insert_operand (insn, operand, val, file, line)
1367 unsigned long insn;
1368 const struct powerpc_operand *operand;
1369 offsetT val;
1370 char *file;
1371 unsigned int line;
1372{
1373 if (operand->bits != 32)
1374 {
1375 long min, max;
1376 offsetT test;
1377
1378 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1379 {
d0e9a01c 1380 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH		 1381 max = (1 << operand->bits) - 1;
1382 else
1383 max = (1 << (operand->bits - 1)) - 1;
1384 min = - (1 << (operand->bits - 1));
1385
2b3c4602 1386 if (!ppc_obj64)
252b5132
RH		 1387 {
1388 /* Some people write 32 bit hex constants with the sign
1389 extension done by hand. This shouldn't really be
1390 valid, but, to permit this code to assemble on a 64
1391 bit host, we sign extend the 32 bit value. */
1392 if (val > 0
92161534
ILT		 1393 && (val & (offsetT) 0x80000000) != 0
1394 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH		 1395 {
1396 val -= 0x80000000;
1397 val -= 0x80000000;
1398 }
1399 }
1400 }
1401 else
1402 {
1403 max = (1 << operand->bits) - 1;
1404 min = 0;
1405 }
1406
1407 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1408 test = - val;
1409 else
1410 test = val;
1411
1412 if (test < (offsetT) min || test > (offsetT) max)
1413 {
1414 const char *err =
1415 _("operand out of range (%s not between %ld and %ld)");
1416 char buf[100];
1417
1418 sprint_value (buf, test);
0baf16f2 1419 as_bad_where (file, line, err, buf, min, max);
252b5132
RH		 1420 }
1421 }
1422
1423 if (operand->insert)
1424 {
1425 const char *errmsg;
1426
1427 errmsg = NULL;
2b3c4602 1428 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1429 if (errmsg != (const char *) NULL)
0baf16f2 1430 as_bad_where (file, line, errmsg);
252b5132
RH		 1431 }
1432 else
1433 insn |= (((long) val & ((1 << operand->bits) - 1))
1434 << operand->shift);
1435
1436 return insn;
1437}
1438
1439\f
1440#ifdef OBJ_ELF
1441/* Parse @got, etc. and return the desired relocation. */
1442static bfd_reloc_code_real_type
1443ppc_elf_suffix (str_p, exp_p)
1444 char **str_p;
1445 expressionS *exp_p;
1446{
1447 struct map_bfd {
1448 char *string;
1449 int length;
15c1449b 1450 int reloc;
252b5132
RH		 1451 };
1452
1453 char ident[20];
1454 char *str = *str_p;
1455 char *str2;
1456 int ch;
1457 int len;
15c1449b 1458 const struct map_bfd *ptr;
252b5132 1459
bc805888 1460#define MAP(str,reloc) { str, sizeof (str)-1, reloc }
252b5132 1461
15c1449b 1462 static const struct map_bfd mapping[] = {
cdba85ec
AM		 1463 MAP ("l", (int) BFD_RELOC_LO16),
1464 MAP ("h", (int) BFD_RELOC_HI16),
1465 MAP ("ha", (int) BFD_RELOC_HI16_S),
1466 MAP ("brtaken", (int) BFD_RELOC_PPC_B16_BRTAKEN),
1467 MAP ("brntaken", (int) BFD_RELOC_PPC_B16_BRNTAKEN),
1468 MAP ("got", (int) BFD_RELOC_16_GOTOFF),
1469 MAP ("got@l", (int) BFD_RELOC_LO16_GOTOFF),
1470 MAP ("got@h", (int) BFD_RELOC_HI16_GOTOFF),
1471 MAP ("got@ha", (int) BFD_RELOC_HI16_S_GOTOFF),
1472 MAP ("fixup", (int) BFD_RELOC_CTOR),
1473 MAP ("plt", (int) BFD_RELOC_24_PLT_PCREL),
1474 MAP ("pltrel24", (int) BFD_RELOC_24_PLT_PCREL),
1475 MAP ("copy", (int) BFD_RELOC_PPC_COPY),
1476 MAP ("globdat", (int) BFD_RELOC_PPC_GLOB_DAT),
1477 MAP ("local24pc", (int) BFD_RELOC_PPC_LOCAL24PC),
1478 MAP ("local", (int) BFD_RELOC_PPC_LOCAL24PC),
1479 MAP ("pltrel", (int) BFD_RELOC_32_PLT_PCREL),
1480 MAP ("plt@l", (int) BFD_RELOC_LO16_PLTOFF),
1481 MAP ("plt@h", (int) BFD_RELOC_HI16_PLTOFF),
1482 MAP ("plt@ha", (int) BFD_RELOC_HI16_S_PLTOFF),
1483 MAP ("sdarel", (int) BFD_RELOC_GPREL16),
1484 MAP ("sectoff", (int) BFD_RELOC_16_BASEREL),
1485 MAP ("sectoff@l", (int) BFD_RELOC_LO16_BASEREL),
1486 MAP ("sectoff@h", (int) BFD_RELOC_HI16_BASEREL),
1487 MAP ("sectoff@ha", (int) BFD_RELOC_HI16_S_BASEREL),
1488 MAP ("naddr", (int) BFD_RELOC_PPC_EMB_NADDR32),
1489 MAP ("naddr16", (int) BFD_RELOC_PPC_EMB_NADDR16),
1490 MAP ("naddr@l", (int) BFD_RELOC_PPC_EMB_NADDR16_LO),
1491 MAP ("naddr@h", (int) BFD_RELOC_PPC_EMB_NADDR16_HI),
1492 MAP ("naddr@ha", (int) BFD_RELOC_PPC_EMB_NADDR16_HA),
1493 MAP ("sdai16", (int) BFD_RELOC_PPC_EMB_SDAI16),
1494 MAP ("sda2rel", (int) BFD_RELOC_PPC_EMB_SDA2REL),
1495 MAP ("sda2i16", (int) BFD_RELOC_PPC_EMB_SDA2I16),
1496 MAP ("sda21", (int) BFD_RELOC_PPC_EMB_SDA21),
1497 MAP ("mrkref", (int) BFD_RELOC_PPC_EMB_MRKREF),
1498 MAP ("relsect", (int) BFD_RELOC_PPC_EMB_RELSEC16),
1499 MAP ("relsect@l", (int) BFD_RELOC_PPC_EMB_RELST_LO),
1500 MAP ("relsect@h", (int) BFD_RELOC_PPC_EMB_RELST_HI),
1501 MAP ("relsect@ha", (int) BFD_RELOC_PPC_EMB_RELST_HA),
1502 MAP ("bitfld", (int) BFD_RELOC_PPC_EMB_BIT_FLD),
1503 MAP ("relsda", (int) BFD_RELOC_PPC_EMB_RELSDA),
1504 MAP ("xgot", (int) BFD_RELOC_PPC_TOC16),
1505 MAP ("tls", (int) BFD_RELOC_PPC_TLS),
1506 MAP ("dtpmod", (int) BFD_RELOC_PPC_DTPMOD),
1507 MAP ("dtprel", (int) BFD_RELOC_PPC_DTPREL),
1508 MAP ("dtprel@l", (int) BFD_RELOC_PPC_DTPREL16_LO),
1509 MAP ("dtprel@h", (int) BFD_RELOC_PPC_DTPREL16_HI),
1510 MAP ("dtprel@ha", (int) BFD_RELOC_PPC_DTPREL16_HA),
1511 MAP ("tprel", (int) BFD_RELOC_PPC_TPREL),
1512 MAP ("tprel@l", (int) BFD_RELOC_PPC_TPREL16_LO),
1513 MAP ("tprel@h", (int) BFD_RELOC_PPC_TPREL16_HI),
1514 MAP ("tprel@ha", (int) BFD_RELOC_PPC_TPREL16_HA),
1515 MAP ("got@tlsgd", (int) BFD_RELOC_PPC_GOT_TLSGD16),
1516 MAP ("got@tlsgd@l", (int) BFD_RELOC_PPC_GOT_TLSGD16_LO),
1517 MAP ("got@tlsgd@h", (int) BFD_RELOC_PPC_GOT_TLSGD16_HI),
1518 MAP ("got@tlsgd@ha", (int) BFD_RELOC_PPC_GOT_TLSGD16_HA),
1519 MAP ("got@tlsld", (int) BFD_RELOC_PPC_GOT_TLSLD16),
1520 MAP ("got@tlsld@l", (int) BFD_RELOC_PPC_GOT_TLSLD16_LO),
1521 MAP ("got@tlsld@h", (int) BFD_RELOC_PPC_GOT_TLSLD16_HI),
1522 MAP ("got@tlsld@ha", (int) BFD_RELOC_PPC_GOT_TLSLD16_HA),
1523 MAP ("got@dtprel", (int) BFD_RELOC_PPC_GOT_DTPREL16),
1524 MAP ("got@dtprel@l", (int) BFD_RELOC_PPC_GOT_DTPREL16_LO),
1525 MAP ("got@dtprel@h", (int) BFD_RELOC_PPC_GOT_DTPREL16_HI),
1526 MAP ("got@dtprel@ha", (int) BFD_RELOC_PPC_GOT_DTPREL16_HA),
1527 MAP ("got@tprel", (int) BFD_RELOC_PPC_GOT_TPREL16),
1528 MAP ("got@tprel@l", (int) BFD_RELOC_PPC_GOT_TPREL16_LO),
1529 MAP ("got@tprel@h", (int) BFD_RELOC_PPC_GOT_TPREL16_HI),
1530 MAP ("got@tprel@ha", (int) BFD_RELOC_PPC_GOT_TPREL16_HA),
2b3c4602
AM		 1531 /* The following are only valid for ppc64. Negative values are
1532 used instead of a flag. */
cdba85ec
AM		 1533 MAP ("higher", - (int) BFD_RELOC_PPC64_HIGHER),
1534 MAP ("highera", - (int) BFD_RELOC_PPC64_HIGHER_S),
1535 MAP ("highest", - (int) BFD_RELOC_PPC64_HIGHEST),
1536 MAP ("highesta", - (int) BFD_RELOC_PPC64_HIGHEST_S),
1537 MAP ("tocbase", - (int) BFD_RELOC_PPC64_TOC),
1538 MAP ("toc", - (int) BFD_RELOC_PPC_TOC16),
1539 MAP ("toc@l", - (int) BFD_RELOC_PPC64_TOC16_LO),
1540 MAP ("toc@h", - (int) BFD_RELOC_PPC64_TOC16_HI),
1541 MAP ("toc@ha", - (int) BFD_RELOC_PPC64_TOC16_HA),
1542 MAP ("dtprel@higher", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHER),
1543 MAP ("dtprel@highera", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1544 MAP ("dtprel@highest", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1545 MAP ("dtprel@highesta", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1546 MAP ("tprel@higher", - (int) BFD_RELOC_PPC64_TPREL16_HIGHER),
1547 MAP ("tprel@highera", - (int) BFD_RELOC_PPC64_TPREL16_HIGHERA),
1548 MAP ("tprel@highest", - (int) BFD_RELOC_PPC64_TPREL16_HIGHEST),
1549 MAP ("tprel@highesta", - (int) BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1550 { (char *) 0, 0, (int) BFD_RELOC_UNUSED }
252b5132
RH		 1551 };
1552
1553 if (*str++ != '@')
1554 return BFD_RELOC_UNUSED;
1555
1556 for (ch = *str, str2 = ident;
1557 (str2 < ident + sizeof (ident) - 1
3882b010 1558 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1559 ch = *++str)
1560 {
3882b010 1561 *str2++ = TOLOWER (ch);
252b5132
RH		 1562 }
1563
1564 *str2 = '\0';
1565 len = str2 - ident;
1566
1567 ch = ident[0];
1568 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1569 if (ch == ptr->string[0]
1570 && len == ptr->length
1571 && memcmp (ident, ptr->string, ptr->length) == 0)
1572 {
15c1449b
AM		 1573 int reloc = ptr->reloc;
1574
2b3c4602 1575 if (reloc < 0)
15c1449b 1576 {
2b3c4602 1577 if (!ppc_obj64)
15c1449b
AM		 1578 return BFD_RELOC_UNUSED;
1579 reloc = -reloc;
1580 }
1581
cdba85ec 1582 if (!ppc_obj64)
252b5132 1583 {
cdba85ec
AM		 1584 if (exp_p->X_add_number != 0
1585 && (reloc == (int) BFD_RELOC_16_GOTOFF
1586 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1587 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1588 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1589 as_warn (_("identifier+constant@got means identifier@got+constant"));
1590
1591 /* Now check for identifier@suffix+constant. */
1592 if (*str == '-' || *str == '+')
252b5132 1593 {
cdba85ec
AM		 1594 char *orig_line = input_line_pointer;
1595 expressionS new_exp;
1596
1597 input_line_pointer = str;
1598 expression (&new_exp);
1599 if (new_exp.X_op == O_constant)
1600 {
1601 exp_p->X_add_number += new_exp.X_add_number;
1602 str = input_line_pointer;
1603 }
1604
1605 if (&input_line_pointer != str_p)
1606 input_line_pointer = orig_line;
252b5132 1607 }
252b5132 1608 }
252b5132 1609 *str_p = str;
0baf16f2 1610
2b3c4602 1611 if (reloc == (int) BFD_RELOC_PPC64_TOC
0baf16f2
AM		 1612 && exp_p->X_op == O_symbol)
1613 {
1614 /* This reloc type ignores the symbol. Change the symbol
1615 so that the dummy .TOC. symbol can be omitted from the
1616 object file. */
1617 exp_p->X_add_symbol = &abs_symbol;
1618 }
1619
15c1449b 1620 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1621 }
1622
1623 return BFD_RELOC_UNUSED;
1624}
1625
99a814a1
AM		 1626/* Like normal .long/.short/.word, except support @got, etc.
1627 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1628static void
1629ppc_elf_cons (nbytes)
0baf16f2 1630 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1631{
1632 expressionS exp;
1633 bfd_reloc_code_real_type reloc;
1634
1635 if (is_it_end_of_statement ())
1636 {
1637 demand_empty_rest_of_line ();
1638 return;
1639 }
1640
1641 do
1642 {
1643 expression (&exp);
1644 if (exp.X_op == O_symbol
1645 && *input_line_pointer == '@'
99a814a1
AM		 1646 && (reloc = ppc_elf_suffix (&input_line_pointer,
1647 &exp)) != BFD_RELOC_UNUSED)
252b5132 1648 {
99a814a1
AM		 1649 reloc_howto_type *reloc_howto;
1650 int size;
1651
1652 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1653 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1654
1655 if (size > nbytes)
0baf16f2
AM		 1656 {
1657 as_bad (_("%s relocations do not fit in %d bytes\n"),
1658 reloc_howto->name, nbytes);
1659 }
252b5132
RH		 1660 else
1661 {
0baf16f2
AM		 1662 char *p;
1663 int offset;
252b5132 1664
0baf16f2
AM		 1665 p = frag_more (nbytes);
1666 offset = 0;
1667 if (target_big_endian)
1668 offset = nbytes - size;
99a814a1
AM		 1669 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1670 &exp, 0, reloc);
252b5132
RH		 1671 }
1672 }
1673 else
1674 emit_expr (&exp, (unsigned int) nbytes);
1675 }
1676 while (*input_line_pointer++ == ',');
1677
99a814a1
AM		 1678 /* Put terminator back into stream. */
1679 input_line_pointer--;
252b5132
RH		 1680 demand_empty_rest_of_line ();
1681}
1682
1683/* Solaris pseduo op to change to the .rodata section. */
1684static void
1685ppc_elf_rdata (xxx)
1686 int xxx;
1687{
1688 char *save_line = input_line_pointer;
1689 static char section[] = ".rodata\n";
1690
99a814a1 1691 /* Just pretend this is .section .rodata */
252b5132
RH		 1692 input_line_pointer = section;
1693 obj_elf_section (xxx);
1694
1695 input_line_pointer = save_line;
1696}
1697
99a814a1 1698/* Pseudo op to make file scope bss items. */
252b5132 1699static void
99a814a1 1700ppc_elf_lcomm (xxx)
92161534 1701 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1702{
1703 register char *name;
1704 register char c;
1705 register char *p;
1706 offsetT size;
1707 register symbolS *symbolP;
1708 offsetT align;
1709 segT old_sec;
1710 int old_subsec;
1711 char *pfrag;
1712 int align2;
1713
1714 name = input_line_pointer;
1715 c = get_symbol_end ();
1716
99a814a1 1717 /* just after name is now '\0'. */
252b5132
RH		 1718 p = input_line_pointer;
1719 *p = c;
1720 SKIP_WHITESPACE ();
1721 if (*input_line_pointer != ',')
1722 {
1723 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1724 ignore_rest_of_line ();
1725 return;
1726 }
1727
1728 input_line_pointer++; /* skip ',' */
1729 if ((size = get_absolute_expression ()) < 0)
1730 {
1731 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1732 ignore_rest_of_line ();
1733 return;
1734 }
1735
1736 /* The third argument to .lcomm is the alignment. */
1737 if (*input_line_pointer != ',')
1738 align = 8;
1739 else
1740 {
1741 ++input_line_pointer;
1742 align = get_absolute_expression ();
1743 if (align <= 0)
1744 {
1745 as_warn (_("ignoring bad alignment"));
1746 align = 8;
1747 }
1748 }
1749
1750 *p = 0;
1751 symbolP = symbol_find_or_make (name);
1752 *p = c;
1753
1754 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1755 {
1756 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1757 S_GET_NAME (symbolP));
1758 ignore_rest_of_line ();
1759 return;
1760 }
1761
1762 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1763 {
1764 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1765 S_GET_NAME (symbolP),
1766 (long) S_GET_VALUE (symbolP),
1767 (long) size);
1768
1769 ignore_rest_of_line ();
1770 return;
1771 }
1772
99a814a1 1773 /* Allocate_bss. */
252b5132
RH		 1774 old_sec = now_seg;
1775 old_subsec = now_subseg;
1776 if (align)
1777 {
99a814a1 1778 /* Convert to a power of 2 alignment. */
252b5132
RH		 1779 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1780 if (align != 1)
1781 {
1782 as_bad (_("Common alignment not a power of 2"));
1783 ignore_rest_of_line ();
1784 return;
1785 }
1786 }
1787 else
1788 align2 = 0;
1789
1790 record_alignment (bss_section, align2);
1791 subseg_set (bss_section, 0);
1792 if (align2)
1793 frag_align (align2, 0, 0);
1794 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1795 symbol_get_frag (symbolP)->fr_symbol = 0;
1796 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1797 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1798 (char *) 0);
1799 *pfrag = 0;
1800 S_SET_SIZE (symbolP, size);
1801 S_SET_SEGMENT (symbolP, bss_section);
1802 subseg_set (old_sec, old_subsec);
1803 demand_empty_rest_of_line ();
1804}
1805
1806/* Validate any relocations emitted for -mrelocatable, possibly adding
1807 fixups for word relocations in writable segments, so we can adjust
1808 them at runtime. */
1809static void
1810ppc_elf_validate_fix (fixp, seg)
1811 fixS *fixp;
1812 segT seg;
1813{
1814 if (fixp->fx_done || fixp->fx_pcrel)
1815 return;
1816
1817 switch (shlib)
1818 {
1819 case SHLIB_NONE:
1820 case SHLIB_PIC:
1821 return;
1822
5d6f4f16 1823 case SHLIB_MRELOCATABLE:
252b5132
RH		 1824 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1825 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1826 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1827 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1828 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1829 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1830 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1831 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1832 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1833 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1834 && strcmp (segment_name (seg), ".got2") != 0
1835 && strcmp (segment_name (seg), ".dtors") != 0
1836 && strcmp (segment_name (seg), ".ctors") != 0
1837 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1838 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1839 && strcmp (segment_name (seg), ".eh_frame") != 0
1840 && strcmp (segment_name (seg), ".ex_shared") != 0)
1841 {
1842 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1843 || fixp->fx_r_type != BFD_RELOC_CTOR)
1844 {
1845 as_bad_where (fixp->fx_file, fixp->fx_line,
1846 _("Relocation cannot be done when using -mrelocatable"));
1847 }
1848 }
1849 return;
1850 }
1851}
0baf16f2 1852
7e8d4ab4
AM		 1853/* Prevent elf_frob_file_before_adjust removing a weak undefined
1854 function descriptor sym if the corresponding code sym is used. */
1855
1856void
1857ppc_frob_file_before_adjust ()
0baf16f2 1858{
7e8d4ab4 1859 symbolS *symp;
0baf16f2 1860
7e8d4ab4
AM		 1861 if (!ppc_obj64)
1862 return;
1863
1864 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1865 {
7e8d4ab4
AM		 1866 const char *name;
1867 char *dotname;
1868 symbolS *dotsym;
1869 size_t len;
1870
1871 name = S_GET_NAME (symp);
1872 if (name[0] == '.')
1873 continue;
1874
1875 if (! S_IS_WEAK (symp)
1876 || S_IS_DEFINED (symp))
1877 continue;
1878
1879 len = strlen (name) + 1;
1880 dotname = xmalloc (len + 1);
1881 dotname[0] = '.';
1882 memcpy (dotname + 1, name, len);
1883 dotsym = symbol_find (dotname);
1884 free (dotname);
1885 if (dotsym != NULL && (symbol_used_p (dotsym)
1886 || symbol_used_in_reloc_p (dotsym)))
1887 {
1888 symbol_mark_used (symp);
1889 }
0baf16f2
AM		 1890 }
1891
7e8d4ab4
AM		 1892 /* Don't emit .TOC. symbol. */
1893 symp = symbol_find (".TOC.");
1894 if (symp != NULL)
1895 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1896}
252b5132
RH		 1897#endif /* OBJ_ELF */
1898\f
1899#ifdef TE_PE
1900
1901/*
99a814a1 1902 * Summary of parse_toc_entry.
252b5132
RH		 1903 *
1904 * in: Input_line_pointer points to the '[' in one of:
1905 *
1906 * [toc] [tocv] [toc32] [toc64]
1907 *
1908 * Anything else is an error of one kind or another.
1909 *
81d4177b 1910 * out:
252b5132
RH		 1911 * return value: success or failure
1912 * toc_kind: kind of toc reference
1913 * input_line_pointer:
1914 * success: first char after the ']'
1915 * failure: unchanged
1916 *
1917 * settings:
1918 *
1919 * [toc] - rv == success, toc_kind = default_toc
1920 * [tocv] - rv == success, toc_kind = data_in_toc
1921 * [toc32] - rv == success, toc_kind = must_be_32
1922 * [toc64] - rv == success, toc_kind = must_be_64
1923 *
1924 */
1925
81d4177b
KH		 1926enum toc_size_qualifier
1927{
252b5132
RH		 1928 default_toc, /* The toc cell constructed should be the system default size */
1929 data_in_toc, /* This is a direct reference to a toc cell */
1930 must_be_32, /* The toc cell constructed must be 32 bits wide */
1931 must_be_64 /* The toc cell constructed must be 64 bits wide */
1932};
1933
1934static int
99a814a1 1935parse_toc_entry (toc_kind)
252b5132
RH		 1936 enum toc_size_qualifier *toc_kind;
1937{
1938 char *start;
1939 char *toc_spec;
1940 char c;
1941 enum toc_size_qualifier t;
1942
99a814a1 1943 /* Save the input_line_pointer. */
252b5132
RH		 1944 start = input_line_pointer;
1945
99a814a1 1946 /* Skip over the '[' , and whitespace. */
252b5132
RH		 1947 ++input_line_pointer;
1948 SKIP_WHITESPACE ();
81d4177b 1949
99a814a1 1950 /* Find the spelling of the operand. */
252b5132
RH		 1951 toc_spec = input_line_pointer;
1952 c = get_symbol_end ();
1953
99a814a1 1954 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 1955 {
1956 t = default_toc;
1957 }
99a814a1 1958 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 1959 {
1960 t = data_in_toc;
1961 }
99a814a1 1962 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 1963 {
1964 t = must_be_32;
1965 }
99a814a1 1966 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 1967 {
1968 t = must_be_64;
1969 }
1970 else
1971 {
1972 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 1973 *input_line_pointer = c;
1974 input_line_pointer = start;
252b5132
RH		 1975 return 0;
1976 }
1977
99a814a1
AM		 1978 /* Now find the ']'. */
1979 *input_line_pointer = c;
252b5132 1980
81d4177b
KH		 1981 SKIP_WHITESPACE (); /* leading whitespace could be there. */
1982 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 1983
1984 if (c != ']')
1985 {
1986 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 1987 input_line_pointer = start;
252b5132
RH		 1988 return 0;
1989 }
1990
99a814a1 1991 *toc_kind = t;
252b5132
RH		 1992 return 1;
1993}
1994#endif
1995\f
1996
dc1d03fc 1997#ifdef OBJ_ELF
6a0c61b7
EZ		 1998#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
1999static void
dc1d03fc 2000ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2001 unsigned int apu, version;
2002{
2003 unsigned int i;
2004
2005 /* Check we don't already exist. */
2006 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2007 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2008 return;
b34976b6 2009
6a0c61b7
EZ		 2010 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2011 {
2012 if (ppc_apuinfo_num_alloc == 0)
2013 {
2014 ppc_apuinfo_num_alloc = 4;
2015 ppc_apuinfo_list = (unsigned long *)
2016 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2017 }
2018 else
2019 {
2020 ppc_apuinfo_num_alloc += 4;
2021 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2022 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2023 }
2024 }
dc1d03fc 2025 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2026}
2027#undef APUID
dc1d03fc 2028#endif
6a0c61b7
EZ		 2029\f
2030
252b5132
RH		 2031/* We need to keep a list of fixups. We can't simply generate them as
2032 we go, because that would require us to first create the frag, and
2033 that would screw up references to ``.''. */
2034
2035struct ppc_fixup
2036{
2037 expressionS exp;
2038 int opindex;
2039 bfd_reloc_code_real_type reloc;
2040};
2041
2042#define MAX_INSN_FIXUPS (5)
2043
2044/* This routine is called for each instruction to be assembled. */
2045
2046void
2047md_assemble (str)
2048 char *str;
2049{
2050 char *s;
2051 const struct powerpc_opcode *opcode;
2052 unsigned long insn;
2053 const unsigned char *opindex_ptr;
2054 int skip_optional;
2055 int need_paren;
2056 int next_opindex;
2057 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2058 int fc;
2059 char *f;
2060 int i;
2061#ifdef OBJ_ELF
2062 bfd_reloc_code_real_type reloc;
2063#endif
2064
2065 /* Get the opcode. */
3882b010 2066 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2067 ;
2068 if (*s != '\0')
2069 *s++ = '\0';
2070
2071 /* Look up the opcode in the hash table. */
2072 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2073 if (opcode == (const struct powerpc_opcode *) NULL)
2074 {
2075 const struct powerpc_macro *macro;
2076
2077 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2078 if (macro == (const struct powerpc_macro *) NULL)
2079 as_bad (_("Unrecognized opcode: `%s'"), str);
2080 else
2081 ppc_macro (s, macro);
2082
2083 return;
2084 }
2085
2086 insn = opcode->opcode;
2087
2088 str = s;
3882b010 2089 while (ISSPACE (*str))
252b5132
RH		 2090 ++str;
2091
2092 /* PowerPC operands are just expressions. The only real issue is
2093 that a few operand types are optional. All cases which might use
2094 an optional operand separate the operands only with commas (in
2095 some cases parentheses are used, as in ``lwz 1,0(1)'' but such
2096 cases never have optional operands). There is never more than
2097 one optional operand for an instruction. So, before we start
2098 seriously parsing the operands, we check to see if we have an
2099 optional operand, and, if we do, we count the number of commas to
2100 see whether the operand should be omitted. */
2101 skip_optional = 0;
2102 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2103 {
2104 const struct powerpc_operand *operand;
2105
2106 operand = &powerpc_operands[*opindex_ptr];
2107 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2108 {
2109 unsigned int opcount;
7fe9cf6b
NC		 2110 unsigned int num_operands_expected;
2111 unsigned int i;
252b5132
RH		 2112
2113 /* There is an optional operand. Count the number of
2114 commas in the input line. */
2115 if (*str == '\0')
2116 opcount = 0;
2117 else
2118 {
2119 opcount = 1;
2120 s = str;
2121 while ((s = strchr (s, ',')) != (char *) NULL)
2122 {
2123 ++opcount;
2124 ++s;
2125 }
2126 }
2127
7fe9cf6b
NC		 2128 /* Compute the number of expected operands.
2129 Do not count fake operands. */
2130 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2131 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2132 ++ num_operands_expected;
2133
252b5132
RH		 2134 /* If there are fewer operands in the line then are called
2135 for by the instruction, we want to skip the optional
2136 operand. */
7fe9cf6b 2137 if (opcount < num_operands_expected)
252b5132
RH		 2138 skip_optional = 1;
2139
2140 break;
2141 }
2142 }
2143
2144 /* Gather the operands. */
2145 need_paren = 0;
2146 next_opindex = 0;
2147 fc = 0;
2148 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2149 {
2150 const struct powerpc_operand *operand;
2151 const char *errmsg;
2152 char *hold;
2153 expressionS ex;
2154 char endc;
2155
2156 if (next_opindex == 0)
2157 operand = &powerpc_operands[*opindex_ptr];
2158 else
2159 {
2160 operand = &powerpc_operands[next_opindex];
2161 next_opindex = 0;
2162 }
252b5132
RH		 2163 errmsg = NULL;
2164
2165 /* If this is a fake operand, then we do not expect anything
2166 from the input. */
2167 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2168 {
2b3c4602 2169 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2170 if (errmsg != (const char *) NULL)
2171 as_bad (errmsg);
2172 continue;
2173 }
2174
2175 /* If this is an optional operand, and we are skipping it, just
2176 insert a zero. */
2177 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2178 && skip_optional)
2179 {
2180 if (operand->insert)
2181 {
2b3c4602 2182 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2183 if (errmsg != (const char *) NULL)
2184 as_bad (errmsg);
2185 }
2186 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2187 next_opindex = *opindex_ptr + 1;
2188 continue;
2189 }
2190
2191 /* Gather the operand. */
2192 hold = input_line_pointer;
2193 input_line_pointer = str;
2194
2195#ifdef TE_PE
81d4177b 2196 if (*input_line_pointer == '[')
252b5132
RH		 2197 {
2198 /* We are expecting something like the second argument here:
99a814a1
AM		 2199 *
2200 * lwz r4,[toc].GS.0.static_int(rtoc)
2201 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2202 * The argument following the `]' must be a symbol name, and the
2203 * register must be the toc register: 'rtoc' or '2'
2204 *
2205 * The effect is to 0 as the displacement field
2206 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2207 * the appropriate variation) reloc against it based on the symbol.
2208 * The linker will build the toc, and insert the resolved toc offset.
2209 *
2210 * Note:
2211 * o The size of the toc entry is currently assumed to be
2212 * 32 bits. This should not be assumed to be a hard coded
2213 * number.
2214 * o In an effort to cope with a change from 32 to 64 bits,
2215 * there are also toc entries that are specified to be
2216 * either 32 or 64 bits:
2217 * lwz r4,[toc32].GS.0.static_int(rtoc)
2218 * lwz r4,[toc64].GS.0.static_int(rtoc)
2219 * These demand toc entries of the specified size, and the
2220 * instruction probably requires it.
2221 */
252b5132
RH		 2222
2223 int valid_toc;
2224 enum toc_size_qualifier toc_kind;
2225 bfd_reloc_code_real_type toc_reloc;
2226
99a814a1
AM		 2227 /* Go parse off the [tocXX] part. */
2228 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2229
81d4177b 2230 if (!valid_toc)
252b5132 2231 {
99a814a1
AM		 2232 /* Note: message has already been issued.
2233 FIXME: what sort of recovery should we do?
2234 demand_rest_of_line (); return; ? */
252b5132
RH		 2235 }
2236
99a814a1
AM		 2237 /* Now get the symbol following the ']'. */
2238 expression (&ex);
252b5132
RH		 2239
2240 switch (toc_kind)
2241 {
2242 case default_toc:
99a814a1
AM		 2243 /* In this case, we may not have seen the symbol yet,
2244 since it is allowed to appear on a .extern or .globl
2245 or just be a label in the .data section. */
252b5132
RH		 2246 toc_reloc = BFD_RELOC_PPC_TOC16;
2247 break;
2248 case data_in_toc:
99a814a1
AM		 2249 /* 1. The symbol must be defined and either in the toc
2250 section, or a global.
2251 2. The reloc generated must have the TOCDEFN flag set
2252 in upper bit mess of the reloc type.
2253 FIXME: It's a little confusing what the tocv
2254 qualifier can be used for. At the very least, I've
2255 seen three uses, only one of which I'm sure I can
2256 explain. */
81d4177b
KH		 2257 if (ex.X_op == O_symbol)
2258 {
252b5132 2259 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2260 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2261 != tocdata_section)
252b5132 2262 {
99a814a1 2263 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2264 }
2265 }
2266
2267 toc_reloc = BFD_RELOC_PPC_TOC16;
2268 break;
2269 case must_be_32:
99a814a1
AM		 2270 /* FIXME: these next two specifically specify 32/64 bit
2271 toc entries. We don't support them today. Is this
2272 the right way to say that? */
252b5132
RH		 2273 toc_reloc = BFD_RELOC_UNUSED;
2274 as_bad (_("Unimplemented toc32 expression modifier"));
2275 break;
2276 case must_be_64:
99a814a1 2277 /* FIXME: see above. */
252b5132
RH		 2278 toc_reloc = BFD_RELOC_UNUSED;
2279 as_bad (_("Unimplemented toc64 expression modifier"));
2280 break;
2281 default:
bc805888 2282 fprintf (stderr,
99a814a1
AM		 2283 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2284 toc_kind);
bc805888 2285 abort ();
252b5132
RH		 2286 break;
2287 }
2288
2289 /* We need to generate a fixup for this expression. */
2290 if (fc >= MAX_INSN_FIXUPS)
2291 as_fatal (_("too many fixups"));
2292
2293 fixups[fc].reloc = toc_reloc;
2294 fixups[fc].exp = ex;
2295 fixups[fc].opindex = *opindex_ptr;
2296 ++fc;
2297
99a814a1
AM		 2298 /* Ok. We've set up the fixup for the instruction. Now make it
2299 look like the constant 0 was found here. */
252b5132
RH		 2300 ex.X_unsigned = 1;
2301 ex.X_op = O_constant;
2302 ex.X_add_number = 0;
2303 ex.X_add_symbol = NULL;
2304 ex.X_op_symbol = NULL;
2305 }
2306
2307 else
2308#endif /* TE_PE */
2309 {
2310 if (! register_name (&ex))
2311 {
2312 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2313 cr_operand = TRUE;
252b5132 2314 expression (&ex);
b34976b6 2315 cr_operand = FALSE;
252b5132
RH		 2316 }
2317 }
2318
2319 str = input_line_pointer;
2320 input_line_pointer = hold;
2321
2322 if (ex.X_op == O_illegal)
2323 as_bad (_("illegal operand"));
2324 else if (ex.X_op == O_absent)
2325 as_bad (_("missing operand"));
2326 else if (ex.X_op == O_register)
2327 {
2328 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2329 (char *) NULL, 0);
2330 }
2331 else if (ex.X_op == O_constant)
2332 {
2333#ifdef OBJ_ELF
81d4177b 2334 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2335 char *orig_str = str;
2336
2337 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2338 switch (reloc)
2339 {
2340 default:
2341 str = orig_str;
2342 break;
2343
2344 case BFD_RELOC_LO16:
2345 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2346 something which cleared it, we always produce a
2347 signed value. */
2348 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2349 ex.X_add_number &= 0xffff;
2350 else
0baf16f2 2351 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2352 break;
2353
2354 case BFD_RELOC_HI16:
0baf16f2
AM		 2355 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2356 ex.X_add_number = PPC_HI (ex.X_add_number);
2357 else
2358 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2359 break;
2360
2361 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2362 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2363 ex.X_add_number = PPC_HA (ex.X_add_number);
2364 else
2365 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2366 break;
2367
0baf16f2
AM		 2368 case BFD_RELOC_PPC64_HIGHER:
2369 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2370 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2371 else
2372 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2373 break;
2374
2375 case BFD_RELOC_PPC64_HIGHER_S:
2376 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2377 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2378 else
2379 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2380 break;
0baf16f2
AM		 2381
2382 case BFD_RELOC_PPC64_HIGHEST:
2383 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2384 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2385 else
2386 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2387 break;
2388
2389 case BFD_RELOC_PPC64_HIGHEST_S:
2390 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2391 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2392 else
2393 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2394 break;
252b5132 2395 }
0baf16f2 2396#endif /* OBJ_ELF */
252b5132
RH		 2397 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2398 (char *) NULL, 0);
2399 }
2400#ifdef OBJ_ELF
2401 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2402 {
cdba85ec
AM		 2403 /* Some TLS tweaks. */
2404 switch (reloc)
2405 {
2406 default:
2407 break;
2408 case BFD_RELOC_PPC_TLS:
2409 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2410 (char *) NULL, 0);
2411 break;
2412 /* We'll only use the 32 (or 64) bit form of these relocations
2413 in constants. Instructions get the 16 bit form. */
2414 case BFD_RELOC_PPC_DTPREL:
2415 reloc = BFD_RELOC_PPC_DTPREL16;
2416 break;
2417 case BFD_RELOC_PPC_TPREL:
2418 reloc = BFD_RELOC_PPC_TPREL16;
2419 break;
2420 }
2421
99a814a1
AM		 2422 /* For the absolute forms of branches, convert the PC
2423 relative form back into the absolute. */
252b5132
RH		 2424 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2425 {
2426 switch (reloc)
2427 {
2428 case BFD_RELOC_PPC_B26:
2429 reloc = BFD_RELOC_PPC_BA26;
2430 break;
2431 case BFD_RELOC_PPC_B16:
2432 reloc = BFD_RELOC_PPC_BA16;
2433 break;
2434 case BFD_RELOC_PPC_B16_BRTAKEN:
2435 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2436 break;
2437 case BFD_RELOC_PPC_B16_BRNTAKEN:
2438 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2439 break;
2440 default:
2441 break;
2442 }
2443 }
2444
2b3c4602 2445 if (ppc_obj64
0baf16f2
AM		 2446 && (operand->flags & PPC_OPERAND_DS) != 0)
2447 {
2448 switch (reloc)
2449 {
2450 case BFD_RELOC_16:
2451 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2452 break;
2453 case BFD_RELOC_LO16:
2454 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2455 break;
2456 case BFD_RELOC_16_GOTOFF:
2457 reloc = BFD_RELOC_PPC64_GOT16_DS;
2458 break;
2459 case BFD_RELOC_LO16_GOTOFF:
2460 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2461 break;
2462 case BFD_RELOC_LO16_PLTOFF:
2463 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2464 break;
1cfc59d5 2465 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2466 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2467 break;
2468 case BFD_RELOC_LO16_BASEREL:
2469 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2470 break;
2471 case BFD_RELOC_PPC_TOC16:
2472 reloc = BFD_RELOC_PPC64_TOC16_DS;
2473 break;
2474 case BFD_RELOC_PPC64_TOC16_LO:
2475 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2476 break;
2477 case BFD_RELOC_PPC64_PLTGOT16:
2478 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2479 break;
2480 case BFD_RELOC_PPC64_PLTGOT16_LO:
2481 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2482 break;
cdba85ec
AM		 2483 case BFD_RELOC_PPC_DTPREL16:
2484 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2485 break;
2486 case BFD_RELOC_PPC_DTPREL16_LO:
2487 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2488 break;
2489 case BFD_RELOC_PPC_TPREL16:
2490 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2491 break;
2492 case BFD_RELOC_PPC_TPREL16_LO:
2493 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2494 break;
2495 case BFD_RELOC_PPC_GOT_DTPREL16:
2496 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2497 case BFD_RELOC_PPC_GOT_TPREL16:
2498 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2499 break;
0baf16f2
AM		 2500 default:
2501 as_bad (_("unsupported relocation for DS offset field"));
2502 break;
2503 }
2504 }
2505
252b5132
RH		 2506 /* We need to generate a fixup for this expression. */
2507 if (fc >= MAX_INSN_FIXUPS)
2508 as_fatal (_("too many fixups"));
2509 fixups[fc].exp = ex;
2510 fixups[fc].opindex = 0;
2511 fixups[fc].reloc = reloc;
2512 ++fc;
2513 }
2514#endif /* OBJ_ELF */
2515
2516 else
2517 {
2518 /* We need to generate a fixup for this expression. */
2519 if (fc >= MAX_INSN_FIXUPS)
2520 as_fatal (_("too many fixups"));
2521 fixups[fc].exp = ex;
2522 fixups[fc].opindex = *opindex_ptr;
2523 fixups[fc].reloc = BFD_RELOC_UNUSED;
2524 ++fc;
2525 }
2526
2527 if (need_paren)
2528 {
2529 endc = ')';
2530 need_paren = 0;
2531 }
2532 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2533 {
2534 endc = '(';
2535 need_paren = 1;
2536 }
2537 else
2538 endc = ',';
2539
2540 /* The call to expression should have advanced str past any
2541 whitespace. */
2542 if (*str != endc
2543 && (endc != ',' || *str != '\0'))
2544 {
2545 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2546 break;
2547 }
2548
2549 if (*str != '\0')
2550 ++str;
2551 }
2552
3882b010 2553 while (ISSPACE (*str))
252b5132
RH		 2554 ++str;
2555
2556 if (*str != '\0')
2557 as_bad (_("junk at end of line: `%s'"), str);
2558
dc1d03fc 2559#ifdef OBJ_ELF
6a0c61b7
EZ		 2560 /* Do we need/want a APUinfo section? */
2561 if (ppc_cpu & (PPC_OPCODE_SPE
2562 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2563 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2564 | PPC_OPCODE_RFMCI))
2565 {
2566 /* These are all version "1". */
2567 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2568 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2569 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2570 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2571 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2572 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2573 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2574 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2575 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2576 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2577 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2578 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2579 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2580 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2581 }
dc1d03fc 2582#endif
6a0c61b7 2583
252b5132
RH		 2584 /* Write out the instruction. */
2585 f = frag_more (4);
2586 md_number_to_chars (f, insn, 4);
2587
5d6f4f16
GK		 2588#ifdef OBJ_ELF
2589 dwarf2_emit_insn (4);
2590#endif
2591
252b5132
RH		 2592 /* Create any fixups. At this point we do not use a
2593 bfd_reloc_code_real_type, but instead just use the
2594 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2595 handle fixups for any operand type, although that is admittedly
2596 not a very exciting feature. We pick a BFD reloc type in
94f592af 2597 md_apply_fix3. */
252b5132
RH		 2598 for (i = 0; i < fc; i++)
2599 {
2600 const struct powerpc_operand *operand;
2601
2602 operand = &powerpc_operands[fixups[i].opindex];
2603 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2604 {
99a814a1 2605 reloc_howto_type *reloc_howto;
252b5132
RH		 2606 int size;
2607 int offset;
2608 fixS *fixP;
2609
99a814a1 2610 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2611 if (!reloc_howto)
2612 abort ();
2613
2614 size = bfd_get_reloc_size (reloc_howto);
2615 offset = target_big_endian ? (4 - size) : 0;
2616
2617 if (size < 1 || size > 4)
bc805888 2618 abort ();
252b5132 2619
99a814a1
AM		 2620 fixP = fix_new_exp (frag_now,
2621 f - frag_now->fr_literal + offset,
2622 size,
2623 &fixups[i].exp,
2624 reloc_howto->pc_relative,
252b5132
RH		 2625 fixups[i].reloc);
2626
2627 /* Turn off complaints that the addend is too large for things like
2628 foo+100000@ha. */
2629 switch (fixups[i].reloc)
2630 {
2631 case BFD_RELOC_16_GOTOFF:
2632 case BFD_RELOC_PPC_TOC16:
2633 case BFD_RELOC_LO16:
2634 case BFD_RELOC_HI16:
2635 case BFD_RELOC_HI16_S:
0baf16f2 2636#ifdef OBJ_ELF
0baf16f2
AM		 2637 case BFD_RELOC_PPC64_HIGHER:
2638 case BFD_RELOC_PPC64_HIGHER_S:
2639 case BFD_RELOC_PPC64_HIGHEST:
2640 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2641#endif
252b5132
RH		 2642 fixP->fx_no_overflow = 1;
2643 break;
2644 default:
2645 break;
2646 }
2647 }
2648 else
99a814a1
AM		 2649 fix_new_exp (frag_now,
2650 f - frag_now->fr_literal,
2651 4,
252b5132
RH		 2652 &fixups[i].exp,
2653 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2654 ((bfd_reloc_code_real_type)
99a814a1 2655 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2656 }
2657}
2658
2659/* Handle a macro. Gather all the operands, transform them as
2660 described by the macro, and call md_assemble recursively. All the
2661 operands are separated by commas; we don't accept parentheses
2662 around operands here. */
2663
2664static void
2665ppc_macro (str, macro)
2666 char *str;
2667 const struct powerpc_macro *macro;
2668{
2669 char *operands[10];
2670 unsigned int count;
2671 char *s;
2672 unsigned int len;
2673 const char *format;
2674 int arg;
2675 char *send;
2676 char *complete;
2677
2678 /* Gather the users operands into the operands array. */
2679 count = 0;
2680 s = str;
2681 while (1)
2682 {
2683 if (count >= sizeof operands / sizeof operands[0])
2684 break;
2685 operands[count++] = s;
2686 s = strchr (s, ',');
2687 if (s == (char *) NULL)
2688 break;
2689 *s++ = '\0';
81d4177b 2690 }
252b5132
RH		 2691
2692 if (count != macro->operands)
2693 {
2694 as_bad (_("wrong number of operands"));
2695 return;
2696 }
2697
2698 /* Work out how large the string must be (the size is unbounded
2699 because it includes user input). */
2700 len = 0;
2701 format = macro->format;
2702 while (*format != '\0')
2703 {
2704 if (*format != '%')
2705 {
2706 ++len;
2707 ++format;
2708 }
2709 else
2710 {
2711 arg = strtol (format + 1, &send, 10);
2712 know (send != format && arg >= 0 && arg < count);
2713 len += strlen (operands[arg]);
2714 format = send;
2715 }
2716 }
2717
2718 /* Put the string together. */
2719 complete = s = (char *) alloca (len + 1);
2720 format = macro->format;
2721 while (*format != '\0')
2722 {
2723 if (*format != '%')
2724 *s++ = *format++;
2725 else
2726 {
2727 arg = strtol (format + 1, &send, 10);
2728 strcpy (s, operands[arg]);
2729 s += strlen (s);
2730 format = send;
2731 }
2732 }
2733 *s = '\0';
2734
2735 /* Assemble the constructed instruction. */
2736 md_assemble (complete);
81d4177b 2737}
252b5132
RH		 2738\f
2739#ifdef OBJ_ELF
99a814a1 2740/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2741
2742int
2743ppc_section_letter (letter, ptr_msg)
2744 int letter;
2745 char **ptr_msg;
2746{
2747 if (letter == 'e')
2748 return SHF_EXCLUDE;
2749
13ae64f3 2750 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
252b5132
RH		 2751 return 0;
2752}
2753
2754int
9de8d8f1
RH		 2755ppc_section_word (str, len)
2756 char *str;
2757 size_t len;
252b5132 2758{
9de8d8f1
RH		 2759 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2760 return SHF_EXCLUDE;
252b5132 2761
9de8d8f1 2762 return -1;
252b5132
RH		 2763}
2764
2765int
9de8d8f1
RH		 2766ppc_section_type (str, len)
2767 char *str;
2768 size_t len;
252b5132 2769{
9de8d8f1
RH		 2770 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2771 return SHT_ORDERED;
252b5132 2772
9de8d8f1 2773 return -1;
252b5132
RH		 2774}
2775
2776int
2777ppc_section_flags (flags, attr, type)
2778 int flags;
2779 int attr;
2780 int type;
2781{
2782 if (type == SHT_ORDERED)
2783 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2784
2785 if (attr & SHF_EXCLUDE)
2786 flags |= SEC_EXCLUDE;
2787
2788 return flags;
2789}
2790#endif /* OBJ_ELF */
2791
2792\f
2793/* Pseudo-op handling. */
2794
2795/* The .byte pseudo-op. This is similar to the normal .byte
2796 pseudo-op, but it can also take a single ASCII string. */
2797
2798static void
2799ppc_byte (ignore)
92161534 2800 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2801{
2802 if (*input_line_pointer != '\"')
2803 {
2804 cons (1);
2805 return;
2806 }
2807
2808 /* Gather characters. A real double quote is doubled. Unusual
2809 characters are not permitted. */
2810 ++input_line_pointer;
2811 while (1)
2812 {
2813 char c;
2814
2815 c = *input_line_pointer++;
2816
2817 if (c == '\"')
2818 {
2819 if (*input_line_pointer != '\"')
2820 break;
2821 ++input_line_pointer;
2822 }
2823
2824 FRAG_APPEND_1_CHAR (c);
2825 }
2826
2827 demand_empty_rest_of_line ();
2828}
2829\f
2830#ifdef OBJ_XCOFF
2831
2832/* XCOFF specific pseudo-op handling. */
2833
2834/* This is set if we are creating a .stabx symbol, since we don't want
2835 to handle symbol suffixes for such symbols. */
b34976b6 2836static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2837
2838/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2839 symbols in the .bss segment as though they were local common
1ad63b2f
TR		 2840 symbols, and uses a different smclas. The native Aix 4.3.3 assember
2841 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2842
2843static void
2844ppc_comm (lcomm)
2845 int lcomm;
2846{
2847 asection *current_seg = now_seg;
2848 subsegT current_subseg = now_subseg;
2849 char *name;
2850 char endc;
2851 char *end_name;
2852 offsetT size;
2853 offsetT align;
2854 symbolS *lcomm_sym = NULL;
2855 symbolS *sym;
2856 char *pfrag;
2857
2858 name = input_line_pointer;
2859 endc = get_symbol_end ();
2860 end_name = input_line_pointer;
2861 *end_name = endc;
2862
2863 if (*input_line_pointer != ',')
2864 {
2865 as_bad (_("missing size"));
2866 ignore_rest_of_line ();
2867 return;
2868 }
2869 ++input_line_pointer;
2870
2871 size = get_absolute_expression ();
2872 if (size < 0)
2873 {
2874 as_bad (_("negative size"));
2875 ignore_rest_of_line ();
2876 return;
2877 }
2878
2879 if (! lcomm)
2880 {
2881 /* The third argument to .comm is the alignment. */
2882 if (*input_line_pointer != ',')
1ad63b2f 2883 align = 2;
252b5132
RH		 2884 else
2885 {
2886 ++input_line_pointer;
2887 align = get_absolute_expression ();
2888 if (align <= 0)
2889 {
2890 as_warn (_("ignoring bad alignment"));
1ad63b2f 2891 align = 2;
252b5132
RH		 2892 }
2893 }
2894 }
2895 else
2896 {
2897 char *lcomm_name;
2898 char lcomm_endc;
2899
1ad63b2f 2900 if (size <= 4)
252b5132
RH		 2901 align = 2;
2902 else
2903 align = 3;
2904
2905 /* The third argument to .lcomm appears to be the real local
2906 common symbol to create. References to the symbol named in
2907 the first argument are turned into references to the third
2908 argument. */
2909 if (*input_line_pointer != ',')
2910 {
2911 as_bad (_("missing real symbol name"));
2912 ignore_rest_of_line ();
2913 return;
2914 }
2915 ++input_line_pointer;
2916
2917 lcomm_name = input_line_pointer;
2918 lcomm_endc = get_symbol_end ();
81d4177b 2919
252b5132
RH		 2920 lcomm_sym = symbol_find_or_make (lcomm_name);
2921
2922 *input_line_pointer = lcomm_endc;
2923 }
2924
2925 *end_name = '\0';
2926 sym = symbol_find_or_make (name);
2927 *end_name = endc;
2928
2929 if (S_IS_DEFINED (sym)
2930 || S_GET_VALUE (sym) != 0)
2931 {
2932 as_bad (_("attempt to redefine symbol"));
2933 ignore_rest_of_line ();
2934 return;
2935 }
81d4177b 2936
252b5132 2937 record_alignment (bss_section, align);
81d4177b 2938
252b5132
RH		 2939 if (! lcomm
2940 || ! S_IS_DEFINED (lcomm_sym))
2941 {
2942 symbolS *def_sym;
2943 offsetT def_size;
2944
2945 if (! lcomm)
2946 {
2947 def_sym = sym;
2948 def_size = size;
2949 S_SET_EXTERNAL (sym);
2950 }
2951 else
2952 {
809ffe0d 2953 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 2954 def_sym = lcomm_sym;
2955 def_size = 0;
2956 }
2957
2958 subseg_set (bss_section, 1);
2959 frag_align (align, 0, 0);
81d4177b 2960
809ffe0d 2961 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 2962 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
2963 def_size, (char *) NULL);
2964 *pfrag = 0;
2965 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 2966 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 2967 }
2968 else if (lcomm)
2969 {
2970 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 2971 symbol_get_frag (lcomm_sym)->fr_offset =
2972 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 2973 &~ ((1 << align) - 1));
809ffe0d
ILT		 2974 if (align > symbol_get_tc (lcomm_sym)->align)
2975 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 2976 }
2977
2978 if (lcomm)
2979 {
2980 /* Make sym an offset from lcomm_sym. */
2981 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 2982 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
2983 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
2984 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 2985 }
2986
2987 subseg_set (current_seg, current_subseg);
2988
2989 demand_empty_rest_of_line ();
2990}
2991
2992/* The .csect pseudo-op. This switches us into a different
2993 subsegment. The first argument is a symbol whose value is the
2994 start of the .csect. In COFF, csect symbols get special aux
2995 entries defined by the x_csect field of union internal_auxent. The
2996 optional second argument is the alignment (the default is 2). */
2997
2998static void
2999ppc_csect (ignore)
5480ccf3 3000 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3001{
3002 char *name;
3003 char endc;
3004 symbolS *sym;
3005
3006 name = input_line_pointer;
3007 endc = get_symbol_end ();
81d4177b 3008
252b5132
RH		 3009 sym = symbol_find_or_make (name);
3010
3011 *input_line_pointer = endc;
3012
3013 if (S_GET_NAME (sym)[0] == '\0')
3014 {
3015 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3016 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3017 }
3018
3019 ppc_change_csect (sym);
3020
3021 if (*input_line_pointer == ',')
3022 {
3023 ++input_line_pointer;
809ffe0d 3024 symbol_get_tc (sym)->align = get_absolute_expression ();
252b5132
RH		 3025 }
3026
3027 demand_empty_rest_of_line ();
3028}
3029
3030/* Change to a different csect. */
3031
3032static void
3033ppc_change_csect (sym)
3034 symbolS *sym;
3035{
3036 if (S_IS_DEFINED (sym))
809ffe0d 3037 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3038 else
3039 {
3040 symbolS **list_ptr;
3041 int after_toc;
3042 int hold_chunksize;
3043 symbolS *list;
3044
3045 /* This is a new csect. We need to look at the symbol class to
3046 figure out whether it should go in the text section or the
3047 data section. */
3048 after_toc = 0;
809ffe0d 3049 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3050 {
3051 case XMC_PR:
3052 case XMC_RO:
3053 case XMC_DB:
3054 case XMC_GL:
3055 case XMC_XO:
3056 case XMC_SV:
3057 case XMC_TI:
3058 case XMC_TB:
3059 S_SET_SEGMENT (sym, text_section);
809ffe0d 3060 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3061 ++ppc_text_subsegment;
3062 list_ptr = &ppc_text_csects;
3063 break;
3064 case XMC_RW:
3065 case XMC_TC0:
3066 case XMC_TC:
3067 case XMC_DS:
3068 case XMC_UA:
3069 case XMC_BS:
3070 case XMC_UC:
3071 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3072 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3073 == ppc_data_subsegment))
252b5132
RH		 3074 after_toc = 1;
3075 S_SET_SEGMENT (sym, data_section);
809ffe0d 3076 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3077 ++ppc_data_subsegment;
3078 list_ptr = &ppc_data_csects;
3079 break;
3080 default:
3081 abort ();
3082 }
3083
3084 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3085 changing subsegments, so that we don't use a lot of memory
3086 space for what may be a small section. */
252b5132
RH		 3087 hold_chunksize = chunksize;
3088 chunksize = 64;
3089
809ffe0d
ILT		 3090 subseg_new (segment_name (S_GET_SEGMENT (sym)),
3091 symbol_get_tc (sym)->subseg);
252b5132
RH		 3092
3093 chunksize = hold_chunksize;
3094
3095 if (after_toc)
3096 ppc_after_toc_frag = frag_now;
3097
809ffe0d 3098 symbol_set_frag (sym, frag_now);
252b5132
RH		 3099 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3100
b4f96c78 3101 symbol_get_tc (sym)->align = 2;
809ffe0d
ILT		 3102 symbol_get_tc (sym)->output = 1;
3103 symbol_get_tc (sym)->within = sym;
81d4177b 3104
252b5132 3105 for (list = *list_ptr;
809ffe0d
ILT		 3106 symbol_get_tc (list)->next != (symbolS *) NULL;
3107 list = symbol_get_tc (list)->next)
252b5132 3108 ;
809ffe0d 3109 symbol_get_tc (list)->next = sym;
81d4177b 3110
252b5132 3111 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3112 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3113 &symbol_lastP);
252b5132
RH		 3114 }
3115
3116 ppc_current_csect = sym;
3117}
3118
3119/* This function handles the .text and .data pseudo-ops. These
3120 pseudo-ops aren't really used by XCOFF; we implement them for the
3121 convenience of people who aren't used to XCOFF. */
3122
3123static void
3124ppc_section (type)
3125 int type;
3126{
3127 const char *name;
3128 symbolS *sym;
3129
3130 if (type == 't')
3131 name = ".text[PR]";
3132 else if (type == 'd')
3133 name = ".data[RW]";
3134 else
3135 abort ();
3136
3137 sym = symbol_find_or_make (name);
3138
3139 ppc_change_csect (sym);
3140
3141 demand_empty_rest_of_line ();
3142}
3143
3144/* This function handles the .section pseudo-op. This is mostly to
3145 give an error, since XCOFF only supports .text, .data and .bss, but
3146 we do permit the user to name the text or data section. */
3147
3148static void
3149ppc_named_section (ignore)
5480ccf3 3150 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3151{
3152 char *user_name;
3153 const char *real_name;
3154 char c;
3155 symbolS *sym;
3156
3157 user_name = input_line_pointer;
3158 c = get_symbol_end ();
3159
3160 if (strcmp (user_name, ".text") == 0)
3161 real_name = ".text[PR]";
3162 else if (strcmp (user_name, ".data") == 0)
3163 real_name = ".data[RW]";
3164 else
3165 {
3166 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3167 *input_line_pointer = c;
3168 ignore_rest_of_line ();
3169 return;
3170 }
3171
3172 *input_line_pointer = c;
3173
3174 sym = symbol_find_or_make (real_name);
3175
3176 ppc_change_csect (sym);
3177
3178 demand_empty_rest_of_line ();
3179}
3180
3181/* The .extern pseudo-op. We create an undefined symbol. */
3182
3183static void
3184ppc_extern (ignore)
5480ccf3 3185 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3186{
3187 char *name;
3188 char endc;
3189
3190 name = input_line_pointer;
3191 endc = get_symbol_end ();
3192
3193 (void) symbol_find_or_make (name);
3194
3195 *input_line_pointer = endc;
3196
3197 demand_empty_rest_of_line ();
3198}
3199
3200/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3201
3202static void
3203ppc_lglobl (ignore)
5480ccf3 3204 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3205{
3206 char *name;
3207 char endc;
3208 symbolS *sym;
3209
3210 name = input_line_pointer;
3211 endc = get_symbol_end ();
3212
3213 sym = symbol_find_or_make (name);
3214
3215 *input_line_pointer = endc;
3216
809ffe0d 3217 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3218
3219 demand_empty_rest_of_line ();
3220}
3221
3222/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3223 although I don't know why it bothers. */
3224
3225static void
3226ppc_rename (ignore)
5480ccf3 3227 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3228{
3229 char *name;
3230 char endc;
3231 symbolS *sym;
3232 int len;
3233
3234 name = input_line_pointer;
3235 endc = get_symbol_end ();
3236
3237 sym = symbol_find_or_make (name);
3238
3239 *input_line_pointer = endc;
3240
3241 if (*input_line_pointer != ',')
3242 {
3243 as_bad (_("missing rename string"));
3244 ignore_rest_of_line ();
3245 return;
3246 }
3247 ++input_line_pointer;
3248
809ffe0d 3249 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3250
3251 demand_empty_rest_of_line ();
3252}
3253
3254/* The .stabx pseudo-op. This is similar to a normal .stabs
3255 pseudo-op, but slightly different. A sample is
3256 .stabx "main:F-1",.main,142,0
3257 The first argument is the symbol name to create. The second is the
3258 value, and the third is the storage class. The fourth seems to be
3259 always zero, and I am assuming it is the type. */
3260
3261static void
3262ppc_stabx (ignore)
5480ccf3 3263 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3264{
3265 char *name;
3266 int len;
3267 symbolS *sym;
3268 expressionS exp;
3269
3270 name = demand_copy_C_string (&len);
3271
3272 if (*input_line_pointer != ',')
3273 {
3274 as_bad (_("missing value"));
3275 return;
3276 }
3277 ++input_line_pointer;
3278
b34976b6 3279 ppc_stab_symbol = TRUE;
252b5132 3280 sym = symbol_make (name);
b34976b6 3281 ppc_stab_symbol = FALSE;
252b5132 3282
809ffe0d 3283 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3284
3285 (void) expression (&exp);
3286
3287 switch (exp.X_op)
3288 {
3289 case O_illegal:
3290 case O_absent:
3291 case O_big:
3292 as_bad (_("illegal .stabx expression; zero assumed"));
3293 exp.X_add_number = 0;
3294 /* Fall through. */
3295 case O_constant:
3296 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3297 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3298 break;
3299
3300 case O_symbol:
3301 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3302 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3303 else
3304 {
3305 S_SET_VALUE (sym,
3306 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3307 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3308 }
3309 break;
3310
3311 default:
3312 /* The value is some complex expression. This will probably
99a814a1
AM		 3313 fail at some later point, but this is probably the right
3314 thing to do here. */
809ffe0d 3315 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3316 break;
3317 }
3318
3319 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3320 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3321
3322 if (*input_line_pointer != ',')
3323 {
3324 as_bad (_("missing class"));
3325 return;
3326 }
3327 ++input_line_pointer;
3328
3329 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3330
3331 if (*input_line_pointer != ',')
3332 {
3333 as_bad (_("missing type"));
3334 return;
3335 }
3336 ++input_line_pointer;
3337
3338 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3339
809ffe0d 3340 symbol_get_tc (sym)->output = 1;
252b5132 3341
6877bb43 3342 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3343
809ffe0d 3344 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3345
41ea10b1 3346 /* In this case :
99a814a1 3347
41ea10b1
TR		 3348 .bs name
3349 .stabx "z",arrays_,133,0
3350 .es
99a814a1 3351
41ea10b1 3352 .comm arrays_,13768,3
99a814a1 3353
41ea10b1
TR		 3354 resolve_symbol_value will copy the exp's "within" into sym's when the
3355 offset is 0. Since this seems to be corner case problem,
3356 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3357 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3358
3359 if (exp.X_op == O_symbol)
41ea10b1
TR		 3360 {
3361 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3362 }
6877bb43 3363 }
99a814a1 3364
252b5132
RH		 3365 if (exp.X_op != O_symbol
3366 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3367 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3368 ppc_frob_label (sym);
3369 else
3370 {
3371 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3372 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3373 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3374 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3375 }
3376
3377 demand_empty_rest_of_line ();
3378}
3379
3380/* The .function pseudo-op. This takes several arguments. The first
3381 argument seems to be the external name of the symbol. The second
3382 argment seems to be the label for the start of the function. gcc
3383 uses the same name for both. I have no idea what the third and
3384 fourth arguments are meant to be. The optional fifth argument is
3385 an expression for the size of the function. In COFF this symbol
3386 gets an aux entry like that used for a csect. */
3387
3388static void
3389ppc_function (ignore)
5480ccf3 3390 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3391{
3392 char *name;
3393 char endc;
3394 char *s;
3395 symbolS *ext_sym;
3396 symbolS *lab_sym;
3397
3398 name = input_line_pointer;
3399 endc = get_symbol_end ();
3400
3401 /* Ignore any [PR] suffix. */
3402 name = ppc_canonicalize_symbol_name (name);
3403 s = strchr (name, '[');
3404 if (s != (char *) NULL
3405 && strcmp (s + 1, "PR]") == 0)
3406 *s = '\0';
3407
3408 ext_sym = symbol_find_or_make (name);
3409
3410 *input_line_pointer = endc;
3411
3412 if (*input_line_pointer != ',')
3413 {
3414 as_bad (_("missing symbol name"));
3415 ignore_rest_of_line ();
3416 return;
3417 }
3418 ++input_line_pointer;
3419
3420 name = input_line_pointer;
3421 endc = get_symbol_end ();
3422
3423 lab_sym = symbol_find_or_make (name);
3424
3425 *input_line_pointer = endc;
3426
3427 if (ext_sym != lab_sym)
3428 {
809ffe0d
ILT		 3429 expressionS exp;
3430
3431 exp.X_op = O_symbol;
3432 exp.X_add_symbol = lab_sym;
3433 exp.X_op_symbol = NULL;
3434 exp.X_add_number = 0;
3435 exp.X_unsigned = 0;
3436 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3437 }
3438
809ffe0d
ILT		 3439 if (symbol_get_tc (ext_sym)->class == -1)
3440 symbol_get_tc (ext_sym)->class = XMC_PR;
3441 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3442
3443 if (*input_line_pointer == ',')
3444 {
3445 expressionS ignore;
3446
3447 /* Ignore the third argument. */
3448 ++input_line_pointer;
3449 expression (&ignore);
3450 if (*input_line_pointer == ',')
3451 {
3452 /* Ignore the fourth argument. */
3453 ++input_line_pointer;
3454 expression (&ignore);
3455 if (*input_line_pointer == ',')
3456 {
3457 /* The fifth argument is the function size. */
3458 ++input_line_pointer;
809ffe0d
ILT		 3459 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3460 absolute_section,
3461 (valueT) 0,
3462 &zero_address_frag);
3463 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3464 }
3465 }
3466 }
3467
3468 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3469 SF_SET_FUNCTION (ext_sym);
3470 SF_SET_PROCESS (ext_sym);
3471 coff_add_linesym (ext_sym);
3472
3473 demand_empty_rest_of_line ();
3474}
3475
3476/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3477 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3478 with the correct line number */
5d6255fe 3479
8642cce8 3480static symbolS *saved_bi_sym = 0;
252b5132
RH		 3481
3482static void
3483ppc_bf (ignore)
5480ccf3 3484 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3485{
3486 symbolS *sym;
3487
3488 sym = symbol_make (".bf");
3489 S_SET_SEGMENT (sym, text_section);
809ffe0d 3490 symbol_set_frag (sym, frag_now);
252b5132
RH		 3491 S_SET_VALUE (sym, frag_now_fix ());
3492 S_SET_STORAGE_CLASS (sym, C_FCN);
3493
3494 coff_line_base = get_absolute_expression ();
3495
3496 S_SET_NUMBER_AUXILIARY (sym, 1);
3497 SA_SET_SYM_LNNO (sym, coff_line_base);
3498
8642cce8 3499 /* Line number for bi. */
5d6255fe 3500 if (saved_bi_sym)
8642cce8
TR		 3501 {
3502 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3503 saved_bi_sym = 0;
3504 }
5d6255fe 3505
8642cce8 3506
809ffe0d 3507 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3508
3509 ppc_frob_label (sym);
3510
3511 demand_empty_rest_of_line ();
3512}
3513
3514/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3515 ".ef", except that the line number is absolute, not relative to the
3516 most recent ".bf" symbol. */
3517
3518static void
3519ppc_ef (ignore)
5480ccf3 3520 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3521{
3522 symbolS *sym;
3523
3524 sym = symbol_make (".ef");
3525 S_SET_SEGMENT (sym, text_section);
809ffe0d 3526 symbol_set_frag (sym, frag_now);
252b5132
RH		 3527 S_SET_VALUE (sym, frag_now_fix ());
3528 S_SET_STORAGE_CLASS (sym, C_FCN);
3529 S_SET_NUMBER_AUXILIARY (sym, 1);
3530 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3531 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3532
3533 ppc_frob_label (sym);
3534
3535 demand_empty_rest_of_line ();
3536}
3537
3538/* The .bi and .ei pseudo-ops. These take a string argument and
3539 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3540 the symbol list. The value of .bi will be know when the next .bf
3541 is encountered. */
252b5132
RH		 3542
3543static void
3544ppc_biei (ei)
3545 int ei;
3546{
3547 static symbolS *last_biei;
3548
3549 char *name;
3550 int len;
3551 symbolS *sym;
3552 symbolS *look;
3553
3554 name = demand_copy_C_string (&len);
3555
3556 /* The value of these symbols is actually file offset. Here we set
3557 the value to the index into the line number entries. In
3558 ppc_frob_symbols we set the fix_line field, which will cause BFD
3559 to do the right thing. */
3560
3561 sym = symbol_make (name);
3562 /* obj-coff.c currently only handles line numbers correctly in the
3563 .text section. */
3564 S_SET_SEGMENT (sym, text_section);
3565 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3566 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3567
3568 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3569 symbol_get_tc (sym)->output = 1;
81d4177b 3570
8642cce8 3571 /* Save bi. */
5d6255fe 3572 if (ei)
8642cce8
TR		 3573 saved_bi_sym = 0;
3574 else
3575 saved_bi_sym = sym;
3576
252b5132
RH		 3577 for (look = last_biei ? last_biei : symbol_rootP;
3578 (look != (symbolS *) NULL
3579 && (S_GET_STORAGE_CLASS (look) == C_FILE
3580 || S_GET_STORAGE_CLASS (look) == C_BINCL
3581 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3582 look = symbol_next (look))
3583 ;
3584 if (look != (symbolS *) NULL)
3585 {
3586 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3587 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3588 last_biei = sym;
3589 }
3590
3591 demand_empty_rest_of_line ();
3592}
3593
3594/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3595 There is one argument, which is a csect symbol. The value of the
3596 .bs symbol is the index of this csect symbol. */
3597
3598static void
3599ppc_bs (ignore)
5480ccf3 3600 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3601{
3602 char *name;
3603 char endc;
3604 symbolS *csect;
3605 symbolS *sym;
3606
3607 if (ppc_current_block != NULL)
3608 as_bad (_("nested .bs blocks"));
3609
3610 name = input_line_pointer;
3611 endc = get_symbol_end ();
3612
3613 csect = symbol_find_or_make (name);
3614
3615 *input_line_pointer = endc;
3616
3617 sym = symbol_make (".bs");
3618 S_SET_SEGMENT (sym, now_seg);
3619 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3620 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3621 symbol_get_tc (sym)->output = 1;
252b5132 3622
809ffe0d 3623 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3624
3625 ppc_frob_label (sym);
3626
3627 ppc_current_block = sym;
3628
3629 demand_empty_rest_of_line ();
3630}
3631
3632/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3633
3634static void
3635ppc_es (ignore)
5480ccf3 3636 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3637{
3638 symbolS *sym;
3639
3640 if (ppc_current_block == NULL)
3641 as_bad (_(".es without preceding .bs"));
3642
3643 sym = symbol_make (".es");
3644 S_SET_SEGMENT (sym, now_seg);
3645 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3646 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3647 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3648
3649 ppc_frob_label (sym);
3650
3651 ppc_current_block = NULL;
3652
3653 demand_empty_rest_of_line ();
3654}
3655
3656/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3657 line number. */
3658
3659static void
3660ppc_bb (ignore)
5480ccf3 3661 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3662{
3663 symbolS *sym;
3664
3665 sym = symbol_make (".bb");
3666 S_SET_SEGMENT (sym, text_section);
809ffe0d 3667 symbol_set_frag (sym, frag_now);
252b5132
RH		 3668 S_SET_VALUE (sym, frag_now_fix ());
3669 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3670
3671 S_SET_NUMBER_AUXILIARY (sym, 1);
3672 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3673
809ffe0d 3674 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3675
3676 SF_SET_PROCESS (sym);
3677
3678 ppc_frob_label (sym);
3679
3680 demand_empty_rest_of_line ();
3681}
3682
3683/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3684 line number. */
3685
3686static void
3687ppc_eb (ignore)
5480ccf3 3688 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3689{
3690 symbolS *sym;
3691
3692 sym = symbol_make (".eb");
3693 S_SET_SEGMENT (sym, text_section);
809ffe0d 3694 symbol_set_frag (sym, frag_now);
252b5132
RH		 3695 S_SET_VALUE (sym, frag_now_fix ());
3696 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3697 S_SET_NUMBER_AUXILIARY (sym, 1);
3698 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3699 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3700
3701 SF_SET_PROCESS (sym);
3702
3703 ppc_frob_label (sym);
3704
3705 demand_empty_rest_of_line ();
3706}
3707
3708/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3709 specified name. */
3710
3711static void
3712ppc_bc (ignore)
5480ccf3 3713 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3714{
3715 char *name;
3716 int len;
3717 symbolS *sym;
3718
3719 name = demand_copy_C_string (&len);
3720 sym = symbol_make (name);
3721 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3722 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3723 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3724 S_SET_VALUE (sym, 0);
809ffe0d 3725 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3726
3727 ppc_frob_label (sym);
3728
3729 demand_empty_rest_of_line ();
3730}
3731
3732/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3733
3734static void
3735ppc_ec (ignore)
5480ccf3 3736 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3737{
3738 symbolS *sym;
3739
3740 sym = symbol_make (".ec");
3741 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3742 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3743 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3744 S_SET_VALUE (sym, 0);
809ffe0d 3745 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3746
3747 ppc_frob_label (sym);
3748
3749 demand_empty_rest_of_line ();
3750}
3751
3752/* The .toc pseudo-op. Switch to the .toc subsegment. */
3753
3754static void
3755ppc_toc (ignore)
5480ccf3 3756 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3757{
3758 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3759 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3760 else
3761 {
3762 subsegT subseg;
3763 symbolS *sym;
3764 symbolS *list;
81d4177b 3765
252b5132
RH		 3766 subseg = ppc_data_subsegment;
3767 ++ppc_data_subsegment;
3768
3769 subseg_new (segment_name (data_section), subseg);
3770 ppc_toc_frag = frag_now;
3771
3772 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3773 symbol_set_frag (sym, frag_now);
252b5132
RH		 3774 S_SET_SEGMENT (sym, data_section);
3775 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3776 symbol_get_tc (sym)->subseg = subseg;
3777 symbol_get_tc (sym)->output = 1;
3778 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3779
3780 ppc_toc_csect = sym;
81d4177b 3781
252b5132 3782 for (list = ppc_data_csects;
809ffe0d
ILT		 3783 symbol_get_tc (list)->next != (symbolS *) NULL;
3784 list = symbol_get_tc (list)->next)
252b5132 3785 ;
809ffe0d 3786 symbol_get_tc (list)->next = sym;
252b5132
RH		 3787
3788 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3789 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3790 &symbol_lastP);
252b5132
RH		 3791 }
3792
3793 ppc_current_csect = ppc_toc_csect;
3794
3795 demand_empty_rest_of_line ();
3796}
3797
3798/* The AIX assembler automatically aligns the operands of a .long or
3799 .short pseudo-op, and we want to be compatible. */
3800
3801static void
3802ppc_xcoff_cons (log_size)
3803 int log_size;
3804{
3805 frag_align (log_size, 0, 0);
3806 record_alignment (now_seg, log_size);
3807 cons (1 << log_size);
3808}
3809
3810static void
3811ppc_vbyte (dummy)
5480ccf3 3812 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3813{
3814 expressionS exp;
3815 int byte_count;
3816
3817 (void) expression (&exp);
3818
3819 if (exp.X_op != O_constant)
3820 {
3821 as_bad (_("non-constant byte count"));
3822 return;
3823 }
3824
3825 byte_count = exp.X_add_number;
3826
3827 if (*input_line_pointer != ',')
3828 {
3829 as_bad (_("missing value"));
3830 return;
3831 }
3832
3833 ++input_line_pointer;
3834 cons (byte_count);
3835}
3836
3837#endif /* OBJ_XCOFF */
0baf16f2 3838#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3839\f
3840/* The .tc pseudo-op. This is used when generating either XCOFF or
3841 ELF. This takes two or more arguments.
3842
3843 When generating XCOFF output, the first argument is the name to
3844 give to this location in the toc; this will be a symbol with class
0baf16f2 3845 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3846 this location in the TOC; often there is just one more argument, a
0baf16f2
AM		 3847 relocateable symbol reference. The size of the value to store
3848 depends on target word size. A 32-bit target uses 4-byte values, a
3849 64-bit target uses 8-byte values.
252b5132
RH		 3850
3851 When not generating XCOFF output, the arguments are the same, but
3852 the first argument is simply ignored. */
3853
3854static void
3855ppc_tc (ignore)
92161534 3856 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3857{
3858#ifdef OBJ_XCOFF
3859
3860 /* Define the TOC symbol name. */
3861 {
3862 char *name;
3863 char endc;
3864 symbolS *sym;
3865
3866 if (ppc_toc_csect == (symbolS *) NULL
3867 || ppc_toc_csect != ppc_current_csect)
3868 {
3869 as_bad (_(".tc not in .toc section"));
3870 ignore_rest_of_line ();
3871 return;
3872 }
3873
3874 name = input_line_pointer;
3875 endc = get_symbol_end ();
3876
3877 sym = symbol_find_or_make (name);
3878
3879 *input_line_pointer = endc;
3880
3881 if (S_IS_DEFINED (sym))
3882 {
3883 symbolS *label;
3884
809ffe0d
ILT		 3885 label = symbol_get_tc (ppc_current_csect)->within;
3886 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3887 {
3888 as_bad (_(".tc with no label"));
3889 ignore_rest_of_line ();
3890 return;
3891 }
3892
3893 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3894 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3895 S_SET_VALUE (label, S_GET_VALUE (sym));
3896
3897 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3898 ++input_line_pointer;
3899
3900 return;
3901 }
3902
3903 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3904 symbol_set_frag (sym, frag_now);
252b5132 3905 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3906 symbol_get_tc (sym)->class = XMC_TC;
3907 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3908
3909 ppc_frob_label (sym);
3910 }
3911
0baf16f2
AM		 3912#endif /* OBJ_XCOFF */
3913#ifdef OBJ_ELF
9c7977b3 3914 int align;
252b5132
RH		 3915
3916 /* Skip the TOC symbol name. */
3917 while (is_part_of_name (*input_line_pointer)
3918 || *input_line_pointer == '['
3919 || *input_line_pointer == ']'
3920 || *input_line_pointer == '{'
3921 || *input_line_pointer == '}')
3922 ++input_line_pointer;
3923
0baf16f2 3924 /* Align to a four/eight byte boundary. */
2b3c4602 3925 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 3926 frag_align (align, 0, 0);
3927 record_alignment (now_seg, align);
0baf16f2 3928#endif /* OBJ_ELF */
252b5132
RH		 3929
3930 if (*input_line_pointer != ',')
3931 demand_empty_rest_of_line ();
3932 else
3933 {
3934 ++input_line_pointer;
2b3c4602 3935 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 3936 }
3937}
0baf16f2
AM		 3938
3939/* Pseudo-op .machine. */
15c1449b 3940/* FIXME: `.machine' is a nop for the moment. It would be nice to
2b3c4602 3941 accept this directive on the first line of input and set ppc_obj64
15c1449b
AM		 3942 and the target format accordingly. Unfortunately, the target
3943 format is selected in output-file.c:output_file_create before we
3944 even get to md_begin, so it's not possible without changing
3945 as.c:main. */
0baf16f2
AM		 3946
3947static void
3948ppc_machine (ignore)
3949 int ignore ATTRIBUTE_UNUSED;
3950{
3951 discard_rest_of_line ();
3952}
3953
3954/* See whether a symbol is in the TOC section. */
3955
3956static int
3957ppc_is_toc_sym (sym)
3958 symbolS *sym;
3959{
3960#ifdef OBJ_XCOFF
3961 return symbol_get_tc (sym)->class == XMC_TC;
3962#endif
3963#ifdef OBJ_ELF
3964 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 3965 if (ppc_obj64)
0baf16f2
AM		 3966 return strcmp (sname, ".toc") == 0;
3967 else
3968 return strcmp (sname, ".got") == 0;
3969#endif
3970}
3971#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 3972\f
3973#ifdef TE_PE
3974
99a814a1 3975/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 3976
3977/* Set the current section. */
3978static void
3979ppc_set_current_section (new)
3980 segT new;
3981{
3982 ppc_previous_section = ppc_current_section;
3983 ppc_current_section = new;
3984}
3985
3986/* pseudo-op: .previous
3987 behaviour: toggles the current section with the previous section.
3988 errors: None
99a814a1
AM		 3989 warnings: "No previous section" */
3990
252b5132 3991static void
99a814a1 3992ppc_previous (ignore)
5480ccf3 3993 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3994{
3995 symbolS *tmp;
3996
81d4177b 3997 if (ppc_previous_section == NULL)
252b5132 3998 {
99a814a1 3999 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4000 return;
4001 }
4002
99a814a1 4003 subseg_set (ppc_previous_section, 0);
252b5132 4004
99a814a1 4005 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4006}
4007
4008/* pseudo-op: .pdata
4009 behaviour: predefined read only data section
b34976b6 4010 double word aligned
252b5132
RH		 4011 errors: None
4012 warnings: None
4013 initial: .section .pdata "adr3"
b34976b6 4014 a - don't know -- maybe a misprint
252b5132
RH		 4015 d - initialized data
4016 r - readable
4017 3 - double word aligned (that would be 4 byte boundary)
4018
4019 commentary:
4020 Tag index tables (also known as the function table) for exception
99a814a1 4021 handling, debugging, etc. */
252b5132 4022
252b5132 4023static void
99a814a1 4024ppc_pdata (ignore)
5480ccf3 4025 int ignore ATTRIBUTE_UNUSED;
252b5132 4026{
81d4177b 4027 if (pdata_section == 0)
252b5132
RH		 4028 {
4029 pdata_section = subseg_new (".pdata", 0);
81d4177b 4030
252b5132
RH		 4031 bfd_set_section_flags (stdoutput, pdata_section,
4032 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4033 | SEC_READONLY | SEC_DATA ));
81d4177b 4034
252b5132
RH		 4035 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4036 }
4037 else
4038 {
99a814a1 4039 pdata_section = subseg_new (".pdata", 0);
252b5132 4040 }
99a814a1 4041 ppc_set_current_section (pdata_section);
252b5132
RH		 4042}
4043
4044/* pseudo-op: .ydata
4045 behaviour: predefined read only data section
b34976b6 4046 double word aligned
252b5132
RH		 4047 errors: None
4048 warnings: None
4049 initial: .section .ydata "drw3"
b34976b6 4050 a - don't know -- maybe a misprint
252b5132
RH		 4051 d - initialized data
4052 r - readable
4053 3 - double word aligned (that would be 4 byte boundary)
4054 commentary:
4055 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4056 debugging, etc. */
4057
252b5132 4058static void
99a814a1 4059ppc_ydata (ignore)
5480ccf3 4060 int ignore ATTRIBUTE_UNUSED;
252b5132 4061{
81d4177b 4062 if (ydata_section == 0)
252b5132
RH		 4063 {
4064 ydata_section = subseg_new (".ydata", 0);
4065 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4066 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4067 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4068
4069 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4070 }
4071 else
4072 {
4073 ydata_section = subseg_new (".ydata", 0);
4074 }
99a814a1 4075 ppc_set_current_section (ydata_section);
252b5132
RH		 4076}
4077
4078/* pseudo-op: .reldata
4079 behaviour: predefined read write data section
b34976b6 4080 double word aligned (4-byte)
252b5132
RH		 4081 FIXME: relocation is applied to it
4082 FIXME: what's the difference between this and .data?
4083 errors: None
4084 warnings: None
4085 initial: .section .reldata "drw3"
4086 d - initialized data
4087 r - readable
4088 w - writeable
4089 3 - double word aligned (that would be 8 byte boundary)
4090
4091 commentary:
4092 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4093 function descriptors, etc. */
4094
252b5132 4095static void
99a814a1 4096ppc_reldata (ignore)
5480ccf3 4097 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4098{
4099 if (reldata_section == 0)
4100 {
4101 reldata_section = subseg_new (".reldata", 0);
4102
4103 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4104 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4105 | SEC_DATA));
252b5132
RH		 4106
4107 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4108 }
4109 else
4110 {
4111 reldata_section = subseg_new (".reldata", 0);
4112 }
99a814a1 4113 ppc_set_current_section (reldata_section);
252b5132
RH		 4114}
4115
4116/* pseudo-op: .rdata
4117 behaviour: predefined read only data section
b34976b6 4118 double word aligned
252b5132
RH		 4119 errors: None
4120 warnings: None
4121 initial: .section .rdata "dr3"
4122 d - initialized data
4123 r - readable
99a814a1
AM		 4124 3 - double word aligned (that would be 4 byte boundary) */
4125
252b5132 4126static void
99a814a1 4127ppc_rdata (ignore)
5480ccf3 4128 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4129{
4130 if (rdata_section == 0)
4131 {
4132 rdata_section = subseg_new (".rdata", 0);
4133 bfd_set_section_flags (stdoutput, rdata_section,
4134 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4135 | SEC_READONLY | SEC_DATA ));
4136
4137 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4138 }
4139 else
4140 {
4141 rdata_section = subseg_new (".rdata", 0);
4142 }
99a814a1 4143 ppc_set_current_section (rdata_section);
252b5132
RH		 4144}
4145
4146/* pseudo-op: .ualong
81d4177b 4147 behaviour: much like .int, with the exception that no alignment is
b34976b6 4148 performed.
252b5132
RH		 4149 FIXME: test the alignment statement
4150 errors: None
99a814a1
AM		 4151 warnings: None */
4152
252b5132 4153static void
99a814a1 4154ppc_ualong (ignore)
5480ccf3 4155 int ignore ATTRIBUTE_UNUSED;
252b5132 4156{
99a814a1
AM		 4157 /* Try for long. */
4158 cons (4);
252b5132
RH		 4159}
4160
4161/* pseudo-op: .znop <symbol name>
4162 behaviour: Issue a nop instruction
b34976b6 4163 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4164 the supplied symbol name.
4165 errors: None
99a814a1
AM		 4166 warnings: Missing symbol name */
4167
252b5132 4168static void
99a814a1 4169ppc_znop (ignore)
5480ccf3 4170 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4171{
4172 unsigned long insn;
4173 const struct powerpc_opcode *opcode;
4174 expressionS ex;
4175 char *f;
252b5132 4176 symbolS *sym;
252b5132
RH		 4177 char *symbol_name;
4178 char c;
4179 char *name;
4180 unsigned int exp;
4181 flagword flags;
4182 asection *sec;
4183
99a814a1 4184 /* Strip out the symbol name. */
252b5132
RH		 4185 symbol_name = input_line_pointer;
4186 c = get_symbol_end ();
4187
4188 name = xmalloc (input_line_pointer - symbol_name + 1);
4189 strcpy (name, symbol_name);
4190
4191 sym = symbol_find_or_make (name);
4192
4193 *input_line_pointer = c;
4194
4195 SKIP_WHITESPACE ();
4196
4197 /* Look up the opcode in the hash table. */
4198 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4199
99a814a1 4200 /* Stick in the nop. */
252b5132
RH		 4201 insn = opcode->opcode;
4202
4203 /* Write out the instruction. */
4204 f = frag_more (4);
4205 md_number_to_chars (f, insn, 4);
4206 fix_new (frag_now,
4207 f - frag_now->fr_literal,
4208 4,
4209 sym,
4210 0,
4211 0,
4212 BFD_RELOC_16_GOT_PCREL);
4213
4214}
4215
81d4177b
KH		 4216/* pseudo-op:
4217 behaviour:
4218 errors:
99a814a1
AM		 4219 warnings: */
4220
252b5132 4221static void
99a814a1 4222ppc_pe_comm (lcomm)
252b5132
RH		 4223 int lcomm;
4224{
4225 register char *name;
4226 register char c;
4227 register char *p;
4228 offsetT temp;
4229 register symbolS *symbolP;
4230 offsetT align;
4231
4232 name = input_line_pointer;
4233 c = get_symbol_end ();
4234
99a814a1 4235 /* just after name is now '\0'. */
252b5132
RH		 4236 p = input_line_pointer;
4237 *p = c;
4238 SKIP_WHITESPACE ();
4239 if (*input_line_pointer != ',')
4240 {
4241 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4242 ignore_rest_of_line ();
4243 return;
4244 }
4245
4246 input_line_pointer++; /* skip ',' */
4247 if ((temp = get_absolute_expression ()) < 0)
4248 {
4249 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4250 ignore_rest_of_line ();
4251 return;
4252 }
4253
4254 if (! lcomm)
4255 {
4256 /* The third argument to .comm is the alignment. */
4257 if (*input_line_pointer != ',')
4258 align = 3;
4259 else
4260 {
4261 ++input_line_pointer;
4262 align = get_absolute_expression ();
4263 if (align <= 0)
4264 {
4265 as_warn (_("ignoring bad alignment"));
4266 align = 3;
4267 }
4268 }
4269 }
4270
4271 *p = 0;
4272 symbolP = symbol_find_or_make (name);
4273
4274 *p = c;
4275 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4276 {
4277 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4278 S_GET_NAME (symbolP));
4279 ignore_rest_of_line ();
4280 return;
4281 }
4282
4283 if (S_GET_VALUE (symbolP))
4284 {
4285 if (S_GET_VALUE (symbolP) != (valueT) temp)
4286 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4287 S_GET_NAME (symbolP),
4288 (long) S_GET_VALUE (symbolP),
4289 (long) temp);
4290 }
4291 else
4292 {
4293 S_SET_VALUE (symbolP, (valueT) temp);
4294 S_SET_EXTERNAL (symbolP);
4295 }
4296
4297 demand_empty_rest_of_line ();
4298}
4299
4300/*
4301 * implement the .section pseudo op:
4302 * .section name {, "flags"}
4303 * ^ ^
4304 * | +--- optional flags: 'b' for bss
4305 * | 'i' for info
4306 * +-- section name 'l' for lib
4307 * 'n' for noload
4308 * 'o' for over
4309 * 'w' for data
4310 * 'd' (apparently m88k for data)
4311 * 'x' for text
4312 * But if the argument is not a quoted string, treat it as a
4313 * subsegment number.
4314 *
4315 * FIXME: this is a copy of the section processing from obj-coff.c, with
4316 * additions/changes for the moto-pas assembler support. There are three
4317 * categories:
4318 *
81d4177b 4319 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4320 * setting bits that bfd probably neither understands or uses. The
4321 * correct approach (?) will have to incorporate extra fields attached
4322 * to the section to hold the system specific stuff. (krk)
4323 *
4324 * Section Contents:
4325 * 'a' - unknown - referred to in documentation, but no definition supplied
4326 * 'c' - section has code
4327 * 'd' - section has initialized data
4328 * 'u' - section has uninitialized data
4329 * 'i' - section contains directives (info)
4330 * 'n' - section can be discarded
4331 * 'R' - remove section at link time
4332 *
4333 * Section Protection:
4334 * 'r' - section is readable
4335 * 'w' - section is writeable
4336 * 'x' - section is executable
4337 * 's' - section is sharable
4338 *
4339 * Section Alignment:
4340 * '0' - align to byte boundary
4341 * '1' - align to halfword undary
4342 * '2' - align to word boundary
4343 * '3' - align to doubleword boundary
4344 * '4' - align to quadword boundary
4345 * '5' - align to 32 byte boundary
4346 * '6' - align to 64 byte boundary
4347 *
4348 */
4349
4350void
4351ppc_pe_section (ignore)
5480ccf3 4352 int ignore ATTRIBUTE_UNUSED;
252b5132 4353{
99a814a1 4354 /* Strip out the section name. */
252b5132
RH		 4355 char *section_name;
4356 char c;
4357 char *name;
4358 unsigned int exp;
4359 flagword flags;
4360 segT sec;
4361 int align;
4362
4363 section_name = input_line_pointer;
4364 c = get_symbol_end ();
4365
4366 name = xmalloc (input_line_pointer - section_name + 1);
4367 strcpy (name, section_name);
4368
4369 *input_line_pointer = c;
4370
4371 SKIP_WHITESPACE ();
4372
4373 exp = 0;
4374 flags = SEC_NO_FLAGS;
4375
4376 if (strcmp (name, ".idata$2") == 0)
4377 {
4378 align = 0;
4379 }
4380 else if (strcmp (name, ".idata$3") == 0)
4381 {
4382 align = 0;
4383 }
4384 else if (strcmp (name, ".idata$4") == 0)
4385 {
4386 align = 2;
4387 }
4388 else if (strcmp (name, ".idata$5") == 0)
4389 {
4390 align = 2;
4391 }
4392 else if (strcmp (name, ".idata$6") == 0)
4393 {
4394 align = 1;
4395 }
4396 else
99a814a1
AM		 4397 /* Default alignment to 16 byte boundary. */
4398 align = 4;
252b5132
RH		 4399
4400 if (*input_line_pointer == ',')
4401 {
4402 ++input_line_pointer;
4403 SKIP_WHITESPACE ();
4404 if (*input_line_pointer != '"')
4405 exp = get_absolute_expression ();
4406 else
4407 {
4408 ++input_line_pointer;
4409 while (*input_line_pointer != '"'
4410 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4411 {
4412 switch (*input_line_pointer)
4413 {
4414 /* Section Contents */
4415 case 'a': /* unknown */
4416 as_bad (_("Unsupported section attribute -- 'a'"));
4417 break;
4418 case 'c': /* code section */
81d4177b 4419 flags |= SEC_CODE;
252b5132
RH		 4420 break;
4421 case 'd': /* section has initialized data */
4422 flags |= SEC_DATA;
4423 break;
4424 case 'u': /* section has uninitialized data */
4425 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4426 in winnt.h */
4427 flags |= SEC_ROM;
4428 break;
4429 case 'i': /* section contains directives (info) */
4430 /* FIXME: This is IMAGE_SCN_LNK_INFO
4431 in winnt.h */
4432 flags |= SEC_HAS_CONTENTS;
4433 break;
4434 case 'n': /* section can be discarded */
81d4177b 4435 flags &=~ SEC_LOAD;
252b5132
RH		 4436 break;
4437 case 'R': /* Remove section at link time */
4438 flags |= SEC_NEVER_LOAD;
4439 break;
4440
4441 /* Section Protection */
4442 case 'r': /* section is readable */
4443 flags |= IMAGE_SCN_MEM_READ;
4444 break;
4445 case 'w': /* section is writeable */
4446 flags |= IMAGE_SCN_MEM_WRITE;
4447 break;
4448 case 'x': /* section is executable */
4449 flags |= IMAGE_SCN_MEM_EXECUTE;
4450 break;
4451 case 's': /* section is sharable */
4452 flags |= IMAGE_SCN_MEM_SHARED;
4453 break;
4454
4455 /* Section Alignment */
4456 case '0': /* align to byte boundary */
4457 flags |= IMAGE_SCN_ALIGN_1BYTES;
4458 align = 0;
4459 break;
4460 case '1': /* align to halfword boundary */
4461 flags |= IMAGE_SCN_ALIGN_2BYTES;
4462 align = 1;
4463 break;
4464 case '2': /* align to word boundary */
4465 flags |= IMAGE_SCN_ALIGN_4BYTES;
4466 align = 2;
4467 break;
4468 case '3': /* align to doubleword boundary */
4469 flags |= IMAGE_SCN_ALIGN_8BYTES;
4470 align = 3;
4471 break;
4472 case '4': /* align to quadword boundary */
4473 flags |= IMAGE_SCN_ALIGN_16BYTES;
4474 align = 4;
4475 break;
4476 case '5': /* align to 32 byte boundary */
4477 flags |= IMAGE_SCN_ALIGN_32BYTES;
4478 align = 5;
4479 break;
4480 case '6': /* align to 64 byte boundary */
4481 flags |= IMAGE_SCN_ALIGN_64BYTES;
4482 align = 6;
4483 break;
4484
4485 default:
99a814a1
AM		 4486 as_bad (_("unknown section attribute '%c'"),
4487 *input_line_pointer);
252b5132
RH		 4488 break;
4489 }
4490 ++input_line_pointer;
4491 }
4492 if (*input_line_pointer == '"')
4493 ++input_line_pointer;
4494 }
4495 }
4496
4497 sec = subseg_new (name, (subsegT) exp);
4498
99a814a1 4499 ppc_set_current_section (sec);
252b5132
RH		 4500
4501 if (flags != SEC_NO_FLAGS)
4502 {
4503 if (! bfd_set_section_flags (stdoutput, sec, flags))
4504 as_bad (_("error setting flags for \"%s\": %s"),
4505 bfd_section_name (stdoutput, sec),
4506 bfd_errmsg (bfd_get_error ()));
4507 }
4508
99a814a1 4509 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4510
4511}
4512
4513static void
4514ppc_pe_function (ignore)
5480ccf3 4515 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4516{
4517 char *name;
4518 char endc;
4519 symbolS *ext_sym;
4520
4521 name = input_line_pointer;
4522 endc = get_symbol_end ();
4523
4524 ext_sym = symbol_find_or_make (name);
4525
4526 *input_line_pointer = endc;
4527
4528 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4529 SF_SET_FUNCTION (ext_sym);
4530 SF_SET_PROCESS (ext_sym);
4531 coff_add_linesym (ext_sym);
4532
4533 demand_empty_rest_of_line ();
4534}
4535
4536static void
4537ppc_pe_tocd (ignore)
5480ccf3 4538 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4539{
4540 if (tocdata_section == 0)
4541 {
4542 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4543 /* FIXME: section flags won't work. */
252b5132
RH		 4544 bfd_set_section_flags (stdoutput, tocdata_section,
4545 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4546 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4547
4548 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4549 }
4550 else
4551 {
4552 rdata_section = subseg_new (".tocd", 0);
4553 }
4554
99a814a1 4555 ppc_set_current_section (tocdata_section);
252b5132
RH		 4556
4557 demand_empty_rest_of_line ();
4558}
4559
4560/* Don't adjust TOC relocs to use the section symbol. */
4561
4562int
4563ppc_pe_fix_adjustable (fix)
4564 fixS *fix;
4565{
4566 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4567}
4568
4569#endif
4570\f
4571#ifdef OBJ_XCOFF
4572
4573/* XCOFF specific symbol and file handling. */
4574
4575/* Canonicalize the symbol name. We use the to force the suffix, if
4576 any, to use square brackets, and to be in upper case. */
4577
4578char *
4579ppc_canonicalize_symbol_name (name)
4580 char *name;
4581{
4582 char *s;
4583
4584 if (ppc_stab_symbol)
4585 return name;
4586
4587 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4588 ;
4589 if (*s != '\0')
4590 {
4591 char brac;
4592
4593 if (*s == '[')
4594 brac = ']';
4595 else
4596 {
4597 *s = '[';
4598 brac = '}';
4599 }
4600
4601 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4602 *s = TOUPPER (*s);
252b5132
RH		 4603
4604 if (*s == '\0' || s[1] != '\0')
4605 as_bad (_("bad symbol suffix"));
4606
4607 *s = ']';
4608 }
4609
4610 return name;
4611}
4612
4613/* Set the class of a symbol based on the suffix, if any. This is
4614 called whenever a new symbol is created. */
4615
4616void
4617ppc_symbol_new_hook (sym)
4618 symbolS *sym;
4619{
809ffe0d 4620 struct ppc_tc_sy *tc;
252b5132
RH		 4621 const char *s;
4622
809ffe0d
ILT		 4623 tc = symbol_get_tc (sym);
4624 tc->next = NULL;
4625 tc->output = 0;
4626 tc->class = -1;
4627 tc->real_name = NULL;
4628 tc->subseg = 0;
4629 tc->align = 0;
4630 tc->size = NULL;
4631 tc->within = NULL;
252b5132
RH		 4632
4633 if (ppc_stab_symbol)
4634 return;
4635
4636 s = strchr (S_GET_NAME (sym), '[');
4637 if (s == (const char *) NULL)
4638 {
4639 /* There is no suffix. */
4640 return;
4641 }
4642
4643 ++s;
4644
4645 switch (s[0])
4646 {
4647 case 'B':
4648 if (strcmp (s, "BS]") == 0)
809ffe0d 4649 tc->class = XMC_BS;
252b5132
RH		 4650 break;
4651 case 'D':
4652 if (strcmp (s, "DB]") == 0)
809ffe0d 4653 tc->class = XMC_DB;
252b5132 4654 else if (strcmp (s, "DS]") == 0)
809ffe0d 4655 tc->class = XMC_DS;
252b5132
RH		 4656 break;
4657 case 'G':
4658 if (strcmp (s, "GL]") == 0)
809ffe0d 4659 tc->class = XMC_GL;
252b5132
RH		 4660 break;
4661 case 'P':
4662 if (strcmp (s, "PR]") == 0)
809ffe0d 4663 tc->class = XMC_PR;
252b5132
RH		 4664 break;
4665 case 'R':
4666 if (strcmp (s, "RO]") == 0)
809ffe0d 4667 tc->class = XMC_RO;
252b5132 4668 else if (strcmp (s, "RW]") == 0)
809ffe0d 4669 tc->class = XMC_RW;
252b5132
RH		 4670 break;
4671 case 'S':
4672 if (strcmp (s, "SV]") == 0)
809ffe0d 4673 tc->class = XMC_SV;
252b5132
RH		 4674 break;
4675 case 'T':
4676 if (strcmp (s, "TC]") == 0)
809ffe0d 4677 tc->class = XMC_TC;
252b5132 4678 else if (strcmp (s, "TI]") == 0)
809ffe0d 4679 tc->class = XMC_TI;
252b5132 4680 else if (strcmp (s, "TB]") == 0)
809ffe0d 4681 tc->class = XMC_TB;
252b5132 4682 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4683 tc->class = XMC_TC0;
252b5132
RH		 4684 break;
4685 case 'U':
4686 if (strcmp (s, "UA]") == 0)
809ffe0d 4687 tc->class = XMC_UA;
252b5132 4688 else if (strcmp (s, "UC]") == 0)
809ffe0d 4689 tc->class = XMC_UC;
252b5132
RH		 4690 break;
4691 case 'X':
4692 if (strcmp (s, "XO]") == 0)
809ffe0d 4693 tc->class = XMC_XO;
252b5132
RH		 4694 break;
4695 }
4696
809ffe0d 4697 if (tc->class == -1)
252b5132
RH		 4698 as_bad (_("Unrecognized symbol suffix"));
4699}
4700
4701/* Set the class of a label based on where it is defined. This
4702 handles symbols without suffixes. Also, move the symbol so that it
4703 follows the csect symbol. */
4704
4705void
4706ppc_frob_label (sym)
4707 symbolS *sym;
4708{
4709 if (ppc_current_csect != (symbolS *) NULL)
4710 {
809ffe0d
ILT		 4711 if (symbol_get_tc (sym)->class == -1)
4712 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4713
4714 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4715 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4716 &symbol_rootP, &symbol_lastP);
4717 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4718 }
4719}
4720
4721/* This variable is set by ppc_frob_symbol if any absolute symbols are
4722 seen. It tells ppc_adjust_symtab whether it needs to look through
4723 the symbols. */
4724
b34976b6 4725static bfd_boolean ppc_saw_abs;
252b5132
RH		 4726
4727/* Change the name of a symbol just before writing it out. Set the
4728 real name if the .rename pseudo-op was used. Otherwise, remove any
4729 class suffix. Return 1 if the symbol should not be included in the
4730 symbol table. */
4731
4732int
4733ppc_frob_symbol (sym)
4734 symbolS *sym;
4735{
4736 static symbolS *ppc_last_function;
4737 static symbolS *set_end;
4738
4739 /* Discard symbols that should not be included in the output symbol
4740 table. */
809ffe0d
ILT		 4741 if (! symbol_used_in_reloc_p (sym)
4742 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
252b5132 4743 || (! S_IS_EXTERNAL (sym)
809ffe0d 4744 && ! symbol_get_tc (sym)->output
252b5132
RH		 4745 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4746 return 1;
4747
a161fe53
AM		 4748 /* This one will disappear anyway. Don't make a csect sym for it. */
4749 if (sym == abs_section_sym)
4750 return 1;
4751
809ffe0d
ILT		 4752 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4753 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4754 else
4755 {
4756 const char *name;
4757 const char *s;
4758
4759 name = S_GET_NAME (sym);
4760 s = strchr (name, '[');
4761 if (s != (char *) NULL)
4762 {
4763 unsigned int len;
4764 char *snew;
4765
4766 len = s - name;
4767 snew = xmalloc (len + 1);
4768 memcpy (snew, name, len);
4769 snew[len] = '\0';
4770
4771 S_SET_NAME (sym, snew);
4772 }
4773 }
4774
4775 if (set_end != (symbolS *) NULL)
4776 {
4777 SA_SET_SYM_ENDNDX (set_end, sym);
4778 set_end = NULL;
4779 }
4780
4781 if (SF_GET_FUNCTION (sym))
4782 {
4783 if (ppc_last_function != (symbolS *) NULL)
4784 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4785 ppc_last_function = sym;
809ffe0d 4786 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4787 {
6386f3a7 4788 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4789 SA_SET_SYM_FSIZE (sym,
4790 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4791 }
4792 }
4793 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4794 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4795 {
4796 if (ppc_last_function == (symbolS *) NULL)
4797 as_bad (_(".ef with no preceding .function"));
4798 else
4799 {
4800 set_end = ppc_last_function;
4801 ppc_last_function = NULL;
4802
4803 /* We don't have a C_EFCN symbol, but we need to force the
4804 COFF backend to believe that it has seen one. */
4805 coff_last_function = NULL;
4806 }
4807 }
4808
4809 if (! S_IS_EXTERNAL (sym)
809ffe0d 4810 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4811 && S_GET_STORAGE_CLASS (sym) != C_FILE
4812 && S_GET_STORAGE_CLASS (sym) != C_FCN
4813 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4814 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4815 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4816 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4817 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4818 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4819 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4820
4821 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4822 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4823 {
4824 int i;
4825 union internal_auxent *a;
4826
4827 /* Create a csect aux. */
4828 i = S_GET_NUMBER_AUXILIARY (sym);
4829 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4830 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4831 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4832 {
4833 /* This is the TOC table. */
4834 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4835 a->x_csect.x_scnlen.l = 0;
4836 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4837 }
809ffe0d 4838 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4839 {
4840 /* This is a csect symbol. x_scnlen is the size of the
4841 csect. */
809ffe0d 4842 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4843 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4844 S_GET_SEGMENT (sym))
4845 - S_GET_VALUE (sym));
4846 else
4847 {
6386f3a7 4848 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4849 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4850 - S_GET_VALUE (sym));
4851 }
809ffe0d 4852 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4853 }
4854 else if (S_GET_SEGMENT (sym) == bss_section)
4855 {
4856 /* This is a common symbol. */
809ffe0d
ILT		 4857 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4858 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4859 if (S_IS_EXTERNAL (sym))
809ffe0d 4860 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4861 else
809ffe0d 4862 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 4863 }
4864 else if (S_GET_SEGMENT (sym) == absolute_section)
4865 {
4866 /* This is an absolute symbol. The csect will be created by
99a814a1 4867 ppc_adjust_symtab. */
b34976b6 4868 ppc_saw_abs = TRUE;
252b5132 4869 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 4870 if (symbol_get_tc (sym)->class == -1)
4871 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 4872 }
4873 else if (! S_IS_DEFINED (sym))
4874 {
4875 /* This is an external symbol. */
4876 a->x_csect.x_scnlen.l = 0;
4877 a->x_csect.x_smtyp = XTY_ER;
4878 }
809ffe0d 4879 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 4880 {
4881 symbolS *next;
4882
4883 /* This is a TOC definition. x_scnlen is the size of the
4884 TOC entry. */
4885 next = symbol_next (sym);
809ffe0d 4886 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 4887 next = symbol_next (next);
4888 if (next == (symbolS *) NULL
809ffe0d 4889 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 4890 {
4891 if (ppc_after_toc_frag == (fragS *) NULL)
4892 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4893 data_section)
4894 - S_GET_VALUE (sym));
4895 else
4896 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
4897 - S_GET_VALUE (sym));
4898 }
4899 else
4900 {
6386f3a7 4901 resolve_symbol_value (next);
252b5132
RH		 4902 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
4903 - S_GET_VALUE (sym));
4904 }
4905 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4906 }
4907 else
4908 {
4909 symbolS *csect;
4910
4911 /* This is a normal symbol definition. x_scnlen is the
4912 symbol index of the containing csect. */
4913 if (S_GET_SEGMENT (sym) == text_section)
4914 csect = ppc_text_csects;
4915 else if (S_GET_SEGMENT (sym) == data_section)
4916 csect = ppc_data_csects;
4917 else
4918 abort ();
4919
4920 /* Skip the initial dummy symbol. */
809ffe0d 4921 csect = symbol_get_tc (csect)->next;
252b5132
RH		 4922
4923 if (csect == (symbolS *) NULL)
4924 {
4925 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
4926 a->x_csect.x_scnlen.l = 0;
4927 }
4928 else
4929 {
809ffe0d 4930 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 4931 {
6386f3a7 4932 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 4933 if (S_GET_VALUE (symbol_get_tc (csect)->next)
4934 > S_GET_VALUE (sym))
252b5132 4935 break;
809ffe0d 4936 csect = symbol_get_tc (csect)->next;
252b5132
RH		 4937 }
4938
809ffe0d
ILT		 4939 a->x_csect.x_scnlen.p =
4940 coffsymbol (symbol_get_bfdsym (csect))->native;
4941 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
4942 1;
252b5132
RH		 4943 }
4944 a->x_csect.x_smtyp = XTY_LD;
4945 }
81d4177b 4946
252b5132
RH		 4947 a->x_csect.x_parmhash = 0;
4948 a->x_csect.x_snhash = 0;
809ffe0d 4949 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 4950 a->x_csect.x_smclas = XMC_PR;
4951 else
809ffe0d 4952 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 4953 a->x_csect.x_stab = 0;
4954 a->x_csect.x_snstab = 0;
4955
4956 /* Don't let the COFF backend resort these symbols. */
809ffe0d 4957 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 4958 }
4959 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
4960 {
4961 /* We want the value to be the symbol index of the referenced
4962 csect symbol. BFD will do that for us if we set the right
4963 flags. */
b782de16
AM		 4964 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
4965 combined_entry_type *c = coffsymbol (bsym)->native;
4966
4967 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 4968 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 4969 }
4970 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4971 {
4972 symbolS *block;
4973 symbolS *csect;
4974
4975 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 4976 block = symbol_get_tc (sym)->within;
4977 csect = symbol_get_tc (block)->within;
6386f3a7 4978 resolve_symbol_value (csect);
252b5132
RH		 4979 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
4980 }
4981 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
4982 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
4983 {
4984 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 4985 BFD will do that for us if we set the right flags. We have
4986 already set the value correctly. */
809ffe0d 4987 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 4988 }
4989
4990 return 0;
4991}
4992
4993/* Adjust the symbol table. This creates csect symbols for all
4994 absolute symbols. */
4995
4996void
4997ppc_adjust_symtab ()
4998{
4999 symbolS *sym;
5000
5001 if (! ppc_saw_abs)
5002 return;
5003
5004 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5005 {
5006 symbolS *csect;
5007 int i;
5008 union internal_auxent *a;
5009
5010 if (S_GET_SEGMENT (sym) != absolute_section)
5011 continue;
5012
5013 csect = symbol_create (".abs[XO]", absolute_section,
5014 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5015 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5016 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5017 i = S_GET_NUMBER_AUXILIARY (csect);
5018 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5019 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5020 a->x_csect.x_scnlen.l = 0;
5021 a->x_csect.x_smtyp = XTY_SD;
5022 a->x_csect.x_parmhash = 0;
5023 a->x_csect.x_snhash = 0;
5024 a->x_csect.x_smclas = XMC_XO;
5025 a->x_csect.x_stab = 0;
5026 a->x_csect.x_snstab = 0;
5027
5028 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5029
5030 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5031 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5032 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5033 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5034 }
5035
b34976b6 5036 ppc_saw_abs = FALSE;
252b5132
RH		 5037}
5038
5039/* Set the VMA for a section. This is called on all the sections in
5040 turn. */
5041
5042void
5043ppc_frob_section (sec)
5044 asection *sec;
5045{
5046 static bfd_size_type vma = 0;
5047
5048 bfd_set_section_vma (stdoutput, sec, vma);
5049 vma += bfd_section_size (stdoutput, sec);
5050}
5051
5052#endif /* OBJ_XCOFF */
5053\f
5054/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5055 of type TYPE, and store the appropriate bytes in *LITP. The number
5056 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5057 returned, or NULL on OK. */
5058
5059char *
5060md_atof (type, litp, sizep)
5061 int type;
5062 char *litp;
5063 int *sizep;
5064{
5065 int prec;
5066 LITTLENUM_TYPE words[4];
5067 char *t;
5068 int i;
5069
5070 switch (type)
5071 {
5072 case 'f':
5073 prec = 2;
5074 break;
5075
5076 case 'd':
5077 prec = 4;
5078 break;
5079
5080 default:
5081 *sizep = 0;
5082 return _("bad call to md_atof");
5083 }
5084
5085 t = atof_ieee (input_line_pointer, type, words);
5086 if (t)
5087 input_line_pointer = t;
5088
5089 *sizep = prec * 2;
5090
5091 if (target_big_endian)
5092 {
5093 for (i = 0; i < prec; i++)
5094 {
5095 md_number_to_chars (litp, (valueT) words[i], 2);
5096 litp += 2;
5097 }
5098 }
5099 else
5100 {
5101 for (i = prec - 1; i >= 0; i--)
5102 {
5103 md_number_to_chars (litp, (valueT) words[i], 2);
5104 litp += 2;
5105 }
5106 }
81d4177b 5107
252b5132
RH		 5108 return NULL;
5109}
5110
5111/* Write a value out to the object file, using the appropriate
5112 endianness. */
5113
5114void
5115md_number_to_chars (buf, val, n)
5116 char *buf;
5117 valueT val;
5118 int n;
5119{
5120 if (target_big_endian)
5121 number_to_chars_bigendian (buf, val, n);
5122 else
5123 number_to_chars_littleendian (buf, val, n);
5124}
5125
5126/* Align a section (I don't know why this is machine dependent). */
5127
5128valueT
5129md_section_align (seg, addr)
5130 asection *seg;
5131 valueT addr;
5132{
5133 int align = bfd_get_section_alignment (stdoutput, seg);
5134
5135 return ((addr + (1 << align) - 1) & (-1 << align));
5136}
5137
5138/* We don't have any form of relaxing. */
5139
5140int
5141md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5142 fragS *fragp ATTRIBUTE_UNUSED;
5143 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5144{
5145 abort ();
5146 return 0;
5147}
5148
5149/* Convert a machine dependent frag. We never generate these. */
5150
5151void
5152md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5153 bfd *abfd ATTRIBUTE_UNUSED;
5154 asection *sec ATTRIBUTE_UNUSED;
5155 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5156{
5157 abort ();
5158}
5159
5160/* We have no need to default values of symbols. */
5161
252b5132
RH		 5162symbolS *
5163md_undefined_symbol (name)
92161534 5164 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5165{
5166 return 0;
5167}
5168\f
5169/* Functions concerning relocs. */
5170
5171/* The location from which a PC relative jump should be calculated,
5172 given a PC relative reloc. */
5173
5174long
5175md_pcrel_from_section (fixp, sec)
5176 fixS *fixp;
92161534 5177 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5178{
5179 return fixp->fx_frag->fr_address + fixp->fx_where;
5180}
5181
5182#ifdef OBJ_XCOFF
5183
5184/* This is called to see whether a fixup should be adjusted to use a
5185 section symbol. We take the opportunity to change a fixup against
5186 a symbol in the TOC subsegment into a reloc against the
5187 corresponding .tc symbol. */
5188
5189int
5190ppc_fix_adjustable (fix)
5191 fixS *fix;
5192{
b782de16
AM		 5193 valueT val = resolve_symbol_value (fix->fx_addsy);
5194 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5195 TC_SYMFIELD_TYPE *tc;
5196
5197 if (symseg == absolute_section)
5198 return 0;
252b5132 5199
252b5132 5200 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5201 && fix->fx_addsy != ppc_toc_csect
b782de16 5202 && symseg == data_section
252b5132
RH		 5203 && val >= ppc_toc_frag->fr_address
5204 && (ppc_after_toc_frag == (fragS *) NULL
5205 || val < ppc_after_toc_frag->fr_address))
5206 {
5207 symbolS *sy;
5208
5209 for (sy = symbol_next (ppc_toc_csect);
5210 sy != (symbolS *) NULL;
5211 sy = symbol_next (sy))
5212 {
b782de16
AM		 5213 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5214
5215 if (sy_tc->class == XMC_TC0)
252b5132 5216 continue;
b782de16 5217 if (sy_tc->class != XMC_TC)
252b5132 5218 break;
b782de16 5219 if (val == resolve_symbol_value (sy))
252b5132
RH		 5220 {
5221 fix->fx_addsy = sy;
5222 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5223 return 0;
5224 }
5225 }
5226
5227 as_bad_where (fix->fx_file, fix->fx_line,
5228 _("symbol in .toc does not match any .tc"));
5229 }
5230
5231 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5232 tc = symbol_get_tc (fix->fx_addsy);
5233 if (tc->subseg == 0
5234 && tc->class != XMC_TC0
5235 && tc->class != XMC_TC
5236 && symseg != bss_section
252b5132 5237 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5238 && (symseg != data_section
252b5132
RH		 5239 || ppc_toc_csect == NULL
5240 || val < ppc_toc_frag->fr_address
5241 || (ppc_after_toc_frag != NULL
5242 && val >= ppc_after_toc_frag->fr_address)))
5243 {
5244 symbolS *csect;
b782de16 5245 symbolS *next_csect;
252b5132 5246
b782de16 5247 if (symseg == text_section)
252b5132 5248 csect = ppc_text_csects;
b782de16 5249 else if (symseg == data_section)
252b5132
RH		 5250 csect = ppc_data_csects;
5251 else
5252 abort ();
5253
5254 /* Skip the initial dummy symbol. */
809ffe0d 5255 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5256
5257 if (csect != (symbolS *) NULL)
5258 {
b782de16
AM		 5259 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5260 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5261 {
5262 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5263 have to look through the full symbol table to see
5264 whether this is the csect we want. Note that we will
5265 only get here if the csect has zero length. */
b782de16
AM		 5266 if (symbol_get_frag (csect)->fr_address == val
5267 && S_GET_VALUE (csect) == val)
252b5132
RH		 5268 {
5269 symbolS *scan;
5270
809ffe0d 5271 for (scan = symbol_next (csect);
252b5132 5272 scan != NULL;
809ffe0d 5273 scan = symbol_next (scan))
252b5132 5274 {
809ffe0d 5275 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5276 break;
5277 if (scan == fix->fx_addsy)
5278 break;
5279 }
5280
5281 /* If we found the symbol before the next csect
99a814a1 5282 symbol, then this is the csect we want. */
252b5132
RH		 5283 if (scan == fix->fx_addsy)
5284 break;
5285 }
5286
b782de16 5287 csect = next_csect;
252b5132
RH		 5288 }
5289
b782de16 5290 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5291 fix->fx_addsy = csect;
5292 }
b782de16 5293 return 0;
252b5132
RH		 5294 }
5295
5296 /* Adjust a reloc against a .lcomm symbol to be against the base
5297 .lcomm. */
b782de16 5298 if (symseg == bss_section
252b5132
RH		 5299 && ! S_IS_EXTERNAL (fix->fx_addsy))
5300 {
b782de16
AM		 5301 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5302
5303 fix->fx_offset += val - resolve_symbol_value (sy);
5304 fix->fx_addsy = sy;
252b5132
RH		 5305 }
5306
5307 return 0;
5308}
5309
5310/* A reloc from one csect to another must be kept. The assembler
5311 will, of course, keep relocs between sections, and it will keep
5312 absolute relocs, but we need to force it to keep PC relative relocs
5313 between two csects in the same section. */
5314
5315int
5316ppc_force_relocation (fix)
5317 fixS *fix;
5318{
5319 /* At this point fix->fx_addsy should already have been converted to
5320 a csect symbol. If the csect does not include the fragment, then
5321 we need to force the relocation. */
5322 if (fix->fx_pcrel
5323 && fix->fx_addsy != NULL
809ffe0d
ILT		 5324 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5325 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5326 > fix->fx_frag->fr_address)
5327 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5328 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5329 <= fix->fx_frag->fr_address))))
5330 return 1;
5331
ae6063d4 5332 return generic_force_reloc (fix);
252b5132
RH		 5333}
5334
5335#endif /* OBJ_XCOFF */
5336
0baf16f2 5337#ifdef OBJ_ELF
a161fe53
AM		 5338/* If this function returns non-zero, it guarantees that a relocation
5339 will be emitted for a fixup. */
5340
5341int
5342ppc_force_relocation (fix)
5343 fixS *fix;
5344{
5345 /* Branch prediction relocations must force a relocation, as must
5346 the vtable description relocs. */
5347 switch (fix->fx_r_type)
5348 {
5349 case BFD_RELOC_PPC_B16_BRTAKEN:
5350 case BFD_RELOC_PPC_B16_BRNTAKEN:
5351 case BFD_RELOC_PPC_BA16_BRTAKEN:
5352 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5353 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5354 return 1;
5355 default:
5356 break;
5357 }
5358
cdba85ec
AM		 5359 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5360 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5361 return 1;
5362
ae6063d4 5363 return generic_force_reloc (fix);
a161fe53
AM		 5364}
5365
0baf16f2
AM		 5366int
5367ppc_fix_adjustable (fix)
5368 fixS *fix;
252b5132 5369{
0baf16f2
AM		 5370 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5371 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5372 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5373 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5374 && fix->fx_r_type != BFD_RELOC_GPREL16
5375 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5376 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec
AM		 5377 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5378 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
0baf16f2
AM		 5379 && (fix->fx_pcrel
5380 || (fix->fx_subsy != NULL
5381 && (S_GET_SEGMENT (fix->fx_subsy)
5382 == S_GET_SEGMENT (fix->fx_addsy)))
5383 || S_IS_LOCAL (fix->fx_addsy)));
252b5132 5384}
0baf16f2 5385#endif
252b5132
RH		 5386
5387/* Apply a fixup to the object code. This is called for all the
5388 fixups we generated by the call to fix_new_exp, above. In the call
5389 above we used a reloc code which was the largest legal reloc code
5390 plus the operand index. Here we undo that to recover the operand
5391 index. At this point all symbol values should be fully resolved,
5392 and we attempt to completely resolve the reloc. If we can not do
5393 that, we determine the correct reloc code and put it back in the
5394 fixup. */
5395
94f592af
NC		 5396void
5397md_apply_fix3 (fixP, valP, seg)
5398 fixS *fixP;
5399 valueT * valP;
0baf16f2 5400 segT seg ATTRIBUTE_UNUSED;
252b5132 5401{
94f592af 5402 valueT value = * valP;
252b5132
RH		 5403
5404#ifdef OBJ_ELF
94f592af 5405 if (fixP->fx_addsy != NULL)
252b5132 5406 {
a161fe53 5407 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5408 if (fixP->fx_pcrel)
5409 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5410 }
5411 else
94f592af 5412 fixP->fx_done = 1;
252b5132 5413#else
a161fe53 5414 /* FIXME FIXME FIXME: The value we are passed in *valP includes
252b5132
RH		 5415 the symbol values. Since we are using BFD_ASSEMBLER, if we are
5416 doing this relocation the code in write.c is going to call
5417 bfd_install_relocation, which is also going to use the symbol
5418 value. That means that if the reloc is fully resolved we want to
a161fe53 5419 use *valP since bfd_install_relocation is not being used.
252b5132 5420 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5421 *valP, and must use fx_offset instead. However, if the reloc
5422 is PC relative, we do want to use *valP since it includes the
252b5132 5423 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5424 if (fixP->fx_addsy == (symbolS *) NULL)
5425 fixP->fx_done = 1;
5426
5427 else if (fixP->fx_pcrel)
5428 ;
5429
252b5132 5430 else
a161fe53
AM		 5431 value = fixP->fx_offset;
5432#endif
5433
5434 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5435 {
a161fe53
AM		 5436 /* We can't actually support subtracting a symbol. */
5437 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5438 }
252b5132 5439
94f592af 5440 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5441 {
5442 int opindex;
5443 const struct powerpc_operand *operand;
5444 char *where;
5445 unsigned long insn;
5446
94f592af 5447 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5448
5449 operand = &powerpc_operands[opindex];
5450
5451#ifdef OBJ_XCOFF
0baf16f2
AM		 5452 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5453 does not generate a reloc. It uses the offset of `sym' within its
5454 csect. Other usages, such as `.long sym', generate relocs. This
5455 is the documented behaviour of non-TOC symbols. */
252b5132
RH		 5456 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5457 && operand->bits == 16
5458 && operand->shift == 0
2b3c4602 5459 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5460 && fixP->fx_addsy != NULL
5461 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5462 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5463 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5464 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5465 {
94f592af
NC		 5466 value = fixP->fx_offset;
5467 fixP->fx_done = 1;
252b5132
RH		 5468 }
5469#endif
5470
5471 /* Fetch the instruction, insert the fully resolved operand
5472 value, and stuff the instruction back again. */
94f592af 5473 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5474 if (target_big_endian)
5475 insn = bfd_getb32 ((unsigned char *) where);
5476 else
5477 insn = bfd_getl32 ((unsigned char *) where);
5478 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5479 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5480 if (target_big_endian)
5481 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5482 else
5483 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5484
94f592af
NC		 5485 if (fixP->fx_done)
5486 /* Nothing else to do here. */
5487 return;
252b5132 5488
94f592af 5489 assert (fixP->fx_addsy != NULL);
0baf16f2 5490
252b5132
RH		 5491 /* Determine a BFD reloc value based on the operand information.
5492 We are only prepared to turn a few of the operands into
0baf16f2 5493 relocs. */
11b37b7b
AM		 5494 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5495 && operand->bits == 26
5496 && operand->shift == 0)
94f592af 5497 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM		 5498 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5499 && operand->bits == 16
5500 && operand->shift == 0)
95210096
AM		 5501 {
5502 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5503#ifdef OBJ_XCOFF
5504 fixP->fx_size = 2;
5505 if (target_big_endian)
5506 fixP->fx_where += 2;
5507#endif
5508 }
11b37b7b
AM		 5509 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5510 && operand->bits == 26
5511 && operand->shift == 0)
94f592af 5512 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM		 5513 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5514 && operand->bits == 16
5515 && operand->shift == 0)
95210096
AM		 5516 {
5517 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5518#ifdef OBJ_XCOFF
5519 fixP->fx_size = 2;
5520 if (target_big_endian)
5521 fixP->fx_where += 2;
5522#endif
5523 }
0baf16f2 5524#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM		 5525 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5526 && operand->bits == 16
5527 && operand->shift == 0
94f592af 5528 && ppc_is_toc_sym (fixP->fx_addsy))
11b37b7b 5529 {
94f592af 5530 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5531#ifdef OBJ_ELF
2b3c4602 5532 if (ppc_obj64
0baf16f2 5533 && (operand->flags & PPC_OPERAND_DS) != 0)
94f592af 5534 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
0baf16f2 5535#endif
94f592af 5536 fixP->fx_size = 2;
11b37b7b 5537 if (target_big_endian)
94f592af 5538 fixP->fx_where += 2;
11b37b7b 5539 }
0baf16f2 5540#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5541 else
252b5132
RH		 5542 {
5543 char *sfile;
5544 unsigned int sline;
5545
5546 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5547 symbol. */
94f592af
NC		 5548 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5549 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5550 _("unresolved expression that must be resolved"));
5551 else
94f592af 5552 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5553 _("unsupported relocation against %s"),
94f592af
NC		 5554 S_GET_NAME (fixP->fx_addsy));
5555 fixP->fx_done = 1;
5556 return;
252b5132
RH		 5557 }
5558 }
5559 else
5560 {
5561#ifdef OBJ_ELF
94f592af 5562 ppc_elf_validate_fix (fixP, seg);
252b5132 5563#endif
94f592af 5564 switch (fixP->fx_r_type)
252b5132 5565 {
252b5132 5566 case BFD_RELOC_CTOR:
2b3c4602 5567 if (ppc_obj64)
9c7977b3
AM		 5568 goto ctor64;
5569 /* fall through */
5570
0baf16f2 5571 case BFD_RELOC_32:
94f592af
NC		 5572 if (fixP->fx_pcrel)
5573 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5574 /* fall through */
252b5132
RH		 5575
5576 case BFD_RELOC_RVA:
5577 case BFD_RELOC_32_PCREL:
252b5132 5578 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5579 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5580 value, 4);
5581 break;
5582
7f6d05e8 5583 case BFD_RELOC_64:
9c7977b3 5584 ctor64:
94f592af
NC		 5585 if (fixP->fx_pcrel)
5586 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5587 /* fall through */
0baf16f2 5588
7f6d05e8 5589 case BFD_RELOC_64_PCREL:
94f592af 5590 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5591 value, 8);
81d4177b 5592 break;
0baf16f2 5593
252b5132
RH		 5594 case BFD_RELOC_LO16:
5595 case BFD_RELOC_16:
5596 case BFD_RELOC_GPREL16:
5597 case BFD_RELOC_16_GOT_PCREL:
5598 case BFD_RELOC_16_GOTOFF:
5599 case BFD_RELOC_LO16_GOTOFF:
5600 case BFD_RELOC_HI16_GOTOFF:
5601 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5602 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5603 case BFD_RELOC_LO16_BASEREL:
5604 case BFD_RELOC_HI16_BASEREL:
5605 case BFD_RELOC_HI16_S_BASEREL:
5606 case BFD_RELOC_PPC_EMB_NADDR16:
5607 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5608 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5609 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5610 case BFD_RELOC_PPC_EMB_SDAI16:
5611 case BFD_RELOC_PPC_EMB_SDA2REL:
5612 case BFD_RELOC_PPC_EMB_SDA2I16:
5613 case BFD_RELOC_PPC_EMB_RELSEC16:
5614 case BFD_RELOC_PPC_EMB_RELST_LO:
5615 case BFD_RELOC_PPC_EMB_RELST_HI:
5616 case BFD_RELOC_PPC_EMB_RELST_HA:
5617 case BFD_RELOC_PPC_EMB_RELSDA:
5618 case BFD_RELOC_PPC_TOC16:
0baf16f2 5619#ifdef OBJ_ELF
0baf16f2
AM		 5620 case BFD_RELOC_PPC64_TOC16_LO:
5621 case BFD_RELOC_PPC64_TOC16_HI:
5622 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5623#endif
94f592af 5624 if (fixP->fx_pcrel)
252b5132 5625 {
94f592af
NC		 5626 if (fixP->fx_addsy != NULL)
5627 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5628 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5629 bfd_get_reloc_code_name (fixP->fx_r_type),
5630 S_GET_NAME (fixP->fx_addsy));
252b5132 5631 else
94f592af 5632 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5633 _("cannot emit PC relative %s relocation"),
94f592af 5634 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5635 }
5636
94f592af 5637 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5638 value, 2);
5639 break;
5640
5641 /* This case happens when you write, for example,
5642 lis %r3,(L1-L2)@ha
5643 where L1 and L2 are defined later. */
5644 case BFD_RELOC_HI16:
94f592af 5645 if (fixP->fx_pcrel)
252b5132 5646 abort ();
94f592af 5647 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5648 PPC_HI (value), 2);
252b5132 5649 break;
0baf16f2 5650
252b5132 5651 case BFD_RELOC_HI16_S:
94f592af 5652 if (fixP->fx_pcrel)
252b5132 5653 abort ();
94f592af 5654 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5655 PPC_HA (value), 2);
5656 break;
5657
5658#ifdef OBJ_ELF
0baf16f2 5659 case BFD_RELOC_PPC64_HIGHER:
94f592af 5660 if (fixP->fx_pcrel)
0baf16f2 5661 abort ();
94f592af 5662 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5663 PPC_HIGHER (value), 2);
252b5132
RH		 5664 break;
5665
0baf16f2 5666 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5667 if (fixP->fx_pcrel)
0baf16f2 5668 abort ();
94f592af 5669 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5670 PPC_HIGHERA (value), 2);
5671 break;
5672
5673 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5674 if (fixP->fx_pcrel)
0baf16f2 5675 abort ();
94f592af 5676 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5677 PPC_HIGHEST (value), 2);
5678 break;
5679
5680 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5681 if (fixP->fx_pcrel)
0baf16f2 5682 abort ();
94f592af 5683 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5684 PPC_HIGHESTA (value), 2);
5685 break;
5686
5687 case BFD_RELOC_PPC64_ADDR16_DS:
5688 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5689 case BFD_RELOC_PPC64_GOT16_DS:
5690 case BFD_RELOC_PPC64_GOT16_LO_DS:
5691 case BFD_RELOC_PPC64_PLT16_LO_DS:
5692 case BFD_RELOC_PPC64_SECTOFF_DS:
5693 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5694 case BFD_RELOC_PPC64_TOC16_DS:
5695 case BFD_RELOC_PPC64_TOC16_LO_DS:
5696 case BFD_RELOC_PPC64_PLTGOT16_DS:
5697 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5698 if (fixP->fx_pcrel)
0baf16f2
AM		 5699 abort ();
5700 {
94f592af 5701 unsigned char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
0baf16f2
AM		 5702 unsigned long val;
5703
5704 if (target_big_endian)
5705 val = bfd_getb16 (where);
5706 else
5707 val = bfd_getl16 (where);
5708 val |= (value & 0xfffc);
5709 if (target_big_endian)
5710 bfd_putb16 ((bfd_vma) val, where);
5711 else
5712 bfd_putl16 ((bfd_vma) val, where);
5713 }
5714 break;
cdba85ec
AM		 5715
5716 case BFD_RELOC_PPC_TLS:
5717 case BFD_RELOC_PPC_DTPMOD:
5718 case BFD_RELOC_PPC_TPREL16:
5719 case BFD_RELOC_PPC_TPREL16_LO:
5720 case BFD_RELOC_PPC_TPREL16_HI:
5721 case BFD_RELOC_PPC_TPREL16_HA:
5722 case BFD_RELOC_PPC_TPREL:
5723 case BFD_RELOC_PPC_DTPREL16:
5724 case BFD_RELOC_PPC_DTPREL16_LO:
5725 case BFD_RELOC_PPC_DTPREL16_HI:
5726 case BFD_RELOC_PPC_DTPREL16_HA:
5727 case BFD_RELOC_PPC_DTPREL:
5728 case BFD_RELOC_PPC_GOT_TLSGD16:
5729 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5730 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5731 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5732 case BFD_RELOC_PPC_GOT_TLSLD16:
5733 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5734 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5735 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5736 case BFD_RELOC_PPC_GOT_TPREL16:
5737 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5738 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5739 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5740 case BFD_RELOC_PPC_GOT_DTPREL16:
5741 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5742 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5743 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5744 case BFD_RELOC_PPC64_TPREL16_DS:
5745 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5746 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5747 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5748 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5749 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5750 case BFD_RELOC_PPC64_DTPREL16_DS:
5751 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5752 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5753 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5754 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5755 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
5756 break;
0baf16f2 5757#endif
252b5132 5758 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5759 bytes, rather than 2, so offset it here appropriately. */
252b5132 5760 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5761 if (fixP->fx_pcrel)
252b5132
RH		 5762 abort ();
5763
94f592af 5764 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5765 + ((target_big_endian) ? 2 : 0),
5766 value, 2);
5767 break;
5768
5769 case BFD_RELOC_8:
94f592af 5770 if (fixP->fx_pcrel)
252b5132
RH		 5771 abort ();
5772
94f592af 5773 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5774 value, 1);
5775 break;
5776
5777 case BFD_RELOC_24_PLT_PCREL:
5778 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5779 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5780 abort ();
5781
94f592af 5782 if (fixP->fx_done)
99a814a1
AM		 5783 {
5784 char *where;
5785 unsigned long insn;
5786
5787 /* Fetch the instruction, insert the fully resolved operand
5788 value, and stuff the instruction back again. */
94f592af 5789 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 5790 if (target_big_endian)
5791 insn = bfd_getb32 ((unsigned char *) where);
5792 else
5793 insn = bfd_getl32 ((unsigned char *) where);
5794 if ((value & 3) != 0)
94f592af 5795 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5796 _("must branch to an address a multiple of 4"));
5797 if ((offsetT) value < -0x40000000
5798 || (offsetT) value >= 0x40000000)
94f592af 5799 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5800 _("@local or @plt branch destination is too far away, %ld bytes"),
5801 (long) value);
5802 insn = insn | (value & 0x03fffffc);
5803 if (target_big_endian)
5804 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5805 else
5806 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5807 }
252b5132
RH		 5808 break;
5809
5810 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 5811 fixP->fx_done = 0;
5812 if (fixP->fx_addsy
5813 && !S_IS_DEFINED (fixP->fx_addsy)
5814 && !S_IS_WEAK (fixP->fx_addsy))
5815 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 5816 break;
5817
5818 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5819 fixP->fx_done = 0;
252b5132
RH		 5820 break;
5821
0baf16f2 5822#ifdef OBJ_ELF
0baf16f2
AM		 5823 /* Generated by reference to `sym@tocbase'. The sym is
5824 ignored by the linker. */
5825 case BFD_RELOC_PPC64_TOC:
94f592af 5826 fixP->fx_done = 0;
0baf16f2 5827 break;
0baf16f2 5828#endif
252b5132 5829 default:
bc805888 5830 fprintf (stderr,
94f592af 5831 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 5832 fflush (stderr);
252b5132
RH		 5833 abort ();
5834 }
5835 }
5836
5837#ifdef OBJ_ELF
94f592af 5838 fixP->fx_addnumber = value;
252b5132 5839#else
94f592af
NC		 5840 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
5841 fixP->fx_addnumber = 0;
252b5132
RH		 5842 else
5843 {
5844#ifdef TE_PE
94f592af 5845 fixP->fx_addnumber = 0;
252b5132
RH		 5846#else
5847 /* We want to use the offset within the data segment of the
5848 symbol, not the actual VMA of the symbol. */
94f592af
NC		 5849 fixP->fx_addnumber =
5850 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 5851#endif
5852 }
5853#endif
252b5132
RH		 5854}
5855
5856/* Generate a reloc for a fixup. */
5857
5858arelent *
5859tc_gen_reloc (seg, fixp)
92161534 5860 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5861 fixS *fixp;
5862{
5863 arelent *reloc;
5864
5865 reloc = (arelent *) xmalloc (sizeof (arelent));
5866
49309057
ILT		 5867 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
5868 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 5869 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
5870 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
5871 if (reloc->howto == (reloc_howto_type *) NULL)
5872 {
5873 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 5874 _("reloc %d not supported by object file format"),
5875 (int) fixp->fx_r_type);
252b5132
RH		 5876 return NULL;
5877 }
5878 reloc->addend = fixp->fx_addnumber;
5879
5880 return reloc;
5881}
GDB Binutils - Deliverables
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