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[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
0dc93057 3 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
c865e45b 111static void ppc_ref (int);
98027b10
AM		 112static void ppc_section (int);
113static void ppc_named_section (int);
114static void ppc_stabx (int);
115static void ppc_rename (int);
116static void ppc_toc (int);
117static void ppc_xcoff_cons (int);
118static void ppc_vbyte (int);
252b5132
RH		 119#endif
120
121#ifdef OBJ_ELF
98027b10
AM		 122static void ppc_elf_cons (int);
123static void ppc_elf_rdata (int);
124static void ppc_elf_lcomm (int);
252b5132
RH		 125#endif
126
127#ifdef TE_PE
98027b10
AM		 128static void ppc_previous (int);
129static void ppc_pdata (int);
130static void ppc_ydata (int);
131static void ppc_reldata (int);
132static void ppc_rdata (int);
133static void ppc_ualong (int);
134static void ppc_znop (int);
135static void ppc_pe_comm (int);
136static void ppc_pe_section (int);
137static void ppc_pe_function (int);
138static void ppc_pe_tocd (int);
252b5132
RH		 139#endif
140\f
141/* Generic assembler global variables which must be defined by all
142 targets. */
143
144#ifdef OBJ_ELF
145/* This string holds the chars that always start a comment. If the
146 pre-processor is disabled, these aren't very useful. The macro
147 tc_comment_chars points to this. We use this, rather than the
148 usual comment_chars, so that we can switch for Solaris conventions. */
149static const char ppc_solaris_comment_chars[] = "#!";
150static const char ppc_eabi_comment_chars[] = "#";
151
152#ifdef TARGET_SOLARIS_COMMENT
153const char *ppc_comment_chars = ppc_solaris_comment_chars;
154#else
155const char *ppc_comment_chars = ppc_eabi_comment_chars;
156#endif
157#else
158const char comment_chars[] = "#";
159#endif
160
161/* Characters which start a comment at the beginning of a line. */
162const char line_comment_chars[] = "#";
163
164/* Characters which may be used to separate multiple commands on a
165 single line. */
166const char line_separator_chars[] = ";";
167
168/* Characters which are used to indicate an exponent in a floating
169 point number. */
170const char EXP_CHARS[] = "eE";
171
172/* Characters which mean that a number is a floating point constant,
173 as in 0d1.0. */
174const char FLT_CHARS[] = "dD";
5ce8663f 175
5e02f92e 176/* Anything that can start an operand needs to be mentioned here,
ac805826 177 to stop the input scrubber eating whitespace. */
5e02f92e 178const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 179
180/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
181int ppc_cie_data_alignment;
783de163 182
cef4f754
AM		 183/* More than this number of nops in an alignment op gets a branch
184 instead. */
185unsigned long nop_limit = 4;
186
783de163
AM		 187/* The type of processor we are assembling for. This is one or more
188 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 189ppc_cpu_t ppc_cpu = 0;
01efc3af
AM		 190
191/* Flags set on encountering toc relocs. */
192enum {
193 has_large_toc_reloc = 1,
194 has_small_toc_reloc = 2
195} toc_reloc_types;
252b5132
RH		 196\f
197/* The target specific pseudo-ops which we support. */
198
199const pseudo_typeS md_pseudo_table[] =
200{
201 /* Pseudo-ops which must be overridden. */
202 { "byte", ppc_byte, 0 },
203
204#ifdef OBJ_XCOFF
205 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
206 legitimately belong in the obj-*.c file. However, XCOFF is based
207 on COFF, and is only implemented for the RS/6000. We just use
208 obj-coff.c, and add what we need here. */
209 { "comm", ppc_comm, 0 },
210 { "lcomm", ppc_comm, 1 },
211 { "bb", ppc_bb, 0 },
212 { "bc", ppc_bc, 0 },
213 { "bf", ppc_bf, 0 },
214 { "bi", ppc_biei, 0 },
215 { "bs", ppc_bs, 0 },
216 { "csect", ppc_csect, 0 },
217 { "data", ppc_section, 'd' },
218 { "eb", ppc_eb, 0 },
219 { "ec", ppc_ec, 0 },
220 { "ef", ppc_ef, 0 },
221 { "ei", ppc_biei, 1 },
222 { "es", ppc_es, 0 },
223 { "extern", ppc_extern, 0 },
224 { "function", ppc_function, 0 },
225 { "lglobl", ppc_lglobl, 0 },
c865e45b 226 { "ref", ppc_ref, 0 },
252b5132
RH		 227 { "rename", ppc_rename, 0 },
228 { "section", ppc_named_section, 0 },
229 { "stabx", ppc_stabx, 0 },
230 { "text", ppc_section, 't' },
231 { "toc", ppc_toc, 0 },
232 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 233 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 234 { "word", ppc_xcoff_cons, 1 },
235 { "short", ppc_xcoff_cons, 1 },
236 { "vbyte", ppc_vbyte, 0 },
237#endif
238
239#ifdef OBJ_ELF
0baf16f2
AM		 240 { "llong", ppc_elf_cons, 8 },
241 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 242 { "long", ppc_elf_cons, 4 },
243 { "word", ppc_elf_cons, 2 },
244 { "short", ppc_elf_cons, 2 },
245 { "rdata", ppc_elf_rdata, 0 },
246 { "rodata", ppc_elf_rdata, 0 },
247 { "lcomm", ppc_elf_lcomm, 0 },
248#endif
249
250#ifdef TE_PE
99a814a1 251 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 252 { "previous", ppc_previous, 0 },
253 { "pdata", ppc_pdata, 0 },
254 { "ydata", ppc_ydata, 0 },
255 { "reldata", ppc_reldata, 0 },
256 { "rdata", ppc_rdata, 0 },
257 { "ualong", ppc_ualong, 0 },
258 { "znop", ppc_znop, 0 },
259 { "comm", ppc_pe_comm, 0 },
260 { "lcomm", ppc_pe_comm, 1 },
261 { "section", ppc_pe_section, 0 },
262 { "function", ppc_pe_function,0 },
263 { "tocd", ppc_pe_tocd, 0 },
264#endif
265
0baf16f2 266#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 267 { "tc", ppc_tc, 0 },
0baf16f2
AM		 268 { "machine", ppc_machine, 0 },
269#endif
252b5132
RH		 270
271 { NULL, NULL, 0 }
272};
273
274\f
99a814a1
AM		 275/* Predefined register names if -mregnames (or default for Windows NT).
276 In general, there are lots of them, in an attempt to be compatible
277 with a number of other Windows NT assemblers. */
252b5132
RH		 278
279/* Structure to hold information about predefined registers. */
280struct pd_reg
281 {
282 char *name;
283 int value;
284 };
285
286/* List of registers that are pre-defined:
287
288 Each general register has predefined names of the form:
289 1. r<reg_num> which has the value <reg_num>.
290 2. r.<reg_num> which has the value <reg_num>.
291
252b5132
RH		 292 Each floating point register has predefined names of the form:
293 1. f<reg_num> which has the value <reg_num>.
294 2. f.<reg_num> which has the value <reg_num>.
295
7a899fff
C		 296 Each vector unit register has predefined names of the form:
297 1. v<reg_num> which has the value <reg_num>.
298 2. v.<reg_num> which has the value <reg_num>.
299
252b5132
RH		 300 Each condition register has predefined names of the form:
301 1. cr<reg_num> which has the value <reg_num>.
302 2. cr.<reg_num> which has the value <reg_num>.
303
304 There are individual registers as well:
305 sp or r.sp has the value 1
306 rtoc or r.toc has the value 2
307 fpscr has the value 0
308 xer has the value 1
309 lr has the value 8
310 ctr has the value 9
311 pmr has the value 0
312 dar has the value 19
313 dsisr has the value 18
314 dec has the value 22
315 sdr1 has the value 25
316 srr0 has the value 26
317 srr1 has the value 27
318
81d4177b 319 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 320
321static const struct pd_reg pre_defined_registers[] =
322{
323 { "cr.0", 0 }, /* Condition Registers */
324 { "cr.1", 1 },
325 { "cr.2", 2 },
326 { "cr.3", 3 },
327 { "cr.4", 4 },
328 { "cr.5", 5 },
329 { "cr.6", 6 },
330 { "cr.7", 7 },
331
332 { "cr0", 0 },
333 { "cr1", 1 },
334 { "cr2", 2 },
335 { "cr3", 3 },
336 { "cr4", 4 },
337 { "cr5", 5 },
338 { "cr6", 6 },
339 { "cr7", 7 },
340
341 { "ctr", 9 },
342
343 { "dar", 19 }, /* Data Access Register */
344 { "dec", 22 }, /* Decrementer */
345 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
346
347 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 348 { "f.1", 1 },
349 { "f.10", 10 },
350 { "f.11", 11 },
351 { "f.12", 12 },
352 { "f.13", 13 },
353 { "f.14", 14 },
354 { "f.15", 15 },
355 { "f.16", 16 },
356 { "f.17", 17 },
357 { "f.18", 18 },
358 { "f.19", 19 },
359 { "f.2", 2 },
360 { "f.20", 20 },
361 { "f.21", 21 },
362 { "f.22", 22 },
363 { "f.23", 23 },
364 { "f.24", 24 },
365 { "f.25", 25 },
366 { "f.26", 26 },
367 { "f.27", 27 },
368 { "f.28", 28 },
369 { "f.29", 29 },
370 { "f.3", 3 },
252b5132
RH		 371 { "f.30", 30 },
372 { "f.31", 31 },
066be9f7
PB		 373
374 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
375 { "f.33", 33 },
376 { "f.34", 34 },
377 { "f.35", 35 },
378 { "f.36", 36 },
379 { "f.37", 37 },
380 { "f.38", 38 },
381 { "f.39", 39 },
81d4177b 382 { "f.4", 4 },
066be9f7
PB		 383 { "f.40", 40 },
384 { "f.41", 41 },
385 { "f.42", 42 },
386 { "f.43", 43 },
387 { "f.44", 44 },
388 { "f.45", 45 },
389 { "f.46", 46 },
390 { "f.47", 47 },
391 { "f.48", 48 },
392 { "f.49", 49 },
81d4177b 393 { "f.5", 5 },
066be9f7
PB		 394 { "f.50", 50 },
395 { "f.51", 51 },
396 { "f.52", 52 },
397 { "f.53", 53 },
398 { "f.54", 54 },
399 { "f.55", 55 },
400 { "f.56", 56 },
401 { "f.57", 57 },
402 { "f.58", 58 },
403 { "f.59", 59 },
81d4177b 404 { "f.6", 6 },
066be9f7
PB		 405 { "f.60", 60 },
406 { "f.61", 61 },
407 { "f.62", 62 },
408 { "f.63", 63 },
81d4177b
KH		 409 { "f.7", 7 },
410 { "f.8", 8 },
411 { "f.9", 9 },
412
413 { "f0", 0 },
414 { "f1", 1 },
415 { "f10", 10 },
416 { "f11", 11 },
417 { "f12", 12 },
418 { "f13", 13 },
419 { "f14", 14 },
420 { "f15", 15 },
421 { "f16", 16 },
422 { "f17", 17 },
423 { "f18", 18 },
424 { "f19", 19 },
425 { "f2", 2 },
426 { "f20", 20 },
427 { "f21", 21 },
428 { "f22", 22 },
429 { "f23", 23 },
430 { "f24", 24 },
431 { "f25", 25 },
432 { "f26", 26 },
433 { "f27", 27 },
434 { "f28", 28 },
435 { "f29", 29 },
436 { "f3", 3 },
252b5132
RH		 437 { "f30", 30 },
438 { "f31", 31 },
066be9f7
PB		 439
440 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
441 { "f33", 33 },
442 { "f34", 34 },
443 { "f35", 35 },
444 { "f36", 36 },
445 { "f37", 37 },
446 { "f38", 38 },
447 { "f39", 39 },
81d4177b 448 { "f4", 4 },
066be9f7
PB		 449 { "f40", 40 },
450 { "f41", 41 },
451 { "f42", 42 },
452 { "f43", 43 },
453 { "f44", 44 },
454 { "f45", 45 },
455 { "f46", 46 },
456 { "f47", 47 },
457 { "f48", 48 },
458 { "f49", 49 },
81d4177b 459 { "f5", 5 },
066be9f7
PB		 460 { "f50", 50 },
461 { "f51", 51 },
462 { "f52", 52 },
463 { "f53", 53 },
464 { "f54", 54 },
465 { "f55", 55 },
466 { "f56", 56 },
467 { "f57", 57 },
468 { "f58", 58 },
469 { "f59", 59 },
81d4177b 470 { "f6", 6 },
066be9f7
PB		 471 { "f60", 60 },
472 { "f61", 61 },
473 { "f62", 62 },
474 { "f63", 63 },
81d4177b
KH		 475 { "f7", 7 },
476 { "f8", 8 },
477 { "f9", 9 },
252b5132
RH		 478
479 { "fpscr", 0 },
480
c3d65c1c
BE		 481 /* Quantization registers used with pair single instructions. */
482 { "gqr.0", 0 },
483 { "gqr.1", 1 },
484 { "gqr.2", 2 },
485 { "gqr.3", 3 },
486 { "gqr.4", 4 },
487 { "gqr.5", 5 },
488 { "gqr.6", 6 },
489 { "gqr.7", 7 },
490 { "gqr0", 0 },
491 { "gqr1", 1 },
492 { "gqr2", 2 },
493 { "gqr3", 3 },
494 { "gqr4", 4 },
495 { "gqr5", 5 },
496 { "gqr6", 6 },
497 { "gqr7", 7 },
498
252b5132
RH		 499 { "lr", 8 }, /* Link Register */
500
501 { "pmr", 0 },
502
503 { "r.0", 0 }, /* General Purpose Registers */
504 { "r.1", 1 },
505 { "r.10", 10 },
506 { "r.11", 11 },
507 { "r.12", 12 },
508 { "r.13", 13 },
509 { "r.14", 14 },
510 { "r.15", 15 },
511 { "r.16", 16 },
512 { "r.17", 17 },
513 { "r.18", 18 },
514 { "r.19", 19 },
515 { "r.2", 2 },
516 { "r.20", 20 },
517 { "r.21", 21 },
518 { "r.22", 22 },
519 { "r.23", 23 },
520 { "r.24", 24 },
521 { "r.25", 25 },
522 { "r.26", 26 },
523 { "r.27", 27 },
524 { "r.28", 28 },
525 { "r.29", 29 },
526 { "r.3", 3 },
527 { "r.30", 30 },
528 { "r.31", 31 },
529 { "r.4", 4 },
530 { "r.5", 5 },
531 { "r.6", 6 },
532 { "r.7", 7 },
533 { "r.8", 8 },
534 { "r.9", 9 },
535
536 { "r.sp", 1 }, /* Stack Pointer */
537
538 { "r.toc", 2 }, /* Pointer to the table of contents */
539
540 { "r0", 0 }, /* More general purpose registers */
541 { "r1", 1 },
542 { "r10", 10 },
543 { "r11", 11 },
544 { "r12", 12 },
545 { "r13", 13 },
546 { "r14", 14 },
547 { "r15", 15 },
548 { "r16", 16 },
549 { "r17", 17 },
550 { "r18", 18 },
551 { "r19", 19 },
552 { "r2", 2 },
553 { "r20", 20 },
554 { "r21", 21 },
555 { "r22", 22 },
556 { "r23", 23 },
557 { "r24", 24 },
558 { "r25", 25 },
559 { "r26", 26 },
560 { "r27", 27 },
561 { "r28", 28 },
562 { "r29", 29 },
563 { "r3", 3 },
564 { "r30", 30 },
565 { "r31", 31 },
566 { "r4", 4 },
567 { "r5", 5 },
568 { "r6", 6 },
569 { "r7", 7 },
570 { "r8", 8 },
571 { "r9", 9 },
572
573 { "rtoc", 2 }, /* Table of contents */
574
575 { "sdr1", 25 }, /* Storage Description Register 1 */
576
577 { "sp", 1 },
578
579 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
580 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 581
066be9f7 582 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 583 { "v.1", 1 },
584 { "v.10", 10 },
585 { "v.11", 11 },
586 { "v.12", 12 },
587 { "v.13", 13 },
588 { "v.14", 14 },
589 { "v.15", 15 },
590 { "v.16", 16 },
591 { "v.17", 17 },
592 { "v.18", 18 },
593 { "v.19", 19 },
594 { "v.2", 2 },
595 { "v.20", 20 },
596 { "v.21", 21 },
597 { "v.22", 22 },
598 { "v.23", 23 },
599 { "v.24", 24 },
600 { "v.25", 25 },
601 { "v.26", 26 },
602 { "v.27", 27 },
603 { "v.28", 28 },
604 { "v.29", 29 },
605 { "v.3", 3 },
7a899fff
C		 606 { "v.30", 30 },
607 { "v.31", 31 },
81d4177b
KH		 608 { "v.4", 4 },
609 { "v.5", 5 },
610 { "v.6", 6 },
611 { "v.7", 7 },
612 { "v.8", 8 },
613 { "v.9", 9 },
7a899fff
C		 614
615 { "v0", 0 },
81d4177b
KH		 616 { "v1", 1 },
617 { "v10", 10 },
618 { "v11", 11 },
619 { "v12", 12 },
620 { "v13", 13 },
621 { "v14", 14 },
622 { "v15", 15 },
623 { "v16", 16 },
624 { "v17", 17 },
625 { "v18", 18 },
626 { "v19", 19 },
627 { "v2", 2 },
628 { "v20", 20 },
629 { "v21", 21 },
630 { "v22", 22 },
631 { "v23", 23 },
632 { "v24", 24 },
633 { "v25", 25 },
634 { "v26", 26 },
635 { "v27", 27 },
636 { "v28", 28 },
637 { "v29", 29 },
638 { "v3", 3 },
7a899fff
C		 639 { "v30", 30 },
640 { "v31", 31 },
81d4177b
KH		 641 { "v4", 4 },
642 { "v5", 5 },
643 { "v6", 6 },
644 { "v7", 7 },
645 { "v8", 8 },
7a899fff 646 { "v9", 9 },
252b5132 647
066be9f7
PB		 648 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
649 { "vs.1", 1 },
650 { "vs.10", 10 },
651 { "vs.11", 11 },
652 { "vs.12", 12 },
653 { "vs.13", 13 },
654 { "vs.14", 14 },
655 { "vs.15", 15 },
656 { "vs.16", 16 },
657 { "vs.17", 17 },
658 { "vs.18", 18 },
659 { "vs.19", 19 },
660 { "vs.2", 2 },
661 { "vs.20", 20 },
662 { "vs.21", 21 },
663 { "vs.22", 22 },
664 { "vs.23", 23 },
665 { "vs.24", 24 },
666 { "vs.25", 25 },
667 { "vs.26", 26 },
668 { "vs.27", 27 },
669 { "vs.28", 28 },
670 { "vs.29", 29 },
671 { "vs.3", 3 },
672 { "vs.30", 30 },
673 { "vs.31", 31 },
674 { "vs.32", 32 },
675 { "vs.33", 33 },
676 { "vs.34", 34 },
677 { "vs.35", 35 },
678 { "vs.36", 36 },
679 { "vs.37", 37 },
680 { "vs.38", 38 },
681 { "vs.39", 39 },
682 { "vs.4", 4 },
683 { "vs.40", 40 },
684 { "vs.41", 41 },
685 { "vs.42", 42 },
686 { "vs.43", 43 },
687 { "vs.44", 44 },
688 { "vs.45", 45 },
689 { "vs.46", 46 },
690 { "vs.47", 47 },
691 { "vs.48", 48 },
692 { "vs.49", 49 },
693 { "vs.5", 5 },
694 { "vs.50", 50 },
695 { "vs.51", 51 },
696 { "vs.52", 52 },
697 { "vs.53", 53 },
698 { "vs.54", 54 },
699 { "vs.55", 55 },
700 { "vs.56", 56 },
701 { "vs.57", 57 },
702 { "vs.58", 58 },
703 { "vs.59", 59 },
704 { "vs.6", 6 },
705 { "vs.60", 60 },
706 { "vs.61", 61 },
707 { "vs.62", 62 },
708 { "vs.63", 63 },
709 { "vs.7", 7 },
710 { "vs.8", 8 },
711 { "vs.9", 9 },
712
713 { "vs0", 0 },
714 { "vs1", 1 },
715 { "vs10", 10 },
716 { "vs11", 11 },
717 { "vs12", 12 },
718 { "vs13", 13 },
719 { "vs14", 14 },
720 { "vs15", 15 },
721 { "vs16", 16 },
722 { "vs17", 17 },
723 { "vs18", 18 },
724 { "vs19", 19 },
725 { "vs2", 2 },
726 { "vs20", 20 },
727 { "vs21", 21 },
728 { "vs22", 22 },
729 { "vs23", 23 },
730 { "vs24", 24 },
731 { "vs25", 25 },
732 { "vs26", 26 },
733 { "vs27", 27 },
734 { "vs28", 28 },
735 { "vs29", 29 },
736 { "vs3", 3 },
737 { "vs30", 30 },
738 { "vs31", 31 },
739 { "vs32", 32 },
740 { "vs33", 33 },
741 { "vs34", 34 },
742 { "vs35", 35 },
743 { "vs36", 36 },
744 { "vs37", 37 },
745 { "vs38", 38 },
746 { "vs39", 39 },
747 { "vs4", 4 },
748 { "vs40", 40 },
749 { "vs41", 41 },
750 { "vs42", 42 },
751 { "vs43", 43 },
752 { "vs44", 44 },
753 { "vs45", 45 },
754 { "vs46", 46 },
755 { "vs47", 47 },
756 { "vs48", 48 },
757 { "vs49", 49 },
758 { "vs5", 5 },
759 { "vs50", 50 },
760 { "vs51", 51 },
761 { "vs52", 52 },
762 { "vs53", 53 },
763 { "vs54", 54 },
764 { "vs55", 55 },
765 { "vs56", 56 },
766 { "vs57", 57 },
767 { "vs58", 58 },
768 { "vs59", 59 },
769 { "vs6", 6 },
770 { "vs60", 60 },
771 { "vs61", 61 },
772 { "vs62", 62 },
773 { "vs63", 63 },
774 { "vs7", 7 },
775 { "vs8", 8 },
776 { "vs9", 9 },
777
252b5132
RH		 778 { "xer", 1 },
779
780};
781
bc805888 782#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 783
784/* Given NAME, find the register number associated with that name, return
785 the integer value associated with the given name or -1 on failure. */
786
252b5132 787static int
98027b10 788reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 789{
790 int middle, low, high;
791 int cmp;
792
793 low = 0;
794 high = regcount - 1;
795
796 do
797 {
798 middle = (low + high) / 2;
799 cmp = strcasecmp (name, regs[middle].name);
800 if (cmp < 0)
801 high = middle - 1;
802 else if (cmp > 0)
803 low = middle + 1;
804 else
805 return regs[middle].value;
806 }
807 while (low <= high);
808
809 return -1;
810}
811
812/*
99a814a1 813 * Summary of register_name.
252b5132
RH		 814 *
815 * in: Input_line_pointer points to 1st char of operand.
816 *
817 * out: A expressionS.
818 * The operand may have been a register: in this case, X_op == O_register,
819 * X_add_number is set to the register number, and truth is returned.
820 * Input_line_pointer->(next non-blank) char after operand, or is in its
821 * original state.
822 */
823
b34976b6 824static bfd_boolean
98027b10 825register_name (expressionS *expressionP)
252b5132
RH		 826{
827 int reg_number;
828 char *name;
829 char *start;
830 char c;
831
99a814a1 832 /* Find the spelling of the operand. */
252b5132 833 start = name = input_line_pointer;
3882b010 834 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 835 name = ++input_line_pointer;
836
3882b010 837 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 838 return FALSE;
252b5132
RH		 839
840 c = get_symbol_end ();
841 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
842
468cced8
AM		 843 /* Put back the delimiting char. */
844 *input_line_pointer = c;
845
99a814a1 846 /* Look to see if it's in the register table. */
81d4177b 847 if (reg_number >= 0)
252b5132
RH		 848 {
849 expressionP->X_op = O_register;
850 expressionP->X_add_number = reg_number;
81d4177b 851
99a814a1 852 /* Make the rest nice. */
252b5132
RH		 853 expressionP->X_add_symbol = NULL;
854 expressionP->X_op_symbol = NULL;
b34976b6 855 return TRUE;
252b5132 856 }
468cced8
AM		 857
858 /* Reset the line as if we had not done anything. */
859 input_line_pointer = start;
b34976b6 860 return FALSE;
252b5132
RH		 861}
862\f
863/* This function is called for each symbol seen in an expression. It
864 handles the special parsing which PowerPC assemblers are supposed
865 to use for condition codes. */
866
867/* Whether to do the special parsing. */
b34976b6 868static bfd_boolean cr_operand;
252b5132
RH		 869
870/* Names to recognize in a condition code. This table is sorted. */
871static const struct pd_reg cr_names[] =
872{
873 { "cr0", 0 },
874 { "cr1", 1 },
875 { "cr2", 2 },
876 { "cr3", 3 },
877 { "cr4", 4 },
878 { "cr5", 5 },
879 { "cr6", 6 },
880 { "cr7", 7 },
881 { "eq", 2 },
882 { "gt", 1 },
883 { "lt", 0 },
884 { "so", 3 },
885 { "un", 3 }
886};
887
888/* Parsing function. This returns non-zero if it recognized an
889 expression. */
890
891int
91d6fa6a 892ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 893{
894 int val;
895
896 if (! cr_operand)
897 return 0;
898
13abbae3
AM		 899 if (*name == '%')
900 ++name;
252b5132
RH		 901 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
902 name);
903 if (val < 0)
904 return 0;
905
91d6fa6a
NC		 906 exp->X_op = O_constant;
907 exp->X_add_number = val;
252b5132
RH		 908
909 return 1;
910}
911\f
912/* Local variables. */
913
2b3c4602
AM		 914/* Whether to target xcoff64/elf64. */
915static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 916
252b5132
RH		 917/* Opcode hash table. */
918static struct hash_control *ppc_hash;
919
920/* Macro hash table. */
921static struct hash_control *ppc_macro_hash;
922
923#ifdef OBJ_ELF
99a814a1 924/* What type of shared library support to use. */
5d6f4f16 925static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 926
99a814a1 927/* Flags to set in the elf header. */
252b5132
RH		 928static flagword ppc_flags = 0;
929
930/* Whether this is Solaris or not. */
931#ifdef TARGET_SOLARIS_COMMENT
b34976b6 932#define SOLARIS_P TRUE
252b5132 933#else
b34976b6 934#define SOLARIS_P FALSE
252b5132
RH		 935#endif
936
b34976b6 937static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 938#endif
939
940#ifdef OBJ_XCOFF
941
942/* The RS/6000 assembler uses the .csect pseudo-op to generate code
943 using a bunch of different sections. These assembler sections,
944 however, are all encompassed within the .text or .data sections of
945 the final output file. We handle this by using different
946 subsegments within these main segments. */
947
948/* Next subsegment to allocate within the .text segment. */
949static subsegT ppc_text_subsegment = 2;
950
951/* Linked list of csects in the text section. */
952static symbolS *ppc_text_csects;
953
954/* Next subsegment to allocate within the .data segment. */
955static subsegT ppc_data_subsegment = 2;
956
957/* Linked list of csects in the data section. */
958static symbolS *ppc_data_csects;
959
960/* The current csect. */
961static symbolS *ppc_current_csect;
962
963/* The RS/6000 assembler uses a TOC which holds addresses of functions
964 and variables. Symbols are put in the TOC with the .tc pseudo-op.
965 A special relocation is used when accessing TOC entries. We handle
966 the TOC as a subsegment within the .data segment. We set it up if
967 we see a .toc pseudo-op, and save the csect symbol here. */
968static symbolS *ppc_toc_csect;
969
970/* The first frag in the TOC subsegment. */
971static fragS *ppc_toc_frag;
972
973/* The first frag in the first subsegment after the TOC in the .data
974 segment. NULL if there are no subsegments after the TOC. */
975static fragS *ppc_after_toc_frag;
976
977/* The current static block. */
978static symbolS *ppc_current_block;
979
980/* The COFF debugging section; set by md_begin. This is not the
981 .debug section, but is instead the secret BFD section which will
982 cause BFD to set the section number of a symbol to N_DEBUG. */
983static asection *ppc_coff_debug_section;
984
985#endif /* OBJ_XCOFF */
986
987#ifdef TE_PE
988
989/* Various sections that we need for PE coff support. */
990static segT ydata_section;
991static segT pdata_section;
992static segT reldata_section;
993static segT rdata_section;
994static segT tocdata_section;
995
81d4177b 996/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 997static segT ppc_previous_section;
998static segT ppc_current_section;
999
1000#endif /* TE_PE */
1001
1002#ifdef OBJ_ELF
1003symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1004#define PPC_APUINFO_ISEL 0x40
1005#define PPC_APUINFO_PMR 0x41
1006#define PPC_APUINFO_RFMCI 0x42
1007#define PPC_APUINFO_CACHELCK 0x43
1008#define PPC_APUINFO_SPE 0x100
1009#define PPC_APUINFO_EFS 0x101
1010#define PPC_APUINFO_BRLOCK 0x102
1011
b34976b6
AM		 1012/*
1013 * We keep a list of APUinfo
6a0c61b7
EZ		 1014 */
1015unsigned long *ppc_apuinfo_list;
1016unsigned int ppc_apuinfo_num;
1017unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1018#endif /* OBJ_ELF */
1019\f
1020#ifdef OBJ_ELF
15c1449b 1021const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1022#else
15c1449b 1023const char *const md_shortopts = "um:";
252b5132 1024#endif
cef4f754 1025#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1026const struct option md_longopts[] = {
cef4f754 1027 {"nops", required_argument, NULL, OPTION_NOPS},
252b5132
RH		 1028 {NULL, no_argument, NULL, 0}
1029};
15c1449b 1030const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1031
1032int
98027b10 1033md_parse_option (int c, char *arg)
252b5132 1034{
69fe9ce5
AM		 1035 ppc_cpu_t new_cpu;
1036
252b5132
RH		 1037 switch (c)
1038 {
1039 case 'u':
1040 /* -u means that any undefined symbols should be treated as
1041 external, which is the default for gas anyhow. */
1042 break;
1043
1044#ifdef OBJ_ELF
1045 case 'l':
1046 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1047 sake, recognize -be also. */
252b5132
RH		 1048 if (strcmp (arg, "e") == 0)
1049 {
1050 target_big_endian = 0;
1051 set_target_endian = 1;
1052 }
1053 else
1054 return 0;
1055
1056 break;
1057
1058 case 'b':
1059 if (strcmp (arg, "e") == 0)
1060 {
1061 target_big_endian = 1;
1062 set_target_endian = 1;
1063 }
1064 else
1065 return 0;
1066
1067 break;
1068
1069 case 'K':
99a814a1 1070 /* Recognize -K PIC. */
252b5132
RH		 1071 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1072 {
1073 shlib = SHLIB_PIC;
1074 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1075 }
1076 else
1077 return 0;
1078
1079 break;
1080#endif
1081
7f6d05e8
CP		 1082 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1083 case 'a':
1084 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1085 {
1086#ifdef BFD64
1087 ppc_obj64 = 1;
1088#else
1089 as_fatal (_("%s unsupported"), "-a64");
1090#endif
1091 }
7f6d05e8 1092 else if (strcmp (arg, "32") == 0)
2b3c4602 1093 ppc_obj64 = 0;
7f6d05e8
CP		 1094 else
1095 return 0;
1096 break;
81d4177b 1097
252b5132 1098 case 'm':
69fe9ce5
AM		 1099 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1100 ppc_cpu = new_cpu;
252b5132
RH		 1101
1102 else if (strcmp (arg, "regnames") == 0)
b34976b6 1103 reg_names_p = TRUE;
252b5132
RH		 1104
1105 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1106 reg_names_p = FALSE;
252b5132
RH		 1107
1108#ifdef OBJ_ELF
99a814a1
AM		 1109 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1110 that require relocation. */
252b5132
RH		 1111 else if (strcmp (arg, "relocatable") == 0)
1112 {
5d6f4f16 1113 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1114 ppc_flags |= EF_PPC_RELOCATABLE;
1115 }
1116
1117 else if (strcmp (arg, "relocatable-lib") == 0)
1118 {
5d6f4f16 1119 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1120 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1121 }
1122
99a814a1 1123 /* -memb, set embedded bit. */
252b5132
RH		 1124 else if (strcmp (arg, "emb") == 0)
1125 ppc_flags |= EF_PPC_EMB;
1126
99a814a1
AM		 1127 /* -mlittle/-mbig set the endianess. */
1128 else if (strcmp (arg, "little") == 0
1129 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1130 {
1131 target_big_endian = 0;
1132 set_target_endian = 1;
1133 }
1134
1135 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1136 {
1137 target_big_endian = 1;
1138 set_target_endian = 1;
1139 }
1140
1141 else if (strcmp (arg, "solaris") == 0)
1142 {
b34976b6 1143 msolaris = TRUE;
252b5132
RH		 1144 ppc_comment_chars = ppc_solaris_comment_chars;
1145 }
1146
1147 else if (strcmp (arg, "no-solaris") == 0)
1148 {
b34976b6 1149 msolaris = FALSE;
252b5132
RH		 1150 ppc_comment_chars = ppc_eabi_comment_chars;
1151 }
1152#endif
1153 else
1154 {
1155 as_bad (_("invalid switch -m%s"), arg);
1156 return 0;
1157 }
1158 break;
1159
1160#ifdef OBJ_ELF
1161 /* -V: SVR4 argument to print version ID. */
1162 case 'V':
1163 print_version_id ();
1164 break;
1165
1166 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1167 should be emitted or not. FIXME: Not implemented. */
1168 case 'Q':
1169 break;
1170
1171 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1172 rather than .stabs.excl, which is ignored by the linker.
1173 FIXME: Not implemented. */
1174 case 's':
1175 if (arg)
1176 return 0;
1177
1178 break;
1179#endif
1180
cef4f754
AM		 1181 case OPTION_NOPS:
1182 {
1183 char *end;
1184 nop_limit = strtoul (optarg, &end, 0);
1185 if (*end)
1186 as_bad (_("--nops needs a numeric argument"));
1187 }
1188 break;
1189
252b5132
RH		 1190 default:
1191 return 0;
1192 }
1193
1194 return 1;
1195}
1196
1197void
98027b10 1198md_show_usage (FILE *stream)
252b5132 1199{
bc805888 1200 fprintf (stream, _("\
252b5132 1201PowerPC options:\n\
ce3d2015
AM		 1202-a32 generate ELF32/XCOFF32\n\
1203-a64 generate ELF64/XCOFF64\n\
1204-u ignored\n\
1205-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1206-mpwr generate code for POWER (RIOS1)\n\
1207-m601 generate code for PowerPC 601\n\
418c1742 1208-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1209 generate code for PowerPC 603/604\n\
1210-m403 generate code for PowerPC 403\n\
1211-m405 generate code for PowerPC 405\n\
1212-m440 generate code for PowerPC 440\n\
1213-m464 generate code for PowerPC 464\n\
1214-m476 generate code for PowerPC 476\n\
f5c120c5 1215-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1216 generate code for PowerPC 7400/7410/7450/7455\n\
1217-m750cl generate code for PowerPC 750cl\n"));
df12615d 1218 fprintf (stream, _("\
ce3d2015
AM		 1219-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1220-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1221-mbooke generate code for 32-bit PowerPC BookE\n\
1222-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1223-mpower4, -mpwr4 generate code for Power4 architecture\n\
1224-mpower5, -mpwr5, -mpwr5x\n\
1225 generate code for Power5 architecture\n\
1226-mpower6, -mpwr6 generate code for Power6 architecture\n\
1227-mpower7, -mpwr7 generate code for Power7 architecture\n\
ce3d2015
AM		 1228-mcell generate code for Cell Broadband Engine architecture\n\
1229-mcom generate code Power/PowerPC common instructions\n\
1230-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1231 fprintf (stream, _("\
ce3d2015
AM		 1232-maltivec generate code for AltiVec\n\
1233-mvsx generate code for Vector-Scalar (VSX) instructions\n\
1234-me300 generate code for PowerPC e300 family\n\
1235-me500, -me500x2 generate code for Motorola e500 core complex\n\
1236-me500mc, generate code for Freescale e500mc core complex\n\
1237-me500mc64, generate code for Freescale e500mc64 core complex\n\
1238-mspe generate code for Motorola SPE instructions\n\
1239-mtitan generate code for AppliedMicro Titan core complex\n\
1240-mregnames Allow symbolic names for registers\n\
1241-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1242#ifdef OBJ_ELF
bc805888 1243 fprintf (stream, _("\
ce3d2015
AM		 1244-mrelocatable support for GCC's -mrelocatble option\n\
1245-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1246-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1247-mlittle, -mlittle-endian, -le\n\
ce3d2015 1248 generate code for a little endian machine\n\
b8b738ac 1249-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1250 generate code for a big endian machine\n\
1251-msolaris generate code for Solaris\n\
1252-mno-solaris do not generate code for Solaris\n\
b8b738ac 1253-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1254-V print assembler version number\n\
1255-Qy, -Qn ignored\n"));
252b5132 1256#endif
cef4f754
AM		 1257 fprintf (stream, _("\
1258-nops=count when aligning, more than COUNT nops uses a branch\n"));
252b5132
RH		 1259}
1260\f
1261/* Set ppc_cpu if it is not already set. */
1262
1263static void
98027b10 1264ppc_set_cpu (void)
252b5132
RH		 1265{
1266 const char *default_os = TARGET_OS;
1267 const char *default_cpu = TARGET_CPU;
1268
7102e95e 1269 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1270 {
2a98c3a6 1271 if (ppc_obj64)
bdc70b4a 1272 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1273 else if (strncmp (default_os, "aix", 3) == 0
1274 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1275 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1276 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1277 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1278 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1279 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1280 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1281 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1282 else
99a814a1
AM		 1283 as_fatal (_("Unknown default cpu = %s, os = %s"),
1284 default_cpu, default_os);
252b5132
RH		 1285 }
1286}
1287
9232bbb0
AM		 1288/* Figure out the BFD architecture to use. This function and ppc_mach
1289 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1290
1291enum bfd_architecture
98027b10 1292ppc_arch (void)
252b5132
RH		 1293{
1294 const char *default_cpu = TARGET_CPU;
1295 ppc_set_cpu ();
1296
1297 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1298 return bfd_arch_powerpc;
1299 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1300 return bfd_arch_rs6000;
1301 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1302 {
1303 if (strcmp (default_cpu, "rs6000") == 0)
1304 return bfd_arch_rs6000;
0baf16f2 1305 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1306 return bfd_arch_powerpc;
1307 }
1308
1309 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1310 return bfd_arch_unknown;
1311}
1312
7f6d05e8 1313unsigned long
98027b10 1314ppc_mach (void)
7f6d05e8 1315{
2a98c3a6
AM		 1316 if (ppc_obj64)
1317 return bfd_mach_ppc64;
1318 else if (ppc_arch () == bfd_arch_rs6000)
1319 return bfd_mach_rs6k;
ce3d2015
AM		 1320 else if (ppc_cpu & PPC_OPCODE_TITAN)
1321 return bfd_mach_ppc_titan;
2a98c3a6
AM		 1322 else
1323 return bfd_mach_ppc;
7f6d05e8
CP		 1324}
1325
81d4177b 1326extern char*
98027b10 1327ppc_target_format (void)
7f6d05e8
CP		 1328{
1329#ifdef OBJ_COFF
1330#ifdef TE_PE
99a814a1 1331 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1332#elif TE_POWERMAC
0baf16f2 1333 return "xcoff-powermac";
7f6d05e8 1334#else
eb1e0e80 1335# ifdef TE_AIX5
2b3c4602 1336 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1337# else
2b3c4602 1338 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1339# endif
7f6d05e8 1340#endif
7f6d05e8
CP		 1341#endif
1342#ifdef OBJ_ELF
9d8504b1
PB		 1343# ifdef TE_VXWORKS
1344 return "elf32-powerpc-vxworks";
1345# else
0baf16f2 1346 return (target_big_endian
2b3c4602
AM		 1347 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1348 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1349# endif
7f6d05e8
CP		 1350#endif
1351}
1352
69c040df
AM		 1353/* Insert opcodes and macros into hash tables. Called at startup and
1354 for .cpu pseudo. */
252b5132 1355
69c040df
AM		 1356static void
1357ppc_setup_opcodes (void)
252b5132 1358{
98027b10 1359 const struct powerpc_opcode *op;
252b5132
RH		 1360 const struct powerpc_opcode *op_end;
1361 const struct powerpc_macro *macro;
1362 const struct powerpc_macro *macro_end;
b84bf58a 1363 bfd_boolean bad_insn = FALSE;
252b5132 1364
69c040df
AM		 1365 if (ppc_hash != NULL)
1366 hash_die (ppc_hash);
1367 if (ppc_macro_hash != NULL)
1368 hash_die (ppc_macro_hash);
252b5132
RH		 1369
1370 /* Insert the opcodes into a hash table. */
1371 ppc_hash = hash_new ();
1372
c43a438d 1373 if (ENABLE_CHECKING)
b84bf58a 1374 {
c43a438d 1375 unsigned int i;
b84bf58a 1376
c43a438d
AM		 1377 /* Check operand masks. Code here and in the disassembler assumes
1378 all the 1's in the mask are contiguous. */
1379 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1380 {
c43a438d
AM		 1381 unsigned long mask = powerpc_operands[i].bitm;
1382 unsigned long right_bit;
1383 unsigned int j;
1384
1385 right_bit = mask & -mask;
1386 mask += right_bit;
1387 right_bit = mask & -mask;
1388 if (mask != right_bit)
1389 {
1390 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1391 bad_insn = TRUE;
1392 }
1393 for (j = i + 1; j < num_powerpc_operands; ++j)
1394 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1395 sizeof (powerpc_operands[0])) == 0)
1396 {
1397 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1398 j, i);
1399 bad_insn = TRUE;
1400 }
b84bf58a
AM		 1401 }
1402 }
1403
252b5132
RH		 1404 op_end = powerpc_opcodes + powerpc_num_opcodes;
1405 for (op = powerpc_opcodes; op < op_end; op++)
1406 {
c43a438d 1407 if (ENABLE_CHECKING)
b84bf58a 1408 {
c43a438d
AM		 1409 const unsigned char *o;
1410 unsigned long omask = op->mask;
8dbcd839 1411
d815f1a9 1412 if (op != powerpc_opcodes)
8dbcd839 1413 {
d815f1a9
AM		 1414 /* The major opcodes had better be sorted. Code in the
1415 disassembler assumes the insns are sorted according to
1416 major opcode. */
1417 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1418 {
1419 as_bad (_("major opcode is not sorted for %s"),
1420 op->name);
1421 bad_insn = TRUE;
1422 }
1423
1424 /* Warn if the table isn't more strictly ordered.
1425 Unfortunately it doesn't seem possible to order the
1426 table on much more than the major opcode, which makes
1427 it difficult to implement a binary search in the
1428 disassembler. The problem is that we have multiple
1429 ways to disassemble instructions, and we usually want
1430 to choose a more specific form (with more bits set in
1431 the opcode) than a more general form. eg. all of the
1432 following are equivalent:
1433 bne label # opcode = 0x40820000, mask = 0xff830003
1434 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1435 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1436
1437 There are also cases where the table needs to be out
1438 of order to disassemble the correct instruction for
2f3bb96a 1439 processor variants. */
d815f1a9
AM		 1440 else if (0)
1441 {
1442 unsigned long t1 = op[0].opcode;
1443 unsigned long t2 = op[-1].opcode;
1444
1445 if (((t1 ^ t2) & 0xfc0007ff) == 0
1446 && (t1 & 0xfc0006df) == 0x7c000286)
1447 {
1448 /* spr field is split. */
1449 t1 = ((t1 & ~0x1ff800)
1450 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1451 t2 = ((t2 & ~0x1ff800)
1452 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1453 }
1454 if (t1 < t2)
1455 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1456 op[0].name, op[0].opcode, op[0].mask,
1457 op[-1].name, op[-1].opcode, op[-1].mask);
1458 }
8dbcd839 1459 }
c43a438d
AM		 1460
1461 /* The mask had better not trim off opcode bits. */
1462 if ((op->opcode & omask) != op->opcode)
1463 {
1464 as_bad (_("mask trims opcode bits for %s"),
1465 op->name);
1466 bad_insn = TRUE;
1467 }
1468
1469 /* The operands must not overlap the opcode or each other. */
1470 for (o = op->operands; *o; ++o)
1471 if (*o >= num_powerpc_operands)
1472 {
1473 as_bad (_("operand index error for %s"),
1474 op->name);
1475 bad_insn = TRUE;
1476 }
1477 else
b84bf58a 1478 {
c43a438d
AM		 1479 const struct powerpc_operand *operand = &powerpc_operands[*o];
1480 if (operand->shift >= 0)
b84bf58a 1481 {
c43a438d
AM		 1482 unsigned long mask = operand->bitm << operand->shift;
1483 if (omask & mask)
1484 {
1485 as_bad (_("operand %d overlap in %s"),
1486 (int) (o - op->operands), op->name);
1487 bad_insn = TRUE;
1488 }
1489 omask |= mask;
b84bf58a 1490 }
b84bf58a 1491 }
c43a438d 1492 }
252b5132 1493
bdc70b4a 1494 if ((ppc_cpu & op->flags) != 0
1cb0a767 1495 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1496 {
1497 const char *retval;
1498
98027b10 1499 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1500 if (retval != NULL)
252b5132 1501 {
b84bf58a 1502 as_bad (_("duplicate instruction %s"),
99a814a1 1503 op->name);
b84bf58a 1504 bad_insn = TRUE;
252b5132
RH		 1505 }
1506 }
1507 }
1508
3c9030c1
AM		 1509 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1510 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1511 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1512
252b5132
RH		 1513 /* Insert the macros into a hash table. */
1514 ppc_macro_hash = hash_new ();
1515
1516 macro_end = powerpc_macros + powerpc_num_macros;
1517 for (macro = powerpc_macros; macro < macro_end; macro++)
1518 {
33740db9 1519 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1520 {
1521 const char *retval;
1522
98027b10 1523 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1524 if (retval != (const char *) NULL)
1525 {
b84bf58a
AM		 1526 as_bad (_("duplicate macro %s"), macro->name);
1527 bad_insn = TRUE;
252b5132
RH		 1528 }
1529 }
1530 }
1531
b84bf58a 1532 if (bad_insn)
252b5132 1533 abort ();
69c040df
AM		 1534}
1535
1536/* This function is called when the assembler starts up. It is called
1537 after the options have been parsed and the output file has been
1538 opened. */
1539
1540void
98027b10 1541md_begin (void)
69c040df
AM		 1542{
1543 ppc_set_cpu ();
1544
1545 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1546
1547#ifdef OBJ_ELF
1548 /* Set the ELF flags if desired. */
1549 if (ppc_flags && !msolaris)
1550 bfd_set_private_flags (stdoutput, ppc_flags);
1551#endif
1552
1553 ppc_setup_opcodes ();
252b5132 1554
67c1ffbe 1555 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1556 by the user. */
252b5132
RH		 1557 if (!set_target_endian)
1558 {
1559 set_target_endian = 1;
1560 target_big_endian = PPC_BIG_ENDIAN;
1561 }
1562
1563#ifdef OBJ_XCOFF
1564 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1565
1566 /* Create dummy symbols to serve as initial csects. This forces the
1567 text csects to precede the data csects. These symbols will not
1568 be output. */
1569 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1570 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1571 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1572 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1573#endif
1574
1575#ifdef TE_PE
1576
1577 ppc_current_section = text_section;
81d4177b 1578 ppc_previous_section = 0;
252b5132
RH		 1579
1580#endif
1581}
1582
6a0c61b7 1583void
98027b10 1584ppc_cleanup (void)
6a0c61b7 1585{
dc1d03fc 1586#ifdef OBJ_ELF
6a0c61b7
EZ		 1587 if (ppc_apuinfo_list == NULL)
1588 return;
1589
1590 /* Ok, so write the section info out. We have this layout:
1591
1592 byte data what
1593 ---- ---- ----
1594 0 8 length of "APUinfo\0"
1595 4 (n*4) number of APU's (4 bytes each)
1596 8 2 note type 2
1597 12 "APUinfo\0" name
1598 20 APU#1 first APU's info
1599 24 APU#2 second APU's info
1600 ... ...
1601 */
1602 {
1603 char *p;
1604 asection *seg = now_seg;
1605 subsegT subseg = now_subseg;
1606 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1607 unsigned int i;
6a0c61b7
EZ		 1608
1609 /* Create the .PPC.EMB.apuinfo section. */
1610 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1611 bfd_set_section_flags (stdoutput,
1612 apuinfo_secp,
e1a9cb8e 1613 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1614
1615 p = frag_more (4);
1616 md_number_to_chars (p, (valueT) 8, 4);
1617
1618 p = frag_more (4);
e98d298c 1619 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1620
1621 p = frag_more (4);
1622 md_number_to_chars (p, (valueT) 2, 4);
1623
1624 p = frag_more (8);
1625 strcpy (p, "APUinfo");
1626
1627 for (i = 0; i < ppc_apuinfo_num; i++)
1628 {
b34976b6
AM		 1629 p = frag_more (4);
1630 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1631 }
1632
1633 frag_align (2, 0, 0);
1634
1635 /* We probably can't restore the current segment, for there likely
1636 isn't one yet... */
1637 if (seg && subseg)
1638 subseg_set (seg, subseg);
1639 }
dc1d03fc 1640#endif
6a0c61b7
EZ		 1641}
1642
252b5132
RH		 1643/* Insert an operand value into an instruction. */
1644
1645static unsigned long
a1867a27
AM		 1646ppc_insert_operand (unsigned long insn,
1647 const struct powerpc_operand *operand,
1648 offsetT val,
91d6fa6a 1649 ppc_cpu_t cpu,
a1867a27
AM		 1650 char *file,
1651 unsigned int line)
252b5132 1652{
b84bf58a 1653 long min, max, right;
eb42fac1 1654
b84bf58a
AM		 1655 max = operand->bitm;
1656 right = max & -max;
1657 min = 0;
1658
1659 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1660 {
b84bf58a 1661 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1662 max = (max >> 1) & -right;
1663 min = ~max & -right;
b84bf58a 1664 }
252b5132 1665
b84bf58a 1666 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1667 max++;
252b5132 1668
b84bf58a 1669 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1670 {
1671 long tmp = min;
1672 min = -max;
1673 max = -tmp;
1674 }
b84bf58a 1675
a1867a27
AM		 1676 if (min <= max)
1677 {
1678 /* Some people write constants with the sign extension done by
1679 hand but only up to 32 bits. This shouldn't really be valid,
1680 but, to permit this code to assemble on a 64-bit host, we
1681 sign extend the 32-bit value to 64 bits if so doing makes the
1682 value valid. */
1683 if (val > max
1684 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1685 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1686 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1687 val = val - 0x80000000 - 0x80000000;
1688
1689 /* Similarly, people write expressions like ~(1<<15), and expect
1690 this to be OK for a 32-bit unsigned value. */
1691 else if (val < min
1692 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1693 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1694 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1695 val = val + 0x80000000 + 0x80000000;
1696
1697 else if (val < min
1698 || val > max
1699 || (val & (right - 1)) != 0)
1700 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1701 }
b84bf58a 1702
252b5132
RH		 1703 if (operand->insert)
1704 {
1705 const char *errmsg;
1706
1707 errmsg = NULL;
91d6fa6a 1708 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1709 if (errmsg != (const char *) NULL)
ee2c9aa9 1710 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1711 }
1712 else
b84bf58a 1713 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1714
1715 return insn;
1716}
1717
1718\f
1719#ifdef OBJ_ELF
1720/* Parse @got, etc. and return the desired relocation. */
1721static bfd_reloc_code_real_type
98027b10 1722ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1723{
1724 struct map_bfd {
1725 char *string;
b7d7dc63
AM		 1726 unsigned int length : 8;
1727 unsigned int valid32 : 1;
1728 unsigned int valid64 : 1;
1729 unsigned int reloc;
252b5132
RH		 1730 };
1731
1732 char ident[20];
1733 char *str = *str_p;
1734 char *str2;
1735 int ch;
1736 int len;
15c1449b 1737 const struct map_bfd *ptr;
252b5132 1738
b7d7dc63
AM		 1739#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1740#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1741#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1742
15c1449b 1743 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1744 MAP ("l", BFD_RELOC_LO16),
1745 MAP ("h", BFD_RELOC_HI16),
1746 MAP ("ha", BFD_RELOC_HI16_S),
1747 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1748 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1749 MAP ("got", BFD_RELOC_16_GOTOFF),
1750 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1751 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1752 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1753 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1754 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1755 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1756 MAP ("copy", BFD_RELOC_PPC_COPY),
1757 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1758 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1759 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1760 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1761 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1762 MAP ("tls", BFD_RELOC_PPC_TLS),
1763 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1764 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1765 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1766 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1767 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1768 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1769 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1770 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1771 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1772 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1773 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1774 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1775 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1776 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1777 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1778 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1779 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1780 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1781 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1782 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1783 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1784 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1785 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1786 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1787 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1788 MAP32 ("fixup", BFD_RELOC_CTOR),
1789 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1790 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1791 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1792 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1793 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1794 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1795 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1796 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1797 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1798 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1799 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1800 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1801 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1802 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1803 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1804 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1805 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1806 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1807 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1808 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1809 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1810 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1811 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1812 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1813 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1814 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1815 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1816 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1817 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1818 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1819 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1820 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1821 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1822 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1823 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1824 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1825 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1826 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1827 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1828 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1829 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1830 };
1831
1832 if (*str++ != '@')
1833 return BFD_RELOC_UNUSED;
1834
1835 for (ch = *str, str2 = ident;
1836 (str2 < ident + sizeof (ident) - 1
3882b010 1837 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1838 ch = *++str)
1839 {
3882b010 1840 *str2++ = TOLOWER (ch);
252b5132
RH		 1841 }
1842
1843 *str2 = '\0';
1844 len = str2 - ident;
1845
1846 ch = ident[0];
1847 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1848 if (ch == ptr->string[0]
1849 && len == ptr->length
b7d7dc63
AM		 1850 && memcmp (ident, ptr->string, ptr->length) == 0
1851 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1852 {
15c1449b
AM		 1853 int reloc = ptr->reloc;
1854
727fc41e
AM		 1855 if (!ppc_obj64 && exp_p->X_add_number != 0)
1856 {
1857 switch (reloc)
1858 {
1859 case BFD_RELOC_16_GOTOFF:
1860 case BFD_RELOC_LO16_GOTOFF:
1861 case BFD_RELOC_HI16_GOTOFF:
1862 case BFD_RELOC_HI16_S_GOTOFF:
1863 as_warn (_("identifier+constant@got means "
1864 "identifier@got+constant"));
1865 break;
1866
1867 case BFD_RELOC_PPC_GOT_TLSGD16:
1868 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1869 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1870 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1871 case BFD_RELOC_PPC_GOT_TLSLD16:
1872 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1873 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1874 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1875 case BFD_RELOC_PPC_GOT_DTPREL16:
1876 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1877 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1878 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1879 case BFD_RELOC_PPC_GOT_TPREL16:
1880 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1881 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1882 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1883 as_bad (_("symbol+offset not supported for got tls"));
1884 break;
1885 }
1886 }
5f6db75a
AM		 1887
1888 /* Now check for identifier@suffix+constant. */
1889 if (*str == '-' || *str == '+')
252b5132 1890 {
5f6db75a
AM		 1891 char *orig_line = input_line_pointer;
1892 expressionS new_exp;
1893
1894 input_line_pointer = str;
1895 expression (&new_exp);
1896 if (new_exp.X_op == O_constant)
252b5132 1897 {
5f6db75a
AM		 1898 exp_p->X_add_number += new_exp.X_add_number;
1899 str = input_line_pointer;
252b5132 1900 }
5f6db75a
AM		 1901
1902 if (&input_line_pointer != str_p)
1903 input_line_pointer = orig_line;
252b5132 1904 }
252b5132 1905 *str_p = str;
0baf16f2 1906
2b3c4602 1907 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1908 && exp_p->X_op == O_symbol
1909 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1910 {
9f2b53d7
AM		 1911 /* Change the symbol so that the dummy .TOC. symbol can be
1912 omitted from the object file. */
0baf16f2
AM		 1913 exp_p->X_add_symbol = &abs_symbol;
1914 }
1915
15c1449b 1916 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1917 }
1918
1919 return BFD_RELOC_UNUSED;
1920}
1921
99a814a1
AM		 1922/* Like normal .long/.short/.word, except support @got, etc.
1923 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1924static void
98027b10 1925ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1926{
1927 expressionS exp;
1928 bfd_reloc_code_real_type reloc;
1929
1930 if (is_it_end_of_statement ())
1931 {
1932 demand_empty_rest_of_line ();
1933 return;
1934 }
1935
1936 do
1937 {
1938 expression (&exp);
1939 if (exp.X_op == O_symbol
1940 && *input_line_pointer == '@'
99a814a1
AM		 1941 && (reloc = ppc_elf_suffix (&input_line_pointer,
1942 &exp)) != BFD_RELOC_UNUSED)
252b5132 1943 {
99a814a1
AM		 1944 reloc_howto_type *reloc_howto;
1945 int size;
1946
1947 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1948 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1949
1950 if (size > nbytes)
0baf16f2
AM		 1951 {
1952 as_bad (_("%s relocations do not fit in %d bytes\n"),
1953 reloc_howto->name, nbytes);
1954 }
252b5132
RH		 1955 else
1956 {
0baf16f2
AM		 1957 char *p;
1958 int offset;
252b5132 1959
0baf16f2 1960 p = frag_more (nbytes);
aa0c8c1a 1961 memset (p, 0, nbytes);
0baf16f2
AM		 1962 offset = 0;
1963 if (target_big_endian)
1964 offset = nbytes - size;
99a814a1
AM		 1965 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1966 &exp, 0, reloc);
252b5132
RH		 1967 }
1968 }
1969 else
1970 emit_expr (&exp, (unsigned int) nbytes);
1971 }
1972 while (*input_line_pointer++ == ',');
1973
99a814a1
AM		 1974 /* Put terminator back into stream. */
1975 input_line_pointer--;
252b5132
RH		 1976 demand_empty_rest_of_line ();
1977}
1978
1979/* Solaris pseduo op to change to the .rodata section. */
1980static void
98027b10 1981ppc_elf_rdata (int xxx)
252b5132
RH		 1982{
1983 char *save_line = input_line_pointer;
1984 static char section[] = ".rodata\n";
1985
99a814a1 1986 /* Just pretend this is .section .rodata */
252b5132
RH		 1987 input_line_pointer = section;
1988 obj_elf_section (xxx);
1989
1990 input_line_pointer = save_line;
1991}
1992
99a814a1 1993/* Pseudo op to make file scope bss items. */
252b5132 1994static void
98027b10 1995ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1996{
98027b10
AM		 1997 char *name;
1998 char c;
1999 char *p;
252b5132 2000 offsetT size;
98027b10 2001 symbolS *symbolP;
252b5132
RH		 2002 offsetT align;
2003 segT old_sec;
2004 int old_subsec;
2005 char *pfrag;
2006 int align2;
2007
2008 name = input_line_pointer;
2009 c = get_symbol_end ();
2010
99a814a1 2011 /* just after name is now '\0'. */
252b5132
RH		 2012 p = input_line_pointer;
2013 *p = c;
2014 SKIP_WHITESPACE ();
2015 if (*input_line_pointer != ',')
2016 {
2017 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
2018 ignore_rest_of_line ();
2019 return;
2020 }
2021
2022 input_line_pointer++; /* skip ',' */
2023 if ((size = get_absolute_expression ()) < 0)
2024 {
2025 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2026 ignore_rest_of_line ();
2027 return;
2028 }
2029
2030 /* The third argument to .lcomm is the alignment. */
2031 if (*input_line_pointer != ',')
2032 align = 8;
2033 else
2034 {
2035 ++input_line_pointer;
2036 align = get_absolute_expression ();
2037 if (align <= 0)
2038 {
2039 as_warn (_("ignoring bad alignment"));
2040 align = 8;
2041 }
2042 }
2043
2044 *p = 0;
2045 symbolP = symbol_find_or_make (name);
2046 *p = c;
2047
2048 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2049 {
2050 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2051 S_GET_NAME (symbolP));
2052 ignore_rest_of_line ();
2053 return;
2054 }
2055
2056 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2057 {
2058 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2059 S_GET_NAME (symbolP),
2060 (long) S_GET_VALUE (symbolP),
2061 (long) size);
2062
2063 ignore_rest_of_line ();
2064 return;
2065 }
2066
99a814a1 2067 /* Allocate_bss. */
252b5132
RH		 2068 old_sec = now_seg;
2069 old_subsec = now_subseg;
2070 if (align)
2071 {
99a814a1 2072 /* Convert to a power of 2 alignment. */
252b5132
RH		 2073 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2074 if (align != 1)
2075 {
2076 as_bad (_("Common alignment not a power of 2"));
2077 ignore_rest_of_line ();
2078 return;
2079 }
2080 }
2081 else
2082 align2 = 0;
2083
2084 record_alignment (bss_section, align2);
2085 subseg_set (bss_section, 0);
2086 if (align2)
2087 frag_align (align2, 0, 0);
2088 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2089 symbol_get_frag (symbolP)->fr_symbol = 0;
2090 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2091 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2092 (char *) 0);
2093 *pfrag = 0;
2094 S_SET_SIZE (symbolP, size);
2095 S_SET_SEGMENT (symbolP, bss_section);
2096 subseg_set (old_sec, old_subsec);
2097 demand_empty_rest_of_line ();
2098}
2099
2100/* Validate any relocations emitted for -mrelocatable, possibly adding
2101 fixups for word relocations in writable segments, so we can adjust
2102 them at runtime. */
2103static void
98027b10 2104ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2105{
2106 if (fixp->fx_done || fixp->fx_pcrel)
2107 return;
2108
2109 switch (shlib)
2110 {
2111 case SHLIB_NONE:
2112 case SHLIB_PIC:
2113 return;
2114
5d6f4f16 2115 case SHLIB_MRELOCATABLE:
252b5132
RH		 2116 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2117 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2118 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2119 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2120 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2121 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2122 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2123 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2124 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2125 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2126 && strcmp (segment_name (seg), ".got2") != 0
2127 && strcmp (segment_name (seg), ".dtors") != 0
2128 && strcmp (segment_name (seg), ".ctors") != 0
2129 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2130 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2131 && strcmp (segment_name (seg), ".eh_frame") != 0
2132 && strcmp (segment_name (seg), ".ex_shared") != 0)
2133 {
2134 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2135 || fixp->fx_r_type != BFD_RELOC_CTOR)
2136 {
2137 as_bad_where (fixp->fx_file, fixp->fx_line,
2138 _("Relocation cannot be done when using -mrelocatable"));
2139 }
2140 }
2141 return;
2142 }
2143}
0baf16f2 2144
7e8d4ab4
AM		 2145/* Prevent elf_frob_file_before_adjust removing a weak undefined
2146 function descriptor sym if the corresponding code sym is used. */
2147
2148void
98027b10 2149ppc_frob_file_before_adjust (void)
0baf16f2 2150{
7e8d4ab4 2151 symbolS *symp;
9232bbb0 2152 asection *toc;
0baf16f2 2153
7e8d4ab4
AM		 2154 if (!ppc_obj64)
2155 return;
2156
2157 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2158 {
7e8d4ab4
AM		 2159 const char *name;
2160 char *dotname;
2161 symbolS *dotsym;
2162 size_t len;
2163
2164 name = S_GET_NAME (symp);
2165 if (name[0] == '.')
2166 continue;
2167
2168 if (! S_IS_WEAK (symp)
2169 || S_IS_DEFINED (symp))
2170 continue;
2171
2172 len = strlen (name) + 1;
2173 dotname = xmalloc (len + 1);
2174 dotname[0] = '.';
2175 memcpy (dotname + 1, name, len);
461b725f 2176 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2177 free (dotname);
2178 if (dotsym != NULL && (symbol_used_p (dotsym)
2179 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2180 symbol_mark_used (symp);
2181
0baf16f2
AM		 2182 }
2183
9232bbb0
AM		 2184 toc = bfd_get_section_by_name (stdoutput, ".toc");
2185 if (toc != NULL
01efc3af 2186 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2187 && bfd_section_size (stdoutput, toc) > 0x10000)
2188 as_warn (_("TOC section size exceeds 64k"));
2189
7e8d4ab4
AM		 2190 /* Don't emit .TOC. symbol. */
2191 symp = symbol_find (".TOC.");
2192 if (symp != NULL)
2193 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2194}
252b5132
RH		 2195#endif /* OBJ_ELF */
2196\f
2197#ifdef TE_PE
2198
2199/*
99a814a1 2200 * Summary of parse_toc_entry.
252b5132
RH		 2201 *
2202 * in: Input_line_pointer points to the '[' in one of:
2203 *
2204 * [toc] [tocv] [toc32] [toc64]
2205 *
2206 * Anything else is an error of one kind or another.
2207 *
81d4177b 2208 * out:
252b5132
RH		 2209 * return value: success or failure
2210 * toc_kind: kind of toc reference
2211 * input_line_pointer:
2212 * success: first char after the ']'
2213 * failure: unchanged
2214 *
2215 * settings:
2216 *
2217 * [toc] - rv == success, toc_kind = default_toc
2218 * [tocv] - rv == success, toc_kind = data_in_toc
2219 * [toc32] - rv == success, toc_kind = must_be_32
2220 * [toc64] - rv == success, toc_kind = must_be_64
2221 *
2222 */
2223
81d4177b
KH		 2224enum toc_size_qualifier
2225{
252b5132
RH		 2226 default_toc, /* The toc cell constructed should be the system default size */
2227 data_in_toc, /* This is a direct reference to a toc cell */
2228 must_be_32, /* The toc cell constructed must be 32 bits wide */
2229 must_be_64 /* The toc cell constructed must be 64 bits wide */
2230};
2231
2232static int
98027b10 2233parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2234{
2235 char *start;
2236 char *toc_spec;
2237 char c;
2238 enum toc_size_qualifier t;
2239
99a814a1 2240 /* Save the input_line_pointer. */
252b5132
RH		 2241 start = input_line_pointer;
2242
99a814a1 2243 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2244 ++input_line_pointer;
2245 SKIP_WHITESPACE ();
81d4177b 2246
99a814a1 2247 /* Find the spelling of the operand. */
252b5132
RH		 2248 toc_spec = input_line_pointer;
2249 c = get_symbol_end ();
2250
99a814a1 2251 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2252 {
2253 t = default_toc;
2254 }
99a814a1 2255 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2256 {
2257 t = data_in_toc;
2258 }
99a814a1 2259 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2260 {
2261 t = must_be_32;
2262 }
99a814a1 2263 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2264 {
2265 t = must_be_64;
2266 }
2267 else
2268 {
2269 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2270 *input_line_pointer = c;
2271 input_line_pointer = start;
252b5132
RH		 2272 return 0;
2273 }
2274
99a814a1
AM		 2275 /* Now find the ']'. */
2276 *input_line_pointer = c;
252b5132 2277
81d4177b
KH		 2278 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2279 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2280
2281 if (c != ']')
2282 {
2283 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2284 input_line_pointer = start;
252b5132
RH		 2285 return 0;
2286 }
2287
99a814a1 2288 *toc_kind = t;
252b5132
RH		 2289 return 1;
2290}
2291#endif
2292\f
2293
dc1d03fc 2294#ifdef OBJ_ELF
6a0c61b7
EZ		 2295#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2296static void
98027b10 2297ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2298{
2299 unsigned int i;
2300
2301 /* Check we don't already exist. */
2302 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2303 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2304 return;
b34976b6 2305
6a0c61b7
EZ		 2306 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2307 {
2308 if (ppc_apuinfo_num_alloc == 0)
2309 {
2310 ppc_apuinfo_num_alloc = 4;
2311 ppc_apuinfo_list = (unsigned long *)
2312 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2313 }
2314 else
2315 {
2316 ppc_apuinfo_num_alloc += 4;
2317 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2318 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2319 }
2320 }
dc1d03fc 2321 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2322}
2323#undef APUID
dc1d03fc 2324#endif
6a0c61b7
EZ		 2325\f
2326
252b5132
RH		 2327/* We need to keep a list of fixups. We can't simply generate them as
2328 we go, because that would require us to first create the frag, and
2329 that would screw up references to ``.''. */
2330
2331struct ppc_fixup
2332{
2333 expressionS exp;
2334 int opindex;
2335 bfd_reloc_code_real_type reloc;
2336};
2337
2338#define MAX_INSN_FIXUPS (5)
2339
2340/* This routine is called for each instruction to be assembled. */
2341
2342void
98027b10 2343md_assemble (char *str)
252b5132
RH		 2344{
2345 char *s;
2346 const struct powerpc_opcode *opcode;
2347 unsigned long insn;
2348 const unsigned char *opindex_ptr;
2349 int skip_optional;
2350 int need_paren;
2351 int next_opindex;
2352 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2353 int fc;
2354 char *f;
09b935ac 2355 int addr_mod;
252b5132
RH		 2356 int i;
2357#ifdef OBJ_ELF
2358 bfd_reloc_code_real_type reloc;
2359#endif
2360
2361 /* Get the opcode. */
3882b010 2362 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2363 ;
2364 if (*s != '\0')
2365 *s++ = '\0';
2366
2367 /* Look up the opcode in the hash table. */
2368 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2369 if (opcode == (const struct powerpc_opcode *) NULL)
2370 {
2371 const struct powerpc_macro *macro;
2372
2373 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2374 if (macro == (const struct powerpc_macro *) NULL)
2375 as_bad (_("Unrecognized opcode: `%s'"), str);
2376 else
2377 ppc_macro (s, macro);
2378
2379 return;
2380 }
2381
2382 insn = opcode->opcode;
2383
2384 str = s;
3882b010 2385 while (ISSPACE (*str))
252b5132
RH		 2386 ++str;
2387
2388 /* PowerPC operands are just expressions. The only real issue is
2389 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2390 an optional operand separate the operands only with commas (in some
2391 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2392 have optional operands). Most instructions with optional operands
2393 have only one. Those that have more than one optional operand can
2394 take either all their operands or none. So, before we start seriously
2395 parsing the operands, we check to see if we have optional operands,
2396 and if we do, we count the number of commas to see which operands
2397 have been omitted. */
252b5132
RH		 2398 skip_optional = 0;
2399 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2400 {
2401 const struct powerpc_operand *operand;
2402
2403 operand = &powerpc_operands[*opindex_ptr];
2404 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2405 {
2406 unsigned int opcount;
7fe9cf6b 2407 unsigned int num_operands_expected;
252b5132
RH		 2408
2409 /* There is an optional operand. Count the number of
2410 commas in the input line. */
2411 if (*str == '\0')
2412 opcount = 0;
2413 else
2414 {
2415 opcount = 1;
2416 s = str;
2417 while ((s = strchr (s, ',')) != (char *) NULL)
2418 {
2419 ++opcount;
2420 ++s;
2421 }
2422 }
2423
7fe9cf6b
NC		 2424 /* Compute the number of expected operands.
2425 Do not count fake operands. */
2426 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2427 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2428 ++ num_operands_expected;
2429
252b5132
RH		 2430 /* If there are fewer operands in the line then are called
2431 for by the instruction, we want to skip the optional
1f6c9eb0 2432 operands. */
7fe9cf6b 2433 if (opcount < num_operands_expected)
252b5132
RH		 2434 skip_optional = 1;
2435
2436 break;
2437 }
2438 }
2439
2440 /* Gather the operands. */
2441 need_paren = 0;
2442 next_opindex = 0;
2443 fc = 0;
2444 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2445 {
2446 const struct powerpc_operand *operand;
2447 const char *errmsg;
2448 char *hold;
2449 expressionS ex;
2450 char endc;
2451
2452 if (next_opindex == 0)
2453 operand = &powerpc_operands[*opindex_ptr];
2454 else
2455 {
2456 operand = &powerpc_operands[next_opindex];
2457 next_opindex = 0;
2458 }
252b5132
RH		 2459 errmsg = NULL;
2460
2461 /* If this is a fake operand, then we do not expect anything
2462 from the input. */
2463 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2464 {
2b3c4602 2465 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2466 if (errmsg != (const char *) NULL)
ee2c9aa9 2467 as_bad ("%s", errmsg);
252b5132
RH		 2468 continue;
2469 }
2470
2471 /* If this is an optional operand, and we are skipping it, just
2472 insert a zero. */
2473 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2474 && skip_optional)
2475 {
2476 if (operand->insert)
2477 {
2b3c4602 2478 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2479 if (errmsg != (const char *) NULL)
ee2c9aa9 2480 as_bad ("%s", errmsg);
252b5132
RH		 2481 }
2482 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2483 next_opindex = *opindex_ptr + 1;
2484 continue;
2485 }
2486
2487 /* Gather the operand. */
2488 hold = input_line_pointer;
2489 input_line_pointer = str;
2490
2491#ifdef TE_PE
81d4177b 2492 if (*input_line_pointer == '[')
252b5132
RH		 2493 {
2494 /* We are expecting something like the second argument here:
99a814a1
AM		 2495 *
2496 * lwz r4,[toc].GS.0.static_int(rtoc)
2497 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2498 * The argument following the `]' must be a symbol name, and the
2499 * register must be the toc register: 'rtoc' or '2'
2500 *
2501 * The effect is to 0 as the displacement field
2502 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2503 * the appropriate variation) reloc against it based on the symbol.
2504 * The linker will build the toc, and insert the resolved toc offset.
2505 *
2506 * Note:
2507 * o The size of the toc entry is currently assumed to be
2508 * 32 bits. This should not be assumed to be a hard coded
2509 * number.
2510 * o In an effort to cope with a change from 32 to 64 bits,
2511 * there are also toc entries that are specified to be
2512 * either 32 or 64 bits:
2513 * lwz r4,[toc32].GS.0.static_int(rtoc)
2514 * lwz r4,[toc64].GS.0.static_int(rtoc)
2515 * These demand toc entries of the specified size, and the
2516 * instruction probably requires it.
2517 */
252b5132
RH		 2518
2519 int valid_toc;
2520 enum toc_size_qualifier toc_kind;
2521 bfd_reloc_code_real_type toc_reloc;
2522
99a814a1
AM		 2523 /* Go parse off the [tocXX] part. */
2524 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2525
81d4177b 2526 if (!valid_toc)
252b5132 2527 {
99a814a1
AM		 2528 /* Note: message has already been issued.
2529 FIXME: what sort of recovery should we do?
2530 demand_rest_of_line (); return; ? */
252b5132
RH		 2531 }
2532
99a814a1
AM		 2533 /* Now get the symbol following the ']'. */
2534 expression (&ex);
252b5132
RH		 2535
2536 switch (toc_kind)
2537 {
2538 case default_toc:
99a814a1
AM		 2539 /* In this case, we may not have seen the symbol yet,
2540 since it is allowed to appear on a .extern or .globl
2541 or just be a label in the .data section. */
252b5132
RH		 2542 toc_reloc = BFD_RELOC_PPC_TOC16;
2543 break;
2544 case data_in_toc:
99a814a1
AM		 2545 /* 1. The symbol must be defined and either in the toc
2546 section, or a global.
2547 2. The reloc generated must have the TOCDEFN flag set
2548 in upper bit mess of the reloc type.
2549 FIXME: It's a little confusing what the tocv
2550 qualifier can be used for. At the very least, I've
2551 seen three uses, only one of which I'm sure I can
2552 explain. */
81d4177b
KH		 2553 if (ex.X_op == O_symbol)
2554 {
9c2799c2 2555 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2556 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2557 != tocdata_section)
252b5132 2558 {
99a814a1 2559 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2560 }
2561 }
2562
2563 toc_reloc = BFD_RELOC_PPC_TOC16;
2564 break;
2565 case must_be_32:
99a814a1
AM		 2566 /* FIXME: these next two specifically specify 32/64 bit
2567 toc entries. We don't support them today. Is this
2568 the right way to say that? */
252b5132
RH		 2569 toc_reloc = BFD_RELOC_UNUSED;
2570 as_bad (_("Unimplemented toc32 expression modifier"));
2571 break;
2572 case must_be_64:
99a814a1 2573 /* FIXME: see above. */
252b5132
RH		 2574 toc_reloc = BFD_RELOC_UNUSED;
2575 as_bad (_("Unimplemented toc64 expression modifier"));
2576 break;
2577 default:
bc805888 2578 fprintf (stderr,
99a814a1
AM		 2579 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2580 toc_kind);
bc805888 2581 abort ();
252b5132
RH		 2582 break;
2583 }
2584
2585 /* We need to generate a fixup for this expression. */
2586 if (fc >= MAX_INSN_FIXUPS)
2587 as_fatal (_("too many fixups"));
2588
2589 fixups[fc].reloc = toc_reloc;
2590 fixups[fc].exp = ex;
2591 fixups[fc].opindex = *opindex_ptr;
2592 ++fc;
2593
99a814a1
AM		 2594 /* Ok. We've set up the fixup for the instruction. Now make it
2595 look like the constant 0 was found here. */
252b5132
RH		 2596 ex.X_unsigned = 1;
2597 ex.X_op = O_constant;
2598 ex.X_add_number = 0;
2599 ex.X_add_symbol = NULL;
2600 ex.X_op_symbol = NULL;
2601 }
2602
2603 else
2604#endif /* TE_PE */
2605 {
2ad068be
AM		 2606 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2607 || !register_name (&ex))
252b5132 2608 {
13abbae3
AM		 2609 char save_lex = lex_type['%'];
2610
252b5132 2611 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2612 {
2613 cr_operand = TRUE;
2614 lex_type['%'] |= LEX_BEGIN_NAME;
2615 }
252b5132 2616 expression (&ex);
b34976b6 2617 cr_operand = FALSE;
13abbae3 2618 lex_type['%'] = save_lex;
252b5132
RH		 2619 }
2620 }
2621
2622 str = input_line_pointer;
2623 input_line_pointer = hold;
2624
2625 if (ex.X_op == O_illegal)
2626 as_bad (_("illegal operand"));
2627 else if (ex.X_op == O_absent)
2628 as_bad (_("missing operand"));
2629 else if (ex.X_op == O_register)
2630 {
2631 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2632 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2633 }
2634 else if (ex.X_op == O_constant)
2635 {
2636#ifdef OBJ_ELF
81d4177b 2637 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2638 char *orig_str = str;
2639
2640 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2641 switch (reloc)
2642 {
2643 default:
2644 str = orig_str;
2645 break;
2646
2647 case BFD_RELOC_LO16:
2648 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2649 something which cleared it, we always produce a
2650 signed value. */
2651 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2652 ex.X_add_number &= 0xffff;
2653 else
0baf16f2 2654 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2655 break;
2656
2657 case BFD_RELOC_HI16:
0baf16f2
AM		 2658 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2659 ex.X_add_number = PPC_HI (ex.X_add_number);
2660 else
2661 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2662 break;
2663
2664 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2665 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2666 ex.X_add_number = PPC_HA (ex.X_add_number);
2667 else
2668 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2669 break;
2670
0baf16f2
AM		 2671 case BFD_RELOC_PPC64_HIGHER:
2672 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2673 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2674 else
2675 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2676 break;
2677
2678 case BFD_RELOC_PPC64_HIGHER_S:
2679 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2680 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2681 else
2682 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2683 break;
0baf16f2
AM		 2684
2685 case BFD_RELOC_PPC64_HIGHEST:
2686 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2687 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2688 else
2689 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2690 break;
2691
2692 case BFD_RELOC_PPC64_HIGHEST_S:
2693 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2694 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2695 else
2696 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2697 break;
252b5132 2698 }
0baf16f2 2699#endif /* OBJ_ELF */
252b5132 2700 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2701 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2702 }
2703#ifdef OBJ_ELF
727fc41e 2704 else
252b5132 2705 {
727fc41e 2706 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2707 {
727fc41e
AM		 2708 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2709 if (sym_name[0] == '.')
2710 ++sym_name;
cdba85ec 2711
727fc41e 2712 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2713 {
727fc41e
AM		 2714 expressionS tls_exp;
2715
2716 hold = input_line_pointer;
2717 input_line_pointer = str + 1;
2718 expression (&tls_exp);
2719 if (tls_exp.X_op == O_symbol)
2720 {
2721 reloc = BFD_RELOC_UNUSED;
2722 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2723 {
2724 reloc = BFD_RELOC_PPC_TLSGD;
2725 input_line_pointer += 7;
2726 }
2727 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2728 {
2729 reloc = BFD_RELOC_PPC_TLSLD;
2730 input_line_pointer += 7;
2731 }
2732 if (reloc != BFD_RELOC_UNUSED)
2733 {
2734 SKIP_WHITESPACE ();
2735 str = input_line_pointer;
2736
2737 if (fc >= MAX_INSN_FIXUPS)
2738 as_fatal (_("too many fixups"));
2739 fixups[fc].exp = tls_exp;
2740 fixups[fc].opindex = *opindex_ptr;
2741 fixups[fc].reloc = reloc;
2742 ++fc;
2743 }
2744 }
2745 input_line_pointer = hold;
252b5132
RH		 2746 }
2747 }
2748
727fc41e 2749 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2750 {
727fc41e 2751 /* Some TLS tweaks. */
0baf16f2
AM		 2752 switch (reloc)
2753 {
727fc41e 2754 default:
cdba85ec 2755 break;
727fc41e
AM		 2756
2757 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2758 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2759 as_bad (_("@tls may not be used with \"%s\" operands"),
2760 opcode->name);
2761 else if (operand->shift != 11)
2762 as_bad (_("@tls may only be used in last operand"));
2763 else
2764 insn = ppc_insert_operand (insn, operand,
2765 ppc_obj64 ? 13 : 2,
2766 ppc_cpu, (char *) NULL, 0);
cdba85ec 2767 break;
727fc41e
AM		 2768
2769 /* We'll only use the 32 (or 64) bit form of these relocations
2770 in constants. Instructions get the 16 bit form. */
2771 case BFD_RELOC_PPC_DTPREL:
2772 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2773 break;
727fc41e
AM		 2774 case BFD_RELOC_PPC_TPREL:
2775 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2776 break;
2777 }
727fc41e
AM		 2778
2779 /* For the absolute forms of branches, convert the PC
2780 relative form back into the absolute. */
2781 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2782 {
2783 switch (reloc)
2784 {
2785 case BFD_RELOC_PPC_B26:
2786 reloc = BFD_RELOC_PPC_BA26;
2787 break;
2788 case BFD_RELOC_PPC_B16:
2789 reloc = BFD_RELOC_PPC_BA16;
2790 break;
2791 case BFD_RELOC_PPC_B16_BRTAKEN:
2792 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2793 break;
2794 case BFD_RELOC_PPC_B16_BRNTAKEN:
2795 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2796 break;
2797 default:
2798 break;
2799 }
2800 }
2801
01efc3af
AM		 2802 switch (reloc)
2803 {
2804 case BFD_RELOC_PPC_TOC16:
2805 toc_reloc_types |= has_small_toc_reloc;
2806 break;
2807 case BFD_RELOC_PPC64_TOC16_LO:
2808 case BFD_RELOC_PPC64_TOC16_HI:
2809 case BFD_RELOC_PPC64_TOC16_HA:
2810 toc_reloc_types |= has_large_toc_reloc;
2811 break;
2812 default:
2813 break;
2814 }
2815
727fc41e
AM		 2816 if (ppc_obj64
2817 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2818 {
2819 switch (reloc)
2820 {
2821 case BFD_RELOC_16:
2822 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2823 break;
2824 case BFD_RELOC_LO16:
2825 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2826 break;
2827 case BFD_RELOC_16_GOTOFF:
2828 reloc = BFD_RELOC_PPC64_GOT16_DS;
2829 break;
2830 case BFD_RELOC_LO16_GOTOFF:
2831 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2832 break;
2833 case BFD_RELOC_LO16_PLTOFF:
2834 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2835 break;
2836 case BFD_RELOC_16_BASEREL:
2837 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2838 break;
2839 case BFD_RELOC_LO16_BASEREL:
2840 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2841 break;
2842 case BFD_RELOC_PPC_TOC16:
2843 reloc = BFD_RELOC_PPC64_TOC16_DS;
2844 break;
2845 case BFD_RELOC_PPC64_TOC16_LO:
2846 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2847 break;
2848 case BFD_RELOC_PPC64_PLTGOT16:
2849 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2850 break;
2851 case BFD_RELOC_PPC64_PLTGOT16_LO:
2852 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2853 break;
2854 case BFD_RELOC_PPC_DTPREL16:
2855 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2856 break;
2857 case BFD_RELOC_PPC_DTPREL16_LO:
2858 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2859 break;
2860 case BFD_RELOC_PPC_TPREL16:
2861 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2862 break;
2863 case BFD_RELOC_PPC_TPREL16_LO:
2864 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2865 break;
2866 case BFD_RELOC_PPC_GOT_DTPREL16:
2867 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2868 case BFD_RELOC_PPC_GOT_TPREL16:
2869 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2870 break;
2871 default:
2872 as_bad (_("unsupported relocation for DS offset field"));
2873 break;
2874 }
2875 }
0baf16f2
AM		 2876 }
2877
252b5132
RH		 2878 /* We need to generate a fixup for this expression. */
2879 if (fc >= MAX_INSN_FIXUPS)
2880 as_fatal (_("too many fixups"));
2881 fixups[fc].exp = ex;
727fc41e 2882 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2883 fixups[fc].reloc = reloc;
2884 ++fc;
2885 }
727fc41e 2886#else /* OBJ_ELF */
252b5132
RH		 2887 else
2888 {
2889 /* We need to generate a fixup for this expression. */
2890 if (fc >= MAX_INSN_FIXUPS)
2891 as_fatal (_("too many fixups"));
2892 fixups[fc].exp = ex;
2893 fixups[fc].opindex = *opindex_ptr;
2894 fixups[fc].reloc = BFD_RELOC_UNUSED;
2895 ++fc;
2896 }
727fc41e 2897#endif /* OBJ_ELF */
252b5132
RH		 2898
2899 if (need_paren)
2900 {
2901 endc = ')';
2902 need_paren = 0;
c3d65c1c
BE		 2903 /* If expecting more operands, then we want to see "),". */
2904 if (*str == endc && opindex_ptr[1] != 0)
2905 {
2906 do
2907 ++str;
2908 while (ISSPACE (*str));
2909 endc = ',';
2910 }
252b5132
RH		 2911 }
2912 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2913 {
2914 endc = '(';
2915 need_paren = 1;
2916 }
2917 else
2918 endc = ',';
2919
2920 /* The call to expression should have advanced str past any
2921 whitespace. */
2922 if (*str != endc
2923 && (endc != ',' || *str != '\0'))
2924 {
5a938047
AM		 2925 if (*str == '\0')
2926 as_bad (_("syntax error; end of line, expected `%c'"), endc);
2927 else
2928 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 2929 break;
2930 }
2931
2932 if (*str != '\0')
2933 ++str;
2934 }
2935
3882b010 2936 while (ISSPACE (*str))
252b5132
RH		 2937 ++str;
2938
2939 if (*str != '\0')
2940 as_bad (_("junk at end of line: `%s'"), str);
2941
dc1d03fc 2942#ifdef OBJ_ELF
6a0c61b7 2943 /* Do we need/want a APUinfo section? */
e01d869a 2944 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC)) != 0)
6a0c61b7
EZ		 2945 {
2946 /* These are all version "1". */
2947 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2948 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2949 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2950 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2951 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2952 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2953 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2954 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2955 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2956 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2957 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2958 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2959 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2960 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2961 }
dc1d03fc 2962#endif
6a0c61b7 2963
252b5132
RH		 2964 /* Write out the instruction. */
2965 f = frag_more (4);
09b935ac
AM		 2966 addr_mod = frag_now_fix () & 3;
2967 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2968 as_bad (_("instruction address is not a multiple of 4"));
2969 frag_now->insn_addr = addr_mod;
2970 frag_now->has_code = 1;
252b5132
RH		 2971 md_number_to_chars (f, insn, 4);
2972
5d6f4f16
GK		 2973#ifdef OBJ_ELF
2974 dwarf2_emit_insn (4);
2975#endif
2976
252b5132
RH		 2977 /* Create any fixups. At this point we do not use a
2978 bfd_reloc_code_real_type, but instead just use the
2979 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2980 handle fixups for any operand type, although that is admittedly
2981 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2982 md_apply_fix. */
252b5132
RH		 2983 for (i = 0; i < fc; i++)
2984 {
252b5132
RH		 2985 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2986 {
99a814a1 2987 reloc_howto_type *reloc_howto;
252b5132
RH		 2988 int size;
2989 int offset;
2990 fixS *fixP;
2991
99a814a1 2992 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2993 if (!reloc_howto)
2994 abort ();
2995
2996 size = bfd_get_reloc_size (reloc_howto);
2997 offset = target_big_endian ? (4 - size) : 0;
2998
2999 if (size < 1 || size > 4)
bc805888 3000 abort ();
252b5132 3001
99a814a1
AM		 3002 fixP = fix_new_exp (frag_now,
3003 f - frag_now->fr_literal + offset,
3004 size,
3005 &fixups[i].exp,
3006 reloc_howto->pc_relative,
252b5132
RH		 3007 fixups[i].reloc);
3008
3009 /* Turn off complaints that the addend is too large for things like
3010 foo+100000@ha. */
3011 switch (fixups[i].reloc)
3012 {
3013 case BFD_RELOC_16_GOTOFF:
3014 case BFD_RELOC_PPC_TOC16:
3015 case BFD_RELOC_LO16:
3016 case BFD_RELOC_HI16:
3017 case BFD_RELOC_HI16_S:
0baf16f2 3018#ifdef OBJ_ELF
0baf16f2
AM		 3019 case BFD_RELOC_PPC64_HIGHER:
3020 case BFD_RELOC_PPC64_HIGHER_S:
3021 case BFD_RELOC_PPC64_HIGHEST:
3022 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 3023#endif
252b5132
RH		 3024 fixP->fx_no_overflow = 1;
3025 break;
3026 default:
3027 break;
3028 }
3029 }
3030 else
727fc41e
AM		 3031 {
3032 const struct powerpc_operand *operand;
3033
3034 operand = &powerpc_operands[fixups[i].opindex];
3035 fix_new_exp (frag_now,
3036 f - frag_now->fr_literal,
3037 4,
3038 &fixups[i].exp,
3039 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3040 ((bfd_reloc_code_real_type)
3041 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3042 }
252b5132
RH		 3043 }
3044}
3045
3046/* Handle a macro. Gather all the operands, transform them as
3047 described by the macro, and call md_assemble recursively. All the
3048 operands are separated by commas; we don't accept parentheses
3049 around operands here. */
3050
3051static void
98027b10 3052ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3053{
3054 char *operands[10];
3055 unsigned int count;
3056 char *s;
3057 unsigned int len;
3058 const char *format;
db557034 3059 unsigned int arg;
252b5132
RH		 3060 char *send;
3061 char *complete;
3062
3063 /* Gather the users operands into the operands array. */
3064 count = 0;
3065 s = str;
3066 while (1)
3067 {
3068 if (count >= sizeof operands / sizeof operands[0])
3069 break;
3070 operands[count++] = s;
3071 s = strchr (s, ',');
3072 if (s == (char *) NULL)
3073 break;
3074 *s++ = '\0';
81d4177b 3075 }
252b5132
RH		 3076
3077 if (count != macro->operands)
3078 {
3079 as_bad (_("wrong number of operands"));
3080 return;
3081 }
3082
3083 /* Work out how large the string must be (the size is unbounded
3084 because it includes user input). */
3085 len = 0;
3086 format = macro->format;
3087 while (*format != '\0')
3088 {
3089 if (*format != '%')
3090 {
3091 ++len;
3092 ++format;
3093 }
3094 else
3095 {
3096 arg = strtol (format + 1, &send, 10);
db557034 3097 know (send != format && arg < count);
252b5132
RH		 3098 len += strlen (operands[arg]);
3099 format = send;
3100 }
3101 }
3102
3103 /* Put the string together. */
3104 complete = s = (char *) alloca (len + 1);
3105 format = macro->format;
3106 while (*format != '\0')
3107 {
3108 if (*format != '%')
3109 *s++ = *format++;
3110 else
3111 {
3112 arg = strtol (format + 1, &send, 10);
3113 strcpy (s, operands[arg]);
3114 s += strlen (s);
3115 format = send;
3116 }
3117 }
3118 *s = '\0';
3119
3120 /* Assemble the constructed instruction. */
3121 md_assemble (complete);
81d4177b 3122}
252b5132
RH		 3123\f
3124#ifdef OBJ_ELF
18ae9cc1 3125/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3126
3127int
98027b10 3128ppc_section_type (char *str, size_t len)
252b5132 3129{
9de8d8f1
RH		 3130 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3131 return SHT_ORDERED;
252b5132 3132
9de8d8f1 3133 return -1;
252b5132
RH		 3134}
3135
3136int
1239de13 3137ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3138{
3139 if (type == SHT_ORDERED)
3140 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3141
252b5132
RH		 3142 return flags;
3143}
3144#endif /* OBJ_ELF */
3145
3146\f
3147/* Pseudo-op handling. */
3148
3149/* The .byte pseudo-op. This is similar to the normal .byte
3150 pseudo-op, but it can also take a single ASCII string. */
3151
3152static void
98027b10 3153ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3154{
3155 if (*input_line_pointer != '\"')
3156 {
3157 cons (1);
3158 return;
3159 }
3160
3161 /* Gather characters. A real double quote is doubled. Unusual
3162 characters are not permitted. */
3163 ++input_line_pointer;
3164 while (1)
3165 {
3166 char c;
3167
3168 c = *input_line_pointer++;
3169
3170 if (c == '\"')
3171 {
3172 if (*input_line_pointer != '\"')
3173 break;
3174 ++input_line_pointer;
3175 }
3176
3177 FRAG_APPEND_1_CHAR (c);
3178 }
3179
3180 demand_empty_rest_of_line ();
3181}
3182\f
3183#ifdef OBJ_XCOFF
3184
3185/* XCOFF specific pseudo-op handling. */
3186
3187/* This is set if we are creating a .stabx symbol, since we don't want
3188 to handle symbol suffixes for such symbols. */
b34976b6 3189static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3190
3191/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3192 symbols in the .bss segment as though they were local common
67c1ffbe 3193 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3194 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3195
3196static void
98027b10 3197ppc_comm (int lcomm)
252b5132
RH		 3198{
3199 asection *current_seg = now_seg;
3200 subsegT current_subseg = now_subseg;
3201 char *name;
3202 char endc;
3203 char *end_name;
3204 offsetT size;
3205 offsetT align;
3206 symbolS *lcomm_sym = NULL;
3207 symbolS *sym;
3208 char *pfrag;
3209
3210 name = input_line_pointer;
3211 endc = get_symbol_end ();
3212 end_name = input_line_pointer;
3213 *end_name = endc;
3214
3215 if (*input_line_pointer != ',')
3216 {
3217 as_bad (_("missing size"));
3218 ignore_rest_of_line ();
3219 return;
3220 }
3221 ++input_line_pointer;
3222
3223 size = get_absolute_expression ();
3224 if (size < 0)
3225 {
3226 as_bad (_("negative size"));
3227 ignore_rest_of_line ();
3228 return;
3229 }
3230
3231 if (! lcomm)
3232 {
3233 /* The third argument to .comm is the alignment. */
3234 if (*input_line_pointer != ',')
1ad63b2f 3235 align = 2;
252b5132
RH		 3236 else
3237 {
3238 ++input_line_pointer;
3239 align = get_absolute_expression ();
3240 if (align <= 0)
3241 {
3242 as_warn (_("ignoring bad alignment"));
1ad63b2f 3243 align = 2;
252b5132
RH		 3244 }
3245 }
3246 }
3247 else
3248 {
3249 char *lcomm_name;
3250 char lcomm_endc;
3251
1ad63b2f 3252 if (size <= 4)
252b5132
RH		 3253 align = 2;
3254 else
3255 align = 3;
3256
3257 /* The third argument to .lcomm appears to be the real local
3258 common symbol to create. References to the symbol named in
3259 the first argument are turned into references to the third
3260 argument. */
3261 if (*input_line_pointer != ',')
3262 {
3263 as_bad (_("missing real symbol name"));
3264 ignore_rest_of_line ();
3265 return;
3266 }
3267 ++input_line_pointer;
3268
3269 lcomm_name = input_line_pointer;
3270 lcomm_endc = get_symbol_end ();
81d4177b 3271
252b5132
RH		 3272 lcomm_sym = symbol_find_or_make (lcomm_name);
3273
3274 *input_line_pointer = lcomm_endc;
3275 }
3276
3277 *end_name = '\0';
3278 sym = symbol_find_or_make (name);
3279 *end_name = endc;
3280
3281 if (S_IS_DEFINED (sym)
3282 || S_GET_VALUE (sym) != 0)
3283 {
3284 as_bad (_("attempt to redefine symbol"));
3285 ignore_rest_of_line ();
3286 return;
3287 }
81d4177b 3288
252b5132 3289 record_alignment (bss_section, align);
81d4177b 3290
252b5132
RH		 3291 if (! lcomm
3292 || ! S_IS_DEFINED (lcomm_sym))
3293 {
3294 symbolS *def_sym;
3295 offsetT def_size;
3296
3297 if (! lcomm)
3298 {
3299 def_sym = sym;
3300 def_size = size;
3301 S_SET_EXTERNAL (sym);
3302 }
3303 else
3304 {
809ffe0d 3305 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3306 def_sym = lcomm_sym;
3307 def_size = 0;
3308 }
3309
3310 subseg_set (bss_section, 1);
3311 frag_align (align, 0, 0);
81d4177b 3312
809ffe0d 3313 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3314 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3315 def_size, (char *) NULL);
3316 *pfrag = 0;
3317 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3318 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3319 }
3320 else if (lcomm)
3321 {
3322 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3323 symbol_get_frag (lcomm_sym)->fr_offset =
3324 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3325 &~ ((1 << align) - 1));
809ffe0d
ILT		 3326 if (align > symbol_get_tc (lcomm_sym)->align)
3327 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3328 }
3329
3330 if (lcomm)
3331 {
3332 /* Make sym an offset from lcomm_sym. */
3333 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3334 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3335 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3336 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3337 }
3338
3339 subseg_set (current_seg, current_subseg);
3340
3341 demand_empty_rest_of_line ();
3342}
3343
3344/* The .csect pseudo-op. This switches us into a different
3345 subsegment. The first argument is a symbol whose value is the
3346 start of the .csect. In COFF, csect symbols get special aux
3347 entries defined by the x_csect field of union internal_auxent. The
3348 optional second argument is the alignment (the default is 2). */
3349
3350static void
98027b10 3351ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3352{
3353 char *name;
3354 char endc;
3355 symbolS *sym;
931e13a6 3356 offsetT align;
252b5132
RH		 3357
3358 name = input_line_pointer;
3359 endc = get_symbol_end ();
81d4177b 3360
252b5132
RH		 3361 sym = symbol_find_or_make (name);
3362
3363 *input_line_pointer = endc;
3364
3365 if (S_GET_NAME (sym)[0] == '\0')
3366 {
3367 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3368 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3369 }
3370
931e13a6 3371 align = 2;
252b5132
RH		 3372 if (*input_line_pointer == ',')
3373 {
3374 ++input_line_pointer;
931e13a6 3375 align = get_absolute_expression ();
252b5132
RH		 3376 }
3377
931e13a6
AM		 3378 ppc_change_csect (sym, align);
3379
252b5132
RH		 3380 demand_empty_rest_of_line ();
3381}
3382
3383/* Change to a different csect. */
3384
3385static void
98027b10 3386ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3387{
3388 if (S_IS_DEFINED (sym))
809ffe0d 3389 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3390 else
3391 {
3392 symbolS **list_ptr;
3393 int after_toc;
3394 int hold_chunksize;
3395 symbolS *list;
931e13a6
AM		 3396 int is_code;
3397 segT sec;
252b5132
RH		 3398
3399 /* This is a new csect. We need to look at the symbol class to
3400 figure out whether it should go in the text section or the
3401 data section. */
3402 after_toc = 0;
931e13a6 3403 is_code = 0;
96d56e9f 3404 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3405 {
3406 case XMC_PR:
3407 case XMC_RO:
3408 case XMC_DB:
3409 case XMC_GL:
3410 case XMC_XO:
3411 case XMC_SV:
3412 case XMC_TI:
3413 case XMC_TB:
3414 S_SET_SEGMENT (sym, text_section);
809ffe0d 3415 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3416 ++ppc_text_subsegment;
3417 list_ptr = &ppc_text_csects;
931e13a6 3418 is_code = 1;
252b5132
RH		 3419 break;
3420 case XMC_RW:
3421 case XMC_TC0:
3422 case XMC_TC:
3423 case XMC_DS:
3424 case XMC_UA:
3425 case XMC_BS:
3426 case XMC_UC:
3427 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3428 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3429 == ppc_data_subsegment))
252b5132
RH		 3430 after_toc = 1;
3431 S_SET_SEGMENT (sym, data_section);
809ffe0d 3432 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3433 ++ppc_data_subsegment;
3434 list_ptr = &ppc_data_csects;
3435 break;
3436 default:
3437 abort ();
3438 }
3439
3440 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3441 changing subsegments, so that we don't use a lot of memory
3442 space for what may be a small section. */
252b5132
RH		 3443 hold_chunksize = chunksize;
3444 chunksize = 64;
3445
931e13a6
AM		 3446 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3447 symbol_get_tc (sym)->subseg);
252b5132
RH		 3448
3449 chunksize = hold_chunksize;
3450
3451 if (after_toc)
3452 ppc_after_toc_frag = frag_now;
3453
931e13a6
AM		 3454 record_alignment (sec, align);
3455 if (is_code)
3456 frag_align_code (align, 0);
3457 else
3458 frag_align (align, 0, 0);
3459
809ffe0d 3460 symbol_set_frag (sym, frag_now);
252b5132
RH		 3461 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3462
931e13a6 3463 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3464 symbol_get_tc (sym)->output = 1;
3465 symbol_get_tc (sym)->within = sym;
81d4177b 3466
252b5132 3467 for (list = *list_ptr;
809ffe0d
ILT		 3468 symbol_get_tc (list)->next != (symbolS *) NULL;
3469 list = symbol_get_tc (list)->next)
252b5132 3470 ;
809ffe0d 3471 symbol_get_tc (list)->next = sym;
81d4177b 3472
252b5132 3473 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3474 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3475 &symbol_lastP);
252b5132
RH		 3476 }
3477
3478 ppc_current_csect = sym;
3479}
3480
3481/* This function handles the .text and .data pseudo-ops. These
3482 pseudo-ops aren't really used by XCOFF; we implement them for the
3483 convenience of people who aren't used to XCOFF. */
3484
3485static void
98027b10 3486ppc_section (int type)
252b5132
RH		 3487{
3488 const char *name;
3489 symbolS *sym;
3490
3491 if (type == 't')
3492 name = ".text[PR]";
3493 else if (type == 'd')
3494 name = ".data[RW]";
3495 else
3496 abort ();
3497
3498 sym = symbol_find_or_make (name);
3499
931e13a6 3500 ppc_change_csect (sym, 2);
252b5132
RH		 3501
3502 demand_empty_rest_of_line ();
3503}
3504
3505/* This function handles the .section pseudo-op. This is mostly to
3506 give an error, since XCOFF only supports .text, .data and .bss, but
3507 we do permit the user to name the text or data section. */
3508
3509static void
98027b10 3510ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3511{
3512 char *user_name;
3513 const char *real_name;
3514 char c;
3515 symbolS *sym;
3516
3517 user_name = input_line_pointer;
3518 c = get_symbol_end ();
3519
3520 if (strcmp (user_name, ".text") == 0)
3521 real_name = ".text[PR]";
3522 else if (strcmp (user_name, ".data") == 0)
3523 real_name = ".data[RW]";
3524 else
3525 {
3526 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3527 *input_line_pointer = c;
3528 ignore_rest_of_line ();
3529 return;
3530 }
3531
3532 *input_line_pointer = c;
3533
3534 sym = symbol_find_or_make (real_name);
3535
931e13a6 3536 ppc_change_csect (sym, 2);
252b5132
RH		 3537
3538 demand_empty_rest_of_line ();
3539}
3540
3541/* The .extern pseudo-op. We create an undefined symbol. */
3542
3543static void
98027b10 3544ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3545{
3546 char *name;
3547 char endc;
3548
3549 name = input_line_pointer;
3550 endc = get_symbol_end ();
3551
3552 (void) symbol_find_or_make (name);
3553
3554 *input_line_pointer = endc;
3555
3556 demand_empty_rest_of_line ();
3557}
3558
3559/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3560
3561static void
98027b10 3562ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3563{
3564 char *name;
3565 char endc;
3566 symbolS *sym;
3567
3568 name = input_line_pointer;
3569 endc = get_symbol_end ();
3570
3571 sym = symbol_find_or_make (name);
3572
3573 *input_line_pointer = endc;
3574
809ffe0d 3575 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3576
3577 demand_empty_rest_of_line ();
3578}
3579
c865e45b
RS		 3580/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
3581 relocations at the beginning of the current csect.
3582
3583 (In principle, there's no reason why the relocations _have_ to be at
3584 the beginning. Anywhere in the csect would do. However, inserting
3585 at the beginning is what the native assmebler does, and it helps to
3586 deal with cases where the .ref statements follow the section contents.)
3587
3588 ??? .refs don't work for empty .csects. However, the native assembler
3589 doesn't report an error in this case, and neither yet do we. */
3590
3591static void
3592ppc_ref (int ignore ATTRIBUTE_UNUSED)
3593{
3594 char *name;
3595 char c;
3596
3597 if (ppc_current_csect == NULL)
3598 {
3599 as_bad (_(".ref outside .csect"));
3600 ignore_rest_of_line ();
3601 return;
3602 }
3603
3604 do
3605 {
3606 name = input_line_pointer;
3607 c = get_symbol_end ();
3608
3609 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
3610 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
3611
3612 *input_line_pointer = c;
3613 SKIP_WHITESPACE ();
3614 c = *input_line_pointer;
3615 if (c == ',')
3616 {
3617 input_line_pointer++;
3618 SKIP_WHITESPACE ();
3619 if (is_end_of_line[(unsigned char) *input_line_pointer])
3620 {
3621 as_bad (_("missing symbol name"));
3622 ignore_rest_of_line ();
3623 return;
3624 }
3625 }
3626 }
3627 while (c == ',');
3628
3629 demand_empty_rest_of_line ();
3630}
3631
252b5132
RH		 3632/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3633 although I don't know why it bothers. */
3634
3635static void
98027b10 3636ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3637{
3638 char *name;
3639 char endc;
3640 symbolS *sym;
3641 int len;
3642
3643 name = input_line_pointer;
3644 endc = get_symbol_end ();
3645
3646 sym = symbol_find_or_make (name);
3647
3648 *input_line_pointer = endc;
3649
3650 if (*input_line_pointer != ',')
3651 {
3652 as_bad (_("missing rename string"));
3653 ignore_rest_of_line ();
3654 return;
3655 }
3656 ++input_line_pointer;
3657
809ffe0d 3658 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3659
3660 demand_empty_rest_of_line ();
3661}
3662
3663/* The .stabx pseudo-op. This is similar to a normal .stabs
3664 pseudo-op, but slightly different. A sample is
3665 .stabx "main:F-1",.main,142,0
3666 The first argument is the symbol name to create. The second is the
3667 value, and the third is the storage class. The fourth seems to be
3668 always zero, and I am assuming it is the type. */
3669
3670static void
98027b10 3671ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3672{
3673 char *name;
3674 int len;
3675 symbolS *sym;
3676 expressionS exp;
3677
3678 name = demand_copy_C_string (&len);
3679
3680 if (*input_line_pointer != ',')
3681 {
3682 as_bad (_("missing value"));
3683 return;
3684 }
3685 ++input_line_pointer;
3686
b34976b6 3687 ppc_stab_symbol = TRUE;
252b5132 3688 sym = symbol_make (name);
b34976b6 3689 ppc_stab_symbol = FALSE;
252b5132 3690
809ffe0d 3691 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3692
3693 (void) expression (&exp);
3694
3695 switch (exp.X_op)
3696 {
3697 case O_illegal:
3698 case O_absent:
3699 case O_big:
3700 as_bad (_("illegal .stabx expression; zero assumed"));
3701 exp.X_add_number = 0;
3702 /* Fall through. */
3703 case O_constant:
3704 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3705 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3706 break;
3707
3708 case O_symbol:
3709 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3710 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3711 else
3712 {
3713 S_SET_VALUE (sym,
3714 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3715 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3716 }
3717 break;
3718
3719 default:
3720 /* The value is some complex expression. This will probably
99a814a1
AM		 3721 fail at some later point, but this is probably the right
3722 thing to do here. */
809ffe0d 3723 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3724 break;
3725 }
3726
3727 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3728 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3729
3730 if (*input_line_pointer != ',')
3731 {
3732 as_bad (_("missing class"));
3733 return;
3734 }
3735 ++input_line_pointer;
3736
3737 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3738
3739 if (*input_line_pointer != ',')
3740 {
3741 as_bad (_("missing type"));
3742 return;
3743 }
3744 ++input_line_pointer;
3745
3746 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3747
809ffe0d 3748 symbol_get_tc (sym)->output = 1;
252b5132 3749
c734e7e3
TG		 3750 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
3751 {
3752 /* In this case :
252b5132 3753
c734e7e3
TG		 3754 .bs name
3755 .stabx "z",arrays_,133,0
3756 .es
99a814a1 3757
c734e7e3 3758 .comm arrays_,13768,3
99a814a1 3759
c734e7e3
TG		 3760 resolve_symbol_value will copy the exp's "within" into sym's when the
3761 offset is 0. Since this seems to be corner case problem,
3762 only do the correction for storage class C_STSYM. A better solution
3763 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 3764
c734e7e3
TG		 3765 if (exp.X_op == O_symbol)
3766 {
3767 if (ppc_current_block == NULL)
3768 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 3769
c734e7e3
TG		 3770 symbol_get_tc (sym)->within = ppc_current_block;
3771 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3772 }
3773 }
99a814a1 3774
252b5132
RH		 3775 if (exp.X_op != O_symbol
3776 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3777 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3778 ppc_frob_label (sym);
3779 else
3780 {
3781 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3782 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3783 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3784 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3785 }
3786
3787 demand_empty_rest_of_line ();
3788}
3789
3790/* The .function pseudo-op. This takes several arguments. The first
3791 argument seems to be the external name of the symbol. The second
67c1ffbe 3792 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3793 uses the same name for both. I have no idea what the third and
3794 fourth arguments are meant to be. The optional fifth argument is
3795 an expression for the size of the function. In COFF this symbol
3796 gets an aux entry like that used for a csect. */
3797
3798static void
98027b10 3799ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3800{
3801 char *name;
3802 char endc;
3803 char *s;
3804 symbolS *ext_sym;
3805 symbolS *lab_sym;
3806
3807 name = input_line_pointer;
3808 endc = get_symbol_end ();
3809
3810 /* Ignore any [PR] suffix. */
3811 name = ppc_canonicalize_symbol_name (name);
3812 s = strchr (name, '[');
3813 if (s != (char *) NULL
3814 && strcmp (s + 1, "PR]") == 0)
3815 *s = '\0';
3816
3817 ext_sym = symbol_find_or_make (name);
3818
3819 *input_line_pointer = endc;
3820
3821 if (*input_line_pointer != ',')
3822 {
3823 as_bad (_("missing symbol name"));
3824 ignore_rest_of_line ();
3825 return;
3826 }
3827 ++input_line_pointer;
3828
3829 name = input_line_pointer;
3830 endc = get_symbol_end ();
3831
3832 lab_sym = symbol_find_or_make (name);
3833
3834 *input_line_pointer = endc;
3835
3836 if (ext_sym != lab_sym)
3837 {
809ffe0d
ILT		 3838 expressionS exp;
3839
3840 exp.X_op = O_symbol;
3841 exp.X_add_symbol = lab_sym;
3842 exp.X_op_symbol = NULL;
3843 exp.X_add_number = 0;
3844 exp.X_unsigned = 0;
3845 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3846 }
3847
96d56e9f
NC		 3848 if (symbol_get_tc (ext_sym)->symbol_class == -1)
3849 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 3850 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3851
3852 if (*input_line_pointer == ',')
3853 {
91d6fa6a 3854 expressionS exp;
252b5132
RH		 3855
3856 /* Ignore the third argument. */
3857 ++input_line_pointer;
91d6fa6a 3858 expression (& exp);
252b5132
RH		 3859 if (*input_line_pointer == ',')
3860 {
3861 /* Ignore the fourth argument. */
3862 ++input_line_pointer;
91d6fa6a 3863 expression (& exp);
252b5132
RH		 3864 if (*input_line_pointer == ',')
3865 {
3866 /* The fifth argument is the function size. */
3867 ++input_line_pointer;
809ffe0d
ILT		 3868 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3869 absolute_section,
3870 (valueT) 0,
3871 &zero_address_frag);
3872 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3873 }
3874 }
3875 }
3876
3877 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3878 SF_SET_FUNCTION (ext_sym);
3879 SF_SET_PROCESS (ext_sym);
3880 coff_add_linesym (ext_sym);
3881
3882 demand_empty_rest_of_line ();
3883}
3884
3885/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3886 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3887 with the correct line number */
5d6255fe 3888
8642cce8 3889static symbolS *saved_bi_sym = 0;
252b5132
RH		 3890
3891static void
98027b10 3892ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3893{
3894 symbolS *sym;
3895
3896 sym = symbol_make (".bf");
3897 S_SET_SEGMENT (sym, text_section);
809ffe0d 3898 symbol_set_frag (sym, frag_now);
252b5132
RH		 3899 S_SET_VALUE (sym, frag_now_fix ());
3900 S_SET_STORAGE_CLASS (sym, C_FCN);
3901
3902 coff_line_base = get_absolute_expression ();
3903
3904 S_SET_NUMBER_AUXILIARY (sym, 1);
3905 SA_SET_SYM_LNNO (sym, coff_line_base);
3906
8642cce8 3907 /* Line number for bi. */
5d6255fe 3908 if (saved_bi_sym)
8642cce8
TR		 3909 {
3910 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3911 saved_bi_sym = 0;
3912 }
5d6255fe 3913
8642cce8 3914
809ffe0d 3915 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3916
3917 ppc_frob_label (sym);
3918
3919 demand_empty_rest_of_line ();
3920}
3921
3922/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3923 ".ef", except that the line number is absolute, not relative to the
3924 most recent ".bf" symbol. */
3925
3926static void
98027b10 3927ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3928{
3929 symbolS *sym;
3930
3931 sym = symbol_make (".ef");
3932 S_SET_SEGMENT (sym, text_section);
809ffe0d 3933 symbol_set_frag (sym, frag_now);
252b5132
RH		 3934 S_SET_VALUE (sym, frag_now_fix ());
3935 S_SET_STORAGE_CLASS (sym, C_FCN);
3936 S_SET_NUMBER_AUXILIARY (sym, 1);
3937 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3938 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3939
3940 ppc_frob_label (sym);
3941
3942 demand_empty_rest_of_line ();
3943}
3944
3945/* The .bi and .ei pseudo-ops. These take a string argument and
3946 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3947 the symbol list. The value of .bi will be know when the next .bf
3948 is encountered. */
252b5132
RH		 3949
3950static void
98027b10 3951ppc_biei (int ei)
252b5132
RH		 3952{
3953 static symbolS *last_biei;
3954
3955 char *name;
3956 int len;
3957 symbolS *sym;
3958 symbolS *look;
3959
3960 name = demand_copy_C_string (&len);
3961
3962 /* The value of these symbols is actually file offset. Here we set
3963 the value to the index into the line number entries. In
3964 ppc_frob_symbols we set the fix_line field, which will cause BFD
3965 to do the right thing. */
3966
3967 sym = symbol_make (name);
3968 /* obj-coff.c currently only handles line numbers correctly in the
3969 .text section. */
3970 S_SET_SEGMENT (sym, text_section);
3971 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3972 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3973
3974 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3975 symbol_get_tc (sym)->output = 1;
81d4177b 3976
8642cce8 3977 /* Save bi. */
5d6255fe 3978 if (ei)
8642cce8
TR		 3979 saved_bi_sym = 0;
3980 else
3981 saved_bi_sym = sym;
3982
252b5132
RH		 3983 for (look = last_biei ? last_biei : symbol_rootP;
3984 (look != (symbolS *) NULL
3985 && (S_GET_STORAGE_CLASS (look) == C_FILE
3986 || S_GET_STORAGE_CLASS (look) == C_BINCL
3987 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3988 look = symbol_next (look))
3989 ;
3990 if (look != (symbolS *) NULL)
3991 {
3992 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3993 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3994 last_biei = sym;
3995 }
3996
3997 demand_empty_rest_of_line ();
3998}
3999
4000/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4001 There is one argument, which is a csect symbol. The value of the
4002 .bs symbol is the index of this csect symbol. */
4003
4004static void
98027b10 4005ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4006{
4007 char *name;
4008 char endc;
4009 symbolS *csect;
4010 symbolS *sym;
4011
4012 if (ppc_current_block != NULL)
4013 as_bad (_("nested .bs blocks"));
4014
4015 name = input_line_pointer;
4016 endc = get_symbol_end ();
4017
4018 csect = symbol_find_or_make (name);
4019
4020 *input_line_pointer = endc;
4021
4022 sym = symbol_make (".bs");
4023 S_SET_SEGMENT (sym, now_seg);
4024 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4025 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4026 symbol_get_tc (sym)->output = 1;
252b5132 4027
809ffe0d 4028 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4029
4030 ppc_frob_label (sym);
4031
4032 ppc_current_block = sym;
4033
4034 demand_empty_rest_of_line ();
4035}
4036
4037/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4038
4039static void
98027b10 4040ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4041{
4042 symbolS *sym;
4043
4044 if (ppc_current_block == NULL)
4045 as_bad (_(".es without preceding .bs"));
4046
4047 sym = symbol_make (".es");
4048 S_SET_SEGMENT (sym, now_seg);
4049 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4050 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4051 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4052
4053 ppc_frob_label (sym);
4054
4055 ppc_current_block = NULL;
4056
4057 demand_empty_rest_of_line ();
4058}
4059
4060/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4061 line number. */
4062
4063static void
98027b10 4064ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4065{
4066 symbolS *sym;
4067
4068 sym = symbol_make (".bb");
4069 S_SET_SEGMENT (sym, text_section);
809ffe0d 4070 symbol_set_frag (sym, frag_now);
252b5132
RH		 4071 S_SET_VALUE (sym, frag_now_fix ());
4072 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4073
4074 S_SET_NUMBER_AUXILIARY (sym, 1);
4075 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4076
809ffe0d 4077 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4078
4079 SF_SET_PROCESS (sym);
4080
4081 ppc_frob_label (sym);
4082
4083 demand_empty_rest_of_line ();
4084}
4085
4086/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4087 line number. */
4088
4089static void
98027b10 4090ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4091{
4092 symbolS *sym;
4093
4094 sym = symbol_make (".eb");
4095 S_SET_SEGMENT (sym, text_section);
809ffe0d 4096 symbol_set_frag (sym, frag_now);
252b5132
RH		 4097 S_SET_VALUE (sym, frag_now_fix ());
4098 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4099 S_SET_NUMBER_AUXILIARY (sym, 1);
4100 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4101 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4102
4103 SF_SET_PROCESS (sym);
4104
4105 ppc_frob_label (sym);
4106
4107 demand_empty_rest_of_line ();
4108}
4109
4110/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4111 specified name. */
4112
4113static void
98027b10 4114ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4115{
4116 char *name;
4117 int len;
4118 symbolS *sym;
4119
4120 name = demand_copy_C_string (&len);
4121 sym = symbol_make (name);
4122 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4123 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4124 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4125 S_SET_VALUE (sym, 0);
809ffe0d 4126 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4127
4128 ppc_frob_label (sym);
4129
4130 demand_empty_rest_of_line ();
4131}
4132
4133/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4134
4135static void
98027b10 4136ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4137{
4138 symbolS *sym;
4139
4140 sym = symbol_make (".ec");
4141 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4142 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4143 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4144 S_SET_VALUE (sym, 0);
809ffe0d 4145 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4146
4147 ppc_frob_label (sym);
4148
4149 demand_empty_rest_of_line ();
4150}
4151
4152/* The .toc pseudo-op. Switch to the .toc subsegment. */
4153
4154static void
98027b10 4155ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4156{
4157 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4158 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4159 else
4160 {
4161 subsegT subseg;
4162 symbolS *sym;
4163 symbolS *list;
81d4177b 4164
252b5132
RH		 4165 subseg = ppc_data_subsegment;
4166 ++ppc_data_subsegment;
4167
4168 subseg_new (segment_name (data_section), subseg);
4169 ppc_toc_frag = frag_now;
4170
4171 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4172 symbol_set_frag (sym, frag_now);
252b5132
RH		 4173 S_SET_SEGMENT (sym, data_section);
4174 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4175 symbol_get_tc (sym)->subseg = subseg;
4176 symbol_get_tc (sym)->output = 1;
4177 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4178
4179 ppc_toc_csect = sym;
81d4177b 4180
252b5132 4181 for (list = ppc_data_csects;
809ffe0d
ILT		 4182 symbol_get_tc (list)->next != (symbolS *) NULL;
4183 list = symbol_get_tc (list)->next)
252b5132 4184 ;
809ffe0d 4185 symbol_get_tc (list)->next = sym;
252b5132
RH		 4186
4187 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4188 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4189 &symbol_lastP);
252b5132
RH		 4190 }
4191
4192 ppc_current_csect = ppc_toc_csect;
4193
4194 demand_empty_rest_of_line ();
4195}
4196
4197/* The AIX assembler automatically aligns the operands of a .long or
4198 .short pseudo-op, and we want to be compatible. */
4199
4200static void
98027b10 4201ppc_xcoff_cons (int log_size)
252b5132
RH		 4202{
4203 frag_align (log_size, 0, 0);
4204 record_alignment (now_seg, log_size);
4205 cons (1 << log_size);
4206}
4207
4208static void
98027b10 4209ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4210{
4211 expressionS exp;
4212 int byte_count;
4213
4214 (void) expression (&exp);
4215
4216 if (exp.X_op != O_constant)
4217 {
4218 as_bad (_("non-constant byte count"));
4219 return;
4220 }
4221
4222 byte_count = exp.X_add_number;
4223
4224 if (*input_line_pointer != ',')
4225 {
4226 as_bad (_("missing value"));
4227 return;
4228 }
4229
4230 ++input_line_pointer;
4231 cons (byte_count);
4232}
4233
4234#endif /* OBJ_XCOFF */
0baf16f2 4235#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4236\f
4237/* The .tc pseudo-op. This is used when generating either XCOFF or
4238 ELF. This takes two or more arguments.
4239
4240 When generating XCOFF output, the first argument is the name to
4241 give to this location in the toc; this will be a symbol with class
0baf16f2 4242 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4243 this location in the TOC; often there is just one more argument, a
1049f94e 4244 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4245 depends on target word size. A 32-bit target uses 4-byte values, a
4246 64-bit target uses 8-byte values.
252b5132
RH		 4247
4248 When not generating XCOFF output, the arguments are the same, but
4249 the first argument is simply ignored. */
4250
4251static void
98027b10 4252ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4253{
4254#ifdef OBJ_XCOFF
4255
4256 /* Define the TOC symbol name. */
4257 {
4258 char *name;
4259 char endc;
4260 symbolS *sym;
4261
4262 if (ppc_toc_csect == (symbolS *) NULL
4263 || ppc_toc_csect != ppc_current_csect)
4264 {
4265 as_bad (_(".tc not in .toc section"));
4266 ignore_rest_of_line ();
4267 return;
4268 }
4269
4270 name = input_line_pointer;
4271 endc = get_symbol_end ();
4272
4273 sym = symbol_find_or_make (name);
4274
4275 *input_line_pointer = endc;
4276
4277 if (S_IS_DEFINED (sym))
4278 {
4279 symbolS *label;
4280
809ffe0d 4281 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4282 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4283 {
4284 as_bad (_(".tc with no label"));
4285 ignore_rest_of_line ();
4286 return;
4287 }
4288
4289 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4290 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4291 S_SET_VALUE (label, S_GET_VALUE (sym));
4292
4293 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4294 ++input_line_pointer;
4295
4296 return;
4297 }
4298
4299 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4300 symbol_set_frag (sym, frag_now);
252b5132 4301 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4302 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4303 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4304
4305 ppc_frob_label (sym);
4306 }
4307
0baf16f2
AM		 4308#endif /* OBJ_XCOFF */
4309#ifdef OBJ_ELF
9c7977b3 4310 int align;
252b5132
RH		 4311
4312 /* Skip the TOC symbol name. */
4313 while (is_part_of_name (*input_line_pointer)
d13d4015 4314 || *input_line_pointer == ' '
252b5132
RH		 4315 || *input_line_pointer == '['
4316 || *input_line_pointer == ']'
4317 || *input_line_pointer == '{'
4318 || *input_line_pointer == '}')
4319 ++input_line_pointer;
4320
0baf16f2 4321 /* Align to a four/eight byte boundary. */
2b3c4602 4322 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4323 frag_align (align, 0, 0);
4324 record_alignment (now_seg, align);
0baf16f2 4325#endif /* OBJ_ELF */
252b5132
RH		 4326
4327 if (*input_line_pointer != ',')
4328 demand_empty_rest_of_line ();
4329 else
4330 {
4331 ++input_line_pointer;
2b3c4602 4332 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4333 }
4334}
0baf16f2
AM		 4335
4336/* Pseudo-op .machine. */
0baf16f2
AM		 4337
4338static void
98027b10 4339ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4340{
69c040df
AM		 4341 char *cpu_string;
4342#define MAX_HISTORY 100
fa452fa6 4343 static ppc_cpu_t *cpu_history;
69c040df
AM		 4344 static int curr_hist;
4345
4346 SKIP_WHITESPACE ();
4347
4348 if (*input_line_pointer == '"')
4349 {
4350 int len;
4351 cpu_string = demand_copy_C_string (&len);
4352 }
4353 else
4354 {
4355 char c;
4356 cpu_string = input_line_pointer;
4357 c = get_symbol_end ();
4358 cpu_string = xstrdup (cpu_string);
4359 *input_line_pointer = c;
4360 }
4361
4362 if (cpu_string != NULL)
4363 {
fa452fa6 4364 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4365 ppc_cpu_t new_cpu;
69c040df
AM		 4366 char *p;
4367
4368 for (p = cpu_string; *p != 0; p++)
4369 *p = TOLOWER (*p);
4370
4371 if (strcmp (cpu_string, "push") == 0)
4372 {
4373 if (cpu_history == NULL)
4374 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4375
4376 if (curr_hist >= MAX_HISTORY)
4377 as_bad (_(".machine stack overflow"));
4378 else
4379 cpu_history[curr_hist++] = ppc_cpu;
4380 }
4381 else if (strcmp (cpu_string, "pop") == 0)
4382 {
4383 if (curr_hist <= 0)
4384 as_bad (_(".machine stack underflow"));
4385 else
4386 ppc_cpu = cpu_history[--curr_hist];
4387 }
69fe9ce5
AM		 4388 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4389 ppc_cpu = new_cpu;
69c040df
AM		 4390 else
4391 as_bad (_("invalid machine `%s'"), cpu_string);
4392
4393 if (ppc_cpu != old_cpu)
4394 ppc_setup_opcodes ();
4395 }
4396
4397 demand_empty_rest_of_line ();
0baf16f2
AM		 4398}
4399
4400/* See whether a symbol is in the TOC section. */
4401
4402static int
98027b10 4403ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4404{
4405#ifdef OBJ_XCOFF
96d56e9f 4406 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4407#endif
4408#ifdef OBJ_ELF
4409 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4410 if (ppc_obj64)
0baf16f2
AM		 4411 return strcmp (sname, ".toc") == 0;
4412 else
4413 return strcmp (sname, ".got") == 0;
4414#endif
4415}
4416#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4417\f
4418#ifdef TE_PE
4419
99a814a1 4420/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4421
4422/* Set the current section. */
4423static void
98027b10 4424ppc_set_current_section (segT new)
252b5132
RH		 4425{
4426 ppc_previous_section = ppc_current_section;
4427 ppc_current_section = new;
4428}
4429
4430/* pseudo-op: .previous
4431 behaviour: toggles the current section with the previous section.
4432 errors: None
99a814a1
AM		 4433 warnings: "No previous section" */
4434
252b5132 4435static void
98027b10 4436ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4437{
4438 symbolS *tmp;
4439
81d4177b 4440 if (ppc_previous_section == NULL)
252b5132 4441 {
99a814a1 4442 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4443 return;
4444 }
4445
99a814a1 4446 subseg_set (ppc_previous_section, 0);
252b5132 4447
99a814a1 4448 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4449}
4450
4451/* pseudo-op: .pdata
4452 behaviour: predefined read only data section
b34976b6 4453 double word aligned
252b5132
RH		 4454 errors: None
4455 warnings: None
4456 initial: .section .pdata "adr3"
b34976b6 4457 a - don't know -- maybe a misprint
252b5132
RH		 4458 d - initialized data
4459 r - readable
4460 3 - double word aligned (that would be 4 byte boundary)
4461
4462 commentary:
4463 Tag index tables (also known as the function table) for exception
99a814a1 4464 handling, debugging, etc. */
252b5132 4465
252b5132 4466static void
98027b10 4467ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4468{
81d4177b 4469 if (pdata_section == 0)
252b5132
RH		 4470 {
4471 pdata_section = subseg_new (".pdata", 0);
81d4177b 4472
252b5132
RH		 4473 bfd_set_section_flags (stdoutput, pdata_section,
4474 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4475 | SEC_READONLY | SEC_DATA ));
81d4177b 4476
252b5132
RH		 4477 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4478 }
4479 else
4480 {
99a814a1 4481 pdata_section = subseg_new (".pdata", 0);
252b5132 4482 }
99a814a1 4483 ppc_set_current_section (pdata_section);
252b5132
RH		 4484}
4485
4486/* pseudo-op: .ydata
4487 behaviour: predefined read only data section
b34976b6 4488 double word aligned
252b5132
RH		 4489 errors: None
4490 warnings: None
4491 initial: .section .ydata "drw3"
b34976b6 4492 a - don't know -- maybe a misprint
252b5132
RH		 4493 d - initialized data
4494 r - readable
4495 3 - double word aligned (that would be 4 byte boundary)
4496 commentary:
4497 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4498 debugging, etc. */
4499
252b5132 4500static void
98027b10 4501ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4502{
81d4177b 4503 if (ydata_section == 0)
252b5132
RH		 4504 {
4505 ydata_section = subseg_new (".ydata", 0);
4506 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4507 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4508 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4509
4510 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4511 }
4512 else
4513 {
4514 ydata_section = subseg_new (".ydata", 0);
4515 }
99a814a1 4516 ppc_set_current_section (ydata_section);
252b5132
RH		 4517}
4518
4519/* pseudo-op: .reldata
4520 behaviour: predefined read write data section
b34976b6 4521 double word aligned (4-byte)
252b5132
RH		 4522 FIXME: relocation is applied to it
4523 FIXME: what's the difference between this and .data?
4524 errors: None
4525 warnings: None
4526 initial: .section .reldata "drw3"
4527 d - initialized data
4528 r - readable
4529 w - writeable
4530 3 - double word aligned (that would be 8 byte boundary)
4531
4532 commentary:
4533 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4534 function descriptors, etc. */
4535
252b5132 4536static void
98027b10 4537ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4538{
4539 if (reldata_section == 0)
4540 {
4541 reldata_section = subseg_new (".reldata", 0);
4542
4543 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4544 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4545 | SEC_DATA));
252b5132
RH		 4546
4547 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4548 }
4549 else
4550 {
4551 reldata_section = subseg_new (".reldata", 0);
4552 }
99a814a1 4553 ppc_set_current_section (reldata_section);
252b5132
RH		 4554}
4555
4556/* pseudo-op: .rdata
4557 behaviour: predefined read only data section
b34976b6 4558 double word aligned
252b5132
RH		 4559 errors: None
4560 warnings: None
4561 initial: .section .rdata "dr3"
4562 d - initialized data
4563 r - readable
99a814a1
AM		 4564 3 - double word aligned (that would be 4 byte boundary) */
4565
252b5132 4566static void
98027b10 4567ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4568{
4569 if (rdata_section == 0)
4570 {
4571 rdata_section = subseg_new (".rdata", 0);
4572 bfd_set_section_flags (stdoutput, rdata_section,
4573 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4574 | SEC_READONLY | SEC_DATA ));
4575
4576 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4577 }
4578 else
4579 {
4580 rdata_section = subseg_new (".rdata", 0);
4581 }
99a814a1 4582 ppc_set_current_section (rdata_section);
252b5132
RH		 4583}
4584
4585/* pseudo-op: .ualong
81d4177b 4586 behaviour: much like .int, with the exception that no alignment is
b34976b6 4587 performed.
252b5132
RH		 4588 FIXME: test the alignment statement
4589 errors: None
99a814a1
AM		 4590 warnings: None */
4591
252b5132 4592static void
98027b10 4593ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4594{
99a814a1
AM		 4595 /* Try for long. */
4596 cons (4);
252b5132
RH		 4597}
4598
4599/* pseudo-op: .znop <symbol name>
4600 behaviour: Issue a nop instruction
b34976b6 4601 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4602 the supplied symbol name.
4603 errors: None
99a814a1
AM		 4604 warnings: Missing symbol name */
4605
252b5132 4606static void
98027b10 4607ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4608{
4609 unsigned long insn;
4610 const struct powerpc_opcode *opcode;
4611 expressionS ex;
4612 char *f;
252b5132 4613 symbolS *sym;
252b5132
RH		 4614 char *symbol_name;
4615 char c;
4616 char *name;
4617 unsigned int exp;
4618 flagword flags;
4619 asection *sec;
4620
99a814a1 4621 /* Strip out the symbol name. */
252b5132
RH		 4622 symbol_name = input_line_pointer;
4623 c = get_symbol_end ();
4624
4625 name = xmalloc (input_line_pointer - symbol_name + 1);
4626 strcpy (name, symbol_name);
4627
4628 sym = symbol_find_or_make (name);
4629
4630 *input_line_pointer = c;
4631
4632 SKIP_WHITESPACE ();
4633
4634 /* Look up the opcode in the hash table. */
4635 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4636
99a814a1 4637 /* Stick in the nop. */
252b5132
RH		 4638 insn = opcode->opcode;
4639
4640 /* Write out the instruction. */
4641 f = frag_more (4);
4642 md_number_to_chars (f, insn, 4);
4643 fix_new (frag_now,
4644 f - frag_now->fr_literal,
4645 4,
4646 sym,
4647 0,
4648 0,
4649 BFD_RELOC_16_GOT_PCREL);
4650
4651}
4652
81d4177b
KH		 4653/* pseudo-op:
4654 behaviour:
4655 errors:
99a814a1
AM		 4656 warnings: */
4657
252b5132 4658static void
98027b10 4659ppc_pe_comm (int lcomm)
252b5132 4660{
98027b10
AM		 4661 char *name;
4662 char c;
4663 char *p;
252b5132 4664 offsetT temp;
98027b10 4665 symbolS *symbolP;
252b5132
RH		 4666 offsetT align;
4667
4668 name = input_line_pointer;
4669 c = get_symbol_end ();
4670
99a814a1 4671 /* just after name is now '\0'. */
252b5132
RH		 4672 p = input_line_pointer;
4673 *p = c;
4674 SKIP_WHITESPACE ();
4675 if (*input_line_pointer != ',')
4676 {
4677 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4678 ignore_rest_of_line ();
4679 return;
4680 }
4681
4682 input_line_pointer++; /* skip ',' */
4683 if ((temp = get_absolute_expression ()) < 0)
4684 {
4685 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4686 ignore_rest_of_line ();
4687 return;
4688 }
4689
4690 if (! lcomm)
4691 {
4692 /* The third argument to .comm is the alignment. */
4693 if (*input_line_pointer != ',')
4694 align = 3;
4695 else
4696 {
4697 ++input_line_pointer;
4698 align = get_absolute_expression ();
4699 if (align <= 0)
4700 {
4701 as_warn (_("ignoring bad alignment"));
4702 align = 3;
4703 }
4704 }
4705 }
4706
4707 *p = 0;
4708 symbolP = symbol_find_or_make (name);
4709
4710 *p = c;
4711 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4712 {
4713 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4714 S_GET_NAME (symbolP));
4715 ignore_rest_of_line ();
4716 return;
4717 }
4718
4719 if (S_GET_VALUE (symbolP))
4720 {
4721 if (S_GET_VALUE (symbolP) != (valueT) temp)
4722 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4723 S_GET_NAME (symbolP),
4724 (long) S_GET_VALUE (symbolP),
4725 (long) temp);
4726 }
4727 else
4728 {
4729 S_SET_VALUE (symbolP, (valueT) temp);
4730 S_SET_EXTERNAL (symbolP);
86ebace2 4731 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4732 }
4733
4734 demand_empty_rest_of_line ();
4735}
4736
4737/*
4738 * implement the .section pseudo op:
4739 * .section name {, "flags"}
4740 * ^ ^
4741 * | +--- optional flags: 'b' for bss
4742 * | 'i' for info
4743 * +-- section name 'l' for lib
4744 * 'n' for noload
4745 * 'o' for over
4746 * 'w' for data
4747 * 'd' (apparently m88k for data)
4748 * 'x' for text
4749 * But if the argument is not a quoted string, treat it as a
4750 * subsegment number.
4751 *
4752 * FIXME: this is a copy of the section processing from obj-coff.c, with
4753 * additions/changes for the moto-pas assembler support. There are three
4754 * categories:
4755 *
81d4177b 4756 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4757 * setting bits that bfd probably neither understands or uses. The
4758 * correct approach (?) will have to incorporate extra fields attached
4759 * to the section to hold the system specific stuff. (krk)
4760 *
4761 * Section Contents:
4762 * 'a' - unknown - referred to in documentation, but no definition supplied
4763 * 'c' - section has code
4764 * 'd' - section has initialized data
4765 * 'u' - section has uninitialized data
4766 * 'i' - section contains directives (info)
4767 * 'n' - section can be discarded
4768 * 'R' - remove section at link time
4769 *
4770 * Section Protection:
4771 * 'r' - section is readable
4772 * 'w' - section is writeable
4773 * 'x' - section is executable
4774 * 's' - section is sharable
4775 *
4776 * Section Alignment:
4777 * '0' - align to byte boundary
4778 * '1' - align to halfword undary
4779 * '2' - align to word boundary
4780 * '3' - align to doubleword boundary
4781 * '4' - align to quadword boundary
4782 * '5' - align to 32 byte boundary
4783 * '6' - align to 64 byte boundary
4784 *
4785 */
4786
4787void
98027b10 4788ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4789{
99a814a1 4790 /* Strip out the section name. */
252b5132
RH		 4791 char *section_name;
4792 char c;
4793 char *name;
4794 unsigned int exp;
4795 flagword flags;
4796 segT sec;
4797 int align;
4798
4799 section_name = input_line_pointer;
4800 c = get_symbol_end ();
4801
4802 name = xmalloc (input_line_pointer - section_name + 1);
4803 strcpy (name, section_name);
4804
4805 *input_line_pointer = c;
4806
4807 SKIP_WHITESPACE ();
4808
4809 exp = 0;
4810 flags = SEC_NO_FLAGS;
4811
4812 if (strcmp (name, ".idata$2") == 0)
4813 {
4814 align = 0;
4815 }
4816 else if (strcmp (name, ".idata$3") == 0)
4817 {
4818 align = 0;
4819 }
4820 else if (strcmp (name, ".idata$4") == 0)
4821 {
4822 align = 2;
4823 }
4824 else if (strcmp (name, ".idata$5") == 0)
4825 {
4826 align = 2;
4827 }
4828 else if (strcmp (name, ".idata$6") == 0)
4829 {
4830 align = 1;
4831 }
4832 else
99a814a1
AM		 4833 /* Default alignment to 16 byte boundary. */
4834 align = 4;
252b5132
RH		 4835
4836 if (*input_line_pointer == ',')
4837 {
4838 ++input_line_pointer;
4839 SKIP_WHITESPACE ();
4840 if (*input_line_pointer != '"')
4841 exp = get_absolute_expression ();
4842 else
4843 {
4844 ++input_line_pointer;
4845 while (*input_line_pointer != '"'
4846 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4847 {
4848 switch (*input_line_pointer)
4849 {
4850 /* Section Contents */
4851 case 'a': /* unknown */
4852 as_bad (_("Unsupported section attribute -- 'a'"));
4853 break;
4854 case 'c': /* code section */
81d4177b 4855 flags |= SEC_CODE;
252b5132
RH		 4856 break;
4857 case 'd': /* section has initialized data */
4858 flags |= SEC_DATA;
4859 break;
4860 case 'u': /* section has uninitialized data */
4861 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4862 in winnt.h */
4863 flags |= SEC_ROM;
4864 break;
4865 case 'i': /* section contains directives (info) */
4866 /* FIXME: This is IMAGE_SCN_LNK_INFO
4867 in winnt.h */
4868 flags |= SEC_HAS_CONTENTS;
4869 break;
4870 case 'n': /* section can be discarded */
81d4177b 4871 flags &=~ SEC_LOAD;
252b5132
RH		 4872 break;
4873 case 'R': /* Remove section at link time */
4874 flags |= SEC_NEVER_LOAD;
4875 break;
8d452c78 4876#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4877 /* Section Protection */
4878 case 'r': /* section is readable */
4879 flags |= IMAGE_SCN_MEM_READ;
4880 break;
4881 case 'w': /* section is writeable */
4882 flags |= IMAGE_SCN_MEM_WRITE;
4883 break;
4884 case 'x': /* section is executable */
4885 flags |= IMAGE_SCN_MEM_EXECUTE;
4886 break;
4887 case 's': /* section is sharable */
4888 flags |= IMAGE_SCN_MEM_SHARED;
4889 break;
4890
4891 /* Section Alignment */
4892 case '0': /* align to byte boundary */
4893 flags |= IMAGE_SCN_ALIGN_1BYTES;
4894 align = 0;
4895 break;
4896 case '1': /* align to halfword boundary */
4897 flags |= IMAGE_SCN_ALIGN_2BYTES;
4898 align = 1;
4899 break;
4900 case '2': /* align to word boundary */
4901 flags |= IMAGE_SCN_ALIGN_4BYTES;
4902 align = 2;
4903 break;
4904 case '3': /* align to doubleword boundary */
4905 flags |= IMAGE_SCN_ALIGN_8BYTES;
4906 align = 3;
4907 break;
4908 case '4': /* align to quadword boundary */
4909 flags |= IMAGE_SCN_ALIGN_16BYTES;
4910 align = 4;
4911 break;
4912 case '5': /* align to 32 byte boundary */
4913 flags |= IMAGE_SCN_ALIGN_32BYTES;
4914 align = 5;
4915 break;
4916 case '6': /* align to 64 byte boundary */
4917 flags |= IMAGE_SCN_ALIGN_64BYTES;
4918 align = 6;
4919 break;
8d452c78 4920#endif
252b5132 4921 default:
99a814a1
AM		 4922 as_bad (_("unknown section attribute '%c'"),
4923 *input_line_pointer);
252b5132
RH		 4924 break;
4925 }
4926 ++input_line_pointer;
4927 }
4928 if (*input_line_pointer == '"')
4929 ++input_line_pointer;
4930 }
4931 }
4932
4933 sec = subseg_new (name, (subsegT) exp);
4934
99a814a1 4935 ppc_set_current_section (sec);
252b5132
RH		 4936
4937 if (flags != SEC_NO_FLAGS)
4938 {
4939 if (! bfd_set_section_flags (stdoutput, sec, flags))
4940 as_bad (_("error setting flags for \"%s\": %s"),
4941 bfd_section_name (stdoutput, sec),
4942 bfd_errmsg (bfd_get_error ()));
4943 }
4944
99a814a1 4945 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4946}
4947
4948static void
98027b10 4949ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4950{
4951 char *name;
4952 char endc;
4953 symbolS *ext_sym;
4954
4955 name = input_line_pointer;
4956 endc = get_symbol_end ();
4957
4958 ext_sym = symbol_find_or_make (name);
4959
4960 *input_line_pointer = endc;
4961
4962 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4963 SF_SET_FUNCTION (ext_sym);
4964 SF_SET_PROCESS (ext_sym);
4965 coff_add_linesym (ext_sym);
4966
4967 demand_empty_rest_of_line ();
4968}
4969
4970static void
98027b10 4971ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4972{
4973 if (tocdata_section == 0)
4974 {
4975 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4976 /* FIXME: section flags won't work. */
252b5132
RH		 4977 bfd_set_section_flags (stdoutput, tocdata_section,
4978 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4979 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4980
4981 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4982 }
4983 else
4984 {
4985 rdata_section = subseg_new (".tocd", 0);
4986 }
4987
99a814a1 4988 ppc_set_current_section (tocdata_section);
252b5132
RH		 4989
4990 demand_empty_rest_of_line ();
4991}
4992
4993/* Don't adjust TOC relocs to use the section symbol. */
4994
4995int
98027b10 4996ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4997{
4998 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4999}
5000
5001#endif
5002\f
5003#ifdef OBJ_XCOFF
5004
5005/* XCOFF specific symbol and file handling. */
5006
5007/* Canonicalize the symbol name. We use the to force the suffix, if
5008 any, to use square brackets, and to be in upper case. */
5009
5010char *
98027b10 5011ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5012{
5013 char *s;
5014
5015 if (ppc_stab_symbol)
5016 return name;
5017
5018 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5019 ;
5020 if (*s != '\0')
5021 {
5022 char brac;
5023
5024 if (*s == '[')
5025 brac = ']';
5026 else
5027 {
5028 *s = '[';
5029 brac = '}';
5030 }
5031
5032 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5033 *s = TOUPPER (*s);
252b5132
RH		 5034
5035 if (*s == '\0' || s[1] != '\0')
5036 as_bad (_("bad symbol suffix"));
5037
5038 *s = ']';
5039 }
5040
5041 return name;
5042}
5043
5044/* Set the class of a symbol based on the suffix, if any. This is
5045 called whenever a new symbol is created. */
5046
5047void
98027b10 5048ppc_symbol_new_hook (symbolS *sym)
252b5132 5049{
809ffe0d 5050 struct ppc_tc_sy *tc;
252b5132
RH		 5051 const char *s;
5052
809ffe0d
ILT		 5053 tc = symbol_get_tc (sym);
5054 tc->next = NULL;
5055 tc->output = 0;
96d56e9f 5056 tc->symbol_class = -1;
809ffe0d
ILT		 5057 tc->real_name = NULL;
5058 tc->subseg = 0;
5059 tc->align = 0;
5060 tc->size = NULL;
5061 tc->within = NULL;
252b5132
RH		 5062
5063 if (ppc_stab_symbol)
5064 return;
5065
5066 s = strchr (S_GET_NAME (sym), '[');
5067 if (s == (const char *) NULL)
5068 {
5069 /* There is no suffix. */
5070 return;
5071 }
5072
5073 ++s;
5074
5075 switch (s[0])
5076 {
5077 case 'B':
5078 if (strcmp (s, "BS]") == 0)
96d56e9f 5079 tc->symbol_class = XMC_BS;
252b5132
RH		 5080 break;
5081 case 'D':
5082 if (strcmp (s, "DB]") == 0)
96d56e9f 5083 tc->symbol_class = XMC_DB;
252b5132 5084 else if (strcmp (s, "DS]") == 0)
96d56e9f 5085 tc->symbol_class = XMC_DS;
252b5132
RH		 5086 break;
5087 case 'G':
5088 if (strcmp (s, "GL]") == 0)
96d56e9f 5089 tc->symbol_class = XMC_GL;
252b5132
RH		 5090 break;
5091 case 'P':
5092 if (strcmp (s, "PR]") == 0)
96d56e9f 5093 tc->symbol_class = XMC_PR;
252b5132
RH		 5094 break;
5095 case 'R':
5096 if (strcmp (s, "RO]") == 0)
96d56e9f 5097 tc->symbol_class = XMC_RO;
252b5132 5098 else if (strcmp (s, "RW]") == 0)
96d56e9f 5099 tc->symbol_class = XMC_RW;
252b5132
RH		 5100 break;
5101 case 'S':
5102 if (strcmp (s, "SV]") == 0)
96d56e9f 5103 tc->symbol_class = XMC_SV;
252b5132
RH		 5104 break;
5105 case 'T':
5106 if (strcmp (s, "TC]") == 0)
96d56e9f 5107 tc->symbol_class = XMC_TC;
252b5132 5108 else if (strcmp (s, "TI]") == 0)
96d56e9f 5109 tc->symbol_class = XMC_TI;
252b5132 5110 else if (strcmp (s, "TB]") == 0)
96d56e9f 5111 tc->symbol_class = XMC_TB;
252b5132 5112 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5113 tc->symbol_class = XMC_TC0;
252b5132
RH		 5114 break;
5115 case 'U':
5116 if (strcmp (s, "UA]") == 0)
96d56e9f 5117 tc->symbol_class = XMC_UA;
252b5132 5118 else if (strcmp (s, "UC]") == 0)
96d56e9f 5119 tc->symbol_class = XMC_UC;
252b5132
RH		 5120 break;
5121 case 'X':
5122 if (strcmp (s, "XO]") == 0)
96d56e9f 5123 tc->symbol_class = XMC_XO;
252b5132
RH		 5124 break;
5125 }
5126
96d56e9f 5127 if (tc->symbol_class == -1)
252b5132
RH		 5128 as_bad (_("Unrecognized symbol suffix"));
5129}
5130
5131/* Set the class of a label based on where it is defined. This
5132 handles symbols without suffixes. Also, move the symbol so that it
5133 follows the csect symbol. */
5134
5135void
98027b10 5136ppc_frob_label (symbolS *sym)
252b5132
RH		 5137{
5138 if (ppc_current_csect != (symbolS *) NULL)
5139 {
96d56e9f
NC		 5140 if (symbol_get_tc (sym)->symbol_class == -1)
5141 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5142
5143 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5144 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5145 &symbol_rootP, &symbol_lastP);
5146 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 5147 }
07a53e5c
RH		 5148
5149#ifdef OBJ_ELF
5150 dwarf2_emit_label (sym);
5151#endif
252b5132
RH		 5152}
5153
5154/* This variable is set by ppc_frob_symbol if any absolute symbols are
5155 seen. It tells ppc_adjust_symtab whether it needs to look through
5156 the symbols. */
5157
b34976b6 5158static bfd_boolean ppc_saw_abs;
252b5132
RH		 5159
5160/* Change the name of a symbol just before writing it out. Set the
5161 real name if the .rename pseudo-op was used. Otherwise, remove any
5162 class suffix. Return 1 if the symbol should not be included in the
5163 symbol table. */
5164
5165int
98027b10 5166ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5167{
5168 static symbolS *ppc_last_function;
5169 static symbolS *set_end;
5170
5171 /* Discard symbols that should not be included in the output symbol
5172 table. */
809ffe0d
ILT		 5173 if (! symbol_used_in_reloc_p (sym)
5174 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5175 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5176 && ! symbol_get_tc (sym)->output
252b5132
RH		 5177 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5178 return 1;
5179
a161fe53
AM		 5180 /* This one will disappear anyway. Don't make a csect sym for it. */
5181 if (sym == abs_section_sym)
5182 return 1;
5183
809ffe0d
ILT		 5184 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5185 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5186 else
5187 {
5188 const char *name;
5189 const char *s;
5190
5191 name = S_GET_NAME (sym);
5192 s = strchr (name, '[');
5193 if (s != (char *) NULL)
5194 {
5195 unsigned int len;
5196 char *snew;
5197
5198 len = s - name;
5199 snew = xmalloc (len + 1);
5200 memcpy (snew, name, len);
5201 snew[len] = '\0';
5202
5203 S_SET_NAME (sym, snew);
5204 }
5205 }
5206
5207 if (set_end != (symbolS *) NULL)
5208 {
5209 SA_SET_SYM_ENDNDX (set_end, sym);
5210 set_end = NULL;
5211 }
5212
5213 if (SF_GET_FUNCTION (sym))
5214 {
5215 if (ppc_last_function != (symbolS *) NULL)
5216 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5217 ppc_last_function = sym;
809ffe0d 5218 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5219 {
6386f3a7 5220 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5221 SA_SET_SYM_FSIZE (sym,
5222 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5223 }
5224 }
5225 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5226 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5227 {
5228 if (ppc_last_function == (symbolS *) NULL)
5229 as_bad (_(".ef with no preceding .function"));
5230 else
5231 {
5232 set_end = ppc_last_function;
5233 ppc_last_function = NULL;
5234
5235 /* We don't have a C_EFCN symbol, but we need to force the
5236 COFF backend to believe that it has seen one. */
5237 coff_last_function = NULL;
5238 }
5239 }
5240
670ec21d 5241 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5242 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5243 && S_GET_STORAGE_CLASS (sym) != C_FILE
5244 && S_GET_STORAGE_CLASS (sym) != C_FCN
5245 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5246 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5247 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5248 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5249 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5250 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5251 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5252
5253 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5254 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5255 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5256 {
5257 int i;
5258 union internal_auxent *a;
5259
5260 /* Create a csect aux. */
5261 i = S_GET_NUMBER_AUXILIARY (sym);
5262 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5263 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5264 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5265 {
5266 /* This is the TOC table. */
5267 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5268 a->x_csect.x_scnlen.l = 0;
5269 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5270 }
809ffe0d 5271 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5272 {
5273 /* This is a csect symbol. x_scnlen is the size of the
5274 csect. */
809ffe0d 5275 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5276 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5277 S_GET_SEGMENT (sym))
5278 - S_GET_VALUE (sym));
5279 else
5280 {
6386f3a7 5281 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5282 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5283 - S_GET_VALUE (sym));
5284 }
809ffe0d 5285 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5286 }
5287 else if (S_GET_SEGMENT (sym) == bss_section)
5288 {
5289 /* This is a common symbol. */
809ffe0d
ILT		 5290 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5291 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5292 if (S_IS_EXTERNAL (sym))
96d56e9f 5293 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5294 else
96d56e9f 5295 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5296 }
5297 else if (S_GET_SEGMENT (sym) == absolute_section)
5298 {
5299 /* This is an absolute symbol. The csect will be created by
99a814a1 5300 ppc_adjust_symtab. */
b34976b6 5301 ppc_saw_abs = TRUE;
252b5132 5302 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5303 if (symbol_get_tc (sym)->symbol_class == -1)
5304 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5305 }
5306 else if (! S_IS_DEFINED (sym))
5307 {
5308 /* This is an external symbol. */
5309 a->x_csect.x_scnlen.l = 0;
5310 a->x_csect.x_smtyp = XTY_ER;
5311 }
96d56e9f 5312 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5313 {
5314 symbolS *next;
5315
5316 /* This is a TOC definition. x_scnlen is the size of the
5317 TOC entry. */
5318 next = symbol_next (sym);
96d56e9f 5319 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5320 next = symbol_next (next);
5321 if (next == (symbolS *) NULL
96d56e9f 5322 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5323 {
5324 if (ppc_after_toc_frag == (fragS *) NULL)
5325 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5326 data_section)
5327 - S_GET_VALUE (sym));
5328 else
5329 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5330 - S_GET_VALUE (sym));
5331 }
5332 else
5333 {
6386f3a7 5334 resolve_symbol_value (next);
252b5132
RH		 5335 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5336 - S_GET_VALUE (sym));
5337 }
5338 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5339 }
5340 else
5341 {
5342 symbolS *csect;
5343
5344 /* This is a normal symbol definition. x_scnlen is the
5345 symbol index of the containing csect. */
5346 if (S_GET_SEGMENT (sym) == text_section)
5347 csect = ppc_text_csects;
5348 else if (S_GET_SEGMENT (sym) == data_section)
5349 csect = ppc_data_csects;
5350 else
5351 abort ();
5352
5353 /* Skip the initial dummy symbol. */
809ffe0d 5354 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5355
5356 if (csect == (symbolS *) NULL)
5357 {
5358 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5359 a->x_csect.x_scnlen.l = 0;
5360 }
5361 else
5362 {
809ffe0d 5363 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5364 {
6386f3a7 5365 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5366 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5367 > S_GET_VALUE (sym))
252b5132 5368 break;
809ffe0d 5369 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5370 }
5371
809ffe0d
ILT		 5372 a->x_csect.x_scnlen.p =
5373 coffsymbol (symbol_get_bfdsym (csect))->native;
5374 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5375 1;
252b5132
RH		 5376 }
5377 a->x_csect.x_smtyp = XTY_LD;
5378 }
81d4177b 5379
252b5132
RH		 5380 a->x_csect.x_parmhash = 0;
5381 a->x_csect.x_snhash = 0;
96d56e9f 5382 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5383 a->x_csect.x_smclas = XMC_PR;
5384 else
96d56e9f 5385 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5386 a->x_csect.x_stab = 0;
5387 a->x_csect.x_snstab = 0;
5388
5389 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5390 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5391 }
5392 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5393 {
5394 /* We want the value to be the symbol index of the referenced
5395 csect symbol. BFD will do that for us if we set the right
5396 flags. */
b782de16
AM		 5397 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5398 combined_entry_type *c = coffsymbol (bsym)->native;
5399
5400 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5401 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5402 }
5403 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5404 {
5405 symbolS *block;
c734e7e3 5406 valueT base;
252b5132 5407
809ffe0d 5408 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5409 if (block)
5410 {
5411 /* The value is the offset from the enclosing csect. */
5412 symbolS *csect;
5413
5414 csect = symbol_get_tc (block)->within;
5415 resolve_symbol_value (csect);
5416 base = S_GET_VALUE (csect);
5417 }
5418 else
5419 base = 0;
5420
5421 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 5422 }
5423 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5424 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5425 {
5426 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5427 BFD will do that for us if we set the right flags. We have
5428 already set the value correctly. */
809ffe0d 5429 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5430 }
5431
5432 return 0;
5433}
5434
5435/* Adjust the symbol table. This creates csect symbols for all
5436 absolute symbols. */
5437
5438void
98027b10 5439ppc_adjust_symtab (void)
252b5132
RH		 5440{
5441 symbolS *sym;
5442
5443 if (! ppc_saw_abs)
5444 return;
5445
5446 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5447 {
5448 symbolS *csect;
5449 int i;
5450 union internal_auxent *a;
5451
5452 if (S_GET_SEGMENT (sym) != absolute_section)
5453 continue;
5454
5455 csect = symbol_create (".abs[XO]", absolute_section,
5456 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5457 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5458 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5459 i = S_GET_NUMBER_AUXILIARY (csect);
5460 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5461 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5462 a->x_csect.x_scnlen.l = 0;
5463 a->x_csect.x_smtyp = XTY_SD;
5464 a->x_csect.x_parmhash = 0;
5465 a->x_csect.x_snhash = 0;
5466 a->x_csect.x_smclas = XMC_XO;
5467 a->x_csect.x_stab = 0;
5468 a->x_csect.x_snstab = 0;
5469
5470 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5471
5472 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5473 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5474 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5475 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5476 }
5477
b34976b6 5478 ppc_saw_abs = FALSE;
252b5132
RH		 5479}
5480
5481/* Set the VMA for a section. This is called on all the sections in
5482 turn. */
5483
5484void
98027b10 5485ppc_frob_section (asection *sec)
252b5132 5486{
931e13a6 5487 static bfd_vma vma = 0;
252b5132 5488
931e13a6 5489 vma = md_section_align (sec, vma);
252b5132
RH		 5490 bfd_set_section_vma (stdoutput, sec, vma);
5491 vma += bfd_section_size (stdoutput, sec);
5492}
5493
5494#endif /* OBJ_XCOFF */
5495\f
252b5132 5496char *
98027b10 5497md_atof (int type, char *litp, int *sizep)
252b5132 5498{
499ac353 5499 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5500}
5501
5502/* Write a value out to the object file, using the appropriate
5503 endianness. */
5504
5505void
98027b10 5506md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5507{
5508 if (target_big_endian)
5509 number_to_chars_bigendian (buf, val, n);
5510 else
5511 number_to_chars_littleendian (buf, val, n);
5512}
5513
5514/* Align a section (I don't know why this is machine dependent). */
5515
5516valueT
3aeeedbb 5517md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5518{
3aeeedbb
AM		 5519#ifdef OBJ_ELF
5520 return addr;
5521#else
252b5132
RH		 5522 int align = bfd_get_section_alignment (stdoutput, seg);
5523
5524 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5525#endif
252b5132
RH		 5526}
5527
5528/* We don't have any form of relaxing. */
5529
5530int
98027b10
AM		 5531md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5532 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5533{
5534 abort ();
5535 return 0;
5536}
5537
5538/* Convert a machine dependent frag. We never generate these. */
5539
5540void
98027b10
AM		 5541md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5542 asection *sec ATTRIBUTE_UNUSED,
5543 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5544{
5545 abort ();
5546}
5547
5548/* We have no need to default values of symbols. */
5549
252b5132 5550symbolS *
98027b10 5551md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5552{
5553 return 0;
5554}
5555\f
5556/* Functions concerning relocs. */
5557
5558/* The location from which a PC relative jump should be calculated,
5559 given a PC relative reloc. */
5560
5561long
98027b10 5562md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5563{
5564 return fixp->fx_frag->fr_address + fixp->fx_where;
5565}
5566
5567#ifdef OBJ_XCOFF
5568
5569/* This is called to see whether a fixup should be adjusted to use a
5570 section symbol. We take the opportunity to change a fixup against
5571 a symbol in the TOC subsegment into a reloc against the
5572 corresponding .tc symbol. */
5573
5574int
98027b10 5575ppc_fix_adjustable (fixS *fix)
252b5132 5576{
b782de16
AM		 5577 valueT val = resolve_symbol_value (fix->fx_addsy);
5578 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5579 TC_SYMFIELD_TYPE *tc;
5580
5581 if (symseg == absolute_section)
5582 return 0;
252b5132 5583
252b5132 5584 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5585 && fix->fx_addsy != ppc_toc_csect
b782de16 5586 && symseg == data_section
252b5132
RH		 5587 && val >= ppc_toc_frag->fr_address
5588 && (ppc_after_toc_frag == (fragS *) NULL
5589 || val < ppc_after_toc_frag->fr_address))
5590 {
5591 symbolS *sy;
5592
5593 for (sy = symbol_next (ppc_toc_csect);
5594 sy != (symbolS *) NULL;
5595 sy = symbol_next (sy))
5596 {
b782de16
AM		 5597 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5598
96d56e9f 5599 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5600 continue;
96d56e9f 5601 if (sy_tc->symbol_class != XMC_TC)
252b5132 5602 break;
b782de16 5603 if (val == resolve_symbol_value (sy))
252b5132
RH		 5604 {
5605 fix->fx_addsy = sy;
5606 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5607 return 0;
5608 }
5609 }
5610
5611 as_bad_where (fix->fx_file, fix->fx_line,
5612 _("symbol in .toc does not match any .tc"));
5613 }
5614
5615 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5616 tc = symbol_get_tc (fix->fx_addsy);
5617 if (tc->subseg == 0
96d56e9f
NC		 5618 && tc->symbol_class != XMC_TC0
5619 && tc->symbol_class != XMC_TC
b782de16 5620 && symseg != bss_section
252b5132 5621 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5622 && (symseg != data_section
252b5132
RH		 5623 || ppc_toc_csect == NULL
5624 || val < ppc_toc_frag->fr_address
5625 || (ppc_after_toc_frag != NULL
5626 && val >= ppc_after_toc_frag->fr_address)))
5627 {
5628 symbolS *csect;
b782de16 5629 symbolS *next_csect;
252b5132 5630
b782de16 5631 if (symseg == text_section)
252b5132 5632 csect = ppc_text_csects;
b782de16 5633 else if (symseg == data_section)
252b5132
RH		 5634 csect = ppc_data_csects;
5635 else
5636 abort ();
5637
5638 /* Skip the initial dummy symbol. */
809ffe0d 5639 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5640
5641 if (csect != (symbolS *) NULL)
5642 {
b782de16
AM		 5643 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5644 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5645 {
5646 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5647 have to look through the full symbol table to see
5648 whether this is the csect we want. Note that we will
5649 only get here if the csect has zero length. */
b782de16
AM		 5650 if (symbol_get_frag (csect)->fr_address == val
5651 && S_GET_VALUE (csect) == val)
252b5132
RH		 5652 {
5653 symbolS *scan;
5654
809ffe0d 5655 for (scan = symbol_next (csect);
252b5132 5656 scan != NULL;
809ffe0d 5657 scan = symbol_next (scan))
252b5132 5658 {
809ffe0d 5659 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5660 break;
5661 if (scan == fix->fx_addsy)
5662 break;
5663 }
5664
5665 /* If we found the symbol before the next csect
99a814a1 5666 symbol, then this is the csect we want. */
252b5132
RH		 5667 if (scan == fix->fx_addsy)
5668 break;
5669 }
5670
b782de16 5671 csect = next_csect;
252b5132
RH		 5672 }
5673
b782de16 5674 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5675 fix->fx_addsy = csect;
5676 }
b782de16 5677 return 0;
252b5132
RH		 5678 }
5679
5680 /* Adjust a reloc against a .lcomm symbol to be against the base
5681 .lcomm. */
b782de16 5682 if (symseg == bss_section
252b5132
RH		 5683 && ! S_IS_EXTERNAL (fix->fx_addsy))
5684 {
b782de16
AM		 5685 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5686
5687 fix->fx_offset += val - resolve_symbol_value (sy);
5688 fix->fx_addsy = sy;
252b5132
RH		 5689 }
5690
5691 return 0;
5692}
5693
5694/* A reloc from one csect to another must be kept. The assembler
5695 will, of course, keep relocs between sections, and it will keep
5696 absolute relocs, but we need to force it to keep PC relative relocs
5697 between two csects in the same section. */
5698
5699int
98027b10 5700ppc_force_relocation (fixS *fix)
252b5132
RH		 5701{
5702 /* At this point fix->fx_addsy should already have been converted to
5703 a csect symbol. If the csect does not include the fragment, then
5704 we need to force the relocation. */
5705 if (fix->fx_pcrel
5706 && fix->fx_addsy != NULL
809ffe0d
ILT		 5707 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5708 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5709 > fix->fx_frag->fr_address)
5710 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5711 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5712 <= fix->fx_frag->fr_address))))
5713 return 1;
5714
ae6063d4 5715 return generic_force_reloc (fix);
252b5132
RH		 5716}
5717
5718#endif /* OBJ_XCOFF */
5719
0baf16f2 5720#ifdef OBJ_ELF
a161fe53
AM		 5721/* If this function returns non-zero, it guarantees that a relocation
5722 will be emitted for a fixup. */
5723
5724int
98027b10 5725ppc_force_relocation (fixS *fix)
a161fe53
AM		 5726{
5727 /* Branch prediction relocations must force a relocation, as must
5728 the vtable description relocs. */
5729 switch (fix->fx_r_type)
5730 {
5731 case BFD_RELOC_PPC_B16_BRTAKEN:
5732 case BFD_RELOC_PPC_B16_BRNTAKEN:
5733 case BFD_RELOC_PPC_BA16_BRTAKEN:
5734 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5735 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5736 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5737 return 1;
5738 default:
5739 break;
5740 }
5741
cdba85ec
AM		 5742 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5743 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5744 return 1;
5745
ae6063d4 5746 return generic_force_reloc (fix);
a161fe53
AM		 5747}
5748
0baf16f2 5749int
98027b10 5750ppc_fix_adjustable (fixS *fix)
252b5132 5751{
0baf16f2
AM		 5752 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5753 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5754 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5755 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 5756 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
5757 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 5758 && fix->fx_r_type != BFD_RELOC_GPREL16
5759 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5760 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5761 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5762 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5763}
0baf16f2 5764#endif
252b5132 5765
3aeeedbb
AM		 5766/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5767 rs_align_code frag. */
5768
5769void
5770ppc_handle_align (struct frag *fragP)
5771{
5772 valueT count = (fragP->fr_next->fr_address
5773 - (fragP->fr_address + fragP->fr_fix));
5774
5775 if (count != 0 && (count & 3) == 0)
5776 {
5777 char *dest = fragP->fr_literal + fragP->fr_fix;
5778
5779 fragP->fr_var = 4;
cef4f754
AM		 5780
5781 if (count > 4 * nop_limit && count < 0x2000000)
5782 {
5783 struct frag *rest;
5784
5785 /* Make a branch, then follow with nops. Insert another
5786 frag to handle the nops. */
5787 md_number_to_chars (dest, 0x48000000 + count, 4);
5788 count -= 4;
5789 if (count == 0)
5790 return;
5791
5792 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5793 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
5794 fragP->fr_next = rest;
5795 fragP = rest;
5796 rest->fr_address += rest->fr_fix + 4;
5797 rest->fr_fix = 0;
5798 /* If we leave the next frag as rs_align_code we'll come here
5799 again, resulting in a bunch of branches rather than a
5800 branch followed by nops. */
5801 rest->fr_type = rs_align;
5802 dest = rest->fr_literal;
5803 }
5804
3aeeedbb
AM		 5805 md_number_to_chars (dest, 0x60000000, 4);
5806
42240548
PB		 5807 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5808 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 5809 {
42240548
PB		 5810 /* For power6 and power7, we want the last nop to be a group
5811 terminating one. Do this by inserting an rs_fill frag immediately
5812 after this one, with its address set to the last nop location.
5813 This will automatically reduce the number of nops in the current
5814 frag by one. */
3aeeedbb
AM		 5815 if (count > 4)
5816 {
5817 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5818
5819 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5820 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5821 group_nop->fr_fix = 0;
5822 group_nop->fr_offset = 1;
5823 group_nop->fr_type = rs_fill;
5824 fragP->fr_next = group_nop;
5825 dest = group_nop->fr_literal;
5826 }
5827
42240548
PB		 5828 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
5829 /* power7 group terminating nop: "ori 2,2,0". */
5830 md_number_to_chars (dest, 0x60420000, 4);
5831 else
5832 /* power6 group terminating nop: "ori 1,1,0". */
5833 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 5834 }
5835 }
5836}
5837
252b5132
RH		 5838/* Apply a fixup to the object code. This is called for all the
5839 fixups we generated by the call to fix_new_exp, above. In the call
5840 above we used a reloc code which was the largest legal reloc code
5841 plus the operand index. Here we undo that to recover the operand
5842 index. At this point all symbol values should be fully resolved,
5843 and we attempt to completely resolve the reloc. If we can not do
5844 that, we determine the correct reloc code and put it back in the
5845 fixup. */
5846
94f592af 5847void
98027b10 5848md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5849{
94f592af 5850 valueT value = * valP;
252b5132
RH		 5851
5852#ifdef OBJ_ELF
94f592af 5853 if (fixP->fx_addsy != NULL)
252b5132 5854 {
a161fe53 5855 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5856 if (fixP->fx_pcrel)
5857 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5858 }
5859 else
94f592af 5860 fixP->fx_done = 1;
252b5132 5861#else
a161fe53 5862 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5863 the symbol values. If we are doing this relocation the code in
5864 write.c is going to call bfd_install_relocation, which is also
5865 going to use the symbol value. That means that if the reloc is
5866 fully resolved we want to use *valP since bfd_install_relocation is
5867 not being used.
9f0eb232
RS		 5868 However, if the reloc is not fully resolved we do not want to
5869 use *valP, and must use fx_offset instead. If the relocation
5870 is PC-relative, we then need to re-apply md_pcrel_from_section
5871 to this new relocation value. */
94f592af
NC		 5872 if (fixP->fx_addsy == (symbolS *) NULL)
5873 fixP->fx_done = 1;
5874
252b5132 5875 else
9f0eb232
RS		 5876 {
5877 value = fixP->fx_offset;
5878 if (fixP->fx_pcrel)
5879 value -= md_pcrel_from_section (fixP, seg);
5880 }
a161fe53
AM		 5881#endif
5882
5883 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5884 {
a161fe53
AM		 5885 /* We can't actually support subtracting a symbol. */
5886 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5887 }
252b5132 5888
94f592af 5889 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5890 {
5891 int opindex;
5892 const struct powerpc_operand *operand;
5893 char *where;
5894 unsigned long insn;
5895
94f592af 5896 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5897
5898 operand = &powerpc_operands[opindex];
5899
5900#ifdef OBJ_XCOFF
0baf16f2
AM		 5901 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5902 does not generate a reloc. It uses the offset of `sym' within its
5903 csect. Other usages, such as `.long sym', generate relocs. This
5904 is the documented behaviour of non-TOC symbols. */
252b5132 5905 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5906 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5907 && operand->shift == 0
2b3c4602 5908 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5909 && fixP->fx_addsy != NULL
5910 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 5911 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
5912 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 5913 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5914 {
94f592af
NC		 5915 value = fixP->fx_offset;
5916 fixP->fx_done = 1;
252b5132
RH		 5917 }
5918#endif
5919
5920 /* Fetch the instruction, insert the fully resolved operand
5921 value, and stuff the instruction back again. */
94f592af 5922 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5923 if (target_big_endian)
5924 insn = bfd_getb32 ((unsigned char *) where);
5925 else
5926 insn = bfd_getl32 ((unsigned char *) where);
5927 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5928 fixP->tc_fix_data.ppc_cpu,
94f592af 5929 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5930 if (target_big_endian)
5931 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5932 else
5933 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5934
94f592af
NC		 5935 if (fixP->fx_done)
5936 /* Nothing else to do here. */
5937 return;
252b5132 5938
9c2799c2 5939 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 5940
252b5132
RH		 5941 /* Determine a BFD reloc value based on the operand information.
5942 We are only prepared to turn a few of the operands into
0baf16f2 5943 relocs. */
11b37b7b 5944 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5945 && operand->bitm == 0x3fffffc
11b37b7b 5946 && operand->shift == 0)
94f592af 5947 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5948 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5949 && operand->bitm == 0xfffc
11b37b7b 5950 && operand->shift == 0)
95210096
AM		 5951 {
5952 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5953#ifdef OBJ_XCOFF
5954 fixP->fx_size = 2;
5955 if (target_big_endian)
5956 fixP->fx_where += 2;
5957#endif
5958 }
11b37b7b 5959 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5960 && operand->bitm == 0x3fffffc
11b37b7b 5961 && operand->shift == 0)
94f592af 5962 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5963 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5964 && operand->bitm == 0xfffc
11b37b7b 5965 && operand->shift == 0)
95210096
AM		 5966 {
5967 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5968#ifdef OBJ_XCOFF
5969 fixP->fx_size = 2;
5970 if (target_big_endian)
5971 fixP->fx_where += 2;
5972#endif
5973 }
0baf16f2 5974#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5975 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5976 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5977 && operand->shift == 0)
11b37b7b 5978 {
a7fc733f
AM		 5979 if (ppc_is_toc_sym (fixP->fx_addsy))
5980 {
5981 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5982#ifdef OBJ_ELF
a7fc733f
AM		 5983 if (ppc_obj64
5984 && (operand->flags & PPC_OPERAND_DS) != 0)
5985 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5986#endif
5987 }
5988 else
5989 {
5990 fixP->fx_r_type = BFD_RELOC_16;
5991#ifdef OBJ_ELF
5992 if (ppc_obj64
5993 && (operand->flags & PPC_OPERAND_DS) != 0)
5994 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5995#endif
a7fc733f 5996 }
94f592af 5997 fixP->fx_size = 2;
11b37b7b 5998 if (target_big_endian)
94f592af 5999 fixP->fx_where += 2;
11b37b7b 6000 }
0baf16f2 6001#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 6002 else
252b5132
RH		 6003 {
6004 char *sfile;
6005 unsigned int sline;
6006
6007 /* Use expr_symbol_where to see if this is an expression
0baf16f2 6008 symbol. */
94f592af
NC		 6009 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6010 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 6011 _("unresolved expression that must be resolved"));
6012 else
94f592af 6013 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 6014 _("unsupported relocation against %s"),
94f592af
NC		 6015 S_GET_NAME (fixP->fx_addsy));
6016 fixP->fx_done = 1;
6017 return;
252b5132
RH		 6018 }
6019 }
6020 else
6021 {
6022#ifdef OBJ_ELF
94f592af 6023 ppc_elf_validate_fix (fixP, seg);
252b5132 6024#endif
94f592af 6025 switch (fixP->fx_r_type)
252b5132 6026 {
252b5132 6027 case BFD_RELOC_CTOR:
2b3c4602 6028 if (ppc_obj64)
9c7977b3
AM		 6029 goto ctor64;
6030 /* fall through */
6031
0baf16f2 6032 case BFD_RELOC_32:
94f592af
NC		 6033 if (fixP->fx_pcrel)
6034 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 6035 /* fall through */
252b5132
RH		 6036
6037 case BFD_RELOC_RVA:
6038 case BFD_RELOC_32_PCREL:
252b5132 6039 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 6040 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6041 value, 4);
6042 break;
6043
7f6d05e8 6044 case BFD_RELOC_64:
9c7977b3 6045 ctor64:
94f592af
NC		 6046 if (fixP->fx_pcrel)
6047 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 6048 /* fall through */
0baf16f2 6049
7f6d05e8 6050 case BFD_RELOC_64_PCREL:
94f592af 6051 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 6052 value, 8);
81d4177b 6053 break;
0baf16f2 6054
252b5132
RH		 6055 case BFD_RELOC_GPREL16:
6056 case BFD_RELOC_16_GOT_PCREL:
6057 case BFD_RELOC_16_GOTOFF:
6058 case BFD_RELOC_LO16_GOTOFF:
6059 case BFD_RELOC_HI16_GOTOFF:
6060 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 6061 case BFD_RELOC_16_BASEREL:
252b5132
RH		 6062 case BFD_RELOC_LO16_BASEREL:
6063 case BFD_RELOC_HI16_BASEREL:
6064 case BFD_RELOC_HI16_S_BASEREL:
6065 case BFD_RELOC_PPC_EMB_NADDR16:
6066 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6067 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6068 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6069 case BFD_RELOC_PPC_EMB_SDAI16:
6070 case BFD_RELOC_PPC_EMB_SDA2REL:
6071 case BFD_RELOC_PPC_EMB_SDA2I16:
6072 case BFD_RELOC_PPC_EMB_RELSEC16:
6073 case BFD_RELOC_PPC_EMB_RELST_LO:
6074 case BFD_RELOC_PPC_EMB_RELST_HI:
6075 case BFD_RELOC_PPC_EMB_RELST_HA:
6076 case BFD_RELOC_PPC_EMB_RELSDA:
6077 case BFD_RELOC_PPC_TOC16:
0baf16f2 6078#ifdef OBJ_ELF
0baf16f2
AM		 6079 case BFD_RELOC_PPC64_TOC16_LO:
6080 case BFD_RELOC_PPC64_TOC16_HI:
6081 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 6082#endif
94f592af 6083 if (fixP->fx_pcrel)
252b5132 6084 {
94f592af
NC		 6085 if (fixP->fx_addsy != NULL)
6086 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6087 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 6088 bfd_get_reloc_code_name (fixP->fx_r_type),
6089 S_GET_NAME (fixP->fx_addsy));
252b5132 6090 else
94f592af 6091 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6092 _("cannot emit PC relative %s relocation"),
94f592af 6093 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 6094 }
6095
94f592af 6096 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6097 value, 2);
6098 break;
6099
3c9d25f4
AM		 6100 case BFD_RELOC_16:
6101 if (fixP->fx_pcrel)
6102 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6103 /* fall through */
6104
6105 case BFD_RELOC_16_PCREL:
6106 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6107 value, 2);
6108 break;
6109
6110 case BFD_RELOC_LO16:
6111 if (fixP->fx_pcrel)
6112 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6113 /* fall through */
6114
6115 case BFD_RELOC_LO16_PCREL:
6116 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6117 value, 2);
6118 break;
6119
252b5132
RH		 6120 /* This case happens when you write, for example,
6121 lis %r3,(L1-L2)@ha
6122 where L1 and L2 are defined later. */
6123 case BFD_RELOC_HI16:
94f592af 6124 if (fixP->fx_pcrel)
3c9d25f4
AM		 6125 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6126 /* fall through */
6127
6128 case BFD_RELOC_HI16_PCREL:
94f592af 6129 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6130 PPC_HI (value), 2);
252b5132 6131 break;
0baf16f2 6132
252b5132 6133 case BFD_RELOC_HI16_S:
94f592af 6134 if (fixP->fx_pcrel)
3c9d25f4
AM		 6135 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6136 /* fall through */
6137
6138 case BFD_RELOC_HI16_S_PCREL:
94f592af 6139 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6140 PPC_HA (value), 2);
6141 break;
6142
c865e45b
RS		 6143#ifdef OBJ_XCOFF
6144 case BFD_RELOC_NONE:
6145 break;
6146#endif
6147
0baf16f2 6148#ifdef OBJ_ELF
0baf16f2 6149 case BFD_RELOC_PPC64_HIGHER:
94f592af 6150 if (fixP->fx_pcrel)
0baf16f2 6151 abort ();
94f592af 6152 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6153 PPC_HIGHER (value), 2);
252b5132
RH		 6154 break;
6155
0baf16f2 6156 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6157 if (fixP->fx_pcrel)
0baf16f2 6158 abort ();
94f592af 6159 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6160 PPC_HIGHERA (value), 2);
6161 break;
6162
6163 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6164 if (fixP->fx_pcrel)
0baf16f2 6165 abort ();
94f592af 6166 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6167 PPC_HIGHEST (value), 2);
6168 break;
6169
6170 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6171 if (fixP->fx_pcrel)
0baf16f2 6172 abort ();
94f592af 6173 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6174 PPC_HIGHESTA (value), 2);
6175 break;
6176
6177 case BFD_RELOC_PPC64_ADDR16_DS:
6178 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6179 case BFD_RELOC_PPC64_GOT16_DS:
6180 case BFD_RELOC_PPC64_GOT16_LO_DS:
6181 case BFD_RELOC_PPC64_PLT16_LO_DS:
6182 case BFD_RELOC_PPC64_SECTOFF_DS:
6183 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6184 case BFD_RELOC_PPC64_TOC16_DS:
6185 case BFD_RELOC_PPC64_TOC16_LO_DS:
6186 case BFD_RELOC_PPC64_PLTGOT16_DS:
6187 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6188 if (fixP->fx_pcrel)
0baf16f2
AM		 6189 abort ();
6190 {
2132e3a3 6191 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6192 unsigned long val, mask;
0baf16f2
AM		 6193
6194 if (target_big_endian)
adadcc0c 6195 val = bfd_getb32 (where - 2);
0baf16f2 6196 else
adadcc0c
AM		 6197 val = bfd_getl32 (where);
6198 mask = 0xfffc;
6199 /* lq insns reserve the four lsbs. */
6200 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6201 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6202 mask = 0xfff0;
6203 val |= value & mask;
0baf16f2
AM		 6204 if (target_big_endian)
6205 bfd_putb16 ((bfd_vma) val, where);
6206 else
6207 bfd_putl16 ((bfd_vma) val, where);
6208 }
6209 break;
cdba85ec 6210
ba0b2174
AM		 6211 case BFD_RELOC_PPC_B16_BRTAKEN:
6212 case BFD_RELOC_PPC_B16_BRNTAKEN:
6213 case BFD_RELOC_PPC_BA16_BRTAKEN:
6214 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6215 break;
6216
cdba85ec 6217 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6218 case BFD_RELOC_PPC_TLSGD:
6219 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6220 break;
6221
cdba85ec
AM		 6222 case BFD_RELOC_PPC_DTPMOD:
6223 case BFD_RELOC_PPC_TPREL16:
6224 case BFD_RELOC_PPC_TPREL16_LO:
6225 case BFD_RELOC_PPC_TPREL16_HI:
6226 case BFD_RELOC_PPC_TPREL16_HA:
6227 case BFD_RELOC_PPC_TPREL:
6228 case BFD_RELOC_PPC_DTPREL16:
6229 case BFD_RELOC_PPC_DTPREL16_LO:
6230 case BFD_RELOC_PPC_DTPREL16_HI:
6231 case BFD_RELOC_PPC_DTPREL16_HA:
6232 case BFD_RELOC_PPC_DTPREL:
6233 case BFD_RELOC_PPC_GOT_TLSGD16:
6234 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6235 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6236 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6237 case BFD_RELOC_PPC_GOT_TLSLD16:
6238 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6239 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6240 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6241 case BFD_RELOC_PPC_GOT_TPREL16:
6242 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6243 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6244 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6245 case BFD_RELOC_PPC_GOT_DTPREL16:
6246 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6247 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6248 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6249 case BFD_RELOC_PPC64_TPREL16_DS:
6250 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6251 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6252 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6253 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6254 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6255 case BFD_RELOC_PPC64_DTPREL16_DS:
6256 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6257 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6258 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6259 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6260 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6261 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6262 break;
0baf16f2 6263#endif
252b5132 6264 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6265 bytes, rather than 2, so offset it here appropriately. */
252b5132 6266 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6267 if (fixP->fx_pcrel)
252b5132
RH		 6268 abort ();
6269
94f592af 6270 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6271 + ((target_big_endian) ? 2 : 0),
6272 value, 2);
6273 break;
6274
6275 case BFD_RELOC_8:
94f592af 6276 if (fixP->fx_pcrel)
31a91399
NC		 6277 {
6278 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6279 ".byte <undefined_symbol> - ." */
31a91399
NC		 6280 if (fixP->fx_addsy)
6281 as_bad (_("Unable to handle reference to symbol %s"),
6282 S_GET_NAME (fixP->fx_addsy));
6283 else
6284 as_bad (_("Unable to resolve expression"));
6285 fixP->fx_done = 1;
6286 }
6287 else
6288 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6289 value, 1);
252b5132
RH		 6290 break;
6291
6292 case BFD_RELOC_24_PLT_PCREL:
6293 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6294 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6295 abort ();
6296
94f592af 6297 if (fixP->fx_done)
99a814a1
AM		 6298 {
6299 char *where;
6300 unsigned long insn;
6301
6302 /* Fetch the instruction, insert the fully resolved operand
6303 value, and stuff the instruction back again. */
94f592af 6304 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6305 if (target_big_endian)
6306 insn = bfd_getb32 ((unsigned char *) where);
6307 else
6308 insn = bfd_getl32 ((unsigned char *) where);
6309 if ((value & 3) != 0)
94f592af 6310 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6311 _("must branch to an address a multiple of 4"));
6312 if ((offsetT) value < -0x40000000
6313 || (offsetT) value >= 0x40000000)
94f592af 6314 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6315 _("@local or @plt branch destination is too far away, %ld bytes"),
6316 (long) value);
6317 insn = insn | (value & 0x03fffffc);
6318 if (target_big_endian)
6319 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6320 else
6321 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6322 }
252b5132
RH		 6323 break;
6324
6325 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6326 fixP->fx_done = 0;
6327 if (fixP->fx_addsy
6328 && !S_IS_DEFINED (fixP->fx_addsy)
6329 && !S_IS_WEAK (fixP->fx_addsy))
6330 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6331 break;
6332
6333 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6334 fixP->fx_done = 0;
252b5132
RH		 6335 break;
6336
0baf16f2 6337#ifdef OBJ_ELF
0baf16f2
AM		 6338 /* Generated by reference to `sym@tocbase'. The sym is
6339 ignored by the linker. */
6340 case BFD_RELOC_PPC64_TOC:
94f592af 6341 fixP->fx_done = 0;
0baf16f2 6342 break;
0baf16f2 6343#endif
252b5132 6344 default:
bc805888 6345 fprintf (stderr,
94f592af 6346 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6347 fflush (stderr);
252b5132
RH		 6348 abort ();
6349 }
6350 }
6351
6352#ifdef OBJ_ELF
94f592af 6353 fixP->fx_addnumber = value;
4e6935a6
AM		 6354
6355 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6356 from the section contents. If we are going to be emitting a reloc
6357 then the section contents are immaterial, so don't warn if they
6358 happen to overflow. Leave such warnings to ld. */
6359 if (!fixP->fx_done)
6360 fixP->fx_no_overflow = 1;
252b5132 6361#else
94f592af
NC		 6362 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6363 fixP->fx_addnumber = 0;
252b5132
RH		 6364 else
6365 {
6366#ifdef TE_PE
94f592af 6367 fixP->fx_addnumber = 0;
252b5132 6368#else
8edcbfcd
TG		 6369 /* We want to use the offset within the toc, not the actual VMA
6370 of the symbol. */
94f592af 6371 fixP->fx_addnumber =
8edcbfcd
TG		 6372 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6373 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6374#endif
6375 }
6376#endif
252b5132
RH		 6377}
6378
6379/* Generate a reloc for a fixup. */
6380
6381arelent *
98027b10 6382tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6383{
6384 arelent *reloc;
6385
6386 reloc = (arelent *) xmalloc (sizeof (arelent));
6387
49309057
ILT		 6388 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6389 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6390 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6391 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6392 if (reloc->howto == (reloc_howto_type *) NULL)
6393 {
6394 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6395 _("reloc %d not supported by object file format"),
6396 (int) fixp->fx_r_type);
252b5132
RH		 6397 return NULL;
6398 }
6399 reloc->addend = fixp->fx_addnumber;
6400
6401 return reloc;
6402}
75e21f08
JJ		 6403
6404void
98027b10 6405ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6406{
6407 cfi_add_CFA_def_cfa (1, 0);
6408}
6409
6410int
1df69f4f 6411tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6412{
6413 unsigned int regnum = -1;
6414 unsigned int i;
6415 const char *p;
6416 char *q;
6417 static struct { char *name; int dw2regnum; } regnames[] =
6418 {
6419 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6420 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6421 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6422 { "spe_acc", 111 }, { "spefscr", 112 }
6423 };
6424
6425 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6426 if (strcmp (regnames[i].name, regname) == 0)
6427 return regnames[i].dw2regnum;
6428
6429 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6430 {
6431 p = regname + 1 + (regname[1] == '.');
6432 regnum = strtoul (p, &q, 10);
6433 if (p == q || *q || regnum >= 32)
6434 return -1;
6435 if (regname[0] == 'f')
b7d7dc63 6436 regnum += 32;
75e21f08 6437 else if (regname[0] == 'v')
b7d7dc63 6438 regnum += 77;
75e21f08
JJ		 6439 }
6440 else if (regname[0] == 'c' && regname[1] == 'r')
6441 {
6442 p = regname + 2 + (regname[2] == '.');
6443 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6444 return -1;
75e21f08
JJ		 6445 regnum = p[0] - '0' + 68;
6446 }
6447 return regnum;
6448}
GDB Binutils - Deliverables
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