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[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
b84bf58a 3 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
252b5132
RH		 181\f
182/* The target specific pseudo-ops which we support. */
183
184const pseudo_typeS md_pseudo_table[] =
185{
186 /* Pseudo-ops which must be overridden. */
187 { "byte", ppc_byte, 0 },
188
189#ifdef OBJ_XCOFF
190 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
191 legitimately belong in the obj-*.c file. However, XCOFF is based
192 on COFF, and is only implemented for the RS/6000. We just use
193 obj-coff.c, and add what we need here. */
194 { "comm", ppc_comm, 0 },
195 { "lcomm", ppc_comm, 1 },
196 { "bb", ppc_bb, 0 },
197 { "bc", ppc_bc, 0 },
198 { "bf", ppc_bf, 0 },
199 { "bi", ppc_biei, 0 },
200 { "bs", ppc_bs, 0 },
201 { "csect", ppc_csect, 0 },
202 { "data", ppc_section, 'd' },
203 { "eb", ppc_eb, 0 },
204 { "ec", ppc_ec, 0 },
205 { "ef", ppc_ef, 0 },
206 { "ei", ppc_biei, 1 },
207 { "es", ppc_es, 0 },
208 { "extern", ppc_extern, 0 },
209 { "function", ppc_function, 0 },
210 { "lglobl", ppc_lglobl, 0 },
211 { "rename", ppc_rename, 0 },
212 { "section", ppc_named_section, 0 },
213 { "stabx", ppc_stabx, 0 },
214 { "text", ppc_section, 't' },
215 { "toc", ppc_toc, 0 },
216 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 217 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 218 { "word", ppc_xcoff_cons, 1 },
219 { "short", ppc_xcoff_cons, 1 },
220 { "vbyte", ppc_vbyte, 0 },
221#endif
222
223#ifdef OBJ_ELF
0baf16f2
AM		 224 { "llong", ppc_elf_cons, 8 },
225 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 226 { "long", ppc_elf_cons, 4 },
227 { "word", ppc_elf_cons, 2 },
228 { "short", ppc_elf_cons, 2 },
229 { "rdata", ppc_elf_rdata, 0 },
230 { "rodata", ppc_elf_rdata, 0 },
231 { "lcomm", ppc_elf_lcomm, 0 },
232#endif
233
234#ifdef TE_PE
99a814a1 235 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 236 { "previous", ppc_previous, 0 },
237 { "pdata", ppc_pdata, 0 },
238 { "ydata", ppc_ydata, 0 },
239 { "reldata", ppc_reldata, 0 },
240 { "rdata", ppc_rdata, 0 },
241 { "ualong", ppc_ualong, 0 },
242 { "znop", ppc_znop, 0 },
243 { "comm", ppc_pe_comm, 0 },
244 { "lcomm", ppc_pe_comm, 1 },
245 { "section", ppc_pe_section, 0 },
246 { "function", ppc_pe_function,0 },
247 { "tocd", ppc_pe_tocd, 0 },
248#endif
249
0baf16f2 250#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 251 { "tc", ppc_tc, 0 },
0baf16f2
AM		 252 { "machine", ppc_machine, 0 },
253#endif
252b5132
RH		 254
255 { NULL, NULL, 0 }
256};
257
258\f
99a814a1
AM		 259/* Predefined register names if -mregnames (or default for Windows NT).
260 In general, there are lots of them, in an attempt to be compatible
261 with a number of other Windows NT assemblers. */
252b5132
RH		 262
263/* Structure to hold information about predefined registers. */
264struct pd_reg
265 {
266 char *name;
267 int value;
268 };
269
270/* List of registers that are pre-defined:
271
272 Each general register has predefined names of the form:
273 1. r<reg_num> which has the value <reg_num>.
274 2. r.<reg_num> which has the value <reg_num>.
275
252b5132
RH		 276 Each floating point register has predefined names of the form:
277 1. f<reg_num> which has the value <reg_num>.
278 2. f.<reg_num> which has the value <reg_num>.
279
7a899fff
C		 280 Each vector unit register has predefined names of the form:
281 1. v<reg_num> which has the value <reg_num>.
282 2. v.<reg_num> which has the value <reg_num>.
283
252b5132
RH		 284 Each condition register has predefined names of the form:
285 1. cr<reg_num> which has the value <reg_num>.
286 2. cr.<reg_num> which has the value <reg_num>.
287
288 There are individual registers as well:
289 sp or r.sp has the value 1
290 rtoc or r.toc has the value 2
291 fpscr has the value 0
292 xer has the value 1
293 lr has the value 8
294 ctr has the value 9
295 pmr has the value 0
296 dar has the value 19
297 dsisr has the value 18
298 dec has the value 22
299 sdr1 has the value 25
300 srr0 has the value 26
301 srr1 has the value 27
302
81d4177b 303 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 304
305static const struct pd_reg pre_defined_registers[] =
306{
307 { "cr.0", 0 }, /* Condition Registers */
308 { "cr.1", 1 },
309 { "cr.2", 2 },
310 { "cr.3", 3 },
311 { "cr.4", 4 },
312 { "cr.5", 5 },
313 { "cr.6", 6 },
314 { "cr.7", 7 },
315
316 { "cr0", 0 },
317 { "cr1", 1 },
318 { "cr2", 2 },
319 { "cr3", 3 },
320 { "cr4", 4 },
321 { "cr5", 5 },
322 { "cr6", 6 },
323 { "cr7", 7 },
324
325 { "ctr", 9 },
326
327 { "dar", 19 }, /* Data Access Register */
328 { "dec", 22 }, /* Decrementer */
329 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
330
331 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 332 { "f.1", 1 },
333 { "f.10", 10 },
334 { "f.11", 11 },
335 { "f.12", 12 },
336 { "f.13", 13 },
337 { "f.14", 14 },
338 { "f.15", 15 },
339 { "f.16", 16 },
340 { "f.17", 17 },
341 { "f.18", 18 },
342 { "f.19", 19 },
343 { "f.2", 2 },
344 { "f.20", 20 },
345 { "f.21", 21 },
346 { "f.22", 22 },
347 { "f.23", 23 },
348 { "f.24", 24 },
349 { "f.25", 25 },
350 { "f.26", 26 },
351 { "f.27", 27 },
352 { "f.28", 28 },
353 { "f.29", 29 },
354 { "f.3", 3 },
252b5132
RH		 355 { "f.30", 30 },
356 { "f.31", 31 },
81d4177b
KH		 357 { "f.4", 4 },
358 { "f.5", 5 },
359 { "f.6", 6 },
360 { "f.7", 7 },
361 { "f.8", 8 },
362 { "f.9", 9 },
363
364 { "f0", 0 },
365 { "f1", 1 },
366 { "f10", 10 },
367 { "f11", 11 },
368 { "f12", 12 },
369 { "f13", 13 },
370 { "f14", 14 },
371 { "f15", 15 },
372 { "f16", 16 },
373 { "f17", 17 },
374 { "f18", 18 },
375 { "f19", 19 },
376 { "f2", 2 },
377 { "f20", 20 },
378 { "f21", 21 },
379 { "f22", 22 },
380 { "f23", 23 },
381 { "f24", 24 },
382 { "f25", 25 },
383 { "f26", 26 },
384 { "f27", 27 },
385 { "f28", 28 },
386 { "f29", 29 },
387 { "f3", 3 },
252b5132
RH		 388 { "f30", 30 },
389 { "f31", 31 },
81d4177b
KH		 390 { "f4", 4 },
391 { "f5", 5 },
392 { "f6", 6 },
393 { "f7", 7 },
394 { "f8", 8 },
395 { "f9", 9 },
252b5132
RH		 396
397 { "fpscr", 0 },
398
c3d65c1c
BE		 399 /* Quantization registers used with pair single instructions. */
400 { "gqr.0", 0 },
401 { "gqr.1", 1 },
402 { "gqr.2", 2 },
403 { "gqr.3", 3 },
404 { "gqr.4", 4 },
405 { "gqr.5", 5 },
406 { "gqr.6", 6 },
407 { "gqr.7", 7 },
408 { "gqr0", 0 },
409 { "gqr1", 1 },
410 { "gqr2", 2 },
411 { "gqr3", 3 },
412 { "gqr4", 4 },
413 { "gqr5", 5 },
414 { "gqr6", 6 },
415 { "gqr7", 7 },
416
252b5132
RH		 417 { "lr", 8 }, /* Link Register */
418
419 { "pmr", 0 },
420
421 { "r.0", 0 }, /* General Purpose Registers */
422 { "r.1", 1 },
423 { "r.10", 10 },
424 { "r.11", 11 },
425 { "r.12", 12 },
426 { "r.13", 13 },
427 { "r.14", 14 },
428 { "r.15", 15 },
429 { "r.16", 16 },
430 { "r.17", 17 },
431 { "r.18", 18 },
432 { "r.19", 19 },
433 { "r.2", 2 },
434 { "r.20", 20 },
435 { "r.21", 21 },
436 { "r.22", 22 },
437 { "r.23", 23 },
438 { "r.24", 24 },
439 { "r.25", 25 },
440 { "r.26", 26 },
441 { "r.27", 27 },
442 { "r.28", 28 },
443 { "r.29", 29 },
444 { "r.3", 3 },
445 { "r.30", 30 },
446 { "r.31", 31 },
447 { "r.4", 4 },
448 { "r.5", 5 },
449 { "r.6", 6 },
450 { "r.7", 7 },
451 { "r.8", 8 },
452 { "r.9", 9 },
453
454 { "r.sp", 1 }, /* Stack Pointer */
455
456 { "r.toc", 2 }, /* Pointer to the table of contents */
457
458 { "r0", 0 }, /* More general purpose registers */
459 { "r1", 1 },
460 { "r10", 10 },
461 { "r11", 11 },
462 { "r12", 12 },
463 { "r13", 13 },
464 { "r14", 14 },
465 { "r15", 15 },
466 { "r16", 16 },
467 { "r17", 17 },
468 { "r18", 18 },
469 { "r19", 19 },
470 { "r2", 2 },
471 { "r20", 20 },
472 { "r21", 21 },
473 { "r22", 22 },
474 { "r23", 23 },
475 { "r24", 24 },
476 { "r25", 25 },
477 { "r26", 26 },
478 { "r27", 27 },
479 { "r28", 28 },
480 { "r29", 29 },
481 { "r3", 3 },
482 { "r30", 30 },
483 { "r31", 31 },
484 { "r4", 4 },
485 { "r5", 5 },
486 { "r6", 6 },
487 { "r7", 7 },
488 { "r8", 8 },
489 { "r9", 9 },
490
491 { "rtoc", 2 }, /* Table of contents */
492
493 { "sdr1", 25 }, /* Storage Description Register 1 */
494
495 { "sp", 1 },
496
497 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
498 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 499
7a899fff 500 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 501 { "v.1", 1 },
502 { "v.10", 10 },
503 { "v.11", 11 },
504 { "v.12", 12 },
505 { "v.13", 13 },
506 { "v.14", 14 },
507 { "v.15", 15 },
508 { "v.16", 16 },
509 { "v.17", 17 },
510 { "v.18", 18 },
511 { "v.19", 19 },
512 { "v.2", 2 },
513 { "v.20", 20 },
514 { "v.21", 21 },
515 { "v.22", 22 },
516 { "v.23", 23 },
517 { "v.24", 24 },
518 { "v.25", 25 },
519 { "v.26", 26 },
520 { "v.27", 27 },
521 { "v.28", 28 },
522 { "v.29", 29 },
523 { "v.3", 3 },
7a899fff
C		 524 { "v.30", 30 },
525 { "v.31", 31 },
81d4177b
KH		 526 { "v.4", 4 },
527 { "v.5", 5 },
528 { "v.6", 6 },
529 { "v.7", 7 },
530 { "v.8", 8 },
531 { "v.9", 9 },
7a899fff
C		 532
533 { "v0", 0 },
81d4177b
KH		 534 { "v1", 1 },
535 { "v10", 10 },
536 { "v11", 11 },
537 { "v12", 12 },
538 { "v13", 13 },
539 { "v14", 14 },
540 { "v15", 15 },
541 { "v16", 16 },
542 { "v17", 17 },
543 { "v18", 18 },
544 { "v19", 19 },
545 { "v2", 2 },
546 { "v20", 20 },
547 { "v21", 21 },
548 { "v22", 22 },
549 { "v23", 23 },
550 { "v24", 24 },
551 { "v25", 25 },
552 { "v26", 26 },
553 { "v27", 27 },
554 { "v28", 28 },
555 { "v29", 29 },
556 { "v3", 3 },
7a899fff
C		 557 { "v30", 30 },
558 { "v31", 31 },
81d4177b
KH		 559 { "v4", 4 },
560 { "v5", 5 },
561 { "v6", 6 },
562 { "v7", 7 },
563 { "v8", 8 },
7a899fff 564 { "v9", 9 },
252b5132
RH		 565
566 { "xer", 1 },
567
568};
569
bc805888 570#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 571
572/* Given NAME, find the register number associated with that name, return
573 the integer value associated with the given name or -1 on failure. */
574
252b5132 575static int
98027b10 576reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 577{
578 int middle, low, high;
579 int cmp;
580
581 low = 0;
582 high = regcount - 1;
583
584 do
585 {
586 middle = (low + high) / 2;
587 cmp = strcasecmp (name, regs[middle].name);
588 if (cmp < 0)
589 high = middle - 1;
590 else if (cmp > 0)
591 low = middle + 1;
592 else
593 return regs[middle].value;
594 }
595 while (low <= high);
596
597 return -1;
598}
599
600/*
99a814a1 601 * Summary of register_name.
252b5132
RH		 602 *
603 * in: Input_line_pointer points to 1st char of operand.
604 *
605 * out: A expressionS.
606 * The operand may have been a register: in this case, X_op == O_register,
607 * X_add_number is set to the register number, and truth is returned.
608 * Input_line_pointer->(next non-blank) char after operand, or is in its
609 * original state.
610 */
611
b34976b6 612static bfd_boolean
98027b10 613register_name (expressionS *expressionP)
252b5132
RH		 614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH		 627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM		 631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH		 636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH		 641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM		 645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH		 649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH		 657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
98027b10 680ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH		 681{
682 int val;
683
684 if (! cr_operand)
685 return 0;
686
687 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
688 name);
689 if (val < 0)
690 return 0;
691
692 expr->X_op = O_constant;
693 expr->X_add_number = val;
694
695 return 1;
696}
697\f
698/* Local variables. */
699
700/* The type of processor we are assembling for. This is one or more
701 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 702static unsigned long ppc_cpu = 0;
252b5132 703
2b3c4602
AM		 704/* Whether to target xcoff64/elf64. */
705static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 706
252b5132
RH		 707/* Opcode hash table. */
708static struct hash_control *ppc_hash;
709
710/* Macro hash table. */
711static struct hash_control *ppc_macro_hash;
712
713#ifdef OBJ_ELF
99a814a1 714/* What type of shared library support to use. */
5d6f4f16 715static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 716
99a814a1 717/* Flags to set in the elf header. */
252b5132
RH		 718static flagword ppc_flags = 0;
719
720/* Whether this is Solaris or not. */
721#ifdef TARGET_SOLARIS_COMMENT
b34976b6 722#define SOLARIS_P TRUE
252b5132 723#else
b34976b6 724#define SOLARIS_P FALSE
252b5132
RH		 725#endif
726
b34976b6 727static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 728#endif
729
730#ifdef OBJ_XCOFF
731
732/* The RS/6000 assembler uses the .csect pseudo-op to generate code
733 using a bunch of different sections. These assembler sections,
734 however, are all encompassed within the .text or .data sections of
735 the final output file. We handle this by using different
736 subsegments within these main segments. */
737
738/* Next subsegment to allocate within the .text segment. */
739static subsegT ppc_text_subsegment = 2;
740
741/* Linked list of csects in the text section. */
742static symbolS *ppc_text_csects;
743
744/* Next subsegment to allocate within the .data segment. */
745static subsegT ppc_data_subsegment = 2;
746
747/* Linked list of csects in the data section. */
748static symbolS *ppc_data_csects;
749
750/* The current csect. */
751static symbolS *ppc_current_csect;
752
753/* The RS/6000 assembler uses a TOC which holds addresses of functions
754 and variables. Symbols are put in the TOC with the .tc pseudo-op.
755 A special relocation is used when accessing TOC entries. We handle
756 the TOC as a subsegment within the .data segment. We set it up if
757 we see a .toc pseudo-op, and save the csect symbol here. */
758static symbolS *ppc_toc_csect;
759
760/* The first frag in the TOC subsegment. */
761static fragS *ppc_toc_frag;
762
763/* The first frag in the first subsegment after the TOC in the .data
764 segment. NULL if there are no subsegments after the TOC. */
765static fragS *ppc_after_toc_frag;
766
767/* The current static block. */
768static symbolS *ppc_current_block;
769
770/* The COFF debugging section; set by md_begin. This is not the
771 .debug section, but is instead the secret BFD section which will
772 cause BFD to set the section number of a symbol to N_DEBUG. */
773static asection *ppc_coff_debug_section;
774
775#endif /* OBJ_XCOFF */
776
777#ifdef TE_PE
778
779/* Various sections that we need for PE coff support. */
780static segT ydata_section;
781static segT pdata_section;
782static segT reldata_section;
783static segT rdata_section;
784static segT tocdata_section;
785
81d4177b 786/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 787static segT ppc_previous_section;
788static segT ppc_current_section;
789
790#endif /* TE_PE */
791
792#ifdef OBJ_ELF
793symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 794#define PPC_APUINFO_ISEL 0x40
795#define PPC_APUINFO_PMR 0x41
796#define PPC_APUINFO_RFMCI 0x42
797#define PPC_APUINFO_CACHELCK 0x43
798#define PPC_APUINFO_SPE 0x100
799#define PPC_APUINFO_EFS 0x101
800#define PPC_APUINFO_BRLOCK 0x102
801
b34976b6
AM		 802/*
803 * We keep a list of APUinfo
6a0c61b7
EZ		 804 */
805unsigned long *ppc_apuinfo_list;
806unsigned int ppc_apuinfo_num;
807unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 808#endif /* OBJ_ELF */
809\f
810#ifdef OBJ_ELF
15c1449b 811const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 812#else
15c1449b 813const char *const md_shortopts = "um:";
252b5132 814#endif
15c1449b 815const struct option md_longopts[] = {
252b5132
RH		 816 {NULL, no_argument, NULL, 0}
817};
15c1449b 818const size_t md_longopts_size = sizeof (md_longopts);
252b5132 819
69c040df
AM		 820
821/* Handle -m options that set cpu type, and .machine arg. */
822
823static int
824parse_cpu (const char *arg)
825{
826 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
827 (RIOS2). */
828 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
829 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
830 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
831 else if (strcmp (arg, "pwr") == 0)
832 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
833 /* -m601 means to assemble for the PowerPC 601, which includes
834 instructions that are holdovers from the Power. */
835 else if (strcmp (arg, "601") == 0)
836 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
837 | PPC_OPCODE_601 | PPC_OPCODE_32);
838 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
839 PowerPC 603/604. */
840 else if (strcmp (arg, "ppc") == 0
841 || strcmp (arg, "ppc32") == 0
842 || strcmp (arg, "603") == 0
843 || strcmp (arg, "604") == 0)
844 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
c3d65c1c
BE		 845 /* Do all PPC750s have paired single ops? */
846 else if (strcmp (arg, "750cl") == 0)
847 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
69c040df
AM		 848 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
849 else if (strcmp (arg, "403") == 0
850 || strcmp (arg, "405") == 0)
851 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
852 | PPC_OPCODE_403 | PPC_OPCODE_32);
853 else if (strcmp (arg, "440") == 0)
854 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
855 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
856 else if (strcmp (arg, "7400") == 0
857 || strcmp (arg, "7410") == 0
858 || strcmp (arg, "7450") == 0
859 || strcmp (arg, "7455") == 0)
860 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
861 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 862 else if (strcmp (arg, "e300") == 0)
863 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
864 | PPC_OPCODE_E300);
69c040df
AM		 865 else if (strcmp (arg, "altivec") == 0)
866 {
867 if (ppc_cpu == 0)
868 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
869 else
870 ppc_cpu |= PPC_OPCODE_ALTIVEC;
871 }
872 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
873 {
874 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
875 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
876 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
877 | PPC_OPCODE_RFMCI);
878 }
879 else if (strcmp (arg, "spe") == 0)
880 {
881 if (ppc_cpu == 0)
882 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
883 else
884 ppc_cpu |= PPC_OPCODE_SPE;
885 }
886 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
887 620. */
888 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
889 {
890 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
891 }
892 else if (strcmp (arg, "ppc64bridge") == 0)
893 {
894 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
895 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
896 }
897 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
898 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
899 {
900 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
901 }
902 /* -mbooke64 means enable 64-bit BookE support. */
903 else if (strcmp (arg, "booke64") == 0)
904 {
905 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
906 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
907 }
908 else if (strcmp (arg, "power4") == 0)
909 {
910 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
911 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
912 }
b0648eec
AM		 913 else if (strcmp (arg, "power5") == 0)
914 {
915 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
916 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
917 | PPC_OPCODE_POWER5);
918 }
9622b051
AM		 919 else if (strcmp (arg, "power6") == 0)
920 {
921 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
922 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
923 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
924 }
ede602d7
AM		 925 else if (strcmp (arg, "cell") == 0)
926 {
927 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
928 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
929 | PPC_OPCODE_CELL);
930 }
69c040df
AM		 931 /* -mcom means assemble for the common intersection between Power
932 and PowerPC. At present, we just allow the union, rather
933 than the intersection. */
934 else if (strcmp (arg, "com") == 0)
935 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
936 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
937 else if (strcmp (arg, "any") == 0)
938 ppc_cpu |= PPC_OPCODE_ANY;
939 else
940 return 0;
941
942 return 1;
943}
944
252b5132 945int
98027b10 946md_parse_option (int c, char *arg)
252b5132
RH		 947{
948 switch (c)
949 {
950 case 'u':
951 /* -u means that any undefined symbols should be treated as
952 external, which is the default for gas anyhow. */
953 break;
954
955#ifdef OBJ_ELF
956 case 'l':
957 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 958 sake, recognize -be also. */
252b5132
RH		 959 if (strcmp (arg, "e") == 0)
960 {
961 target_big_endian = 0;
962 set_target_endian = 1;
963 }
964 else
965 return 0;
966
967 break;
968
969 case 'b':
970 if (strcmp (arg, "e") == 0)
971 {
972 target_big_endian = 1;
973 set_target_endian = 1;
974 }
975 else
976 return 0;
977
978 break;
979
980 case 'K':
99a814a1 981 /* Recognize -K PIC. */
252b5132
RH		 982 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
983 {
984 shlib = SHLIB_PIC;
985 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
986 }
987 else
988 return 0;
989
990 break;
991#endif
992
7f6d05e8
CP		 993 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
994 case 'a':
995 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 996 {
997#ifdef BFD64
998 ppc_obj64 = 1;
999#else
1000 as_fatal (_("%s unsupported"), "-a64");
1001#endif
1002 }
7f6d05e8 1003 else if (strcmp (arg, "32") == 0)
2b3c4602 1004 ppc_obj64 = 0;
7f6d05e8
CP		 1005 else
1006 return 0;
1007 break;
81d4177b 1008
252b5132 1009 case 'm':
69c040df
AM		 1010 if (parse_cpu (arg))
1011 ;
252b5132
RH		 1012
1013 else if (strcmp (arg, "regnames") == 0)
b34976b6 1014 reg_names_p = TRUE;
252b5132
RH		 1015
1016 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1017 reg_names_p = FALSE;
252b5132
RH		 1018
1019#ifdef OBJ_ELF
99a814a1
AM		 1020 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1021 that require relocation. */
252b5132
RH		 1022 else if (strcmp (arg, "relocatable") == 0)
1023 {
5d6f4f16 1024 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1025 ppc_flags |= EF_PPC_RELOCATABLE;
1026 }
1027
1028 else if (strcmp (arg, "relocatable-lib") == 0)
1029 {
5d6f4f16 1030 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1031 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1032 }
1033
99a814a1 1034 /* -memb, set embedded bit. */
252b5132
RH		 1035 else if (strcmp (arg, "emb") == 0)
1036 ppc_flags |= EF_PPC_EMB;
1037
99a814a1
AM		 1038 /* -mlittle/-mbig set the endianess. */
1039 else if (strcmp (arg, "little") == 0
1040 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1041 {
1042 target_big_endian = 0;
1043 set_target_endian = 1;
1044 }
1045
1046 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1047 {
1048 target_big_endian = 1;
1049 set_target_endian = 1;
1050 }
1051
1052 else if (strcmp (arg, "solaris") == 0)
1053 {
b34976b6 1054 msolaris = TRUE;
252b5132
RH		 1055 ppc_comment_chars = ppc_solaris_comment_chars;
1056 }
1057
1058 else if (strcmp (arg, "no-solaris") == 0)
1059 {
b34976b6 1060 msolaris = FALSE;
252b5132
RH		 1061 ppc_comment_chars = ppc_eabi_comment_chars;
1062 }
1063#endif
1064 else
1065 {
1066 as_bad (_("invalid switch -m%s"), arg);
1067 return 0;
1068 }
1069 break;
1070
1071#ifdef OBJ_ELF
1072 /* -V: SVR4 argument to print version ID. */
1073 case 'V':
1074 print_version_id ();
1075 break;
1076
1077 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1078 should be emitted or not. FIXME: Not implemented. */
1079 case 'Q':
1080 break;
1081
1082 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1083 rather than .stabs.excl, which is ignored by the linker.
1084 FIXME: Not implemented. */
1085 case 's':
1086 if (arg)
1087 return 0;
1088
1089 break;
1090#endif
1091
1092 default:
1093 return 0;
1094 }
1095
1096 return 1;
1097}
1098
1099void
98027b10 1100md_show_usage (FILE *stream)
252b5132 1101{
bc805888 1102 fprintf (stream, _("\
252b5132 1103PowerPC options:\n\
df12615d
AM		 1104-a32 generate ELF32/XCOFF32\n\
1105-a64 generate ELF64/XCOFF64\n\
252b5132 1106-u ignored\n\
23e1d84c
AM		 1107-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1108-mpwr generate code for POWER (RIOS1)\n\
1109-m601 generate code for PowerPC 601\n\
418c1742 1110-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1111 generate code for PowerPC 603/604\n\
df12615d 1112-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1113-m440 generate code for PowerPC 440\n\
f5c120c5 1114-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1115 generate code for PowerPC 7400/7410/7450/7455\n\
1116-m750cl generate code for PowerPC 750cl\n"));
df12615d 1117 fprintf (stream, _("\
23e1d84c 1118-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1119-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1120-mbooke64 generate code for 64-bit PowerPC BookE\n\
1121-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1122-mpower4 generate code for Power4 architecture\n\
b0648eec 1123-mpower5 generate code for Power5 architecture\n\
9622b051 1124-mpower6 generate code for Power6 architecture\n\
ede602d7 1125-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1126-mcom generate code Power/PowerPC common instructions\n\
df12615d 1127-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1128 fprintf (stream, _("\
df12615d 1129-maltivec generate code for AltiVec\n\
36ae0db3 1130-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1131-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1132-mspe generate code for Motorola SPE instructions\n\
1133-mregnames Allow symbolic names for registers\n\
1134-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1135#ifdef OBJ_ELF
bc805888 1136 fprintf (stream, _("\
252b5132
RH		 1137-mrelocatable support for GCC's -mrelocatble option\n\
1138-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1139-memb set PPC_EMB bit in ELF flags\n\
df12615d 1140-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1141 generate code for a little endian machine\n\
df12615d
AM		 1142-mbig, -mbig-endian, -b, -be\n\
1143 generate code for a big endian machine\n\
252b5132
RH		 1144-msolaris generate code for Solaris\n\
1145-mno-solaris do not generate code for Solaris\n\
1146-V print assembler version number\n\
1147-Qy, -Qn ignored\n"));
1148#endif
1149}
1150\f
1151/* Set ppc_cpu if it is not already set. */
1152
1153static void
98027b10 1154ppc_set_cpu (void)
252b5132
RH		 1155{
1156 const char *default_os = TARGET_OS;
1157 const char *default_cpu = TARGET_CPU;
1158
3c9030c1 1159 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1160 {
2a98c3a6 1161 if (ppc_obj64)
3c9030c1 1162 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1163 else if (strncmp (default_os, "aix", 3) == 0
1164 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1165 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1166 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1167 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1168 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1169 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1170 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1171 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1172 else
99a814a1
AM		 1173 as_fatal (_("Unknown default cpu = %s, os = %s"),
1174 default_cpu, default_os);
252b5132
RH		 1175 }
1176}
1177
9232bbb0
AM		 1178/* Figure out the BFD architecture to use. This function and ppc_mach
1179 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1180
1181enum bfd_architecture
98027b10 1182ppc_arch (void)
252b5132
RH		 1183{
1184 const char *default_cpu = TARGET_CPU;
1185 ppc_set_cpu ();
1186
1187 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1188 return bfd_arch_powerpc;
1189 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1190 return bfd_arch_rs6000;
1191 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1192 {
1193 if (strcmp (default_cpu, "rs6000") == 0)
1194 return bfd_arch_rs6000;
0baf16f2 1195 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1196 return bfd_arch_powerpc;
1197 }
1198
1199 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1200 return bfd_arch_unknown;
1201}
1202
7f6d05e8 1203unsigned long
98027b10 1204ppc_mach (void)
7f6d05e8 1205{
2a98c3a6
AM		 1206 if (ppc_obj64)
1207 return bfd_mach_ppc64;
1208 else if (ppc_arch () == bfd_arch_rs6000)
1209 return bfd_mach_rs6k;
1210 else
1211 return bfd_mach_ppc;
7f6d05e8
CP		 1212}
1213
81d4177b 1214extern char*
98027b10 1215ppc_target_format (void)
7f6d05e8
CP		 1216{
1217#ifdef OBJ_COFF
1218#ifdef TE_PE
99a814a1 1219 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1220#elif TE_POWERMAC
0baf16f2 1221 return "xcoff-powermac";
7f6d05e8 1222#else
eb1e0e80 1223# ifdef TE_AIX5
2b3c4602 1224 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1225# else
2b3c4602 1226 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1227# endif
7f6d05e8 1228#endif
7f6d05e8
CP		 1229#endif
1230#ifdef OBJ_ELF
9d8504b1
PB		 1231# ifdef TE_VXWORKS
1232 return "elf32-powerpc-vxworks";
1233# else
0baf16f2 1234 return (target_big_endian
2b3c4602
AM		 1235 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1236 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1237# endif
7f6d05e8
CP		 1238#endif
1239}
1240
69c040df
AM		 1241/* Insert opcodes and macros into hash tables. Called at startup and
1242 for .cpu pseudo. */
252b5132 1243
69c040df
AM		 1244static void
1245ppc_setup_opcodes (void)
252b5132 1246{
98027b10 1247 const struct powerpc_opcode *op;
252b5132
RH		 1248 const struct powerpc_opcode *op_end;
1249 const struct powerpc_macro *macro;
1250 const struct powerpc_macro *macro_end;
b84bf58a 1251 bfd_boolean bad_insn = FALSE;
8dbcd839 1252 unsigned long prev_opcode = 0;
252b5132 1253
69c040df
AM		 1254 if (ppc_hash != NULL)
1255 hash_die (ppc_hash);
1256 if (ppc_macro_hash != NULL)
1257 hash_die (ppc_macro_hash);
252b5132
RH		 1258
1259 /* Insert the opcodes into a hash table. */
1260 ppc_hash = hash_new ();
1261
c43a438d 1262 if (ENABLE_CHECKING)
b84bf58a 1263 {
c43a438d 1264 unsigned int i;
b84bf58a 1265
c43a438d
AM		 1266 /* Check operand masks. Code here and in the disassembler assumes
1267 all the 1's in the mask are contiguous. */
1268 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1269 {
c43a438d
AM		 1270 unsigned long mask = powerpc_operands[i].bitm;
1271 unsigned long right_bit;
1272 unsigned int j;
1273
1274 right_bit = mask & -mask;
1275 mask += right_bit;
1276 right_bit = mask & -mask;
1277 if (mask != right_bit)
1278 {
1279 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1280 bad_insn = TRUE;
1281 }
1282 for (j = i + 1; j < num_powerpc_operands; ++j)
1283 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1284 sizeof (powerpc_operands[0])) == 0)
1285 {
1286 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1287 j, i);
1288 bad_insn = TRUE;
1289 }
b84bf58a
AM		 1290 }
1291 }
1292
252b5132
RH		 1293 op_end = powerpc_opcodes + powerpc_num_opcodes;
1294 for (op = powerpc_opcodes; op < op_end; op++)
1295 {
c43a438d 1296 if (ENABLE_CHECKING)
b84bf58a 1297 {
c43a438d
AM		 1298 const unsigned char *o;
1299 unsigned long omask = op->mask;
8dbcd839
PB		 1300 unsigned long major_opcode = PPC_OP (op->opcode);
1301
1302 /* The major opcodes had better be sorted. Code in the disassembler
1303 assumes the insns are sorted according to major opcode. */
1304 if (major_opcode < prev_opcode)
1305 {
1306 as_bad (_("major opcode is not sorted for %s"),
1307 op->name);
1308 bad_insn = TRUE;
1309 }
1310 prev_opcode = major_opcode;
c43a438d
AM		 1311
1312 /* The mask had better not trim off opcode bits. */
1313 if ((op->opcode & omask) != op->opcode)
1314 {
1315 as_bad (_("mask trims opcode bits for %s"),
1316 op->name);
1317 bad_insn = TRUE;
1318 }
1319
1320 /* The operands must not overlap the opcode or each other. */
1321 for (o = op->operands; *o; ++o)
1322 if (*o >= num_powerpc_operands)
1323 {
1324 as_bad (_("operand index error for %s"),
1325 op->name);
1326 bad_insn = TRUE;
1327 }
1328 else
b84bf58a 1329 {
c43a438d
AM		 1330 const struct powerpc_operand *operand = &powerpc_operands[*o];
1331 if (operand->shift >= 0)
b84bf58a 1332 {
c43a438d
AM		 1333 unsigned long mask = operand->bitm << operand->shift;
1334 if (omask & mask)
1335 {
1336 as_bad (_("operand %d overlap in %s"),
1337 (int) (o - op->operands), op->name);
1338 bad_insn = TRUE;
1339 }
1340 omask |= mask;
b84bf58a 1341 }
b84bf58a 1342 }
c43a438d 1343 }
252b5132 1344
2b3c4602 1345 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1346 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1347 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1348 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1349 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1350 /* Certain instructions (eg: extsw) do not exist in the
1351 32-bit BookE instruction set, but they do exist in the
1352 64-bit BookE instruction set, and other PPC instruction
1353 sets. Check to see if the opcode has the BOOKE64 flag set.
1354 If it does make sure that the target CPU is not the BookE32. */
1355 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1356 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1357 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1358 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1359 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1360 == (ppc_cpu & PPC_OPCODE_POWER4)))
1361 && ((op->flags & PPC_OPCODE_POWER5) == 0
1362 || ((op->flags & PPC_OPCODE_POWER5)
9622b051
AM		 1363 == (ppc_cpu & PPC_OPCODE_POWER5)))
1364 && ((op->flags & PPC_OPCODE_POWER6) == 0
1365 || ((op->flags & PPC_OPCODE_POWER6)
1366 == (ppc_cpu & PPC_OPCODE_POWER6))))
252b5132
RH		 1367 {
1368 const char *retval;
1369
98027b10 1370 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1371 if (retval != NULL)
252b5132 1372 {
99a814a1 1373 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1374 if ((ppc_cpu & PPC_OPCODE_601) != 0
1375 && (op->flags & PPC_OPCODE_POWER) != 0)
1376 continue;
1377
b84bf58a 1378 as_bad (_("duplicate instruction %s"),
99a814a1 1379 op->name);
b84bf58a 1380 bad_insn = TRUE;
252b5132
RH		 1381 }
1382 }
1383 }
1384
3c9030c1
AM		 1385 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1386 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1387 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1388
252b5132
RH		 1389 /* Insert the macros into a hash table. */
1390 ppc_macro_hash = hash_new ();
1391
1392 macro_end = powerpc_macros + powerpc_num_macros;
1393 for (macro = powerpc_macros; macro < macro_end; macro++)
1394 {
1395 if ((macro->flags & ppc_cpu) != 0)
1396 {
1397 const char *retval;
1398
98027b10 1399 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1400 if (retval != (const char *) NULL)
1401 {
b84bf58a
AM		 1402 as_bad (_("duplicate macro %s"), macro->name);
1403 bad_insn = TRUE;
252b5132
RH		 1404 }
1405 }
1406 }
1407
b84bf58a 1408 if (bad_insn)
252b5132 1409 abort ();
69c040df
AM		 1410}
1411
1412/* This function is called when the assembler starts up. It is called
1413 after the options have been parsed and the output file has been
1414 opened. */
1415
1416void
98027b10 1417md_begin (void)
69c040df
AM		 1418{
1419 ppc_set_cpu ();
1420
1421 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1422
1423#ifdef OBJ_ELF
1424 /* Set the ELF flags if desired. */
1425 if (ppc_flags && !msolaris)
1426 bfd_set_private_flags (stdoutput, ppc_flags);
1427#endif
1428
1429 ppc_setup_opcodes ();
252b5132 1430
67c1ffbe 1431 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1432 by the user. */
252b5132
RH		 1433 if (!set_target_endian)
1434 {
1435 set_target_endian = 1;
1436 target_big_endian = PPC_BIG_ENDIAN;
1437 }
1438
1439#ifdef OBJ_XCOFF
1440 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1441
1442 /* Create dummy symbols to serve as initial csects. This forces the
1443 text csects to precede the data csects. These symbols will not
1444 be output. */
1445 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1446 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1447 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1448 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1449#endif
1450
1451#ifdef TE_PE
1452
1453 ppc_current_section = text_section;
81d4177b 1454 ppc_previous_section = 0;
252b5132
RH		 1455
1456#endif
1457}
1458
6a0c61b7 1459void
98027b10 1460ppc_cleanup (void)
6a0c61b7 1461{
dc1d03fc 1462#ifdef OBJ_ELF
6a0c61b7
EZ		 1463 if (ppc_apuinfo_list == NULL)
1464 return;
1465
1466 /* Ok, so write the section info out. We have this layout:
1467
1468 byte data what
1469 ---- ---- ----
1470 0 8 length of "APUinfo\0"
1471 4 (n*4) number of APU's (4 bytes each)
1472 8 2 note type 2
1473 12 "APUinfo\0" name
1474 20 APU#1 first APU's info
1475 24 APU#2 second APU's info
1476 ... ...
1477 */
1478 {
1479 char *p;
1480 asection *seg = now_seg;
1481 subsegT subseg = now_subseg;
1482 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1483 unsigned int i;
6a0c61b7
EZ		 1484
1485 /* Create the .PPC.EMB.apuinfo section. */
1486 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1487 bfd_set_section_flags (stdoutput,
1488 apuinfo_secp,
e1a9cb8e 1489 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1490
1491 p = frag_more (4);
1492 md_number_to_chars (p, (valueT) 8, 4);
1493
1494 p = frag_more (4);
e98d298c 1495 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1496
1497 p = frag_more (4);
1498 md_number_to_chars (p, (valueT) 2, 4);
1499
1500 p = frag_more (8);
1501 strcpy (p, "APUinfo");
1502
1503 for (i = 0; i < ppc_apuinfo_num; i++)
1504 {
b34976b6
AM		 1505 p = frag_more (4);
1506 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1507 }
1508
1509 frag_align (2, 0, 0);
1510
1511 /* We probably can't restore the current segment, for there likely
1512 isn't one yet... */
1513 if (seg && subseg)
1514 subseg_set (seg, subseg);
1515 }
dc1d03fc 1516#endif
6a0c61b7
EZ		 1517}
1518
252b5132
RH		 1519/* Insert an operand value into an instruction. */
1520
1521static unsigned long
a1867a27
AM		 1522ppc_insert_operand (unsigned long insn,
1523 const struct powerpc_operand *operand,
1524 offsetT val,
1525 char *file,
1526 unsigned int line)
252b5132 1527{
b84bf58a 1528 long min, max, right;
eb42fac1 1529
b84bf58a
AM		 1530 max = operand->bitm;
1531 right = max & -max;
1532 min = 0;
1533
1534 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1535 {
b84bf58a 1536 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1537 max = (max >> 1) & -right;
1538 min = ~max & -right;
b84bf58a 1539 }
252b5132 1540
b84bf58a 1541 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1542 max++;
252b5132 1543
b84bf58a 1544 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1545 {
1546 long tmp = min;
1547 min = -max;
1548 max = -tmp;
1549 }
b84bf58a 1550
a1867a27
AM		 1551 if (min <= max)
1552 {
1553 /* Some people write constants with the sign extension done by
1554 hand but only up to 32 bits. This shouldn't really be valid,
1555 but, to permit this code to assemble on a 64-bit host, we
1556 sign extend the 32-bit value to 64 bits if so doing makes the
1557 value valid. */
1558 if (val > max
1559 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1560 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1561 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1562 val = val - 0x80000000 - 0x80000000;
1563
1564 /* Similarly, people write expressions like ~(1<<15), and expect
1565 this to be OK for a 32-bit unsigned value. */
1566 else if (val < min
1567 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1568 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1569 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1570 val = val + 0x80000000 + 0x80000000;
1571
1572 else if (val < min
1573 || val > max
1574 || (val & (right - 1)) != 0)
1575 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1576 }
b84bf58a 1577
252b5132
RH		 1578 if (operand->insert)
1579 {
1580 const char *errmsg;
1581
1582 errmsg = NULL;
2b3c4602 1583 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1584 if (errmsg != (const char *) NULL)
0baf16f2 1585 as_bad_where (file, line, errmsg);
252b5132
RH		 1586 }
1587 else
b84bf58a 1588 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1589
1590 return insn;
1591}
1592
1593\f
1594#ifdef OBJ_ELF
1595/* Parse @got, etc. and return the desired relocation. */
1596static bfd_reloc_code_real_type
98027b10 1597ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1598{
1599 struct map_bfd {
1600 char *string;
b7d7dc63
AM		 1601 unsigned int length : 8;
1602 unsigned int valid32 : 1;
1603 unsigned int valid64 : 1;
1604 unsigned int reloc;
252b5132
RH		 1605 };
1606
1607 char ident[20];
1608 char *str = *str_p;
1609 char *str2;
1610 int ch;
1611 int len;
15c1449b 1612 const struct map_bfd *ptr;
252b5132 1613
b7d7dc63
AM		 1614#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1615#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1616#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1617
15c1449b 1618 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1619 MAP ("l", BFD_RELOC_LO16),
1620 MAP ("h", BFD_RELOC_HI16),
1621 MAP ("ha", BFD_RELOC_HI16_S),
1622 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1623 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1624 MAP ("got", BFD_RELOC_16_GOTOFF),
1625 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1626 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1627 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1628 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1629 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1630 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1631 MAP ("copy", BFD_RELOC_PPC_COPY),
1632 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1633 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1634 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1635 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1636 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1637 MAP ("tls", BFD_RELOC_PPC_TLS),
1638 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1639 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1640 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1641 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1642 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1643 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1644 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1645 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1646 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1647 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1648 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1649 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1650 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1651 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1652 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1653 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1654 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1655 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1656 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1657 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1658 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1659 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1660 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1661 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1662 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1663 MAP32 ("fixup", BFD_RELOC_CTOR),
1664 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1665 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1666 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1667 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1668 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1669 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1670 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1671 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1672 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1673 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1674 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1675 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1676 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1677 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1678 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1679 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1680 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1681 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1682 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1683 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1684 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1685 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1686 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1687 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1688 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1689 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1690 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1691 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1692 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1693 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1694 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1695 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1696 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1697 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1698 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1699 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1700 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1701 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1702 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1703 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1704 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1705 };
1706
1707 if (*str++ != '@')
1708 return BFD_RELOC_UNUSED;
1709
1710 for (ch = *str, str2 = ident;
1711 (str2 < ident + sizeof (ident) - 1
3882b010 1712 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1713 ch = *++str)
1714 {
3882b010 1715 *str2++ = TOLOWER (ch);
252b5132
RH		 1716 }
1717
1718 *str2 = '\0';
1719 len = str2 - ident;
1720
1721 ch = ident[0];
1722 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1723 if (ch == ptr->string[0]
1724 && len == ptr->length
b7d7dc63
AM		 1725 && memcmp (ident, ptr->string, ptr->length) == 0
1726 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1727 {
15c1449b
AM		 1728 int reloc = ptr->reloc;
1729
cdba85ec 1730 if (!ppc_obj64)
5f6db75a
AM		 1731 if (exp_p->X_add_number != 0
1732 && (reloc == (int) BFD_RELOC_16_GOTOFF
1733 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1734 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1735 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1736 as_warn (_("identifier+constant@got means identifier@got+constant"));
1737
1738 /* Now check for identifier@suffix+constant. */
1739 if (*str == '-' || *str == '+')
252b5132 1740 {
5f6db75a
AM		 1741 char *orig_line = input_line_pointer;
1742 expressionS new_exp;
1743
1744 input_line_pointer = str;
1745 expression (&new_exp);
1746 if (new_exp.X_op == O_constant)
252b5132 1747 {
5f6db75a
AM		 1748 exp_p->X_add_number += new_exp.X_add_number;
1749 str = input_line_pointer;
252b5132 1750 }
5f6db75a
AM		 1751
1752 if (&input_line_pointer != str_p)
1753 input_line_pointer = orig_line;
252b5132 1754 }
252b5132 1755 *str_p = str;
0baf16f2 1756
2b3c4602 1757 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1758 && exp_p->X_op == O_symbol
1759 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1760 {
9f2b53d7
AM		 1761 /* Change the symbol so that the dummy .TOC. symbol can be
1762 omitted from the object file. */
0baf16f2
AM		 1763 exp_p->X_add_symbol = &abs_symbol;
1764 }
1765
15c1449b 1766 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1767 }
1768
1769 return BFD_RELOC_UNUSED;
1770}
1771
99a814a1
AM		 1772/* Like normal .long/.short/.word, except support @got, etc.
1773 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1774static void
98027b10 1775ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1776{
1777 expressionS exp;
1778 bfd_reloc_code_real_type reloc;
1779
1780 if (is_it_end_of_statement ())
1781 {
1782 demand_empty_rest_of_line ();
1783 return;
1784 }
1785
1786 do
1787 {
1788 expression (&exp);
1789 if (exp.X_op == O_symbol
1790 && *input_line_pointer == '@'
99a814a1
AM		 1791 && (reloc = ppc_elf_suffix (&input_line_pointer,
1792 &exp)) != BFD_RELOC_UNUSED)
252b5132 1793 {
99a814a1
AM		 1794 reloc_howto_type *reloc_howto;
1795 int size;
1796
1797 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1798 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1799
1800 if (size > nbytes)
0baf16f2
AM		 1801 {
1802 as_bad (_("%s relocations do not fit in %d bytes\n"),
1803 reloc_howto->name, nbytes);
1804 }
252b5132
RH		 1805 else
1806 {
0baf16f2
AM		 1807 char *p;
1808 int offset;
252b5132 1809
0baf16f2
AM		 1810 p = frag_more (nbytes);
1811 offset = 0;
1812 if (target_big_endian)
1813 offset = nbytes - size;
99a814a1
AM		 1814 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1815 &exp, 0, reloc);
252b5132
RH		 1816 }
1817 }
1818 else
1819 emit_expr (&exp, (unsigned int) nbytes);
1820 }
1821 while (*input_line_pointer++ == ',');
1822
99a814a1
AM		 1823 /* Put terminator back into stream. */
1824 input_line_pointer--;
252b5132
RH		 1825 demand_empty_rest_of_line ();
1826}
1827
1828/* Solaris pseduo op to change to the .rodata section. */
1829static void
98027b10 1830ppc_elf_rdata (int xxx)
252b5132
RH		 1831{
1832 char *save_line = input_line_pointer;
1833 static char section[] = ".rodata\n";
1834
99a814a1 1835 /* Just pretend this is .section .rodata */
252b5132
RH		 1836 input_line_pointer = section;
1837 obj_elf_section (xxx);
1838
1839 input_line_pointer = save_line;
1840}
1841
99a814a1 1842/* Pseudo op to make file scope bss items. */
252b5132 1843static void
98027b10 1844ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1845{
98027b10
AM		 1846 char *name;
1847 char c;
1848 char *p;
252b5132 1849 offsetT size;
98027b10 1850 symbolS *symbolP;
252b5132
RH		 1851 offsetT align;
1852 segT old_sec;
1853 int old_subsec;
1854 char *pfrag;
1855 int align2;
1856
1857 name = input_line_pointer;
1858 c = get_symbol_end ();
1859
99a814a1 1860 /* just after name is now '\0'. */
252b5132
RH		 1861 p = input_line_pointer;
1862 *p = c;
1863 SKIP_WHITESPACE ();
1864 if (*input_line_pointer != ',')
1865 {
1866 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1867 ignore_rest_of_line ();
1868 return;
1869 }
1870
1871 input_line_pointer++; /* skip ',' */
1872 if ((size = get_absolute_expression ()) < 0)
1873 {
1874 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1875 ignore_rest_of_line ();
1876 return;
1877 }
1878
1879 /* The third argument to .lcomm is the alignment. */
1880 if (*input_line_pointer != ',')
1881 align = 8;
1882 else
1883 {
1884 ++input_line_pointer;
1885 align = get_absolute_expression ();
1886 if (align <= 0)
1887 {
1888 as_warn (_("ignoring bad alignment"));
1889 align = 8;
1890 }
1891 }
1892
1893 *p = 0;
1894 symbolP = symbol_find_or_make (name);
1895 *p = c;
1896
1897 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1898 {
1899 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1900 S_GET_NAME (symbolP));
1901 ignore_rest_of_line ();
1902 return;
1903 }
1904
1905 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1906 {
1907 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1908 S_GET_NAME (symbolP),
1909 (long) S_GET_VALUE (symbolP),
1910 (long) size);
1911
1912 ignore_rest_of_line ();
1913 return;
1914 }
1915
99a814a1 1916 /* Allocate_bss. */
252b5132
RH		 1917 old_sec = now_seg;
1918 old_subsec = now_subseg;
1919 if (align)
1920 {
99a814a1 1921 /* Convert to a power of 2 alignment. */
252b5132
RH		 1922 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1923 if (align != 1)
1924 {
1925 as_bad (_("Common alignment not a power of 2"));
1926 ignore_rest_of_line ();
1927 return;
1928 }
1929 }
1930 else
1931 align2 = 0;
1932
1933 record_alignment (bss_section, align2);
1934 subseg_set (bss_section, 0);
1935 if (align2)
1936 frag_align (align2, 0, 0);
1937 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1938 symbol_get_frag (symbolP)->fr_symbol = 0;
1939 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1940 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1941 (char *) 0);
1942 *pfrag = 0;
1943 S_SET_SIZE (symbolP, size);
1944 S_SET_SEGMENT (symbolP, bss_section);
1945 subseg_set (old_sec, old_subsec);
1946 demand_empty_rest_of_line ();
1947}
1948
1949/* Validate any relocations emitted for -mrelocatable, possibly adding
1950 fixups for word relocations in writable segments, so we can adjust
1951 them at runtime. */
1952static void
98027b10 1953ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 1954{
1955 if (fixp->fx_done || fixp->fx_pcrel)
1956 return;
1957
1958 switch (shlib)
1959 {
1960 case SHLIB_NONE:
1961 case SHLIB_PIC:
1962 return;
1963
5d6f4f16 1964 case SHLIB_MRELOCATABLE:
252b5132
RH		 1965 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1966 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1967 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1968 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1969 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1970 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1971 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1972 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1973 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1974 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1975 && strcmp (segment_name (seg), ".got2") != 0
1976 && strcmp (segment_name (seg), ".dtors") != 0
1977 && strcmp (segment_name (seg), ".ctors") != 0
1978 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1979 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1980 && strcmp (segment_name (seg), ".eh_frame") != 0
1981 && strcmp (segment_name (seg), ".ex_shared") != 0)
1982 {
1983 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1984 || fixp->fx_r_type != BFD_RELOC_CTOR)
1985 {
1986 as_bad_where (fixp->fx_file, fixp->fx_line,
1987 _("Relocation cannot be done when using -mrelocatable"));
1988 }
1989 }
1990 return;
1991 }
1992}
0baf16f2 1993
7e8d4ab4
AM		 1994/* Prevent elf_frob_file_before_adjust removing a weak undefined
1995 function descriptor sym if the corresponding code sym is used. */
1996
1997void
98027b10 1998ppc_frob_file_before_adjust (void)
0baf16f2 1999{
7e8d4ab4 2000 symbolS *symp;
9232bbb0 2001 asection *toc;
0baf16f2 2002
7e8d4ab4
AM		 2003 if (!ppc_obj64)
2004 return;
2005
2006 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2007 {
7e8d4ab4
AM		 2008 const char *name;
2009 char *dotname;
2010 symbolS *dotsym;
2011 size_t len;
2012
2013 name = S_GET_NAME (symp);
2014 if (name[0] == '.')
2015 continue;
2016
2017 if (! S_IS_WEAK (symp)
2018 || S_IS_DEFINED (symp))
2019 continue;
2020
2021 len = strlen (name) + 1;
2022 dotname = xmalloc (len + 1);
2023 dotname[0] = '.';
2024 memcpy (dotname + 1, name, len);
461b725f 2025 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2026 free (dotname);
2027 if (dotsym != NULL && (symbol_used_p (dotsym)
2028 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2029 symbol_mark_used (symp);
2030
0baf16f2
AM		 2031 }
2032
9232bbb0
AM		 2033 toc = bfd_get_section_by_name (stdoutput, ".toc");
2034 if (toc != NULL
2035 && bfd_section_size (stdoutput, toc) > 0x10000)
2036 as_warn (_("TOC section size exceeds 64k"));
2037
7e8d4ab4
AM		 2038 /* Don't emit .TOC. symbol. */
2039 symp = symbol_find (".TOC.");
2040 if (symp != NULL)
2041 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2042}
252b5132
RH		 2043#endif /* OBJ_ELF */
2044\f
2045#ifdef TE_PE
2046
2047/*
99a814a1 2048 * Summary of parse_toc_entry.
252b5132
RH		 2049 *
2050 * in: Input_line_pointer points to the '[' in one of:
2051 *
2052 * [toc] [tocv] [toc32] [toc64]
2053 *
2054 * Anything else is an error of one kind or another.
2055 *
81d4177b 2056 * out:
252b5132
RH		 2057 * return value: success or failure
2058 * toc_kind: kind of toc reference
2059 * input_line_pointer:
2060 * success: first char after the ']'
2061 * failure: unchanged
2062 *
2063 * settings:
2064 *
2065 * [toc] - rv == success, toc_kind = default_toc
2066 * [tocv] - rv == success, toc_kind = data_in_toc
2067 * [toc32] - rv == success, toc_kind = must_be_32
2068 * [toc64] - rv == success, toc_kind = must_be_64
2069 *
2070 */
2071
81d4177b
KH		 2072enum toc_size_qualifier
2073{
252b5132
RH		 2074 default_toc, /* The toc cell constructed should be the system default size */
2075 data_in_toc, /* This is a direct reference to a toc cell */
2076 must_be_32, /* The toc cell constructed must be 32 bits wide */
2077 must_be_64 /* The toc cell constructed must be 64 bits wide */
2078};
2079
2080static int
98027b10 2081parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2082{
2083 char *start;
2084 char *toc_spec;
2085 char c;
2086 enum toc_size_qualifier t;
2087
99a814a1 2088 /* Save the input_line_pointer. */
252b5132
RH		 2089 start = input_line_pointer;
2090
99a814a1 2091 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2092 ++input_line_pointer;
2093 SKIP_WHITESPACE ();
81d4177b 2094
99a814a1 2095 /* Find the spelling of the operand. */
252b5132
RH		 2096 toc_spec = input_line_pointer;
2097 c = get_symbol_end ();
2098
99a814a1 2099 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2100 {
2101 t = default_toc;
2102 }
99a814a1 2103 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2104 {
2105 t = data_in_toc;
2106 }
99a814a1 2107 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2108 {
2109 t = must_be_32;
2110 }
99a814a1 2111 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2112 {
2113 t = must_be_64;
2114 }
2115 else
2116 {
2117 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2118 *input_line_pointer = c;
2119 input_line_pointer = start;
252b5132
RH		 2120 return 0;
2121 }
2122
99a814a1
AM		 2123 /* Now find the ']'. */
2124 *input_line_pointer = c;
252b5132 2125
81d4177b
KH		 2126 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2127 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2128
2129 if (c != ']')
2130 {
2131 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2132 input_line_pointer = start;
252b5132
RH		 2133 return 0;
2134 }
2135
99a814a1 2136 *toc_kind = t;
252b5132
RH		 2137 return 1;
2138}
2139#endif
2140\f
2141
dc1d03fc 2142#ifdef OBJ_ELF
6a0c61b7
EZ		 2143#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2144static void
98027b10 2145ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2146{
2147 unsigned int i;
2148
2149 /* Check we don't already exist. */
2150 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2151 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2152 return;
b34976b6 2153
6a0c61b7
EZ		 2154 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2155 {
2156 if (ppc_apuinfo_num_alloc == 0)
2157 {
2158 ppc_apuinfo_num_alloc = 4;
2159 ppc_apuinfo_list = (unsigned long *)
2160 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2161 }
2162 else
2163 {
2164 ppc_apuinfo_num_alloc += 4;
2165 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2166 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2167 }
2168 }
dc1d03fc 2169 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2170}
2171#undef APUID
dc1d03fc 2172#endif
6a0c61b7
EZ		 2173\f
2174
252b5132
RH		 2175/* We need to keep a list of fixups. We can't simply generate them as
2176 we go, because that would require us to first create the frag, and
2177 that would screw up references to ``.''. */
2178
2179struct ppc_fixup
2180{
2181 expressionS exp;
2182 int opindex;
2183 bfd_reloc_code_real_type reloc;
2184};
2185
2186#define MAX_INSN_FIXUPS (5)
2187
2188/* This routine is called for each instruction to be assembled. */
2189
2190void
98027b10 2191md_assemble (char *str)
252b5132
RH		 2192{
2193 char *s;
2194 const struct powerpc_opcode *opcode;
2195 unsigned long insn;
2196 const unsigned char *opindex_ptr;
2197 int skip_optional;
2198 int need_paren;
2199 int next_opindex;
2200 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2201 int fc;
2202 char *f;
09b935ac 2203 int addr_mod;
252b5132
RH		 2204 int i;
2205#ifdef OBJ_ELF
2206 bfd_reloc_code_real_type reloc;
2207#endif
2208
2209 /* Get the opcode. */
3882b010 2210 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2211 ;
2212 if (*s != '\0')
2213 *s++ = '\0';
2214
2215 /* Look up the opcode in the hash table. */
2216 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2217 if (opcode == (const struct powerpc_opcode *) NULL)
2218 {
2219 const struct powerpc_macro *macro;
2220
2221 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2222 if (macro == (const struct powerpc_macro *) NULL)
2223 as_bad (_("Unrecognized opcode: `%s'"), str);
2224 else
2225 ppc_macro (s, macro);
2226
2227 return;
2228 }
2229
2230 insn = opcode->opcode;
2231
2232 str = s;
3882b010 2233 while (ISSPACE (*str))
252b5132
RH		 2234 ++str;
2235
2236 /* PowerPC operands are just expressions. The only real issue is
2237 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2238 an optional operand separate the operands only with commas (in some
2239 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2240 have optional operands). Most instructions with optional operands
2241 have only one. Those that have more than one optional operand can
2242 take either all their operands or none. So, before we start seriously
2243 parsing the operands, we check to see if we have optional operands,
2244 and if we do, we count the number of commas to see which operands
2245 have been omitted. */
252b5132
RH		 2246 skip_optional = 0;
2247 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2248 {
2249 const struct powerpc_operand *operand;
2250
2251 operand = &powerpc_operands[*opindex_ptr];
2252 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2253 {
2254 unsigned int opcount;
7fe9cf6b
NC		 2255 unsigned int num_operands_expected;
2256 unsigned int i;
252b5132
RH		 2257
2258 /* There is an optional operand. Count the number of
2259 commas in the input line. */
2260 if (*str == '\0')
2261 opcount = 0;
2262 else
2263 {
2264 opcount = 1;
2265 s = str;
2266 while ((s = strchr (s, ',')) != (char *) NULL)
2267 {
2268 ++opcount;
2269 ++s;
2270 }
2271 }
2272
7fe9cf6b
NC		 2273 /* Compute the number of expected operands.
2274 Do not count fake operands. */
2275 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2276 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2277 ++ num_operands_expected;
2278
252b5132
RH		 2279 /* If there are fewer operands in the line then are called
2280 for by the instruction, we want to skip the optional
1f6c9eb0 2281 operands. */
7fe9cf6b 2282 if (opcount < num_operands_expected)
252b5132
RH		 2283 skip_optional = 1;
2284
2285 break;
2286 }
2287 }
2288
2289 /* Gather the operands. */
2290 need_paren = 0;
2291 next_opindex = 0;
2292 fc = 0;
2293 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2294 {
2295 const struct powerpc_operand *operand;
2296 const char *errmsg;
2297 char *hold;
2298 expressionS ex;
2299 char endc;
2300
2301 if (next_opindex == 0)
2302 operand = &powerpc_operands[*opindex_ptr];
2303 else
2304 {
2305 operand = &powerpc_operands[next_opindex];
2306 next_opindex = 0;
2307 }
252b5132
RH		 2308 errmsg = NULL;
2309
2310 /* If this is a fake operand, then we do not expect anything
2311 from the input. */
2312 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2313 {
2b3c4602 2314 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2315 if (errmsg != (const char *) NULL)
2316 as_bad (errmsg);
2317 continue;
2318 }
2319
2320 /* If this is an optional operand, and we are skipping it, just
2321 insert a zero. */
2322 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2323 && skip_optional)
2324 {
2325 if (operand->insert)
2326 {
2b3c4602 2327 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2328 if (errmsg != (const char *) NULL)
2329 as_bad (errmsg);
2330 }
2331 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2332 next_opindex = *opindex_ptr + 1;
2333 continue;
2334 }
2335
2336 /* Gather the operand. */
2337 hold = input_line_pointer;
2338 input_line_pointer = str;
2339
2340#ifdef TE_PE
81d4177b 2341 if (*input_line_pointer == '[')
252b5132
RH		 2342 {
2343 /* We are expecting something like the second argument here:
99a814a1
AM		 2344 *
2345 * lwz r4,[toc].GS.0.static_int(rtoc)
2346 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2347 * The argument following the `]' must be a symbol name, and the
2348 * register must be the toc register: 'rtoc' or '2'
2349 *
2350 * The effect is to 0 as the displacement field
2351 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2352 * the appropriate variation) reloc against it based on the symbol.
2353 * The linker will build the toc, and insert the resolved toc offset.
2354 *
2355 * Note:
2356 * o The size of the toc entry is currently assumed to be
2357 * 32 bits. This should not be assumed to be a hard coded
2358 * number.
2359 * o In an effort to cope with a change from 32 to 64 bits,
2360 * there are also toc entries that are specified to be
2361 * either 32 or 64 bits:
2362 * lwz r4,[toc32].GS.0.static_int(rtoc)
2363 * lwz r4,[toc64].GS.0.static_int(rtoc)
2364 * These demand toc entries of the specified size, and the
2365 * instruction probably requires it.
2366 */
252b5132
RH		 2367
2368 int valid_toc;
2369 enum toc_size_qualifier toc_kind;
2370 bfd_reloc_code_real_type toc_reloc;
2371
99a814a1
AM		 2372 /* Go parse off the [tocXX] part. */
2373 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2374
81d4177b 2375 if (!valid_toc)
252b5132 2376 {
99a814a1
AM		 2377 /* Note: message has already been issued.
2378 FIXME: what sort of recovery should we do?
2379 demand_rest_of_line (); return; ? */
252b5132
RH		 2380 }
2381
99a814a1
AM		 2382 /* Now get the symbol following the ']'. */
2383 expression (&ex);
252b5132
RH		 2384
2385 switch (toc_kind)
2386 {
2387 case default_toc:
99a814a1
AM		 2388 /* In this case, we may not have seen the symbol yet,
2389 since it is allowed to appear on a .extern or .globl
2390 or just be a label in the .data section. */
252b5132
RH		 2391 toc_reloc = BFD_RELOC_PPC_TOC16;
2392 break;
2393 case data_in_toc:
99a814a1
AM		 2394 /* 1. The symbol must be defined and either in the toc
2395 section, or a global.
2396 2. The reloc generated must have the TOCDEFN flag set
2397 in upper bit mess of the reloc type.
2398 FIXME: It's a little confusing what the tocv
2399 qualifier can be used for. At the very least, I've
2400 seen three uses, only one of which I'm sure I can
2401 explain. */
81d4177b
KH		 2402 if (ex.X_op == O_symbol)
2403 {
252b5132 2404 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2405 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2406 != tocdata_section)
252b5132 2407 {
99a814a1 2408 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2409 }
2410 }
2411
2412 toc_reloc = BFD_RELOC_PPC_TOC16;
2413 break;
2414 case must_be_32:
99a814a1
AM		 2415 /* FIXME: these next two specifically specify 32/64 bit
2416 toc entries. We don't support them today. Is this
2417 the right way to say that? */
252b5132
RH		 2418 toc_reloc = BFD_RELOC_UNUSED;
2419 as_bad (_("Unimplemented toc32 expression modifier"));
2420 break;
2421 case must_be_64:
99a814a1 2422 /* FIXME: see above. */
252b5132
RH		 2423 toc_reloc = BFD_RELOC_UNUSED;
2424 as_bad (_("Unimplemented toc64 expression modifier"));
2425 break;
2426 default:
bc805888 2427 fprintf (stderr,
99a814a1
AM		 2428 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2429 toc_kind);
bc805888 2430 abort ();
252b5132
RH		 2431 break;
2432 }
2433
2434 /* We need to generate a fixup for this expression. */
2435 if (fc >= MAX_INSN_FIXUPS)
2436 as_fatal (_("too many fixups"));
2437
2438 fixups[fc].reloc = toc_reloc;
2439 fixups[fc].exp = ex;
2440 fixups[fc].opindex = *opindex_ptr;
2441 ++fc;
2442
99a814a1
AM		 2443 /* Ok. We've set up the fixup for the instruction. Now make it
2444 look like the constant 0 was found here. */
252b5132
RH		 2445 ex.X_unsigned = 1;
2446 ex.X_op = O_constant;
2447 ex.X_add_number = 0;
2448 ex.X_add_symbol = NULL;
2449 ex.X_op_symbol = NULL;
2450 }
2451
2452 else
2453#endif /* TE_PE */
2454 {
2455 if (! register_name (&ex))
2456 {
2457 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2458 cr_operand = TRUE;
252b5132 2459 expression (&ex);
b34976b6 2460 cr_operand = FALSE;
252b5132
RH		 2461 }
2462 }
2463
2464 str = input_line_pointer;
2465 input_line_pointer = hold;
2466
2467 if (ex.X_op == O_illegal)
2468 as_bad (_("illegal operand"));
2469 else if (ex.X_op == O_absent)
2470 as_bad (_("missing operand"));
2471 else if (ex.X_op == O_register)
2472 {
2473 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2474 (char *) NULL, 0);
2475 }
2476 else if (ex.X_op == O_constant)
2477 {
2478#ifdef OBJ_ELF
81d4177b 2479 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2480 char *orig_str = str;
2481
2482 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2483 switch (reloc)
2484 {
2485 default:
2486 str = orig_str;
2487 break;
2488
2489 case BFD_RELOC_LO16:
2490 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2491 something which cleared it, we always produce a
2492 signed value. */
2493 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2494 ex.X_add_number &= 0xffff;
2495 else
0baf16f2 2496 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2497 break;
2498
2499 case BFD_RELOC_HI16:
0baf16f2
AM		 2500 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2501 ex.X_add_number = PPC_HI (ex.X_add_number);
2502 else
2503 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2504 break;
2505
2506 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2507 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2508 ex.X_add_number = PPC_HA (ex.X_add_number);
2509 else
2510 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2511 break;
2512
0baf16f2
AM		 2513 case BFD_RELOC_PPC64_HIGHER:
2514 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2515 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2516 else
2517 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2518 break;
2519
2520 case BFD_RELOC_PPC64_HIGHER_S:
2521 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2522 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2523 else
2524 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2525 break;
0baf16f2
AM		 2526
2527 case BFD_RELOC_PPC64_HIGHEST:
2528 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2529 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2530 else
2531 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2532 break;
2533
2534 case BFD_RELOC_PPC64_HIGHEST_S:
2535 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2536 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2537 else
2538 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2539 break;
252b5132 2540 }
0baf16f2 2541#endif /* OBJ_ELF */
252b5132
RH		 2542 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2543 (char *) NULL, 0);
2544 }
2545#ifdef OBJ_ELF
2546 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2547 {
cdba85ec
AM		 2548 /* Some TLS tweaks. */
2549 switch (reloc)
2550 {
2551 default:
2552 break;
2553 case BFD_RELOC_PPC_TLS:
2554 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2555 (char *) NULL, 0);
2556 break;
2557 /* We'll only use the 32 (or 64) bit form of these relocations
2558 in constants. Instructions get the 16 bit form. */
2559 case BFD_RELOC_PPC_DTPREL:
2560 reloc = BFD_RELOC_PPC_DTPREL16;
2561 break;
2562 case BFD_RELOC_PPC_TPREL:
2563 reloc = BFD_RELOC_PPC_TPREL16;
2564 break;
2565 }
2566
99a814a1
AM		 2567 /* For the absolute forms of branches, convert the PC
2568 relative form back into the absolute. */
252b5132
RH		 2569 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2570 {
2571 switch (reloc)
2572 {
2573 case BFD_RELOC_PPC_B26:
2574 reloc = BFD_RELOC_PPC_BA26;
2575 break;
2576 case BFD_RELOC_PPC_B16:
2577 reloc = BFD_RELOC_PPC_BA16;
2578 break;
2579 case BFD_RELOC_PPC_B16_BRTAKEN:
2580 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2581 break;
2582 case BFD_RELOC_PPC_B16_BRNTAKEN:
2583 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2584 break;
2585 default:
2586 break;
2587 }
2588 }
2589
2b3c4602 2590 if (ppc_obj64
adadcc0c 2591 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2592 {
2593 switch (reloc)
2594 {
2595 case BFD_RELOC_16:
2596 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2597 break;
2598 case BFD_RELOC_LO16:
2599 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2600 break;
2601 case BFD_RELOC_16_GOTOFF:
2602 reloc = BFD_RELOC_PPC64_GOT16_DS;
2603 break;
2604 case BFD_RELOC_LO16_GOTOFF:
2605 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2606 break;
2607 case BFD_RELOC_LO16_PLTOFF:
2608 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2609 break;
1cfc59d5 2610 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2611 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2612 break;
2613 case BFD_RELOC_LO16_BASEREL:
2614 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2615 break;
2616 case BFD_RELOC_PPC_TOC16:
2617 reloc = BFD_RELOC_PPC64_TOC16_DS;
2618 break;
2619 case BFD_RELOC_PPC64_TOC16_LO:
2620 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2621 break;
2622 case BFD_RELOC_PPC64_PLTGOT16:
2623 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2624 break;
2625 case BFD_RELOC_PPC64_PLTGOT16_LO:
2626 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2627 break;
cdba85ec
AM		 2628 case BFD_RELOC_PPC_DTPREL16:
2629 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2630 break;
2631 case BFD_RELOC_PPC_DTPREL16_LO:
2632 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2633 break;
2634 case BFD_RELOC_PPC_TPREL16:
2635 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2636 break;
2637 case BFD_RELOC_PPC_TPREL16_LO:
2638 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2639 break;
2640 case BFD_RELOC_PPC_GOT_DTPREL16:
2641 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2642 case BFD_RELOC_PPC_GOT_TPREL16:
2643 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2644 break;
0baf16f2
AM		 2645 default:
2646 as_bad (_("unsupported relocation for DS offset field"));
2647 break;
2648 }
2649 }
2650
252b5132
RH		 2651 /* We need to generate a fixup for this expression. */
2652 if (fc >= MAX_INSN_FIXUPS)
2653 as_fatal (_("too many fixups"));
2654 fixups[fc].exp = ex;
2655 fixups[fc].opindex = 0;
2656 fixups[fc].reloc = reloc;
2657 ++fc;
2658 }
2659#endif /* OBJ_ELF */
2660
2661 else
2662 {
2663 /* We need to generate a fixup for this expression. */
2664 if (fc >= MAX_INSN_FIXUPS)
2665 as_fatal (_("too many fixups"));
2666 fixups[fc].exp = ex;
2667 fixups[fc].opindex = *opindex_ptr;
2668 fixups[fc].reloc = BFD_RELOC_UNUSED;
2669 ++fc;
2670 }
2671
2672 if (need_paren)
2673 {
2674 endc = ')';
2675 need_paren = 0;
c3d65c1c
BE		 2676 /* If expecting more operands, then we want to see "),". */
2677 if (*str == endc && opindex_ptr[1] != 0)
2678 {
2679 do
2680 ++str;
2681 while (ISSPACE (*str));
2682 endc = ',';
2683 }
252b5132
RH		 2684 }
2685 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2686 {
2687 endc = '(';
2688 need_paren = 1;
2689 }
2690 else
2691 endc = ',';
2692
2693 /* The call to expression should have advanced str past any
2694 whitespace. */
2695 if (*str != endc
2696 && (endc != ',' || *str != '\0'))
2697 {
2698 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2699 break;
2700 }
2701
2702 if (*str != '\0')
2703 ++str;
2704 }
2705
3882b010 2706 while (ISSPACE (*str))
252b5132
RH		 2707 ++str;
2708
2709 if (*str != '\0')
2710 as_bad (_("junk at end of line: `%s'"), str);
2711
dc1d03fc 2712#ifdef OBJ_ELF
6a0c61b7
EZ		 2713 /* Do we need/want a APUinfo section? */
2714 if (ppc_cpu & (PPC_OPCODE_SPE
2715 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2716 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2717 | PPC_OPCODE_RFMCI))
2718 {
2719 /* These are all version "1". */
2720 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2721 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2722 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2723 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2724 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2725 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2726 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2727 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2728 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2729 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2730 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2731 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2732 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2733 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2734 }
dc1d03fc 2735#endif
6a0c61b7 2736
252b5132
RH		 2737 /* Write out the instruction. */
2738 f = frag_more (4);
09b935ac
AM		 2739 addr_mod = frag_now_fix () & 3;
2740 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2741 as_bad (_("instruction address is not a multiple of 4"));
2742 frag_now->insn_addr = addr_mod;
2743 frag_now->has_code = 1;
252b5132
RH		 2744 md_number_to_chars (f, insn, 4);
2745
5d6f4f16
GK		 2746#ifdef OBJ_ELF
2747 dwarf2_emit_insn (4);
2748#endif
2749
252b5132
RH		 2750 /* Create any fixups. At this point we do not use a
2751 bfd_reloc_code_real_type, but instead just use the
2752 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2753 handle fixups for any operand type, although that is admittedly
2754 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2755 md_apply_fix. */
252b5132
RH		 2756 for (i = 0; i < fc; i++)
2757 {
2758 const struct powerpc_operand *operand;
2759
2760 operand = &powerpc_operands[fixups[i].opindex];
2761 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2762 {
99a814a1 2763 reloc_howto_type *reloc_howto;
252b5132
RH		 2764 int size;
2765 int offset;
2766 fixS *fixP;
2767
99a814a1 2768 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2769 if (!reloc_howto)
2770 abort ();
2771
2772 size = bfd_get_reloc_size (reloc_howto);
2773 offset = target_big_endian ? (4 - size) : 0;
2774
2775 if (size < 1 || size > 4)
bc805888 2776 abort ();
252b5132 2777
99a814a1
AM		 2778 fixP = fix_new_exp (frag_now,
2779 f - frag_now->fr_literal + offset,
2780 size,
2781 &fixups[i].exp,
2782 reloc_howto->pc_relative,
252b5132
RH		 2783 fixups[i].reloc);
2784
2785 /* Turn off complaints that the addend is too large for things like
2786 foo+100000@ha. */
2787 switch (fixups[i].reloc)
2788 {
2789 case BFD_RELOC_16_GOTOFF:
2790 case BFD_RELOC_PPC_TOC16:
2791 case BFD_RELOC_LO16:
2792 case BFD_RELOC_HI16:
2793 case BFD_RELOC_HI16_S:
0baf16f2 2794#ifdef OBJ_ELF
0baf16f2
AM		 2795 case BFD_RELOC_PPC64_HIGHER:
2796 case BFD_RELOC_PPC64_HIGHER_S:
2797 case BFD_RELOC_PPC64_HIGHEST:
2798 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2799#endif
252b5132
RH		 2800 fixP->fx_no_overflow = 1;
2801 break;
2802 default:
2803 break;
2804 }
2805 }
2806 else
99a814a1
AM		 2807 fix_new_exp (frag_now,
2808 f - frag_now->fr_literal,
2809 4,
252b5132
RH		 2810 &fixups[i].exp,
2811 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2812 ((bfd_reloc_code_real_type)
99a814a1 2813 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2814 }
2815}
2816
2817/* Handle a macro. Gather all the operands, transform them as
2818 described by the macro, and call md_assemble recursively. All the
2819 operands are separated by commas; we don't accept parentheses
2820 around operands here. */
2821
2822static void
98027b10 2823ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 2824{
2825 char *operands[10];
2826 unsigned int count;
2827 char *s;
2828 unsigned int len;
2829 const char *format;
db557034 2830 unsigned int arg;
252b5132
RH		 2831 char *send;
2832 char *complete;
2833
2834 /* Gather the users operands into the operands array. */
2835 count = 0;
2836 s = str;
2837 while (1)
2838 {
2839 if (count >= sizeof operands / sizeof operands[0])
2840 break;
2841 operands[count++] = s;
2842 s = strchr (s, ',');
2843 if (s == (char *) NULL)
2844 break;
2845 *s++ = '\0';
81d4177b 2846 }
252b5132
RH		 2847
2848 if (count != macro->operands)
2849 {
2850 as_bad (_("wrong number of operands"));
2851 return;
2852 }
2853
2854 /* Work out how large the string must be (the size is unbounded
2855 because it includes user input). */
2856 len = 0;
2857 format = macro->format;
2858 while (*format != '\0')
2859 {
2860 if (*format != '%')
2861 {
2862 ++len;
2863 ++format;
2864 }
2865 else
2866 {
2867 arg = strtol (format + 1, &send, 10);
db557034 2868 know (send != format && arg < count);
252b5132
RH		 2869 len += strlen (operands[arg]);
2870 format = send;
2871 }
2872 }
2873
2874 /* Put the string together. */
2875 complete = s = (char *) alloca (len + 1);
2876 format = macro->format;
2877 while (*format != '\0')
2878 {
2879 if (*format != '%')
2880 *s++ = *format++;
2881 else
2882 {
2883 arg = strtol (format + 1, &send, 10);
2884 strcpy (s, operands[arg]);
2885 s += strlen (s);
2886 format = send;
2887 }
2888 }
2889 *s = '\0';
2890
2891 /* Assemble the constructed instruction. */
2892 md_assemble (complete);
81d4177b 2893}
252b5132
RH		 2894\f
2895#ifdef OBJ_ELF
99a814a1 2896/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2897
2898int
98027b10 2899ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 2900{
2901 if (letter == 'e')
2902 return SHF_EXCLUDE;
2903
13ae64f3 2904 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2905 return -1;
252b5132
RH		 2906}
2907
2908int
98027b10 2909ppc_section_word (char *str, size_t len)
252b5132 2910{
9de8d8f1
RH		 2911 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2912 return SHF_EXCLUDE;
252b5132 2913
9de8d8f1 2914 return -1;
252b5132
RH		 2915}
2916
2917int
98027b10 2918ppc_section_type (char *str, size_t len)
252b5132 2919{
9de8d8f1
RH		 2920 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2921 return SHT_ORDERED;
252b5132 2922
9de8d8f1 2923 return -1;
252b5132
RH		 2924}
2925
2926int
98027b10 2927ppc_section_flags (int flags, int attr, int type)
252b5132
RH		 2928{
2929 if (type == SHT_ORDERED)
2930 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2931
2932 if (attr & SHF_EXCLUDE)
2933 flags |= SEC_EXCLUDE;
2934
2935 return flags;
2936}
2937#endif /* OBJ_ELF */
2938
2939\f
2940/* Pseudo-op handling. */
2941
2942/* The .byte pseudo-op. This is similar to the normal .byte
2943 pseudo-op, but it can also take a single ASCII string. */
2944
2945static void
98027b10 2946ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 2947{
2948 if (*input_line_pointer != '\"')
2949 {
2950 cons (1);
2951 return;
2952 }
2953
2954 /* Gather characters. A real double quote is doubled. Unusual
2955 characters are not permitted. */
2956 ++input_line_pointer;
2957 while (1)
2958 {
2959 char c;
2960
2961 c = *input_line_pointer++;
2962
2963 if (c == '\"')
2964 {
2965 if (*input_line_pointer != '\"')
2966 break;
2967 ++input_line_pointer;
2968 }
2969
2970 FRAG_APPEND_1_CHAR (c);
2971 }
2972
2973 demand_empty_rest_of_line ();
2974}
2975\f
2976#ifdef OBJ_XCOFF
2977
2978/* XCOFF specific pseudo-op handling. */
2979
2980/* This is set if we are creating a .stabx symbol, since we don't want
2981 to handle symbol suffixes for such symbols. */
b34976b6 2982static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2983
2984/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2985 symbols in the .bss segment as though they were local common
67c1ffbe 2986 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2987 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2988
2989static void
98027b10 2990ppc_comm (int lcomm)
252b5132
RH		 2991{
2992 asection *current_seg = now_seg;
2993 subsegT current_subseg = now_subseg;
2994 char *name;
2995 char endc;
2996 char *end_name;
2997 offsetT size;
2998 offsetT align;
2999 symbolS *lcomm_sym = NULL;
3000 symbolS *sym;
3001 char *pfrag;
3002
3003 name = input_line_pointer;
3004 endc = get_symbol_end ();
3005 end_name = input_line_pointer;
3006 *end_name = endc;
3007
3008 if (*input_line_pointer != ',')
3009 {
3010 as_bad (_("missing size"));
3011 ignore_rest_of_line ();
3012 return;
3013 }
3014 ++input_line_pointer;
3015
3016 size = get_absolute_expression ();
3017 if (size < 0)
3018 {
3019 as_bad (_("negative size"));
3020 ignore_rest_of_line ();
3021 return;
3022 }
3023
3024 if (! lcomm)
3025 {
3026 /* The third argument to .comm is the alignment. */
3027 if (*input_line_pointer != ',')
1ad63b2f 3028 align = 2;
252b5132
RH		 3029 else
3030 {
3031 ++input_line_pointer;
3032 align = get_absolute_expression ();
3033 if (align <= 0)
3034 {
3035 as_warn (_("ignoring bad alignment"));
1ad63b2f 3036 align = 2;
252b5132
RH		 3037 }
3038 }
3039 }
3040 else
3041 {
3042 char *lcomm_name;
3043 char lcomm_endc;
3044
1ad63b2f 3045 if (size <= 4)
252b5132
RH		 3046 align = 2;
3047 else
3048 align = 3;
3049
3050 /* The third argument to .lcomm appears to be the real local
3051 common symbol to create. References to the symbol named in
3052 the first argument are turned into references to the third
3053 argument. */
3054 if (*input_line_pointer != ',')
3055 {
3056 as_bad (_("missing real symbol name"));
3057 ignore_rest_of_line ();
3058 return;
3059 }
3060 ++input_line_pointer;
3061
3062 lcomm_name = input_line_pointer;
3063 lcomm_endc = get_symbol_end ();
81d4177b 3064
252b5132
RH		 3065 lcomm_sym = symbol_find_or_make (lcomm_name);
3066
3067 *input_line_pointer = lcomm_endc;
3068 }
3069
3070 *end_name = '\0';
3071 sym = symbol_find_or_make (name);
3072 *end_name = endc;
3073
3074 if (S_IS_DEFINED (sym)
3075 || S_GET_VALUE (sym) != 0)
3076 {
3077 as_bad (_("attempt to redefine symbol"));
3078 ignore_rest_of_line ();
3079 return;
3080 }
81d4177b 3081
252b5132 3082 record_alignment (bss_section, align);
81d4177b 3083
252b5132
RH		 3084 if (! lcomm
3085 || ! S_IS_DEFINED (lcomm_sym))
3086 {
3087 symbolS *def_sym;
3088 offsetT def_size;
3089
3090 if (! lcomm)
3091 {
3092 def_sym = sym;
3093 def_size = size;
3094 S_SET_EXTERNAL (sym);
3095 }
3096 else
3097 {
809ffe0d 3098 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3099 def_sym = lcomm_sym;
3100 def_size = 0;
3101 }
3102
3103 subseg_set (bss_section, 1);
3104 frag_align (align, 0, 0);
81d4177b 3105
809ffe0d 3106 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3107 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3108 def_size, (char *) NULL);
3109 *pfrag = 0;
3110 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3111 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3112 }
3113 else if (lcomm)
3114 {
3115 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3116 symbol_get_frag (lcomm_sym)->fr_offset =
3117 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3118 &~ ((1 << align) - 1));
809ffe0d
ILT		 3119 if (align > symbol_get_tc (lcomm_sym)->align)
3120 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3121 }
3122
3123 if (lcomm)
3124 {
3125 /* Make sym an offset from lcomm_sym. */
3126 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3127 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3128 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3129 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3130 }
3131
3132 subseg_set (current_seg, current_subseg);
3133
3134 demand_empty_rest_of_line ();
3135}
3136
3137/* The .csect pseudo-op. This switches us into a different
3138 subsegment. The first argument is a symbol whose value is the
3139 start of the .csect. In COFF, csect symbols get special aux
3140 entries defined by the x_csect field of union internal_auxent. The
3141 optional second argument is the alignment (the default is 2). */
3142
3143static void
98027b10 3144ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3145{
3146 char *name;
3147 char endc;
3148 symbolS *sym;
931e13a6 3149 offsetT align;
252b5132
RH		 3150
3151 name = input_line_pointer;
3152 endc = get_symbol_end ();
81d4177b 3153
252b5132
RH		 3154 sym = symbol_find_or_make (name);
3155
3156 *input_line_pointer = endc;
3157
3158 if (S_GET_NAME (sym)[0] == '\0')
3159 {
3160 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3161 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3162 }
3163
931e13a6 3164 align = 2;
252b5132
RH		 3165 if (*input_line_pointer == ',')
3166 {
3167 ++input_line_pointer;
931e13a6 3168 align = get_absolute_expression ();
252b5132
RH		 3169 }
3170
931e13a6
AM		 3171 ppc_change_csect (sym, align);
3172
252b5132
RH		 3173 demand_empty_rest_of_line ();
3174}
3175
3176/* Change to a different csect. */
3177
3178static void
98027b10 3179ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3180{
3181 if (S_IS_DEFINED (sym))
809ffe0d 3182 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3183 else
3184 {
3185 symbolS **list_ptr;
3186 int after_toc;
3187 int hold_chunksize;
3188 symbolS *list;
931e13a6
AM		 3189 int is_code;
3190 segT sec;
252b5132
RH		 3191
3192 /* This is a new csect. We need to look at the symbol class to
3193 figure out whether it should go in the text section or the
3194 data section. */
3195 after_toc = 0;
931e13a6 3196 is_code = 0;
809ffe0d 3197 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3198 {
3199 case XMC_PR:
3200 case XMC_RO:
3201 case XMC_DB:
3202 case XMC_GL:
3203 case XMC_XO:
3204 case XMC_SV:
3205 case XMC_TI:
3206 case XMC_TB:
3207 S_SET_SEGMENT (sym, text_section);
809ffe0d 3208 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3209 ++ppc_text_subsegment;
3210 list_ptr = &ppc_text_csects;
931e13a6 3211 is_code = 1;
252b5132
RH		 3212 break;
3213 case XMC_RW:
3214 case XMC_TC0:
3215 case XMC_TC:
3216 case XMC_DS:
3217 case XMC_UA:
3218 case XMC_BS:
3219 case XMC_UC:
3220 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3221 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3222 == ppc_data_subsegment))
252b5132
RH		 3223 after_toc = 1;
3224 S_SET_SEGMENT (sym, data_section);
809ffe0d 3225 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3226 ++ppc_data_subsegment;
3227 list_ptr = &ppc_data_csects;
3228 break;
3229 default:
3230 abort ();
3231 }
3232
3233 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3234 changing subsegments, so that we don't use a lot of memory
3235 space for what may be a small section. */
252b5132
RH		 3236 hold_chunksize = chunksize;
3237 chunksize = 64;
3238
931e13a6
AM		 3239 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3240 symbol_get_tc (sym)->subseg);
252b5132
RH		 3241
3242 chunksize = hold_chunksize;
3243
3244 if (after_toc)
3245 ppc_after_toc_frag = frag_now;
3246
931e13a6
AM		 3247 record_alignment (sec, align);
3248 if (is_code)
3249 frag_align_code (align, 0);
3250 else
3251 frag_align (align, 0, 0);
3252
809ffe0d 3253 symbol_set_frag (sym, frag_now);
252b5132
RH		 3254 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3255
931e13a6 3256 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3257 symbol_get_tc (sym)->output = 1;
3258 symbol_get_tc (sym)->within = sym;
81d4177b 3259
252b5132 3260 for (list = *list_ptr;
809ffe0d
ILT		 3261 symbol_get_tc (list)->next != (symbolS *) NULL;
3262 list = symbol_get_tc (list)->next)
252b5132 3263 ;
809ffe0d 3264 symbol_get_tc (list)->next = sym;
81d4177b 3265
252b5132 3266 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3267 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3268 &symbol_lastP);
252b5132
RH		 3269 }
3270
3271 ppc_current_csect = sym;
3272}
3273
3274/* This function handles the .text and .data pseudo-ops. These
3275 pseudo-ops aren't really used by XCOFF; we implement them for the
3276 convenience of people who aren't used to XCOFF. */
3277
3278static void
98027b10 3279ppc_section (int type)
252b5132
RH		 3280{
3281 const char *name;
3282 symbolS *sym;
3283
3284 if (type == 't')
3285 name = ".text[PR]";
3286 else if (type == 'd')
3287 name = ".data[RW]";
3288 else
3289 abort ();
3290
3291 sym = symbol_find_or_make (name);
3292
931e13a6 3293 ppc_change_csect (sym, 2);
252b5132
RH		 3294
3295 demand_empty_rest_of_line ();
3296}
3297
3298/* This function handles the .section pseudo-op. This is mostly to
3299 give an error, since XCOFF only supports .text, .data and .bss, but
3300 we do permit the user to name the text or data section. */
3301
3302static void
98027b10 3303ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3304{
3305 char *user_name;
3306 const char *real_name;
3307 char c;
3308 symbolS *sym;
3309
3310 user_name = input_line_pointer;
3311 c = get_symbol_end ();
3312
3313 if (strcmp (user_name, ".text") == 0)
3314 real_name = ".text[PR]";
3315 else if (strcmp (user_name, ".data") == 0)
3316 real_name = ".data[RW]";
3317 else
3318 {
3319 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3320 *input_line_pointer = c;
3321 ignore_rest_of_line ();
3322 return;
3323 }
3324
3325 *input_line_pointer = c;
3326
3327 sym = symbol_find_or_make (real_name);
3328
931e13a6 3329 ppc_change_csect (sym, 2);
252b5132
RH		 3330
3331 demand_empty_rest_of_line ();
3332}
3333
3334/* The .extern pseudo-op. We create an undefined symbol. */
3335
3336static void
98027b10 3337ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3338{
3339 char *name;
3340 char endc;
3341
3342 name = input_line_pointer;
3343 endc = get_symbol_end ();
3344
3345 (void) symbol_find_or_make (name);
3346
3347 *input_line_pointer = endc;
3348
3349 demand_empty_rest_of_line ();
3350}
3351
3352/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3353
3354static void
98027b10 3355ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3356{
3357 char *name;
3358 char endc;
3359 symbolS *sym;
3360
3361 name = input_line_pointer;
3362 endc = get_symbol_end ();
3363
3364 sym = symbol_find_or_make (name);
3365
3366 *input_line_pointer = endc;
3367
809ffe0d 3368 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3369
3370 demand_empty_rest_of_line ();
3371}
3372
3373/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3374 although I don't know why it bothers. */
3375
3376static void
98027b10 3377ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3378{
3379 char *name;
3380 char endc;
3381 symbolS *sym;
3382 int len;
3383
3384 name = input_line_pointer;
3385 endc = get_symbol_end ();
3386
3387 sym = symbol_find_or_make (name);
3388
3389 *input_line_pointer = endc;
3390
3391 if (*input_line_pointer != ',')
3392 {
3393 as_bad (_("missing rename string"));
3394 ignore_rest_of_line ();
3395 return;
3396 }
3397 ++input_line_pointer;
3398
809ffe0d 3399 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3400
3401 demand_empty_rest_of_line ();
3402}
3403
3404/* The .stabx pseudo-op. This is similar to a normal .stabs
3405 pseudo-op, but slightly different. A sample is
3406 .stabx "main:F-1",.main,142,0
3407 The first argument is the symbol name to create. The second is the
3408 value, and the third is the storage class. The fourth seems to be
3409 always zero, and I am assuming it is the type. */
3410
3411static void
98027b10 3412ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3413{
3414 char *name;
3415 int len;
3416 symbolS *sym;
3417 expressionS exp;
3418
3419 name = demand_copy_C_string (&len);
3420
3421 if (*input_line_pointer != ',')
3422 {
3423 as_bad (_("missing value"));
3424 return;
3425 }
3426 ++input_line_pointer;
3427
b34976b6 3428 ppc_stab_symbol = TRUE;
252b5132 3429 sym = symbol_make (name);
b34976b6 3430 ppc_stab_symbol = FALSE;
252b5132 3431
809ffe0d 3432 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3433
3434 (void) expression (&exp);
3435
3436 switch (exp.X_op)
3437 {
3438 case O_illegal:
3439 case O_absent:
3440 case O_big:
3441 as_bad (_("illegal .stabx expression; zero assumed"));
3442 exp.X_add_number = 0;
3443 /* Fall through. */
3444 case O_constant:
3445 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3446 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3447 break;
3448
3449 case O_symbol:
3450 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3451 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3452 else
3453 {
3454 S_SET_VALUE (sym,
3455 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3456 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3457 }
3458 break;
3459
3460 default:
3461 /* The value is some complex expression. This will probably
99a814a1
AM		 3462 fail at some later point, but this is probably the right
3463 thing to do here. */
809ffe0d 3464 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3465 break;
3466 }
3467
3468 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3469 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3470
3471 if (*input_line_pointer != ',')
3472 {
3473 as_bad (_("missing class"));
3474 return;
3475 }
3476 ++input_line_pointer;
3477
3478 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3479
3480 if (*input_line_pointer != ',')
3481 {
3482 as_bad (_("missing type"));
3483 return;
3484 }
3485 ++input_line_pointer;
3486
3487 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3488
809ffe0d 3489 symbol_get_tc (sym)->output = 1;
252b5132 3490
6877bb43 3491 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3492
809ffe0d 3493 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3494
41ea10b1 3495 /* In this case :
99a814a1 3496
41ea10b1
TR		 3497 .bs name
3498 .stabx "z",arrays_,133,0
3499 .es
99a814a1 3500
41ea10b1 3501 .comm arrays_,13768,3
99a814a1 3502
41ea10b1
TR		 3503 resolve_symbol_value will copy the exp's "within" into sym's when the
3504 offset is 0. Since this seems to be corner case problem,
3505 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3506 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3507
3508 if (exp.X_op == O_symbol)
41ea10b1
TR		 3509 {
3510 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3511 }
6877bb43 3512 }
99a814a1 3513
252b5132
RH		 3514 if (exp.X_op != O_symbol
3515 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3516 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3517 ppc_frob_label (sym);
3518 else
3519 {
3520 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3521 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3522 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3523 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3524 }
3525
3526 demand_empty_rest_of_line ();
3527}
3528
3529/* The .function pseudo-op. This takes several arguments. The first
3530 argument seems to be the external name of the symbol. The second
67c1ffbe 3531 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3532 uses the same name for both. I have no idea what the third and
3533 fourth arguments are meant to be. The optional fifth argument is
3534 an expression for the size of the function. In COFF this symbol
3535 gets an aux entry like that used for a csect. */
3536
3537static void
98027b10 3538ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3539{
3540 char *name;
3541 char endc;
3542 char *s;
3543 symbolS *ext_sym;
3544 symbolS *lab_sym;
3545
3546 name = input_line_pointer;
3547 endc = get_symbol_end ();
3548
3549 /* Ignore any [PR] suffix. */
3550 name = ppc_canonicalize_symbol_name (name);
3551 s = strchr (name, '[');
3552 if (s != (char *) NULL
3553 && strcmp (s + 1, "PR]") == 0)
3554 *s = '\0';
3555
3556 ext_sym = symbol_find_or_make (name);
3557
3558 *input_line_pointer = endc;
3559
3560 if (*input_line_pointer != ',')
3561 {
3562 as_bad (_("missing symbol name"));
3563 ignore_rest_of_line ();
3564 return;
3565 }
3566 ++input_line_pointer;
3567
3568 name = input_line_pointer;
3569 endc = get_symbol_end ();
3570
3571 lab_sym = symbol_find_or_make (name);
3572
3573 *input_line_pointer = endc;
3574
3575 if (ext_sym != lab_sym)
3576 {
809ffe0d
ILT		 3577 expressionS exp;
3578
3579 exp.X_op = O_symbol;
3580 exp.X_add_symbol = lab_sym;
3581 exp.X_op_symbol = NULL;
3582 exp.X_add_number = 0;
3583 exp.X_unsigned = 0;
3584 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3585 }
3586
809ffe0d
ILT		 3587 if (symbol_get_tc (ext_sym)->class == -1)
3588 symbol_get_tc (ext_sym)->class = XMC_PR;
3589 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3590
3591 if (*input_line_pointer == ',')
3592 {
3593 expressionS ignore;
3594
3595 /* Ignore the third argument. */
3596 ++input_line_pointer;
3597 expression (&ignore);
3598 if (*input_line_pointer == ',')
3599 {
3600 /* Ignore the fourth argument. */
3601 ++input_line_pointer;
3602 expression (&ignore);
3603 if (*input_line_pointer == ',')
3604 {
3605 /* The fifth argument is the function size. */
3606 ++input_line_pointer;
809ffe0d
ILT		 3607 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3608 absolute_section,
3609 (valueT) 0,
3610 &zero_address_frag);
3611 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3612 }
3613 }
3614 }
3615
3616 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3617 SF_SET_FUNCTION (ext_sym);
3618 SF_SET_PROCESS (ext_sym);
3619 coff_add_linesym (ext_sym);
3620
3621 demand_empty_rest_of_line ();
3622}
3623
3624/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3625 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3626 with the correct line number */
5d6255fe 3627
8642cce8 3628static symbolS *saved_bi_sym = 0;
252b5132
RH		 3629
3630static void
98027b10 3631ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3632{
3633 symbolS *sym;
3634
3635 sym = symbol_make (".bf");
3636 S_SET_SEGMENT (sym, text_section);
809ffe0d 3637 symbol_set_frag (sym, frag_now);
252b5132
RH		 3638 S_SET_VALUE (sym, frag_now_fix ());
3639 S_SET_STORAGE_CLASS (sym, C_FCN);
3640
3641 coff_line_base = get_absolute_expression ();
3642
3643 S_SET_NUMBER_AUXILIARY (sym, 1);
3644 SA_SET_SYM_LNNO (sym, coff_line_base);
3645
8642cce8 3646 /* Line number for bi. */
5d6255fe 3647 if (saved_bi_sym)
8642cce8
TR		 3648 {
3649 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3650 saved_bi_sym = 0;
3651 }
5d6255fe 3652
8642cce8 3653
809ffe0d 3654 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3655
3656 ppc_frob_label (sym);
3657
3658 demand_empty_rest_of_line ();
3659}
3660
3661/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3662 ".ef", except that the line number is absolute, not relative to the
3663 most recent ".bf" symbol. */
3664
3665static void
98027b10 3666ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3667{
3668 symbolS *sym;
3669
3670 sym = symbol_make (".ef");
3671 S_SET_SEGMENT (sym, text_section);
809ffe0d 3672 symbol_set_frag (sym, frag_now);
252b5132
RH		 3673 S_SET_VALUE (sym, frag_now_fix ());
3674 S_SET_STORAGE_CLASS (sym, C_FCN);
3675 S_SET_NUMBER_AUXILIARY (sym, 1);
3676 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3677 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3678
3679 ppc_frob_label (sym);
3680
3681 demand_empty_rest_of_line ();
3682}
3683
3684/* The .bi and .ei pseudo-ops. These take a string argument and
3685 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3686 the symbol list. The value of .bi will be know when the next .bf
3687 is encountered. */
252b5132
RH		 3688
3689static void
98027b10 3690ppc_biei (int ei)
252b5132
RH		 3691{
3692 static symbolS *last_biei;
3693
3694 char *name;
3695 int len;
3696 symbolS *sym;
3697 symbolS *look;
3698
3699 name = demand_copy_C_string (&len);
3700
3701 /* The value of these symbols is actually file offset. Here we set
3702 the value to the index into the line number entries. In
3703 ppc_frob_symbols we set the fix_line field, which will cause BFD
3704 to do the right thing. */
3705
3706 sym = symbol_make (name);
3707 /* obj-coff.c currently only handles line numbers correctly in the
3708 .text section. */
3709 S_SET_SEGMENT (sym, text_section);
3710 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3711 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3712
3713 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3714 symbol_get_tc (sym)->output = 1;
81d4177b 3715
8642cce8 3716 /* Save bi. */
5d6255fe 3717 if (ei)
8642cce8
TR		 3718 saved_bi_sym = 0;
3719 else
3720 saved_bi_sym = sym;
3721
252b5132
RH		 3722 for (look = last_biei ? last_biei : symbol_rootP;
3723 (look != (symbolS *) NULL
3724 && (S_GET_STORAGE_CLASS (look) == C_FILE
3725 || S_GET_STORAGE_CLASS (look) == C_BINCL
3726 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3727 look = symbol_next (look))
3728 ;
3729 if (look != (symbolS *) NULL)
3730 {
3731 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3732 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3733 last_biei = sym;
3734 }
3735
3736 demand_empty_rest_of_line ();
3737}
3738
3739/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3740 There is one argument, which is a csect symbol. The value of the
3741 .bs symbol is the index of this csect symbol. */
3742
3743static void
98027b10 3744ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3745{
3746 char *name;
3747 char endc;
3748 symbolS *csect;
3749 symbolS *sym;
3750
3751 if (ppc_current_block != NULL)
3752 as_bad (_("nested .bs blocks"));
3753
3754 name = input_line_pointer;
3755 endc = get_symbol_end ();
3756
3757 csect = symbol_find_or_make (name);
3758
3759 *input_line_pointer = endc;
3760
3761 sym = symbol_make (".bs");
3762 S_SET_SEGMENT (sym, now_seg);
3763 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3764 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3765 symbol_get_tc (sym)->output = 1;
252b5132 3766
809ffe0d 3767 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3768
3769 ppc_frob_label (sym);
3770
3771 ppc_current_block = sym;
3772
3773 demand_empty_rest_of_line ();
3774}
3775
3776/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3777
3778static void
98027b10 3779ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3780{
3781 symbolS *sym;
3782
3783 if (ppc_current_block == NULL)
3784 as_bad (_(".es without preceding .bs"));
3785
3786 sym = symbol_make (".es");
3787 S_SET_SEGMENT (sym, now_seg);
3788 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3789 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3790 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3791
3792 ppc_frob_label (sym);
3793
3794 ppc_current_block = NULL;
3795
3796 demand_empty_rest_of_line ();
3797}
3798
3799/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3800 line number. */
3801
3802static void
98027b10 3803ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3804{
3805 symbolS *sym;
3806
3807 sym = symbol_make (".bb");
3808 S_SET_SEGMENT (sym, text_section);
809ffe0d 3809 symbol_set_frag (sym, frag_now);
252b5132
RH		 3810 S_SET_VALUE (sym, frag_now_fix ());
3811 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3812
3813 S_SET_NUMBER_AUXILIARY (sym, 1);
3814 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3815
809ffe0d 3816 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3817
3818 SF_SET_PROCESS (sym);
3819
3820 ppc_frob_label (sym);
3821
3822 demand_empty_rest_of_line ();
3823}
3824
3825/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3826 line number. */
3827
3828static void
98027b10 3829ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3830{
3831 symbolS *sym;
3832
3833 sym = symbol_make (".eb");
3834 S_SET_SEGMENT (sym, text_section);
809ffe0d 3835 symbol_set_frag (sym, frag_now);
252b5132
RH		 3836 S_SET_VALUE (sym, frag_now_fix ());
3837 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3838 S_SET_NUMBER_AUXILIARY (sym, 1);
3839 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3840 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3841
3842 SF_SET_PROCESS (sym);
3843
3844 ppc_frob_label (sym);
3845
3846 demand_empty_rest_of_line ();
3847}
3848
3849/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3850 specified name. */
3851
3852static void
98027b10 3853ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3854{
3855 char *name;
3856 int len;
3857 symbolS *sym;
3858
3859 name = demand_copy_C_string (&len);
3860 sym = symbol_make (name);
3861 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3862 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3863 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3864 S_SET_VALUE (sym, 0);
809ffe0d 3865 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3866
3867 ppc_frob_label (sym);
3868
3869 demand_empty_rest_of_line ();
3870}
3871
3872/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3873
3874static void
98027b10 3875ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3876{
3877 symbolS *sym;
3878
3879 sym = symbol_make (".ec");
3880 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3881 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3882 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3883 S_SET_VALUE (sym, 0);
809ffe0d 3884 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3885
3886 ppc_frob_label (sym);
3887
3888 demand_empty_rest_of_line ();
3889}
3890
3891/* The .toc pseudo-op. Switch to the .toc subsegment. */
3892
3893static void
98027b10 3894ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3895{
3896 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3897 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3898 else
3899 {
3900 subsegT subseg;
3901 symbolS *sym;
3902 symbolS *list;
81d4177b 3903
252b5132
RH		 3904 subseg = ppc_data_subsegment;
3905 ++ppc_data_subsegment;
3906
3907 subseg_new (segment_name (data_section), subseg);
3908 ppc_toc_frag = frag_now;
3909
3910 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3911 symbol_set_frag (sym, frag_now);
252b5132
RH		 3912 S_SET_SEGMENT (sym, data_section);
3913 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3914 symbol_get_tc (sym)->subseg = subseg;
3915 symbol_get_tc (sym)->output = 1;
3916 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3917
3918 ppc_toc_csect = sym;
81d4177b 3919
252b5132 3920 for (list = ppc_data_csects;
809ffe0d
ILT		 3921 symbol_get_tc (list)->next != (symbolS *) NULL;
3922 list = symbol_get_tc (list)->next)
252b5132 3923 ;
809ffe0d 3924 symbol_get_tc (list)->next = sym;
252b5132
RH		 3925
3926 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3927 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3928 &symbol_lastP);
252b5132
RH		 3929 }
3930
3931 ppc_current_csect = ppc_toc_csect;
3932
3933 demand_empty_rest_of_line ();
3934}
3935
3936/* The AIX assembler automatically aligns the operands of a .long or
3937 .short pseudo-op, and we want to be compatible. */
3938
3939static void
98027b10 3940ppc_xcoff_cons (int log_size)
252b5132
RH		 3941{
3942 frag_align (log_size, 0, 0);
3943 record_alignment (now_seg, log_size);
3944 cons (1 << log_size);
3945}
3946
3947static void
98027b10 3948ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 3949{
3950 expressionS exp;
3951 int byte_count;
3952
3953 (void) expression (&exp);
3954
3955 if (exp.X_op != O_constant)
3956 {
3957 as_bad (_("non-constant byte count"));
3958 return;
3959 }
3960
3961 byte_count = exp.X_add_number;
3962
3963 if (*input_line_pointer != ',')
3964 {
3965 as_bad (_("missing value"));
3966 return;
3967 }
3968
3969 ++input_line_pointer;
3970 cons (byte_count);
3971}
3972
3973#endif /* OBJ_XCOFF */
0baf16f2 3974#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3975\f
3976/* The .tc pseudo-op. This is used when generating either XCOFF or
3977 ELF. This takes two or more arguments.
3978
3979 When generating XCOFF output, the first argument is the name to
3980 give to this location in the toc; this will be a symbol with class
0baf16f2 3981 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3982 this location in the TOC; often there is just one more argument, a
1049f94e 3983 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3984 depends on target word size. A 32-bit target uses 4-byte values, a
3985 64-bit target uses 8-byte values.
252b5132
RH		 3986
3987 When not generating XCOFF output, the arguments are the same, but
3988 the first argument is simply ignored. */
3989
3990static void
98027b10 3991ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3992{
3993#ifdef OBJ_XCOFF
3994
3995 /* Define the TOC symbol name. */
3996 {
3997 char *name;
3998 char endc;
3999 symbolS *sym;
4000
4001 if (ppc_toc_csect == (symbolS *) NULL
4002 || ppc_toc_csect != ppc_current_csect)
4003 {
4004 as_bad (_(".tc not in .toc section"));
4005 ignore_rest_of_line ();
4006 return;
4007 }
4008
4009 name = input_line_pointer;
4010 endc = get_symbol_end ();
4011
4012 sym = symbol_find_or_make (name);
4013
4014 *input_line_pointer = endc;
4015
4016 if (S_IS_DEFINED (sym))
4017 {
4018 symbolS *label;
4019
809ffe0d
ILT		 4020 label = symbol_get_tc (ppc_current_csect)->within;
4021 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 4022 {
4023 as_bad (_(".tc with no label"));
4024 ignore_rest_of_line ();
4025 return;
4026 }
4027
4028 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4029 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4030 S_SET_VALUE (label, S_GET_VALUE (sym));
4031
4032 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4033 ++input_line_pointer;
4034
4035 return;
4036 }
4037
4038 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4039 symbol_set_frag (sym, frag_now);
252b5132 4040 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4041 symbol_get_tc (sym)->class = XMC_TC;
4042 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4043
4044 ppc_frob_label (sym);
4045 }
4046
0baf16f2
AM		 4047#endif /* OBJ_XCOFF */
4048#ifdef OBJ_ELF
9c7977b3 4049 int align;
252b5132
RH		 4050
4051 /* Skip the TOC symbol name. */
4052 while (is_part_of_name (*input_line_pointer)
4053 || *input_line_pointer == '['
4054 || *input_line_pointer == ']'
4055 || *input_line_pointer == '{'
4056 || *input_line_pointer == '}')
4057 ++input_line_pointer;
4058
0baf16f2 4059 /* Align to a four/eight byte boundary. */
2b3c4602 4060 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4061 frag_align (align, 0, 0);
4062 record_alignment (now_seg, align);
0baf16f2 4063#endif /* OBJ_ELF */
252b5132
RH		 4064
4065 if (*input_line_pointer != ',')
4066 demand_empty_rest_of_line ();
4067 else
4068 {
4069 ++input_line_pointer;
2b3c4602 4070 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4071 }
4072}
0baf16f2
AM		 4073
4074/* Pseudo-op .machine. */
0baf16f2
AM		 4075
4076static void
98027b10 4077ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4078{
69c040df
AM		 4079 char *cpu_string;
4080#define MAX_HISTORY 100
4081 static unsigned long *cpu_history;
4082 static int curr_hist;
4083
4084 SKIP_WHITESPACE ();
4085
4086 if (*input_line_pointer == '"')
4087 {
4088 int len;
4089 cpu_string = demand_copy_C_string (&len);
4090 }
4091 else
4092 {
4093 char c;
4094 cpu_string = input_line_pointer;
4095 c = get_symbol_end ();
4096 cpu_string = xstrdup (cpu_string);
4097 *input_line_pointer = c;
4098 }
4099
4100 if (cpu_string != NULL)
4101 {
4102 unsigned long old_cpu = ppc_cpu;
4103 char *p;
4104
4105 for (p = cpu_string; *p != 0; p++)
4106 *p = TOLOWER (*p);
4107
4108 if (strcmp (cpu_string, "push") == 0)
4109 {
4110 if (cpu_history == NULL)
4111 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4112
4113 if (curr_hist >= MAX_HISTORY)
4114 as_bad (_(".machine stack overflow"));
4115 else
4116 cpu_history[curr_hist++] = ppc_cpu;
4117 }
4118 else if (strcmp (cpu_string, "pop") == 0)
4119 {
4120 if (curr_hist <= 0)
4121 as_bad (_(".machine stack underflow"));
4122 else
4123 ppc_cpu = cpu_history[--curr_hist];
4124 }
4125 else if (parse_cpu (cpu_string))
4126 ;
4127 else
4128 as_bad (_("invalid machine `%s'"), cpu_string);
4129
4130 if (ppc_cpu != old_cpu)
4131 ppc_setup_opcodes ();
4132 }
4133
4134 demand_empty_rest_of_line ();
0baf16f2
AM		 4135}
4136
4137/* See whether a symbol is in the TOC section. */
4138
4139static int
98027b10 4140ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4141{
4142#ifdef OBJ_XCOFF
4143 return symbol_get_tc (sym)->class == XMC_TC;
4144#endif
4145#ifdef OBJ_ELF
4146 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4147 if (ppc_obj64)
0baf16f2
AM		 4148 return strcmp (sname, ".toc") == 0;
4149 else
4150 return strcmp (sname, ".got") == 0;
4151#endif
4152}
4153#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4154\f
4155#ifdef TE_PE
4156
99a814a1 4157/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4158
4159/* Set the current section. */
4160static void
98027b10 4161ppc_set_current_section (segT new)
252b5132
RH		 4162{
4163 ppc_previous_section = ppc_current_section;
4164 ppc_current_section = new;
4165}
4166
4167/* pseudo-op: .previous
4168 behaviour: toggles the current section with the previous section.
4169 errors: None
99a814a1
AM		 4170 warnings: "No previous section" */
4171
252b5132 4172static void
98027b10 4173ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4174{
4175 symbolS *tmp;
4176
81d4177b 4177 if (ppc_previous_section == NULL)
252b5132 4178 {
99a814a1 4179 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4180 return;
4181 }
4182
99a814a1 4183 subseg_set (ppc_previous_section, 0);
252b5132 4184
99a814a1 4185 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4186}
4187
4188/* pseudo-op: .pdata
4189 behaviour: predefined read only data section
b34976b6 4190 double word aligned
252b5132
RH		 4191 errors: None
4192 warnings: None
4193 initial: .section .pdata "adr3"
b34976b6 4194 a - don't know -- maybe a misprint
252b5132
RH		 4195 d - initialized data
4196 r - readable
4197 3 - double word aligned (that would be 4 byte boundary)
4198
4199 commentary:
4200 Tag index tables (also known as the function table) for exception
99a814a1 4201 handling, debugging, etc. */
252b5132 4202
252b5132 4203static void
98027b10 4204ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4205{
81d4177b 4206 if (pdata_section == 0)
252b5132
RH		 4207 {
4208 pdata_section = subseg_new (".pdata", 0);
81d4177b 4209
252b5132
RH		 4210 bfd_set_section_flags (stdoutput, pdata_section,
4211 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4212 | SEC_READONLY | SEC_DATA ));
81d4177b 4213
252b5132
RH		 4214 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4215 }
4216 else
4217 {
99a814a1 4218 pdata_section = subseg_new (".pdata", 0);
252b5132 4219 }
99a814a1 4220 ppc_set_current_section (pdata_section);
252b5132
RH		 4221}
4222
4223/* pseudo-op: .ydata
4224 behaviour: predefined read only data section
b34976b6 4225 double word aligned
252b5132
RH		 4226 errors: None
4227 warnings: None
4228 initial: .section .ydata "drw3"
b34976b6 4229 a - don't know -- maybe a misprint
252b5132
RH		 4230 d - initialized data
4231 r - readable
4232 3 - double word aligned (that would be 4 byte boundary)
4233 commentary:
4234 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4235 debugging, etc. */
4236
252b5132 4237static void
98027b10 4238ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4239{
81d4177b 4240 if (ydata_section == 0)
252b5132
RH		 4241 {
4242 ydata_section = subseg_new (".ydata", 0);
4243 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4244 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4245 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4246
4247 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4248 }
4249 else
4250 {
4251 ydata_section = subseg_new (".ydata", 0);
4252 }
99a814a1 4253 ppc_set_current_section (ydata_section);
252b5132
RH		 4254}
4255
4256/* pseudo-op: .reldata
4257 behaviour: predefined read write data section
b34976b6 4258 double word aligned (4-byte)
252b5132
RH		 4259 FIXME: relocation is applied to it
4260 FIXME: what's the difference between this and .data?
4261 errors: None
4262 warnings: None
4263 initial: .section .reldata "drw3"
4264 d - initialized data
4265 r - readable
4266 w - writeable
4267 3 - double word aligned (that would be 8 byte boundary)
4268
4269 commentary:
4270 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4271 function descriptors, etc. */
4272
252b5132 4273static void
98027b10 4274ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4275{
4276 if (reldata_section == 0)
4277 {
4278 reldata_section = subseg_new (".reldata", 0);
4279
4280 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4281 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4282 | SEC_DATA));
252b5132
RH		 4283
4284 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4285 }
4286 else
4287 {
4288 reldata_section = subseg_new (".reldata", 0);
4289 }
99a814a1 4290 ppc_set_current_section (reldata_section);
252b5132
RH		 4291}
4292
4293/* pseudo-op: .rdata
4294 behaviour: predefined read only data section
b34976b6 4295 double word aligned
252b5132
RH		 4296 errors: None
4297 warnings: None
4298 initial: .section .rdata "dr3"
4299 d - initialized data
4300 r - readable
99a814a1
AM		 4301 3 - double word aligned (that would be 4 byte boundary) */
4302
252b5132 4303static void
98027b10 4304ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4305{
4306 if (rdata_section == 0)
4307 {
4308 rdata_section = subseg_new (".rdata", 0);
4309 bfd_set_section_flags (stdoutput, rdata_section,
4310 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4311 | SEC_READONLY | SEC_DATA ));
4312
4313 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4314 }
4315 else
4316 {
4317 rdata_section = subseg_new (".rdata", 0);
4318 }
99a814a1 4319 ppc_set_current_section (rdata_section);
252b5132
RH		 4320}
4321
4322/* pseudo-op: .ualong
81d4177b 4323 behaviour: much like .int, with the exception that no alignment is
b34976b6 4324 performed.
252b5132
RH		 4325 FIXME: test the alignment statement
4326 errors: None
99a814a1
AM		 4327 warnings: None */
4328
252b5132 4329static void
98027b10 4330ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4331{
99a814a1
AM		 4332 /* Try for long. */
4333 cons (4);
252b5132
RH		 4334}
4335
4336/* pseudo-op: .znop <symbol name>
4337 behaviour: Issue a nop instruction
b34976b6 4338 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4339 the supplied symbol name.
4340 errors: None
99a814a1
AM		 4341 warnings: Missing symbol name */
4342
252b5132 4343static void
98027b10 4344ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4345{
4346 unsigned long insn;
4347 const struct powerpc_opcode *opcode;
4348 expressionS ex;
4349 char *f;
252b5132 4350 symbolS *sym;
252b5132
RH		 4351 char *symbol_name;
4352 char c;
4353 char *name;
4354 unsigned int exp;
4355 flagword flags;
4356 asection *sec;
4357
99a814a1 4358 /* Strip out the symbol name. */
252b5132
RH		 4359 symbol_name = input_line_pointer;
4360 c = get_symbol_end ();
4361
4362 name = xmalloc (input_line_pointer - symbol_name + 1);
4363 strcpy (name, symbol_name);
4364
4365 sym = symbol_find_or_make (name);
4366
4367 *input_line_pointer = c;
4368
4369 SKIP_WHITESPACE ();
4370
4371 /* Look up the opcode in the hash table. */
4372 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4373
99a814a1 4374 /* Stick in the nop. */
252b5132
RH		 4375 insn = opcode->opcode;
4376
4377 /* Write out the instruction. */
4378 f = frag_more (4);
4379 md_number_to_chars (f, insn, 4);
4380 fix_new (frag_now,
4381 f - frag_now->fr_literal,
4382 4,
4383 sym,
4384 0,
4385 0,
4386 BFD_RELOC_16_GOT_PCREL);
4387
4388}
4389
81d4177b
KH		 4390/* pseudo-op:
4391 behaviour:
4392 errors:
99a814a1
AM		 4393 warnings: */
4394
252b5132 4395static void
98027b10 4396ppc_pe_comm (int lcomm)
252b5132 4397{
98027b10
AM		 4398 char *name;
4399 char c;
4400 char *p;
252b5132 4401 offsetT temp;
98027b10 4402 symbolS *symbolP;
252b5132
RH		 4403 offsetT align;
4404
4405 name = input_line_pointer;
4406 c = get_symbol_end ();
4407
99a814a1 4408 /* just after name is now '\0'. */
252b5132
RH		 4409 p = input_line_pointer;
4410 *p = c;
4411 SKIP_WHITESPACE ();
4412 if (*input_line_pointer != ',')
4413 {
4414 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4415 ignore_rest_of_line ();
4416 return;
4417 }
4418
4419 input_line_pointer++; /* skip ',' */
4420 if ((temp = get_absolute_expression ()) < 0)
4421 {
4422 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4423 ignore_rest_of_line ();
4424 return;
4425 }
4426
4427 if (! lcomm)
4428 {
4429 /* The third argument to .comm is the alignment. */
4430 if (*input_line_pointer != ',')
4431 align = 3;
4432 else
4433 {
4434 ++input_line_pointer;
4435 align = get_absolute_expression ();
4436 if (align <= 0)
4437 {
4438 as_warn (_("ignoring bad alignment"));
4439 align = 3;
4440 }
4441 }
4442 }
4443
4444 *p = 0;
4445 symbolP = symbol_find_or_make (name);
4446
4447 *p = c;
4448 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4449 {
4450 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4451 S_GET_NAME (symbolP));
4452 ignore_rest_of_line ();
4453 return;
4454 }
4455
4456 if (S_GET_VALUE (symbolP))
4457 {
4458 if (S_GET_VALUE (symbolP) != (valueT) temp)
4459 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4460 S_GET_NAME (symbolP),
4461 (long) S_GET_VALUE (symbolP),
4462 (long) temp);
4463 }
4464 else
4465 {
4466 S_SET_VALUE (symbolP, (valueT) temp);
4467 S_SET_EXTERNAL (symbolP);
86ebace2 4468 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4469 }
4470
4471 demand_empty_rest_of_line ();
4472}
4473
4474/*
4475 * implement the .section pseudo op:
4476 * .section name {, "flags"}
4477 * ^ ^
4478 * | +--- optional flags: 'b' for bss
4479 * | 'i' for info
4480 * +-- section name 'l' for lib
4481 * 'n' for noload
4482 * 'o' for over
4483 * 'w' for data
4484 * 'd' (apparently m88k for data)
4485 * 'x' for text
4486 * But if the argument is not a quoted string, treat it as a
4487 * subsegment number.
4488 *
4489 * FIXME: this is a copy of the section processing from obj-coff.c, with
4490 * additions/changes for the moto-pas assembler support. There are three
4491 * categories:
4492 *
81d4177b 4493 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4494 * setting bits that bfd probably neither understands or uses. The
4495 * correct approach (?) will have to incorporate extra fields attached
4496 * to the section to hold the system specific stuff. (krk)
4497 *
4498 * Section Contents:
4499 * 'a' - unknown - referred to in documentation, but no definition supplied
4500 * 'c' - section has code
4501 * 'd' - section has initialized data
4502 * 'u' - section has uninitialized data
4503 * 'i' - section contains directives (info)
4504 * 'n' - section can be discarded
4505 * 'R' - remove section at link time
4506 *
4507 * Section Protection:
4508 * 'r' - section is readable
4509 * 'w' - section is writeable
4510 * 'x' - section is executable
4511 * 's' - section is sharable
4512 *
4513 * Section Alignment:
4514 * '0' - align to byte boundary
4515 * '1' - align to halfword undary
4516 * '2' - align to word boundary
4517 * '3' - align to doubleword boundary
4518 * '4' - align to quadword boundary
4519 * '5' - align to 32 byte boundary
4520 * '6' - align to 64 byte boundary
4521 *
4522 */
4523
4524void
98027b10 4525ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4526{
99a814a1 4527 /* Strip out the section name. */
252b5132
RH		 4528 char *section_name;
4529 char c;
4530 char *name;
4531 unsigned int exp;
4532 flagword flags;
4533 segT sec;
4534 int align;
4535
4536 section_name = input_line_pointer;
4537 c = get_symbol_end ();
4538
4539 name = xmalloc (input_line_pointer - section_name + 1);
4540 strcpy (name, section_name);
4541
4542 *input_line_pointer = c;
4543
4544 SKIP_WHITESPACE ();
4545
4546 exp = 0;
4547 flags = SEC_NO_FLAGS;
4548
4549 if (strcmp (name, ".idata$2") == 0)
4550 {
4551 align = 0;
4552 }
4553 else if (strcmp (name, ".idata$3") == 0)
4554 {
4555 align = 0;
4556 }
4557 else if (strcmp (name, ".idata$4") == 0)
4558 {
4559 align = 2;
4560 }
4561 else if (strcmp (name, ".idata$5") == 0)
4562 {
4563 align = 2;
4564 }
4565 else if (strcmp (name, ".idata$6") == 0)
4566 {
4567 align = 1;
4568 }
4569 else
99a814a1
AM		 4570 /* Default alignment to 16 byte boundary. */
4571 align = 4;
252b5132
RH		 4572
4573 if (*input_line_pointer == ',')
4574 {
4575 ++input_line_pointer;
4576 SKIP_WHITESPACE ();
4577 if (*input_line_pointer != '"')
4578 exp = get_absolute_expression ();
4579 else
4580 {
4581 ++input_line_pointer;
4582 while (*input_line_pointer != '"'
4583 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4584 {
4585 switch (*input_line_pointer)
4586 {
4587 /* Section Contents */
4588 case 'a': /* unknown */
4589 as_bad (_("Unsupported section attribute -- 'a'"));
4590 break;
4591 case 'c': /* code section */
81d4177b 4592 flags |= SEC_CODE;
252b5132
RH		 4593 break;
4594 case 'd': /* section has initialized data */
4595 flags |= SEC_DATA;
4596 break;
4597 case 'u': /* section has uninitialized data */
4598 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4599 in winnt.h */
4600 flags |= SEC_ROM;
4601 break;
4602 case 'i': /* section contains directives (info) */
4603 /* FIXME: This is IMAGE_SCN_LNK_INFO
4604 in winnt.h */
4605 flags |= SEC_HAS_CONTENTS;
4606 break;
4607 case 'n': /* section can be discarded */
81d4177b 4608 flags &=~ SEC_LOAD;
252b5132
RH		 4609 break;
4610 case 'R': /* Remove section at link time */
4611 flags |= SEC_NEVER_LOAD;
4612 break;
8d452c78 4613#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4614 /* Section Protection */
4615 case 'r': /* section is readable */
4616 flags |= IMAGE_SCN_MEM_READ;
4617 break;
4618 case 'w': /* section is writeable */
4619 flags |= IMAGE_SCN_MEM_WRITE;
4620 break;
4621 case 'x': /* section is executable */
4622 flags |= IMAGE_SCN_MEM_EXECUTE;
4623 break;
4624 case 's': /* section is sharable */
4625 flags |= IMAGE_SCN_MEM_SHARED;
4626 break;
4627
4628 /* Section Alignment */
4629 case '0': /* align to byte boundary */
4630 flags |= IMAGE_SCN_ALIGN_1BYTES;
4631 align = 0;
4632 break;
4633 case '1': /* align to halfword boundary */
4634 flags |= IMAGE_SCN_ALIGN_2BYTES;
4635 align = 1;
4636 break;
4637 case '2': /* align to word boundary */
4638 flags |= IMAGE_SCN_ALIGN_4BYTES;
4639 align = 2;
4640 break;
4641 case '3': /* align to doubleword boundary */
4642 flags |= IMAGE_SCN_ALIGN_8BYTES;
4643 align = 3;
4644 break;
4645 case '4': /* align to quadword boundary */
4646 flags |= IMAGE_SCN_ALIGN_16BYTES;
4647 align = 4;
4648 break;
4649 case '5': /* align to 32 byte boundary */
4650 flags |= IMAGE_SCN_ALIGN_32BYTES;
4651 align = 5;
4652 break;
4653 case '6': /* align to 64 byte boundary */
4654 flags |= IMAGE_SCN_ALIGN_64BYTES;
4655 align = 6;
4656 break;
8d452c78 4657#endif
252b5132 4658 default:
99a814a1
AM		 4659 as_bad (_("unknown section attribute '%c'"),
4660 *input_line_pointer);
252b5132
RH		 4661 break;
4662 }
4663 ++input_line_pointer;
4664 }
4665 if (*input_line_pointer == '"')
4666 ++input_line_pointer;
4667 }
4668 }
4669
4670 sec = subseg_new (name, (subsegT) exp);
4671
99a814a1 4672 ppc_set_current_section (sec);
252b5132
RH		 4673
4674 if (flags != SEC_NO_FLAGS)
4675 {
4676 if (! bfd_set_section_flags (stdoutput, sec, flags))
4677 as_bad (_("error setting flags for \"%s\": %s"),
4678 bfd_section_name (stdoutput, sec),
4679 bfd_errmsg (bfd_get_error ()));
4680 }
4681
99a814a1 4682 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4683}
4684
4685static void
98027b10 4686ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4687{
4688 char *name;
4689 char endc;
4690 symbolS *ext_sym;
4691
4692 name = input_line_pointer;
4693 endc = get_symbol_end ();
4694
4695 ext_sym = symbol_find_or_make (name);
4696
4697 *input_line_pointer = endc;
4698
4699 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4700 SF_SET_FUNCTION (ext_sym);
4701 SF_SET_PROCESS (ext_sym);
4702 coff_add_linesym (ext_sym);
4703
4704 demand_empty_rest_of_line ();
4705}
4706
4707static void
98027b10 4708ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4709{
4710 if (tocdata_section == 0)
4711 {
4712 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4713 /* FIXME: section flags won't work. */
252b5132
RH		 4714 bfd_set_section_flags (stdoutput, tocdata_section,
4715 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4716 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4717
4718 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4719 }
4720 else
4721 {
4722 rdata_section = subseg_new (".tocd", 0);
4723 }
4724
99a814a1 4725 ppc_set_current_section (tocdata_section);
252b5132
RH		 4726
4727 demand_empty_rest_of_line ();
4728}
4729
4730/* Don't adjust TOC relocs to use the section symbol. */
4731
4732int
98027b10 4733ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4734{
4735 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4736}
4737
4738#endif
4739\f
4740#ifdef OBJ_XCOFF
4741
4742/* XCOFF specific symbol and file handling. */
4743
4744/* Canonicalize the symbol name. We use the to force the suffix, if
4745 any, to use square brackets, and to be in upper case. */
4746
4747char *
98027b10 4748ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4749{
4750 char *s;
4751
4752 if (ppc_stab_symbol)
4753 return name;
4754
4755 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4756 ;
4757 if (*s != '\0')
4758 {
4759 char brac;
4760
4761 if (*s == '[')
4762 brac = ']';
4763 else
4764 {
4765 *s = '[';
4766 brac = '}';
4767 }
4768
4769 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4770 *s = TOUPPER (*s);
252b5132
RH		 4771
4772 if (*s == '\0' || s[1] != '\0')
4773 as_bad (_("bad symbol suffix"));
4774
4775 *s = ']';
4776 }
4777
4778 return name;
4779}
4780
4781/* Set the class of a symbol based on the suffix, if any. This is
4782 called whenever a new symbol is created. */
4783
4784void
98027b10 4785ppc_symbol_new_hook (symbolS *sym)
252b5132 4786{
809ffe0d 4787 struct ppc_tc_sy *tc;
252b5132
RH		 4788 const char *s;
4789
809ffe0d
ILT		 4790 tc = symbol_get_tc (sym);
4791 tc->next = NULL;
4792 tc->output = 0;
4793 tc->class = -1;
4794 tc->real_name = NULL;
4795 tc->subseg = 0;
4796 tc->align = 0;
4797 tc->size = NULL;
4798 tc->within = NULL;
252b5132
RH		 4799
4800 if (ppc_stab_symbol)
4801 return;
4802
4803 s = strchr (S_GET_NAME (sym), '[');
4804 if (s == (const char *) NULL)
4805 {
4806 /* There is no suffix. */
4807 return;
4808 }
4809
4810 ++s;
4811
4812 switch (s[0])
4813 {
4814 case 'B':
4815 if (strcmp (s, "BS]") == 0)
809ffe0d 4816 tc->class = XMC_BS;
252b5132
RH		 4817 break;
4818 case 'D':
4819 if (strcmp (s, "DB]") == 0)
809ffe0d 4820 tc->class = XMC_DB;
252b5132 4821 else if (strcmp (s, "DS]") == 0)
809ffe0d 4822 tc->class = XMC_DS;
252b5132
RH		 4823 break;
4824 case 'G':
4825 if (strcmp (s, "GL]") == 0)
809ffe0d 4826 tc->class = XMC_GL;
252b5132
RH		 4827 break;
4828 case 'P':
4829 if (strcmp (s, "PR]") == 0)
809ffe0d 4830 tc->class = XMC_PR;
252b5132
RH		 4831 break;
4832 case 'R':
4833 if (strcmp (s, "RO]") == 0)
809ffe0d 4834 tc->class = XMC_RO;
252b5132 4835 else if (strcmp (s, "RW]") == 0)
809ffe0d 4836 tc->class = XMC_RW;
252b5132
RH		 4837 break;
4838 case 'S':
4839 if (strcmp (s, "SV]") == 0)
809ffe0d 4840 tc->class = XMC_SV;
252b5132
RH		 4841 break;
4842 case 'T':
4843 if (strcmp (s, "TC]") == 0)
809ffe0d 4844 tc->class = XMC_TC;
252b5132 4845 else if (strcmp (s, "TI]") == 0)
809ffe0d 4846 tc->class = XMC_TI;
252b5132 4847 else if (strcmp (s, "TB]") == 0)
809ffe0d 4848 tc->class = XMC_TB;
252b5132 4849 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4850 tc->class = XMC_TC0;
252b5132
RH		 4851 break;
4852 case 'U':
4853 if (strcmp (s, "UA]") == 0)
809ffe0d 4854 tc->class = XMC_UA;
252b5132 4855 else if (strcmp (s, "UC]") == 0)
809ffe0d 4856 tc->class = XMC_UC;
252b5132
RH		 4857 break;
4858 case 'X':
4859 if (strcmp (s, "XO]") == 0)
809ffe0d 4860 tc->class = XMC_XO;
252b5132
RH		 4861 break;
4862 }
4863
809ffe0d 4864 if (tc->class == -1)
252b5132
RH		 4865 as_bad (_("Unrecognized symbol suffix"));
4866}
4867
4868/* Set the class of a label based on where it is defined. This
4869 handles symbols without suffixes. Also, move the symbol so that it
4870 follows the csect symbol. */
4871
4872void
98027b10 4873ppc_frob_label (symbolS *sym)
252b5132
RH		 4874{
4875 if (ppc_current_csect != (symbolS *) NULL)
4876 {
809ffe0d
ILT		 4877 if (symbol_get_tc (sym)->class == -1)
4878 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4879
4880 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4881 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4882 &symbol_rootP, &symbol_lastP);
4883 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4884 }
07a53e5c
RH		 4885
4886#ifdef OBJ_ELF
4887 dwarf2_emit_label (sym);
4888#endif
252b5132
RH		 4889}
4890
4891/* This variable is set by ppc_frob_symbol if any absolute symbols are
4892 seen. It tells ppc_adjust_symtab whether it needs to look through
4893 the symbols. */
4894
b34976b6 4895static bfd_boolean ppc_saw_abs;
252b5132
RH		 4896
4897/* Change the name of a symbol just before writing it out. Set the
4898 real name if the .rename pseudo-op was used. Otherwise, remove any
4899 class suffix. Return 1 if the symbol should not be included in the
4900 symbol table. */
4901
4902int
98027b10 4903ppc_frob_symbol (symbolS *sym)
252b5132
RH		 4904{
4905 static symbolS *ppc_last_function;
4906 static symbolS *set_end;
4907
4908 /* Discard symbols that should not be included in the output symbol
4909 table. */
809ffe0d
ILT		 4910 if (! symbol_used_in_reloc_p (sym)
4911 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4912 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4913 && ! symbol_get_tc (sym)->output
252b5132
RH		 4914 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4915 return 1;
4916
a161fe53
AM		 4917 /* This one will disappear anyway. Don't make a csect sym for it. */
4918 if (sym == abs_section_sym)
4919 return 1;
4920
809ffe0d
ILT		 4921 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4922 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4923 else
4924 {
4925 const char *name;
4926 const char *s;
4927
4928 name = S_GET_NAME (sym);
4929 s = strchr (name, '[');
4930 if (s != (char *) NULL)
4931 {
4932 unsigned int len;
4933 char *snew;
4934
4935 len = s - name;
4936 snew = xmalloc (len + 1);
4937 memcpy (snew, name, len);
4938 snew[len] = '\0';
4939
4940 S_SET_NAME (sym, snew);
4941 }
4942 }
4943
4944 if (set_end != (symbolS *) NULL)
4945 {
4946 SA_SET_SYM_ENDNDX (set_end, sym);
4947 set_end = NULL;
4948 }
4949
4950 if (SF_GET_FUNCTION (sym))
4951 {
4952 if (ppc_last_function != (symbolS *) NULL)
4953 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4954 ppc_last_function = sym;
809ffe0d 4955 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4956 {
6386f3a7 4957 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4958 SA_SET_SYM_FSIZE (sym,
4959 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4960 }
4961 }
4962 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4963 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4964 {
4965 if (ppc_last_function == (symbolS *) NULL)
4966 as_bad (_(".ef with no preceding .function"));
4967 else
4968 {
4969 set_end = ppc_last_function;
4970 ppc_last_function = NULL;
4971
4972 /* We don't have a C_EFCN symbol, but we need to force the
4973 COFF backend to believe that it has seen one. */
4974 coff_last_function = NULL;
4975 }
4976 }
4977
670ec21d 4978 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4979 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4980 && S_GET_STORAGE_CLASS (sym) != C_FILE
4981 && S_GET_STORAGE_CLASS (sym) != C_FCN
4982 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4983 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4984 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4985 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4986 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4987 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4988 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4989
4990 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4991 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4992 {
4993 int i;
4994 union internal_auxent *a;
4995
4996 /* Create a csect aux. */
4997 i = S_GET_NUMBER_AUXILIARY (sym);
4998 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4999 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5000 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 5001 {
5002 /* This is the TOC table. */
5003 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5004 a->x_csect.x_scnlen.l = 0;
5005 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5006 }
809ffe0d 5007 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5008 {
5009 /* This is a csect symbol. x_scnlen is the size of the
5010 csect. */
809ffe0d 5011 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5012 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5013 S_GET_SEGMENT (sym))
5014 - S_GET_VALUE (sym));
5015 else
5016 {
6386f3a7 5017 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5018 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5019 - S_GET_VALUE (sym));
5020 }
809ffe0d 5021 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5022 }
5023 else if (S_GET_SEGMENT (sym) == bss_section)
5024 {
5025 /* This is a common symbol. */
809ffe0d
ILT		 5026 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5027 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5028 if (S_IS_EXTERNAL (sym))
809ffe0d 5029 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5030 else
809ffe0d 5031 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5032 }
5033 else if (S_GET_SEGMENT (sym) == absolute_section)
5034 {
5035 /* This is an absolute symbol. The csect will be created by
99a814a1 5036 ppc_adjust_symtab. */
b34976b6 5037 ppc_saw_abs = TRUE;
252b5132 5038 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5039 if (symbol_get_tc (sym)->class == -1)
5040 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5041 }
5042 else if (! S_IS_DEFINED (sym))
5043 {
5044 /* This is an external symbol. */
5045 a->x_csect.x_scnlen.l = 0;
5046 a->x_csect.x_smtyp = XTY_ER;
5047 }
809ffe0d 5048 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5049 {
5050 symbolS *next;
5051
5052 /* This is a TOC definition. x_scnlen is the size of the
5053 TOC entry. */
5054 next = symbol_next (sym);
809ffe0d 5055 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5056 next = symbol_next (next);
5057 if (next == (symbolS *) NULL
809ffe0d 5058 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5059 {
5060 if (ppc_after_toc_frag == (fragS *) NULL)
5061 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5062 data_section)
5063 - S_GET_VALUE (sym));
5064 else
5065 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5066 - S_GET_VALUE (sym));
5067 }
5068 else
5069 {
6386f3a7 5070 resolve_symbol_value (next);
252b5132
RH		 5071 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5072 - S_GET_VALUE (sym));
5073 }
5074 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5075 }
5076 else
5077 {
5078 symbolS *csect;
5079
5080 /* This is a normal symbol definition. x_scnlen is the
5081 symbol index of the containing csect. */
5082 if (S_GET_SEGMENT (sym) == text_section)
5083 csect = ppc_text_csects;
5084 else if (S_GET_SEGMENT (sym) == data_section)
5085 csect = ppc_data_csects;
5086 else
5087 abort ();
5088
5089 /* Skip the initial dummy symbol. */
809ffe0d 5090 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5091
5092 if (csect == (symbolS *) NULL)
5093 {
5094 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5095 a->x_csect.x_scnlen.l = 0;
5096 }
5097 else
5098 {
809ffe0d 5099 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5100 {
6386f3a7 5101 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5102 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5103 > S_GET_VALUE (sym))
252b5132 5104 break;
809ffe0d 5105 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5106 }
5107
809ffe0d
ILT		 5108 a->x_csect.x_scnlen.p =
5109 coffsymbol (symbol_get_bfdsym (csect))->native;
5110 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5111 1;
252b5132
RH		 5112 }
5113 a->x_csect.x_smtyp = XTY_LD;
5114 }
81d4177b 5115
252b5132
RH		 5116 a->x_csect.x_parmhash = 0;
5117 a->x_csect.x_snhash = 0;
809ffe0d 5118 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5119 a->x_csect.x_smclas = XMC_PR;
5120 else
809ffe0d 5121 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5122 a->x_csect.x_stab = 0;
5123 a->x_csect.x_snstab = 0;
5124
5125 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5126 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5127 }
5128 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5129 {
5130 /* We want the value to be the symbol index of the referenced
5131 csect symbol. BFD will do that for us if we set the right
5132 flags. */
b782de16
AM		 5133 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5134 combined_entry_type *c = coffsymbol (bsym)->native;
5135
5136 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5137 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5138 }
5139 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5140 {
5141 symbolS *block;
5142 symbolS *csect;
5143
5144 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5145 block = symbol_get_tc (sym)->within;
5146 csect = symbol_get_tc (block)->within;
6386f3a7 5147 resolve_symbol_value (csect);
252b5132
RH		 5148 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5149 }
5150 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5151 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5152 {
5153 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5154 BFD will do that for us if we set the right flags. We have
5155 already set the value correctly. */
809ffe0d 5156 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5157 }
5158
5159 return 0;
5160}
5161
5162/* Adjust the symbol table. This creates csect symbols for all
5163 absolute symbols. */
5164
5165void
98027b10 5166ppc_adjust_symtab (void)
252b5132
RH		 5167{
5168 symbolS *sym;
5169
5170 if (! ppc_saw_abs)
5171 return;
5172
5173 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5174 {
5175 symbolS *csect;
5176 int i;
5177 union internal_auxent *a;
5178
5179 if (S_GET_SEGMENT (sym) != absolute_section)
5180 continue;
5181
5182 csect = symbol_create (".abs[XO]", absolute_section,
5183 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5184 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5185 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5186 i = S_GET_NUMBER_AUXILIARY (csect);
5187 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5188 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5189 a->x_csect.x_scnlen.l = 0;
5190 a->x_csect.x_smtyp = XTY_SD;
5191 a->x_csect.x_parmhash = 0;
5192 a->x_csect.x_snhash = 0;
5193 a->x_csect.x_smclas = XMC_XO;
5194 a->x_csect.x_stab = 0;
5195 a->x_csect.x_snstab = 0;
5196
5197 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5198
5199 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5200 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5201 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5202 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5203 }
5204
b34976b6 5205 ppc_saw_abs = FALSE;
252b5132
RH		 5206}
5207
5208/* Set the VMA for a section. This is called on all the sections in
5209 turn. */
5210
5211void
98027b10 5212ppc_frob_section (asection *sec)
252b5132 5213{
931e13a6 5214 static bfd_vma vma = 0;
252b5132 5215
931e13a6 5216 vma = md_section_align (sec, vma);
252b5132
RH		 5217 bfd_set_section_vma (stdoutput, sec, vma);
5218 vma += bfd_section_size (stdoutput, sec);
5219}
5220
5221#endif /* OBJ_XCOFF */
5222\f
252b5132 5223char *
98027b10 5224md_atof (int type, char *litp, int *sizep)
252b5132 5225{
499ac353 5226 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5227}
5228
5229/* Write a value out to the object file, using the appropriate
5230 endianness. */
5231
5232void
98027b10 5233md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5234{
5235 if (target_big_endian)
5236 number_to_chars_bigendian (buf, val, n);
5237 else
5238 number_to_chars_littleendian (buf, val, n);
5239}
5240
5241/* Align a section (I don't know why this is machine dependent). */
5242
5243valueT
3aeeedbb 5244md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5245{
3aeeedbb
AM		 5246#ifdef OBJ_ELF
5247 return addr;
5248#else
252b5132
RH		 5249 int align = bfd_get_section_alignment (stdoutput, seg);
5250
5251 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5252#endif
252b5132
RH		 5253}
5254
5255/* We don't have any form of relaxing. */
5256
5257int
98027b10
AM		 5258md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5259 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5260{
5261 abort ();
5262 return 0;
5263}
5264
5265/* Convert a machine dependent frag. We never generate these. */
5266
5267void
98027b10
AM		 5268md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5269 asection *sec ATTRIBUTE_UNUSED,
5270 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5271{
5272 abort ();
5273}
5274
5275/* We have no need to default values of symbols. */
5276
252b5132 5277symbolS *
98027b10 5278md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5279{
5280 return 0;
5281}
5282\f
5283/* Functions concerning relocs. */
5284
5285/* The location from which a PC relative jump should be calculated,
5286 given a PC relative reloc. */
5287
5288long
98027b10 5289md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5290{
5291 return fixp->fx_frag->fr_address + fixp->fx_where;
5292}
5293
5294#ifdef OBJ_XCOFF
5295
5296/* This is called to see whether a fixup should be adjusted to use a
5297 section symbol. We take the opportunity to change a fixup against
5298 a symbol in the TOC subsegment into a reloc against the
5299 corresponding .tc symbol. */
5300
5301int
98027b10 5302ppc_fix_adjustable (fixS *fix)
252b5132 5303{
b782de16
AM		 5304 valueT val = resolve_symbol_value (fix->fx_addsy);
5305 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5306 TC_SYMFIELD_TYPE *tc;
5307
5308 if (symseg == absolute_section)
5309 return 0;
252b5132 5310
252b5132 5311 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5312 && fix->fx_addsy != ppc_toc_csect
b782de16 5313 && symseg == data_section
252b5132
RH		 5314 && val >= ppc_toc_frag->fr_address
5315 && (ppc_after_toc_frag == (fragS *) NULL
5316 || val < ppc_after_toc_frag->fr_address))
5317 {
5318 symbolS *sy;
5319
5320 for (sy = symbol_next (ppc_toc_csect);
5321 sy != (symbolS *) NULL;
5322 sy = symbol_next (sy))
5323 {
b782de16
AM		 5324 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5325
5326 if (sy_tc->class == XMC_TC0)
252b5132 5327 continue;
b782de16 5328 if (sy_tc->class != XMC_TC)
252b5132 5329 break;
b782de16 5330 if (val == resolve_symbol_value (sy))
252b5132
RH		 5331 {
5332 fix->fx_addsy = sy;
5333 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5334 return 0;
5335 }
5336 }
5337
5338 as_bad_where (fix->fx_file, fix->fx_line,
5339 _("symbol in .toc does not match any .tc"));
5340 }
5341
5342 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5343 tc = symbol_get_tc (fix->fx_addsy);
5344 if (tc->subseg == 0
5345 && tc->class != XMC_TC0
5346 && tc->class != XMC_TC
5347 && symseg != bss_section
252b5132 5348 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5349 && (symseg != data_section
252b5132
RH		 5350 || ppc_toc_csect == NULL
5351 || val < ppc_toc_frag->fr_address
5352 || (ppc_after_toc_frag != NULL
5353 && val >= ppc_after_toc_frag->fr_address)))
5354 {
5355 symbolS *csect;
b782de16 5356 symbolS *next_csect;
252b5132 5357
b782de16 5358 if (symseg == text_section)
252b5132 5359 csect = ppc_text_csects;
b782de16 5360 else if (symseg == data_section)
252b5132
RH		 5361 csect = ppc_data_csects;
5362 else
5363 abort ();
5364
5365 /* Skip the initial dummy symbol. */
809ffe0d 5366 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5367
5368 if (csect != (symbolS *) NULL)
5369 {
b782de16
AM		 5370 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5371 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5372 {
5373 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5374 have to look through the full symbol table to see
5375 whether this is the csect we want. Note that we will
5376 only get here if the csect has zero length. */
b782de16
AM		 5377 if (symbol_get_frag (csect)->fr_address == val
5378 && S_GET_VALUE (csect) == val)
252b5132
RH		 5379 {
5380 symbolS *scan;
5381
809ffe0d 5382 for (scan = symbol_next (csect);
252b5132 5383 scan != NULL;
809ffe0d 5384 scan = symbol_next (scan))
252b5132 5385 {
809ffe0d 5386 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5387 break;
5388 if (scan == fix->fx_addsy)
5389 break;
5390 }
5391
5392 /* If we found the symbol before the next csect
99a814a1 5393 symbol, then this is the csect we want. */
252b5132
RH		 5394 if (scan == fix->fx_addsy)
5395 break;
5396 }
5397
b782de16 5398 csect = next_csect;
252b5132
RH		 5399 }
5400
b782de16 5401 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5402 fix->fx_addsy = csect;
5403 }
b782de16 5404 return 0;
252b5132
RH		 5405 }
5406
5407 /* Adjust a reloc against a .lcomm symbol to be against the base
5408 .lcomm. */
b782de16 5409 if (symseg == bss_section
252b5132
RH		 5410 && ! S_IS_EXTERNAL (fix->fx_addsy))
5411 {
b782de16
AM		 5412 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5413
5414 fix->fx_offset += val - resolve_symbol_value (sy);
5415 fix->fx_addsy = sy;
252b5132
RH		 5416 }
5417
5418 return 0;
5419}
5420
5421/* A reloc from one csect to another must be kept. The assembler
5422 will, of course, keep relocs between sections, and it will keep
5423 absolute relocs, but we need to force it to keep PC relative relocs
5424 between two csects in the same section. */
5425
5426int
98027b10 5427ppc_force_relocation (fixS *fix)
252b5132
RH		 5428{
5429 /* At this point fix->fx_addsy should already have been converted to
5430 a csect symbol. If the csect does not include the fragment, then
5431 we need to force the relocation. */
5432 if (fix->fx_pcrel
5433 && fix->fx_addsy != NULL
809ffe0d
ILT		 5434 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5435 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5436 > fix->fx_frag->fr_address)
5437 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5438 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5439 <= fix->fx_frag->fr_address))))
5440 return 1;
5441
ae6063d4 5442 return generic_force_reloc (fix);
252b5132
RH		 5443}
5444
5445#endif /* OBJ_XCOFF */
5446
0baf16f2 5447#ifdef OBJ_ELF
a161fe53
AM		 5448/* If this function returns non-zero, it guarantees that a relocation
5449 will be emitted for a fixup. */
5450
5451int
98027b10 5452ppc_force_relocation (fixS *fix)
a161fe53
AM		 5453{
5454 /* Branch prediction relocations must force a relocation, as must
5455 the vtable description relocs. */
5456 switch (fix->fx_r_type)
5457 {
5458 case BFD_RELOC_PPC_B16_BRTAKEN:
5459 case BFD_RELOC_PPC_B16_BRNTAKEN:
5460 case BFD_RELOC_PPC_BA16_BRTAKEN:
5461 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5462 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5463 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5464 return 1;
5465 default:
5466 break;
5467 }
5468
cdba85ec
AM		 5469 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5470 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5471 return 1;
5472
ae6063d4 5473 return generic_force_reloc (fix);
a161fe53
AM		 5474}
5475
0baf16f2 5476int
98027b10 5477ppc_fix_adjustable (fixS *fix)
252b5132 5478{
0baf16f2
AM		 5479 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5480 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5481 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5482 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5483 && fix->fx_r_type != BFD_RELOC_GPREL16
5484 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5485 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5486 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5487 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5488}
0baf16f2 5489#endif
252b5132 5490
3aeeedbb
AM		 5491/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5492 rs_align_code frag. */
5493
5494void
5495ppc_handle_align (struct frag *fragP)
5496{
5497 valueT count = (fragP->fr_next->fr_address
5498 - (fragP->fr_address + fragP->fr_fix));
5499
5500 if (count != 0 && (count & 3) == 0)
5501 {
5502 char *dest = fragP->fr_literal + fragP->fr_fix;
5503
5504 fragP->fr_var = 4;
5505 md_number_to_chars (dest, 0x60000000, 4);
5506
5507 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5508 {
5509 /* For power6, we want the last nop to be a group terminating
5510 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5511 immediately after this one, with its address set to the last
5512 nop location. This will automatically reduce the number of
5513 nops in the current frag by one. */
5514 if (count > 4)
5515 {
5516 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5517
5518 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5519 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5520 group_nop->fr_fix = 0;
5521 group_nop->fr_offset = 1;
5522 group_nop->fr_type = rs_fill;
5523 fragP->fr_next = group_nop;
5524 dest = group_nop->fr_literal;
5525 }
5526
5527 md_number_to_chars (dest, 0x60210000, 4);
5528 }
5529 }
5530}
5531
252b5132
RH		 5532/* Apply a fixup to the object code. This is called for all the
5533 fixups we generated by the call to fix_new_exp, above. In the call
5534 above we used a reloc code which was the largest legal reloc code
5535 plus the operand index. Here we undo that to recover the operand
5536 index. At this point all symbol values should be fully resolved,
5537 and we attempt to completely resolve the reloc. If we can not do
5538 that, we determine the correct reloc code and put it back in the
5539 fixup. */
5540
94f592af 5541void
98027b10 5542md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5543{
94f592af 5544 valueT value = * valP;
252b5132
RH		 5545
5546#ifdef OBJ_ELF
94f592af 5547 if (fixP->fx_addsy != NULL)
252b5132 5548 {
a161fe53 5549 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5550 if (fixP->fx_pcrel)
5551 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5552 }
5553 else
94f592af 5554 fixP->fx_done = 1;
252b5132 5555#else
a161fe53 5556 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5557 the symbol values. If we are doing this relocation the code in
5558 write.c is going to call bfd_install_relocation, which is also
5559 going to use the symbol value. That means that if the reloc is
5560 fully resolved we want to use *valP since bfd_install_relocation is
5561 not being used.
252b5132 5562 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5563 *valP, and must use fx_offset instead. However, if the reloc
5564 is PC relative, we do want to use *valP since it includes the
252b5132 5565 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5566 if (fixP->fx_addsy == (symbolS *) NULL)
5567 fixP->fx_done = 1;
5568
5569 else if (fixP->fx_pcrel)
5570 ;
5571
252b5132 5572 else
a161fe53
AM		 5573 value = fixP->fx_offset;
5574#endif
5575
5576 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5577 {
a161fe53
AM		 5578 /* We can't actually support subtracting a symbol. */
5579 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5580 }
252b5132 5581
94f592af 5582 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5583 {
5584 int opindex;
5585 const struct powerpc_operand *operand;
5586 char *where;
5587 unsigned long insn;
5588
94f592af 5589 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5590
5591 operand = &powerpc_operands[opindex];
5592
5593#ifdef OBJ_XCOFF
0baf16f2
AM		 5594 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5595 does not generate a reloc. It uses the offset of `sym' within its
5596 csect. Other usages, such as `.long sym', generate relocs. This
5597 is the documented behaviour of non-TOC symbols. */
252b5132 5598 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5599 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5600 && operand->shift == 0
2b3c4602 5601 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5602 && fixP->fx_addsy != NULL
5603 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5604 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5605 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5606 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5607 {
94f592af
NC		 5608 value = fixP->fx_offset;
5609 fixP->fx_done = 1;
252b5132
RH		 5610 }
5611#endif
5612
5613 /* Fetch the instruction, insert the fully resolved operand
5614 value, and stuff the instruction back again. */
94f592af 5615 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5616 if (target_big_endian)
5617 insn = bfd_getb32 ((unsigned char *) where);
5618 else
5619 insn = bfd_getl32 ((unsigned char *) where);
5620 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5621 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5622 if (target_big_endian)
5623 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5624 else
5625 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5626
94f592af
NC		 5627 if (fixP->fx_done)
5628 /* Nothing else to do here. */
5629 return;
252b5132 5630
94f592af 5631 assert (fixP->fx_addsy != NULL);
0baf16f2 5632
252b5132
RH		 5633 /* Determine a BFD reloc value based on the operand information.
5634 We are only prepared to turn a few of the operands into
0baf16f2 5635 relocs. */
11b37b7b 5636 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5637 && operand->bitm == 0x3fffffc
11b37b7b 5638 && operand->shift == 0)
94f592af 5639 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5640 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5641 && operand->bitm == 0xfffc
11b37b7b 5642 && operand->shift == 0)
95210096
AM		 5643 {
5644 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5645#ifdef OBJ_XCOFF
5646 fixP->fx_size = 2;
5647 if (target_big_endian)
5648 fixP->fx_where += 2;
5649#endif
5650 }
11b37b7b 5651 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5652 && operand->bitm == 0x3fffffc
11b37b7b 5653 && operand->shift == 0)
94f592af 5654 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5655 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5656 && operand->bitm == 0xfffc
11b37b7b 5657 && operand->shift == 0)
95210096
AM		 5658 {
5659 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5660#ifdef OBJ_XCOFF
5661 fixP->fx_size = 2;
5662 if (target_big_endian)
5663 fixP->fx_where += 2;
5664#endif
5665 }
0baf16f2 5666#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5667 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5668 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5669 && operand->shift == 0)
11b37b7b 5670 {
a7fc733f
AM		 5671 if (ppc_is_toc_sym (fixP->fx_addsy))
5672 {
5673 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5674#ifdef OBJ_ELF
a7fc733f
AM		 5675 if (ppc_obj64
5676 && (operand->flags & PPC_OPERAND_DS) != 0)
5677 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5678#endif
5679 }
5680 else
5681 {
5682 fixP->fx_r_type = BFD_RELOC_16;
5683#ifdef OBJ_ELF
5684 if (ppc_obj64
5685 && (operand->flags & PPC_OPERAND_DS) != 0)
5686 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5687#endif
a7fc733f 5688 }
94f592af 5689 fixP->fx_size = 2;
11b37b7b 5690 if (target_big_endian)
94f592af 5691 fixP->fx_where += 2;
11b37b7b 5692 }
0baf16f2 5693#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5694 else
252b5132
RH		 5695 {
5696 char *sfile;
5697 unsigned int sline;
5698
5699 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5700 symbol. */
94f592af
NC		 5701 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5702 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5703 _("unresolved expression that must be resolved"));
5704 else
94f592af 5705 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5706 _("unsupported relocation against %s"),
94f592af
NC		 5707 S_GET_NAME (fixP->fx_addsy));
5708 fixP->fx_done = 1;
5709 return;
252b5132
RH		 5710 }
5711 }
5712 else
5713 {
5714#ifdef OBJ_ELF
94f592af 5715 ppc_elf_validate_fix (fixP, seg);
252b5132 5716#endif
94f592af 5717 switch (fixP->fx_r_type)
252b5132 5718 {
252b5132 5719 case BFD_RELOC_CTOR:
2b3c4602 5720 if (ppc_obj64)
9c7977b3
AM		 5721 goto ctor64;
5722 /* fall through */
5723
0baf16f2 5724 case BFD_RELOC_32:
94f592af
NC		 5725 if (fixP->fx_pcrel)
5726 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5727 /* fall through */
252b5132
RH		 5728
5729 case BFD_RELOC_RVA:
5730 case BFD_RELOC_32_PCREL:
252b5132 5731 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5732 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5733 value, 4);
5734 break;
5735
7f6d05e8 5736 case BFD_RELOC_64:
9c7977b3 5737 ctor64:
94f592af
NC		 5738 if (fixP->fx_pcrel)
5739 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5740 /* fall through */
0baf16f2 5741
7f6d05e8 5742 case BFD_RELOC_64_PCREL:
94f592af 5743 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5744 value, 8);
81d4177b 5745 break;
0baf16f2 5746
252b5132
RH		 5747 case BFD_RELOC_GPREL16:
5748 case BFD_RELOC_16_GOT_PCREL:
5749 case BFD_RELOC_16_GOTOFF:
5750 case BFD_RELOC_LO16_GOTOFF:
5751 case BFD_RELOC_HI16_GOTOFF:
5752 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5753 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5754 case BFD_RELOC_LO16_BASEREL:
5755 case BFD_RELOC_HI16_BASEREL:
5756 case BFD_RELOC_HI16_S_BASEREL:
5757 case BFD_RELOC_PPC_EMB_NADDR16:
5758 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5759 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5760 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5761 case BFD_RELOC_PPC_EMB_SDAI16:
5762 case BFD_RELOC_PPC_EMB_SDA2REL:
5763 case BFD_RELOC_PPC_EMB_SDA2I16:
5764 case BFD_RELOC_PPC_EMB_RELSEC16:
5765 case BFD_RELOC_PPC_EMB_RELST_LO:
5766 case BFD_RELOC_PPC_EMB_RELST_HI:
5767 case BFD_RELOC_PPC_EMB_RELST_HA:
5768 case BFD_RELOC_PPC_EMB_RELSDA:
5769 case BFD_RELOC_PPC_TOC16:
0baf16f2 5770#ifdef OBJ_ELF
0baf16f2
AM		 5771 case BFD_RELOC_PPC64_TOC16_LO:
5772 case BFD_RELOC_PPC64_TOC16_HI:
5773 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5774#endif
94f592af 5775 if (fixP->fx_pcrel)
252b5132 5776 {
94f592af
NC		 5777 if (fixP->fx_addsy != NULL)
5778 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5779 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5780 bfd_get_reloc_code_name (fixP->fx_r_type),
5781 S_GET_NAME (fixP->fx_addsy));
252b5132 5782 else
94f592af 5783 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5784 _("cannot emit PC relative %s relocation"),
94f592af 5785 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5786 }
5787
94f592af 5788 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5789 value, 2);
5790 break;
5791
3c9d25f4
AM		 5792 case BFD_RELOC_16:
5793 if (fixP->fx_pcrel)
5794 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5795 /* fall through */
5796
5797 case BFD_RELOC_16_PCREL:
5798 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5799 value, 2);
5800 break;
5801
5802 case BFD_RELOC_LO16:
5803 if (fixP->fx_pcrel)
5804 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5805 /* fall through */
5806
5807 case BFD_RELOC_LO16_PCREL:
5808 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5809 value, 2);
5810 break;
5811
252b5132
RH		 5812 /* This case happens when you write, for example,
5813 lis %r3,(L1-L2)@ha
5814 where L1 and L2 are defined later. */
5815 case BFD_RELOC_HI16:
94f592af 5816 if (fixP->fx_pcrel)
3c9d25f4
AM		 5817 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5818 /* fall through */
5819
5820 case BFD_RELOC_HI16_PCREL:
94f592af 5821 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5822 PPC_HI (value), 2);
252b5132 5823 break;
0baf16f2 5824
252b5132 5825 case BFD_RELOC_HI16_S:
94f592af 5826 if (fixP->fx_pcrel)
3c9d25f4
AM		 5827 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5828 /* fall through */
5829
5830 case BFD_RELOC_HI16_S_PCREL:
94f592af 5831 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5832 PPC_HA (value), 2);
5833 break;
5834
5835#ifdef OBJ_ELF
0baf16f2 5836 case BFD_RELOC_PPC64_HIGHER:
94f592af 5837 if (fixP->fx_pcrel)
0baf16f2 5838 abort ();
94f592af 5839 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5840 PPC_HIGHER (value), 2);
252b5132
RH		 5841 break;
5842
0baf16f2 5843 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5844 if (fixP->fx_pcrel)
0baf16f2 5845 abort ();
94f592af 5846 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5847 PPC_HIGHERA (value), 2);
5848 break;
5849
5850 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5851 if (fixP->fx_pcrel)
0baf16f2 5852 abort ();
94f592af 5853 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5854 PPC_HIGHEST (value), 2);
5855 break;
5856
5857 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5858 if (fixP->fx_pcrel)
0baf16f2 5859 abort ();
94f592af 5860 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5861 PPC_HIGHESTA (value), 2);
5862 break;
5863
5864 case BFD_RELOC_PPC64_ADDR16_DS:
5865 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5866 case BFD_RELOC_PPC64_GOT16_DS:
5867 case BFD_RELOC_PPC64_GOT16_LO_DS:
5868 case BFD_RELOC_PPC64_PLT16_LO_DS:
5869 case BFD_RELOC_PPC64_SECTOFF_DS:
5870 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5871 case BFD_RELOC_PPC64_TOC16_DS:
5872 case BFD_RELOC_PPC64_TOC16_LO_DS:
5873 case BFD_RELOC_PPC64_PLTGOT16_DS:
5874 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5875 if (fixP->fx_pcrel)
0baf16f2
AM		 5876 abort ();
5877 {
2132e3a3 5878 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5879 unsigned long val, mask;
0baf16f2
AM		 5880
5881 if (target_big_endian)
adadcc0c 5882 val = bfd_getb32 (where - 2);
0baf16f2 5883 else
adadcc0c
AM		 5884 val = bfd_getl32 (where);
5885 mask = 0xfffc;
5886 /* lq insns reserve the four lsbs. */
5887 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5888 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5889 mask = 0xfff0;
5890 val |= value & mask;
0baf16f2
AM		 5891 if (target_big_endian)
5892 bfd_putb16 ((bfd_vma) val, where);
5893 else
5894 bfd_putl16 ((bfd_vma) val, where);
5895 }
5896 break;
cdba85ec 5897
ba0b2174
AM		 5898 case BFD_RELOC_PPC_B16_BRTAKEN:
5899 case BFD_RELOC_PPC_B16_BRNTAKEN:
5900 case BFD_RELOC_PPC_BA16_BRTAKEN:
5901 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5902 break;
5903
cdba85ec 5904 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5905 break;
5906
cdba85ec
AM		 5907 case BFD_RELOC_PPC_DTPMOD:
5908 case BFD_RELOC_PPC_TPREL16:
5909 case BFD_RELOC_PPC_TPREL16_LO:
5910 case BFD_RELOC_PPC_TPREL16_HI:
5911 case BFD_RELOC_PPC_TPREL16_HA:
5912 case BFD_RELOC_PPC_TPREL:
5913 case BFD_RELOC_PPC_DTPREL16:
5914 case BFD_RELOC_PPC_DTPREL16_LO:
5915 case BFD_RELOC_PPC_DTPREL16_HI:
5916 case BFD_RELOC_PPC_DTPREL16_HA:
5917 case BFD_RELOC_PPC_DTPREL:
5918 case BFD_RELOC_PPC_GOT_TLSGD16:
5919 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5920 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5921 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5922 case BFD_RELOC_PPC_GOT_TLSLD16:
5923 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5924 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5925 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5926 case BFD_RELOC_PPC_GOT_TPREL16:
5927 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5928 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5929 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5930 case BFD_RELOC_PPC_GOT_DTPREL16:
5931 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5932 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5933 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5934 case BFD_RELOC_PPC64_TPREL16_DS:
5935 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5936 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5937 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5938 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5939 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5940 case BFD_RELOC_PPC64_DTPREL16_DS:
5941 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5942 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5943 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5944 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5945 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 5946 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 5947 break;
0baf16f2 5948#endif
252b5132 5949 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5950 bytes, rather than 2, so offset it here appropriately. */
252b5132 5951 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5952 if (fixP->fx_pcrel)
252b5132
RH		 5953 abort ();
5954
94f592af 5955 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5956 + ((target_big_endian) ? 2 : 0),
5957 value, 2);
5958 break;
5959
5960 case BFD_RELOC_8:
94f592af 5961 if (fixP->fx_pcrel)
31a91399
NC		 5962 {
5963 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 5964 ".byte <undefined_symbol> - ." */
31a91399
NC		 5965 if (fixP->fx_addsy)
5966 as_bad (_("Unable to handle reference to symbol %s"),
5967 S_GET_NAME (fixP->fx_addsy));
5968 else
5969 as_bad (_("Unable to resolve expression"));
5970 fixP->fx_done = 1;
5971 }
5972 else
5973 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5974 value, 1);
252b5132
RH		 5975 break;
5976
5977 case BFD_RELOC_24_PLT_PCREL:
5978 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5979 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5980 abort ();
5981
94f592af 5982 if (fixP->fx_done)
99a814a1
AM		 5983 {
5984 char *where;
5985 unsigned long insn;
5986
5987 /* Fetch the instruction, insert the fully resolved operand
5988 value, and stuff the instruction back again. */
94f592af 5989 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 5990 if (target_big_endian)
5991 insn = bfd_getb32 ((unsigned char *) where);
5992 else
5993 insn = bfd_getl32 ((unsigned char *) where);
5994 if ((value & 3) != 0)
94f592af 5995 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5996 _("must branch to an address a multiple of 4"));
5997 if ((offsetT) value < -0x40000000
5998 || (offsetT) value >= 0x40000000)
94f592af 5999 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6000 _("@local or @plt branch destination is too far away, %ld bytes"),
6001 (long) value);
6002 insn = insn | (value & 0x03fffffc);
6003 if (target_big_endian)
6004 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6005 else
6006 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6007 }
252b5132
RH		 6008 break;
6009
6010 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6011 fixP->fx_done = 0;
6012 if (fixP->fx_addsy
6013 && !S_IS_DEFINED (fixP->fx_addsy)
6014 && !S_IS_WEAK (fixP->fx_addsy))
6015 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6016 break;
6017
6018 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6019 fixP->fx_done = 0;
252b5132
RH		 6020 break;
6021
0baf16f2 6022#ifdef OBJ_ELF
0baf16f2
AM		 6023 /* Generated by reference to `sym@tocbase'. The sym is
6024 ignored by the linker. */
6025 case BFD_RELOC_PPC64_TOC:
94f592af 6026 fixP->fx_done = 0;
0baf16f2 6027 break;
0baf16f2 6028#endif
252b5132 6029 default:
bc805888 6030 fprintf (stderr,
94f592af 6031 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6032 fflush (stderr);
252b5132
RH		 6033 abort ();
6034 }
6035 }
6036
6037#ifdef OBJ_ELF
94f592af 6038 fixP->fx_addnumber = value;
4e6935a6
AM		 6039
6040 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6041 from the section contents. If we are going to be emitting a reloc
6042 then the section contents are immaterial, so don't warn if they
6043 happen to overflow. Leave such warnings to ld. */
6044 if (!fixP->fx_done)
6045 fixP->fx_no_overflow = 1;
252b5132 6046#else
94f592af
NC		 6047 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6048 fixP->fx_addnumber = 0;
252b5132
RH		 6049 else
6050 {
6051#ifdef TE_PE
94f592af 6052 fixP->fx_addnumber = 0;
252b5132
RH		 6053#else
6054 /* We want to use the offset within the data segment of the
6055 symbol, not the actual VMA of the symbol. */
94f592af
NC		 6056 fixP->fx_addnumber =
6057 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 6058#endif
6059 }
6060#endif
252b5132
RH		 6061}
6062
6063/* Generate a reloc for a fixup. */
6064
6065arelent *
98027b10 6066tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6067{
6068 arelent *reloc;
6069
6070 reloc = (arelent *) xmalloc (sizeof (arelent));
6071
49309057
ILT		 6072 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6073 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6074 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6075 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6076 if (reloc->howto == (reloc_howto_type *) NULL)
6077 {
6078 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6079 _("reloc %d not supported by object file format"),
6080 (int) fixp->fx_r_type);
252b5132
RH		 6081 return NULL;
6082 }
6083 reloc->addend = fixp->fx_addnumber;
6084
6085 return reloc;
6086}
75e21f08
JJ		 6087
6088void
98027b10 6089ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6090{
6091 cfi_add_CFA_def_cfa (1, 0);
6092}
6093
6094int
1df69f4f 6095tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6096{
6097 unsigned int regnum = -1;
6098 unsigned int i;
6099 const char *p;
6100 char *q;
6101 static struct { char *name; int dw2regnum; } regnames[] =
6102 {
6103 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6104 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6105 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6106 { "spe_acc", 111 }, { "spefscr", 112 }
6107 };
6108
6109 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6110 if (strcmp (regnames[i].name, regname) == 0)
6111 return regnames[i].dw2regnum;
6112
6113 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6114 {
6115 p = regname + 1 + (regname[1] == '.');
6116 regnum = strtoul (p, &q, 10);
6117 if (p == q || *q || regnum >= 32)
6118 return -1;
6119 if (regname[0] == 'f')
b7d7dc63 6120 regnum += 32;
75e21f08 6121 else if (regname[0] == 'v')
b7d7dc63 6122 regnum += 77;
75e21f08
JJ		 6123 }
6124 else if (regname[0] == 'c' && regname[1] == 'r')
6125 {
6126 p = regname + 2 + (regname[2] == '.');
6127 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6128 return -1;
75e21f08
JJ		 6129 regnum = p[0] - '0' + 68;
6130 }
6131 return regnum;
6132}
GDB Binutils - Deliverables
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