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* objdump.c (objdump_print_addr): Initialise "sym".
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
b84bf58a 3 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
252b5132
RH		 181\f
182/* The target specific pseudo-ops which we support. */
183
184const pseudo_typeS md_pseudo_table[] =
185{
186 /* Pseudo-ops which must be overridden. */
187 { "byte", ppc_byte, 0 },
188
189#ifdef OBJ_XCOFF
190 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
191 legitimately belong in the obj-*.c file. However, XCOFF is based
192 on COFF, and is only implemented for the RS/6000. We just use
193 obj-coff.c, and add what we need here. */
194 { "comm", ppc_comm, 0 },
195 { "lcomm", ppc_comm, 1 },
196 { "bb", ppc_bb, 0 },
197 { "bc", ppc_bc, 0 },
198 { "bf", ppc_bf, 0 },
199 { "bi", ppc_biei, 0 },
200 { "bs", ppc_bs, 0 },
201 { "csect", ppc_csect, 0 },
202 { "data", ppc_section, 'd' },
203 { "eb", ppc_eb, 0 },
204 { "ec", ppc_ec, 0 },
205 { "ef", ppc_ef, 0 },
206 { "ei", ppc_biei, 1 },
207 { "es", ppc_es, 0 },
208 { "extern", ppc_extern, 0 },
209 { "function", ppc_function, 0 },
210 { "lglobl", ppc_lglobl, 0 },
211 { "rename", ppc_rename, 0 },
212 { "section", ppc_named_section, 0 },
213 { "stabx", ppc_stabx, 0 },
214 { "text", ppc_section, 't' },
215 { "toc", ppc_toc, 0 },
216 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 217 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 218 { "word", ppc_xcoff_cons, 1 },
219 { "short", ppc_xcoff_cons, 1 },
220 { "vbyte", ppc_vbyte, 0 },
221#endif
222
223#ifdef OBJ_ELF
0baf16f2
AM		 224 { "llong", ppc_elf_cons, 8 },
225 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 226 { "long", ppc_elf_cons, 4 },
227 { "word", ppc_elf_cons, 2 },
228 { "short", ppc_elf_cons, 2 },
229 { "rdata", ppc_elf_rdata, 0 },
230 { "rodata", ppc_elf_rdata, 0 },
231 { "lcomm", ppc_elf_lcomm, 0 },
232#endif
233
234#ifdef TE_PE
99a814a1 235 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 236 { "previous", ppc_previous, 0 },
237 { "pdata", ppc_pdata, 0 },
238 { "ydata", ppc_ydata, 0 },
239 { "reldata", ppc_reldata, 0 },
240 { "rdata", ppc_rdata, 0 },
241 { "ualong", ppc_ualong, 0 },
242 { "znop", ppc_znop, 0 },
243 { "comm", ppc_pe_comm, 0 },
244 { "lcomm", ppc_pe_comm, 1 },
245 { "section", ppc_pe_section, 0 },
246 { "function", ppc_pe_function,0 },
247 { "tocd", ppc_pe_tocd, 0 },
248#endif
249
0baf16f2 250#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 251 { "tc", ppc_tc, 0 },
0baf16f2
AM		 252 { "machine", ppc_machine, 0 },
253#endif
252b5132
RH		 254
255 { NULL, NULL, 0 }
256};
257
258\f
99a814a1
AM		 259/* Predefined register names if -mregnames (or default for Windows NT).
260 In general, there are lots of them, in an attempt to be compatible
261 with a number of other Windows NT assemblers. */
252b5132
RH		 262
263/* Structure to hold information about predefined registers. */
264struct pd_reg
265 {
266 char *name;
267 int value;
268 };
269
270/* List of registers that are pre-defined:
271
272 Each general register has predefined names of the form:
273 1. r<reg_num> which has the value <reg_num>.
274 2. r.<reg_num> which has the value <reg_num>.
275
252b5132
RH		 276 Each floating point register has predefined names of the form:
277 1. f<reg_num> which has the value <reg_num>.
278 2. f.<reg_num> which has the value <reg_num>.
279
7a899fff
C		 280 Each vector unit register has predefined names of the form:
281 1. v<reg_num> which has the value <reg_num>.
282 2. v.<reg_num> which has the value <reg_num>.
283
252b5132
RH		 284 Each condition register has predefined names of the form:
285 1. cr<reg_num> which has the value <reg_num>.
286 2. cr.<reg_num> which has the value <reg_num>.
287
288 There are individual registers as well:
289 sp or r.sp has the value 1
290 rtoc or r.toc has the value 2
291 fpscr has the value 0
292 xer has the value 1
293 lr has the value 8
294 ctr has the value 9
295 pmr has the value 0
296 dar has the value 19
297 dsisr has the value 18
298 dec has the value 22
299 sdr1 has the value 25
300 srr0 has the value 26
301 srr1 has the value 27
302
81d4177b 303 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 304
305static const struct pd_reg pre_defined_registers[] =
306{
307 { "cr.0", 0 }, /* Condition Registers */
308 { "cr.1", 1 },
309 { "cr.2", 2 },
310 { "cr.3", 3 },
311 { "cr.4", 4 },
312 { "cr.5", 5 },
313 { "cr.6", 6 },
314 { "cr.7", 7 },
315
316 { "cr0", 0 },
317 { "cr1", 1 },
318 { "cr2", 2 },
319 { "cr3", 3 },
320 { "cr4", 4 },
321 { "cr5", 5 },
322 { "cr6", 6 },
323 { "cr7", 7 },
324
325 { "ctr", 9 },
326
327 { "dar", 19 }, /* Data Access Register */
328 { "dec", 22 }, /* Decrementer */
329 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
330
331 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 332 { "f.1", 1 },
333 { "f.10", 10 },
334 { "f.11", 11 },
335 { "f.12", 12 },
336 { "f.13", 13 },
337 { "f.14", 14 },
338 { "f.15", 15 },
339 { "f.16", 16 },
340 { "f.17", 17 },
341 { "f.18", 18 },
342 { "f.19", 19 },
343 { "f.2", 2 },
344 { "f.20", 20 },
345 { "f.21", 21 },
346 { "f.22", 22 },
347 { "f.23", 23 },
348 { "f.24", 24 },
349 { "f.25", 25 },
350 { "f.26", 26 },
351 { "f.27", 27 },
352 { "f.28", 28 },
353 { "f.29", 29 },
354 { "f.3", 3 },
252b5132
RH		 355 { "f.30", 30 },
356 { "f.31", 31 },
81d4177b
KH		 357 { "f.4", 4 },
358 { "f.5", 5 },
359 { "f.6", 6 },
360 { "f.7", 7 },
361 { "f.8", 8 },
362 { "f.9", 9 },
363
364 { "f0", 0 },
365 { "f1", 1 },
366 { "f10", 10 },
367 { "f11", 11 },
368 { "f12", 12 },
369 { "f13", 13 },
370 { "f14", 14 },
371 { "f15", 15 },
372 { "f16", 16 },
373 { "f17", 17 },
374 { "f18", 18 },
375 { "f19", 19 },
376 { "f2", 2 },
377 { "f20", 20 },
378 { "f21", 21 },
379 { "f22", 22 },
380 { "f23", 23 },
381 { "f24", 24 },
382 { "f25", 25 },
383 { "f26", 26 },
384 { "f27", 27 },
385 { "f28", 28 },
386 { "f29", 29 },
387 { "f3", 3 },
252b5132
RH		 388 { "f30", 30 },
389 { "f31", 31 },
81d4177b
KH		 390 { "f4", 4 },
391 { "f5", 5 },
392 { "f6", 6 },
393 { "f7", 7 },
394 { "f8", 8 },
395 { "f9", 9 },
252b5132
RH		 396
397 { "fpscr", 0 },
398
c3d65c1c
BE		 399 /* Quantization registers used with pair single instructions. */
400 { "gqr.0", 0 },
401 { "gqr.1", 1 },
402 { "gqr.2", 2 },
403 { "gqr.3", 3 },
404 { "gqr.4", 4 },
405 { "gqr.5", 5 },
406 { "gqr.6", 6 },
407 { "gqr.7", 7 },
408 { "gqr0", 0 },
409 { "gqr1", 1 },
410 { "gqr2", 2 },
411 { "gqr3", 3 },
412 { "gqr4", 4 },
413 { "gqr5", 5 },
414 { "gqr6", 6 },
415 { "gqr7", 7 },
416
252b5132
RH		 417 { "lr", 8 }, /* Link Register */
418
419 { "pmr", 0 },
420
421 { "r.0", 0 }, /* General Purpose Registers */
422 { "r.1", 1 },
423 { "r.10", 10 },
424 { "r.11", 11 },
425 { "r.12", 12 },
426 { "r.13", 13 },
427 { "r.14", 14 },
428 { "r.15", 15 },
429 { "r.16", 16 },
430 { "r.17", 17 },
431 { "r.18", 18 },
432 { "r.19", 19 },
433 { "r.2", 2 },
434 { "r.20", 20 },
435 { "r.21", 21 },
436 { "r.22", 22 },
437 { "r.23", 23 },
438 { "r.24", 24 },
439 { "r.25", 25 },
440 { "r.26", 26 },
441 { "r.27", 27 },
442 { "r.28", 28 },
443 { "r.29", 29 },
444 { "r.3", 3 },
445 { "r.30", 30 },
446 { "r.31", 31 },
447 { "r.4", 4 },
448 { "r.5", 5 },
449 { "r.6", 6 },
450 { "r.7", 7 },
451 { "r.8", 8 },
452 { "r.9", 9 },
453
454 { "r.sp", 1 }, /* Stack Pointer */
455
456 { "r.toc", 2 }, /* Pointer to the table of contents */
457
458 { "r0", 0 }, /* More general purpose registers */
459 { "r1", 1 },
460 { "r10", 10 },
461 { "r11", 11 },
462 { "r12", 12 },
463 { "r13", 13 },
464 { "r14", 14 },
465 { "r15", 15 },
466 { "r16", 16 },
467 { "r17", 17 },
468 { "r18", 18 },
469 { "r19", 19 },
470 { "r2", 2 },
471 { "r20", 20 },
472 { "r21", 21 },
473 { "r22", 22 },
474 { "r23", 23 },
475 { "r24", 24 },
476 { "r25", 25 },
477 { "r26", 26 },
478 { "r27", 27 },
479 { "r28", 28 },
480 { "r29", 29 },
481 { "r3", 3 },
482 { "r30", 30 },
483 { "r31", 31 },
484 { "r4", 4 },
485 { "r5", 5 },
486 { "r6", 6 },
487 { "r7", 7 },
488 { "r8", 8 },
489 { "r9", 9 },
490
491 { "rtoc", 2 }, /* Table of contents */
492
493 { "sdr1", 25 }, /* Storage Description Register 1 */
494
495 { "sp", 1 },
496
497 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
498 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 499
7a899fff 500 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 501 { "v.1", 1 },
502 { "v.10", 10 },
503 { "v.11", 11 },
504 { "v.12", 12 },
505 { "v.13", 13 },
506 { "v.14", 14 },
507 { "v.15", 15 },
508 { "v.16", 16 },
509 { "v.17", 17 },
510 { "v.18", 18 },
511 { "v.19", 19 },
512 { "v.2", 2 },
513 { "v.20", 20 },
514 { "v.21", 21 },
515 { "v.22", 22 },
516 { "v.23", 23 },
517 { "v.24", 24 },
518 { "v.25", 25 },
519 { "v.26", 26 },
520 { "v.27", 27 },
521 { "v.28", 28 },
522 { "v.29", 29 },
523 { "v.3", 3 },
7a899fff
C		 524 { "v.30", 30 },
525 { "v.31", 31 },
81d4177b
KH		 526 { "v.4", 4 },
527 { "v.5", 5 },
528 { "v.6", 6 },
529 { "v.7", 7 },
530 { "v.8", 8 },
531 { "v.9", 9 },
7a899fff
C		 532
533 { "v0", 0 },
81d4177b
KH		 534 { "v1", 1 },
535 { "v10", 10 },
536 { "v11", 11 },
537 { "v12", 12 },
538 { "v13", 13 },
539 { "v14", 14 },
540 { "v15", 15 },
541 { "v16", 16 },
542 { "v17", 17 },
543 { "v18", 18 },
544 { "v19", 19 },
545 { "v2", 2 },
546 { "v20", 20 },
547 { "v21", 21 },
548 { "v22", 22 },
549 { "v23", 23 },
550 { "v24", 24 },
551 { "v25", 25 },
552 { "v26", 26 },
553 { "v27", 27 },
554 { "v28", 28 },
555 { "v29", 29 },
556 { "v3", 3 },
7a899fff
C		 557 { "v30", 30 },
558 { "v31", 31 },
81d4177b
KH		 559 { "v4", 4 },
560 { "v5", 5 },
561 { "v6", 6 },
562 { "v7", 7 },
563 { "v8", 8 },
7a899fff 564 { "v9", 9 },
252b5132
RH		 565
566 { "xer", 1 },
567
568};
569
bc805888 570#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 571
572/* Given NAME, find the register number associated with that name, return
573 the integer value associated with the given name or -1 on failure. */
574
252b5132 575static int
98027b10 576reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 577{
578 int middle, low, high;
579 int cmp;
580
581 low = 0;
582 high = regcount - 1;
583
584 do
585 {
586 middle = (low + high) / 2;
587 cmp = strcasecmp (name, regs[middle].name);
588 if (cmp < 0)
589 high = middle - 1;
590 else if (cmp > 0)
591 low = middle + 1;
592 else
593 return regs[middle].value;
594 }
595 while (low <= high);
596
597 return -1;
598}
599
600/*
99a814a1 601 * Summary of register_name.
252b5132
RH		 602 *
603 * in: Input_line_pointer points to 1st char of operand.
604 *
605 * out: A expressionS.
606 * The operand may have been a register: in this case, X_op == O_register,
607 * X_add_number is set to the register number, and truth is returned.
608 * Input_line_pointer->(next non-blank) char after operand, or is in its
609 * original state.
610 */
611
b34976b6 612static bfd_boolean
98027b10 613register_name (expressionS *expressionP)
252b5132
RH		 614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH		 627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM		 631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH		 636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH		 641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM		 645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH		 649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH		 657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
98027b10 680ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH		 681{
682 int val;
683
684 if (! cr_operand)
685 return 0;
686
13abbae3
AM		 687 if (*name == '%')
688 ++name;
252b5132
RH		 689 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
690 name);
691 if (val < 0)
692 return 0;
693
694 expr->X_op = O_constant;
695 expr->X_add_number = val;
696
697 return 1;
698}
699\f
700/* Local variables. */
701
702/* The type of processor we are assembling for. This is one or more
703 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 704static unsigned long ppc_cpu = 0;
252b5132 705
2b3c4602
AM		 706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH		 709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH		 720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH		 727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM		 804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ		 806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH		 818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM		 822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
b0e34bfe
NC		 828 unsigned long altivec_or_spe = ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_SPE);
829
69c040df
AM		 830 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
831 (RIOS2). */
832 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
833 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
834 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
835 else if (strcmp (arg, "pwr") == 0)
836 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
837 /* -m601 means to assemble for the PowerPC 601, which includes
838 instructions that are holdovers from the Power. */
839 else if (strcmp (arg, "601") == 0)
840 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
841 | PPC_OPCODE_601 | PPC_OPCODE_32);
842 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
843 PowerPC 603/604. */
844 else if (strcmp (arg, "ppc") == 0
845 || strcmp (arg, "ppc32") == 0
846 || strcmp (arg, "603") == 0
847 || strcmp (arg, "604") == 0)
848 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
c3d65c1c
BE		 849 /* Do all PPC750s have paired single ops? */
850 else if (strcmp (arg, "750cl") == 0)
851 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
69c040df
AM		 852 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
853 else if (strcmp (arg, "403") == 0
854 || strcmp (arg, "405") == 0)
855 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
856 | PPC_OPCODE_403 | PPC_OPCODE_32);
857 else if (strcmp (arg, "440") == 0)
858 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
859 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
860 else if (strcmp (arg, "7400") == 0
861 || strcmp (arg, "7410") == 0
862 || strcmp (arg, "7450") == 0
863 || strcmp (arg, "7455") == 0)
864 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
865 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 866 else if (strcmp (arg, "e300") == 0)
867 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
868 | PPC_OPCODE_E300);
69c040df
AM		 869 else if (strcmp (arg, "altivec") == 0)
870 {
871 if (ppc_cpu == 0)
b0e34bfe
NC		 872 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
873
874 altivec_or_spe |= PPC_OPCODE_ALTIVEC;
69c040df
AM		 875 }
876 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
877 {
878 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
879 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
880 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
881 | PPC_OPCODE_RFMCI);
882 }
883 else if (strcmp (arg, "spe") == 0)
884 {
885 if (ppc_cpu == 0)
b0e34bfe
NC		 886 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_EFS;
887
888 altivec_or_spe |= PPC_OPCODE_SPE;
69c040df
AM		 889 }
890 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
891 620. */
892 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
893 {
894 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
895 }
896 else if (strcmp (arg, "ppc64bridge") == 0)
897 {
898 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
899 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
900 }
901 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
902 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
903 {
904 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
905 }
906 /* -mbooke64 means enable 64-bit BookE support. */
907 else if (strcmp (arg, "booke64") == 0)
908 {
909 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
910 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
911 }
912 else if (strcmp (arg, "power4") == 0)
913 {
914 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
915 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
916 }
b0648eec
AM		 917 else if (strcmp (arg, "power5") == 0)
918 {
919 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
920 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
921 | PPC_OPCODE_POWER5);
922 }
9622b051
AM		 923 else if (strcmp (arg, "power6") == 0)
924 {
925 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
926 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
927 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
928 }
ede602d7
AM		 929 else if (strcmp (arg, "cell") == 0)
930 {
931 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
932 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
933 | PPC_OPCODE_CELL);
934 }
69c040df
AM		 935 /* -mcom means assemble for the common intersection between Power
936 and PowerPC. At present, we just allow the union, rather
937 than the intersection. */
938 else if (strcmp (arg, "com") == 0)
939 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
940 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
941 else if (strcmp (arg, "any") == 0)
942 ppc_cpu |= PPC_OPCODE_ANY;
943 else
944 return 0;
945
b0e34bfe
NC		 946 /* Make sure the the Altivec and SPE bits are not lost. */
947 ppc_cpu |= altivec_or_spe;
69c040df
AM		 948 return 1;
949}
950
252b5132 951int
98027b10 952md_parse_option (int c, char *arg)
252b5132
RH		 953{
954 switch (c)
955 {
956 case 'u':
957 /* -u means that any undefined symbols should be treated as
958 external, which is the default for gas anyhow. */
959 break;
960
961#ifdef OBJ_ELF
962 case 'l':
963 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 964 sake, recognize -be also. */
252b5132
RH		 965 if (strcmp (arg, "e") == 0)
966 {
967 target_big_endian = 0;
968 set_target_endian = 1;
969 }
970 else
971 return 0;
972
973 break;
974
975 case 'b':
976 if (strcmp (arg, "e") == 0)
977 {
978 target_big_endian = 1;
979 set_target_endian = 1;
980 }
981 else
982 return 0;
983
984 break;
985
986 case 'K':
99a814a1 987 /* Recognize -K PIC. */
252b5132
RH		 988 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
989 {
990 shlib = SHLIB_PIC;
991 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
992 }
993 else
994 return 0;
995
996 break;
997#endif
998
7f6d05e8
CP		 999 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1000 case 'a':
1001 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1002 {
1003#ifdef BFD64
1004 ppc_obj64 = 1;
1005#else
1006 as_fatal (_("%s unsupported"), "-a64");
1007#endif
1008 }
7f6d05e8 1009 else if (strcmp (arg, "32") == 0)
2b3c4602 1010 ppc_obj64 = 0;
7f6d05e8
CP		 1011 else
1012 return 0;
1013 break;
81d4177b 1014
252b5132 1015 case 'm':
69c040df
AM		 1016 if (parse_cpu (arg))
1017 ;
252b5132
RH		 1018
1019 else if (strcmp (arg, "regnames") == 0)
b34976b6 1020 reg_names_p = TRUE;
252b5132
RH		 1021
1022 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1023 reg_names_p = FALSE;
252b5132
RH		 1024
1025#ifdef OBJ_ELF
99a814a1
AM		 1026 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1027 that require relocation. */
252b5132
RH		 1028 else if (strcmp (arg, "relocatable") == 0)
1029 {
5d6f4f16 1030 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1031 ppc_flags |= EF_PPC_RELOCATABLE;
1032 }
1033
1034 else if (strcmp (arg, "relocatable-lib") == 0)
1035 {
5d6f4f16 1036 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1037 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1038 }
1039
99a814a1 1040 /* -memb, set embedded bit. */
252b5132
RH		 1041 else if (strcmp (arg, "emb") == 0)
1042 ppc_flags |= EF_PPC_EMB;
1043
99a814a1
AM		 1044 /* -mlittle/-mbig set the endianess. */
1045 else if (strcmp (arg, "little") == 0
1046 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1047 {
1048 target_big_endian = 0;
1049 set_target_endian = 1;
1050 }
1051
1052 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1053 {
1054 target_big_endian = 1;
1055 set_target_endian = 1;
1056 }
1057
1058 else if (strcmp (arg, "solaris") == 0)
1059 {
b34976b6 1060 msolaris = TRUE;
252b5132
RH		 1061 ppc_comment_chars = ppc_solaris_comment_chars;
1062 }
1063
1064 else if (strcmp (arg, "no-solaris") == 0)
1065 {
b34976b6 1066 msolaris = FALSE;
252b5132
RH		 1067 ppc_comment_chars = ppc_eabi_comment_chars;
1068 }
1069#endif
1070 else
1071 {
1072 as_bad (_("invalid switch -m%s"), arg);
1073 return 0;
1074 }
1075 break;
1076
1077#ifdef OBJ_ELF
1078 /* -V: SVR4 argument to print version ID. */
1079 case 'V':
1080 print_version_id ();
1081 break;
1082
1083 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1084 should be emitted or not. FIXME: Not implemented. */
1085 case 'Q':
1086 break;
1087
1088 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1089 rather than .stabs.excl, which is ignored by the linker.
1090 FIXME: Not implemented. */
1091 case 's':
1092 if (arg)
1093 return 0;
1094
1095 break;
1096#endif
1097
1098 default:
1099 return 0;
1100 }
1101
1102 return 1;
1103}
1104
1105void
98027b10 1106md_show_usage (FILE *stream)
252b5132 1107{
bc805888 1108 fprintf (stream, _("\
252b5132 1109PowerPC options:\n\
df12615d
AM		 1110-a32 generate ELF32/XCOFF32\n\
1111-a64 generate ELF64/XCOFF64\n\
252b5132 1112-u ignored\n\
23e1d84c
AM		 1113-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1114-mpwr generate code for POWER (RIOS1)\n\
1115-m601 generate code for PowerPC 601\n\
418c1742 1116-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1117 generate code for PowerPC 603/604\n\
df12615d 1118-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1119-m440 generate code for PowerPC 440\n\
f5c120c5 1120-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1121 generate code for PowerPC 7400/7410/7450/7455\n\
1122-m750cl generate code for PowerPC 750cl\n"));
df12615d 1123 fprintf (stream, _("\
23e1d84c 1124-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1125-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1126-mbooke64 generate code for 64-bit PowerPC BookE\n\
1127-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1128-mpower4 generate code for Power4 architecture\n\
b0648eec 1129-mpower5 generate code for Power5 architecture\n\
9622b051 1130-mpower6 generate code for Power6 architecture\n\
ede602d7 1131-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1132-mcom generate code Power/PowerPC common instructions\n\
df12615d 1133-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1134 fprintf (stream, _("\
df12615d 1135-maltivec generate code for AltiVec\n\
36ae0db3 1136-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1137-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1138-mspe generate code for Motorola SPE instructions\n\
1139-mregnames Allow symbolic names for registers\n\
1140-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1141#ifdef OBJ_ELF
bc805888 1142 fprintf (stream, _("\
252b5132
RH		 1143-mrelocatable support for GCC's -mrelocatble option\n\
1144-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1145-memb set PPC_EMB bit in ELF flags\n\
df12615d 1146-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1147 generate code for a little endian machine\n\
df12615d
AM		 1148-mbig, -mbig-endian, -b, -be\n\
1149 generate code for a big endian machine\n\
252b5132
RH		 1150-msolaris generate code for Solaris\n\
1151-mno-solaris do not generate code for Solaris\n\
1152-V print assembler version number\n\
1153-Qy, -Qn ignored\n"));
1154#endif
1155}
1156\f
1157/* Set ppc_cpu if it is not already set. */
1158
1159static void
98027b10 1160ppc_set_cpu (void)
252b5132
RH		 1161{
1162 const char *default_os = TARGET_OS;
1163 const char *default_cpu = TARGET_CPU;
1164
3c9030c1 1165 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1166 {
2a98c3a6 1167 if (ppc_obj64)
3c9030c1 1168 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1169 else if (strncmp (default_os, "aix", 3) == 0
1170 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1171 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1172 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1173 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1174 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1175 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1176 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1177 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1178 else
99a814a1
AM		 1179 as_fatal (_("Unknown default cpu = %s, os = %s"),
1180 default_cpu, default_os);
252b5132
RH		 1181 }
1182}
1183
9232bbb0
AM		 1184/* Figure out the BFD architecture to use. This function and ppc_mach
1185 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1186
1187enum bfd_architecture
98027b10 1188ppc_arch (void)
252b5132
RH		 1189{
1190 const char *default_cpu = TARGET_CPU;
1191 ppc_set_cpu ();
1192
1193 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1194 return bfd_arch_powerpc;
1195 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1196 return bfd_arch_rs6000;
1197 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1198 {
1199 if (strcmp (default_cpu, "rs6000") == 0)
1200 return bfd_arch_rs6000;
0baf16f2 1201 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1202 return bfd_arch_powerpc;
1203 }
1204
1205 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1206 return bfd_arch_unknown;
1207}
1208
7f6d05e8 1209unsigned long
98027b10 1210ppc_mach (void)
7f6d05e8 1211{
2a98c3a6
AM		 1212 if (ppc_obj64)
1213 return bfd_mach_ppc64;
1214 else if (ppc_arch () == bfd_arch_rs6000)
1215 return bfd_mach_rs6k;
1216 else
1217 return bfd_mach_ppc;
7f6d05e8
CP		 1218}
1219
81d4177b 1220extern char*
98027b10 1221ppc_target_format (void)
7f6d05e8
CP		 1222{
1223#ifdef OBJ_COFF
1224#ifdef TE_PE
99a814a1 1225 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1226#elif TE_POWERMAC
0baf16f2 1227 return "xcoff-powermac";
7f6d05e8 1228#else
eb1e0e80 1229# ifdef TE_AIX5
2b3c4602 1230 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1231# else
2b3c4602 1232 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1233# endif
7f6d05e8 1234#endif
7f6d05e8
CP		 1235#endif
1236#ifdef OBJ_ELF
9d8504b1
PB		 1237# ifdef TE_VXWORKS
1238 return "elf32-powerpc-vxworks";
1239# else
0baf16f2 1240 return (target_big_endian
2b3c4602
AM		 1241 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1242 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1243# endif
7f6d05e8
CP		 1244#endif
1245}
1246
69c040df
AM		 1247/* Insert opcodes and macros into hash tables. Called at startup and
1248 for .cpu pseudo. */
252b5132 1249
69c040df
AM		 1250static void
1251ppc_setup_opcodes (void)
252b5132 1252{
98027b10 1253 const struct powerpc_opcode *op;
252b5132
RH		 1254 const struct powerpc_opcode *op_end;
1255 const struct powerpc_macro *macro;
1256 const struct powerpc_macro *macro_end;
b84bf58a 1257 bfd_boolean bad_insn = FALSE;
8dbcd839 1258 unsigned long prev_opcode = 0;
252b5132 1259
69c040df
AM		 1260 if (ppc_hash != NULL)
1261 hash_die (ppc_hash);
1262 if (ppc_macro_hash != NULL)
1263 hash_die (ppc_macro_hash);
252b5132
RH		 1264
1265 /* Insert the opcodes into a hash table. */
1266 ppc_hash = hash_new ();
1267
c43a438d 1268 if (ENABLE_CHECKING)
b84bf58a 1269 {
c43a438d 1270 unsigned int i;
b84bf58a 1271
c43a438d
AM		 1272 /* Check operand masks. Code here and in the disassembler assumes
1273 all the 1's in the mask are contiguous. */
1274 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1275 {
c43a438d
AM		 1276 unsigned long mask = powerpc_operands[i].bitm;
1277 unsigned long right_bit;
1278 unsigned int j;
1279
1280 right_bit = mask & -mask;
1281 mask += right_bit;
1282 right_bit = mask & -mask;
1283 if (mask != right_bit)
1284 {
1285 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1286 bad_insn = TRUE;
1287 }
1288 for (j = i + 1; j < num_powerpc_operands; ++j)
1289 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1290 sizeof (powerpc_operands[0])) == 0)
1291 {
1292 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1293 j, i);
1294 bad_insn = TRUE;
1295 }
b84bf58a
AM		 1296 }
1297 }
1298
252b5132
RH		 1299 op_end = powerpc_opcodes + powerpc_num_opcodes;
1300 for (op = powerpc_opcodes; op < op_end; op++)
1301 {
c43a438d 1302 if (ENABLE_CHECKING)
b84bf58a 1303 {
c43a438d
AM		 1304 const unsigned char *o;
1305 unsigned long omask = op->mask;
8dbcd839
PB		 1306 unsigned long major_opcode = PPC_OP (op->opcode);
1307
1308 /* The major opcodes had better be sorted. Code in the disassembler
1309 assumes the insns are sorted according to major opcode. */
1310 if (major_opcode < prev_opcode)
1311 {
1312 as_bad (_("major opcode is not sorted for %s"),
1313 op->name);
1314 bad_insn = TRUE;
1315 }
1316 prev_opcode = major_opcode;
c43a438d
AM		 1317
1318 /* The mask had better not trim off opcode bits. */
1319 if ((op->opcode & omask) != op->opcode)
1320 {
1321 as_bad (_("mask trims opcode bits for %s"),
1322 op->name);
1323 bad_insn = TRUE;
1324 }
1325
1326 /* The operands must not overlap the opcode or each other. */
1327 for (o = op->operands; *o; ++o)
1328 if (*o >= num_powerpc_operands)
1329 {
1330 as_bad (_("operand index error for %s"),
1331 op->name);
1332 bad_insn = TRUE;
1333 }
1334 else
b84bf58a 1335 {
c43a438d
AM		 1336 const struct powerpc_operand *operand = &powerpc_operands[*o];
1337 if (operand->shift >= 0)
b84bf58a 1338 {
c43a438d
AM		 1339 unsigned long mask = operand->bitm << operand->shift;
1340 if (omask & mask)
1341 {
1342 as_bad (_("operand %d overlap in %s"),
1343 (int) (o - op->operands), op->name);
1344 bad_insn = TRUE;
1345 }
1346 omask |= mask;
b84bf58a 1347 }
b84bf58a 1348 }
c43a438d 1349 }
252b5132 1350
2b3c4602 1351 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1352 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1353 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1354 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1355 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1356 /* Certain instructions (eg: extsw) do not exist in the
1357 32-bit BookE instruction set, but they do exist in the
1358 64-bit BookE instruction set, and other PPC instruction
1359 sets. Check to see if the opcode has the BOOKE64 flag set.
1360 If it does make sure that the target CPU is not the BookE32. */
1361 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1362 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1363 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1364 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1365 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1366 == (ppc_cpu & PPC_OPCODE_POWER4)))
1367 && ((op->flags & PPC_OPCODE_POWER5) == 0
1368 || ((op->flags & PPC_OPCODE_POWER5)
9622b051
AM		 1369 == (ppc_cpu & PPC_OPCODE_POWER5)))
1370 && ((op->flags & PPC_OPCODE_POWER6) == 0
1371 || ((op->flags & PPC_OPCODE_POWER6)
1372 == (ppc_cpu & PPC_OPCODE_POWER6))))
252b5132
RH		 1373 {
1374 const char *retval;
1375
98027b10 1376 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1377 if (retval != NULL)
252b5132 1378 {
99a814a1 1379 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1380 if ((ppc_cpu & PPC_OPCODE_601) != 0
1381 && (op->flags & PPC_OPCODE_POWER) != 0)
1382 continue;
1383
b84bf58a 1384 as_bad (_("duplicate instruction %s"),
99a814a1 1385 op->name);
b84bf58a 1386 bad_insn = TRUE;
252b5132
RH		 1387 }
1388 }
1389 }
1390
3c9030c1
AM		 1391 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1392 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1393 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1394
252b5132
RH		 1395 /* Insert the macros into a hash table. */
1396 ppc_macro_hash = hash_new ();
1397
1398 macro_end = powerpc_macros + powerpc_num_macros;
1399 for (macro = powerpc_macros; macro < macro_end; macro++)
1400 {
1401 if ((macro->flags & ppc_cpu) != 0)
1402 {
1403 const char *retval;
1404
98027b10 1405 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1406 if (retval != (const char *) NULL)
1407 {
b84bf58a
AM		 1408 as_bad (_("duplicate macro %s"), macro->name);
1409 bad_insn = TRUE;
252b5132
RH		 1410 }
1411 }
1412 }
1413
b84bf58a 1414 if (bad_insn)
252b5132 1415 abort ();
69c040df
AM		 1416}
1417
1418/* This function is called when the assembler starts up. It is called
1419 after the options have been parsed and the output file has been
1420 opened. */
1421
1422void
98027b10 1423md_begin (void)
69c040df
AM		 1424{
1425 ppc_set_cpu ();
1426
1427 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1428
1429#ifdef OBJ_ELF
1430 /* Set the ELF flags if desired. */
1431 if (ppc_flags && !msolaris)
1432 bfd_set_private_flags (stdoutput, ppc_flags);
1433#endif
1434
1435 ppc_setup_opcodes ();
252b5132 1436
67c1ffbe 1437 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1438 by the user. */
252b5132
RH		 1439 if (!set_target_endian)
1440 {
1441 set_target_endian = 1;
1442 target_big_endian = PPC_BIG_ENDIAN;
1443 }
1444
1445#ifdef OBJ_XCOFF
1446 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1447
1448 /* Create dummy symbols to serve as initial csects. This forces the
1449 text csects to precede the data csects. These symbols will not
1450 be output. */
1451 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1452 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1453 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1454 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1455#endif
1456
1457#ifdef TE_PE
1458
1459 ppc_current_section = text_section;
81d4177b 1460 ppc_previous_section = 0;
252b5132
RH		 1461
1462#endif
1463}
1464
6a0c61b7 1465void
98027b10 1466ppc_cleanup (void)
6a0c61b7 1467{
dc1d03fc 1468#ifdef OBJ_ELF
6a0c61b7
EZ		 1469 if (ppc_apuinfo_list == NULL)
1470 return;
1471
1472 /* Ok, so write the section info out. We have this layout:
1473
1474 byte data what
1475 ---- ---- ----
1476 0 8 length of "APUinfo\0"
1477 4 (n*4) number of APU's (4 bytes each)
1478 8 2 note type 2
1479 12 "APUinfo\0" name
1480 20 APU#1 first APU's info
1481 24 APU#2 second APU's info
1482 ... ...
1483 */
1484 {
1485 char *p;
1486 asection *seg = now_seg;
1487 subsegT subseg = now_subseg;
1488 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1489 unsigned int i;
6a0c61b7
EZ		 1490
1491 /* Create the .PPC.EMB.apuinfo section. */
1492 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1493 bfd_set_section_flags (stdoutput,
1494 apuinfo_secp,
e1a9cb8e 1495 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1496
1497 p = frag_more (4);
1498 md_number_to_chars (p, (valueT) 8, 4);
1499
1500 p = frag_more (4);
e98d298c 1501 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1502
1503 p = frag_more (4);
1504 md_number_to_chars (p, (valueT) 2, 4);
1505
1506 p = frag_more (8);
1507 strcpy (p, "APUinfo");
1508
1509 for (i = 0; i < ppc_apuinfo_num; i++)
1510 {
b34976b6
AM		 1511 p = frag_more (4);
1512 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1513 }
1514
1515 frag_align (2, 0, 0);
1516
1517 /* We probably can't restore the current segment, for there likely
1518 isn't one yet... */
1519 if (seg && subseg)
1520 subseg_set (seg, subseg);
1521 }
dc1d03fc 1522#endif
6a0c61b7
EZ		 1523}
1524
252b5132
RH		 1525/* Insert an operand value into an instruction. */
1526
1527static unsigned long
a1867a27
AM		 1528ppc_insert_operand (unsigned long insn,
1529 const struct powerpc_operand *operand,
1530 offsetT val,
1531 char *file,
1532 unsigned int line)
252b5132 1533{
b84bf58a 1534 long min, max, right;
eb42fac1 1535
b84bf58a
AM		 1536 max = operand->bitm;
1537 right = max & -max;
1538 min = 0;
1539
1540 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1541 {
b84bf58a 1542 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1543 max = (max >> 1) & -right;
1544 min = ~max & -right;
b84bf58a 1545 }
252b5132 1546
b84bf58a 1547 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1548 max++;
252b5132 1549
b84bf58a 1550 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1551 {
1552 long tmp = min;
1553 min = -max;
1554 max = -tmp;
1555 }
b84bf58a 1556
a1867a27
AM		 1557 if (min <= max)
1558 {
1559 /* Some people write constants with the sign extension done by
1560 hand but only up to 32 bits. This shouldn't really be valid,
1561 but, to permit this code to assemble on a 64-bit host, we
1562 sign extend the 32-bit value to 64 bits if so doing makes the
1563 value valid. */
1564 if (val > max
1565 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1566 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1567 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1568 val = val - 0x80000000 - 0x80000000;
1569
1570 /* Similarly, people write expressions like ~(1<<15), and expect
1571 this to be OK for a 32-bit unsigned value. */
1572 else if (val < min
1573 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1574 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1575 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1576 val = val + 0x80000000 + 0x80000000;
1577
1578 else if (val < min
1579 || val > max
1580 || (val & (right - 1)) != 0)
1581 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1582 }
b84bf58a 1583
252b5132
RH		 1584 if (operand->insert)
1585 {
1586 const char *errmsg;
1587
1588 errmsg = NULL;
2b3c4602 1589 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1590 if (errmsg != (const char *) NULL)
0baf16f2 1591 as_bad_where (file, line, errmsg);
252b5132
RH		 1592 }
1593 else
b84bf58a 1594 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1595
1596 return insn;
1597}
1598
1599\f
1600#ifdef OBJ_ELF
1601/* Parse @got, etc. and return the desired relocation. */
1602static bfd_reloc_code_real_type
98027b10 1603ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1604{
1605 struct map_bfd {
1606 char *string;
b7d7dc63
AM		 1607 unsigned int length : 8;
1608 unsigned int valid32 : 1;
1609 unsigned int valid64 : 1;
1610 unsigned int reloc;
252b5132
RH		 1611 };
1612
1613 char ident[20];
1614 char *str = *str_p;
1615 char *str2;
1616 int ch;
1617 int len;
15c1449b 1618 const struct map_bfd *ptr;
252b5132 1619
b7d7dc63
AM		 1620#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1621#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1622#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1623
15c1449b 1624 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1625 MAP ("l", BFD_RELOC_LO16),
1626 MAP ("h", BFD_RELOC_HI16),
1627 MAP ("ha", BFD_RELOC_HI16_S),
1628 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1629 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1630 MAP ("got", BFD_RELOC_16_GOTOFF),
1631 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1632 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1633 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1634 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1635 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1636 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1637 MAP ("copy", BFD_RELOC_PPC_COPY),
1638 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1639 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1640 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1641 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1642 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1643 MAP ("tls", BFD_RELOC_PPC_TLS),
1644 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1645 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1646 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1647 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1648 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1649 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1650 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1651 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1652 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1653 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1654 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1655 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1656 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1657 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1658 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1659 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1660 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1661 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1662 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1663 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1664 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1665 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1666 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1667 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1668 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1669 MAP32 ("fixup", BFD_RELOC_CTOR),
1670 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1671 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1672 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1673 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1674 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1675 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1676 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1677 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1678 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1679 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1680 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1681 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1682 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1683 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1684 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1685 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1686 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1687 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1688 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1689 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1690 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1691 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1692 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1693 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1694 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1695 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1696 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1697 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1698 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1699 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1700 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1701 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1702 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1703 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1704 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1705 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1706 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1707 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1708 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1709 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1710 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1711 };
1712
1713 if (*str++ != '@')
1714 return BFD_RELOC_UNUSED;
1715
1716 for (ch = *str, str2 = ident;
1717 (str2 < ident + sizeof (ident) - 1
3882b010 1718 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1719 ch = *++str)
1720 {
3882b010 1721 *str2++ = TOLOWER (ch);
252b5132
RH		 1722 }
1723
1724 *str2 = '\0';
1725 len = str2 - ident;
1726
1727 ch = ident[0];
1728 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1729 if (ch == ptr->string[0]
1730 && len == ptr->length
b7d7dc63
AM		 1731 && memcmp (ident, ptr->string, ptr->length) == 0
1732 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1733 {
15c1449b
AM		 1734 int reloc = ptr->reloc;
1735
cdba85ec 1736 if (!ppc_obj64)
5f6db75a
AM		 1737 if (exp_p->X_add_number != 0
1738 && (reloc == (int) BFD_RELOC_16_GOTOFF
1739 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1740 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1741 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1742 as_warn (_("identifier+constant@got means identifier@got+constant"));
1743
1744 /* Now check for identifier@suffix+constant. */
1745 if (*str == '-' || *str == '+')
252b5132 1746 {
5f6db75a
AM		 1747 char *orig_line = input_line_pointer;
1748 expressionS new_exp;
1749
1750 input_line_pointer = str;
1751 expression (&new_exp);
1752 if (new_exp.X_op == O_constant)
252b5132 1753 {
5f6db75a
AM		 1754 exp_p->X_add_number += new_exp.X_add_number;
1755 str = input_line_pointer;
252b5132 1756 }
5f6db75a
AM		 1757
1758 if (&input_line_pointer != str_p)
1759 input_line_pointer = orig_line;
252b5132 1760 }
252b5132 1761 *str_p = str;
0baf16f2 1762
2b3c4602 1763 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1764 && exp_p->X_op == O_symbol
1765 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1766 {
9f2b53d7
AM		 1767 /* Change the symbol so that the dummy .TOC. symbol can be
1768 omitted from the object file. */
0baf16f2
AM		 1769 exp_p->X_add_symbol = &abs_symbol;
1770 }
1771
15c1449b 1772 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1773 }
1774
1775 return BFD_RELOC_UNUSED;
1776}
1777
99a814a1
AM		 1778/* Like normal .long/.short/.word, except support @got, etc.
1779 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1780static void
98027b10 1781ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1782{
1783 expressionS exp;
1784 bfd_reloc_code_real_type reloc;
1785
1786 if (is_it_end_of_statement ())
1787 {
1788 demand_empty_rest_of_line ();
1789 return;
1790 }
1791
1792 do
1793 {
1794 expression (&exp);
1795 if (exp.X_op == O_symbol
1796 && *input_line_pointer == '@'
99a814a1
AM		 1797 && (reloc = ppc_elf_suffix (&input_line_pointer,
1798 &exp)) != BFD_RELOC_UNUSED)
252b5132 1799 {
99a814a1
AM		 1800 reloc_howto_type *reloc_howto;
1801 int size;
1802
1803 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1804 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1805
1806 if (size > nbytes)
0baf16f2
AM		 1807 {
1808 as_bad (_("%s relocations do not fit in %d bytes\n"),
1809 reloc_howto->name, nbytes);
1810 }
252b5132
RH		 1811 else
1812 {
0baf16f2
AM		 1813 char *p;
1814 int offset;
252b5132 1815
0baf16f2
AM		 1816 p = frag_more (nbytes);
1817 offset = 0;
1818 if (target_big_endian)
1819 offset = nbytes - size;
99a814a1
AM		 1820 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1821 &exp, 0, reloc);
252b5132
RH		 1822 }
1823 }
1824 else
1825 emit_expr (&exp, (unsigned int) nbytes);
1826 }
1827 while (*input_line_pointer++ == ',');
1828
99a814a1
AM		 1829 /* Put terminator back into stream. */
1830 input_line_pointer--;
252b5132
RH		 1831 demand_empty_rest_of_line ();
1832}
1833
1834/* Solaris pseduo op to change to the .rodata section. */
1835static void
98027b10 1836ppc_elf_rdata (int xxx)
252b5132
RH		 1837{
1838 char *save_line = input_line_pointer;
1839 static char section[] = ".rodata\n";
1840
99a814a1 1841 /* Just pretend this is .section .rodata */
252b5132
RH		 1842 input_line_pointer = section;
1843 obj_elf_section (xxx);
1844
1845 input_line_pointer = save_line;
1846}
1847
99a814a1 1848/* Pseudo op to make file scope bss items. */
252b5132 1849static void
98027b10 1850ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1851{
98027b10
AM		 1852 char *name;
1853 char c;
1854 char *p;
252b5132 1855 offsetT size;
98027b10 1856 symbolS *symbolP;
252b5132
RH		 1857 offsetT align;
1858 segT old_sec;
1859 int old_subsec;
1860 char *pfrag;
1861 int align2;
1862
1863 name = input_line_pointer;
1864 c = get_symbol_end ();
1865
99a814a1 1866 /* just after name is now '\0'. */
252b5132
RH		 1867 p = input_line_pointer;
1868 *p = c;
1869 SKIP_WHITESPACE ();
1870 if (*input_line_pointer != ',')
1871 {
1872 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1873 ignore_rest_of_line ();
1874 return;
1875 }
1876
1877 input_line_pointer++; /* skip ',' */
1878 if ((size = get_absolute_expression ()) < 0)
1879 {
1880 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1881 ignore_rest_of_line ();
1882 return;
1883 }
1884
1885 /* The third argument to .lcomm is the alignment. */
1886 if (*input_line_pointer != ',')
1887 align = 8;
1888 else
1889 {
1890 ++input_line_pointer;
1891 align = get_absolute_expression ();
1892 if (align <= 0)
1893 {
1894 as_warn (_("ignoring bad alignment"));
1895 align = 8;
1896 }
1897 }
1898
1899 *p = 0;
1900 symbolP = symbol_find_or_make (name);
1901 *p = c;
1902
1903 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1904 {
1905 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1906 S_GET_NAME (symbolP));
1907 ignore_rest_of_line ();
1908 return;
1909 }
1910
1911 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1912 {
1913 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1914 S_GET_NAME (symbolP),
1915 (long) S_GET_VALUE (symbolP),
1916 (long) size);
1917
1918 ignore_rest_of_line ();
1919 return;
1920 }
1921
99a814a1 1922 /* Allocate_bss. */
252b5132
RH		 1923 old_sec = now_seg;
1924 old_subsec = now_subseg;
1925 if (align)
1926 {
99a814a1 1927 /* Convert to a power of 2 alignment. */
252b5132
RH		 1928 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1929 if (align != 1)
1930 {
1931 as_bad (_("Common alignment not a power of 2"));
1932 ignore_rest_of_line ();
1933 return;
1934 }
1935 }
1936 else
1937 align2 = 0;
1938
1939 record_alignment (bss_section, align2);
1940 subseg_set (bss_section, 0);
1941 if (align2)
1942 frag_align (align2, 0, 0);
1943 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1944 symbol_get_frag (symbolP)->fr_symbol = 0;
1945 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1946 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1947 (char *) 0);
1948 *pfrag = 0;
1949 S_SET_SIZE (symbolP, size);
1950 S_SET_SEGMENT (symbolP, bss_section);
1951 subseg_set (old_sec, old_subsec);
1952 demand_empty_rest_of_line ();
1953}
1954
1955/* Validate any relocations emitted for -mrelocatable, possibly adding
1956 fixups for word relocations in writable segments, so we can adjust
1957 them at runtime. */
1958static void
98027b10 1959ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 1960{
1961 if (fixp->fx_done || fixp->fx_pcrel)
1962 return;
1963
1964 switch (shlib)
1965 {
1966 case SHLIB_NONE:
1967 case SHLIB_PIC:
1968 return;
1969
5d6f4f16 1970 case SHLIB_MRELOCATABLE:
252b5132
RH		 1971 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1972 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1973 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1974 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1975 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1976 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1977 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1978 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1979 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1980 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1981 && strcmp (segment_name (seg), ".got2") != 0
1982 && strcmp (segment_name (seg), ".dtors") != 0
1983 && strcmp (segment_name (seg), ".ctors") != 0
1984 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1985 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1986 && strcmp (segment_name (seg), ".eh_frame") != 0
1987 && strcmp (segment_name (seg), ".ex_shared") != 0)
1988 {
1989 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1990 || fixp->fx_r_type != BFD_RELOC_CTOR)
1991 {
1992 as_bad_where (fixp->fx_file, fixp->fx_line,
1993 _("Relocation cannot be done when using -mrelocatable"));
1994 }
1995 }
1996 return;
1997 }
1998}
0baf16f2 1999
7e8d4ab4
AM		 2000/* Prevent elf_frob_file_before_adjust removing a weak undefined
2001 function descriptor sym if the corresponding code sym is used. */
2002
2003void
98027b10 2004ppc_frob_file_before_adjust (void)
0baf16f2 2005{
7e8d4ab4 2006 symbolS *symp;
9232bbb0 2007 asection *toc;
0baf16f2 2008
7e8d4ab4
AM		 2009 if (!ppc_obj64)
2010 return;
2011
2012 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2013 {
7e8d4ab4
AM		 2014 const char *name;
2015 char *dotname;
2016 symbolS *dotsym;
2017 size_t len;
2018
2019 name = S_GET_NAME (symp);
2020 if (name[0] == '.')
2021 continue;
2022
2023 if (! S_IS_WEAK (symp)
2024 || S_IS_DEFINED (symp))
2025 continue;
2026
2027 len = strlen (name) + 1;
2028 dotname = xmalloc (len + 1);
2029 dotname[0] = '.';
2030 memcpy (dotname + 1, name, len);
461b725f 2031 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2032 free (dotname);
2033 if (dotsym != NULL && (symbol_used_p (dotsym)
2034 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2035 symbol_mark_used (symp);
2036
0baf16f2
AM		 2037 }
2038
9232bbb0
AM		 2039 toc = bfd_get_section_by_name (stdoutput, ".toc");
2040 if (toc != NULL
2041 && bfd_section_size (stdoutput, toc) > 0x10000)
2042 as_warn (_("TOC section size exceeds 64k"));
2043
7e8d4ab4
AM		 2044 /* Don't emit .TOC. symbol. */
2045 symp = symbol_find (".TOC.");
2046 if (symp != NULL)
2047 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2048}
252b5132
RH		 2049#endif /* OBJ_ELF */
2050\f
2051#ifdef TE_PE
2052
2053/*
99a814a1 2054 * Summary of parse_toc_entry.
252b5132
RH		 2055 *
2056 * in: Input_line_pointer points to the '[' in one of:
2057 *
2058 * [toc] [tocv] [toc32] [toc64]
2059 *
2060 * Anything else is an error of one kind or another.
2061 *
81d4177b 2062 * out:
252b5132
RH		 2063 * return value: success or failure
2064 * toc_kind: kind of toc reference
2065 * input_line_pointer:
2066 * success: first char after the ']'
2067 * failure: unchanged
2068 *
2069 * settings:
2070 *
2071 * [toc] - rv == success, toc_kind = default_toc
2072 * [tocv] - rv == success, toc_kind = data_in_toc
2073 * [toc32] - rv == success, toc_kind = must_be_32
2074 * [toc64] - rv == success, toc_kind = must_be_64
2075 *
2076 */
2077
81d4177b
KH		 2078enum toc_size_qualifier
2079{
252b5132
RH		 2080 default_toc, /* The toc cell constructed should be the system default size */
2081 data_in_toc, /* This is a direct reference to a toc cell */
2082 must_be_32, /* The toc cell constructed must be 32 bits wide */
2083 must_be_64 /* The toc cell constructed must be 64 bits wide */
2084};
2085
2086static int
98027b10 2087parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2088{
2089 char *start;
2090 char *toc_spec;
2091 char c;
2092 enum toc_size_qualifier t;
2093
99a814a1 2094 /* Save the input_line_pointer. */
252b5132
RH		 2095 start = input_line_pointer;
2096
99a814a1 2097 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2098 ++input_line_pointer;
2099 SKIP_WHITESPACE ();
81d4177b 2100
99a814a1 2101 /* Find the spelling of the operand. */
252b5132
RH		 2102 toc_spec = input_line_pointer;
2103 c = get_symbol_end ();
2104
99a814a1 2105 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2106 {
2107 t = default_toc;
2108 }
99a814a1 2109 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2110 {
2111 t = data_in_toc;
2112 }
99a814a1 2113 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2114 {
2115 t = must_be_32;
2116 }
99a814a1 2117 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2118 {
2119 t = must_be_64;
2120 }
2121 else
2122 {
2123 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2124 *input_line_pointer = c;
2125 input_line_pointer = start;
252b5132
RH		 2126 return 0;
2127 }
2128
99a814a1
AM		 2129 /* Now find the ']'. */
2130 *input_line_pointer = c;
252b5132 2131
81d4177b
KH		 2132 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2133 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2134
2135 if (c != ']')
2136 {
2137 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2138 input_line_pointer = start;
252b5132
RH		 2139 return 0;
2140 }
2141
99a814a1 2142 *toc_kind = t;
252b5132
RH		 2143 return 1;
2144}
2145#endif
2146\f
2147
dc1d03fc 2148#ifdef OBJ_ELF
6a0c61b7
EZ		 2149#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2150static void
98027b10 2151ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2152{
2153 unsigned int i;
2154
2155 /* Check we don't already exist. */
2156 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2157 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2158 return;
b34976b6 2159
6a0c61b7
EZ		 2160 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2161 {
2162 if (ppc_apuinfo_num_alloc == 0)
2163 {
2164 ppc_apuinfo_num_alloc = 4;
2165 ppc_apuinfo_list = (unsigned long *)
2166 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2167 }
2168 else
2169 {
2170 ppc_apuinfo_num_alloc += 4;
2171 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2172 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2173 }
2174 }
dc1d03fc 2175 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2176}
2177#undef APUID
dc1d03fc 2178#endif
6a0c61b7
EZ		 2179\f
2180
252b5132
RH		 2181/* We need to keep a list of fixups. We can't simply generate them as
2182 we go, because that would require us to first create the frag, and
2183 that would screw up references to ``.''. */
2184
2185struct ppc_fixup
2186{
2187 expressionS exp;
2188 int opindex;
2189 bfd_reloc_code_real_type reloc;
2190};
2191
2192#define MAX_INSN_FIXUPS (5)
2193
2194/* This routine is called for each instruction to be assembled. */
2195
2196void
98027b10 2197md_assemble (char *str)
252b5132
RH		 2198{
2199 char *s;
2200 const struct powerpc_opcode *opcode;
2201 unsigned long insn;
2202 const unsigned char *opindex_ptr;
2203 int skip_optional;
2204 int need_paren;
2205 int next_opindex;
2206 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2207 int fc;
2208 char *f;
09b935ac 2209 int addr_mod;
252b5132
RH		 2210 int i;
2211#ifdef OBJ_ELF
2212 bfd_reloc_code_real_type reloc;
2213#endif
2214
2215 /* Get the opcode. */
3882b010 2216 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2217 ;
2218 if (*s != '\0')
2219 *s++ = '\0';
2220
2221 /* Look up the opcode in the hash table. */
2222 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2223 if (opcode == (const struct powerpc_opcode *) NULL)
2224 {
2225 const struct powerpc_macro *macro;
2226
2227 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2228 if (macro == (const struct powerpc_macro *) NULL)
2229 as_bad (_("Unrecognized opcode: `%s'"), str);
2230 else
2231 ppc_macro (s, macro);
2232
2233 return;
2234 }
2235
2236 insn = opcode->opcode;
2237
2238 str = s;
3882b010 2239 while (ISSPACE (*str))
252b5132
RH		 2240 ++str;
2241
2242 /* PowerPC operands are just expressions. The only real issue is
2243 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2244 an optional operand separate the operands only with commas (in some
2245 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2246 have optional operands). Most instructions with optional operands
2247 have only one. Those that have more than one optional operand can
2248 take either all their operands or none. So, before we start seriously
2249 parsing the operands, we check to see if we have optional operands,
2250 and if we do, we count the number of commas to see which operands
2251 have been omitted. */
252b5132
RH		 2252 skip_optional = 0;
2253 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2254 {
2255 const struct powerpc_operand *operand;
2256
2257 operand = &powerpc_operands[*opindex_ptr];
2258 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2259 {
2260 unsigned int opcount;
7fe9cf6b
NC		 2261 unsigned int num_operands_expected;
2262 unsigned int i;
252b5132
RH		 2263
2264 /* There is an optional operand. Count the number of
2265 commas in the input line. */
2266 if (*str == '\0')
2267 opcount = 0;
2268 else
2269 {
2270 opcount = 1;
2271 s = str;
2272 while ((s = strchr (s, ',')) != (char *) NULL)
2273 {
2274 ++opcount;
2275 ++s;
2276 }
2277 }
2278
7fe9cf6b
NC		 2279 /* Compute the number of expected operands.
2280 Do not count fake operands. */
2281 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2282 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2283 ++ num_operands_expected;
2284
252b5132
RH		 2285 /* If there are fewer operands in the line then are called
2286 for by the instruction, we want to skip the optional
1f6c9eb0 2287 operands. */
7fe9cf6b 2288 if (opcount < num_operands_expected)
252b5132
RH		 2289 skip_optional = 1;
2290
2291 break;
2292 }
2293 }
2294
2295 /* Gather the operands. */
2296 need_paren = 0;
2297 next_opindex = 0;
2298 fc = 0;
2299 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2300 {
2301 const struct powerpc_operand *operand;
2302 const char *errmsg;
2303 char *hold;
2304 expressionS ex;
2305 char endc;
2306
2307 if (next_opindex == 0)
2308 operand = &powerpc_operands[*opindex_ptr];
2309 else
2310 {
2311 operand = &powerpc_operands[next_opindex];
2312 next_opindex = 0;
2313 }
252b5132
RH		 2314 errmsg = NULL;
2315
2316 /* If this is a fake operand, then we do not expect anything
2317 from the input. */
2318 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2319 {
2b3c4602 2320 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2321 if (errmsg != (const char *) NULL)
2322 as_bad (errmsg);
2323 continue;
2324 }
2325
2326 /* If this is an optional operand, and we are skipping it, just
2327 insert a zero. */
2328 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2329 && skip_optional)
2330 {
2331 if (operand->insert)
2332 {
2b3c4602 2333 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2334 if (errmsg != (const char *) NULL)
2335 as_bad (errmsg);
2336 }
2337 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2338 next_opindex = *opindex_ptr + 1;
2339 continue;
2340 }
2341
2342 /* Gather the operand. */
2343 hold = input_line_pointer;
2344 input_line_pointer = str;
2345
2346#ifdef TE_PE
81d4177b 2347 if (*input_line_pointer == '[')
252b5132
RH		 2348 {
2349 /* We are expecting something like the second argument here:
99a814a1
AM		 2350 *
2351 * lwz r4,[toc].GS.0.static_int(rtoc)
2352 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2353 * The argument following the `]' must be a symbol name, and the
2354 * register must be the toc register: 'rtoc' or '2'
2355 *
2356 * The effect is to 0 as the displacement field
2357 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2358 * the appropriate variation) reloc against it based on the symbol.
2359 * The linker will build the toc, and insert the resolved toc offset.
2360 *
2361 * Note:
2362 * o The size of the toc entry is currently assumed to be
2363 * 32 bits. This should not be assumed to be a hard coded
2364 * number.
2365 * o In an effort to cope with a change from 32 to 64 bits,
2366 * there are also toc entries that are specified to be
2367 * either 32 or 64 bits:
2368 * lwz r4,[toc32].GS.0.static_int(rtoc)
2369 * lwz r4,[toc64].GS.0.static_int(rtoc)
2370 * These demand toc entries of the specified size, and the
2371 * instruction probably requires it.
2372 */
252b5132
RH		 2373
2374 int valid_toc;
2375 enum toc_size_qualifier toc_kind;
2376 bfd_reloc_code_real_type toc_reloc;
2377
99a814a1
AM		 2378 /* Go parse off the [tocXX] part. */
2379 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2380
81d4177b 2381 if (!valid_toc)
252b5132 2382 {
99a814a1
AM		 2383 /* Note: message has already been issued.
2384 FIXME: what sort of recovery should we do?
2385 demand_rest_of_line (); return; ? */
252b5132
RH		 2386 }
2387
99a814a1
AM		 2388 /* Now get the symbol following the ']'. */
2389 expression (&ex);
252b5132
RH		 2390
2391 switch (toc_kind)
2392 {
2393 case default_toc:
99a814a1
AM		 2394 /* In this case, we may not have seen the symbol yet,
2395 since it is allowed to appear on a .extern or .globl
2396 or just be a label in the .data section. */
252b5132
RH		 2397 toc_reloc = BFD_RELOC_PPC_TOC16;
2398 break;
2399 case data_in_toc:
99a814a1
AM		 2400 /* 1. The symbol must be defined and either in the toc
2401 section, or a global.
2402 2. The reloc generated must have the TOCDEFN flag set
2403 in upper bit mess of the reloc type.
2404 FIXME: It's a little confusing what the tocv
2405 qualifier can be used for. At the very least, I've
2406 seen three uses, only one of which I'm sure I can
2407 explain. */
81d4177b
KH		 2408 if (ex.X_op == O_symbol)
2409 {
252b5132 2410 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2411 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2412 != tocdata_section)
252b5132 2413 {
99a814a1 2414 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2415 }
2416 }
2417
2418 toc_reloc = BFD_RELOC_PPC_TOC16;
2419 break;
2420 case must_be_32:
99a814a1
AM		 2421 /* FIXME: these next two specifically specify 32/64 bit
2422 toc entries. We don't support them today. Is this
2423 the right way to say that? */
252b5132
RH		 2424 toc_reloc = BFD_RELOC_UNUSED;
2425 as_bad (_("Unimplemented toc32 expression modifier"));
2426 break;
2427 case must_be_64:
99a814a1 2428 /* FIXME: see above. */
252b5132
RH		 2429 toc_reloc = BFD_RELOC_UNUSED;
2430 as_bad (_("Unimplemented toc64 expression modifier"));
2431 break;
2432 default:
bc805888 2433 fprintf (stderr,
99a814a1
AM		 2434 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2435 toc_kind);
bc805888 2436 abort ();
252b5132
RH		 2437 break;
2438 }
2439
2440 /* We need to generate a fixup for this expression. */
2441 if (fc >= MAX_INSN_FIXUPS)
2442 as_fatal (_("too many fixups"));
2443
2444 fixups[fc].reloc = toc_reloc;
2445 fixups[fc].exp = ex;
2446 fixups[fc].opindex = *opindex_ptr;
2447 ++fc;
2448
99a814a1
AM		 2449 /* Ok. We've set up the fixup for the instruction. Now make it
2450 look like the constant 0 was found here. */
252b5132
RH		 2451 ex.X_unsigned = 1;
2452 ex.X_op = O_constant;
2453 ex.X_add_number = 0;
2454 ex.X_add_symbol = NULL;
2455 ex.X_op_symbol = NULL;
2456 }
2457
2458 else
2459#endif /* TE_PE */
2460 {
2ad068be
AM		 2461 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2462 || !register_name (&ex))
252b5132 2463 {
13abbae3
AM		 2464 char save_lex = lex_type['%'];
2465
252b5132 2466 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2467 {
2468 cr_operand = TRUE;
2469 lex_type['%'] |= LEX_BEGIN_NAME;
2470 }
252b5132 2471 expression (&ex);
b34976b6 2472 cr_operand = FALSE;
13abbae3 2473 lex_type['%'] = save_lex;
252b5132
RH		 2474 }
2475 }
2476
2477 str = input_line_pointer;
2478 input_line_pointer = hold;
2479
2480 if (ex.X_op == O_illegal)
2481 as_bad (_("illegal operand"));
2482 else if (ex.X_op == O_absent)
2483 as_bad (_("missing operand"));
2484 else if (ex.X_op == O_register)
2485 {
2486 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2487 (char *) NULL, 0);
2488 }
2489 else if (ex.X_op == O_constant)
2490 {
2491#ifdef OBJ_ELF
81d4177b 2492 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2493 char *orig_str = str;
2494
2495 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2496 switch (reloc)
2497 {
2498 default:
2499 str = orig_str;
2500 break;
2501
2502 case BFD_RELOC_LO16:
2503 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2504 something which cleared it, we always produce a
2505 signed value. */
2506 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2507 ex.X_add_number &= 0xffff;
2508 else
0baf16f2 2509 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2510 break;
2511
2512 case BFD_RELOC_HI16:
0baf16f2
AM		 2513 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2514 ex.X_add_number = PPC_HI (ex.X_add_number);
2515 else
2516 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2517 break;
2518
2519 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2520 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2521 ex.X_add_number = PPC_HA (ex.X_add_number);
2522 else
2523 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2524 break;
2525
0baf16f2
AM		 2526 case BFD_RELOC_PPC64_HIGHER:
2527 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2528 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2529 else
2530 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2531 break;
2532
2533 case BFD_RELOC_PPC64_HIGHER_S:
2534 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2535 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2536 else
2537 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2538 break;
0baf16f2
AM		 2539
2540 case BFD_RELOC_PPC64_HIGHEST:
2541 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2542 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2543 else
2544 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2545 break;
2546
2547 case BFD_RELOC_PPC64_HIGHEST_S:
2548 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2549 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2550 else
2551 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2552 break;
252b5132 2553 }
0baf16f2 2554#endif /* OBJ_ELF */
252b5132
RH		 2555 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2556 (char *) NULL, 0);
2557 }
2558#ifdef OBJ_ELF
2559 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2560 {
cdba85ec
AM		 2561 /* Some TLS tweaks. */
2562 switch (reloc)
2563 {
2564 default:
2565 break;
2566 case BFD_RELOC_PPC_TLS:
2567 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2568 (char *) NULL, 0);
2569 break;
2570 /* We'll only use the 32 (or 64) bit form of these relocations
2571 in constants. Instructions get the 16 bit form. */
2572 case BFD_RELOC_PPC_DTPREL:
2573 reloc = BFD_RELOC_PPC_DTPREL16;
2574 break;
2575 case BFD_RELOC_PPC_TPREL:
2576 reloc = BFD_RELOC_PPC_TPREL16;
2577 break;
2578 }
2579
99a814a1
AM		 2580 /* For the absolute forms of branches, convert the PC
2581 relative form back into the absolute. */
252b5132
RH		 2582 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2583 {
2584 switch (reloc)
2585 {
2586 case BFD_RELOC_PPC_B26:
2587 reloc = BFD_RELOC_PPC_BA26;
2588 break;
2589 case BFD_RELOC_PPC_B16:
2590 reloc = BFD_RELOC_PPC_BA16;
2591 break;
2592 case BFD_RELOC_PPC_B16_BRTAKEN:
2593 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2594 break;
2595 case BFD_RELOC_PPC_B16_BRNTAKEN:
2596 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2597 break;
2598 default:
2599 break;
2600 }
2601 }
2602
2b3c4602 2603 if (ppc_obj64
adadcc0c 2604 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2605 {
2606 switch (reloc)
2607 {
2608 case BFD_RELOC_16:
2609 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2610 break;
2611 case BFD_RELOC_LO16:
2612 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2613 break;
2614 case BFD_RELOC_16_GOTOFF:
2615 reloc = BFD_RELOC_PPC64_GOT16_DS;
2616 break;
2617 case BFD_RELOC_LO16_GOTOFF:
2618 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2619 break;
2620 case BFD_RELOC_LO16_PLTOFF:
2621 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2622 break;
1cfc59d5 2623 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2624 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2625 break;
2626 case BFD_RELOC_LO16_BASEREL:
2627 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2628 break;
2629 case BFD_RELOC_PPC_TOC16:
2630 reloc = BFD_RELOC_PPC64_TOC16_DS;
2631 break;
2632 case BFD_RELOC_PPC64_TOC16_LO:
2633 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2634 break;
2635 case BFD_RELOC_PPC64_PLTGOT16:
2636 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2637 break;
2638 case BFD_RELOC_PPC64_PLTGOT16_LO:
2639 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2640 break;
cdba85ec
AM		 2641 case BFD_RELOC_PPC_DTPREL16:
2642 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2643 break;
2644 case BFD_RELOC_PPC_DTPREL16_LO:
2645 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2646 break;
2647 case BFD_RELOC_PPC_TPREL16:
2648 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2649 break;
2650 case BFD_RELOC_PPC_TPREL16_LO:
2651 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2652 break;
2653 case BFD_RELOC_PPC_GOT_DTPREL16:
2654 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2655 case BFD_RELOC_PPC_GOT_TPREL16:
2656 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2657 break;
0baf16f2
AM		 2658 default:
2659 as_bad (_("unsupported relocation for DS offset field"));
2660 break;
2661 }
2662 }
2663
252b5132
RH		 2664 /* We need to generate a fixup for this expression. */
2665 if (fc >= MAX_INSN_FIXUPS)
2666 as_fatal (_("too many fixups"));
2667 fixups[fc].exp = ex;
2668 fixups[fc].opindex = 0;
2669 fixups[fc].reloc = reloc;
2670 ++fc;
2671 }
2672#endif /* OBJ_ELF */
2673
2674 else
2675 {
2676 /* We need to generate a fixup for this expression. */
2677 if (fc >= MAX_INSN_FIXUPS)
2678 as_fatal (_("too many fixups"));
2679 fixups[fc].exp = ex;
2680 fixups[fc].opindex = *opindex_ptr;
2681 fixups[fc].reloc = BFD_RELOC_UNUSED;
2682 ++fc;
2683 }
2684
2685 if (need_paren)
2686 {
2687 endc = ')';
2688 need_paren = 0;
c3d65c1c
BE		 2689 /* If expecting more operands, then we want to see "),". */
2690 if (*str == endc && opindex_ptr[1] != 0)
2691 {
2692 do
2693 ++str;
2694 while (ISSPACE (*str));
2695 endc = ',';
2696 }
252b5132
RH		 2697 }
2698 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2699 {
2700 endc = '(';
2701 need_paren = 1;
2702 }
2703 else
2704 endc = ',';
2705
2706 /* The call to expression should have advanced str past any
2707 whitespace. */
2708 if (*str != endc
2709 && (endc != ',' || *str != '\0'))
2710 {
2711 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2712 break;
2713 }
2714
2715 if (*str != '\0')
2716 ++str;
2717 }
2718
3882b010 2719 while (ISSPACE (*str))
252b5132
RH		 2720 ++str;
2721
2722 if (*str != '\0')
2723 as_bad (_("junk at end of line: `%s'"), str);
2724
dc1d03fc 2725#ifdef OBJ_ELF
6a0c61b7
EZ		 2726 /* Do we need/want a APUinfo section? */
2727 if (ppc_cpu & (PPC_OPCODE_SPE
2728 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2729 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2730 | PPC_OPCODE_RFMCI))
2731 {
2732 /* These are all version "1". */
2733 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2734 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2735 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2736 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2737 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2738 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2739 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2740 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2741 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2742 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2743 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2744 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2745 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2746 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2747 }
dc1d03fc 2748#endif
6a0c61b7 2749
252b5132
RH		 2750 /* Write out the instruction. */
2751 f = frag_more (4);
09b935ac
AM		 2752 addr_mod = frag_now_fix () & 3;
2753 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2754 as_bad (_("instruction address is not a multiple of 4"));
2755 frag_now->insn_addr = addr_mod;
2756 frag_now->has_code = 1;
252b5132
RH		 2757 md_number_to_chars (f, insn, 4);
2758
5d6f4f16
GK		 2759#ifdef OBJ_ELF
2760 dwarf2_emit_insn (4);
2761#endif
2762
252b5132
RH		 2763 /* Create any fixups. At this point we do not use a
2764 bfd_reloc_code_real_type, but instead just use the
2765 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2766 handle fixups for any operand type, although that is admittedly
2767 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2768 md_apply_fix. */
252b5132
RH		 2769 for (i = 0; i < fc; i++)
2770 {
2771 const struct powerpc_operand *operand;
2772
2773 operand = &powerpc_operands[fixups[i].opindex];
2774 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2775 {
99a814a1 2776 reloc_howto_type *reloc_howto;
252b5132
RH		 2777 int size;
2778 int offset;
2779 fixS *fixP;
2780
99a814a1 2781 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2782 if (!reloc_howto)
2783 abort ();
2784
2785 size = bfd_get_reloc_size (reloc_howto);
2786 offset = target_big_endian ? (4 - size) : 0;
2787
2788 if (size < 1 || size > 4)
bc805888 2789 abort ();
252b5132 2790
99a814a1
AM		 2791 fixP = fix_new_exp (frag_now,
2792 f - frag_now->fr_literal + offset,
2793 size,
2794 &fixups[i].exp,
2795 reloc_howto->pc_relative,
252b5132
RH		 2796 fixups[i].reloc);
2797
2798 /* Turn off complaints that the addend is too large for things like
2799 foo+100000@ha. */
2800 switch (fixups[i].reloc)
2801 {
2802 case BFD_RELOC_16_GOTOFF:
2803 case BFD_RELOC_PPC_TOC16:
2804 case BFD_RELOC_LO16:
2805 case BFD_RELOC_HI16:
2806 case BFD_RELOC_HI16_S:
0baf16f2 2807#ifdef OBJ_ELF
0baf16f2
AM		 2808 case BFD_RELOC_PPC64_HIGHER:
2809 case BFD_RELOC_PPC64_HIGHER_S:
2810 case BFD_RELOC_PPC64_HIGHEST:
2811 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2812#endif
252b5132
RH		 2813 fixP->fx_no_overflow = 1;
2814 break;
2815 default:
2816 break;
2817 }
2818 }
2819 else
99a814a1
AM		 2820 fix_new_exp (frag_now,
2821 f - frag_now->fr_literal,
2822 4,
252b5132
RH		 2823 &fixups[i].exp,
2824 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2825 ((bfd_reloc_code_real_type)
99a814a1 2826 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2827 }
2828}
2829
2830/* Handle a macro. Gather all the operands, transform them as
2831 described by the macro, and call md_assemble recursively. All the
2832 operands are separated by commas; we don't accept parentheses
2833 around operands here. */
2834
2835static void
98027b10 2836ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 2837{
2838 char *operands[10];
2839 unsigned int count;
2840 char *s;
2841 unsigned int len;
2842 const char *format;
db557034 2843 unsigned int arg;
252b5132
RH		 2844 char *send;
2845 char *complete;
2846
2847 /* Gather the users operands into the operands array. */
2848 count = 0;
2849 s = str;
2850 while (1)
2851 {
2852 if (count >= sizeof operands / sizeof operands[0])
2853 break;
2854 operands[count++] = s;
2855 s = strchr (s, ',');
2856 if (s == (char *) NULL)
2857 break;
2858 *s++ = '\0';
81d4177b 2859 }
252b5132
RH		 2860
2861 if (count != macro->operands)
2862 {
2863 as_bad (_("wrong number of operands"));
2864 return;
2865 }
2866
2867 /* Work out how large the string must be (the size is unbounded
2868 because it includes user input). */
2869 len = 0;
2870 format = macro->format;
2871 while (*format != '\0')
2872 {
2873 if (*format != '%')
2874 {
2875 ++len;
2876 ++format;
2877 }
2878 else
2879 {
2880 arg = strtol (format + 1, &send, 10);
db557034 2881 know (send != format && arg < count);
252b5132
RH		 2882 len += strlen (operands[arg]);
2883 format = send;
2884 }
2885 }
2886
2887 /* Put the string together. */
2888 complete = s = (char *) alloca (len + 1);
2889 format = macro->format;
2890 while (*format != '\0')
2891 {
2892 if (*format != '%')
2893 *s++ = *format++;
2894 else
2895 {
2896 arg = strtol (format + 1, &send, 10);
2897 strcpy (s, operands[arg]);
2898 s += strlen (s);
2899 format = send;
2900 }
2901 }
2902 *s = '\0';
2903
2904 /* Assemble the constructed instruction. */
2905 md_assemble (complete);
81d4177b 2906}
252b5132
RH		 2907\f
2908#ifdef OBJ_ELF
99a814a1 2909/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2910
2911int
98027b10 2912ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 2913{
2914 if (letter == 'e')
2915 return SHF_EXCLUDE;
2916
13ae64f3 2917 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2918 return -1;
252b5132
RH		 2919}
2920
2921int
98027b10 2922ppc_section_word (char *str, size_t len)
252b5132 2923{
9de8d8f1
RH		 2924 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2925 return SHF_EXCLUDE;
252b5132 2926
9de8d8f1 2927 return -1;
252b5132
RH		 2928}
2929
2930int
98027b10 2931ppc_section_type (char *str, size_t len)
252b5132 2932{
9de8d8f1
RH		 2933 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2934 return SHT_ORDERED;
252b5132 2935
9de8d8f1 2936 return -1;
252b5132
RH		 2937}
2938
2939int
98027b10 2940ppc_section_flags (int flags, int attr, int type)
252b5132
RH		 2941{
2942 if (type == SHT_ORDERED)
2943 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2944
2945 if (attr & SHF_EXCLUDE)
2946 flags |= SEC_EXCLUDE;
2947
2948 return flags;
2949}
2950#endif /* OBJ_ELF */
2951
2952\f
2953/* Pseudo-op handling. */
2954
2955/* The .byte pseudo-op. This is similar to the normal .byte
2956 pseudo-op, but it can also take a single ASCII string. */
2957
2958static void
98027b10 2959ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 2960{
2961 if (*input_line_pointer != '\"')
2962 {
2963 cons (1);
2964 return;
2965 }
2966
2967 /* Gather characters. A real double quote is doubled. Unusual
2968 characters are not permitted. */
2969 ++input_line_pointer;
2970 while (1)
2971 {
2972 char c;
2973
2974 c = *input_line_pointer++;
2975
2976 if (c == '\"')
2977 {
2978 if (*input_line_pointer != '\"')
2979 break;
2980 ++input_line_pointer;
2981 }
2982
2983 FRAG_APPEND_1_CHAR (c);
2984 }
2985
2986 demand_empty_rest_of_line ();
2987}
2988\f
2989#ifdef OBJ_XCOFF
2990
2991/* XCOFF specific pseudo-op handling. */
2992
2993/* This is set if we are creating a .stabx symbol, since we don't want
2994 to handle symbol suffixes for such symbols. */
b34976b6 2995static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2996
2997/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2998 symbols in the .bss segment as though they were local common
67c1ffbe 2999 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3000 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3001
3002static void
98027b10 3003ppc_comm (int lcomm)
252b5132
RH		 3004{
3005 asection *current_seg = now_seg;
3006 subsegT current_subseg = now_subseg;
3007 char *name;
3008 char endc;
3009 char *end_name;
3010 offsetT size;
3011 offsetT align;
3012 symbolS *lcomm_sym = NULL;
3013 symbolS *sym;
3014 char *pfrag;
3015
3016 name = input_line_pointer;
3017 endc = get_symbol_end ();
3018 end_name = input_line_pointer;
3019 *end_name = endc;
3020
3021 if (*input_line_pointer != ',')
3022 {
3023 as_bad (_("missing size"));
3024 ignore_rest_of_line ();
3025 return;
3026 }
3027 ++input_line_pointer;
3028
3029 size = get_absolute_expression ();
3030 if (size < 0)
3031 {
3032 as_bad (_("negative size"));
3033 ignore_rest_of_line ();
3034 return;
3035 }
3036
3037 if (! lcomm)
3038 {
3039 /* The third argument to .comm is the alignment. */
3040 if (*input_line_pointer != ',')
1ad63b2f 3041 align = 2;
252b5132
RH		 3042 else
3043 {
3044 ++input_line_pointer;
3045 align = get_absolute_expression ();
3046 if (align <= 0)
3047 {
3048 as_warn (_("ignoring bad alignment"));
1ad63b2f 3049 align = 2;
252b5132
RH		 3050 }
3051 }
3052 }
3053 else
3054 {
3055 char *lcomm_name;
3056 char lcomm_endc;
3057
1ad63b2f 3058 if (size <= 4)
252b5132
RH		 3059 align = 2;
3060 else
3061 align = 3;
3062
3063 /* The third argument to .lcomm appears to be the real local
3064 common symbol to create. References to the symbol named in
3065 the first argument are turned into references to the third
3066 argument. */
3067 if (*input_line_pointer != ',')
3068 {
3069 as_bad (_("missing real symbol name"));
3070 ignore_rest_of_line ();
3071 return;
3072 }
3073 ++input_line_pointer;
3074
3075 lcomm_name = input_line_pointer;
3076 lcomm_endc = get_symbol_end ();
81d4177b 3077
252b5132
RH		 3078 lcomm_sym = symbol_find_or_make (lcomm_name);
3079
3080 *input_line_pointer = lcomm_endc;
3081 }
3082
3083 *end_name = '\0';
3084 sym = symbol_find_or_make (name);
3085 *end_name = endc;
3086
3087 if (S_IS_DEFINED (sym)
3088 || S_GET_VALUE (sym) != 0)
3089 {
3090 as_bad (_("attempt to redefine symbol"));
3091 ignore_rest_of_line ();
3092 return;
3093 }
81d4177b 3094
252b5132 3095 record_alignment (bss_section, align);
81d4177b 3096
252b5132
RH		 3097 if (! lcomm
3098 || ! S_IS_DEFINED (lcomm_sym))
3099 {
3100 symbolS *def_sym;
3101 offsetT def_size;
3102
3103 if (! lcomm)
3104 {
3105 def_sym = sym;
3106 def_size = size;
3107 S_SET_EXTERNAL (sym);
3108 }
3109 else
3110 {
809ffe0d 3111 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3112 def_sym = lcomm_sym;
3113 def_size = 0;
3114 }
3115
3116 subseg_set (bss_section, 1);
3117 frag_align (align, 0, 0);
81d4177b 3118
809ffe0d 3119 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3120 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3121 def_size, (char *) NULL);
3122 *pfrag = 0;
3123 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3124 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3125 }
3126 else if (lcomm)
3127 {
3128 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3129 symbol_get_frag (lcomm_sym)->fr_offset =
3130 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3131 &~ ((1 << align) - 1));
809ffe0d
ILT		 3132 if (align > symbol_get_tc (lcomm_sym)->align)
3133 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3134 }
3135
3136 if (lcomm)
3137 {
3138 /* Make sym an offset from lcomm_sym. */
3139 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3140 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3141 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3142 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3143 }
3144
3145 subseg_set (current_seg, current_subseg);
3146
3147 demand_empty_rest_of_line ();
3148}
3149
3150/* The .csect pseudo-op. This switches us into a different
3151 subsegment. The first argument is a symbol whose value is the
3152 start of the .csect. In COFF, csect symbols get special aux
3153 entries defined by the x_csect field of union internal_auxent. The
3154 optional second argument is the alignment (the default is 2). */
3155
3156static void
98027b10 3157ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3158{
3159 char *name;
3160 char endc;
3161 symbolS *sym;
931e13a6 3162 offsetT align;
252b5132
RH		 3163
3164 name = input_line_pointer;
3165 endc = get_symbol_end ();
81d4177b 3166
252b5132
RH		 3167 sym = symbol_find_or_make (name);
3168
3169 *input_line_pointer = endc;
3170
3171 if (S_GET_NAME (sym)[0] == '\0')
3172 {
3173 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3174 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3175 }
3176
931e13a6 3177 align = 2;
252b5132
RH		 3178 if (*input_line_pointer == ',')
3179 {
3180 ++input_line_pointer;
931e13a6 3181 align = get_absolute_expression ();
252b5132
RH		 3182 }
3183
931e13a6
AM		 3184 ppc_change_csect (sym, align);
3185
252b5132
RH		 3186 demand_empty_rest_of_line ();
3187}
3188
3189/* Change to a different csect. */
3190
3191static void
98027b10 3192ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3193{
3194 if (S_IS_DEFINED (sym))
809ffe0d 3195 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3196 else
3197 {
3198 symbolS **list_ptr;
3199 int after_toc;
3200 int hold_chunksize;
3201 symbolS *list;
931e13a6
AM		 3202 int is_code;
3203 segT sec;
252b5132
RH		 3204
3205 /* This is a new csect. We need to look at the symbol class to
3206 figure out whether it should go in the text section or the
3207 data section. */
3208 after_toc = 0;
931e13a6 3209 is_code = 0;
809ffe0d 3210 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3211 {
3212 case XMC_PR:
3213 case XMC_RO:
3214 case XMC_DB:
3215 case XMC_GL:
3216 case XMC_XO:
3217 case XMC_SV:
3218 case XMC_TI:
3219 case XMC_TB:
3220 S_SET_SEGMENT (sym, text_section);
809ffe0d 3221 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3222 ++ppc_text_subsegment;
3223 list_ptr = &ppc_text_csects;
931e13a6 3224 is_code = 1;
252b5132
RH		 3225 break;
3226 case XMC_RW:
3227 case XMC_TC0:
3228 case XMC_TC:
3229 case XMC_DS:
3230 case XMC_UA:
3231 case XMC_BS:
3232 case XMC_UC:
3233 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3234 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3235 == ppc_data_subsegment))
252b5132
RH		 3236 after_toc = 1;
3237 S_SET_SEGMENT (sym, data_section);
809ffe0d 3238 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3239 ++ppc_data_subsegment;
3240 list_ptr = &ppc_data_csects;
3241 break;
3242 default:
3243 abort ();
3244 }
3245
3246 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3247 changing subsegments, so that we don't use a lot of memory
3248 space for what may be a small section. */
252b5132
RH		 3249 hold_chunksize = chunksize;
3250 chunksize = 64;
3251
931e13a6
AM		 3252 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3253 symbol_get_tc (sym)->subseg);
252b5132
RH		 3254
3255 chunksize = hold_chunksize;
3256
3257 if (after_toc)
3258 ppc_after_toc_frag = frag_now;
3259
931e13a6
AM		 3260 record_alignment (sec, align);
3261 if (is_code)
3262 frag_align_code (align, 0);
3263 else
3264 frag_align (align, 0, 0);
3265
809ffe0d 3266 symbol_set_frag (sym, frag_now);
252b5132
RH		 3267 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3268
931e13a6 3269 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3270 symbol_get_tc (sym)->output = 1;
3271 symbol_get_tc (sym)->within = sym;
81d4177b 3272
252b5132 3273 for (list = *list_ptr;
809ffe0d
ILT		 3274 symbol_get_tc (list)->next != (symbolS *) NULL;
3275 list = symbol_get_tc (list)->next)
252b5132 3276 ;
809ffe0d 3277 symbol_get_tc (list)->next = sym;
81d4177b 3278
252b5132 3279 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3280 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3281 &symbol_lastP);
252b5132
RH		 3282 }
3283
3284 ppc_current_csect = sym;
3285}
3286
3287/* This function handles the .text and .data pseudo-ops. These
3288 pseudo-ops aren't really used by XCOFF; we implement them for the
3289 convenience of people who aren't used to XCOFF. */
3290
3291static void
98027b10 3292ppc_section (int type)
252b5132
RH		 3293{
3294 const char *name;
3295 symbolS *sym;
3296
3297 if (type == 't')
3298 name = ".text[PR]";
3299 else if (type == 'd')
3300 name = ".data[RW]";
3301 else
3302 abort ();
3303
3304 sym = symbol_find_or_make (name);
3305
931e13a6 3306 ppc_change_csect (sym, 2);
252b5132
RH		 3307
3308 demand_empty_rest_of_line ();
3309}
3310
3311/* This function handles the .section pseudo-op. This is mostly to
3312 give an error, since XCOFF only supports .text, .data and .bss, but
3313 we do permit the user to name the text or data section. */
3314
3315static void
98027b10 3316ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3317{
3318 char *user_name;
3319 const char *real_name;
3320 char c;
3321 symbolS *sym;
3322
3323 user_name = input_line_pointer;
3324 c = get_symbol_end ();
3325
3326 if (strcmp (user_name, ".text") == 0)
3327 real_name = ".text[PR]";
3328 else if (strcmp (user_name, ".data") == 0)
3329 real_name = ".data[RW]";
3330 else
3331 {
3332 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3333 *input_line_pointer = c;
3334 ignore_rest_of_line ();
3335 return;
3336 }
3337
3338 *input_line_pointer = c;
3339
3340 sym = symbol_find_or_make (real_name);
3341
931e13a6 3342 ppc_change_csect (sym, 2);
252b5132
RH		 3343
3344 demand_empty_rest_of_line ();
3345}
3346
3347/* The .extern pseudo-op. We create an undefined symbol. */
3348
3349static void
98027b10 3350ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3351{
3352 char *name;
3353 char endc;
3354
3355 name = input_line_pointer;
3356 endc = get_symbol_end ();
3357
3358 (void) symbol_find_or_make (name);
3359
3360 *input_line_pointer = endc;
3361
3362 demand_empty_rest_of_line ();
3363}
3364
3365/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3366
3367static void
98027b10 3368ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3369{
3370 char *name;
3371 char endc;
3372 symbolS *sym;
3373
3374 name = input_line_pointer;
3375 endc = get_symbol_end ();
3376
3377 sym = symbol_find_or_make (name);
3378
3379 *input_line_pointer = endc;
3380
809ffe0d 3381 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3382
3383 demand_empty_rest_of_line ();
3384}
3385
3386/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3387 although I don't know why it bothers. */
3388
3389static void
98027b10 3390ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3391{
3392 char *name;
3393 char endc;
3394 symbolS *sym;
3395 int len;
3396
3397 name = input_line_pointer;
3398 endc = get_symbol_end ();
3399
3400 sym = symbol_find_or_make (name);
3401
3402 *input_line_pointer = endc;
3403
3404 if (*input_line_pointer != ',')
3405 {
3406 as_bad (_("missing rename string"));
3407 ignore_rest_of_line ();
3408 return;
3409 }
3410 ++input_line_pointer;
3411
809ffe0d 3412 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3413
3414 demand_empty_rest_of_line ();
3415}
3416
3417/* The .stabx pseudo-op. This is similar to a normal .stabs
3418 pseudo-op, but slightly different. A sample is
3419 .stabx "main:F-1",.main,142,0
3420 The first argument is the symbol name to create. The second is the
3421 value, and the third is the storage class. The fourth seems to be
3422 always zero, and I am assuming it is the type. */
3423
3424static void
98027b10 3425ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3426{
3427 char *name;
3428 int len;
3429 symbolS *sym;
3430 expressionS exp;
3431
3432 name = demand_copy_C_string (&len);
3433
3434 if (*input_line_pointer != ',')
3435 {
3436 as_bad (_("missing value"));
3437 return;
3438 }
3439 ++input_line_pointer;
3440
b34976b6 3441 ppc_stab_symbol = TRUE;
252b5132 3442 sym = symbol_make (name);
b34976b6 3443 ppc_stab_symbol = FALSE;
252b5132 3444
809ffe0d 3445 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3446
3447 (void) expression (&exp);
3448
3449 switch (exp.X_op)
3450 {
3451 case O_illegal:
3452 case O_absent:
3453 case O_big:
3454 as_bad (_("illegal .stabx expression; zero assumed"));
3455 exp.X_add_number = 0;
3456 /* Fall through. */
3457 case O_constant:
3458 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3459 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3460 break;
3461
3462 case O_symbol:
3463 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3464 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3465 else
3466 {
3467 S_SET_VALUE (sym,
3468 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3469 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3470 }
3471 break;
3472
3473 default:
3474 /* The value is some complex expression. This will probably
99a814a1
AM		 3475 fail at some later point, but this is probably the right
3476 thing to do here. */
809ffe0d 3477 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3478 break;
3479 }
3480
3481 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3482 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3483
3484 if (*input_line_pointer != ',')
3485 {
3486 as_bad (_("missing class"));
3487 return;
3488 }
3489 ++input_line_pointer;
3490
3491 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3492
3493 if (*input_line_pointer != ',')
3494 {
3495 as_bad (_("missing type"));
3496 return;
3497 }
3498 ++input_line_pointer;
3499
3500 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3501
809ffe0d 3502 symbol_get_tc (sym)->output = 1;
252b5132 3503
6877bb43 3504 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3505
809ffe0d 3506 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3507
41ea10b1 3508 /* In this case :
99a814a1 3509
41ea10b1
TR		 3510 .bs name
3511 .stabx "z",arrays_,133,0
3512 .es
99a814a1 3513
41ea10b1 3514 .comm arrays_,13768,3
99a814a1 3515
41ea10b1
TR		 3516 resolve_symbol_value will copy the exp's "within" into sym's when the
3517 offset is 0. Since this seems to be corner case problem,
3518 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3519 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3520
3521 if (exp.X_op == O_symbol)
41ea10b1
TR		 3522 {
3523 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3524 }
6877bb43 3525 }
99a814a1 3526
252b5132
RH		 3527 if (exp.X_op != O_symbol
3528 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3529 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3530 ppc_frob_label (sym);
3531 else
3532 {
3533 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3534 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3535 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3536 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3537 }
3538
3539 demand_empty_rest_of_line ();
3540}
3541
3542/* The .function pseudo-op. This takes several arguments. The first
3543 argument seems to be the external name of the symbol. The second
67c1ffbe 3544 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3545 uses the same name for both. I have no idea what the third and
3546 fourth arguments are meant to be. The optional fifth argument is
3547 an expression for the size of the function. In COFF this symbol
3548 gets an aux entry like that used for a csect. */
3549
3550static void
98027b10 3551ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3552{
3553 char *name;
3554 char endc;
3555 char *s;
3556 symbolS *ext_sym;
3557 symbolS *lab_sym;
3558
3559 name = input_line_pointer;
3560 endc = get_symbol_end ();
3561
3562 /* Ignore any [PR] suffix. */
3563 name = ppc_canonicalize_symbol_name (name);
3564 s = strchr (name, '[');
3565 if (s != (char *) NULL
3566 && strcmp (s + 1, "PR]") == 0)
3567 *s = '\0';
3568
3569 ext_sym = symbol_find_or_make (name);
3570
3571 *input_line_pointer = endc;
3572
3573 if (*input_line_pointer != ',')
3574 {
3575 as_bad (_("missing symbol name"));
3576 ignore_rest_of_line ();
3577 return;
3578 }
3579 ++input_line_pointer;
3580
3581 name = input_line_pointer;
3582 endc = get_symbol_end ();
3583
3584 lab_sym = symbol_find_or_make (name);
3585
3586 *input_line_pointer = endc;
3587
3588 if (ext_sym != lab_sym)
3589 {
809ffe0d
ILT		 3590 expressionS exp;
3591
3592 exp.X_op = O_symbol;
3593 exp.X_add_symbol = lab_sym;
3594 exp.X_op_symbol = NULL;
3595 exp.X_add_number = 0;
3596 exp.X_unsigned = 0;
3597 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3598 }
3599
809ffe0d
ILT		 3600 if (symbol_get_tc (ext_sym)->class == -1)
3601 symbol_get_tc (ext_sym)->class = XMC_PR;
3602 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3603
3604 if (*input_line_pointer == ',')
3605 {
3606 expressionS ignore;
3607
3608 /* Ignore the third argument. */
3609 ++input_line_pointer;
3610 expression (&ignore);
3611 if (*input_line_pointer == ',')
3612 {
3613 /* Ignore the fourth argument. */
3614 ++input_line_pointer;
3615 expression (&ignore);
3616 if (*input_line_pointer == ',')
3617 {
3618 /* The fifth argument is the function size. */
3619 ++input_line_pointer;
809ffe0d
ILT		 3620 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3621 absolute_section,
3622 (valueT) 0,
3623 &zero_address_frag);
3624 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3625 }
3626 }
3627 }
3628
3629 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3630 SF_SET_FUNCTION (ext_sym);
3631 SF_SET_PROCESS (ext_sym);
3632 coff_add_linesym (ext_sym);
3633
3634 demand_empty_rest_of_line ();
3635}
3636
3637/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3638 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3639 with the correct line number */
5d6255fe 3640
8642cce8 3641static symbolS *saved_bi_sym = 0;
252b5132
RH		 3642
3643static void
98027b10 3644ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3645{
3646 symbolS *sym;
3647
3648 sym = symbol_make (".bf");
3649 S_SET_SEGMENT (sym, text_section);
809ffe0d 3650 symbol_set_frag (sym, frag_now);
252b5132
RH		 3651 S_SET_VALUE (sym, frag_now_fix ());
3652 S_SET_STORAGE_CLASS (sym, C_FCN);
3653
3654 coff_line_base = get_absolute_expression ();
3655
3656 S_SET_NUMBER_AUXILIARY (sym, 1);
3657 SA_SET_SYM_LNNO (sym, coff_line_base);
3658
8642cce8 3659 /* Line number for bi. */
5d6255fe 3660 if (saved_bi_sym)
8642cce8
TR		 3661 {
3662 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3663 saved_bi_sym = 0;
3664 }
5d6255fe 3665
8642cce8 3666
809ffe0d 3667 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3668
3669 ppc_frob_label (sym);
3670
3671 demand_empty_rest_of_line ();
3672}
3673
3674/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3675 ".ef", except that the line number is absolute, not relative to the
3676 most recent ".bf" symbol. */
3677
3678static void
98027b10 3679ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3680{
3681 symbolS *sym;
3682
3683 sym = symbol_make (".ef");
3684 S_SET_SEGMENT (sym, text_section);
809ffe0d 3685 symbol_set_frag (sym, frag_now);
252b5132
RH		 3686 S_SET_VALUE (sym, frag_now_fix ());
3687 S_SET_STORAGE_CLASS (sym, C_FCN);
3688 S_SET_NUMBER_AUXILIARY (sym, 1);
3689 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3690 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3691
3692 ppc_frob_label (sym);
3693
3694 demand_empty_rest_of_line ();
3695}
3696
3697/* The .bi and .ei pseudo-ops. These take a string argument and
3698 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3699 the symbol list. The value of .bi will be know when the next .bf
3700 is encountered. */
252b5132
RH		 3701
3702static void
98027b10 3703ppc_biei (int ei)
252b5132
RH		 3704{
3705 static symbolS *last_biei;
3706
3707 char *name;
3708 int len;
3709 symbolS *sym;
3710 symbolS *look;
3711
3712 name = demand_copy_C_string (&len);
3713
3714 /* The value of these symbols is actually file offset. Here we set
3715 the value to the index into the line number entries. In
3716 ppc_frob_symbols we set the fix_line field, which will cause BFD
3717 to do the right thing. */
3718
3719 sym = symbol_make (name);
3720 /* obj-coff.c currently only handles line numbers correctly in the
3721 .text section. */
3722 S_SET_SEGMENT (sym, text_section);
3723 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3724 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3725
3726 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3727 symbol_get_tc (sym)->output = 1;
81d4177b 3728
8642cce8 3729 /* Save bi. */
5d6255fe 3730 if (ei)
8642cce8
TR		 3731 saved_bi_sym = 0;
3732 else
3733 saved_bi_sym = sym;
3734
252b5132
RH		 3735 for (look = last_biei ? last_biei : symbol_rootP;
3736 (look != (symbolS *) NULL
3737 && (S_GET_STORAGE_CLASS (look) == C_FILE
3738 || S_GET_STORAGE_CLASS (look) == C_BINCL
3739 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3740 look = symbol_next (look))
3741 ;
3742 if (look != (symbolS *) NULL)
3743 {
3744 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3745 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3746 last_biei = sym;
3747 }
3748
3749 demand_empty_rest_of_line ();
3750}
3751
3752/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3753 There is one argument, which is a csect symbol. The value of the
3754 .bs symbol is the index of this csect symbol. */
3755
3756static void
98027b10 3757ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3758{
3759 char *name;
3760 char endc;
3761 symbolS *csect;
3762 symbolS *sym;
3763
3764 if (ppc_current_block != NULL)
3765 as_bad (_("nested .bs blocks"));
3766
3767 name = input_line_pointer;
3768 endc = get_symbol_end ();
3769
3770 csect = symbol_find_or_make (name);
3771
3772 *input_line_pointer = endc;
3773
3774 sym = symbol_make (".bs");
3775 S_SET_SEGMENT (sym, now_seg);
3776 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3777 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3778 symbol_get_tc (sym)->output = 1;
252b5132 3779
809ffe0d 3780 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3781
3782 ppc_frob_label (sym);
3783
3784 ppc_current_block = sym;
3785
3786 demand_empty_rest_of_line ();
3787}
3788
3789/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3790
3791static void
98027b10 3792ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3793{
3794 symbolS *sym;
3795
3796 if (ppc_current_block == NULL)
3797 as_bad (_(".es without preceding .bs"));
3798
3799 sym = symbol_make (".es");
3800 S_SET_SEGMENT (sym, now_seg);
3801 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3802 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3803 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3804
3805 ppc_frob_label (sym);
3806
3807 ppc_current_block = NULL;
3808
3809 demand_empty_rest_of_line ();
3810}
3811
3812/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3813 line number. */
3814
3815static void
98027b10 3816ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3817{
3818 symbolS *sym;
3819
3820 sym = symbol_make (".bb");
3821 S_SET_SEGMENT (sym, text_section);
809ffe0d 3822 symbol_set_frag (sym, frag_now);
252b5132
RH		 3823 S_SET_VALUE (sym, frag_now_fix ());
3824 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3825
3826 S_SET_NUMBER_AUXILIARY (sym, 1);
3827 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3828
809ffe0d 3829 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3830
3831 SF_SET_PROCESS (sym);
3832
3833 ppc_frob_label (sym);
3834
3835 demand_empty_rest_of_line ();
3836}
3837
3838/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3839 line number. */
3840
3841static void
98027b10 3842ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3843{
3844 symbolS *sym;
3845
3846 sym = symbol_make (".eb");
3847 S_SET_SEGMENT (sym, text_section);
809ffe0d 3848 symbol_set_frag (sym, frag_now);
252b5132
RH		 3849 S_SET_VALUE (sym, frag_now_fix ());
3850 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3851 S_SET_NUMBER_AUXILIARY (sym, 1);
3852 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3853 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3854
3855 SF_SET_PROCESS (sym);
3856
3857 ppc_frob_label (sym);
3858
3859 demand_empty_rest_of_line ();
3860}
3861
3862/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3863 specified name. */
3864
3865static void
98027b10 3866ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3867{
3868 char *name;
3869 int len;
3870 symbolS *sym;
3871
3872 name = demand_copy_C_string (&len);
3873 sym = symbol_make (name);
3874 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3875 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3876 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3877 S_SET_VALUE (sym, 0);
809ffe0d 3878 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3879
3880 ppc_frob_label (sym);
3881
3882 demand_empty_rest_of_line ();
3883}
3884
3885/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3886
3887static void
98027b10 3888ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3889{
3890 symbolS *sym;
3891
3892 sym = symbol_make (".ec");
3893 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3894 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3895 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3896 S_SET_VALUE (sym, 0);
809ffe0d 3897 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3898
3899 ppc_frob_label (sym);
3900
3901 demand_empty_rest_of_line ();
3902}
3903
3904/* The .toc pseudo-op. Switch to the .toc subsegment. */
3905
3906static void
98027b10 3907ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3908{
3909 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3910 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3911 else
3912 {
3913 subsegT subseg;
3914 symbolS *sym;
3915 symbolS *list;
81d4177b 3916
252b5132
RH		 3917 subseg = ppc_data_subsegment;
3918 ++ppc_data_subsegment;
3919
3920 subseg_new (segment_name (data_section), subseg);
3921 ppc_toc_frag = frag_now;
3922
3923 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3924 symbol_set_frag (sym, frag_now);
252b5132
RH		 3925 S_SET_SEGMENT (sym, data_section);
3926 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3927 symbol_get_tc (sym)->subseg = subseg;
3928 symbol_get_tc (sym)->output = 1;
3929 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3930
3931 ppc_toc_csect = sym;
81d4177b 3932
252b5132 3933 for (list = ppc_data_csects;
809ffe0d
ILT		 3934 symbol_get_tc (list)->next != (symbolS *) NULL;
3935 list = symbol_get_tc (list)->next)
252b5132 3936 ;
809ffe0d 3937 symbol_get_tc (list)->next = sym;
252b5132
RH		 3938
3939 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3940 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3941 &symbol_lastP);
252b5132
RH		 3942 }
3943
3944 ppc_current_csect = ppc_toc_csect;
3945
3946 demand_empty_rest_of_line ();
3947}
3948
3949/* The AIX assembler automatically aligns the operands of a .long or
3950 .short pseudo-op, and we want to be compatible. */
3951
3952static void
98027b10 3953ppc_xcoff_cons (int log_size)
252b5132
RH		 3954{
3955 frag_align (log_size, 0, 0);
3956 record_alignment (now_seg, log_size);
3957 cons (1 << log_size);
3958}
3959
3960static void
98027b10 3961ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 3962{
3963 expressionS exp;
3964 int byte_count;
3965
3966 (void) expression (&exp);
3967
3968 if (exp.X_op != O_constant)
3969 {
3970 as_bad (_("non-constant byte count"));
3971 return;
3972 }
3973
3974 byte_count = exp.X_add_number;
3975
3976 if (*input_line_pointer != ',')
3977 {
3978 as_bad (_("missing value"));
3979 return;
3980 }
3981
3982 ++input_line_pointer;
3983 cons (byte_count);
3984}
3985
3986#endif /* OBJ_XCOFF */
0baf16f2 3987#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3988\f
3989/* The .tc pseudo-op. This is used when generating either XCOFF or
3990 ELF. This takes two or more arguments.
3991
3992 When generating XCOFF output, the first argument is the name to
3993 give to this location in the toc; this will be a symbol with class
0baf16f2 3994 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3995 this location in the TOC; often there is just one more argument, a
1049f94e 3996 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3997 depends on target word size. A 32-bit target uses 4-byte values, a
3998 64-bit target uses 8-byte values.
252b5132
RH		 3999
4000 When not generating XCOFF output, the arguments are the same, but
4001 the first argument is simply ignored. */
4002
4003static void
98027b10 4004ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4005{
4006#ifdef OBJ_XCOFF
4007
4008 /* Define the TOC symbol name. */
4009 {
4010 char *name;
4011 char endc;
4012 symbolS *sym;
4013
4014 if (ppc_toc_csect == (symbolS *) NULL
4015 || ppc_toc_csect != ppc_current_csect)
4016 {
4017 as_bad (_(".tc not in .toc section"));
4018 ignore_rest_of_line ();
4019 return;
4020 }
4021
4022 name = input_line_pointer;
4023 endc = get_symbol_end ();
4024
4025 sym = symbol_find_or_make (name);
4026
4027 *input_line_pointer = endc;
4028
4029 if (S_IS_DEFINED (sym))
4030 {
4031 symbolS *label;
4032
809ffe0d
ILT		 4033 label = symbol_get_tc (ppc_current_csect)->within;
4034 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 4035 {
4036 as_bad (_(".tc with no label"));
4037 ignore_rest_of_line ();
4038 return;
4039 }
4040
4041 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4042 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4043 S_SET_VALUE (label, S_GET_VALUE (sym));
4044
4045 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4046 ++input_line_pointer;
4047
4048 return;
4049 }
4050
4051 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4052 symbol_set_frag (sym, frag_now);
252b5132 4053 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4054 symbol_get_tc (sym)->class = XMC_TC;
4055 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4056
4057 ppc_frob_label (sym);
4058 }
4059
0baf16f2
AM		 4060#endif /* OBJ_XCOFF */
4061#ifdef OBJ_ELF
9c7977b3 4062 int align;
252b5132
RH		 4063
4064 /* Skip the TOC symbol name. */
4065 while (is_part_of_name (*input_line_pointer)
d13d4015 4066 || *input_line_pointer == ' '
252b5132
RH		 4067 || *input_line_pointer == '['
4068 || *input_line_pointer == ']'
4069 || *input_line_pointer == '{'
4070 || *input_line_pointer == '}')
4071 ++input_line_pointer;
4072
0baf16f2 4073 /* Align to a four/eight byte boundary. */
2b3c4602 4074 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4075 frag_align (align, 0, 0);
4076 record_alignment (now_seg, align);
0baf16f2 4077#endif /* OBJ_ELF */
252b5132
RH		 4078
4079 if (*input_line_pointer != ',')
4080 demand_empty_rest_of_line ();
4081 else
4082 {
4083 ++input_line_pointer;
2b3c4602 4084 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4085 }
4086}
0baf16f2
AM		 4087
4088/* Pseudo-op .machine. */
0baf16f2
AM		 4089
4090static void
98027b10 4091ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4092{
69c040df
AM		 4093 char *cpu_string;
4094#define MAX_HISTORY 100
4095 static unsigned long *cpu_history;
4096 static int curr_hist;
4097
4098 SKIP_WHITESPACE ();
4099
4100 if (*input_line_pointer == '"')
4101 {
4102 int len;
4103 cpu_string = demand_copy_C_string (&len);
4104 }
4105 else
4106 {
4107 char c;
4108 cpu_string = input_line_pointer;
4109 c = get_symbol_end ();
4110 cpu_string = xstrdup (cpu_string);
4111 *input_line_pointer = c;
4112 }
4113
4114 if (cpu_string != NULL)
4115 {
4116 unsigned long old_cpu = ppc_cpu;
4117 char *p;
4118
4119 for (p = cpu_string; *p != 0; p++)
4120 *p = TOLOWER (*p);
4121
4122 if (strcmp (cpu_string, "push") == 0)
4123 {
4124 if (cpu_history == NULL)
4125 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4126
4127 if (curr_hist >= MAX_HISTORY)
4128 as_bad (_(".machine stack overflow"));
4129 else
4130 cpu_history[curr_hist++] = ppc_cpu;
4131 }
4132 else if (strcmp (cpu_string, "pop") == 0)
4133 {
4134 if (curr_hist <= 0)
4135 as_bad (_(".machine stack underflow"));
4136 else
4137 ppc_cpu = cpu_history[--curr_hist];
4138 }
4139 else if (parse_cpu (cpu_string))
4140 ;
4141 else
4142 as_bad (_("invalid machine `%s'"), cpu_string);
4143
4144 if (ppc_cpu != old_cpu)
4145 ppc_setup_opcodes ();
4146 }
4147
4148 demand_empty_rest_of_line ();
0baf16f2
AM		 4149}
4150
4151/* See whether a symbol is in the TOC section. */
4152
4153static int
98027b10 4154ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4155{
4156#ifdef OBJ_XCOFF
4157 return symbol_get_tc (sym)->class == XMC_TC;
4158#endif
4159#ifdef OBJ_ELF
4160 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4161 if (ppc_obj64)
0baf16f2
AM		 4162 return strcmp (sname, ".toc") == 0;
4163 else
4164 return strcmp (sname, ".got") == 0;
4165#endif
4166}
4167#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4168\f
4169#ifdef TE_PE
4170
99a814a1 4171/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4172
4173/* Set the current section. */
4174static void
98027b10 4175ppc_set_current_section (segT new)
252b5132
RH		 4176{
4177 ppc_previous_section = ppc_current_section;
4178 ppc_current_section = new;
4179}
4180
4181/* pseudo-op: .previous
4182 behaviour: toggles the current section with the previous section.
4183 errors: None
99a814a1
AM		 4184 warnings: "No previous section" */
4185
252b5132 4186static void
98027b10 4187ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4188{
4189 symbolS *tmp;
4190
81d4177b 4191 if (ppc_previous_section == NULL)
252b5132 4192 {
99a814a1 4193 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4194 return;
4195 }
4196
99a814a1 4197 subseg_set (ppc_previous_section, 0);
252b5132 4198
99a814a1 4199 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4200}
4201
4202/* pseudo-op: .pdata
4203 behaviour: predefined read only data section
b34976b6 4204 double word aligned
252b5132
RH		 4205 errors: None
4206 warnings: None
4207 initial: .section .pdata "adr3"
b34976b6 4208 a - don't know -- maybe a misprint
252b5132
RH		 4209 d - initialized data
4210 r - readable
4211 3 - double word aligned (that would be 4 byte boundary)
4212
4213 commentary:
4214 Tag index tables (also known as the function table) for exception
99a814a1 4215 handling, debugging, etc. */
252b5132 4216
252b5132 4217static void
98027b10 4218ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4219{
81d4177b 4220 if (pdata_section == 0)
252b5132
RH		 4221 {
4222 pdata_section = subseg_new (".pdata", 0);
81d4177b 4223
252b5132
RH		 4224 bfd_set_section_flags (stdoutput, pdata_section,
4225 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4226 | SEC_READONLY | SEC_DATA ));
81d4177b 4227
252b5132
RH		 4228 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4229 }
4230 else
4231 {
99a814a1 4232 pdata_section = subseg_new (".pdata", 0);
252b5132 4233 }
99a814a1 4234 ppc_set_current_section (pdata_section);
252b5132
RH		 4235}
4236
4237/* pseudo-op: .ydata
4238 behaviour: predefined read only data section
b34976b6 4239 double word aligned
252b5132
RH		 4240 errors: None
4241 warnings: None
4242 initial: .section .ydata "drw3"
b34976b6 4243 a - don't know -- maybe a misprint
252b5132
RH		 4244 d - initialized data
4245 r - readable
4246 3 - double word aligned (that would be 4 byte boundary)
4247 commentary:
4248 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4249 debugging, etc. */
4250
252b5132 4251static void
98027b10 4252ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4253{
81d4177b 4254 if (ydata_section == 0)
252b5132
RH		 4255 {
4256 ydata_section = subseg_new (".ydata", 0);
4257 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4258 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4259 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4260
4261 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4262 }
4263 else
4264 {
4265 ydata_section = subseg_new (".ydata", 0);
4266 }
99a814a1 4267 ppc_set_current_section (ydata_section);
252b5132
RH		 4268}
4269
4270/* pseudo-op: .reldata
4271 behaviour: predefined read write data section
b34976b6 4272 double word aligned (4-byte)
252b5132
RH		 4273 FIXME: relocation is applied to it
4274 FIXME: what's the difference between this and .data?
4275 errors: None
4276 warnings: None
4277 initial: .section .reldata "drw3"
4278 d - initialized data
4279 r - readable
4280 w - writeable
4281 3 - double word aligned (that would be 8 byte boundary)
4282
4283 commentary:
4284 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4285 function descriptors, etc. */
4286
252b5132 4287static void
98027b10 4288ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4289{
4290 if (reldata_section == 0)
4291 {
4292 reldata_section = subseg_new (".reldata", 0);
4293
4294 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4295 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4296 | SEC_DATA));
252b5132
RH		 4297
4298 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4299 }
4300 else
4301 {
4302 reldata_section = subseg_new (".reldata", 0);
4303 }
99a814a1 4304 ppc_set_current_section (reldata_section);
252b5132
RH		 4305}
4306
4307/* pseudo-op: .rdata
4308 behaviour: predefined read only data section
b34976b6 4309 double word aligned
252b5132
RH		 4310 errors: None
4311 warnings: None
4312 initial: .section .rdata "dr3"
4313 d - initialized data
4314 r - readable
99a814a1
AM		 4315 3 - double word aligned (that would be 4 byte boundary) */
4316
252b5132 4317static void
98027b10 4318ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4319{
4320 if (rdata_section == 0)
4321 {
4322 rdata_section = subseg_new (".rdata", 0);
4323 bfd_set_section_flags (stdoutput, rdata_section,
4324 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4325 | SEC_READONLY | SEC_DATA ));
4326
4327 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4328 }
4329 else
4330 {
4331 rdata_section = subseg_new (".rdata", 0);
4332 }
99a814a1 4333 ppc_set_current_section (rdata_section);
252b5132
RH		 4334}
4335
4336/* pseudo-op: .ualong
81d4177b 4337 behaviour: much like .int, with the exception that no alignment is
b34976b6 4338 performed.
252b5132
RH		 4339 FIXME: test the alignment statement
4340 errors: None
99a814a1
AM		 4341 warnings: None */
4342
252b5132 4343static void
98027b10 4344ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4345{
99a814a1
AM		 4346 /* Try for long. */
4347 cons (4);
252b5132
RH		 4348}
4349
4350/* pseudo-op: .znop <symbol name>
4351 behaviour: Issue a nop instruction
b34976b6 4352 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4353 the supplied symbol name.
4354 errors: None
99a814a1
AM		 4355 warnings: Missing symbol name */
4356
252b5132 4357static void
98027b10 4358ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4359{
4360 unsigned long insn;
4361 const struct powerpc_opcode *opcode;
4362 expressionS ex;
4363 char *f;
252b5132 4364 symbolS *sym;
252b5132
RH		 4365 char *symbol_name;
4366 char c;
4367 char *name;
4368 unsigned int exp;
4369 flagword flags;
4370 asection *sec;
4371
99a814a1 4372 /* Strip out the symbol name. */
252b5132
RH		 4373 symbol_name = input_line_pointer;
4374 c = get_symbol_end ();
4375
4376 name = xmalloc (input_line_pointer - symbol_name + 1);
4377 strcpy (name, symbol_name);
4378
4379 sym = symbol_find_or_make (name);
4380
4381 *input_line_pointer = c;
4382
4383 SKIP_WHITESPACE ();
4384
4385 /* Look up the opcode in the hash table. */
4386 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4387
99a814a1 4388 /* Stick in the nop. */
252b5132
RH		 4389 insn = opcode->opcode;
4390
4391 /* Write out the instruction. */
4392 f = frag_more (4);
4393 md_number_to_chars (f, insn, 4);
4394 fix_new (frag_now,
4395 f - frag_now->fr_literal,
4396 4,
4397 sym,
4398 0,
4399 0,
4400 BFD_RELOC_16_GOT_PCREL);
4401
4402}
4403
81d4177b
KH		 4404/* pseudo-op:
4405 behaviour:
4406 errors:
99a814a1
AM		 4407 warnings: */
4408
252b5132 4409static void
98027b10 4410ppc_pe_comm (int lcomm)
252b5132 4411{
98027b10
AM		 4412 char *name;
4413 char c;
4414 char *p;
252b5132 4415 offsetT temp;
98027b10 4416 symbolS *symbolP;
252b5132
RH		 4417 offsetT align;
4418
4419 name = input_line_pointer;
4420 c = get_symbol_end ();
4421
99a814a1 4422 /* just after name is now '\0'. */
252b5132
RH		 4423 p = input_line_pointer;
4424 *p = c;
4425 SKIP_WHITESPACE ();
4426 if (*input_line_pointer != ',')
4427 {
4428 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4429 ignore_rest_of_line ();
4430 return;
4431 }
4432
4433 input_line_pointer++; /* skip ',' */
4434 if ((temp = get_absolute_expression ()) < 0)
4435 {
4436 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4437 ignore_rest_of_line ();
4438 return;
4439 }
4440
4441 if (! lcomm)
4442 {
4443 /* The third argument to .comm is the alignment. */
4444 if (*input_line_pointer != ',')
4445 align = 3;
4446 else
4447 {
4448 ++input_line_pointer;
4449 align = get_absolute_expression ();
4450 if (align <= 0)
4451 {
4452 as_warn (_("ignoring bad alignment"));
4453 align = 3;
4454 }
4455 }
4456 }
4457
4458 *p = 0;
4459 symbolP = symbol_find_or_make (name);
4460
4461 *p = c;
4462 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4463 {
4464 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4465 S_GET_NAME (symbolP));
4466 ignore_rest_of_line ();
4467 return;
4468 }
4469
4470 if (S_GET_VALUE (symbolP))
4471 {
4472 if (S_GET_VALUE (symbolP) != (valueT) temp)
4473 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4474 S_GET_NAME (symbolP),
4475 (long) S_GET_VALUE (symbolP),
4476 (long) temp);
4477 }
4478 else
4479 {
4480 S_SET_VALUE (symbolP, (valueT) temp);
4481 S_SET_EXTERNAL (symbolP);
86ebace2 4482 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4483 }
4484
4485 demand_empty_rest_of_line ();
4486}
4487
4488/*
4489 * implement the .section pseudo op:
4490 * .section name {, "flags"}
4491 * ^ ^
4492 * | +--- optional flags: 'b' for bss
4493 * | 'i' for info
4494 * +-- section name 'l' for lib
4495 * 'n' for noload
4496 * 'o' for over
4497 * 'w' for data
4498 * 'd' (apparently m88k for data)
4499 * 'x' for text
4500 * But if the argument is not a quoted string, treat it as a
4501 * subsegment number.
4502 *
4503 * FIXME: this is a copy of the section processing from obj-coff.c, with
4504 * additions/changes for the moto-pas assembler support. There are three
4505 * categories:
4506 *
81d4177b 4507 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4508 * setting bits that bfd probably neither understands or uses. The
4509 * correct approach (?) will have to incorporate extra fields attached
4510 * to the section to hold the system specific stuff. (krk)
4511 *
4512 * Section Contents:
4513 * 'a' - unknown - referred to in documentation, but no definition supplied
4514 * 'c' - section has code
4515 * 'd' - section has initialized data
4516 * 'u' - section has uninitialized data
4517 * 'i' - section contains directives (info)
4518 * 'n' - section can be discarded
4519 * 'R' - remove section at link time
4520 *
4521 * Section Protection:
4522 * 'r' - section is readable
4523 * 'w' - section is writeable
4524 * 'x' - section is executable
4525 * 's' - section is sharable
4526 *
4527 * Section Alignment:
4528 * '0' - align to byte boundary
4529 * '1' - align to halfword undary
4530 * '2' - align to word boundary
4531 * '3' - align to doubleword boundary
4532 * '4' - align to quadword boundary
4533 * '5' - align to 32 byte boundary
4534 * '6' - align to 64 byte boundary
4535 *
4536 */
4537
4538void
98027b10 4539ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4540{
99a814a1 4541 /* Strip out the section name. */
252b5132
RH		 4542 char *section_name;
4543 char c;
4544 char *name;
4545 unsigned int exp;
4546 flagword flags;
4547 segT sec;
4548 int align;
4549
4550 section_name = input_line_pointer;
4551 c = get_symbol_end ();
4552
4553 name = xmalloc (input_line_pointer - section_name + 1);
4554 strcpy (name, section_name);
4555
4556 *input_line_pointer = c;
4557
4558 SKIP_WHITESPACE ();
4559
4560 exp = 0;
4561 flags = SEC_NO_FLAGS;
4562
4563 if (strcmp (name, ".idata$2") == 0)
4564 {
4565 align = 0;
4566 }
4567 else if (strcmp (name, ".idata$3") == 0)
4568 {
4569 align = 0;
4570 }
4571 else if (strcmp (name, ".idata$4") == 0)
4572 {
4573 align = 2;
4574 }
4575 else if (strcmp (name, ".idata$5") == 0)
4576 {
4577 align = 2;
4578 }
4579 else if (strcmp (name, ".idata$6") == 0)
4580 {
4581 align = 1;
4582 }
4583 else
99a814a1
AM		 4584 /* Default alignment to 16 byte boundary. */
4585 align = 4;
252b5132
RH		 4586
4587 if (*input_line_pointer == ',')
4588 {
4589 ++input_line_pointer;
4590 SKIP_WHITESPACE ();
4591 if (*input_line_pointer != '"')
4592 exp = get_absolute_expression ();
4593 else
4594 {
4595 ++input_line_pointer;
4596 while (*input_line_pointer != '"'
4597 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4598 {
4599 switch (*input_line_pointer)
4600 {
4601 /* Section Contents */
4602 case 'a': /* unknown */
4603 as_bad (_("Unsupported section attribute -- 'a'"));
4604 break;
4605 case 'c': /* code section */
81d4177b 4606 flags |= SEC_CODE;
252b5132
RH		 4607 break;
4608 case 'd': /* section has initialized data */
4609 flags |= SEC_DATA;
4610 break;
4611 case 'u': /* section has uninitialized data */
4612 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4613 in winnt.h */
4614 flags |= SEC_ROM;
4615 break;
4616 case 'i': /* section contains directives (info) */
4617 /* FIXME: This is IMAGE_SCN_LNK_INFO
4618 in winnt.h */
4619 flags |= SEC_HAS_CONTENTS;
4620 break;
4621 case 'n': /* section can be discarded */
81d4177b 4622 flags &=~ SEC_LOAD;
252b5132
RH		 4623 break;
4624 case 'R': /* Remove section at link time */
4625 flags |= SEC_NEVER_LOAD;
4626 break;
8d452c78 4627#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4628 /* Section Protection */
4629 case 'r': /* section is readable */
4630 flags |= IMAGE_SCN_MEM_READ;
4631 break;
4632 case 'w': /* section is writeable */
4633 flags |= IMAGE_SCN_MEM_WRITE;
4634 break;
4635 case 'x': /* section is executable */
4636 flags |= IMAGE_SCN_MEM_EXECUTE;
4637 break;
4638 case 's': /* section is sharable */
4639 flags |= IMAGE_SCN_MEM_SHARED;
4640 break;
4641
4642 /* Section Alignment */
4643 case '0': /* align to byte boundary */
4644 flags |= IMAGE_SCN_ALIGN_1BYTES;
4645 align = 0;
4646 break;
4647 case '1': /* align to halfword boundary */
4648 flags |= IMAGE_SCN_ALIGN_2BYTES;
4649 align = 1;
4650 break;
4651 case '2': /* align to word boundary */
4652 flags |= IMAGE_SCN_ALIGN_4BYTES;
4653 align = 2;
4654 break;
4655 case '3': /* align to doubleword boundary */
4656 flags |= IMAGE_SCN_ALIGN_8BYTES;
4657 align = 3;
4658 break;
4659 case '4': /* align to quadword boundary */
4660 flags |= IMAGE_SCN_ALIGN_16BYTES;
4661 align = 4;
4662 break;
4663 case '5': /* align to 32 byte boundary */
4664 flags |= IMAGE_SCN_ALIGN_32BYTES;
4665 align = 5;
4666 break;
4667 case '6': /* align to 64 byte boundary */
4668 flags |= IMAGE_SCN_ALIGN_64BYTES;
4669 align = 6;
4670 break;
8d452c78 4671#endif
252b5132 4672 default:
99a814a1
AM		 4673 as_bad (_("unknown section attribute '%c'"),
4674 *input_line_pointer);
252b5132
RH		 4675 break;
4676 }
4677 ++input_line_pointer;
4678 }
4679 if (*input_line_pointer == '"')
4680 ++input_line_pointer;
4681 }
4682 }
4683
4684 sec = subseg_new (name, (subsegT) exp);
4685
99a814a1 4686 ppc_set_current_section (sec);
252b5132
RH		 4687
4688 if (flags != SEC_NO_FLAGS)
4689 {
4690 if (! bfd_set_section_flags (stdoutput, sec, flags))
4691 as_bad (_("error setting flags for \"%s\": %s"),
4692 bfd_section_name (stdoutput, sec),
4693 bfd_errmsg (bfd_get_error ()));
4694 }
4695
99a814a1 4696 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4697}
4698
4699static void
98027b10 4700ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4701{
4702 char *name;
4703 char endc;
4704 symbolS *ext_sym;
4705
4706 name = input_line_pointer;
4707 endc = get_symbol_end ();
4708
4709 ext_sym = symbol_find_or_make (name);
4710
4711 *input_line_pointer = endc;
4712
4713 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4714 SF_SET_FUNCTION (ext_sym);
4715 SF_SET_PROCESS (ext_sym);
4716 coff_add_linesym (ext_sym);
4717
4718 demand_empty_rest_of_line ();
4719}
4720
4721static void
98027b10 4722ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4723{
4724 if (tocdata_section == 0)
4725 {
4726 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4727 /* FIXME: section flags won't work. */
252b5132
RH		 4728 bfd_set_section_flags (stdoutput, tocdata_section,
4729 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4730 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4731
4732 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4733 }
4734 else
4735 {
4736 rdata_section = subseg_new (".tocd", 0);
4737 }
4738
99a814a1 4739 ppc_set_current_section (tocdata_section);
252b5132
RH		 4740
4741 demand_empty_rest_of_line ();
4742}
4743
4744/* Don't adjust TOC relocs to use the section symbol. */
4745
4746int
98027b10 4747ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4748{
4749 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4750}
4751
4752#endif
4753\f
4754#ifdef OBJ_XCOFF
4755
4756/* XCOFF specific symbol and file handling. */
4757
4758/* Canonicalize the symbol name. We use the to force the suffix, if
4759 any, to use square brackets, and to be in upper case. */
4760
4761char *
98027b10 4762ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4763{
4764 char *s;
4765
4766 if (ppc_stab_symbol)
4767 return name;
4768
4769 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4770 ;
4771 if (*s != '\0')
4772 {
4773 char brac;
4774
4775 if (*s == '[')
4776 brac = ']';
4777 else
4778 {
4779 *s = '[';
4780 brac = '}';
4781 }
4782
4783 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4784 *s = TOUPPER (*s);
252b5132
RH		 4785
4786 if (*s == '\0' || s[1] != '\0')
4787 as_bad (_("bad symbol suffix"));
4788
4789 *s = ']';
4790 }
4791
4792 return name;
4793}
4794
4795/* Set the class of a symbol based on the suffix, if any. This is
4796 called whenever a new symbol is created. */
4797
4798void
98027b10 4799ppc_symbol_new_hook (symbolS *sym)
252b5132 4800{
809ffe0d 4801 struct ppc_tc_sy *tc;
252b5132
RH		 4802 const char *s;
4803
809ffe0d
ILT		 4804 tc = symbol_get_tc (sym);
4805 tc->next = NULL;
4806 tc->output = 0;
4807 tc->class = -1;
4808 tc->real_name = NULL;
4809 tc->subseg = 0;
4810 tc->align = 0;
4811 tc->size = NULL;
4812 tc->within = NULL;
252b5132
RH		 4813
4814 if (ppc_stab_symbol)
4815 return;
4816
4817 s = strchr (S_GET_NAME (sym), '[');
4818 if (s == (const char *) NULL)
4819 {
4820 /* There is no suffix. */
4821 return;
4822 }
4823
4824 ++s;
4825
4826 switch (s[0])
4827 {
4828 case 'B':
4829 if (strcmp (s, "BS]") == 0)
809ffe0d 4830 tc->class = XMC_BS;
252b5132
RH		 4831 break;
4832 case 'D':
4833 if (strcmp (s, "DB]") == 0)
809ffe0d 4834 tc->class = XMC_DB;
252b5132 4835 else if (strcmp (s, "DS]") == 0)
809ffe0d 4836 tc->class = XMC_DS;
252b5132
RH		 4837 break;
4838 case 'G':
4839 if (strcmp (s, "GL]") == 0)
809ffe0d 4840 tc->class = XMC_GL;
252b5132
RH		 4841 break;
4842 case 'P':
4843 if (strcmp (s, "PR]") == 0)
809ffe0d 4844 tc->class = XMC_PR;
252b5132
RH		 4845 break;
4846 case 'R':
4847 if (strcmp (s, "RO]") == 0)
809ffe0d 4848 tc->class = XMC_RO;
252b5132 4849 else if (strcmp (s, "RW]") == 0)
809ffe0d 4850 tc->class = XMC_RW;
252b5132
RH		 4851 break;
4852 case 'S':
4853 if (strcmp (s, "SV]") == 0)
809ffe0d 4854 tc->class = XMC_SV;
252b5132
RH		 4855 break;
4856 case 'T':
4857 if (strcmp (s, "TC]") == 0)
809ffe0d 4858 tc->class = XMC_TC;
252b5132 4859 else if (strcmp (s, "TI]") == 0)
809ffe0d 4860 tc->class = XMC_TI;
252b5132 4861 else if (strcmp (s, "TB]") == 0)
809ffe0d 4862 tc->class = XMC_TB;
252b5132 4863 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4864 tc->class = XMC_TC0;
252b5132
RH		 4865 break;
4866 case 'U':
4867 if (strcmp (s, "UA]") == 0)
809ffe0d 4868 tc->class = XMC_UA;
252b5132 4869 else if (strcmp (s, "UC]") == 0)
809ffe0d 4870 tc->class = XMC_UC;
252b5132
RH		 4871 break;
4872 case 'X':
4873 if (strcmp (s, "XO]") == 0)
809ffe0d 4874 tc->class = XMC_XO;
252b5132
RH		 4875 break;
4876 }
4877
809ffe0d 4878 if (tc->class == -1)
252b5132
RH		 4879 as_bad (_("Unrecognized symbol suffix"));
4880}
4881
4882/* Set the class of a label based on where it is defined. This
4883 handles symbols without suffixes. Also, move the symbol so that it
4884 follows the csect symbol. */
4885
4886void
98027b10 4887ppc_frob_label (symbolS *sym)
252b5132
RH		 4888{
4889 if (ppc_current_csect != (symbolS *) NULL)
4890 {
809ffe0d
ILT		 4891 if (symbol_get_tc (sym)->class == -1)
4892 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4893
4894 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4895 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4896 &symbol_rootP, &symbol_lastP);
4897 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4898 }
07a53e5c
RH		 4899
4900#ifdef OBJ_ELF
4901 dwarf2_emit_label (sym);
4902#endif
252b5132
RH		 4903}
4904
4905/* This variable is set by ppc_frob_symbol if any absolute symbols are
4906 seen. It tells ppc_adjust_symtab whether it needs to look through
4907 the symbols. */
4908
b34976b6 4909static bfd_boolean ppc_saw_abs;
252b5132
RH		 4910
4911/* Change the name of a symbol just before writing it out. Set the
4912 real name if the .rename pseudo-op was used. Otherwise, remove any
4913 class suffix. Return 1 if the symbol should not be included in the
4914 symbol table. */
4915
4916int
98027b10 4917ppc_frob_symbol (symbolS *sym)
252b5132
RH		 4918{
4919 static symbolS *ppc_last_function;
4920 static symbolS *set_end;
4921
4922 /* Discard symbols that should not be included in the output symbol
4923 table. */
809ffe0d
ILT		 4924 if (! symbol_used_in_reloc_p (sym)
4925 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4926 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4927 && ! symbol_get_tc (sym)->output
252b5132
RH		 4928 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4929 return 1;
4930
a161fe53
AM		 4931 /* This one will disappear anyway. Don't make a csect sym for it. */
4932 if (sym == abs_section_sym)
4933 return 1;
4934
809ffe0d
ILT		 4935 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4936 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4937 else
4938 {
4939 const char *name;
4940 const char *s;
4941
4942 name = S_GET_NAME (sym);
4943 s = strchr (name, '[');
4944 if (s != (char *) NULL)
4945 {
4946 unsigned int len;
4947 char *snew;
4948
4949 len = s - name;
4950 snew = xmalloc (len + 1);
4951 memcpy (snew, name, len);
4952 snew[len] = '\0';
4953
4954 S_SET_NAME (sym, snew);
4955 }
4956 }
4957
4958 if (set_end != (symbolS *) NULL)
4959 {
4960 SA_SET_SYM_ENDNDX (set_end, sym);
4961 set_end = NULL;
4962 }
4963
4964 if (SF_GET_FUNCTION (sym))
4965 {
4966 if (ppc_last_function != (symbolS *) NULL)
4967 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4968 ppc_last_function = sym;
809ffe0d 4969 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4970 {
6386f3a7 4971 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4972 SA_SET_SYM_FSIZE (sym,
4973 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4974 }
4975 }
4976 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4977 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4978 {
4979 if (ppc_last_function == (symbolS *) NULL)
4980 as_bad (_(".ef with no preceding .function"));
4981 else
4982 {
4983 set_end = ppc_last_function;
4984 ppc_last_function = NULL;
4985
4986 /* We don't have a C_EFCN symbol, but we need to force the
4987 COFF backend to believe that it has seen one. */
4988 coff_last_function = NULL;
4989 }
4990 }
4991
670ec21d 4992 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4993 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4994 && S_GET_STORAGE_CLASS (sym) != C_FILE
4995 && S_GET_STORAGE_CLASS (sym) != C_FCN
4996 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4997 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4998 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4999 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5000 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5001 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5002 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5003
5004 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5005 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5006 {
5007 int i;
5008 union internal_auxent *a;
5009
5010 /* Create a csect aux. */
5011 i = S_GET_NUMBER_AUXILIARY (sym);
5012 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 5013 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5014 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 5015 {
5016 /* This is the TOC table. */
5017 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5018 a->x_csect.x_scnlen.l = 0;
5019 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5020 }
809ffe0d 5021 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5022 {
5023 /* This is a csect symbol. x_scnlen is the size of the
5024 csect. */
809ffe0d 5025 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5026 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5027 S_GET_SEGMENT (sym))
5028 - S_GET_VALUE (sym));
5029 else
5030 {
6386f3a7 5031 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5032 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5033 - S_GET_VALUE (sym));
5034 }
809ffe0d 5035 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5036 }
5037 else if (S_GET_SEGMENT (sym) == bss_section)
5038 {
5039 /* This is a common symbol. */
809ffe0d
ILT		 5040 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5041 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5042 if (S_IS_EXTERNAL (sym))
809ffe0d 5043 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5044 else
809ffe0d 5045 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5046 }
5047 else if (S_GET_SEGMENT (sym) == absolute_section)
5048 {
5049 /* This is an absolute symbol. The csect will be created by
99a814a1 5050 ppc_adjust_symtab. */
b34976b6 5051 ppc_saw_abs = TRUE;
252b5132 5052 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5053 if (symbol_get_tc (sym)->class == -1)
5054 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5055 }
5056 else if (! S_IS_DEFINED (sym))
5057 {
5058 /* This is an external symbol. */
5059 a->x_csect.x_scnlen.l = 0;
5060 a->x_csect.x_smtyp = XTY_ER;
5061 }
809ffe0d 5062 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5063 {
5064 symbolS *next;
5065
5066 /* This is a TOC definition. x_scnlen is the size of the
5067 TOC entry. */
5068 next = symbol_next (sym);
809ffe0d 5069 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5070 next = symbol_next (next);
5071 if (next == (symbolS *) NULL
809ffe0d 5072 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5073 {
5074 if (ppc_after_toc_frag == (fragS *) NULL)
5075 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5076 data_section)
5077 - S_GET_VALUE (sym));
5078 else
5079 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5080 - S_GET_VALUE (sym));
5081 }
5082 else
5083 {
6386f3a7 5084 resolve_symbol_value (next);
252b5132
RH		 5085 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5086 - S_GET_VALUE (sym));
5087 }
5088 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5089 }
5090 else
5091 {
5092 symbolS *csect;
5093
5094 /* This is a normal symbol definition. x_scnlen is the
5095 symbol index of the containing csect. */
5096 if (S_GET_SEGMENT (sym) == text_section)
5097 csect = ppc_text_csects;
5098 else if (S_GET_SEGMENT (sym) == data_section)
5099 csect = ppc_data_csects;
5100 else
5101 abort ();
5102
5103 /* Skip the initial dummy symbol. */
809ffe0d 5104 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5105
5106 if (csect == (symbolS *) NULL)
5107 {
5108 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5109 a->x_csect.x_scnlen.l = 0;
5110 }
5111 else
5112 {
809ffe0d 5113 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5114 {
6386f3a7 5115 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5116 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5117 > S_GET_VALUE (sym))
252b5132 5118 break;
809ffe0d 5119 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5120 }
5121
809ffe0d
ILT		 5122 a->x_csect.x_scnlen.p =
5123 coffsymbol (symbol_get_bfdsym (csect))->native;
5124 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5125 1;
252b5132
RH		 5126 }
5127 a->x_csect.x_smtyp = XTY_LD;
5128 }
81d4177b 5129
252b5132
RH		 5130 a->x_csect.x_parmhash = 0;
5131 a->x_csect.x_snhash = 0;
809ffe0d 5132 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5133 a->x_csect.x_smclas = XMC_PR;
5134 else
809ffe0d 5135 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5136 a->x_csect.x_stab = 0;
5137 a->x_csect.x_snstab = 0;
5138
5139 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5140 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5141 }
5142 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5143 {
5144 /* We want the value to be the symbol index of the referenced
5145 csect symbol. BFD will do that for us if we set the right
5146 flags. */
b782de16
AM		 5147 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5148 combined_entry_type *c = coffsymbol (bsym)->native;
5149
5150 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5151 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5152 }
5153 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5154 {
5155 symbolS *block;
5156 symbolS *csect;
5157
5158 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5159 block = symbol_get_tc (sym)->within;
5160 csect = symbol_get_tc (block)->within;
6386f3a7 5161 resolve_symbol_value (csect);
252b5132
RH		 5162 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5163 }
5164 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5165 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5166 {
5167 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5168 BFD will do that for us if we set the right flags. We have
5169 already set the value correctly. */
809ffe0d 5170 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5171 }
5172
5173 return 0;
5174}
5175
5176/* Adjust the symbol table. This creates csect symbols for all
5177 absolute symbols. */
5178
5179void
98027b10 5180ppc_adjust_symtab (void)
252b5132
RH		 5181{
5182 symbolS *sym;
5183
5184 if (! ppc_saw_abs)
5185 return;
5186
5187 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5188 {
5189 symbolS *csect;
5190 int i;
5191 union internal_auxent *a;
5192
5193 if (S_GET_SEGMENT (sym) != absolute_section)
5194 continue;
5195
5196 csect = symbol_create (".abs[XO]", absolute_section,
5197 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5198 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5199 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5200 i = S_GET_NUMBER_AUXILIARY (csect);
5201 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5202 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5203 a->x_csect.x_scnlen.l = 0;
5204 a->x_csect.x_smtyp = XTY_SD;
5205 a->x_csect.x_parmhash = 0;
5206 a->x_csect.x_snhash = 0;
5207 a->x_csect.x_smclas = XMC_XO;
5208 a->x_csect.x_stab = 0;
5209 a->x_csect.x_snstab = 0;
5210
5211 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5212
5213 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5214 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5215 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5216 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5217 }
5218
b34976b6 5219 ppc_saw_abs = FALSE;
252b5132
RH		 5220}
5221
5222/* Set the VMA for a section. This is called on all the sections in
5223 turn. */
5224
5225void
98027b10 5226ppc_frob_section (asection *sec)
252b5132 5227{
931e13a6 5228 static bfd_vma vma = 0;
252b5132 5229
931e13a6 5230 vma = md_section_align (sec, vma);
252b5132
RH		 5231 bfd_set_section_vma (stdoutput, sec, vma);
5232 vma += bfd_section_size (stdoutput, sec);
5233}
5234
5235#endif /* OBJ_XCOFF */
5236\f
252b5132 5237char *
98027b10 5238md_atof (int type, char *litp, int *sizep)
252b5132 5239{
499ac353 5240 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5241}
5242
5243/* Write a value out to the object file, using the appropriate
5244 endianness. */
5245
5246void
98027b10 5247md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5248{
5249 if (target_big_endian)
5250 number_to_chars_bigendian (buf, val, n);
5251 else
5252 number_to_chars_littleendian (buf, val, n);
5253}
5254
5255/* Align a section (I don't know why this is machine dependent). */
5256
5257valueT
3aeeedbb 5258md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5259{
3aeeedbb
AM		 5260#ifdef OBJ_ELF
5261 return addr;
5262#else
252b5132
RH		 5263 int align = bfd_get_section_alignment (stdoutput, seg);
5264
5265 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5266#endif
252b5132
RH		 5267}
5268
5269/* We don't have any form of relaxing. */
5270
5271int
98027b10
AM		 5272md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5273 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5274{
5275 abort ();
5276 return 0;
5277}
5278
5279/* Convert a machine dependent frag. We never generate these. */
5280
5281void
98027b10
AM		 5282md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5283 asection *sec ATTRIBUTE_UNUSED,
5284 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5285{
5286 abort ();
5287}
5288
5289/* We have no need to default values of symbols. */
5290
252b5132 5291symbolS *
98027b10 5292md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5293{
5294 return 0;
5295}
5296\f
5297/* Functions concerning relocs. */
5298
5299/* The location from which a PC relative jump should be calculated,
5300 given a PC relative reloc. */
5301
5302long
98027b10 5303md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5304{
5305 return fixp->fx_frag->fr_address + fixp->fx_where;
5306}
5307
5308#ifdef OBJ_XCOFF
5309
5310/* This is called to see whether a fixup should be adjusted to use a
5311 section symbol. We take the opportunity to change a fixup against
5312 a symbol in the TOC subsegment into a reloc against the
5313 corresponding .tc symbol. */
5314
5315int
98027b10 5316ppc_fix_adjustable (fixS *fix)
252b5132 5317{
b782de16
AM		 5318 valueT val = resolve_symbol_value (fix->fx_addsy);
5319 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5320 TC_SYMFIELD_TYPE *tc;
5321
5322 if (symseg == absolute_section)
5323 return 0;
252b5132 5324
252b5132 5325 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5326 && fix->fx_addsy != ppc_toc_csect
b782de16 5327 && symseg == data_section
252b5132
RH		 5328 && val >= ppc_toc_frag->fr_address
5329 && (ppc_after_toc_frag == (fragS *) NULL
5330 || val < ppc_after_toc_frag->fr_address))
5331 {
5332 symbolS *sy;
5333
5334 for (sy = symbol_next (ppc_toc_csect);
5335 sy != (symbolS *) NULL;
5336 sy = symbol_next (sy))
5337 {
b782de16
AM		 5338 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5339
5340 if (sy_tc->class == XMC_TC0)
252b5132 5341 continue;
b782de16 5342 if (sy_tc->class != XMC_TC)
252b5132 5343 break;
b782de16 5344 if (val == resolve_symbol_value (sy))
252b5132
RH		 5345 {
5346 fix->fx_addsy = sy;
5347 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5348 return 0;
5349 }
5350 }
5351
5352 as_bad_where (fix->fx_file, fix->fx_line,
5353 _("symbol in .toc does not match any .tc"));
5354 }
5355
5356 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5357 tc = symbol_get_tc (fix->fx_addsy);
5358 if (tc->subseg == 0
5359 && tc->class != XMC_TC0
5360 && tc->class != XMC_TC
5361 && symseg != bss_section
252b5132 5362 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5363 && (symseg != data_section
252b5132
RH		 5364 || ppc_toc_csect == NULL
5365 || val < ppc_toc_frag->fr_address
5366 || (ppc_after_toc_frag != NULL
5367 && val >= ppc_after_toc_frag->fr_address)))
5368 {
5369 symbolS *csect;
b782de16 5370 symbolS *next_csect;
252b5132 5371
b782de16 5372 if (symseg == text_section)
252b5132 5373 csect = ppc_text_csects;
b782de16 5374 else if (symseg == data_section)
252b5132
RH		 5375 csect = ppc_data_csects;
5376 else
5377 abort ();
5378
5379 /* Skip the initial dummy symbol. */
809ffe0d 5380 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5381
5382 if (csect != (symbolS *) NULL)
5383 {
b782de16
AM		 5384 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5385 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5386 {
5387 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5388 have to look through the full symbol table to see
5389 whether this is the csect we want. Note that we will
5390 only get here if the csect has zero length. */
b782de16
AM		 5391 if (symbol_get_frag (csect)->fr_address == val
5392 && S_GET_VALUE (csect) == val)
252b5132
RH		 5393 {
5394 symbolS *scan;
5395
809ffe0d 5396 for (scan = symbol_next (csect);
252b5132 5397 scan != NULL;
809ffe0d 5398 scan = symbol_next (scan))
252b5132 5399 {
809ffe0d 5400 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5401 break;
5402 if (scan == fix->fx_addsy)
5403 break;
5404 }
5405
5406 /* If we found the symbol before the next csect
99a814a1 5407 symbol, then this is the csect we want. */
252b5132
RH		 5408 if (scan == fix->fx_addsy)
5409 break;
5410 }
5411
b782de16 5412 csect = next_csect;
252b5132
RH		 5413 }
5414
b782de16 5415 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5416 fix->fx_addsy = csect;
5417 }
b782de16 5418 return 0;
252b5132
RH		 5419 }
5420
5421 /* Adjust a reloc against a .lcomm symbol to be against the base
5422 .lcomm. */
b782de16 5423 if (symseg == bss_section
252b5132
RH		 5424 && ! S_IS_EXTERNAL (fix->fx_addsy))
5425 {
b782de16
AM		 5426 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5427
5428 fix->fx_offset += val - resolve_symbol_value (sy);
5429 fix->fx_addsy = sy;
252b5132
RH		 5430 }
5431
5432 return 0;
5433}
5434
5435/* A reloc from one csect to another must be kept. The assembler
5436 will, of course, keep relocs between sections, and it will keep
5437 absolute relocs, but we need to force it to keep PC relative relocs
5438 between two csects in the same section. */
5439
5440int
98027b10 5441ppc_force_relocation (fixS *fix)
252b5132
RH		 5442{
5443 /* At this point fix->fx_addsy should already have been converted to
5444 a csect symbol. If the csect does not include the fragment, then
5445 we need to force the relocation. */
5446 if (fix->fx_pcrel
5447 && fix->fx_addsy != NULL
809ffe0d
ILT		 5448 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5449 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5450 > fix->fx_frag->fr_address)
5451 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5452 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5453 <= fix->fx_frag->fr_address))))
5454 return 1;
5455
ae6063d4 5456 return generic_force_reloc (fix);
252b5132
RH		 5457}
5458
5459#endif /* OBJ_XCOFF */
5460
0baf16f2 5461#ifdef OBJ_ELF
a161fe53
AM		 5462/* If this function returns non-zero, it guarantees that a relocation
5463 will be emitted for a fixup. */
5464
5465int
98027b10 5466ppc_force_relocation (fixS *fix)
a161fe53
AM		 5467{
5468 /* Branch prediction relocations must force a relocation, as must
5469 the vtable description relocs. */
5470 switch (fix->fx_r_type)
5471 {
5472 case BFD_RELOC_PPC_B16_BRTAKEN:
5473 case BFD_RELOC_PPC_B16_BRNTAKEN:
5474 case BFD_RELOC_PPC_BA16_BRTAKEN:
5475 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5476 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5477 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5478 return 1;
5479 default:
5480 break;
5481 }
5482
cdba85ec
AM		 5483 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5484 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5485 return 1;
5486
ae6063d4 5487 return generic_force_reloc (fix);
a161fe53
AM		 5488}
5489
0baf16f2 5490int
98027b10 5491ppc_fix_adjustable (fixS *fix)
252b5132 5492{
0baf16f2
AM		 5493 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5494 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5495 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5496 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5497 && fix->fx_r_type != BFD_RELOC_GPREL16
5498 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5499 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5500 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5501 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5502}
0baf16f2 5503#endif
252b5132 5504
3aeeedbb
AM		 5505/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5506 rs_align_code frag. */
5507
5508void
5509ppc_handle_align (struct frag *fragP)
5510{
5511 valueT count = (fragP->fr_next->fr_address
5512 - (fragP->fr_address + fragP->fr_fix));
5513
5514 if (count != 0 && (count & 3) == 0)
5515 {
5516 char *dest = fragP->fr_literal + fragP->fr_fix;
5517
5518 fragP->fr_var = 4;
5519 md_number_to_chars (dest, 0x60000000, 4);
5520
5521 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5522 {
5523 /* For power6, we want the last nop to be a group terminating
5524 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5525 immediately after this one, with its address set to the last
5526 nop location. This will automatically reduce the number of
5527 nops in the current frag by one. */
5528 if (count > 4)
5529 {
5530 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5531
5532 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5533 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5534 group_nop->fr_fix = 0;
5535 group_nop->fr_offset = 1;
5536 group_nop->fr_type = rs_fill;
5537 fragP->fr_next = group_nop;
5538 dest = group_nop->fr_literal;
5539 }
5540
5541 md_number_to_chars (dest, 0x60210000, 4);
5542 }
5543 }
5544}
5545
252b5132
RH		 5546/* Apply a fixup to the object code. This is called for all the
5547 fixups we generated by the call to fix_new_exp, above. In the call
5548 above we used a reloc code which was the largest legal reloc code
5549 plus the operand index. Here we undo that to recover the operand
5550 index. At this point all symbol values should be fully resolved,
5551 and we attempt to completely resolve the reloc. If we can not do
5552 that, we determine the correct reloc code and put it back in the
5553 fixup. */
5554
94f592af 5555void
98027b10 5556md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5557{
94f592af 5558 valueT value = * valP;
252b5132
RH		 5559
5560#ifdef OBJ_ELF
94f592af 5561 if (fixP->fx_addsy != NULL)
252b5132 5562 {
a161fe53 5563 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5564 if (fixP->fx_pcrel)
5565 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5566 }
5567 else
94f592af 5568 fixP->fx_done = 1;
252b5132 5569#else
a161fe53 5570 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5571 the symbol values. If we are doing this relocation the code in
5572 write.c is going to call bfd_install_relocation, which is also
5573 going to use the symbol value. That means that if the reloc is
5574 fully resolved we want to use *valP since bfd_install_relocation is
5575 not being used.
252b5132 5576 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5577 *valP, and must use fx_offset instead. However, if the reloc
5578 is PC relative, we do want to use *valP since it includes the
252b5132 5579 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5580 if (fixP->fx_addsy == (symbolS *) NULL)
5581 fixP->fx_done = 1;
5582
5583 else if (fixP->fx_pcrel)
5584 ;
5585
252b5132 5586 else
a161fe53
AM		 5587 value = fixP->fx_offset;
5588#endif
5589
5590 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5591 {
a161fe53
AM		 5592 /* We can't actually support subtracting a symbol. */
5593 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5594 }
252b5132 5595
94f592af 5596 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5597 {
5598 int opindex;
5599 const struct powerpc_operand *operand;
5600 char *where;
5601 unsigned long insn;
5602
94f592af 5603 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5604
5605 operand = &powerpc_operands[opindex];
5606
5607#ifdef OBJ_XCOFF
0baf16f2
AM		 5608 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5609 does not generate a reloc. It uses the offset of `sym' within its
5610 csect. Other usages, such as `.long sym', generate relocs. This
5611 is the documented behaviour of non-TOC symbols. */
252b5132 5612 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5613 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5614 && operand->shift == 0
2b3c4602 5615 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5616 && fixP->fx_addsy != NULL
5617 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5618 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5619 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5620 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5621 {
94f592af
NC		 5622 value = fixP->fx_offset;
5623 fixP->fx_done = 1;
252b5132
RH		 5624 }
5625#endif
5626
5627 /* Fetch the instruction, insert the fully resolved operand
5628 value, and stuff the instruction back again. */
94f592af 5629 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5630 if (target_big_endian)
5631 insn = bfd_getb32 ((unsigned char *) where);
5632 else
5633 insn = bfd_getl32 ((unsigned char *) where);
5634 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5635 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5636 if (target_big_endian)
5637 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5638 else
5639 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5640
94f592af
NC		 5641 if (fixP->fx_done)
5642 /* Nothing else to do here. */
5643 return;
252b5132 5644
94f592af 5645 assert (fixP->fx_addsy != NULL);
0baf16f2 5646
252b5132
RH		 5647 /* Determine a BFD reloc value based on the operand information.
5648 We are only prepared to turn a few of the operands into
0baf16f2 5649 relocs. */
11b37b7b 5650 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5651 && operand->bitm == 0x3fffffc
11b37b7b 5652 && operand->shift == 0)
94f592af 5653 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5654 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5655 && operand->bitm == 0xfffc
11b37b7b 5656 && operand->shift == 0)
95210096
AM		 5657 {
5658 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5659#ifdef OBJ_XCOFF
5660 fixP->fx_size = 2;
5661 if (target_big_endian)
5662 fixP->fx_where += 2;
5663#endif
5664 }
11b37b7b 5665 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5666 && operand->bitm == 0x3fffffc
11b37b7b 5667 && operand->shift == 0)
94f592af 5668 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5669 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5670 && operand->bitm == 0xfffc
11b37b7b 5671 && operand->shift == 0)
95210096
AM		 5672 {
5673 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5674#ifdef OBJ_XCOFF
5675 fixP->fx_size = 2;
5676 if (target_big_endian)
5677 fixP->fx_where += 2;
5678#endif
5679 }
0baf16f2 5680#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5681 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5682 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5683 && operand->shift == 0)
11b37b7b 5684 {
a7fc733f
AM		 5685 if (ppc_is_toc_sym (fixP->fx_addsy))
5686 {
5687 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5688#ifdef OBJ_ELF
a7fc733f
AM		 5689 if (ppc_obj64
5690 && (operand->flags & PPC_OPERAND_DS) != 0)
5691 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5692#endif
5693 }
5694 else
5695 {
5696 fixP->fx_r_type = BFD_RELOC_16;
5697#ifdef OBJ_ELF
5698 if (ppc_obj64
5699 && (operand->flags & PPC_OPERAND_DS) != 0)
5700 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5701#endif
a7fc733f 5702 }
94f592af 5703 fixP->fx_size = 2;
11b37b7b 5704 if (target_big_endian)
94f592af 5705 fixP->fx_where += 2;
11b37b7b 5706 }
0baf16f2 5707#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5708 else
252b5132
RH		 5709 {
5710 char *sfile;
5711 unsigned int sline;
5712
5713 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5714 symbol. */
94f592af
NC		 5715 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5716 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5717 _("unresolved expression that must be resolved"));
5718 else
94f592af 5719 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5720 _("unsupported relocation against %s"),
94f592af
NC		 5721 S_GET_NAME (fixP->fx_addsy));
5722 fixP->fx_done = 1;
5723 return;
252b5132
RH		 5724 }
5725 }
5726 else
5727 {
5728#ifdef OBJ_ELF
94f592af 5729 ppc_elf_validate_fix (fixP, seg);
252b5132 5730#endif
94f592af 5731 switch (fixP->fx_r_type)
252b5132 5732 {
252b5132 5733 case BFD_RELOC_CTOR:
2b3c4602 5734 if (ppc_obj64)
9c7977b3
AM		 5735 goto ctor64;
5736 /* fall through */
5737
0baf16f2 5738 case BFD_RELOC_32:
94f592af
NC		 5739 if (fixP->fx_pcrel)
5740 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5741 /* fall through */
252b5132
RH		 5742
5743 case BFD_RELOC_RVA:
5744 case BFD_RELOC_32_PCREL:
252b5132 5745 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5746 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5747 value, 4);
5748 break;
5749
7f6d05e8 5750 case BFD_RELOC_64:
9c7977b3 5751 ctor64:
94f592af
NC		 5752 if (fixP->fx_pcrel)
5753 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5754 /* fall through */
0baf16f2 5755
7f6d05e8 5756 case BFD_RELOC_64_PCREL:
94f592af 5757 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5758 value, 8);
81d4177b 5759 break;
0baf16f2 5760
252b5132
RH		 5761 case BFD_RELOC_GPREL16:
5762 case BFD_RELOC_16_GOT_PCREL:
5763 case BFD_RELOC_16_GOTOFF:
5764 case BFD_RELOC_LO16_GOTOFF:
5765 case BFD_RELOC_HI16_GOTOFF:
5766 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5767 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5768 case BFD_RELOC_LO16_BASEREL:
5769 case BFD_RELOC_HI16_BASEREL:
5770 case BFD_RELOC_HI16_S_BASEREL:
5771 case BFD_RELOC_PPC_EMB_NADDR16:
5772 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5773 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5774 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5775 case BFD_RELOC_PPC_EMB_SDAI16:
5776 case BFD_RELOC_PPC_EMB_SDA2REL:
5777 case BFD_RELOC_PPC_EMB_SDA2I16:
5778 case BFD_RELOC_PPC_EMB_RELSEC16:
5779 case BFD_RELOC_PPC_EMB_RELST_LO:
5780 case BFD_RELOC_PPC_EMB_RELST_HI:
5781 case BFD_RELOC_PPC_EMB_RELST_HA:
5782 case BFD_RELOC_PPC_EMB_RELSDA:
5783 case BFD_RELOC_PPC_TOC16:
0baf16f2 5784#ifdef OBJ_ELF
0baf16f2
AM		 5785 case BFD_RELOC_PPC64_TOC16_LO:
5786 case BFD_RELOC_PPC64_TOC16_HI:
5787 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5788#endif
94f592af 5789 if (fixP->fx_pcrel)
252b5132 5790 {
94f592af
NC		 5791 if (fixP->fx_addsy != NULL)
5792 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5793 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5794 bfd_get_reloc_code_name (fixP->fx_r_type),
5795 S_GET_NAME (fixP->fx_addsy));
252b5132 5796 else
94f592af 5797 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5798 _("cannot emit PC relative %s relocation"),
94f592af 5799 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5800 }
5801
94f592af 5802 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5803 value, 2);
5804 break;
5805
3c9d25f4
AM		 5806 case BFD_RELOC_16:
5807 if (fixP->fx_pcrel)
5808 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5809 /* fall through */
5810
5811 case BFD_RELOC_16_PCREL:
5812 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5813 value, 2);
5814 break;
5815
5816 case BFD_RELOC_LO16:
5817 if (fixP->fx_pcrel)
5818 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5819 /* fall through */
5820
5821 case BFD_RELOC_LO16_PCREL:
5822 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5823 value, 2);
5824 break;
5825
252b5132
RH		 5826 /* This case happens when you write, for example,
5827 lis %r3,(L1-L2)@ha
5828 where L1 and L2 are defined later. */
5829 case BFD_RELOC_HI16:
94f592af 5830 if (fixP->fx_pcrel)
3c9d25f4
AM		 5831 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5832 /* fall through */
5833
5834 case BFD_RELOC_HI16_PCREL:
94f592af 5835 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5836 PPC_HI (value), 2);
252b5132 5837 break;
0baf16f2 5838
252b5132 5839 case BFD_RELOC_HI16_S:
94f592af 5840 if (fixP->fx_pcrel)
3c9d25f4
AM		 5841 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5842 /* fall through */
5843
5844 case BFD_RELOC_HI16_S_PCREL:
94f592af 5845 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5846 PPC_HA (value), 2);
5847 break;
5848
5849#ifdef OBJ_ELF
0baf16f2 5850 case BFD_RELOC_PPC64_HIGHER:
94f592af 5851 if (fixP->fx_pcrel)
0baf16f2 5852 abort ();
94f592af 5853 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5854 PPC_HIGHER (value), 2);
252b5132
RH		 5855 break;
5856
0baf16f2 5857 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5858 if (fixP->fx_pcrel)
0baf16f2 5859 abort ();
94f592af 5860 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5861 PPC_HIGHERA (value), 2);
5862 break;
5863
5864 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5865 if (fixP->fx_pcrel)
0baf16f2 5866 abort ();
94f592af 5867 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5868 PPC_HIGHEST (value), 2);
5869 break;
5870
5871 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5872 if (fixP->fx_pcrel)
0baf16f2 5873 abort ();
94f592af 5874 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5875 PPC_HIGHESTA (value), 2);
5876 break;
5877
5878 case BFD_RELOC_PPC64_ADDR16_DS:
5879 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5880 case BFD_RELOC_PPC64_GOT16_DS:
5881 case BFD_RELOC_PPC64_GOT16_LO_DS:
5882 case BFD_RELOC_PPC64_PLT16_LO_DS:
5883 case BFD_RELOC_PPC64_SECTOFF_DS:
5884 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5885 case BFD_RELOC_PPC64_TOC16_DS:
5886 case BFD_RELOC_PPC64_TOC16_LO_DS:
5887 case BFD_RELOC_PPC64_PLTGOT16_DS:
5888 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5889 if (fixP->fx_pcrel)
0baf16f2
AM		 5890 abort ();
5891 {
2132e3a3 5892 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5893 unsigned long val, mask;
0baf16f2
AM		 5894
5895 if (target_big_endian)
adadcc0c 5896 val = bfd_getb32 (where - 2);
0baf16f2 5897 else
adadcc0c
AM		 5898 val = bfd_getl32 (where);
5899 mask = 0xfffc;
5900 /* lq insns reserve the four lsbs. */
5901 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5902 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5903 mask = 0xfff0;
5904 val |= value & mask;
0baf16f2
AM		 5905 if (target_big_endian)
5906 bfd_putb16 ((bfd_vma) val, where);
5907 else
5908 bfd_putl16 ((bfd_vma) val, where);
5909 }
5910 break;
cdba85ec 5911
ba0b2174
AM		 5912 case BFD_RELOC_PPC_B16_BRTAKEN:
5913 case BFD_RELOC_PPC_B16_BRNTAKEN:
5914 case BFD_RELOC_PPC_BA16_BRTAKEN:
5915 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5916 break;
5917
cdba85ec 5918 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5919 break;
5920
cdba85ec
AM		 5921 case BFD_RELOC_PPC_DTPMOD:
5922 case BFD_RELOC_PPC_TPREL16:
5923 case BFD_RELOC_PPC_TPREL16_LO:
5924 case BFD_RELOC_PPC_TPREL16_HI:
5925 case BFD_RELOC_PPC_TPREL16_HA:
5926 case BFD_RELOC_PPC_TPREL:
5927 case BFD_RELOC_PPC_DTPREL16:
5928 case BFD_RELOC_PPC_DTPREL16_LO:
5929 case BFD_RELOC_PPC_DTPREL16_HI:
5930 case BFD_RELOC_PPC_DTPREL16_HA:
5931 case BFD_RELOC_PPC_DTPREL:
5932 case BFD_RELOC_PPC_GOT_TLSGD16:
5933 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5934 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5935 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5936 case BFD_RELOC_PPC_GOT_TLSLD16:
5937 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5938 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5939 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5940 case BFD_RELOC_PPC_GOT_TPREL16:
5941 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5942 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5943 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5944 case BFD_RELOC_PPC_GOT_DTPREL16:
5945 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5946 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5947 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5948 case BFD_RELOC_PPC64_TPREL16_DS:
5949 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5950 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5951 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5952 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5953 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5954 case BFD_RELOC_PPC64_DTPREL16_DS:
5955 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5956 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5957 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5958 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5959 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 5960 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 5961 break;
0baf16f2 5962#endif
252b5132 5963 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5964 bytes, rather than 2, so offset it here appropriately. */
252b5132 5965 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5966 if (fixP->fx_pcrel)
252b5132
RH		 5967 abort ();
5968
94f592af 5969 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5970 + ((target_big_endian) ? 2 : 0),
5971 value, 2);
5972 break;
5973
5974 case BFD_RELOC_8:
94f592af 5975 if (fixP->fx_pcrel)
31a91399
NC		 5976 {
5977 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 5978 ".byte <undefined_symbol> - ." */
31a91399
NC		 5979 if (fixP->fx_addsy)
5980 as_bad (_("Unable to handle reference to symbol %s"),
5981 S_GET_NAME (fixP->fx_addsy));
5982 else
5983 as_bad (_("Unable to resolve expression"));
5984 fixP->fx_done = 1;
5985 }
5986 else
5987 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5988 value, 1);
252b5132
RH		 5989 break;
5990
5991 case BFD_RELOC_24_PLT_PCREL:
5992 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5993 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5994 abort ();
5995
94f592af 5996 if (fixP->fx_done)
99a814a1
AM		 5997 {
5998 char *where;
5999 unsigned long insn;
6000
6001 /* Fetch the instruction, insert the fully resolved operand
6002 value, and stuff the instruction back again. */
94f592af 6003 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6004 if (target_big_endian)
6005 insn = bfd_getb32 ((unsigned char *) where);
6006 else
6007 insn = bfd_getl32 ((unsigned char *) where);
6008 if ((value & 3) != 0)
94f592af 6009 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6010 _("must branch to an address a multiple of 4"));
6011 if ((offsetT) value < -0x40000000
6012 || (offsetT) value >= 0x40000000)
94f592af 6013 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6014 _("@local or @plt branch destination is too far away, %ld bytes"),
6015 (long) value);
6016 insn = insn | (value & 0x03fffffc);
6017 if (target_big_endian)
6018 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6019 else
6020 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6021 }
252b5132
RH		 6022 break;
6023
6024 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6025 fixP->fx_done = 0;
6026 if (fixP->fx_addsy
6027 && !S_IS_DEFINED (fixP->fx_addsy)
6028 && !S_IS_WEAK (fixP->fx_addsy))
6029 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6030 break;
6031
6032 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6033 fixP->fx_done = 0;
252b5132
RH		 6034 break;
6035
0baf16f2 6036#ifdef OBJ_ELF
0baf16f2
AM		 6037 /* Generated by reference to `sym@tocbase'. The sym is
6038 ignored by the linker. */
6039 case BFD_RELOC_PPC64_TOC:
94f592af 6040 fixP->fx_done = 0;
0baf16f2 6041 break;
0baf16f2 6042#endif
252b5132 6043 default:
bc805888 6044 fprintf (stderr,
94f592af 6045 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6046 fflush (stderr);
252b5132
RH		 6047 abort ();
6048 }
6049 }
6050
6051#ifdef OBJ_ELF
94f592af 6052 fixP->fx_addnumber = value;
4e6935a6
AM		 6053
6054 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6055 from the section contents. If we are going to be emitting a reloc
6056 then the section contents are immaterial, so don't warn if they
6057 happen to overflow. Leave such warnings to ld. */
6058 if (!fixP->fx_done)
6059 fixP->fx_no_overflow = 1;
252b5132 6060#else
94f592af
NC		 6061 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6062 fixP->fx_addnumber = 0;
252b5132
RH		 6063 else
6064 {
6065#ifdef TE_PE
94f592af 6066 fixP->fx_addnumber = 0;
252b5132 6067#else
8edcbfcd
TG		 6068 /* We want to use the offset within the toc, not the actual VMA
6069 of the symbol. */
94f592af 6070 fixP->fx_addnumber =
8edcbfcd
TG		 6071 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6072 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6073#endif
6074 }
6075#endif
252b5132
RH		 6076}
6077
6078/* Generate a reloc for a fixup. */
6079
6080arelent *
98027b10 6081tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6082{
6083 arelent *reloc;
6084
6085 reloc = (arelent *) xmalloc (sizeof (arelent));
6086
49309057
ILT		 6087 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6088 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6089 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6090 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6091 if (reloc->howto == (reloc_howto_type *) NULL)
6092 {
6093 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6094 _("reloc %d not supported by object file format"),
6095 (int) fixp->fx_r_type);
252b5132
RH		 6096 return NULL;
6097 }
6098 reloc->addend = fixp->fx_addnumber;
6099
6100 return reloc;
6101}
75e21f08
JJ		 6102
6103void
98027b10 6104ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6105{
6106 cfi_add_CFA_def_cfa (1, 0);
6107}
6108
6109int
1df69f4f 6110tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6111{
6112 unsigned int regnum = -1;
6113 unsigned int i;
6114 const char *p;
6115 char *q;
6116 static struct { char *name; int dw2regnum; } regnames[] =
6117 {
6118 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6119 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6120 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6121 { "spe_acc", 111 }, { "spefscr", 112 }
6122 };
6123
6124 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6125 if (strcmp (regnames[i].name, regname) == 0)
6126 return regnames[i].dw2regnum;
6127
6128 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6129 {
6130 p = regname + 1 + (regname[1] == '.');
6131 regnum = strtoul (p, &q, 10);
6132 if (p == q || *q || regnum >= 32)
6133 return -1;
6134 if (regname[0] == 'f')
b7d7dc63 6135 regnum += 32;
75e21f08 6136 else if (regname[0] == 'v')
b7d7dc63 6137 regnum += 77;
75e21f08
JJ		 6138 }
6139 else if (regname[0] == 'c' && regname[1] == 'r')
6140 {
6141 p = regname + 2 + (regname[2] == '.');
6142 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6143 return -1;
75e21f08
JJ		 6144 regnum = p[0] - '0' + 68;
6145 }
6146 return regnum;
6147}
GDB Binutils - Deliverables
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