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[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
4b95cf5c 2 Copyright (C) 1994-2014 Free Software Foundation, Inc.
252b5132
RH		 3 Written by Ian Lance Taylor, Cygnus Support.
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
ec2655a6 9 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
252b5132 21
252b5132 22#include "as.h"
3882b010 23#include "safe-ctype.h"
252b5132 24#include "subsegs.h"
75e21f08 25#include "dw2gencfi.h"
252b5132
RH		 26#include "opcode/ppc.h"
27
28#ifdef OBJ_ELF
29#include "elf/ppc.h"
ee67d69a 30#include "elf/ppc64.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
85645aed
TG		 38#ifdef OBJ_XCOFF
39#include "coff/xcoff.h"
40#include "libxcoff.h"
41#endif
42
252b5132
RH		 43/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
44
45/* Tell the main code what the endianness is. */
46extern int target_big_endian;
47
48/* Whether or not, we've set target_big_endian. */
49static int set_target_endian = 0;
50
51/* Whether to use user friendly register names. */
52#ifndef TARGET_REG_NAMES_P
53#ifdef TE_PE
b34976b6 54#define TARGET_REG_NAMES_P TRUE
252b5132 55#else
b34976b6 56#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 57#endif
58#endif
59
0baf16f2
AM		 60/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
61 HIGHESTA. */
62
63/* #lo(value) denotes the least significant 16 bits of the indicated. */
64#define PPC_LO(v) ((v) & 0xffff)
65
66/* #hi(value) denotes bits 16 through 31 of the indicated value. */
67#define PPC_HI(v) (((v) >> 16) & 0xffff)
68
69/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
71 signed number. */
15c1449b 72#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 73
74/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 75#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 76
77/* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
15c1449b 79#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 80
81/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 82#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 83
84/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 85 compensating for #lo being treated as a signed number. */
86#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2 87
f9c6b907
AM		 88#define SEX16(val) (((val) ^ 0x8000) - 0x8000)
89
90/* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92#define REPORT_OVERFLOW_HI 0
0baf16f2 93
b34976b6 94static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 95
98027b10
AM		 96static void ppc_macro (char *, const struct powerpc_macro *);
97static void ppc_byte (int);
0baf16f2
AM		 98
99#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 100static void ppc_tc (int);
101static void ppc_machine (int);
0baf16f2 102#endif
252b5132
RH		 103
104#ifdef OBJ_XCOFF
98027b10
AM		 105static void ppc_comm (int);
106static void ppc_bb (int);
107static void ppc_bc (int);
108static void ppc_bf (int);
109static void ppc_biei (int);
110static void ppc_bs (int);
111static void ppc_eb (int);
112static void ppc_ec (int);
113static void ppc_ef (int);
114static void ppc_es (int);
115static void ppc_csect (int);
85645aed 116static void ppc_dwsect (int);
98027b10
AM		 117static void ppc_change_csect (symbolS *, offsetT);
118static void ppc_function (int);
119static void ppc_extern (int);
120static void ppc_lglobl (int);
c865e45b 121static void ppc_ref (int);
98027b10
AM		 122static void ppc_section (int);
123static void ppc_named_section (int);
124static void ppc_stabx (int);
125static void ppc_rename (int);
126static void ppc_toc (int);
127static void ppc_xcoff_cons (int);
128static void ppc_vbyte (int);
252b5132
RH		 129#endif
130
131#ifdef OBJ_ELF
98027b10
AM		 132static void ppc_elf_rdata (int);
133static void ppc_elf_lcomm (int);
6911b7dc 134static void ppc_elf_localentry (int);
ee67d69a 135static void ppc_elf_abiversion (int);
252b5132
RH		 136#endif
137
138#ifdef TE_PE
98027b10
AM		 139static void ppc_previous (int);
140static void ppc_pdata (int);
141static void ppc_ydata (int);
142static void ppc_reldata (int);
143static void ppc_rdata (int);
144static void ppc_ualong (int);
145static void ppc_znop (int);
146static void ppc_pe_comm (int);
147static void ppc_pe_section (int);
148static void ppc_pe_function (int);
149static void ppc_pe_tocd (int);
252b5132
RH		 150#endif
151\f
152/* Generic assembler global variables which must be defined by all
153 targets. */
154
155#ifdef OBJ_ELF
156/* This string holds the chars that always start a comment. If the
157 pre-processor is disabled, these aren't very useful. The macro
158 tc_comment_chars points to this. We use this, rather than the
159 usual comment_chars, so that we can switch for Solaris conventions. */
160static const char ppc_solaris_comment_chars[] = "#!";
161static const char ppc_eabi_comment_chars[] = "#";
162
163#ifdef TARGET_SOLARIS_COMMENT
164const char *ppc_comment_chars = ppc_solaris_comment_chars;
165#else
166const char *ppc_comment_chars = ppc_eabi_comment_chars;
167#endif
168#else
169const char comment_chars[] = "#";
170#endif
171
172/* Characters which start a comment at the beginning of a line. */
173const char line_comment_chars[] = "#";
174
175/* Characters which may be used to separate multiple commands on a
176 single line. */
177const char line_separator_chars[] = ";";
178
179/* Characters which are used to indicate an exponent in a floating
180 point number. */
181const char EXP_CHARS[] = "eE";
182
183/* Characters which mean that a number is a floating point constant,
184 as in 0d1.0. */
185const char FLT_CHARS[] = "dD";
5ce8663f 186
5e02f92e 187/* Anything that can start an operand needs to be mentioned here,
ac805826 188 to stop the input scrubber eating whitespace. */
5e02f92e 189const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 190
191/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
192int ppc_cie_data_alignment;
783de163 193
8fbf7334
JL		 194/* The dwarf2 minimum instruction length. */
195int ppc_dwarf2_line_min_insn_length;
196
cef4f754
AM		 197/* More than this number of nops in an alignment op gets a branch
198 instead. */
199unsigned long nop_limit = 4;
200
783de163
AM		 201/* The type of processor we are assembling for. This is one or more
202 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 203ppc_cpu_t ppc_cpu = 0;
776fc418 204ppc_cpu_t sticky = 0;
01efc3af 205
ee67d69a
AM		 206/* Value for ELF e_flags EF_PPC64_ABI. */
207unsigned int ppc_abiversion = 0;
208
01efc3af
AM		 209/* Flags set on encountering toc relocs. */
210enum {
211 has_large_toc_reloc = 1,
212 has_small_toc_reloc = 2
213} toc_reloc_types;
bf7279d5
AM		 214
215/* Warn on emitting data to code sections. */
216int warn_476;
217unsigned long last_insn;
218segT last_seg;
219subsegT last_subseg;
252b5132
RH		 220\f
221/* The target specific pseudo-ops which we support. */
222
223const pseudo_typeS md_pseudo_table[] =
224{
225 /* Pseudo-ops which must be overridden. */
226 { "byte", ppc_byte, 0 },
227
228#ifdef OBJ_XCOFF
229 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
230 legitimately belong in the obj-*.c file. However, XCOFF is based
231 on COFF, and is only implemented for the RS/6000. We just use
232 obj-coff.c, and add what we need here. */
233 { "comm", ppc_comm, 0 },
234 { "lcomm", ppc_comm, 1 },
235 { "bb", ppc_bb, 0 },
236 { "bc", ppc_bc, 0 },
237 { "bf", ppc_bf, 0 },
238 { "bi", ppc_biei, 0 },
239 { "bs", ppc_bs, 0 },
240 { "csect", ppc_csect, 0 },
85645aed 241 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 242 { "data", ppc_section, 'd' },
243 { "eb", ppc_eb, 0 },
244 { "ec", ppc_ec, 0 },
245 { "ef", ppc_ef, 0 },
246 { "ei", ppc_biei, 1 },
247 { "es", ppc_es, 0 },
248 { "extern", ppc_extern, 0 },
249 { "function", ppc_function, 0 },
250 { "lglobl", ppc_lglobl, 0 },
c865e45b 251 { "ref", ppc_ref, 0 },
252b5132
RH		 252 { "rename", ppc_rename, 0 },
253 { "section", ppc_named_section, 0 },
254 { "stabx", ppc_stabx, 0 },
255 { "text", ppc_section, 't' },
256 { "toc", ppc_toc, 0 },
257 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 258 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 259 { "word", ppc_xcoff_cons, 1 },
260 { "short", ppc_xcoff_cons, 1 },
261 { "vbyte", ppc_vbyte, 0 },
262#endif
263
264#ifdef OBJ_ELF
62ebcb5c 265 { "llong", cons, 8 },
252b5132
RH		 266 { "rdata", ppc_elf_rdata, 0 },
267 { "rodata", ppc_elf_rdata, 0 },
268 { "lcomm", ppc_elf_lcomm, 0 },
6911b7dc 269 { "localentry", ppc_elf_localentry, 0 },
ee67d69a 270 { "abiversion", ppc_elf_abiversion, 0 },
252b5132
RH		 271#endif
272
273#ifdef TE_PE
99a814a1 274 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 275 { "previous", ppc_previous, 0 },
276 { "pdata", ppc_pdata, 0 },
277 { "ydata", ppc_ydata, 0 },
278 { "reldata", ppc_reldata, 0 },
279 { "rdata", ppc_rdata, 0 },
280 { "ualong", ppc_ualong, 0 },
281 { "znop", ppc_znop, 0 },
282 { "comm", ppc_pe_comm, 0 },
283 { "lcomm", ppc_pe_comm, 1 },
284 { "section", ppc_pe_section, 0 },
285 { "function", ppc_pe_function,0 },
286 { "tocd", ppc_pe_tocd, 0 },
287#endif
288
0baf16f2 289#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 290 { "tc", ppc_tc, 0 },
0baf16f2
AM		 291 { "machine", ppc_machine, 0 },
292#endif
252b5132
RH		 293
294 { NULL, NULL, 0 }
295};
296
297\f
99a814a1
AM		 298/* Predefined register names if -mregnames (or default for Windows NT).
299 In general, there are lots of them, in an attempt to be compatible
300 with a number of other Windows NT assemblers. */
252b5132
RH		 301
302/* Structure to hold information about predefined registers. */
303struct pd_reg
304 {
305 char *name;
306 int value;
307 };
308
309/* List of registers that are pre-defined:
310
311 Each general register has predefined names of the form:
312 1. r<reg_num> which has the value <reg_num>.
313 2. r.<reg_num> which has the value <reg_num>.
314
252b5132
RH		 315 Each floating point register has predefined names of the form:
316 1. f<reg_num> which has the value <reg_num>.
317 2. f.<reg_num> which has the value <reg_num>.
318
7a899fff
C		 319 Each vector unit register has predefined names of the form:
320 1. v<reg_num> which has the value <reg_num>.
321 2. v.<reg_num> which has the value <reg_num>.
322
252b5132
RH		 323 Each condition register has predefined names of the form:
324 1. cr<reg_num> which has the value <reg_num>.
325 2. cr.<reg_num> which has the value <reg_num>.
326
327 There are individual registers as well:
328 sp or r.sp has the value 1
329 rtoc or r.toc has the value 2
330 fpscr has the value 0
331 xer has the value 1
332 lr has the value 8
333 ctr has the value 9
334 pmr has the value 0
335 dar has the value 19
336 dsisr has the value 18
337 dec has the value 22
338 sdr1 has the value 25
339 srr0 has the value 26
340 srr1 has the value 27
341
81d4177b 342 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 343
344static const struct pd_reg pre_defined_registers[] =
345{
346 { "cr.0", 0 }, /* Condition Registers */
347 { "cr.1", 1 },
348 { "cr.2", 2 },
349 { "cr.3", 3 },
350 { "cr.4", 4 },
351 { "cr.5", 5 },
352 { "cr.6", 6 },
353 { "cr.7", 7 },
354
355 { "cr0", 0 },
356 { "cr1", 1 },
357 { "cr2", 2 },
358 { "cr3", 3 },
359 { "cr4", 4 },
360 { "cr5", 5 },
361 { "cr6", 6 },
362 { "cr7", 7 },
363
364 { "ctr", 9 },
365
366 { "dar", 19 }, /* Data Access Register */
367 { "dec", 22 }, /* Decrementer */
368 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
369
370 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 371 { "f.1", 1 },
372 { "f.10", 10 },
373 { "f.11", 11 },
374 { "f.12", 12 },
375 { "f.13", 13 },
376 { "f.14", 14 },
377 { "f.15", 15 },
378 { "f.16", 16 },
379 { "f.17", 17 },
380 { "f.18", 18 },
381 { "f.19", 19 },
382 { "f.2", 2 },
383 { "f.20", 20 },
384 { "f.21", 21 },
385 { "f.22", 22 },
386 { "f.23", 23 },
387 { "f.24", 24 },
388 { "f.25", 25 },
389 { "f.26", 26 },
390 { "f.27", 27 },
391 { "f.28", 28 },
392 { "f.29", 29 },
393 { "f.3", 3 },
252b5132
RH		 394 { "f.30", 30 },
395 { "f.31", 31 },
066be9f7
PB		 396
397 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
398 { "f.33", 33 },
399 { "f.34", 34 },
400 { "f.35", 35 },
401 { "f.36", 36 },
402 { "f.37", 37 },
403 { "f.38", 38 },
404 { "f.39", 39 },
81d4177b 405 { "f.4", 4 },
066be9f7
PB		 406 { "f.40", 40 },
407 { "f.41", 41 },
408 { "f.42", 42 },
409 { "f.43", 43 },
410 { "f.44", 44 },
411 { "f.45", 45 },
412 { "f.46", 46 },
413 { "f.47", 47 },
414 { "f.48", 48 },
415 { "f.49", 49 },
81d4177b 416 { "f.5", 5 },
066be9f7
PB		 417 { "f.50", 50 },
418 { "f.51", 51 },
419 { "f.52", 52 },
420 { "f.53", 53 },
421 { "f.54", 54 },
422 { "f.55", 55 },
423 { "f.56", 56 },
424 { "f.57", 57 },
425 { "f.58", 58 },
426 { "f.59", 59 },
81d4177b 427 { "f.6", 6 },
066be9f7
PB		 428 { "f.60", 60 },
429 { "f.61", 61 },
430 { "f.62", 62 },
431 { "f.63", 63 },
81d4177b
KH		 432 { "f.7", 7 },
433 { "f.8", 8 },
434 { "f.9", 9 },
435
436 { "f0", 0 },
437 { "f1", 1 },
438 { "f10", 10 },
439 { "f11", 11 },
440 { "f12", 12 },
441 { "f13", 13 },
442 { "f14", 14 },
443 { "f15", 15 },
444 { "f16", 16 },
445 { "f17", 17 },
446 { "f18", 18 },
447 { "f19", 19 },
448 { "f2", 2 },
449 { "f20", 20 },
450 { "f21", 21 },
451 { "f22", 22 },
452 { "f23", 23 },
453 { "f24", 24 },
454 { "f25", 25 },
455 { "f26", 26 },
456 { "f27", 27 },
457 { "f28", 28 },
458 { "f29", 29 },
459 { "f3", 3 },
252b5132
RH		 460 { "f30", 30 },
461 { "f31", 31 },
066be9f7
PB		 462
463 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
464 { "f33", 33 },
465 { "f34", 34 },
466 { "f35", 35 },
467 { "f36", 36 },
468 { "f37", 37 },
469 { "f38", 38 },
470 { "f39", 39 },
81d4177b 471 { "f4", 4 },
066be9f7
PB		 472 { "f40", 40 },
473 { "f41", 41 },
474 { "f42", 42 },
475 { "f43", 43 },
476 { "f44", 44 },
477 { "f45", 45 },
478 { "f46", 46 },
479 { "f47", 47 },
480 { "f48", 48 },
481 { "f49", 49 },
81d4177b 482 { "f5", 5 },
066be9f7
PB		 483 { "f50", 50 },
484 { "f51", 51 },
485 { "f52", 52 },
486 { "f53", 53 },
487 { "f54", 54 },
488 { "f55", 55 },
489 { "f56", 56 },
490 { "f57", 57 },
491 { "f58", 58 },
492 { "f59", 59 },
81d4177b 493 { "f6", 6 },
066be9f7
PB		 494 { "f60", 60 },
495 { "f61", 61 },
496 { "f62", 62 },
497 { "f63", 63 },
81d4177b
KH		 498 { "f7", 7 },
499 { "f8", 8 },
500 { "f9", 9 },
252b5132
RH		 501
502 { "fpscr", 0 },
503
c3d65c1c
BE		 504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0 },
506 { "gqr.1", 1 },
507 { "gqr.2", 2 },
508 { "gqr.3", 3 },
509 { "gqr.4", 4 },
510 { "gqr.5", 5 },
511 { "gqr.6", 6 },
512 { "gqr.7", 7 },
513 { "gqr0", 0 },
514 { "gqr1", 1 },
515 { "gqr2", 2 },
516 { "gqr3", 3 },
517 { "gqr4", 4 },
518 { "gqr5", 5 },
519 { "gqr6", 6 },
520 { "gqr7", 7 },
521
252b5132
RH		 522 { "lr", 8 }, /* Link Register */
523
524 { "pmr", 0 },
525
526 { "r.0", 0 }, /* General Purpose Registers */
527 { "r.1", 1 },
528 { "r.10", 10 },
529 { "r.11", 11 },
530 { "r.12", 12 },
531 { "r.13", 13 },
532 { "r.14", 14 },
533 { "r.15", 15 },
534 { "r.16", 16 },
535 { "r.17", 17 },
536 { "r.18", 18 },
537 { "r.19", 19 },
538 { "r.2", 2 },
539 { "r.20", 20 },
540 { "r.21", 21 },
541 { "r.22", 22 },
542 { "r.23", 23 },
543 { "r.24", 24 },
544 { "r.25", 25 },
545 { "r.26", 26 },
546 { "r.27", 27 },
547 { "r.28", 28 },
548 { "r.29", 29 },
549 { "r.3", 3 },
550 { "r.30", 30 },
551 { "r.31", 31 },
552 { "r.4", 4 },
553 { "r.5", 5 },
554 { "r.6", 6 },
555 { "r.7", 7 },
556 { "r.8", 8 },
557 { "r.9", 9 },
558
559 { "r.sp", 1 }, /* Stack Pointer */
560
561 { "r.toc", 2 }, /* Pointer to the table of contents */
562
563 { "r0", 0 }, /* More general purpose registers */
564 { "r1", 1 },
565 { "r10", 10 },
566 { "r11", 11 },
567 { "r12", 12 },
568 { "r13", 13 },
569 { "r14", 14 },
570 { "r15", 15 },
571 { "r16", 16 },
572 { "r17", 17 },
573 { "r18", 18 },
574 { "r19", 19 },
575 { "r2", 2 },
576 { "r20", 20 },
577 { "r21", 21 },
578 { "r22", 22 },
579 { "r23", 23 },
580 { "r24", 24 },
581 { "r25", 25 },
582 { "r26", 26 },
583 { "r27", 27 },
584 { "r28", 28 },
585 { "r29", 29 },
586 { "r3", 3 },
587 { "r30", 30 },
588 { "r31", 31 },
589 { "r4", 4 },
590 { "r5", 5 },
591 { "r6", 6 },
592 { "r7", 7 },
593 { "r8", 8 },
594 { "r9", 9 },
595
596 { "rtoc", 2 }, /* Table of contents */
597
598 { "sdr1", 25 }, /* Storage Description Register 1 */
599
600 { "sp", 1 },
601
602 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
603 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 604
066be9f7 605 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 606 { "v.1", 1 },
607 { "v.10", 10 },
608 { "v.11", 11 },
609 { "v.12", 12 },
610 { "v.13", 13 },
611 { "v.14", 14 },
612 { "v.15", 15 },
613 { "v.16", 16 },
614 { "v.17", 17 },
615 { "v.18", 18 },
616 { "v.19", 19 },
617 { "v.2", 2 },
618 { "v.20", 20 },
619 { "v.21", 21 },
620 { "v.22", 22 },
621 { "v.23", 23 },
622 { "v.24", 24 },
623 { "v.25", 25 },
624 { "v.26", 26 },
625 { "v.27", 27 },
626 { "v.28", 28 },
627 { "v.29", 29 },
628 { "v.3", 3 },
7a899fff
C		 629 { "v.30", 30 },
630 { "v.31", 31 },
81d4177b
KH		 631 { "v.4", 4 },
632 { "v.5", 5 },
633 { "v.6", 6 },
634 { "v.7", 7 },
635 { "v.8", 8 },
636 { "v.9", 9 },
7a899fff
C		 637
638 { "v0", 0 },
81d4177b
KH		 639 { "v1", 1 },
640 { "v10", 10 },
641 { "v11", 11 },
642 { "v12", 12 },
643 { "v13", 13 },
644 { "v14", 14 },
645 { "v15", 15 },
646 { "v16", 16 },
647 { "v17", 17 },
648 { "v18", 18 },
649 { "v19", 19 },
650 { "v2", 2 },
651 { "v20", 20 },
652 { "v21", 21 },
653 { "v22", 22 },
654 { "v23", 23 },
655 { "v24", 24 },
656 { "v25", 25 },
657 { "v26", 26 },
658 { "v27", 27 },
659 { "v28", 28 },
660 { "v29", 29 },
661 { "v3", 3 },
7a899fff
C		 662 { "v30", 30 },
663 { "v31", 31 },
81d4177b
KH		 664 { "v4", 4 },
665 { "v5", 5 },
666 { "v6", 6 },
667 { "v7", 7 },
668 { "v8", 8 },
7a899fff 669 { "v9", 9 },
252b5132 670
066be9f7
PB		 671 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.1", 1 },
673 { "vs.10", 10 },
674 { "vs.11", 11 },
675 { "vs.12", 12 },
676 { "vs.13", 13 },
677 { "vs.14", 14 },
678 { "vs.15", 15 },
679 { "vs.16", 16 },
680 { "vs.17", 17 },
681 { "vs.18", 18 },
682 { "vs.19", 19 },
683 { "vs.2", 2 },
684 { "vs.20", 20 },
685 { "vs.21", 21 },
686 { "vs.22", 22 },
687 { "vs.23", 23 },
688 { "vs.24", 24 },
689 { "vs.25", 25 },
690 { "vs.26", 26 },
691 { "vs.27", 27 },
692 { "vs.28", 28 },
693 { "vs.29", 29 },
694 { "vs.3", 3 },
695 { "vs.30", 30 },
696 { "vs.31", 31 },
697 { "vs.32", 32 },
698 { "vs.33", 33 },
699 { "vs.34", 34 },
700 { "vs.35", 35 },
701 { "vs.36", 36 },
702 { "vs.37", 37 },
703 { "vs.38", 38 },
704 { "vs.39", 39 },
705 { "vs.4", 4 },
706 { "vs.40", 40 },
707 { "vs.41", 41 },
708 { "vs.42", 42 },
709 { "vs.43", 43 },
710 { "vs.44", 44 },
711 { "vs.45", 45 },
712 { "vs.46", 46 },
713 { "vs.47", 47 },
714 { "vs.48", 48 },
715 { "vs.49", 49 },
716 { "vs.5", 5 },
717 { "vs.50", 50 },
718 { "vs.51", 51 },
719 { "vs.52", 52 },
720 { "vs.53", 53 },
721 { "vs.54", 54 },
722 { "vs.55", 55 },
723 { "vs.56", 56 },
724 { "vs.57", 57 },
725 { "vs.58", 58 },
726 { "vs.59", 59 },
727 { "vs.6", 6 },
728 { "vs.60", 60 },
729 { "vs.61", 61 },
730 { "vs.62", 62 },
731 { "vs.63", 63 },
732 { "vs.7", 7 },
733 { "vs.8", 8 },
734 { "vs.9", 9 },
735
736 { "vs0", 0 },
737 { "vs1", 1 },
738 { "vs10", 10 },
739 { "vs11", 11 },
740 { "vs12", 12 },
741 { "vs13", 13 },
742 { "vs14", 14 },
743 { "vs15", 15 },
744 { "vs16", 16 },
745 { "vs17", 17 },
746 { "vs18", 18 },
747 { "vs19", 19 },
748 { "vs2", 2 },
749 { "vs20", 20 },
750 { "vs21", 21 },
751 { "vs22", 22 },
752 { "vs23", 23 },
753 { "vs24", 24 },
754 { "vs25", 25 },
755 { "vs26", 26 },
756 { "vs27", 27 },
757 { "vs28", 28 },
758 { "vs29", 29 },
759 { "vs3", 3 },
760 { "vs30", 30 },
761 { "vs31", 31 },
762 { "vs32", 32 },
763 { "vs33", 33 },
764 { "vs34", 34 },
765 { "vs35", 35 },
766 { "vs36", 36 },
767 { "vs37", 37 },
768 { "vs38", 38 },
769 { "vs39", 39 },
770 { "vs4", 4 },
771 { "vs40", 40 },
772 { "vs41", 41 },
773 { "vs42", 42 },
774 { "vs43", 43 },
775 { "vs44", 44 },
776 { "vs45", 45 },
777 { "vs46", 46 },
778 { "vs47", 47 },
779 { "vs48", 48 },
780 { "vs49", 49 },
781 { "vs5", 5 },
782 { "vs50", 50 },
783 { "vs51", 51 },
784 { "vs52", 52 },
785 { "vs53", 53 },
786 { "vs54", 54 },
787 { "vs55", 55 },
788 { "vs56", 56 },
789 { "vs57", 57 },
790 { "vs58", 58 },
791 { "vs59", 59 },
792 { "vs6", 6 },
793 { "vs60", 60 },
794 { "vs61", 61 },
795 { "vs62", 62 },
796 { "vs63", 63 },
797 { "vs7", 7 },
798 { "vs8", 8 },
799 { "vs9", 9 },
800
252b5132
RH		 801 { "xer", 1 },
802
803};
804
bc805888 805#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 806
807/* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
809
252b5132 810static int
98027b10 811reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 812{
813 int middle, low, high;
814 int cmp;
815
816 low = 0;
817 high = regcount - 1;
818
819 do
820 {
821 middle = (low + high) / 2;
822 cmp = strcasecmp (name, regs[middle].name);
823 if (cmp < 0)
824 high = middle - 1;
825 else if (cmp > 0)
826 low = middle + 1;
827 else
828 return regs[middle].value;
829 }
830 while (low <= high);
831
832 return -1;
833}
834
835/*
99a814a1 836 * Summary of register_name.
252b5132
RH		 837 *
838 * in: Input_line_pointer points to 1st char of operand.
839 *
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
844 * original state.
845 */
846
b34976b6 847static bfd_boolean
98027b10 848register_name (expressionS *expressionP)
252b5132
RH		 849{
850 int reg_number;
851 char *name;
852 char *start;
853 char c;
854
99a814a1 855 /* Find the spelling of the operand. */
252b5132 856 start = name = input_line_pointer;
3882b010 857 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 858 name = ++input_line_pointer;
859
3882b010 860 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 861 return FALSE;
252b5132
RH		 862
863 c = get_symbol_end ();
864 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
865
468cced8
AM		 866 /* Put back the delimiting char. */
867 *input_line_pointer = c;
868
99a814a1 869 /* Look to see if it's in the register table. */
81d4177b 870 if (reg_number >= 0)
252b5132
RH		 871 {
872 expressionP->X_op = O_register;
873 expressionP->X_add_number = reg_number;
81d4177b 874
99a814a1 875 /* Make the rest nice. */
252b5132
RH		 876 expressionP->X_add_symbol = NULL;
877 expressionP->X_op_symbol = NULL;
b34976b6 878 return TRUE;
252b5132 879 }
468cced8
AM		 880
881 /* Reset the line as if we had not done anything. */
882 input_line_pointer = start;
b34976b6 883 return FALSE;
252b5132
RH		 884}
885\f
886/* This function is called for each symbol seen in an expression. It
887 handles the special parsing which PowerPC assemblers are supposed
888 to use for condition codes. */
889
890/* Whether to do the special parsing. */
b34976b6 891static bfd_boolean cr_operand;
252b5132
RH		 892
893/* Names to recognize in a condition code. This table is sorted. */
894static const struct pd_reg cr_names[] =
895{
896 { "cr0", 0 },
897 { "cr1", 1 },
898 { "cr2", 2 },
899 { "cr3", 3 },
900 { "cr4", 4 },
901 { "cr5", 5 },
902 { "cr6", 6 },
903 { "cr7", 7 },
904 { "eq", 2 },
905 { "gt", 1 },
906 { "lt", 0 },
907 { "so", 3 },
908 { "un", 3 }
909};
910
911/* Parsing function. This returns non-zero if it recognized an
912 expression. */
913
914int
91d6fa6a 915ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 916{
917 int val;
918
919 if (! cr_operand)
920 return 0;
921
13abbae3
AM		 922 if (*name == '%')
923 ++name;
252b5132
RH		 924 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
925 name);
926 if (val < 0)
927 return 0;
928
91d6fa6a
NC		 929 exp->X_op = O_constant;
930 exp->X_add_number = val;
252b5132
RH		 931
932 return 1;
933}
934\f
935/* Local variables. */
936
2b3c4602
AM		 937/* Whether to target xcoff64/elf64. */
938static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 939
252b5132
RH		 940/* Opcode hash table. */
941static struct hash_control *ppc_hash;
942
943/* Macro hash table. */
944static struct hash_control *ppc_macro_hash;
945
946#ifdef OBJ_ELF
99a814a1 947/* What type of shared library support to use. */
5d6f4f16 948static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 949
99a814a1 950/* Flags to set in the elf header. */
252b5132
RH		 951static flagword ppc_flags = 0;
952
953/* Whether this is Solaris or not. */
954#ifdef TARGET_SOLARIS_COMMENT
b34976b6 955#define SOLARIS_P TRUE
252b5132 956#else
b34976b6 957#define SOLARIS_P FALSE
252b5132
RH		 958#endif
959
b34976b6 960static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 961#endif
962
963#ifdef OBJ_XCOFF
964
965/* The RS/6000 assembler uses the .csect pseudo-op to generate code
966 using a bunch of different sections. These assembler sections,
967 however, are all encompassed within the .text or .data sections of
968 the final output file. We handle this by using different
969 subsegments within these main segments. */
970
971/* Next subsegment to allocate within the .text segment. */
972static subsegT ppc_text_subsegment = 2;
973
974/* Linked list of csects in the text section. */
975static symbolS *ppc_text_csects;
976
977/* Next subsegment to allocate within the .data segment. */
978static subsegT ppc_data_subsegment = 2;
979
980/* Linked list of csects in the data section. */
981static symbolS *ppc_data_csects;
982
983/* The current csect. */
984static symbolS *ppc_current_csect;
985
986/* The RS/6000 assembler uses a TOC which holds addresses of functions
987 and variables. Symbols are put in the TOC with the .tc pseudo-op.
988 A special relocation is used when accessing TOC entries. We handle
989 the TOC as a subsegment within the .data segment. We set it up if
990 we see a .toc pseudo-op, and save the csect symbol here. */
991static symbolS *ppc_toc_csect;
992
993/* The first frag in the TOC subsegment. */
994static fragS *ppc_toc_frag;
995
996/* The first frag in the first subsegment after the TOC in the .data
997 segment. NULL if there are no subsegments after the TOC. */
998static fragS *ppc_after_toc_frag;
999
1000/* The current static block. */
1001static symbolS *ppc_current_block;
1002
1003/* The COFF debugging section; set by md_begin. This is not the
1004 .debug section, but is instead the secret BFD section which will
1005 cause BFD to set the section number of a symbol to N_DEBUG. */
1006static asection *ppc_coff_debug_section;
1007
85645aed
TG		 1008/* Structure to set the length field of the dwarf sections. */
1009struct dw_subsection {
1010 /* Subsections are simply linked. */
1011 struct dw_subsection *link;
1012
1013 /* The subsection number. */
1014 subsegT subseg;
1015
1016 /* Expression to compute the length of the section. */
1017 expressionS end_exp;
1018};
1019
1020static struct dw_section {
1021 /* Corresponding section. */
1022 segT sect;
1023
1024 /* Simply linked list of subsections with a label. */
1025 struct dw_subsection *list_subseg;
1026
1027 /* The anonymous subsection. */
1028 struct dw_subsection *anon_subseg;
1029} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1030#endif /* OBJ_XCOFF */
1031
1032#ifdef TE_PE
1033
1034/* Various sections that we need for PE coff support. */
1035static segT ydata_section;
1036static segT pdata_section;
1037static segT reldata_section;
1038static segT rdata_section;
1039static segT tocdata_section;
1040
81d4177b 1041/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1042static segT ppc_previous_section;
1043static segT ppc_current_section;
1044
1045#endif /* TE_PE */
1046
1047#ifdef OBJ_ELF
1048symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1049#define PPC_APUINFO_ISEL 0x40
1050#define PPC_APUINFO_PMR 0x41
1051#define PPC_APUINFO_RFMCI 0x42
1052#define PPC_APUINFO_CACHELCK 0x43
1053#define PPC_APUINFO_SPE 0x100
1054#define PPC_APUINFO_EFS 0x101
1055#define PPC_APUINFO_BRLOCK 0x102
b9c361e0 1056#define PPC_APUINFO_VLE 0x104
6a0c61b7 1057
b34976b6
AM		 1058/*
1059 * We keep a list of APUinfo
6a0c61b7
EZ		 1060 */
1061unsigned long *ppc_apuinfo_list;
1062unsigned int ppc_apuinfo_num;
1063unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1064#endif /* OBJ_ELF */
1065\f
1066#ifdef OBJ_ELF
15c1449b 1067const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1068#else
15c1449b 1069const char *const md_shortopts = "um:";
252b5132 1070#endif
cef4f754 1071#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1072const struct option md_longopts[] = {
cef4f754 1073 {"nops", required_argument, NULL, OPTION_NOPS},
bf7279d5
AM		 1074 {"ppc476-workaround", no_argument, &warn_476, 1},
1075 {"no-ppc476-workaround", no_argument, &warn_476, 0},
252b5132
RH		 1076 {NULL, no_argument, NULL, 0}
1077};
15c1449b 1078const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1079
1080int
98027b10 1081md_parse_option (int c, char *arg)
252b5132 1082{
69fe9ce5
AM		 1083 ppc_cpu_t new_cpu;
1084
252b5132
RH		 1085 switch (c)
1086 {
1087 case 'u':
1088 /* -u means that any undefined symbols should be treated as
1089 external, which is the default for gas anyhow. */
1090 break;
1091
1092#ifdef OBJ_ELF
1093 case 'l':
1094 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1095 sake, recognize -be also. */
252b5132
RH		 1096 if (strcmp (arg, "e") == 0)
1097 {
1098 target_big_endian = 0;
1099 set_target_endian = 1;
b9c361e0 1100 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1101 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1102 }
1103 else
1104 return 0;
1105
1106 break;
1107
1108 case 'b':
1109 if (strcmp (arg, "e") == 0)
1110 {
1111 target_big_endian = 1;
1112 set_target_endian = 1;
1113 }
1114 else
1115 return 0;
1116
1117 break;
1118
1119 case 'K':
99a814a1 1120 /* Recognize -K PIC. */
252b5132
RH		 1121 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1122 {
1123 shlib = SHLIB_PIC;
1124 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1125 }
1126 else
1127 return 0;
1128
1129 break;
1130#endif
1131
7f6d05e8
CP		 1132 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1133 case 'a':
1134 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1135 {
1136#ifdef BFD64
1137 ppc_obj64 = 1;
d6ed37ed
AM		 1138 if (ppc_cpu & PPC_OPCODE_VLE)
1139 as_bad (_("the use of -mvle requires -a32."));
2a98c3a6
AM		 1140#else
1141 as_fatal (_("%s unsupported"), "-a64");
1142#endif
1143 }
7f6d05e8 1144 else if (strcmp (arg, "32") == 0)
2b3c4602 1145 ppc_obj64 = 0;
7f6d05e8
CP		 1146 else
1147 return 0;
1148 break;
81d4177b 1149
252b5132 1150 case 'm':
776fc418 1151 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
b9c361e0
JL		 1152 if (new_cpu != 0)
1153 {
1154 ppc_cpu = new_cpu;
d6ed37ed
AM		 1155 if (strcmp (arg, "vle") == 0)
1156 {
1157 if (set_target_endian && target_big_endian == 0)
1158 as_bad (_("the use of -mvle requires big endian."));
1159 if (ppc_obj64)
1160 as_bad (_("the use of -mvle requires -a32."));
1161 }
b9c361e0 1162 }
252b5132
RH		 1163
1164 else if (strcmp (arg, "regnames") == 0)
b34976b6 1165 reg_names_p = TRUE;
252b5132
RH		 1166
1167 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1168 reg_names_p = FALSE;
252b5132
RH		 1169
1170#ifdef OBJ_ELF
99a814a1
AM		 1171 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1172 that require relocation. */
252b5132
RH		 1173 else if (strcmp (arg, "relocatable") == 0)
1174 {
5d6f4f16 1175 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1176 ppc_flags |= EF_PPC_RELOCATABLE;
1177 }
1178
1179 else if (strcmp (arg, "relocatable-lib") == 0)
1180 {
5d6f4f16 1181 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1182 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1183 }
1184
99a814a1 1185 /* -memb, set embedded bit. */
252b5132
RH		 1186 else if (strcmp (arg, "emb") == 0)
1187 ppc_flags |= EF_PPC_EMB;
1188
cc643b88 1189 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1190 else if (strcmp (arg, "little") == 0
1191 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1192 {
1193 target_big_endian = 0;
1194 set_target_endian = 1;
b9c361e0 1195 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1196 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1197 }
1198
1199 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1200 {
1201 target_big_endian = 1;
1202 set_target_endian = 1;
1203 }
1204
1205 else if (strcmp (arg, "solaris") == 0)
1206 {
b34976b6 1207 msolaris = TRUE;
252b5132
RH		 1208 ppc_comment_chars = ppc_solaris_comment_chars;
1209 }
1210
1211 else if (strcmp (arg, "no-solaris") == 0)
1212 {
b34976b6 1213 msolaris = FALSE;
252b5132
RH		 1214 ppc_comment_chars = ppc_eabi_comment_chars;
1215 }
1216#endif
1217 else
1218 {
1219 as_bad (_("invalid switch -m%s"), arg);
1220 return 0;
1221 }
1222 break;
1223
1224#ifdef OBJ_ELF
1225 /* -V: SVR4 argument to print version ID. */
1226 case 'V':
1227 print_version_id ();
1228 break;
1229
1230 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1231 should be emitted or not. FIXME: Not implemented. */
1232 case 'Q':
1233 break;
1234
1235 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1236 rather than .stabs.excl, which is ignored by the linker.
1237 FIXME: Not implemented. */
1238 case 's':
1239 if (arg)
1240 return 0;
1241
1242 break;
1243#endif
1244
cef4f754
AM		 1245 case OPTION_NOPS:
1246 {
1247 char *end;
1248 nop_limit = strtoul (optarg, &end, 0);
1249 if (*end)
1250 as_bad (_("--nops needs a numeric argument"));
1251 }
1252 break;
85645aed 1253
bf7279d5
AM		 1254 case 0:
1255 break;
1256
252b5132
RH		 1257 default:
1258 return 0;
1259 }
1260
1261 return 1;
1262}
1263
1264void
98027b10 1265md_show_usage (FILE *stream)
252b5132 1266{
bc805888 1267 fprintf (stream, _("\
252b5132 1268PowerPC options:\n\
ce3d2015
AM		 1269-a32 generate ELF32/XCOFF32\n\
1270-a64 generate ELF64/XCOFF64\n\
1271-u ignored\n\
1272-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1273-mpwr generate code for POWER (RIOS1)\n\
1274-m601 generate code for PowerPC 601\n\
418c1742 1275-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1276 generate code for PowerPC 603/604\n\
1277-m403 generate code for PowerPC 403\n\
1278-m405 generate code for PowerPC 405\n\
1279-m440 generate code for PowerPC 440\n\
1280-m464 generate code for PowerPC 464\n\
1281-m476 generate code for PowerPC 476\n\
f5c120c5 1282-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1283 generate code for PowerPC 7400/7410/7450/7455\n\
1284-m750cl generate code for PowerPC 750cl\n"));
df12615d 1285 fprintf (stream, _("\
ce3d2015
AM		 1286-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1287-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1288-mbooke generate code for 32-bit PowerPC BookE\n\
1289-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1290-mpower4, -mpwr4 generate code for Power4 architecture\n\
1291-mpower5, -mpwr5, -mpwr5x\n\
1292 generate code for Power5 architecture\n\
1293-mpower6, -mpwr6 generate code for Power6 architecture\n\
1294-mpower7, -mpwr7 generate code for Power7 architecture\n\
5817ffd1 1295-mpower8, -mpwr8 generate code for Power8 architecture\n\
ce3d2015
AM		 1296-mcell generate code for Cell Broadband Engine architecture\n\
1297-mcom generate code Power/PowerPC common instructions\n\
1298-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1299 fprintf (stream, _("\
ce3d2015
AM		 1300-maltivec generate code for AltiVec\n\
1301-mvsx generate code for Vector-Scalar (VSX) instructions\n\
5817ffd1 1302-mhtm generate code for Hardware Transactional Memory\n\
ce3d2015
AM		 1303-me300 generate code for PowerPC e300 family\n\
1304-me500, -me500x2 generate code for Motorola e500 core complex\n\
1305-me500mc, generate code for Freescale e500mc core complex\n\
1306-me500mc64, generate code for Freescale e500mc64 core complex\n\
aea77599
AM		 1307-me5500, generate code for Freescale e5500 core complex\n\
1308-me6500, generate code for Freescale e6500 core complex\n\
ce3d2015 1309-mspe generate code for Motorola SPE instructions\n\
b9c361e0 1310-mvle generate code for Freescale VLE instructions\n\
ce3d2015
AM		 1311-mtitan generate code for AppliedMicro Titan core complex\n\
1312-mregnames Allow symbolic names for registers\n\
1313-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1314#ifdef OBJ_ELF
bc805888 1315 fprintf (stream, _("\
ce3d2015
AM		 1316-mrelocatable support for GCC's -mrelocatble option\n\
1317-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1318-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1319-mlittle, -mlittle-endian, -le\n\
ce3d2015 1320 generate code for a little endian machine\n\
b8b738ac 1321-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1322 generate code for a big endian machine\n\
1323-msolaris generate code for Solaris\n\
1324-mno-solaris do not generate code for Solaris\n\
b8b738ac 1325-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1326-V print assembler version number\n\
1327-Qy, -Qn ignored\n"));
252b5132 1328#endif
cef4f754 1329 fprintf (stream, _("\
bf7279d5
AM		 1330-nops=count when aligning, more than COUNT nops uses a branch\n\
1331-ppc476-workaround warn if emitting data to code sections\n"));
252b5132
RH		 1332}
1333\f
1334/* Set ppc_cpu if it is not already set. */
1335
1336static void
98027b10 1337ppc_set_cpu (void)
252b5132
RH		 1338{
1339 const char *default_os = TARGET_OS;
1340 const char *default_cpu = TARGET_CPU;
1341
7102e95e 1342 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1343 {
2a98c3a6 1344 if (ppc_obj64)
bdc70b4a 1345 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1346 else if (strncmp (default_os, "aix", 3) == 0
1347 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1348 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1349 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1350 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1351 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1352 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1353 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1354 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1355 else
d6ed37ed 1356 as_fatal (_("unknown default cpu = %s, os = %s"),
99a814a1 1357 default_cpu, default_os);
252b5132
RH		 1358 }
1359}
1360
9232bbb0
AM		 1361/* Figure out the BFD architecture to use. This function and ppc_mach
1362 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1363
1364enum bfd_architecture
98027b10 1365ppc_arch (void)
252b5132
RH		 1366{
1367 const char *default_cpu = TARGET_CPU;
1368 ppc_set_cpu ();
1369
1370 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1371 return bfd_arch_powerpc;
b9c361e0
JL		 1372 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1373 return bfd_arch_powerpc;
1374 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
252b5132 1375 return bfd_arch_rs6000;
b9c361e0 1376 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
252b5132
RH		 1377 {
1378 if (strcmp (default_cpu, "rs6000") == 0)
1379 return bfd_arch_rs6000;
0baf16f2 1380 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1381 return bfd_arch_powerpc;
1382 }
1383
d6ed37ed 1384 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
252b5132
RH		 1385 return bfd_arch_unknown;
1386}
1387
7f6d05e8 1388unsigned long
98027b10 1389ppc_mach (void)
7f6d05e8 1390{
2a98c3a6
AM		 1391 if (ppc_obj64)
1392 return bfd_mach_ppc64;
1393 else if (ppc_arch () == bfd_arch_rs6000)
1394 return bfd_mach_rs6k;
ce3d2015
AM		 1395 else if (ppc_cpu & PPC_OPCODE_TITAN)
1396 return bfd_mach_ppc_titan;
b9c361e0
JL		 1397 else if (ppc_cpu & PPC_OPCODE_VLE)
1398 return bfd_mach_ppc_vle;
2a98c3a6
AM		 1399 else
1400 return bfd_mach_ppc;
7f6d05e8
CP		 1401}
1402
81d4177b 1403extern char*
98027b10 1404ppc_target_format (void)
7f6d05e8
CP		 1405{
1406#ifdef OBJ_COFF
1407#ifdef TE_PE
99a814a1 1408 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1409#elif TE_POWERMAC
0baf16f2 1410 return "xcoff-powermac";
7f6d05e8 1411#else
eb1e0e80 1412# ifdef TE_AIX5
edc1d652 1413 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1414# else
edc1d652 1415 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1416# endif
7f6d05e8 1417#endif
7f6d05e8
CP		 1418#endif
1419#ifdef OBJ_ELF
edc1d652
AM		 1420# ifdef TE_FreeBSD
1421 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1422# elif defined (TE_VXWORKS)
9d8504b1
PB		 1423 return "elf32-powerpc-vxworks";
1424# else
0baf16f2 1425 return (target_big_endian
2b3c4602
AM		 1426 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1427 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1428# endif
7f6d05e8
CP		 1429#endif
1430}
1431
b9c361e0
JL		 1432/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1433 Return TRUE if there's a problem, otherwise FALSE. */
1434
1435static bfd_boolean
1436insn_validate (const struct powerpc_opcode *op)
1437{
1438 const unsigned char *o;
1439 unsigned long omask = op->mask;
1440
1441 /* The mask had better not trim off opcode bits. */
1442 if ((op->opcode & omask) != op->opcode)
1443 {
1444 as_bad (_("mask trims opcode bits for %s"), op->name);
1445 return TRUE;
1446 }
1447
1448 /* The operands must not overlap the opcode or each other. */
1449 for (o = op->operands; *o; ++o)
1450 {
1451 if (*o >= num_powerpc_operands)
1452 {
1453 as_bad (_("operand index error for %s"), op->name);
1454 return TRUE;
1455 }
1456 else
1457 {
1458 const struct powerpc_operand *operand = &powerpc_operands[*o];
1459 if (operand->shift != PPC_OPSHIFT_INV)
1460 {
1461 unsigned long mask;
1462
1463 if (operand->shift >= 0)
1464 mask = operand->bitm << operand->shift;
1465 else
1466 mask = operand->bitm >> -operand->shift;
1467 if (omask & mask)
1468 {
1469 as_bad (_("operand %d overlap in %s"),
1470 (int) (o - op->operands), op->name);
1471 return TRUE;
1472 }
1473 omask |= mask;
1474 }
1475 }
1476 }
1477 return FALSE;
1478}
1479
69c040df 1480/* Insert opcodes and macros into hash tables. Called at startup and
1fe532cf 1481 for .machine pseudo. */
252b5132 1482
69c040df
AM		 1483static void
1484ppc_setup_opcodes (void)
252b5132 1485{
98027b10 1486 const struct powerpc_opcode *op;
252b5132
RH		 1487 const struct powerpc_opcode *op_end;
1488 const struct powerpc_macro *macro;
1489 const struct powerpc_macro *macro_end;
b84bf58a 1490 bfd_boolean bad_insn = FALSE;
252b5132 1491
69c040df
AM		 1492 if (ppc_hash != NULL)
1493 hash_die (ppc_hash);
1494 if (ppc_macro_hash != NULL)
1495 hash_die (ppc_macro_hash);
252b5132
RH		 1496
1497 /* Insert the opcodes into a hash table. */
1498 ppc_hash = hash_new ();
1499
c43a438d 1500 if (ENABLE_CHECKING)
b84bf58a 1501 {
c43a438d 1502 unsigned int i;
b84bf58a 1503
3b8b57a9
AM		 1504 /* An index into powerpc_operands is stored in struct fix
1505 fx_pcrel_adjust which is 8 bits wide. */
1506 gas_assert (num_powerpc_operands < 256);
1507
c43a438d
AM		 1508 /* Check operand masks. Code here and in the disassembler assumes
1509 all the 1's in the mask are contiguous. */
1510 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1511 {
c43a438d
AM		 1512 unsigned long mask = powerpc_operands[i].bitm;
1513 unsigned long right_bit;
1514 unsigned int j;
1515
1516 right_bit = mask & -mask;
1517 mask += right_bit;
1518 right_bit = mask & -mask;
1519 if (mask != right_bit)
1520 {
1521 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1522 bad_insn = TRUE;
1523 }
1524 for (j = i + 1; j < num_powerpc_operands; ++j)
1525 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1526 sizeof (powerpc_operands[0])) == 0)
1527 {
1528 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1529 j, i);
1530 bad_insn = TRUE;
1531 }
b84bf58a
AM		 1532 }
1533 }
1534
252b5132
RH		 1535 op_end = powerpc_opcodes + powerpc_num_opcodes;
1536 for (op = powerpc_opcodes; op < op_end; op++)
1537 {
c43a438d 1538 if (ENABLE_CHECKING)
b84bf58a 1539 {
d815f1a9 1540 if (op != powerpc_opcodes)
8dbcd839 1541 {
b9c361e0
JL		 1542 int old_opcode = PPC_OP (op[-1].opcode);
1543 int new_opcode = PPC_OP (op[0].opcode);
1544
1545#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1546 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1547 op->name, (unsigned int) (op - powerpc_opcodes),
1548 (unsigned int) new_opcode, (unsigned int) op->opcode,
1549 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1550#endif
1551
d815f1a9
AM		 1552 /* The major opcodes had better be sorted. Code in the
1553 disassembler assumes the insns are sorted according to
1554 major opcode. */
b9c361e0 1555 if (new_opcode < old_opcode)
d815f1a9
AM		 1556 {
1557 as_bad (_("major opcode is not sorted for %s"),
1558 op->name);
1559 bad_insn = TRUE;
1560 }
8dbcd839 1561 }
b9c361e0
JL		 1562 bad_insn |= insn_validate (op);
1563 }
c43a438d 1564
b9c361e0
JL		 1565 if ((ppc_cpu & op->flags) != 0
1566 && !(ppc_cpu & op->deprecated))
1567 {
1568 const char *retval;
1569
1570 retval = hash_insert (ppc_hash, op->name, (void *) op);
1571 if (retval != NULL)
c43a438d 1572 {
b9c361e0 1573 as_bad (_("duplicate instruction %s"),
c43a438d
AM		 1574 op->name);
1575 bad_insn = TRUE;
1576 }
b9c361e0
JL		 1577 }
1578 }
c43a438d 1579
b9c361e0
JL		 1580 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1581 for (op = powerpc_opcodes; op < op_end; op++)
1582 hash_insert (ppc_hash, op->name, (void *) op);
1583
1584 op_end = vle_opcodes + vle_num_opcodes;
1585 for (op = vle_opcodes; op < op_end; op++)
1586 {
1587 if (ENABLE_CHECKING)
1588 {
1589 if (op != vle_opcodes)
1590 {
1591 unsigned old_seg, new_seg;
1592
1593 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1594 old_seg = VLE_OP_TO_SEG (old_seg);
1595 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1596 new_seg = VLE_OP_TO_SEG (new_seg);
1597
1598#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1599 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1600 op->name, (unsigned int) (op - powerpc_opcodes),
1601 (unsigned int) new_seg, (unsigned int) op->opcode,
1602 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1603#endif
1604 /* The major opcodes had better be sorted. Code in the
1605 disassembler assumes the insns are sorted according to
1606 major opcode. */
1607 if (new_seg < old_seg)
1608 {
1609 as_bad (_("major opcode is not sorted for %s"),
1610 op->name);
1611 bad_insn = TRUE;
1612 }
1613 }
1614
1615 bad_insn |= insn_validate (op);
c43a438d 1616 }
252b5132 1617
bdc70b4a 1618 if ((ppc_cpu & op->flags) != 0
1cb0a767 1619 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1620 {
1621 const char *retval;
1622
98027b10 1623 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1624 if (retval != NULL)
252b5132 1625 {
b84bf58a 1626 as_bad (_("duplicate instruction %s"),
99a814a1 1627 op->name);
b84bf58a 1628 bad_insn = TRUE;
252b5132
RH		 1629 }
1630 }
1631 }
1632
b9c361e0
JL		 1633 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1634 for (op = vle_opcodes; op < op_end; op++)
98027b10 1635 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1636
252b5132
RH		 1637 /* Insert the macros into a hash table. */
1638 ppc_macro_hash = hash_new ();
1639
1640 macro_end = powerpc_macros + powerpc_num_macros;
1641 for (macro = powerpc_macros; macro < macro_end; macro++)
1642 {
33740db9 1643 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1644 {
1645 const char *retval;
1646
98027b10 1647 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1648 if (retval != (const char *) NULL)
1649 {
b84bf58a
AM		 1650 as_bad (_("duplicate macro %s"), macro->name);
1651 bad_insn = TRUE;
252b5132
RH		 1652 }
1653 }
1654 }
1655
b84bf58a 1656 if (bad_insn)
252b5132 1657 abort ();
69c040df
AM		 1658}
1659
1660/* This function is called when the assembler starts up. It is called
1661 after the options have been parsed and the output file has been
1662 opened. */
1663
1664void
98027b10 1665md_begin (void)
69c040df
AM		 1666{
1667 ppc_set_cpu ();
1668
1669 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
8fbf7334 1670 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
69c040df
AM		 1671
1672#ifdef OBJ_ELF
1673 /* Set the ELF flags if desired. */
1674 if (ppc_flags && !msolaris)
1675 bfd_set_private_flags (stdoutput, ppc_flags);
1676#endif
1677
1678 ppc_setup_opcodes ();
252b5132 1679
67c1ffbe 1680 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1681 by the user. */
252b5132
RH		 1682 if (!set_target_endian)
1683 {
1684 set_target_endian = 1;
1685 target_big_endian = PPC_BIG_ENDIAN;
1686 }
1687
1688#ifdef OBJ_XCOFF
1689 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1690
1691 /* Create dummy symbols to serve as initial csects. This forces the
1692 text csects to precede the data csects. These symbols will not
1693 be output. */
1694 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1695 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1696 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1697 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1698#endif
1699
1700#ifdef TE_PE
1701
1702 ppc_current_section = text_section;
81d4177b 1703 ppc_previous_section = 0;
252b5132
RH		 1704
1705#endif
1706}
1707
6a0c61b7 1708void
98027b10 1709ppc_cleanup (void)
6a0c61b7 1710{
dc1d03fc 1711#ifdef OBJ_ELF
6a0c61b7
EZ		 1712 if (ppc_apuinfo_list == NULL)
1713 return;
1714
1715 /* Ok, so write the section info out. We have this layout:
1716
1717 byte data what
1718 ---- ---- ----
1719 0 8 length of "APUinfo\0"
1720 4 (n*4) number of APU's (4 bytes each)
1721 8 2 note type 2
1722 12 "APUinfo\0" name
1723 20 APU#1 first APU's info
1724 24 APU#2 second APU's info
1725 ... ...
1726 */
1727 {
1728 char *p;
1729 asection *seg = now_seg;
1730 subsegT subseg = now_subseg;
1731 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1732 unsigned int i;
6a0c61b7
EZ		 1733
1734 /* Create the .PPC.EMB.apuinfo section. */
1735 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1736 bfd_set_section_flags (stdoutput,
1737 apuinfo_secp,
e1a9cb8e 1738 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1739
1740 p = frag_more (4);
1741 md_number_to_chars (p, (valueT) 8, 4);
1742
1743 p = frag_more (4);
e98d298c 1744 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1745
1746 p = frag_more (4);
1747 md_number_to_chars (p, (valueT) 2, 4);
1748
1749 p = frag_more (8);
1750 strcpy (p, "APUinfo");
1751
1752 for (i = 0; i < ppc_apuinfo_num; i++)
1753 {
b34976b6
AM		 1754 p = frag_more (4);
1755 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1756 }
1757
1758 frag_align (2, 0, 0);
1759
1760 /* We probably can't restore the current segment, for there likely
1761 isn't one yet... */
1762 if (seg && subseg)
1763 subseg_set (seg, subseg);
1764 }
dc1d03fc 1765#endif
6a0c61b7
EZ		 1766}
1767
252b5132
RH		 1768/* Insert an operand value into an instruction. */
1769
1770static unsigned long
a1867a27
AM		 1771ppc_insert_operand (unsigned long insn,
1772 const struct powerpc_operand *operand,
1773 offsetT val,
91d6fa6a 1774 ppc_cpu_t cpu,
a1867a27
AM		 1775 char *file,
1776 unsigned int line)
252b5132 1777{
b84bf58a 1778 long min, max, right;
eb42fac1 1779
b84bf58a
AM		 1780 max = operand->bitm;
1781 right = max & -max;
1782 min = 0;
1783
1784 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1785 {
b84bf58a 1786 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1787 max = (max >> 1) & -right;
1788 min = ~max & -right;
b84bf58a 1789 }
252b5132 1790
b84bf58a 1791 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1792 max++;
252b5132 1793
b84bf58a 1794 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1795 {
1796 long tmp = min;
1797 min = -max;
1798 max = -tmp;
1799 }
b84bf58a 1800
a1867a27
AM		 1801 if (min <= max)
1802 {
1803 /* Some people write constants with the sign extension done by
1804 hand but only up to 32 bits. This shouldn't really be valid,
1805 but, to permit this code to assemble on a 64-bit host, we
1806 sign extend the 32-bit value to 64 bits if so doing makes the
1807 value valid. */
1808 if (val > max
1809 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1810 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1811 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1812 val = val - 0x80000000 - 0x80000000;
1813
1814 /* Similarly, people write expressions like ~(1<<15), and expect
1815 this to be OK for a 32-bit unsigned value. */
1816 else if (val < min
1817 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1818 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1819 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1820 val = val + 0x80000000 + 0x80000000;
1821
1822 else if (val < min
1823 || val > max
1824 || (val & (right - 1)) != 0)
1825 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1826 }
b84bf58a 1827
252b5132
RH		 1828 if (operand->insert)
1829 {
1830 const char *errmsg;
1831
1832 errmsg = NULL;
91d6fa6a 1833 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1834 if (errmsg != (const char *) NULL)
ee2c9aa9 1835 as_bad_where (file, line, "%s", errmsg);
252b5132 1836 }
b9c361e0 1837 else if (operand->shift >= 0)
b84bf58a 1838 insn |= ((long) val & operand->bitm) << operand->shift;
b9c361e0
JL		 1839 else
1840 insn |= ((long) val & operand->bitm) >> -operand->shift;
252b5132
RH		 1841
1842 return insn;
1843}
1844
1845\f
1846#ifdef OBJ_ELF
1847/* Parse @got, etc. and return the desired relocation. */
1848static bfd_reloc_code_real_type
98027b10 1849ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1850{
1851 struct map_bfd {
1852 char *string;
b7d7dc63
AM		 1853 unsigned int length : 8;
1854 unsigned int valid32 : 1;
1855 unsigned int valid64 : 1;
1856 unsigned int reloc;
252b5132
RH		 1857 };
1858
1859 char ident[20];
1860 char *str = *str_p;
1861 char *str2;
1862 int ch;
1863 int len;
15c1449b 1864 const struct map_bfd *ptr;
252b5132 1865
b7d7dc63
AM		 1866#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1867#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1868#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1869
15c1449b 1870 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1871 MAP ("l", BFD_RELOC_LO16),
1872 MAP ("h", BFD_RELOC_HI16),
1873 MAP ("ha", BFD_RELOC_HI16_S),
1874 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1875 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1876 MAP ("got", BFD_RELOC_16_GOTOFF),
1877 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1878 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1879 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1880 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1881 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1882 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1883 MAP ("copy", BFD_RELOC_PPC_COPY),
1884 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1885 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1886 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1887 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1888 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1889 MAP ("tls", BFD_RELOC_PPC_TLS),
1890 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1891 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1892 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1893 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1894 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1895 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1896 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1897 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1898 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1899 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1900 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1901 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1902 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1903 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1904 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1905 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1906 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1907 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1908 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1909 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1910 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1911 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1912 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1913 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1914 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1915 MAP32 ("fixup", BFD_RELOC_CTOR),
1916 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1917 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1918 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1919 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1920 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1921 MAP32 ("sdarel", BFD_RELOC_GPREL16),
b9c361e0
JL		 1922 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1923 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1924 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
b7d7dc63
AM		 1925 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1926 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1927 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1928 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1929 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1930 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1931 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1932 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1933 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
b9c361e0 1934 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
b7d7dc63
AM		 1935 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1936 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1937 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1938 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1939 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1940 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1941 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1942 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
f9c6b907
AM		 1943 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1944 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
b7d7dc63
AM		 1945 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1946 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1947 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1948 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1949 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1950 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1951 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1952 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1953 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
f9c6b907
AM		 1954 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1955 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
b7d7dc63
AM		 1956 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1957 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1958 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1959 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
45965137 1960 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
f9c6b907
AM		 1961 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1962 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
b7d7dc63
AM		 1963 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1964 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1965 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1966 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
62ebcb5c 1967 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
252b5132
RH		 1968 };
1969
1970 if (*str++ != '@')
62ebcb5c 1971 return BFD_RELOC_NONE;
252b5132
RH		 1972
1973 for (ch = *str, str2 = ident;
1974 (str2 < ident + sizeof (ident) - 1
3882b010 1975 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1976 ch = *++str)
1977 {
3882b010 1978 *str2++ = TOLOWER (ch);
252b5132
RH		 1979 }
1980
1981 *str2 = '\0';
1982 len = str2 - ident;
1983
1984 ch = ident[0];
1985 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1986 if (ch == ptr->string[0]
1987 && len == ptr->length
b7d7dc63
AM		 1988 && memcmp (ident, ptr->string, ptr->length) == 0
1989 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1990 {
15c1449b
AM		 1991 int reloc = ptr->reloc;
1992
727fc41e
AM		 1993 if (!ppc_obj64 && exp_p->X_add_number != 0)
1994 {
1995 switch (reloc)
1996 {
1997 case BFD_RELOC_16_GOTOFF:
1998 case BFD_RELOC_LO16_GOTOFF:
1999 case BFD_RELOC_HI16_GOTOFF:
2000 case BFD_RELOC_HI16_S_GOTOFF:
2001 as_warn (_("identifier+constant@got means "
2002 "identifier@got+constant"));
2003 break;
2004
2005 case BFD_RELOC_PPC_GOT_TLSGD16:
2006 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2007 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2008 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2009 case BFD_RELOC_PPC_GOT_TLSLD16:
2010 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2011 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2012 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2013 case BFD_RELOC_PPC_GOT_DTPREL16:
2014 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2015 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2016 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2017 case BFD_RELOC_PPC_GOT_TPREL16:
2018 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2019 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2020 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2021 as_bad (_("symbol+offset not supported for got tls"));
2022 break;
2023 }
2024 }
5f6db75a
AM		 2025
2026 /* Now check for identifier@suffix+constant. */
2027 if (*str == '-' || *str == '+')
252b5132 2028 {
5f6db75a
AM		 2029 char *orig_line = input_line_pointer;
2030 expressionS new_exp;
2031
2032 input_line_pointer = str;
2033 expression (&new_exp);
2034 if (new_exp.X_op == O_constant)
252b5132 2035 {
5f6db75a
AM		 2036 exp_p->X_add_number += new_exp.X_add_number;
2037 str = input_line_pointer;
252b5132 2038 }
5f6db75a
AM		 2039
2040 if (&input_line_pointer != str_p)
2041 input_line_pointer = orig_line;
252b5132 2042 }
252b5132 2043 *str_p = str;
0baf16f2 2044
2b3c4602 2045 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 2046 && exp_p->X_op == O_symbol
2047 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 2048 {
9f2b53d7
AM		 2049 /* Change the symbol so that the dummy .TOC. symbol can be
2050 omitted from the object file. */
0baf16f2
AM		 2051 exp_p->X_add_symbol = &abs_symbol;
2052 }
2053
15c1449b 2054 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 2055 }
2056
62ebcb5c 2057 return BFD_RELOC_NONE;
252b5132
RH		 2058}
2059
62ebcb5c 2060/* Support @got, etc. on constants emitted via .short, .int etc. */
99a814a1 2061
62ebcb5c
AM		 2062bfd_reloc_code_real_type
2063ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2064{
2065 expression (exp);
2066 if (nbytes >= 2 && *input_line_pointer == '@')
2067 return ppc_elf_suffix (&input_line_pointer, exp);
2068 return BFD_RELOC_NONE;
252b5132
RH		 2069}
2070
bf7279d5
AM		 2071/* Warn when emitting data to code sections, unless we are emitting
2072 a relocation that ld --ppc476-workaround uses to recognise data
2073 *and* there was an unconditional branch prior to the data. */
2074
2075void
2076ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2077 unsigned int nbytes, fixS *fix)
2078{
2079 if (warn_476
2080 && (now_seg->flags & SEC_CODE) != 0
2081 && (nbytes != 4
2082 || fix == NULL
2083 || !(fix->fx_r_type == BFD_RELOC_32
2084 || fix->fx_r_type == BFD_RELOC_CTOR
2085 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2086 || !(last_seg == now_seg && last_subseg == now_subseg)
2087 || !((last_insn & (0x3f << 26)) == (18u << 26)
2088 || ((last_insn & (0x3f << 26)) == (16u << 26)
2089 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2090 || ((last_insn & (0x3f << 26)) == (19u << 26)
2091 && (last_insn & (0x3ff << 1)) == (16u << 1)
2092 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2093 {
2094 /* Flag that we've warned. */
2095 if (fix != NULL)
2096 fix->fx_tcbit = 1;
2097
2098 as_warn (_("data in executable section"));
2099 }
2100}
2101
252b5132
RH		 2102/* Solaris pseduo op to change to the .rodata section. */
2103static void
98027b10 2104ppc_elf_rdata (int xxx)
252b5132
RH		 2105{
2106 char *save_line = input_line_pointer;
2107 static char section[] = ".rodata\n";
2108
99a814a1 2109 /* Just pretend this is .section .rodata */
252b5132
RH		 2110 input_line_pointer = section;
2111 obj_elf_section (xxx);
2112
2113 input_line_pointer = save_line;
2114}
2115
99a814a1 2116/* Pseudo op to make file scope bss items. */
252b5132 2117static void
98027b10 2118ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2119{
98027b10
AM		 2120 char *name;
2121 char c;
2122 char *p;
252b5132 2123 offsetT size;
98027b10 2124 symbolS *symbolP;
252b5132
RH		 2125 offsetT align;
2126 segT old_sec;
2127 int old_subsec;
2128 char *pfrag;
2129 int align2;
2130
2131 name = input_line_pointer;
2132 c = get_symbol_end ();
2133
99a814a1 2134 /* just after name is now '\0'. */
252b5132
RH		 2135 p = input_line_pointer;
2136 *p = c;
2137 SKIP_WHITESPACE ();
2138 if (*input_line_pointer != ',')
2139 {
d6ed37ed 2140 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 2141 ignore_rest_of_line ();
2142 return;
2143 }
2144
2145 input_line_pointer++; /* skip ',' */
2146 if ((size = get_absolute_expression ()) < 0)
2147 {
2148 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2149 ignore_rest_of_line ();
2150 return;
2151 }
2152
2153 /* The third argument to .lcomm is the alignment. */
2154 if (*input_line_pointer != ',')
2155 align = 8;
2156 else
2157 {
2158 ++input_line_pointer;
2159 align = get_absolute_expression ();
2160 if (align <= 0)
2161 {
2162 as_warn (_("ignoring bad alignment"));
2163 align = 8;
2164 }
2165 }
2166
2167 *p = 0;
2168 symbolP = symbol_find_or_make (name);
2169 *p = c;
2170
2171 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2172 {
d6ed37ed 2173 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 2174 S_GET_NAME (symbolP));
2175 ignore_rest_of_line ();
2176 return;
2177 }
2178
2179 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2180 {
d6ed37ed 2181 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 2182 S_GET_NAME (symbolP),
2183 (long) S_GET_VALUE (symbolP),
2184 (long) size);
2185
2186 ignore_rest_of_line ();
2187 return;
2188 }
2189
99a814a1 2190 /* Allocate_bss. */
252b5132
RH		 2191 old_sec = now_seg;
2192 old_subsec = now_subseg;
2193 if (align)
2194 {
99a814a1 2195 /* Convert to a power of 2 alignment. */
252b5132
RH		 2196 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2197 if (align != 1)
2198 {
d6ed37ed 2199 as_bad (_("common alignment not a power of 2"));
252b5132
RH		 2200 ignore_rest_of_line ();
2201 return;
2202 }
2203 }
2204 else
2205 align2 = 0;
2206
2207 record_alignment (bss_section, align2);
cbe02d4f 2208 subseg_set (bss_section, 1);
252b5132
RH		 2209 if (align2)
2210 frag_align (align2, 0, 0);
2211 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2212 symbol_get_frag (symbolP)->fr_symbol = 0;
2213 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2214 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2215 (char *) 0);
2216 *pfrag = 0;
2217 S_SET_SIZE (symbolP, size);
2218 S_SET_SEGMENT (symbolP, bss_section);
2219 subseg_set (old_sec, old_subsec);
2220 demand_empty_rest_of_line ();
2221}
2222
6911b7dc
AM		 2223/* Pseudo op to set symbol local entry point. */
2224static void
2225ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2226{
2227 char *name = input_line_pointer;
2228 char c = get_symbol_end ();
2229 char *p;
2230 expressionS exp;
2231 symbolS *sym;
2232 asymbol *bfdsym;
2233 elf_symbol_type *elfsym;
2234
2235 p = input_line_pointer;
2236 *p = c;
2237 SKIP_WHITESPACE ();
2238 if (*input_line_pointer != ',')
2239 {
2240 *p = 0;
2241 as_bad (_("expected comma after name `%s' in .localentry directive"),
2242 name);
2243 *p = c;
2244 ignore_rest_of_line ();
2245 return;
2246 }
2247 input_line_pointer++;
2248 expression (&exp);
2249 if (exp.X_op == O_absent)
2250 {
2251 as_bad (_("missing expression in .localentry directive"));
2252 exp.X_op = O_constant;
2253 exp.X_add_number = 0;
2254 }
2255 *p = 0;
2256 sym = symbol_find_or_make (name);
2257 *p = c;
2258
2259 if (resolve_expression (&exp)
2260 && exp.X_op == O_constant)
2261 {
2262 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2263
e2b5892e 2264 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
6911b7dc
AM		 2265 as_bad (_(".localentry expression for `%s' "
2266 "is not a valid power of 2"), S_GET_NAME (sym));
2267 else
2268 {
2269 bfdsym = symbol_get_bfdsym (sym);
2270 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2271 gas_assert (elfsym);
2272 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2273 elfsym->internal_elf_sym.st_other |= encoded;
2274 if (ppc_abiversion == 0)
2275 ppc_abiversion = 2;
2276 }
2277 }
2278 else
2279 as_bad (_(".localentry expression for `%s' "
2280 "does not evaluate to a constant"), S_GET_NAME (sym));
2281
2282 demand_empty_rest_of_line ();
2283}
2284
ee67d69a
AM		 2285/* Pseudo op to set ABI version. */
2286static void
2287ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2288{
2289 expressionS exp;
2290
2291 expression (&exp);
2292 if (exp.X_op == O_absent)
2293 {
2294 as_bad (_("missing expression in .abiversion directive"));
2295 exp.X_op = O_constant;
2296 exp.X_add_number = 0;
2297 }
2298
2299 if (resolve_expression (&exp)
2300 && exp.X_op == O_constant)
2301 ppc_abiversion = exp.X_add_number;
2302 else
2303 as_bad (_(".abiversion expression does not evaluate to a constant"));
2304 demand_empty_rest_of_line ();
2305}
2306
2307/* Set ABI version in output file. */
2308void
2309ppc_elf_end (void)
2310{
2311 if (ppc_obj64 && ppc_abiversion != 0)
2312 {
2313 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2314 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2315 }
2316}
2317
252b5132
RH		 2318/* Validate any relocations emitted for -mrelocatable, possibly adding
2319 fixups for word relocations in writable segments, so we can adjust
2320 them at runtime. */
2321static void
98027b10 2322ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2323{
2324 if (fixp->fx_done || fixp->fx_pcrel)
2325 return;
2326
2327 switch (shlib)
2328 {
2329 case SHLIB_NONE:
2330 case SHLIB_PIC:
2331 return;
2332
5d6f4f16 2333 case SHLIB_MRELOCATABLE:
62ebcb5c 2334 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
252b5132
RH		 2335 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2336 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2337 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2338 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2339 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2340 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2341 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2342 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2343 && strcmp (segment_name (seg), ".got2") != 0
2344 && strcmp (segment_name (seg), ".dtors") != 0
2345 && strcmp (segment_name (seg), ".ctors") != 0
2346 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2347 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2348 && strcmp (segment_name (seg), ".eh_frame") != 0
2349 && strcmp (segment_name (seg), ".ex_shared") != 0)
2350 {
2351 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2352 || fixp->fx_r_type != BFD_RELOC_CTOR)
2353 {
2354 as_bad_where (fixp->fx_file, fixp->fx_line,
d6ed37ed 2355 _("relocation cannot be done when using -mrelocatable"));
252b5132
RH		 2356 }
2357 }
2358 return;
2359 }
2360}
0baf16f2 2361
7e8d4ab4
AM		 2362/* Prevent elf_frob_file_before_adjust removing a weak undefined
2363 function descriptor sym if the corresponding code sym is used. */
2364
2365void
98027b10 2366ppc_frob_file_before_adjust (void)
0baf16f2 2367{
7e8d4ab4 2368 symbolS *symp;
9232bbb0 2369 asection *toc;
0baf16f2 2370
7e8d4ab4
AM		 2371 if (!ppc_obj64)
2372 return;
2373
2374 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2375 {
7e8d4ab4
AM		 2376 const char *name;
2377 char *dotname;
2378 symbolS *dotsym;
2379 size_t len;
2380
2381 name = S_GET_NAME (symp);
2382 if (name[0] == '.')
2383 continue;
2384
2385 if (! S_IS_WEAK (symp)
2386 || S_IS_DEFINED (symp))
2387 continue;
2388
2389 len = strlen (name) + 1;
2390 dotname = xmalloc (len + 1);
2391 dotname[0] = '.';
2392 memcpy (dotname + 1, name, len);
461b725f 2393 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2394 free (dotname);
2395 if (dotsym != NULL && (symbol_used_p (dotsym)
2396 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2397 symbol_mark_used (symp);
2398
0baf16f2
AM		 2399 }
2400
9232bbb0
AM		 2401 toc = bfd_get_section_by_name (stdoutput, ".toc");
2402 if (toc != NULL
01efc3af 2403 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2404 && bfd_section_size (stdoutput, toc) > 0x10000)
2405 as_warn (_("TOC section size exceeds 64k"));
a38a07e0
AM		 2406}
2407
2408/* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2409 emitted. Other uses of .TOC. will cause the symbol to be marked
2410 with BSF_KEEP in md_apply_fix. */
9232bbb0 2411
a38a07e0
AM		 2412void
2413ppc_elf_adjust_symtab (void)
2414{
2415 if (ppc_obj64)
2416 {
2417 symbolS *symp;
2418 symp = symbol_find (".TOC.");
2419 if (symp != NULL)
2420 {
2421 asymbol *bsym = symbol_get_bfdsym (symp);
2422 if ((bsym->flags & BSF_KEEP) == 0)
2423 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
a38a07e0
AM		 2424 }
2425 }
0baf16f2 2426}
252b5132
RH		 2427#endif /* OBJ_ELF */
2428\f
2429#ifdef TE_PE
2430
2431/*
99a814a1 2432 * Summary of parse_toc_entry.
252b5132
RH		 2433 *
2434 * in: Input_line_pointer points to the '[' in one of:
2435 *
2436 * [toc] [tocv] [toc32] [toc64]
2437 *
2438 * Anything else is an error of one kind or another.
2439 *
81d4177b 2440 * out:
252b5132
RH		 2441 * return value: success or failure
2442 * toc_kind: kind of toc reference
2443 * input_line_pointer:
2444 * success: first char after the ']'
2445 * failure: unchanged
2446 *
2447 * settings:
2448 *
2449 * [toc] - rv == success, toc_kind = default_toc
2450 * [tocv] - rv == success, toc_kind = data_in_toc
2451 * [toc32] - rv == success, toc_kind = must_be_32
2452 * [toc64] - rv == success, toc_kind = must_be_64
2453 *
2454 */
2455
81d4177b
KH		 2456enum toc_size_qualifier
2457{
252b5132
RH		 2458 default_toc, /* The toc cell constructed should be the system default size */
2459 data_in_toc, /* This is a direct reference to a toc cell */
2460 must_be_32, /* The toc cell constructed must be 32 bits wide */
2461 must_be_64 /* The toc cell constructed must be 64 bits wide */
2462};
2463
2464static int
98027b10 2465parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2466{
2467 char *start;
2468 char *toc_spec;
2469 char c;
2470 enum toc_size_qualifier t;
2471
99a814a1 2472 /* Save the input_line_pointer. */
252b5132
RH		 2473 start = input_line_pointer;
2474
99a814a1 2475 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2476 ++input_line_pointer;
2477 SKIP_WHITESPACE ();
81d4177b 2478
99a814a1 2479 /* Find the spelling of the operand. */
252b5132
RH		 2480 toc_spec = input_line_pointer;
2481 c = get_symbol_end ();
2482
99a814a1 2483 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2484 {
2485 t = default_toc;
2486 }
99a814a1 2487 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2488 {
2489 t = data_in_toc;
2490 }
99a814a1 2491 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2492 {
2493 t = must_be_32;
2494 }
99a814a1 2495 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2496 {
2497 t = must_be_64;
2498 }
2499 else
2500 {
2501 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2502 *input_line_pointer = c;
2503 input_line_pointer = start;
252b5132
RH		 2504 return 0;
2505 }
2506
99a814a1
AM		 2507 /* Now find the ']'. */
2508 *input_line_pointer = c;
252b5132 2509
81d4177b
KH		 2510 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2511 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2512
2513 if (c != ']')
2514 {
2515 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2516 input_line_pointer = start;
252b5132
RH		 2517 return 0;
2518 }
2519
99a814a1 2520 *toc_kind = t;
252b5132
RH		 2521 return 1;
2522}
2523#endif
3b8b57a9 2524
3e60bf4d 2525#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3b8b57a9
AM		 2526/* See whether a symbol is in the TOC section. */
2527
2528static int
2529ppc_is_toc_sym (symbolS *sym)
2530{
3e60bf4d 2531#ifdef OBJ_XCOFF
9f6e76f4
TG		 2532 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2533 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
f50c47f1 2534#endif
3e60bf4d
AM		 2535#ifdef OBJ_ELF
2536 const char *sname = segment_name (S_GET_SEGMENT (sym));
2537 if (ppc_obj64)
2538 return strcmp (sname, ".toc") == 0;
2539 else
2540 return strcmp (sname, ".got") == 0;
2541#endif
2542}
2543#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 2544\f
2545
dc1d03fc 2546#ifdef OBJ_ELF
6a0c61b7
EZ		 2547#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2548static void
98027b10 2549ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2550{
2551 unsigned int i;
2552
2553 /* Check we don't already exist. */
2554 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2555 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2556 return;
b34976b6 2557
6a0c61b7
EZ		 2558 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2559 {
2560 if (ppc_apuinfo_num_alloc == 0)
2561 {
2562 ppc_apuinfo_num_alloc = 4;
2563 ppc_apuinfo_list = (unsigned long *)
2564 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2565 }
2566 else
2567 {
2568 ppc_apuinfo_num_alloc += 4;
2569 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2570 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2571 }
2572 }
dc1d03fc 2573 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2574}
2575#undef APUID
dc1d03fc 2576#endif
6a0c61b7
EZ		 2577\f
2578
252b5132
RH		 2579/* We need to keep a list of fixups. We can't simply generate them as
2580 we go, because that would require us to first create the frag, and
2581 that would screw up references to ``.''. */
2582
2583struct ppc_fixup
2584{
2585 expressionS exp;
2586 int opindex;
2587 bfd_reloc_code_real_type reloc;
2588};
2589
2590#define MAX_INSN_FIXUPS (5)
2591
b9c361e0
JL		 2592/* Form I16L. */
2593#define E_OR2I_INSN 0x7000C000
2594#define E_AND2I_DOT_INSN 0x7000C800
2595#define E_OR2IS_INSN 0x7000D000
2596#define E_LIS_INSN 0x7000E000
2597#define E_AND2IS_DOT_INSN 0x7000E800
2598
2599/* Form I16A. */
2600#define E_ADD2I_DOT_INSN 0x70008800
2601#define E_ADD2IS_INSN 0x70009000
2602#define E_CMP16I_INSN 0x70009800
2603#define E_MULL2I_INSN 0x7000A000
2604#define E_CMPL16I_INSN 0x7000A800
2605#define E_CMPH16I_INSN 0x7000B000
2606#define E_CMPHL16I_INSN 0x7000B800
2607
252b5132
RH		 2608/* This routine is called for each instruction to be assembled. */
2609
2610void
98027b10 2611md_assemble (char *str)
252b5132
RH		 2612{
2613 char *s;
2614 const struct powerpc_opcode *opcode;
2615 unsigned long insn;
2616 const unsigned char *opindex_ptr;
2617 int skip_optional;
2618 int need_paren;
2619 int next_opindex;
2620 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2621 int fc;
2622 char *f;
09b935ac 2623 int addr_mod;
252b5132 2624 int i;
b9c361e0 2625 unsigned int insn_length;
252b5132
RH		 2626
2627 /* Get the opcode. */
3882b010 2628 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2629 ;
2630 if (*s != '\0')
2631 *s++ = '\0';
2632
2633 /* Look up the opcode in the hash table. */
2634 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2635 if (opcode == (const struct powerpc_opcode *) NULL)
2636 {
2637 const struct powerpc_macro *macro;
2638
2639 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2640 if (macro == (const struct powerpc_macro *) NULL)
d6ed37ed 2641 as_bad (_("unrecognized opcode: `%s'"), str);
252b5132
RH		 2642 else
2643 ppc_macro (s, macro);
2644
2645 return;
2646 }
2647
2648 insn = opcode->opcode;
2649
2650 str = s;
3882b010 2651 while (ISSPACE (*str))
252b5132
RH		 2652 ++str;
2653
2654 /* PowerPC operands are just expressions. The only real issue is
2655 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2656 an optional operand separate the operands only with commas (in some
2657 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2658 have optional operands). Most instructions with optional operands
2659 have only one. Those that have more than one optional operand can
2660 take either all their operands or none. So, before we start seriously
2661 parsing the operands, we check to see if we have optional operands,
2662 and if we do, we count the number of commas to see which operands
2663 have been omitted. */
252b5132
RH		 2664 skip_optional = 0;
2665 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2666 {
2667 const struct powerpc_operand *operand;
2668
2669 operand = &powerpc_operands[*opindex_ptr];
2670 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2671 {
2672 unsigned int opcount;
7fe9cf6b 2673 unsigned int num_operands_expected;
252b5132
RH		 2674
2675 /* There is an optional operand. Count the number of
2676 commas in the input line. */
2677 if (*str == '\0')
2678 opcount = 0;
2679 else
2680 {
2681 opcount = 1;
2682 s = str;
2683 while ((s = strchr (s, ',')) != (char *) NULL)
2684 {
2685 ++opcount;
2686 ++s;
2687 }
2688 }
2689
7fe9cf6b
NC		 2690 /* Compute the number of expected operands.
2691 Do not count fake operands. */
2692 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2693 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2694 ++ num_operands_expected;
2695
252b5132
RH		 2696 /* If there are fewer operands in the line then are called
2697 for by the instruction, we want to skip the optional
1f6c9eb0 2698 operands. */
7fe9cf6b 2699 if (opcount < num_operands_expected)
252b5132
RH		 2700 skip_optional = 1;
2701
2702 break;
2703 }
2704 }
2705
2706 /* Gather the operands. */
2707 need_paren = 0;
2708 next_opindex = 0;
2709 fc = 0;
2710 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2711 {
2712 const struct powerpc_operand *operand;
2713 const char *errmsg;
2714 char *hold;
2715 expressionS ex;
2716 char endc;
2717
2718 if (next_opindex == 0)
2719 operand = &powerpc_operands[*opindex_ptr];
2720 else
2721 {
2722 operand = &powerpc_operands[next_opindex];
2723 next_opindex = 0;
2724 }
252b5132
RH		 2725 errmsg = NULL;
2726
2727 /* If this is a fake operand, then we do not expect anything
2728 from the input. */
2729 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2730 {
2b3c4602 2731 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2732 if (errmsg != (const char *) NULL)
ee2c9aa9 2733 as_bad ("%s", errmsg);
252b5132
RH		 2734 continue;
2735 }
2736
2737 /* If this is an optional operand, and we are skipping it, just
2738 insert a zero. */
2739 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2740 && skip_optional)
2741 {
2742 if (operand->insert)
2743 {
2b3c4602 2744 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2745 if (errmsg != (const char *) NULL)
ee2c9aa9 2746 as_bad ("%s", errmsg);
252b5132
RH		 2747 }
2748 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2749 next_opindex = *opindex_ptr + 1;
2750 continue;
2751 }
2752
2753 /* Gather the operand. */
2754 hold = input_line_pointer;
2755 input_line_pointer = str;
2756
2757#ifdef TE_PE
81d4177b 2758 if (*input_line_pointer == '[')
252b5132
RH		 2759 {
2760 /* We are expecting something like the second argument here:
99a814a1
AM		 2761 *
2762 * lwz r4,[toc].GS.0.static_int(rtoc)
2763 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2764 * The argument following the `]' must be a symbol name, and the
2765 * register must be the toc register: 'rtoc' or '2'
2766 *
2767 * The effect is to 0 as the displacement field
2768 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2769 * the appropriate variation) reloc against it based on the symbol.
2770 * The linker will build the toc, and insert the resolved toc offset.
2771 *
2772 * Note:
2773 * o The size of the toc entry is currently assumed to be
2774 * 32 bits. This should not be assumed to be a hard coded
2775 * number.
2776 * o In an effort to cope with a change from 32 to 64 bits,
2777 * there are also toc entries that are specified to be
2778 * either 32 or 64 bits:
2779 * lwz r4,[toc32].GS.0.static_int(rtoc)
2780 * lwz r4,[toc64].GS.0.static_int(rtoc)
2781 * These demand toc entries of the specified size, and the
2782 * instruction probably requires it.
2783 */
252b5132
RH		 2784
2785 int valid_toc;
2786 enum toc_size_qualifier toc_kind;
2787 bfd_reloc_code_real_type toc_reloc;
2788
99a814a1
AM		 2789 /* Go parse off the [tocXX] part. */
2790 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2791
81d4177b 2792 if (!valid_toc)
252b5132 2793 {
a5840dce
AM		 2794 ignore_rest_of_line ();
2795 break;
252b5132
RH		 2796 }
2797
99a814a1
AM		 2798 /* Now get the symbol following the ']'. */
2799 expression (&ex);
252b5132
RH		 2800
2801 switch (toc_kind)
2802 {
2803 case default_toc:
99a814a1
AM		 2804 /* In this case, we may not have seen the symbol yet,
2805 since it is allowed to appear on a .extern or .globl
2806 or just be a label in the .data section. */
252b5132
RH		 2807 toc_reloc = BFD_RELOC_PPC_TOC16;
2808 break;
2809 case data_in_toc:
99a814a1
AM		 2810 /* 1. The symbol must be defined and either in the toc
2811 section, or a global.
2812 2. The reloc generated must have the TOCDEFN flag set
2813 in upper bit mess of the reloc type.
2814 FIXME: It's a little confusing what the tocv
2815 qualifier can be used for. At the very least, I've
2816 seen three uses, only one of which I'm sure I can
2817 explain. */
81d4177b
KH		 2818 if (ex.X_op == O_symbol)
2819 {
9c2799c2 2820 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2821 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2822 != tocdata_section)
252b5132 2823 {
99a814a1 2824 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2825 }
2826 }
2827
2828 toc_reloc = BFD_RELOC_PPC_TOC16;
2829 break;
2830 case must_be_32:
99a814a1
AM		 2831 /* FIXME: these next two specifically specify 32/64 bit
2832 toc entries. We don't support them today. Is this
2833 the right way to say that? */
62ebcb5c 2834 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2835 as_bad (_("unimplemented toc32 expression modifier"));
252b5132
RH		 2836 break;
2837 case must_be_64:
99a814a1 2838 /* FIXME: see above. */
62ebcb5c 2839 toc_reloc = BFD_RELOC_NONE;
d6ed37ed 2840 as_bad (_("unimplemented toc64 expression modifier"));
252b5132
RH		 2841 break;
2842 default:
bc805888 2843 fprintf (stderr,
99a814a1
AM		 2844 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2845 toc_kind);
bc805888 2846 abort ();
252b5132
RH		 2847 break;
2848 }
2849
2850 /* We need to generate a fixup for this expression. */
2851 if (fc >= MAX_INSN_FIXUPS)
2852 as_fatal (_("too many fixups"));
2853
2854 fixups[fc].reloc = toc_reloc;
2855 fixups[fc].exp = ex;
2856 fixups[fc].opindex = *opindex_ptr;
2857 ++fc;
2858
99a814a1
AM		 2859 /* Ok. We've set up the fixup for the instruction. Now make it
2860 look like the constant 0 was found here. */
252b5132
RH		 2861 ex.X_unsigned = 1;
2862 ex.X_op = O_constant;
2863 ex.X_add_number = 0;
2864 ex.X_add_symbol = NULL;
2865 ex.X_op_symbol = NULL;
2866 }
2867
2868 else
2869#endif /* TE_PE */
2870 {
b9c361e0
JL		 2871 if ((reg_names_p
2872 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2873 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2ad068be 2874 || !register_name (&ex))
252b5132 2875 {
13abbae3
AM		 2876 char save_lex = lex_type['%'];
2877
b9c361e0
JL		 2878 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2879 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
13abbae3
AM		 2880 {
2881 cr_operand = TRUE;
2882 lex_type['%'] |= LEX_BEGIN_NAME;
2883 }
252b5132 2884 expression (&ex);
b34976b6 2885 cr_operand = FALSE;
13abbae3 2886 lex_type['%'] = save_lex;
252b5132
RH		 2887 }
2888 }
2889
2890 str = input_line_pointer;
2891 input_line_pointer = hold;
2892
2893 if (ex.X_op == O_illegal)
2894 as_bad (_("illegal operand"));
2895 else if (ex.X_op == O_absent)
2896 as_bad (_("missing operand"));
2897 else if (ex.X_op == O_register)
2898 {
2899 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2900 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2901 }
2902 else if (ex.X_op == O_constant)
2903 {
2904#ifdef OBJ_ELF
81d4177b 2905 /* Allow @HA, @L, @H on constants. */
3b8b57a9 2906 bfd_reloc_code_real_type reloc;
252b5132
RH		 2907 char *orig_str = str;
2908
62ebcb5c 2909 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
252b5132
RH		 2910 switch (reloc)
2911 {
2912 default:
2913 str = orig_str;
2914 break;
2915
2916 case BFD_RELOC_LO16:
f9c6b907
AM		 2917 ex.X_add_number &= 0xffff;
2918 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
0baf16f2 2919 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2920 break;
2921
2922 case BFD_RELOC_HI16:
f9c6b907
AM		 2923 if (REPORT_OVERFLOW_HI && ppc_obj64)
2924 {
2925 /* PowerPC64 @h is tested for overflow. */
2926 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2927 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2928 {
2929 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2930 ex.X_add_number
2931 = ((addressT) ex.X_add_number ^ sign) - sign;
2932 }
2933 break;
2934 }
2935 /* Fall thru */
2936
2937 case BFD_RELOC_PPC64_ADDR16_HIGH:
2938 ex.X_add_number = PPC_HI (ex.X_add_number);
2939 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2940 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2941 break;
2942
2943 case BFD_RELOC_HI16_S:
f9c6b907
AM		 2944 if (REPORT_OVERFLOW_HI && ppc_obj64)
2945 {
2946 /* PowerPC64 @ha is tested for overflow. */
2947 ex.X_add_number
2948 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2949 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2950 {
2951 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2952 ex.X_add_number
2953 = ((addressT) ex.X_add_number ^ sign) - sign;
2954 }
2955 break;
2956 }
2957 /* Fall thru */
2958
2959 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2960 ex.X_add_number = PPC_HA (ex.X_add_number);
2961 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2962 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2963 break;
2964
0baf16f2 2965 case BFD_RELOC_PPC64_HIGHER:
f9c6b907
AM		 2966 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2967 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2968 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2969 break;
2970
2971 case BFD_RELOC_PPC64_HIGHER_S:
f9c6b907
AM		 2972 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2973 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2974 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132 2975 break;
0baf16f2
AM		 2976
2977 case BFD_RELOC_PPC64_HIGHEST:
f9c6b907
AM		 2978 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2979 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2980 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2981 break;
2982
2983 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 2984 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2985 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2986 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2 2987 break;
252b5132 2988 }
0baf16f2 2989#endif /* OBJ_ELF */
252b5132 2990 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2991 ppc_cpu, (char *) NULL, 0);
252b5132 2992 }
727fc41e 2993 else
252b5132 2994 {
62ebcb5c 2995 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3b8b57a9 2996#ifdef OBJ_ELF
727fc41e 2997 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2998 {
727fc41e
AM		 2999 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3000 if (sym_name[0] == '.')
3001 ++sym_name;
cdba85ec 3002
727fc41e 3003 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 3004 {
727fc41e
AM		 3005 expressionS tls_exp;
3006
3007 hold = input_line_pointer;
3008 input_line_pointer = str + 1;
3009 expression (&tls_exp);
3010 if (tls_exp.X_op == O_symbol)
3011 {
62ebcb5c 3012 reloc = BFD_RELOC_NONE;
727fc41e
AM		 3013 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3014 {
3015 reloc = BFD_RELOC_PPC_TLSGD;
3016 input_line_pointer += 7;
3017 }
3018 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3019 {
3020 reloc = BFD_RELOC_PPC_TLSLD;
3021 input_line_pointer += 7;
3022 }
62ebcb5c 3023 if (reloc != BFD_RELOC_NONE)
727fc41e
AM		 3024 {
3025 SKIP_WHITESPACE ();
3026 str = input_line_pointer;
3027
3028 if (fc >= MAX_INSN_FIXUPS)
3029 as_fatal (_("too many fixups"));
3030 fixups[fc].exp = tls_exp;
3031 fixups[fc].opindex = *opindex_ptr;
3032 fixups[fc].reloc = reloc;
3033 ++fc;
3034 }
3035 }
3036 input_line_pointer = hold;
252b5132
RH		 3037 }
3038 }
3039
62ebcb5c 3040 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
0baf16f2 3041 {
727fc41e 3042 /* Some TLS tweaks. */
0baf16f2
AM		 3043 switch (reloc)
3044 {
727fc41e 3045 default:
cdba85ec 3046 break;
727fc41e
AM		 3047
3048 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 3049 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3050 as_bad (_("@tls may not be used with \"%s\" operands"),
3051 opcode->name);
3052 else if (operand->shift != 11)
3053 as_bad (_("@tls may only be used in last operand"));
3054 else
3055 insn = ppc_insert_operand (insn, operand,
3056 ppc_obj64 ? 13 : 2,
3057 ppc_cpu, (char *) NULL, 0);
cdba85ec 3058 break;
727fc41e
AM		 3059
3060 /* We'll only use the 32 (or 64) bit form of these relocations
3061 in constants. Instructions get the 16 bit form. */
3062 case BFD_RELOC_PPC_DTPREL:
3063 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 3064 break;
727fc41e
AM		 3065 case BFD_RELOC_PPC_TPREL:
3066 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 3067 break;
3068 }
727fc41e 3069
b9c361e0
JL		 3070 /* If VLE-mode convert LO/HI/HA relocations. */
3071 if (opcode->flags & PPC_OPCODE_VLE)
3072 {
3073 int tmp_insn = insn & opcode->mask;
3074
3075 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3076 || tmp_insn == E_AND2I_DOT_INSN
3077 || tmp_insn == E_OR2IS_INSN
3078 || tmp_insn == E_LIS_INSN
3079 || tmp_insn == E_AND2IS_DOT_INSN);
3080
3081
3082 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3083 || tmp_insn == E_ADD2IS_INSN
3084 || tmp_insn == E_CMP16I_INSN
3085 || tmp_insn == E_MULL2I_INSN
3086 || tmp_insn == E_CMPL16I_INSN
3087 || tmp_insn == E_CMPH16I_INSN
3088 || tmp_insn == E_CMPHL16I_INSN);
3089
3090 switch (reloc)
3091 {
3092 default:
3093 break;
3094
3095 case BFD_RELOC_PPC_EMB_SDA21:
3096 reloc = BFD_RELOC_PPC_VLE_SDA21;
3097 break;
3098
3099 case BFD_RELOC_LO16:
3100 if (use_d_reloc)
3101 reloc = BFD_RELOC_PPC_VLE_LO16D;
3102 else if (use_a_reloc)
3103 reloc = BFD_RELOC_PPC_VLE_LO16A;
3104 break;
3105
3106 case BFD_RELOC_HI16:
3107 if (use_d_reloc)
3108 reloc = BFD_RELOC_PPC_VLE_HI16D;
3109 else if (use_a_reloc)
3110 reloc = BFD_RELOC_PPC_VLE_HI16A;
3111 break;
3112
3113 case BFD_RELOC_HI16_S:
3114 if (use_d_reloc)
3115 reloc = BFD_RELOC_PPC_VLE_HA16D;
3116 else if (use_a_reloc)
3117 reloc = BFD_RELOC_PPC_VLE_HA16A;
3118 break;
3119
3120 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3121 if (use_d_reloc)
3122 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3123 break;
3124
3125 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3126 if (use_d_reloc)
3127 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3128 break;
3129
3130 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3131 if (use_d_reloc)
3132 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3133 break;
3134 }
3135 }
0baf16f2 3136 }
3b8b57a9
AM		 3137#endif /* OBJ_ELF */
3138
62ebcb5c 3139 if (reloc != BFD_RELOC_NONE)
3b8b57a9
AM		 3140 ;
3141 /* Determine a BFD reloc value based on the operand information.
3142 We are only prepared to turn a few of the operands into
3143 relocs. */
a0593ad9
AM		 3144 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3145 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3146 && operand->bitm == 0x3fffffc
3147 && operand->shift == 0)
3148 reloc = BFD_RELOC_PPC_B26;
a0593ad9
AM		 3149 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3150 | PPC_OPERAND_ABSOLUTE)) != 0
3b8b57a9
AM		 3151 && operand->bitm == 0xfffc
3152 && operand->shift == 0)
3153 reloc = BFD_RELOC_PPC_B16;
3154 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3155 && operand->bitm == 0x1fe
3156 && operand->shift == -1)
3157 reloc = BFD_RELOC_PPC_VLE_REL8;
3158 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3159 && operand->bitm == 0xfffe
3160 && operand->shift == 0)
3161 reloc = BFD_RELOC_PPC_VLE_REL15;
3162 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3163 && operand->bitm == 0x1fffffe
3164 && operand->shift == 0)
3165 reloc = BFD_RELOC_PPC_VLE_REL24;
a0593ad9 3166 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3b8b57a9
AM		 3167 && (operand->bitm & 0xfff0) == 0xfff0
3168 && operand->shift == 0)
3169 {
f50c47f1 3170 reloc = BFD_RELOC_16;
3e60bf4d 3171#if defined OBJ_XCOFF || defined OBJ_ELF
f50c47f1 3172 /* Note: the symbol may be not yet defined. */
a0593ad9
AM		 3173 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3174 && ppc_is_toc_sym (ex.X_add_symbol))
3e60bf4d
AM		 3175 {
3176 reloc = BFD_RELOC_PPC_TOC16;
3177#ifdef OBJ_ELF
3178 as_warn (_("assuming %s on symbol"),
3179 ppc_obj64 ? "@toc" : "@xgot");
3180#endif
3181 }
3b8b57a9 3182#endif
3b8b57a9 3183 }
a0593ad9
AM		 3184
3185 /* For the absolute forms of branches, convert the PC
3186 relative form back into the absolute. */
3187 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3188 {
3189 switch (reloc)
3190 {
3191 case BFD_RELOC_PPC_B26:
3192 reloc = BFD_RELOC_PPC_BA26;
3193 break;
3194 case BFD_RELOC_PPC_B16:
3195 reloc = BFD_RELOC_PPC_BA16;
3196 break;
3197#ifdef OBJ_ELF
3198 case BFD_RELOC_PPC_B16_BRTAKEN:
3199 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3200 break;
3201 case BFD_RELOC_PPC_B16_BRNTAKEN:
3202 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3203 break;
3204#endif
3205 default:
3206 break;
3207 }
3208 }
3209
3210#ifdef OBJ_ELF
3211 switch (reloc)
3212 {
3213 case BFD_RELOC_PPC_TOC16:
3214 toc_reloc_types |= has_small_toc_reloc;
3215 break;
3216 case BFD_RELOC_PPC64_TOC16_LO:
3217 case BFD_RELOC_PPC64_TOC16_HI:
3218 case BFD_RELOC_PPC64_TOC16_HA:
3219 toc_reloc_types |= has_large_toc_reloc;
3220 break;
3221 default:
3222 break;
3223 }
3224
3225 if (ppc_obj64
3226 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3227 {
3228 switch (reloc)
3229 {
3230 case BFD_RELOC_16:
3231 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3232 break;
3233 case BFD_RELOC_LO16:
3234 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3235 break;
3236 case BFD_RELOC_16_GOTOFF:
3237 reloc = BFD_RELOC_PPC64_GOT16_DS;
3238 break;
3239 case BFD_RELOC_LO16_GOTOFF:
3240 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3241 break;
3242 case BFD_RELOC_LO16_PLTOFF:
3243 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3244 break;
3245 case BFD_RELOC_16_BASEREL:
3246 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3247 break;
3248 case BFD_RELOC_LO16_BASEREL:
3249 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3250 break;
3251 case BFD_RELOC_PPC_TOC16:
3252 reloc = BFD_RELOC_PPC64_TOC16_DS;
3253 break;
3254 case BFD_RELOC_PPC64_TOC16_LO:
3255 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3256 break;
3257 case BFD_RELOC_PPC64_PLTGOT16:
3258 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3259 break;
3260 case BFD_RELOC_PPC64_PLTGOT16_LO:
3261 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3262 break;
3263 case BFD_RELOC_PPC_DTPREL16:
3264 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3265 break;
3266 case BFD_RELOC_PPC_DTPREL16_LO:
3267 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3268 break;
3269 case BFD_RELOC_PPC_TPREL16:
3270 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3271 break;
3272 case BFD_RELOC_PPC_TPREL16_LO:
3273 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3274 break;
3275 case BFD_RELOC_PPC_GOT_DTPREL16:
3276 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3277 case BFD_RELOC_PPC_GOT_TPREL16:
3278 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3279 break;
3280 default:
3281 as_bad (_("unsupported relocation for DS offset field"));
3282 break;
3283 }
3284 }
3285#endif
0baf16f2 3286
252b5132
RH		 3287 /* We need to generate a fixup for this expression. */
3288 if (fc >= MAX_INSN_FIXUPS)
3289 as_fatal (_("too many fixups"));
3290 fixups[fc].exp = ex;
727fc41e 3291 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 3292 fixups[fc].reloc = reloc;
3293 ++fc;
3294 }
252b5132
RH		 3295
3296 if (need_paren)
3297 {
3298 endc = ')';
3299 need_paren = 0;
c3d65c1c
BE		 3300 /* If expecting more operands, then we want to see "),". */
3301 if (*str == endc && opindex_ptr[1] != 0)
3302 {
3303 do
3304 ++str;
3305 while (ISSPACE (*str));
3306 endc = ',';
3307 }
252b5132
RH		 3308 }
3309 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3310 {
3311 endc = '(';
3312 need_paren = 1;
3313 }
3314 else
3315 endc = ',';
3316
3317 /* The call to expression should have advanced str past any
3318 whitespace. */
3319 if (*str != endc
3320 && (endc != ',' || *str != '\0'))
3321 {
5a938047
AM		 3322 if (*str == '\0')
3323 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3324 else
3325 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 3326 break;
3327 }
3328
3329 if (*str != '\0')
3330 ++str;
3331 }
3332
3882b010 3333 while (ISSPACE (*str))
252b5132
RH		 3334 ++str;
3335
3336 if (*str != '\0')
3337 as_bad (_("junk at end of line: `%s'"), str);
3338
dc1d03fc 3339#ifdef OBJ_ELF
b9c361e0 3340 /* Do we need/want an APUinfo section? */
4faf939a
JM		 3341 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3342 && !ppc_obj64)
6a0c61b7
EZ		 3343 {
3344 /* These are all version "1". */
3345 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 3346 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 3347 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 3348 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 3349 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 3350 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 3351 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 3352 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 3353 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 3354 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 3355 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 3356 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 3357 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 3358 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
b9c361e0
JL		 3359 if (opcode->flags & PPC_OPCODE_VLE)
3360 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
6a0c61b7 3361 }
dc1d03fc 3362#endif
6a0c61b7 3363
252b5132 3364 /* Write out the instruction. */
b9c361e0
JL		 3365 /* Differentiate between two and four byte insns. */
3366 if (ppc_mach () == bfd_mach_ppc_vle)
3367 {
3368 if (PPC_OP_SE_VLE (insn))
3369 insn_length = 2;
3370 else
3371 insn_length = 4;
3372 addr_mod = frag_now_fix () & 1;
3373 }
3374 else
3375 {
3376 insn_length = 4;
3377 addr_mod = frag_now_fix () & 3;
3378 }
3379 /* All instructions can start on a 2 byte boundary for VLE. */
3380 f = frag_more (insn_length);
09b935ac 3381 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
b9c361e0
JL		 3382 {
3383 if (ppc_mach() == bfd_mach_ppc_vle)
3384 as_bad (_("instruction address is not a multiple of 2"));
3385 else
3386 as_bad (_("instruction address is not a multiple of 4"));
3387 }
09b935ac
AM		 3388 frag_now->insn_addr = addr_mod;
3389 frag_now->has_code = 1;
b9c361e0 3390 md_number_to_chars (f, insn, insn_length);
bf7279d5
AM		 3391 last_insn = insn;
3392 last_seg = now_seg;
3393 last_subseg = now_subseg;
252b5132 3394
5d6f4f16 3395#ifdef OBJ_ELF
b9c361e0 3396 dwarf2_emit_insn (insn_length);
5d6f4f16
GK		 3397#endif
3398
3b8b57a9 3399 /* Create any fixups. */
252b5132
RH		 3400 for (i = 0; i < fc; i++)
3401 {
3b8b57a9 3402 fixS *fixP;
62ebcb5c 3403 if (fixups[i].reloc != BFD_RELOC_NONE)
252b5132 3404 {
99a814a1 3405 reloc_howto_type *reloc_howto;
252b5132
RH		 3406 int size;
3407 int offset;
252b5132 3408
99a814a1 3409 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3410 if (!reloc_howto)
3411 abort ();
3412
3413 size = bfd_get_reloc_size (reloc_howto);
3b8b57a9 3414 offset = target_big_endian ? (insn_length - size) : 0;
252b5132
RH		 3415
3416 if (size < 1 || size > 4)
bc805888 3417 abort ();
252b5132 3418
99a814a1
AM		 3419 fixP = fix_new_exp (frag_now,
3420 f - frag_now->fr_literal + offset,
3421 size,
3422 &fixups[i].exp,
3423 reloc_howto->pc_relative,
252b5132 3424 fixups[i].reloc);
252b5132
RH		 3425 }
3426 else
727fc41e
AM		 3427 {
3428 const struct powerpc_operand *operand;
3429
3430 operand = &powerpc_operands[fixups[i].opindex];
3b8b57a9
AM		 3431 fixP = fix_new_exp (frag_now,
3432 f - frag_now->fr_literal,
3433 insn_length,
3434 &fixups[i].exp,
3435 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
62ebcb5c 3436 BFD_RELOC_NONE);
727fc41e 3437 }
3b8b57a9 3438 fixP->fx_pcrel_adjust = fixups[i].opindex;
252b5132
RH		 3439 }
3440}
3441
3442/* Handle a macro. Gather all the operands, transform them as
3443 described by the macro, and call md_assemble recursively. All the
3444 operands are separated by commas; we don't accept parentheses
3445 around operands here. */
3446
3447static void
98027b10 3448ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3449{
3450 char *operands[10];
3451 unsigned int count;
3452 char *s;
3453 unsigned int len;
3454 const char *format;
db557034 3455 unsigned int arg;
252b5132
RH		 3456 char *send;
3457 char *complete;
3458
3459 /* Gather the users operands into the operands array. */
3460 count = 0;
3461 s = str;
3462 while (1)
3463 {
3464 if (count >= sizeof operands / sizeof operands[0])
3465 break;
3466 operands[count++] = s;
3467 s = strchr (s, ',');
3468 if (s == (char *) NULL)
3469 break;
3470 *s++ = '\0';
81d4177b 3471 }
252b5132
RH		 3472
3473 if (count != macro->operands)
3474 {
3475 as_bad (_("wrong number of operands"));
3476 return;
3477 }
3478
3479 /* Work out how large the string must be (the size is unbounded
3480 because it includes user input). */
3481 len = 0;
3482 format = macro->format;
3483 while (*format != '\0')
3484 {
3485 if (*format != '%')
3486 {
3487 ++len;
3488 ++format;
3489 }
3490 else
3491 {
3492 arg = strtol (format + 1, &send, 10);
db557034 3493 know (send != format && arg < count);
252b5132
RH		 3494 len += strlen (operands[arg]);
3495 format = send;
3496 }
3497 }
3498
3499 /* Put the string together. */
3500 complete = s = (char *) alloca (len + 1);
3501 format = macro->format;
3502 while (*format != '\0')
3503 {
3504 if (*format != '%')
3505 *s++ = *format++;
3506 else
3507 {
3508 arg = strtol (format + 1, &send, 10);
3509 strcpy (s, operands[arg]);
3510 s += strlen (s);
3511 format = send;
3512 }
3513 }
3514 *s = '\0';
3515
3516 /* Assemble the constructed instruction. */
3517 md_assemble (complete);
81d4177b 3518}
252b5132
RH		 3519\f
3520#ifdef OBJ_ELF
18ae9cc1 3521/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3522
3523int
98027b10 3524ppc_section_type (char *str, size_t len)
252b5132 3525{
9de8d8f1
RH		 3526 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3527 return SHT_ORDERED;
252b5132 3528
9de8d8f1 3529 return -1;
252b5132
RH		 3530}
3531
3532int
1239de13 3533ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3534{
3535 if (type == SHT_ORDERED)
3536 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3537
252b5132
RH		 3538 return flags;
3539}
3540#endif /* OBJ_ELF */
3541
3542\f
3543/* Pseudo-op handling. */
3544
3545/* The .byte pseudo-op. This is similar to the normal .byte
3546 pseudo-op, but it can also take a single ASCII string. */
3547
3548static void
98027b10 3549ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132 3550{
bf7279d5
AM		 3551 int count = 0;
3552
252b5132
RH		 3553 if (*input_line_pointer != '\"')
3554 {
3555 cons (1);
3556 return;
3557 }
3558
3559 /* Gather characters. A real double quote is doubled. Unusual
3560 characters are not permitted. */
3561 ++input_line_pointer;
3562 while (1)
3563 {
3564 char c;
3565
3566 c = *input_line_pointer++;
3567
3568 if (c == '\"')
3569 {
3570 if (*input_line_pointer != '\"')
3571 break;
3572 ++input_line_pointer;
3573 }
3574
3575 FRAG_APPEND_1_CHAR (c);
bf7279d5 3576 ++count;
252b5132
RH		 3577 }
3578
bf7279d5
AM		 3579 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3580 as_warn (_("data in executable section"));
252b5132
RH		 3581 demand_empty_rest_of_line ();
3582}
3583\f
3584#ifdef OBJ_XCOFF
3585
3586/* XCOFF specific pseudo-op handling. */
3587
3588/* This is set if we are creating a .stabx symbol, since we don't want
3589 to handle symbol suffixes for such symbols. */
b34976b6 3590static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3591
3592/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3593 symbols in the .bss segment as though they were local common
67c1ffbe 3594 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3595 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3596
3597static void
98027b10 3598ppc_comm (int lcomm)
252b5132
RH		 3599{
3600 asection *current_seg = now_seg;
3601 subsegT current_subseg = now_subseg;
3602 char *name;
3603 char endc;
3604 char *end_name;
3605 offsetT size;
3606 offsetT align;
3607 symbolS *lcomm_sym = NULL;
3608 symbolS *sym;
3609 char *pfrag;
3610
3611 name = input_line_pointer;
3612 endc = get_symbol_end ();
3613 end_name = input_line_pointer;
3614 *end_name = endc;
3615
3616 if (*input_line_pointer != ',')
3617 {
3618 as_bad (_("missing size"));
3619 ignore_rest_of_line ();
3620 return;
3621 }
3622 ++input_line_pointer;
3623
3624 size = get_absolute_expression ();
3625 if (size < 0)
3626 {
3627 as_bad (_("negative size"));
3628 ignore_rest_of_line ();
3629 return;
3630 }
3631
3632 if (! lcomm)
3633 {
3634 /* The third argument to .comm is the alignment. */
3635 if (*input_line_pointer != ',')
1ad63b2f 3636 align = 2;
252b5132
RH		 3637 else
3638 {
3639 ++input_line_pointer;
3640 align = get_absolute_expression ();
3641 if (align <= 0)
3642 {
3643 as_warn (_("ignoring bad alignment"));
1ad63b2f 3644 align = 2;
252b5132
RH		 3645 }
3646 }
3647 }
3648 else
3649 {
3650 char *lcomm_name;
3651 char lcomm_endc;
3652
252b5132
RH		 3653 /* The third argument to .lcomm appears to be the real local
3654 common symbol to create. References to the symbol named in
3655 the first argument are turned into references to the third
3656 argument. */
3657 if (*input_line_pointer != ',')
3658 {
3659 as_bad (_("missing real symbol name"));
3660 ignore_rest_of_line ();
3661 return;
3662 }
3663 ++input_line_pointer;
3664
3665 lcomm_name = input_line_pointer;
3666 lcomm_endc = get_symbol_end ();
81d4177b 3667
252b5132
RH		 3668 lcomm_sym = symbol_find_or_make (lcomm_name);
3669
3670 *input_line_pointer = lcomm_endc;
3c02c47f
DE		 3671
3672 /* The fourth argument to .lcomm is the alignment. */
3673 if (*input_line_pointer != ',')
3674 {
3675 if (size <= 4)
3676 align = 2;
3677 else
3678 align = 3;
3679 }
3680 else
3681 {
3682 ++input_line_pointer;
3683 align = get_absolute_expression ();
3684 if (align <= 0)
3685 {
3686 as_warn (_("ignoring bad alignment"));
3687 align = 2;
3688 }
3689 }
252b5132
RH		 3690 }
3691
3692 *end_name = '\0';
3693 sym = symbol_find_or_make (name);
3694 *end_name = endc;
3695
3696 if (S_IS_DEFINED (sym)
3697 || S_GET_VALUE (sym) != 0)
3698 {
3699 as_bad (_("attempt to redefine symbol"));
3700 ignore_rest_of_line ();
3701 return;
3702 }
81d4177b 3703
252b5132 3704 record_alignment (bss_section, align);
81d4177b 3705
252b5132
RH		 3706 if (! lcomm
3707 || ! S_IS_DEFINED (lcomm_sym))
3708 {
3709 symbolS *def_sym;
3710 offsetT def_size;
3711
3712 if (! lcomm)
3713 {
3714 def_sym = sym;
3715 def_size = size;
3716 S_SET_EXTERNAL (sym);
3717 }
3718 else
3719 {
809ffe0d 3720 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3721 def_sym = lcomm_sym;
3722 def_size = 0;
3723 }
3724
3725 subseg_set (bss_section, 1);
3726 frag_align (align, 0, 0);
81d4177b 3727
809ffe0d 3728 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3729 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3730 def_size, (char *) NULL);
3731 *pfrag = 0;
3732 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3733 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3734 }
3735 else if (lcomm)
3736 {
3737 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3738 symbol_get_frag (lcomm_sym)->fr_offset =
3739 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3740 &~ ((1 << align) - 1));
809ffe0d
ILT		 3741 if (align > symbol_get_tc (lcomm_sym)->align)
3742 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3743 }
3744
3745 if (lcomm)
3746 {
3747 /* Make sym an offset from lcomm_sym. */
3748 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3749 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3750 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3751 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3752 }
3753
3754 subseg_set (current_seg, current_subseg);
3755
3756 demand_empty_rest_of_line ();
3757}
3758
3759/* The .csect pseudo-op. This switches us into a different
3760 subsegment. The first argument is a symbol whose value is the
3761 start of the .csect. In COFF, csect symbols get special aux
3762 entries defined by the x_csect field of union internal_auxent. The
3763 optional second argument is the alignment (the default is 2). */
3764
3765static void
98027b10 3766ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3767{
3768 char *name;
3769 char endc;
3770 symbolS *sym;
931e13a6 3771 offsetT align;
252b5132
RH		 3772
3773 name = input_line_pointer;
3774 endc = get_symbol_end ();
81d4177b 3775
252b5132
RH		 3776 sym = symbol_find_or_make (name);
3777
3778 *input_line_pointer = endc;
3779
3780 if (S_GET_NAME (sym)[0] == '\0')
3781 {
3782 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3783 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3784 }
3785
931e13a6 3786 align = 2;
252b5132
RH		 3787 if (*input_line_pointer == ',')
3788 {
3789 ++input_line_pointer;
931e13a6 3790 align = get_absolute_expression ();
252b5132
RH		 3791 }
3792
931e13a6
AM		 3793 ppc_change_csect (sym, align);
3794
252b5132
RH		 3795 demand_empty_rest_of_line ();
3796}
3797
3798/* Change to a different csect. */
3799
3800static void
98027b10 3801ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3802{
3803 if (S_IS_DEFINED (sym))
809ffe0d 3804 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3805 else
3806 {
3807 symbolS **list_ptr;
3808 int after_toc;
3809 int hold_chunksize;
3810 symbolS *list;
931e13a6
AM		 3811 int is_code;
3812 segT sec;
252b5132
RH		 3813
3814 /* This is a new csect. We need to look at the symbol class to
3815 figure out whether it should go in the text section or the
3816 data section. */
3817 after_toc = 0;
931e13a6 3818 is_code = 0;
96d56e9f 3819 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3820 {
3821 case XMC_PR:
3822 case XMC_RO:
3823 case XMC_DB:
3824 case XMC_GL:
3825 case XMC_XO:
3826 case XMC_SV:
3827 case XMC_TI:
3828 case XMC_TB:
3829 S_SET_SEGMENT (sym, text_section);
809ffe0d 3830 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3831 ++ppc_text_subsegment;
3832 list_ptr = &ppc_text_csects;
931e13a6 3833 is_code = 1;
252b5132
RH		 3834 break;
3835 case XMC_RW:
3836 case XMC_TC0:
3837 case XMC_TC:
3838 case XMC_DS:
3839 case XMC_UA:
3840 case XMC_BS:
3841 case XMC_UC:
3842 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3843 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3844 == ppc_data_subsegment))
252b5132
RH		 3845 after_toc = 1;
3846 S_SET_SEGMENT (sym, data_section);
809ffe0d 3847 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3848 ++ppc_data_subsegment;
3849 list_ptr = &ppc_data_csects;
3850 break;
3851 default:
3852 abort ();
3853 }
3854
3855 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3856 changing subsegments, so that we don't use a lot of memory
3857 space for what may be a small section. */
252b5132
RH		 3858 hold_chunksize = chunksize;
3859 chunksize = 64;
3860
931e13a6
AM		 3861 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3862 symbol_get_tc (sym)->subseg);
252b5132
RH		 3863
3864 chunksize = hold_chunksize;
3865
3866 if (after_toc)
3867 ppc_after_toc_frag = frag_now;
3868
931e13a6
AM		 3869 record_alignment (sec, align);
3870 if (is_code)
3871 frag_align_code (align, 0);
3872 else
3873 frag_align (align, 0, 0);
3874
809ffe0d 3875 symbol_set_frag (sym, frag_now);
252b5132
RH		 3876 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3877
931e13a6 3878 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3879 symbol_get_tc (sym)->output = 1;
3880 symbol_get_tc (sym)->within = sym;
81d4177b 3881
252b5132 3882 for (list = *list_ptr;
809ffe0d
ILT		 3883 symbol_get_tc (list)->next != (symbolS *) NULL;
3884 list = symbol_get_tc (list)->next)
252b5132 3885 ;
809ffe0d 3886 symbol_get_tc (list)->next = sym;
81d4177b 3887
252b5132 3888 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3889 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3890 &symbol_lastP);
252b5132
RH		 3891 }
3892
3893 ppc_current_csect = sym;
3894}
3895
85645aed
TG		 3896static void
3897ppc_change_debug_section (unsigned int idx, subsegT subseg)
3898{
3899 segT sec;
3900 flagword oldflags;
3901 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3902
3903 sec = subseg_new (dw->name, subseg);
3904 oldflags = bfd_get_section_flags (stdoutput, sec);
3905 if (oldflags == SEC_NO_FLAGS)
3906 {
3907 /* Just created section. */
3908 gas_assert (dw_sections[idx].sect == NULL);
3909
3910 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3911 bfd_set_section_alignment (stdoutput, sec, 0);
3912 dw_sections[idx].sect = sec;
3913 }
3914
3915 /* Not anymore in a csect. */
3916 ppc_current_csect = NULL;
3917}
3918
3919/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3920 .dwsect flag [, opt-label ]
3921*/
3922
3923static void
3924ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3925{
3926 offsetT flag;
3927 symbolS *opt_label;
3928 const struct xcoff_dwsect_name *dw;
3929 struct dw_subsection *subseg;
3930 struct dw_section *dws;
3931 int i;
3932
3933 /* Find section. */
3934 flag = get_absolute_expression ();
3935 dw = NULL;
3936 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3937 if (xcoff_dwsect_names[i].flag == flag)
3938 {
3939 dw = &xcoff_dwsect_names[i];
3940 break;
3941 }
3942
3943 /* Parse opt-label. */
3944 if (*input_line_pointer == ',')
3945 {
3946 const char *label;
3947 char c;
3948
3949 ++input_line_pointer;
3950
3951 label = input_line_pointer;
3952 c = get_symbol_end ();
3953 opt_label = symbol_find_or_make (label);
3954 *input_line_pointer = c;
3955 }
3956 else
3957 opt_label = NULL;
3958
3959 demand_empty_rest_of_line ();
3960
3961 /* Return now in case of unknown subsection. */
3962 if (dw == NULL)
3963 {
d6ed37ed 3964 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
85645aed
TG		 3965 (unsigned)flag);
3966 return;
3967 }
3968
3969 /* Find the subsection. */
3970 dws = &dw_sections[i];
3971 subseg = NULL;
3972 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3973 {
3974 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3975 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3976 {
3977 as_bad (_("label %s was not defined in this dwarf section"),
3978 S_GET_NAME (opt_label));
3979 subseg = dws->anon_subseg;
3980 opt_label = NULL;
3981 }
3982 else
3983 subseg = symbol_get_tc (opt_label)->u.dw;
3984 }
3985
3986 if (subseg != NULL)
3987 {
3988 /* Switch to the subsection. */
3989 ppc_change_debug_section (i, subseg->subseg);
3990 }
3991 else
3992 {
3993 /* Create a new dw subsection. */
3994 subseg = (struct dw_subsection *)
3995 xmalloc (sizeof (struct dw_subsection));
3996
3997 if (opt_label == NULL)
3998 {
3999 /* The anonymous one. */
4000 subseg->subseg = 0;
4001 subseg->link = NULL;
4002 dws->anon_subseg = subseg;
4003 }
4004 else
4005 {
4006 /* A named one. */
4007 if (dws->list_subseg != NULL)
4008 subseg->subseg = dws->list_subseg->subseg + 1;
4009 else
4010 subseg->subseg = 1;
4011
4012 subseg->link = dws->list_subseg;
4013 dws->list_subseg = subseg;
4014 symbol_get_tc (opt_label)->u.dw = subseg;
4015 }
4016
4017 ppc_change_debug_section (i, subseg->subseg);
4018
4019 if (dw->def_size)
4020 {
4021 /* Add the length field. */
4022 expressionS *exp = &subseg->end_exp;
4023 int sz;
4024
4025 if (opt_label != NULL)
4026 symbol_set_value_now (opt_label);
4027
4028 /* Add the length field. Note that according to the AIX assembler
4029 manual, the size of the length field is 4 for powerpc32 but
4030 12 for powerpc64. */
4031 if (ppc_obj64)
4032 {
4033 /* Write the 64bit marker. */
4034 md_number_to_chars (frag_more (4), -1, 4);
4035 }
4036
4037 exp->X_op = O_subtract;
4038 exp->X_op_symbol = symbol_temp_new_now ();
4039 exp->X_add_symbol = symbol_temp_make ();
4040
4041 sz = ppc_obj64 ? 8 : 4;
4042 exp->X_add_number = -sz;
4043 emit_expr (exp, sz);
4044 }
4045 }
4046}
4047
252b5132
RH		 4048/* This function handles the .text and .data pseudo-ops. These
4049 pseudo-ops aren't really used by XCOFF; we implement them for the
4050 convenience of people who aren't used to XCOFF. */
4051
4052static void
98027b10 4053ppc_section (int type)
252b5132
RH		 4054{
4055 const char *name;
4056 symbolS *sym;
4057
4058 if (type == 't')
4059 name = ".text[PR]";
4060 else if (type == 'd')
4061 name = ".data[RW]";
4062 else
4063 abort ();
4064
4065 sym = symbol_find_or_make (name);
4066
931e13a6 4067 ppc_change_csect (sym, 2);
252b5132
RH		 4068
4069 demand_empty_rest_of_line ();
4070}
4071
4072/* This function handles the .section pseudo-op. This is mostly to
4073 give an error, since XCOFF only supports .text, .data and .bss, but
4074 we do permit the user to name the text or data section. */
4075
4076static void
98027b10 4077ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4078{
4079 char *user_name;
4080 const char *real_name;
4081 char c;
4082 symbolS *sym;
4083
4084 user_name = input_line_pointer;
4085 c = get_symbol_end ();
4086
4087 if (strcmp (user_name, ".text") == 0)
4088 real_name = ".text[PR]";
4089 else if (strcmp (user_name, ".data") == 0)
4090 real_name = ".data[RW]";
4091 else
4092 {
d6ed37ed 4093 as_bad (_("the XCOFF file format does not support arbitrary sections"));
252b5132
RH		 4094 *input_line_pointer = c;
4095 ignore_rest_of_line ();
4096 return;
4097 }
4098
4099 *input_line_pointer = c;
4100
4101 sym = symbol_find_or_make (real_name);
4102
931e13a6 4103 ppc_change_csect (sym, 2);
252b5132
RH		 4104
4105 demand_empty_rest_of_line ();
4106}
4107
4108/* The .extern pseudo-op. We create an undefined symbol. */
4109
4110static void
98027b10 4111ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4112{
4113 char *name;
4114 char endc;
4115
4116 name = input_line_pointer;
4117 endc = get_symbol_end ();
4118
4119 (void) symbol_find_or_make (name);
4120
4121 *input_line_pointer = endc;
4122
4123 demand_empty_rest_of_line ();
4124}
4125
4126/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4127
4128static void
98027b10 4129ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4130{
4131 char *name;
4132 char endc;
4133 symbolS *sym;
4134
4135 name = input_line_pointer;
4136 endc = get_symbol_end ();
4137
4138 sym = symbol_find_or_make (name);
4139
4140 *input_line_pointer = endc;
4141
809ffe0d 4142 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4143
4144 demand_empty_rest_of_line ();
4145}
4146
c865e45b
RS		 4147/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4148 relocations at the beginning of the current csect.
4149
4150 (In principle, there's no reason why the relocations _have_ to be at
4151 the beginning. Anywhere in the csect would do. However, inserting
4152 at the beginning is what the native assmebler does, and it helps to
4153 deal with cases where the .ref statements follow the section contents.)
4154
4155 ??? .refs don't work for empty .csects. However, the native assembler
4156 doesn't report an error in this case, and neither yet do we. */
4157
4158static void
4159ppc_ref (int ignore ATTRIBUTE_UNUSED)
4160{
4161 char *name;
4162 char c;
4163
4164 if (ppc_current_csect == NULL)
4165 {
4166 as_bad (_(".ref outside .csect"));
4167 ignore_rest_of_line ();
4168 return;
4169 }
4170
4171 do
4172 {
4173 name = input_line_pointer;
4174 c = get_symbol_end ();
4175
4176 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4177 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4178
4179 *input_line_pointer = c;
4180 SKIP_WHITESPACE ();
4181 c = *input_line_pointer;
4182 if (c == ',')
4183 {
4184 input_line_pointer++;
4185 SKIP_WHITESPACE ();
4186 if (is_end_of_line[(unsigned char) *input_line_pointer])
4187 {
4188 as_bad (_("missing symbol name"));
4189 ignore_rest_of_line ();
4190 return;
4191 }
4192 }
4193 }
4194 while (c == ',');
4195
4196 demand_empty_rest_of_line ();
4197}
4198
252b5132
RH		 4199/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4200 although I don't know why it bothers. */
4201
4202static void
98027b10 4203ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4204{
4205 char *name;
4206 char endc;
4207 symbolS *sym;
4208 int len;
4209
4210 name = input_line_pointer;
4211 endc = get_symbol_end ();
4212
4213 sym = symbol_find_or_make (name);
4214
4215 *input_line_pointer = endc;
4216
4217 if (*input_line_pointer != ',')
4218 {
4219 as_bad (_("missing rename string"));
4220 ignore_rest_of_line ();
4221 return;
4222 }
4223 ++input_line_pointer;
4224
809ffe0d 4225 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 4226
4227 demand_empty_rest_of_line ();
4228}
4229
4230/* The .stabx pseudo-op. This is similar to a normal .stabs
4231 pseudo-op, but slightly different. A sample is
4232 .stabx "main:F-1",.main,142,0
4233 The first argument is the symbol name to create. The second is the
4234 value, and the third is the storage class. The fourth seems to be
4235 always zero, and I am assuming it is the type. */
4236
4237static void
98027b10 4238ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4239{
4240 char *name;
4241 int len;
4242 symbolS *sym;
4243 expressionS exp;
4244
4245 name = demand_copy_C_string (&len);
4246
4247 if (*input_line_pointer != ',')
4248 {
4249 as_bad (_("missing value"));
4250 return;
4251 }
4252 ++input_line_pointer;
4253
b34976b6 4254 ppc_stab_symbol = TRUE;
252b5132 4255 sym = symbol_make (name);
b34976b6 4256 ppc_stab_symbol = FALSE;
252b5132 4257
809ffe0d 4258 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 4259
4260 (void) expression (&exp);
4261
4262 switch (exp.X_op)
4263 {
4264 case O_illegal:
4265 case O_absent:
4266 case O_big:
4267 as_bad (_("illegal .stabx expression; zero assumed"));
4268 exp.X_add_number = 0;
4269 /* Fall through. */
4270 case O_constant:
4271 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 4272 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 4273 break;
4274
4275 case O_symbol:
4276 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 4277 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4278 else
4279 {
4280 S_SET_VALUE (sym,
4281 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 4282 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 4283 }
4284 break;
4285
4286 default:
4287 /* The value is some complex expression. This will probably
99a814a1
AM		 4288 fail at some later point, but this is probably the right
4289 thing to do here. */
809ffe0d 4290 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4291 break;
4292 }
4293
4294 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4295 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4296
4297 if (*input_line_pointer != ',')
4298 {
4299 as_bad (_("missing class"));
4300 return;
4301 }
4302 ++input_line_pointer;
4303
4304 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4305
4306 if (*input_line_pointer != ',')
4307 {
4308 as_bad (_("missing type"));
4309 return;
4310 }
4311 ++input_line_pointer;
4312
4313 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4314
809ffe0d 4315 symbol_get_tc (sym)->output = 1;
252b5132 4316
c734e7e3
TG		 4317 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4318 {
4319 /* In this case :
252b5132 4320
c734e7e3
TG		 4321 .bs name
4322 .stabx "z",arrays_,133,0
4323 .es
99a814a1 4324
c734e7e3 4325 .comm arrays_,13768,3
99a814a1 4326
c734e7e3
TG		 4327 resolve_symbol_value will copy the exp's "within" into sym's when the
4328 offset is 0. Since this seems to be corner case problem,
4329 only do the correction for storage class C_STSYM. A better solution
4330 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 4331
c734e7e3
TG		 4332 if (exp.X_op == O_symbol)
4333 {
4334 if (ppc_current_block == NULL)
4335 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 4336
c734e7e3
TG		 4337 symbol_get_tc (sym)->within = ppc_current_block;
4338 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4339 }
4340 }
99a814a1 4341
252b5132
RH		 4342 if (exp.X_op != O_symbol
4343 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4344 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4345 ppc_frob_label (sym);
4346 else
4347 {
4348 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4349 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4350 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4351 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4352 }
4353
4354 demand_empty_rest_of_line ();
4355}
4356
4357/* The .function pseudo-op. This takes several arguments. The first
4358 argument seems to be the external name of the symbol. The second
67c1ffbe 4359 argument seems to be the label for the start of the function. gcc
252b5132
RH		 4360 uses the same name for both. I have no idea what the third and
4361 fourth arguments are meant to be. The optional fifth argument is
4362 an expression for the size of the function. In COFF this symbol
4363 gets an aux entry like that used for a csect. */
4364
4365static void
98027b10 4366ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4367{
4368 char *name;
4369 char endc;
4370 char *s;
4371 symbolS *ext_sym;
4372 symbolS *lab_sym;
4373
4374 name = input_line_pointer;
4375 endc = get_symbol_end ();
4376
4377 /* Ignore any [PR] suffix. */
4378 name = ppc_canonicalize_symbol_name (name);
4379 s = strchr (name, '[');
4380 if (s != (char *) NULL
4381 && strcmp (s + 1, "PR]") == 0)
4382 *s = '\0';
4383
4384 ext_sym = symbol_find_or_make (name);
4385
4386 *input_line_pointer = endc;
4387
4388 if (*input_line_pointer != ',')
4389 {
4390 as_bad (_("missing symbol name"));
4391 ignore_rest_of_line ();
4392 return;
4393 }
4394 ++input_line_pointer;
4395
4396 name = input_line_pointer;
4397 endc = get_symbol_end ();
4398
4399 lab_sym = symbol_find_or_make (name);
4400
4401 *input_line_pointer = endc;
4402
4403 if (ext_sym != lab_sym)
4404 {
809ffe0d
ILT		 4405 expressionS exp;
4406
4407 exp.X_op = O_symbol;
4408 exp.X_add_symbol = lab_sym;
4409 exp.X_op_symbol = NULL;
4410 exp.X_add_number = 0;
4411 exp.X_unsigned = 0;
4412 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4413 }
4414
96d56e9f
NC		 4415 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4416 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4417 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4418
4419 if (*input_line_pointer == ',')
4420 {
91d6fa6a 4421 expressionS exp;
252b5132
RH		 4422
4423 /* Ignore the third argument. */
4424 ++input_line_pointer;
91d6fa6a 4425 expression (& exp);
252b5132
RH		 4426 if (*input_line_pointer == ',')
4427 {
4428 /* Ignore the fourth argument. */
4429 ++input_line_pointer;
91d6fa6a 4430 expression (& exp);
252b5132
RH		 4431 if (*input_line_pointer == ',')
4432 {
4433 /* The fifth argument is the function size. */
4434 ++input_line_pointer;
85645aed
TG		 4435 symbol_get_tc (ext_sym)->u.size = symbol_new
4436 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4437 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4438 }
4439 }
4440 }
4441
4442 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4443 SF_SET_FUNCTION (ext_sym);
4444 SF_SET_PROCESS (ext_sym);
4445 coff_add_linesym (ext_sym);
4446
4447 demand_empty_rest_of_line ();
4448}
4449
4450/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4451 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4452 with the correct line number */
5d6255fe 4453
8642cce8 4454static symbolS *saved_bi_sym = 0;
252b5132
RH		 4455
4456static void
98027b10 4457ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4458{
4459 symbolS *sym;
4460
4461 sym = symbol_make (".bf");
4462 S_SET_SEGMENT (sym, text_section);
809ffe0d 4463 symbol_set_frag (sym, frag_now);
252b5132
RH		 4464 S_SET_VALUE (sym, frag_now_fix ());
4465 S_SET_STORAGE_CLASS (sym, C_FCN);
4466
4467 coff_line_base = get_absolute_expression ();
4468
4469 S_SET_NUMBER_AUXILIARY (sym, 1);
4470 SA_SET_SYM_LNNO (sym, coff_line_base);
4471
8642cce8 4472 /* Line number for bi. */
5d6255fe 4473 if (saved_bi_sym)
8642cce8
TR		 4474 {
4475 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4476 saved_bi_sym = 0;
4477 }
5d6255fe 4478
8642cce8 4479
809ffe0d 4480 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4481
4482 ppc_frob_label (sym);
4483
4484 demand_empty_rest_of_line ();
4485}
4486
4487/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4488 ".ef", except that the line number is absolute, not relative to the
4489 most recent ".bf" symbol. */
4490
4491static void
98027b10 4492ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4493{
4494 symbolS *sym;
4495
4496 sym = symbol_make (".ef");
4497 S_SET_SEGMENT (sym, text_section);
809ffe0d 4498 symbol_set_frag (sym, frag_now);
252b5132
RH		 4499 S_SET_VALUE (sym, frag_now_fix ());
4500 S_SET_STORAGE_CLASS (sym, C_FCN);
4501 S_SET_NUMBER_AUXILIARY (sym, 1);
4502 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4503 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4504
4505 ppc_frob_label (sym);
4506
4507 demand_empty_rest_of_line ();
4508}
4509
4510/* The .bi and .ei pseudo-ops. These take a string argument and
4511 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4512 the symbol list. The value of .bi will be know when the next .bf
4513 is encountered. */
252b5132
RH		 4514
4515static void
98027b10 4516ppc_biei (int ei)
252b5132
RH		 4517{
4518 static symbolS *last_biei;
4519
4520 char *name;
4521 int len;
4522 symbolS *sym;
4523 symbolS *look;
4524
4525 name = demand_copy_C_string (&len);
4526
4527 /* The value of these symbols is actually file offset. Here we set
4528 the value to the index into the line number entries. In
4529 ppc_frob_symbols we set the fix_line field, which will cause BFD
4530 to do the right thing. */
4531
4532 sym = symbol_make (name);
4533 /* obj-coff.c currently only handles line numbers correctly in the
4534 .text section. */
4535 S_SET_SEGMENT (sym, text_section);
4536 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4537 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4538
4539 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4540 symbol_get_tc (sym)->output = 1;
81d4177b 4541
8642cce8 4542 /* Save bi. */
5d6255fe 4543 if (ei)
8642cce8
TR		 4544 saved_bi_sym = 0;
4545 else
4546 saved_bi_sym = sym;
4547
252b5132
RH		 4548 for (look = last_biei ? last_biei : symbol_rootP;
4549 (look != (symbolS *) NULL
4550 && (S_GET_STORAGE_CLASS (look) == C_FILE
4551 || S_GET_STORAGE_CLASS (look) == C_BINCL
4552 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4553 look = symbol_next (look))
4554 ;
4555 if (look != (symbolS *) NULL)
4556 {
4557 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4558 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4559 last_biei = sym;
4560 }
4561
4562 demand_empty_rest_of_line ();
4563}
4564
4565/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4566 There is one argument, which is a csect symbol. The value of the
4567 .bs symbol is the index of this csect symbol. */
4568
4569static void
98027b10 4570ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4571{
4572 char *name;
4573 char endc;
4574 symbolS *csect;
4575 symbolS *sym;
4576
4577 if (ppc_current_block != NULL)
4578 as_bad (_("nested .bs blocks"));
4579
4580 name = input_line_pointer;
4581 endc = get_symbol_end ();
4582
4583 csect = symbol_find_or_make (name);
4584
4585 *input_line_pointer = endc;
4586
4587 sym = symbol_make (".bs");
4588 S_SET_SEGMENT (sym, now_seg);
4589 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4590 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4591 symbol_get_tc (sym)->output = 1;
252b5132 4592
809ffe0d 4593 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4594
4595 ppc_frob_label (sym);
4596
4597 ppc_current_block = sym;
4598
4599 demand_empty_rest_of_line ();
4600}
4601
4602/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4603
4604static void
98027b10 4605ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4606{
4607 symbolS *sym;
4608
4609 if (ppc_current_block == NULL)
4610 as_bad (_(".es without preceding .bs"));
4611
4612 sym = symbol_make (".es");
4613 S_SET_SEGMENT (sym, now_seg);
4614 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4615 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4616 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4617
4618 ppc_frob_label (sym);
4619
4620 ppc_current_block = NULL;
4621
4622 demand_empty_rest_of_line ();
4623}
4624
4625/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4626 line number. */
4627
4628static void
98027b10 4629ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4630{
4631 symbolS *sym;
4632
4633 sym = symbol_make (".bb");
4634 S_SET_SEGMENT (sym, text_section);
809ffe0d 4635 symbol_set_frag (sym, frag_now);
252b5132
RH		 4636 S_SET_VALUE (sym, frag_now_fix ());
4637 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4638
4639 S_SET_NUMBER_AUXILIARY (sym, 1);
4640 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4641
809ffe0d 4642 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4643
4644 SF_SET_PROCESS (sym);
4645
4646 ppc_frob_label (sym);
4647
4648 demand_empty_rest_of_line ();
4649}
4650
4651/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4652 line number. */
4653
4654static void
98027b10 4655ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4656{
4657 symbolS *sym;
4658
4659 sym = symbol_make (".eb");
4660 S_SET_SEGMENT (sym, text_section);
809ffe0d 4661 symbol_set_frag (sym, frag_now);
252b5132
RH		 4662 S_SET_VALUE (sym, frag_now_fix ());
4663 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4664 S_SET_NUMBER_AUXILIARY (sym, 1);
4665 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4666 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4667
4668 SF_SET_PROCESS (sym);
4669
4670 ppc_frob_label (sym);
4671
4672 demand_empty_rest_of_line ();
4673}
4674
4675/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4676 specified name. */
4677
4678static void
98027b10 4679ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4680{
4681 char *name;
4682 int len;
4683 symbolS *sym;
4684
4685 name = demand_copy_C_string (&len);
4686 sym = symbol_make (name);
4687 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4688 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4689 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4690 S_SET_VALUE (sym, 0);
809ffe0d 4691 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4692
4693 ppc_frob_label (sym);
4694
4695 demand_empty_rest_of_line ();
4696}
4697
4698/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4699
4700static void
98027b10 4701ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4702{
4703 symbolS *sym;
4704
4705 sym = symbol_make (".ec");
4706 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4707 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4708 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4709 S_SET_VALUE (sym, 0);
809ffe0d 4710 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4711
4712 ppc_frob_label (sym);
4713
4714 demand_empty_rest_of_line ();
4715}
4716
4717/* The .toc pseudo-op. Switch to the .toc subsegment. */
4718
4719static void
98027b10 4720ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4721{
4722 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4723 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4724 else
4725 {
4726 subsegT subseg;
4727 symbolS *sym;
4728 symbolS *list;
81d4177b 4729
252b5132
RH		 4730 subseg = ppc_data_subsegment;
4731 ++ppc_data_subsegment;
4732
4733 subseg_new (segment_name (data_section), subseg);
4734 ppc_toc_frag = frag_now;
4735
4736 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4737 symbol_set_frag (sym, frag_now);
252b5132
RH		 4738 S_SET_SEGMENT (sym, data_section);
4739 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4740 symbol_get_tc (sym)->subseg = subseg;
4741 symbol_get_tc (sym)->output = 1;
4742 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4743
4744 ppc_toc_csect = sym;
81d4177b 4745
252b5132 4746 for (list = ppc_data_csects;
809ffe0d
ILT		 4747 symbol_get_tc (list)->next != (symbolS *) NULL;
4748 list = symbol_get_tc (list)->next)
252b5132 4749 ;
809ffe0d 4750 symbol_get_tc (list)->next = sym;
252b5132
RH		 4751
4752 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4753 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4754 &symbol_lastP);
252b5132
RH		 4755 }
4756
4757 ppc_current_csect = ppc_toc_csect;
4758
4759 demand_empty_rest_of_line ();
4760}
4761
4762/* The AIX assembler automatically aligns the operands of a .long or
4763 .short pseudo-op, and we want to be compatible. */
4764
4765static void
98027b10 4766ppc_xcoff_cons (int log_size)
252b5132
RH		 4767{
4768 frag_align (log_size, 0, 0);
4769 record_alignment (now_seg, log_size);
4770 cons (1 << log_size);
4771}
4772
4773static void
98027b10 4774ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4775{
4776 expressionS exp;
4777 int byte_count;
4778
4779 (void) expression (&exp);
4780
4781 if (exp.X_op != O_constant)
4782 {
4783 as_bad (_("non-constant byte count"));
4784 return;
4785 }
4786
4787 byte_count = exp.X_add_number;
4788
4789 if (*input_line_pointer != ',')
4790 {
4791 as_bad (_("missing value"));
4792 return;
4793 }
4794
4795 ++input_line_pointer;
4796 cons (byte_count);
4797}
4798
85645aed
TG		 4799void
4800ppc_xcoff_end (void)
4801{
4802 int i;
4803
4804 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4805 {
4806 struct dw_section *dws = &dw_sections[i];
4807 struct dw_subsection *dwss;
4808
4809 if (dws->anon_subseg)
4810 {
4811 dwss = dws->anon_subseg;
4812 dwss->link = dws->list_subseg;
4813 }
4814 else
4815 dwss = dws->list_subseg;
4816
4817 for (; dwss != NULL; dwss = dwss->link)
4818 if (dwss->end_exp.X_add_symbol != NULL)
4819 {
4820 subseg_set (dws->sect, dwss->subseg);
4821 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4822 }
4823 }
4824}
4825
252b5132 4826#endif /* OBJ_XCOFF */
0baf16f2 4827#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4828\f
4829/* The .tc pseudo-op. This is used when generating either XCOFF or
4830 ELF. This takes two or more arguments.
4831
4832 When generating XCOFF output, the first argument is the name to
4833 give to this location in the toc; this will be a symbol with class
0baf16f2 4834 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4835 this location in the TOC; often there is just one more argument, a
1049f94e 4836 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4837 depends on target word size. A 32-bit target uses 4-byte values, a
4838 64-bit target uses 8-byte values.
252b5132
RH		 4839
4840 When not generating XCOFF output, the arguments are the same, but
4841 the first argument is simply ignored. */
4842
4843static void
98027b10 4844ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4845{
4846#ifdef OBJ_XCOFF
4847
4848 /* Define the TOC symbol name. */
4849 {
4850 char *name;
4851 char endc;
4852 symbolS *sym;
4853
4854 if (ppc_toc_csect == (symbolS *) NULL
4855 || ppc_toc_csect != ppc_current_csect)
4856 {
4857 as_bad (_(".tc not in .toc section"));
4858 ignore_rest_of_line ();
4859 return;
4860 }
4861
4862 name = input_line_pointer;
4863 endc = get_symbol_end ();
4864
4865 sym = symbol_find_or_make (name);
4866
4867 *input_line_pointer = endc;
4868
4869 if (S_IS_DEFINED (sym))
4870 {
4871 symbolS *label;
4872
809ffe0d 4873 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4874 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4875 {
4876 as_bad (_(".tc with no label"));
4877 ignore_rest_of_line ();
4878 return;
4879 }
4880
4881 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4882 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4883 S_SET_VALUE (label, S_GET_VALUE (sym));
4884
4885 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4886 ++input_line_pointer;
4887
4888 return;
4889 }
4890
4891 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4892 symbol_set_frag (sym, frag_now);
252b5132 4893 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4894 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4895 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4896
4897 ppc_frob_label (sym);
4898 }
4899
0baf16f2
AM		 4900#endif /* OBJ_XCOFF */
4901#ifdef OBJ_ELF
9c7977b3 4902 int align;
252b5132
RH		 4903
4904 /* Skip the TOC symbol name. */
4905 while (is_part_of_name (*input_line_pointer)
d13d4015 4906 || *input_line_pointer == ' '
252b5132
RH		 4907 || *input_line_pointer == '['
4908 || *input_line_pointer == ']'
4909 || *input_line_pointer == '{'
4910 || *input_line_pointer == '}')
4911 ++input_line_pointer;
4912
0baf16f2 4913 /* Align to a four/eight byte boundary. */
2b3c4602 4914 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4915 frag_align (align, 0, 0);
4916 record_alignment (now_seg, align);
0baf16f2 4917#endif /* OBJ_ELF */
252b5132
RH		 4918
4919 if (*input_line_pointer != ',')
4920 demand_empty_rest_of_line ();
4921 else
4922 {
4923 ++input_line_pointer;
2b3c4602 4924 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4925 }
4926}
0baf16f2
AM		 4927
4928/* Pseudo-op .machine. */
0baf16f2
AM		 4929
4930static void
98027b10 4931ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4932{
69c040df
AM		 4933 char *cpu_string;
4934#define MAX_HISTORY 100
fa452fa6 4935 static ppc_cpu_t *cpu_history;
69c040df
AM		 4936 static int curr_hist;
4937
4938 SKIP_WHITESPACE ();
4939
4940 if (*input_line_pointer == '"')
4941 {
4942 int len;
4943 cpu_string = demand_copy_C_string (&len);
4944 }
4945 else
4946 {
4947 char c;
4948 cpu_string = input_line_pointer;
4949 c = get_symbol_end ();
4950 cpu_string = xstrdup (cpu_string);
4951 *input_line_pointer = c;
4952 }
4953
4954 if (cpu_string != NULL)
4955 {
fa452fa6 4956 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4957 ppc_cpu_t new_cpu;
69c040df
AM		 4958 char *p;
4959
4960 for (p = cpu_string; *p != 0; p++)
4961 *p = TOLOWER (*p);
4962
4963 if (strcmp (cpu_string, "push") == 0)
4964 {
4965 if (cpu_history == NULL)
4966 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4967
4968 if (curr_hist >= MAX_HISTORY)
4969 as_bad (_(".machine stack overflow"));
4970 else
4971 cpu_history[curr_hist++] = ppc_cpu;
4972 }
4973 else if (strcmp (cpu_string, "pop") == 0)
4974 {
4975 if (curr_hist <= 0)
4976 as_bad (_(".machine stack underflow"));
4977 else
4978 ppc_cpu = cpu_history[--curr_hist];
4979 }
776fc418 4980 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
69fe9ce5 4981 ppc_cpu = new_cpu;
69c040df
AM		 4982 else
4983 as_bad (_("invalid machine `%s'"), cpu_string);
4984
4985 if (ppc_cpu != old_cpu)
4986 ppc_setup_opcodes ();
4987 }
4988
4989 demand_empty_rest_of_line ();
0baf16f2 4990}
0baf16f2 4991#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4992\f
4993#ifdef TE_PE
4994
99a814a1 4995/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4996
4997/* Set the current section. */
4998static void
98027b10 4999ppc_set_current_section (segT new)
252b5132
RH		 5000{
5001 ppc_previous_section = ppc_current_section;
5002 ppc_current_section = new;
5003}
5004
5005/* pseudo-op: .previous
5006 behaviour: toggles the current section with the previous section.
5007 errors: None
99a814a1
AM		 5008 warnings: "No previous section" */
5009
252b5132 5010static void
98027b10 5011ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132 5012{
81d4177b 5013 if (ppc_previous_section == NULL)
252b5132 5014 {
d6ed37ed 5015 as_warn (_("no previous section to return to, ignored."));
252b5132
RH		 5016 return;
5017 }
5018
99a814a1 5019 subseg_set (ppc_previous_section, 0);
252b5132 5020
99a814a1 5021 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 5022}
5023
5024/* pseudo-op: .pdata
5025 behaviour: predefined read only data section
b34976b6 5026 double word aligned
252b5132
RH		 5027 errors: None
5028 warnings: None
5029 initial: .section .pdata "adr3"
b34976b6 5030 a - don't know -- maybe a misprint
252b5132
RH		 5031 d - initialized data
5032 r - readable
5033 3 - double word aligned (that would be 4 byte boundary)
5034
5035 commentary:
5036 Tag index tables (also known as the function table) for exception
99a814a1 5037 handling, debugging, etc. */
252b5132 5038
252b5132 5039static void
98027b10 5040ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 5041{
81d4177b 5042 if (pdata_section == 0)
252b5132
RH		 5043 {
5044 pdata_section = subseg_new (".pdata", 0);
81d4177b 5045
252b5132
RH		 5046 bfd_set_section_flags (stdoutput, pdata_section,
5047 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5048 | SEC_READONLY | SEC_DATA ));
81d4177b 5049
252b5132
RH		 5050 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5051 }
5052 else
5053 {
99a814a1 5054 pdata_section = subseg_new (".pdata", 0);
252b5132 5055 }
99a814a1 5056 ppc_set_current_section (pdata_section);
252b5132
RH		 5057}
5058
5059/* pseudo-op: .ydata
5060 behaviour: predefined read only data section
b34976b6 5061 double word aligned
252b5132
RH		 5062 errors: None
5063 warnings: None
5064 initial: .section .ydata "drw3"
b34976b6 5065 a - don't know -- maybe a misprint
252b5132
RH		 5066 d - initialized data
5067 r - readable
5068 3 - double word aligned (that would be 4 byte boundary)
5069 commentary:
5070 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 5071 debugging, etc. */
5072
252b5132 5073static void
98027b10 5074ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 5075{
81d4177b 5076 if (ydata_section == 0)
252b5132
RH		 5077 {
5078 ydata_section = subseg_new (".ydata", 0);
5079 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 5080 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5081 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 5082
5083 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5084 }
5085 else
5086 {
5087 ydata_section = subseg_new (".ydata", 0);
5088 }
99a814a1 5089 ppc_set_current_section (ydata_section);
252b5132
RH		 5090}
5091
5092/* pseudo-op: .reldata
5093 behaviour: predefined read write data section
b34976b6 5094 double word aligned (4-byte)
252b5132
RH		 5095 FIXME: relocation is applied to it
5096 FIXME: what's the difference between this and .data?
5097 errors: None
5098 warnings: None
5099 initial: .section .reldata "drw3"
5100 d - initialized data
5101 r - readable
5102 w - writeable
5103 3 - double word aligned (that would be 8 byte boundary)
5104
5105 commentary:
5106 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 5107 function descriptors, etc. */
5108
252b5132 5109static void
98027b10 5110ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5111{
5112 if (reldata_section == 0)
5113 {
5114 reldata_section = subseg_new (".reldata", 0);
5115
5116 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 5117 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5118 | SEC_DATA));
252b5132
RH		 5119
5120 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5121 }
5122 else
5123 {
5124 reldata_section = subseg_new (".reldata", 0);
5125 }
99a814a1 5126 ppc_set_current_section (reldata_section);
252b5132
RH		 5127}
5128
5129/* pseudo-op: .rdata
5130 behaviour: predefined read only data section
b34976b6 5131 double word aligned
252b5132
RH		 5132 errors: None
5133 warnings: None
5134 initial: .section .rdata "dr3"
5135 d - initialized data
5136 r - readable
99a814a1
AM		 5137 3 - double word aligned (that would be 4 byte boundary) */
5138
252b5132 5139static void
98027b10 5140ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5141{
5142 if (rdata_section == 0)
5143 {
5144 rdata_section = subseg_new (".rdata", 0);
5145 bfd_set_section_flags (stdoutput, rdata_section,
5146 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5147 | SEC_READONLY | SEC_DATA ));
5148
5149 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5150 }
5151 else
5152 {
5153 rdata_section = subseg_new (".rdata", 0);
5154 }
99a814a1 5155 ppc_set_current_section (rdata_section);
252b5132
RH		 5156}
5157
5158/* pseudo-op: .ualong
81d4177b 5159 behaviour: much like .int, with the exception that no alignment is
b34976b6 5160 performed.
252b5132
RH		 5161 FIXME: test the alignment statement
5162 errors: None
99a814a1
AM		 5163 warnings: None */
5164
252b5132 5165static void
98027b10 5166ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 5167{
99a814a1
AM		 5168 /* Try for long. */
5169 cons (4);
252b5132
RH		 5170}
5171
5172/* pseudo-op: .znop <symbol name>
5173 behaviour: Issue a nop instruction
b34976b6 5174 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 5175 the supplied symbol name.
5176 errors: None
99a814a1
AM		 5177 warnings: Missing symbol name */
5178
252b5132 5179static void
98027b10 5180ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5181{
5182 unsigned long insn;
5183 const struct powerpc_opcode *opcode;
252b5132 5184 char *f;
252b5132 5185 symbolS *sym;
252b5132
RH		 5186 char *symbol_name;
5187 char c;
5188 char *name;
252b5132 5189
99a814a1 5190 /* Strip out the symbol name. */
252b5132
RH		 5191 symbol_name = input_line_pointer;
5192 c = get_symbol_end ();
5193
5194 name = xmalloc (input_line_pointer - symbol_name + 1);
5195 strcpy (name, symbol_name);
5196
5197 sym = symbol_find_or_make (name);
5198
5199 *input_line_pointer = c;
5200
5201 SKIP_WHITESPACE ();
5202
5203 /* Look up the opcode in the hash table. */
5204 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5205
99a814a1 5206 /* Stick in the nop. */
252b5132
RH		 5207 insn = opcode->opcode;
5208
5209 /* Write out the instruction. */
5210 f = frag_more (4);
5211 md_number_to_chars (f, insn, 4);
5212 fix_new (frag_now,
5213 f - frag_now->fr_literal,
5214 4,
5215 sym,
5216 0,
5217 0,
5218 BFD_RELOC_16_GOT_PCREL);
5219
5220}
5221
81d4177b
KH		 5222/* pseudo-op:
5223 behaviour:
5224 errors:
99a814a1
AM		 5225 warnings: */
5226
252b5132 5227static void
98027b10 5228ppc_pe_comm (int lcomm)
252b5132 5229{
98027b10
AM		 5230 char *name;
5231 char c;
5232 char *p;
252b5132 5233 offsetT temp;
98027b10 5234 symbolS *symbolP;
252b5132
RH		 5235 offsetT align;
5236
5237 name = input_line_pointer;
5238 c = get_symbol_end ();
5239
99a814a1 5240 /* just after name is now '\0'. */
252b5132
RH		 5241 p = input_line_pointer;
5242 *p = c;
5243 SKIP_WHITESPACE ();
5244 if (*input_line_pointer != ',')
5245 {
d6ed37ed 5246 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 5247 ignore_rest_of_line ();
5248 return;
5249 }
5250
5251 input_line_pointer++; /* skip ',' */
5252 if ((temp = get_absolute_expression ()) < 0)
5253 {
5254 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5255 ignore_rest_of_line ();
5256 return;
5257 }
5258
5259 if (! lcomm)
5260 {
5261 /* The third argument to .comm is the alignment. */
5262 if (*input_line_pointer != ',')
5263 align = 3;
5264 else
5265 {
5266 ++input_line_pointer;
5267 align = get_absolute_expression ();
5268 if (align <= 0)
5269 {
5270 as_warn (_("ignoring bad alignment"));
5271 align = 3;
5272 }
5273 }
5274 }
5275
5276 *p = 0;
5277 symbolP = symbol_find_or_make (name);
5278
5279 *p = c;
5280 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5281 {
d6ed37ed 5282 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 5283 S_GET_NAME (symbolP));
5284 ignore_rest_of_line ();
5285 return;
5286 }
5287
5288 if (S_GET_VALUE (symbolP))
5289 {
5290 if (S_GET_VALUE (symbolP) != (valueT) temp)
d6ed37ed 5291 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 5292 S_GET_NAME (symbolP),
5293 (long) S_GET_VALUE (symbolP),
5294 (long) temp);
5295 }
5296 else
5297 {
5298 S_SET_VALUE (symbolP, (valueT) temp);
5299 S_SET_EXTERNAL (symbolP);
86ebace2 5300 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 5301 }
5302
5303 demand_empty_rest_of_line ();
5304}
5305
5306/*
5307 * implement the .section pseudo op:
5308 * .section name {, "flags"}
5309 * ^ ^
5310 * | +--- optional flags: 'b' for bss
5311 * | 'i' for info
5312 * +-- section name 'l' for lib
5313 * 'n' for noload
5314 * 'o' for over
5315 * 'w' for data
5316 * 'd' (apparently m88k for data)
5317 * 'x' for text
5318 * But if the argument is not a quoted string, treat it as a
5319 * subsegment number.
5320 *
5321 * FIXME: this is a copy of the section processing from obj-coff.c, with
5322 * additions/changes for the moto-pas assembler support. There are three
5323 * categories:
5324 *
81d4177b 5325 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 5326 * setting bits that bfd probably neither understands or uses. The
5327 * correct approach (?) will have to incorporate extra fields attached
5328 * to the section to hold the system specific stuff. (krk)
5329 *
5330 * Section Contents:
5331 * 'a' - unknown - referred to in documentation, but no definition supplied
5332 * 'c' - section has code
5333 * 'd' - section has initialized data
5334 * 'u' - section has uninitialized data
5335 * 'i' - section contains directives (info)
5336 * 'n' - section can be discarded
5337 * 'R' - remove section at link time
5338 *
5339 * Section Protection:
5340 * 'r' - section is readable
5341 * 'w' - section is writeable
5342 * 'x' - section is executable
5343 * 's' - section is sharable
5344 *
5345 * Section Alignment:
5346 * '0' - align to byte boundary
5347 * '1' - align to halfword undary
5348 * '2' - align to word boundary
5349 * '3' - align to doubleword boundary
5350 * '4' - align to quadword boundary
5351 * '5' - align to 32 byte boundary
5352 * '6' - align to 64 byte boundary
5353 *
5354 */
5355
5356void
98027b10 5357ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 5358{
99a814a1 5359 /* Strip out the section name. */
252b5132
RH		 5360 char *section_name;
5361 char c;
5362 char *name;
5363 unsigned int exp;
5364 flagword flags;
5365 segT sec;
5366 int align;
5367
5368 section_name = input_line_pointer;
5369 c = get_symbol_end ();
5370
5371 name = xmalloc (input_line_pointer - section_name + 1);
5372 strcpy (name, section_name);
5373
5374 *input_line_pointer = c;
5375
5376 SKIP_WHITESPACE ();
5377
5378 exp = 0;
5379 flags = SEC_NO_FLAGS;
5380
5381 if (strcmp (name, ".idata$2") == 0)
5382 {
5383 align = 0;
5384 }
5385 else if (strcmp (name, ".idata$3") == 0)
5386 {
5387 align = 0;
5388 }
5389 else if (strcmp (name, ".idata$4") == 0)
5390 {
5391 align = 2;
5392 }
5393 else if (strcmp (name, ".idata$5") == 0)
5394 {
5395 align = 2;
5396 }
5397 else if (strcmp (name, ".idata$6") == 0)
5398 {
5399 align = 1;
5400 }
5401 else
99a814a1
AM		 5402 /* Default alignment to 16 byte boundary. */
5403 align = 4;
252b5132
RH		 5404
5405 if (*input_line_pointer == ',')
5406 {
5407 ++input_line_pointer;
5408 SKIP_WHITESPACE ();
5409 if (*input_line_pointer != '"')
5410 exp = get_absolute_expression ();
5411 else
5412 {
5413 ++input_line_pointer;
5414 while (*input_line_pointer != '"'
5415 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5416 {
5417 switch (*input_line_pointer)
5418 {
5419 /* Section Contents */
5420 case 'a': /* unknown */
d6ed37ed 5421 as_bad (_("unsupported section attribute -- 'a'"));
252b5132
RH		 5422 break;
5423 case 'c': /* code section */
81d4177b 5424 flags |= SEC_CODE;
252b5132
RH		 5425 break;
5426 case 'd': /* section has initialized data */
5427 flags |= SEC_DATA;
5428 break;
5429 case 'u': /* section has uninitialized data */
5430 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5431 in winnt.h */
5432 flags |= SEC_ROM;
5433 break;
5434 case 'i': /* section contains directives (info) */
5435 /* FIXME: This is IMAGE_SCN_LNK_INFO
5436 in winnt.h */
5437 flags |= SEC_HAS_CONTENTS;
5438 break;
5439 case 'n': /* section can be discarded */
81d4177b 5440 flags &=~ SEC_LOAD;
252b5132
RH		 5441 break;
5442 case 'R': /* Remove section at link time */
5443 flags |= SEC_NEVER_LOAD;
5444 break;
8d452c78 5445#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5446 /* Section Protection */
5447 case 'r': /* section is readable */
5448 flags |= IMAGE_SCN_MEM_READ;
5449 break;
5450 case 'w': /* section is writeable */
5451 flags |= IMAGE_SCN_MEM_WRITE;
5452 break;
5453 case 'x': /* section is executable */
5454 flags |= IMAGE_SCN_MEM_EXECUTE;
5455 break;
5456 case 's': /* section is sharable */
5457 flags |= IMAGE_SCN_MEM_SHARED;
5458 break;
5459
5460 /* Section Alignment */
5461 case '0': /* align to byte boundary */
5462 flags |= IMAGE_SCN_ALIGN_1BYTES;
5463 align = 0;
5464 break;
5465 case '1': /* align to halfword boundary */
5466 flags |= IMAGE_SCN_ALIGN_2BYTES;
5467 align = 1;
5468 break;
5469 case '2': /* align to word boundary */
5470 flags |= IMAGE_SCN_ALIGN_4BYTES;
5471 align = 2;
5472 break;
5473 case '3': /* align to doubleword boundary */
5474 flags |= IMAGE_SCN_ALIGN_8BYTES;
5475 align = 3;
5476 break;
5477 case '4': /* align to quadword boundary */
5478 flags |= IMAGE_SCN_ALIGN_16BYTES;
5479 align = 4;
5480 break;
5481 case '5': /* align to 32 byte boundary */
5482 flags |= IMAGE_SCN_ALIGN_32BYTES;
5483 align = 5;
5484 break;
5485 case '6': /* align to 64 byte boundary */
5486 flags |= IMAGE_SCN_ALIGN_64BYTES;
5487 align = 6;
5488 break;
8d452c78 5489#endif
252b5132 5490 default:
99a814a1
AM		 5491 as_bad (_("unknown section attribute '%c'"),
5492 *input_line_pointer);
252b5132
RH		 5493 break;
5494 }
5495 ++input_line_pointer;
5496 }
5497 if (*input_line_pointer == '"')
5498 ++input_line_pointer;
5499 }
5500 }
5501
5502 sec = subseg_new (name, (subsegT) exp);
5503
99a814a1 5504 ppc_set_current_section (sec);
252b5132
RH		 5505
5506 if (flags != SEC_NO_FLAGS)
5507 {
5508 if (! bfd_set_section_flags (stdoutput, sec, flags))
5509 as_bad (_("error setting flags for \"%s\": %s"),
5510 bfd_section_name (stdoutput, sec),
5511 bfd_errmsg (bfd_get_error ()));
5512 }
5513
99a814a1 5514 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5515}
5516
5517static void
98027b10 5518ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5519{
5520 char *name;
5521 char endc;
5522 symbolS *ext_sym;
5523
5524 name = input_line_pointer;
5525 endc = get_symbol_end ();
5526
5527 ext_sym = symbol_find_or_make (name);
5528
5529 *input_line_pointer = endc;
5530
5531 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5532 SF_SET_FUNCTION (ext_sym);
5533 SF_SET_PROCESS (ext_sym);
5534 coff_add_linesym (ext_sym);
5535
5536 demand_empty_rest_of_line ();
5537}
5538
5539static void
98027b10 5540ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5541{
5542 if (tocdata_section == 0)
5543 {
5544 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5545 /* FIXME: section flags won't work. */
252b5132
RH		 5546 bfd_set_section_flags (stdoutput, tocdata_section,
5547 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5548 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5549
5550 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5551 }
5552 else
5553 {
5554 rdata_section = subseg_new (".tocd", 0);
5555 }
5556
99a814a1 5557 ppc_set_current_section (tocdata_section);
252b5132
RH		 5558
5559 demand_empty_rest_of_line ();
5560}
5561
5562/* Don't adjust TOC relocs to use the section symbol. */
5563
5564int
98027b10 5565ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5566{
5567 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5568}
5569
5570#endif
5571\f
5572#ifdef OBJ_XCOFF
5573
5574/* XCOFF specific symbol and file handling. */
5575
5576/* Canonicalize the symbol name. We use the to force the suffix, if
5577 any, to use square brackets, and to be in upper case. */
5578
5579char *
98027b10 5580ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5581{
5582 char *s;
5583
5584 if (ppc_stab_symbol)
5585 return name;
5586
5587 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5588 ;
5589 if (*s != '\0')
5590 {
5591 char brac;
5592
5593 if (*s == '[')
5594 brac = ']';
5595 else
5596 {
5597 *s = '[';
5598 brac = '}';
5599 }
5600
5601 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5602 *s = TOUPPER (*s);
252b5132
RH		 5603
5604 if (*s == '\0' || s[1] != '\0')
5605 as_bad (_("bad symbol suffix"));
5606
5607 *s = ']';
5608 }
5609
5610 return name;
5611}
5612
5613/* Set the class of a symbol based on the suffix, if any. This is
5614 called whenever a new symbol is created. */
5615
5616void
98027b10 5617ppc_symbol_new_hook (symbolS *sym)
252b5132 5618{
809ffe0d 5619 struct ppc_tc_sy *tc;
252b5132
RH		 5620 const char *s;
5621
809ffe0d
ILT		 5622 tc = symbol_get_tc (sym);
5623 tc->next = NULL;
5624 tc->output = 0;
96d56e9f 5625 tc->symbol_class = -1;
809ffe0d
ILT		 5626 tc->real_name = NULL;
5627 tc->subseg = 0;
5628 tc->align = 0;
85645aed
TG		 5629 tc->u.size = NULL;
5630 tc->u.dw = NULL;
809ffe0d 5631 tc->within = NULL;
252b5132
RH		 5632
5633 if (ppc_stab_symbol)
5634 return;
5635
5636 s = strchr (S_GET_NAME (sym), '[');
5637 if (s == (const char *) NULL)
5638 {
5639 /* There is no suffix. */
5640 return;
5641 }
5642
5643 ++s;
5644
5645 switch (s[0])
5646 {
5647 case 'B':
5648 if (strcmp (s, "BS]") == 0)
96d56e9f 5649 tc->symbol_class = XMC_BS;
252b5132
RH		 5650 break;
5651 case 'D':
5652 if (strcmp (s, "DB]") == 0)
96d56e9f 5653 tc->symbol_class = XMC_DB;
252b5132 5654 else if (strcmp (s, "DS]") == 0)
96d56e9f 5655 tc->symbol_class = XMC_DS;
252b5132
RH		 5656 break;
5657 case 'G':
5658 if (strcmp (s, "GL]") == 0)
96d56e9f 5659 tc->symbol_class = XMC_GL;
252b5132
RH		 5660 break;
5661 case 'P':
5662 if (strcmp (s, "PR]") == 0)
96d56e9f 5663 tc->symbol_class = XMC_PR;
252b5132
RH		 5664 break;
5665 case 'R':
5666 if (strcmp (s, "RO]") == 0)
96d56e9f 5667 tc->symbol_class = XMC_RO;
252b5132 5668 else if (strcmp (s, "RW]") == 0)
96d56e9f 5669 tc->symbol_class = XMC_RW;
252b5132
RH		 5670 break;
5671 case 'S':
5672 if (strcmp (s, "SV]") == 0)
96d56e9f 5673 tc->symbol_class = XMC_SV;
252b5132
RH		 5674 break;
5675 case 'T':
5676 if (strcmp (s, "TC]") == 0)
96d56e9f 5677 tc->symbol_class = XMC_TC;
252b5132 5678 else if (strcmp (s, "TI]") == 0)
96d56e9f 5679 tc->symbol_class = XMC_TI;
252b5132 5680 else if (strcmp (s, "TB]") == 0)
96d56e9f 5681 tc->symbol_class = XMC_TB;
252b5132 5682 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5683 tc->symbol_class = XMC_TC0;
252b5132
RH		 5684 break;
5685 case 'U':
5686 if (strcmp (s, "UA]") == 0)
96d56e9f 5687 tc->symbol_class = XMC_UA;
252b5132 5688 else if (strcmp (s, "UC]") == 0)
96d56e9f 5689 tc->symbol_class = XMC_UC;
252b5132
RH		 5690 break;
5691 case 'X':
5692 if (strcmp (s, "XO]") == 0)
96d56e9f 5693 tc->symbol_class = XMC_XO;
252b5132
RH		 5694 break;
5695 }
5696
96d56e9f 5697 if (tc->symbol_class == -1)
d6ed37ed 5698 as_bad (_("unrecognized symbol suffix"));
252b5132
RH		 5699}
5700
5701/* Set the class of a label based on where it is defined. This
5702 handles symbols without suffixes. Also, move the symbol so that it
5703 follows the csect symbol. */
5704
5705void
98027b10 5706ppc_frob_label (symbolS *sym)
252b5132
RH		 5707{
5708 if (ppc_current_csect != (symbolS *) NULL)
5709 {
96d56e9f
NC		 5710 if (symbol_get_tc (sym)->symbol_class == -1)
5711 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5712
5713 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5714 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5715 &symbol_rootP, &symbol_lastP);
5716 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5717 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5718 }
07a53e5c
RH		 5719
5720#ifdef OBJ_ELF
5721 dwarf2_emit_label (sym);
5722#endif
252b5132
RH		 5723}
5724
5725/* This variable is set by ppc_frob_symbol if any absolute symbols are
5726 seen. It tells ppc_adjust_symtab whether it needs to look through
5727 the symbols. */
5728
b34976b6 5729static bfd_boolean ppc_saw_abs;
252b5132
RH		 5730
5731/* Change the name of a symbol just before writing it out. Set the
5732 real name if the .rename pseudo-op was used. Otherwise, remove any
5733 class suffix. Return 1 if the symbol should not be included in the
5734 symbol table. */
5735
5736int
98027b10 5737ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5738{
5739 static symbolS *ppc_last_function;
5740 static symbolS *set_end;
5741
5742 /* Discard symbols that should not be included in the output symbol
5743 table. */
809ffe0d
ILT		 5744 if (! symbol_used_in_reloc_p (sym)
5745 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5746 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5747 && ! symbol_get_tc (sym)->output
252b5132
RH		 5748 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5749 return 1;
5750
a161fe53
AM		 5751 /* This one will disappear anyway. Don't make a csect sym for it. */
5752 if (sym == abs_section_sym)
5753 return 1;
5754
809ffe0d
ILT		 5755 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5756 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5757 else
5758 {
5759 const char *name;
5760 const char *s;
5761
5762 name = S_GET_NAME (sym);
5763 s = strchr (name, '[');
5764 if (s != (char *) NULL)
5765 {
5766 unsigned int len;
5767 char *snew;
5768
5769 len = s - name;
5770 snew = xmalloc (len + 1);
5771 memcpy (snew, name, len);
5772 snew[len] = '\0';
5773
5774 S_SET_NAME (sym, snew);
5775 }
5776 }
5777
5778 if (set_end != (symbolS *) NULL)
5779 {
5780 SA_SET_SYM_ENDNDX (set_end, sym);
5781 set_end = NULL;
5782 }
5783
5784 if (SF_GET_FUNCTION (sym))
5785 {
5786 if (ppc_last_function != (symbolS *) NULL)
5787 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5788 ppc_last_function = sym;
85645aed 5789 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5790 {
85645aed 5791 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5792 SA_SET_SYM_FSIZE (sym,
85645aed 5793 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5794 }
5795 }
5796 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5797 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5798 {
5799 if (ppc_last_function == (symbolS *) NULL)
5800 as_bad (_(".ef with no preceding .function"));
5801 else
5802 {
5803 set_end = ppc_last_function;
5804 ppc_last_function = NULL;
5805
5806 /* We don't have a C_EFCN symbol, but we need to force the
5807 COFF backend to believe that it has seen one. */
5808 coff_last_function = NULL;
5809 }
5810 }
5811
670ec21d 5812 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5813 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5814 && S_GET_STORAGE_CLASS (sym) != C_FILE
5815 && S_GET_STORAGE_CLASS (sym) != C_FCN
5816 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5817 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5818 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5819 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5820 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5821 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5822 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5823
5824 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5825 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5826 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5827 {
5828 int i;
5829 union internal_auxent *a;
5830
5831 /* Create a csect aux. */
5832 i = S_GET_NUMBER_AUXILIARY (sym);
5833 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5834 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5835 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5836 {
5837 /* This is the TOC table. */
5838 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5839 a->x_csect.x_scnlen.l = 0;
5840 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5841 }
809ffe0d 5842 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5843 {
5844 /* This is a csect symbol. x_scnlen is the size of the
5845 csect. */
809ffe0d 5846 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5847 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5848 S_GET_SEGMENT (sym))
5849 - S_GET_VALUE (sym));
5850 else
5851 {
6386f3a7 5852 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5853 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5854 - S_GET_VALUE (sym));
5855 }
809ffe0d 5856 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5857 }
5858 else if (S_GET_SEGMENT (sym) == bss_section)
5859 {
5860 /* This is a common symbol. */
809ffe0d
ILT		 5861 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5862 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5863 if (S_IS_EXTERNAL (sym))
96d56e9f 5864 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5865 else
96d56e9f 5866 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5867 }
5868 else if (S_GET_SEGMENT (sym) == absolute_section)
5869 {
5870 /* This is an absolute symbol. The csect will be created by
99a814a1 5871 ppc_adjust_symtab. */
b34976b6 5872 ppc_saw_abs = TRUE;
252b5132 5873 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5874 if (symbol_get_tc (sym)->symbol_class == -1)
5875 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5876 }
5877 else if (! S_IS_DEFINED (sym))
5878 {
5879 /* This is an external symbol. */
5880 a->x_csect.x_scnlen.l = 0;
5881 a->x_csect.x_smtyp = XTY_ER;
5882 }
96d56e9f 5883 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5884 {
5885 symbolS *next;
5886
5887 /* This is a TOC definition. x_scnlen is the size of the
5888 TOC entry. */
5889 next = symbol_next (sym);
96d56e9f 5890 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5891 next = symbol_next (next);
5892 if (next == (symbolS *) NULL
96d56e9f 5893 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5894 {
5895 if (ppc_after_toc_frag == (fragS *) NULL)
5896 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5897 data_section)
5898 - S_GET_VALUE (sym));
5899 else
5900 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5901 - S_GET_VALUE (sym));
5902 }
5903 else
5904 {
6386f3a7 5905 resolve_symbol_value (next);
252b5132
RH		 5906 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5907 - S_GET_VALUE (sym));
5908 }
5909 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5910 }
5911 else
5912 {
5913 symbolS *csect;
5914
5915 /* This is a normal symbol definition. x_scnlen is the
5916 symbol index of the containing csect. */
5917 if (S_GET_SEGMENT (sym) == text_section)
5918 csect = ppc_text_csects;
5919 else if (S_GET_SEGMENT (sym) == data_section)
5920 csect = ppc_data_csects;
5921 else
5922 abort ();
5923
5924 /* Skip the initial dummy symbol. */
809ffe0d 5925 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5926
5927 if (csect == (symbolS *) NULL)
5928 {
5929 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5930 a->x_csect.x_scnlen.l = 0;
5931 }
5932 else
5933 {
809ffe0d 5934 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5935 {
6386f3a7 5936 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5937 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5938 > S_GET_VALUE (sym))
252b5132 5939 break;
809ffe0d 5940 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5941 }
5942
809ffe0d
ILT		 5943 a->x_csect.x_scnlen.p =
5944 coffsymbol (symbol_get_bfdsym (csect))->native;
5945 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5946 1;
252b5132
RH		 5947 }
5948 a->x_csect.x_smtyp = XTY_LD;
5949 }
81d4177b 5950
252b5132
RH		 5951 a->x_csect.x_parmhash = 0;
5952 a->x_csect.x_snhash = 0;
96d56e9f 5953 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5954 a->x_csect.x_smclas = XMC_PR;
5955 else
96d56e9f 5956 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5957 a->x_csect.x_stab = 0;
5958 a->x_csect.x_snstab = 0;
5959
5960 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5961 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5962 }
5963 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5964 {
5965 /* We want the value to be the symbol index of the referenced
5966 csect symbol. BFD will do that for us if we set the right
5967 flags. */
b782de16
AM		 5968 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5969 combined_entry_type *c = coffsymbol (bsym)->native;
5970
5971 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5972 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5973 }
5974 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5975 {
5976 symbolS *block;
c734e7e3 5977 valueT base;
252b5132 5978
809ffe0d 5979 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5980 if (block)
5981 {
5982 /* The value is the offset from the enclosing csect. */
5983 symbolS *csect;
5984
5985 csect = symbol_get_tc (block)->within;
5986 resolve_symbol_value (csect);
5987 base = S_GET_VALUE (csect);
5988 }
5989 else
5990 base = 0;
5991
5992 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 5993 }
5994 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5995 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5996 {
5997 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5998 BFD will do that for us if we set the right flags. We have
5999 already set the value correctly. */
809ffe0d 6000 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 6001 }
6002
6003 return 0;
6004}
6005
6006/* Adjust the symbol table. This creates csect symbols for all
6007 absolute symbols. */
6008
6009void
98027b10 6010ppc_adjust_symtab (void)
252b5132
RH		 6011{
6012 symbolS *sym;
6013
6014 if (! ppc_saw_abs)
6015 return;
6016
6017 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6018 {
6019 symbolS *csect;
6020 int i;
6021 union internal_auxent *a;
6022
6023 if (S_GET_SEGMENT (sym) != absolute_section)
6024 continue;
6025
6026 csect = symbol_create (".abs[XO]", absolute_section,
6027 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 6028 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 6029 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6030 i = S_GET_NUMBER_AUXILIARY (csect);
6031 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 6032 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 6033 a->x_csect.x_scnlen.l = 0;
6034 a->x_csect.x_smtyp = XTY_SD;
6035 a->x_csect.x_parmhash = 0;
6036 a->x_csect.x_snhash = 0;
6037 a->x_csect.x_smclas = XMC_XO;
6038 a->x_csect.x_stab = 0;
6039 a->x_csect.x_snstab = 0;
6040
6041 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6042
6043 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 6044 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6045 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6046 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 6047 }
6048
b34976b6 6049 ppc_saw_abs = FALSE;
252b5132
RH		 6050}
6051
6052/* Set the VMA for a section. This is called on all the sections in
6053 turn. */
6054
6055void
98027b10 6056ppc_frob_section (asection *sec)
252b5132 6057{
931e13a6 6058 static bfd_vma vma = 0;
252b5132 6059
85645aed
TG		 6060 /* Dwarf sections start at 0. */
6061 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6062 return;
6063
931e13a6 6064 vma = md_section_align (sec, vma);
252b5132
RH		 6065 bfd_set_section_vma (stdoutput, sec, vma);
6066 vma += bfd_section_size (stdoutput, sec);
6067}
6068
6069#endif /* OBJ_XCOFF */
6070\f
252b5132 6071char *
98027b10 6072md_atof (int type, char *litp, int *sizep)
252b5132 6073{
499ac353 6074 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 6075}
6076
6077/* Write a value out to the object file, using the appropriate
6078 endianness. */
6079
6080void
98027b10 6081md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 6082{
6083 if (target_big_endian)
6084 number_to_chars_bigendian (buf, val, n);
6085 else
6086 number_to_chars_littleendian (buf, val, n);
6087}
6088
6089/* Align a section (I don't know why this is machine dependent). */
6090
6091valueT
3aeeedbb 6092md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 6093{
3aeeedbb
AM		 6094#ifdef OBJ_ELF
6095 return addr;
6096#else
252b5132
RH		 6097 int align = bfd_get_section_alignment (stdoutput, seg);
6098
6099 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 6100#endif
252b5132
RH		 6101}
6102
6103/* We don't have any form of relaxing. */
6104
6105int
98027b10
AM		 6106md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6107 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 6108{
6109 abort ();
6110 return 0;
6111}
6112
6113/* Convert a machine dependent frag. We never generate these. */
6114
6115void
98027b10
AM		 6116md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6117 asection *sec ATTRIBUTE_UNUSED,
6118 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 6119{
6120 abort ();
6121}
6122
6123/* We have no need to default values of symbols. */
6124
252b5132 6125symbolS *
98027b10 6126md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 6127{
6128 return 0;
6129}
6130\f
6131/* Functions concerning relocs. */
6132
6133/* The location from which a PC relative jump should be calculated,
6134 given a PC relative reloc. */
6135
6136long
98027b10 6137md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 6138{
6139 return fixp->fx_frag->fr_address + fixp->fx_where;
6140}
6141
6142#ifdef OBJ_XCOFF
6143
6144/* This is called to see whether a fixup should be adjusted to use a
6145 section symbol. We take the opportunity to change a fixup against
6146 a symbol in the TOC subsegment into a reloc against the
6147 corresponding .tc symbol. */
6148
6149int
98027b10 6150ppc_fix_adjustable (fixS *fix)
252b5132 6151{
b782de16
AM		 6152 valueT val = resolve_symbol_value (fix->fx_addsy);
6153 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6154 TC_SYMFIELD_TYPE *tc;
6155
6156 if (symseg == absolute_section)
6157 return 0;
252b5132 6158
85645aed
TG		 6159 /* Always adjust symbols in debugging sections. */
6160 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6161 return 1;
6162
252b5132 6163 if (ppc_toc_csect != (symbolS *) NULL
252b5132 6164 && fix->fx_addsy != ppc_toc_csect
b782de16 6165 && symseg == data_section
252b5132
RH		 6166 && val >= ppc_toc_frag->fr_address
6167 && (ppc_after_toc_frag == (fragS *) NULL
6168 || val < ppc_after_toc_frag->fr_address))
6169 {
6170 symbolS *sy;
6171
6172 for (sy = symbol_next (ppc_toc_csect);
6173 sy != (symbolS *) NULL;
6174 sy = symbol_next (sy))
6175 {
b782de16
AM		 6176 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6177
96d56e9f 6178 if (sy_tc->symbol_class == XMC_TC0)
252b5132 6179 continue;
96d56e9f 6180 if (sy_tc->symbol_class != XMC_TC)
252b5132 6181 break;
b782de16 6182 if (val == resolve_symbol_value (sy))
252b5132
RH		 6183 {
6184 fix->fx_addsy = sy;
6185 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6186 return 0;
6187 }
6188 }
6189
6190 as_bad_where (fix->fx_file, fix->fx_line,
6191 _("symbol in .toc does not match any .tc"));
6192 }
6193
6194 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 6195 tc = symbol_get_tc (fix->fx_addsy);
6196 if (tc->subseg == 0
96d56e9f
NC		 6197 && tc->symbol_class != XMC_TC0
6198 && tc->symbol_class != XMC_TC
b782de16 6199 && symseg != bss_section
252b5132 6200 /* Don't adjust if this is a reloc in the toc section. */
b782de16 6201 && (symseg != data_section
252b5132
RH		 6202 || ppc_toc_csect == NULL
6203 || val < ppc_toc_frag->fr_address
6204 || (ppc_after_toc_frag != NULL
6205 && val >= ppc_after_toc_frag->fr_address)))
6206 {
2fb4b302 6207 symbolS *csect = tc->within;
252b5132 6208
2fb4b302
TG		 6209 /* If the symbol was not declared by a label (eg: a section symbol),
6210 use the section instead of the csect. This doesn't happen in
6211 normal AIX assembly code. */
6212 if (csect == NULL)
6213 csect = seg_info (symseg)->sym;
252b5132 6214
2fb4b302
TG		 6215 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6216 fix->fx_addsy = csect;
252b5132 6217
b782de16 6218 return 0;
252b5132
RH		 6219 }
6220
6221 /* Adjust a reloc against a .lcomm symbol to be against the base
6222 .lcomm. */
b782de16 6223 if (symseg == bss_section
252b5132
RH		 6224 && ! S_IS_EXTERNAL (fix->fx_addsy))
6225 {
b782de16
AM		 6226 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6227
6228 fix->fx_offset += val - resolve_symbol_value (sy);
6229 fix->fx_addsy = sy;
252b5132
RH		 6230 }
6231
6232 return 0;
6233}
6234
6235/* A reloc from one csect to another must be kept. The assembler
6236 will, of course, keep relocs between sections, and it will keep
6237 absolute relocs, but we need to force it to keep PC relative relocs
6238 between two csects in the same section. */
6239
6240int
98027b10 6241ppc_force_relocation (fixS *fix)
252b5132
RH		 6242{
6243 /* At this point fix->fx_addsy should already have been converted to
6244 a csect symbol. If the csect does not include the fragment, then
6245 we need to force the relocation. */
6246 if (fix->fx_pcrel
6247 && fix->fx_addsy != NULL
809ffe0d
ILT		 6248 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6249 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6250 > fix->fx_frag->fr_address)
6251 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6252 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 6253 <= fix->fx_frag->fr_address))))
6254 return 1;
6255
ae6063d4 6256 return generic_force_reloc (fix);
252b5132
RH		 6257}
6258
2fb4b302
TG		 6259void
6260ppc_new_dot_label (symbolS *sym)
6261{
6262 /* Anchor this label to the current csect for relocations. */
6263 symbol_get_tc (sym)->within = ppc_current_csect;
6264}
6265
252b5132
RH		 6266#endif /* OBJ_XCOFF */
6267
0baf16f2 6268#ifdef OBJ_ELF
a161fe53
AM		 6269/* If this function returns non-zero, it guarantees that a relocation
6270 will be emitted for a fixup. */
6271
6272int
98027b10 6273ppc_force_relocation (fixS *fix)
a161fe53
AM		 6274{
6275 /* Branch prediction relocations must force a relocation, as must
6276 the vtable description relocs. */
6277 switch (fix->fx_r_type)
6278 {
6279 case BFD_RELOC_PPC_B16_BRTAKEN:
6280 case BFD_RELOC_PPC_B16_BRNTAKEN:
6281 case BFD_RELOC_PPC_BA16_BRTAKEN:
6282 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 6283 case BFD_RELOC_24_PLT_PCREL:
a161fe53 6284 case BFD_RELOC_PPC64_TOC:
a161fe53 6285 return 1;
6911b7dc
AM		 6286 case BFD_RELOC_PPC_B26:
6287 case BFD_RELOC_PPC_BA26:
6288 case BFD_RELOC_PPC_B16:
6289 case BFD_RELOC_PPC_BA16:
6290 /* All branch fixups targeting a localentry symbol must
6291 force a relocation. */
6292 if (fix->fx_addsy)
6293 {
6294 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6295 elf_symbol_type *elfsym
6296 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6297 gas_assert (elfsym);
6298 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6299 return 1;
6300 }
6301 break;
a161fe53
AM		 6302 default:
6303 break;
6304 }
6305
cdba85ec
AM		 6306 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6307 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6308 return 1;
6309
ae6063d4 6310 return generic_force_reloc (fix);
a161fe53
AM		 6311}
6312
0baf16f2 6313int
98027b10 6314ppc_fix_adjustable (fixS *fix)
252b5132 6315{
6911b7dc
AM		 6316 switch (fix->fx_r_type)
6317 {
6318 /* All branch fixups targeting a localentry symbol must
6319 continue using the symbol. */
6320 case BFD_RELOC_PPC_B26:
6321 case BFD_RELOC_PPC_BA26:
6322 case BFD_RELOC_PPC_B16:
6323 case BFD_RELOC_PPC_BA16:
6324 case BFD_RELOC_PPC_B16_BRTAKEN:
6325 case BFD_RELOC_PPC_B16_BRNTAKEN:
6326 case BFD_RELOC_PPC_BA16_BRTAKEN:
6327 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6328 if (fix->fx_addsy)
6329 {
6330 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6331 elf_symbol_type *elfsym
6332 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6333 gas_assert (elfsym);
6334 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6335 return 0;
6336 }
6337 break;
6338 default:
6339 break;
6340 }
6341
0baf16f2
AM		 6342 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6343 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6344 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6345 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 6346 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6347 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 6348 && fix->fx_r_type != BFD_RELOC_GPREL16
6349 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6350 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 6351 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 6352 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 6353}
0baf16f2 6354#endif
252b5132 6355
b9c361e0
JL		 6356void
6357ppc_frag_check (struct frag *fragP)
6358{
6359 if (!fragP->has_code)
6360 return;
6361
6362 if (ppc_mach() == bfd_mach_ppc_vle)
6363 {
6364 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6365 as_bad (_("instruction address is not a multiple of 2"));
6366 }
6367 else
6368 {
6369 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6370 as_bad (_("instruction address is not a multiple of 4"));
6371 }
6372}
6373
3aeeedbb
AM		 6374/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6375 rs_align_code frag. */
6376
6377void
6378ppc_handle_align (struct frag *fragP)
6379{
6380 valueT count = (fragP->fr_next->fr_address
6381 - (fragP->fr_address + fragP->fr_fix));
6382
b9c361e0
JL		 6383 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6384 {
6385 char *dest = fragP->fr_literal + fragP->fr_fix;
6386
6387 fragP->fr_var = 2;
6388 md_number_to_chars (dest, 0x4400, 2);
6389 }
6390 else if (count != 0 && (count & 3) == 0)
3aeeedbb
AM		 6391 {
6392 char *dest = fragP->fr_literal + fragP->fr_fix;
6393
6394 fragP->fr_var = 4;
cef4f754
AM		 6395
6396 if (count > 4 * nop_limit && count < 0x2000000)
6397 {
6398 struct frag *rest;
6399
6400 /* Make a branch, then follow with nops. Insert another
6401 frag to handle the nops. */
6402 md_number_to_chars (dest, 0x48000000 + count, 4);
6403 count -= 4;
6404 if (count == 0)
6405 return;
6406
6407 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6408 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6409 fragP->fr_next = rest;
6410 fragP = rest;
6411 rest->fr_address += rest->fr_fix + 4;
6412 rest->fr_fix = 0;
6413 /* If we leave the next frag as rs_align_code we'll come here
6414 again, resulting in a bunch of branches rather than a
6415 branch followed by nops. */
6416 rest->fr_type = rs_align;
6417 dest = rest->fr_literal;
6418 }
6419
3aeeedbb
AM		 6420 md_number_to_chars (dest, 0x60000000, 4);
6421
42240548 6422 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5817ffd1
PB		 6423 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6424 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
3aeeedbb 6425 {
5817ffd1 6426 /* For power6, power7 and power8, we want the last nop to be a group
42240548
PB		 6427 terminating one. Do this by inserting an rs_fill frag immediately
6428 after this one, with its address set to the last nop location.
6429 This will automatically reduce the number of nops in the current
6430 frag by one. */
3aeeedbb
AM		 6431 if (count > 4)
6432 {
6433 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6434
6435 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6436 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6437 group_nop->fr_fix = 0;
6438 group_nop->fr_offset = 1;
6439 group_nop->fr_type = rs_fill;
6440 fragP->fr_next = group_nop;
6441 dest = group_nop->fr_literal;
6442 }
6443
5817ffd1
PB		 6444 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6445 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
aea77599
AM		 6446 {
6447 if (ppc_cpu & PPC_OPCODE_E500MC)
6448 /* e500mc group terminating nop: "ori 0,0,0". */
6449 md_number_to_chars (dest, 0x60000000, 4);
6450 else
5817ffd1 6451 /* power7/power8 group terminating nop: "ori 2,2,0". */
aea77599
AM		 6452 md_number_to_chars (dest, 0x60420000, 4);
6453 }
42240548
PB		 6454 else
6455 /* power6 group terminating nop: "ori 1,1,0". */
6456 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6457 }
6458 }
6459}
6460
252b5132 6461/* Apply a fixup to the object code. This is called for all the
3b8b57a9 6462 fixups we generated by the calls to fix_new_exp, above. */
252b5132 6463
94f592af 6464void
62ebcb5c 6465md_apply_fix (fixS *fixP, valueT *valP, segT seg)
252b5132 6466{
94f592af 6467 valueT value = * valP;
5656a981
AM		 6468 offsetT fieldval;
6469 const struct powerpc_operand *operand;
252b5132
RH		 6470
6471#ifdef OBJ_ELF
94f592af 6472 if (fixP->fx_addsy != NULL)
252b5132 6473 {
a161fe53 6474 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6475 if (fixP->fx_pcrel)
6476 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 6477 }
6478 else
94f592af 6479 fixP->fx_done = 1;
252b5132 6480#else
a161fe53 6481 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6482 the symbol values. If we are doing this relocation the code in
6483 write.c is going to call bfd_install_relocation, which is also
6484 going to use the symbol value. That means that if the reloc is
6485 fully resolved we want to use *valP since bfd_install_relocation is
6486 not being used.
9f0eb232
RS		 6487 However, if the reloc is not fully resolved we do not want to
6488 use *valP, and must use fx_offset instead. If the relocation
6489 is PC-relative, we then need to re-apply md_pcrel_from_section
6490 to this new relocation value. */
94f592af
NC		 6491 if (fixP->fx_addsy == (symbolS *) NULL)
6492 fixP->fx_done = 1;
6493
252b5132 6494 else
9f0eb232
RS		 6495 {
6496 value = fixP->fx_offset;
6497 if (fixP->fx_pcrel)
6498 value -= md_pcrel_from_section (fixP, seg);
6499 }
a161fe53
AM		 6500#endif
6501
6502 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6503 {
a161fe53
AM		 6504 /* We can't actually support subtracting a symbol. */
6505 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6506 }
252b5132 6507
5656a981 6508 operand = NULL;
3b8b57a9 6509 if (fixP->fx_pcrel_adjust != 0)
252b5132 6510 {
5656a981 6511 /* This is a fixup on an instruction. */
3b8b57a9 6512 int opindex = fixP->fx_pcrel_adjust & 0xff;
252b5132 6513
5656a981 6514 operand = &powerpc_operands[opindex];
252b5132 6515#ifdef OBJ_XCOFF
0baf16f2
AM		 6516 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6517 does not generate a reloc. It uses the offset of `sym' within its
6518 csect. Other usages, such as `.long sym', generate relocs. This
6519 is the documented behaviour of non-TOC symbols. */
252b5132 6520 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6521 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6522 && operand->shift == 0
2b3c4602 6523 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6524 && fixP->fx_addsy != NULL
6525 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6526 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6527 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6528 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6529 {
94f592af
NC		 6530 value = fixP->fx_offset;
6531 fixP->fx_done = 1;
252b5132 6532 }
ac21e7da
TG		 6533
6534 /* During parsing of instructions, a TOC16 reloc is generated for
6535 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6536 in the toc. But at parse time, SYM may be not yet defined, so
6537 check again here. */
6538 if (fixP->fx_r_type == BFD_RELOC_16
6539 && fixP->fx_addsy != NULL
6540 && ppc_is_toc_sym (fixP->fx_addsy))
6541 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
252b5132 6542#endif
5656a981
AM		 6543 }
6544
6545 /* Calculate value to be stored in field. */
6546 fieldval = value;
6547 switch (fixP->fx_r_type)
6548 {
1ec2d25e 6549#ifdef OBJ_ELF
5656a981
AM		 6550 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6551 case BFD_RELOC_PPC_VLE_LO16A:
6552 case BFD_RELOC_PPC_VLE_LO16D:
1ec2d25e 6553#endif
5656a981
AM		 6554 case BFD_RELOC_LO16:
6555 case BFD_RELOC_LO16_PCREL:
6556 fieldval = value & 0xffff;
6557 sign_extend_16:
6558 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
f9c6b907 6559 fieldval = SEX16 (fieldval);
5656a981
AM		 6560 fixP->fx_no_overflow = 1;
6561 break;
3c9d25f4 6562
f9c6b907
AM		 6563 case BFD_RELOC_HI16:
6564 case BFD_RELOC_HI16_PCREL:
5656a981 6565#ifdef OBJ_ELF
f9c6b907
AM		 6566 if (REPORT_OVERFLOW_HI && ppc_obj64)
6567 {
6568 fieldval = value >> 16;
6569 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6570 {
6571 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6572 fieldval = ((valueT) fieldval ^ sign) - sign;
6573 }
6574 break;
6575 }
6576 /* Fall thru */
6577
5656a981
AM		 6578 case BFD_RELOC_PPC_VLE_HI16A:
6579 case BFD_RELOC_PPC_VLE_HI16D:
f9c6b907 6580 case BFD_RELOC_PPC64_ADDR16_HIGH:
5656a981 6581#endif
5656a981
AM		 6582 fieldval = PPC_HI (value);
6583 goto sign_extend_16;
0baf16f2 6584
f9c6b907
AM		 6585 case BFD_RELOC_HI16_S:
6586 case BFD_RELOC_HI16_S_PCREL:
5656a981 6587#ifdef OBJ_ELF
f9c6b907
AM		 6588 if (REPORT_OVERFLOW_HI && ppc_obj64)
6589 {
6590 fieldval = (value + 0x8000) >> 16;
6591 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6592 {
6593 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6594 fieldval = ((valueT) fieldval ^ sign) - sign;
6595 }
6596 break;
6597 }
6598 /* Fall thru */
6599
5656a981
AM		 6600 case BFD_RELOC_PPC_VLE_HA16A:
6601 case BFD_RELOC_PPC_VLE_HA16D:
f9c6b907 6602 case BFD_RELOC_PPC64_ADDR16_HIGHA:
5656a981 6603#endif
5656a981
AM		 6604 fieldval = PPC_HA (value);
6605 goto sign_extend_16;
0baf16f2 6606
3b8b57a9 6607#ifdef OBJ_ELF
5656a981
AM		 6608 case BFD_RELOC_PPC64_HIGHER:
6609 fieldval = PPC_HIGHER (value);
6610 goto sign_extend_16;
252b5132 6611
5656a981
AM		 6612 case BFD_RELOC_PPC64_HIGHER_S:
6613 fieldval = PPC_HIGHERA (value);
6614 goto sign_extend_16;
0baf16f2 6615
5656a981
AM		 6616 case BFD_RELOC_PPC64_HIGHEST:
6617 fieldval = PPC_HIGHEST (value);
6618 goto sign_extend_16;
0baf16f2 6619
5656a981
AM		 6620 case BFD_RELOC_PPC64_HIGHEST_S:
6621 fieldval = PPC_HIGHESTA (value);
6622 goto sign_extend_16;
6623#endif
6624
6625 default:
6626 break;
6627 }
6628
6629 if (operand != NULL)
6630 {
6631 /* Handle relocs in an insn. */
6632 char *where;
6633 unsigned long insn;
0baf16f2 6634
5656a981
AM		 6635 switch (fixP->fx_r_type)
6636 {
7fa9fcb6 6637#ifdef OBJ_ELF
3b8b57a9
AM		 6638 /* The following relocs can't be calculated by the assembler.
6639 Leave the field zero. */
cdba85ec
AM		 6640 case BFD_RELOC_PPC_TPREL16:
6641 case BFD_RELOC_PPC_TPREL16_LO:
6642 case BFD_RELOC_PPC_TPREL16_HI:
6643 case BFD_RELOC_PPC_TPREL16_HA:
cdba85ec
AM		 6644 case BFD_RELOC_PPC_DTPREL16:
6645 case BFD_RELOC_PPC_DTPREL16_LO:
6646 case BFD_RELOC_PPC_DTPREL16_HI:
6647 case BFD_RELOC_PPC_DTPREL16_HA:
cdba85ec
AM		 6648 case BFD_RELOC_PPC_GOT_TLSGD16:
6649 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6650 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6651 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6652 case BFD_RELOC_PPC_GOT_TLSLD16:
6653 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6654 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6655 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6656 case BFD_RELOC_PPC_GOT_TPREL16:
6657 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6658 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6659 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6660 case BFD_RELOC_PPC_GOT_DTPREL16:
6661 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6662 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6663 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6664 case BFD_RELOC_PPC64_TPREL16_DS:
6665 case BFD_RELOC_PPC64_TPREL16_LO_DS:
f9c6b907
AM		 6666 case BFD_RELOC_PPC64_TPREL16_HIGH:
6667 case BFD_RELOC_PPC64_TPREL16_HIGHA:
cdba85ec
AM		 6668 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6669 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6670 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6671 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
f9c6b907
AM		 6672 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6673 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
cdba85ec
AM		 6674 case BFD_RELOC_PPC64_DTPREL16_DS:
6675 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6676 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6677 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6678 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6679 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
3b8b57a9 6680 gas_assert (fixP->fx_addsy != NULL);
7c1d0959 6681 S_SET_THREAD_LOCAL (fixP->fx_addsy);
3b8b57a9 6682 fieldval = 0;
cdba85ec 6683 break;
3b8b57a9
AM		 6684
6685 /* These also should leave the field zero for the same
6686 reason. Note that older versions of gas wrote values
6687 here. If we want to go back to the old behaviour, then
6688 all _LO and _LO_DS cases will need to be treated like
6689 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6690 case BFD_RELOC_16_GOTOFF:
6691 case BFD_RELOC_LO16_GOTOFF:
6692 case BFD_RELOC_HI16_GOTOFF:
6693 case BFD_RELOC_HI16_S_GOTOFF:
6694 case BFD_RELOC_LO16_PLTOFF:
6695 case BFD_RELOC_HI16_PLTOFF:
6696 case BFD_RELOC_HI16_S_PLTOFF:
6697 case BFD_RELOC_GPREL16:
6698 case BFD_RELOC_16_BASEREL:
6699 case BFD_RELOC_LO16_BASEREL:
6700 case BFD_RELOC_HI16_BASEREL:
6701 case BFD_RELOC_HI16_S_BASEREL:
6702 case BFD_RELOC_PPC_TOC16:
6703 case BFD_RELOC_PPC64_TOC16_LO:
6704 case BFD_RELOC_PPC64_TOC16_HI:
6705 case BFD_RELOC_PPC64_TOC16_HA:
6706 case BFD_RELOC_PPC64_PLTGOT16:
6707 case BFD_RELOC_PPC64_PLTGOT16_LO:
6708 case BFD_RELOC_PPC64_PLTGOT16_HI:
6709 case BFD_RELOC_PPC64_PLTGOT16_HA:
6710 case BFD_RELOC_PPC64_GOT16_DS:
6711 case BFD_RELOC_PPC64_GOT16_LO_DS:
6712 case BFD_RELOC_PPC64_PLT16_LO_DS:
6713 case BFD_RELOC_PPC64_SECTOFF_DS:
6714 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6715 case BFD_RELOC_PPC64_TOC16_DS:
6716 case BFD_RELOC_PPC64_TOC16_LO_DS:
6717 case BFD_RELOC_PPC64_PLTGOT16_DS:
6718 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6719 case BFD_RELOC_PPC_EMB_NADDR16:
6720 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6721 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6722 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6723 case BFD_RELOC_PPC_EMB_SDAI16:
6724 case BFD_RELOC_PPC_EMB_SDA2I16:
6725 case BFD_RELOC_PPC_EMB_SDA2REL:
252b5132 6726 case BFD_RELOC_PPC_EMB_SDA21:
3b8b57a9
AM		 6727 case BFD_RELOC_PPC_EMB_MRKREF:
6728 case BFD_RELOC_PPC_EMB_RELSEC16:
6729 case BFD_RELOC_PPC_EMB_RELST_LO:
6730 case BFD_RELOC_PPC_EMB_RELST_HI:
6731 case BFD_RELOC_PPC_EMB_RELST_HA:
6732 case BFD_RELOC_PPC_EMB_BIT_FLD:
6733 case BFD_RELOC_PPC_EMB_RELSDA:
6734 case BFD_RELOC_PPC_VLE_SDA21:
6735 case BFD_RELOC_PPC_VLE_SDA21_LO:
6736 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6737 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6738 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6739 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6740 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6741 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6742 gas_assert (fixP->fx_addsy != NULL);
6743 /* Fall thru */
6744
6745 case BFD_RELOC_PPC_TLS:
6746 case BFD_RELOC_PPC_TLSGD:
6747 case BFD_RELOC_PPC_TLSLD:
6748 fieldval = 0;
3b8b57a9 6749 break;
7fa9fcb6
TG		 6750#endif
6751
6752#ifdef OBJ_XCOFF
6753 case BFD_RELOC_PPC_B16:
6754 /* Adjust the offset to the instruction boundary. */
6755 fieldval += 2;
6756 break;
6757#endif
252b5132 6758
3b8b57a9 6759 default:
252b5132 6760 break;
3b8b57a9 6761 }
252b5132 6762
3b8b57a9
AM		 6763#ifdef OBJ_ELF
6764/* powerpc uses RELA style relocs, so if emitting a reloc the field
6765 contents can stay at zero. */
6766#define APPLY_RELOC fixP->fx_done
6767#else
6768#define APPLY_RELOC 1
6769#endif
6770 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6771 {
6772 /* Fetch the instruction, insert the fully resolved operand
6773 value, and stuff the instruction back again. */
6774 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6775 if (target_big_endian)
31a91399 6776 {
3b8b57a9
AM		 6777 if (fixP->fx_size == 4)
6778 insn = bfd_getb32 ((unsigned char *) where);
31a91399 6779 else
3b8b57a9 6780 insn = bfd_getb16 ((unsigned char *) where);
31a91399
NC		 6781 }
6782 else
3b8b57a9
AM		 6783 {
6784 if (fixP->fx_size == 4)
6785 insn = bfd_getl32 ((unsigned char *) where);
6786 else
6787 insn = bfd_getl16 ((unsigned char *) where);
6788 }
6789 insn = ppc_insert_operand (insn, operand, fieldval,
6790 fixP->tc_fix_data.ppc_cpu,
6791 fixP->fx_file, fixP->fx_line);
6792 if (target_big_endian)
6793 {
6794 if (fixP->fx_size == 4)
6795 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6796 else
6797 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6798 }
6799 else
6800 {
6801 if (fixP->fx_size == 4)
6802 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6803 else
6804 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6805 }
6806 }
6807
6808 if (fixP->fx_done)
6809 /* Nothing else to do here. */
6810 return;
6811
6812 gas_assert (fixP->fx_addsy != NULL);
62ebcb5c 6813 if (fixP->fx_r_type == BFD_RELOC_NONE)
3b8b57a9
AM		 6814 {
6815 char *sfile;
6816 unsigned int sline;
6817
6818 /* Use expr_symbol_where to see if this is an expression
6819 symbol. */
6820 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6821 as_bad_where (fixP->fx_file, fixP->fx_line,
6822 _("unresolved expression that must be resolved"));
6823 else
6824 as_bad_where (fixP->fx_file, fixP->fx_line,
6825 _("unsupported relocation against %s"),
6826 S_GET_NAME (fixP->fx_addsy));
6827 fixP->fx_done = 1;
6828 return;
6829 }
6830 }
6831 else
6832 {
6833 /* Handle relocs in data. */
6834 switch (fixP->fx_r_type)
6835 {
252b5132 6836 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6837 if (fixP->fx_addsy
6838 && !S_IS_DEFINED (fixP->fx_addsy)
6839 && !S_IS_WEAK (fixP->fx_addsy))
6840 S_SET_WEAK (fixP->fx_addsy);
3b8b57a9 6841 /* Fall thru */
252b5132
RH		 6842
6843 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6844 fixP->fx_done = 0;
252b5132
RH		 6845 break;
6846
0baf16f2 6847#ifdef OBJ_ELF
3b8b57a9
AM		 6848 /* These can appear with @l etc. in data. */
6849 case BFD_RELOC_LO16:
3b8b57a9 6850 case BFD_RELOC_LO16_PCREL:
3b8b57a9 6851 case BFD_RELOC_HI16:
3b8b57a9 6852 case BFD_RELOC_HI16_PCREL:
3b8b57a9 6853 case BFD_RELOC_HI16_S:
3b8b57a9 6854 case BFD_RELOC_HI16_S_PCREL:
3b8b57a9 6855 case BFD_RELOC_PPC64_HIGHER:
3b8b57a9 6856 case BFD_RELOC_PPC64_HIGHER_S:
3b8b57a9 6857 case BFD_RELOC_PPC64_HIGHEST:
3b8b57a9 6858 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 6859 case BFD_RELOC_PPC64_ADDR16_HIGH:
6860 case BFD_RELOC_PPC64_ADDR16_HIGHA:
45965137 6861 case BFD_RELOC_PPC64_ADDR64_LOCAL:
3b8b57a9
AM		 6862 break;
6863
6864 case BFD_RELOC_PPC_DTPMOD:
6865 case BFD_RELOC_PPC_TPREL:
6866 case BFD_RELOC_PPC_DTPREL:
6867 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6868 break;
6869
6870 /* Just punt all of these to the linker. */
6871 case BFD_RELOC_PPC_B16_BRTAKEN:
6872 case BFD_RELOC_PPC_B16_BRNTAKEN:
6873 case BFD_RELOC_16_GOTOFF:
6874 case BFD_RELOC_LO16_GOTOFF:
6875 case BFD_RELOC_HI16_GOTOFF:
6876 case BFD_RELOC_HI16_S_GOTOFF:
6877 case BFD_RELOC_LO16_PLTOFF:
6878 case BFD_RELOC_HI16_PLTOFF:
6879 case BFD_RELOC_HI16_S_PLTOFF:
6880 case BFD_RELOC_PPC_COPY:
6881 case BFD_RELOC_PPC_GLOB_DAT:
6882 case BFD_RELOC_16_BASEREL:
6883 case BFD_RELOC_LO16_BASEREL:
6884 case BFD_RELOC_HI16_BASEREL:
6885 case BFD_RELOC_HI16_S_BASEREL:
6886 case BFD_RELOC_PPC_TLS:
6887 case BFD_RELOC_PPC_DTPREL16_LO:
6888 case BFD_RELOC_PPC_DTPREL16_HI:
6889 case BFD_RELOC_PPC_DTPREL16_HA:
6890 case BFD_RELOC_PPC_TPREL16_LO:
6891 case BFD_RELOC_PPC_TPREL16_HI:
6892 case BFD_RELOC_PPC_TPREL16_HA:
6893 case BFD_RELOC_PPC_GOT_TLSGD16:
6894 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6895 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6896 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6897 case BFD_RELOC_PPC_GOT_TLSLD16:
6898 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6899 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6900 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6901 case BFD_RELOC_PPC_GOT_DTPREL16:
6902 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6903 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6904 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6905 case BFD_RELOC_PPC_GOT_TPREL16:
6906 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6907 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6908 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6909 case BFD_RELOC_24_PLT_PCREL:
6910 case BFD_RELOC_PPC_LOCAL24PC:
6911 case BFD_RELOC_32_PLT_PCREL:
6912 case BFD_RELOC_GPREL16:
6913 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6914 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6915 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6916 case BFD_RELOC_PPC_EMB_NADDR32:
6917 case BFD_RELOC_PPC_EMB_NADDR16:
6918 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6919 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6920 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6921 case BFD_RELOC_PPC_EMB_SDAI16:
6922 case BFD_RELOC_PPC_EMB_SDA2REL:
6923 case BFD_RELOC_PPC_EMB_SDA2I16:
6924 case BFD_RELOC_PPC_EMB_SDA21:
6925 case BFD_RELOC_PPC_VLE_SDA21_LO:
6926 case BFD_RELOC_PPC_EMB_MRKREF:
6927 case BFD_RELOC_PPC_EMB_RELSEC16:
6928 case BFD_RELOC_PPC_EMB_RELST_LO:
6929 case BFD_RELOC_PPC_EMB_RELST_HI:
6930 case BFD_RELOC_PPC_EMB_RELST_HA:
6931 case BFD_RELOC_PPC_EMB_BIT_FLD:
6932 case BFD_RELOC_PPC_EMB_RELSDA:
0baf16f2 6933 case BFD_RELOC_PPC64_TOC:
3b8b57a9
AM		 6934 case BFD_RELOC_PPC_TOC16:
6935 case BFD_RELOC_PPC64_TOC16_LO:
6936 case BFD_RELOC_PPC64_TOC16_HI:
6937 case BFD_RELOC_PPC64_TOC16_HA:
f9c6b907
AM		 6938 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6939 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
3b8b57a9
AM		 6940 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6941 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6942 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6943 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
f9c6b907
AM		 6944 case BFD_RELOC_PPC64_TPREL16_HIGH:
6945 case BFD_RELOC_PPC64_TPREL16_HIGHA:
3b8b57a9
AM		 6946 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6947 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6948 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6949 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
94f592af 6950 fixP->fx_done = 0;
0baf16f2 6951 break;
0baf16f2 6952#endif
3b8b57a9
AM		 6953
6954#ifdef OBJ_XCOFF
6955 case BFD_RELOC_NONE:
3b8b57a9 6956#endif
5656a981
AM		 6957 case BFD_RELOC_CTOR:
6958 case BFD_RELOC_32:
6959 case BFD_RELOC_32_PCREL:
6960 case BFD_RELOC_RVA:
6961 case BFD_RELOC_64:
6962 case BFD_RELOC_64_PCREL:
6963 case BFD_RELOC_16:
6964 case BFD_RELOC_16_PCREL:
6965 case BFD_RELOC_8:
6966 break;
3b8b57a9 6967
252b5132 6968 default:
bc805888 6969 fprintf (stderr,
94f592af 6970 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6971 fflush (stderr);
252b5132
RH		 6972 abort ();
6973 }
46b596ff 6974
5656a981 6975 if (fixP->fx_size && APPLY_RELOC)
46b596ff 6976 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5656a981 6977 fieldval, fixP->fx_size);
bf7279d5
AM		 6978 if (warn_476
6979 && (seg->flags & SEC_CODE) != 0
6980 && fixP->fx_size == 4
6981 && fixP->fx_done
6982 && !fixP->fx_tcbit
6983 && (fixP->fx_r_type == BFD_RELOC_32
6984 || fixP->fx_r_type == BFD_RELOC_CTOR
6985 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
6986 as_warn_where (fixP->fx_file, fixP->fx_line,
6987 _("data in executable section"));
5656a981
AM		 6988 }
6989
6990 /* We are only able to convert some relocs to pc-relative. */
6991 if (!fixP->fx_done && fixP->fx_pcrel)
6992 {
6993 switch (fixP->fx_r_type)
6994 {
6995 case BFD_RELOC_LO16:
6996 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6997 break;
6998
6999 case BFD_RELOC_HI16:
7000 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
7001 break;
7002
7003 case BFD_RELOC_HI16_S:
7004 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
7005 break;
7006
7007 case BFD_RELOC_64:
7008 fixP->fx_r_type = BFD_RELOC_64_PCREL;
7009 break;
7010
7011 case BFD_RELOC_32:
7012 fixP->fx_r_type = BFD_RELOC_32_PCREL;
7013 break;
7014
7015 case BFD_RELOC_16:
7016 fixP->fx_r_type = BFD_RELOC_16_PCREL;
7017 break;
7018
7019 /* Some of course are already pc-relative. */
7020 case BFD_RELOC_LO16_PCREL:
7021 case BFD_RELOC_HI16_PCREL:
7022 case BFD_RELOC_HI16_S_PCREL:
7023 case BFD_RELOC_64_PCREL:
7024 case BFD_RELOC_32_PCREL:
7025 case BFD_RELOC_16_PCREL:
7026 case BFD_RELOC_PPC_B16:
7027 case BFD_RELOC_PPC_B16_BRTAKEN:
7028 case BFD_RELOC_PPC_B16_BRNTAKEN:
7029 case BFD_RELOC_PPC_B26:
7030 case BFD_RELOC_PPC_LOCAL24PC:
7031 case BFD_RELOC_24_PLT_PCREL:
7032 case BFD_RELOC_32_PLT_PCREL:
7033 case BFD_RELOC_64_PLT_PCREL:
7034 case BFD_RELOC_PPC_VLE_REL8:
7035 case BFD_RELOC_PPC_VLE_REL15:
7036 case BFD_RELOC_PPC_VLE_REL24:
7037 break;
7038
7039 default:
7040 if (fixP->fx_addsy)
7041 {
7042 char *sfile;
7043 unsigned int sline;
7044
7045 /* Use expr_symbol_where to see if this is an
7046 expression symbol. */
7047 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7048 as_bad_where (fixP->fx_file, fixP->fx_line,
7049 _("unresolved expression that must"
7050 " be resolved"));
7051 else
7052 as_bad_where (fixP->fx_file, fixP->fx_line,
7053 _("cannot emit PC relative %s relocation"
7054 " against %s"),
7055 bfd_get_reloc_code_name (fixP->fx_r_type),
7056 S_GET_NAME (fixP->fx_addsy));
7057 }
7058 else
7059 as_bad_where (fixP->fx_file, fixP->fx_line,
7060 _("unable to resolve expression"));
7061 fixP->fx_done = 1;
7062 break;
7063 }
252b5132
RH		 7064 }
7065
7066#ifdef OBJ_ELF
3b8b57a9 7067 ppc_elf_validate_fix (fixP, seg);
94f592af 7068 fixP->fx_addnumber = value;
4e6935a6
AM		 7069
7070 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7071 from the section contents. If we are going to be emitting a reloc
7072 then the section contents are immaterial, so don't warn if they
7073 happen to overflow. Leave such warnings to ld. */
7074 if (!fixP->fx_done)
a38a07e0
AM		 7075 {
7076 fixP->fx_no_overflow = 1;
7077
7078 /* Arrange to emit .TOC. as a normal symbol if used in anything
7079 but .TOC.@tocbase. */
7080 if (ppc_obj64
7081 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7082 && fixP->fx_addsy != NULL
7083 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7084 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7085 }
252b5132 7086#else
94f592af
NC		 7087 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7088 fixP->fx_addnumber = 0;
252b5132
RH		 7089 else
7090 {
7091#ifdef TE_PE
94f592af 7092 fixP->fx_addnumber = 0;
252b5132 7093#else
8edcbfcd
TG		 7094 /* We want to use the offset within the toc, not the actual VMA
7095 of the symbol. */
94f592af 7096 fixP->fx_addnumber =
8edcbfcd
TG		 7097 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7098 - S_GET_VALUE (ppc_toc_csect);
ac21e7da
TG		 7099 /* Set *valP to avoid errors. */
7100 *valP = value;
252b5132
RH		 7101#endif
7102 }
7103#endif
252b5132
RH		 7104}
7105
7106/* Generate a reloc for a fixup. */
7107
7108arelent *
98027b10 7109tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 7110{
7111 arelent *reloc;
7112
7113 reloc = (arelent *) xmalloc (sizeof (arelent));
7114
49309057
ILT		 7115 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
7116 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 7117 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7118 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7119 if (reloc->howto == (reloc_howto_type *) NULL)
7120 {
7121 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 7122 _("reloc %d not supported by object file format"),
7123 (int) fixp->fx_r_type);
252b5132
RH		 7124 return NULL;
7125 }
7126 reloc->addend = fixp->fx_addnumber;
7127
7128 return reloc;
7129}
75e21f08
JJ		 7130
7131void
98027b10 7132ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 7133{
7134 cfi_add_CFA_def_cfa (1, 0);
7135}
7136
7137int
1df69f4f 7138tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 7139{
7140 unsigned int regnum = -1;
7141 unsigned int i;
7142 const char *p;
7143 char *q;
7144 static struct { char *name; int dw2regnum; } regnames[] =
7145 {
7146 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7147 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 7148 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 7149 { "spe_acc", 111 }, { "spefscr", 112 }
7150 };
7151
7152 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7153 if (strcmp (regnames[i].name, regname) == 0)
7154 return regnames[i].dw2regnum;
7155
7156 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7157 {
7158 p = regname + 1 + (regname[1] == '.');
7159 regnum = strtoul (p, &q, 10);
7160 if (p == q || *q || regnum >= 32)
7161 return -1;
7162 if (regname[0] == 'f')
b7d7dc63 7163 regnum += 32;
75e21f08 7164 else if (regname[0] == 'v')
b7d7dc63 7165 regnum += 77;
75e21f08
JJ		 7166 }
7167 else if (regname[0] == 'c' && regname[1] == 'r')
7168 {
7169 p = regname + 2 + (regname[2] == '.');
7170 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 7171 return -1;
75e21f08
JJ		 7172 regnum = p[0] - '0' + 68;
7173 }
7174 return regnum;
7175}
GDB Binutils - Deliverables
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