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linux-tdep.c: Fix "warning: 'siginfo_size' may be used uninitialized..."
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
aea77599 3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
cc643b88 4 Free Software Foundation, Inc.
252b5132
RH		 5 Written by Ian Lance Taylor, Cygnus Support.
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
ec2655a6 11 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 02110-1301, USA. */
252b5132 23
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
85645aed
TG		 39#ifdef OBJ_XCOFF
40#include "coff/xcoff.h"
41#include "libxcoff.h"
42#endif
43
252b5132
RH		 44/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45
46/* Tell the main code what the endianness is. */
47extern int target_big_endian;
48
49/* Whether or not, we've set target_big_endian. */
50static int set_target_endian = 0;
51
52/* Whether to use user friendly register names. */
53#ifndef TARGET_REG_NAMES_P
54#ifdef TE_PE
b34976b6 55#define TARGET_REG_NAMES_P TRUE
252b5132 56#else
b34976b6 57#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 58#endif
59#endif
60
0baf16f2
AM		 61/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
62 HIGHESTA. */
63
64/* #lo(value) denotes the least significant 16 bits of the indicated. */
65#define PPC_LO(v) ((v) & 0xffff)
66
67/* #hi(value) denotes bits 16 through 31 of the indicated value. */
68#define PPC_HI(v) (((v) >> 16) & 0xffff)
69
70/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
71 the indicated value, compensating for #lo() being treated as a
72 signed number. */
15c1449b 73#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 74
75/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 76#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 77
78/* #highera(value) denotes bits 32 through 47 of the indicated value,
79 compensating for #lo() being treated as a signed number. */
15c1449b 80#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 81
82/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 83#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 84
85/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 86 compensating for #lo being treated as a signed number. */
87#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 88
89#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
90
b34976b6 91static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 92
98027b10
AM		 93static void ppc_macro (char *, const struct powerpc_macro *);
94static void ppc_byte (int);
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 97static void ppc_tc (int);
98static void ppc_machine (int);
0baf16f2 99#endif
252b5132
RH		 100
101#ifdef OBJ_XCOFF
98027b10
AM		 102static void ppc_comm (int);
103static void ppc_bb (int);
104static void ppc_bc (int);
105static void ppc_bf (int);
106static void ppc_biei (int);
107static void ppc_bs (int);
108static void ppc_eb (int);
109static void ppc_ec (int);
110static void ppc_ef (int);
111static void ppc_es (int);
112static void ppc_csect (int);
85645aed 113static void ppc_dwsect (int);
98027b10
AM		 114static void ppc_change_csect (symbolS *, offsetT);
115static void ppc_function (int);
116static void ppc_extern (int);
117static void ppc_lglobl (int);
c865e45b 118static void ppc_ref (int);
98027b10
AM		 119static void ppc_section (int);
120static void ppc_named_section (int);
121static void ppc_stabx (int);
122static void ppc_rename (int);
123static void ppc_toc (int);
124static void ppc_xcoff_cons (int);
125static void ppc_vbyte (int);
252b5132
RH		 126#endif
127
128#ifdef OBJ_ELF
98027b10
AM		 129static void ppc_elf_cons (int);
130static void ppc_elf_rdata (int);
131static void ppc_elf_lcomm (int);
252b5132
RH		 132#endif
133
134#ifdef TE_PE
98027b10
AM		 135static void ppc_previous (int);
136static void ppc_pdata (int);
137static void ppc_ydata (int);
138static void ppc_reldata (int);
139static void ppc_rdata (int);
140static void ppc_ualong (int);
141static void ppc_znop (int);
142static void ppc_pe_comm (int);
143static void ppc_pe_section (int);
144static void ppc_pe_function (int);
145static void ppc_pe_tocd (int);
252b5132
RH		 146#endif
147\f
148/* Generic assembler global variables which must be defined by all
149 targets. */
150
151#ifdef OBJ_ELF
152/* This string holds the chars that always start a comment. If the
153 pre-processor is disabled, these aren't very useful. The macro
154 tc_comment_chars points to this. We use this, rather than the
155 usual comment_chars, so that we can switch for Solaris conventions. */
156static const char ppc_solaris_comment_chars[] = "#!";
157static const char ppc_eabi_comment_chars[] = "#";
158
159#ifdef TARGET_SOLARIS_COMMENT
160const char *ppc_comment_chars = ppc_solaris_comment_chars;
161#else
162const char *ppc_comment_chars = ppc_eabi_comment_chars;
163#endif
164#else
165const char comment_chars[] = "#";
166#endif
167
168/* Characters which start a comment at the beginning of a line. */
169const char line_comment_chars[] = "#";
170
171/* Characters which may be used to separate multiple commands on a
172 single line. */
173const char line_separator_chars[] = ";";
174
175/* Characters which are used to indicate an exponent in a floating
176 point number. */
177const char EXP_CHARS[] = "eE";
178
179/* Characters which mean that a number is a floating point constant,
180 as in 0d1.0. */
181const char FLT_CHARS[] = "dD";
5ce8663f 182
5e02f92e 183/* Anything that can start an operand needs to be mentioned here,
ac805826 184 to stop the input scrubber eating whitespace. */
5e02f92e 185const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 186
187/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
188int ppc_cie_data_alignment;
783de163 189
8fbf7334
JL		 190/* The dwarf2 minimum instruction length. */
191int ppc_dwarf2_line_min_insn_length;
192
cef4f754
AM		 193/* More than this number of nops in an alignment op gets a branch
194 instead. */
195unsigned long nop_limit = 4;
196
783de163
AM		 197/* The type of processor we are assembling for. This is one or more
198 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 199ppc_cpu_t ppc_cpu = 0;
776fc418 200ppc_cpu_t sticky = 0;
01efc3af
AM		 201
202/* Flags set on encountering toc relocs. */
203enum {
204 has_large_toc_reloc = 1,
205 has_small_toc_reloc = 2
206} toc_reloc_types;
252b5132
RH		 207\f
208/* The target specific pseudo-ops which we support. */
209
210const pseudo_typeS md_pseudo_table[] =
211{
212 /* Pseudo-ops which must be overridden. */
213 { "byte", ppc_byte, 0 },
214
215#ifdef OBJ_XCOFF
216 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
217 legitimately belong in the obj-*.c file. However, XCOFF is based
218 on COFF, and is only implemented for the RS/6000. We just use
219 obj-coff.c, and add what we need here. */
220 { "comm", ppc_comm, 0 },
221 { "lcomm", ppc_comm, 1 },
222 { "bb", ppc_bb, 0 },
223 { "bc", ppc_bc, 0 },
224 { "bf", ppc_bf, 0 },
225 { "bi", ppc_biei, 0 },
226 { "bs", ppc_bs, 0 },
227 { "csect", ppc_csect, 0 },
85645aed 228 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 229 { "data", ppc_section, 'd' },
230 { "eb", ppc_eb, 0 },
231 { "ec", ppc_ec, 0 },
232 { "ef", ppc_ef, 0 },
233 { "ei", ppc_biei, 1 },
234 { "es", ppc_es, 0 },
235 { "extern", ppc_extern, 0 },
236 { "function", ppc_function, 0 },
237 { "lglobl", ppc_lglobl, 0 },
c865e45b 238 { "ref", ppc_ref, 0 },
252b5132
RH		 239 { "rename", ppc_rename, 0 },
240 { "section", ppc_named_section, 0 },
241 { "stabx", ppc_stabx, 0 },
242 { "text", ppc_section, 't' },
243 { "toc", ppc_toc, 0 },
244 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 245 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 246 { "word", ppc_xcoff_cons, 1 },
247 { "short", ppc_xcoff_cons, 1 },
248 { "vbyte", ppc_vbyte, 0 },
249#endif
250
251#ifdef OBJ_ELF
0baf16f2
AM		 252 { "llong", ppc_elf_cons, 8 },
253 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 254 { "long", ppc_elf_cons, 4 },
255 { "word", ppc_elf_cons, 2 },
256 { "short", ppc_elf_cons, 2 },
257 { "rdata", ppc_elf_rdata, 0 },
258 { "rodata", ppc_elf_rdata, 0 },
259 { "lcomm", ppc_elf_lcomm, 0 },
260#endif
261
262#ifdef TE_PE
99a814a1 263 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 264 { "previous", ppc_previous, 0 },
265 { "pdata", ppc_pdata, 0 },
266 { "ydata", ppc_ydata, 0 },
267 { "reldata", ppc_reldata, 0 },
268 { "rdata", ppc_rdata, 0 },
269 { "ualong", ppc_ualong, 0 },
270 { "znop", ppc_znop, 0 },
271 { "comm", ppc_pe_comm, 0 },
272 { "lcomm", ppc_pe_comm, 1 },
273 { "section", ppc_pe_section, 0 },
274 { "function", ppc_pe_function,0 },
275 { "tocd", ppc_pe_tocd, 0 },
276#endif
277
0baf16f2 278#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 279 { "tc", ppc_tc, 0 },
0baf16f2
AM		 280 { "machine", ppc_machine, 0 },
281#endif
252b5132
RH		 282
283 { NULL, NULL, 0 }
284};
285
286\f
99a814a1
AM		 287/* Predefined register names if -mregnames (or default for Windows NT).
288 In general, there are lots of them, in an attempt to be compatible
289 with a number of other Windows NT assemblers. */
252b5132
RH		 290
291/* Structure to hold information about predefined registers. */
292struct pd_reg
293 {
294 char *name;
295 int value;
296 };
297
298/* List of registers that are pre-defined:
299
300 Each general register has predefined names of the form:
301 1. r<reg_num> which has the value <reg_num>.
302 2. r.<reg_num> which has the value <reg_num>.
303
252b5132
RH		 304 Each floating point register has predefined names of the form:
305 1. f<reg_num> which has the value <reg_num>.
306 2. f.<reg_num> which has the value <reg_num>.
307
7a899fff
C		 308 Each vector unit register has predefined names of the form:
309 1. v<reg_num> which has the value <reg_num>.
310 2. v.<reg_num> which has the value <reg_num>.
311
252b5132
RH		 312 Each condition register has predefined names of the form:
313 1. cr<reg_num> which has the value <reg_num>.
314 2. cr.<reg_num> which has the value <reg_num>.
315
316 There are individual registers as well:
317 sp or r.sp has the value 1
318 rtoc or r.toc has the value 2
319 fpscr has the value 0
320 xer has the value 1
321 lr has the value 8
322 ctr has the value 9
323 pmr has the value 0
324 dar has the value 19
325 dsisr has the value 18
326 dec has the value 22
327 sdr1 has the value 25
328 srr0 has the value 26
329 srr1 has the value 27
330
81d4177b 331 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 332
333static const struct pd_reg pre_defined_registers[] =
334{
335 { "cr.0", 0 }, /* Condition Registers */
336 { "cr.1", 1 },
337 { "cr.2", 2 },
338 { "cr.3", 3 },
339 { "cr.4", 4 },
340 { "cr.5", 5 },
341 { "cr.6", 6 },
342 { "cr.7", 7 },
343
344 { "cr0", 0 },
345 { "cr1", 1 },
346 { "cr2", 2 },
347 { "cr3", 3 },
348 { "cr4", 4 },
349 { "cr5", 5 },
350 { "cr6", 6 },
351 { "cr7", 7 },
352
353 { "ctr", 9 },
354
355 { "dar", 19 }, /* Data Access Register */
356 { "dec", 22 }, /* Decrementer */
357 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
358
359 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 360 { "f.1", 1 },
361 { "f.10", 10 },
362 { "f.11", 11 },
363 { "f.12", 12 },
364 { "f.13", 13 },
365 { "f.14", 14 },
366 { "f.15", 15 },
367 { "f.16", 16 },
368 { "f.17", 17 },
369 { "f.18", 18 },
370 { "f.19", 19 },
371 { "f.2", 2 },
372 { "f.20", 20 },
373 { "f.21", 21 },
374 { "f.22", 22 },
375 { "f.23", 23 },
376 { "f.24", 24 },
377 { "f.25", 25 },
378 { "f.26", 26 },
379 { "f.27", 27 },
380 { "f.28", 28 },
381 { "f.29", 29 },
382 { "f.3", 3 },
252b5132
RH		 383 { "f.30", 30 },
384 { "f.31", 31 },
066be9f7
PB		 385
386 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
387 { "f.33", 33 },
388 { "f.34", 34 },
389 { "f.35", 35 },
390 { "f.36", 36 },
391 { "f.37", 37 },
392 { "f.38", 38 },
393 { "f.39", 39 },
81d4177b 394 { "f.4", 4 },
066be9f7
PB		 395 { "f.40", 40 },
396 { "f.41", 41 },
397 { "f.42", 42 },
398 { "f.43", 43 },
399 { "f.44", 44 },
400 { "f.45", 45 },
401 { "f.46", 46 },
402 { "f.47", 47 },
403 { "f.48", 48 },
404 { "f.49", 49 },
81d4177b 405 { "f.5", 5 },
066be9f7
PB		 406 { "f.50", 50 },
407 { "f.51", 51 },
408 { "f.52", 52 },
409 { "f.53", 53 },
410 { "f.54", 54 },
411 { "f.55", 55 },
412 { "f.56", 56 },
413 { "f.57", 57 },
414 { "f.58", 58 },
415 { "f.59", 59 },
81d4177b 416 { "f.6", 6 },
066be9f7
PB		 417 { "f.60", 60 },
418 { "f.61", 61 },
419 { "f.62", 62 },
420 { "f.63", 63 },
81d4177b
KH		 421 { "f.7", 7 },
422 { "f.8", 8 },
423 { "f.9", 9 },
424
425 { "f0", 0 },
426 { "f1", 1 },
427 { "f10", 10 },
428 { "f11", 11 },
429 { "f12", 12 },
430 { "f13", 13 },
431 { "f14", 14 },
432 { "f15", 15 },
433 { "f16", 16 },
434 { "f17", 17 },
435 { "f18", 18 },
436 { "f19", 19 },
437 { "f2", 2 },
438 { "f20", 20 },
439 { "f21", 21 },
440 { "f22", 22 },
441 { "f23", 23 },
442 { "f24", 24 },
443 { "f25", 25 },
444 { "f26", 26 },
445 { "f27", 27 },
446 { "f28", 28 },
447 { "f29", 29 },
448 { "f3", 3 },
252b5132
RH		 449 { "f30", 30 },
450 { "f31", 31 },
066be9f7
PB		 451
452 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
453 { "f33", 33 },
454 { "f34", 34 },
455 { "f35", 35 },
456 { "f36", 36 },
457 { "f37", 37 },
458 { "f38", 38 },
459 { "f39", 39 },
81d4177b 460 { "f4", 4 },
066be9f7
PB		 461 { "f40", 40 },
462 { "f41", 41 },
463 { "f42", 42 },
464 { "f43", 43 },
465 { "f44", 44 },
466 { "f45", 45 },
467 { "f46", 46 },
468 { "f47", 47 },
469 { "f48", 48 },
470 { "f49", 49 },
81d4177b 471 { "f5", 5 },
066be9f7
PB		 472 { "f50", 50 },
473 { "f51", 51 },
474 { "f52", 52 },
475 { "f53", 53 },
476 { "f54", 54 },
477 { "f55", 55 },
478 { "f56", 56 },
479 { "f57", 57 },
480 { "f58", 58 },
481 { "f59", 59 },
81d4177b 482 { "f6", 6 },
066be9f7
PB		 483 { "f60", 60 },
484 { "f61", 61 },
485 { "f62", 62 },
486 { "f63", 63 },
81d4177b
KH		 487 { "f7", 7 },
488 { "f8", 8 },
489 { "f9", 9 },
252b5132
RH		 490
491 { "fpscr", 0 },
492
c3d65c1c
BE		 493 /* Quantization registers used with pair single instructions. */
494 { "gqr.0", 0 },
495 { "gqr.1", 1 },
496 { "gqr.2", 2 },
497 { "gqr.3", 3 },
498 { "gqr.4", 4 },
499 { "gqr.5", 5 },
500 { "gqr.6", 6 },
501 { "gqr.7", 7 },
502 { "gqr0", 0 },
503 { "gqr1", 1 },
504 { "gqr2", 2 },
505 { "gqr3", 3 },
506 { "gqr4", 4 },
507 { "gqr5", 5 },
508 { "gqr6", 6 },
509 { "gqr7", 7 },
510
252b5132
RH		 511 { "lr", 8 }, /* Link Register */
512
513 { "pmr", 0 },
514
515 { "r.0", 0 }, /* General Purpose Registers */
516 { "r.1", 1 },
517 { "r.10", 10 },
518 { "r.11", 11 },
519 { "r.12", 12 },
520 { "r.13", 13 },
521 { "r.14", 14 },
522 { "r.15", 15 },
523 { "r.16", 16 },
524 { "r.17", 17 },
525 { "r.18", 18 },
526 { "r.19", 19 },
527 { "r.2", 2 },
528 { "r.20", 20 },
529 { "r.21", 21 },
530 { "r.22", 22 },
531 { "r.23", 23 },
532 { "r.24", 24 },
533 { "r.25", 25 },
534 { "r.26", 26 },
535 { "r.27", 27 },
536 { "r.28", 28 },
537 { "r.29", 29 },
538 { "r.3", 3 },
539 { "r.30", 30 },
540 { "r.31", 31 },
541 { "r.4", 4 },
542 { "r.5", 5 },
543 { "r.6", 6 },
544 { "r.7", 7 },
545 { "r.8", 8 },
546 { "r.9", 9 },
547
548 { "r.sp", 1 }, /* Stack Pointer */
549
550 { "r.toc", 2 }, /* Pointer to the table of contents */
551
552 { "r0", 0 }, /* More general purpose registers */
553 { "r1", 1 },
554 { "r10", 10 },
555 { "r11", 11 },
556 { "r12", 12 },
557 { "r13", 13 },
558 { "r14", 14 },
559 { "r15", 15 },
560 { "r16", 16 },
561 { "r17", 17 },
562 { "r18", 18 },
563 { "r19", 19 },
564 { "r2", 2 },
565 { "r20", 20 },
566 { "r21", 21 },
567 { "r22", 22 },
568 { "r23", 23 },
569 { "r24", 24 },
570 { "r25", 25 },
571 { "r26", 26 },
572 { "r27", 27 },
573 { "r28", 28 },
574 { "r29", 29 },
575 { "r3", 3 },
576 { "r30", 30 },
577 { "r31", 31 },
578 { "r4", 4 },
579 { "r5", 5 },
580 { "r6", 6 },
581 { "r7", 7 },
582 { "r8", 8 },
583 { "r9", 9 },
584
585 { "rtoc", 2 }, /* Table of contents */
586
587 { "sdr1", 25 }, /* Storage Description Register 1 */
588
589 { "sp", 1 },
590
591 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
592 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 593
066be9f7 594 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 595 { "v.1", 1 },
596 { "v.10", 10 },
597 { "v.11", 11 },
598 { "v.12", 12 },
599 { "v.13", 13 },
600 { "v.14", 14 },
601 { "v.15", 15 },
602 { "v.16", 16 },
603 { "v.17", 17 },
604 { "v.18", 18 },
605 { "v.19", 19 },
606 { "v.2", 2 },
607 { "v.20", 20 },
608 { "v.21", 21 },
609 { "v.22", 22 },
610 { "v.23", 23 },
611 { "v.24", 24 },
612 { "v.25", 25 },
613 { "v.26", 26 },
614 { "v.27", 27 },
615 { "v.28", 28 },
616 { "v.29", 29 },
617 { "v.3", 3 },
7a899fff
C		 618 { "v.30", 30 },
619 { "v.31", 31 },
81d4177b
KH		 620 { "v.4", 4 },
621 { "v.5", 5 },
622 { "v.6", 6 },
623 { "v.7", 7 },
624 { "v.8", 8 },
625 { "v.9", 9 },
7a899fff
C		 626
627 { "v0", 0 },
81d4177b
KH		 628 { "v1", 1 },
629 { "v10", 10 },
630 { "v11", 11 },
631 { "v12", 12 },
632 { "v13", 13 },
633 { "v14", 14 },
634 { "v15", 15 },
635 { "v16", 16 },
636 { "v17", 17 },
637 { "v18", 18 },
638 { "v19", 19 },
639 { "v2", 2 },
640 { "v20", 20 },
641 { "v21", 21 },
642 { "v22", 22 },
643 { "v23", 23 },
644 { "v24", 24 },
645 { "v25", 25 },
646 { "v26", 26 },
647 { "v27", 27 },
648 { "v28", 28 },
649 { "v29", 29 },
650 { "v3", 3 },
7a899fff
C		 651 { "v30", 30 },
652 { "v31", 31 },
81d4177b
KH		 653 { "v4", 4 },
654 { "v5", 5 },
655 { "v6", 6 },
656 { "v7", 7 },
657 { "v8", 8 },
7a899fff 658 { "v9", 9 },
252b5132 659
066be9f7
PB		 660 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
661 { "vs.1", 1 },
662 { "vs.10", 10 },
663 { "vs.11", 11 },
664 { "vs.12", 12 },
665 { "vs.13", 13 },
666 { "vs.14", 14 },
667 { "vs.15", 15 },
668 { "vs.16", 16 },
669 { "vs.17", 17 },
670 { "vs.18", 18 },
671 { "vs.19", 19 },
672 { "vs.2", 2 },
673 { "vs.20", 20 },
674 { "vs.21", 21 },
675 { "vs.22", 22 },
676 { "vs.23", 23 },
677 { "vs.24", 24 },
678 { "vs.25", 25 },
679 { "vs.26", 26 },
680 { "vs.27", 27 },
681 { "vs.28", 28 },
682 { "vs.29", 29 },
683 { "vs.3", 3 },
684 { "vs.30", 30 },
685 { "vs.31", 31 },
686 { "vs.32", 32 },
687 { "vs.33", 33 },
688 { "vs.34", 34 },
689 { "vs.35", 35 },
690 { "vs.36", 36 },
691 { "vs.37", 37 },
692 { "vs.38", 38 },
693 { "vs.39", 39 },
694 { "vs.4", 4 },
695 { "vs.40", 40 },
696 { "vs.41", 41 },
697 { "vs.42", 42 },
698 { "vs.43", 43 },
699 { "vs.44", 44 },
700 { "vs.45", 45 },
701 { "vs.46", 46 },
702 { "vs.47", 47 },
703 { "vs.48", 48 },
704 { "vs.49", 49 },
705 { "vs.5", 5 },
706 { "vs.50", 50 },
707 { "vs.51", 51 },
708 { "vs.52", 52 },
709 { "vs.53", 53 },
710 { "vs.54", 54 },
711 { "vs.55", 55 },
712 { "vs.56", 56 },
713 { "vs.57", 57 },
714 { "vs.58", 58 },
715 { "vs.59", 59 },
716 { "vs.6", 6 },
717 { "vs.60", 60 },
718 { "vs.61", 61 },
719 { "vs.62", 62 },
720 { "vs.63", 63 },
721 { "vs.7", 7 },
722 { "vs.8", 8 },
723 { "vs.9", 9 },
724
725 { "vs0", 0 },
726 { "vs1", 1 },
727 { "vs10", 10 },
728 { "vs11", 11 },
729 { "vs12", 12 },
730 { "vs13", 13 },
731 { "vs14", 14 },
732 { "vs15", 15 },
733 { "vs16", 16 },
734 { "vs17", 17 },
735 { "vs18", 18 },
736 { "vs19", 19 },
737 { "vs2", 2 },
738 { "vs20", 20 },
739 { "vs21", 21 },
740 { "vs22", 22 },
741 { "vs23", 23 },
742 { "vs24", 24 },
743 { "vs25", 25 },
744 { "vs26", 26 },
745 { "vs27", 27 },
746 { "vs28", 28 },
747 { "vs29", 29 },
748 { "vs3", 3 },
749 { "vs30", 30 },
750 { "vs31", 31 },
751 { "vs32", 32 },
752 { "vs33", 33 },
753 { "vs34", 34 },
754 { "vs35", 35 },
755 { "vs36", 36 },
756 { "vs37", 37 },
757 { "vs38", 38 },
758 { "vs39", 39 },
759 { "vs4", 4 },
760 { "vs40", 40 },
761 { "vs41", 41 },
762 { "vs42", 42 },
763 { "vs43", 43 },
764 { "vs44", 44 },
765 { "vs45", 45 },
766 { "vs46", 46 },
767 { "vs47", 47 },
768 { "vs48", 48 },
769 { "vs49", 49 },
770 { "vs5", 5 },
771 { "vs50", 50 },
772 { "vs51", 51 },
773 { "vs52", 52 },
774 { "vs53", 53 },
775 { "vs54", 54 },
776 { "vs55", 55 },
777 { "vs56", 56 },
778 { "vs57", 57 },
779 { "vs58", 58 },
780 { "vs59", 59 },
781 { "vs6", 6 },
782 { "vs60", 60 },
783 { "vs61", 61 },
784 { "vs62", 62 },
785 { "vs63", 63 },
786 { "vs7", 7 },
787 { "vs8", 8 },
788 { "vs9", 9 },
789
252b5132
RH		 790 { "xer", 1 },
791
792};
793
bc805888 794#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 795
796/* Given NAME, find the register number associated with that name, return
797 the integer value associated with the given name or -1 on failure. */
798
252b5132 799static int
98027b10 800reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 801{
802 int middle, low, high;
803 int cmp;
804
805 low = 0;
806 high = regcount - 1;
807
808 do
809 {
810 middle = (low + high) / 2;
811 cmp = strcasecmp (name, regs[middle].name);
812 if (cmp < 0)
813 high = middle - 1;
814 else if (cmp > 0)
815 low = middle + 1;
816 else
817 return regs[middle].value;
818 }
819 while (low <= high);
820
821 return -1;
822}
823
824/*
99a814a1 825 * Summary of register_name.
252b5132
RH		 826 *
827 * in: Input_line_pointer points to 1st char of operand.
828 *
829 * out: A expressionS.
830 * The operand may have been a register: in this case, X_op == O_register,
831 * X_add_number is set to the register number, and truth is returned.
832 * Input_line_pointer->(next non-blank) char after operand, or is in its
833 * original state.
834 */
835
b34976b6 836static bfd_boolean
98027b10 837register_name (expressionS *expressionP)
252b5132
RH		 838{
839 int reg_number;
840 char *name;
841 char *start;
842 char c;
843
99a814a1 844 /* Find the spelling of the operand. */
252b5132 845 start = name = input_line_pointer;
3882b010 846 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 847 name = ++input_line_pointer;
848
3882b010 849 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 850 return FALSE;
252b5132
RH		 851
852 c = get_symbol_end ();
853 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
854
468cced8
AM		 855 /* Put back the delimiting char. */
856 *input_line_pointer = c;
857
99a814a1 858 /* Look to see if it's in the register table. */
81d4177b 859 if (reg_number >= 0)
252b5132
RH		 860 {
861 expressionP->X_op = O_register;
862 expressionP->X_add_number = reg_number;
81d4177b 863
99a814a1 864 /* Make the rest nice. */
252b5132
RH		 865 expressionP->X_add_symbol = NULL;
866 expressionP->X_op_symbol = NULL;
b34976b6 867 return TRUE;
252b5132 868 }
468cced8
AM		 869
870 /* Reset the line as if we had not done anything. */
871 input_line_pointer = start;
b34976b6 872 return FALSE;
252b5132
RH		 873}
874\f
875/* This function is called for each symbol seen in an expression. It
876 handles the special parsing which PowerPC assemblers are supposed
877 to use for condition codes. */
878
879/* Whether to do the special parsing. */
b34976b6 880static bfd_boolean cr_operand;
252b5132
RH		 881
882/* Names to recognize in a condition code. This table is sorted. */
883static const struct pd_reg cr_names[] =
884{
885 { "cr0", 0 },
886 { "cr1", 1 },
887 { "cr2", 2 },
888 { "cr3", 3 },
889 { "cr4", 4 },
890 { "cr5", 5 },
891 { "cr6", 6 },
892 { "cr7", 7 },
893 { "eq", 2 },
894 { "gt", 1 },
895 { "lt", 0 },
896 { "so", 3 },
897 { "un", 3 }
898};
899
900/* Parsing function. This returns non-zero if it recognized an
901 expression. */
902
903int
91d6fa6a 904ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 905{
906 int val;
907
908 if (! cr_operand)
909 return 0;
910
13abbae3
AM		 911 if (*name == '%')
912 ++name;
252b5132
RH		 913 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
914 name);
915 if (val < 0)
916 return 0;
917
91d6fa6a
NC		 918 exp->X_op = O_constant;
919 exp->X_add_number = val;
252b5132
RH		 920
921 return 1;
922}
923\f
924/* Local variables. */
925
2b3c4602
AM		 926/* Whether to target xcoff64/elf64. */
927static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 928
252b5132
RH		 929/* Opcode hash table. */
930static struct hash_control *ppc_hash;
931
932/* Macro hash table. */
933static struct hash_control *ppc_macro_hash;
934
935#ifdef OBJ_ELF
99a814a1 936/* What type of shared library support to use. */
5d6f4f16 937static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 938
99a814a1 939/* Flags to set in the elf header. */
252b5132
RH		 940static flagword ppc_flags = 0;
941
942/* Whether this is Solaris or not. */
943#ifdef TARGET_SOLARIS_COMMENT
b34976b6 944#define SOLARIS_P TRUE
252b5132 945#else
b34976b6 946#define SOLARIS_P FALSE
252b5132
RH		 947#endif
948
b34976b6 949static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 950#endif
951
952#ifdef OBJ_XCOFF
953
954/* The RS/6000 assembler uses the .csect pseudo-op to generate code
955 using a bunch of different sections. These assembler sections,
956 however, are all encompassed within the .text or .data sections of
957 the final output file. We handle this by using different
958 subsegments within these main segments. */
959
960/* Next subsegment to allocate within the .text segment. */
961static subsegT ppc_text_subsegment = 2;
962
963/* Linked list of csects in the text section. */
964static symbolS *ppc_text_csects;
965
966/* Next subsegment to allocate within the .data segment. */
967static subsegT ppc_data_subsegment = 2;
968
969/* Linked list of csects in the data section. */
970static symbolS *ppc_data_csects;
971
972/* The current csect. */
973static symbolS *ppc_current_csect;
974
975/* The RS/6000 assembler uses a TOC which holds addresses of functions
976 and variables. Symbols are put in the TOC with the .tc pseudo-op.
977 A special relocation is used when accessing TOC entries. We handle
978 the TOC as a subsegment within the .data segment. We set it up if
979 we see a .toc pseudo-op, and save the csect symbol here. */
980static symbolS *ppc_toc_csect;
981
982/* The first frag in the TOC subsegment. */
983static fragS *ppc_toc_frag;
984
985/* The first frag in the first subsegment after the TOC in the .data
986 segment. NULL if there are no subsegments after the TOC. */
987static fragS *ppc_after_toc_frag;
988
989/* The current static block. */
990static symbolS *ppc_current_block;
991
992/* The COFF debugging section; set by md_begin. This is not the
993 .debug section, but is instead the secret BFD section which will
994 cause BFD to set the section number of a symbol to N_DEBUG. */
995static asection *ppc_coff_debug_section;
996
85645aed
TG		 997/* Structure to set the length field of the dwarf sections. */
998struct dw_subsection {
999 /* Subsections are simply linked. */
1000 struct dw_subsection *link;
1001
1002 /* The subsection number. */
1003 subsegT subseg;
1004
1005 /* Expression to compute the length of the section. */
1006 expressionS end_exp;
1007};
1008
1009static struct dw_section {
1010 /* Corresponding section. */
1011 segT sect;
1012
1013 /* Simply linked list of subsections with a label. */
1014 struct dw_subsection *list_subseg;
1015
1016 /* The anonymous subsection. */
1017 struct dw_subsection *anon_subseg;
1018} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1019#endif /* OBJ_XCOFF */
1020
1021#ifdef TE_PE
1022
1023/* Various sections that we need for PE coff support. */
1024static segT ydata_section;
1025static segT pdata_section;
1026static segT reldata_section;
1027static segT rdata_section;
1028static segT tocdata_section;
1029
81d4177b 1030/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1031static segT ppc_previous_section;
1032static segT ppc_current_section;
1033
1034#endif /* TE_PE */
1035
1036#ifdef OBJ_ELF
1037symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1038#define PPC_APUINFO_ISEL 0x40
1039#define PPC_APUINFO_PMR 0x41
1040#define PPC_APUINFO_RFMCI 0x42
1041#define PPC_APUINFO_CACHELCK 0x43
1042#define PPC_APUINFO_SPE 0x100
1043#define PPC_APUINFO_EFS 0x101
1044#define PPC_APUINFO_BRLOCK 0x102
b9c361e0 1045#define PPC_APUINFO_VLE 0x104
6a0c61b7 1046
b34976b6
AM		 1047/*
1048 * We keep a list of APUinfo
6a0c61b7
EZ		 1049 */
1050unsigned long *ppc_apuinfo_list;
1051unsigned int ppc_apuinfo_num;
1052unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1053#endif /* OBJ_ELF */
1054\f
1055#ifdef OBJ_ELF
15c1449b 1056const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1057#else
15c1449b 1058const char *const md_shortopts = "um:";
252b5132 1059#endif
cef4f754 1060#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1061const struct option md_longopts[] = {
cef4f754 1062 {"nops", required_argument, NULL, OPTION_NOPS},
252b5132
RH		 1063 {NULL, no_argument, NULL, 0}
1064};
15c1449b 1065const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1066
1067int
98027b10 1068md_parse_option (int c, char *arg)
252b5132 1069{
69fe9ce5
AM		 1070 ppc_cpu_t new_cpu;
1071
252b5132
RH		 1072 switch (c)
1073 {
1074 case 'u':
1075 /* -u means that any undefined symbols should be treated as
1076 external, which is the default for gas anyhow. */
1077 break;
1078
1079#ifdef OBJ_ELF
1080 case 'l':
1081 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1082 sake, recognize -be also. */
252b5132
RH		 1083 if (strcmp (arg, "e") == 0)
1084 {
1085 target_big_endian = 0;
1086 set_target_endian = 1;
b9c361e0 1087 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1088 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1089 }
1090 else
1091 return 0;
1092
1093 break;
1094
1095 case 'b':
1096 if (strcmp (arg, "e") == 0)
1097 {
1098 target_big_endian = 1;
1099 set_target_endian = 1;
1100 }
1101 else
1102 return 0;
1103
1104 break;
1105
1106 case 'K':
99a814a1 1107 /* Recognize -K PIC. */
252b5132
RH		 1108 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1109 {
1110 shlib = SHLIB_PIC;
1111 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1112 }
1113 else
1114 return 0;
1115
1116 break;
1117#endif
1118
7f6d05e8
CP		 1119 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1120 case 'a':
1121 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1122 {
1123#ifdef BFD64
1124 ppc_obj64 = 1;
d6ed37ed
AM		 1125 if (ppc_cpu & PPC_OPCODE_VLE)
1126 as_bad (_("the use of -mvle requires -a32."));
2a98c3a6
AM		 1127#else
1128 as_fatal (_("%s unsupported"), "-a64");
1129#endif
1130 }
7f6d05e8 1131 else if (strcmp (arg, "32") == 0)
2b3c4602 1132 ppc_obj64 = 0;
7f6d05e8
CP		 1133 else
1134 return 0;
1135 break;
81d4177b 1136
252b5132 1137 case 'm':
776fc418 1138 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
b9c361e0
JL		 1139 if (new_cpu != 0)
1140 {
1141 ppc_cpu = new_cpu;
d6ed37ed
AM		 1142 if (strcmp (arg, "vle") == 0)
1143 {
1144 if (set_target_endian && target_big_endian == 0)
1145 as_bad (_("the use of -mvle requires big endian."));
1146 if (ppc_obj64)
1147 as_bad (_("the use of -mvle requires -a32."));
1148 }
b9c361e0 1149 }
252b5132
RH		 1150
1151 else if (strcmp (arg, "regnames") == 0)
b34976b6 1152 reg_names_p = TRUE;
252b5132
RH		 1153
1154 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1155 reg_names_p = FALSE;
252b5132
RH		 1156
1157#ifdef OBJ_ELF
99a814a1
AM		 1158 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1159 that require relocation. */
252b5132
RH		 1160 else if (strcmp (arg, "relocatable") == 0)
1161 {
5d6f4f16 1162 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1163 ppc_flags |= EF_PPC_RELOCATABLE;
1164 }
1165
1166 else if (strcmp (arg, "relocatable-lib") == 0)
1167 {
5d6f4f16 1168 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1169 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1170 }
1171
99a814a1 1172 /* -memb, set embedded bit. */
252b5132
RH		 1173 else if (strcmp (arg, "emb") == 0)
1174 ppc_flags |= EF_PPC_EMB;
1175
cc643b88 1176 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1177 else if (strcmp (arg, "little") == 0
1178 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1179 {
1180 target_big_endian = 0;
1181 set_target_endian = 1;
b9c361e0 1182 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1183 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1184 }
1185
1186 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1187 {
1188 target_big_endian = 1;
1189 set_target_endian = 1;
1190 }
1191
1192 else if (strcmp (arg, "solaris") == 0)
1193 {
b34976b6 1194 msolaris = TRUE;
252b5132
RH		 1195 ppc_comment_chars = ppc_solaris_comment_chars;
1196 }
1197
1198 else if (strcmp (arg, "no-solaris") == 0)
1199 {
b34976b6 1200 msolaris = FALSE;
252b5132
RH		 1201 ppc_comment_chars = ppc_eabi_comment_chars;
1202 }
1203#endif
1204 else
1205 {
1206 as_bad (_("invalid switch -m%s"), arg);
1207 return 0;
1208 }
1209 break;
1210
1211#ifdef OBJ_ELF
1212 /* -V: SVR4 argument to print version ID. */
1213 case 'V':
1214 print_version_id ();
1215 break;
1216
1217 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1218 should be emitted or not. FIXME: Not implemented. */
1219 case 'Q':
1220 break;
1221
1222 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1223 rather than .stabs.excl, which is ignored by the linker.
1224 FIXME: Not implemented. */
1225 case 's':
1226 if (arg)
1227 return 0;
1228
1229 break;
1230#endif
1231
cef4f754
AM		 1232 case OPTION_NOPS:
1233 {
1234 char *end;
1235 nop_limit = strtoul (optarg, &end, 0);
1236 if (*end)
1237 as_bad (_("--nops needs a numeric argument"));
1238 }
1239 break;
85645aed 1240
252b5132
RH		 1241 default:
1242 return 0;
1243 }
1244
1245 return 1;
1246}
1247
1248void
98027b10 1249md_show_usage (FILE *stream)
252b5132 1250{
bc805888 1251 fprintf (stream, _("\
252b5132 1252PowerPC options:\n\
ce3d2015
AM		 1253-a32 generate ELF32/XCOFF32\n\
1254-a64 generate ELF64/XCOFF64\n\
1255-u ignored\n\
1256-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1257-mpwr generate code for POWER (RIOS1)\n\
1258-m601 generate code for PowerPC 601\n\
418c1742 1259-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1260 generate code for PowerPC 603/604\n\
1261-m403 generate code for PowerPC 403\n\
1262-m405 generate code for PowerPC 405\n\
1263-m440 generate code for PowerPC 440\n\
1264-m464 generate code for PowerPC 464\n\
1265-m476 generate code for PowerPC 476\n\
f5c120c5 1266-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1267 generate code for PowerPC 7400/7410/7450/7455\n\
1268-m750cl generate code for PowerPC 750cl\n"));
df12615d 1269 fprintf (stream, _("\
ce3d2015
AM		 1270-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1271-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1272-mbooke generate code for 32-bit PowerPC BookE\n\
1273-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1274-mpower4, -mpwr4 generate code for Power4 architecture\n\
1275-mpower5, -mpwr5, -mpwr5x\n\
1276 generate code for Power5 architecture\n\
1277-mpower6, -mpwr6 generate code for Power6 architecture\n\
1278-mpower7, -mpwr7 generate code for Power7 architecture\n\
5817ffd1 1279-mpower8, -mpwr8 generate code for Power8 architecture\n\
ce3d2015
AM		 1280-mcell generate code for Cell Broadband Engine architecture\n\
1281-mcom generate code Power/PowerPC common instructions\n\
1282-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1283 fprintf (stream, _("\
ce3d2015
AM		 1284-maltivec generate code for AltiVec\n\
1285-mvsx generate code for Vector-Scalar (VSX) instructions\n\
5817ffd1 1286-mhtm generate code for Hardware Transactional Memory\n\
ce3d2015
AM		 1287-me300 generate code for PowerPC e300 family\n\
1288-me500, -me500x2 generate code for Motorola e500 core complex\n\
1289-me500mc, generate code for Freescale e500mc core complex\n\
1290-me500mc64, generate code for Freescale e500mc64 core complex\n\
aea77599
AM		 1291-me5500, generate code for Freescale e5500 core complex\n\
1292-me6500, generate code for Freescale e6500 core complex\n\
ce3d2015 1293-mspe generate code for Motorola SPE instructions\n\
b9c361e0 1294-mvle generate code for Freescale VLE instructions\n\
ce3d2015
AM		 1295-mtitan generate code for AppliedMicro Titan core complex\n\
1296-mregnames Allow symbolic names for registers\n\
1297-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1298#ifdef OBJ_ELF
bc805888 1299 fprintf (stream, _("\
ce3d2015
AM		 1300-mrelocatable support for GCC's -mrelocatble option\n\
1301-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1302-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1303-mlittle, -mlittle-endian, -le\n\
ce3d2015 1304 generate code for a little endian machine\n\
b8b738ac 1305-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1306 generate code for a big endian machine\n\
1307-msolaris generate code for Solaris\n\
1308-mno-solaris do not generate code for Solaris\n\
b8b738ac 1309-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1310-V print assembler version number\n\
1311-Qy, -Qn ignored\n"));
252b5132 1312#endif
cef4f754
AM		 1313 fprintf (stream, _("\
1314-nops=count when aligning, more than COUNT nops uses a branch\n"));
252b5132
RH		 1315}
1316\f
1317/* Set ppc_cpu if it is not already set. */
1318
1319static void
98027b10 1320ppc_set_cpu (void)
252b5132
RH		 1321{
1322 const char *default_os = TARGET_OS;
1323 const char *default_cpu = TARGET_CPU;
1324
7102e95e 1325 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1326 {
2a98c3a6 1327 if (ppc_obj64)
bdc70b4a 1328 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1329 else if (strncmp (default_os, "aix", 3) == 0
1330 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1331 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1332 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1333 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1334 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1335 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1336 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1337 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1338 else
d6ed37ed 1339 as_fatal (_("unknown default cpu = %s, os = %s"),
99a814a1 1340 default_cpu, default_os);
252b5132
RH		 1341 }
1342}
1343
9232bbb0
AM		 1344/* Figure out the BFD architecture to use. This function and ppc_mach
1345 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1346
1347enum bfd_architecture
98027b10 1348ppc_arch (void)
252b5132
RH		 1349{
1350 const char *default_cpu = TARGET_CPU;
1351 ppc_set_cpu ();
1352
1353 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1354 return bfd_arch_powerpc;
b9c361e0
JL		 1355 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1356 return bfd_arch_powerpc;
1357 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
252b5132 1358 return bfd_arch_rs6000;
b9c361e0 1359 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
252b5132
RH		 1360 {
1361 if (strcmp (default_cpu, "rs6000") == 0)
1362 return bfd_arch_rs6000;
0baf16f2 1363 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1364 return bfd_arch_powerpc;
1365 }
1366
d6ed37ed 1367 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
252b5132
RH		 1368 return bfd_arch_unknown;
1369}
1370
7f6d05e8 1371unsigned long
98027b10 1372ppc_mach (void)
7f6d05e8 1373{
2a98c3a6
AM		 1374 if (ppc_obj64)
1375 return bfd_mach_ppc64;
1376 else if (ppc_arch () == bfd_arch_rs6000)
1377 return bfd_mach_rs6k;
ce3d2015
AM		 1378 else if (ppc_cpu & PPC_OPCODE_TITAN)
1379 return bfd_mach_ppc_titan;
b9c361e0
JL		 1380 else if (ppc_cpu & PPC_OPCODE_VLE)
1381 return bfd_mach_ppc_vle;
2a98c3a6
AM		 1382 else
1383 return bfd_mach_ppc;
7f6d05e8
CP		 1384}
1385
81d4177b 1386extern char*
98027b10 1387ppc_target_format (void)
7f6d05e8
CP		 1388{
1389#ifdef OBJ_COFF
1390#ifdef TE_PE
99a814a1 1391 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1392#elif TE_POWERMAC
0baf16f2 1393 return "xcoff-powermac";
7f6d05e8 1394#else
eb1e0e80 1395# ifdef TE_AIX5
edc1d652 1396 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1397# else
edc1d652 1398 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1399# endif
7f6d05e8 1400#endif
7f6d05e8
CP		 1401#endif
1402#ifdef OBJ_ELF
edc1d652
AM		 1403# ifdef TE_FreeBSD
1404 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1405# elif defined (TE_VXWORKS)
9d8504b1
PB		 1406 return "elf32-powerpc-vxworks";
1407# else
0baf16f2 1408 return (target_big_endian
2b3c4602
AM		 1409 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1410 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1411# endif
7f6d05e8
CP		 1412#endif
1413}
1414
b9c361e0
JL		 1415/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1416 Return TRUE if there's a problem, otherwise FALSE. */
1417
1418static bfd_boolean
1419insn_validate (const struct powerpc_opcode *op)
1420{
1421 const unsigned char *o;
1422 unsigned long omask = op->mask;
1423
1424 /* The mask had better not trim off opcode bits. */
1425 if ((op->opcode & omask) != op->opcode)
1426 {
1427 as_bad (_("mask trims opcode bits for %s"), op->name);
1428 return TRUE;
1429 }
1430
1431 /* The operands must not overlap the opcode or each other. */
1432 for (o = op->operands; *o; ++o)
1433 {
1434 if (*o >= num_powerpc_operands)
1435 {
1436 as_bad (_("operand index error for %s"), op->name);
1437 return TRUE;
1438 }
1439 else
1440 {
1441 const struct powerpc_operand *operand = &powerpc_operands[*o];
1442 if (operand->shift != PPC_OPSHIFT_INV)
1443 {
1444 unsigned long mask;
1445
1446 if (operand->shift >= 0)
1447 mask = operand->bitm << operand->shift;
1448 else
1449 mask = operand->bitm >> -operand->shift;
1450 if (omask & mask)
1451 {
1452 as_bad (_("operand %d overlap in %s"),
1453 (int) (o - op->operands), op->name);
1454 return TRUE;
1455 }
1456 omask |= mask;
1457 }
1458 }
1459 }
1460 return FALSE;
1461}
1462
69c040df 1463/* Insert opcodes and macros into hash tables. Called at startup and
1fe532cf 1464 for .machine pseudo. */
252b5132 1465
69c040df
AM		 1466static void
1467ppc_setup_opcodes (void)
252b5132 1468{
98027b10 1469 const struct powerpc_opcode *op;
252b5132
RH		 1470 const struct powerpc_opcode *op_end;
1471 const struct powerpc_macro *macro;
1472 const struct powerpc_macro *macro_end;
b84bf58a 1473 bfd_boolean bad_insn = FALSE;
252b5132 1474
69c040df
AM		 1475 if (ppc_hash != NULL)
1476 hash_die (ppc_hash);
1477 if (ppc_macro_hash != NULL)
1478 hash_die (ppc_macro_hash);
252b5132
RH		 1479
1480 /* Insert the opcodes into a hash table. */
1481 ppc_hash = hash_new ();
1482
c43a438d 1483 if (ENABLE_CHECKING)
b84bf58a 1484 {
c43a438d 1485 unsigned int i;
b84bf58a 1486
3b8b57a9
AM		 1487 /* An index into powerpc_operands is stored in struct fix
1488 fx_pcrel_adjust which is 8 bits wide. */
1489 gas_assert (num_powerpc_operands < 256);
1490
c43a438d
AM		 1491 /* Check operand masks. Code here and in the disassembler assumes
1492 all the 1's in the mask are contiguous. */
1493 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1494 {
c43a438d
AM		 1495 unsigned long mask = powerpc_operands[i].bitm;
1496 unsigned long right_bit;
1497 unsigned int j;
1498
1499 right_bit = mask & -mask;
1500 mask += right_bit;
1501 right_bit = mask & -mask;
1502 if (mask != right_bit)
1503 {
1504 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1505 bad_insn = TRUE;
1506 }
1507 for (j = i + 1; j < num_powerpc_operands; ++j)
1508 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1509 sizeof (powerpc_operands[0])) == 0)
1510 {
1511 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1512 j, i);
1513 bad_insn = TRUE;
1514 }
b84bf58a
AM		 1515 }
1516 }
1517
252b5132
RH		 1518 op_end = powerpc_opcodes + powerpc_num_opcodes;
1519 for (op = powerpc_opcodes; op < op_end; op++)
1520 {
c43a438d 1521 if (ENABLE_CHECKING)
b84bf58a 1522 {
d815f1a9 1523 if (op != powerpc_opcodes)
8dbcd839 1524 {
b9c361e0
JL		 1525 int old_opcode = PPC_OP (op[-1].opcode);
1526 int new_opcode = PPC_OP (op[0].opcode);
1527
1528#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1529 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1530 op->name, (unsigned int) (op - powerpc_opcodes),
1531 (unsigned int) new_opcode, (unsigned int) op->opcode,
1532 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1533#endif
1534
d815f1a9
AM		 1535 /* The major opcodes had better be sorted. Code in the
1536 disassembler assumes the insns are sorted according to
1537 major opcode. */
b9c361e0 1538 if (new_opcode < old_opcode)
d815f1a9
AM		 1539 {
1540 as_bad (_("major opcode is not sorted for %s"),
1541 op->name);
1542 bad_insn = TRUE;
1543 }
8dbcd839 1544 }
b9c361e0
JL		 1545 bad_insn |= insn_validate (op);
1546 }
c43a438d 1547
b9c361e0
JL		 1548 if ((ppc_cpu & op->flags) != 0
1549 && !(ppc_cpu & op->deprecated))
1550 {
1551 const char *retval;
1552
1553 retval = hash_insert (ppc_hash, op->name, (void *) op);
1554 if (retval != NULL)
c43a438d 1555 {
b9c361e0 1556 as_bad (_("duplicate instruction %s"),
c43a438d
AM		 1557 op->name);
1558 bad_insn = TRUE;
1559 }
b9c361e0
JL		 1560 }
1561 }
c43a438d 1562
b9c361e0
JL		 1563 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1564 for (op = powerpc_opcodes; op < op_end; op++)
1565 hash_insert (ppc_hash, op->name, (void *) op);
1566
1567 op_end = vle_opcodes + vle_num_opcodes;
1568 for (op = vle_opcodes; op < op_end; op++)
1569 {
1570 if (ENABLE_CHECKING)
1571 {
1572 if (op != vle_opcodes)
1573 {
1574 unsigned old_seg, new_seg;
1575
1576 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1577 old_seg = VLE_OP_TO_SEG (old_seg);
1578 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1579 new_seg = VLE_OP_TO_SEG (new_seg);
1580
1581#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1582 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1583 op->name, (unsigned int) (op - powerpc_opcodes),
1584 (unsigned int) new_seg, (unsigned int) op->opcode,
1585 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1586#endif
1587 /* The major opcodes had better be sorted. Code in the
1588 disassembler assumes the insns are sorted according to
1589 major opcode. */
1590 if (new_seg < old_seg)
1591 {
1592 as_bad (_("major opcode is not sorted for %s"),
1593 op->name);
1594 bad_insn = TRUE;
1595 }
1596 }
1597
1598 bad_insn |= insn_validate (op);
c43a438d 1599 }
252b5132 1600
bdc70b4a 1601 if ((ppc_cpu & op->flags) != 0
1cb0a767 1602 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1603 {
1604 const char *retval;
1605
98027b10 1606 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1607 if (retval != NULL)
252b5132 1608 {
b84bf58a 1609 as_bad (_("duplicate instruction %s"),
99a814a1 1610 op->name);
b84bf58a 1611 bad_insn = TRUE;
252b5132
RH		 1612 }
1613 }
1614 }
1615
b9c361e0
JL		 1616 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1617 for (op = vle_opcodes; op < op_end; op++)
98027b10 1618 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1619
252b5132
RH		 1620 /* Insert the macros into a hash table. */
1621 ppc_macro_hash = hash_new ();
1622
1623 macro_end = powerpc_macros + powerpc_num_macros;
1624 for (macro = powerpc_macros; macro < macro_end; macro++)
1625 {
33740db9 1626 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1627 {
1628 const char *retval;
1629
98027b10 1630 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1631 if (retval != (const char *) NULL)
1632 {
b84bf58a
AM		 1633 as_bad (_("duplicate macro %s"), macro->name);
1634 bad_insn = TRUE;
252b5132
RH		 1635 }
1636 }
1637 }
1638
b84bf58a 1639 if (bad_insn)
252b5132 1640 abort ();
69c040df
AM		 1641}
1642
1643/* This function is called when the assembler starts up. It is called
1644 after the options have been parsed and the output file has been
1645 opened. */
1646
1647void
98027b10 1648md_begin (void)
69c040df
AM		 1649{
1650 ppc_set_cpu ();
1651
1652 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
8fbf7334 1653 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
69c040df
AM		 1654
1655#ifdef OBJ_ELF
1656 /* Set the ELF flags if desired. */
1657 if (ppc_flags && !msolaris)
1658 bfd_set_private_flags (stdoutput, ppc_flags);
1659#endif
1660
1661 ppc_setup_opcodes ();
252b5132 1662
67c1ffbe 1663 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1664 by the user. */
252b5132
RH		 1665 if (!set_target_endian)
1666 {
1667 set_target_endian = 1;
1668 target_big_endian = PPC_BIG_ENDIAN;
1669 }
1670
1671#ifdef OBJ_XCOFF
1672 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1673
1674 /* Create dummy symbols to serve as initial csects. This forces the
1675 text csects to precede the data csects. These symbols will not
1676 be output. */
1677 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1678 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1679 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1680 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1681#endif
1682
1683#ifdef TE_PE
1684
1685 ppc_current_section = text_section;
81d4177b 1686 ppc_previous_section = 0;
252b5132
RH		 1687
1688#endif
1689}
1690
6a0c61b7 1691void
98027b10 1692ppc_cleanup (void)
6a0c61b7 1693{
dc1d03fc 1694#ifdef OBJ_ELF
6a0c61b7
EZ		 1695 if (ppc_apuinfo_list == NULL)
1696 return;
1697
1698 /* Ok, so write the section info out. We have this layout:
1699
1700 byte data what
1701 ---- ---- ----
1702 0 8 length of "APUinfo\0"
1703 4 (n*4) number of APU's (4 bytes each)
1704 8 2 note type 2
1705 12 "APUinfo\0" name
1706 20 APU#1 first APU's info
1707 24 APU#2 second APU's info
1708 ... ...
1709 */
1710 {
1711 char *p;
1712 asection *seg = now_seg;
1713 subsegT subseg = now_subseg;
1714 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1715 unsigned int i;
6a0c61b7
EZ		 1716
1717 /* Create the .PPC.EMB.apuinfo section. */
1718 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1719 bfd_set_section_flags (stdoutput,
1720 apuinfo_secp,
e1a9cb8e 1721 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1722
1723 p = frag_more (4);
1724 md_number_to_chars (p, (valueT) 8, 4);
1725
1726 p = frag_more (4);
e98d298c 1727 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1728
1729 p = frag_more (4);
1730 md_number_to_chars (p, (valueT) 2, 4);
1731
1732 p = frag_more (8);
1733 strcpy (p, "APUinfo");
1734
1735 for (i = 0; i < ppc_apuinfo_num; i++)
1736 {
b34976b6
AM		 1737 p = frag_more (4);
1738 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1739 }
1740
1741 frag_align (2, 0, 0);
1742
1743 /* We probably can't restore the current segment, for there likely
1744 isn't one yet... */
1745 if (seg && subseg)
1746 subseg_set (seg, subseg);
1747 }
dc1d03fc 1748#endif
6a0c61b7
EZ		 1749}
1750
252b5132
RH		 1751/* Insert an operand value into an instruction. */
1752
1753static unsigned long
a1867a27
AM		 1754ppc_insert_operand (unsigned long insn,
1755 const struct powerpc_operand *operand,
1756 offsetT val,
91d6fa6a 1757 ppc_cpu_t cpu,
a1867a27
AM		 1758 char *file,
1759 unsigned int line)
252b5132 1760{
b84bf58a 1761 long min, max, right;
eb42fac1 1762
b84bf58a
AM		 1763 max = operand->bitm;
1764 right = max & -max;
1765 min = 0;
1766
1767 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1768 {
b84bf58a 1769 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1770 max = (max >> 1) & -right;
1771 min = ~max & -right;
b84bf58a 1772 }
252b5132 1773
b84bf58a 1774 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1775 max++;
252b5132 1776
b84bf58a 1777 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1778 {
1779 long tmp = min;
1780 min = -max;
1781 max = -tmp;
1782 }
b84bf58a 1783
a1867a27
AM		 1784 if (min <= max)
1785 {
1786 /* Some people write constants with the sign extension done by
1787 hand but only up to 32 bits. This shouldn't really be valid,
1788 but, to permit this code to assemble on a 64-bit host, we
1789 sign extend the 32-bit value to 64 bits if so doing makes the
1790 value valid. */
1791 if (val > max
1792 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1793 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1794 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1795 val = val - 0x80000000 - 0x80000000;
1796
1797 /* Similarly, people write expressions like ~(1<<15), and expect
1798 this to be OK for a 32-bit unsigned value. */
1799 else if (val < min
1800 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1801 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1802 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1803 val = val + 0x80000000 + 0x80000000;
1804
1805 else if (val < min
1806 || val > max
1807 || (val & (right - 1)) != 0)
1808 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1809 }
b84bf58a 1810
252b5132
RH		 1811 if (operand->insert)
1812 {
1813 const char *errmsg;
1814
1815 errmsg = NULL;
91d6fa6a 1816 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1817 if (errmsg != (const char *) NULL)
ee2c9aa9 1818 as_bad_where (file, line, "%s", errmsg);
252b5132 1819 }
b9c361e0 1820 else if (operand->shift >= 0)
b84bf58a 1821 insn |= ((long) val & operand->bitm) << operand->shift;
b9c361e0
JL		 1822 else
1823 insn |= ((long) val & operand->bitm) >> -operand->shift;
252b5132
RH		 1824
1825 return insn;
1826}
1827
1828\f
1829#ifdef OBJ_ELF
1830/* Parse @got, etc. and return the desired relocation. */
1831static bfd_reloc_code_real_type
98027b10 1832ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1833{
1834 struct map_bfd {
1835 char *string;
b7d7dc63
AM		 1836 unsigned int length : 8;
1837 unsigned int valid32 : 1;
1838 unsigned int valid64 : 1;
1839 unsigned int reloc;
252b5132
RH		 1840 };
1841
1842 char ident[20];
1843 char *str = *str_p;
1844 char *str2;
1845 int ch;
1846 int len;
15c1449b 1847 const struct map_bfd *ptr;
252b5132 1848
b7d7dc63
AM		 1849#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1850#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1851#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1852
15c1449b 1853 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1854 MAP ("l", BFD_RELOC_LO16),
1855 MAP ("h", BFD_RELOC_HI16),
1856 MAP ("ha", BFD_RELOC_HI16_S),
1857 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1858 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1859 MAP ("got", BFD_RELOC_16_GOTOFF),
1860 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1861 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1862 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1863 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1864 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1865 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1866 MAP ("copy", BFD_RELOC_PPC_COPY),
1867 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1868 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1869 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1870 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1871 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1872 MAP ("tls", BFD_RELOC_PPC_TLS),
1873 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1874 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1875 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1876 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1877 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1878 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1879 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1880 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1881 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1882 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1883 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1884 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1885 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1886 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1887 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1888 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1889 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1890 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1891 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1892 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1893 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1894 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1895 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1896 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1897 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1898 MAP32 ("fixup", BFD_RELOC_CTOR),
1899 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1900 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1901 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1902 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1903 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1904 MAP32 ("sdarel", BFD_RELOC_GPREL16),
b9c361e0
JL		 1905 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1906 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1907 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
b7d7dc63
AM		 1908 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1909 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1910 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1911 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1912 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1913 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1914 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1915 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1916 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
b9c361e0 1917 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
b7d7dc63
AM		 1918 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1919 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1920 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1921 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1922 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1923 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1924 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1925 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1926 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1927 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1928 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1929 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1930 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1931 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1932 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1933 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1934 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1935 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1936 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1937 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1938 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1939 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1940 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1941 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1942 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1943 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1944 };
1945
1946 if (*str++ != '@')
1947 return BFD_RELOC_UNUSED;
1948
1949 for (ch = *str, str2 = ident;
1950 (str2 < ident + sizeof (ident) - 1
3882b010 1951 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1952 ch = *++str)
1953 {
3882b010 1954 *str2++ = TOLOWER (ch);
252b5132
RH		 1955 }
1956
1957 *str2 = '\0';
1958 len = str2 - ident;
1959
1960 ch = ident[0];
1961 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1962 if (ch == ptr->string[0]
1963 && len == ptr->length
b7d7dc63
AM		 1964 && memcmp (ident, ptr->string, ptr->length) == 0
1965 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1966 {
15c1449b
AM		 1967 int reloc = ptr->reloc;
1968
727fc41e
AM		 1969 if (!ppc_obj64 && exp_p->X_add_number != 0)
1970 {
1971 switch (reloc)
1972 {
1973 case BFD_RELOC_16_GOTOFF:
1974 case BFD_RELOC_LO16_GOTOFF:
1975 case BFD_RELOC_HI16_GOTOFF:
1976 case BFD_RELOC_HI16_S_GOTOFF:
1977 as_warn (_("identifier+constant@got means "
1978 "identifier@got+constant"));
1979 break;
1980
1981 case BFD_RELOC_PPC_GOT_TLSGD16:
1982 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1983 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1984 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1985 case BFD_RELOC_PPC_GOT_TLSLD16:
1986 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1987 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1988 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1989 case BFD_RELOC_PPC_GOT_DTPREL16:
1990 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1991 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1992 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1993 case BFD_RELOC_PPC_GOT_TPREL16:
1994 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1995 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1996 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1997 as_bad (_("symbol+offset not supported for got tls"));
1998 break;
1999 }
2000 }
5f6db75a
AM		 2001
2002 /* Now check for identifier@suffix+constant. */
2003 if (*str == '-' || *str == '+')
252b5132 2004 {
5f6db75a
AM		 2005 char *orig_line = input_line_pointer;
2006 expressionS new_exp;
2007
2008 input_line_pointer = str;
2009 expression (&new_exp);
2010 if (new_exp.X_op == O_constant)
252b5132 2011 {
5f6db75a
AM		 2012 exp_p->X_add_number += new_exp.X_add_number;
2013 str = input_line_pointer;
252b5132 2014 }
5f6db75a
AM		 2015
2016 if (&input_line_pointer != str_p)
2017 input_line_pointer = orig_line;
252b5132 2018 }
252b5132 2019 *str_p = str;
0baf16f2 2020
2b3c4602 2021 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 2022 && exp_p->X_op == O_symbol
2023 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 2024 {
9f2b53d7
AM		 2025 /* Change the symbol so that the dummy .TOC. symbol can be
2026 omitted from the object file. */
0baf16f2
AM		 2027 exp_p->X_add_symbol = &abs_symbol;
2028 }
2029
15c1449b 2030 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 2031 }
2032
2033 return BFD_RELOC_UNUSED;
2034}
2035
99a814a1
AM		 2036/* Like normal .long/.short/.word, except support @got, etc.
2037 Clobbers input_line_pointer, checks end-of-line. */
252b5132 2038static void
98027b10 2039ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 2040{
2041 expressionS exp;
2042 bfd_reloc_code_real_type reloc;
2043
2044 if (is_it_end_of_statement ())
2045 {
2046 demand_empty_rest_of_line ();
2047 return;
2048 }
2049
2050 do
2051 {
2052 expression (&exp);
27285eed 2053 if (*input_line_pointer == '@'
99a814a1
AM		 2054 && (reloc = ppc_elf_suffix (&input_line_pointer,
2055 &exp)) != BFD_RELOC_UNUSED)
252b5132 2056 {
99a814a1
AM		 2057 reloc_howto_type *reloc_howto;
2058 int size;
2059
2060 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
2061 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 2062
2063 if (size > nbytes)
0baf16f2
AM		 2064 {
2065 as_bad (_("%s relocations do not fit in %d bytes\n"),
2066 reloc_howto->name, nbytes);
2067 }
252b5132
RH		 2068 else
2069 {
0baf16f2
AM		 2070 char *p;
2071 int offset;
252b5132 2072
0baf16f2 2073 p = frag_more (nbytes);
aa0c8c1a 2074 memset (p, 0, nbytes);
0baf16f2
AM		 2075 offset = 0;
2076 if (target_big_endian)
2077 offset = nbytes - size;
99a814a1
AM		 2078 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
2079 &exp, 0, reloc);
252b5132
RH		 2080 }
2081 }
2082 else
2083 emit_expr (&exp, (unsigned int) nbytes);
2084 }
2085 while (*input_line_pointer++ == ',');
2086
99a814a1
AM		 2087 /* Put terminator back into stream. */
2088 input_line_pointer--;
252b5132
RH		 2089 demand_empty_rest_of_line ();
2090}
2091
2092/* Solaris pseduo op to change to the .rodata section. */
2093static void
98027b10 2094ppc_elf_rdata (int xxx)
252b5132
RH		 2095{
2096 char *save_line = input_line_pointer;
2097 static char section[] = ".rodata\n";
2098
99a814a1 2099 /* Just pretend this is .section .rodata */
252b5132
RH		 2100 input_line_pointer = section;
2101 obj_elf_section (xxx);
2102
2103 input_line_pointer = save_line;
2104}
2105
99a814a1 2106/* Pseudo op to make file scope bss items. */
252b5132 2107static void
98027b10 2108ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2109{
98027b10
AM		 2110 char *name;
2111 char c;
2112 char *p;
252b5132 2113 offsetT size;
98027b10 2114 symbolS *symbolP;
252b5132
RH		 2115 offsetT align;
2116 segT old_sec;
2117 int old_subsec;
2118 char *pfrag;
2119 int align2;
2120
2121 name = input_line_pointer;
2122 c = get_symbol_end ();
2123
99a814a1 2124 /* just after name is now '\0'. */
252b5132
RH		 2125 p = input_line_pointer;
2126 *p = c;
2127 SKIP_WHITESPACE ();
2128 if (*input_line_pointer != ',')
2129 {
d6ed37ed 2130 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 2131 ignore_rest_of_line ();
2132 return;
2133 }
2134
2135 input_line_pointer++; /* skip ',' */
2136 if ((size = get_absolute_expression ()) < 0)
2137 {
2138 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2139 ignore_rest_of_line ();
2140 return;
2141 }
2142
2143 /* The third argument to .lcomm is the alignment. */
2144 if (*input_line_pointer != ',')
2145 align = 8;
2146 else
2147 {
2148 ++input_line_pointer;
2149 align = get_absolute_expression ();
2150 if (align <= 0)
2151 {
2152 as_warn (_("ignoring bad alignment"));
2153 align = 8;
2154 }
2155 }
2156
2157 *p = 0;
2158 symbolP = symbol_find_or_make (name);
2159 *p = c;
2160
2161 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2162 {
d6ed37ed 2163 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 2164 S_GET_NAME (symbolP));
2165 ignore_rest_of_line ();
2166 return;
2167 }
2168
2169 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2170 {
d6ed37ed 2171 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 2172 S_GET_NAME (symbolP),
2173 (long) S_GET_VALUE (symbolP),
2174 (long) size);
2175
2176 ignore_rest_of_line ();
2177 return;
2178 }
2179
99a814a1 2180 /* Allocate_bss. */
252b5132
RH		 2181 old_sec = now_seg;
2182 old_subsec = now_subseg;
2183 if (align)
2184 {
99a814a1 2185 /* Convert to a power of 2 alignment. */
252b5132
RH		 2186 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2187 if (align != 1)
2188 {
d6ed37ed 2189 as_bad (_("common alignment not a power of 2"));
252b5132
RH		 2190 ignore_rest_of_line ();
2191 return;
2192 }
2193 }
2194 else
2195 align2 = 0;
2196
2197 record_alignment (bss_section, align2);
cbe02d4f 2198 subseg_set (bss_section, 1);
252b5132
RH		 2199 if (align2)
2200 frag_align (align2, 0, 0);
2201 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2202 symbol_get_frag (symbolP)->fr_symbol = 0;
2203 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2204 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2205 (char *) 0);
2206 *pfrag = 0;
2207 S_SET_SIZE (symbolP, size);
2208 S_SET_SEGMENT (symbolP, bss_section);
2209 subseg_set (old_sec, old_subsec);
2210 demand_empty_rest_of_line ();
2211}
2212
2213/* Validate any relocations emitted for -mrelocatable, possibly adding
2214 fixups for word relocations in writable segments, so we can adjust
2215 them at runtime. */
2216static void
98027b10 2217ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2218{
2219 if (fixp->fx_done || fixp->fx_pcrel)
2220 return;
2221
2222 switch (shlib)
2223 {
2224 case SHLIB_NONE:
2225 case SHLIB_PIC:
2226 return;
2227
5d6f4f16 2228 case SHLIB_MRELOCATABLE:
252b5132
RH		 2229 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2230 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2231 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2232 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2233 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2234 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2235 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2236 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2237 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2238 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2239 && strcmp (segment_name (seg), ".got2") != 0
2240 && strcmp (segment_name (seg), ".dtors") != 0
2241 && strcmp (segment_name (seg), ".ctors") != 0
2242 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2243 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2244 && strcmp (segment_name (seg), ".eh_frame") != 0
2245 && strcmp (segment_name (seg), ".ex_shared") != 0)
2246 {
2247 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2248 || fixp->fx_r_type != BFD_RELOC_CTOR)
2249 {
2250 as_bad_where (fixp->fx_file, fixp->fx_line,
d6ed37ed 2251 _("relocation cannot be done when using -mrelocatable"));
252b5132
RH		 2252 }
2253 }
2254 return;
2255 }
2256}
0baf16f2 2257
7e8d4ab4
AM		 2258/* Prevent elf_frob_file_before_adjust removing a weak undefined
2259 function descriptor sym if the corresponding code sym is used. */
2260
2261void
98027b10 2262ppc_frob_file_before_adjust (void)
0baf16f2 2263{
7e8d4ab4 2264 symbolS *symp;
9232bbb0 2265 asection *toc;
0baf16f2 2266
7e8d4ab4
AM		 2267 if (!ppc_obj64)
2268 return;
2269
2270 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2271 {
7e8d4ab4
AM		 2272 const char *name;
2273 char *dotname;
2274 symbolS *dotsym;
2275 size_t len;
2276
2277 name = S_GET_NAME (symp);
2278 if (name[0] == '.')
2279 continue;
2280
2281 if (! S_IS_WEAK (symp)
2282 || S_IS_DEFINED (symp))
2283 continue;
2284
2285 len = strlen (name) + 1;
2286 dotname = xmalloc (len + 1);
2287 dotname[0] = '.';
2288 memcpy (dotname + 1, name, len);
461b725f 2289 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2290 free (dotname);
2291 if (dotsym != NULL && (symbol_used_p (dotsym)
2292 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2293 symbol_mark_used (symp);
2294
0baf16f2
AM		 2295 }
2296
9232bbb0
AM		 2297 toc = bfd_get_section_by_name (stdoutput, ".toc");
2298 if (toc != NULL
01efc3af 2299 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2300 && bfd_section_size (stdoutput, toc) > 0x10000)
2301 as_warn (_("TOC section size exceeds 64k"));
a38a07e0
AM		 2302}
2303
2304/* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2305 emitted. Other uses of .TOC. will cause the symbol to be marked
2306 with BSF_KEEP in md_apply_fix. */
9232bbb0 2307
a38a07e0
AM		 2308void
2309ppc_elf_adjust_symtab (void)
2310{
2311 if (ppc_obj64)
2312 {
2313 symbolS *symp;
2314 symp = symbol_find (".TOC.");
2315 if (symp != NULL)
2316 {
2317 asymbol *bsym = symbol_get_bfdsym (symp);
2318 if ((bsym->flags & BSF_KEEP) == 0)
2319 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
a38a07e0
AM		 2320 }
2321 }
0baf16f2 2322}
252b5132
RH		 2323#endif /* OBJ_ELF */
2324\f
2325#ifdef TE_PE
2326
2327/*
99a814a1 2328 * Summary of parse_toc_entry.
252b5132
RH		 2329 *
2330 * in: Input_line_pointer points to the '[' in one of:
2331 *
2332 * [toc] [tocv] [toc32] [toc64]
2333 *
2334 * Anything else is an error of one kind or another.
2335 *
81d4177b 2336 * out:
252b5132
RH		 2337 * return value: success or failure
2338 * toc_kind: kind of toc reference
2339 * input_line_pointer:
2340 * success: first char after the ']'
2341 * failure: unchanged
2342 *
2343 * settings:
2344 *
2345 * [toc] - rv == success, toc_kind = default_toc
2346 * [tocv] - rv == success, toc_kind = data_in_toc
2347 * [toc32] - rv == success, toc_kind = must_be_32
2348 * [toc64] - rv == success, toc_kind = must_be_64
2349 *
2350 */
2351
81d4177b
KH		 2352enum toc_size_qualifier
2353{
252b5132
RH		 2354 default_toc, /* The toc cell constructed should be the system default size */
2355 data_in_toc, /* This is a direct reference to a toc cell */
2356 must_be_32, /* The toc cell constructed must be 32 bits wide */
2357 must_be_64 /* The toc cell constructed must be 64 bits wide */
2358};
2359
2360static int
98027b10 2361parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2362{
2363 char *start;
2364 char *toc_spec;
2365 char c;
2366 enum toc_size_qualifier t;
2367
99a814a1 2368 /* Save the input_line_pointer. */
252b5132
RH		 2369 start = input_line_pointer;
2370
99a814a1 2371 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2372 ++input_line_pointer;
2373 SKIP_WHITESPACE ();
81d4177b 2374
99a814a1 2375 /* Find the spelling of the operand. */
252b5132
RH		 2376 toc_spec = input_line_pointer;
2377 c = get_symbol_end ();
2378
99a814a1 2379 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2380 {
2381 t = default_toc;
2382 }
99a814a1 2383 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2384 {
2385 t = data_in_toc;
2386 }
99a814a1 2387 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2388 {
2389 t = must_be_32;
2390 }
99a814a1 2391 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2392 {
2393 t = must_be_64;
2394 }
2395 else
2396 {
2397 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2398 *input_line_pointer = c;
2399 input_line_pointer = start;
252b5132
RH		 2400 return 0;
2401 }
2402
99a814a1
AM		 2403 /* Now find the ']'. */
2404 *input_line_pointer = c;
252b5132 2405
81d4177b
KH		 2406 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2407 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2408
2409 if (c != ']')
2410 {
2411 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2412 input_line_pointer = start;
252b5132
RH		 2413 return 0;
2414 }
2415
99a814a1 2416 *toc_kind = t;
252b5132
RH		 2417 return 1;
2418}
2419#endif
3b8b57a9
AM		 2420
2421#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2422/* See whether a symbol is in the TOC section. */
2423
2424static int
2425ppc_is_toc_sym (symbolS *sym)
2426{
2427#ifdef OBJ_XCOFF
9f6e76f4
TG		 2428 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2429 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
3b8b57a9
AM		 2430#endif
2431#ifdef OBJ_ELF
2432 const char *sname = segment_name (S_GET_SEGMENT (sym));
2433 if (ppc_obj64)
2434 return strcmp (sname, ".toc") == 0;
2435 else
2436 return strcmp (sname, ".got") == 0;
2437#endif
2438}
2439#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 2440\f
2441
dc1d03fc 2442#ifdef OBJ_ELF
6a0c61b7
EZ		 2443#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2444static void
98027b10 2445ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2446{
2447 unsigned int i;
2448
2449 /* Check we don't already exist. */
2450 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2451 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2452 return;
b34976b6 2453
6a0c61b7
EZ		 2454 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2455 {
2456 if (ppc_apuinfo_num_alloc == 0)
2457 {
2458 ppc_apuinfo_num_alloc = 4;
2459 ppc_apuinfo_list = (unsigned long *)
2460 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2461 }
2462 else
2463 {
2464 ppc_apuinfo_num_alloc += 4;
2465 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2466 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2467 }
2468 }
dc1d03fc 2469 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2470}
2471#undef APUID
dc1d03fc 2472#endif
6a0c61b7
EZ		 2473\f
2474
252b5132
RH		 2475/* We need to keep a list of fixups. We can't simply generate them as
2476 we go, because that would require us to first create the frag, and
2477 that would screw up references to ``.''. */
2478
2479struct ppc_fixup
2480{
2481 expressionS exp;
2482 int opindex;
2483 bfd_reloc_code_real_type reloc;
2484};
2485
2486#define MAX_INSN_FIXUPS (5)
2487
b9c361e0
JL		 2488/* Form I16L. */
2489#define E_OR2I_INSN 0x7000C000
2490#define E_AND2I_DOT_INSN 0x7000C800
2491#define E_OR2IS_INSN 0x7000D000
2492#define E_LIS_INSN 0x7000E000
2493#define E_AND2IS_DOT_INSN 0x7000E800
2494
2495/* Form I16A. */
2496#define E_ADD2I_DOT_INSN 0x70008800
2497#define E_ADD2IS_INSN 0x70009000
2498#define E_CMP16I_INSN 0x70009800
2499#define E_MULL2I_INSN 0x7000A000
2500#define E_CMPL16I_INSN 0x7000A800
2501#define E_CMPH16I_INSN 0x7000B000
2502#define E_CMPHL16I_INSN 0x7000B800
2503
252b5132
RH		 2504/* This routine is called for each instruction to be assembled. */
2505
2506void
98027b10 2507md_assemble (char *str)
252b5132
RH		 2508{
2509 char *s;
2510 const struct powerpc_opcode *opcode;
2511 unsigned long insn;
2512 const unsigned char *opindex_ptr;
2513 int skip_optional;
2514 int need_paren;
2515 int next_opindex;
2516 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2517 int fc;
2518 char *f;
09b935ac 2519 int addr_mod;
252b5132 2520 int i;
b9c361e0 2521 unsigned int insn_length;
252b5132
RH		 2522
2523 /* Get the opcode. */
3882b010 2524 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2525 ;
2526 if (*s != '\0')
2527 *s++ = '\0';
2528
2529 /* Look up the opcode in the hash table. */
2530 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2531 if (opcode == (const struct powerpc_opcode *) NULL)
2532 {
2533 const struct powerpc_macro *macro;
2534
2535 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2536 if (macro == (const struct powerpc_macro *) NULL)
d6ed37ed 2537 as_bad (_("unrecognized opcode: `%s'"), str);
252b5132
RH		 2538 else
2539 ppc_macro (s, macro);
2540
2541 return;
2542 }
2543
2544 insn = opcode->opcode;
2545
2546 str = s;
3882b010 2547 while (ISSPACE (*str))
252b5132
RH		 2548 ++str;
2549
2550 /* PowerPC operands are just expressions. The only real issue is
2551 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2552 an optional operand separate the operands only with commas (in some
2553 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2554 have optional operands). Most instructions with optional operands
2555 have only one. Those that have more than one optional operand can
2556 take either all their operands or none. So, before we start seriously
2557 parsing the operands, we check to see if we have optional operands,
2558 and if we do, we count the number of commas to see which operands
2559 have been omitted. */
252b5132
RH		 2560 skip_optional = 0;
2561 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2562 {
2563 const struct powerpc_operand *operand;
2564
2565 operand = &powerpc_operands[*opindex_ptr];
2566 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2567 {
2568 unsigned int opcount;
7fe9cf6b 2569 unsigned int num_operands_expected;
252b5132
RH		 2570
2571 /* There is an optional operand. Count the number of
2572 commas in the input line. */
2573 if (*str == '\0')
2574 opcount = 0;
2575 else
2576 {
2577 opcount = 1;
2578 s = str;
2579 while ((s = strchr (s, ',')) != (char *) NULL)
2580 {
2581 ++opcount;
2582 ++s;
2583 }
2584 }
2585
7fe9cf6b
NC		 2586 /* Compute the number of expected operands.
2587 Do not count fake operands. */
2588 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2589 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2590 ++ num_operands_expected;
2591
252b5132
RH		 2592 /* If there are fewer operands in the line then are called
2593 for by the instruction, we want to skip the optional
1f6c9eb0 2594 operands. */
7fe9cf6b 2595 if (opcount < num_operands_expected)
252b5132
RH		 2596 skip_optional = 1;
2597
2598 break;
2599 }
2600 }
2601
2602 /* Gather the operands. */
2603 need_paren = 0;
2604 next_opindex = 0;
2605 fc = 0;
2606 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2607 {
2608 const struct powerpc_operand *operand;
2609 const char *errmsg;
2610 char *hold;
2611 expressionS ex;
2612 char endc;
2613
2614 if (next_opindex == 0)
2615 operand = &powerpc_operands[*opindex_ptr];
2616 else
2617 {
2618 operand = &powerpc_operands[next_opindex];
2619 next_opindex = 0;
2620 }
252b5132
RH		 2621 errmsg = NULL;
2622
2623 /* If this is a fake operand, then we do not expect anything
2624 from the input. */
2625 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2626 {
2b3c4602 2627 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2628 if (errmsg != (const char *) NULL)
ee2c9aa9 2629 as_bad ("%s", errmsg);
252b5132
RH		 2630 continue;
2631 }
2632
2633 /* If this is an optional operand, and we are skipping it, just
2634 insert a zero. */
2635 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2636 && skip_optional)
2637 {
2638 if (operand->insert)
2639 {
2b3c4602 2640 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2641 if (errmsg != (const char *) NULL)
ee2c9aa9 2642 as_bad ("%s", errmsg);
252b5132
RH		 2643 }
2644 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2645 next_opindex = *opindex_ptr + 1;
2646 continue;
2647 }
2648
2649 /* Gather the operand. */
2650 hold = input_line_pointer;
2651 input_line_pointer = str;
2652
2653#ifdef TE_PE
81d4177b 2654 if (*input_line_pointer == '[')
252b5132
RH		 2655 {
2656 /* We are expecting something like the second argument here:
99a814a1
AM		 2657 *
2658 * lwz r4,[toc].GS.0.static_int(rtoc)
2659 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2660 * The argument following the `]' must be a symbol name, and the
2661 * register must be the toc register: 'rtoc' or '2'
2662 *
2663 * The effect is to 0 as the displacement field
2664 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2665 * the appropriate variation) reloc against it based on the symbol.
2666 * The linker will build the toc, and insert the resolved toc offset.
2667 *
2668 * Note:
2669 * o The size of the toc entry is currently assumed to be
2670 * 32 bits. This should not be assumed to be a hard coded
2671 * number.
2672 * o In an effort to cope with a change from 32 to 64 bits,
2673 * there are also toc entries that are specified to be
2674 * either 32 or 64 bits:
2675 * lwz r4,[toc32].GS.0.static_int(rtoc)
2676 * lwz r4,[toc64].GS.0.static_int(rtoc)
2677 * These demand toc entries of the specified size, and the
2678 * instruction probably requires it.
2679 */
252b5132
RH		 2680
2681 int valid_toc;
2682 enum toc_size_qualifier toc_kind;
2683 bfd_reloc_code_real_type toc_reloc;
2684
99a814a1
AM		 2685 /* Go parse off the [tocXX] part. */
2686 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2687
81d4177b 2688 if (!valid_toc)
252b5132 2689 {
a5840dce
AM		 2690 ignore_rest_of_line ();
2691 break;
252b5132
RH		 2692 }
2693
99a814a1
AM		 2694 /* Now get the symbol following the ']'. */
2695 expression (&ex);
252b5132
RH		 2696
2697 switch (toc_kind)
2698 {
2699 case default_toc:
99a814a1
AM		 2700 /* In this case, we may not have seen the symbol yet,
2701 since it is allowed to appear on a .extern or .globl
2702 or just be a label in the .data section. */
252b5132
RH		 2703 toc_reloc = BFD_RELOC_PPC_TOC16;
2704 break;
2705 case data_in_toc:
99a814a1
AM		 2706 /* 1. The symbol must be defined and either in the toc
2707 section, or a global.
2708 2. The reloc generated must have the TOCDEFN flag set
2709 in upper bit mess of the reloc type.
2710 FIXME: It's a little confusing what the tocv
2711 qualifier can be used for. At the very least, I've
2712 seen three uses, only one of which I'm sure I can
2713 explain. */
81d4177b
KH		 2714 if (ex.X_op == O_symbol)
2715 {
9c2799c2 2716 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2717 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2718 != tocdata_section)
252b5132 2719 {
99a814a1 2720 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2721 }
2722 }
2723
2724 toc_reloc = BFD_RELOC_PPC_TOC16;
2725 break;
2726 case must_be_32:
99a814a1
AM		 2727 /* FIXME: these next two specifically specify 32/64 bit
2728 toc entries. We don't support them today. Is this
2729 the right way to say that? */
252b5132 2730 toc_reloc = BFD_RELOC_UNUSED;
d6ed37ed 2731 as_bad (_("unimplemented toc32 expression modifier"));
252b5132
RH		 2732 break;
2733 case must_be_64:
99a814a1 2734 /* FIXME: see above. */
252b5132 2735 toc_reloc = BFD_RELOC_UNUSED;
d6ed37ed 2736 as_bad (_("unimplemented toc64 expression modifier"));
252b5132
RH		 2737 break;
2738 default:
bc805888 2739 fprintf (stderr,
99a814a1
AM		 2740 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2741 toc_kind);
bc805888 2742 abort ();
252b5132
RH		 2743 break;
2744 }
2745
2746 /* We need to generate a fixup for this expression. */
2747 if (fc >= MAX_INSN_FIXUPS)
2748 as_fatal (_("too many fixups"));
2749
2750 fixups[fc].reloc = toc_reloc;
2751 fixups[fc].exp = ex;
2752 fixups[fc].opindex = *opindex_ptr;
2753 ++fc;
2754
99a814a1
AM		 2755 /* Ok. We've set up the fixup for the instruction. Now make it
2756 look like the constant 0 was found here. */
252b5132
RH		 2757 ex.X_unsigned = 1;
2758 ex.X_op = O_constant;
2759 ex.X_add_number = 0;
2760 ex.X_add_symbol = NULL;
2761 ex.X_op_symbol = NULL;
2762 }
2763
2764 else
2765#endif /* TE_PE */
2766 {
b9c361e0
JL		 2767 if ((reg_names_p
2768 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2769 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2ad068be 2770 || !register_name (&ex))
252b5132 2771 {
13abbae3
AM		 2772 char save_lex = lex_type['%'];
2773
b9c361e0
JL		 2774 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2775 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
13abbae3
AM		 2776 {
2777 cr_operand = TRUE;
2778 lex_type['%'] |= LEX_BEGIN_NAME;
2779 }
252b5132 2780 expression (&ex);
b34976b6 2781 cr_operand = FALSE;
13abbae3 2782 lex_type['%'] = save_lex;
252b5132
RH		 2783 }
2784 }
2785
2786 str = input_line_pointer;
2787 input_line_pointer = hold;
2788
2789 if (ex.X_op == O_illegal)
2790 as_bad (_("illegal operand"));
2791 else if (ex.X_op == O_absent)
2792 as_bad (_("missing operand"));
2793 else if (ex.X_op == O_register)
2794 {
2795 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2796 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2797 }
2798 else if (ex.X_op == O_constant)
2799 {
2800#ifdef OBJ_ELF
81d4177b 2801 /* Allow @HA, @L, @H on constants. */
3b8b57a9 2802 bfd_reloc_code_real_type reloc;
252b5132
RH		 2803 char *orig_str = str;
2804
2805 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2806 switch (reloc)
2807 {
2808 default:
2809 str = orig_str;
2810 break;
2811
2812 case BFD_RELOC_LO16:
2813 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2814 something which cleared it, we always produce a
2815 signed value. */
2816 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2817 ex.X_add_number &= 0xffff;
2818 else
0baf16f2 2819 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2820 break;
2821
2822 case BFD_RELOC_HI16:
0baf16f2
AM		 2823 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2824 ex.X_add_number = PPC_HI (ex.X_add_number);
2825 else
2826 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2827 break;
2828
2829 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2830 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2831 ex.X_add_number = PPC_HA (ex.X_add_number);
2832 else
2833 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2834 break;
2835
0baf16f2
AM		 2836 case BFD_RELOC_PPC64_HIGHER:
2837 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2838 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2839 else
2840 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2841 break;
2842
2843 case BFD_RELOC_PPC64_HIGHER_S:
2844 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2845 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2846 else
2847 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2848 break;
0baf16f2
AM		 2849
2850 case BFD_RELOC_PPC64_HIGHEST:
2851 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2852 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2853 else
2854 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2855 break;
2856
2857 case BFD_RELOC_PPC64_HIGHEST_S:
2858 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2859 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2860 else
2861 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2862 break;
252b5132 2863 }
0baf16f2 2864#endif /* OBJ_ELF */
252b5132 2865 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2866 ppc_cpu, (char *) NULL, 0);
252b5132 2867 }
727fc41e 2868 else
252b5132 2869 {
3b8b57a9
AM		 2870 bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
2871#ifdef OBJ_ELF
727fc41e 2872 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2873 {
727fc41e
AM		 2874 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2875 if (sym_name[0] == '.')
2876 ++sym_name;
cdba85ec 2877
727fc41e 2878 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2879 {
727fc41e
AM		 2880 expressionS tls_exp;
2881
2882 hold = input_line_pointer;
2883 input_line_pointer = str + 1;
2884 expression (&tls_exp);
2885 if (tls_exp.X_op == O_symbol)
2886 {
2887 reloc = BFD_RELOC_UNUSED;
2888 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2889 {
2890 reloc = BFD_RELOC_PPC_TLSGD;
2891 input_line_pointer += 7;
2892 }
2893 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2894 {
2895 reloc = BFD_RELOC_PPC_TLSLD;
2896 input_line_pointer += 7;
2897 }
2898 if (reloc != BFD_RELOC_UNUSED)
2899 {
2900 SKIP_WHITESPACE ();
2901 str = input_line_pointer;
2902
2903 if (fc >= MAX_INSN_FIXUPS)
2904 as_fatal (_("too many fixups"));
2905 fixups[fc].exp = tls_exp;
2906 fixups[fc].opindex = *opindex_ptr;
2907 fixups[fc].reloc = reloc;
2908 ++fc;
2909 }
2910 }
2911 input_line_pointer = hold;
252b5132
RH		 2912 }
2913 }
2914
727fc41e 2915 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2916 {
727fc41e 2917 /* Some TLS tweaks. */
0baf16f2
AM		 2918 switch (reloc)
2919 {
727fc41e 2920 default:
cdba85ec 2921 break;
727fc41e
AM		 2922
2923 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2924 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2925 as_bad (_("@tls may not be used with \"%s\" operands"),
2926 opcode->name);
2927 else if (operand->shift != 11)
2928 as_bad (_("@tls may only be used in last operand"));
2929 else
2930 insn = ppc_insert_operand (insn, operand,
2931 ppc_obj64 ? 13 : 2,
2932 ppc_cpu, (char *) NULL, 0);
cdba85ec 2933 break;
727fc41e
AM		 2934
2935 /* We'll only use the 32 (or 64) bit form of these relocations
2936 in constants. Instructions get the 16 bit form. */
2937 case BFD_RELOC_PPC_DTPREL:
2938 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2939 break;
727fc41e
AM		 2940 case BFD_RELOC_PPC_TPREL:
2941 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2942 break;
2943 }
727fc41e 2944
b9c361e0
JL		 2945 /* If VLE-mode convert LO/HI/HA relocations. */
2946 if (opcode->flags & PPC_OPCODE_VLE)
2947 {
2948 int tmp_insn = insn & opcode->mask;
2949
2950 int use_d_reloc = (tmp_insn == E_OR2I_INSN
2951 || tmp_insn == E_AND2I_DOT_INSN
2952 || tmp_insn == E_OR2IS_INSN
2953 || tmp_insn == E_LIS_INSN
2954 || tmp_insn == E_AND2IS_DOT_INSN);
2955
2956
2957 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
2958 || tmp_insn == E_ADD2IS_INSN
2959 || tmp_insn == E_CMP16I_INSN
2960 || tmp_insn == E_MULL2I_INSN
2961 || tmp_insn == E_CMPL16I_INSN
2962 || tmp_insn == E_CMPH16I_INSN
2963 || tmp_insn == E_CMPHL16I_INSN);
2964
2965 switch (reloc)
2966 {
2967 default:
2968 break;
2969
2970 case BFD_RELOC_PPC_EMB_SDA21:
2971 reloc = BFD_RELOC_PPC_VLE_SDA21;
2972 break;
2973
2974 case BFD_RELOC_LO16:
2975 if (use_d_reloc)
2976 reloc = BFD_RELOC_PPC_VLE_LO16D;
2977 else if (use_a_reloc)
2978 reloc = BFD_RELOC_PPC_VLE_LO16A;
2979 break;
2980
2981 case BFD_RELOC_HI16:
2982 if (use_d_reloc)
2983 reloc = BFD_RELOC_PPC_VLE_HI16D;
2984 else if (use_a_reloc)
2985 reloc = BFD_RELOC_PPC_VLE_HI16A;
2986 break;
2987
2988 case BFD_RELOC_HI16_S:
2989 if (use_d_reloc)
2990 reloc = BFD_RELOC_PPC_VLE_HA16D;
2991 else if (use_a_reloc)
2992 reloc = BFD_RELOC_PPC_VLE_HA16A;
2993 break;
2994
2995 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
2996 if (use_d_reloc)
2997 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
2998 break;
2999
3000 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3001 if (use_d_reloc)
3002 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3003 break;
3004
3005 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3006 if (use_d_reloc)
3007 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3008 break;
3009 }
3010 }
3011
727fc41e
AM		 3012 /* For the absolute forms of branches, convert the PC
3013 relative form back into the absolute. */
3014 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3015 {
3016 switch (reloc)
3017 {
3018 case BFD_RELOC_PPC_B26:
3019 reloc = BFD_RELOC_PPC_BA26;
3020 break;
3021 case BFD_RELOC_PPC_B16:
3022 reloc = BFD_RELOC_PPC_BA16;
3023 break;
3024 case BFD_RELOC_PPC_B16_BRTAKEN:
3025 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3026 break;
3027 case BFD_RELOC_PPC_B16_BRNTAKEN:
3028 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3029 break;
3030 default:
3031 break;
3032 }
3033 }
3034
01efc3af
AM		 3035 switch (reloc)
3036 {
3037 case BFD_RELOC_PPC_TOC16:
3038 toc_reloc_types |= has_small_toc_reloc;
3039 break;
3040 case BFD_RELOC_PPC64_TOC16_LO:
3041 case BFD_RELOC_PPC64_TOC16_HI:
3042 case BFD_RELOC_PPC64_TOC16_HA:
3043 toc_reloc_types |= has_large_toc_reloc;
3044 break;
3045 default:
3046 break;
3047 }
3048
1fe532cf 3049 if ((operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
727fc41e
AM		 3050 {
3051 switch (reloc)
3052 {
3053 case BFD_RELOC_16:
3054 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3055 break;
3056 case BFD_RELOC_LO16:
3057 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3058 break;
3059 case BFD_RELOC_16_GOTOFF:
3060 reloc = BFD_RELOC_PPC64_GOT16_DS;
3061 break;
3062 case BFD_RELOC_LO16_GOTOFF:
3063 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3064 break;
3065 case BFD_RELOC_LO16_PLTOFF:
3066 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3067 break;
3068 case BFD_RELOC_16_BASEREL:
3069 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3070 break;
3071 case BFD_RELOC_LO16_BASEREL:
3072 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3073 break;
3074 case BFD_RELOC_PPC_TOC16:
3075 reloc = BFD_RELOC_PPC64_TOC16_DS;
3076 break;
3077 case BFD_RELOC_PPC64_TOC16_LO:
3078 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3079 break;
3080 case BFD_RELOC_PPC64_PLTGOT16:
3081 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3082 break;
3083 case BFD_RELOC_PPC64_PLTGOT16_LO:
3084 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3085 break;
3086 case BFD_RELOC_PPC_DTPREL16:
3087 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3088 break;
3089 case BFD_RELOC_PPC_DTPREL16_LO:
3090 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3091 break;
3092 case BFD_RELOC_PPC_TPREL16:
3093 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3094 break;
3095 case BFD_RELOC_PPC_TPREL16_LO:
3096 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3097 break;
3098 case BFD_RELOC_PPC_GOT_DTPREL16:
3099 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3100 case BFD_RELOC_PPC_GOT_TPREL16:
3101 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3102 break;
3103 default:
3104 as_bad (_("unsupported relocation for DS offset field"));
3105 break;
3106 }
3107 }
0baf16f2 3108 }
3b8b57a9
AM		 3109#endif /* OBJ_ELF */
3110
3111 if (reloc != BFD_RELOC_UNUSED)
3112 ;
3113 /* Determine a BFD reloc value based on the operand information.
3114 We are only prepared to turn a few of the operands into
3115 relocs. */
3116 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3117 && operand->bitm == 0x3fffffc
3118 && operand->shift == 0)
3119 reloc = BFD_RELOC_PPC_B26;
3120 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3121 && operand->bitm == 0xfffc
3122 && operand->shift == 0)
3123 reloc = BFD_RELOC_PPC_B16;
3124 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3125 && operand->bitm == 0x1fe
3126 && operand->shift == -1)
3127 reloc = BFD_RELOC_PPC_VLE_REL8;
3128 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3129 && operand->bitm == 0xfffe
3130 && operand->shift == 0)
3131 reloc = BFD_RELOC_PPC_VLE_REL15;
3132 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3133 && operand->bitm == 0x1fffffe
3134 && operand->shift == 0)
3135 reloc = BFD_RELOC_PPC_VLE_REL24;
3136 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3137 && operand->bitm == 0x3fffffc
3138 && operand->shift == 0)
3139 reloc = BFD_RELOC_PPC_BA26;
3140 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3141 && operand->bitm == 0xfffc
3142 && operand->shift == 0)
3143 reloc = BFD_RELOC_PPC_BA16;
3144#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3145 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
3146 && (operand->bitm & 0xfff0) == 0xfff0
3147 && operand->shift == 0)
3148 {
ac21e7da 3149 /* Note: the symbol may be not yet defined. */
3b8b57a9
AM		 3150 if (ppc_is_toc_sym (ex.X_add_symbol))
3151 {
3152 reloc = BFD_RELOC_PPC_TOC16;
3153#ifdef OBJ_ELF
3154 if (ppc_obj64
3155 && (operand->flags & PPC_OPERAND_DS) != 0)
3156 reloc = BFD_RELOC_PPC64_TOC16_DS;
3157#endif
3158 }
3159 else
3160 {
3161 reloc = BFD_RELOC_16;
3162#ifdef OBJ_ELF
3163 if (ppc_obj64
3164 && (operand->flags & PPC_OPERAND_DS) != 0)
3165 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3166#endif
3167 }
3168 }
3169#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
0baf16f2 3170
252b5132
RH		 3171 /* We need to generate a fixup for this expression. */
3172 if (fc >= MAX_INSN_FIXUPS)
3173 as_fatal (_("too many fixups"));
3174 fixups[fc].exp = ex;
727fc41e 3175 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 3176 fixups[fc].reloc = reloc;
3177 ++fc;
3178 }
252b5132
RH		 3179
3180 if (need_paren)
3181 {
3182 endc = ')';
3183 need_paren = 0;
c3d65c1c
BE		 3184 /* If expecting more operands, then we want to see "),". */
3185 if (*str == endc && opindex_ptr[1] != 0)
3186 {
3187 do
3188 ++str;
3189 while (ISSPACE (*str));
3190 endc = ',';
3191 }
252b5132
RH		 3192 }
3193 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3194 {
3195 endc = '(';
3196 need_paren = 1;
3197 }
3198 else
3199 endc = ',';
3200
3201 /* The call to expression should have advanced str past any
3202 whitespace. */
3203 if (*str != endc
3204 && (endc != ',' || *str != '\0'))
3205 {
5a938047
AM		 3206 if (*str == '\0')
3207 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3208 else
3209 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 3210 break;
3211 }
3212
3213 if (*str != '\0')
3214 ++str;
3215 }
3216
3882b010 3217 while (ISSPACE (*str))
252b5132
RH		 3218 ++str;
3219
3220 if (*str != '\0')
3221 as_bad (_("junk at end of line: `%s'"), str);
3222
dc1d03fc 3223#ifdef OBJ_ELF
b9c361e0 3224 /* Do we need/want an APUinfo section? */
4faf939a
JM		 3225 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3226 && !ppc_obj64)
6a0c61b7
EZ		 3227 {
3228 /* These are all version "1". */
3229 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 3230 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 3231 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 3232 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 3233 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 3234 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 3235 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 3236 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 3237 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 3238 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 3239 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 3240 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 3241 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 3242 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
b9c361e0
JL		 3243 if (opcode->flags & PPC_OPCODE_VLE)
3244 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
6a0c61b7 3245 }
dc1d03fc 3246#endif
6a0c61b7 3247
252b5132 3248 /* Write out the instruction. */
b9c361e0
JL		 3249 /* Differentiate between two and four byte insns. */
3250 if (ppc_mach () == bfd_mach_ppc_vle)
3251 {
3252 if (PPC_OP_SE_VLE (insn))
3253 insn_length = 2;
3254 else
3255 insn_length = 4;
3256 addr_mod = frag_now_fix () & 1;
3257 }
3258 else
3259 {
3260 insn_length = 4;
3261 addr_mod = frag_now_fix () & 3;
3262 }
3263 /* All instructions can start on a 2 byte boundary for VLE. */
3264 f = frag_more (insn_length);
09b935ac 3265 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
b9c361e0
JL		 3266 {
3267 if (ppc_mach() == bfd_mach_ppc_vle)
3268 as_bad (_("instruction address is not a multiple of 2"));
3269 else
3270 as_bad (_("instruction address is not a multiple of 4"));
3271 }
09b935ac
AM		 3272 frag_now->insn_addr = addr_mod;
3273 frag_now->has_code = 1;
b9c361e0 3274 md_number_to_chars (f, insn, insn_length);
252b5132 3275
5d6f4f16 3276#ifdef OBJ_ELF
b9c361e0 3277 dwarf2_emit_insn (insn_length);
5d6f4f16
GK		 3278#endif
3279
3b8b57a9 3280 /* Create any fixups. */
252b5132
RH		 3281 for (i = 0; i < fc; i++)
3282 {
3b8b57a9 3283 fixS *fixP;
252b5132
RH		 3284 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3285 {
99a814a1 3286 reloc_howto_type *reloc_howto;
252b5132
RH		 3287 int size;
3288 int offset;
252b5132 3289
99a814a1 3290 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3291 if (!reloc_howto)
3292 abort ();
3293
3294 size = bfd_get_reloc_size (reloc_howto);
3b8b57a9 3295 offset = target_big_endian ? (insn_length - size) : 0;
252b5132
RH		 3296
3297 if (size < 1 || size > 4)
bc805888 3298 abort ();
252b5132 3299
99a814a1
AM		 3300 fixP = fix_new_exp (frag_now,
3301 f - frag_now->fr_literal + offset,
3302 size,
3303 &fixups[i].exp,
3304 reloc_howto->pc_relative,
252b5132 3305 fixups[i].reloc);
252b5132
RH		 3306 }
3307 else
727fc41e
AM		 3308 {
3309 const struct powerpc_operand *operand;
3310
3311 operand = &powerpc_operands[fixups[i].opindex];
3b8b57a9
AM		 3312 fixP = fix_new_exp (frag_now,
3313 f - frag_now->fr_literal,
3314 insn_length,
3315 &fixups[i].exp,
3316 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3317 BFD_RELOC_UNUSED);
727fc41e 3318 }
3b8b57a9 3319 fixP->fx_pcrel_adjust = fixups[i].opindex;
252b5132
RH		 3320 }
3321}
3322
3323/* Handle a macro. Gather all the operands, transform them as
3324 described by the macro, and call md_assemble recursively. All the
3325 operands are separated by commas; we don't accept parentheses
3326 around operands here. */
3327
3328static void
98027b10 3329ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3330{
3331 char *operands[10];
3332 unsigned int count;
3333 char *s;
3334 unsigned int len;
3335 const char *format;
db557034 3336 unsigned int arg;
252b5132
RH		 3337 char *send;
3338 char *complete;
3339
3340 /* Gather the users operands into the operands array. */
3341 count = 0;
3342 s = str;
3343 while (1)
3344 {
3345 if (count >= sizeof operands / sizeof operands[0])
3346 break;
3347 operands[count++] = s;
3348 s = strchr (s, ',');
3349 if (s == (char *) NULL)
3350 break;
3351 *s++ = '\0';
81d4177b 3352 }
252b5132
RH		 3353
3354 if (count != macro->operands)
3355 {
3356 as_bad (_("wrong number of operands"));
3357 return;
3358 }
3359
3360 /* Work out how large the string must be (the size is unbounded
3361 because it includes user input). */
3362 len = 0;
3363 format = macro->format;
3364 while (*format != '\0')
3365 {
3366 if (*format != '%')
3367 {
3368 ++len;
3369 ++format;
3370 }
3371 else
3372 {
3373 arg = strtol (format + 1, &send, 10);
db557034 3374 know (send != format && arg < count);
252b5132
RH		 3375 len += strlen (operands[arg]);
3376 format = send;
3377 }
3378 }
3379
3380 /* Put the string together. */
3381 complete = s = (char *) alloca (len + 1);
3382 format = macro->format;
3383 while (*format != '\0')
3384 {
3385 if (*format != '%')
3386 *s++ = *format++;
3387 else
3388 {
3389 arg = strtol (format + 1, &send, 10);
3390 strcpy (s, operands[arg]);
3391 s += strlen (s);
3392 format = send;
3393 }
3394 }
3395 *s = '\0';
3396
3397 /* Assemble the constructed instruction. */
3398 md_assemble (complete);
81d4177b 3399}
252b5132
RH		 3400\f
3401#ifdef OBJ_ELF
18ae9cc1 3402/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3403
3404int
98027b10 3405ppc_section_type (char *str, size_t len)
252b5132 3406{
9de8d8f1
RH		 3407 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3408 return SHT_ORDERED;
252b5132 3409
9de8d8f1 3410 return -1;
252b5132
RH		 3411}
3412
3413int
1239de13 3414ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3415{
3416 if (type == SHT_ORDERED)
3417 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3418
252b5132
RH		 3419 return flags;
3420}
3421#endif /* OBJ_ELF */
3422
3423\f
3424/* Pseudo-op handling. */
3425
3426/* The .byte pseudo-op. This is similar to the normal .byte
3427 pseudo-op, but it can also take a single ASCII string. */
3428
3429static void
98027b10 3430ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3431{
3432 if (*input_line_pointer != '\"')
3433 {
3434 cons (1);
3435 return;
3436 }
3437
3438 /* Gather characters. A real double quote is doubled. Unusual
3439 characters are not permitted. */
3440 ++input_line_pointer;
3441 while (1)
3442 {
3443 char c;
3444
3445 c = *input_line_pointer++;
3446
3447 if (c == '\"')
3448 {
3449 if (*input_line_pointer != '\"')
3450 break;
3451 ++input_line_pointer;
3452 }
3453
3454 FRAG_APPEND_1_CHAR (c);
3455 }
3456
3457 demand_empty_rest_of_line ();
3458}
3459\f
3460#ifdef OBJ_XCOFF
3461
3462/* XCOFF specific pseudo-op handling. */
3463
3464/* This is set if we are creating a .stabx symbol, since we don't want
3465 to handle symbol suffixes for such symbols. */
b34976b6 3466static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3467
3468/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3469 symbols in the .bss segment as though they were local common
67c1ffbe 3470 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3471 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3472
3473static void
98027b10 3474ppc_comm (int lcomm)
252b5132
RH		 3475{
3476 asection *current_seg = now_seg;
3477 subsegT current_subseg = now_subseg;
3478 char *name;
3479 char endc;
3480 char *end_name;
3481 offsetT size;
3482 offsetT align;
3483 symbolS *lcomm_sym = NULL;
3484 symbolS *sym;
3485 char *pfrag;
3486
3487 name = input_line_pointer;
3488 endc = get_symbol_end ();
3489 end_name = input_line_pointer;
3490 *end_name = endc;
3491
3492 if (*input_line_pointer != ',')
3493 {
3494 as_bad (_("missing size"));
3495 ignore_rest_of_line ();
3496 return;
3497 }
3498 ++input_line_pointer;
3499
3500 size = get_absolute_expression ();
3501 if (size < 0)
3502 {
3503 as_bad (_("negative size"));
3504 ignore_rest_of_line ();
3505 return;
3506 }
3507
3508 if (! lcomm)
3509 {
3510 /* The third argument to .comm is the alignment. */
3511 if (*input_line_pointer != ',')
1ad63b2f 3512 align = 2;
252b5132
RH		 3513 else
3514 {
3515 ++input_line_pointer;
3516 align = get_absolute_expression ();
3517 if (align <= 0)
3518 {
3519 as_warn (_("ignoring bad alignment"));
1ad63b2f 3520 align = 2;
252b5132
RH		 3521 }
3522 }
3523 }
3524 else
3525 {
3526 char *lcomm_name;
3527 char lcomm_endc;
3528
252b5132
RH		 3529 /* The third argument to .lcomm appears to be the real local
3530 common symbol to create. References to the symbol named in
3531 the first argument are turned into references to the third
3532 argument. */
3533 if (*input_line_pointer != ',')
3534 {
3535 as_bad (_("missing real symbol name"));
3536 ignore_rest_of_line ();
3537 return;
3538 }
3539 ++input_line_pointer;
3540
3541 lcomm_name = input_line_pointer;
3542 lcomm_endc = get_symbol_end ();
81d4177b 3543
252b5132
RH		 3544 lcomm_sym = symbol_find_or_make (lcomm_name);
3545
3546 *input_line_pointer = lcomm_endc;
3c02c47f
DE		 3547
3548 /* The fourth argument to .lcomm is the alignment. */
3549 if (*input_line_pointer != ',')
3550 {
3551 if (size <= 4)
3552 align = 2;
3553 else
3554 align = 3;
3555 }
3556 else
3557 {
3558 ++input_line_pointer;
3559 align = get_absolute_expression ();
3560 if (align <= 0)
3561 {
3562 as_warn (_("ignoring bad alignment"));
3563 align = 2;
3564 }
3565 }
252b5132
RH		 3566 }
3567
3568 *end_name = '\0';
3569 sym = symbol_find_or_make (name);
3570 *end_name = endc;
3571
3572 if (S_IS_DEFINED (sym)
3573 || S_GET_VALUE (sym) != 0)
3574 {
3575 as_bad (_("attempt to redefine symbol"));
3576 ignore_rest_of_line ();
3577 return;
3578 }
81d4177b 3579
252b5132 3580 record_alignment (bss_section, align);
81d4177b 3581
252b5132
RH		 3582 if (! lcomm
3583 || ! S_IS_DEFINED (lcomm_sym))
3584 {
3585 symbolS *def_sym;
3586 offsetT def_size;
3587
3588 if (! lcomm)
3589 {
3590 def_sym = sym;
3591 def_size = size;
3592 S_SET_EXTERNAL (sym);
3593 }
3594 else
3595 {
809ffe0d 3596 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3597 def_sym = lcomm_sym;
3598 def_size = 0;
3599 }
3600
3601 subseg_set (bss_section, 1);
3602 frag_align (align, 0, 0);
81d4177b 3603
809ffe0d 3604 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3605 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3606 def_size, (char *) NULL);
3607 *pfrag = 0;
3608 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3609 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3610 }
3611 else if (lcomm)
3612 {
3613 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3614 symbol_get_frag (lcomm_sym)->fr_offset =
3615 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3616 &~ ((1 << align) - 1));
809ffe0d
ILT		 3617 if (align > symbol_get_tc (lcomm_sym)->align)
3618 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3619 }
3620
3621 if (lcomm)
3622 {
3623 /* Make sym an offset from lcomm_sym. */
3624 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3625 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3626 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3627 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3628 }
3629
3630 subseg_set (current_seg, current_subseg);
3631
3632 demand_empty_rest_of_line ();
3633}
3634
3635/* The .csect pseudo-op. This switches us into a different
3636 subsegment. The first argument is a symbol whose value is the
3637 start of the .csect. In COFF, csect symbols get special aux
3638 entries defined by the x_csect field of union internal_auxent. The
3639 optional second argument is the alignment (the default is 2). */
3640
3641static void
98027b10 3642ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3643{
3644 char *name;
3645 char endc;
3646 symbolS *sym;
931e13a6 3647 offsetT align;
252b5132
RH		 3648
3649 name = input_line_pointer;
3650 endc = get_symbol_end ();
81d4177b 3651
252b5132
RH		 3652 sym = symbol_find_or_make (name);
3653
3654 *input_line_pointer = endc;
3655
3656 if (S_GET_NAME (sym)[0] == '\0')
3657 {
3658 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3659 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3660 }
3661
931e13a6 3662 align = 2;
252b5132
RH		 3663 if (*input_line_pointer == ',')
3664 {
3665 ++input_line_pointer;
931e13a6 3666 align = get_absolute_expression ();
252b5132
RH		 3667 }
3668
931e13a6
AM		 3669 ppc_change_csect (sym, align);
3670
252b5132
RH		 3671 demand_empty_rest_of_line ();
3672}
3673
3674/* Change to a different csect. */
3675
3676static void
98027b10 3677ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3678{
3679 if (S_IS_DEFINED (sym))
809ffe0d 3680 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3681 else
3682 {
3683 symbolS **list_ptr;
3684 int after_toc;
3685 int hold_chunksize;
3686 symbolS *list;
931e13a6
AM		 3687 int is_code;
3688 segT sec;
252b5132
RH		 3689
3690 /* This is a new csect. We need to look at the symbol class to
3691 figure out whether it should go in the text section or the
3692 data section. */
3693 after_toc = 0;
931e13a6 3694 is_code = 0;
96d56e9f 3695 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3696 {
3697 case XMC_PR:
3698 case XMC_RO:
3699 case XMC_DB:
3700 case XMC_GL:
3701 case XMC_XO:
3702 case XMC_SV:
3703 case XMC_TI:
3704 case XMC_TB:
3705 S_SET_SEGMENT (sym, text_section);
809ffe0d 3706 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3707 ++ppc_text_subsegment;
3708 list_ptr = &ppc_text_csects;
931e13a6 3709 is_code = 1;
252b5132
RH		 3710 break;
3711 case XMC_RW:
3712 case XMC_TC0:
3713 case XMC_TC:
3714 case XMC_DS:
3715 case XMC_UA:
3716 case XMC_BS:
3717 case XMC_UC:
3718 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3719 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3720 == ppc_data_subsegment))
252b5132
RH		 3721 after_toc = 1;
3722 S_SET_SEGMENT (sym, data_section);
809ffe0d 3723 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3724 ++ppc_data_subsegment;
3725 list_ptr = &ppc_data_csects;
3726 break;
3727 default:
3728 abort ();
3729 }
3730
3731 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3732 changing subsegments, so that we don't use a lot of memory
3733 space for what may be a small section. */
252b5132
RH		 3734 hold_chunksize = chunksize;
3735 chunksize = 64;
3736
931e13a6
AM		 3737 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3738 symbol_get_tc (sym)->subseg);
252b5132
RH		 3739
3740 chunksize = hold_chunksize;
3741
3742 if (after_toc)
3743 ppc_after_toc_frag = frag_now;
3744
931e13a6
AM		 3745 record_alignment (sec, align);
3746 if (is_code)
3747 frag_align_code (align, 0);
3748 else
3749 frag_align (align, 0, 0);
3750
809ffe0d 3751 symbol_set_frag (sym, frag_now);
252b5132
RH		 3752 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3753
931e13a6 3754 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3755 symbol_get_tc (sym)->output = 1;
3756 symbol_get_tc (sym)->within = sym;
81d4177b 3757
252b5132 3758 for (list = *list_ptr;
809ffe0d
ILT		 3759 symbol_get_tc (list)->next != (symbolS *) NULL;
3760 list = symbol_get_tc (list)->next)
252b5132 3761 ;
809ffe0d 3762 symbol_get_tc (list)->next = sym;
81d4177b 3763
252b5132 3764 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3765 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3766 &symbol_lastP);
252b5132
RH		 3767 }
3768
3769 ppc_current_csect = sym;
3770}
3771
85645aed
TG		 3772static void
3773ppc_change_debug_section (unsigned int idx, subsegT subseg)
3774{
3775 segT sec;
3776 flagword oldflags;
3777 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3778
3779 sec = subseg_new (dw->name, subseg);
3780 oldflags = bfd_get_section_flags (stdoutput, sec);
3781 if (oldflags == SEC_NO_FLAGS)
3782 {
3783 /* Just created section. */
3784 gas_assert (dw_sections[idx].sect == NULL);
3785
3786 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3787 bfd_set_section_alignment (stdoutput, sec, 0);
3788 dw_sections[idx].sect = sec;
3789 }
3790
3791 /* Not anymore in a csect. */
3792 ppc_current_csect = NULL;
3793}
3794
3795/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3796 .dwsect flag [, opt-label ]
3797*/
3798
3799static void
3800ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3801{
3802 offsetT flag;
3803 symbolS *opt_label;
3804 const struct xcoff_dwsect_name *dw;
3805 struct dw_subsection *subseg;
3806 struct dw_section *dws;
3807 int i;
3808
3809 /* Find section. */
3810 flag = get_absolute_expression ();
3811 dw = NULL;
3812 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3813 if (xcoff_dwsect_names[i].flag == flag)
3814 {
3815 dw = &xcoff_dwsect_names[i];
3816 break;
3817 }
3818
3819 /* Parse opt-label. */
3820 if (*input_line_pointer == ',')
3821 {
3822 const char *label;
3823 char c;
3824
3825 ++input_line_pointer;
3826
3827 label = input_line_pointer;
3828 c = get_symbol_end ();
3829 opt_label = symbol_find_or_make (label);
3830 *input_line_pointer = c;
3831 }
3832 else
3833 opt_label = NULL;
3834
3835 demand_empty_rest_of_line ();
3836
3837 /* Return now in case of unknown subsection. */
3838 if (dw == NULL)
3839 {
d6ed37ed 3840 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
85645aed
TG		 3841 (unsigned)flag);
3842 return;
3843 }
3844
3845 /* Find the subsection. */
3846 dws = &dw_sections[i];
3847 subseg = NULL;
3848 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3849 {
3850 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3851 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3852 {
3853 as_bad (_("label %s was not defined in this dwarf section"),
3854 S_GET_NAME (opt_label));
3855 subseg = dws->anon_subseg;
3856 opt_label = NULL;
3857 }
3858 else
3859 subseg = symbol_get_tc (opt_label)->u.dw;
3860 }
3861
3862 if (subseg != NULL)
3863 {
3864 /* Switch to the subsection. */
3865 ppc_change_debug_section (i, subseg->subseg);
3866 }
3867 else
3868 {
3869 /* Create a new dw subsection. */
3870 subseg = (struct dw_subsection *)
3871 xmalloc (sizeof (struct dw_subsection));
3872
3873 if (opt_label == NULL)
3874 {
3875 /* The anonymous one. */
3876 subseg->subseg = 0;
3877 subseg->link = NULL;
3878 dws->anon_subseg = subseg;
3879 }
3880 else
3881 {
3882 /* A named one. */
3883 if (dws->list_subseg != NULL)
3884 subseg->subseg = dws->list_subseg->subseg + 1;
3885 else
3886 subseg->subseg = 1;
3887
3888 subseg->link = dws->list_subseg;
3889 dws->list_subseg = subseg;
3890 symbol_get_tc (opt_label)->u.dw = subseg;
3891 }
3892
3893 ppc_change_debug_section (i, subseg->subseg);
3894
3895 if (dw->def_size)
3896 {
3897 /* Add the length field. */
3898 expressionS *exp = &subseg->end_exp;
3899 int sz;
3900
3901 if (opt_label != NULL)
3902 symbol_set_value_now (opt_label);
3903
3904 /* Add the length field. Note that according to the AIX assembler
3905 manual, the size of the length field is 4 for powerpc32 but
3906 12 for powerpc64. */
3907 if (ppc_obj64)
3908 {
3909 /* Write the 64bit marker. */
3910 md_number_to_chars (frag_more (4), -1, 4);
3911 }
3912
3913 exp->X_op = O_subtract;
3914 exp->X_op_symbol = symbol_temp_new_now ();
3915 exp->X_add_symbol = symbol_temp_make ();
3916
3917 sz = ppc_obj64 ? 8 : 4;
3918 exp->X_add_number = -sz;
3919 emit_expr (exp, sz);
3920 }
3921 }
3922}
3923
252b5132
RH		 3924/* This function handles the .text and .data pseudo-ops. These
3925 pseudo-ops aren't really used by XCOFF; we implement them for the
3926 convenience of people who aren't used to XCOFF. */
3927
3928static void
98027b10 3929ppc_section (int type)
252b5132
RH		 3930{
3931 const char *name;
3932 symbolS *sym;
3933
3934 if (type == 't')
3935 name = ".text[PR]";
3936 else if (type == 'd')
3937 name = ".data[RW]";
3938 else
3939 abort ();
3940
3941 sym = symbol_find_or_make (name);
3942
931e13a6 3943 ppc_change_csect (sym, 2);
252b5132
RH		 3944
3945 demand_empty_rest_of_line ();
3946}
3947
3948/* This function handles the .section pseudo-op. This is mostly to
3949 give an error, since XCOFF only supports .text, .data and .bss, but
3950 we do permit the user to name the text or data section. */
3951
3952static void
98027b10 3953ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3954{
3955 char *user_name;
3956 const char *real_name;
3957 char c;
3958 symbolS *sym;
3959
3960 user_name = input_line_pointer;
3961 c = get_symbol_end ();
3962
3963 if (strcmp (user_name, ".text") == 0)
3964 real_name = ".text[PR]";
3965 else if (strcmp (user_name, ".data") == 0)
3966 real_name = ".data[RW]";
3967 else
3968 {
d6ed37ed 3969 as_bad (_("the XCOFF file format does not support arbitrary sections"));
252b5132
RH		 3970 *input_line_pointer = c;
3971 ignore_rest_of_line ();
3972 return;
3973 }
3974
3975 *input_line_pointer = c;
3976
3977 sym = symbol_find_or_make (real_name);
3978
931e13a6 3979 ppc_change_csect (sym, 2);
252b5132
RH		 3980
3981 demand_empty_rest_of_line ();
3982}
3983
3984/* The .extern pseudo-op. We create an undefined symbol. */
3985
3986static void
98027b10 3987ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3988{
3989 char *name;
3990 char endc;
3991
3992 name = input_line_pointer;
3993 endc = get_symbol_end ();
3994
3995 (void) symbol_find_or_make (name);
3996
3997 *input_line_pointer = endc;
3998
3999 demand_empty_rest_of_line ();
4000}
4001
4002/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4003
4004static void
98027b10 4005ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4006{
4007 char *name;
4008 char endc;
4009 symbolS *sym;
4010
4011 name = input_line_pointer;
4012 endc = get_symbol_end ();
4013
4014 sym = symbol_find_or_make (name);
4015
4016 *input_line_pointer = endc;
4017
809ffe0d 4018 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4019
4020 demand_empty_rest_of_line ();
4021}
4022
c865e45b
RS		 4023/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4024 relocations at the beginning of the current csect.
4025
4026 (In principle, there's no reason why the relocations _have_ to be at
4027 the beginning. Anywhere in the csect would do. However, inserting
4028 at the beginning is what the native assmebler does, and it helps to
4029 deal with cases where the .ref statements follow the section contents.)
4030
4031 ??? .refs don't work for empty .csects. However, the native assembler
4032 doesn't report an error in this case, and neither yet do we. */
4033
4034static void
4035ppc_ref (int ignore ATTRIBUTE_UNUSED)
4036{
4037 char *name;
4038 char c;
4039
4040 if (ppc_current_csect == NULL)
4041 {
4042 as_bad (_(".ref outside .csect"));
4043 ignore_rest_of_line ();
4044 return;
4045 }
4046
4047 do
4048 {
4049 name = input_line_pointer;
4050 c = get_symbol_end ();
4051
4052 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4053 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4054
4055 *input_line_pointer = c;
4056 SKIP_WHITESPACE ();
4057 c = *input_line_pointer;
4058 if (c == ',')
4059 {
4060 input_line_pointer++;
4061 SKIP_WHITESPACE ();
4062 if (is_end_of_line[(unsigned char) *input_line_pointer])
4063 {
4064 as_bad (_("missing symbol name"));
4065 ignore_rest_of_line ();
4066 return;
4067 }
4068 }
4069 }
4070 while (c == ',');
4071
4072 demand_empty_rest_of_line ();
4073}
4074
252b5132
RH		 4075/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4076 although I don't know why it bothers. */
4077
4078static void
98027b10 4079ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4080{
4081 char *name;
4082 char endc;
4083 symbolS *sym;
4084 int len;
4085
4086 name = input_line_pointer;
4087 endc = get_symbol_end ();
4088
4089 sym = symbol_find_or_make (name);
4090
4091 *input_line_pointer = endc;
4092
4093 if (*input_line_pointer != ',')
4094 {
4095 as_bad (_("missing rename string"));
4096 ignore_rest_of_line ();
4097 return;
4098 }
4099 ++input_line_pointer;
4100
809ffe0d 4101 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 4102
4103 demand_empty_rest_of_line ();
4104}
4105
4106/* The .stabx pseudo-op. This is similar to a normal .stabs
4107 pseudo-op, but slightly different. A sample is
4108 .stabx "main:F-1",.main,142,0
4109 The first argument is the symbol name to create. The second is the
4110 value, and the third is the storage class. The fourth seems to be
4111 always zero, and I am assuming it is the type. */
4112
4113static void
98027b10 4114ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4115{
4116 char *name;
4117 int len;
4118 symbolS *sym;
4119 expressionS exp;
4120
4121 name = demand_copy_C_string (&len);
4122
4123 if (*input_line_pointer != ',')
4124 {
4125 as_bad (_("missing value"));
4126 return;
4127 }
4128 ++input_line_pointer;
4129
b34976b6 4130 ppc_stab_symbol = TRUE;
252b5132 4131 sym = symbol_make (name);
b34976b6 4132 ppc_stab_symbol = FALSE;
252b5132 4133
809ffe0d 4134 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 4135
4136 (void) expression (&exp);
4137
4138 switch (exp.X_op)
4139 {
4140 case O_illegal:
4141 case O_absent:
4142 case O_big:
4143 as_bad (_("illegal .stabx expression; zero assumed"));
4144 exp.X_add_number = 0;
4145 /* Fall through. */
4146 case O_constant:
4147 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 4148 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 4149 break;
4150
4151 case O_symbol:
4152 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 4153 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4154 else
4155 {
4156 S_SET_VALUE (sym,
4157 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 4158 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 4159 }
4160 break;
4161
4162 default:
4163 /* The value is some complex expression. This will probably
99a814a1
AM		 4164 fail at some later point, but this is probably the right
4165 thing to do here. */
809ffe0d 4166 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4167 break;
4168 }
4169
4170 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4171 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4172
4173 if (*input_line_pointer != ',')
4174 {
4175 as_bad (_("missing class"));
4176 return;
4177 }
4178 ++input_line_pointer;
4179
4180 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4181
4182 if (*input_line_pointer != ',')
4183 {
4184 as_bad (_("missing type"));
4185 return;
4186 }
4187 ++input_line_pointer;
4188
4189 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4190
809ffe0d 4191 symbol_get_tc (sym)->output = 1;
252b5132 4192
c734e7e3
TG		 4193 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4194 {
4195 /* In this case :
252b5132 4196
c734e7e3
TG		 4197 .bs name
4198 .stabx "z",arrays_,133,0
4199 .es
99a814a1 4200
c734e7e3 4201 .comm arrays_,13768,3
99a814a1 4202
c734e7e3
TG		 4203 resolve_symbol_value will copy the exp's "within" into sym's when the
4204 offset is 0. Since this seems to be corner case problem,
4205 only do the correction for storage class C_STSYM. A better solution
4206 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 4207
c734e7e3
TG		 4208 if (exp.X_op == O_symbol)
4209 {
4210 if (ppc_current_block == NULL)
4211 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 4212
c734e7e3
TG		 4213 symbol_get_tc (sym)->within = ppc_current_block;
4214 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4215 }
4216 }
99a814a1 4217
252b5132
RH		 4218 if (exp.X_op != O_symbol
4219 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4220 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4221 ppc_frob_label (sym);
4222 else
4223 {
4224 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4225 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4226 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4227 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4228 }
4229
4230 demand_empty_rest_of_line ();
4231}
4232
4233/* The .function pseudo-op. This takes several arguments. The first
4234 argument seems to be the external name of the symbol. The second
67c1ffbe 4235 argument seems to be the label for the start of the function. gcc
252b5132
RH		 4236 uses the same name for both. I have no idea what the third and
4237 fourth arguments are meant to be. The optional fifth argument is
4238 an expression for the size of the function. In COFF this symbol
4239 gets an aux entry like that used for a csect. */
4240
4241static void
98027b10 4242ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4243{
4244 char *name;
4245 char endc;
4246 char *s;
4247 symbolS *ext_sym;
4248 symbolS *lab_sym;
4249
4250 name = input_line_pointer;
4251 endc = get_symbol_end ();
4252
4253 /* Ignore any [PR] suffix. */
4254 name = ppc_canonicalize_symbol_name (name);
4255 s = strchr (name, '[');
4256 if (s != (char *) NULL
4257 && strcmp (s + 1, "PR]") == 0)
4258 *s = '\0';
4259
4260 ext_sym = symbol_find_or_make (name);
4261
4262 *input_line_pointer = endc;
4263
4264 if (*input_line_pointer != ',')
4265 {
4266 as_bad (_("missing symbol name"));
4267 ignore_rest_of_line ();
4268 return;
4269 }
4270 ++input_line_pointer;
4271
4272 name = input_line_pointer;
4273 endc = get_symbol_end ();
4274
4275 lab_sym = symbol_find_or_make (name);
4276
4277 *input_line_pointer = endc;
4278
4279 if (ext_sym != lab_sym)
4280 {
809ffe0d
ILT		 4281 expressionS exp;
4282
4283 exp.X_op = O_symbol;
4284 exp.X_add_symbol = lab_sym;
4285 exp.X_op_symbol = NULL;
4286 exp.X_add_number = 0;
4287 exp.X_unsigned = 0;
4288 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4289 }
4290
96d56e9f
NC		 4291 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4292 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4293 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4294
4295 if (*input_line_pointer == ',')
4296 {
91d6fa6a 4297 expressionS exp;
252b5132
RH		 4298
4299 /* Ignore the third argument. */
4300 ++input_line_pointer;
91d6fa6a 4301 expression (& exp);
252b5132
RH		 4302 if (*input_line_pointer == ',')
4303 {
4304 /* Ignore the fourth argument. */
4305 ++input_line_pointer;
91d6fa6a 4306 expression (& exp);
252b5132
RH		 4307 if (*input_line_pointer == ',')
4308 {
4309 /* The fifth argument is the function size. */
4310 ++input_line_pointer;
85645aed
TG		 4311 symbol_get_tc (ext_sym)->u.size = symbol_new
4312 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4313 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4314 }
4315 }
4316 }
4317
4318 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4319 SF_SET_FUNCTION (ext_sym);
4320 SF_SET_PROCESS (ext_sym);
4321 coff_add_linesym (ext_sym);
4322
4323 demand_empty_rest_of_line ();
4324}
4325
4326/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4327 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4328 with the correct line number */
5d6255fe 4329
8642cce8 4330static symbolS *saved_bi_sym = 0;
252b5132
RH		 4331
4332static void
98027b10 4333ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4334{
4335 symbolS *sym;
4336
4337 sym = symbol_make (".bf");
4338 S_SET_SEGMENT (sym, text_section);
809ffe0d 4339 symbol_set_frag (sym, frag_now);
252b5132
RH		 4340 S_SET_VALUE (sym, frag_now_fix ());
4341 S_SET_STORAGE_CLASS (sym, C_FCN);
4342
4343 coff_line_base = get_absolute_expression ();
4344
4345 S_SET_NUMBER_AUXILIARY (sym, 1);
4346 SA_SET_SYM_LNNO (sym, coff_line_base);
4347
8642cce8 4348 /* Line number for bi. */
5d6255fe 4349 if (saved_bi_sym)
8642cce8
TR		 4350 {
4351 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4352 saved_bi_sym = 0;
4353 }
5d6255fe 4354
8642cce8 4355
809ffe0d 4356 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4357
4358 ppc_frob_label (sym);
4359
4360 demand_empty_rest_of_line ();
4361}
4362
4363/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4364 ".ef", except that the line number is absolute, not relative to the
4365 most recent ".bf" symbol. */
4366
4367static void
98027b10 4368ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4369{
4370 symbolS *sym;
4371
4372 sym = symbol_make (".ef");
4373 S_SET_SEGMENT (sym, text_section);
809ffe0d 4374 symbol_set_frag (sym, frag_now);
252b5132
RH		 4375 S_SET_VALUE (sym, frag_now_fix ());
4376 S_SET_STORAGE_CLASS (sym, C_FCN);
4377 S_SET_NUMBER_AUXILIARY (sym, 1);
4378 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4379 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4380
4381 ppc_frob_label (sym);
4382
4383 demand_empty_rest_of_line ();
4384}
4385
4386/* The .bi and .ei pseudo-ops. These take a string argument and
4387 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4388 the symbol list. The value of .bi will be know when the next .bf
4389 is encountered. */
252b5132
RH		 4390
4391static void
98027b10 4392ppc_biei (int ei)
252b5132
RH		 4393{
4394 static symbolS *last_biei;
4395
4396 char *name;
4397 int len;
4398 symbolS *sym;
4399 symbolS *look;
4400
4401 name = demand_copy_C_string (&len);
4402
4403 /* The value of these symbols is actually file offset. Here we set
4404 the value to the index into the line number entries. In
4405 ppc_frob_symbols we set the fix_line field, which will cause BFD
4406 to do the right thing. */
4407
4408 sym = symbol_make (name);
4409 /* obj-coff.c currently only handles line numbers correctly in the
4410 .text section. */
4411 S_SET_SEGMENT (sym, text_section);
4412 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4413 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4414
4415 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4416 symbol_get_tc (sym)->output = 1;
81d4177b 4417
8642cce8 4418 /* Save bi. */
5d6255fe 4419 if (ei)
8642cce8
TR		 4420 saved_bi_sym = 0;
4421 else
4422 saved_bi_sym = sym;
4423
252b5132
RH		 4424 for (look = last_biei ? last_biei : symbol_rootP;
4425 (look != (symbolS *) NULL
4426 && (S_GET_STORAGE_CLASS (look) == C_FILE
4427 || S_GET_STORAGE_CLASS (look) == C_BINCL
4428 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4429 look = symbol_next (look))
4430 ;
4431 if (look != (symbolS *) NULL)
4432 {
4433 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4434 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4435 last_biei = sym;
4436 }
4437
4438 demand_empty_rest_of_line ();
4439}
4440
4441/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4442 There is one argument, which is a csect symbol. The value of the
4443 .bs symbol is the index of this csect symbol. */
4444
4445static void
98027b10 4446ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4447{
4448 char *name;
4449 char endc;
4450 symbolS *csect;
4451 symbolS *sym;
4452
4453 if (ppc_current_block != NULL)
4454 as_bad (_("nested .bs blocks"));
4455
4456 name = input_line_pointer;
4457 endc = get_symbol_end ();
4458
4459 csect = symbol_find_or_make (name);
4460
4461 *input_line_pointer = endc;
4462
4463 sym = symbol_make (".bs");
4464 S_SET_SEGMENT (sym, now_seg);
4465 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4466 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4467 symbol_get_tc (sym)->output = 1;
252b5132 4468
809ffe0d 4469 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4470
4471 ppc_frob_label (sym);
4472
4473 ppc_current_block = sym;
4474
4475 demand_empty_rest_of_line ();
4476}
4477
4478/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4479
4480static void
98027b10 4481ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4482{
4483 symbolS *sym;
4484
4485 if (ppc_current_block == NULL)
4486 as_bad (_(".es without preceding .bs"));
4487
4488 sym = symbol_make (".es");
4489 S_SET_SEGMENT (sym, now_seg);
4490 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4491 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4492 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4493
4494 ppc_frob_label (sym);
4495
4496 ppc_current_block = NULL;
4497
4498 demand_empty_rest_of_line ();
4499}
4500
4501/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4502 line number. */
4503
4504static void
98027b10 4505ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4506{
4507 symbolS *sym;
4508
4509 sym = symbol_make (".bb");
4510 S_SET_SEGMENT (sym, text_section);
809ffe0d 4511 symbol_set_frag (sym, frag_now);
252b5132
RH		 4512 S_SET_VALUE (sym, frag_now_fix ());
4513 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4514
4515 S_SET_NUMBER_AUXILIARY (sym, 1);
4516 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4517
809ffe0d 4518 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4519
4520 SF_SET_PROCESS (sym);
4521
4522 ppc_frob_label (sym);
4523
4524 demand_empty_rest_of_line ();
4525}
4526
4527/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4528 line number. */
4529
4530static void
98027b10 4531ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4532{
4533 symbolS *sym;
4534
4535 sym = symbol_make (".eb");
4536 S_SET_SEGMENT (sym, text_section);
809ffe0d 4537 symbol_set_frag (sym, frag_now);
252b5132
RH		 4538 S_SET_VALUE (sym, frag_now_fix ());
4539 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4540 S_SET_NUMBER_AUXILIARY (sym, 1);
4541 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4542 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4543
4544 SF_SET_PROCESS (sym);
4545
4546 ppc_frob_label (sym);
4547
4548 demand_empty_rest_of_line ();
4549}
4550
4551/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4552 specified name. */
4553
4554static void
98027b10 4555ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4556{
4557 char *name;
4558 int len;
4559 symbolS *sym;
4560
4561 name = demand_copy_C_string (&len);
4562 sym = symbol_make (name);
4563 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4564 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4565 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4566 S_SET_VALUE (sym, 0);
809ffe0d 4567 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4568
4569 ppc_frob_label (sym);
4570
4571 demand_empty_rest_of_line ();
4572}
4573
4574/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4575
4576static void
98027b10 4577ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4578{
4579 symbolS *sym;
4580
4581 sym = symbol_make (".ec");
4582 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4583 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4584 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4585 S_SET_VALUE (sym, 0);
809ffe0d 4586 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4587
4588 ppc_frob_label (sym);
4589
4590 demand_empty_rest_of_line ();
4591}
4592
4593/* The .toc pseudo-op. Switch to the .toc subsegment. */
4594
4595static void
98027b10 4596ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4597{
4598 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4599 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4600 else
4601 {
4602 subsegT subseg;
4603 symbolS *sym;
4604 symbolS *list;
81d4177b 4605
252b5132
RH		 4606 subseg = ppc_data_subsegment;
4607 ++ppc_data_subsegment;
4608
4609 subseg_new (segment_name (data_section), subseg);
4610 ppc_toc_frag = frag_now;
4611
4612 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4613 symbol_set_frag (sym, frag_now);
252b5132
RH		 4614 S_SET_SEGMENT (sym, data_section);
4615 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4616 symbol_get_tc (sym)->subseg = subseg;
4617 symbol_get_tc (sym)->output = 1;
4618 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4619
4620 ppc_toc_csect = sym;
81d4177b 4621
252b5132 4622 for (list = ppc_data_csects;
809ffe0d
ILT		 4623 symbol_get_tc (list)->next != (symbolS *) NULL;
4624 list = symbol_get_tc (list)->next)
252b5132 4625 ;
809ffe0d 4626 symbol_get_tc (list)->next = sym;
252b5132
RH		 4627
4628 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4629 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4630 &symbol_lastP);
252b5132
RH		 4631 }
4632
4633 ppc_current_csect = ppc_toc_csect;
4634
4635 demand_empty_rest_of_line ();
4636}
4637
4638/* The AIX assembler automatically aligns the operands of a .long or
4639 .short pseudo-op, and we want to be compatible. */
4640
4641static void
98027b10 4642ppc_xcoff_cons (int log_size)
252b5132
RH		 4643{
4644 frag_align (log_size, 0, 0);
4645 record_alignment (now_seg, log_size);
4646 cons (1 << log_size);
4647}
4648
4649static void
98027b10 4650ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4651{
4652 expressionS exp;
4653 int byte_count;
4654
4655 (void) expression (&exp);
4656
4657 if (exp.X_op != O_constant)
4658 {
4659 as_bad (_("non-constant byte count"));
4660 return;
4661 }
4662
4663 byte_count = exp.X_add_number;
4664
4665 if (*input_line_pointer != ',')
4666 {
4667 as_bad (_("missing value"));
4668 return;
4669 }
4670
4671 ++input_line_pointer;
4672 cons (byte_count);
4673}
4674
85645aed
TG		 4675void
4676ppc_xcoff_end (void)
4677{
4678 int i;
4679
4680 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4681 {
4682 struct dw_section *dws = &dw_sections[i];
4683 struct dw_subsection *dwss;
4684
4685 if (dws->anon_subseg)
4686 {
4687 dwss = dws->anon_subseg;
4688 dwss->link = dws->list_subseg;
4689 }
4690 else
4691 dwss = dws->list_subseg;
4692
4693 for (; dwss != NULL; dwss = dwss->link)
4694 if (dwss->end_exp.X_add_symbol != NULL)
4695 {
4696 subseg_set (dws->sect, dwss->subseg);
4697 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4698 }
4699 }
4700}
4701
252b5132 4702#endif /* OBJ_XCOFF */
0baf16f2 4703#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4704\f
4705/* The .tc pseudo-op. This is used when generating either XCOFF or
4706 ELF. This takes two or more arguments.
4707
4708 When generating XCOFF output, the first argument is the name to
4709 give to this location in the toc; this will be a symbol with class
0baf16f2 4710 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4711 this location in the TOC; often there is just one more argument, a
1049f94e 4712 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4713 depends on target word size. A 32-bit target uses 4-byte values, a
4714 64-bit target uses 8-byte values.
252b5132
RH		 4715
4716 When not generating XCOFF output, the arguments are the same, but
4717 the first argument is simply ignored. */
4718
4719static void
98027b10 4720ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4721{
4722#ifdef OBJ_XCOFF
4723
4724 /* Define the TOC symbol name. */
4725 {
4726 char *name;
4727 char endc;
4728 symbolS *sym;
4729
4730 if (ppc_toc_csect == (symbolS *) NULL
4731 || ppc_toc_csect != ppc_current_csect)
4732 {
4733 as_bad (_(".tc not in .toc section"));
4734 ignore_rest_of_line ();
4735 return;
4736 }
4737
4738 name = input_line_pointer;
4739 endc = get_symbol_end ();
4740
4741 sym = symbol_find_or_make (name);
4742
4743 *input_line_pointer = endc;
4744
4745 if (S_IS_DEFINED (sym))
4746 {
4747 symbolS *label;
4748
809ffe0d 4749 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4750 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4751 {
4752 as_bad (_(".tc with no label"));
4753 ignore_rest_of_line ();
4754 return;
4755 }
4756
4757 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4758 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4759 S_SET_VALUE (label, S_GET_VALUE (sym));
4760
4761 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4762 ++input_line_pointer;
4763
4764 return;
4765 }
4766
4767 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4768 symbol_set_frag (sym, frag_now);
252b5132 4769 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4770 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4771 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4772
4773 ppc_frob_label (sym);
4774 }
4775
0baf16f2
AM		 4776#endif /* OBJ_XCOFF */
4777#ifdef OBJ_ELF
9c7977b3 4778 int align;
252b5132
RH		 4779
4780 /* Skip the TOC symbol name. */
4781 while (is_part_of_name (*input_line_pointer)
d13d4015 4782 || *input_line_pointer == ' '
252b5132
RH		 4783 || *input_line_pointer == '['
4784 || *input_line_pointer == ']'
4785 || *input_line_pointer == '{'
4786 || *input_line_pointer == '}')
4787 ++input_line_pointer;
4788
0baf16f2 4789 /* Align to a four/eight byte boundary. */
2b3c4602 4790 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4791 frag_align (align, 0, 0);
4792 record_alignment (now_seg, align);
0baf16f2 4793#endif /* OBJ_ELF */
252b5132
RH		 4794
4795 if (*input_line_pointer != ',')
4796 demand_empty_rest_of_line ();
4797 else
4798 {
4799 ++input_line_pointer;
2b3c4602 4800 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4801 }
4802}
0baf16f2
AM		 4803
4804/* Pseudo-op .machine. */
0baf16f2
AM		 4805
4806static void
98027b10 4807ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4808{
69c040df
AM		 4809 char *cpu_string;
4810#define MAX_HISTORY 100
fa452fa6 4811 static ppc_cpu_t *cpu_history;
69c040df
AM		 4812 static int curr_hist;
4813
4814 SKIP_WHITESPACE ();
4815
4816 if (*input_line_pointer == '"')
4817 {
4818 int len;
4819 cpu_string = demand_copy_C_string (&len);
4820 }
4821 else
4822 {
4823 char c;
4824 cpu_string = input_line_pointer;
4825 c = get_symbol_end ();
4826 cpu_string = xstrdup (cpu_string);
4827 *input_line_pointer = c;
4828 }
4829
4830 if (cpu_string != NULL)
4831 {
fa452fa6 4832 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4833 ppc_cpu_t new_cpu;
69c040df
AM		 4834 char *p;
4835
4836 for (p = cpu_string; *p != 0; p++)
4837 *p = TOLOWER (*p);
4838
4839 if (strcmp (cpu_string, "push") == 0)
4840 {
4841 if (cpu_history == NULL)
4842 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4843
4844 if (curr_hist >= MAX_HISTORY)
4845 as_bad (_(".machine stack overflow"));
4846 else
4847 cpu_history[curr_hist++] = ppc_cpu;
4848 }
4849 else if (strcmp (cpu_string, "pop") == 0)
4850 {
4851 if (curr_hist <= 0)
4852 as_bad (_(".machine stack underflow"));
4853 else
4854 ppc_cpu = cpu_history[--curr_hist];
4855 }
776fc418 4856 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
69fe9ce5 4857 ppc_cpu = new_cpu;
69c040df
AM		 4858 else
4859 as_bad (_("invalid machine `%s'"), cpu_string);
4860
4861 if (ppc_cpu != old_cpu)
4862 ppc_setup_opcodes ();
4863 }
4864
4865 demand_empty_rest_of_line ();
0baf16f2 4866}
0baf16f2 4867#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4868\f
4869#ifdef TE_PE
4870
99a814a1 4871/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4872
4873/* Set the current section. */
4874static void
98027b10 4875ppc_set_current_section (segT new)
252b5132
RH		 4876{
4877 ppc_previous_section = ppc_current_section;
4878 ppc_current_section = new;
4879}
4880
4881/* pseudo-op: .previous
4882 behaviour: toggles the current section with the previous section.
4883 errors: None
99a814a1
AM		 4884 warnings: "No previous section" */
4885
252b5132 4886static void
98027b10 4887ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132 4888{
81d4177b 4889 if (ppc_previous_section == NULL)
252b5132 4890 {
d6ed37ed 4891 as_warn (_("no previous section to return to, ignored."));
252b5132
RH		 4892 return;
4893 }
4894
99a814a1 4895 subseg_set (ppc_previous_section, 0);
252b5132 4896
99a814a1 4897 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4898}
4899
4900/* pseudo-op: .pdata
4901 behaviour: predefined read only data section
b34976b6 4902 double word aligned
252b5132
RH		 4903 errors: None
4904 warnings: None
4905 initial: .section .pdata "adr3"
b34976b6 4906 a - don't know -- maybe a misprint
252b5132
RH		 4907 d - initialized data
4908 r - readable
4909 3 - double word aligned (that would be 4 byte boundary)
4910
4911 commentary:
4912 Tag index tables (also known as the function table) for exception
99a814a1 4913 handling, debugging, etc. */
252b5132 4914
252b5132 4915static void
98027b10 4916ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4917{
81d4177b 4918 if (pdata_section == 0)
252b5132
RH		 4919 {
4920 pdata_section = subseg_new (".pdata", 0);
81d4177b 4921
252b5132
RH		 4922 bfd_set_section_flags (stdoutput, pdata_section,
4923 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4924 | SEC_READONLY | SEC_DATA ));
81d4177b 4925
252b5132
RH		 4926 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4927 }
4928 else
4929 {
99a814a1 4930 pdata_section = subseg_new (".pdata", 0);
252b5132 4931 }
99a814a1 4932 ppc_set_current_section (pdata_section);
252b5132
RH		 4933}
4934
4935/* pseudo-op: .ydata
4936 behaviour: predefined read only data section
b34976b6 4937 double word aligned
252b5132
RH		 4938 errors: None
4939 warnings: None
4940 initial: .section .ydata "drw3"
b34976b6 4941 a - don't know -- maybe a misprint
252b5132
RH		 4942 d - initialized data
4943 r - readable
4944 3 - double word aligned (that would be 4 byte boundary)
4945 commentary:
4946 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4947 debugging, etc. */
4948
252b5132 4949static void
98027b10 4950ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4951{
81d4177b 4952 if (ydata_section == 0)
252b5132
RH		 4953 {
4954 ydata_section = subseg_new (".ydata", 0);
4955 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4956 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4957 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4958
4959 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4960 }
4961 else
4962 {
4963 ydata_section = subseg_new (".ydata", 0);
4964 }
99a814a1 4965 ppc_set_current_section (ydata_section);
252b5132
RH		 4966}
4967
4968/* pseudo-op: .reldata
4969 behaviour: predefined read write data section
b34976b6 4970 double word aligned (4-byte)
252b5132
RH		 4971 FIXME: relocation is applied to it
4972 FIXME: what's the difference between this and .data?
4973 errors: None
4974 warnings: None
4975 initial: .section .reldata "drw3"
4976 d - initialized data
4977 r - readable
4978 w - writeable
4979 3 - double word aligned (that would be 8 byte boundary)
4980
4981 commentary:
4982 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4983 function descriptors, etc. */
4984
252b5132 4985static void
98027b10 4986ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4987{
4988 if (reldata_section == 0)
4989 {
4990 reldata_section = subseg_new (".reldata", 0);
4991
4992 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4993 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4994 | SEC_DATA));
252b5132
RH		 4995
4996 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4997 }
4998 else
4999 {
5000 reldata_section = subseg_new (".reldata", 0);
5001 }
99a814a1 5002 ppc_set_current_section (reldata_section);
252b5132
RH		 5003}
5004
5005/* pseudo-op: .rdata
5006 behaviour: predefined read only data section
b34976b6 5007 double word aligned
252b5132
RH		 5008 errors: None
5009 warnings: None
5010 initial: .section .rdata "dr3"
5011 d - initialized data
5012 r - readable
99a814a1
AM		 5013 3 - double word aligned (that would be 4 byte boundary) */
5014
252b5132 5015static void
98027b10 5016ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5017{
5018 if (rdata_section == 0)
5019 {
5020 rdata_section = subseg_new (".rdata", 0);
5021 bfd_set_section_flags (stdoutput, rdata_section,
5022 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5023 | SEC_READONLY | SEC_DATA ));
5024
5025 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5026 }
5027 else
5028 {
5029 rdata_section = subseg_new (".rdata", 0);
5030 }
99a814a1 5031 ppc_set_current_section (rdata_section);
252b5132
RH		 5032}
5033
5034/* pseudo-op: .ualong
81d4177b 5035 behaviour: much like .int, with the exception that no alignment is
b34976b6 5036 performed.
252b5132
RH		 5037 FIXME: test the alignment statement
5038 errors: None
99a814a1
AM		 5039 warnings: None */
5040
252b5132 5041static void
98027b10 5042ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 5043{
99a814a1
AM		 5044 /* Try for long. */
5045 cons (4);
252b5132
RH		 5046}
5047
5048/* pseudo-op: .znop <symbol name>
5049 behaviour: Issue a nop instruction
b34976b6 5050 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 5051 the supplied symbol name.
5052 errors: None
99a814a1
AM		 5053 warnings: Missing symbol name */
5054
252b5132 5055static void
98027b10 5056ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5057{
5058 unsigned long insn;
5059 const struct powerpc_opcode *opcode;
252b5132 5060 char *f;
252b5132 5061 symbolS *sym;
252b5132
RH		 5062 char *symbol_name;
5063 char c;
5064 char *name;
252b5132 5065
99a814a1 5066 /* Strip out the symbol name. */
252b5132
RH		 5067 symbol_name = input_line_pointer;
5068 c = get_symbol_end ();
5069
5070 name = xmalloc (input_line_pointer - symbol_name + 1);
5071 strcpy (name, symbol_name);
5072
5073 sym = symbol_find_or_make (name);
5074
5075 *input_line_pointer = c;
5076
5077 SKIP_WHITESPACE ();
5078
5079 /* Look up the opcode in the hash table. */
5080 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5081
99a814a1 5082 /* Stick in the nop. */
252b5132
RH		 5083 insn = opcode->opcode;
5084
5085 /* Write out the instruction. */
5086 f = frag_more (4);
5087 md_number_to_chars (f, insn, 4);
5088 fix_new (frag_now,
5089 f - frag_now->fr_literal,
5090 4,
5091 sym,
5092 0,
5093 0,
5094 BFD_RELOC_16_GOT_PCREL);
5095
5096}
5097
81d4177b
KH		 5098/* pseudo-op:
5099 behaviour:
5100 errors:
99a814a1
AM		 5101 warnings: */
5102
252b5132 5103static void
98027b10 5104ppc_pe_comm (int lcomm)
252b5132 5105{
98027b10
AM		 5106 char *name;
5107 char c;
5108 char *p;
252b5132 5109 offsetT temp;
98027b10 5110 symbolS *symbolP;
252b5132
RH		 5111 offsetT align;
5112
5113 name = input_line_pointer;
5114 c = get_symbol_end ();
5115
99a814a1 5116 /* just after name is now '\0'. */
252b5132
RH		 5117 p = input_line_pointer;
5118 *p = c;
5119 SKIP_WHITESPACE ();
5120 if (*input_line_pointer != ',')
5121 {
d6ed37ed 5122 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 5123 ignore_rest_of_line ();
5124 return;
5125 }
5126
5127 input_line_pointer++; /* skip ',' */
5128 if ((temp = get_absolute_expression ()) < 0)
5129 {
5130 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5131 ignore_rest_of_line ();
5132 return;
5133 }
5134
5135 if (! lcomm)
5136 {
5137 /* The third argument to .comm is the alignment. */
5138 if (*input_line_pointer != ',')
5139 align = 3;
5140 else
5141 {
5142 ++input_line_pointer;
5143 align = get_absolute_expression ();
5144 if (align <= 0)
5145 {
5146 as_warn (_("ignoring bad alignment"));
5147 align = 3;
5148 }
5149 }
5150 }
5151
5152 *p = 0;
5153 symbolP = symbol_find_or_make (name);
5154
5155 *p = c;
5156 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5157 {
d6ed37ed 5158 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 5159 S_GET_NAME (symbolP));
5160 ignore_rest_of_line ();
5161 return;
5162 }
5163
5164 if (S_GET_VALUE (symbolP))
5165 {
5166 if (S_GET_VALUE (symbolP) != (valueT) temp)
d6ed37ed 5167 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 5168 S_GET_NAME (symbolP),
5169 (long) S_GET_VALUE (symbolP),
5170 (long) temp);
5171 }
5172 else
5173 {
5174 S_SET_VALUE (symbolP, (valueT) temp);
5175 S_SET_EXTERNAL (symbolP);
86ebace2 5176 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 5177 }
5178
5179 demand_empty_rest_of_line ();
5180}
5181
5182/*
5183 * implement the .section pseudo op:
5184 * .section name {, "flags"}
5185 * ^ ^
5186 * | +--- optional flags: 'b' for bss
5187 * | 'i' for info
5188 * +-- section name 'l' for lib
5189 * 'n' for noload
5190 * 'o' for over
5191 * 'w' for data
5192 * 'd' (apparently m88k for data)
5193 * 'x' for text
5194 * But if the argument is not a quoted string, treat it as a
5195 * subsegment number.
5196 *
5197 * FIXME: this is a copy of the section processing from obj-coff.c, with
5198 * additions/changes for the moto-pas assembler support. There are three
5199 * categories:
5200 *
81d4177b 5201 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 5202 * setting bits that bfd probably neither understands or uses. The
5203 * correct approach (?) will have to incorporate extra fields attached
5204 * to the section to hold the system specific stuff. (krk)
5205 *
5206 * Section Contents:
5207 * 'a' - unknown - referred to in documentation, but no definition supplied
5208 * 'c' - section has code
5209 * 'd' - section has initialized data
5210 * 'u' - section has uninitialized data
5211 * 'i' - section contains directives (info)
5212 * 'n' - section can be discarded
5213 * 'R' - remove section at link time
5214 *
5215 * Section Protection:
5216 * 'r' - section is readable
5217 * 'w' - section is writeable
5218 * 'x' - section is executable
5219 * 's' - section is sharable
5220 *
5221 * Section Alignment:
5222 * '0' - align to byte boundary
5223 * '1' - align to halfword undary
5224 * '2' - align to word boundary
5225 * '3' - align to doubleword boundary
5226 * '4' - align to quadword boundary
5227 * '5' - align to 32 byte boundary
5228 * '6' - align to 64 byte boundary
5229 *
5230 */
5231
5232void
98027b10 5233ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 5234{
99a814a1 5235 /* Strip out the section name. */
252b5132
RH		 5236 char *section_name;
5237 char c;
5238 char *name;
5239 unsigned int exp;
5240 flagword flags;
5241 segT sec;
5242 int align;
5243
5244 section_name = input_line_pointer;
5245 c = get_symbol_end ();
5246
5247 name = xmalloc (input_line_pointer - section_name + 1);
5248 strcpy (name, section_name);
5249
5250 *input_line_pointer = c;
5251
5252 SKIP_WHITESPACE ();
5253
5254 exp = 0;
5255 flags = SEC_NO_FLAGS;
5256
5257 if (strcmp (name, ".idata$2") == 0)
5258 {
5259 align = 0;
5260 }
5261 else if (strcmp (name, ".idata$3") == 0)
5262 {
5263 align = 0;
5264 }
5265 else if (strcmp (name, ".idata$4") == 0)
5266 {
5267 align = 2;
5268 }
5269 else if (strcmp (name, ".idata$5") == 0)
5270 {
5271 align = 2;
5272 }
5273 else if (strcmp (name, ".idata$6") == 0)
5274 {
5275 align = 1;
5276 }
5277 else
99a814a1
AM		 5278 /* Default alignment to 16 byte boundary. */
5279 align = 4;
252b5132
RH		 5280
5281 if (*input_line_pointer == ',')
5282 {
5283 ++input_line_pointer;
5284 SKIP_WHITESPACE ();
5285 if (*input_line_pointer != '"')
5286 exp = get_absolute_expression ();
5287 else
5288 {
5289 ++input_line_pointer;
5290 while (*input_line_pointer != '"'
5291 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5292 {
5293 switch (*input_line_pointer)
5294 {
5295 /* Section Contents */
5296 case 'a': /* unknown */
d6ed37ed 5297 as_bad (_("unsupported section attribute -- 'a'"));
252b5132
RH		 5298 break;
5299 case 'c': /* code section */
81d4177b 5300 flags |= SEC_CODE;
252b5132
RH		 5301 break;
5302 case 'd': /* section has initialized data */
5303 flags |= SEC_DATA;
5304 break;
5305 case 'u': /* section has uninitialized data */
5306 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5307 in winnt.h */
5308 flags |= SEC_ROM;
5309 break;
5310 case 'i': /* section contains directives (info) */
5311 /* FIXME: This is IMAGE_SCN_LNK_INFO
5312 in winnt.h */
5313 flags |= SEC_HAS_CONTENTS;
5314 break;
5315 case 'n': /* section can be discarded */
81d4177b 5316 flags &=~ SEC_LOAD;
252b5132
RH		 5317 break;
5318 case 'R': /* Remove section at link time */
5319 flags |= SEC_NEVER_LOAD;
5320 break;
8d452c78 5321#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5322 /* Section Protection */
5323 case 'r': /* section is readable */
5324 flags |= IMAGE_SCN_MEM_READ;
5325 break;
5326 case 'w': /* section is writeable */
5327 flags |= IMAGE_SCN_MEM_WRITE;
5328 break;
5329 case 'x': /* section is executable */
5330 flags |= IMAGE_SCN_MEM_EXECUTE;
5331 break;
5332 case 's': /* section is sharable */
5333 flags |= IMAGE_SCN_MEM_SHARED;
5334 break;
5335
5336 /* Section Alignment */
5337 case '0': /* align to byte boundary */
5338 flags |= IMAGE_SCN_ALIGN_1BYTES;
5339 align = 0;
5340 break;
5341 case '1': /* align to halfword boundary */
5342 flags |= IMAGE_SCN_ALIGN_2BYTES;
5343 align = 1;
5344 break;
5345 case '2': /* align to word boundary */
5346 flags |= IMAGE_SCN_ALIGN_4BYTES;
5347 align = 2;
5348 break;
5349 case '3': /* align to doubleword boundary */
5350 flags |= IMAGE_SCN_ALIGN_8BYTES;
5351 align = 3;
5352 break;
5353 case '4': /* align to quadword boundary */
5354 flags |= IMAGE_SCN_ALIGN_16BYTES;
5355 align = 4;
5356 break;
5357 case '5': /* align to 32 byte boundary */
5358 flags |= IMAGE_SCN_ALIGN_32BYTES;
5359 align = 5;
5360 break;
5361 case '6': /* align to 64 byte boundary */
5362 flags |= IMAGE_SCN_ALIGN_64BYTES;
5363 align = 6;
5364 break;
8d452c78 5365#endif
252b5132 5366 default:
99a814a1
AM		 5367 as_bad (_("unknown section attribute '%c'"),
5368 *input_line_pointer);
252b5132
RH		 5369 break;
5370 }
5371 ++input_line_pointer;
5372 }
5373 if (*input_line_pointer == '"')
5374 ++input_line_pointer;
5375 }
5376 }
5377
5378 sec = subseg_new (name, (subsegT) exp);
5379
99a814a1 5380 ppc_set_current_section (sec);
252b5132
RH		 5381
5382 if (flags != SEC_NO_FLAGS)
5383 {
5384 if (! bfd_set_section_flags (stdoutput, sec, flags))
5385 as_bad (_("error setting flags for \"%s\": %s"),
5386 bfd_section_name (stdoutput, sec),
5387 bfd_errmsg (bfd_get_error ()));
5388 }
5389
99a814a1 5390 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5391}
5392
5393static void
98027b10 5394ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5395{
5396 char *name;
5397 char endc;
5398 symbolS *ext_sym;
5399
5400 name = input_line_pointer;
5401 endc = get_symbol_end ();
5402
5403 ext_sym = symbol_find_or_make (name);
5404
5405 *input_line_pointer = endc;
5406
5407 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5408 SF_SET_FUNCTION (ext_sym);
5409 SF_SET_PROCESS (ext_sym);
5410 coff_add_linesym (ext_sym);
5411
5412 demand_empty_rest_of_line ();
5413}
5414
5415static void
98027b10 5416ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5417{
5418 if (tocdata_section == 0)
5419 {
5420 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5421 /* FIXME: section flags won't work. */
252b5132
RH		 5422 bfd_set_section_flags (stdoutput, tocdata_section,
5423 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5424 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5425
5426 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5427 }
5428 else
5429 {
5430 rdata_section = subseg_new (".tocd", 0);
5431 }
5432
99a814a1 5433 ppc_set_current_section (tocdata_section);
252b5132
RH		 5434
5435 demand_empty_rest_of_line ();
5436}
5437
5438/* Don't adjust TOC relocs to use the section symbol. */
5439
5440int
98027b10 5441ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5442{
5443 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5444}
5445
5446#endif
5447\f
5448#ifdef OBJ_XCOFF
5449
5450/* XCOFF specific symbol and file handling. */
5451
5452/* Canonicalize the symbol name. We use the to force the suffix, if
5453 any, to use square brackets, and to be in upper case. */
5454
5455char *
98027b10 5456ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5457{
5458 char *s;
5459
5460 if (ppc_stab_symbol)
5461 return name;
5462
5463 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5464 ;
5465 if (*s != '\0')
5466 {
5467 char brac;
5468
5469 if (*s == '[')
5470 brac = ']';
5471 else
5472 {
5473 *s = '[';
5474 brac = '}';
5475 }
5476
5477 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5478 *s = TOUPPER (*s);
252b5132
RH		 5479
5480 if (*s == '\0' || s[1] != '\0')
5481 as_bad (_("bad symbol suffix"));
5482
5483 *s = ']';
5484 }
5485
5486 return name;
5487}
5488
5489/* Set the class of a symbol based on the suffix, if any. This is
5490 called whenever a new symbol is created. */
5491
5492void
98027b10 5493ppc_symbol_new_hook (symbolS *sym)
252b5132 5494{
809ffe0d 5495 struct ppc_tc_sy *tc;
252b5132
RH		 5496 const char *s;
5497
809ffe0d
ILT		 5498 tc = symbol_get_tc (sym);
5499 tc->next = NULL;
5500 tc->output = 0;
96d56e9f 5501 tc->symbol_class = -1;
809ffe0d
ILT		 5502 tc->real_name = NULL;
5503 tc->subseg = 0;
5504 tc->align = 0;
85645aed
TG		 5505 tc->u.size = NULL;
5506 tc->u.dw = NULL;
809ffe0d 5507 tc->within = NULL;
252b5132
RH		 5508
5509 if (ppc_stab_symbol)
5510 return;
5511
5512 s = strchr (S_GET_NAME (sym), '[');
5513 if (s == (const char *) NULL)
5514 {
5515 /* There is no suffix. */
5516 return;
5517 }
5518
5519 ++s;
5520
5521 switch (s[0])
5522 {
5523 case 'B':
5524 if (strcmp (s, "BS]") == 0)
96d56e9f 5525 tc->symbol_class = XMC_BS;
252b5132
RH		 5526 break;
5527 case 'D':
5528 if (strcmp (s, "DB]") == 0)
96d56e9f 5529 tc->symbol_class = XMC_DB;
252b5132 5530 else if (strcmp (s, "DS]") == 0)
96d56e9f 5531 tc->symbol_class = XMC_DS;
252b5132
RH		 5532 break;
5533 case 'G':
5534 if (strcmp (s, "GL]") == 0)
96d56e9f 5535 tc->symbol_class = XMC_GL;
252b5132
RH		 5536 break;
5537 case 'P':
5538 if (strcmp (s, "PR]") == 0)
96d56e9f 5539 tc->symbol_class = XMC_PR;
252b5132
RH		 5540 break;
5541 case 'R':
5542 if (strcmp (s, "RO]") == 0)
96d56e9f 5543 tc->symbol_class = XMC_RO;
252b5132 5544 else if (strcmp (s, "RW]") == 0)
96d56e9f 5545 tc->symbol_class = XMC_RW;
252b5132
RH		 5546 break;
5547 case 'S':
5548 if (strcmp (s, "SV]") == 0)
96d56e9f 5549 tc->symbol_class = XMC_SV;
252b5132
RH		 5550 break;
5551 case 'T':
5552 if (strcmp (s, "TC]") == 0)
96d56e9f 5553 tc->symbol_class = XMC_TC;
252b5132 5554 else if (strcmp (s, "TI]") == 0)
96d56e9f 5555 tc->symbol_class = XMC_TI;
252b5132 5556 else if (strcmp (s, "TB]") == 0)
96d56e9f 5557 tc->symbol_class = XMC_TB;
252b5132 5558 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5559 tc->symbol_class = XMC_TC0;
252b5132
RH		 5560 break;
5561 case 'U':
5562 if (strcmp (s, "UA]") == 0)
96d56e9f 5563 tc->symbol_class = XMC_UA;
252b5132 5564 else if (strcmp (s, "UC]") == 0)
96d56e9f 5565 tc->symbol_class = XMC_UC;
252b5132
RH		 5566 break;
5567 case 'X':
5568 if (strcmp (s, "XO]") == 0)
96d56e9f 5569 tc->symbol_class = XMC_XO;
252b5132
RH		 5570 break;
5571 }
5572
96d56e9f 5573 if (tc->symbol_class == -1)
d6ed37ed 5574 as_bad (_("unrecognized symbol suffix"));
252b5132
RH		 5575}
5576
5577/* Set the class of a label based on where it is defined. This
5578 handles symbols without suffixes. Also, move the symbol so that it
5579 follows the csect symbol. */
5580
5581void
98027b10 5582ppc_frob_label (symbolS *sym)
252b5132
RH		 5583{
5584 if (ppc_current_csect != (symbolS *) NULL)
5585 {
96d56e9f
NC		 5586 if (symbol_get_tc (sym)->symbol_class == -1)
5587 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5588
5589 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5590 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5591 &symbol_rootP, &symbol_lastP);
5592 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5593 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5594 }
07a53e5c
RH		 5595
5596#ifdef OBJ_ELF
5597 dwarf2_emit_label (sym);
5598#endif
252b5132
RH		 5599}
5600
5601/* This variable is set by ppc_frob_symbol if any absolute symbols are
5602 seen. It tells ppc_adjust_symtab whether it needs to look through
5603 the symbols. */
5604
b34976b6 5605static bfd_boolean ppc_saw_abs;
252b5132
RH		 5606
5607/* Change the name of a symbol just before writing it out. Set the
5608 real name if the .rename pseudo-op was used. Otherwise, remove any
5609 class suffix. Return 1 if the symbol should not be included in the
5610 symbol table. */
5611
5612int
98027b10 5613ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5614{
5615 static symbolS *ppc_last_function;
5616 static symbolS *set_end;
5617
5618 /* Discard symbols that should not be included in the output symbol
5619 table. */
809ffe0d
ILT		 5620 if (! symbol_used_in_reloc_p (sym)
5621 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5622 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5623 && ! symbol_get_tc (sym)->output
252b5132
RH		 5624 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5625 return 1;
5626
a161fe53
AM		 5627 /* This one will disappear anyway. Don't make a csect sym for it. */
5628 if (sym == abs_section_sym)
5629 return 1;
5630
809ffe0d
ILT		 5631 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5632 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5633 else
5634 {
5635 const char *name;
5636 const char *s;
5637
5638 name = S_GET_NAME (sym);
5639 s = strchr (name, '[');
5640 if (s != (char *) NULL)
5641 {
5642 unsigned int len;
5643 char *snew;
5644
5645 len = s - name;
5646 snew = xmalloc (len + 1);
5647 memcpy (snew, name, len);
5648 snew[len] = '\0';
5649
5650 S_SET_NAME (sym, snew);
5651 }
5652 }
5653
5654 if (set_end != (symbolS *) NULL)
5655 {
5656 SA_SET_SYM_ENDNDX (set_end, sym);
5657 set_end = NULL;
5658 }
5659
5660 if (SF_GET_FUNCTION (sym))
5661 {
5662 if (ppc_last_function != (symbolS *) NULL)
5663 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5664 ppc_last_function = sym;
85645aed 5665 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5666 {
85645aed 5667 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5668 SA_SET_SYM_FSIZE (sym,
85645aed 5669 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5670 }
5671 }
5672 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5673 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5674 {
5675 if (ppc_last_function == (symbolS *) NULL)
5676 as_bad (_(".ef with no preceding .function"));
5677 else
5678 {
5679 set_end = ppc_last_function;
5680 ppc_last_function = NULL;
5681
5682 /* We don't have a C_EFCN symbol, but we need to force the
5683 COFF backend to believe that it has seen one. */
5684 coff_last_function = NULL;
5685 }
5686 }
5687
670ec21d 5688 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5689 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5690 && S_GET_STORAGE_CLASS (sym) != C_FILE
5691 && S_GET_STORAGE_CLASS (sym) != C_FCN
5692 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5693 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5694 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5695 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5696 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5697 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5698 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5699
5700 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5701 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5702 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5703 {
5704 int i;
5705 union internal_auxent *a;
5706
5707 /* Create a csect aux. */
5708 i = S_GET_NUMBER_AUXILIARY (sym);
5709 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5710 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5711 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5712 {
5713 /* This is the TOC table. */
5714 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5715 a->x_csect.x_scnlen.l = 0;
5716 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5717 }
809ffe0d 5718 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5719 {
5720 /* This is a csect symbol. x_scnlen is the size of the
5721 csect. */
809ffe0d 5722 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5723 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5724 S_GET_SEGMENT (sym))
5725 - S_GET_VALUE (sym));
5726 else
5727 {
6386f3a7 5728 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5729 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5730 - S_GET_VALUE (sym));
5731 }
809ffe0d 5732 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5733 }
5734 else if (S_GET_SEGMENT (sym) == bss_section)
5735 {
5736 /* This is a common symbol. */
809ffe0d
ILT		 5737 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5738 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5739 if (S_IS_EXTERNAL (sym))
96d56e9f 5740 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5741 else
96d56e9f 5742 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5743 }
5744 else if (S_GET_SEGMENT (sym) == absolute_section)
5745 {
5746 /* This is an absolute symbol. The csect will be created by
99a814a1 5747 ppc_adjust_symtab. */
b34976b6 5748 ppc_saw_abs = TRUE;
252b5132 5749 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5750 if (symbol_get_tc (sym)->symbol_class == -1)
5751 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5752 }
5753 else if (! S_IS_DEFINED (sym))
5754 {
5755 /* This is an external symbol. */
5756 a->x_csect.x_scnlen.l = 0;
5757 a->x_csect.x_smtyp = XTY_ER;
5758 }
96d56e9f 5759 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5760 {
5761 symbolS *next;
5762
5763 /* This is a TOC definition. x_scnlen is the size of the
5764 TOC entry. */
5765 next = symbol_next (sym);
96d56e9f 5766 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5767 next = symbol_next (next);
5768 if (next == (symbolS *) NULL
96d56e9f 5769 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5770 {
5771 if (ppc_after_toc_frag == (fragS *) NULL)
5772 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5773 data_section)
5774 - S_GET_VALUE (sym));
5775 else
5776 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5777 - S_GET_VALUE (sym));
5778 }
5779 else
5780 {
6386f3a7 5781 resolve_symbol_value (next);
252b5132
RH		 5782 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5783 - S_GET_VALUE (sym));
5784 }
5785 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5786 }
5787 else
5788 {
5789 symbolS *csect;
5790
5791 /* This is a normal symbol definition. x_scnlen is the
5792 symbol index of the containing csect. */
5793 if (S_GET_SEGMENT (sym) == text_section)
5794 csect = ppc_text_csects;
5795 else if (S_GET_SEGMENT (sym) == data_section)
5796 csect = ppc_data_csects;
5797 else
5798 abort ();
5799
5800 /* Skip the initial dummy symbol. */
809ffe0d 5801 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5802
5803 if (csect == (symbolS *) NULL)
5804 {
5805 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5806 a->x_csect.x_scnlen.l = 0;
5807 }
5808 else
5809 {
809ffe0d 5810 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5811 {
6386f3a7 5812 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5813 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5814 > S_GET_VALUE (sym))
252b5132 5815 break;
809ffe0d 5816 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5817 }
5818
809ffe0d
ILT		 5819 a->x_csect.x_scnlen.p =
5820 coffsymbol (symbol_get_bfdsym (csect))->native;
5821 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5822 1;
252b5132
RH		 5823 }
5824 a->x_csect.x_smtyp = XTY_LD;
5825 }
81d4177b 5826
252b5132
RH		 5827 a->x_csect.x_parmhash = 0;
5828 a->x_csect.x_snhash = 0;
96d56e9f 5829 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5830 a->x_csect.x_smclas = XMC_PR;
5831 else
96d56e9f 5832 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5833 a->x_csect.x_stab = 0;
5834 a->x_csect.x_snstab = 0;
5835
5836 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5837 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5838 }
5839 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5840 {
5841 /* We want the value to be the symbol index of the referenced
5842 csect symbol. BFD will do that for us if we set the right
5843 flags. */
b782de16
AM		 5844 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5845 combined_entry_type *c = coffsymbol (bsym)->native;
5846
5847 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5848 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5849 }
5850 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5851 {
5852 symbolS *block;
c734e7e3 5853 valueT base;
252b5132 5854
809ffe0d 5855 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5856 if (block)
5857 {
5858 /* The value is the offset from the enclosing csect. */
5859 symbolS *csect;
5860
5861 csect = symbol_get_tc (block)->within;
5862 resolve_symbol_value (csect);
5863 base = S_GET_VALUE (csect);
5864 }
5865 else
5866 base = 0;
5867
5868 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 5869 }
5870 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5871 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5872 {
5873 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5874 BFD will do that for us if we set the right flags. We have
5875 already set the value correctly. */
809ffe0d 5876 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5877 }
5878
5879 return 0;
5880}
5881
5882/* Adjust the symbol table. This creates csect symbols for all
5883 absolute symbols. */
5884
5885void
98027b10 5886ppc_adjust_symtab (void)
252b5132
RH		 5887{
5888 symbolS *sym;
5889
5890 if (! ppc_saw_abs)
5891 return;
5892
5893 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5894 {
5895 symbolS *csect;
5896 int i;
5897 union internal_auxent *a;
5898
5899 if (S_GET_SEGMENT (sym) != absolute_section)
5900 continue;
5901
5902 csect = symbol_create (".abs[XO]", absolute_section,
5903 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5904 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5905 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5906 i = S_GET_NUMBER_AUXILIARY (csect);
5907 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5908 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5909 a->x_csect.x_scnlen.l = 0;
5910 a->x_csect.x_smtyp = XTY_SD;
5911 a->x_csect.x_parmhash = 0;
5912 a->x_csect.x_snhash = 0;
5913 a->x_csect.x_smclas = XMC_XO;
5914 a->x_csect.x_stab = 0;
5915 a->x_csect.x_snstab = 0;
5916
5917 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5918
5919 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5920 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5921 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5922 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5923 }
5924
b34976b6 5925 ppc_saw_abs = FALSE;
252b5132
RH		 5926}
5927
5928/* Set the VMA for a section. This is called on all the sections in
5929 turn. */
5930
5931void
98027b10 5932ppc_frob_section (asection *sec)
252b5132 5933{
931e13a6 5934 static bfd_vma vma = 0;
252b5132 5935
85645aed
TG		 5936 /* Dwarf sections start at 0. */
5937 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
5938 return;
5939
931e13a6 5940 vma = md_section_align (sec, vma);
252b5132
RH		 5941 bfd_set_section_vma (stdoutput, sec, vma);
5942 vma += bfd_section_size (stdoutput, sec);
5943}
5944
5945#endif /* OBJ_XCOFF */
5946\f
252b5132 5947char *
98027b10 5948md_atof (int type, char *litp, int *sizep)
252b5132 5949{
499ac353 5950 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5951}
5952
5953/* Write a value out to the object file, using the appropriate
5954 endianness. */
5955
5956void
98027b10 5957md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5958{
5959 if (target_big_endian)
5960 number_to_chars_bigendian (buf, val, n);
5961 else
5962 number_to_chars_littleendian (buf, val, n);
5963}
5964
5965/* Align a section (I don't know why this is machine dependent). */
5966
5967valueT
3aeeedbb 5968md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5969{
3aeeedbb
AM		 5970#ifdef OBJ_ELF
5971 return addr;
5972#else
252b5132
RH		 5973 int align = bfd_get_section_alignment (stdoutput, seg);
5974
5975 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5976#endif
252b5132
RH		 5977}
5978
5979/* We don't have any form of relaxing. */
5980
5981int
98027b10
AM		 5982md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5983 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5984{
5985 abort ();
5986 return 0;
5987}
5988
5989/* Convert a machine dependent frag. We never generate these. */
5990
5991void
98027b10
AM		 5992md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5993 asection *sec ATTRIBUTE_UNUSED,
5994 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5995{
5996 abort ();
5997}
5998
5999/* We have no need to default values of symbols. */
6000
252b5132 6001symbolS *
98027b10 6002md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 6003{
6004 return 0;
6005}
6006\f
6007/* Functions concerning relocs. */
6008
6009/* The location from which a PC relative jump should be calculated,
6010 given a PC relative reloc. */
6011
6012long
98027b10 6013md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 6014{
6015 return fixp->fx_frag->fr_address + fixp->fx_where;
6016}
6017
6018#ifdef OBJ_XCOFF
6019
6020/* This is called to see whether a fixup should be adjusted to use a
6021 section symbol. We take the opportunity to change a fixup against
6022 a symbol in the TOC subsegment into a reloc against the
6023 corresponding .tc symbol. */
6024
6025int
98027b10 6026ppc_fix_adjustable (fixS *fix)
252b5132 6027{
b782de16
AM		 6028 valueT val = resolve_symbol_value (fix->fx_addsy);
6029 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6030 TC_SYMFIELD_TYPE *tc;
6031
6032 if (symseg == absolute_section)
6033 return 0;
252b5132 6034
85645aed
TG		 6035 /* Always adjust symbols in debugging sections. */
6036 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6037 return 1;
6038
252b5132 6039 if (ppc_toc_csect != (symbolS *) NULL
252b5132 6040 && fix->fx_addsy != ppc_toc_csect
b782de16 6041 && symseg == data_section
252b5132
RH		 6042 && val >= ppc_toc_frag->fr_address
6043 && (ppc_after_toc_frag == (fragS *) NULL
6044 || val < ppc_after_toc_frag->fr_address))
6045 {
6046 symbolS *sy;
6047
6048 for (sy = symbol_next (ppc_toc_csect);
6049 sy != (symbolS *) NULL;
6050 sy = symbol_next (sy))
6051 {
b782de16
AM		 6052 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6053
96d56e9f 6054 if (sy_tc->symbol_class == XMC_TC0)
252b5132 6055 continue;
96d56e9f 6056 if (sy_tc->symbol_class != XMC_TC)
252b5132 6057 break;
b782de16 6058 if (val == resolve_symbol_value (sy))
252b5132
RH		 6059 {
6060 fix->fx_addsy = sy;
6061 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6062 return 0;
6063 }
6064 }
6065
6066 as_bad_where (fix->fx_file, fix->fx_line,
6067 _("symbol in .toc does not match any .tc"));
6068 }
6069
6070 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 6071 tc = symbol_get_tc (fix->fx_addsy);
6072 if (tc->subseg == 0
96d56e9f
NC		 6073 && tc->symbol_class != XMC_TC0
6074 && tc->symbol_class != XMC_TC
b782de16 6075 && symseg != bss_section
252b5132 6076 /* Don't adjust if this is a reloc in the toc section. */
b782de16 6077 && (symseg != data_section
252b5132
RH		 6078 || ppc_toc_csect == NULL
6079 || val < ppc_toc_frag->fr_address
6080 || (ppc_after_toc_frag != NULL
6081 && val >= ppc_after_toc_frag->fr_address)))
6082 {
2fb4b302 6083 symbolS *csect = tc->within;
252b5132 6084
2fb4b302
TG		 6085 /* If the symbol was not declared by a label (eg: a section symbol),
6086 use the section instead of the csect. This doesn't happen in
6087 normal AIX assembly code. */
6088 if (csect == NULL)
6089 csect = seg_info (symseg)->sym;
252b5132 6090
2fb4b302
TG		 6091 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6092 fix->fx_addsy = csect;
252b5132 6093
b782de16 6094 return 0;
252b5132
RH		 6095 }
6096
6097 /* Adjust a reloc against a .lcomm symbol to be against the base
6098 .lcomm. */
b782de16 6099 if (symseg == bss_section
252b5132
RH		 6100 && ! S_IS_EXTERNAL (fix->fx_addsy))
6101 {
b782de16
AM		 6102 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6103
6104 fix->fx_offset += val - resolve_symbol_value (sy);
6105 fix->fx_addsy = sy;
252b5132
RH		 6106 }
6107
6108 return 0;
6109}
6110
6111/* A reloc from one csect to another must be kept. The assembler
6112 will, of course, keep relocs between sections, and it will keep
6113 absolute relocs, but we need to force it to keep PC relative relocs
6114 between two csects in the same section. */
6115
6116int
98027b10 6117ppc_force_relocation (fixS *fix)
252b5132
RH		 6118{
6119 /* At this point fix->fx_addsy should already have been converted to
6120 a csect symbol. If the csect does not include the fragment, then
6121 we need to force the relocation. */
6122 if (fix->fx_pcrel
6123 && fix->fx_addsy != NULL
809ffe0d
ILT		 6124 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6125 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6126 > fix->fx_frag->fr_address)
6127 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6128 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 6129 <= fix->fx_frag->fr_address))))
6130 return 1;
6131
ae6063d4 6132 return generic_force_reloc (fix);
252b5132
RH		 6133}
6134
2fb4b302
TG		 6135void
6136ppc_new_dot_label (symbolS *sym)
6137{
6138 /* Anchor this label to the current csect for relocations. */
6139 symbol_get_tc (sym)->within = ppc_current_csect;
6140}
6141
252b5132
RH		 6142#endif /* OBJ_XCOFF */
6143
0baf16f2 6144#ifdef OBJ_ELF
a161fe53
AM		 6145/* If this function returns non-zero, it guarantees that a relocation
6146 will be emitted for a fixup. */
6147
6148int
98027b10 6149ppc_force_relocation (fixS *fix)
a161fe53
AM		 6150{
6151 /* Branch prediction relocations must force a relocation, as must
6152 the vtable description relocs. */
6153 switch (fix->fx_r_type)
6154 {
6155 case BFD_RELOC_PPC_B16_BRTAKEN:
6156 case BFD_RELOC_PPC_B16_BRNTAKEN:
6157 case BFD_RELOC_PPC_BA16_BRTAKEN:
6158 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 6159 case BFD_RELOC_24_PLT_PCREL:
a161fe53 6160 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 6161 return 1;
6162 default:
6163 break;
6164 }
6165
cdba85ec
AM		 6166 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6167 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6168 return 1;
6169
ae6063d4 6170 return generic_force_reloc (fix);
a161fe53
AM		 6171}
6172
0baf16f2 6173int
98027b10 6174ppc_fix_adjustable (fixS *fix)
252b5132 6175{
0baf16f2
AM		 6176 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6177 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6178 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6179 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 6180 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6181 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 6182 && fix->fx_r_type != BFD_RELOC_GPREL16
6183 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6184 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 6185 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 6186 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 6187}
0baf16f2 6188#endif
252b5132 6189
b9c361e0
JL		 6190void
6191ppc_frag_check (struct frag *fragP)
6192{
6193 if (!fragP->has_code)
6194 return;
6195
6196 if (ppc_mach() == bfd_mach_ppc_vle)
6197 {
6198 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6199 as_bad (_("instruction address is not a multiple of 2"));
6200 }
6201 else
6202 {
6203 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6204 as_bad (_("instruction address is not a multiple of 4"));
6205 }
6206}
6207
3aeeedbb
AM		 6208/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6209 rs_align_code frag. */
6210
6211void
6212ppc_handle_align (struct frag *fragP)
6213{
6214 valueT count = (fragP->fr_next->fr_address
6215 - (fragP->fr_address + fragP->fr_fix));
6216
b9c361e0
JL		 6217 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6218 {
6219 char *dest = fragP->fr_literal + fragP->fr_fix;
6220
6221 fragP->fr_var = 2;
6222 md_number_to_chars (dest, 0x4400, 2);
6223 }
6224 else if (count != 0 && (count & 3) == 0)
3aeeedbb
AM		 6225 {
6226 char *dest = fragP->fr_literal + fragP->fr_fix;
6227
6228 fragP->fr_var = 4;
cef4f754
AM		 6229
6230 if (count > 4 * nop_limit && count < 0x2000000)
6231 {
6232 struct frag *rest;
6233
6234 /* Make a branch, then follow with nops. Insert another
6235 frag to handle the nops. */
6236 md_number_to_chars (dest, 0x48000000 + count, 4);
6237 count -= 4;
6238 if (count == 0)
6239 return;
6240
6241 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6242 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6243 fragP->fr_next = rest;
6244 fragP = rest;
6245 rest->fr_address += rest->fr_fix + 4;
6246 rest->fr_fix = 0;
6247 /* If we leave the next frag as rs_align_code we'll come here
6248 again, resulting in a bunch of branches rather than a
6249 branch followed by nops. */
6250 rest->fr_type = rs_align;
6251 dest = rest->fr_literal;
6252 }
6253
3aeeedbb
AM		 6254 md_number_to_chars (dest, 0x60000000, 4);
6255
42240548 6256 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5817ffd1
PB		 6257 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6258 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
3aeeedbb 6259 {
5817ffd1 6260 /* For power6, power7 and power8, we want the last nop to be a group
42240548
PB		 6261 terminating one. Do this by inserting an rs_fill frag immediately
6262 after this one, with its address set to the last nop location.
6263 This will automatically reduce the number of nops in the current
6264 frag by one. */
3aeeedbb
AM		 6265 if (count > 4)
6266 {
6267 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6268
6269 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6270 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6271 group_nop->fr_fix = 0;
6272 group_nop->fr_offset = 1;
6273 group_nop->fr_type = rs_fill;
6274 fragP->fr_next = group_nop;
6275 dest = group_nop->fr_literal;
6276 }
6277
5817ffd1
PB		 6278 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6279 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
aea77599
AM		 6280 {
6281 if (ppc_cpu & PPC_OPCODE_E500MC)
6282 /* e500mc group terminating nop: "ori 0,0,0". */
6283 md_number_to_chars (dest, 0x60000000, 4);
6284 else
5817ffd1 6285 /* power7/power8 group terminating nop: "ori 2,2,0". */
aea77599
AM		 6286 md_number_to_chars (dest, 0x60420000, 4);
6287 }
42240548
PB		 6288 else
6289 /* power6 group terminating nop: "ori 1,1,0". */
6290 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6291 }
6292 }
6293}
6294
252b5132 6295/* Apply a fixup to the object code. This is called for all the
3b8b57a9 6296 fixups we generated by the calls to fix_new_exp, above. */
252b5132 6297
94f592af 6298void
98027b10 6299md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 6300{
94f592af 6301 valueT value = * valP;
5656a981
AM		 6302 offsetT fieldval;
6303 const struct powerpc_operand *operand;
252b5132
RH		 6304
6305#ifdef OBJ_ELF
94f592af 6306 if (fixP->fx_addsy != NULL)
252b5132 6307 {
a161fe53 6308 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6309 if (fixP->fx_pcrel)
6310 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 6311 }
6312 else
94f592af 6313 fixP->fx_done = 1;
252b5132 6314#else
a161fe53 6315 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6316 the symbol values. If we are doing this relocation the code in
6317 write.c is going to call bfd_install_relocation, which is also
6318 going to use the symbol value. That means that if the reloc is
6319 fully resolved we want to use *valP since bfd_install_relocation is
6320 not being used.
9f0eb232
RS		 6321 However, if the reloc is not fully resolved we do not want to
6322 use *valP, and must use fx_offset instead. If the relocation
6323 is PC-relative, we then need to re-apply md_pcrel_from_section
6324 to this new relocation value. */
94f592af
NC		 6325 if (fixP->fx_addsy == (symbolS *) NULL)
6326 fixP->fx_done = 1;
6327
252b5132 6328 else
9f0eb232
RS		 6329 {
6330 value = fixP->fx_offset;
6331 if (fixP->fx_pcrel)
6332 value -= md_pcrel_from_section (fixP, seg);
6333 }
a161fe53
AM		 6334#endif
6335
6336 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6337 {
a161fe53
AM		 6338 /* We can't actually support subtracting a symbol. */
6339 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6340 }
252b5132 6341
5656a981 6342 operand = NULL;
3b8b57a9 6343 if (fixP->fx_pcrel_adjust != 0)
252b5132 6344 {
5656a981 6345 /* This is a fixup on an instruction. */
3b8b57a9 6346 int opindex = fixP->fx_pcrel_adjust & 0xff;
252b5132 6347
5656a981 6348 operand = &powerpc_operands[opindex];
252b5132 6349#ifdef OBJ_XCOFF
0baf16f2
AM		 6350 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6351 does not generate a reloc. It uses the offset of `sym' within its
6352 csect. Other usages, such as `.long sym', generate relocs. This
6353 is the documented behaviour of non-TOC symbols. */
252b5132 6354 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6355 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6356 && operand->shift == 0
2b3c4602 6357 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6358 && fixP->fx_addsy != NULL
6359 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6360 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6361 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6362 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6363 {
94f592af
NC		 6364 value = fixP->fx_offset;
6365 fixP->fx_done = 1;
252b5132 6366 }
ac21e7da
TG		 6367
6368 /* During parsing of instructions, a TOC16 reloc is generated for
6369 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6370 in the toc. But at parse time, SYM may be not yet defined, so
6371 check again here. */
6372 if (fixP->fx_r_type == BFD_RELOC_16
6373 && fixP->fx_addsy != NULL
6374 && ppc_is_toc_sym (fixP->fx_addsy))
6375 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
252b5132 6376#endif
5656a981
AM		 6377 }
6378
6379 /* Calculate value to be stored in field. */
6380 fieldval = value;
6381 switch (fixP->fx_r_type)
6382 {
1ec2d25e 6383#ifdef OBJ_ELF
5656a981
AM		 6384 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6385 case BFD_RELOC_PPC_VLE_LO16A:
6386 case BFD_RELOC_PPC_VLE_LO16D:
1ec2d25e 6387#endif
5656a981
AM		 6388 case BFD_RELOC_LO16:
6389 case BFD_RELOC_LO16_PCREL:
6390 fieldval = value & 0xffff;
6391 sign_extend_16:
6392 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6393 fieldval = (fieldval ^ 0x8000) - 0x8000;
6394 fixP->fx_no_overflow = 1;
6395 break;
3c9d25f4 6396
5656a981
AM		 6397#ifdef OBJ_ELF
6398 case BFD_RELOC_PPC_VLE_HI16A:
6399 case BFD_RELOC_PPC_VLE_HI16D:
6400#endif
6401 case BFD_RELOC_HI16:
6402 case BFD_RELOC_HI16_PCREL:
6403 fieldval = PPC_HI (value);
6404 goto sign_extend_16;
0baf16f2 6405
5656a981
AM		 6406#ifdef OBJ_ELF
6407 case BFD_RELOC_PPC_VLE_HA16A:
6408 case BFD_RELOC_PPC_VLE_HA16D:
6409#endif
6410 case BFD_RELOC_HI16_S:
6411 case BFD_RELOC_HI16_S_PCREL:
6412 fieldval = PPC_HA (value);
6413 goto sign_extend_16;
0baf16f2 6414
3b8b57a9 6415#ifdef OBJ_ELF
5656a981
AM		 6416 case BFD_RELOC_PPC64_HIGHER:
6417 fieldval = PPC_HIGHER (value);
6418 goto sign_extend_16;
252b5132 6419
5656a981
AM		 6420 case BFD_RELOC_PPC64_HIGHER_S:
6421 fieldval = PPC_HIGHERA (value);
6422 goto sign_extend_16;
0baf16f2 6423
5656a981
AM		 6424 case BFD_RELOC_PPC64_HIGHEST:
6425 fieldval = PPC_HIGHEST (value);
6426 goto sign_extend_16;
0baf16f2 6427
5656a981
AM		 6428 case BFD_RELOC_PPC64_HIGHEST_S:
6429 fieldval = PPC_HIGHESTA (value);
6430 goto sign_extend_16;
6431#endif
6432
6433 default:
6434 break;
6435 }
6436
6437 if (operand != NULL)
6438 {
6439 /* Handle relocs in an insn. */
6440 char *where;
6441 unsigned long insn;
0baf16f2 6442
5656a981
AM		 6443 switch (fixP->fx_r_type)
6444 {
7fa9fcb6 6445#ifdef OBJ_ELF
3b8b57a9
AM		 6446 /* The following relocs can't be calculated by the assembler.
6447 Leave the field zero. */
cdba85ec
AM		 6448 case BFD_RELOC_PPC_TPREL16:
6449 case BFD_RELOC_PPC_TPREL16_LO:
6450 case BFD_RELOC_PPC_TPREL16_HI:
6451 case BFD_RELOC_PPC_TPREL16_HA:
cdba85ec
AM		 6452 case BFD_RELOC_PPC_DTPREL16:
6453 case BFD_RELOC_PPC_DTPREL16_LO:
6454 case BFD_RELOC_PPC_DTPREL16_HI:
6455 case BFD_RELOC_PPC_DTPREL16_HA:
cdba85ec
AM		 6456 case BFD_RELOC_PPC_GOT_TLSGD16:
6457 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6458 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6459 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6460 case BFD_RELOC_PPC_GOT_TLSLD16:
6461 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6462 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6463 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6464 case BFD_RELOC_PPC_GOT_TPREL16:
6465 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6466 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6467 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6468 case BFD_RELOC_PPC_GOT_DTPREL16:
6469 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6470 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6471 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6472 case BFD_RELOC_PPC64_TPREL16_DS:
6473 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6474 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6475 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6476 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6477 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6478 case BFD_RELOC_PPC64_DTPREL16_DS:
6479 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6480 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6481 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6482 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6483 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
3b8b57a9 6484 gas_assert (fixP->fx_addsy != NULL);
7c1d0959 6485 S_SET_THREAD_LOCAL (fixP->fx_addsy);
3b8b57a9 6486 fieldval = 0;
cdba85ec 6487 break;
3b8b57a9
AM		 6488
6489 /* These also should leave the field zero for the same
6490 reason. Note that older versions of gas wrote values
6491 here. If we want to go back to the old behaviour, then
6492 all _LO and _LO_DS cases will need to be treated like
6493 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6494 case BFD_RELOC_16_GOTOFF:
6495 case BFD_RELOC_LO16_GOTOFF:
6496 case BFD_RELOC_HI16_GOTOFF:
6497 case BFD_RELOC_HI16_S_GOTOFF:
6498 case BFD_RELOC_LO16_PLTOFF:
6499 case BFD_RELOC_HI16_PLTOFF:
6500 case BFD_RELOC_HI16_S_PLTOFF:
6501 case BFD_RELOC_GPREL16:
6502 case BFD_RELOC_16_BASEREL:
6503 case BFD_RELOC_LO16_BASEREL:
6504 case BFD_RELOC_HI16_BASEREL:
6505 case BFD_RELOC_HI16_S_BASEREL:
6506 case BFD_RELOC_PPC_TOC16:
6507 case BFD_RELOC_PPC64_TOC16_LO:
6508 case BFD_RELOC_PPC64_TOC16_HI:
6509 case BFD_RELOC_PPC64_TOC16_HA:
6510 case BFD_RELOC_PPC64_PLTGOT16:
6511 case BFD_RELOC_PPC64_PLTGOT16_LO:
6512 case BFD_RELOC_PPC64_PLTGOT16_HI:
6513 case BFD_RELOC_PPC64_PLTGOT16_HA:
6514 case BFD_RELOC_PPC64_GOT16_DS:
6515 case BFD_RELOC_PPC64_GOT16_LO_DS:
6516 case BFD_RELOC_PPC64_PLT16_LO_DS:
6517 case BFD_RELOC_PPC64_SECTOFF_DS:
6518 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6519 case BFD_RELOC_PPC64_TOC16_DS:
6520 case BFD_RELOC_PPC64_TOC16_LO_DS:
6521 case BFD_RELOC_PPC64_PLTGOT16_DS:
6522 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6523 case BFD_RELOC_PPC_EMB_NADDR16:
6524 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6525 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6526 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6527 case BFD_RELOC_PPC_EMB_SDAI16:
6528 case BFD_RELOC_PPC_EMB_SDA2I16:
6529 case BFD_RELOC_PPC_EMB_SDA2REL:
252b5132 6530 case BFD_RELOC_PPC_EMB_SDA21:
3b8b57a9
AM		 6531 case BFD_RELOC_PPC_EMB_MRKREF:
6532 case BFD_RELOC_PPC_EMB_RELSEC16:
6533 case BFD_RELOC_PPC_EMB_RELST_LO:
6534 case BFD_RELOC_PPC_EMB_RELST_HI:
6535 case BFD_RELOC_PPC_EMB_RELST_HA:
6536 case BFD_RELOC_PPC_EMB_BIT_FLD:
6537 case BFD_RELOC_PPC_EMB_RELSDA:
6538 case BFD_RELOC_PPC_VLE_SDA21:
6539 case BFD_RELOC_PPC_VLE_SDA21_LO:
6540 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6541 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6542 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6543 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6544 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6545 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6546 gas_assert (fixP->fx_addsy != NULL);
6547 /* Fall thru */
6548
6549 case BFD_RELOC_PPC_TLS:
6550 case BFD_RELOC_PPC_TLSGD:
6551 case BFD_RELOC_PPC_TLSLD:
6552 fieldval = 0;
3b8b57a9 6553 break;
7fa9fcb6
TG		 6554#endif
6555
6556#ifdef OBJ_XCOFF
6557 case BFD_RELOC_PPC_B16:
6558 /* Adjust the offset to the instruction boundary. */
6559 fieldval += 2;
6560 break;
6561#endif
252b5132 6562
3b8b57a9 6563 default:
252b5132 6564 break;
3b8b57a9 6565 }
252b5132 6566
3b8b57a9
AM		 6567#ifdef OBJ_ELF
6568/* powerpc uses RELA style relocs, so if emitting a reloc the field
6569 contents can stay at zero. */
6570#define APPLY_RELOC fixP->fx_done
6571#else
6572#define APPLY_RELOC 1
6573#endif
6574 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6575 {
6576 /* Fetch the instruction, insert the fully resolved operand
6577 value, and stuff the instruction back again. */
6578 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6579 if (target_big_endian)
31a91399 6580 {
3b8b57a9
AM		 6581 if (fixP->fx_size == 4)
6582 insn = bfd_getb32 ((unsigned char *) where);
31a91399 6583 else
3b8b57a9 6584 insn = bfd_getb16 ((unsigned char *) where);
31a91399
NC		 6585 }
6586 else
3b8b57a9
AM		 6587 {
6588 if (fixP->fx_size == 4)
6589 insn = bfd_getl32 ((unsigned char *) where);
6590 else
6591 insn = bfd_getl16 ((unsigned char *) where);
6592 }
6593 insn = ppc_insert_operand (insn, operand, fieldval,
6594 fixP->tc_fix_data.ppc_cpu,
6595 fixP->fx_file, fixP->fx_line);
6596 if (target_big_endian)
6597 {
6598 if (fixP->fx_size == 4)
6599 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6600 else
6601 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6602 }
6603 else
6604 {
6605 if (fixP->fx_size == 4)
6606 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6607 else
6608 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6609 }
6610 }
6611
6612 if (fixP->fx_done)
6613 /* Nothing else to do here. */
6614 return;
6615
6616 gas_assert (fixP->fx_addsy != NULL);
6617 if (fixP->fx_r_type == BFD_RELOC_UNUSED)
6618 {
6619 char *sfile;
6620 unsigned int sline;
6621
6622 /* Use expr_symbol_where to see if this is an expression
6623 symbol. */
6624 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6625 as_bad_where (fixP->fx_file, fixP->fx_line,
6626 _("unresolved expression that must be resolved"));
6627 else
6628 as_bad_where (fixP->fx_file, fixP->fx_line,
6629 _("unsupported relocation against %s"),
6630 S_GET_NAME (fixP->fx_addsy));
6631 fixP->fx_done = 1;
6632 return;
6633 }
6634 }
6635 else
6636 {
6637 /* Handle relocs in data. */
6638 switch (fixP->fx_r_type)
6639 {
252b5132 6640 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6641 if (fixP->fx_addsy
6642 && !S_IS_DEFINED (fixP->fx_addsy)
6643 && !S_IS_WEAK (fixP->fx_addsy))
6644 S_SET_WEAK (fixP->fx_addsy);
3b8b57a9 6645 /* Fall thru */
252b5132
RH		 6646
6647 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6648 fixP->fx_done = 0;
252b5132
RH		 6649 break;
6650
0baf16f2 6651#ifdef OBJ_ELF
3b8b57a9
AM		 6652 /* These can appear with @l etc. in data. */
6653 case BFD_RELOC_LO16:
3b8b57a9 6654 case BFD_RELOC_LO16_PCREL:
3b8b57a9 6655 case BFD_RELOC_HI16:
3b8b57a9 6656 case BFD_RELOC_HI16_PCREL:
3b8b57a9 6657 case BFD_RELOC_HI16_S:
3b8b57a9 6658 case BFD_RELOC_HI16_S_PCREL:
3b8b57a9 6659 case BFD_RELOC_PPC64_HIGHER:
3b8b57a9 6660 case BFD_RELOC_PPC64_HIGHER_S:
3b8b57a9 6661 case BFD_RELOC_PPC64_HIGHEST:
3b8b57a9 6662 case BFD_RELOC_PPC64_HIGHEST_S:
3b8b57a9
AM		 6663 break;
6664
6665 case BFD_RELOC_PPC_DTPMOD:
6666 case BFD_RELOC_PPC_TPREL:
6667 case BFD_RELOC_PPC_DTPREL:
6668 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6669 break;
6670
6671 /* Just punt all of these to the linker. */
6672 case BFD_RELOC_PPC_B16_BRTAKEN:
6673 case BFD_RELOC_PPC_B16_BRNTAKEN:
6674 case BFD_RELOC_16_GOTOFF:
6675 case BFD_RELOC_LO16_GOTOFF:
6676 case BFD_RELOC_HI16_GOTOFF:
6677 case BFD_RELOC_HI16_S_GOTOFF:
6678 case BFD_RELOC_LO16_PLTOFF:
6679 case BFD_RELOC_HI16_PLTOFF:
6680 case BFD_RELOC_HI16_S_PLTOFF:
6681 case BFD_RELOC_PPC_COPY:
6682 case BFD_RELOC_PPC_GLOB_DAT:
6683 case BFD_RELOC_16_BASEREL:
6684 case BFD_RELOC_LO16_BASEREL:
6685 case BFD_RELOC_HI16_BASEREL:
6686 case BFD_RELOC_HI16_S_BASEREL:
6687 case BFD_RELOC_PPC_TLS:
6688 case BFD_RELOC_PPC_DTPREL16_LO:
6689 case BFD_RELOC_PPC_DTPREL16_HI:
6690 case BFD_RELOC_PPC_DTPREL16_HA:
6691 case BFD_RELOC_PPC_TPREL16_LO:
6692 case BFD_RELOC_PPC_TPREL16_HI:
6693 case BFD_RELOC_PPC_TPREL16_HA:
6694 case BFD_RELOC_PPC_GOT_TLSGD16:
6695 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6696 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6697 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6698 case BFD_RELOC_PPC_GOT_TLSLD16:
6699 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6700 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6701 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6702 case BFD_RELOC_PPC_GOT_DTPREL16:
6703 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6704 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6705 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6706 case BFD_RELOC_PPC_GOT_TPREL16:
6707 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6708 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6709 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6710 case BFD_RELOC_24_PLT_PCREL:
6711 case BFD_RELOC_PPC_LOCAL24PC:
6712 case BFD_RELOC_32_PLT_PCREL:
6713 case BFD_RELOC_GPREL16:
6714 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6715 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6716 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6717 case BFD_RELOC_PPC_EMB_NADDR32:
6718 case BFD_RELOC_PPC_EMB_NADDR16:
6719 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6720 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6721 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6722 case BFD_RELOC_PPC_EMB_SDAI16:
6723 case BFD_RELOC_PPC_EMB_SDA2REL:
6724 case BFD_RELOC_PPC_EMB_SDA2I16:
6725 case BFD_RELOC_PPC_EMB_SDA21:
6726 case BFD_RELOC_PPC_VLE_SDA21_LO:
6727 case BFD_RELOC_PPC_EMB_MRKREF:
6728 case BFD_RELOC_PPC_EMB_RELSEC16:
6729 case BFD_RELOC_PPC_EMB_RELST_LO:
6730 case BFD_RELOC_PPC_EMB_RELST_HI:
6731 case BFD_RELOC_PPC_EMB_RELST_HA:
6732 case BFD_RELOC_PPC_EMB_BIT_FLD:
6733 case BFD_RELOC_PPC_EMB_RELSDA:
0baf16f2 6734 case BFD_RELOC_PPC64_TOC:
3b8b57a9
AM		 6735 case BFD_RELOC_PPC_TOC16:
6736 case BFD_RELOC_PPC64_TOC16_LO:
6737 case BFD_RELOC_PPC64_TOC16_HI:
6738 case BFD_RELOC_PPC64_TOC16_HA:
6739 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6740 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6741 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6742 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6743 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6744 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6745 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6746 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
94f592af 6747 fixP->fx_done = 0;
0baf16f2 6748 break;
0baf16f2 6749#endif
3b8b57a9
AM		 6750
6751#ifdef OBJ_XCOFF
6752 case BFD_RELOC_NONE:
3b8b57a9 6753#endif
5656a981
AM		 6754 case BFD_RELOC_CTOR:
6755 case BFD_RELOC_32:
6756 case BFD_RELOC_32_PCREL:
6757 case BFD_RELOC_RVA:
6758 case BFD_RELOC_64:
6759 case BFD_RELOC_64_PCREL:
6760 case BFD_RELOC_16:
6761 case BFD_RELOC_16_PCREL:
6762 case BFD_RELOC_8:
6763 break;
3b8b57a9 6764
252b5132 6765 default:
bc805888 6766 fprintf (stderr,
94f592af 6767 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6768 fflush (stderr);
252b5132
RH		 6769 abort ();
6770 }
46b596ff 6771
5656a981 6772 if (fixP->fx_size && APPLY_RELOC)
46b596ff 6773 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5656a981
AM		 6774 fieldval, fixP->fx_size);
6775 }
6776
6777 /* We are only able to convert some relocs to pc-relative. */
6778 if (!fixP->fx_done && fixP->fx_pcrel)
6779 {
6780 switch (fixP->fx_r_type)
6781 {
6782 case BFD_RELOC_LO16:
6783 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6784 break;
6785
6786 case BFD_RELOC_HI16:
6787 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6788 break;
6789
6790 case BFD_RELOC_HI16_S:
6791 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6792 break;
6793
6794 case BFD_RELOC_64:
6795 fixP->fx_r_type = BFD_RELOC_64_PCREL;
6796 break;
6797
6798 case BFD_RELOC_32:
6799 fixP->fx_r_type = BFD_RELOC_32_PCREL;
6800 break;
6801
6802 case BFD_RELOC_16:
6803 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6804 break;
6805
6806 /* Some of course are already pc-relative. */
6807 case BFD_RELOC_LO16_PCREL:
6808 case BFD_RELOC_HI16_PCREL:
6809 case BFD_RELOC_HI16_S_PCREL:
6810 case BFD_RELOC_64_PCREL:
6811 case BFD_RELOC_32_PCREL:
6812 case BFD_RELOC_16_PCREL:
6813 case BFD_RELOC_PPC_B16:
6814 case BFD_RELOC_PPC_B16_BRTAKEN:
6815 case BFD_RELOC_PPC_B16_BRNTAKEN:
6816 case BFD_RELOC_PPC_B26:
6817 case BFD_RELOC_PPC_LOCAL24PC:
6818 case BFD_RELOC_24_PLT_PCREL:
6819 case BFD_RELOC_32_PLT_PCREL:
6820 case BFD_RELOC_64_PLT_PCREL:
6821 case BFD_RELOC_PPC_VLE_REL8:
6822 case BFD_RELOC_PPC_VLE_REL15:
6823 case BFD_RELOC_PPC_VLE_REL24:
6824 break;
6825
6826 default:
6827 if (fixP->fx_addsy)
6828 {
6829 char *sfile;
6830 unsigned int sline;
6831
6832 /* Use expr_symbol_where to see if this is an
6833 expression symbol. */
6834 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6835 as_bad_where (fixP->fx_file, fixP->fx_line,
6836 _("unresolved expression that must"
6837 " be resolved"));
6838 else
6839 as_bad_where (fixP->fx_file, fixP->fx_line,
6840 _("cannot emit PC relative %s relocation"
6841 " against %s"),
6842 bfd_get_reloc_code_name (fixP->fx_r_type),
6843 S_GET_NAME (fixP->fx_addsy));
6844 }
6845 else
6846 as_bad_where (fixP->fx_file, fixP->fx_line,
6847 _("unable to resolve expression"));
6848 fixP->fx_done = 1;
6849 break;
6850 }
252b5132
RH		 6851 }
6852
6853#ifdef OBJ_ELF
3b8b57a9 6854 ppc_elf_validate_fix (fixP, seg);
94f592af 6855 fixP->fx_addnumber = value;
4e6935a6
AM		 6856
6857 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6858 from the section contents. If we are going to be emitting a reloc
6859 then the section contents are immaterial, so don't warn if they
6860 happen to overflow. Leave such warnings to ld. */
6861 if (!fixP->fx_done)
a38a07e0
AM		 6862 {
6863 fixP->fx_no_overflow = 1;
6864
6865 /* Arrange to emit .TOC. as a normal symbol if used in anything
6866 but .TOC.@tocbase. */
6867 if (ppc_obj64
6868 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
6869 && fixP->fx_addsy != NULL
6870 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
6871 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
6872 }
252b5132 6873#else
94f592af
NC		 6874 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6875 fixP->fx_addnumber = 0;
252b5132
RH		 6876 else
6877 {
6878#ifdef TE_PE
94f592af 6879 fixP->fx_addnumber = 0;
252b5132 6880#else
8edcbfcd
TG		 6881 /* We want to use the offset within the toc, not the actual VMA
6882 of the symbol. */
94f592af 6883 fixP->fx_addnumber =
8edcbfcd
TG		 6884 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6885 - S_GET_VALUE (ppc_toc_csect);
ac21e7da
TG		 6886 /* Set *valP to avoid errors. */
6887 *valP = value;
252b5132
RH		 6888#endif
6889 }
6890#endif
252b5132
RH		 6891}
6892
6893/* Generate a reloc for a fixup. */
6894
6895arelent *
98027b10 6896tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6897{
6898 arelent *reloc;
6899
6900 reloc = (arelent *) xmalloc (sizeof (arelent));
6901
49309057
ILT		 6902 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6903 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6904 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6905 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6906 if (reloc->howto == (reloc_howto_type *) NULL)
6907 {
6908 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6909 _("reloc %d not supported by object file format"),
6910 (int) fixp->fx_r_type);
252b5132
RH		 6911 return NULL;
6912 }
6913 reloc->addend = fixp->fx_addnumber;
6914
6915 return reloc;
6916}
75e21f08
JJ		 6917
6918void
98027b10 6919ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6920{
6921 cfi_add_CFA_def_cfa (1, 0);
6922}
6923
6924int
1df69f4f 6925tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6926{
6927 unsigned int regnum = -1;
6928 unsigned int i;
6929 const char *p;
6930 char *q;
6931 static struct { char *name; int dw2regnum; } regnames[] =
6932 {
6933 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6934 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6935 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6936 { "spe_acc", 111 }, { "spefscr", 112 }
6937 };
6938
6939 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6940 if (strcmp (regnames[i].name, regname) == 0)
6941 return regnames[i].dw2regnum;
6942
6943 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6944 {
6945 p = regname + 1 + (regname[1] == '.');
6946 regnum = strtoul (p, &q, 10);
6947 if (p == q || *q || regnum >= 32)
6948 return -1;
6949 if (regname[0] == 'f')
b7d7dc63 6950 regnum += 32;
75e21f08 6951 else if (regname[0] == 'v')
b7d7dc63 6952 regnum += 77;
75e21f08
JJ		 6953 }
6954 else if (regname[0] == 'c' && regname[1] == 'r')
6955 {
6956 p = regname + 2 + (regname[2] == '.');
6957 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6958 return -1;
75e21f08
JJ		 6959 regnum = p[0] - '0' + 68;
6960 }
6961 return regnum;
6962}
GDB Binutils - Deliverables
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