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Fix the documentation for the -fo option.
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
ae6063d4 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
2c1c4c62 3 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
81d4177b 21 02111-1307, USA. */
252b5132
RH		 22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132
RH		 26#include "subsegs.h"
27
28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 53#endif
54#endif
55
0baf16f2
AM		 56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM		 99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH		 101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
114static void ppc_change_csect PARAMS ((symbolS *));
115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
185\f
186/* The target specific pseudo-ops which we support. */
187
188const pseudo_typeS md_pseudo_table[] =
189{
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193#ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 221 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225#endif
226
227#ifdef OBJ_ELF
0baf16f2
AM		 228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
2b3c4602 236 { "file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 },
5d6f4f16 237 { "loc", dwarf2_directive_loc, 0 },
252b5132
RH		 238#endif
239
240#ifdef TE_PE
99a814a1 241 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 242 { "previous", ppc_previous, 0 },
243 { "pdata", ppc_pdata, 0 },
244 { "ydata", ppc_ydata, 0 },
245 { "reldata", ppc_reldata, 0 },
246 { "rdata", ppc_rdata, 0 },
247 { "ualong", ppc_ualong, 0 },
248 { "znop", ppc_znop, 0 },
249 { "comm", ppc_pe_comm, 0 },
250 { "lcomm", ppc_pe_comm, 1 },
251 { "section", ppc_pe_section, 0 },
252 { "function", ppc_pe_function,0 },
253 { "tocd", ppc_pe_tocd, 0 },
254#endif
255
0baf16f2 256#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 257 { "tc", ppc_tc, 0 },
0baf16f2
AM		 258 { "machine", ppc_machine, 0 },
259#endif
252b5132
RH		 260
261 { NULL, NULL, 0 }
262};
263
264\f
99a814a1
AM		 265/* Predefined register names if -mregnames (or default for Windows NT).
266 In general, there are lots of them, in an attempt to be compatible
267 with a number of other Windows NT assemblers. */
252b5132
RH		 268
269/* Structure to hold information about predefined registers. */
270struct pd_reg
271 {
272 char *name;
273 int value;
274 };
275
276/* List of registers that are pre-defined:
277
278 Each general register has predefined names of the form:
279 1. r<reg_num> which has the value <reg_num>.
280 2. r.<reg_num> which has the value <reg_num>.
281
252b5132
RH		 282 Each floating point register has predefined names of the form:
283 1. f<reg_num> which has the value <reg_num>.
284 2. f.<reg_num> which has the value <reg_num>.
285
7a899fff
C		 286 Each vector unit register has predefined names of the form:
287 1. v<reg_num> which has the value <reg_num>.
288 2. v.<reg_num> which has the value <reg_num>.
289
252b5132
RH		 290 Each condition register has predefined names of the form:
291 1. cr<reg_num> which has the value <reg_num>.
292 2. cr.<reg_num> which has the value <reg_num>.
293
294 There are individual registers as well:
295 sp or r.sp has the value 1
296 rtoc or r.toc has the value 2
297 fpscr has the value 0
298 xer has the value 1
299 lr has the value 8
300 ctr has the value 9
301 pmr has the value 0
302 dar has the value 19
303 dsisr has the value 18
304 dec has the value 22
305 sdr1 has the value 25
306 srr0 has the value 26
307 srr1 has the value 27
308
81d4177b 309 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 310
311static const struct pd_reg pre_defined_registers[] =
312{
313 { "cr.0", 0 }, /* Condition Registers */
314 { "cr.1", 1 },
315 { "cr.2", 2 },
316 { "cr.3", 3 },
317 { "cr.4", 4 },
318 { "cr.5", 5 },
319 { "cr.6", 6 },
320 { "cr.7", 7 },
321
322 { "cr0", 0 },
323 { "cr1", 1 },
324 { "cr2", 2 },
325 { "cr3", 3 },
326 { "cr4", 4 },
327 { "cr5", 5 },
328 { "cr6", 6 },
329 { "cr7", 7 },
330
331 { "ctr", 9 },
332
333 { "dar", 19 }, /* Data Access Register */
334 { "dec", 22 }, /* Decrementer */
335 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
336
337 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 338 { "f.1", 1 },
339 { "f.10", 10 },
340 { "f.11", 11 },
341 { "f.12", 12 },
342 { "f.13", 13 },
343 { "f.14", 14 },
344 { "f.15", 15 },
345 { "f.16", 16 },
346 { "f.17", 17 },
347 { "f.18", 18 },
348 { "f.19", 19 },
349 { "f.2", 2 },
350 { "f.20", 20 },
351 { "f.21", 21 },
352 { "f.22", 22 },
353 { "f.23", 23 },
354 { "f.24", 24 },
355 { "f.25", 25 },
356 { "f.26", 26 },
357 { "f.27", 27 },
358 { "f.28", 28 },
359 { "f.29", 29 },
360 { "f.3", 3 },
252b5132
RH		 361 { "f.30", 30 },
362 { "f.31", 31 },
81d4177b
KH		 363 { "f.4", 4 },
364 { "f.5", 5 },
365 { "f.6", 6 },
366 { "f.7", 7 },
367 { "f.8", 8 },
368 { "f.9", 9 },
369
370 { "f0", 0 },
371 { "f1", 1 },
372 { "f10", 10 },
373 { "f11", 11 },
374 { "f12", 12 },
375 { "f13", 13 },
376 { "f14", 14 },
377 { "f15", 15 },
378 { "f16", 16 },
379 { "f17", 17 },
380 { "f18", 18 },
381 { "f19", 19 },
382 { "f2", 2 },
383 { "f20", 20 },
384 { "f21", 21 },
385 { "f22", 22 },
386 { "f23", 23 },
387 { "f24", 24 },
388 { "f25", 25 },
389 { "f26", 26 },
390 { "f27", 27 },
391 { "f28", 28 },
392 { "f29", 29 },
393 { "f3", 3 },
252b5132
RH		 394 { "f30", 30 },
395 { "f31", 31 },
81d4177b
KH		 396 { "f4", 4 },
397 { "f5", 5 },
398 { "f6", 6 },
399 { "f7", 7 },
400 { "f8", 8 },
401 { "f9", 9 },
252b5132
RH		 402
403 { "fpscr", 0 },
404
405 { "lr", 8 }, /* Link Register */
406
407 { "pmr", 0 },
408
409 { "r.0", 0 }, /* General Purpose Registers */
410 { "r.1", 1 },
411 { "r.10", 10 },
412 { "r.11", 11 },
413 { "r.12", 12 },
414 { "r.13", 13 },
415 { "r.14", 14 },
416 { "r.15", 15 },
417 { "r.16", 16 },
418 { "r.17", 17 },
419 { "r.18", 18 },
420 { "r.19", 19 },
421 { "r.2", 2 },
422 { "r.20", 20 },
423 { "r.21", 21 },
424 { "r.22", 22 },
425 { "r.23", 23 },
426 { "r.24", 24 },
427 { "r.25", 25 },
428 { "r.26", 26 },
429 { "r.27", 27 },
430 { "r.28", 28 },
431 { "r.29", 29 },
432 { "r.3", 3 },
433 { "r.30", 30 },
434 { "r.31", 31 },
435 { "r.4", 4 },
436 { "r.5", 5 },
437 { "r.6", 6 },
438 { "r.7", 7 },
439 { "r.8", 8 },
440 { "r.9", 9 },
441
442 { "r.sp", 1 }, /* Stack Pointer */
443
444 { "r.toc", 2 }, /* Pointer to the table of contents */
445
446 { "r0", 0 }, /* More general purpose registers */
447 { "r1", 1 },
448 { "r10", 10 },
449 { "r11", 11 },
450 { "r12", 12 },
451 { "r13", 13 },
452 { "r14", 14 },
453 { "r15", 15 },
454 { "r16", 16 },
455 { "r17", 17 },
456 { "r18", 18 },
457 { "r19", 19 },
458 { "r2", 2 },
459 { "r20", 20 },
460 { "r21", 21 },
461 { "r22", 22 },
462 { "r23", 23 },
463 { "r24", 24 },
464 { "r25", 25 },
465 { "r26", 26 },
466 { "r27", 27 },
467 { "r28", 28 },
468 { "r29", 29 },
469 { "r3", 3 },
470 { "r30", 30 },
471 { "r31", 31 },
472 { "r4", 4 },
473 { "r5", 5 },
474 { "r6", 6 },
475 { "r7", 7 },
476 { "r8", 8 },
477 { "r9", 9 },
478
479 { "rtoc", 2 }, /* Table of contents */
480
481 { "sdr1", 25 }, /* Storage Description Register 1 */
482
483 { "sp", 1 },
484
485 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
486 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 487
7a899fff 488 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 489 { "v.1", 1 },
490 { "v.10", 10 },
491 { "v.11", 11 },
492 { "v.12", 12 },
493 { "v.13", 13 },
494 { "v.14", 14 },
495 { "v.15", 15 },
496 { "v.16", 16 },
497 { "v.17", 17 },
498 { "v.18", 18 },
499 { "v.19", 19 },
500 { "v.2", 2 },
501 { "v.20", 20 },
502 { "v.21", 21 },
503 { "v.22", 22 },
504 { "v.23", 23 },
505 { "v.24", 24 },
506 { "v.25", 25 },
507 { "v.26", 26 },
508 { "v.27", 27 },
509 { "v.28", 28 },
510 { "v.29", 29 },
511 { "v.3", 3 },
7a899fff
C		 512 { "v.30", 30 },
513 { "v.31", 31 },
81d4177b
KH		 514 { "v.4", 4 },
515 { "v.5", 5 },
516 { "v.6", 6 },
517 { "v.7", 7 },
518 { "v.8", 8 },
519 { "v.9", 9 },
7a899fff
C		 520
521 { "v0", 0 },
81d4177b
KH		 522 { "v1", 1 },
523 { "v10", 10 },
524 { "v11", 11 },
525 { "v12", 12 },
526 { "v13", 13 },
527 { "v14", 14 },
528 { "v15", 15 },
529 { "v16", 16 },
530 { "v17", 17 },
531 { "v18", 18 },
532 { "v19", 19 },
533 { "v2", 2 },
534 { "v20", 20 },
535 { "v21", 21 },
536 { "v22", 22 },
537 { "v23", 23 },
538 { "v24", 24 },
539 { "v25", 25 },
540 { "v26", 26 },
541 { "v27", 27 },
542 { "v28", 28 },
543 { "v29", 29 },
544 { "v3", 3 },
7a899fff
C		 545 { "v30", 30 },
546 { "v31", 31 },
81d4177b
KH		 547 { "v4", 4 },
548 { "v5", 5 },
549 { "v6", 6 },
550 { "v7", 7 },
551 { "v8", 8 },
7a899fff 552 { "v9", 9 },
252b5132
RH		 553
554 { "xer", 1 },
555
556};
557
bc805888 558#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 559
560/* Given NAME, find the register number associated with that name, return
561 the integer value associated with the given name or -1 on failure. */
562
563static int reg_name_search
564 PARAMS ((const struct pd_reg *, int, const char * name));
565
566static int
567reg_name_search (regs, regcount, name)
568 const struct pd_reg *regs;
569 int regcount;
570 const char *name;
571{
572 int middle, low, high;
573 int cmp;
574
575 low = 0;
576 high = regcount - 1;
577
578 do
579 {
580 middle = (low + high) / 2;
581 cmp = strcasecmp (name, regs[middle].name);
582 if (cmp < 0)
583 high = middle - 1;
584 else if (cmp > 0)
585 low = middle + 1;
586 else
587 return regs[middle].value;
588 }
589 while (low <= high);
590
591 return -1;
592}
593
594/*
99a814a1 595 * Summary of register_name.
252b5132
RH		 596 *
597 * in: Input_line_pointer points to 1st char of operand.
598 *
599 * out: A expressionS.
600 * The operand may have been a register: in this case, X_op == O_register,
601 * X_add_number is set to the register number, and truth is returned.
602 * Input_line_pointer->(next non-blank) char after operand, or is in its
603 * original state.
604 */
605
b34976b6 606static bfd_boolean
252b5132
RH		 607register_name (expressionP)
608 expressionS *expressionP;
609{
610 int reg_number;
611 char *name;
612 char *start;
613 char c;
614
99a814a1 615 /* Find the spelling of the operand. */
252b5132 616 start = name = input_line_pointer;
3882b010 617 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 618 name = ++input_line_pointer;
619
3882b010 620 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 621 return FALSE;
252b5132
RH		 622
623 c = get_symbol_end ();
624 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
625
468cced8
AM		 626 /* Put back the delimiting char. */
627 *input_line_pointer = c;
628
99a814a1 629 /* Look to see if it's in the register table. */
81d4177b 630 if (reg_number >= 0)
252b5132
RH		 631 {
632 expressionP->X_op = O_register;
633 expressionP->X_add_number = reg_number;
81d4177b 634
99a814a1 635 /* Make the rest nice. */
252b5132
RH		 636 expressionP->X_add_symbol = NULL;
637 expressionP->X_op_symbol = NULL;
b34976b6 638 return TRUE;
252b5132 639 }
468cced8
AM		 640
641 /* Reset the line as if we had not done anything. */
642 input_line_pointer = start;
b34976b6 643 return FALSE;
252b5132
RH		 644}
645\f
646/* This function is called for each symbol seen in an expression. It
647 handles the special parsing which PowerPC assemblers are supposed
648 to use for condition codes. */
649
650/* Whether to do the special parsing. */
b34976b6 651static bfd_boolean cr_operand;
252b5132
RH		 652
653/* Names to recognize in a condition code. This table is sorted. */
654static const struct pd_reg cr_names[] =
655{
656 { "cr0", 0 },
657 { "cr1", 1 },
658 { "cr2", 2 },
659 { "cr3", 3 },
660 { "cr4", 4 },
661 { "cr5", 5 },
662 { "cr6", 6 },
663 { "cr7", 7 },
664 { "eq", 2 },
665 { "gt", 1 },
666 { "lt", 0 },
667 { "so", 3 },
668 { "un", 3 }
669};
670
671/* Parsing function. This returns non-zero if it recognized an
672 expression. */
673
674int
675ppc_parse_name (name, expr)
676 const char *name;
677 expressionS *expr;
678{
679 int val;
680
681 if (! cr_operand)
682 return 0;
683
684 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
685 name);
686 if (val < 0)
687 return 0;
688
689 expr->X_op = O_constant;
690 expr->X_add_number = val;
691
692 return 1;
693}
694\f
695/* Local variables. */
696
697/* The type of processor we are assembling for. This is one or more
698 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 699static unsigned long ppc_cpu = 0;
252b5132 700
2b3c4602
AM		 701/* Whether to target xcoff64/elf64. */
702static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 703
252b5132
RH		 704/* Opcode hash table. */
705static struct hash_control *ppc_hash;
706
707/* Macro hash table. */
708static struct hash_control *ppc_macro_hash;
709
710#ifdef OBJ_ELF
99a814a1 711/* What type of shared library support to use. */
5d6f4f16 712static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 713
99a814a1 714/* Flags to set in the elf header. */
252b5132
RH		 715static flagword ppc_flags = 0;
716
717/* Whether this is Solaris or not. */
718#ifdef TARGET_SOLARIS_COMMENT
b34976b6 719#define SOLARIS_P TRUE
252b5132 720#else
b34976b6 721#define SOLARIS_P FALSE
252b5132
RH		 722#endif
723
b34976b6 724static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 725#endif
726
727#ifdef OBJ_XCOFF
728
729/* The RS/6000 assembler uses the .csect pseudo-op to generate code
730 using a bunch of different sections. These assembler sections,
731 however, are all encompassed within the .text or .data sections of
732 the final output file. We handle this by using different
733 subsegments within these main segments. */
734
735/* Next subsegment to allocate within the .text segment. */
736static subsegT ppc_text_subsegment = 2;
737
738/* Linked list of csects in the text section. */
739static symbolS *ppc_text_csects;
740
741/* Next subsegment to allocate within the .data segment. */
742static subsegT ppc_data_subsegment = 2;
743
744/* Linked list of csects in the data section. */
745static symbolS *ppc_data_csects;
746
747/* The current csect. */
748static symbolS *ppc_current_csect;
749
750/* The RS/6000 assembler uses a TOC which holds addresses of functions
751 and variables. Symbols are put in the TOC with the .tc pseudo-op.
752 A special relocation is used when accessing TOC entries. We handle
753 the TOC as a subsegment within the .data segment. We set it up if
754 we see a .toc pseudo-op, and save the csect symbol here. */
755static symbolS *ppc_toc_csect;
756
757/* The first frag in the TOC subsegment. */
758static fragS *ppc_toc_frag;
759
760/* The first frag in the first subsegment after the TOC in the .data
761 segment. NULL if there are no subsegments after the TOC. */
762static fragS *ppc_after_toc_frag;
763
764/* The current static block. */
765static symbolS *ppc_current_block;
766
767/* The COFF debugging section; set by md_begin. This is not the
768 .debug section, but is instead the secret BFD section which will
769 cause BFD to set the section number of a symbol to N_DEBUG. */
770static asection *ppc_coff_debug_section;
771
772#endif /* OBJ_XCOFF */
773
774#ifdef TE_PE
775
776/* Various sections that we need for PE coff support. */
777static segT ydata_section;
778static segT pdata_section;
779static segT reldata_section;
780static segT rdata_section;
781static segT tocdata_section;
782
81d4177b 783/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 784static segT ppc_previous_section;
785static segT ppc_current_section;
786
787#endif /* TE_PE */
788
789#ifdef OBJ_ELF
790symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 791#define PPC_APUINFO_ISEL 0x40
792#define PPC_APUINFO_PMR 0x41
793#define PPC_APUINFO_RFMCI 0x42
794#define PPC_APUINFO_CACHELCK 0x43
795#define PPC_APUINFO_SPE 0x100
796#define PPC_APUINFO_EFS 0x101
797#define PPC_APUINFO_BRLOCK 0x102
798
b34976b6
AM		 799/*
800 * We keep a list of APUinfo
6a0c61b7
EZ		 801 */
802unsigned long *ppc_apuinfo_list;
803unsigned int ppc_apuinfo_num;
804unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 805#endif /* OBJ_ELF */
806\f
807#ifdef OBJ_ELF
15c1449b 808const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 809#else
15c1449b 810const char *const md_shortopts = "um:";
252b5132 811#endif
15c1449b 812const struct option md_longopts[] = {
252b5132
RH		 813 {NULL, no_argument, NULL, 0}
814};
15c1449b 815const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 816
817int
818md_parse_option (c, arg)
819 int c;
820 char *arg;
821{
822 switch (c)
823 {
824 case 'u':
825 /* -u means that any undefined symbols should be treated as
826 external, which is the default for gas anyhow. */
827 break;
828
829#ifdef OBJ_ELF
830 case 'l':
831 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 832 sake, recognize -be also. */
252b5132
RH		 833 if (strcmp (arg, "e") == 0)
834 {
835 target_big_endian = 0;
836 set_target_endian = 1;
837 }
838 else
839 return 0;
840
841 break;
842
843 case 'b':
844 if (strcmp (arg, "e") == 0)
845 {
846 target_big_endian = 1;
847 set_target_endian = 1;
848 }
849 else
850 return 0;
851
852 break;
853
854 case 'K':
99a814a1 855 /* Recognize -K PIC. */
252b5132
RH		 856 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
857 {
858 shlib = SHLIB_PIC;
859 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
860 }
861 else
862 return 0;
863
864 break;
865#endif
866
7f6d05e8
CP		 867 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
868 case 'a':
869 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 870 {
871#ifdef BFD64
872 ppc_obj64 = 1;
873#else
874 as_fatal (_("%s unsupported"), "-a64");
875#endif
876 }
7f6d05e8 877 else if (strcmp (arg, "32") == 0)
2b3c4602 878 ppc_obj64 = 0;
7f6d05e8
CP		 879 else
880 return 0;
881 break;
81d4177b 882
252b5132
RH		 883 case 'm':
884 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
99a814a1 885 (RIOS2). */
252b5132 886 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
2b3c4602 887 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
252b5132
RH		 888 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
889 else if (strcmp (arg, "pwr") == 0)
2b3c4602 890 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
23e1d84c 891 /* -m601 means to assemble for the PowerPC 601, which includes
99a814a1 892 instructions that are holdovers from the Power. */
252b5132 893 else if (strcmp (arg, "601") == 0)
b34976b6
AM		 894 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
895 | PPC_OPCODE_601 | PPC_OPCODE_32);
252b5132 896 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
23e1d84c 897 PowerPC 603/604. */
252b5132
RH		 898 else if (strcmp (arg, "ppc") == 0
899 || strcmp (arg, "ppc32") == 0
252b5132
RH		 900 || strcmp (arg, "603") == 0
901 || strcmp (arg, "604") == 0)
6a0c61b7 902 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
23e1d84c 903 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
418c1742 904 else if (strcmp (arg, "403") == 0
b34976b6
AM		 905 || strcmp (arg, "405") == 0)
906 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
907 | PPC_OPCODE_403 | PPC_OPCODE_32);
418c1742 908 else if (strcmp (arg, "7400") == 0
b34976b6
AM		 909 || strcmp (arg, "7410") == 0
910 || strcmp (arg, "7450") == 0
911 || strcmp (arg, "7455") == 0)
912 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
913 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
418c1742 914 else if (strcmp (arg, "altivec") == 0)
b34976b6
AM		 915 {
916 if (ppc_cpu == 0)
917 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
918 else
919 ppc_cpu |= PPC_OPCODE_ALTIVEC;
920 }
6a0c61b7
EZ		 921 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
922 {
b34976b6
AM		 923 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
924 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
925 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
926 | PPC_OPCODE_RFMCI);
927 }
6a0c61b7
EZ		 928 else if (strcmp (arg, "spe") == 0)
929 {
930 if (ppc_cpu == 0)
931 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
932 else
933 ppc_cpu |= PPC_OPCODE_SPE;
934 }
252b5132 935 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
99a814a1 936 620. */
252b5132
RH		 937 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
938 {
6a0c61b7 939 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
252b5132 940 }
d0e9a01c
RH		 941 else if (strcmp (arg, "ppc64bridge") == 0)
942 {
b34976b6
AM		 943 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
944 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
418c1742
MG		 945 }
946 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
947 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
6a0c61b7
EZ		 948 {
949 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
950 }
418c1742
MG		 951 /* -mbooke64 means enable 64-bit BookE support. */
952 else if (strcmp (arg, "booke64") == 0)
953 {
b34976b6
AM		 954 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
955 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
d0e9a01c 956 }
23e1d84c
AM		 957 else if (strcmp (arg, "power4") == 0)
958 {
b34976b6
AM		 959 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
960 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
23e1d84c 961 }
252b5132
RH		 962 /* -mcom means assemble for the common intersection between Power
963 and PowerPC. At present, we just allow the union, rather
964 than the intersection. */
965 else if (strcmp (arg, "com") == 0)
2b3c4602 966 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132
RH		 967 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
968 else if (strcmp (arg, "any") == 0)
2b3c4602 969 ppc_cpu = PPC_OPCODE_ANY | PPC_OPCODE_32;
252b5132
RH		 970
971 else if (strcmp (arg, "regnames") == 0)
b34976b6 972 reg_names_p = TRUE;
252b5132
RH		 973
974 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 975 reg_names_p = FALSE;
252b5132
RH		 976
977#ifdef OBJ_ELF
99a814a1
AM		 978 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
979 that require relocation. */
252b5132
RH		 980 else if (strcmp (arg, "relocatable") == 0)
981 {
5d6f4f16 982 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 983 ppc_flags |= EF_PPC_RELOCATABLE;
984 }
985
986 else if (strcmp (arg, "relocatable-lib") == 0)
987 {
5d6f4f16 988 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 989 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
990 }
991
99a814a1 992 /* -memb, set embedded bit. */
252b5132
RH		 993 else if (strcmp (arg, "emb") == 0)
994 ppc_flags |= EF_PPC_EMB;
995
99a814a1
AM		 996 /* -mlittle/-mbig set the endianess. */
997 else if (strcmp (arg, "little") == 0
998 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 999 {
1000 target_big_endian = 0;
1001 set_target_endian = 1;
1002 }
1003
1004 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1005 {
1006 target_big_endian = 1;
1007 set_target_endian = 1;
1008 }
1009
1010 else if (strcmp (arg, "solaris") == 0)
1011 {
b34976b6 1012 msolaris = TRUE;
252b5132
RH		 1013 ppc_comment_chars = ppc_solaris_comment_chars;
1014 }
1015
1016 else if (strcmp (arg, "no-solaris") == 0)
1017 {
b34976b6 1018 msolaris = FALSE;
252b5132
RH		 1019 ppc_comment_chars = ppc_eabi_comment_chars;
1020 }
1021#endif
1022 else
1023 {
1024 as_bad (_("invalid switch -m%s"), arg);
1025 return 0;
1026 }
1027 break;
1028
1029#ifdef OBJ_ELF
1030 /* -V: SVR4 argument to print version ID. */
1031 case 'V':
1032 print_version_id ();
1033 break;
1034
1035 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1036 should be emitted or not. FIXME: Not implemented. */
1037 case 'Q':
1038 break;
1039
1040 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1041 rather than .stabs.excl, which is ignored by the linker.
1042 FIXME: Not implemented. */
1043 case 's':
1044 if (arg)
1045 return 0;
1046
1047 break;
1048#endif
1049
1050 default:
1051 return 0;
1052 }
1053
1054 return 1;
1055}
1056
1057void
1058md_show_usage (stream)
1059 FILE *stream;
1060{
bc805888 1061 fprintf (stream, _("\
252b5132
RH		 1062PowerPC options:\n\
1063-u ignored\n\
23e1d84c
AM		 1064-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1065-mpwr generate code for POWER (RIOS1)\n\
1066-m601 generate code for PowerPC 601\n\
418c1742 1067-mppc, -mppc32, -m603, -m604\n\
23e1d84c
AM		 1068 generate code for PowerPC 603/604\n\
1069-m403, -m405 generate code for PowerPC 403/405\n\
f5c120c5 1070-m7400, -m7410, -m7450, -m7455\n\
23e1d84c
AM		 1071 generate code For PowerPC 7400/7410/7450/7455\n\
1072-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1073-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1074-mbooke64 generate code for 64-bit PowerPC BookE\n\
1075-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1076-mpower4 generate code for Power4 architecture\n\
f5c120c5 1077-maltivec generate code for AltiVec\n\
252b5132
RH		 1078-mcom generate code Power/PowerPC common instructions\n\
1079-many generate code for any architecture (PWR/PWRX/PPC)\n\
1080-mregnames Allow symbolic names for registers\n\
1081-mno-regnames Do not allow symbolic names for registers\n"));
6a0c61b7
EZ		 1082 fprintf (stream, _("\
1083-me500, -me500x2 generate code for Motorola e500 core complex\n\
1084-mspe generate code for Motorola SPE instructions\n"));
252b5132 1085#ifdef OBJ_ELF
bc805888 1086 fprintf (stream, _("\
252b5132
RH		 1087-mrelocatable support for GCC's -mrelocatble option\n\
1088-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1089-memb set PPC_EMB bit in ELF flags\n\
1090-mlittle, -mlittle-endian\n\
1091 generate code for a little endian machine\n\
1092-mbig, -mbig-endian generate code for a big endian machine\n\
1093-msolaris generate code for Solaris\n\
1094-mno-solaris do not generate code for Solaris\n\
1095-V print assembler version number\n\
1096-Qy, -Qn ignored\n"));
1097#endif
1098}
1099\f
1100/* Set ppc_cpu if it is not already set. */
1101
1102static void
1103ppc_set_cpu ()
1104{
1105 const char *default_os = TARGET_OS;
1106 const char *default_cpu = TARGET_CPU;
1107
1108 if (ppc_cpu == 0)
1109 {
2a98c3a6
AM		 1110 if (ppc_obj64)
1111 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
1112 else if (strncmp (default_os, "aix", 3) == 0
1113 && default_os[3] >= '4' && default_os[3] <= '9')
2b3c4602 1114 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1115 else if (strncmp (default_os, "aix3", 4) == 0)
2b3c4602 1116 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1117 else if (strcmp (default_cpu, "rs6000") == 0)
2b3c4602 1118 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1119 else if (strncmp (default_cpu, "powerpc", 7) == 0)
b34976b6
AM		 1120 {
1121 if (default_cpu[7] == '6' && default_cpu[8] == '4')
1122 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
1123 else
1124 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
1125 }
252b5132 1126 else
99a814a1
AM		 1127 as_fatal (_("Unknown default cpu = %s, os = %s"),
1128 default_cpu, default_os);
252b5132
RH		 1129 }
1130}
1131
1132/* Figure out the BFD architecture to use. */
1133
1134enum bfd_architecture
1135ppc_arch ()
1136{
1137 const char *default_cpu = TARGET_CPU;
1138 ppc_set_cpu ();
1139
1140 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1141 return bfd_arch_powerpc;
1142 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1143 return bfd_arch_rs6000;
1144 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1145 {
1146 if (strcmp (default_cpu, "rs6000") == 0)
1147 return bfd_arch_rs6000;
0baf16f2 1148 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1149 return bfd_arch_powerpc;
1150 }
1151
1152 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1153 return bfd_arch_unknown;
1154}
1155
7f6d05e8
CP		 1156unsigned long
1157ppc_mach ()
1158{
2a98c3a6
AM		 1159 if (ppc_obj64)
1160 return bfd_mach_ppc64;
1161 else if (ppc_arch () == bfd_arch_rs6000)
1162 return bfd_mach_rs6k;
1163 else
1164 return bfd_mach_ppc;
7f6d05e8
CP		 1165}
1166
81d4177b 1167extern char*
99a814a1 1168ppc_target_format ()
7f6d05e8
CP		 1169{
1170#ifdef OBJ_COFF
1171#ifdef TE_PE
99a814a1 1172 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1173#elif TE_POWERMAC
0baf16f2 1174 return "xcoff-powermac";
7f6d05e8 1175#else
eb1e0e80 1176# ifdef TE_AIX5
2b3c4602 1177 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1178# else
2b3c4602 1179 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1180# endif
7f6d05e8 1181#endif
7f6d05e8
CP		 1182#endif
1183#ifdef OBJ_ELF
0baf16f2 1184 return (target_big_endian
2b3c4602
AM		 1185 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1186 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
7f6d05e8
CP		 1187#endif
1188}
1189
252b5132
RH		 1190/* This function is called when the assembler starts up. It is called
1191 after the options have been parsed and the output file has been
1192 opened. */
1193
1194void
1195md_begin ()
1196{
1197 register const struct powerpc_opcode *op;
1198 const struct powerpc_opcode *op_end;
1199 const struct powerpc_macro *macro;
1200 const struct powerpc_macro *macro_end;
b34976b6 1201 bfd_boolean dup_insn = FALSE;
252b5132
RH		 1202
1203 ppc_set_cpu ();
1204
1205#ifdef OBJ_ELF
81d4177b 1206 /* Set the ELF flags if desired. */
252b5132
RH		 1207 if (ppc_flags && !msolaris)
1208 bfd_set_private_flags (stdoutput, ppc_flags);
1209#endif
1210
1211 /* Insert the opcodes into a hash table. */
1212 ppc_hash = hash_new ();
1213
1214 op_end = powerpc_opcodes + powerpc_num_opcodes;
1215 for (op = powerpc_opcodes; op < op_end; op++)
1216 {
1217 know ((op->opcode & op->mask) == op->opcode);
1218
2b3c4602 1219 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1220 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1221 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1222 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1223 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1224 /* Certain instructions (eg: extsw) do not exist in the
1225 32-bit BookE instruction set, but they do exist in the
1226 64-bit BookE instruction set, and other PPC instruction
1227 sets. Check to see if the opcode has the BOOKE64 flag set.
1228 If it does make sure that the target CPU is not the BookE32. */
1229 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1230 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1231 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1232 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1233 || ((op->flags & PPC_OPCODE_POWER4)
1234 == (ppc_cpu & PPC_OPCODE_POWER4))))
252b5132
RH		 1235 {
1236 const char *retval;
1237
1238 retval = hash_insert (ppc_hash, op->name, (PTR) op);
1239 if (retval != (const char *) NULL)
1240 {
99a814a1 1241 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1242 if ((ppc_cpu & PPC_OPCODE_601) != 0
1243 && (op->flags & PPC_OPCODE_POWER) != 0)
1244 continue;
1245
99a814a1
AM		 1246 as_bad (_("Internal assembler error for instruction %s"),
1247 op->name);
b34976b6 1248 dup_insn = TRUE;
252b5132
RH		 1249 }
1250 }
1251 }
1252
1253 /* Insert the macros into a hash table. */
1254 ppc_macro_hash = hash_new ();
1255
1256 macro_end = powerpc_macros + powerpc_num_macros;
1257 for (macro = powerpc_macros; macro < macro_end; macro++)
1258 {
1259 if ((macro->flags & ppc_cpu) != 0)
1260 {
1261 const char *retval;
1262
1263 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1264 if (retval != (const char *) NULL)
1265 {
1266 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1267 dup_insn = TRUE;
252b5132
RH		 1268 }
1269 }
1270 }
1271
1272 if (dup_insn)
1273 abort ();
1274
99a814a1
AM		 1275 /* Tell the main code what the endianness is if it is not overidden
1276 by the user. */
252b5132
RH		 1277 if (!set_target_endian)
1278 {
1279 set_target_endian = 1;
1280 target_big_endian = PPC_BIG_ENDIAN;
1281 }
1282
1283#ifdef OBJ_XCOFF
1284 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1285
1286 /* Create dummy symbols to serve as initial csects. This forces the
1287 text csects to precede the data csects. These symbols will not
1288 be output. */
1289 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1290 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1291 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1292 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1293#endif
1294
1295#ifdef TE_PE
1296
1297 ppc_current_section = text_section;
81d4177b 1298 ppc_previous_section = 0;
252b5132
RH		 1299
1300#endif
1301}
1302
6a0c61b7
EZ		 1303void
1304ppc_cleanup ()
1305{
dc1d03fc 1306#ifdef OBJ_ELF
6a0c61b7
EZ		 1307 if (ppc_apuinfo_list == NULL)
1308 return;
1309
1310 /* Ok, so write the section info out. We have this layout:
1311
1312 byte data what
1313 ---- ---- ----
1314 0 8 length of "APUinfo\0"
1315 4 (n*4) number of APU's (4 bytes each)
1316 8 2 note type 2
1317 12 "APUinfo\0" name
1318 20 APU#1 first APU's info
1319 24 APU#2 second APU's info
1320 ... ...
1321 */
1322 {
1323 char *p;
1324 asection *seg = now_seg;
1325 subsegT subseg = now_subseg;
1326 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1327 unsigned int i;
6a0c61b7
EZ		 1328
1329 /* Create the .PPC.EMB.apuinfo section. */
1330 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1331 bfd_set_section_flags (stdoutput,
1332 apuinfo_secp,
e1a9cb8e 1333 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1334
1335 p = frag_more (4);
1336 md_number_to_chars (p, (valueT) 8, 4);
1337
1338 p = frag_more (4);
1339 md_number_to_chars (p, (valueT) ppc_apuinfo_num, 4);
1340
1341 p = frag_more (4);
1342 md_number_to_chars (p, (valueT) 2, 4);
1343
1344 p = frag_more (8);
1345 strcpy (p, "APUinfo");
1346
1347 for (i = 0; i < ppc_apuinfo_num; i++)
1348 {
b34976b6
AM		 1349 p = frag_more (4);
1350 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1351 }
1352
1353 frag_align (2, 0, 0);
1354
1355 /* We probably can't restore the current segment, for there likely
1356 isn't one yet... */
1357 if (seg && subseg)
1358 subseg_set (seg, subseg);
1359 }
dc1d03fc 1360#endif
6a0c61b7
EZ		 1361}
1362
252b5132
RH		 1363/* Insert an operand value into an instruction. */
1364
1365static unsigned long
1366ppc_insert_operand (insn, operand, val, file, line)
1367 unsigned long insn;
1368 const struct powerpc_operand *operand;
1369 offsetT val;
1370 char *file;
1371 unsigned int line;
1372{
1373 if (operand->bits != 32)
1374 {
1375 long min, max;
1376 offsetT test;
1377
1378 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1379 {
d0e9a01c 1380 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH		 1381 max = (1 << operand->bits) - 1;
1382 else
1383 max = (1 << (operand->bits - 1)) - 1;
1384 min = - (1 << (operand->bits - 1));
1385
2b3c4602 1386 if (!ppc_obj64)
252b5132
RH		 1387 {
1388 /* Some people write 32 bit hex constants with the sign
1389 extension done by hand. This shouldn't really be
1390 valid, but, to permit this code to assemble on a 64
1391 bit host, we sign extend the 32 bit value. */
1392 if (val > 0
92161534
ILT		 1393 && (val & (offsetT) 0x80000000) != 0
1394 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH		 1395 {
1396 val -= 0x80000000;
1397 val -= 0x80000000;
1398 }
1399 }
1400 }
1401 else
1402 {
1403 max = (1 << operand->bits) - 1;
1404 min = 0;
1405 }
1406
1407 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1408 test = - val;
1409 else
1410 test = val;
1411
1412 if (test < (offsetT) min || test > (offsetT) max)
1413 {
1414 const char *err =
1415 _("operand out of range (%s not between %ld and %ld)");
1416 char buf[100];
1417
1418 sprint_value (buf, test);
0baf16f2 1419 as_bad_where (file, line, err, buf, min, max);
252b5132
RH		 1420 }
1421 }
1422
1423 if (operand->insert)
1424 {
1425 const char *errmsg;
1426
1427 errmsg = NULL;
2b3c4602 1428 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1429 if (errmsg != (const char *) NULL)
0baf16f2 1430 as_bad_where (file, line, errmsg);
252b5132
RH		 1431 }
1432 else
1433 insn |= (((long) val & ((1 << operand->bits) - 1))
1434 << operand->shift);
1435
1436 return insn;
1437}
1438
1439\f
1440#ifdef OBJ_ELF
1441/* Parse @got, etc. and return the desired relocation. */
1442static bfd_reloc_code_real_type
1443ppc_elf_suffix (str_p, exp_p)
1444 char **str_p;
1445 expressionS *exp_p;
1446{
1447 struct map_bfd {
1448 char *string;
1449 int length;
15c1449b 1450 int reloc;
252b5132
RH		 1451 };
1452
1453 char ident[20];
1454 char *str = *str_p;
1455 char *str2;
1456 int ch;
1457 int len;
15c1449b 1458 const struct map_bfd *ptr;
252b5132 1459
bc805888 1460#define MAP(str,reloc) { str, sizeof (str)-1, reloc }
252b5132 1461
15c1449b 1462 static const struct map_bfd mapping[] = {
cdba85ec
AM		 1463 MAP ("l", (int) BFD_RELOC_LO16),
1464 MAP ("h", (int) BFD_RELOC_HI16),
1465 MAP ("ha", (int) BFD_RELOC_HI16_S),
1466 MAP ("brtaken", (int) BFD_RELOC_PPC_B16_BRTAKEN),
1467 MAP ("brntaken", (int) BFD_RELOC_PPC_B16_BRNTAKEN),
1468 MAP ("got", (int) BFD_RELOC_16_GOTOFF),
1469 MAP ("got@l", (int) BFD_RELOC_LO16_GOTOFF),
1470 MAP ("got@h", (int) BFD_RELOC_HI16_GOTOFF),
1471 MAP ("got@ha", (int) BFD_RELOC_HI16_S_GOTOFF),
1472 MAP ("fixup", (int) BFD_RELOC_CTOR),
1473 MAP ("plt", (int) BFD_RELOC_24_PLT_PCREL),
1474 MAP ("pltrel24", (int) BFD_RELOC_24_PLT_PCREL),
1475 MAP ("copy", (int) BFD_RELOC_PPC_COPY),
1476 MAP ("globdat", (int) BFD_RELOC_PPC_GLOB_DAT),
1477 MAP ("local24pc", (int) BFD_RELOC_PPC_LOCAL24PC),
1478 MAP ("local", (int) BFD_RELOC_PPC_LOCAL24PC),
1479 MAP ("pltrel", (int) BFD_RELOC_32_PLT_PCREL),
1480 MAP ("plt@l", (int) BFD_RELOC_LO16_PLTOFF),
1481 MAP ("plt@h", (int) BFD_RELOC_HI16_PLTOFF),
1482 MAP ("plt@ha", (int) BFD_RELOC_HI16_S_PLTOFF),
1483 MAP ("sdarel", (int) BFD_RELOC_GPREL16),
1484 MAP ("sectoff", (int) BFD_RELOC_16_BASEREL),
1485 MAP ("sectoff@l", (int) BFD_RELOC_LO16_BASEREL),
1486 MAP ("sectoff@h", (int) BFD_RELOC_HI16_BASEREL),
1487 MAP ("sectoff@ha", (int) BFD_RELOC_HI16_S_BASEREL),
1488 MAP ("naddr", (int) BFD_RELOC_PPC_EMB_NADDR32),
1489 MAP ("naddr16", (int) BFD_RELOC_PPC_EMB_NADDR16),
1490 MAP ("naddr@l", (int) BFD_RELOC_PPC_EMB_NADDR16_LO),
1491 MAP ("naddr@h", (int) BFD_RELOC_PPC_EMB_NADDR16_HI),
1492 MAP ("naddr@ha", (int) BFD_RELOC_PPC_EMB_NADDR16_HA),
1493 MAP ("sdai16", (int) BFD_RELOC_PPC_EMB_SDAI16),
1494 MAP ("sda2rel", (int) BFD_RELOC_PPC_EMB_SDA2REL),
1495 MAP ("sda2i16", (int) BFD_RELOC_PPC_EMB_SDA2I16),
1496 MAP ("sda21", (int) BFD_RELOC_PPC_EMB_SDA21),
1497 MAP ("mrkref", (int) BFD_RELOC_PPC_EMB_MRKREF),
1498 MAP ("relsect", (int) BFD_RELOC_PPC_EMB_RELSEC16),
1499 MAP ("relsect@l", (int) BFD_RELOC_PPC_EMB_RELST_LO),
1500 MAP ("relsect@h", (int) BFD_RELOC_PPC_EMB_RELST_HI),
1501 MAP ("relsect@ha", (int) BFD_RELOC_PPC_EMB_RELST_HA),
1502 MAP ("bitfld", (int) BFD_RELOC_PPC_EMB_BIT_FLD),
1503 MAP ("relsda", (int) BFD_RELOC_PPC_EMB_RELSDA),
1504 MAP ("xgot", (int) BFD_RELOC_PPC_TOC16),
1505 MAP ("tls", (int) BFD_RELOC_PPC_TLS),
1506 MAP ("dtpmod", (int) BFD_RELOC_PPC_DTPMOD),
1507 MAP ("dtprel", (int) BFD_RELOC_PPC_DTPREL),
1508 MAP ("dtprel@l", (int) BFD_RELOC_PPC_DTPREL16_LO),
1509 MAP ("dtprel@h", (int) BFD_RELOC_PPC_DTPREL16_HI),
1510 MAP ("dtprel@ha", (int) BFD_RELOC_PPC_DTPREL16_HA),
1511 MAP ("tprel", (int) BFD_RELOC_PPC_TPREL),
1512 MAP ("tprel@l", (int) BFD_RELOC_PPC_TPREL16_LO),
1513 MAP ("tprel@h", (int) BFD_RELOC_PPC_TPREL16_HI),
1514 MAP ("tprel@ha", (int) BFD_RELOC_PPC_TPREL16_HA),
1515 MAP ("got@tlsgd", (int) BFD_RELOC_PPC_GOT_TLSGD16),
1516 MAP ("got@tlsgd@l", (int) BFD_RELOC_PPC_GOT_TLSGD16_LO),
1517 MAP ("got@tlsgd@h", (int) BFD_RELOC_PPC_GOT_TLSGD16_HI),
1518 MAP ("got@tlsgd@ha", (int) BFD_RELOC_PPC_GOT_TLSGD16_HA),
1519 MAP ("got@tlsld", (int) BFD_RELOC_PPC_GOT_TLSLD16),
1520 MAP ("got@tlsld@l", (int) BFD_RELOC_PPC_GOT_TLSLD16_LO),
1521 MAP ("got@tlsld@h", (int) BFD_RELOC_PPC_GOT_TLSLD16_HI),
1522 MAP ("got@tlsld@ha", (int) BFD_RELOC_PPC_GOT_TLSLD16_HA),
1523 MAP ("got@dtprel", (int) BFD_RELOC_PPC_GOT_DTPREL16),
1524 MAP ("got@dtprel@l", (int) BFD_RELOC_PPC_GOT_DTPREL16_LO),
1525 MAP ("got@dtprel@h", (int) BFD_RELOC_PPC_GOT_DTPREL16_HI),
1526 MAP ("got@dtprel@ha", (int) BFD_RELOC_PPC_GOT_DTPREL16_HA),
1527 MAP ("got@tprel", (int) BFD_RELOC_PPC_GOT_TPREL16),
1528 MAP ("got@tprel@l", (int) BFD_RELOC_PPC_GOT_TPREL16_LO),
1529 MAP ("got@tprel@h", (int) BFD_RELOC_PPC_GOT_TPREL16_HI),
1530 MAP ("got@tprel@ha", (int) BFD_RELOC_PPC_GOT_TPREL16_HA),
2b3c4602
AM		 1531 /* The following are only valid for ppc64. Negative values are
1532 used instead of a flag. */
cdba85ec
AM		 1533 MAP ("higher", - (int) BFD_RELOC_PPC64_HIGHER),
1534 MAP ("highera", - (int) BFD_RELOC_PPC64_HIGHER_S),
1535 MAP ("highest", - (int) BFD_RELOC_PPC64_HIGHEST),
1536 MAP ("highesta", - (int) BFD_RELOC_PPC64_HIGHEST_S),
1537 MAP ("tocbase", - (int) BFD_RELOC_PPC64_TOC),
1538 MAP ("toc", - (int) BFD_RELOC_PPC_TOC16),
1539 MAP ("toc@l", - (int) BFD_RELOC_PPC64_TOC16_LO),
1540 MAP ("toc@h", - (int) BFD_RELOC_PPC64_TOC16_HI),
1541 MAP ("toc@ha", - (int) BFD_RELOC_PPC64_TOC16_HA),
1542 MAP ("dtprel@higher", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHER),
1543 MAP ("dtprel@highera", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1544 MAP ("dtprel@highest", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1545 MAP ("dtprel@highesta", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1546 MAP ("tprel@higher", - (int) BFD_RELOC_PPC64_TPREL16_HIGHER),
1547 MAP ("tprel@highera", - (int) BFD_RELOC_PPC64_TPREL16_HIGHERA),
1548 MAP ("tprel@highest", - (int) BFD_RELOC_PPC64_TPREL16_HIGHEST),
1549 MAP ("tprel@highesta", - (int) BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1550 { (char *) 0, 0, (int) BFD_RELOC_UNUSED }
252b5132
RH		 1551 };
1552
1553 if (*str++ != '@')
1554 return BFD_RELOC_UNUSED;
1555
1556 for (ch = *str, str2 = ident;
1557 (str2 < ident + sizeof (ident) - 1
3882b010 1558 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1559 ch = *++str)
1560 {
3882b010 1561 *str2++ = TOLOWER (ch);
252b5132
RH		 1562 }
1563
1564 *str2 = '\0';
1565 len = str2 - ident;
1566
1567 ch = ident[0];
1568 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1569 if (ch == ptr->string[0]
1570 && len == ptr->length
1571 && memcmp (ident, ptr->string, ptr->length) == 0)
1572 {
15c1449b
AM		 1573 int reloc = ptr->reloc;
1574
2b3c4602 1575 if (reloc < 0)
15c1449b 1576 {
2b3c4602 1577 if (!ppc_obj64)
15c1449b
AM		 1578 return BFD_RELOC_UNUSED;
1579 reloc = -reloc;
1580 }
1581
cdba85ec 1582 if (!ppc_obj64)
5f6db75a
AM		 1583 if (exp_p->X_add_number != 0
1584 && (reloc == (int) BFD_RELOC_16_GOTOFF
1585 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1586 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1587 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1588 as_warn (_("identifier+constant@got means identifier@got+constant"));
1589
1590 /* Now check for identifier@suffix+constant. */
1591 if (*str == '-' || *str == '+')
252b5132 1592 {
5f6db75a
AM		 1593 char *orig_line = input_line_pointer;
1594 expressionS new_exp;
1595
1596 input_line_pointer = str;
1597 expression (&new_exp);
1598 if (new_exp.X_op == O_constant)
252b5132 1599 {
5f6db75a
AM		 1600 exp_p->X_add_number += new_exp.X_add_number;
1601 str = input_line_pointer;
252b5132 1602 }
5f6db75a
AM		 1603
1604 if (&input_line_pointer != str_p)
1605 input_line_pointer = orig_line;
252b5132 1606 }
252b5132 1607 *str_p = str;
0baf16f2 1608
2b3c4602 1609 if (reloc == (int) BFD_RELOC_PPC64_TOC
0baf16f2
AM		 1610 && exp_p->X_op == O_symbol)
1611 {
1612 /* This reloc type ignores the symbol. Change the symbol
1613 so that the dummy .TOC. symbol can be omitted from the
1614 object file. */
1615 exp_p->X_add_symbol = &abs_symbol;
1616 }
1617
15c1449b 1618 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1619 }
1620
1621 return BFD_RELOC_UNUSED;
1622}
1623
99a814a1
AM		 1624/* Like normal .long/.short/.word, except support @got, etc.
1625 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1626static void
1627ppc_elf_cons (nbytes)
0baf16f2 1628 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1629{
1630 expressionS exp;
1631 bfd_reloc_code_real_type reloc;
1632
1633 if (is_it_end_of_statement ())
1634 {
1635 demand_empty_rest_of_line ();
1636 return;
1637 }
1638
1639 do
1640 {
1641 expression (&exp);
1642 if (exp.X_op == O_symbol
1643 && *input_line_pointer == '@'
99a814a1
AM		 1644 && (reloc = ppc_elf_suffix (&input_line_pointer,
1645 &exp)) != BFD_RELOC_UNUSED)
252b5132 1646 {
99a814a1
AM		 1647 reloc_howto_type *reloc_howto;
1648 int size;
1649
1650 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1651 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1652
1653 if (size > nbytes)
0baf16f2
AM		 1654 {
1655 as_bad (_("%s relocations do not fit in %d bytes\n"),
1656 reloc_howto->name, nbytes);
1657 }
252b5132
RH		 1658 else
1659 {
0baf16f2
AM		 1660 char *p;
1661 int offset;
252b5132 1662
0baf16f2
AM		 1663 p = frag_more (nbytes);
1664 offset = 0;
1665 if (target_big_endian)
1666 offset = nbytes - size;
99a814a1
AM		 1667 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1668 &exp, 0, reloc);
252b5132
RH		 1669 }
1670 }
1671 else
1672 emit_expr (&exp, (unsigned int) nbytes);
1673 }
1674 while (*input_line_pointer++ == ',');
1675
99a814a1
AM		 1676 /* Put terminator back into stream. */
1677 input_line_pointer--;
252b5132
RH		 1678 demand_empty_rest_of_line ();
1679}
1680
1681/* Solaris pseduo op to change to the .rodata section. */
1682static void
1683ppc_elf_rdata (xxx)
1684 int xxx;
1685{
1686 char *save_line = input_line_pointer;
1687 static char section[] = ".rodata\n";
1688
99a814a1 1689 /* Just pretend this is .section .rodata */
252b5132
RH		 1690 input_line_pointer = section;
1691 obj_elf_section (xxx);
1692
1693 input_line_pointer = save_line;
1694}
1695
99a814a1 1696/* Pseudo op to make file scope bss items. */
252b5132 1697static void
99a814a1 1698ppc_elf_lcomm (xxx)
92161534 1699 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1700{
1701 register char *name;
1702 register char c;
1703 register char *p;
1704 offsetT size;
1705 register symbolS *symbolP;
1706 offsetT align;
1707 segT old_sec;
1708 int old_subsec;
1709 char *pfrag;
1710 int align2;
1711
1712 name = input_line_pointer;
1713 c = get_symbol_end ();
1714
99a814a1 1715 /* just after name is now '\0'. */
252b5132
RH		 1716 p = input_line_pointer;
1717 *p = c;
1718 SKIP_WHITESPACE ();
1719 if (*input_line_pointer != ',')
1720 {
1721 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1722 ignore_rest_of_line ();
1723 return;
1724 }
1725
1726 input_line_pointer++; /* skip ',' */
1727 if ((size = get_absolute_expression ()) < 0)
1728 {
1729 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1730 ignore_rest_of_line ();
1731 return;
1732 }
1733
1734 /* The third argument to .lcomm is the alignment. */
1735 if (*input_line_pointer != ',')
1736 align = 8;
1737 else
1738 {
1739 ++input_line_pointer;
1740 align = get_absolute_expression ();
1741 if (align <= 0)
1742 {
1743 as_warn (_("ignoring bad alignment"));
1744 align = 8;
1745 }
1746 }
1747
1748 *p = 0;
1749 symbolP = symbol_find_or_make (name);
1750 *p = c;
1751
1752 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1753 {
1754 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1755 S_GET_NAME (symbolP));
1756 ignore_rest_of_line ();
1757 return;
1758 }
1759
1760 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1761 {
1762 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1763 S_GET_NAME (symbolP),
1764 (long) S_GET_VALUE (symbolP),
1765 (long) size);
1766
1767 ignore_rest_of_line ();
1768 return;
1769 }
1770
99a814a1 1771 /* Allocate_bss. */
252b5132
RH		 1772 old_sec = now_seg;
1773 old_subsec = now_subseg;
1774 if (align)
1775 {
99a814a1 1776 /* Convert to a power of 2 alignment. */
252b5132
RH		 1777 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1778 if (align != 1)
1779 {
1780 as_bad (_("Common alignment not a power of 2"));
1781 ignore_rest_of_line ();
1782 return;
1783 }
1784 }
1785 else
1786 align2 = 0;
1787
1788 record_alignment (bss_section, align2);
1789 subseg_set (bss_section, 0);
1790 if (align2)
1791 frag_align (align2, 0, 0);
1792 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1793 symbol_get_frag (symbolP)->fr_symbol = 0;
1794 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1795 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1796 (char *) 0);
1797 *pfrag = 0;
1798 S_SET_SIZE (symbolP, size);
1799 S_SET_SEGMENT (symbolP, bss_section);
1800 subseg_set (old_sec, old_subsec);
1801 demand_empty_rest_of_line ();
1802}
1803
1804/* Validate any relocations emitted for -mrelocatable, possibly adding
1805 fixups for word relocations in writable segments, so we can adjust
1806 them at runtime. */
1807static void
1808ppc_elf_validate_fix (fixp, seg)
1809 fixS *fixp;
1810 segT seg;
1811{
1812 if (fixp->fx_done || fixp->fx_pcrel)
1813 return;
1814
1815 switch (shlib)
1816 {
1817 case SHLIB_NONE:
1818 case SHLIB_PIC:
1819 return;
1820
5d6f4f16 1821 case SHLIB_MRELOCATABLE:
252b5132
RH		 1822 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1823 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1824 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1825 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1826 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1827 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1828 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1829 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1830 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1831 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1832 && strcmp (segment_name (seg), ".got2") != 0
1833 && strcmp (segment_name (seg), ".dtors") != 0
1834 && strcmp (segment_name (seg), ".ctors") != 0
1835 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1836 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1837 && strcmp (segment_name (seg), ".eh_frame") != 0
1838 && strcmp (segment_name (seg), ".ex_shared") != 0)
1839 {
1840 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1841 || fixp->fx_r_type != BFD_RELOC_CTOR)
1842 {
1843 as_bad_where (fixp->fx_file, fixp->fx_line,
1844 _("Relocation cannot be done when using -mrelocatable"));
1845 }
1846 }
1847 return;
1848 }
1849}
0baf16f2 1850
7e8d4ab4
AM		 1851/* Prevent elf_frob_file_before_adjust removing a weak undefined
1852 function descriptor sym if the corresponding code sym is used. */
1853
1854void
1855ppc_frob_file_before_adjust ()
0baf16f2 1856{
7e8d4ab4 1857 symbolS *symp;
0baf16f2 1858
7e8d4ab4
AM		 1859 if (!ppc_obj64)
1860 return;
1861
1862 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1863 {
7e8d4ab4
AM		 1864 const char *name;
1865 char *dotname;
1866 symbolS *dotsym;
1867 size_t len;
1868
1869 name = S_GET_NAME (symp);
1870 if (name[0] == '.')
1871 continue;
1872
1873 if (! S_IS_WEAK (symp)
1874 || S_IS_DEFINED (symp))
1875 continue;
1876
1877 len = strlen (name) + 1;
1878 dotname = xmalloc (len + 1);
1879 dotname[0] = '.';
1880 memcpy (dotname + 1, name, len);
1881 dotsym = symbol_find (dotname);
1882 free (dotname);
1883 if (dotsym != NULL && (symbol_used_p (dotsym)
1884 || symbol_used_in_reloc_p (dotsym)))
1885 {
1886 symbol_mark_used (symp);
1887 }
0baf16f2
AM		 1888 }
1889
7e8d4ab4
AM		 1890 /* Don't emit .TOC. symbol. */
1891 symp = symbol_find (".TOC.");
1892 if (symp != NULL)
1893 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1894}
252b5132
RH		 1895#endif /* OBJ_ELF */
1896\f
1897#ifdef TE_PE
1898
1899/*
99a814a1 1900 * Summary of parse_toc_entry.
252b5132
RH		 1901 *
1902 * in: Input_line_pointer points to the '[' in one of:
1903 *
1904 * [toc] [tocv] [toc32] [toc64]
1905 *
1906 * Anything else is an error of one kind or another.
1907 *
81d4177b 1908 * out:
252b5132
RH		 1909 * return value: success or failure
1910 * toc_kind: kind of toc reference
1911 * input_line_pointer:
1912 * success: first char after the ']'
1913 * failure: unchanged
1914 *
1915 * settings:
1916 *
1917 * [toc] - rv == success, toc_kind = default_toc
1918 * [tocv] - rv == success, toc_kind = data_in_toc
1919 * [toc32] - rv == success, toc_kind = must_be_32
1920 * [toc64] - rv == success, toc_kind = must_be_64
1921 *
1922 */
1923
81d4177b
KH		 1924enum toc_size_qualifier
1925{
252b5132
RH		 1926 default_toc, /* The toc cell constructed should be the system default size */
1927 data_in_toc, /* This is a direct reference to a toc cell */
1928 must_be_32, /* The toc cell constructed must be 32 bits wide */
1929 must_be_64 /* The toc cell constructed must be 64 bits wide */
1930};
1931
1932static int
99a814a1 1933parse_toc_entry (toc_kind)
252b5132
RH		 1934 enum toc_size_qualifier *toc_kind;
1935{
1936 char *start;
1937 char *toc_spec;
1938 char c;
1939 enum toc_size_qualifier t;
1940
99a814a1 1941 /* Save the input_line_pointer. */
252b5132
RH		 1942 start = input_line_pointer;
1943
99a814a1 1944 /* Skip over the '[' , and whitespace. */
252b5132
RH		 1945 ++input_line_pointer;
1946 SKIP_WHITESPACE ();
81d4177b 1947
99a814a1 1948 /* Find the spelling of the operand. */
252b5132
RH		 1949 toc_spec = input_line_pointer;
1950 c = get_symbol_end ();
1951
99a814a1 1952 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 1953 {
1954 t = default_toc;
1955 }
99a814a1 1956 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 1957 {
1958 t = data_in_toc;
1959 }
99a814a1 1960 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 1961 {
1962 t = must_be_32;
1963 }
99a814a1 1964 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 1965 {
1966 t = must_be_64;
1967 }
1968 else
1969 {
1970 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 1971 *input_line_pointer = c;
1972 input_line_pointer = start;
252b5132
RH		 1973 return 0;
1974 }
1975
99a814a1
AM		 1976 /* Now find the ']'. */
1977 *input_line_pointer = c;
252b5132 1978
81d4177b
KH		 1979 SKIP_WHITESPACE (); /* leading whitespace could be there. */
1980 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 1981
1982 if (c != ']')
1983 {
1984 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 1985 input_line_pointer = start;
252b5132
RH		 1986 return 0;
1987 }
1988
99a814a1 1989 *toc_kind = t;
252b5132
RH		 1990 return 1;
1991}
1992#endif
1993\f
1994
dc1d03fc 1995#ifdef OBJ_ELF
6a0c61b7
EZ		 1996#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
1997static void
dc1d03fc 1998ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 1999 unsigned int apu, version;
2000{
2001 unsigned int i;
2002
2003 /* Check we don't already exist. */
2004 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2005 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2006 return;
b34976b6 2007
6a0c61b7
EZ		 2008 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2009 {
2010 if (ppc_apuinfo_num_alloc == 0)
2011 {
2012 ppc_apuinfo_num_alloc = 4;
2013 ppc_apuinfo_list = (unsigned long *)
2014 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2015 }
2016 else
2017 {
2018 ppc_apuinfo_num_alloc += 4;
2019 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2020 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2021 }
2022 }
dc1d03fc 2023 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2024}
2025#undef APUID
dc1d03fc 2026#endif
6a0c61b7
EZ		 2027\f
2028
252b5132
RH		 2029/* We need to keep a list of fixups. We can't simply generate them as
2030 we go, because that would require us to first create the frag, and
2031 that would screw up references to ``.''. */
2032
2033struct ppc_fixup
2034{
2035 expressionS exp;
2036 int opindex;
2037 bfd_reloc_code_real_type reloc;
2038};
2039
2040#define MAX_INSN_FIXUPS (5)
2041
2042/* This routine is called for each instruction to be assembled. */
2043
2044void
2045md_assemble (str)
2046 char *str;
2047{
2048 char *s;
2049 const struct powerpc_opcode *opcode;
2050 unsigned long insn;
2051 const unsigned char *opindex_ptr;
2052 int skip_optional;
2053 int need_paren;
2054 int next_opindex;
2055 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2056 int fc;
2057 char *f;
2058 int i;
2059#ifdef OBJ_ELF
2060 bfd_reloc_code_real_type reloc;
2061#endif
2062
2063 /* Get the opcode. */
3882b010 2064 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2065 ;
2066 if (*s != '\0')
2067 *s++ = '\0';
2068
2069 /* Look up the opcode in the hash table. */
2070 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2071 if (opcode == (const struct powerpc_opcode *) NULL)
2072 {
2073 const struct powerpc_macro *macro;
2074
2075 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2076 if (macro == (const struct powerpc_macro *) NULL)
2077 as_bad (_("Unrecognized opcode: `%s'"), str);
2078 else
2079 ppc_macro (s, macro);
2080
2081 return;
2082 }
2083
2084 insn = opcode->opcode;
2085
2086 str = s;
3882b010 2087 while (ISSPACE (*str))
252b5132
RH		 2088 ++str;
2089
2090 /* PowerPC operands are just expressions. The only real issue is
2091 that a few operand types are optional. All cases which might use
2092 an optional operand separate the operands only with commas (in
2093 some cases parentheses are used, as in ``lwz 1,0(1)'' but such
2094 cases never have optional operands). There is never more than
2095 one optional operand for an instruction. So, before we start
2096 seriously parsing the operands, we check to see if we have an
2097 optional operand, and, if we do, we count the number of commas to
2098 see whether the operand should be omitted. */
2099 skip_optional = 0;
2100 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2101 {
2102 const struct powerpc_operand *operand;
2103
2104 operand = &powerpc_operands[*opindex_ptr];
2105 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2106 {
2107 unsigned int opcount;
7fe9cf6b
NC		 2108 unsigned int num_operands_expected;
2109 unsigned int i;
252b5132
RH		 2110
2111 /* There is an optional operand. Count the number of
2112 commas in the input line. */
2113 if (*str == '\0')
2114 opcount = 0;
2115 else
2116 {
2117 opcount = 1;
2118 s = str;
2119 while ((s = strchr (s, ',')) != (char *) NULL)
2120 {
2121 ++opcount;
2122 ++s;
2123 }
2124 }
2125
7fe9cf6b
NC		 2126 /* Compute the number of expected operands.
2127 Do not count fake operands. */
2128 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2129 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2130 ++ num_operands_expected;
2131
252b5132
RH		 2132 /* If there are fewer operands in the line then are called
2133 for by the instruction, we want to skip the optional
2134 operand. */
7fe9cf6b 2135 if (opcount < num_operands_expected)
252b5132
RH		 2136 skip_optional = 1;
2137
2138 break;
2139 }
2140 }
2141
2142 /* Gather the operands. */
2143 need_paren = 0;
2144 next_opindex = 0;
2145 fc = 0;
2146 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2147 {
2148 const struct powerpc_operand *operand;
2149 const char *errmsg;
2150 char *hold;
2151 expressionS ex;
2152 char endc;
2153
2154 if (next_opindex == 0)
2155 operand = &powerpc_operands[*opindex_ptr];
2156 else
2157 {
2158 operand = &powerpc_operands[next_opindex];
2159 next_opindex = 0;
2160 }
252b5132
RH		 2161 errmsg = NULL;
2162
2163 /* If this is a fake operand, then we do not expect anything
2164 from the input. */
2165 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2166 {
2b3c4602 2167 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2168 if (errmsg != (const char *) NULL)
2169 as_bad (errmsg);
2170 continue;
2171 }
2172
2173 /* If this is an optional operand, and we are skipping it, just
2174 insert a zero. */
2175 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2176 && skip_optional)
2177 {
2178 if (operand->insert)
2179 {
2b3c4602 2180 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2181 if (errmsg != (const char *) NULL)
2182 as_bad (errmsg);
2183 }
2184 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2185 next_opindex = *opindex_ptr + 1;
2186 continue;
2187 }
2188
2189 /* Gather the operand. */
2190 hold = input_line_pointer;
2191 input_line_pointer = str;
2192
2193#ifdef TE_PE
81d4177b 2194 if (*input_line_pointer == '[')
252b5132
RH		 2195 {
2196 /* We are expecting something like the second argument here:
99a814a1
AM		 2197 *
2198 * lwz r4,[toc].GS.0.static_int(rtoc)
2199 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2200 * The argument following the `]' must be a symbol name, and the
2201 * register must be the toc register: 'rtoc' or '2'
2202 *
2203 * The effect is to 0 as the displacement field
2204 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2205 * the appropriate variation) reloc against it based on the symbol.
2206 * The linker will build the toc, and insert the resolved toc offset.
2207 *
2208 * Note:
2209 * o The size of the toc entry is currently assumed to be
2210 * 32 bits. This should not be assumed to be a hard coded
2211 * number.
2212 * o In an effort to cope with a change from 32 to 64 bits,
2213 * there are also toc entries that are specified to be
2214 * either 32 or 64 bits:
2215 * lwz r4,[toc32].GS.0.static_int(rtoc)
2216 * lwz r4,[toc64].GS.0.static_int(rtoc)
2217 * These demand toc entries of the specified size, and the
2218 * instruction probably requires it.
2219 */
252b5132
RH		 2220
2221 int valid_toc;
2222 enum toc_size_qualifier toc_kind;
2223 bfd_reloc_code_real_type toc_reloc;
2224
99a814a1
AM		 2225 /* Go parse off the [tocXX] part. */
2226 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2227
81d4177b 2228 if (!valid_toc)
252b5132 2229 {
99a814a1
AM		 2230 /* Note: message has already been issued.
2231 FIXME: what sort of recovery should we do?
2232 demand_rest_of_line (); return; ? */
252b5132
RH		 2233 }
2234
99a814a1
AM		 2235 /* Now get the symbol following the ']'. */
2236 expression (&ex);
252b5132
RH		 2237
2238 switch (toc_kind)
2239 {
2240 case default_toc:
99a814a1
AM		 2241 /* In this case, we may not have seen the symbol yet,
2242 since it is allowed to appear on a .extern or .globl
2243 or just be a label in the .data section. */
252b5132
RH		 2244 toc_reloc = BFD_RELOC_PPC_TOC16;
2245 break;
2246 case data_in_toc:
99a814a1
AM		 2247 /* 1. The symbol must be defined and either in the toc
2248 section, or a global.
2249 2. The reloc generated must have the TOCDEFN flag set
2250 in upper bit mess of the reloc type.
2251 FIXME: It's a little confusing what the tocv
2252 qualifier can be used for. At the very least, I've
2253 seen three uses, only one of which I'm sure I can
2254 explain. */
81d4177b
KH		 2255 if (ex.X_op == O_symbol)
2256 {
252b5132 2257 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2258 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2259 != tocdata_section)
252b5132 2260 {
99a814a1 2261 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2262 }
2263 }
2264
2265 toc_reloc = BFD_RELOC_PPC_TOC16;
2266 break;
2267 case must_be_32:
99a814a1
AM		 2268 /* FIXME: these next two specifically specify 32/64 bit
2269 toc entries. We don't support them today. Is this
2270 the right way to say that? */
252b5132
RH		 2271 toc_reloc = BFD_RELOC_UNUSED;
2272 as_bad (_("Unimplemented toc32 expression modifier"));
2273 break;
2274 case must_be_64:
99a814a1 2275 /* FIXME: see above. */
252b5132
RH		 2276 toc_reloc = BFD_RELOC_UNUSED;
2277 as_bad (_("Unimplemented toc64 expression modifier"));
2278 break;
2279 default:
bc805888 2280 fprintf (stderr,
99a814a1
AM		 2281 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2282 toc_kind);
bc805888 2283 abort ();
252b5132
RH		 2284 break;
2285 }
2286
2287 /* We need to generate a fixup for this expression. */
2288 if (fc >= MAX_INSN_FIXUPS)
2289 as_fatal (_("too many fixups"));
2290
2291 fixups[fc].reloc = toc_reloc;
2292 fixups[fc].exp = ex;
2293 fixups[fc].opindex = *opindex_ptr;
2294 ++fc;
2295
99a814a1
AM		 2296 /* Ok. We've set up the fixup for the instruction. Now make it
2297 look like the constant 0 was found here. */
252b5132
RH		 2298 ex.X_unsigned = 1;
2299 ex.X_op = O_constant;
2300 ex.X_add_number = 0;
2301 ex.X_add_symbol = NULL;
2302 ex.X_op_symbol = NULL;
2303 }
2304
2305 else
2306#endif /* TE_PE */
2307 {
2308 if (! register_name (&ex))
2309 {
2310 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2311 cr_operand = TRUE;
252b5132 2312 expression (&ex);
b34976b6 2313 cr_operand = FALSE;
252b5132
RH		 2314 }
2315 }
2316
2317 str = input_line_pointer;
2318 input_line_pointer = hold;
2319
2320 if (ex.X_op == O_illegal)
2321 as_bad (_("illegal operand"));
2322 else if (ex.X_op == O_absent)
2323 as_bad (_("missing operand"));
2324 else if (ex.X_op == O_register)
2325 {
2326 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2327 (char *) NULL, 0);
2328 }
2329 else if (ex.X_op == O_constant)
2330 {
2331#ifdef OBJ_ELF
81d4177b 2332 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2333 char *orig_str = str;
2334
2335 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2336 switch (reloc)
2337 {
2338 default:
2339 str = orig_str;
2340 break;
2341
2342 case BFD_RELOC_LO16:
2343 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2344 something which cleared it, we always produce a
2345 signed value. */
2346 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2347 ex.X_add_number &= 0xffff;
2348 else
0baf16f2 2349 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2350 break;
2351
2352 case BFD_RELOC_HI16:
0baf16f2
AM		 2353 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2354 ex.X_add_number = PPC_HI (ex.X_add_number);
2355 else
2356 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2357 break;
2358
2359 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2360 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2361 ex.X_add_number = PPC_HA (ex.X_add_number);
2362 else
2363 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2364 break;
2365
0baf16f2
AM		 2366 case BFD_RELOC_PPC64_HIGHER:
2367 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2368 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2369 else
2370 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2371 break;
2372
2373 case BFD_RELOC_PPC64_HIGHER_S:
2374 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2375 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2376 else
2377 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2378 break;
0baf16f2
AM		 2379
2380 case BFD_RELOC_PPC64_HIGHEST:
2381 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2382 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2383 else
2384 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2385 break;
2386
2387 case BFD_RELOC_PPC64_HIGHEST_S:
2388 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2389 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2390 else
2391 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2392 break;
252b5132 2393 }
0baf16f2 2394#endif /* OBJ_ELF */
252b5132
RH		 2395 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2396 (char *) NULL, 0);
2397 }
2398#ifdef OBJ_ELF
2399 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2400 {
cdba85ec
AM		 2401 /* Some TLS tweaks. */
2402 switch (reloc)
2403 {
2404 default:
2405 break;
2406 case BFD_RELOC_PPC_TLS:
2407 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2408 (char *) NULL, 0);
2409 break;
2410 /* We'll only use the 32 (or 64) bit form of these relocations
2411 in constants. Instructions get the 16 bit form. */
2412 case BFD_RELOC_PPC_DTPREL:
2413 reloc = BFD_RELOC_PPC_DTPREL16;
2414 break;
2415 case BFD_RELOC_PPC_TPREL:
2416 reloc = BFD_RELOC_PPC_TPREL16;
2417 break;
2418 }
2419
99a814a1
AM		 2420 /* For the absolute forms of branches, convert the PC
2421 relative form back into the absolute. */
252b5132
RH		 2422 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2423 {
2424 switch (reloc)
2425 {
2426 case BFD_RELOC_PPC_B26:
2427 reloc = BFD_RELOC_PPC_BA26;
2428 break;
2429 case BFD_RELOC_PPC_B16:
2430 reloc = BFD_RELOC_PPC_BA16;
2431 break;
2432 case BFD_RELOC_PPC_B16_BRTAKEN:
2433 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2434 break;
2435 case BFD_RELOC_PPC_B16_BRNTAKEN:
2436 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2437 break;
2438 default:
2439 break;
2440 }
2441 }
2442
2b3c4602 2443 if (ppc_obj64
0baf16f2
AM		 2444 && (operand->flags & PPC_OPERAND_DS) != 0)
2445 {
2446 switch (reloc)
2447 {
2448 case BFD_RELOC_16:
2449 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2450 break;
2451 case BFD_RELOC_LO16:
2452 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2453 break;
2454 case BFD_RELOC_16_GOTOFF:
2455 reloc = BFD_RELOC_PPC64_GOT16_DS;
2456 break;
2457 case BFD_RELOC_LO16_GOTOFF:
2458 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2459 break;
2460 case BFD_RELOC_LO16_PLTOFF:
2461 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2462 break;
1cfc59d5 2463 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2464 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2465 break;
2466 case BFD_RELOC_LO16_BASEREL:
2467 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2468 break;
2469 case BFD_RELOC_PPC_TOC16:
2470 reloc = BFD_RELOC_PPC64_TOC16_DS;
2471 break;
2472 case BFD_RELOC_PPC64_TOC16_LO:
2473 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2474 break;
2475 case BFD_RELOC_PPC64_PLTGOT16:
2476 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2477 break;
2478 case BFD_RELOC_PPC64_PLTGOT16_LO:
2479 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2480 break;
cdba85ec
AM		 2481 case BFD_RELOC_PPC_DTPREL16:
2482 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2483 break;
2484 case BFD_RELOC_PPC_DTPREL16_LO:
2485 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2486 break;
2487 case BFD_RELOC_PPC_TPREL16:
2488 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2489 break;
2490 case BFD_RELOC_PPC_TPREL16_LO:
2491 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2492 break;
2493 case BFD_RELOC_PPC_GOT_DTPREL16:
2494 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2495 case BFD_RELOC_PPC_GOT_TPREL16:
2496 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2497 break;
0baf16f2
AM		 2498 default:
2499 as_bad (_("unsupported relocation for DS offset field"));
2500 break;
2501 }
2502 }
2503
252b5132
RH		 2504 /* We need to generate a fixup for this expression. */
2505 if (fc >= MAX_INSN_FIXUPS)
2506 as_fatal (_("too many fixups"));
2507 fixups[fc].exp = ex;
2508 fixups[fc].opindex = 0;
2509 fixups[fc].reloc = reloc;
2510 ++fc;
2511 }
2512#endif /* OBJ_ELF */
2513
2514 else
2515 {
2516 /* We need to generate a fixup for this expression. */
2517 if (fc >= MAX_INSN_FIXUPS)
2518 as_fatal (_("too many fixups"));
2519 fixups[fc].exp = ex;
2520 fixups[fc].opindex = *opindex_ptr;
2521 fixups[fc].reloc = BFD_RELOC_UNUSED;
2522 ++fc;
2523 }
2524
2525 if (need_paren)
2526 {
2527 endc = ')';
2528 need_paren = 0;
2529 }
2530 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2531 {
2532 endc = '(';
2533 need_paren = 1;
2534 }
2535 else
2536 endc = ',';
2537
2538 /* The call to expression should have advanced str past any
2539 whitespace. */
2540 if (*str != endc
2541 && (endc != ',' || *str != '\0'))
2542 {
2543 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2544 break;
2545 }
2546
2547 if (*str != '\0')
2548 ++str;
2549 }
2550
3882b010 2551 while (ISSPACE (*str))
252b5132
RH		 2552 ++str;
2553
2554 if (*str != '\0')
2555 as_bad (_("junk at end of line: `%s'"), str);
2556
dc1d03fc 2557#ifdef OBJ_ELF
6a0c61b7
EZ		 2558 /* Do we need/want a APUinfo section? */
2559 if (ppc_cpu & (PPC_OPCODE_SPE
2560 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2561 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2562 | PPC_OPCODE_RFMCI))
2563 {
2564 /* These are all version "1". */
2565 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2566 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2567 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2568 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2569 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2570 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2571 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2572 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2573 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2574 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2575 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2576 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2577 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2578 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2579 }
dc1d03fc 2580#endif
6a0c61b7 2581
252b5132
RH		 2582 /* Write out the instruction. */
2583 f = frag_more (4);
2584 md_number_to_chars (f, insn, 4);
2585
5d6f4f16
GK		 2586#ifdef OBJ_ELF
2587 dwarf2_emit_insn (4);
2588#endif
2589
252b5132
RH		 2590 /* Create any fixups. At this point we do not use a
2591 bfd_reloc_code_real_type, but instead just use the
2592 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2593 handle fixups for any operand type, although that is admittedly
2594 not a very exciting feature. We pick a BFD reloc type in
94f592af 2595 md_apply_fix3. */
252b5132
RH		 2596 for (i = 0; i < fc; i++)
2597 {
2598 const struct powerpc_operand *operand;
2599
2600 operand = &powerpc_operands[fixups[i].opindex];
2601 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2602 {
99a814a1 2603 reloc_howto_type *reloc_howto;
252b5132
RH		 2604 int size;
2605 int offset;
2606 fixS *fixP;
2607
99a814a1 2608 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2609 if (!reloc_howto)
2610 abort ();
2611
2612 size = bfd_get_reloc_size (reloc_howto);
2613 offset = target_big_endian ? (4 - size) : 0;
2614
2615 if (size < 1 || size > 4)
bc805888 2616 abort ();
252b5132 2617
99a814a1
AM		 2618 fixP = fix_new_exp (frag_now,
2619 f - frag_now->fr_literal + offset,
2620 size,
2621 &fixups[i].exp,
2622 reloc_howto->pc_relative,
252b5132
RH		 2623 fixups[i].reloc);
2624
2625 /* Turn off complaints that the addend is too large for things like
2626 foo+100000@ha. */
2627 switch (fixups[i].reloc)
2628 {
2629 case BFD_RELOC_16_GOTOFF:
2630 case BFD_RELOC_PPC_TOC16:
2631 case BFD_RELOC_LO16:
2632 case BFD_RELOC_HI16:
2633 case BFD_RELOC_HI16_S:
0baf16f2 2634#ifdef OBJ_ELF
0baf16f2
AM		 2635 case BFD_RELOC_PPC64_HIGHER:
2636 case BFD_RELOC_PPC64_HIGHER_S:
2637 case BFD_RELOC_PPC64_HIGHEST:
2638 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2639#endif
252b5132
RH		 2640 fixP->fx_no_overflow = 1;
2641 break;
2642 default:
2643 break;
2644 }
2645 }
2646 else
99a814a1
AM		 2647 fix_new_exp (frag_now,
2648 f - frag_now->fr_literal,
2649 4,
252b5132
RH		 2650 &fixups[i].exp,
2651 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2652 ((bfd_reloc_code_real_type)
99a814a1 2653 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2654 }
2655}
2656
2657/* Handle a macro. Gather all the operands, transform them as
2658 described by the macro, and call md_assemble recursively. All the
2659 operands are separated by commas; we don't accept parentheses
2660 around operands here. */
2661
2662static void
2663ppc_macro (str, macro)
2664 char *str;
2665 const struct powerpc_macro *macro;
2666{
2667 char *operands[10];
2668 unsigned int count;
2669 char *s;
2670 unsigned int len;
2671 const char *format;
2672 int arg;
2673 char *send;
2674 char *complete;
2675
2676 /* Gather the users operands into the operands array. */
2677 count = 0;
2678 s = str;
2679 while (1)
2680 {
2681 if (count >= sizeof operands / sizeof operands[0])
2682 break;
2683 operands[count++] = s;
2684 s = strchr (s, ',');
2685 if (s == (char *) NULL)
2686 break;
2687 *s++ = '\0';
81d4177b 2688 }
252b5132
RH		 2689
2690 if (count != macro->operands)
2691 {
2692 as_bad (_("wrong number of operands"));
2693 return;
2694 }
2695
2696 /* Work out how large the string must be (the size is unbounded
2697 because it includes user input). */
2698 len = 0;
2699 format = macro->format;
2700 while (*format != '\0')
2701 {
2702 if (*format != '%')
2703 {
2704 ++len;
2705 ++format;
2706 }
2707 else
2708 {
2709 arg = strtol (format + 1, &send, 10);
2710 know (send != format && arg >= 0 && arg < count);
2711 len += strlen (operands[arg]);
2712 format = send;
2713 }
2714 }
2715
2716 /* Put the string together. */
2717 complete = s = (char *) alloca (len + 1);
2718 format = macro->format;
2719 while (*format != '\0')
2720 {
2721 if (*format != '%')
2722 *s++ = *format++;
2723 else
2724 {
2725 arg = strtol (format + 1, &send, 10);
2726 strcpy (s, operands[arg]);
2727 s += strlen (s);
2728 format = send;
2729 }
2730 }
2731 *s = '\0';
2732
2733 /* Assemble the constructed instruction. */
2734 md_assemble (complete);
81d4177b 2735}
252b5132
RH		 2736\f
2737#ifdef OBJ_ELF
99a814a1 2738/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2739
2740int
2741ppc_section_letter (letter, ptr_msg)
2742 int letter;
2743 char **ptr_msg;
2744{
2745 if (letter == 'e')
2746 return SHF_EXCLUDE;
2747
13ae64f3 2748 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
252b5132
RH		 2749 return 0;
2750}
2751
2752int
9de8d8f1
RH		 2753ppc_section_word (str, len)
2754 char *str;
2755 size_t len;
252b5132 2756{
9de8d8f1
RH		 2757 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2758 return SHF_EXCLUDE;
252b5132 2759
9de8d8f1 2760 return -1;
252b5132
RH		 2761}
2762
2763int
9de8d8f1
RH		 2764ppc_section_type (str, len)
2765 char *str;
2766 size_t len;
252b5132 2767{
9de8d8f1
RH		 2768 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2769 return SHT_ORDERED;
252b5132 2770
9de8d8f1 2771 return -1;
252b5132
RH		 2772}
2773
2774int
2775ppc_section_flags (flags, attr, type)
2776 int flags;
2777 int attr;
2778 int type;
2779{
2780 if (type == SHT_ORDERED)
2781 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2782
2783 if (attr & SHF_EXCLUDE)
2784 flags |= SEC_EXCLUDE;
2785
2786 return flags;
2787}
2788#endif /* OBJ_ELF */
2789
2790\f
2791/* Pseudo-op handling. */
2792
2793/* The .byte pseudo-op. This is similar to the normal .byte
2794 pseudo-op, but it can also take a single ASCII string. */
2795
2796static void
2797ppc_byte (ignore)
92161534 2798 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2799{
2800 if (*input_line_pointer != '\"')
2801 {
2802 cons (1);
2803 return;
2804 }
2805
2806 /* Gather characters. A real double quote is doubled. Unusual
2807 characters are not permitted. */
2808 ++input_line_pointer;
2809 while (1)
2810 {
2811 char c;
2812
2813 c = *input_line_pointer++;
2814
2815 if (c == '\"')
2816 {
2817 if (*input_line_pointer != '\"')
2818 break;
2819 ++input_line_pointer;
2820 }
2821
2822 FRAG_APPEND_1_CHAR (c);
2823 }
2824
2825 demand_empty_rest_of_line ();
2826}
2827\f
2828#ifdef OBJ_XCOFF
2829
2830/* XCOFF specific pseudo-op handling. */
2831
2832/* This is set if we are creating a .stabx symbol, since we don't want
2833 to handle symbol suffixes for such symbols. */
b34976b6 2834static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2835
2836/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2837 symbols in the .bss segment as though they were local common
1ad63b2f
TR		 2838 symbols, and uses a different smclas. The native Aix 4.3.3 assember
2839 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2840
2841static void
2842ppc_comm (lcomm)
2843 int lcomm;
2844{
2845 asection *current_seg = now_seg;
2846 subsegT current_subseg = now_subseg;
2847 char *name;
2848 char endc;
2849 char *end_name;
2850 offsetT size;
2851 offsetT align;
2852 symbolS *lcomm_sym = NULL;
2853 symbolS *sym;
2854 char *pfrag;
2855
2856 name = input_line_pointer;
2857 endc = get_symbol_end ();
2858 end_name = input_line_pointer;
2859 *end_name = endc;
2860
2861 if (*input_line_pointer != ',')
2862 {
2863 as_bad (_("missing size"));
2864 ignore_rest_of_line ();
2865 return;
2866 }
2867 ++input_line_pointer;
2868
2869 size = get_absolute_expression ();
2870 if (size < 0)
2871 {
2872 as_bad (_("negative size"));
2873 ignore_rest_of_line ();
2874 return;
2875 }
2876
2877 if (! lcomm)
2878 {
2879 /* The third argument to .comm is the alignment. */
2880 if (*input_line_pointer != ',')
1ad63b2f 2881 align = 2;
252b5132
RH		 2882 else
2883 {
2884 ++input_line_pointer;
2885 align = get_absolute_expression ();
2886 if (align <= 0)
2887 {
2888 as_warn (_("ignoring bad alignment"));
1ad63b2f 2889 align = 2;
252b5132
RH		 2890 }
2891 }
2892 }
2893 else
2894 {
2895 char *lcomm_name;
2896 char lcomm_endc;
2897
1ad63b2f 2898 if (size <= 4)
252b5132
RH		 2899 align = 2;
2900 else
2901 align = 3;
2902
2903 /* The third argument to .lcomm appears to be the real local
2904 common symbol to create. References to the symbol named in
2905 the first argument are turned into references to the third
2906 argument. */
2907 if (*input_line_pointer != ',')
2908 {
2909 as_bad (_("missing real symbol name"));
2910 ignore_rest_of_line ();
2911 return;
2912 }
2913 ++input_line_pointer;
2914
2915 lcomm_name = input_line_pointer;
2916 lcomm_endc = get_symbol_end ();
81d4177b 2917
252b5132
RH		 2918 lcomm_sym = symbol_find_or_make (lcomm_name);
2919
2920 *input_line_pointer = lcomm_endc;
2921 }
2922
2923 *end_name = '\0';
2924 sym = symbol_find_or_make (name);
2925 *end_name = endc;
2926
2927 if (S_IS_DEFINED (sym)
2928 || S_GET_VALUE (sym) != 0)
2929 {
2930 as_bad (_("attempt to redefine symbol"));
2931 ignore_rest_of_line ();
2932 return;
2933 }
81d4177b 2934
252b5132 2935 record_alignment (bss_section, align);
81d4177b 2936
252b5132
RH		 2937 if (! lcomm
2938 || ! S_IS_DEFINED (lcomm_sym))
2939 {
2940 symbolS *def_sym;
2941 offsetT def_size;
2942
2943 if (! lcomm)
2944 {
2945 def_sym = sym;
2946 def_size = size;
2947 S_SET_EXTERNAL (sym);
2948 }
2949 else
2950 {
809ffe0d 2951 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 2952 def_sym = lcomm_sym;
2953 def_size = 0;
2954 }
2955
2956 subseg_set (bss_section, 1);
2957 frag_align (align, 0, 0);
81d4177b 2958
809ffe0d 2959 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 2960 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
2961 def_size, (char *) NULL);
2962 *pfrag = 0;
2963 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 2964 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 2965 }
2966 else if (lcomm)
2967 {
2968 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 2969 symbol_get_frag (lcomm_sym)->fr_offset =
2970 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 2971 &~ ((1 << align) - 1));
809ffe0d
ILT		 2972 if (align > symbol_get_tc (lcomm_sym)->align)
2973 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 2974 }
2975
2976 if (lcomm)
2977 {
2978 /* Make sym an offset from lcomm_sym. */
2979 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 2980 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
2981 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
2982 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 2983 }
2984
2985 subseg_set (current_seg, current_subseg);
2986
2987 demand_empty_rest_of_line ();
2988}
2989
2990/* The .csect pseudo-op. This switches us into a different
2991 subsegment. The first argument is a symbol whose value is the
2992 start of the .csect. In COFF, csect symbols get special aux
2993 entries defined by the x_csect field of union internal_auxent. The
2994 optional second argument is the alignment (the default is 2). */
2995
2996static void
2997ppc_csect (ignore)
5480ccf3 2998 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2999{
3000 char *name;
3001 char endc;
3002 symbolS *sym;
3003
3004 name = input_line_pointer;
3005 endc = get_symbol_end ();
81d4177b 3006
252b5132
RH		 3007 sym = symbol_find_or_make (name);
3008
3009 *input_line_pointer = endc;
3010
3011 if (S_GET_NAME (sym)[0] == '\0')
3012 {
3013 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3014 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3015 }
3016
3017 ppc_change_csect (sym);
3018
3019 if (*input_line_pointer == ',')
3020 {
3021 ++input_line_pointer;
809ffe0d 3022 symbol_get_tc (sym)->align = get_absolute_expression ();
252b5132
RH		 3023 }
3024
3025 demand_empty_rest_of_line ();
3026}
3027
3028/* Change to a different csect. */
3029
3030static void
3031ppc_change_csect (sym)
3032 symbolS *sym;
3033{
3034 if (S_IS_DEFINED (sym))
809ffe0d 3035 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3036 else
3037 {
3038 symbolS **list_ptr;
3039 int after_toc;
3040 int hold_chunksize;
3041 symbolS *list;
3042
3043 /* This is a new csect. We need to look at the symbol class to
3044 figure out whether it should go in the text section or the
3045 data section. */
3046 after_toc = 0;
809ffe0d 3047 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3048 {
3049 case XMC_PR:
3050 case XMC_RO:
3051 case XMC_DB:
3052 case XMC_GL:
3053 case XMC_XO:
3054 case XMC_SV:
3055 case XMC_TI:
3056 case XMC_TB:
3057 S_SET_SEGMENT (sym, text_section);
809ffe0d 3058 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3059 ++ppc_text_subsegment;
3060 list_ptr = &ppc_text_csects;
3061 break;
3062 case XMC_RW:
3063 case XMC_TC0:
3064 case XMC_TC:
3065 case XMC_DS:
3066 case XMC_UA:
3067 case XMC_BS:
3068 case XMC_UC:
3069 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3070 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3071 == ppc_data_subsegment))
252b5132
RH		 3072 after_toc = 1;
3073 S_SET_SEGMENT (sym, data_section);
809ffe0d 3074 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3075 ++ppc_data_subsegment;
3076 list_ptr = &ppc_data_csects;
3077 break;
3078 default:
3079 abort ();
3080 }
3081
3082 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3083 changing subsegments, so that we don't use a lot of memory
3084 space for what may be a small section. */
252b5132
RH		 3085 hold_chunksize = chunksize;
3086 chunksize = 64;
3087
809ffe0d
ILT		 3088 subseg_new (segment_name (S_GET_SEGMENT (sym)),
3089 symbol_get_tc (sym)->subseg);
252b5132
RH		 3090
3091 chunksize = hold_chunksize;
3092
3093 if (after_toc)
3094 ppc_after_toc_frag = frag_now;
3095
809ffe0d 3096 symbol_set_frag (sym, frag_now);
252b5132
RH		 3097 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3098
b4f96c78 3099 symbol_get_tc (sym)->align = 2;
809ffe0d
ILT		 3100 symbol_get_tc (sym)->output = 1;
3101 symbol_get_tc (sym)->within = sym;
81d4177b 3102
252b5132 3103 for (list = *list_ptr;
809ffe0d
ILT		 3104 symbol_get_tc (list)->next != (symbolS *) NULL;
3105 list = symbol_get_tc (list)->next)
252b5132 3106 ;
809ffe0d 3107 symbol_get_tc (list)->next = sym;
81d4177b 3108
252b5132 3109 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3110 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3111 &symbol_lastP);
252b5132
RH		 3112 }
3113
3114 ppc_current_csect = sym;
3115}
3116
3117/* This function handles the .text and .data pseudo-ops. These
3118 pseudo-ops aren't really used by XCOFF; we implement them for the
3119 convenience of people who aren't used to XCOFF. */
3120
3121static void
3122ppc_section (type)
3123 int type;
3124{
3125 const char *name;
3126 symbolS *sym;
3127
3128 if (type == 't')
3129 name = ".text[PR]";
3130 else if (type == 'd')
3131 name = ".data[RW]";
3132 else
3133 abort ();
3134
3135 sym = symbol_find_or_make (name);
3136
3137 ppc_change_csect (sym);
3138
3139 demand_empty_rest_of_line ();
3140}
3141
3142/* This function handles the .section pseudo-op. This is mostly to
3143 give an error, since XCOFF only supports .text, .data and .bss, but
3144 we do permit the user to name the text or data section. */
3145
3146static void
3147ppc_named_section (ignore)
5480ccf3 3148 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3149{
3150 char *user_name;
3151 const char *real_name;
3152 char c;
3153 symbolS *sym;
3154
3155 user_name = input_line_pointer;
3156 c = get_symbol_end ();
3157
3158 if (strcmp (user_name, ".text") == 0)
3159 real_name = ".text[PR]";
3160 else if (strcmp (user_name, ".data") == 0)
3161 real_name = ".data[RW]";
3162 else
3163 {
3164 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3165 *input_line_pointer = c;
3166 ignore_rest_of_line ();
3167 return;
3168 }
3169
3170 *input_line_pointer = c;
3171
3172 sym = symbol_find_or_make (real_name);
3173
3174 ppc_change_csect (sym);
3175
3176 demand_empty_rest_of_line ();
3177}
3178
3179/* The .extern pseudo-op. We create an undefined symbol. */
3180
3181static void
3182ppc_extern (ignore)
5480ccf3 3183 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3184{
3185 char *name;
3186 char endc;
3187
3188 name = input_line_pointer;
3189 endc = get_symbol_end ();
3190
3191 (void) symbol_find_or_make (name);
3192
3193 *input_line_pointer = endc;
3194
3195 demand_empty_rest_of_line ();
3196}
3197
3198/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3199
3200static void
3201ppc_lglobl (ignore)
5480ccf3 3202 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3203{
3204 char *name;
3205 char endc;
3206 symbolS *sym;
3207
3208 name = input_line_pointer;
3209 endc = get_symbol_end ();
3210
3211 sym = symbol_find_or_make (name);
3212
3213 *input_line_pointer = endc;
3214
809ffe0d 3215 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3216
3217 demand_empty_rest_of_line ();
3218}
3219
3220/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3221 although I don't know why it bothers. */
3222
3223static void
3224ppc_rename (ignore)
5480ccf3 3225 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3226{
3227 char *name;
3228 char endc;
3229 symbolS *sym;
3230 int len;
3231
3232 name = input_line_pointer;
3233 endc = get_symbol_end ();
3234
3235 sym = symbol_find_or_make (name);
3236
3237 *input_line_pointer = endc;
3238
3239 if (*input_line_pointer != ',')
3240 {
3241 as_bad (_("missing rename string"));
3242 ignore_rest_of_line ();
3243 return;
3244 }
3245 ++input_line_pointer;
3246
809ffe0d 3247 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3248
3249 demand_empty_rest_of_line ();
3250}
3251
3252/* The .stabx pseudo-op. This is similar to a normal .stabs
3253 pseudo-op, but slightly different. A sample is
3254 .stabx "main:F-1",.main,142,0
3255 The first argument is the symbol name to create. The second is the
3256 value, and the third is the storage class. The fourth seems to be
3257 always zero, and I am assuming it is the type. */
3258
3259static void
3260ppc_stabx (ignore)
5480ccf3 3261 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3262{
3263 char *name;
3264 int len;
3265 symbolS *sym;
3266 expressionS exp;
3267
3268 name = demand_copy_C_string (&len);
3269
3270 if (*input_line_pointer != ',')
3271 {
3272 as_bad (_("missing value"));
3273 return;
3274 }
3275 ++input_line_pointer;
3276
b34976b6 3277 ppc_stab_symbol = TRUE;
252b5132 3278 sym = symbol_make (name);
b34976b6 3279 ppc_stab_symbol = FALSE;
252b5132 3280
809ffe0d 3281 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3282
3283 (void) expression (&exp);
3284
3285 switch (exp.X_op)
3286 {
3287 case O_illegal:
3288 case O_absent:
3289 case O_big:
3290 as_bad (_("illegal .stabx expression; zero assumed"));
3291 exp.X_add_number = 0;
3292 /* Fall through. */
3293 case O_constant:
3294 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3295 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3296 break;
3297
3298 case O_symbol:
3299 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3300 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3301 else
3302 {
3303 S_SET_VALUE (sym,
3304 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3305 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3306 }
3307 break;
3308
3309 default:
3310 /* The value is some complex expression. This will probably
99a814a1
AM		 3311 fail at some later point, but this is probably the right
3312 thing to do here. */
809ffe0d 3313 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3314 break;
3315 }
3316
3317 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3318 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3319
3320 if (*input_line_pointer != ',')
3321 {
3322 as_bad (_("missing class"));
3323 return;
3324 }
3325 ++input_line_pointer;
3326
3327 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3328
3329 if (*input_line_pointer != ',')
3330 {
3331 as_bad (_("missing type"));
3332 return;
3333 }
3334 ++input_line_pointer;
3335
3336 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3337
809ffe0d 3338 symbol_get_tc (sym)->output = 1;
252b5132 3339
6877bb43 3340 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3341
809ffe0d 3342 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3343
41ea10b1 3344 /* In this case :
99a814a1 3345
41ea10b1
TR		 3346 .bs name
3347 .stabx "z",arrays_,133,0
3348 .es
99a814a1 3349
41ea10b1 3350 .comm arrays_,13768,3
99a814a1 3351
41ea10b1
TR		 3352 resolve_symbol_value will copy the exp's "within" into sym's when the
3353 offset is 0. Since this seems to be corner case problem,
3354 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3355 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3356
3357 if (exp.X_op == O_symbol)
41ea10b1
TR		 3358 {
3359 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3360 }
6877bb43 3361 }
99a814a1 3362
252b5132
RH		 3363 if (exp.X_op != O_symbol
3364 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3365 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3366 ppc_frob_label (sym);
3367 else
3368 {
3369 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3370 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3371 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3372 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3373 }
3374
3375 demand_empty_rest_of_line ();
3376}
3377
3378/* The .function pseudo-op. This takes several arguments. The first
3379 argument seems to be the external name of the symbol. The second
3380 argment seems to be the label for the start of the function. gcc
3381 uses the same name for both. I have no idea what the third and
3382 fourth arguments are meant to be. The optional fifth argument is
3383 an expression for the size of the function. In COFF this symbol
3384 gets an aux entry like that used for a csect. */
3385
3386static void
3387ppc_function (ignore)
5480ccf3 3388 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3389{
3390 char *name;
3391 char endc;
3392 char *s;
3393 symbolS *ext_sym;
3394 symbolS *lab_sym;
3395
3396 name = input_line_pointer;
3397 endc = get_symbol_end ();
3398
3399 /* Ignore any [PR] suffix. */
3400 name = ppc_canonicalize_symbol_name (name);
3401 s = strchr (name, '[');
3402 if (s != (char *) NULL
3403 && strcmp (s + 1, "PR]") == 0)
3404 *s = '\0';
3405
3406 ext_sym = symbol_find_or_make (name);
3407
3408 *input_line_pointer = endc;
3409
3410 if (*input_line_pointer != ',')
3411 {
3412 as_bad (_("missing symbol name"));
3413 ignore_rest_of_line ();
3414 return;
3415 }
3416 ++input_line_pointer;
3417
3418 name = input_line_pointer;
3419 endc = get_symbol_end ();
3420
3421 lab_sym = symbol_find_or_make (name);
3422
3423 *input_line_pointer = endc;
3424
3425 if (ext_sym != lab_sym)
3426 {
809ffe0d
ILT		 3427 expressionS exp;
3428
3429 exp.X_op = O_symbol;
3430 exp.X_add_symbol = lab_sym;
3431 exp.X_op_symbol = NULL;
3432 exp.X_add_number = 0;
3433 exp.X_unsigned = 0;
3434 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3435 }
3436
809ffe0d
ILT		 3437 if (symbol_get_tc (ext_sym)->class == -1)
3438 symbol_get_tc (ext_sym)->class = XMC_PR;
3439 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3440
3441 if (*input_line_pointer == ',')
3442 {
3443 expressionS ignore;
3444
3445 /* Ignore the third argument. */
3446 ++input_line_pointer;
3447 expression (&ignore);
3448 if (*input_line_pointer == ',')
3449 {
3450 /* Ignore the fourth argument. */
3451 ++input_line_pointer;
3452 expression (&ignore);
3453 if (*input_line_pointer == ',')
3454 {
3455 /* The fifth argument is the function size. */
3456 ++input_line_pointer;
809ffe0d
ILT		 3457 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3458 absolute_section,
3459 (valueT) 0,
3460 &zero_address_frag);
3461 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3462 }
3463 }
3464 }
3465
3466 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3467 SF_SET_FUNCTION (ext_sym);
3468 SF_SET_PROCESS (ext_sym);
3469 coff_add_linesym (ext_sym);
3470
3471 demand_empty_rest_of_line ();
3472}
3473
3474/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3475 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3476 with the correct line number */
5d6255fe 3477
8642cce8 3478static symbolS *saved_bi_sym = 0;
252b5132
RH		 3479
3480static void
3481ppc_bf (ignore)
5480ccf3 3482 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3483{
3484 symbolS *sym;
3485
3486 sym = symbol_make (".bf");
3487 S_SET_SEGMENT (sym, text_section);
809ffe0d 3488 symbol_set_frag (sym, frag_now);
252b5132
RH		 3489 S_SET_VALUE (sym, frag_now_fix ());
3490 S_SET_STORAGE_CLASS (sym, C_FCN);
3491
3492 coff_line_base = get_absolute_expression ();
3493
3494 S_SET_NUMBER_AUXILIARY (sym, 1);
3495 SA_SET_SYM_LNNO (sym, coff_line_base);
3496
8642cce8 3497 /* Line number for bi. */
5d6255fe 3498 if (saved_bi_sym)
8642cce8
TR		 3499 {
3500 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3501 saved_bi_sym = 0;
3502 }
5d6255fe 3503
8642cce8 3504
809ffe0d 3505 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3506
3507 ppc_frob_label (sym);
3508
3509 demand_empty_rest_of_line ();
3510}
3511
3512/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3513 ".ef", except that the line number is absolute, not relative to the
3514 most recent ".bf" symbol. */
3515
3516static void
3517ppc_ef (ignore)
5480ccf3 3518 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3519{
3520 symbolS *sym;
3521
3522 sym = symbol_make (".ef");
3523 S_SET_SEGMENT (sym, text_section);
809ffe0d 3524 symbol_set_frag (sym, frag_now);
252b5132
RH		 3525 S_SET_VALUE (sym, frag_now_fix ());
3526 S_SET_STORAGE_CLASS (sym, C_FCN);
3527 S_SET_NUMBER_AUXILIARY (sym, 1);
3528 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3529 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3530
3531 ppc_frob_label (sym);
3532
3533 demand_empty_rest_of_line ();
3534}
3535
3536/* The .bi and .ei pseudo-ops. These take a string argument and
3537 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3538 the symbol list. The value of .bi will be know when the next .bf
3539 is encountered. */
252b5132
RH		 3540
3541static void
3542ppc_biei (ei)
3543 int ei;
3544{
3545 static symbolS *last_biei;
3546
3547 char *name;
3548 int len;
3549 symbolS *sym;
3550 symbolS *look;
3551
3552 name = demand_copy_C_string (&len);
3553
3554 /* The value of these symbols is actually file offset. Here we set
3555 the value to the index into the line number entries. In
3556 ppc_frob_symbols we set the fix_line field, which will cause BFD
3557 to do the right thing. */
3558
3559 sym = symbol_make (name);
3560 /* obj-coff.c currently only handles line numbers correctly in the
3561 .text section. */
3562 S_SET_SEGMENT (sym, text_section);
3563 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3564 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3565
3566 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3567 symbol_get_tc (sym)->output = 1;
81d4177b 3568
8642cce8 3569 /* Save bi. */
5d6255fe 3570 if (ei)
8642cce8
TR		 3571 saved_bi_sym = 0;
3572 else
3573 saved_bi_sym = sym;
3574
252b5132
RH		 3575 for (look = last_biei ? last_biei : symbol_rootP;
3576 (look != (symbolS *) NULL
3577 && (S_GET_STORAGE_CLASS (look) == C_FILE
3578 || S_GET_STORAGE_CLASS (look) == C_BINCL
3579 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3580 look = symbol_next (look))
3581 ;
3582 if (look != (symbolS *) NULL)
3583 {
3584 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3585 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3586 last_biei = sym;
3587 }
3588
3589 demand_empty_rest_of_line ();
3590}
3591
3592/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3593 There is one argument, which is a csect symbol. The value of the
3594 .bs symbol is the index of this csect symbol. */
3595
3596static void
3597ppc_bs (ignore)
5480ccf3 3598 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3599{
3600 char *name;
3601 char endc;
3602 symbolS *csect;
3603 symbolS *sym;
3604
3605 if (ppc_current_block != NULL)
3606 as_bad (_("nested .bs blocks"));
3607
3608 name = input_line_pointer;
3609 endc = get_symbol_end ();
3610
3611 csect = symbol_find_or_make (name);
3612
3613 *input_line_pointer = endc;
3614
3615 sym = symbol_make (".bs");
3616 S_SET_SEGMENT (sym, now_seg);
3617 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3618 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3619 symbol_get_tc (sym)->output = 1;
252b5132 3620
809ffe0d 3621 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3622
3623 ppc_frob_label (sym);
3624
3625 ppc_current_block = sym;
3626
3627 demand_empty_rest_of_line ();
3628}
3629
3630/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3631
3632static void
3633ppc_es (ignore)
5480ccf3 3634 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3635{
3636 symbolS *sym;
3637
3638 if (ppc_current_block == NULL)
3639 as_bad (_(".es without preceding .bs"));
3640
3641 sym = symbol_make (".es");
3642 S_SET_SEGMENT (sym, now_seg);
3643 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3644 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3645 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3646
3647 ppc_frob_label (sym);
3648
3649 ppc_current_block = NULL;
3650
3651 demand_empty_rest_of_line ();
3652}
3653
3654/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3655 line number. */
3656
3657static void
3658ppc_bb (ignore)
5480ccf3 3659 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3660{
3661 symbolS *sym;
3662
3663 sym = symbol_make (".bb");
3664 S_SET_SEGMENT (sym, text_section);
809ffe0d 3665 symbol_set_frag (sym, frag_now);
252b5132
RH		 3666 S_SET_VALUE (sym, frag_now_fix ());
3667 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3668
3669 S_SET_NUMBER_AUXILIARY (sym, 1);
3670 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3671
809ffe0d 3672 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3673
3674 SF_SET_PROCESS (sym);
3675
3676 ppc_frob_label (sym);
3677
3678 demand_empty_rest_of_line ();
3679}
3680
3681/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3682 line number. */
3683
3684static void
3685ppc_eb (ignore)
5480ccf3 3686 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3687{
3688 symbolS *sym;
3689
3690 sym = symbol_make (".eb");
3691 S_SET_SEGMENT (sym, text_section);
809ffe0d 3692 symbol_set_frag (sym, frag_now);
252b5132
RH		 3693 S_SET_VALUE (sym, frag_now_fix ());
3694 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3695 S_SET_NUMBER_AUXILIARY (sym, 1);
3696 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3697 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3698
3699 SF_SET_PROCESS (sym);
3700
3701 ppc_frob_label (sym);
3702
3703 demand_empty_rest_of_line ();
3704}
3705
3706/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3707 specified name. */
3708
3709static void
3710ppc_bc (ignore)
5480ccf3 3711 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3712{
3713 char *name;
3714 int len;
3715 symbolS *sym;
3716
3717 name = demand_copy_C_string (&len);
3718 sym = symbol_make (name);
3719 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3720 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3721 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3722 S_SET_VALUE (sym, 0);
809ffe0d 3723 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3724
3725 ppc_frob_label (sym);
3726
3727 demand_empty_rest_of_line ();
3728}
3729
3730/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3731
3732static void
3733ppc_ec (ignore)
5480ccf3 3734 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3735{
3736 symbolS *sym;
3737
3738 sym = symbol_make (".ec");
3739 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3740 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3741 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3742 S_SET_VALUE (sym, 0);
809ffe0d 3743 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3744
3745 ppc_frob_label (sym);
3746
3747 demand_empty_rest_of_line ();
3748}
3749
3750/* The .toc pseudo-op. Switch to the .toc subsegment. */
3751
3752static void
3753ppc_toc (ignore)
5480ccf3 3754 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3755{
3756 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3757 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3758 else
3759 {
3760 subsegT subseg;
3761 symbolS *sym;
3762 symbolS *list;
81d4177b 3763
252b5132
RH		 3764 subseg = ppc_data_subsegment;
3765 ++ppc_data_subsegment;
3766
3767 subseg_new (segment_name (data_section), subseg);
3768 ppc_toc_frag = frag_now;
3769
3770 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3771 symbol_set_frag (sym, frag_now);
252b5132
RH		 3772 S_SET_SEGMENT (sym, data_section);
3773 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3774 symbol_get_tc (sym)->subseg = subseg;
3775 symbol_get_tc (sym)->output = 1;
3776 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3777
3778 ppc_toc_csect = sym;
81d4177b 3779
252b5132 3780 for (list = ppc_data_csects;
809ffe0d
ILT		 3781 symbol_get_tc (list)->next != (symbolS *) NULL;
3782 list = symbol_get_tc (list)->next)
252b5132 3783 ;
809ffe0d 3784 symbol_get_tc (list)->next = sym;
252b5132
RH		 3785
3786 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3787 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3788 &symbol_lastP);
252b5132
RH		 3789 }
3790
3791 ppc_current_csect = ppc_toc_csect;
3792
3793 demand_empty_rest_of_line ();
3794}
3795
3796/* The AIX assembler automatically aligns the operands of a .long or
3797 .short pseudo-op, and we want to be compatible. */
3798
3799static void
3800ppc_xcoff_cons (log_size)
3801 int log_size;
3802{
3803 frag_align (log_size, 0, 0);
3804 record_alignment (now_seg, log_size);
3805 cons (1 << log_size);
3806}
3807
3808static void
3809ppc_vbyte (dummy)
5480ccf3 3810 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3811{
3812 expressionS exp;
3813 int byte_count;
3814
3815 (void) expression (&exp);
3816
3817 if (exp.X_op != O_constant)
3818 {
3819 as_bad (_("non-constant byte count"));
3820 return;
3821 }
3822
3823 byte_count = exp.X_add_number;
3824
3825 if (*input_line_pointer != ',')
3826 {
3827 as_bad (_("missing value"));
3828 return;
3829 }
3830
3831 ++input_line_pointer;
3832 cons (byte_count);
3833}
3834
3835#endif /* OBJ_XCOFF */
0baf16f2 3836#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3837\f
3838/* The .tc pseudo-op. This is used when generating either XCOFF or
3839 ELF. This takes two or more arguments.
3840
3841 When generating XCOFF output, the first argument is the name to
3842 give to this location in the toc; this will be a symbol with class
0baf16f2 3843 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3844 this location in the TOC; often there is just one more argument, a
0baf16f2
AM		 3845 relocateable symbol reference. The size of the value to store
3846 depends on target word size. A 32-bit target uses 4-byte values, a
3847 64-bit target uses 8-byte values.
252b5132
RH		 3848
3849 When not generating XCOFF output, the arguments are the same, but
3850 the first argument is simply ignored. */
3851
3852static void
3853ppc_tc (ignore)
92161534 3854 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3855{
3856#ifdef OBJ_XCOFF
3857
3858 /* Define the TOC symbol name. */
3859 {
3860 char *name;
3861 char endc;
3862 symbolS *sym;
3863
3864 if (ppc_toc_csect == (symbolS *) NULL
3865 || ppc_toc_csect != ppc_current_csect)
3866 {
3867 as_bad (_(".tc not in .toc section"));
3868 ignore_rest_of_line ();
3869 return;
3870 }
3871
3872 name = input_line_pointer;
3873 endc = get_symbol_end ();
3874
3875 sym = symbol_find_or_make (name);
3876
3877 *input_line_pointer = endc;
3878
3879 if (S_IS_DEFINED (sym))
3880 {
3881 symbolS *label;
3882
809ffe0d
ILT		 3883 label = symbol_get_tc (ppc_current_csect)->within;
3884 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3885 {
3886 as_bad (_(".tc with no label"));
3887 ignore_rest_of_line ();
3888 return;
3889 }
3890
3891 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3892 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3893 S_SET_VALUE (label, S_GET_VALUE (sym));
3894
3895 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3896 ++input_line_pointer;
3897
3898 return;
3899 }
3900
3901 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3902 symbol_set_frag (sym, frag_now);
252b5132 3903 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3904 symbol_get_tc (sym)->class = XMC_TC;
3905 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3906
3907 ppc_frob_label (sym);
3908 }
3909
0baf16f2
AM		 3910#endif /* OBJ_XCOFF */
3911#ifdef OBJ_ELF
9c7977b3 3912 int align;
252b5132
RH		 3913
3914 /* Skip the TOC symbol name. */
3915 while (is_part_of_name (*input_line_pointer)
3916 || *input_line_pointer == '['
3917 || *input_line_pointer == ']'
3918 || *input_line_pointer == '{'
3919 || *input_line_pointer == '}')
3920 ++input_line_pointer;
3921
0baf16f2 3922 /* Align to a four/eight byte boundary. */
2b3c4602 3923 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 3924 frag_align (align, 0, 0);
3925 record_alignment (now_seg, align);
0baf16f2 3926#endif /* OBJ_ELF */
252b5132
RH		 3927
3928 if (*input_line_pointer != ',')
3929 demand_empty_rest_of_line ();
3930 else
3931 {
3932 ++input_line_pointer;
2b3c4602 3933 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 3934 }
3935}
0baf16f2
AM		 3936
3937/* Pseudo-op .machine. */
15c1449b 3938/* FIXME: `.machine' is a nop for the moment. It would be nice to
2b3c4602 3939 accept this directive on the first line of input and set ppc_obj64
15c1449b
AM		 3940 and the target format accordingly. Unfortunately, the target
3941 format is selected in output-file.c:output_file_create before we
3942 even get to md_begin, so it's not possible without changing
3943 as.c:main. */
0baf16f2
AM		 3944
3945static void
3946ppc_machine (ignore)
3947 int ignore ATTRIBUTE_UNUSED;
3948{
3949 discard_rest_of_line ();
3950}
3951
3952/* See whether a symbol is in the TOC section. */
3953
3954static int
3955ppc_is_toc_sym (sym)
3956 symbolS *sym;
3957{
3958#ifdef OBJ_XCOFF
3959 return symbol_get_tc (sym)->class == XMC_TC;
3960#endif
3961#ifdef OBJ_ELF
3962 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 3963 if (ppc_obj64)
0baf16f2
AM		 3964 return strcmp (sname, ".toc") == 0;
3965 else
3966 return strcmp (sname, ".got") == 0;
3967#endif
3968}
3969#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 3970\f
3971#ifdef TE_PE
3972
99a814a1 3973/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 3974
3975/* Set the current section. */
3976static void
3977ppc_set_current_section (new)
3978 segT new;
3979{
3980 ppc_previous_section = ppc_current_section;
3981 ppc_current_section = new;
3982}
3983
3984/* pseudo-op: .previous
3985 behaviour: toggles the current section with the previous section.
3986 errors: None
99a814a1
AM		 3987 warnings: "No previous section" */
3988
252b5132 3989static void
99a814a1 3990ppc_previous (ignore)
5480ccf3 3991 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3992{
3993 symbolS *tmp;
3994
81d4177b 3995 if (ppc_previous_section == NULL)
252b5132 3996 {
99a814a1 3997 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 3998 return;
3999 }
4000
99a814a1 4001 subseg_set (ppc_previous_section, 0);
252b5132 4002
99a814a1 4003 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4004}
4005
4006/* pseudo-op: .pdata
4007 behaviour: predefined read only data section
b34976b6 4008 double word aligned
252b5132
RH		 4009 errors: None
4010 warnings: None
4011 initial: .section .pdata "adr3"
b34976b6 4012 a - don't know -- maybe a misprint
252b5132
RH		 4013 d - initialized data
4014 r - readable
4015 3 - double word aligned (that would be 4 byte boundary)
4016
4017 commentary:
4018 Tag index tables (also known as the function table) for exception
99a814a1 4019 handling, debugging, etc. */
252b5132 4020
252b5132 4021static void
99a814a1 4022ppc_pdata (ignore)
5480ccf3 4023 int ignore ATTRIBUTE_UNUSED;
252b5132 4024{
81d4177b 4025 if (pdata_section == 0)
252b5132
RH		 4026 {
4027 pdata_section = subseg_new (".pdata", 0);
81d4177b 4028
252b5132
RH		 4029 bfd_set_section_flags (stdoutput, pdata_section,
4030 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4031 | SEC_READONLY | SEC_DATA ));
81d4177b 4032
252b5132
RH		 4033 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4034 }
4035 else
4036 {
99a814a1 4037 pdata_section = subseg_new (".pdata", 0);
252b5132 4038 }
99a814a1 4039 ppc_set_current_section (pdata_section);
252b5132
RH		 4040}
4041
4042/* pseudo-op: .ydata
4043 behaviour: predefined read only data section
b34976b6 4044 double word aligned
252b5132
RH		 4045 errors: None
4046 warnings: None
4047 initial: .section .ydata "drw3"
b34976b6 4048 a - don't know -- maybe a misprint
252b5132
RH		 4049 d - initialized data
4050 r - readable
4051 3 - double word aligned (that would be 4 byte boundary)
4052 commentary:
4053 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4054 debugging, etc. */
4055
252b5132 4056static void
99a814a1 4057ppc_ydata (ignore)
5480ccf3 4058 int ignore ATTRIBUTE_UNUSED;
252b5132 4059{
81d4177b 4060 if (ydata_section == 0)
252b5132
RH		 4061 {
4062 ydata_section = subseg_new (".ydata", 0);
4063 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4064 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4065 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4066
4067 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4068 }
4069 else
4070 {
4071 ydata_section = subseg_new (".ydata", 0);
4072 }
99a814a1 4073 ppc_set_current_section (ydata_section);
252b5132
RH		 4074}
4075
4076/* pseudo-op: .reldata
4077 behaviour: predefined read write data section
b34976b6 4078 double word aligned (4-byte)
252b5132
RH		 4079 FIXME: relocation is applied to it
4080 FIXME: what's the difference between this and .data?
4081 errors: None
4082 warnings: None
4083 initial: .section .reldata "drw3"
4084 d - initialized data
4085 r - readable
4086 w - writeable
4087 3 - double word aligned (that would be 8 byte boundary)
4088
4089 commentary:
4090 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4091 function descriptors, etc. */
4092
252b5132 4093static void
99a814a1 4094ppc_reldata (ignore)
5480ccf3 4095 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4096{
4097 if (reldata_section == 0)
4098 {
4099 reldata_section = subseg_new (".reldata", 0);
4100
4101 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4102 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4103 | SEC_DATA));
252b5132
RH		 4104
4105 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4106 }
4107 else
4108 {
4109 reldata_section = subseg_new (".reldata", 0);
4110 }
99a814a1 4111 ppc_set_current_section (reldata_section);
252b5132
RH		 4112}
4113
4114/* pseudo-op: .rdata
4115 behaviour: predefined read only data section
b34976b6 4116 double word aligned
252b5132
RH		 4117 errors: None
4118 warnings: None
4119 initial: .section .rdata "dr3"
4120 d - initialized data
4121 r - readable
99a814a1
AM		 4122 3 - double word aligned (that would be 4 byte boundary) */
4123
252b5132 4124static void
99a814a1 4125ppc_rdata (ignore)
5480ccf3 4126 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4127{
4128 if (rdata_section == 0)
4129 {
4130 rdata_section = subseg_new (".rdata", 0);
4131 bfd_set_section_flags (stdoutput, rdata_section,
4132 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4133 | SEC_READONLY | SEC_DATA ));
4134
4135 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4136 }
4137 else
4138 {
4139 rdata_section = subseg_new (".rdata", 0);
4140 }
99a814a1 4141 ppc_set_current_section (rdata_section);
252b5132
RH		 4142}
4143
4144/* pseudo-op: .ualong
81d4177b 4145 behaviour: much like .int, with the exception that no alignment is
b34976b6 4146 performed.
252b5132
RH		 4147 FIXME: test the alignment statement
4148 errors: None
99a814a1
AM		 4149 warnings: None */
4150
252b5132 4151static void
99a814a1 4152ppc_ualong (ignore)
5480ccf3 4153 int ignore ATTRIBUTE_UNUSED;
252b5132 4154{
99a814a1
AM		 4155 /* Try for long. */
4156 cons (4);
252b5132
RH		 4157}
4158
4159/* pseudo-op: .znop <symbol name>
4160 behaviour: Issue a nop instruction
b34976b6 4161 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4162 the supplied symbol name.
4163 errors: None
99a814a1
AM		 4164 warnings: Missing symbol name */
4165
252b5132 4166static void
99a814a1 4167ppc_znop (ignore)
5480ccf3 4168 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4169{
4170 unsigned long insn;
4171 const struct powerpc_opcode *opcode;
4172 expressionS ex;
4173 char *f;
252b5132 4174 symbolS *sym;
252b5132
RH		 4175 char *symbol_name;
4176 char c;
4177 char *name;
4178 unsigned int exp;
4179 flagword flags;
4180 asection *sec;
4181
99a814a1 4182 /* Strip out the symbol name. */
252b5132
RH		 4183 symbol_name = input_line_pointer;
4184 c = get_symbol_end ();
4185
4186 name = xmalloc (input_line_pointer - symbol_name + 1);
4187 strcpy (name, symbol_name);
4188
4189 sym = symbol_find_or_make (name);
4190
4191 *input_line_pointer = c;
4192
4193 SKIP_WHITESPACE ();
4194
4195 /* Look up the opcode in the hash table. */
4196 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4197
99a814a1 4198 /* Stick in the nop. */
252b5132
RH		 4199 insn = opcode->opcode;
4200
4201 /* Write out the instruction. */
4202 f = frag_more (4);
4203 md_number_to_chars (f, insn, 4);
4204 fix_new (frag_now,
4205 f - frag_now->fr_literal,
4206 4,
4207 sym,
4208 0,
4209 0,
4210 BFD_RELOC_16_GOT_PCREL);
4211
4212}
4213
81d4177b
KH		 4214/* pseudo-op:
4215 behaviour:
4216 errors:
99a814a1
AM		 4217 warnings: */
4218
252b5132 4219static void
99a814a1 4220ppc_pe_comm (lcomm)
252b5132
RH		 4221 int lcomm;
4222{
4223 register char *name;
4224 register char c;
4225 register char *p;
4226 offsetT temp;
4227 register symbolS *symbolP;
4228 offsetT align;
4229
4230 name = input_line_pointer;
4231 c = get_symbol_end ();
4232
99a814a1 4233 /* just after name is now '\0'. */
252b5132
RH		 4234 p = input_line_pointer;
4235 *p = c;
4236 SKIP_WHITESPACE ();
4237 if (*input_line_pointer != ',')
4238 {
4239 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4240 ignore_rest_of_line ();
4241 return;
4242 }
4243
4244 input_line_pointer++; /* skip ',' */
4245 if ((temp = get_absolute_expression ()) < 0)
4246 {
4247 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4248 ignore_rest_of_line ();
4249 return;
4250 }
4251
4252 if (! lcomm)
4253 {
4254 /* The third argument to .comm is the alignment. */
4255 if (*input_line_pointer != ',')
4256 align = 3;
4257 else
4258 {
4259 ++input_line_pointer;
4260 align = get_absolute_expression ();
4261 if (align <= 0)
4262 {
4263 as_warn (_("ignoring bad alignment"));
4264 align = 3;
4265 }
4266 }
4267 }
4268
4269 *p = 0;
4270 symbolP = symbol_find_or_make (name);
4271
4272 *p = c;
4273 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4274 {
4275 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4276 S_GET_NAME (symbolP));
4277 ignore_rest_of_line ();
4278 return;
4279 }
4280
4281 if (S_GET_VALUE (symbolP))
4282 {
4283 if (S_GET_VALUE (symbolP) != (valueT) temp)
4284 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4285 S_GET_NAME (symbolP),
4286 (long) S_GET_VALUE (symbolP),
4287 (long) temp);
4288 }
4289 else
4290 {
4291 S_SET_VALUE (symbolP, (valueT) temp);
4292 S_SET_EXTERNAL (symbolP);
4293 }
4294
4295 demand_empty_rest_of_line ();
4296}
4297
4298/*
4299 * implement the .section pseudo op:
4300 * .section name {, "flags"}
4301 * ^ ^
4302 * | +--- optional flags: 'b' for bss
4303 * | 'i' for info
4304 * +-- section name 'l' for lib
4305 * 'n' for noload
4306 * 'o' for over
4307 * 'w' for data
4308 * 'd' (apparently m88k for data)
4309 * 'x' for text
4310 * But if the argument is not a quoted string, treat it as a
4311 * subsegment number.
4312 *
4313 * FIXME: this is a copy of the section processing from obj-coff.c, with
4314 * additions/changes for the moto-pas assembler support. There are three
4315 * categories:
4316 *
81d4177b 4317 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4318 * setting bits that bfd probably neither understands or uses. The
4319 * correct approach (?) will have to incorporate extra fields attached
4320 * to the section to hold the system specific stuff. (krk)
4321 *
4322 * Section Contents:
4323 * 'a' - unknown - referred to in documentation, but no definition supplied
4324 * 'c' - section has code
4325 * 'd' - section has initialized data
4326 * 'u' - section has uninitialized data
4327 * 'i' - section contains directives (info)
4328 * 'n' - section can be discarded
4329 * 'R' - remove section at link time
4330 *
4331 * Section Protection:
4332 * 'r' - section is readable
4333 * 'w' - section is writeable
4334 * 'x' - section is executable
4335 * 's' - section is sharable
4336 *
4337 * Section Alignment:
4338 * '0' - align to byte boundary
4339 * '1' - align to halfword undary
4340 * '2' - align to word boundary
4341 * '3' - align to doubleword boundary
4342 * '4' - align to quadword boundary
4343 * '5' - align to 32 byte boundary
4344 * '6' - align to 64 byte boundary
4345 *
4346 */
4347
4348void
4349ppc_pe_section (ignore)
5480ccf3 4350 int ignore ATTRIBUTE_UNUSED;
252b5132 4351{
99a814a1 4352 /* Strip out the section name. */
252b5132
RH		 4353 char *section_name;
4354 char c;
4355 char *name;
4356 unsigned int exp;
4357 flagword flags;
4358 segT sec;
4359 int align;
4360
4361 section_name = input_line_pointer;
4362 c = get_symbol_end ();
4363
4364 name = xmalloc (input_line_pointer - section_name + 1);
4365 strcpy (name, section_name);
4366
4367 *input_line_pointer = c;
4368
4369 SKIP_WHITESPACE ();
4370
4371 exp = 0;
4372 flags = SEC_NO_FLAGS;
4373
4374 if (strcmp (name, ".idata$2") == 0)
4375 {
4376 align = 0;
4377 }
4378 else if (strcmp (name, ".idata$3") == 0)
4379 {
4380 align = 0;
4381 }
4382 else if (strcmp (name, ".idata$4") == 0)
4383 {
4384 align = 2;
4385 }
4386 else if (strcmp (name, ".idata$5") == 0)
4387 {
4388 align = 2;
4389 }
4390 else if (strcmp (name, ".idata$6") == 0)
4391 {
4392 align = 1;
4393 }
4394 else
99a814a1
AM		 4395 /* Default alignment to 16 byte boundary. */
4396 align = 4;
252b5132
RH		 4397
4398 if (*input_line_pointer == ',')
4399 {
4400 ++input_line_pointer;
4401 SKIP_WHITESPACE ();
4402 if (*input_line_pointer != '"')
4403 exp = get_absolute_expression ();
4404 else
4405 {
4406 ++input_line_pointer;
4407 while (*input_line_pointer != '"'
4408 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4409 {
4410 switch (*input_line_pointer)
4411 {
4412 /* Section Contents */
4413 case 'a': /* unknown */
4414 as_bad (_("Unsupported section attribute -- 'a'"));
4415 break;
4416 case 'c': /* code section */
81d4177b 4417 flags |= SEC_CODE;
252b5132
RH		 4418 break;
4419 case 'd': /* section has initialized data */
4420 flags |= SEC_DATA;
4421 break;
4422 case 'u': /* section has uninitialized data */
4423 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4424 in winnt.h */
4425 flags |= SEC_ROM;
4426 break;
4427 case 'i': /* section contains directives (info) */
4428 /* FIXME: This is IMAGE_SCN_LNK_INFO
4429 in winnt.h */
4430 flags |= SEC_HAS_CONTENTS;
4431 break;
4432 case 'n': /* section can be discarded */
81d4177b 4433 flags &=~ SEC_LOAD;
252b5132
RH		 4434 break;
4435 case 'R': /* Remove section at link time */
4436 flags |= SEC_NEVER_LOAD;
4437 break;
4438
4439 /* Section Protection */
4440 case 'r': /* section is readable */
4441 flags |= IMAGE_SCN_MEM_READ;
4442 break;
4443 case 'w': /* section is writeable */
4444 flags |= IMAGE_SCN_MEM_WRITE;
4445 break;
4446 case 'x': /* section is executable */
4447 flags |= IMAGE_SCN_MEM_EXECUTE;
4448 break;
4449 case 's': /* section is sharable */
4450 flags |= IMAGE_SCN_MEM_SHARED;
4451 break;
4452
4453 /* Section Alignment */
4454 case '0': /* align to byte boundary */
4455 flags |= IMAGE_SCN_ALIGN_1BYTES;
4456 align = 0;
4457 break;
4458 case '1': /* align to halfword boundary */
4459 flags |= IMAGE_SCN_ALIGN_2BYTES;
4460 align = 1;
4461 break;
4462 case '2': /* align to word boundary */
4463 flags |= IMAGE_SCN_ALIGN_4BYTES;
4464 align = 2;
4465 break;
4466 case '3': /* align to doubleword boundary */
4467 flags |= IMAGE_SCN_ALIGN_8BYTES;
4468 align = 3;
4469 break;
4470 case '4': /* align to quadword boundary */
4471 flags |= IMAGE_SCN_ALIGN_16BYTES;
4472 align = 4;
4473 break;
4474 case '5': /* align to 32 byte boundary */
4475 flags |= IMAGE_SCN_ALIGN_32BYTES;
4476 align = 5;
4477 break;
4478 case '6': /* align to 64 byte boundary */
4479 flags |= IMAGE_SCN_ALIGN_64BYTES;
4480 align = 6;
4481 break;
4482
4483 default:
99a814a1
AM		 4484 as_bad (_("unknown section attribute '%c'"),
4485 *input_line_pointer);
252b5132
RH		 4486 break;
4487 }
4488 ++input_line_pointer;
4489 }
4490 if (*input_line_pointer == '"')
4491 ++input_line_pointer;
4492 }
4493 }
4494
4495 sec = subseg_new (name, (subsegT) exp);
4496
99a814a1 4497 ppc_set_current_section (sec);
252b5132
RH		 4498
4499 if (flags != SEC_NO_FLAGS)
4500 {
4501 if (! bfd_set_section_flags (stdoutput, sec, flags))
4502 as_bad (_("error setting flags for \"%s\": %s"),
4503 bfd_section_name (stdoutput, sec),
4504 bfd_errmsg (bfd_get_error ()));
4505 }
4506
99a814a1 4507 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4508
4509}
4510
4511static void
4512ppc_pe_function (ignore)
5480ccf3 4513 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4514{
4515 char *name;
4516 char endc;
4517 symbolS *ext_sym;
4518
4519 name = input_line_pointer;
4520 endc = get_symbol_end ();
4521
4522 ext_sym = symbol_find_or_make (name);
4523
4524 *input_line_pointer = endc;
4525
4526 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4527 SF_SET_FUNCTION (ext_sym);
4528 SF_SET_PROCESS (ext_sym);
4529 coff_add_linesym (ext_sym);
4530
4531 demand_empty_rest_of_line ();
4532}
4533
4534static void
4535ppc_pe_tocd (ignore)
5480ccf3 4536 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4537{
4538 if (tocdata_section == 0)
4539 {
4540 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4541 /* FIXME: section flags won't work. */
252b5132
RH		 4542 bfd_set_section_flags (stdoutput, tocdata_section,
4543 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4544 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4545
4546 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4547 }
4548 else
4549 {
4550 rdata_section = subseg_new (".tocd", 0);
4551 }
4552
99a814a1 4553 ppc_set_current_section (tocdata_section);
252b5132
RH		 4554
4555 demand_empty_rest_of_line ();
4556}
4557
4558/* Don't adjust TOC relocs to use the section symbol. */
4559
4560int
4561ppc_pe_fix_adjustable (fix)
4562 fixS *fix;
4563{
4564 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4565}
4566
4567#endif
4568\f
4569#ifdef OBJ_XCOFF
4570
4571/* XCOFF specific symbol and file handling. */
4572
4573/* Canonicalize the symbol name. We use the to force the suffix, if
4574 any, to use square brackets, and to be in upper case. */
4575
4576char *
4577ppc_canonicalize_symbol_name (name)
4578 char *name;
4579{
4580 char *s;
4581
4582 if (ppc_stab_symbol)
4583 return name;
4584
4585 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4586 ;
4587 if (*s != '\0')
4588 {
4589 char brac;
4590
4591 if (*s == '[')
4592 brac = ']';
4593 else
4594 {
4595 *s = '[';
4596 brac = '}';
4597 }
4598
4599 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4600 *s = TOUPPER (*s);
252b5132
RH		 4601
4602 if (*s == '\0' || s[1] != '\0')
4603 as_bad (_("bad symbol suffix"));
4604
4605 *s = ']';
4606 }
4607
4608 return name;
4609}
4610
4611/* Set the class of a symbol based on the suffix, if any. This is
4612 called whenever a new symbol is created. */
4613
4614void
4615ppc_symbol_new_hook (sym)
4616 symbolS *sym;
4617{
809ffe0d 4618 struct ppc_tc_sy *tc;
252b5132
RH		 4619 const char *s;
4620
809ffe0d
ILT		 4621 tc = symbol_get_tc (sym);
4622 tc->next = NULL;
4623 tc->output = 0;
4624 tc->class = -1;
4625 tc->real_name = NULL;
4626 tc->subseg = 0;
4627 tc->align = 0;
4628 tc->size = NULL;
4629 tc->within = NULL;
252b5132
RH		 4630
4631 if (ppc_stab_symbol)
4632 return;
4633
4634 s = strchr (S_GET_NAME (sym), '[');
4635 if (s == (const char *) NULL)
4636 {
4637 /* There is no suffix. */
4638 return;
4639 }
4640
4641 ++s;
4642
4643 switch (s[0])
4644 {
4645 case 'B':
4646 if (strcmp (s, "BS]") == 0)
809ffe0d 4647 tc->class = XMC_BS;
252b5132
RH		 4648 break;
4649 case 'D':
4650 if (strcmp (s, "DB]") == 0)
809ffe0d 4651 tc->class = XMC_DB;
252b5132 4652 else if (strcmp (s, "DS]") == 0)
809ffe0d 4653 tc->class = XMC_DS;
252b5132
RH		 4654 break;
4655 case 'G':
4656 if (strcmp (s, "GL]") == 0)
809ffe0d 4657 tc->class = XMC_GL;
252b5132
RH		 4658 break;
4659 case 'P':
4660 if (strcmp (s, "PR]") == 0)
809ffe0d 4661 tc->class = XMC_PR;
252b5132
RH		 4662 break;
4663 case 'R':
4664 if (strcmp (s, "RO]") == 0)
809ffe0d 4665 tc->class = XMC_RO;
252b5132 4666 else if (strcmp (s, "RW]") == 0)
809ffe0d 4667 tc->class = XMC_RW;
252b5132
RH		 4668 break;
4669 case 'S':
4670 if (strcmp (s, "SV]") == 0)
809ffe0d 4671 tc->class = XMC_SV;
252b5132
RH		 4672 break;
4673 case 'T':
4674 if (strcmp (s, "TC]") == 0)
809ffe0d 4675 tc->class = XMC_TC;
252b5132 4676 else if (strcmp (s, "TI]") == 0)
809ffe0d 4677 tc->class = XMC_TI;
252b5132 4678 else if (strcmp (s, "TB]") == 0)
809ffe0d 4679 tc->class = XMC_TB;
252b5132 4680 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4681 tc->class = XMC_TC0;
252b5132
RH		 4682 break;
4683 case 'U':
4684 if (strcmp (s, "UA]") == 0)
809ffe0d 4685 tc->class = XMC_UA;
252b5132 4686 else if (strcmp (s, "UC]") == 0)
809ffe0d 4687 tc->class = XMC_UC;
252b5132
RH		 4688 break;
4689 case 'X':
4690 if (strcmp (s, "XO]") == 0)
809ffe0d 4691 tc->class = XMC_XO;
252b5132
RH		 4692 break;
4693 }
4694
809ffe0d 4695 if (tc->class == -1)
252b5132
RH		 4696 as_bad (_("Unrecognized symbol suffix"));
4697}
4698
4699/* Set the class of a label based on where it is defined. This
4700 handles symbols without suffixes. Also, move the symbol so that it
4701 follows the csect symbol. */
4702
4703void
4704ppc_frob_label (sym)
4705 symbolS *sym;
4706{
4707 if (ppc_current_csect != (symbolS *) NULL)
4708 {
809ffe0d
ILT		 4709 if (symbol_get_tc (sym)->class == -1)
4710 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4711
4712 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4713 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4714 &symbol_rootP, &symbol_lastP);
4715 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4716 }
4717}
4718
4719/* This variable is set by ppc_frob_symbol if any absolute symbols are
4720 seen. It tells ppc_adjust_symtab whether it needs to look through
4721 the symbols. */
4722
b34976b6 4723static bfd_boolean ppc_saw_abs;
252b5132
RH		 4724
4725/* Change the name of a symbol just before writing it out. Set the
4726 real name if the .rename pseudo-op was used. Otherwise, remove any
4727 class suffix. Return 1 if the symbol should not be included in the
4728 symbol table. */
4729
4730int
4731ppc_frob_symbol (sym)
4732 symbolS *sym;
4733{
4734 static symbolS *ppc_last_function;
4735 static symbolS *set_end;
4736
4737 /* Discard symbols that should not be included in the output symbol
4738 table. */
809ffe0d
ILT		 4739 if (! symbol_used_in_reloc_p (sym)
4740 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
252b5132 4741 || (! S_IS_EXTERNAL (sym)
809ffe0d 4742 && ! symbol_get_tc (sym)->output
252b5132
RH		 4743 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4744 return 1;
4745
a161fe53
AM		 4746 /* This one will disappear anyway. Don't make a csect sym for it. */
4747 if (sym == abs_section_sym)
4748 return 1;
4749
809ffe0d
ILT		 4750 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4751 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4752 else
4753 {
4754 const char *name;
4755 const char *s;
4756
4757 name = S_GET_NAME (sym);
4758 s = strchr (name, '[');
4759 if (s != (char *) NULL)
4760 {
4761 unsigned int len;
4762 char *snew;
4763
4764 len = s - name;
4765 snew = xmalloc (len + 1);
4766 memcpy (snew, name, len);
4767 snew[len] = '\0';
4768
4769 S_SET_NAME (sym, snew);
4770 }
4771 }
4772
4773 if (set_end != (symbolS *) NULL)
4774 {
4775 SA_SET_SYM_ENDNDX (set_end, sym);
4776 set_end = NULL;
4777 }
4778
4779 if (SF_GET_FUNCTION (sym))
4780 {
4781 if (ppc_last_function != (symbolS *) NULL)
4782 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4783 ppc_last_function = sym;
809ffe0d 4784 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4785 {
6386f3a7 4786 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4787 SA_SET_SYM_FSIZE (sym,
4788 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4789 }
4790 }
4791 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4792 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4793 {
4794 if (ppc_last_function == (symbolS *) NULL)
4795 as_bad (_(".ef with no preceding .function"));
4796 else
4797 {
4798 set_end = ppc_last_function;
4799 ppc_last_function = NULL;
4800
4801 /* We don't have a C_EFCN symbol, but we need to force the
4802 COFF backend to believe that it has seen one. */
4803 coff_last_function = NULL;
4804 }
4805 }
4806
4807 if (! S_IS_EXTERNAL (sym)
809ffe0d 4808 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4809 && S_GET_STORAGE_CLASS (sym) != C_FILE
4810 && S_GET_STORAGE_CLASS (sym) != C_FCN
4811 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4812 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4813 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4814 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4815 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4816 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4817 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4818
4819 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4820 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4821 {
4822 int i;
4823 union internal_auxent *a;
4824
4825 /* Create a csect aux. */
4826 i = S_GET_NUMBER_AUXILIARY (sym);
4827 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4828 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4829 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4830 {
4831 /* This is the TOC table. */
4832 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4833 a->x_csect.x_scnlen.l = 0;
4834 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4835 }
809ffe0d 4836 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4837 {
4838 /* This is a csect symbol. x_scnlen is the size of the
4839 csect. */
809ffe0d 4840 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4841 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4842 S_GET_SEGMENT (sym))
4843 - S_GET_VALUE (sym));
4844 else
4845 {
6386f3a7 4846 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4847 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4848 - S_GET_VALUE (sym));
4849 }
809ffe0d 4850 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4851 }
4852 else if (S_GET_SEGMENT (sym) == bss_section)
4853 {
4854 /* This is a common symbol. */
809ffe0d
ILT		 4855 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4856 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4857 if (S_IS_EXTERNAL (sym))
809ffe0d 4858 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4859 else
809ffe0d 4860 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 4861 }
4862 else if (S_GET_SEGMENT (sym) == absolute_section)
4863 {
4864 /* This is an absolute symbol. The csect will be created by
99a814a1 4865 ppc_adjust_symtab. */
b34976b6 4866 ppc_saw_abs = TRUE;
252b5132 4867 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 4868 if (symbol_get_tc (sym)->class == -1)
4869 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 4870 }
4871 else if (! S_IS_DEFINED (sym))
4872 {
4873 /* This is an external symbol. */
4874 a->x_csect.x_scnlen.l = 0;
4875 a->x_csect.x_smtyp = XTY_ER;
4876 }
809ffe0d 4877 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 4878 {
4879 symbolS *next;
4880
4881 /* This is a TOC definition. x_scnlen is the size of the
4882 TOC entry. */
4883 next = symbol_next (sym);
809ffe0d 4884 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 4885 next = symbol_next (next);
4886 if (next == (symbolS *) NULL
809ffe0d 4887 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 4888 {
4889 if (ppc_after_toc_frag == (fragS *) NULL)
4890 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4891 data_section)
4892 - S_GET_VALUE (sym));
4893 else
4894 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
4895 - S_GET_VALUE (sym));
4896 }
4897 else
4898 {
6386f3a7 4899 resolve_symbol_value (next);
252b5132
RH		 4900 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
4901 - S_GET_VALUE (sym));
4902 }
4903 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4904 }
4905 else
4906 {
4907 symbolS *csect;
4908
4909 /* This is a normal symbol definition. x_scnlen is the
4910 symbol index of the containing csect. */
4911 if (S_GET_SEGMENT (sym) == text_section)
4912 csect = ppc_text_csects;
4913 else if (S_GET_SEGMENT (sym) == data_section)
4914 csect = ppc_data_csects;
4915 else
4916 abort ();
4917
4918 /* Skip the initial dummy symbol. */
809ffe0d 4919 csect = symbol_get_tc (csect)->next;
252b5132
RH		 4920
4921 if (csect == (symbolS *) NULL)
4922 {
4923 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
4924 a->x_csect.x_scnlen.l = 0;
4925 }
4926 else
4927 {
809ffe0d 4928 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 4929 {
6386f3a7 4930 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 4931 if (S_GET_VALUE (symbol_get_tc (csect)->next)
4932 > S_GET_VALUE (sym))
252b5132 4933 break;
809ffe0d 4934 csect = symbol_get_tc (csect)->next;
252b5132
RH		 4935 }
4936
809ffe0d
ILT		 4937 a->x_csect.x_scnlen.p =
4938 coffsymbol (symbol_get_bfdsym (csect))->native;
4939 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
4940 1;
252b5132
RH		 4941 }
4942 a->x_csect.x_smtyp = XTY_LD;
4943 }
81d4177b 4944
252b5132
RH		 4945 a->x_csect.x_parmhash = 0;
4946 a->x_csect.x_snhash = 0;
809ffe0d 4947 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 4948 a->x_csect.x_smclas = XMC_PR;
4949 else
809ffe0d 4950 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 4951 a->x_csect.x_stab = 0;
4952 a->x_csect.x_snstab = 0;
4953
4954 /* Don't let the COFF backend resort these symbols. */
809ffe0d 4955 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 4956 }
4957 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
4958 {
4959 /* We want the value to be the symbol index of the referenced
4960 csect symbol. BFD will do that for us if we set the right
4961 flags. */
b782de16
AM		 4962 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
4963 combined_entry_type *c = coffsymbol (bsym)->native;
4964
4965 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 4966 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 4967 }
4968 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4969 {
4970 symbolS *block;
4971 symbolS *csect;
4972
4973 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 4974 block = symbol_get_tc (sym)->within;
4975 csect = symbol_get_tc (block)->within;
6386f3a7 4976 resolve_symbol_value (csect);
252b5132
RH		 4977 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
4978 }
4979 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
4980 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
4981 {
4982 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 4983 BFD will do that for us if we set the right flags. We have
4984 already set the value correctly. */
809ffe0d 4985 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 4986 }
4987
4988 return 0;
4989}
4990
4991/* Adjust the symbol table. This creates csect symbols for all
4992 absolute symbols. */
4993
4994void
4995ppc_adjust_symtab ()
4996{
4997 symbolS *sym;
4998
4999 if (! ppc_saw_abs)
5000 return;
5001
5002 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5003 {
5004 symbolS *csect;
5005 int i;
5006 union internal_auxent *a;
5007
5008 if (S_GET_SEGMENT (sym) != absolute_section)
5009 continue;
5010
5011 csect = symbol_create (".abs[XO]", absolute_section,
5012 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5013 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5014 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5015 i = S_GET_NUMBER_AUXILIARY (csect);
5016 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5017 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5018 a->x_csect.x_scnlen.l = 0;
5019 a->x_csect.x_smtyp = XTY_SD;
5020 a->x_csect.x_parmhash = 0;
5021 a->x_csect.x_snhash = 0;
5022 a->x_csect.x_smclas = XMC_XO;
5023 a->x_csect.x_stab = 0;
5024 a->x_csect.x_snstab = 0;
5025
5026 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5027
5028 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5029 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5030 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5031 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5032 }
5033
b34976b6 5034 ppc_saw_abs = FALSE;
252b5132
RH		 5035}
5036
5037/* Set the VMA for a section. This is called on all the sections in
5038 turn. */
5039
5040void
5041ppc_frob_section (sec)
5042 asection *sec;
5043{
5044 static bfd_size_type vma = 0;
5045
5046 bfd_set_section_vma (stdoutput, sec, vma);
5047 vma += bfd_section_size (stdoutput, sec);
5048}
5049
5050#endif /* OBJ_XCOFF */
5051\f
5052/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5053 of type TYPE, and store the appropriate bytes in *LITP. The number
5054 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5055 returned, or NULL on OK. */
5056
5057char *
5058md_atof (type, litp, sizep)
5059 int type;
5060 char *litp;
5061 int *sizep;
5062{
5063 int prec;
5064 LITTLENUM_TYPE words[4];
5065 char *t;
5066 int i;
5067
5068 switch (type)
5069 {
5070 case 'f':
5071 prec = 2;
5072 break;
5073
5074 case 'd':
5075 prec = 4;
5076 break;
5077
5078 default:
5079 *sizep = 0;
5080 return _("bad call to md_atof");
5081 }
5082
5083 t = atof_ieee (input_line_pointer, type, words);
5084 if (t)
5085 input_line_pointer = t;
5086
5087 *sizep = prec * 2;
5088
5089 if (target_big_endian)
5090 {
5091 for (i = 0; i < prec; i++)
5092 {
5093 md_number_to_chars (litp, (valueT) words[i], 2);
5094 litp += 2;
5095 }
5096 }
5097 else
5098 {
5099 for (i = prec - 1; i >= 0; i--)
5100 {
5101 md_number_to_chars (litp, (valueT) words[i], 2);
5102 litp += 2;
5103 }
5104 }
81d4177b 5105
252b5132
RH		 5106 return NULL;
5107}
5108
5109/* Write a value out to the object file, using the appropriate
5110 endianness. */
5111
5112void
5113md_number_to_chars (buf, val, n)
5114 char *buf;
5115 valueT val;
5116 int n;
5117{
5118 if (target_big_endian)
5119 number_to_chars_bigendian (buf, val, n);
5120 else
5121 number_to_chars_littleendian (buf, val, n);
5122}
5123
5124/* Align a section (I don't know why this is machine dependent). */
5125
5126valueT
5127md_section_align (seg, addr)
5128 asection *seg;
5129 valueT addr;
5130{
5131 int align = bfd_get_section_alignment (stdoutput, seg);
5132
5133 return ((addr + (1 << align) - 1) & (-1 << align));
5134}
5135
5136/* We don't have any form of relaxing. */
5137
5138int
5139md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5140 fragS *fragp ATTRIBUTE_UNUSED;
5141 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5142{
5143 abort ();
5144 return 0;
5145}
5146
5147/* Convert a machine dependent frag. We never generate these. */
5148
5149void
5150md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5151 bfd *abfd ATTRIBUTE_UNUSED;
5152 asection *sec ATTRIBUTE_UNUSED;
5153 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5154{
5155 abort ();
5156}
5157
5158/* We have no need to default values of symbols. */
5159
252b5132
RH		 5160symbolS *
5161md_undefined_symbol (name)
92161534 5162 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5163{
5164 return 0;
5165}
5166\f
5167/* Functions concerning relocs. */
5168
5169/* The location from which a PC relative jump should be calculated,
5170 given a PC relative reloc. */
5171
5172long
5173md_pcrel_from_section (fixp, sec)
5174 fixS *fixp;
92161534 5175 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5176{
5177 return fixp->fx_frag->fr_address + fixp->fx_where;
5178}
5179
5180#ifdef OBJ_XCOFF
5181
5182/* This is called to see whether a fixup should be adjusted to use a
5183 section symbol. We take the opportunity to change a fixup against
5184 a symbol in the TOC subsegment into a reloc against the
5185 corresponding .tc symbol. */
5186
5187int
5188ppc_fix_adjustable (fix)
5189 fixS *fix;
5190{
b782de16
AM		 5191 valueT val = resolve_symbol_value (fix->fx_addsy);
5192 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5193 TC_SYMFIELD_TYPE *tc;
5194
5195 if (symseg == absolute_section)
5196 return 0;
252b5132 5197
252b5132 5198 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5199 && fix->fx_addsy != ppc_toc_csect
b782de16 5200 && symseg == data_section
252b5132
RH		 5201 && val >= ppc_toc_frag->fr_address
5202 && (ppc_after_toc_frag == (fragS *) NULL
5203 || val < ppc_after_toc_frag->fr_address))
5204 {
5205 symbolS *sy;
5206
5207 for (sy = symbol_next (ppc_toc_csect);
5208 sy != (symbolS *) NULL;
5209 sy = symbol_next (sy))
5210 {
b782de16
AM		 5211 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5212
5213 if (sy_tc->class == XMC_TC0)
252b5132 5214 continue;
b782de16 5215 if (sy_tc->class != XMC_TC)
252b5132 5216 break;
b782de16 5217 if (val == resolve_symbol_value (sy))
252b5132
RH		 5218 {
5219 fix->fx_addsy = sy;
5220 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5221 return 0;
5222 }
5223 }
5224
5225 as_bad_where (fix->fx_file, fix->fx_line,
5226 _("symbol in .toc does not match any .tc"));
5227 }
5228
5229 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5230 tc = symbol_get_tc (fix->fx_addsy);
5231 if (tc->subseg == 0
5232 && tc->class != XMC_TC0
5233 && tc->class != XMC_TC
5234 && symseg != bss_section
252b5132 5235 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5236 && (symseg != data_section
252b5132
RH		 5237 || ppc_toc_csect == NULL
5238 || val < ppc_toc_frag->fr_address
5239 || (ppc_after_toc_frag != NULL
5240 && val >= ppc_after_toc_frag->fr_address)))
5241 {
5242 symbolS *csect;
b782de16 5243 symbolS *next_csect;
252b5132 5244
b782de16 5245 if (symseg == text_section)
252b5132 5246 csect = ppc_text_csects;
b782de16 5247 else if (symseg == data_section)
252b5132
RH		 5248 csect = ppc_data_csects;
5249 else
5250 abort ();
5251
5252 /* Skip the initial dummy symbol. */
809ffe0d 5253 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5254
5255 if (csect != (symbolS *) NULL)
5256 {
b782de16
AM		 5257 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5258 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5259 {
5260 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5261 have to look through the full symbol table to see
5262 whether this is the csect we want. Note that we will
5263 only get here if the csect has zero length. */
b782de16
AM		 5264 if (symbol_get_frag (csect)->fr_address == val
5265 && S_GET_VALUE (csect) == val)
252b5132
RH		 5266 {
5267 symbolS *scan;
5268
809ffe0d 5269 for (scan = symbol_next (csect);
252b5132 5270 scan != NULL;
809ffe0d 5271 scan = symbol_next (scan))
252b5132 5272 {
809ffe0d 5273 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5274 break;
5275 if (scan == fix->fx_addsy)
5276 break;
5277 }
5278
5279 /* If we found the symbol before the next csect
99a814a1 5280 symbol, then this is the csect we want. */
252b5132
RH		 5281 if (scan == fix->fx_addsy)
5282 break;
5283 }
5284
b782de16 5285 csect = next_csect;
252b5132
RH		 5286 }
5287
b782de16 5288 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5289 fix->fx_addsy = csect;
5290 }
b782de16 5291 return 0;
252b5132
RH		 5292 }
5293
5294 /* Adjust a reloc against a .lcomm symbol to be against the base
5295 .lcomm. */
b782de16 5296 if (symseg == bss_section
252b5132
RH		 5297 && ! S_IS_EXTERNAL (fix->fx_addsy))
5298 {
b782de16
AM		 5299 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5300
5301 fix->fx_offset += val - resolve_symbol_value (sy);
5302 fix->fx_addsy = sy;
252b5132
RH		 5303 }
5304
5305 return 0;
5306}
5307
5308/* A reloc from one csect to another must be kept. The assembler
5309 will, of course, keep relocs between sections, and it will keep
5310 absolute relocs, but we need to force it to keep PC relative relocs
5311 between two csects in the same section. */
5312
5313int
5314ppc_force_relocation (fix)
5315 fixS *fix;
5316{
5317 /* At this point fix->fx_addsy should already have been converted to
5318 a csect symbol. If the csect does not include the fragment, then
5319 we need to force the relocation. */
5320 if (fix->fx_pcrel
5321 && fix->fx_addsy != NULL
809ffe0d
ILT		 5322 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5323 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5324 > fix->fx_frag->fr_address)
5325 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5326 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5327 <= fix->fx_frag->fr_address))))
5328 return 1;
5329
ae6063d4 5330 return generic_force_reloc (fix);
252b5132
RH		 5331}
5332
5333#endif /* OBJ_XCOFF */
5334
0baf16f2 5335#ifdef OBJ_ELF
a161fe53
AM		 5336/* If this function returns non-zero, it guarantees that a relocation
5337 will be emitted for a fixup. */
5338
5339int
5340ppc_force_relocation (fix)
5341 fixS *fix;
5342{
5343 /* Branch prediction relocations must force a relocation, as must
5344 the vtable description relocs. */
5345 switch (fix->fx_r_type)
5346 {
5347 case BFD_RELOC_PPC_B16_BRTAKEN:
5348 case BFD_RELOC_PPC_B16_BRNTAKEN:
5349 case BFD_RELOC_PPC_BA16_BRTAKEN:
5350 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5351 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5352 return 1;
5353 default:
5354 break;
5355 }
5356
cdba85ec
AM		 5357 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5358 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5359 return 1;
5360
ae6063d4 5361 return generic_force_reloc (fix);
a161fe53
AM		 5362}
5363
0baf16f2
AM		 5364int
5365ppc_fix_adjustable (fix)
5366 fixS *fix;
252b5132 5367{
0baf16f2
AM		 5368 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5369 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5370 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5371 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5372 && fix->fx_r_type != BFD_RELOC_GPREL16
5373 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5374 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec
AM		 5375 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5376 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
0baf16f2
AM		 5377 && (fix->fx_pcrel
5378 || (fix->fx_subsy != NULL
5379 && (S_GET_SEGMENT (fix->fx_subsy)
5380 == S_GET_SEGMENT (fix->fx_addsy)))
5381 || S_IS_LOCAL (fix->fx_addsy)));
252b5132 5382}
0baf16f2 5383#endif
252b5132
RH		 5384
5385/* Apply a fixup to the object code. This is called for all the
5386 fixups we generated by the call to fix_new_exp, above. In the call
5387 above we used a reloc code which was the largest legal reloc code
5388 plus the operand index. Here we undo that to recover the operand
5389 index. At this point all symbol values should be fully resolved,
5390 and we attempt to completely resolve the reloc. If we can not do
5391 that, we determine the correct reloc code and put it back in the
5392 fixup. */
5393
94f592af
NC		 5394void
5395md_apply_fix3 (fixP, valP, seg)
5396 fixS *fixP;
5397 valueT * valP;
0baf16f2 5398 segT seg ATTRIBUTE_UNUSED;
252b5132 5399{
94f592af 5400 valueT value = * valP;
252b5132
RH		 5401
5402#ifdef OBJ_ELF
94f592af 5403 if (fixP->fx_addsy != NULL)
252b5132 5404 {
a161fe53 5405 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5406 if (fixP->fx_pcrel)
5407 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5408 }
5409 else
94f592af 5410 fixP->fx_done = 1;
252b5132 5411#else
a161fe53 5412 /* FIXME FIXME FIXME: The value we are passed in *valP includes
252b5132
RH		 5413 the symbol values. Since we are using BFD_ASSEMBLER, if we are
5414 doing this relocation the code in write.c is going to call
5415 bfd_install_relocation, which is also going to use the symbol
5416 value. That means that if the reloc is fully resolved we want to
a161fe53 5417 use *valP since bfd_install_relocation is not being used.
252b5132 5418 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5419 *valP, and must use fx_offset instead. However, if the reloc
5420 is PC relative, we do want to use *valP since it includes the
252b5132 5421 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5422 if (fixP->fx_addsy == (symbolS *) NULL)
5423 fixP->fx_done = 1;
5424
5425 else if (fixP->fx_pcrel)
5426 ;
5427
252b5132 5428 else
a161fe53
AM		 5429 value = fixP->fx_offset;
5430#endif
5431
5432 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5433 {
a161fe53
AM		 5434 /* We can't actually support subtracting a symbol. */
5435 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5436 }
252b5132 5437
94f592af 5438 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5439 {
5440 int opindex;
5441 const struct powerpc_operand *operand;
5442 char *where;
5443 unsigned long insn;
5444
94f592af 5445 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5446
5447 operand = &powerpc_operands[opindex];
5448
5449#ifdef OBJ_XCOFF
0baf16f2
AM		 5450 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5451 does not generate a reloc. It uses the offset of `sym' within its
5452 csect. Other usages, such as `.long sym', generate relocs. This
5453 is the documented behaviour of non-TOC symbols. */
252b5132
RH		 5454 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5455 && operand->bits == 16
5456 && operand->shift == 0
2b3c4602 5457 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5458 && fixP->fx_addsy != NULL
5459 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5460 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5461 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5462 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5463 {
94f592af
NC		 5464 value = fixP->fx_offset;
5465 fixP->fx_done = 1;
252b5132
RH		 5466 }
5467#endif
5468
5469 /* Fetch the instruction, insert the fully resolved operand
5470 value, and stuff the instruction back again. */
94f592af 5471 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5472 if (target_big_endian)
5473 insn = bfd_getb32 ((unsigned char *) where);
5474 else
5475 insn = bfd_getl32 ((unsigned char *) where);
5476 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5477 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5478 if (target_big_endian)
5479 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5480 else
5481 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5482
94f592af
NC		 5483 if (fixP->fx_done)
5484 /* Nothing else to do here. */
5485 return;
252b5132 5486
94f592af 5487 assert (fixP->fx_addsy != NULL);
0baf16f2 5488
252b5132
RH		 5489 /* Determine a BFD reloc value based on the operand information.
5490 We are only prepared to turn a few of the operands into
0baf16f2 5491 relocs. */
11b37b7b
AM		 5492 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5493 && operand->bits == 26
5494 && operand->shift == 0)
94f592af 5495 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM		 5496 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5497 && operand->bits == 16
5498 && operand->shift == 0)
95210096
AM		 5499 {
5500 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5501#ifdef OBJ_XCOFF
5502 fixP->fx_size = 2;
5503 if (target_big_endian)
5504 fixP->fx_where += 2;
5505#endif
5506 }
11b37b7b
AM		 5507 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5508 && operand->bits == 26
5509 && operand->shift == 0)
94f592af 5510 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM		 5511 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5512 && operand->bits == 16
5513 && operand->shift == 0)
95210096
AM		 5514 {
5515 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5516#ifdef OBJ_XCOFF
5517 fixP->fx_size = 2;
5518 if (target_big_endian)
5519 fixP->fx_where += 2;
5520#endif
5521 }
0baf16f2 5522#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM		 5523 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5524 && operand->bits == 16
a7fc733f 5525 && operand->shift == 0)
11b37b7b 5526 {
a7fc733f
AM		 5527 if (ppc_is_toc_sym (fixP->fx_addsy))
5528 {
5529 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5530#ifdef OBJ_ELF
a7fc733f
AM		 5531 if (ppc_obj64
5532 && (operand->flags & PPC_OPERAND_DS) != 0)
5533 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5534#endif
5535 }
5536 else
5537 {
5538 fixP->fx_r_type = BFD_RELOC_16;
5539#ifdef OBJ_ELF
5540 if (ppc_obj64
5541 && (operand->flags & PPC_OPERAND_DS) != 0)
5542 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5543#endif
a7fc733f 5544 }
94f592af 5545 fixP->fx_size = 2;
11b37b7b 5546 if (target_big_endian)
94f592af 5547 fixP->fx_where += 2;
11b37b7b 5548 }
0baf16f2 5549#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5550 else
252b5132
RH		 5551 {
5552 char *sfile;
5553 unsigned int sline;
5554
5555 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5556 symbol. */
94f592af
NC		 5557 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5558 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5559 _("unresolved expression that must be resolved"));
5560 else
94f592af 5561 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5562 _("unsupported relocation against %s"),
94f592af
NC		 5563 S_GET_NAME (fixP->fx_addsy));
5564 fixP->fx_done = 1;
5565 return;
252b5132
RH		 5566 }
5567 }
5568 else
5569 {
5570#ifdef OBJ_ELF
94f592af 5571 ppc_elf_validate_fix (fixP, seg);
252b5132 5572#endif
94f592af 5573 switch (fixP->fx_r_type)
252b5132 5574 {
252b5132 5575 case BFD_RELOC_CTOR:
2b3c4602 5576 if (ppc_obj64)
9c7977b3
AM		 5577 goto ctor64;
5578 /* fall through */
5579
0baf16f2 5580 case BFD_RELOC_32:
94f592af
NC		 5581 if (fixP->fx_pcrel)
5582 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5583 /* fall through */
252b5132
RH		 5584
5585 case BFD_RELOC_RVA:
5586 case BFD_RELOC_32_PCREL:
252b5132 5587 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5588 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5589 value, 4);
5590 break;
5591
7f6d05e8 5592 case BFD_RELOC_64:
9c7977b3 5593 ctor64:
94f592af
NC		 5594 if (fixP->fx_pcrel)
5595 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5596 /* fall through */
0baf16f2 5597
7f6d05e8 5598 case BFD_RELOC_64_PCREL:
94f592af 5599 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5600 value, 8);
81d4177b 5601 break;
0baf16f2 5602
252b5132
RH		 5603 case BFD_RELOC_LO16:
5604 case BFD_RELOC_16:
5605 case BFD_RELOC_GPREL16:
5606 case BFD_RELOC_16_GOT_PCREL:
5607 case BFD_RELOC_16_GOTOFF:
5608 case BFD_RELOC_LO16_GOTOFF:
5609 case BFD_RELOC_HI16_GOTOFF:
5610 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5611 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5612 case BFD_RELOC_LO16_BASEREL:
5613 case BFD_RELOC_HI16_BASEREL:
5614 case BFD_RELOC_HI16_S_BASEREL:
5615 case BFD_RELOC_PPC_EMB_NADDR16:
5616 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5617 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5618 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5619 case BFD_RELOC_PPC_EMB_SDAI16:
5620 case BFD_RELOC_PPC_EMB_SDA2REL:
5621 case BFD_RELOC_PPC_EMB_SDA2I16:
5622 case BFD_RELOC_PPC_EMB_RELSEC16:
5623 case BFD_RELOC_PPC_EMB_RELST_LO:
5624 case BFD_RELOC_PPC_EMB_RELST_HI:
5625 case BFD_RELOC_PPC_EMB_RELST_HA:
5626 case BFD_RELOC_PPC_EMB_RELSDA:
5627 case BFD_RELOC_PPC_TOC16:
0baf16f2 5628#ifdef OBJ_ELF
0baf16f2
AM		 5629 case BFD_RELOC_PPC64_TOC16_LO:
5630 case BFD_RELOC_PPC64_TOC16_HI:
5631 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5632#endif
94f592af 5633 if (fixP->fx_pcrel)
252b5132 5634 {
94f592af
NC		 5635 if (fixP->fx_addsy != NULL)
5636 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5637 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5638 bfd_get_reloc_code_name (fixP->fx_r_type),
5639 S_GET_NAME (fixP->fx_addsy));
252b5132 5640 else
94f592af 5641 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5642 _("cannot emit PC relative %s relocation"),
94f592af 5643 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5644 }
5645
94f592af 5646 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5647 value, 2);
5648 break;
5649
5650 /* This case happens when you write, for example,
5651 lis %r3,(L1-L2)@ha
5652 where L1 and L2 are defined later. */
5653 case BFD_RELOC_HI16:
94f592af 5654 if (fixP->fx_pcrel)
252b5132 5655 abort ();
94f592af 5656 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5657 PPC_HI (value), 2);
252b5132 5658 break;
0baf16f2 5659
252b5132 5660 case BFD_RELOC_HI16_S:
94f592af 5661 if (fixP->fx_pcrel)
252b5132 5662 abort ();
94f592af 5663 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5664 PPC_HA (value), 2);
5665 break;
5666
5667#ifdef OBJ_ELF
0baf16f2 5668 case BFD_RELOC_PPC64_HIGHER:
94f592af 5669 if (fixP->fx_pcrel)
0baf16f2 5670 abort ();
94f592af 5671 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5672 PPC_HIGHER (value), 2);
252b5132
RH		 5673 break;
5674
0baf16f2 5675 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5676 if (fixP->fx_pcrel)
0baf16f2 5677 abort ();
94f592af 5678 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5679 PPC_HIGHERA (value), 2);
5680 break;
5681
5682 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5683 if (fixP->fx_pcrel)
0baf16f2 5684 abort ();
94f592af 5685 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5686 PPC_HIGHEST (value), 2);
5687 break;
5688
5689 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5690 if (fixP->fx_pcrel)
0baf16f2 5691 abort ();
94f592af 5692 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5693 PPC_HIGHESTA (value), 2);
5694 break;
5695
5696 case BFD_RELOC_PPC64_ADDR16_DS:
5697 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5698 case BFD_RELOC_PPC64_GOT16_DS:
5699 case BFD_RELOC_PPC64_GOT16_LO_DS:
5700 case BFD_RELOC_PPC64_PLT16_LO_DS:
5701 case BFD_RELOC_PPC64_SECTOFF_DS:
5702 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5703 case BFD_RELOC_PPC64_TOC16_DS:
5704 case BFD_RELOC_PPC64_TOC16_LO_DS:
5705 case BFD_RELOC_PPC64_PLTGOT16_DS:
5706 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5707 if (fixP->fx_pcrel)
0baf16f2
AM		 5708 abort ();
5709 {
94f592af 5710 unsigned char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
0baf16f2
AM		 5711 unsigned long val;
5712
5713 if (target_big_endian)
5714 val = bfd_getb16 (where);
5715 else
5716 val = bfd_getl16 (where);
5717 val |= (value & 0xfffc);
5718 if (target_big_endian)
5719 bfd_putb16 ((bfd_vma) val, where);
5720 else
5721 bfd_putl16 ((bfd_vma) val, where);
5722 }
5723 break;
cdba85ec
AM		 5724
5725 case BFD_RELOC_PPC_TLS:
5726 case BFD_RELOC_PPC_DTPMOD:
5727 case BFD_RELOC_PPC_TPREL16:
5728 case BFD_RELOC_PPC_TPREL16_LO:
5729 case BFD_RELOC_PPC_TPREL16_HI:
5730 case BFD_RELOC_PPC_TPREL16_HA:
5731 case BFD_RELOC_PPC_TPREL:
5732 case BFD_RELOC_PPC_DTPREL16:
5733 case BFD_RELOC_PPC_DTPREL16_LO:
5734 case BFD_RELOC_PPC_DTPREL16_HI:
5735 case BFD_RELOC_PPC_DTPREL16_HA:
5736 case BFD_RELOC_PPC_DTPREL:
5737 case BFD_RELOC_PPC_GOT_TLSGD16:
5738 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5739 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5740 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5741 case BFD_RELOC_PPC_GOT_TLSLD16:
5742 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5743 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5744 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5745 case BFD_RELOC_PPC_GOT_TPREL16:
5746 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5747 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5748 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5749 case BFD_RELOC_PPC_GOT_DTPREL16:
5750 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5751 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5752 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5753 case BFD_RELOC_PPC64_TPREL16_DS:
5754 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5755 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5756 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5757 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5758 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5759 case BFD_RELOC_PPC64_DTPREL16_DS:
5760 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5761 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5762 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5763 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5764 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
5765 break;
0baf16f2 5766#endif
252b5132 5767 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5768 bytes, rather than 2, so offset it here appropriately. */
252b5132 5769 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5770 if (fixP->fx_pcrel)
252b5132
RH		 5771 abort ();
5772
94f592af 5773 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5774 + ((target_big_endian) ? 2 : 0),
5775 value, 2);
5776 break;
5777
5778 case BFD_RELOC_8:
94f592af 5779 if (fixP->fx_pcrel)
252b5132
RH		 5780 abort ();
5781
94f592af 5782 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5783 value, 1);
5784 break;
5785
5786 case BFD_RELOC_24_PLT_PCREL:
5787 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5788 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5789 abort ();
5790
94f592af 5791 if (fixP->fx_done)
99a814a1
AM		 5792 {
5793 char *where;
5794 unsigned long insn;
5795
5796 /* Fetch the instruction, insert the fully resolved operand
5797 value, and stuff the instruction back again. */
94f592af 5798 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 5799 if (target_big_endian)
5800 insn = bfd_getb32 ((unsigned char *) where);
5801 else
5802 insn = bfd_getl32 ((unsigned char *) where);
5803 if ((value & 3) != 0)
94f592af 5804 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5805 _("must branch to an address a multiple of 4"));
5806 if ((offsetT) value < -0x40000000
5807 || (offsetT) value >= 0x40000000)
94f592af 5808 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5809 _("@local or @plt branch destination is too far away, %ld bytes"),
5810 (long) value);
5811 insn = insn | (value & 0x03fffffc);
5812 if (target_big_endian)
5813 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5814 else
5815 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5816 }
252b5132
RH		 5817 break;
5818
5819 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 5820 fixP->fx_done = 0;
5821 if (fixP->fx_addsy
5822 && !S_IS_DEFINED (fixP->fx_addsy)
5823 && !S_IS_WEAK (fixP->fx_addsy))
5824 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 5825 break;
5826
5827 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5828 fixP->fx_done = 0;
252b5132
RH		 5829 break;
5830
0baf16f2 5831#ifdef OBJ_ELF
0baf16f2
AM		 5832 /* Generated by reference to `sym@tocbase'. The sym is
5833 ignored by the linker. */
5834 case BFD_RELOC_PPC64_TOC:
94f592af 5835 fixP->fx_done = 0;
0baf16f2 5836 break;
0baf16f2 5837#endif
252b5132 5838 default:
bc805888 5839 fprintf (stderr,
94f592af 5840 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 5841 fflush (stderr);
252b5132
RH		 5842 abort ();
5843 }
5844 }
5845
5846#ifdef OBJ_ELF
94f592af 5847 fixP->fx_addnumber = value;
252b5132 5848#else
94f592af
NC		 5849 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
5850 fixP->fx_addnumber = 0;
252b5132
RH		 5851 else
5852 {
5853#ifdef TE_PE
94f592af 5854 fixP->fx_addnumber = 0;
252b5132
RH		 5855#else
5856 /* We want to use the offset within the data segment of the
5857 symbol, not the actual VMA of the symbol. */
94f592af
NC		 5858 fixP->fx_addnumber =
5859 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 5860#endif
5861 }
5862#endif
252b5132
RH		 5863}
5864
5865/* Generate a reloc for a fixup. */
5866
5867arelent *
5868tc_gen_reloc (seg, fixp)
92161534 5869 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5870 fixS *fixp;
5871{
5872 arelent *reloc;
5873
5874 reloc = (arelent *) xmalloc (sizeof (arelent));
5875
49309057
ILT		 5876 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
5877 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 5878 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
5879 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
5880 if (reloc->howto == (reloc_howto_type *) NULL)
5881 {
5882 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 5883 _("reloc %d not supported by object file format"),
5884 (int) fixp->fx_r_type);
252b5132
RH		 5885 return NULL;
5886 }
5887 reloc->addend = fixp->fx_addnumber;
5888
5889 return reloc;
5890}
GDB Binutils - Deliverables
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