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Add .abiversion related support for ELFv2
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
aea77599 3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
cc643b88 4 Free Software Foundation, Inc.
252b5132
RH		 5 Written by Ian Lance Taylor, Cygnus Support.
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
ec2655a6 11 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 02110-1301, USA. */
252b5132 23
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
ee67d69a 32#include "elf/ppc64.h"
5d6f4f16 33#include "dwarf2dbg.h"
252b5132
RH		 34#endif
35
36#ifdef TE_PE
37#include "coff/pe.h"
38#endif
39
85645aed
TG		 40#ifdef OBJ_XCOFF
41#include "coff/xcoff.h"
42#include "libxcoff.h"
43#endif
44
252b5132
RH		 45/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
46
47/* Tell the main code what the endianness is. */
48extern int target_big_endian;
49
50/* Whether or not, we've set target_big_endian. */
51static int set_target_endian = 0;
52
53/* Whether to use user friendly register names. */
54#ifndef TARGET_REG_NAMES_P
55#ifdef TE_PE
b34976b6 56#define TARGET_REG_NAMES_P TRUE
252b5132 57#else
b34976b6 58#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 59#endif
60#endif
61
0baf16f2
AM		 62/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 HIGHESTA. */
64
65/* #lo(value) denotes the least significant 16 bits of the indicated. */
66#define PPC_LO(v) ((v) & 0xffff)
67
68/* #hi(value) denotes bits 16 through 31 of the indicated value. */
69#define PPC_HI(v) (((v) >> 16) & 0xffff)
70
71/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
72 the indicated value, compensating for #lo() being treated as a
73 signed number. */
15c1449b 74#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 75
76/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 77#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 78
79/* #highera(value) denotes bits 32 through 47 of the indicated value,
80 compensating for #lo() being treated as a signed number. */
15c1449b 81#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 82
83/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 84#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 85
86/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 87 compensating for #lo being treated as a signed number. */
88#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2 89
f9c6b907
AM		 90#define SEX16(val) (((val) ^ 0x8000) - 0x8000)
91
92/* For the time being on ppc64, don't report overflow on @h and @ha
93 applied to constants. */
94#define REPORT_OVERFLOW_HI 0
0baf16f2 95
b34976b6 96static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 97
98027b10
AM		 98static void ppc_macro (char *, const struct powerpc_macro *);
99static void ppc_byte (int);
0baf16f2
AM		 100
101#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 102static void ppc_tc (int);
103static void ppc_machine (int);
0baf16f2 104#endif
252b5132
RH		 105
106#ifdef OBJ_XCOFF
98027b10
AM		 107static void ppc_comm (int);
108static void ppc_bb (int);
109static void ppc_bc (int);
110static void ppc_bf (int);
111static void ppc_biei (int);
112static void ppc_bs (int);
113static void ppc_eb (int);
114static void ppc_ec (int);
115static void ppc_ef (int);
116static void ppc_es (int);
117static void ppc_csect (int);
85645aed 118static void ppc_dwsect (int);
98027b10
AM		 119static void ppc_change_csect (symbolS *, offsetT);
120static void ppc_function (int);
121static void ppc_extern (int);
122static void ppc_lglobl (int);
c865e45b 123static void ppc_ref (int);
98027b10
AM		 124static void ppc_section (int);
125static void ppc_named_section (int);
126static void ppc_stabx (int);
127static void ppc_rename (int);
128static void ppc_toc (int);
129static void ppc_xcoff_cons (int);
130static void ppc_vbyte (int);
252b5132
RH		 131#endif
132
133#ifdef OBJ_ELF
98027b10
AM		 134static void ppc_elf_cons (int);
135static void ppc_elf_rdata (int);
136static void ppc_elf_lcomm (int);
ee67d69a 137static void ppc_elf_abiversion (int);
252b5132
RH		 138#endif
139
140#ifdef TE_PE
98027b10
AM		 141static void ppc_previous (int);
142static void ppc_pdata (int);
143static void ppc_ydata (int);
144static void ppc_reldata (int);
145static void ppc_rdata (int);
146static void ppc_ualong (int);
147static void ppc_znop (int);
148static void ppc_pe_comm (int);
149static void ppc_pe_section (int);
150static void ppc_pe_function (int);
151static void ppc_pe_tocd (int);
252b5132
RH		 152#endif
153\f
154/* Generic assembler global variables which must be defined by all
155 targets. */
156
157#ifdef OBJ_ELF
158/* This string holds the chars that always start a comment. If the
159 pre-processor is disabled, these aren't very useful. The macro
160 tc_comment_chars points to this. We use this, rather than the
161 usual comment_chars, so that we can switch for Solaris conventions. */
162static const char ppc_solaris_comment_chars[] = "#!";
163static const char ppc_eabi_comment_chars[] = "#";
164
165#ifdef TARGET_SOLARIS_COMMENT
166const char *ppc_comment_chars = ppc_solaris_comment_chars;
167#else
168const char *ppc_comment_chars = ppc_eabi_comment_chars;
169#endif
170#else
171const char comment_chars[] = "#";
172#endif
173
174/* Characters which start a comment at the beginning of a line. */
175const char line_comment_chars[] = "#";
176
177/* Characters which may be used to separate multiple commands on a
178 single line. */
179const char line_separator_chars[] = ";";
180
181/* Characters which are used to indicate an exponent in a floating
182 point number. */
183const char EXP_CHARS[] = "eE";
184
185/* Characters which mean that a number is a floating point constant,
186 as in 0d1.0. */
187const char FLT_CHARS[] = "dD";
5ce8663f 188
5e02f92e 189/* Anything that can start an operand needs to be mentioned here,
ac805826 190 to stop the input scrubber eating whitespace. */
5e02f92e 191const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 192
193/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
194int ppc_cie_data_alignment;
783de163 195
8fbf7334
JL		 196/* The dwarf2 minimum instruction length. */
197int ppc_dwarf2_line_min_insn_length;
198
cef4f754
AM		 199/* More than this number of nops in an alignment op gets a branch
200 instead. */
201unsigned long nop_limit = 4;
202
783de163
AM		 203/* The type of processor we are assembling for. This is one or more
204 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 205ppc_cpu_t ppc_cpu = 0;
776fc418 206ppc_cpu_t sticky = 0;
01efc3af 207
ee67d69a
AM		 208/* Value for ELF e_flags EF_PPC64_ABI. */
209unsigned int ppc_abiversion = 0;
210
01efc3af
AM		 211/* Flags set on encountering toc relocs. */
212enum {
213 has_large_toc_reloc = 1,
214 has_small_toc_reloc = 2
215} toc_reloc_types;
252b5132
RH		 216\f
217/* The target specific pseudo-ops which we support. */
218
219const pseudo_typeS md_pseudo_table[] =
220{
221 /* Pseudo-ops which must be overridden. */
222 { "byte", ppc_byte, 0 },
223
224#ifdef OBJ_XCOFF
225 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
226 legitimately belong in the obj-*.c file. However, XCOFF is based
227 on COFF, and is only implemented for the RS/6000. We just use
228 obj-coff.c, and add what we need here. */
229 { "comm", ppc_comm, 0 },
230 { "lcomm", ppc_comm, 1 },
231 { "bb", ppc_bb, 0 },
232 { "bc", ppc_bc, 0 },
233 { "bf", ppc_bf, 0 },
234 { "bi", ppc_biei, 0 },
235 { "bs", ppc_bs, 0 },
236 { "csect", ppc_csect, 0 },
85645aed 237 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 238 { "data", ppc_section, 'd' },
239 { "eb", ppc_eb, 0 },
240 { "ec", ppc_ec, 0 },
241 { "ef", ppc_ef, 0 },
242 { "ei", ppc_biei, 1 },
243 { "es", ppc_es, 0 },
244 { "extern", ppc_extern, 0 },
245 { "function", ppc_function, 0 },
246 { "lglobl", ppc_lglobl, 0 },
c865e45b 247 { "ref", ppc_ref, 0 },
252b5132
RH		 248 { "rename", ppc_rename, 0 },
249 { "section", ppc_named_section, 0 },
250 { "stabx", ppc_stabx, 0 },
251 { "text", ppc_section, 't' },
252 { "toc", ppc_toc, 0 },
253 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 254 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 255 { "word", ppc_xcoff_cons, 1 },
256 { "short", ppc_xcoff_cons, 1 },
257 { "vbyte", ppc_vbyte, 0 },
258#endif
259
260#ifdef OBJ_ELF
0baf16f2
AM		 261 { "llong", ppc_elf_cons, 8 },
262 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 263 { "long", ppc_elf_cons, 4 },
264 { "word", ppc_elf_cons, 2 },
265 { "short", ppc_elf_cons, 2 },
266 { "rdata", ppc_elf_rdata, 0 },
267 { "rodata", ppc_elf_rdata, 0 },
268 { "lcomm", ppc_elf_lcomm, 0 },
ee67d69a 269 { "abiversion", ppc_elf_abiversion, 0 },
252b5132
RH		 270#endif
271
272#ifdef TE_PE
99a814a1 273 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 274 { "previous", ppc_previous, 0 },
275 { "pdata", ppc_pdata, 0 },
276 { "ydata", ppc_ydata, 0 },
277 { "reldata", ppc_reldata, 0 },
278 { "rdata", ppc_rdata, 0 },
279 { "ualong", ppc_ualong, 0 },
280 { "znop", ppc_znop, 0 },
281 { "comm", ppc_pe_comm, 0 },
282 { "lcomm", ppc_pe_comm, 1 },
283 { "section", ppc_pe_section, 0 },
284 { "function", ppc_pe_function,0 },
285 { "tocd", ppc_pe_tocd, 0 },
286#endif
287
0baf16f2 288#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 289 { "tc", ppc_tc, 0 },
0baf16f2
AM		 290 { "machine", ppc_machine, 0 },
291#endif
252b5132
RH		 292
293 { NULL, NULL, 0 }
294};
295
296\f
99a814a1
AM		 297/* Predefined register names if -mregnames (or default for Windows NT).
298 In general, there are lots of them, in an attempt to be compatible
299 with a number of other Windows NT assemblers. */
252b5132
RH		 300
301/* Structure to hold information about predefined registers. */
302struct pd_reg
303 {
304 char *name;
305 int value;
306 };
307
308/* List of registers that are pre-defined:
309
310 Each general register has predefined names of the form:
311 1. r<reg_num> which has the value <reg_num>.
312 2. r.<reg_num> which has the value <reg_num>.
313
252b5132
RH		 314 Each floating point register has predefined names of the form:
315 1. f<reg_num> which has the value <reg_num>.
316 2. f.<reg_num> which has the value <reg_num>.
317
7a899fff
C		 318 Each vector unit register has predefined names of the form:
319 1. v<reg_num> which has the value <reg_num>.
320 2. v.<reg_num> which has the value <reg_num>.
321
252b5132
RH		 322 Each condition register has predefined names of the form:
323 1. cr<reg_num> which has the value <reg_num>.
324 2. cr.<reg_num> which has the value <reg_num>.
325
326 There are individual registers as well:
327 sp or r.sp has the value 1
328 rtoc or r.toc has the value 2
329 fpscr has the value 0
330 xer has the value 1
331 lr has the value 8
332 ctr has the value 9
333 pmr has the value 0
334 dar has the value 19
335 dsisr has the value 18
336 dec has the value 22
337 sdr1 has the value 25
338 srr0 has the value 26
339 srr1 has the value 27
340
81d4177b 341 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 342
343static const struct pd_reg pre_defined_registers[] =
344{
345 { "cr.0", 0 }, /* Condition Registers */
346 { "cr.1", 1 },
347 { "cr.2", 2 },
348 { "cr.3", 3 },
349 { "cr.4", 4 },
350 { "cr.5", 5 },
351 { "cr.6", 6 },
352 { "cr.7", 7 },
353
354 { "cr0", 0 },
355 { "cr1", 1 },
356 { "cr2", 2 },
357 { "cr3", 3 },
358 { "cr4", 4 },
359 { "cr5", 5 },
360 { "cr6", 6 },
361 { "cr7", 7 },
362
363 { "ctr", 9 },
364
365 { "dar", 19 }, /* Data Access Register */
366 { "dec", 22 }, /* Decrementer */
367 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
368
369 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 370 { "f.1", 1 },
371 { "f.10", 10 },
372 { "f.11", 11 },
373 { "f.12", 12 },
374 { "f.13", 13 },
375 { "f.14", 14 },
376 { "f.15", 15 },
377 { "f.16", 16 },
378 { "f.17", 17 },
379 { "f.18", 18 },
380 { "f.19", 19 },
381 { "f.2", 2 },
382 { "f.20", 20 },
383 { "f.21", 21 },
384 { "f.22", 22 },
385 { "f.23", 23 },
386 { "f.24", 24 },
387 { "f.25", 25 },
388 { "f.26", 26 },
389 { "f.27", 27 },
390 { "f.28", 28 },
391 { "f.29", 29 },
392 { "f.3", 3 },
252b5132
RH		 393 { "f.30", 30 },
394 { "f.31", 31 },
066be9f7
PB		 395
396 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
397 { "f.33", 33 },
398 { "f.34", 34 },
399 { "f.35", 35 },
400 { "f.36", 36 },
401 { "f.37", 37 },
402 { "f.38", 38 },
403 { "f.39", 39 },
81d4177b 404 { "f.4", 4 },
066be9f7
PB		 405 { "f.40", 40 },
406 { "f.41", 41 },
407 { "f.42", 42 },
408 { "f.43", 43 },
409 { "f.44", 44 },
410 { "f.45", 45 },
411 { "f.46", 46 },
412 { "f.47", 47 },
413 { "f.48", 48 },
414 { "f.49", 49 },
81d4177b 415 { "f.5", 5 },
066be9f7
PB		 416 { "f.50", 50 },
417 { "f.51", 51 },
418 { "f.52", 52 },
419 { "f.53", 53 },
420 { "f.54", 54 },
421 { "f.55", 55 },
422 { "f.56", 56 },
423 { "f.57", 57 },
424 { "f.58", 58 },
425 { "f.59", 59 },
81d4177b 426 { "f.6", 6 },
066be9f7
PB		 427 { "f.60", 60 },
428 { "f.61", 61 },
429 { "f.62", 62 },
430 { "f.63", 63 },
81d4177b
KH		 431 { "f.7", 7 },
432 { "f.8", 8 },
433 { "f.9", 9 },
434
435 { "f0", 0 },
436 { "f1", 1 },
437 { "f10", 10 },
438 { "f11", 11 },
439 { "f12", 12 },
440 { "f13", 13 },
441 { "f14", 14 },
442 { "f15", 15 },
443 { "f16", 16 },
444 { "f17", 17 },
445 { "f18", 18 },
446 { "f19", 19 },
447 { "f2", 2 },
448 { "f20", 20 },
449 { "f21", 21 },
450 { "f22", 22 },
451 { "f23", 23 },
452 { "f24", 24 },
453 { "f25", 25 },
454 { "f26", 26 },
455 { "f27", 27 },
456 { "f28", 28 },
457 { "f29", 29 },
458 { "f3", 3 },
252b5132
RH		 459 { "f30", 30 },
460 { "f31", 31 },
066be9f7
PB		 461
462 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
463 { "f33", 33 },
464 { "f34", 34 },
465 { "f35", 35 },
466 { "f36", 36 },
467 { "f37", 37 },
468 { "f38", 38 },
469 { "f39", 39 },
81d4177b 470 { "f4", 4 },
066be9f7
PB		 471 { "f40", 40 },
472 { "f41", 41 },
473 { "f42", 42 },
474 { "f43", 43 },
475 { "f44", 44 },
476 { "f45", 45 },
477 { "f46", 46 },
478 { "f47", 47 },
479 { "f48", 48 },
480 { "f49", 49 },
81d4177b 481 { "f5", 5 },
066be9f7
PB		 482 { "f50", 50 },
483 { "f51", 51 },
484 { "f52", 52 },
485 { "f53", 53 },
486 { "f54", 54 },
487 { "f55", 55 },
488 { "f56", 56 },
489 { "f57", 57 },
490 { "f58", 58 },
491 { "f59", 59 },
81d4177b 492 { "f6", 6 },
066be9f7
PB		 493 { "f60", 60 },
494 { "f61", 61 },
495 { "f62", 62 },
496 { "f63", 63 },
81d4177b
KH		 497 { "f7", 7 },
498 { "f8", 8 },
499 { "f9", 9 },
252b5132
RH		 500
501 { "fpscr", 0 },
502
c3d65c1c
BE		 503 /* Quantization registers used with pair single instructions. */
504 { "gqr.0", 0 },
505 { "gqr.1", 1 },
506 { "gqr.2", 2 },
507 { "gqr.3", 3 },
508 { "gqr.4", 4 },
509 { "gqr.5", 5 },
510 { "gqr.6", 6 },
511 { "gqr.7", 7 },
512 { "gqr0", 0 },
513 { "gqr1", 1 },
514 { "gqr2", 2 },
515 { "gqr3", 3 },
516 { "gqr4", 4 },
517 { "gqr5", 5 },
518 { "gqr6", 6 },
519 { "gqr7", 7 },
520
252b5132
RH		 521 { "lr", 8 }, /* Link Register */
522
523 { "pmr", 0 },
524
525 { "r.0", 0 }, /* General Purpose Registers */
526 { "r.1", 1 },
527 { "r.10", 10 },
528 { "r.11", 11 },
529 { "r.12", 12 },
530 { "r.13", 13 },
531 { "r.14", 14 },
532 { "r.15", 15 },
533 { "r.16", 16 },
534 { "r.17", 17 },
535 { "r.18", 18 },
536 { "r.19", 19 },
537 { "r.2", 2 },
538 { "r.20", 20 },
539 { "r.21", 21 },
540 { "r.22", 22 },
541 { "r.23", 23 },
542 { "r.24", 24 },
543 { "r.25", 25 },
544 { "r.26", 26 },
545 { "r.27", 27 },
546 { "r.28", 28 },
547 { "r.29", 29 },
548 { "r.3", 3 },
549 { "r.30", 30 },
550 { "r.31", 31 },
551 { "r.4", 4 },
552 { "r.5", 5 },
553 { "r.6", 6 },
554 { "r.7", 7 },
555 { "r.8", 8 },
556 { "r.9", 9 },
557
558 { "r.sp", 1 }, /* Stack Pointer */
559
560 { "r.toc", 2 }, /* Pointer to the table of contents */
561
562 { "r0", 0 }, /* More general purpose registers */
563 { "r1", 1 },
564 { "r10", 10 },
565 { "r11", 11 },
566 { "r12", 12 },
567 { "r13", 13 },
568 { "r14", 14 },
569 { "r15", 15 },
570 { "r16", 16 },
571 { "r17", 17 },
572 { "r18", 18 },
573 { "r19", 19 },
574 { "r2", 2 },
575 { "r20", 20 },
576 { "r21", 21 },
577 { "r22", 22 },
578 { "r23", 23 },
579 { "r24", 24 },
580 { "r25", 25 },
581 { "r26", 26 },
582 { "r27", 27 },
583 { "r28", 28 },
584 { "r29", 29 },
585 { "r3", 3 },
586 { "r30", 30 },
587 { "r31", 31 },
588 { "r4", 4 },
589 { "r5", 5 },
590 { "r6", 6 },
591 { "r7", 7 },
592 { "r8", 8 },
593 { "r9", 9 },
594
595 { "rtoc", 2 }, /* Table of contents */
596
597 { "sdr1", 25 }, /* Storage Description Register 1 */
598
599 { "sp", 1 },
600
601 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
602 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 603
066be9f7 604 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 605 { "v.1", 1 },
606 { "v.10", 10 },
607 { "v.11", 11 },
608 { "v.12", 12 },
609 { "v.13", 13 },
610 { "v.14", 14 },
611 { "v.15", 15 },
612 { "v.16", 16 },
613 { "v.17", 17 },
614 { "v.18", 18 },
615 { "v.19", 19 },
616 { "v.2", 2 },
617 { "v.20", 20 },
618 { "v.21", 21 },
619 { "v.22", 22 },
620 { "v.23", 23 },
621 { "v.24", 24 },
622 { "v.25", 25 },
623 { "v.26", 26 },
624 { "v.27", 27 },
625 { "v.28", 28 },
626 { "v.29", 29 },
627 { "v.3", 3 },
7a899fff
C		 628 { "v.30", 30 },
629 { "v.31", 31 },
81d4177b
KH		 630 { "v.4", 4 },
631 { "v.5", 5 },
632 { "v.6", 6 },
633 { "v.7", 7 },
634 { "v.8", 8 },
635 { "v.9", 9 },
7a899fff
C		 636
637 { "v0", 0 },
81d4177b
KH		 638 { "v1", 1 },
639 { "v10", 10 },
640 { "v11", 11 },
641 { "v12", 12 },
642 { "v13", 13 },
643 { "v14", 14 },
644 { "v15", 15 },
645 { "v16", 16 },
646 { "v17", 17 },
647 { "v18", 18 },
648 { "v19", 19 },
649 { "v2", 2 },
650 { "v20", 20 },
651 { "v21", 21 },
652 { "v22", 22 },
653 { "v23", 23 },
654 { "v24", 24 },
655 { "v25", 25 },
656 { "v26", 26 },
657 { "v27", 27 },
658 { "v28", 28 },
659 { "v29", 29 },
660 { "v3", 3 },
7a899fff
C		 661 { "v30", 30 },
662 { "v31", 31 },
81d4177b
KH		 663 { "v4", 4 },
664 { "v5", 5 },
665 { "v6", 6 },
666 { "v7", 7 },
667 { "v8", 8 },
7a899fff 668 { "v9", 9 },
252b5132 669
066be9f7
PB		 670 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
671 { "vs.1", 1 },
672 { "vs.10", 10 },
673 { "vs.11", 11 },
674 { "vs.12", 12 },
675 { "vs.13", 13 },
676 { "vs.14", 14 },
677 { "vs.15", 15 },
678 { "vs.16", 16 },
679 { "vs.17", 17 },
680 { "vs.18", 18 },
681 { "vs.19", 19 },
682 { "vs.2", 2 },
683 { "vs.20", 20 },
684 { "vs.21", 21 },
685 { "vs.22", 22 },
686 { "vs.23", 23 },
687 { "vs.24", 24 },
688 { "vs.25", 25 },
689 { "vs.26", 26 },
690 { "vs.27", 27 },
691 { "vs.28", 28 },
692 { "vs.29", 29 },
693 { "vs.3", 3 },
694 { "vs.30", 30 },
695 { "vs.31", 31 },
696 { "vs.32", 32 },
697 { "vs.33", 33 },
698 { "vs.34", 34 },
699 { "vs.35", 35 },
700 { "vs.36", 36 },
701 { "vs.37", 37 },
702 { "vs.38", 38 },
703 { "vs.39", 39 },
704 { "vs.4", 4 },
705 { "vs.40", 40 },
706 { "vs.41", 41 },
707 { "vs.42", 42 },
708 { "vs.43", 43 },
709 { "vs.44", 44 },
710 { "vs.45", 45 },
711 { "vs.46", 46 },
712 { "vs.47", 47 },
713 { "vs.48", 48 },
714 { "vs.49", 49 },
715 { "vs.5", 5 },
716 { "vs.50", 50 },
717 { "vs.51", 51 },
718 { "vs.52", 52 },
719 { "vs.53", 53 },
720 { "vs.54", 54 },
721 { "vs.55", 55 },
722 { "vs.56", 56 },
723 { "vs.57", 57 },
724 { "vs.58", 58 },
725 { "vs.59", 59 },
726 { "vs.6", 6 },
727 { "vs.60", 60 },
728 { "vs.61", 61 },
729 { "vs.62", 62 },
730 { "vs.63", 63 },
731 { "vs.7", 7 },
732 { "vs.8", 8 },
733 { "vs.9", 9 },
734
735 { "vs0", 0 },
736 { "vs1", 1 },
737 { "vs10", 10 },
738 { "vs11", 11 },
739 { "vs12", 12 },
740 { "vs13", 13 },
741 { "vs14", 14 },
742 { "vs15", 15 },
743 { "vs16", 16 },
744 { "vs17", 17 },
745 { "vs18", 18 },
746 { "vs19", 19 },
747 { "vs2", 2 },
748 { "vs20", 20 },
749 { "vs21", 21 },
750 { "vs22", 22 },
751 { "vs23", 23 },
752 { "vs24", 24 },
753 { "vs25", 25 },
754 { "vs26", 26 },
755 { "vs27", 27 },
756 { "vs28", 28 },
757 { "vs29", 29 },
758 { "vs3", 3 },
759 { "vs30", 30 },
760 { "vs31", 31 },
761 { "vs32", 32 },
762 { "vs33", 33 },
763 { "vs34", 34 },
764 { "vs35", 35 },
765 { "vs36", 36 },
766 { "vs37", 37 },
767 { "vs38", 38 },
768 { "vs39", 39 },
769 { "vs4", 4 },
770 { "vs40", 40 },
771 { "vs41", 41 },
772 { "vs42", 42 },
773 { "vs43", 43 },
774 { "vs44", 44 },
775 { "vs45", 45 },
776 { "vs46", 46 },
777 { "vs47", 47 },
778 { "vs48", 48 },
779 { "vs49", 49 },
780 { "vs5", 5 },
781 { "vs50", 50 },
782 { "vs51", 51 },
783 { "vs52", 52 },
784 { "vs53", 53 },
785 { "vs54", 54 },
786 { "vs55", 55 },
787 { "vs56", 56 },
788 { "vs57", 57 },
789 { "vs58", 58 },
790 { "vs59", 59 },
791 { "vs6", 6 },
792 { "vs60", 60 },
793 { "vs61", 61 },
794 { "vs62", 62 },
795 { "vs63", 63 },
796 { "vs7", 7 },
797 { "vs8", 8 },
798 { "vs9", 9 },
799
252b5132
RH		 800 { "xer", 1 },
801
802};
803
bc805888 804#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 805
806/* Given NAME, find the register number associated with that name, return
807 the integer value associated with the given name or -1 on failure. */
808
252b5132 809static int
98027b10 810reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 811{
812 int middle, low, high;
813 int cmp;
814
815 low = 0;
816 high = regcount - 1;
817
818 do
819 {
820 middle = (low + high) / 2;
821 cmp = strcasecmp (name, regs[middle].name);
822 if (cmp < 0)
823 high = middle - 1;
824 else if (cmp > 0)
825 low = middle + 1;
826 else
827 return regs[middle].value;
828 }
829 while (low <= high);
830
831 return -1;
832}
833
834/*
99a814a1 835 * Summary of register_name.
252b5132
RH		 836 *
837 * in: Input_line_pointer points to 1st char of operand.
838 *
839 * out: A expressionS.
840 * The operand may have been a register: in this case, X_op == O_register,
841 * X_add_number is set to the register number, and truth is returned.
842 * Input_line_pointer->(next non-blank) char after operand, or is in its
843 * original state.
844 */
845
b34976b6 846static bfd_boolean
98027b10 847register_name (expressionS *expressionP)
252b5132
RH		 848{
849 int reg_number;
850 char *name;
851 char *start;
852 char c;
853
99a814a1 854 /* Find the spelling of the operand. */
252b5132 855 start = name = input_line_pointer;
3882b010 856 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 857 name = ++input_line_pointer;
858
3882b010 859 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 860 return FALSE;
252b5132
RH		 861
862 c = get_symbol_end ();
863 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
864
468cced8
AM		 865 /* Put back the delimiting char. */
866 *input_line_pointer = c;
867
99a814a1 868 /* Look to see if it's in the register table. */
81d4177b 869 if (reg_number >= 0)
252b5132
RH		 870 {
871 expressionP->X_op = O_register;
872 expressionP->X_add_number = reg_number;
81d4177b 873
99a814a1 874 /* Make the rest nice. */
252b5132
RH		 875 expressionP->X_add_symbol = NULL;
876 expressionP->X_op_symbol = NULL;
b34976b6 877 return TRUE;
252b5132 878 }
468cced8
AM		 879
880 /* Reset the line as if we had not done anything. */
881 input_line_pointer = start;
b34976b6 882 return FALSE;
252b5132
RH		 883}
884\f
885/* This function is called for each symbol seen in an expression. It
886 handles the special parsing which PowerPC assemblers are supposed
887 to use for condition codes. */
888
889/* Whether to do the special parsing. */
b34976b6 890static bfd_boolean cr_operand;
252b5132
RH		 891
892/* Names to recognize in a condition code. This table is sorted. */
893static const struct pd_reg cr_names[] =
894{
895 { "cr0", 0 },
896 { "cr1", 1 },
897 { "cr2", 2 },
898 { "cr3", 3 },
899 { "cr4", 4 },
900 { "cr5", 5 },
901 { "cr6", 6 },
902 { "cr7", 7 },
903 { "eq", 2 },
904 { "gt", 1 },
905 { "lt", 0 },
906 { "so", 3 },
907 { "un", 3 }
908};
909
910/* Parsing function. This returns non-zero if it recognized an
911 expression. */
912
913int
91d6fa6a 914ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 915{
916 int val;
917
918 if (! cr_operand)
919 return 0;
920
13abbae3
AM		 921 if (*name == '%')
922 ++name;
252b5132
RH		 923 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
924 name);
925 if (val < 0)
926 return 0;
927
91d6fa6a
NC		 928 exp->X_op = O_constant;
929 exp->X_add_number = val;
252b5132
RH		 930
931 return 1;
932}
933\f
934/* Local variables. */
935
2b3c4602
AM		 936/* Whether to target xcoff64/elf64. */
937static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 938
252b5132
RH		 939/* Opcode hash table. */
940static struct hash_control *ppc_hash;
941
942/* Macro hash table. */
943static struct hash_control *ppc_macro_hash;
944
945#ifdef OBJ_ELF
99a814a1 946/* What type of shared library support to use. */
5d6f4f16 947static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 948
99a814a1 949/* Flags to set in the elf header. */
252b5132
RH		 950static flagword ppc_flags = 0;
951
952/* Whether this is Solaris or not. */
953#ifdef TARGET_SOLARIS_COMMENT
b34976b6 954#define SOLARIS_P TRUE
252b5132 955#else
b34976b6 956#define SOLARIS_P FALSE
252b5132
RH		 957#endif
958
b34976b6 959static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 960#endif
961
962#ifdef OBJ_XCOFF
963
964/* The RS/6000 assembler uses the .csect pseudo-op to generate code
965 using a bunch of different sections. These assembler sections,
966 however, are all encompassed within the .text or .data sections of
967 the final output file. We handle this by using different
968 subsegments within these main segments. */
969
970/* Next subsegment to allocate within the .text segment. */
971static subsegT ppc_text_subsegment = 2;
972
973/* Linked list of csects in the text section. */
974static symbolS *ppc_text_csects;
975
976/* Next subsegment to allocate within the .data segment. */
977static subsegT ppc_data_subsegment = 2;
978
979/* Linked list of csects in the data section. */
980static symbolS *ppc_data_csects;
981
982/* The current csect. */
983static symbolS *ppc_current_csect;
984
985/* The RS/6000 assembler uses a TOC which holds addresses of functions
986 and variables. Symbols are put in the TOC with the .tc pseudo-op.
987 A special relocation is used when accessing TOC entries. We handle
988 the TOC as a subsegment within the .data segment. We set it up if
989 we see a .toc pseudo-op, and save the csect symbol here. */
990static symbolS *ppc_toc_csect;
991
992/* The first frag in the TOC subsegment. */
993static fragS *ppc_toc_frag;
994
995/* The first frag in the first subsegment after the TOC in the .data
996 segment. NULL if there are no subsegments after the TOC. */
997static fragS *ppc_after_toc_frag;
998
999/* The current static block. */
1000static symbolS *ppc_current_block;
1001
1002/* The COFF debugging section; set by md_begin. This is not the
1003 .debug section, but is instead the secret BFD section which will
1004 cause BFD to set the section number of a symbol to N_DEBUG. */
1005static asection *ppc_coff_debug_section;
1006
85645aed
TG		 1007/* Structure to set the length field of the dwarf sections. */
1008struct dw_subsection {
1009 /* Subsections are simply linked. */
1010 struct dw_subsection *link;
1011
1012 /* The subsection number. */
1013 subsegT subseg;
1014
1015 /* Expression to compute the length of the section. */
1016 expressionS end_exp;
1017};
1018
1019static struct dw_section {
1020 /* Corresponding section. */
1021 segT sect;
1022
1023 /* Simply linked list of subsections with a label. */
1024 struct dw_subsection *list_subseg;
1025
1026 /* The anonymous subsection. */
1027 struct dw_subsection *anon_subseg;
1028} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1029#endif /* OBJ_XCOFF */
1030
1031#ifdef TE_PE
1032
1033/* Various sections that we need for PE coff support. */
1034static segT ydata_section;
1035static segT pdata_section;
1036static segT reldata_section;
1037static segT rdata_section;
1038static segT tocdata_section;
1039
81d4177b 1040/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1041static segT ppc_previous_section;
1042static segT ppc_current_section;
1043
1044#endif /* TE_PE */
1045
1046#ifdef OBJ_ELF
1047symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1048#define PPC_APUINFO_ISEL 0x40
1049#define PPC_APUINFO_PMR 0x41
1050#define PPC_APUINFO_RFMCI 0x42
1051#define PPC_APUINFO_CACHELCK 0x43
1052#define PPC_APUINFO_SPE 0x100
1053#define PPC_APUINFO_EFS 0x101
1054#define PPC_APUINFO_BRLOCK 0x102
b9c361e0 1055#define PPC_APUINFO_VLE 0x104
6a0c61b7 1056
b34976b6
AM		 1057/*
1058 * We keep a list of APUinfo
6a0c61b7
EZ		 1059 */
1060unsigned long *ppc_apuinfo_list;
1061unsigned int ppc_apuinfo_num;
1062unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1063#endif /* OBJ_ELF */
1064\f
1065#ifdef OBJ_ELF
15c1449b 1066const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1067#else
15c1449b 1068const char *const md_shortopts = "um:";
252b5132 1069#endif
cef4f754 1070#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1071const struct option md_longopts[] = {
cef4f754 1072 {"nops", required_argument, NULL, OPTION_NOPS},
252b5132
RH		 1073 {NULL, no_argument, NULL, 0}
1074};
15c1449b 1075const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1076
1077int
98027b10 1078md_parse_option (int c, char *arg)
252b5132 1079{
69fe9ce5
AM		 1080 ppc_cpu_t new_cpu;
1081
252b5132
RH		 1082 switch (c)
1083 {
1084 case 'u':
1085 /* -u means that any undefined symbols should be treated as
1086 external, which is the default for gas anyhow. */
1087 break;
1088
1089#ifdef OBJ_ELF
1090 case 'l':
1091 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1092 sake, recognize -be also. */
252b5132
RH		 1093 if (strcmp (arg, "e") == 0)
1094 {
1095 target_big_endian = 0;
1096 set_target_endian = 1;
b9c361e0 1097 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1098 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1099 }
1100 else
1101 return 0;
1102
1103 break;
1104
1105 case 'b':
1106 if (strcmp (arg, "e") == 0)
1107 {
1108 target_big_endian = 1;
1109 set_target_endian = 1;
1110 }
1111 else
1112 return 0;
1113
1114 break;
1115
1116 case 'K':
99a814a1 1117 /* Recognize -K PIC. */
252b5132
RH		 1118 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1119 {
1120 shlib = SHLIB_PIC;
1121 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1122 }
1123 else
1124 return 0;
1125
1126 break;
1127#endif
1128
7f6d05e8
CP		 1129 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1130 case 'a':
1131 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1132 {
1133#ifdef BFD64
1134 ppc_obj64 = 1;
d6ed37ed
AM		 1135 if (ppc_cpu & PPC_OPCODE_VLE)
1136 as_bad (_("the use of -mvle requires -a32."));
2a98c3a6
AM		 1137#else
1138 as_fatal (_("%s unsupported"), "-a64");
1139#endif
1140 }
7f6d05e8 1141 else if (strcmp (arg, "32") == 0)
2b3c4602 1142 ppc_obj64 = 0;
7f6d05e8
CP		 1143 else
1144 return 0;
1145 break;
81d4177b 1146
252b5132 1147 case 'm':
776fc418 1148 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
b9c361e0
JL		 1149 if (new_cpu != 0)
1150 {
1151 ppc_cpu = new_cpu;
d6ed37ed
AM		 1152 if (strcmp (arg, "vle") == 0)
1153 {
1154 if (set_target_endian && target_big_endian == 0)
1155 as_bad (_("the use of -mvle requires big endian."));
1156 if (ppc_obj64)
1157 as_bad (_("the use of -mvle requires -a32."));
1158 }
b9c361e0 1159 }
252b5132
RH		 1160
1161 else if (strcmp (arg, "regnames") == 0)
b34976b6 1162 reg_names_p = TRUE;
252b5132
RH		 1163
1164 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1165 reg_names_p = FALSE;
252b5132
RH		 1166
1167#ifdef OBJ_ELF
99a814a1
AM		 1168 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1169 that require relocation. */
252b5132
RH		 1170 else if (strcmp (arg, "relocatable") == 0)
1171 {
5d6f4f16 1172 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1173 ppc_flags |= EF_PPC_RELOCATABLE;
1174 }
1175
1176 else if (strcmp (arg, "relocatable-lib") == 0)
1177 {
5d6f4f16 1178 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1179 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1180 }
1181
99a814a1 1182 /* -memb, set embedded bit. */
252b5132
RH		 1183 else if (strcmp (arg, "emb") == 0)
1184 ppc_flags |= EF_PPC_EMB;
1185
cc643b88 1186 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1187 else if (strcmp (arg, "little") == 0
1188 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1189 {
1190 target_big_endian = 0;
1191 set_target_endian = 1;
b9c361e0 1192 if (ppc_cpu & PPC_OPCODE_VLE)
d6ed37ed 1193 as_bad (_("the use of -mvle requires big endian."));
252b5132
RH		 1194 }
1195
1196 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1197 {
1198 target_big_endian = 1;
1199 set_target_endian = 1;
1200 }
1201
1202 else if (strcmp (arg, "solaris") == 0)
1203 {
b34976b6 1204 msolaris = TRUE;
252b5132
RH		 1205 ppc_comment_chars = ppc_solaris_comment_chars;
1206 }
1207
1208 else if (strcmp (arg, "no-solaris") == 0)
1209 {
b34976b6 1210 msolaris = FALSE;
252b5132
RH		 1211 ppc_comment_chars = ppc_eabi_comment_chars;
1212 }
1213#endif
1214 else
1215 {
1216 as_bad (_("invalid switch -m%s"), arg);
1217 return 0;
1218 }
1219 break;
1220
1221#ifdef OBJ_ELF
1222 /* -V: SVR4 argument to print version ID. */
1223 case 'V':
1224 print_version_id ();
1225 break;
1226
1227 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1228 should be emitted or not. FIXME: Not implemented. */
1229 case 'Q':
1230 break;
1231
1232 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1233 rather than .stabs.excl, which is ignored by the linker.
1234 FIXME: Not implemented. */
1235 case 's':
1236 if (arg)
1237 return 0;
1238
1239 break;
1240#endif
1241
cef4f754
AM		 1242 case OPTION_NOPS:
1243 {
1244 char *end;
1245 nop_limit = strtoul (optarg, &end, 0);
1246 if (*end)
1247 as_bad (_("--nops needs a numeric argument"));
1248 }
1249 break;
85645aed 1250
252b5132
RH		 1251 default:
1252 return 0;
1253 }
1254
1255 return 1;
1256}
1257
1258void
98027b10 1259md_show_usage (FILE *stream)
252b5132 1260{
bc805888 1261 fprintf (stream, _("\
252b5132 1262PowerPC options:\n\
ce3d2015
AM		 1263-a32 generate ELF32/XCOFF32\n\
1264-a64 generate ELF64/XCOFF64\n\
1265-u ignored\n\
1266-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1267-mpwr generate code for POWER (RIOS1)\n\
1268-m601 generate code for PowerPC 601\n\
418c1742 1269-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1270 generate code for PowerPC 603/604\n\
1271-m403 generate code for PowerPC 403\n\
1272-m405 generate code for PowerPC 405\n\
1273-m440 generate code for PowerPC 440\n\
1274-m464 generate code for PowerPC 464\n\
1275-m476 generate code for PowerPC 476\n\
f5c120c5 1276-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1277 generate code for PowerPC 7400/7410/7450/7455\n\
1278-m750cl generate code for PowerPC 750cl\n"));
df12615d 1279 fprintf (stream, _("\
ce3d2015
AM		 1280-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1281-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1282-mbooke generate code for 32-bit PowerPC BookE\n\
1283-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1284-mpower4, -mpwr4 generate code for Power4 architecture\n\
1285-mpower5, -mpwr5, -mpwr5x\n\
1286 generate code for Power5 architecture\n\
1287-mpower6, -mpwr6 generate code for Power6 architecture\n\
1288-mpower7, -mpwr7 generate code for Power7 architecture\n\
5817ffd1 1289-mpower8, -mpwr8 generate code for Power8 architecture\n\
ce3d2015
AM		 1290-mcell generate code for Cell Broadband Engine architecture\n\
1291-mcom generate code Power/PowerPC common instructions\n\
1292-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1293 fprintf (stream, _("\
ce3d2015
AM		 1294-maltivec generate code for AltiVec\n\
1295-mvsx generate code for Vector-Scalar (VSX) instructions\n\
5817ffd1 1296-mhtm generate code for Hardware Transactional Memory\n\
ce3d2015
AM		 1297-me300 generate code for PowerPC e300 family\n\
1298-me500, -me500x2 generate code for Motorola e500 core complex\n\
1299-me500mc, generate code for Freescale e500mc core complex\n\
1300-me500mc64, generate code for Freescale e500mc64 core complex\n\
aea77599
AM		 1301-me5500, generate code for Freescale e5500 core complex\n\
1302-me6500, generate code for Freescale e6500 core complex\n\
ce3d2015 1303-mspe generate code for Motorola SPE instructions\n\
b9c361e0 1304-mvle generate code for Freescale VLE instructions\n\
ce3d2015
AM		 1305-mtitan generate code for AppliedMicro Titan core complex\n\
1306-mregnames Allow symbolic names for registers\n\
1307-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1308#ifdef OBJ_ELF
bc805888 1309 fprintf (stream, _("\
ce3d2015
AM		 1310-mrelocatable support for GCC's -mrelocatble option\n\
1311-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1312-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1313-mlittle, -mlittle-endian, -le\n\
ce3d2015 1314 generate code for a little endian machine\n\
b8b738ac 1315-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1316 generate code for a big endian machine\n\
1317-msolaris generate code for Solaris\n\
1318-mno-solaris do not generate code for Solaris\n\
b8b738ac 1319-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1320-V print assembler version number\n\
1321-Qy, -Qn ignored\n"));
252b5132 1322#endif
cef4f754
AM		 1323 fprintf (stream, _("\
1324-nops=count when aligning, more than COUNT nops uses a branch\n"));
252b5132
RH		 1325}
1326\f
1327/* Set ppc_cpu if it is not already set. */
1328
1329static void
98027b10 1330ppc_set_cpu (void)
252b5132
RH		 1331{
1332 const char *default_os = TARGET_OS;
1333 const char *default_cpu = TARGET_CPU;
1334
7102e95e 1335 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1336 {
2a98c3a6 1337 if (ppc_obj64)
bdc70b4a 1338 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1339 else if (strncmp (default_os, "aix", 3) == 0
1340 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1341 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1342 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1343 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1344 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1345 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1346 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1347 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1348 else
d6ed37ed 1349 as_fatal (_("unknown default cpu = %s, os = %s"),
99a814a1 1350 default_cpu, default_os);
252b5132
RH		 1351 }
1352}
1353
9232bbb0
AM		 1354/* Figure out the BFD architecture to use. This function and ppc_mach
1355 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1356
1357enum bfd_architecture
98027b10 1358ppc_arch (void)
252b5132
RH		 1359{
1360 const char *default_cpu = TARGET_CPU;
1361 ppc_set_cpu ();
1362
1363 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1364 return bfd_arch_powerpc;
b9c361e0
JL		 1365 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1366 return bfd_arch_powerpc;
1367 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
252b5132 1368 return bfd_arch_rs6000;
b9c361e0 1369 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
252b5132
RH		 1370 {
1371 if (strcmp (default_cpu, "rs6000") == 0)
1372 return bfd_arch_rs6000;
0baf16f2 1373 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1374 return bfd_arch_powerpc;
1375 }
1376
d6ed37ed 1377 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
252b5132
RH		 1378 return bfd_arch_unknown;
1379}
1380
7f6d05e8 1381unsigned long
98027b10 1382ppc_mach (void)
7f6d05e8 1383{
2a98c3a6
AM		 1384 if (ppc_obj64)
1385 return bfd_mach_ppc64;
1386 else if (ppc_arch () == bfd_arch_rs6000)
1387 return bfd_mach_rs6k;
ce3d2015
AM		 1388 else if (ppc_cpu & PPC_OPCODE_TITAN)
1389 return bfd_mach_ppc_titan;
b9c361e0
JL		 1390 else if (ppc_cpu & PPC_OPCODE_VLE)
1391 return bfd_mach_ppc_vle;
2a98c3a6
AM		 1392 else
1393 return bfd_mach_ppc;
7f6d05e8
CP		 1394}
1395
81d4177b 1396extern char*
98027b10 1397ppc_target_format (void)
7f6d05e8
CP		 1398{
1399#ifdef OBJ_COFF
1400#ifdef TE_PE
99a814a1 1401 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1402#elif TE_POWERMAC
0baf16f2 1403 return "xcoff-powermac";
7f6d05e8 1404#else
eb1e0e80 1405# ifdef TE_AIX5
edc1d652 1406 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1407# else
edc1d652 1408 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1409# endif
7f6d05e8 1410#endif
7f6d05e8
CP		 1411#endif
1412#ifdef OBJ_ELF
edc1d652
AM		 1413# ifdef TE_FreeBSD
1414 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1415# elif defined (TE_VXWORKS)
9d8504b1
PB		 1416 return "elf32-powerpc-vxworks";
1417# else
0baf16f2 1418 return (target_big_endian
2b3c4602
AM		 1419 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1420 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1421# endif
7f6d05e8
CP		 1422#endif
1423}
1424
b9c361e0
JL		 1425/* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1426 Return TRUE if there's a problem, otherwise FALSE. */
1427
1428static bfd_boolean
1429insn_validate (const struct powerpc_opcode *op)
1430{
1431 const unsigned char *o;
1432 unsigned long omask = op->mask;
1433
1434 /* The mask had better not trim off opcode bits. */
1435 if ((op->opcode & omask) != op->opcode)
1436 {
1437 as_bad (_("mask trims opcode bits for %s"), op->name);
1438 return TRUE;
1439 }
1440
1441 /* The operands must not overlap the opcode or each other. */
1442 for (o = op->operands; *o; ++o)
1443 {
1444 if (*o >= num_powerpc_operands)
1445 {
1446 as_bad (_("operand index error for %s"), op->name);
1447 return TRUE;
1448 }
1449 else
1450 {
1451 const struct powerpc_operand *operand = &powerpc_operands[*o];
1452 if (operand->shift != PPC_OPSHIFT_INV)
1453 {
1454 unsigned long mask;
1455
1456 if (operand->shift >= 0)
1457 mask = operand->bitm << operand->shift;
1458 else
1459 mask = operand->bitm >> -operand->shift;
1460 if (omask & mask)
1461 {
1462 as_bad (_("operand %d overlap in %s"),
1463 (int) (o - op->operands), op->name);
1464 return TRUE;
1465 }
1466 omask |= mask;
1467 }
1468 }
1469 }
1470 return FALSE;
1471}
1472
69c040df 1473/* Insert opcodes and macros into hash tables. Called at startup and
1fe532cf 1474 for .machine pseudo. */
252b5132 1475
69c040df
AM		 1476static void
1477ppc_setup_opcodes (void)
252b5132 1478{
98027b10 1479 const struct powerpc_opcode *op;
252b5132
RH		 1480 const struct powerpc_opcode *op_end;
1481 const struct powerpc_macro *macro;
1482 const struct powerpc_macro *macro_end;
b84bf58a 1483 bfd_boolean bad_insn = FALSE;
252b5132 1484
69c040df
AM		 1485 if (ppc_hash != NULL)
1486 hash_die (ppc_hash);
1487 if (ppc_macro_hash != NULL)
1488 hash_die (ppc_macro_hash);
252b5132
RH		 1489
1490 /* Insert the opcodes into a hash table. */
1491 ppc_hash = hash_new ();
1492
c43a438d 1493 if (ENABLE_CHECKING)
b84bf58a 1494 {
c43a438d 1495 unsigned int i;
b84bf58a 1496
3b8b57a9
AM		 1497 /* An index into powerpc_operands is stored in struct fix
1498 fx_pcrel_adjust which is 8 bits wide. */
1499 gas_assert (num_powerpc_operands < 256);
1500
c43a438d
AM		 1501 /* Check operand masks. Code here and in the disassembler assumes
1502 all the 1's in the mask are contiguous. */
1503 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1504 {
c43a438d
AM		 1505 unsigned long mask = powerpc_operands[i].bitm;
1506 unsigned long right_bit;
1507 unsigned int j;
1508
1509 right_bit = mask & -mask;
1510 mask += right_bit;
1511 right_bit = mask & -mask;
1512 if (mask != right_bit)
1513 {
1514 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1515 bad_insn = TRUE;
1516 }
1517 for (j = i + 1; j < num_powerpc_operands; ++j)
1518 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1519 sizeof (powerpc_operands[0])) == 0)
1520 {
1521 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1522 j, i);
1523 bad_insn = TRUE;
1524 }
b84bf58a
AM		 1525 }
1526 }
1527
252b5132
RH		 1528 op_end = powerpc_opcodes + powerpc_num_opcodes;
1529 for (op = powerpc_opcodes; op < op_end; op++)
1530 {
c43a438d 1531 if (ENABLE_CHECKING)
b84bf58a 1532 {
d815f1a9 1533 if (op != powerpc_opcodes)
8dbcd839 1534 {
b9c361e0
JL		 1535 int old_opcode = PPC_OP (op[-1].opcode);
1536 int new_opcode = PPC_OP (op[0].opcode);
1537
1538#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1539 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1540 op->name, (unsigned int) (op - powerpc_opcodes),
1541 (unsigned int) new_opcode, (unsigned int) op->opcode,
1542 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1543#endif
1544
d815f1a9
AM		 1545 /* The major opcodes had better be sorted. Code in the
1546 disassembler assumes the insns are sorted according to
1547 major opcode. */
b9c361e0 1548 if (new_opcode < old_opcode)
d815f1a9
AM		 1549 {
1550 as_bad (_("major opcode is not sorted for %s"),
1551 op->name);
1552 bad_insn = TRUE;
1553 }
8dbcd839 1554 }
b9c361e0
JL		 1555 bad_insn |= insn_validate (op);
1556 }
c43a438d 1557
b9c361e0
JL		 1558 if ((ppc_cpu & op->flags) != 0
1559 && !(ppc_cpu & op->deprecated))
1560 {
1561 const char *retval;
1562
1563 retval = hash_insert (ppc_hash, op->name, (void *) op);
1564 if (retval != NULL)
c43a438d 1565 {
b9c361e0 1566 as_bad (_("duplicate instruction %s"),
c43a438d
AM		 1567 op->name);
1568 bad_insn = TRUE;
1569 }
b9c361e0
JL		 1570 }
1571 }
c43a438d 1572
b9c361e0
JL		 1573 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1574 for (op = powerpc_opcodes; op < op_end; op++)
1575 hash_insert (ppc_hash, op->name, (void *) op);
1576
1577 op_end = vle_opcodes + vle_num_opcodes;
1578 for (op = vle_opcodes; op < op_end; op++)
1579 {
1580 if (ENABLE_CHECKING)
1581 {
1582 if (op != vle_opcodes)
1583 {
1584 unsigned old_seg, new_seg;
1585
1586 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1587 old_seg = VLE_OP_TO_SEG (old_seg);
1588 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1589 new_seg = VLE_OP_TO_SEG (new_seg);
1590
1591#ifdef PRINT_OPCODE_TABLE
c0637f3a
PB		 1592 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1593 op->name, (unsigned int) (op - powerpc_opcodes),
1594 (unsigned int) new_seg, (unsigned int) op->opcode,
1595 (unsigned int) op->mask, (unsigned long long) op->flags);
b9c361e0
JL		 1596#endif
1597 /* The major opcodes had better be sorted. Code in the
1598 disassembler assumes the insns are sorted according to
1599 major opcode. */
1600 if (new_seg < old_seg)
1601 {
1602 as_bad (_("major opcode is not sorted for %s"),
1603 op->name);
1604 bad_insn = TRUE;
1605 }
1606 }
1607
1608 bad_insn |= insn_validate (op);
c43a438d 1609 }
252b5132 1610
bdc70b4a 1611 if ((ppc_cpu & op->flags) != 0
1cb0a767 1612 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1613 {
1614 const char *retval;
1615
98027b10 1616 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1617 if (retval != NULL)
252b5132 1618 {
b84bf58a 1619 as_bad (_("duplicate instruction %s"),
99a814a1 1620 op->name);
b84bf58a 1621 bad_insn = TRUE;
252b5132
RH		 1622 }
1623 }
1624 }
1625
b9c361e0
JL		 1626 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1627 for (op = vle_opcodes; op < op_end; op++)
98027b10 1628 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1629
252b5132
RH		 1630 /* Insert the macros into a hash table. */
1631 ppc_macro_hash = hash_new ();
1632
1633 macro_end = powerpc_macros + powerpc_num_macros;
1634 for (macro = powerpc_macros; macro < macro_end; macro++)
1635 {
33740db9 1636 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1637 {
1638 const char *retval;
1639
98027b10 1640 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1641 if (retval != (const char *) NULL)
1642 {
b84bf58a
AM		 1643 as_bad (_("duplicate macro %s"), macro->name);
1644 bad_insn = TRUE;
252b5132
RH		 1645 }
1646 }
1647 }
1648
b84bf58a 1649 if (bad_insn)
252b5132 1650 abort ();
69c040df
AM		 1651}
1652
1653/* This function is called when the assembler starts up. It is called
1654 after the options have been parsed and the output file has been
1655 opened. */
1656
1657void
98027b10 1658md_begin (void)
69c040df
AM		 1659{
1660 ppc_set_cpu ();
1661
1662 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
8fbf7334 1663 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
69c040df
AM		 1664
1665#ifdef OBJ_ELF
1666 /* Set the ELF flags if desired. */
1667 if (ppc_flags && !msolaris)
1668 bfd_set_private_flags (stdoutput, ppc_flags);
1669#endif
1670
1671 ppc_setup_opcodes ();
252b5132 1672
67c1ffbe 1673 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1674 by the user. */
252b5132
RH		 1675 if (!set_target_endian)
1676 {
1677 set_target_endian = 1;
1678 target_big_endian = PPC_BIG_ENDIAN;
1679 }
1680
1681#ifdef OBJ_XCOFF
1682 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1683
1684 /* Create dummy symbols to serve as initial csects. This forces the
1685 text csects to precede the data csects. These symbols will not
1686 be output. */
1687 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1688 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1689 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1690 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1691#endif
1692
1693#ifdef TE_PE
1694
1695 ppc_current_section = text_section;
81d4177b 1696 ppc_previous_section = 0;
252b5132
RH		 1697
1698#endif
1699}
1700
6a0c61b7 1701void
98027b10 1702ppc_cleanup (void)
6a0c61b7 1703{
dc1d03fc 1704#ifdef OBJ_ELF
6a0c61b7
EZ		 1705 if (ppc_apuinfo_list == NULL)
1706 return;
1707
1708 /* Ok, so write the section info out. We have this layout:
1709
1710 byte data what
1711 ---- ---- ----
1712 0 8 length of "APUinfo\0"
1713 4 (n*4) number of APU's (4 bytes each)
1714 8 2 note type 2
1715 12 "APUinfo\0" name
1716 20 APU#1 first APU's info
1717 24 APU#2 second APU's info
1718 ... ...
1719 */
1720 {
1721 char *p;
1722 asection *seg = now_seg;
1723 subsegT subseg = now_subseg;
1724 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1725 unsigned int i;
6a0c61b7
EZ		 1726
1727 /* Create the .PPC.EMB.apuinfo section. */
1728 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1729 bfd_set_section_flags (stdoutput,
1730 apuinfo_secp,
e1a9cb8e 1731 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1732
1733 p = frag_more (4);
1734 md_number_to_chars (p, (valueT) 8, 4);
1735
1736 p = frag_more (4);
e98d298c 1737 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1738
1739 p = frag_more (4);
1740 md_number_to_chars (p, (valueT) 2, 4);
1741
1742 p = frag_more (8);
1743 strcpy (p, "APUinfo");
1744
1745 for (i = 0; i < ppc_apuinfo_num; i++)
1746 {
b34976b6
AM		 1747 p = frag_more (4);
1748 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1749 }
1750
1751 frag_align (2, 0, 0);
1752
1753 /* We probably can't restore the current segment, for there likely
1754 isn't one yet... */
1755 if (seg && subseg)
1756 subseg_set (seg, subseg);
1757 }
dc1d03fc 1758#endif
6a0c61b7
EZ		 1759}
1760
252b5132
RH		 1761/* Insert an operand value into an instruction. */
1762
1763static unsigned long
a1867a27
AM		 1764ppc_insert_operand (unsigned long insn,
1765 const struct powerpc_operand *operand,
1766 offsetT val,
91d6fa6a 1767 ppc_cpu_t cpu,
a1867a27
AM		 1768 char *file,
1769 unsigned int line)
252b5132 1770{
b84bf58a 1771 long min, max, right;
eb42fac1 1772
b84bf58a
AM		 1773 max = operand->bitm;
1774 right = max & -max;
1775 min = 0;
1776
1777 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1778 {
b84bf58a 1779 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1780 max = (max >> 1) & -right;
1781 min = ~max & -right;
b84bf58a 1782 }
252b5132 1783
b84bf58a 1784 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1785 max++;
252b5132 1786
b84bf58a 1787 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1788 {
1789 long tmp = min;
1790 min = -max;
1791 max = -tmp;
1792 }
b84bf58a 1793
a1867a27
AM		 1794 if (min <= max)
1795 {
1796 /* Some people write constants with the sign extension done by
1797 hand but only up to 32 bits. This shouldn't really be valid,
1798 but, to permit this code to assemble on a 64-bit host, we
1799 sign extend the 32-bit value to 64 bits if so doing makes the
1800 value valid. */
1801 if (val > max
1802 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1803 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1804 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1805 val = val - 0x80000000 - 0x80000000;
1806
1807 /* Similarly, people write expressions like ~(1<<15), and expect
1808 this to be OK for a 32-bit unsigned value. */
1809 else if (val < min
1810 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1811 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1812 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1813 val = val + 0x80000000 + 0x80000000;
1814
1815 else if (val < min
1816 || val > max
1817 || (val & (right - 1)) != 0)
1818 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1819 }
b84bf58a 1820
252b5132
RH		 1821 if (operand->insert)
1822 {
1823 const char *errmsg;
1824
1825 errmsg = NULL;
91d6fa6a 1826 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1827 if (errmsg != (const char *) NULL)
ee2c9aa9 1828 as_bad_where (file, line, "%s", errmsg);
252b5132 1829 }
b9c361e0 1830 else if (operand->shift >= 0)
b84bf58a 1831 insn |= ((long) val & operand->bitm) << operand->shift;
b9c361e0
JL		 1832 else
1833 insn |= ((long) val & operand->bitm) >> -operand->shift;
252b5132
RH		 1834
1835 return insn;
1836}
1837
1838\f
1839#ifdef OBJ_ELF
1840/* Parse @got, etc. and return the desired relocation. */
1841static bfd_reloc_code_real_type
98027b10 1842ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1843{
1844 struct map_bfd {
1845 char *string;
b7d7dc63
AM		 1846 unsigned int length : 8;
1847 unsigned int valid32 : 1;
1848 unsigned int valid64 : 1;
1849 unsigned int reloc;
252b5132
RH		 1850 };
1851
1852 char ident[20];
1853 char *str = *str_p;
1854 char *str2;
1855 int ch;
1856 int len;
15c1449b 1857 const struct map_bfd *ptr;
252b5132 1858
b7d7dc63
AM		 1859#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1860#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1861#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1862
15c1449b 1863 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1864 MAP ("l", BFD_RELOC_LO16),
1865 MAP ("h", BFD_RELOC_HI16),
1866 MAP ("ha", BFD_RELOC_HI16_S),
1867 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1868 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1869 MAP ("got", BFD_RELOC_16_GOTOFF),
1870 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1871 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1872 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1873 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1874 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1875 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1876 MAP ("copy", BFD_RELOC_PPC_COPY),
1877 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1878 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1879 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1880 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1881 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1882 MAP ("tls", BFD_RELOC_PPC_TLS),
1883 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1884 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1885 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1886 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1887 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1888 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1889 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1890 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1891 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1892 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1893 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1894 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1895 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1896 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1897 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1898 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1899 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1900 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1901 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1902 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1903 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1904 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1905 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1906 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1907 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1908 MAP32 ("fixup", BFD_RELOC_CTOR),
1909 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1910 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1911 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1912 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1913 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1914 MAP32 ("sdarel", BFD_RELOC_GPREL16),
b9c361e0
JL		 1915 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1916 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1917 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
b7d7dc63
AM		 1918 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1919 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1920 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1921 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1922 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1923 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1924 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1925 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1926 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
b9c361e0 1927 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
b7d7dc63
AM		 1928 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1929 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1930 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1931 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1932 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1933 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1934 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1935 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
f9c6b907
AM		 1936 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1937 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
b7d7dc63
AM		 1938 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1939 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1940 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1941 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1942 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1943 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1944 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1945 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1946 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
f9c6b907
AM		 1947 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1948 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
b7d7dc63
AM		 1949 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1950 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1951 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1952 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
f9c6b907
AM		 1953 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1954 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
b7d7dc63
AM		 1955 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1956 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1957 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1958 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1959 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1960 };
1961
1962 if (*str++ != '@')
1963 return BFD_RELOC_UNUSED;
1964
1965 for (ch = *str, str2 = ident;
1966 (str2 < ident + sizeof (ident) - 1
3882b010 1967 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1968 ch = *++str)
1969 {
3882b010 1970 *str2++ = TOLOWER (ch);
252b5132
RH		 1971 }
1972
1973 *str2 = '\0';
1974 len = str2 - ident;
1975
1976 ch = ident[0];
1977 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1978 if (ch == ptr->string[0]
1979 && len == ptr->length
b7d7dc63
AM		 1980 && memcmp (ident, ptr->string, ptr->length) == 0
1981 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1982 {
15c1449b
AM		 1983 int reloc = ptr->reloc;
1984
727fc41e
AM		 1985 if (!ppc_obj64 && exp_p->X_add_number != 0)
1986 {
1987 switch (reloc)
1988 {
1989 case BFD_RELOC_16_GOTOFF:
1990 case BFD_RELOC_LO16_GOTOFF:
1991 case BFD_RELOC_HI16_GOTOFF:
1992 case BFD_RELOC_HI16_S_GOTOFF:
1993 as_warn (_("identifier+constant@got means "
1994 "identifier@got+constant"));
1995 break;
1996
1997 case BFD_RELOC_PPC_GOT_TLSGD16:
1998 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1999 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2000 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2001 case BFD_RELOC_PPC_GOT_TLSLD16:
2002 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2003 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2004 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2005 case BFD_RELOC_PPC_GOT_DTPREL16:
2006 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2007 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2008 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2009 case BFD_RELOC_PPC_GOT_TPREL16:
2010 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2011 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2012 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2013 as_bad (_("symbol+offset not supported for got tls"));
2014 break;
2015 }
2016 }
5f6db75a
AM		 2017
2018 /* Now check for identifier@suffix+constant. */
2019 if (*str == '-' || *str == '+')
252b5132 2020 {
5f6db75a
AM		 2021 char *orig_line = input_line_pointer;
2022 expressionS new_exp;
2023
2024 input_line_pointer = str;
2025 expression (&new_exp);
2026 if (new_exp.X_op == O_constant)
252b5132 2027 {
5f6db75a
AM		 2028 exp_p->X_add_number += new_exp.X_add_number;
2029 str = input_line_pointer;
252b5132 2030 }
5f6db75a
AM		 2031
2032 if (&input_line_pointer != str_p)
2033 input_line_pointer = orig_line;
252b5132 2034 }
252b5132 2035 *str_p = str;
0baf16f2 2036
2b3c4602 2037 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 2038 && exp_p->X_op == O_symbol
2039 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 2040 {
9f2b53d7
AM		 2041 /* Change the symbol so that the dummy .TOC. symbol can be
2042 omitted from the object file. */
0baf16f2
AM		 2043 exp_p->X_add_symbol = &abs_symbol;
2044 }
2045
15c1449b 2046 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 2047 }
2048
2049 return BFD_RELOC_UNUSED;
2050}
2051
99a814a1
AM		 2052/* Like normal .long/.short/.word, except support @got, etc.
2053 Clobbers input_line_pointer, checks end-of-line. */
252b5132 2054static void
98027b10 2055ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 2056{
2057 expressionS exp;
2058 bfd_reloc_code_real_type reloc;
2059
2060 if (is_it_end_of_statement ())
2061 {
2062 demand_empty_rest_of_line ();
2063 return;
2064 }
2065
2066 do
2067 {
2068 expression (&exp);
27285eed 2069 if (*input_line_pointer == '@'
99a814a1
AM		 2070 && (reloc = ppc_elf_suffix (&input_line_pointer,
2071 &exp)) != BFD_RELOC_UNUSED)
252b5132 2072 {
99a814a1
AM		 2073 reloc_howto_type *reloc_howto;
2074 int size;
2075
2076 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
2077 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 2078
2079 if (size > nbytes)
0baf16f2
AM		 2080 {
2081 as_bad (_("%s relocations do not fit in %d bytes\n"),
2082 reloc_howto->name, nbytes);
2083 }
252b5132
RH		 2084 else
2085 {
0baf16f2
AM		 2086 char *p;
2087 int offset;
252b5132 2088
0baf16f2 2089 p = frag_more (nbytes);
aa0c8c1a 2090 memset (p, 0, nbytes);
0baf16f2
AM		 2091 offset = 0;
2092 if (target_big_endian)
2093 offset = nbytes - size;
99a814a1
AM		 2094 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
2095 &exp, 0, reloc);
252b5132
RH		 2096 }
2097 }
2098 else
2099 emit_expr (&exp, (unsigned int) nbytes);
2100 }
2101 while (*input_line_pointer++ == ',');
2102
99a814a1
AM		 2103 /* Put terminator back into stream. */
2104 input_line_pointer--;
252b5132
RH		 2105 demand_empty_rest_of_line ();
2106}
2107
2108/* Solaris pseduo op to change to the .rodata section. */
2109static void
98027b10 2110ppc_elf_rdata (int xxx)
252b5132
RH		 2111{
2112 char *save_line = input_line_pointer;
2113 static char section[] = ".rodata\n";
2114
99a814a1 2115 /* Just pretend this is .section .rodata */
252b5132
RH		 2116 input_line_pointer = section;
2117 obj_elf_section (xxx);
2118
2119 input_line_pointer = save_line;
2120}
2121
99a814a1 2122/* Pseudo op to make file scope bss items. */
252b5132 2123static void
98027b10 2124ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2125{
98027b10
AM		 2126 char *name;
2127 char c;
2128 char *p;
252b5132 2129 offsetT size;
98027b10 2130 symbolS *symbolP;
252b5132
RH		 2131 offsetT align;
2132 segT old_sec;
2133 int old_subsec;
2134 char *pfrag;
2135 int align2;
2136
2137 name = input_line_pointer;
2138 c = get_symbol_end ();
2139
99a814a1 2140 /* just after name is now '\0'. */
252b5132
RH		 2141 p = input_line_pointer;
2142 *p = c;
2143 SKIP_WHITESPACE ();
2144 if (*input_line_pointer != ',')
2145 {
d6ed37ed 2146 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 2147 ignore_rest_of_line ();
2148 return;
2149 }
2150
2151 input_line_pointer++; /* skip ',' */
2152 if ((size = get_absolute_expression ()) < 0)
2153 {
2154 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2155 ignore_rest_of_line ();
2156 return;
2157 }
2158
2159 /* The third argument to .lcomm is the alignment. */
2160 if (*input_line_pointer != ',')
2161 align = 8;
2162 else
2163 {
2164 ++input_line_pointer;
2165 align = get_absolute_expression ();
2166 if (align <= 0)
2167 {
2168 as_warn (_("ignoring bad alignment"));
2169 align = 8;
2170 }
2171 }
2172
2173 *p = 0;
2174 symbolP = symbol_find_or_make (name);
2175 *p = c;
2176
2177 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2178 {
d6ed37ed 2179 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 2180 S_GET_NAME (symbolP));
2181 ignore_rest_of_line ();
2182 return;
2183 }
2184
2185 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2186 {
d6ed37ed 2187 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 2188 S_GET_NAME (symbolP),
2189 (long) S_GET_VALUE (symbolP),
2190 (long) size);
2191
2192 ignore_rest_of_line ();
2193 return;
2194 }
2195
99a814a1 2196 /* Allocate_bss. */
252b5132
RH		 2197 old_sec = now_seg;
2198 old_subsec = now_subseg;
2199 if (align)
2200 {
99a814a1 2201 /* Convert to a power of 2 alignment. */
252b5132
RH		 2202 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2203 if (align != 1)
2204 {
d6ed37ed 2205 as_bad (_("common alignment not a power of 2"));
252b5132
RH		 2206 ignore_rest_of_line ();
2207 return;
2208 }
2209 }
2210 else
2211 align2 = 0;
2212
2213 record_alignment (bss_section, align2);
cbe02d4f 2214 subseg_set (bss_section, 1);
252b5132
RH		 2215 if (align2)
2216 frag_align (align2, 0, 0);
2217 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2218 symbol_get_frag (symbolP)->fr_symbol = 0;
2219 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2220 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2221 (char *) 0);
2222 *pfrag = 0;
2223 S_SET_SIZE (symbolP, size);
2224 S_SET_SEGMENT (symbolP, bss_section);
2225 subseg_set (old_sec, old_subsec);
2226 demand_empty_rest_of_line ();
2227}
2228
ee67d69a
AM		 2229/* Pseudo op to set ABI version. */
2230static void
2231ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2232{
2233 expressionS exp;
2234
2235 expression (&exp);
2236 if (exp.X_op == O_absent)
2237 {
2238 as_bad (_("missing expression in .abiversion directive"));
2239 exp.X_op = O_constant;
2240 exp.X_add_number = 0;
2241 }
2242
2243 if (resolve_expression (&exp)
2244 && exp.X_op == O_constant)
2245 ppc_abiversion = exp.X_add_number;
2246 else
2247 as_bad (_(".abiversion expression does not evaluate to a constant"));
2248 demand_empty_rest_of_line ();
2249}
2250
2251/* Set ABI version in output file. */
2252void
2253ppc_elf_end (void)
2254{
2255 if (ppc_obj64 && ppc_abiversion != 0)
2256 {
2257 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2258 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2259 }
2260}
2261
252b5132
RH		 2262/* Validate any relocations emitted for -mrelocatable, possibly adding
2263 fixups for word relocations in writable segments, so we can adjust
2264 them at runtime. */
2265static void
98027b10 2266ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2267{
2268 if (fixp->fx_done || fixp->fx_pcrel)
2269 return;
2270
2271 switch (shlib)
2272 {
2273 case SHLIB_NONE:
2274 case SHLIB_PIC:
2275 return;
2276
5d6f4f16 2277 case SHLIB_MRELOCATABLE:
252b5132
RH		 2278 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2279 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2280 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2281 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2282 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2283 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2284 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2285 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2286 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2287 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2288 && strcmp (segment_name (seg), ".got2") != 0
2289 && strcmp (segment_name (seg), ".dtors") != 0
2290 && strcmp (segment_name (seg), ".ctors") != 0
2291 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2292 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2293 && strcmp (segment_name (seg), ".eh_frame") != 0
2294 && strcmp (segment_name (seg), ".ex_shared") != 0)
2295 {
2296 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2297 || fixp->fx_r_type != BFD_RELOC_CTOR)
2298 {
2299 as_bad_where (fixp->fx_file, fixp->fx_line,
d6ed37ed 2300 _("relocation cannot be done when using -mrelocatable"));
252b5132
RH		 2301 }
2302 }
2303 return;
2304 }
2305}
0baf16f2 2306
7e8d4ab4
AM		 2307/* Prevent elf_frob_file_before_adjust removing a weak undefined
2308 function descriptor sym if the corresponding code sym is used. */
2309
2310void
98027b10 2311ppc_frob_file_before_adjust (void)
0baf16f2 2312{
7e8d4ab4 2313 symbolS *symp;
9232bbb0 2314 asection *toc;
0baf16f2 2315
7e8d4ab4
AM		 2316 if (!ppc_obj64)
2317 return;
2318
2319 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2320 {
7e8d4ab4
AM		 2321 const char *name;
2322 char *dotname;
2323 symbolS *dotsym;
2324 size_t len;
2325
2326 name = S_GET_NAME (symp);
2327 if (name[0] == '.')
2328 continue;
2329
2330 if (! S_IS_WEAK (symp)
2331 || S_IS_DEFINED (symp))
2332 continue;
2333
2334 len = strlen (name) + 1;
2335 dotname = xmalloc (len + 1);
2336 dotname[0] = '.';
2337 memcpy (dotname + 1, name, len);
461b725f 2338 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2339 free (dotname);
2340 if (dotsym != NULL && (symbol_used_p (dotsym)
2341 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2342 symbol_mark_used (symp);
2343
0baf16f2
AM		 2344 }
2345
9232bbb0
AM		 2346 toc = bfd_get_section_by_name (stdoutput, ".toc");
2347 if (toc != NULL
01efc3af 2348 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2349 && bfd_section_size (stdoutput, toc) > 0x10000)
2350 as_warn (_("TOC section size exceeds 64k"));
a38a07e0
AM		 2351}
2352
2353/* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2354 emitted. Other uses of .TOC. will cause the symbol to be marked
2355 with BSF_KEEP in md_apply_fix. */
9232bbb0 2356
a38a07e0
AM		 2357void
2358ppc_elf_adjust_symtab (void)
2359{
2360 if (ppc_obj64)
2361 {
2362 symbolS *symp;
2363 symp = symbol_find (".TOC.");
2364 if (symp != NULL)
2365 {
2366 asymbol *bsym = symbol_get_bfdsym (symp);
2367 if ((bsym->flags & BSF_KEEP) == 0)
2368 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
a38a07e0
AM		 2369 }
2370 }
0baf16f2 2371}
252b5132
RH		 2372#endif /* OBJ_ELF */
2373\f
2374#ifdef TE_PE
2375
2376/*
99a814a1 2377 * Summary of parse_toc_entry.
252b5132
RH		 2378 *
2379 * in: Input_line_pointer points to the '[' in one of:
2380 *
2381 * [toc] [tocv] [toc32] [toc64]
2382 *
2383 * Anything else is an error of one kind or another.
2384 *
81d4177b 2385 * out:
252b5132
RH		 2386 * return value: success or failure
2387 * toc_kind: kind of toc reference
2388 * input_line_pointer:
2389 * success: first char after the ']'
2390 * failure: unchanged
2391 *
2392 * settings:
2393 *
2394 * [toc] - rv == success, toc_kind = default_toc
2395 * [tocv] - rv == success, toc_kind = data_in_toc
2396 * [toc32] - rv == success, toc_kind = must_be_32
2397 * [toc64] - rv == success, toc_kind = must_be_64
2398 *
2399 */
2400
81d4177b
KH		 2401enum toc_size_qualifier
2402{
252b5132
RH		 2403 default_toc, /* The toc cell constructed should be the system default size */
2404 data_in_toc, /* This is a direct reference to a toc cell */
2405 must_be_32, /* The toc cell constructed must be 32 bits wide */
2406 must_be_64 /* The toc cell constructed must be 64 bits wide */
2407};
2408
2409static int
98027b10 2410parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2411{
2412 char *start;
2413 char *toc_spec;
2414 char c;
2415 enum toc_size_qualifier t;
2416
99a814a1 2417 /* Save the input_line_pointer. */
252b5132
RH		 2418 start = input_line_pointer;
2419
99a814a1 2420 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2421 ++input_line_pointer;
2422 SKIP_WHITESPACE ();
81d4177b 2423
99a814a1 2424 /* Find the spelling of the operand. */
252b5132
RH		 2425 toc_spec = input_line_pointer;
2426 c = get_symbol_end ();
2427
99a814a1 2428 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2429 {
2430 t = default_toc;
2431 }
99a814a1 2432 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2433 {
2434 t = data_in_toc;
2435 }
99a814a1 2436 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2437 {
2438 t = must_be_32;
2439 }
99a814a1 2440 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2441 {
2442 t = must_be_64;
2443 }
2444 else
2445 {
2446 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2447 *input_line_pointer = c;
2448 input_line_pointer = start;
252b5132
RH		 2449 return 0;
2450 }
2451
99a814a1
AM		 2452 /* Now find the ']'. */
2453 *input_line_pointer = c;
252b5132 2454
81d4177b
KH		 2455 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2456 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2457
2458 if (c != ']')
2459 {
2460 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2461 input_line_pointer = start;
252b5132
RH		 2462 return 0;
2463 }
2464
99a814a1 2465 *toc_kind = t;
252b5132
RH		 2466 return 1;
2467}
2468#endif
3b8b57a9
AM		 2469
2470#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2471/* See whether a symbol is in the TOC section. */
2472
2473static int
2474ppc_is_toc_sym (symbolS *sym)
2475{
2476#ifdef OBJ_XCOFF
9f6e76f4
TG		 2477 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2478 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
3b8b57a9
AM		 2479#endif
2480#ifdef OBJ_ELF
2481 const char *sname = segment_name (S_GET_SEGMENT (sym));
2482 if (ppc_obj64)
2483 return strcmp (sname, ".toc") == 0;
2484 else
2485 return strcmp (sname, ".got") == 0;
2486#endif
2487}
2488#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 2489\f
2490
dc1d03fc 2491#ifdef OBJ_ELF
6a0c61b7
EZ		 2492#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2493static void
98027b10 2494ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2495{
2496 unsigned int i;
2497
2498 /* Check we don't already exist. */
2499 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2500 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2501 return;
b34976b6 2502
6a0c61b7
EZ		 2503 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2504 {
2505 if (ppc_apuinfo_num_alloc == 0)
2506 {
2507 ppc_apuinfo_num_alloc = 4;
2508 ppc_apuinfo_list = (unsigned long *)
2509 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2510 }
2511 else
2512 {
2513 ppc_apuinfo_num_alloc += 4;
2514 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2515 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2516 }
2517 }
dc1d03fc 2518 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2519}
2520#undef APUID
dc1d03fc 2521#endif
6a0c61b7
EZ		 2522\f
2523
252b5132
RH		 2524/* We need to keep a list of fixups. We can't simply generate them as
2525 we go, because that would require us to first create the frag, and
2526 that would screw up references to ``.''. */
2527
2528struct ppc_fixup
2529{
2530 expressionS exp;
2531 int opindex;
2532 bfd_reloc_code_real_type reloc;
2533};
2534
2535#define MAX_INSN_FIXUPS (5)
2536
b9c361e0
JL		 2537/* Form I16L. */
2538#define E_OR2I_INSN 0x7000C000
2539#define E_AND2I_DOT_INSN 0x7000C800
2540#define E_OR2IS_INSN 0x7000D000
2541#define E_LIS_INSN 0x7000E000
2542#define E_AND2IS_DOT_INSN 0x7000E800
2543
2544/* Form I16A. */
2545#define E_ADD2I_DOT_INSN 0x70008800
2546#define E_ADD2IS_INSN 0x70009000
2547#define E_CMP16I_INSN 0x70009800
2548#define E_MULL2I_INSN 0x7000A000
2549#define E_CMPL16I_INSN 0x7000A800
2550#define E_CMPH16I_INSN 0x7000B000
2551#define E_CMPHL16I_INSN 0x7000B800
2552
252b5132
RH		 2553/* This routine is called for each instruction to be assembled. */
2554
2555void
98027b10 2556md_assemble (char *str)
252b5132
RH		 2557{
2558 char *s;
2559 const struct powerpc_opcode *opcode;
2560 unsigned long insn;
2561 const unsigned char *opindex_ptr;
2562 int skip_optional;
2563 int need_paren;
2564 int next_opindex;
2565 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2566 int fc;
2567 char *f;
09b935ac 2568 int addr_mod;
252b5132 2569 int i;
b9c361e0 2570 unsigned int insn_length;
252b5132
RH		 2571
2572 /* Get the opcode. */
3882b010 2573 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2574 ;
2575 if (*s != '\0')
2576 *s++ = '\0';
2577
2578 /* Look up the opcode in the hash table. */
2579 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2580 if (opcode == (const struct powerpc_opcode *) NULL)
2581 {
2582 const struct powerpc_macro *macro;
2583
2584 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2585 if (macro == (const struct powerpc_macro *) NULL)
d6ed37ed 2586 as_bad (_("unrecognized opcode: `%s'"), str);
252b5132
RH		 2587 else
2588 ppc_macro (s, macro);
2589
2590 return;
2591 }
2592
2593 insn = opcode->opcode;
2594
2595 str = s;
3882b010 2596 while (ISSPACE (*str))
252b5132
RH		 2597 ++str;
2598
2599 /* PowerPC operands are just expressions. The only real issue is
2600 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2601 an optional operand separate the operands only with commas (in some
2602 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2603 have optional operands). Most instructions with optional operands
2604 have only one. Those that have more than one optional operand can
2605 take either all their operands or none. So, before we start seriously
2606 parsing the operands, we check to see if we have optional operands,
2607 and if we do, we count the number of commas to see which operands
2608 have been omitted. */
252b5132
RH		 2609 skip_optional = 0;
2610 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2611 {
2612 const struct powerpc_operand *operand;
2613
2614 operand = &powerpc_operands[*opindex_ptr];
2615 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2616 {
2617 unsigned int opcount;
7fe9cf6b 2618 unsigned int num_operands_expected;
252b5132
RH		 2619
2620 /* There is an optional operand. Count the number of
2621 commas in the input line. */
2622 if (*str == '\0')
2623 opcount = 0;
2624 else
2625 {
2626 opcount = 1;
2627 s = str;
2628 while ((s = strchr (s, ',')) != (char *) NULL)
2629 {
2630 ++opcount;
2631 ++s;
2632 }
2633 }
2634
7fe9cf6b
NC		 2635 /* Compute the number of expected operands.
2636 Do not count fake operands. */
2637 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2638 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2639 ++ num_operands_expected;
2640
252b5132
RH		 2641 /* If there are fewer operands in the line then are called
2642 for by the instruction, we want to skip the optional
1f6c9eb0 2643 operands. */
7fe9cf6b 2644 if (opcount < num_operands_expected)
252b5132
RH		 2645 skip_optional = 1;
2646
2647 break;
2648 }
2649 }
2650
2651 /* Gather the operands. */
2652 need_paren = 0;
2653 next_opindex = 0;
2654 fc = 0;
2655 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2656 {
2657 const struct powerpc_operand *operand;
2658 const char *errmsg;
2659 char *hold;
2660 expressionS ex;
2661 char endc;
2662
2663 if (next_opindex == 0)
2664 operand = &powerpc_operands[*opindex_ptr];
2665 else
2666 {
2667 operand = &powerpc_operands[next_opindex];
2668 next_opindex = 0;
2669 }
252b5132
RH		 2670 errmsg = NULL;
2671
2672 /* If this is a fake operand, then we do not expect anything
2673 from the input. */
2674 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2675 {
2b3c4602 2676 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2677 if (errmsg != (const char *) NULL)
ee2c9aa9 2678 as_bad ("%s", errmsg);
252b5132
RH		 2679 continue;
2680 }
2681
2682 /* If this is an optional operand, and we are skipping it, just
2683 insert a zero. */
2684 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2685 && skip_optional)
2686 {
2687 if (operand->insert)
2688 {
2b3c4602 2689 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2690 if (errmsg != (const char *) NULL)
ee2c9aa9 2691 as_bad ("%s", errmsg);
252b5132
RH		 2692 }
2693 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2694 next_opindex = *opindex_ptr + 1;
2695 continue;
2696 }
2697
2698 /* Gather the operand. */
2699 hold = input_line_pointer;
2700 input_line_pointer = str;
2701
2702#ifdef TE_PE
81d4177b 2703 if (*input_line_pointer == '[')
252b5132
RH		 2704 {
2705 /* We are expecting something like the second argument here:
99a814a1
AM		 2706 *
2707 * lwz r4,[toc].GS.0.static_int(rtoc)
2708 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2709 * The argument following the `]' must be a symbol name, and the
2710 * register must be the toc register: 'rtoc' or '2'
2711 *
2712 * The effect is to 0 as the displacement field
2713 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2714 * the appropriate variation) reloc against it based on the symbol.
2715 * The linker will build the toc, and insert the resolved toc offset.
2716 *
2717 * Note:
2718 * o The size of the toc entry is currently assumed to be
2719 * 32 bits. This should not be assumed to be a hard coded
2720 * number.
2721 * o In an effort to cope with a change from 32 to 64 bits,
2722 * there are also toc entries that are specified to be
2723 * either 32 or 64 bits:
2724 * lwz r4,[toc32].GS.0.static_int(rtoc)
2725 * lwz r4,[toc64].GS.0.static_int(rtoc)
2726 * These demand toc entries of the specified size, and the
2727 * instruction probably requires it.
2728 */
252b5132
RH		 2729
2730 int valid_toc;
2731 enum toc_size_qualifier toc_kind;
2732 bfd_reloc_code_real_type toc_reloc;
2733
99a814a1
AM		 2734 /* Go parse off the [tocXX] part. */
2735 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2736
81d4177b 2737 if (!valid_toc)
252b5132 2738 {
a5840dce
AM		 2739 ignore_rest_of_line ();
2740 break;
252b5132
RH		 2741 }
2742
99a814a1
AM		 2743 /* Now get the symbol following the ']'. */
2744 expression (&ex);
252b5132
RH		 2745
2746 switch (toc_kind)
2747 {
2748 case default_toc:
99a814a1
AM		 2749 /* In this case, we may not have seen the symbol yet,
2750 since it is allowed to appear on a .extern or .globl
2751 or just be a label in the .data section. */
252b5132
RH		 2752 toc_reloc = BFD_RELOC_PPC_TOC16;
2753 break;
2754 case data_in_toc:
99a814a1
AM		 2755 /* 1. The symbol must be defined and either in the toc
2756 section, or a global.
2757 2. The reloc generated must have the TOCDEFN flag set
2758 in upper bit mess of the reloc type.
2759 FIXME: It's a little confusing what the tocv
2760 qualifier can be used for. At the very least, I've
2761 seen three uses, only one of which I'm sure I can
2762 explain. */
81d4177b
KH		 2763 if (ex.X_op == O_symbol)
2764 {
9c2799c2 2765 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2766 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2767 != tocdata_section)
252b5132 2768 {
99a814a1 2769 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2770 }
2771 }
2772
2773 toc_reloc = BFD_RELOC_PPC_TOC16;
2774 break;
2775 case must_be_32:
99a814a1
AM		 2776 /* FIXME: these next two specifically specify 32/64 bit
2777 toc entries. We don't support them today. Is this
2778 the right way to say that? */
252b5132 2779 toc_reloc = BFD_RELOC_UNUSED;
d6ed37ed 2780 as_bad (_("unimplemented toc32 expression modifier"));
252b5132
RH		 2781 break;
2782 case must_be_64:
99a814a1 2783 /* FIXME: see above. */
252b5132 2784 toc_reloc = BFD_RELOC_UNUSED;
d6ed37ed 2785 as_bad (_("unimplemented toc64 expression modifier"));
252b5132
RH		 2786 break;
2787 default:
bc805888 2788 fprintf (stderr,
99a814a1
AM		 2789 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2790 toc_kind);
bc805888 2791 abort ();
252b5132
RH		 2792 break;
2793 }
2794
2795 /* We need to generate a fixup for this expression. */
2796 if (fc >= MAX_INSN_FIXUPS)
2797 as_fatal (_("too many fixups"));
2798
2799 fixups[fc].reloc = toc_reloc;
2800 fixups[fc].exp = ex;
2801 fixups[fc].opindex = *opindex_ptr;
2802 ++fc;
2803
99a814a1
AM		 2804 /* Ok. We've set up the fixup for the instruction. Now make it
2805 look like the constant 0 was found here. */
252b5132
RH		 2806 ex.X_unsigned = 1;
2807 ex.X_op = O_constant;
2808 ex.X_add_number = 0;
2809 ex.X_add_symbol = NULL;
2810 ex.X_op_symbol = NULL;
2811 }
2812
2813 else
2814#endif /* TE_PE */
2815 {
b9c361e0
JL		 2816 if ((reg_names_p
2817 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2818 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2ad068be 2819 || !register_name (&ex))
252b5132 2820 {
13abbae3
AM		 2821 char save_lex = lex_type['%'];
2822
b9c361e0
JL		 2823 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2824 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
13abbae3
AM		 2825 {
2826 cr_operand = TRUE;
2827 lex_type['%'] |= LEX_BEGIN_NAME;
2828 }
252b5132 2829 expression (&ex);
b34976b6 2830 cr_operand = FALSE;
13abbae3 2831 lex_type['%'] = save_lex;
252b5132
RH		 2832 }
2833 }
2834
2835 str = input_line_pointer;
2836 input_line_pointer = hold;
2837
2838 if (ex.X_op == O_illegal)
2839 as_bad (_("illegal operand"));
2840 else if (ex.X_op == O_absent)
2841 as_bad (_("missing operand"));
2842 else if (ex.X_op == O_register)
2843 {
2844 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2845 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2846 }
2847 else if (ex.X_op == O_constant)
2848 {
2849#ifdef OBJ_ELF
81d4177b 2850 /* Allow @HA, @L, @H on constants. */
3b8b57a9 2851 bfd_reloc_code_real_type reloc;
252b5132
RH		 2852 char *orig_str = str;
2853
2854 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2855 switch (reloc)
2856 {
2857 default:
2858 str = orig_str;
2859 break;
2860
2861 case BFD_RELOC_LO16:
f9c6b907
AM		 2862 ex.X_add_number &= 0xffff;
2863 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
0baf16f2 2864 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2865 break;
2866
2867 case BFD_RELOC_HI16:
f9c6b907
AM		 2868 if (REPORT_OVERFLOW_HI && ppc_obj64)
2869 {
2870 /* PowerPC64 @h is tested for overflow. */
2871 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2872 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2873 {
2874 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2875 ex.X_add_number
2876 = ((addressT) ex.X_add_number ^ sign) - sign;
2877 }
2878 break;
2879 }
2880 /* Fall thru */
2881
2882 case BFD_RELOC_PPC64_ADDR16_HIGH:
2883 ex.X_add_number = PPC_HI (ex.X_add_number);
2884 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2885 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2886 break;
2887
2888 case BFD_RELOC_HI16_S:
f9c6b907
AM		 2889 if (REPORT_OVERFLOW_HI && ppc_obj64)
2890 {
2891 /* PowerPC64 @ha is tested for overflow. */
2892 ex.X_add_number
2893 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2894 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2895 {
2896 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2897 ex.X_add_number
2898 = ((addressT) ex.X_add_number ^ sign) - sign;
2899 }
2900 break;
2901 }
2902 /* Fall thru */
2903
2904 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2905 ex.X_add_number = PPC_HA (ex.X_add_number);
2906 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2907 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2908 break;
2909
0baf16f2 2910 case BFD_RELOC_PPC64_HIGHER:
f9c6b907
AM		 2911 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2912 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2913 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2914 break;
2915
2916 case BFD_RELOC_PPC64_HIGHER_S:
f9c6b907
AM		 2917 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2918 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2919 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132 2920 break;
0baf16f2
AM		 2921
2922 case BFD_RELOC_PPC64_HIGHEST:
f9c6b907
AM		 2923 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2924 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2925 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2
AM		 2926 break;
2927
2928 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 2929 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2930 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2931 ex.X_add_number = SEX16 (ex.X_add_number);
0baf16f2 2932 break;
252b5132 2933 }
0baf16f2 2934#endif /* OBJ_ELF */
252b5132 2935 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2936 ppc_cpu, (char *) NULL, 0);
252b5132 2937 }
727fc41e 2938 else
252b5132 2939 {
3b8b57a9
AM		 2940 bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
2941#ifdef OBJ_ELF
727fc41e 2942 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2943 {
727fc41e
AM		 2944 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2945 if (sym_name[0] == '.')
2946 ++sym_name;
cdba85ec 2947
727fc41e 2948 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2949 {
727fc41e
AM		 2950 expressionS tls_exp;
2951
2952 hold = input_line_pointer;
2953 input_line_pointer = str + 1;
2954 expression (&tls_exp);
2955 if (tls_exp.X_op == O_symbol)
2956 {
2957 reloc = BFD_RELOC_UNUSED;
2958 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2959 {
2960 reloc = BFD_RELOC_PPC_TLSGD;
2961 input_line_pointer += 7;
2962 }
2963 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2964 {
2965 reloc = BFD_RELOC_PPC_TLSLD;
2966 input_line_pointer += 7;
2967 }
2968 if (reloc != BFD_RELOC_UNUSED)
2969 {
2970 SKIP_WHITESPACE ();
2971 str = input_line_pointer;
2972
2973 if (fc >= MAX_INSN_FIXUPS)
2974 as_fatal (_("too many fixups"));
2975 fixups[fc].exp = tls_exp;
2976 fixups[fc].opindex = *opindex_ptr;
2977 fixups[fc].reloc = reloc;
2978 ++fc;
2979 }
2980 }
2981 input_line_pointer = hold;
252b5132
RH		 2982 }
2983 }
2984
727fc41e 2985 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2986 {
727fc41e 2987 /* Some TLS tweaks. */
0baf16f2
AM		 2988 switch (reloc)
2989 {
727fc41e 2990 default:
cdba85ec 2991 break;
727fc41e
AM		 2992
2993 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2994 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2995 as_bad (_("@tls may not be used with \"%s\" operands"),
2996 opcode->name);
2997 else if (operand->shift != 11)
2998 as_bad (_("@tls may only be used in last operand"));
2999 else
3000 insn = ppc_insert_operand (insn, operand,
3001 ppc_obj64 ? 13 : 2,
3002 ppc_cpu, (char *) NULL, 0);
cdba85ec 3003 break;
727fc41e
AM		 3004
3005 /* We'll only use the 32 (or 64) bit form of these relocations
3006 in constants. Instructions get the 16 bit form. */
3007 case BFD_RELOC_PPC_DTPREL:
3008 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 3009 break;
727fc41e
AM		 3010 case BFD_RELOC_PPC_TPREL:
3011 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 3012 break;
3013 }
727fc41e 3014
b9c361e0
JL		 3015 /* If VLE-mode convert LO/HI/HA relocations. */
3016 if (opcode->flags & PPC_OPCODE_VLE)
3017 {
3018 int tmp_insn = insn & opcode->mask;
3019
3020 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3021 || tmp_insn == E_AND2I_DOT_INSN
3022 || tmp_insn == E_OR2IS_INSN
3023 || tmp_insn == E_LIS_INSN
3024 || tmp_insn == E_AND2IS_DOT_INSN);
3025
3026
3027 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3028 || tmp_insn == E_ADD2IS_INSN
3029 || tmp_insn == E_CMP16I_INSN
3030 || tmp_insn == E_MULL2I_INSN
3031 || tmp_insn == E_CMPL16I_INSN
3032 || tmp_insn == E_CMPH16I_INSN
3033 || tmp_insn == E_CMPHL16I_INSN);
3034
3035 switch (reloc)
3036 {
3037 default:
3038 break;
3039
3040 case BFD_RELOC_PPC_EMB_SDA21:
3041 reloc = BFD_RELOC_PPC_VLE_SDA21;
3042 break;
3043
3044 case BFD_RELOC_LO16:
3045 if (use_d_reloc)
3046 reloc = BFD_RELOC_PPC_VLE_LO16D;
3047 else if (use_a_reloc)
3048 reloc = BFD_RELOC_PPC_VLE_LO16A;
3049 break;
3050
3051 case BFD_RELOC_HI16:
3052 if (use_d_reloc)
3053 reloc = BFD_RELOC_PPC_VLE_HI16D;
3054 else if (use_a_reloc)
3055 reloc = BFD_RELOC_PPC_VLE_HI16A;
3056 break;
3057
3058 case BFD_RELOC_HI16_S:
3059 if (use_d_reloc)
3060 reloc = BFD_RELOC_PPC_VLE_HA16D;
3061 else if (use_a_reloc)
3062 reloc = BFD_RELOC_PPC_VLE_HA16A;
3063 break;
3064
3065 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3066 if (use_d_reloc)
3067 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3068 break;
3069
3070 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3071 if (use_d_reloc)
3072 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3073 break;
3074
3075 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3076 if (use_d_reloc)
3077 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3078 break;
3079 }
3080 }
3081
727fc41e
AM		 3082 /* For the absolute forms of branches, convert the PC
3083 relative form back into the absolute. */
3084 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3085 {
3086 switch (reloc)
3087 {
3088 case BFD_RELOC_PPC_B26:
3089 reloc = BFD_RELOC_PPC_BA26;
3090 break;
3091 case BFD_RELOC_PPC_B16:
3092 reloc = BFD_RELOC_PPC_BA16;
3093 break;
3094 case BFD_RELOC_PPC_B16_BRTAKEN:
3095 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3096 break;
3097 case BFD_RELOC_PPC_B16_BRNTAKEN:
3098 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3099 break;
3100 default:
3101 break;
3102 }
3103 }
3104
01efc3af
AM		 3105 switch (reloc)
3106 {
3107 case BFD_RELOC_PPC_TOC16:
3108 toc_reloc_types |= has_small_toc_reloc;
3109 break;
3110 case BFD_RELOC_PPC64_TOC16_LO:
3111 case BFD_RELOC_PPC64_TOC16_HI:
3112 case BFD_RELOC_PPC64_TOC16_HA:
3113 toc_reloc_types |= has_large_toc_reloc;
3114 break;
3115 default:
3116 break;
3117 }
3118
1fe532cf 3119 if ((operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
727fc41e
AM		 3120 {
3121 switch (reloc)
3122 {
3123 case BFD_RELOC_16:
3124 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3125 break;
3126 case BFD_RELOC_LO16:
3127 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3128 break;
3129 case BFD_RELOC_16_GOTOFF:
3130 reloc = BFD_RELOC_PPC64_GOT16_DS;
3131 break;
3132 case BFD_RELOC_LO16_GOTOFF:
3133 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3134 break;
3135 case BFD_RELOC_LO16_PLTOFF:
3136 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3137 break;
3138 case BFD_RELOC_16_BASEREL:
3139 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3140 break;
3141 case BFD_RELOC_LO16_BASEREL:
3142 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3143 break;
3144 case BFD_RELOC_PPC_TOC16:
3145 reloc = BFD_RELOC_PPC64_TOC16_DS;
3146 break;
3147 case BFD_RELOC_PPC64_TOC16_LO:
3148 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3149 break;
3150 case BFD_RELOC_PPC64_PLTGOT16:
3151 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3152 break;
3153 case BFD_RELOC_PPC64_PLTGOT16_LO:
3154 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3155 break;
3156 case BFD_RELOC_PPC_DTPREL16:
3157 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3158 break;
3159 case BFD_RELOC_PPC_DTPREL16_LO:
3160 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3161 break;
3162 case BFD_RELOC_PPC_TPREL16:
3163 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3164 break;
3165 case BFD_RELOC_PPC_TPREL16_LO:
3166 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3167 break;
3168 case BFD_RELOC_PPC_GOT_DTPREL16:
3169 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3170 case BFD_RELOC_PPC_GOT_TPREL16:
3171 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3172 break;
3173 default:
3174 as_bad (_("unsupported relocation for DS offset field"));
3175 break;
3176 }
3177 }
0baf16f2 3178 }
3b8b57a9
AM		 3179#endif /* OBJ_ELF */
3180
3181 if (reloc != BFD_RELOC_UNUSED)
3182 ;
3183 /* Determine a BFD reloc value based on the operand information.
3184 We are only prepared to turn a few of the operands into
3185 relocs. */
3186 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3187 && operand->bitm == 0x3fffffc
3188 && operand->shift == 0)
3189 reloc = BFD_RELOC_PPC_B26;
3190 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3191 && operand->bitm == 0xfffc
3192 && operand->shift == 0)
3193 reloc = BFD_RELOC_PPC_B16;
3194 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3195 && operand->bitm == 0x1fe
3196 && operand->shift == -1)
3197 reloc = BFD_RELOC_PPC_VLE_REL8;
3198 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3199 && operand->bitm == 0xfffe
3200 && operand->shift == 0)
3201 reloc = BFD_RELOC_PPC_VLE_REL15;
3202 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3203 && operand->bitm == 0x1fffffe
3204 && operand->shift == 0)
3205 reloc = BFD_RELOC_PPC_VLE_REL24;
3206 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3207 && operand->bitm == 0x3fffffc
3208 && operand->shift == 0)
3209 reloc = BFD_RELOC_PPC_BA26;
3210 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
3211 && operand->bitm == 0xfffc
3212 && operand->shift == 0)
3213 reloc = BFD_RELOC_PPC_BA16;
3214#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
3215 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
3216 && (operand->bitm & 0xfff0) == 0xfff0
3217 && operand->shift == 0)
3218 {
ac21e7da 3219 /* Note: the symbol may be not yet defined. */
3b8b57a9
AM		 3220 if (ppc_is_toc_sym (ex.X_add_symbol))
3221 {
3222 reloc = BFD_RELOC_PPC_TOC16;
3223#ifdef OBJ_ELF
3224 if (ppc_obj64
3225 && (operand->flags & PPC_OPERAND_DS) != 0)
3226 reloc = BFD_RELOC_PPC64_TOC16_DS;
3227#endif
3228 }
3229 else
3230 {
3231 reloc = BFD_RELOC_16;
3232#ifdef OBJ_ELF
3233 if (ppc_obj64
3234 && (operand->flags & PPC_OPERAND_DS) != 0)
3235 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3236#endif
3237 }
3238 }
3239#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
0baf16f2 3240
252b5132
RH		 3241 /* We need to generate a fixup for this expression. */
3242 if (fc >= MAX_INSN_FIXUPS)
3243 as_fatal (_("too many fixups"));
3244 fixups[fc].exp = ex;
727fc41e 3245 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 3246 fixups[fc].reloc = reloc;
3247 ++fc;
3248 }
252b5132
RH		 3249
3250 if (need_paren)
3251 {
3252 endc = ')';
3253 need_paren = 0;
c3d65c1c
BE		 3254 /* If expecting more operands, then we want to see "),". */
3255 if (*str == endc && opindex_ptr[1] != 0)
3256 {
3257 do
3258 ++str;
3259 while (ISSPACE (*str));
3260 endc = ',';
3261 }
252b5132
RH		 3262 }
3263 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3264 {
3265 endc = '(';
3266 need_paren = 1;
3267 }
3268 else
3269 endc = ',';
3270
3271 /* The call to expression should have advanced str past any
3272 whitespace. */
3273 if (*str != endc
3274 && (endc != ',' || *str != '\0'))
3275 {
5a938047
AM		 3276 if (*str == '\0')
3277 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3278 else
3279 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 3280 break;
3281 }
3282
3283 if (*str != '\0')
3284 ++str;
3285 }
3286
3882b010 3287 while (ISSPACE (*str))
252b5132
RH		 3288 ++str;
3289
3290 if (*str != '\0')
3291 as_bad (_("junk at end of line: `%s'"), str);
3292
dc1d03fc 3293#ifdef OBJ_ELF
b9c361e0 3294 /* Do we need/want an APUinfo section? */
4faf939a
JM		 3295 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3296 && !ppc_obj64)
6a0c61b7
EZ		 3297 {
3298 /* These are all version "1". */
3299 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 3300 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 3301 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 3302 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 3303 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 3304 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 3305 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 3306 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 3307 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 3308 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 3309 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 3310 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 3311 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 3312 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
b9c361e0
JL		 3313 if (opcode->flags & PPC_OPCODE_VLE)
3314 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
6a0c61b7 3315 }
dc1d03fc 3316#endif
6a0c61b7 3317
252b5132 3318 /* Write out the instruction. */
b9c361e0
JL		 3319 /* Differentiate between two and four byte insns. */
3320 if (ppc_mach () == bfd_mach_ppc_vle)
3321 {
3322 if (PPC_OP_SE_VLE (insn))
3323 insn_length = 2;
3324 else
3325 insn_length = 4;
3326 addr_mod = frag_now_fix () & 1;
3327 }
3328 else
3329 {
3330 insn_length = 4;
3331 addr_mod = frag_now_fix () & 3;
3332 }
3333 /* All instructions can start on a 2 byte boundary for VLE. */
3334 f = frag_more (insn_length);
09b935ac 3335 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
b9c361e0
JL		 3336 {
3337 if (ppc_mach() == bfd_mach_ppc_vle)
3338 as_bad (_("instruction address is not a multiple of 2"));
3339 else
3340 as_bad (_("instruction address is not a multiple of 4"));
3341 }
09b935ac
AM		 3342 frag_now->insn_addr = addr_mod;
3343 frag_now->has_code = 1;
b9c361e0 3344 md_number_to_chars (f, insn, insn_length);
252b5132 3345
5d6f4f16 3346#ifdef OBJ_ELF
b9c361e0 3347 dwarf2_emit_insn (insn_length);
5d6f4f16
GK		 3348#endif
3349
3b8b57a9 3350 /* Create any fixups. */
252b5132
RH		 3351 for (i = 0; i < fc; i++)
3352 {
3b8b57a9 3353 fixS *fixP;
252b5132
RH		 3354 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3355 {
99a814a1 3356 reloc_howto_type *reloc_howto;
252b5132
RH		 3357 int size;
3358 int offset;
252b5132 3359
99a814a1 3360 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3361 if (!reloc_howto)
3362 abort ();
3363
3364 size = bfd_get_reloc_size (reloc_howto);
3b8b57a9 3365 offset = target_big_endian ? (insn_length - size) : 0;
252b5132
RH		 3366
3367 if (size < 1 || size > 4)
bc805888 3368 abort ();
252b5132 3369
99a814a1
AM		 3370 fixP = fix_new_exp (frag_now,
3371 f - frag_now->fr_literal + offset,
3372 size,
3373 &fixups[i].exp,
3374 reloc_howto->pc_relative,
252b5132 3375 fixups[i].reloc);
252b5132
RH		 3376 }
3377 else
727fc41e
AM		 3378 {
3379 const struct powerpc_operand *operand;
3380
3381 operand = &powerpc_operands[fixups[i].opindex];
3b8b57a9
AM		 3382 fixP = fix_new_exp (frag_now,
3383 f - frag_now->fr_literal,
3384 insn_length,
3385 &fixups[i].exp,
3386 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3387 BFD_RELOC_UNUSED);
727fc41e 3388 }
3b8b57a9 3389 fixP->fx_pcrel_adjust = fixups[i].opindex;
252b5132
RH		 3390 }
3391}
3392
3393/* Handle a macro. Gather all the operands, transform them as
3394 described by the macro, and call md_assemble recursively. All the
3395 operands are separated by commas; we don't accept parentheses
3396 around operands here. */
3397
3398static void
98027b10 3399ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3400{
3401 char *operands[10];
3402 unsigned int count;
3403 char *s;
3404 unsigned int len;
3405 const char *format;
db557034 3406 unsigned int arg;
252b5132
RH		 3407 char *send;
3408 char *complete;
3409
3410 /* Gather the users operands into the operands array. */
3411 count = 0;
3412 s = str;
3413 while (1)
3414 {
3415 if (count >= sizeof operands / sizeof operands[0])
3416 break;
3417 operands[count++] = s;
3418 s = strchr (s, ',');
3419 if (s == (char *) NULL)
3420 break;
3421 *s++ = '\0';
81d4177b 3422 }
252b5132
RH		 3423
3424 if (count != macro->operands)
3425 {
3426 as_bad (_("wrong number of operands"));
3427 return;
3428 }
3429
3430 /* Work out how large the string must be (the size is unbounded
3431 because it includes user input). */
3432 len = 0;
3433 format = macro->format;
3434 while (*format != '\0')
3435 {
3436 if (*format != '%')
3437 {
3438 ++len;
3439 ++format;
3440 }
3441 else
3442 {
3443 arg = strtol (format + 1, &send, 10);
db557034 3444 know (send != format && arg < count);
252b5132
RH		 3445 len += strlen (operands[arg]);
3446 format = send;
3447 }
3448 }
3449
3450 /* Put the string together. */
3451 complete = s = (char *) alloca (len + 1);
3452 format = macro->format;
3453 while (*format != '\0')
3454 {
3455 if (*format != '%')
3456 *s++ = *format++;
3457 else
3458 {
3459 arg = strtol (format + 1, &send, 10);
3460 strcpy (s, operands[arg]);
3461 s += strlen (s);
3462 format = send;
3463 }
3464 }
3465 *s = '\0';
3466
3467 /* Assemble the constructed instruction. */
3468 md_assemble (complete);
81d4177b 3469}
252b5132
RH		 3470\f
3471#ifdef OBJ_ELF
18ae9cc1 3472/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3473
3474int
98027b10 3475ppc_section_type (char *str, size_t len)
252b5132 3476{
9de8d8f1
RH		 3477 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3478 return SHT_ORDERED;
252b5132 3479
9de8d8f1 3480 return -1;
252b5132
RH		 3481}
3482
3483int
1239de13 3484ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3485{
3486 if (type == SHT_ORDERED)
3487 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3488
252b5132
RH		 3489 return flags;
3490}
3491#endif /* OBJ_ELF */
3492
3493\f
3494/* Pseudo-op handling. */
3495
3496/* The .byte pseudo-op. This is similar to the normal .byte
3497 pseudo-op, but it can also take a single ASCII string. */
3498
3499static void
98027b10 3500ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3501{
3502 if (*input_line_pointer != '\"')
3503 {
3504 cons (1);
3505 return;
3506 }
3507
3508 /* Gather characters. A real double quote is doubled. Unusual
3509 characters are not permitted. */
3510 ++input_line_pointer;
3511 while (1)
3512 {
3513 char c;
3514
3515 c = *input_line_pointer++;
3516
3517 if (c == '\"')
3518 {
3519 if (*input_line_pointer != '\"')
3520 break;
3521 ++input_line_pointer;
3522 }
3523
3524 FRAG_APPEND_1_CHAR (c);
3525 }
3526
3527 demand_empty_rest_of_line ();
3528}
3529\f
3530#ifdef OBJ_XCOFF
3531
3532/* XCOFF specific pseudo-op handling. */
3533
3534/* This is set if we are creating a .stabx symbol, since we don't want
3535 to handle symbol suffixes for such symbols. */
b34976b6 3536static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3537
3538/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3539 symbols in the .bss segment as though they were local common
67c1ffbe 3540 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3541 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3542
3543static void
98027b10 3544ppc_comm (int lcomm)
252b5132
RH		 3545{
3546 asection *current_seg = now_seg;
3547 subsegT current_subseg = now_subseg;
3548 char *name;
3549 char endc;
3550 char *end_name;
3551 offsetT size;
3552 offsetT align;
3553 symbolS *lcomm_sym = NULL;
3554 symbolS *sym;
3555 char *pfrag;
3556
3557 name = input_line_pointer;
3558 endc = get_symbol_end ();
3559 end_name = input_line_pointer;
3560 *end_name = endc;
3561
3562 if (*input_line_pointer != ',')
3563 {
3564 as_bad (_("missing size"));
3565 ignore_rest_of_line ();
3566 return;
3567 }
3568 ++input_line_pointer;
3569
3570 size = get_absolute_expression ();
3571 if (size < 0)
3572 {
3573 as_bad (_("negative size"));
3574 ignore_rest_of_line ();
3575 return;
3576 }
3577
3578 if (! lcomm)
3579 {
3580 /* The third argument to .comm is the alignment. */
3581 if (*input_line_pointer != ',')
1ad63b2f 3582 align = 2;
252b5132
RH		 3583 else
3584 {
3585 ++input_line_pointer;
3586 align = get_absolute_expression ();
3587 if (align <= 0)
3588 {
3589 as_warn (_("ignoring bad alignment"));
1ad63b2f 3590 align = 2;
252b5132
RH		 3591 }
3592 }
3593 }
3594 else
3595 {
3596 char *lcomm_name;
3597 char lcomm_endc;
3598
252b5132
RH		 3599 /* The third argument to .lcomm appears to be the real local
3600 common symbol to create. References to the symbol named in
3601 the first argument are turned into references to the third
3602 argument. */
3603 if (*input_line_pointer != ',')
3604 {
3605 as_bad (_("missing real symbol name"));
3606 ignore_rest_of_line ();
3607 return;
3608 }
3609 ++input_line_pointer;
3610
3611 lcomm_name = input_line_pointer;
3612 lcomm_endc = get_symbol_end ();
81d4177b 3613
252b5132
RH		 3614 lcomm_sym = symbol_find_or_make (lcomm_name);
3615
3616 *input_line_pointer = lcomm_endc;
3c02c47f
DE		 3617
3618 /* The fourth argument to .lcomm is the alignment. */
3619 if (*input_line_pointer != ',')
3620 {
3621 if (size <= 4)
3622 align = 2;
3623 else
3624 align = 3;
3625 }
3626 else
3627 {
3628 ++input_line_pointer;
3629 align = get_absolute_expression ();
3630 if (align <= 0)
3631 {
3632 as_warn (_("ignoring bad alignment"));
3633 align = 2;
3634 }
3635 }
252b5132
RH		 3636 }
3637
3638 *end_name = '\0';
3639 sym = symbol_find_or_make (name);
3640 *end_name = endc;
3641
3642 if (S_IS_DEFINED (sym)
3643 || S_GET_VALUE (sym) != 0)
3644 {
3645 as_bad (_("attempt to redefine symbol"));
3646 ignore_rest_of_line ();
3647 return;
3648 }
81d4177b 3649
252b5132 3650 record_alignment (bss_section, align);
81d4177b 3651
252b5132
RH		 3652 if (! lcomm
3653 || ! S_IS_DEFINED (lcomm_sym))
3654 {
3655 symbolS *def_sym;
3656 offsetT def_size;
3657
3658 if (! lcomm)
3659 {
3660 def_sym = sym;
3661 def_size = size;
3662 S_SET_EXTERNAL (sym);
3663 }
3664 else
3665 {
809ffe0d 3666 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3667 def_sym = lcomm_sym;
3668 def_size = 0;
3669 }
3670
3671 subseg_set (bss_section, 1);
3672 frag_align (align, 0, 0);
81d4177b 3673
809ffe0d 3674 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3675 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3676 def_size, (char *) NULL);
3677 *pfrag = 0;
3678 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3679 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3680 }
3681 else if (lcomm)
3682 {
3683 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3684 symbol_get_frag (lcomm_sym)->fr_offset =
3685 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3686 &~ ((1 << align) - 1));
809ffe0d
ILT		 3687 if (align > symbol_get_tc (lcomm_sym)->align)
3688 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3689 }
3690
3691 if (lcomm)
3692 {
3693 /* Make sym an offset from lcomm_sym. */
3694 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3695 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3696 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3697 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3698 }
3699
3700 subseg_set (current_seg, current_subseg);
3701
3702 demand_empty_rest_of_line ();
3703}
3704
3705/* The .csect pseudo-op. This switches us into a different
3706 subsegment. The first argument is a symbol whose value is the
3707 start of the .csect. In COFF, csect symbols get special aux
3708 entries defined by the x_csect field of union internal_auxent. The
3709 optional second argument is the alignment (the default is 2). */
3710
3711static void
98027b10 3712ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3713{
3714 char *name;
3715 char endc;
3716 symbolS *sym;
931e13a6 3717 offsetT align;
252b5132
RH		 3718
3719 name = input_line_pointer;
3720 endc = get_symbol_end ();
81d4177b 3721
252b5132
RH		 3722 sym = symbol_find_or_make (name);
3723
3724 *input_line_pointer = endc;
3725
3726 if (S_GET_NAME (sym)[0] == '\0')
3727 {
3728 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3729 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3730 }
3731
931e13a6 3732 align = 2;
252b5132
RH		 3733 if (*input_line_pointer == ',')
3734 {
3735 ++input_line_pointer;
931e13a6 3736 align = get_absolute_expression ();
252b5132
RH		 3737 }
3738
931e13a6
AM		 3739 ppc_change_csect (sym, align);
3740
252b5132
RH		 3741 demand_empty_rest_of_line ();
3742}
3743
3744/* Change to a different csect. */
3745
3746static void
98027b10 3747ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3748{
3749 if (S_IS_DEFINED (sym))
809ffe0d 3750 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3751 else
3752 {
3753 symbolS **list_ptr;
3754 int after_toc;
3755 int hold_chunksize;
3756 symbolS *list;
931e13a6
AM		 3757 int is_code;
3758 segT sec;
252b5132
RH		 3759
3760 /* This is a new csect. We need to look at the symbol class to
3761 figure out whether it should go in the text section or the
3762 data section. */
3763 after_toc = 0;
931e13a6 3764 is_code = 0;
96d56e9f 3765 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3766 {
3767 case XMC_PR:
3768 case XMC_RO:
3769 case XMC_DB:
3770 case XMC_GL:
3771 case XMC_XO:
3772 case XMC_SV:
3773 case XMC_TI:
3774 case XMC_TB:
3775 S_SET_SEGMENT (sym, text_section);
809ffe0d 3776 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3777 ++ppc_text_subsegment;
3778 list_ptr = &ppc_text_csects;
931e13a6 3779 is_code = 1;
252b5132
RH		 3780 break;
3781 case XMC_RW:
3782 case XMC_TC0:
3783 case XMC_TC:
3784 case XMC_DS:
3785 case XMC_UA:
3786 case XMC_BS:
3787 case XMC_UC:
3788 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3789 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3790 == ppc_data_subsegment))
252b5132
RH		 3791 after_toc = 1;
3792 S_SET_SEGMENT (sym, data_section);
809ffe0d 3793 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3794 ++ppc_data_subsegment;
3795 list_ptr = &ppc_data_csects;
3796 break;
3797 default:
3798 abort ();
3799 }
3800
3801 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3802 changing subsegments, so that we don't use a lot of memory
3803 space for what may be a small section. */
252b5132
RH		 3804 hold_chunksize = chunksize;
3805 chunksize = 64;
3806
931e13a6
AM		 3807 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3808 symbol_get_tc (sym)->subseg);
252b5132
RH		 3809
3810 chunksize = hold_chunksize;
3811
3812 if (after_toc)
3813 ppc_after_toc_frag = frag_now;
3814
931e13a6
AM		 3815 record_alignment (sec, align);
3816 if (is_code)
3817 frag_align_code (align, 0);
3818 else
3819 frag_align (align, 0, 0);
3820
809ffe0d 3821 symbol_set_frag (sym, frag_now);
252b5132
RH		 3822 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3823
931e13a6 3824 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3825 symbol_get_tc (sym)->output = 1;
3826 symbol_get_tc (sym)->within = sym;
81d4177b 3827
252b5132 3828 for (list = *list_ptr;
809ffe0d
ILT		 3829 symbol_get_tc (list)->next != (symbolS *) NULL;
3830 list = symbol_get_tc (list)->next)
252b5132 3831 ;
809ffe0d 3832 symbol_get_tc (list)->next = sym;
81d4177b 3833
252b5132 3834 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3835 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3836 &symbol_lastP);
252b5132
RH		 3837 }
3838
3839 ppc_current_csect = sym;
3840}
3841
85645aed
TG		 3842static void
3843ppc_change_debug_section (unsigned int idx, subsegT subseg)
3844{
3845 segT sec;
3846 flagword oldflags;
3847 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3848
3849 sec = subseg_new (dw->name, subseg);
3850 oldflags = bfd_get_section_flags (stdoutput, sec);
3851 if (oldflags == SEC_NO_FLAGS)
3852 {
3853 /* Just created section. */
3854 gas_assert (dw_sections[idx].sect == NULL);
3855
3856 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3857 bfd_set_section_alignment (stdoutput, sec, 0);
3858 dw_sections[idx].sect = sec;
3859 }
3860
3861 /* Not anymore in a csect. */
3862 ppc_current_csect = NULL;
3863}
3864
3865/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3866 .dwsect flag [, opt-label ]
3867*/
3868
3869static void
3870ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3871{
3872 offsetT flag;
3873 symbolS *opt_label;
3874 const struct xcoff_dwsect_name *dw;
3875 struct dw_subsection *subseg;
3876 struct dw_section *dws;
3877 int i;
3878
3879 /* Find section. */
3880 flag = get_absolute_expression ();
3881 dw = NULL;
3882 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3883 if (xcoff_dwsect_names[i].flag == flag)
3884 {
3885 dw = &xcoff_dwsect_names[i];
3886 break;
3887 }
3888
3889 /* Parse opt-label. */
3890 if (*input_line_pointer == ',')
3891 {
3892 const char *label;
3893 char c;
3894
3895 ++input_line_pointer;
3896
3897 label = input_line_pointer;
3898 c = get_symbol_end ();
3899 opt_label = symbol_find_or_make (label);
3900 *input_line_pointer = c;
3901 }
3902 else
3903 opt_label = NULL;
3904
3905 demand_empty_rest_of_line ();
3906
3907 /* Return now in case of unknown subsection. */
3908 if (dw == NULL)
3909 {
d6ed37ed 3910 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
85645aed
TG		 3911 (unsigned)flag);
3912 return;
3913 }
3914
3915 /* Find the subsection. */
3916 dws = &dw_sections[i];
3917 subseg = NULL;
3918 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3919 {
3920 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3921 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3922 {
3923 as_bad (_("label %s was not defined in this dwarf section"),
3924 S_GET_NAME (opt_label));
3925 subseg = dws->anon_subseg;
3926 opt_label = NULL;
3927 }
3928 else
3929 subseg = symbol_get_tc (opt_label)->u.dw;
3930 }
3931
3932 if (subseg != NULL)
3933 {
3934 /* Switch to the subsection. */
3935 ppc_change_debug_section (i, subseg->subseg);
3936 }
3937 else
3938 {
3939 /* Create a new dw subsection. */
3940 subseg = (struct dw_subsection *)
3941 xmalloc (sizeof (struct dw_subsection));
3942
3943 if (opt_label == NULL)
3944 {
3945 /* The anonymous one. */
3946 subseg->subseg = 0;
3947 subseg->link = NULL;
3948 dws->anon_subseg = subseg;
3949 }
3950 else
3951 {
3952 /* A named one. */
3953 if (dws->list_subseg != NULL)
3954 subseg->subseg = dws->list_subseg->subseg + 1;
3955 else
3956 subseg->subseg = 1;
3957
3958 subseg->link = dws->list_subseg;
3959 dws->list_subseg = subseg;
3960 symbol_get_tc (opt_label)->u.dw = subseg;
3961 }
3962
3963 ppc_change_debug_section (i, subseg->subseg);
3964
3965 if (dw->def_size)
3966 {
3967 /* Add the length field. */
3968 expressionS *exp = &subseg->end_exp;
3969 int sz;
3970
3971 if (opt_label != NULL)
3972 symbol_set_value_now (opt_label);
3973
3974 /* Add the length field. Note that according to the AIX assembler
3975 manual, the size of the length field is 4 for powerpc32 but
3976 12 for powerpc64. */
3977 if (ppc_obj64)
3978 {
3979 /* Write the 64bit marker. */
3980 md_number_to_chars (frag_more (4), -1, 4);
3981 }
3982
3983 exp->X_op = O_subtract;
3984 exp->X_op_symbol = symbol_temp_new_now ();
3985 exp->X_add_symbol = symbol_temp_make ();
3986
3987 sz = ppc_obj64 ? 8 : 4;
3988 exp->X_add_number = -sz;
3989 emit_expr (exp, sz);
3990 }
3991 }
3992}
3993
252b5132
RH		 3994/* This function handles the .text and .data pseudo-ops. These
3995 pseudo-ops aren't really used by XCOFF; we implement them for the
3996 convenience of people who aren't used to XCOFF. */
3997
3998static void
98027b10 3999ppc_section (int type)
252b5132
RH		 4000{
4001 const char *name;
4002 symbolS *sym;
4003
4004 if (type == 't')
4005 name = ".text[PR]";
4006 else if (type == 'd')
4007 name = ".data[RW]";
4008 else
4009 abort ();
4010
4011 sym = symbol_find_or_make (name);
4012
931e13a6 4013 ppc_change_csect (sym, 2);
252b5132
RH		 4014
4015 demand_empty_rest_of_line ();
4016}
4017
4018/* This function handles the .section pseudo-op. This is mostly to
4019 give an error, since XCOFF only supports .text, .data and .bss, but
4020 we do permit the user to name the text or data section. */
4021
4022static void
98027b10 4023ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4024{
4025 char *user_name;
4026 const char *real_name;
4027 char c;
4028 symbolS *sym;
4029
4030 user_name = input_line_pointer;
4031 c = get_symbol_end ();
4032
4033 if (strcmp (user_name, ".text") == 0)
4034 real_name = ".text[PR]";
4035 else if (strcmp (user_name, ".data") == 0)
4036 real_name = ".data[RW]";
4037 else
4038 {
d6ed37ed 4039 as_bad (_("the XCOFF file format does not support arbitrary sections"));
252b5132
RH		 4040 *input_line_pointer = c;
4041 ignore_rest_of_line ();
4042 return;
4043 }
4044
4045 *input_line_pointer = c;
4046
4047 sym = symbol_find_or_make (real_name);
4048
931e13a6 4049 ppc_change_csect (sym, 2);
252b5132
RH		 4050
4051 demand_empty_rest_of_line ();
4052}
4053
4054/* The .extern pseudo-op. We create an undefined symbol. */
4055
4056static void
98027b10 4057ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4058{
4059 char *name;
4060 char endc;
4061
4062 name = input_line_pointer;
4063 endc = get_symbol_end ();
4064
4065 (void) symbol_find_or_make (name);
4066
4067 *input_line_pointer = endc;
4068
4069 demand_empty_rest_of_line ();
4070}
4071
4072/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4073
4074static void
98027b10 4075ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4076{
4077 char *name;
4078 char endc;
4079 symbolS *sym;
4080
4081 name = input_line_pointer;
4082 endc = get_symbol_end ();
4083
4084 sym = symbol_find_or_make (name);
4085
4086 *input_line_pointer = endc;
4087
809ffe0d 4088 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4089
4090 demand_empty_rest_of_line ();
4091}
4092
c865e45b
RS		 4093/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4094 relocations at the beginning of the current csect.
4095
4096 (In principle, there's no reason why the relocations _have_ to be at
4097 the beginning. Anywhere in the csect would do. However, inserting
4098 at the beginning is what the native assmebler does, and it helps to
4099 deal with cases where the .ref statements follow the section contents.)
4100
4101 ??? .refs don't work for empty .csects. However, the native assembler
4102 doesn't report an error in this case, and neither yet do we. */
4103
4104static void
4105ppc_ref (int ignore ATTRIBUTE_UNUSED)
4106{
4107 char *name;
4108 char c;
4109
4110 if (ppc_current_csect == NULL)
4111 {
4112 as_bad (_(".ref outside .csect"));
4113 ignore_rest_of_line ();
4114 return;
4115 }
4116
4117 do
4118 {
4119 name = input_line_pointer;
4120 c = get_symbol_end ();
4121
4122 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4123 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4124
4125 *input_line_pointer = c;
4126 SKIP_WHITESPACE ();
4127 c = *input_line_pointer;
4128 if (c == ',')
4129 {
4130 input_line_pointer++;
4131 SKIP_WHITESPACE ();
4132 if (is_end_of_line[(unsigned char) *input_line_pointer])
4133 {
4134 as_bad (_("missing symbol name"));
4135 ignore_rest_of_line ();
4136 return;
4137 }
4138 }
4139 }
4140 while (c == ',');
4141
4142 demand_empty_rest_of_line ();
4143}
4144
252b5132
RH		 4145/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4146 although I don't know why it bothers. */
4147
4148static void
98027b10 4149ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4150{
4151 char *name;
4152 char endc;
4153 symbolS *sym;
4154 int len;
4155
4156 name = input_line_pointer;
4157 endc = get_symbol_end ();
4158
4159 sym = symbol_find_or_make (name);
4160
4161 *input_line_pointer = endc;
4162
4163 if (*input_line_pointer != ',')
4164 {
4165 as_bad (_("missing rename string"));
4166 ignore_rest_of_line ();
4167 return;
4168 }
4169 ++input_line_pointer;
4170
809ffe0d 4171 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 4172
4173 demand_empty_rest_of_line ();
4174}
4175
4176/* The .stabx pseudo-op. This is similar to a normal .stabs
4177 pseudo-op, but slightly different. A sample is
4178 .stabx "main:F-1",.main,142,0
4179 The first argument is the symbol name to create. The second is the
4180 value, and the third is the storage class. The fourth seems to be
4181 always zero, and I am assuming it is the type. */
4182
4183static void
98027b10 4184ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4185{
4186 char *name;
4187 int len;
4188 symbolS *sym;
4189 expressionS exp;
4190
4191 name = demand_copy_C_string (&len);
4192
4193 if (*input_line_pointer != ',')
4194 {
4195 as_bad (_("missing value"));
4196 return;
4197 }
4198 ++input_line_pointer;
4199
b34976b6 4200 ppc_stab_symbol = TRUE;
252b5132 4201 sym = symbol_make (name);
b34976b6 4202 ppc_stab_symbol = FALSE;
252b5132 4203
809ffe0d 4204 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 4205
4206 (void) expression (&exp);
4207
4208 switch (exp.X_op)
4209 {
4210 case O_illegal:
4211 case O_absent:
4212 case O_big:
4213 as_bad (_("illegal .stabx expression; zero assumed"));
4214 exp.X_add_number = 0;
4215 /* Fall through. */
4216 case O_constant:
4217 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 4218 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 4219 break;
4220
4221 case O_symbol:
4222 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 4223 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4224 else
4225 {
4226 S_SET_VALUE (sym,
4227 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 4228 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 4229 }
4230 break;
4231
4232 default:
4233 /* The value is some complex expression. This will probably
99a814a1
AM		 4234 fail at some later point, but this is probably the right
4235 thing to do here. */
809ffe0d 4236 symbol_set_value_expression (sym, &exp);
252b5132
RH		 4237 break;
4238 }
4239
4240 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4241 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4242
4243 if (*input_line_pointer != ',')
4244 {
4245 as_bad (_("missing class"));
4246 return;
4247 }
4248 ++input_line_pointer;
4249
4250 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4251
4252 if (*input_line_pointer != ',')
4253 {
4254 as_bad (_("missing type"));
4255 return;
4256 }
4257 ++input_line_pointer;
4258
4259 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4260
809ffe0d 4261 symbol_get_tc (sym)->output = 1;
252b5132 4262
c734e7e3
TG		 4263 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4264 {
4265 /* In this case :
252b5132 4266
c734e7e3
TG		 4267 .bs name
4268 .stabx "z",arrays_,133,0
4269 .es
99a814a1 4270
c734e7e3 4271 .comm arrays_,13768,3
99a814a1 4272
c734e7e3
TG		 4273 resolve_symbol_value will copy the exp's "within" into sym's when the
4274 offset is 0. Since this seems to be corner case problem,
4275 only do the correction for storage class C_STSYM. A better solution
4276 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 4277
c734e7e3
TG		 4278 if (exp.X_op == O_symbol)
4279 {
4280 if (ppc_current_block == NULL)
4281 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 4282
c734e7e3
TG		 4283 symbol_get_tc (sym)->within = ppc_current_block;
4284 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4285 }
4286 }
99a814a1 4287
252b5132
RH		 4288 if (exp.X_op != O_symbol
4289 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4290 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4291 ppc_frob_label (sym);
4292 else
4293 {
4294 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4295 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4296 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4297 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4298 }
4299
4300 demand_empty_rest_of_line ();
4301}
4302
4303/* The .function pseudo-op. This takes several arguments. The first
4304 argument seems to be the external name of the symbol. The second
67c1ffbe 4305 argument seems to be the label for the start of the function. gcc
252b5132
RH		 4306 uses the same name for both. I have no idea what the third and
4307 fourth arguments are meant to be. The optional fifth argument is
4308 an expression for the size of the function. In COFF this symbol
4309 gets an aux entry like that used for a csect. */
4310
4311static void
98027b10 4312ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4313{
4314 char *name;
4315 char endc;
4316 char *s;
4317 symbolS *ext_sym;
4318 symbolS *lab_sym;
4319
4320 name = input_line_pointer;
4321 endc = get_symbol_end ();
4322
4323 /* Ignore any [PR] suffix. */
4324 name = ppc_canonicalize_symbol_name (name);
4325 s = strchr (name, '[');
4326 if (s != (char *) NULL
4327 && strcmp (s + 1, "PR]") == 0)
4328 *s = '\0';
4329
4330 ext_sym = symbol_find_or_make (name);
4331
4332 *input_line_pointer = endc;
4333
4334 if (*input_line_pointer != ',')
4335 {
4336 as_bad (_("missing symbol name"));
4337 ignore_rest_of_line ();
4338 return;
4339 }
4340 ++input_line_pointer;
4341
4342 name = input_line_pointer;
4343 endc = get_symbol_end ();
4344
4345 lab_sym = symbol_find_or_make (name);
4346
4347 *input_line_pointer = endc;
4348
4349 if (ext_sym != lab_sym)
4350 {
809ffe0d
ILT		 4351 expressionS exp;
4352
4353 exp.X_op = O_symbol;
4354 exp.X_add_symbol = lab_sym;
4355 exp.X_op_symbol = NULL;
4356 exp.X_add_number = 0;
4357 exp.X_unsigned = 0;
4358 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4359 }
4360
96d56e9f
NC		 4361 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4362 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4363 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4364
4365 if (*input_line_pointer == ',')
4366 {
91d6fa6a 4367 expressionS exp;
252b5132
RH		 4368
4369 /* Ignore the third argument. */
4370 ++input_line_pointer;
91d6fa6a 4371 expression (& exp);
252b5132
RH		 4372 if (*input_line_pointer == ',')
4373 {
4374 /* Ignore the fourth argument. */
4375 ++input_line_pointer;
91d6fa6a 4376 expression (& exp);
252b5132
RH		 4377 if (*input_line_pointer == ',')
4378 {
4379 /* The fifth argument is the function size. */
4380 ++input_line_pointer;
85645aed
TG		 4381 symbol_get_tc (ext_sym)->u.size = symbol_new
4382 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4383 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4384 }
4385 }
4386 }
4387
4388 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4389 SF_SET_FUNCTION (ext_sym);
4390 SF_SET_PROCESS (ext_sym);
4391 coff_add_linesym (ext_sym);
4392
4393 demand_empty_rest_of_line ();
4394}
4395
4396/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4397 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4398 with the correct line number */
5d6255fe 4399
8642cce8 4400static symbolS *saved_bi_sym = 0;
252b5132
RH		 4401
4402static void
98027b10 4403ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4404{
4405 symbolS *sym;
4406
4407 sym = symbol_make (".bf");
4408 S_SET_SEGMENT (sym, text_section);
809ffe0d 4409 symbol_set_frag (sym, frag_now);
252b5132
RH		 4410 S_SET_VALUE (sym, frag_now_fix ());
4411 S_SET_STORAGE_CLASS (sym, C_FCN);
4412
4413 coff_line_base = get_absolute_expression ();
4414
4415 S_SET_NUMBER_AUXILIARY (sym, 1);
4416 SA_SET_SYM_LNNO (sym, coff_line_base);
4417
8642cce8 4418 /* Line number for bi. */
5d6255fe 4419 if (saved_bi_sym)
8642cce8
TR		 4420 {
4421 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4422 saved_bi_sym = 0;
4423 }
5d6255fe 4424
8642cce8 4425
809ffe0d 4426 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4427
4428 ppc_frob_label (sym);
4429
4430 demand_empty_rest_of_line ();
4431}
4432
4433/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4434 ".ef", except that the line number is absolute, not relative to the
4435 most recent ".bf" symbol. */
4436
4437static void
98027b10 4438ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4439{
4440 symbolS *sym;
4441
4442 sym = symbol_make (".ef");
4443 S_SET_SEGMENT (sym, text_section);
809ffe0d 4444 symbol_set_frag (sym, frag_now);
252b5132
RH		 4445 S_SET_VALUE (sym, frag_now_fix ());
4446 S_SET_STORAGE_CLASS (sym, C_FCN);
4447 S_SET_NUMBER_AUXILIARY (sym, 1);
4448 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4449 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4450
4451 ppc_frob_label (sym);
4452
4453 demand_empty_rest_of_line ();
4454}
4455
4456/* The .bi and .ei pseudo-ops. These take a string argument and
4457 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4458 the symbol list. The value of .bi will be know when the next .bf
4459 is encountered. */
252b5132
RH		 4460
4461static void
98027b10 4462ppc_biei (int ei)
252b5132
RH		 4463{
4464 static symbolS *last_biei;
4465
4466 char *name;
4467 int len;
4468 symbolS *sym;
4469 symbolS *look;
4470
4471 name = demand_copy_C_string (&len);
4472
4473 /* The value of these symbols is actually file offset. Here we set
4474 the value to the index into the line number entries. In
4475 ppc_frob_symbols we set the fix_line field, which will cause BFD
4476 to do the right thing. */
4477
4478 sym = symbol_make (name);
4479 /* obj-coff.c currently only handles line numbers correctly in the
4480 .text section. */
4481 S_SET_SEGMENT (sym, text_section);
4482 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4483 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4484
4485 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4486 symbol_get_tc (sym)->output = 1;
81d4177b 4487
8642cce8 4488 /* Save bi. */
5d6255fe 4489 if (ei)
8642cce8
TR		 4490 saved_bi_sym = 0;
4491 else
4492 saved_bi_sym = sym;
4493
252b5132
RH		 4494 for (look = last_biei ? last_biei : symbol_rootP;
4495 (look != (symbolS *) NULL
4496 && (S_GET_STORAGE_CLASS (look) == C_FILE
4497 || S_GET_STORAGE_CLASS (look) == C_BINCL
4498 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4499 look = symbol_next (look))
4500 ;
4501 if (look != (symbolS *) NULL)
4502 {
4503 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4504 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4505 last_biei = sym;
4506 }
4507
4508 demand_empty_rest_of_line ();
4509}
4510
4511/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4512 There is one argument, which is a csect symbol. The value of the
4513 .bs symbol is the index of this csect symbol. */
4514
4515static void
98027b10 4516ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4517{
4518 char *name;
4519 char endc;
4520 symbolS *csect;
4521 symbolS *sym;
4522
4523 if (ppc_current_block != NULL)
4524 as_bad (_("nested .bs blocks"));
4525
4526 name = input_line_pointer;
4527 endc = get_symbol_end ();
4528
4529 csect = symbol_find_or_make (name);
4530
4531 *input_line_pointer = endc;
4532
4533 sym = symbol_make (".bs");
4534 S_SET_SEGMENT (sym, now_seg);
4535 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4536 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4537 symbol_get_tc (sym)->output = 1;
252b5132 4538
809ffe0d 4539 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4540
4541 ppc_frob_label (sym);
4542
4543 ppc_current_block = sym;
4544
4545 demand_empty_rest_of_line ();
4546}
4547
4548/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4549
4550static void
98027b10 4551ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4552{
4553 symbolS *sym;
4554
4555 if (ppc_current_block == NULL)
4556 as_bad (_(".es without preceding .bs"));
4557
4558 sym = symbol_make (".es");
4559 S_SET_SEGMENT (sym, now_seg);
4560 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4561 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4562 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4563
4564 ppc_frob_label (sym);
4565
4566 ppc_current_block = NULL;
4567
4568 demand_empty_rest_of_line ();
4569}
4570
4571/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4572 line number. */
4573
4574static void
98027b10 4575ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4576{
4577 symbolS *sym;
4578
4579 sym = symbol_make (".bb");
4580 S_SET_SEGMENT (sym, text_section);
809ffe0d 4581 symbol_set_frag (sym, frag_now);
252b5132
RH		 4582 S_SET_VALUE (sym, frag_now_fix ());
4583 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4584
4585 S_SET_NUMBER_AUXILIARY (sym, 1);
4586 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4587
809ffe0d 4588 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4589
4590 SF_SET_PROCESS (sym);
4591
4592 ppc_frob_label (sym);
4593
4594 demand_empty_rest_of_line ();
4595}
4596
4597/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4598 line number. */
4599
4600static void
98027b10 4601ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4602{
4603 symbolS *sym;
4604
4605 sym = symbol_make (".eb");
4606 S_SET_SEGMENT (sym, text_section);
809ffe0d 4607 symbol_set_frag (sym, frag_now);
252b5132
RH		 4608 S_SET_VALUE (sym, frag_now_fix ());
4609 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4610 S_SET_NUMBER_AUXILIARY (sym, 1);
4611 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4612 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4613
4614 SF_SET_PROCESS (sym);
4615
4616 ppc_frob_label (sym);
4617
4618 demand_empty_rest_of_line ();
4619}
4620
4621/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4622 specified name. */
4623
4624static void
98027b10 4625ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4626{
4627 char *name;
4628 int len;
4629 symbolS *sym;
4630
4631 name = demand_copy_C_string (&len);
4632 sym = symbol_make (name);
4633 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4634 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4635 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4636 S_SET_VALUE (sym, 0);
809ffe0d 4637 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4638
4639 ppc_frob_label (sym);
4640
4641 demand_empty_rest_of_line ();
4642}
4643
4644/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4645
4646static void
98027b10 4647ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4648{
4649 symbolS *sym;
4650
4651 sym = symbol_make (".ec");
4652 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4653 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4654 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4655 S_SET_VALUE (sym, 0);
809ffe0d 4656 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4657
4658 ppc_frob_label (sym);
4659
4660 demand_empty_rest_of_line ();
4661}
4662
4663/* The .toc pseudo-op. Switch to the .toc subsegment. */
4664
4665static void
98027b10 4666ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4667{
4668 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4669 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4670 else
4671 {
4672 subsegT subseg;
4673 symbolS *sym;
4674 symbolS *list;
81d4177b 4675
252b5132
RH		 4676 subseg = ppc_data_subsegment;
4677 ++ppc_data_subsegment;
4678
4679 subseg_new (segment_name (data_section), subseg);
4680 ppc_toc_frag = frag_now;
4681
4682 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4683 symbol_set_frag (sym, frag_now);
252b5132
RH		 4684 S_SET_SEGMENT (sym, data_section);
4685 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4686 symbol_get_tc (sym)->subseg = subseg;
4687 symbol_get_tc (sym)->output = 1;
4688 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4689
4690 ppc_toc_csect = sym;
81d4177b 4691
252b5132 4692 for (list = ppc_data_csects;
809ffe0d
ILT		 4693 symbol_get_tc (list)->next != (symbolS *) NULL;
4694 list = symbol_get_tc (list)->next)
252b5132 4695 ;
809ffe0d 4696 symbol_get_tc (list)->next = sym;
252b5132
RH		 4697
4698 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4699 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4700 &symbol_lastP);
252b5132
RH		 4701 }
4702
4703 ppc_current_csect = ppc_toc_csect;
4704
4705 demand_empty_rest_of_line ();
4706}
4707
4708/* The AIX assembler automatically aligns the operands of a .long or
4709 .short pseudo-op, and we want to be compatible. */
4710
4711static void
98027b10 4712ppc_xcoff_cons (int log_size)
252b5132
RH		 4713{
4714 frag_align (log_size, 0, 0);
4715 record_alignment (now_seg, log_size);
4716 cons (1 << log_size);
4717}
4718
4719static void
98027b10 4720ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4721{
4722 expressionS exp;
4723 int byte_count;
4724
4725 (void) expression (&exp);
4726
4727 if (exp.X_op != O_constant)
4728 {
4729 as_bad (_("non-constant byte count"));
4730 return;
4731 }
4732
4733 byte_count = exp.X_add_number;
4734
4735 if (*input_line_pointer != ',')
4736 {
4737 as_bad (_("missing value"));
4738 return;
4739 }
4740
4741 ++input_line_pointer;
4742 cons (byte_count);
4743}
4744
85645aed
TG		 4745void
4746ppc_xcoff_end (void)
4747{
4748 int i;
4749
4750 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4751 {
4752 struct dw_section *dws = &dw_sections[i];
4753 struct dw_subsection *dwss;
4754
4755 if (dws->anon_subseg)
4756 {
4757 dwss = dws->anon_subseg;
4758 dwss->link = dws->list_subseg;
4759 }
4760 else
4761 dwss = dws->list_subseg;
4762
4763 for (; dwss != NULL; dwss = dwss->link)
4764 if (dwss->end_exp.X_add_symbol != NULL)
4765 {
4766 subseg_set (dws->sect, dwss->subseg);
4767 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4768 }
4769 }
4770}
4771
252b5132 4772#endif /* OBJ_XCOFF */
0baf16f2 4773#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4774\f
4775/* The .tc pseudo-op. This is used when generating either XCOFF or
4776 ELF. This takes two or more arguments.
4777
4778 When generating XCOFF output, the first argument is the name to
4779 give to this location in the toc; this will be a symbol with class
0baf16f2 4780 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4781 this location in the TOC; often there is just one more argument, a
1049f94e 4782 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4783 depends on target word size. A 32-bit target uses 4-byte values, a
4784 64-bit target uses 8-byte values.
252b5132
RH		 4785
4786 When not generating XCOFF output, the arguments are the same, but
4787 the first argument is simply ignored. */
4788
4789static void
98027b10 4790ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4791{
4792#ifdef OBJ_XCOFF
4793
4794 /* Define the TOC symbol name. */
4795 {
4796 char *name;
4797 char endc;
4798 symbolS *sym;
4799
4800 if (ppc_toc_csect == (symbolS *) NULL
4801 || ppc_toc_csect != ppc_current_csect)
4802 {
4803 as_bad (_(".tc not in .toc section"));
4804 ignore_rest_of_line ();
4805 return;
4806 }
4807
4808 name = input_line_pointer;
4809 endc = get_symbol_end ();
4810
4811 sym = symbol_find_or_make (name);
4812
4813 *input_line_pointer = endc;
4814
4815 if (S_IS_DEFINED (sym))
4816 {
4817 symbolS *label;
4818
809ffe0d 4819 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4820 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4821 {
4822 as_bad (_(".tc with no label"));
4823 ignore_rest_of_line ();
4824 return;
4825 }
4826
4827 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4828 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4829 S_SET_VALUE (label, S_GET_VALUE (sym));
4830
4831 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4832 ++input_line_pointer;
4833
4834 return;
4835 }
4836
4837 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4838 symbol_set_frag (sym, frag_now);
252b5132 4839 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4840 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4841 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4842
4843 ppc_frob_label (sym);
4844 }
4845
0baf16f2
AM		 4846#endif /* OBJ_XCOFF */
4847#ifdef OBJ_ELF
9c7977b3 4848 int align;
252b5132
RH		 4849
4850 /* Skip the TOC symbol name. */
4851 while (is_part_of_name (*input_line_pointer)
d13d4015 4852 || *input_line_pointer == ' '
252b5132
RH		 4853 || *input_line_pointer == '['
4854 || *input_line_pointer == ']'
4855 || *input_line_pointer == '{'
4856 || *input_line_pointer == '}')
4857 ++input_line_pointer;
4858
0baf16f2 4859 /* Align to a four/eight byte boundary. */
2b3c4602 4860 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4861 frag_align (align, 0, 0);
4862 record_alignment (now_seg, align);
0baf16f2 4863#endif /* OBJ_ELF */
252b5132
RH		 4864
4865 if (*input_line_pointer != ',')
4866 demand_empty_rest_of_line ();
4867 else
4868 {
4869 ++input_line_pointer;
2b3c4602 4870 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4871 }
4872}
0baf16f2
AM		 4873
4874/* Pseudo-op .machine. */
0baf16f2
AM		 4875
4876static void
98027b10 4877ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4878{
69c040df
AM		 4879 char *cpu_string;
4880#define MAX_HISTORY 100
fa452fa6 4881 static ppc_cpu_t *cpu_history;
69c040df
AM		 4882 static int curr_hist;
4883
4884 SKIP_WHITESPACE ();
4885
4886 if (*input_line_pointer == '"')
4887 {
4888 int len;
4889 cpu_string = demand_copy_C_string (&len);
4890 }
4891 else
4892 {
4893 char c;
4894 cpu_string = input_line_pointer;
4895 c = get_symbol_end ();
4896 cpu_string = xstrdup (cpu_string);
4897 *input_line_pointer = c;
4898 }
4899
4900 if (cpu_string != NULL)
4901 {
fa452fa6 4902 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4903 ppc_cpu_t new_cpu;
69c040df
AM		 4904 char *p;
4905
4906 for (p = cpu_string; *p != 0; p++)
4907 *p = TOLOWER (*p);
4908
4909 if (strcmp (cpu_string, "push") == 0)
4910 {
4911 if (cpu_history == NULL)
4912 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4913
4914 if (curr_hist >= MAX_HISTORY)
4915 as_bad (_(".machine stack overflow"));
4916 else
4917 cpu_history[curr_hist++] = ppc_cpu;
4918 }
4919 else if (strcmp (cpu_string, "pop") == 0)
4920 {
4921 if (curr_hist <= 0)
4922 as_bad (_(".machine stack underflow"));
4923 else
4924 ppc_cpu = cpu_history[--curr_hist];
4925 }
776fc418 4926 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
69fe9ce5 4927 ppc_cpu = new_cpu;
69c040df
AM		 4928 else
4929 as_bad (_("invalid machine `%s'"), cpu_string);
4930
4931 if (ppc_cpu != old_cpu)
4932 ppc_setup_opcodes ();
4933 }
4934
4935 demand_empty_rest_of_line ();
0baf16f2 4936}
0baf16f2 4937#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4938\f
4939#ifdef TE_PE
4940
99a814a1 4941/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4942
4943/* Set the current section. */
4944static void
98027b10 4945ppc_set_current_section (segT new)
252b5132
RH		 4946{
4947 ppc_previous_section = ppc_current_section;
4948 ppc_current_section = new;
4949}
4950
4951/* pseudo-op: .previous
4952 behaviour: toggles the current section with the previous section.
4953 errors: None
99a814a1
AM		 4954 warnings: "No previous section" */
4955
252b5132 4956static void
98027b10 4957ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132 4958{
81d4177b 4959 if (ppc_previous_section == NULL)
252b5132 4960 {
d6ed37ed 4961 as_warn (_("no previous section to return to, ignored."));
252b5132
RH		 4962 return;
4963 }
4964
99a814a1 4965 subseg_set (ppc_previous_section, 0);
252b5132 4966
99a814a1 4967 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4968}
4969
4970/* pseudo-op: .pdata
4971 behaviour: predefined read only data section
b34976b6 4972 double word aligned
252b5132
RH		 4973 errors: None
4974 warnings: None
4975 initial: .section .pdata "adr3"
b34976b6 4976 a - don't know -- maybe a misprint
252b5132
RH		 4977 d - initialized data
4978 r - readable
4979 3 - double word aligned (that would be 4 byte boundary)
4980
4981 commentary:
4982 Tag index tables (also known as the function table) for exception
99a814a1 4983 handling, debugging, etc. */
252b5132 4984
252b5132 4985static void
98027b10 4986ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4987{
81d4177b 4988 if (pdata_section == 0)
252b5132
RH		 4989 {
4990 pdata_section = subseg_new (".pdata", 0);
81d4177b 4991
252b5132
RH		 4992 bfd_set_section_flags (stdoutput, pdata_section,
4993 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4994 | SEC_READONLY | SEC_DATA ));
81d4177b 4995
252b5132
RH		 4996 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4997 }
4998 else
4999 {
99a814a1 5000 pdata_section = subseg_new (".pdata", 0);
252b5132 5001 }
99a814a1 5002 ppc_set_current_section (pdata_section);
252b5132
RH		 5003}
5004
5005/* pseudo-op: .ydata
5006 behaviour: predefined read only data section
b34976b6 5007 double word aligned
252b5132
RH		 5008 errors: None
5009 warnings: None
5010 initial: .section .ydata "drw3"
b34976b6 5011 a - don't know -- maybe a misprint
252b5132
RH		 5012 d - initialized data
5013 r - readable
5014 3 - double word aligned (that would be 4 byte boundary)
5015 commentary:
5016 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 5017 debugging, etc. */
5018
252b5132 5019static void
98027b10 5020ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 5021{
81d4177b 5022 if (ydata_section == 0)
252b5132
RH		 5023 {
5024 ydata_section = subseg_new (".ydata", 0);
5025 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 5026 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5027 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 5028
5029 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5030 }
5031 else
5032 {
5033 ydata_section = subseg_new (".ydata", 0);
5034 }
99a814a1 5035 ppc_set_current_section (ydata_section);
252b5132
RH		 5036}
5037
5038/* pseudo-op: .reldata
5039 behaviour: predefined read write data section
b34976b6 5040 double word aligned (4-byte)
252b5132
RH		 5041 FIXME: relocation is applied to it
5042 FIXME: what's the difference between this and .data?
5043 errors: None
5044 warnings: None
5045 initial: .section .reldata "drw3"
5046 d - initialized data
5047 r - readable
5048 w - writeable
5049 3 - double word aligned (that would be 8 byte boundary)
5050
5051 commentary:
5052 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 5053 function descriptors, etc. */
5054
252b5132 5055static void
98027b10 5056ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5057{
5058 if (reldata_section == 0)
5059 {
5060 reldata_section = subseg_new (".reldata", 0);
5061
5062 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 5063 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5064 | SEC_DATA));
252b5132
RH		 5065
5066 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5067 }
5068 else
5069 {
5070 reldata_section = subseg_new (".reldata", 0);
5071 }
99a814a1 5072 ppc_set_current_section (reldata_section);
252b5132
RH		 5073}
5074
5075/* pseudo-op: .rdata
5076 behaviour: predefined read only data section
b34976b6 5077 double word aligned
252b5132
RH		 5078 errors: None
5079 warnings: None
5080 initial: .section .rdata "dr3"
5081 d - initialized data
5082 r - readable
99a814a1
AM		 5083 3 - double word aligned (that would be 4 byte boundary) */
5084
252b5132 5085static void
98027b10 5086ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5087{
5088 if (rdata_section == 0)
5089 {
5090 rdata_section = subseg_new (".rdata", 0);
5091 bfd_set_section_flags (stdoutput, rdata_section,
5092 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5093 | SEC_READONLY | SEC_DATA ));
5094
5095 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5096 }
5097 else
5098 {
5099 rdata_section = subseg_new (".rdata", 0);
5100 }
99a814a1 5101 ppc_set_current_section (rdata_section);
252b5132
RH		 5102}
5103
5104/* pseudo-op: .ualong
81d4177b 5105 behaviour: much like .int, with the exception that no alignment is
b34976b6 5106 performed.
252b5132
RH		 5107 FIXME: test the alignment statement
5108 errors: None
99a814a1
AM		 5109 warnings: None */
5110
252b5132 5111static void
98027b10 5112ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 5113{
99a814a1
AM		 5114 /* Try for long. */
5115 cons (4);
252b5132
RH		 5116}
5117
5118/* pseudo-op: .znop <symbol name>
5119 behaviour: Issue a nop instruction
b34976b6 5120 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 5121 the supplied symbol name.
5122 errors: None
99a814a1
AM		 5123 warnings: Missing symbol name */
5124
252b5132 5125static void
98027b10 5126ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5127{
5128 unsigned long insn;
5129 const struct powerpc_opcode *opcode;
252b5132 5130 char *f;
252b5132 5131 symbolS *sym;
252b5132
RH		 5132 char *symbol_name;
5133 char c;
5134 char *name;
252b5132 5135
99a814a1 5136 /* Strip out the symbol name. */
252b5132
RH		 5137 symbol_name = input_line_pointer;
5138 c = get_symbol_end ();
5139
5140 name = xmalloc (input_line_pointer - symbol_name + 1);
5141 strcpy (name, symbol_name);
5142
5143 sym = symbol_find_or_make (name);
5144
5145 *input_line_pointer = c;
5146
5147 SKIP_WHITESPACE ();
5148
5149 /* Look up the opcode in the hash table. */
5150 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5151
99a814a1 5152 /* Stick in the nop. */
252b5132
RH		 5153 insn = opcode->opcode;
5154
5155 /* Write out the instruction. */
5156 f = frag_more (4);
5157 md_number_to_chars (f, insn, 4);
5158 fix_new (frag_now,
5159 f - frag_now->fr_literal,
5160 4,
5161 sym,
5162 0,
5163 0,
5164 BFD_RELOC_16_GOT_PCREL);
5165
5166}
5167
81d4177b
KH		 5168/* pseudo-op:
5169 behaviour:
5170 errors:
99a814a1
AM		 5171 warnings: */
5172
252b5132 5173static void
98027b10 5174ppc_pe_comm (int lcomm)
252b5132 5175{
98027b10
AM		 5176 char *name;
5177 char c;
5178 char *p;
252b5132 5179 offsetT temp;
98027b10 5180 symbolS *symbolP;
252b5132
RH		 5181 offsetT align;
5182
5183 name = input_line_pointer;
5184 c = get_symbol_end ();
5185
99a814a1 5186 /* just after name is now '\0'. */
252b5132
RH		 5187 p = input_line_pointer;
5188 *p = c;
5189 SKIP_WHITESPACE ();
5190 if (*input_line_pointer != ',')
5191 {
d6ed37ed 5192 as_bad (_("expected comma after symbol-name: rest of line ignored."));
252b5132
RH		 5193 ignore_rest_of_line ();
5194 return;
5195 }
5196
5197 input_line_pointer++; /* skip ',' */
5198 if ((temp = get_absolute_expression ()) < 0)
5199 {
5200 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5201 ignore_rest_of_line ();
5202 return;
5203 }
5204
5205 if (! lcomm)
5206 {
5207 /* The third argument to .comm is the alignment. */
5208 if (*input_line_pointer != ',')
5209 align = 3;
5210 else
5211 {
5212 ++input_line_pointer;
5213 align = get_absolute_expression ();
5214 if (align <= 0)
5215 {
5216 as_warn (_("ignoring bad alignment"));
5217 align = 3;
5218 }
5219 }
5220 }
5221
5222 *p = 0;
5223 symbolP = symbol_find_or_make (name);
5224
5225 *p = c;
5226 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5227 {
d6ed37ed 5228 as_bad (_("ignoring attempt to re-define symbol `%s'."),
252b5132
RH		 5229 S_GET_NAME (symbolP));
5230 ignore_rest_of_line ();
5231 return;
5232 }
5233
5234 if (S_GET_VALUE (symbolP))
5235 {
5236 if (S_GET_VALUE (symbolP) != (valueT) temp)
d6ed37ed 5237 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
252b5132
RH		 5238 S_GET_NAME (symbolP),
5239 (long) S_GET_VALUE (symbolP),
5240 (long) temp);
5241 }
5242 else
5243 {
5244 S_SET_VALUE (symbolP, (valueT) temp);
5245 S_SET_EXTERNAL (symbolP);
86ebace2 5246 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 5247 }
5248
5249 demand_empty_rest_of_line ();
5250}
5251
5252/*
5253 * implement the .section pseudo op:
5254 * .section name {, "flags"}
5255 * ^ ^
5256 * | +--- optional flags: 'b' for bss
5257 * | 'i' for info
5258 * +-- section name 'l' for lib
5259 * 'n' for noload
5260 * 'o' for over
5261 * 'w' for data
5262 * 'd' (apparently m88k for data)
5263 * 'x' for text
5264 * But if the argument is not a quoted string, treat it as a
5265 * subsegment number.
5266 *
5267 * FIXME: this is a copy of the section processing from obj-coff.c, with
5268 * additions/changes for the moto-pas assembler support. There are three
5269 * categories:
5270 *
81d4177b 5271 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 5272 * setting bits that bfd probably neither understands or uses. The
5273 * correct approach (?) will have to incorporate extra fields attached
5274 * to the section to hold the system specific stuff. (krk)
5275 *
5276 * Section Contents:
5277 * 'a' - unknown - referred to in documentation, but no definition supplied
5278 * 'c' - section has code
5279 * 'd' - section has initialized data
5280 * 'u' - section has uninitialized data
5281 * 'i' - section contains directives (info)
5282 * 'n' - section can be discarded
5283 * 'R' - remove section at link time
5284 *
5285 * Section Protection:
5286 * 'r' - section is readable
5287 * 'w' - section is writeable
5288 * 'x' - section is executable
5289 * 's' - section is sharable
5290 *
5291 * Section Alignment:
5292 * '0' - align to byte boundary
5293 * '1' - align to halfword undary
5294 * '2' - align to word boundary
5295 * '3' - align to doubleword boundary
5296 * '4' - align to quadword boundary
5297 * '5' - align to 32 byte boundary
5298 * '6' - align to 64 byte boundary
5299 *
5300 */
5301
5302void
98027b10 5303ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 5304{
99a814a1 5305 /* Strip out the section name. */
252b5132
RH		 5306 char *section_name;
5307 char c;
5308 char *name;
5309 unsigned int exp;
5310 flagword flags;
5311 segT sec;
5312 int align;
5313
5314 section_name = input_line_pointer;
5315 c = get_symbol_end ();
5316
5317 name = xmalloc (input_line_pointer - section_name + 1);
5318 strcpy (name, section_name);
5319
5320 *input_line_pointer = c;
5321
5322 SKIP_WHITESPACE ();
5323
5324 exp = 0;
5325 flags = SEC_NO_FLAGS;
5326
5327 if (strcmp (name, ".idata$2") == 0)
5328 {
5329 align = 0;
5330 }
5331 else if (strcmp (name, ".idata$3") == 0)
5332 {
5333 align = 0;
5334 }
5335 else if (strcmp (name, ".idata$4") == 0)
5336 {
5337 align = 2;
5338 }
5339 else if (strcmp (name, ".idata$5") == 0)
5340 {
5341 align = 2;
5342 }
5343 else if (strcmp (name, ".idata$6") == 0)
5344 {
5345 align = 1;
5346 }
5347 else
99a814a1
AM		 5348 /* Default alignment to 16 byte boundary. */
5349 align = 4;
252b5132
RH		 5350
5351 if (*input_line_pointer == ',')
5352 {
5353 ++input_line_pointer;
5354 SKIP_WHITESPACE ();
5355 if (*input_line_pointer != '"')
5356 exp = get_absolute_expression ();
5357 else
5358 {
5359 ++input_line_pointer;
5360 while (*input_line_pointer != '"'
5361 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5362 {
5363 switch (*input_line_pointer)
5364 {
5365 /* Section Contents */
5366 case 'a': /* unknown */
d6ed37ed 5367 as_bad (_("unsupported section attribute -- 'a'"));
252b5132
RH		 5368 break;
5369 case 'c': /* code section */
81d4177b 5370 flags |= SEC_CODE;
252b5132
RH		 5371 break;
5372 case 'd': /* section has initialized data */
5373 flags |= SEC_DATA;
5374 break;
5375 case 'u': /* section has uninitialized data */
5376 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5377 in winnt.h */
5378 flags |= SEC_ROM;
5379 break;
5380 case 'i': /* section contains directives (info) */
5381 /* FIXME: This is IMAGE_SCN_LNK_INFO
5382 in winnt.h */
5383 flags |= SEC_HAS_CONTENTS;
5384 break;
5385 case 'n': /* section can be discarded */
81d4177b 5386 flags &=~ SEC_LOAD;
252b5132
RH		 5387 break;
5388 case 'R': /* Remove section at link time */
5389 flags |= SEC_NEVER_LOAD;
5390 break;
8d452c78 5391#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5392 /* Section Protection */
5393 case 'r': /* section is readable */
5394 flags |= IMAGE_SCN_MEM_READ;
5395 break;
5396 case 'w': /* section is writeable */
5397 flags |= IMAGE_SCN_MEM_WRITE;
5398 break;
5399 case 'x': /* section is executable */
5400 flags |= IMAGE_SCN_MEM_EXECUTE;
5401 break;
5402 case 's': /* section is sharable */
5403 flags |= IMAGE_SCN_MEM_SHARED;
5404 break;
5405
5406 /* Section Alignment */
5407 case '0': /* align to byte boundary */
5408 flags |= IMAGE_SCN_ALIGN_1BYTES;
5409 align = 0;
5410 break;
5411 case '1': /* align to halfword boundary */
5412 flags |= IMAGE_SCN_ALIGN_2BYTES;
5413 align = 1;
5414 break;
5415 case '2': /* align to word boundary */
5416 flags |= IMAGE_SCN_ALIGN_4BYTES;
5417 align = 2;
5418 break;
5419 case '3': /* align to doubleword boundary */
5420 flags |= IMAGE_SCN_ALIGN_8BYTES;
5421 align = 3;
5422 break;
5423 case '4': /* align to quadword boundary */
5424 flags |= IMAGE_SCN_ALIGN_16BYTES;
5425 align = 4;
5426 break;
5427 case '5': /* align to 32 byte boundary */
5428 flags |= IMAGE_SCN_ALIGN_32BYTES;
5429 align = 5;
5430 break;
5431 case '6': /* align to 64 byte boundary */
5432 flags |= IMAGE_SCN_ALIGN_64BYTES;
5433 align = 6;
5434 break;
8d452c78 5435#endif
252b5132 5436 default:
99a814a1
AM		 5437 as_bad (_("unknown section attribute '%c'"),
5438 *input_line_pointer);
252b5132
RH		 5439 break;
5440 }
5441 ++input_line_pointer;
5442 }
5443 if (*input_line_pointer == '"')
5444 ++input_line_pointer;
5445 }
5446 }
5447
5448 sec = subseg_new (name, (subsegT) exp);
5449
99a814a1 5450 ppc_set_current_section (sec);
252b5132
RH		 5451
5452 if (flags != SEC_NO_FLAGS)
5453 {
5454 if (! bfd_set_section_flags (stdoutput, sec, flags))
5455 as_bad (_("error setting flags for \"%s\": %s"),
5456 bfd_section_name (stdoutput, sec),
5457 bfd_errmsg (bfd_get_error ()));
5458 }
5459
99a814a1 5460 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5461}
5462
5463static void
98027b10 5464ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5465{
5466 char *name;
5467 char endc;
5468 symbolS *ext_sym;
5469
5470 name = input_line_pointer;
5471 endc = get_symbol_end ();
5472
5473 ext_sym = symbol_find_or_make (name);
5474
5475 *input_line_pointer = endc;
5476
5477 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5478 SF_SET_FUNCTION (ext_sym);
5479 SF_SET_PROCESS (ext_sym);
5480 coff_add_linesym (ext_sym);
5481
5482 demand_empty_rest_of_line ();
5483}
5484
5485static void
98027b10 5486ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5487{
5488 if (tocdata_section == 0)
5489 {
5490 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5491 /* FIXME: section flags won't work. */
252b5132
RH		 5492 bfd_set_section_flags (stdoutput, tocdata_section,
5493 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5494 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5495
5496 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5497 }
5498 else
5499 {
5500 rdata_section = subseg_new (".tocd", 0);
5501 }
5502
99a814a1 5503 ppc_set_current_section (tocdata_section);
252b5132
RH		 5504
5505 demand_empty_rest_of_line ();
5506}
5507
5508/* Don't adjust TOC relocs to use the section symbol. */
5509
5510int
98027b10 5511ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5512{
5513 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5514}
5515
5516#endif
5517\f
5518#ifdef OBJ_XCOFF
5519
5520/* XCOFF specific symbol and file handling. */
5521
5522/* Canonicalize the symbol name. We use the to force the suffix, if
5523 any, to use square brackets, and to be in upper case. */
5524
5525char *
98027b10 5526ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5527{
5528 char *s;
5529
5530 if (ppc_stab_symbol)
5531 return name;
5532
5533 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5534 ;
5535 if (*s != '\0')
5536 {
5537 char brac;
5538
5539 if (*s == '[')
5540 brac = ']';
5541 else
5542 {
5543 *s = '[';
5544 brac = '}';
5545 }
5546
5547 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5548 *s = TOUPPER (*s);
252b5132
RH		 5549
5550 if (*s == '\0' || s[1] != '\0')
5551 as_bad (_("bad symbol suffix"));
5552
5553 *s = ']';
5554 }
5555
5556 return name;
5557}
5558
5559/* Set the class of a symbol based on the suffix, if any. This is
5560 called whenever a new symbol is created. */
5561
5562void
98027b10 5563ppc_symbol_new_hook (symbolS *sym)
252b5132 5564{
809ffe0d 5565 struct ppc_tc_sy *tc;
252b5132
RH		 5566 const char *s;
5567
809ffe0d
ILT		 5568 tc = symbol_get_tc (sym);
5569 tc->next = NULL;
5570 tc->output = 0;
96d56e9f 5571 tc->symbol_class = -1;
809ffe0d
ILT		 5572 tc->real_name = NULL;
5573 tc->subseg = 0;
5574 tc->align = 0;
85645aed
TG		 5575 tc->u.size = NULL;
5576 tc->u.dw = NULL;
809ffe0d 5577 tc->within = NULL;
252b5132
RH		 5578
5579 if (ppc_stab_symbol)
5580 return;
5581
5582 s = strchr (S_GET_NAME (sym), '[');
5583 if (s == (const char *) NULL)
5584 {
5585 /* There is no suffix. */
5586 return;
5587 }
5588
5589 ++s;
5590
5591 switch (s[0])
5592 {
5593 case 'B':
5594 if (strcmp (s, "BS]") == 0)
96d56e9f 5595 tc->symbol_class = XMC_BS;
252b5132
RH		 5596 break;
5597 case 'D':
5598 if (strcmp (s, "DB]") == 0)
96d56e9f 5599 tc->symbol_class = XMC_DB;
252b5132 5600 else if (strcmp (s, "DS]") == 0)
96d56e9f 5601 tc->symbol_class = XMC_DS;
252b5132
RH		 5602 break;
5603 case 'G':
5604 if (strcmp (s, "GL]") == 0)
96d56e9f 5605 tc->symbol_class = XMC_GL;
252b5132
RH		 5606 break;
5607 case 'P':
5608 if (strcmp (s, "PR]") == 0)
96d56e9f 5609 tc->symbol_class = XMC_PR;
252b5132
RH		 5610 break;
5611 case 'R':
5612 if (strcmp (s, "RO]") == 0)
96d56e9f 5613 tc->symbol_class = XMC_RO;
252b5132 5614 else if (strcmp (s, "RW]") == 0)
96d56e9f 5615 tc->symbol_class = XMC_RW;
252b5132
RH		 5616 break;
5617 case 'S':
5618 if (strcmp (s, "SV]") == 0)
96d56e9f 5619 tc->symbol_class = XMC_SV;
252b5132
RH		 5620 break;
5621 case 'T':
5622 if (strcmp (s, "TC]") == 0)
96d56e9f 5623 tc->symbol_class = XMC_TC;
252b5132 5624 else if (strcmp (s, "TI]") == 0)
96d56e9f 5625 tc->symbol_class = XMC_TI;
252b5132 5626 else if (strcmp (s, "TB]") == 0)
96d56e9f 5627 tc->symbol_class = XMC_TB;
252b5132 5628 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5629 tc->symbol_class = XMC_TC0;
252b5132
RH		 5630 break;
5631 case 'U':
5632 if (strcmp (s, "UA]") == 0)
96d56e9f 5633 tc->symbol_class = XMC_UA;
252b5132 5634 else if (strcmp (s, "UC]") == 0)
96d56e9f 5635 tc->symbol_class = XMC_UC;
252b5132
RH		 5636 break;
5637 case 'X':
5638 if (strcmp (s, "XO]") == 0)
96d56e9f 5639 tc->symbol_class = XMC_XO;
252b5132
RH		 5640 break;
5641 }
5642
96d56e9f 5643 if (tc->symbol_class == -1)
d6ed37ed 5644 as_bad (_("unrecognized symbol suffix"));
252b5132
RH		 5645}
5646
5647/* Set the class of a label based on where it is defined. This
5648 handles symbols without suffixes. Also, move the symbol so that it
5649 follows the csect symbol. */
5650
5651void
98027b10 5652ppc_frob_label (symbolS *sym)
252b5132
RH		 5653{
5654 if (ppc_current_csect != (symbolS *) NULL)
5655 {
96d56e9f
NC		 5656 if (symbol_get_tc (sym)->symbol_class == -1)
5657 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5658
5659 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5660 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5661 &symbol_rootP, &symbol_lastP);
5662 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5663 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5664 }
07a53e5c
RH		 5665
5666#ifdef OBJ_ELF
5667 dwarf2_emit_label (sym);
5668#endif
252b5132
RH		 5669}
5670
5671/* This variable is set by ppc_frob_symbol if any absolute symbols are
5672 seen. It tells ppc_adjust_symtab whether it needs to look through
5673 the symbols. */
5674
b34976b6 5675static bfd_boolean ppc_saw_abs;
252b5132
RH		 5676
5677/* Change the name of a symbol just before writing it out. Set the
5678 real name if the .rename pseudo-op was used. Otherwise, remove any
5679 class suffix. Return 1 if the symbol should not be included in the
5680 symbol table. */
5681
5682int
98027b10 5683ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5684{
5685 static symbolS *ppc_last_function;
5686 static symbolS *set_end;
5687
5688 /* Discard symbols that should not be included in the output symbol
5689 table. */
809ffe0d
ILT		 5690 if (! symbol_used_in_reloc_p (sym)
5691 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5692 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5693 && ! symbol_get_tc (sym)->output
252b5132
RH		 5694 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5695 return 1;
5696
a161fe53
AM		 5697 /* This one will disappear anyway. Don't make a csect sym for it. */
5698 if (sym == abs_section_sym)
5699 return 1;
5700
809ffe0d
ILT		 5701 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5702 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5703 else
5704 {
5705 const char *name;
5706 const char *s;
5707
5708 name = S_GET_NAME (sym);
5709 s = strchr (name, '[');
5710 if (s != (char *) NULL)
5711 {
5712 unsigned int len;
5713 char *snew;
5714
5715 len = s - name;
5716 snew = xmalloc (len + 1);
5717 memcpy (snew, name, len);
5718 snew[len] = '\0';
5719
5720 S_SET_NAME (sym, snew);
5721 }
5722 }
5723
5724 if (set_end != (symbolS *) NULL)
5725 {
5726 SA_SET_SYM_ENDNDX (set_end, sym);
5727 set_end = NULL;
5728 }
5729
5730 if (SF_GET_FUNCTION (sym))
5731 {
5732 if (ppc_last_function != (symbolS *) NULL)
5733 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5734 ppc_last_function = sym;
85645aed 5735 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5736 {
85645aed 5737 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5738 SA_SET_SYM_FSIZE (sym,
85645aed 5739 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5740 }
5741 }
5742 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5743 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5744 {
5745 if (ppc_last_function == (symbolS *) NULL)
5746 as_bad (_(".ef with no preceding .function"));
5747 else
5748 {
5749 set_end = ppc_last_function;
5750 ppc_last_function = NULL;
5751
5752 /* We don't have a C_EFCN symbol, but we need to force the
5753 COFF backend to believe that it has seen one. */
5754 coff_last_function = NULL;
5755 }
5756 }
5757
670ec21d 5758 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5759 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5760 && S_GET_STORAGE_CLASS (sym) != C_FILE
5761 && S_GET_STORAGE_CLASS (sym) != C_FCN
5762 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5763 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5764 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5765 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5766 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5767 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5768 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5769
5770 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5771 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5772 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5773 {
5774 int i;
5775 union internal_auxent *a;
5776
5777 /* Create a csect aux. */
5778 i = S_GET_NUMBER_AUXILIARY (sym);
5779 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5780 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5781 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5782 {
5783 /* This is the TOC table. */
5784 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5785 a->x_csect.x_scnlen.l = 0;
5786 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5787 }
809ffe0d 5788 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5789 {
5790 /* This is a csect symbol. x_scnlen is the size of the
5791 csect. */
809ffe0d 5792 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5793 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5794 S_GET_SEGMENT (sym))
5795 - S_GET_VALUE (sym));
5796 else
5797 {
6386f3a7 5798 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5799 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5800 - S_GET_VALUE (sym));
5801 }
809ffe0d 5802 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5803 }
5804 else if (S_GET_SEGMENT (sym) == bss_section)
5805 {
5806 /* This is a common symbol. */
809ffe0d
ILT		 5807 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5808 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5809 if (S_IS_EXTERNAL (sym))
96d56e9f 5810 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5811 else
96d56e9f 5812 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5813 }
5814 else if (S_GET_SEGMENT (sym) == absolute_section)
5815 {
5816 /* This is an absolute symbol. The csect will be created by
99a814a1 5817 ppc_adjust_symtab. */
b34976b6 5818 ppc_saw_abs = TRUE;
252b5132 5819 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5820 if (symbol_get_tc (sym)->symbol_class == -1)
5821 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5822 }
5823 else if (! S_IS_DEFINED (sym))
5824 {
5825 /* This is an external symbol. */
5826 a->x_csect.x_scnlen.l = 0;
5827 a->x_csect.x_smtyp = XTY_ER;
5828 }
96d56e9f 5829 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5830 {
5831 symbolS *next;
5832
5833 /* This is a TOC definition. x_scnlen is the size of the
5834 TOC entry. */
5835 next = symbol_next (sym);
96d56e9f 5836 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5837 next = symbol_next (next);
5838 if (next == (symbolS *) NULL
96d56e9f 5839 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5840 {
5841 if (ppc_after_toc_frag == (fragS *) NULL)
5842 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5843 data_section)
5844 - S_GET_VALUE (sym));
5845 else
5846 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5847 - S_GET_VALUE (sym));
5848 }
5849 else
5850 {
6386f3a7 5851 resolve_symbol_value (next);
252b5132
RH		 5852 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5853 - S_GET_VALUE (sym));
5854 }
5855 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5856 }
5857 else
5858 {
5859 symbolS *csect;
5860
5861 /* This is a normal symbol definition. x_scnlen is the
5862 symbol index of the containing csect. */
5863 if (S_GET_SEGMENT (sym) == text_section)
5864 csect = ppc_text_csects;
5865 else if (S_GET_SEGMENT (sym) == data_section)
5866 csect = ppc_data_csects;
5867 else
5868 abort ();
5869
5870 /* Skip the initial dummy symbol. */
809ffe0d 5871 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5872
5873 if (csect == (symbolS *) NULL)
5874 {
5875 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5876 a->x_csect.x_scnlen.l = 0;
5877 }
5878 else
5879 {
809ffe0d 5880 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5881 {
6386f3a7 5882 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5883 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5884 > S_GET_VALUE (sym))
252b5132 5885 break;
809ffe0d 5886 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5887 }
5888
809ffe0d
ILT		 5889 a->x_csect.x_scnlen.p =
5890 coffsymbol (symbol_get_bfdsym (csect))->native;
5891 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5892 1;
252b5132
RH		 5893 }
5894 a->x_csect.x_smtyp = XTY_LD;
5895 }
81d4177b 5896
252b5132
RH		 5897 a->x_csect.x_parmhash = 0;
5898 a->x_csect.x_snhash = 0;
96d56e9f 5899 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5900 a->x_csect.x_smclas = XMC_PR;
5901 else
96d56e9f 5902 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5903 a->x_csect.x_stab = 0;
5904 a->x_csect.x_snstab = 0;
5905
5906 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5907 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5908 }
5909 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5910 {
5911 /* We want the value to be the symbol index of the referenced
5912 csect symbol. BFD will do that for us if we set the right
5913 flags. */
b782de16
AM		 5914 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5915 combined_entry_type *c = coffsymbol (bsym)->native;
5916
5917 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5918 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5919 }
5920 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5921 {
5922 symbolS *block;
c734e7e3 5923 valueT base;
252b5132 5924
809ffe0d 5925 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5926 if (block)
5927 {
5928 /* The value is the offset from the enclosing csect. */
5929 symbolS *csect;
5930
5931 csect = symbol_get_tc (block)->within;
5932 resolve_symbol_value (csect);
5933 base = S_GET_VALUE (csect);
5934 }
5935 else
5936 base = 0;
5937
5938 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 5939 }
5940 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5941 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5942 {
5943 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5944 BFD will do that for us if we set the right flags. We have
5945 already set the value correctly. */
809ffe0d 5946 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5947 }
5948
5949 return 0;
5950}
5951
5952/* Adjust the symbol table. This creates csect symbols for all
5953 absolute symbols. */
5954
5955void
98027b10 5956ppc_adjust_symtab (void)
252b5132
RH		 5957{
5958 symbolS *sym;
5959
5960 if (! ppc_saw_abs)
5961 return;
5962
5963 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5964 {
5965 symbolS *csect;
5966 int i;
5967 union internal_auxent *a;
5968
5969 if (S_GET_SEGMENT (sym) != absolute_section)
5970 continue;
5971
5972 csect = symbol_create (".abs[XO]", absolute_section,
5973 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5974 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5975 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5976 i = S_GET_NUMBER_AUXILIARY (csect);
5977 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5978 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5979 a->x_csect.x_scnlen.l = 0;
5980 a->x_csect.x_smtyp = XTY_SD;
5981 a->x_csect.x_parmhash = 0;
5982 a->x_csect.x_snhash = 0;
5983 a->x_csect.x_smclas = XMC_XO;
5984 a->x_csect.x_stab = 0;
5985 a->x_csect.x_snstab = 0;
5986
5987 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5988
5989 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5990 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5991 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5992 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5993 }
5994
b34976b6 5995 ppc_saw_abs = FALSE;
252b5132
RH		 5996}
5997
5998/* Set the VMA for a section. This is called on all the sections in
5999 turn. */
6000
6001void
98027b10 6002ppc_frob_section (asection *sec)
252b5132 6003{
931e13a6 6004 static bfd_vma vma = 0;
252b5132 6005
85645aed
TG		 6006 /* Dwarf sections start at 0. */
6007 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6008 return;
6009
931e13a6 6010 vma = md_section_align (sec, vma);
252b5132
RH		 6011 bfd_set_section_vma (stdoutput, sec, vma);
6012 vma += bfd_section_size (stdoutput, sec);
6013}
6014
6015#endif /* OBJ_XCOFF */
6016\f
252b5132 6017char *
98027b10 6018md_atof (int type, char *litp, int *sizep)
252b5132 6019{
499ac353 6020 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 6021}
6022
6023/* Write a value out to the object file, using the appropriate
6024 endianness. */
6025
6026void
98027b10 6027md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 6028{
6029 if (target_big_endian)
6030 number_to_chars_bigendian (buf, val, n);
6031 else
6032 number_to_chars_littleendian (buf, val, n);
6033}
6034
6035/* Align a section (I don't know why this is machine dependent). */
6036
6037valueT
3aeeedbb 6038md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 6039{
3aeeedbb
AM		 6040#ifdef OBJ_ELF
6041 return addr;
6042#else
252b5132
RH		 6043 int align = bfd_get_section_alignment (stdoutput, seg);
6044
6045 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 6046#endif
252b5132
RH		 6047}
6048
6049/* We don't have any form of relaxing. */
6050
6051int
98027b10
AM		 6052md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6053 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 6054{
6055 abort ();
6056 return 0;
6057}
6058
6059/* Convert a machine dependent frag. We never generate these. */
6060
6061void
98027b10
AM		 6062md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6063 asection *sec ATTRIBUTE_UNUSED,
6064 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 6065{
6066 abort ();
6067}
6068
6069/* We have no need to default values of symbols. */
6070
252b5132 6071symbolS *
98027b10 6072md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 6073{
6074 return 0;
6075}
6076\f
6077/* Functions concerning relocs. */
6078
6079/* The location from which a PC relative jump should be calculated,
6080 given a PC relative reloc. */
6081
6082long
98027b10 6083md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 6084{
6085 return fixp->fx_frag->fr_address + fixp->fx_where;
6086}
6087
6088#ifdef OBJ_XCOFF
6089
6090/* This is called to see whether a fixup should be adjusted to use a
6091 section symbol. We take the opportunity to change a fixup against
6092 a symbol in the TOC subsegment into a reloc against the
6093 corresponding .tc symbol. */
6094
6095int
98027b10 6096ppc_fix_adjustable (fixS *fix)
252b5132 6097{
b782de16
AM		 6098 valueT val = resolve_symbol_value (fix->fx_addsy);
6099 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6100 TC_SYMFIELD_TYPE *tc;
6101
6102 if (symseg == absolute_section)
6103 return 0;
252b5132 6104
85645aed
TG		 6105 /* Always adjust symbols in debugging sections. */
6106 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6107 return 1;
6108
252b5132 6109 if (ppc_toc_csect != (symbolS *) NULL
252b5132 6110 && fix->fx_addsy != ppc_toc_csect
b782de16 6111 && symseg == data_section
252b5132
RH		 6112 && val >= ppc_toc_frag->fr_address
6113 && (ppc_after_toc_frag == (fragS *) NULL
6114 || val < ppc_after_toc_frag->fr_address))
6115 {
6116 symbolS *sy;
6117
6118 for (sy = symbol_next (ppc_toc_csect);
6119 sy != (symbolS *) NULL;
6120 sy = symbol_next (sy))
6121 {
b782de16
AM		 6122 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6123
96d56e9f 6124 if (sy_tc->symbol_class == XMC_TC0)
252b5132 6125 continue;
96d56e9f 6126 if (sy_tc->symbol_class != XMC_TC)
252b5132 6127 break;
b782de16 6128 if (val == resolve_symbol_value (sy))
252b5132
RH		 6129 {
6130 fix->fx_addsy = sy;
6131 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6132 return 0;
6133 }
6134 }
6135
6136 as_bad_where (fix->fx_file, fix->fx_line,
6137 _("symbol in .toc does not match any .tc"));
6138 }
6139
6140 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 6141 tc = symbol_get_tc (fix->fx_addsy);
6142 if (tc->subseg == 0
96d56e9f
NC		 6143 && tc->symbol_class != XMC_TC0
6144 && tc->symbol_class != XMC_TC
b782de16 6145 && symseg != bss_section
252b5132 6146 /* Don't adjust if this is a reloc in the toc section. */
b782de16 6147 && (symseg != data_section
252b5132
RH		 6148 || ppc_toc_csect == NULL
6149 || val < ppc_toc_frag->fr_address
6150 || (ppc_after_toc_frag != NULL
6151 && val >= ppc_after_toc_frag->fr_address)))
6152 {
2fb4b302 6153 symbolS *csect = tc->within;
252b5132 6154
2fb4b302
TG		 6155 /* If the symbol was not declared by a label (eg: a section symbol),
6156 use the section instead of the csect. This doesn't happen in
6157 normal AIX assembly code. */
6158 if (csect == NULL)
6159 csect = seg_info (symseg)->sym;
252b5132 6160
2fb4b302
TG		 6161 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6162 fix->fx_addsy = csect;
252b5132 6163
b782de16 6164 return 0;
252b5132
RH		 6165 }
6166
6167 /* Adjust a reloc against a .lcomm symbol to be against the base
6168 .lcomm. */
b782de16 6169 if (symseg == bss_section
252b5132
RH		 6170 && ! S_IS_EXTERNAL (fix->fx_addsy))
6171 {
b782de16
AM		 6172 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6173
6174 fix->fx_offset += val - resolve_symbol_value (sy);
6175 fix->fx_addsy = sy;
252b5132
RH		 6176 }
6177
6178 return 0;
6179}
6180
6181/* A reloc from one csect to another must be kept. The assembler
6182 will, of course, keep relocs between sections, and it will keep
6183 absolute relocs, but we need to force it to keep PC relative relocs
6184 between two csects in the same section. */
6185
6186int
98027b10 6187ppc_force_relocation (fixS *fix)
252b5132
RH		 6188{
6189 /* At this point fix->fx_addsy should already have been converted to
6190 a csect symbol. If the csect does not include the fragment, then
6191 we need to force the relocation. */
6192 if (fix->fx_pcrel
6193 && fix->fx_addsy != NULL
809ffe0d
ILT		 6194 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6195 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6196 > fix->fx_frag->fr_address)
6197 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6198 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 6199 <= fix->fx_frag->fr_address))))
6200 return 1;
6201
ae6063d4 6202 return generic_force_reloc (fix);
252b5132
RH		 6203}
6204
2fb4b302
TG		 6205void
6206ppc_new_dot_label (symbolS *sym)
6207{
6208 /* Anchor this label to the current csect for relocations. */
6209 symbol_get_tc (sym)->within = ppc_current_csect;
6210}
6211
252b5132
RH		 6212#endif /* OBJ_XCOFF */
6213
0baf16f2 6214#ifdef OBJ_ELF
a161fe53
AM		 6215/* If this function returns non-zero, it guarantees that a relocation
6216 will be emitted for a fixup. */
6217
6218int
98027b10 6219ppc_force_relocation (fixS *fix)
a161fe53
AM		 6220{
6221 /* Branch prediction relocations must force a relocation, as must
6222 the vtable description relocs. */
6223 switch (fix->fx_r_type)
6224 {
6225 case BFD_RELOC_PPC_B16_BRTAKEN:
6226 case BFD_RELOC_PPC_B16_BRNTAKEN:
6227 case BFD_RELOC_PPC_BA16_BRTAKEN:
6228 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 6229 case BFD_RELOC_24_PLT_PCREL:
a161fe53 6230 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 6231 return 1;
6232 default:
6233 break;
6234 }
6235
cdba85ec
AM		 6236 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6237 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6238 return 1;
6239
ae6063d4 6240 return generic_force_reloc (fix);
a161fe53
AM		 6241}
6242
0baf16f2 6243int
98027b10 6244ppc_fix_adjustable (fixS *fix)
252b5132 6245{
0baf16f2
AM		 6246 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6247 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6248 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6249 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 6250 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6251 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 6252 && fix->fx_r_type != BFD_RELOC_GPREL16
6253 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6254 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 6255 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 6256 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 6257}
0baf16f2 6258#endif
252b5132 6259
b9c361e0
JL		 6260void
6261ppc_frag_check (struct frag *fragP)
6262{
6263 if (!fragP->has_code)
6264 return;
6265
6266 if (ppc_mach() == bfd_mach_ppc_vle)
6267 {
6268 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6269 as_bad (_("instruction address is not a multiple of 2"));
6270 }
6271 else
6272 {
6273 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6274 as_bad (_("instruction address is not a multiple of 4"));
6275 }
6276}
6277
3aeeedbb
AM		 6278/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6279 rs_align_code frag. */
6280
6281void
6282ppc_handle_align (struct frag *fragP)
6283{
6284 valueT count = (fragP->fr_next->fr_address
6285 - (fragP->fr_address + fragP->fr_fix));
6286
b9c361e0
JL		 6287 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6288 {
6289 char *dest = fragP->fr_literal + fragP->fr_fix;
6290
6291 fragP->fr_var = 2;
6292 md_number_to_chars (dest, 0x4400, 2);
6293 }
6294 else if (count != 0 && (count & 3) == 0)
3aeeedbb
AM		 6295 {
6296 char *dest = fragP->fr_literal + fragP->fr_fix;
6297
6298 fragP->fr_var = 4;
cef4f754
AM		 6299
6300 if (count > 4 * nop_limit && count < 0x2000000)
6301 {
6302 struct frag *rest;
6303
6304 /* Make a branch, then follow with nops. Insert another
6305 frag to handle the nops. */
6306 md_number_to_chars (dest, 0x48000000 + count, 4);
6307 count -= 4;
6308 if (count == 0)
6309 return;
6310
6311 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6312 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6313 fragP->fr_next = rest;
6314 fragP = rest;
6315 rest->fr_address += rest->fr_fix + 4;
6316 rest->fr_fix = 0;
6317 /* If we leave the next frag as rs_align_code we'll come here
6318 again, resulting in a bunch of branches rather than a
6319 branch followed by nops. */
6320 rest->fr_type = rs_align;
6321 dest = rest->fr_literal;
6322 }
6323
3aeeedbb
AM		 6324 md_number_to_chars (dest, 0x60000000, 4);
6325
42240548 6326 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5817ffd1
PB		 6327 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6328 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
3aeeedbb 6329 {
5817ffd1 6330 /* For power6, power7 and power8, we want the last nop to be a group
42240548
PB		 6331 terminating one. Do this by inserting an rs_fill frag immediately
6332 after this one, with its address set to the last nop location.
6333 This will automatically reduce the number of nops in the current
6334 frag by one. */
3aeeedbb
AM		 6335 if (count > 4)
6336 {
6337 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6338
6339 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6340 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6341 group_nop->fr_fix = 0;
6342 group_nop->fr_offset = 1;
6343 group_nop->fr_type = rs_fill;
6344 fragP->fr_next = group_nop;
6345 dest = group_nop->fr_literal;
6346 }
6347
5817ffd1
PB		 6348 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6349 || (ppc_cpu & PPC_OPCODE_POWER8) != 0)
aea77599
AM		 6350 {
6351 if (ppc_cpu & PPC_OPCODE_E500MC)
6352 /* e500mc group terminating nop: "ori 0,0,0". */
6353 md_number_to_chars (dest, 0x60000000, 4);
6354 else
5817ffd1 6355 /* power7/power8 group terminating nop: "ori 2,2,0". */
aea77599
AM		 6356 md_number_to_chars (dest, 0x60420000, 4);
6357 }
42240548
PB		 6358 else
6359 /* power6 group terminating nop: "ori 1,1,0". */
6360 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6361 }
6362 }
6363}
6364
252b5132 6365/* Apply a fixup to the object code. This is called for all the
3b8b57a9 6366 fixups we generated by the calls to fix_new_exp, above. */
252b5132 6367
94f592af 6368void
98027b10 6369md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 6370{
94f592af 6371 valueT value = * valP;
5656a981
AM		 6372 offsetT fieldval;
6373 const struct powerpc_operand *operand;
252b5132
RH		 6374
6375#ifdef OBJ_ELF
94f592af 6376 if (fixP->fx_addsy != NULL)
252b5132 6377 {
a161fe53 6378 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6379 if (fixP->fx_pcrel)
6380 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 6381 }
6382 else
94f592af 6383 fixP->fx_done = 1;
252b5132 6384#else
a161fe53 6385 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6386 the symbol values. If we are doing this relocation the code in
6387 write.c is going to call bfd_install_relocation, which is also
6388 going to use the symbol value. That means that if the reloc is
6389 fully resolved we want to use *valP since bfd_install_relocation is
6390 not being used.
9f0eb232
RS		 6391 However, if the reloc is not fully resolved we do not want to
6392 use *valP, and must use fx_offset instead. If the relocation
6393 is PC-relative, we then need to re-apply md_pcrel_from_section
6394 to this new relocation value. */
94f592af
NC		 6395 if (fixP->fx_addsy == (symbolS *) NULL)
6396 fixP->fx_done = 1;
6397
252b5132 6398 else
9f0eb232
RS		 6399 {
6400 value = fixP->fx_offset;
6401 if (fixP->fx_pcrel)
6402 value -= md_pcrel_from_section (fixP, seg);
6403 }
a161fe53
AM		 6404#endif
6405
6406 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6407 {
a161fe53
AM		 6408 /* We can't actually support subtracting a symbol. */
6409 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6410 }
252b5132 6411
5656a981 6412 operand = NULL;
3b8b57a9 6413 if (fixP->fx_pcrel_adjust != 0)
252b5132 6414 {
5656a981 6415 /* This is a fixup on an instruction. */
3b8b57a9 6416 int opindex = fixP->fx_pcrel_adjust & 0xff;
252b5132 6417
5656a981 6418 operand = &powerpc_operands[opindex];
252b5132 6419#ifdef OBJ_XCOFF
0baf16f2
AM		 6420 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6421 does not generate a reloc. It uses the offset of `sym' within its
6422 csect. Other usages, such as `.long sym', generate relocs. This
6423 is the documented behaviour of non-TOC symbols. */
252b5132 6424 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6425 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6426 && operand->shift == 0
2b3c4602 6427 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6428 && fixP->fx_addsy != NULL
6429 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6430 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6431 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6432 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6433 {
94f592af
NC		 6434 value = fixP->fx_offset;
6435 fixP->fx_done = 1;
252b5132 6436 }
ac21e7da
TG		 6437
6438 /* During parsing of instructions, a TOC16 reloc is generated for
6439 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6440 in the toc. But at parse time, SYM may be not yet defined, so
6441 check again here. */
6442 if (fixP->fx_r_type == BFD_RELOC_16
6443 && fixP->fx_addsy != NULL
6444 && ppc_is_toc_sym (fixP->fx_addsy))
6445 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
252b5132 6446#endif
5656a981
AM		 6447 }
6448
6449 /* Calculate value to be stored in field. */
6450 fieldval = value;
6451 switch (fixP->fx_r_type)
6452 {
1ec2d25e 6453#ifdef OBJ_ELF
5656a981
AM		 6454 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6455 case BFD_RELOC_PPC_VLE_LO16A:
6456 case BFD_RELOC_PPC_VLE_LO16D:
1ec2d25e 6457#endif
5656a981
AM		 6458 case BFD_RELOC_LO16:
6459 case BFD_RELOC_LO16_PCREL:
6460 fieldval = value & 0xffff;
6461 sign_extend_16:
6462 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
f9c6b907 6463 fieldval = SEX16 (fieldval);
5656a981
AM		 6464 fixP->fx_no_overflow = 1;
6465 break;
3c9d25f4 6466
f9c6b907
AM		 6467 case BFD_RELOC_HI16:
6468 case BFD_RELOC_HI16_PCREL:
5656a981 6469#ifdef OBJ_ELF
f9c6b907
AM		 6470 if (REPORT_OVERFLOW_HI && ppc_obj64)
6471 {
6472 fieldval = value >> 16;
6473 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6474 {
6475 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6476 fieldval = ((valueT) fieldval ^ sign) - sign;
6477 }
6478 break;
6479 }
6480 /* Fall thru */
6481
5656a981
AM		 6482 case BFD_RELOC_PPC_VLE_HI16A:
6483 case BFD_RELOC_PPC_VLE_HI16D:
f9c6b907 6484 case BFD_RELOC_PPC64_ADDR16_HIGH:
5656a981 6485#endif
5656a981
AM		 6486 fieldval = PPC_HI (value);
6487 goto sign_extend_16;
0baf16f2 6488
f9c6b907
AM		 6489 case BFD_RELOC_HI16_S:
6490 case BFD_RELOC_HI16_S_PCREL:
5656a981 6491#ifdef OBJ_ELF
f9c6b907
AM		 6492 if (REPORT_OVERFLOW_HI && ppc_obj64)
6493 {
6494 fieldval = (value + 0x8000) >> 16;
6495 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6496 {
6497 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6498 fieldval = ((valueT) fieldval ^ sign) - sign;
6499 }
6500 break;
6501 }
6502 /* Fall thru */
6503
5656a981
AM		 6504 case BFD_RELOC_PPC_VLE_HA16A:
6505 case BFD_RELOC_PPC_VLE_HA16D:
f9c6b907 6506 case BFD_RELOC_PPC64_ADDR16_HIGHA:
5656a981 6507#endif
5656a981
AM		 6508 fieldval = PPC_HA (value);
6509 goto sign_extend_16;
0baf16f2 6510
3b8b57a9 6511#ifdef OBJ_ELF
5656a981
AM		 6512 case BFD_RELOC_PPC64_HIGHER:
6513 fieldval = PPC_HIGHER (value);
6514 goto sign_extend_16;
252b5132 6515
5656a981
AM		 6516 case BFD_RELOC_PPC64_HIGHER_S:
6517 fieldval = PPC_HIGHERA (value);
6518 goto sign_extend_16;
0baf16f2 6519
5656a981
AM		 6520 case BFD_RELOC_PPC64_HIGHEST:
6521 fieldval = PPC_HIGHEST (value);
6522 goto sign_extend_16;
0baf16f2 6523
5656a981
AM		 6524 case BFD_RELOC_PPC64_HIGHEST_S:
6525 fieldval = PPC_HIGHESTA (value);
6526 goto sign_extend_16;
6527#endif
6528
6529 default:
6530 break;
6531 }
6532
6533 if (operand != NULL)
6534 {
6535 /* Handle relocs in an insn. */
6536 char *where;
6537 unsigned long insn;
0baf16f2 6538
5656a981
AM		 6539 switch (fixP->fx_r_type)
6540 {
7fa9fcb6 6541#ifdef OBJ_ELF
3b8b57a9
AM		 6542 /* The following relocs can't be calculated by the assembler.
6543 Leave the field zero. */
cdba85ec
AM		 6544 case BFD_RELOC_PPC_TPREL16:
6545 case BFD_RELOC_PPC_TPREL16_LO:
6546 case BFD_RELOC_PPC_TPREL16_HI:
6547 case BFD_RELOC_PPC_TPREL16_HA:
cdba85ec
AM		 6548 case BFD_RELOC_PPC_DTPREL16:
6549 case BFD_RELOC_PPC_DTPREL16_LO:
6550 case BFD_RELOC_PPC_DTPREL16_HI:
6551 case BFD_RELOC_PPC_DTPREL16_HA:
cdba85ec
AM		 6552 case BFD_RELOC_PPC_GOT_TLSGD16:
6553 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6554 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6555 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6556 case BFD_RELOC_PPC_GOT_TLSLD16:
6557 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6558 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6559 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6560 case BFD_RELOC_PPC_GOT_TPREL16:
6561 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6562 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6563 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6564 case BFD_RELOC_PPC_GOT_DTPREL16:
6565 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6566 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6567 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6568 case BFD_RELOC_PPC64_TPREL16_DS:
6569 case BFD_RELOC_PPC64_TPREL16_LO_DS:
f9c6b907
AM		 6570 case BFD_RELOC_PPC64_TPREL16_HIGH:
6571 case BFD_RELOC_PPC64_TPREL16_HIGHA:
cdba85ec
AM		 6572 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6573 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6574 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6575 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
f9c6b907
AM		 6576 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6577 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
cdba85ec
AM		 6578 case BFD_RELOC_PPC64_DTPREL16_DS:
6579 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6580 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6581 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6582 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6583 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
3b8b57a9 6584 gas_assert (fixP->fx_addsy != NULL);
7c1d0959 6585 S_SET_THREAD_LOCAL (fixP->fx_addsy);
3b8b57a9 6586 fieldval = 0;
cdba85ec 6587 break;
3b8b57a9
AM		 6588
6589 /* These also should leave the field zero for the same
6590 reason. Note that older versions of gas wrote values
6591 here. If we want to go back to the old behaviour, then
6592 all _LO and _LO_DS cases will need to be treated like
6593 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6594 case BFD_RELOC_16_GOTOFF:
6595 case BFD_RELOC_LO16_GOTOFF:
6596 case BFD_RELOC_HI16_GOTOFF:
6597 case BFD_RELOC_HI16_S_GOTOFF:
6598 case BFD_RELOC_LO16_PLTOFF:
6599 case BFD_RELOC_HI16_PLTOFF:
6600 case BFD_RELOC_HI16_S_PLTOFF:
6601 case BFD_RELOC_GPREL16:
6602 case BFD_RELOC_16_BASEREL:
6603 case BFD_RELOC_LO16_BASEREL:
6604 case BFD_RELOC_HI16_BASEREL:
6605 case BFD_RELOC_HI16_S_BASEREL:
6606 case BFD_RELOC_PPC_TOC16:
6607 case BFD_RELOC_PPC64_TOC16_LO:
6608 case BFD_RELOC_PPC64_TOC16_HI:
6609 case BFD_RELOC_PPC64_TOC16_HA:
6610 case BFD_RELOC_PPC64_PLTGOT16:
6611 case BFD_RELOC_PPC64_PLTGOT16_LO:
6612 case BFD_RELOC_PPC64_PLTGOT16_HI:
6613 case BFD_RELOC_PPC64_PLTGOT16_HA:
6614 case BFD_RELOC_PPC64_GOT16_DS:
6615 case BFD_RELOC_PPC64_GOT16_LO_DS:
6616 case BFD_RELOC_PPC64_PLT16_LO_DS:
6617 case BFD_RELOC_PPC64_SECTOFF_DS:
6618 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6619 case BFD_RELOC_PPC64_TOC16_DS:
6620 case BFD_RELOC_PPC64_TOC16_LO_DS:
6621 case BFD_RELOC_PPC64_PLTGOT16_DS:
6622 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6623 case BFD_RELOC_PPC_EMB_NADDR16:
6624 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6625 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6626 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6627 case BFD_RELOC_PPC_EMB_SDAI16:
6628 case BFD_RELOC_PPC_EMB_SDA2I16:
6629 case BFD_RELOC_PPC_EMB_SDA2REL:
252b5132 6630 case BFD_RELOC_PPC_EMB_SDA21:
3b8b57a9
AM		 6631 case BFD_RELOC_PPC_EMB_MRKREF:
6632 case BFD_RELOC_PPC_EMB_RELSEC16:
6633 case BFD_RELOC_PPC_EMB_RELST_LO:
6634 case BFD_RELOC_PPC_EMB_RELST_HI:
6635 case BFD_RELOC_PPC_EMB_RELST_HA:
6636 case BFD_RELOC_PPC_EMB_BIT_FLD:
6637 case BFD_RELOC_PPC_EMB_RELSDA:
6638 case BFD_RELOC_PPC_VLE_SDA21:
6639 case BFD_RELOC_PPC_VLE_SDA21_LO:
6640 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6641 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6642 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6643 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6644 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6645 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6646 gas_assert (fixP->fx_addsy != NULL);
6647 /* Fall thru */
6648
6649 case BFD_RELOC_PPC_TLS:
6650 case BFD_RELOC_PPC_TLSGD:
6651 case BFD_RELOC_PPC_TLSLD:
6652 fieldval = 0;
3b8b57a9 6653 break;
7fa9fcb6
TG		 6654#endif
6655
6656#ifdef OBJ_XCOFF
6657 case BFD_RELOC_PPC_B16:
6658 /* Adjust the offset to the instruction boundary. */
6659 fieldval += 2;
6660 break;
6661#endif
252b5132 6662
3b8b57a9 6663 default:
252b5132 6664 break;
3b8b57a9 6665 }
252b5132 6666
3b8b57a9
AM		 6667#ifdef OBJ_ELF
6668/* powerpc uses RELA style relocs, so if emitting a reloc the field
6669 contents can stay at zero. */
6670#define APPLY_RELOC fixP->fx_done
6671#else
6672#define APPLY_RELOC 1
6673#endif
6674 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6675 {
6676 /* Fetch the instruction, insert the fully resolved operand
6677 value, and stuff the instruction back again. */
6678 where = fixP->fx_frag->fr_literal + fixP->fx_where;
6679 if (target_big_endian)
31a91399 6680 {
3b8b57a9
AM		 6681 if (fixP->fx_size == 4)
6682 insn = bfd_getb32 ((unsigned char *) where);
31a91399 6683 else
3b8b57a9 6684 insn = bfd_getb16 ((unsigned char *) where);
31a91399
NC		 6685 }
6686 else
3b8b57a9
AM		 6687 {
6688 if (fixP->fx_size == 4)
6689 insn = bfd_getl32 ((unsigned char *) where);
6690 else
6691 insn = bfd_getl16 ((unsigned char *) where);
6692 }
6693 insn = ppc_insert_operand (insn, operand, fieldval,
6694 fixP->tc_fix_data.ppc_cpu,
6695 fixP->fx_file, fixP->fx_line);
6696 if (target_big_endian)
6697 {
6698 if (fixP->fx_size == 4)
6699 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6700 else
6701 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where);
6702 }
6703 else
6704 {
6705 if (fixP->fx_size == 4)
6706 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6707 else
6708 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where);
6709 }
6710 }
6711
6712 if (fixP->fx_done)
6713 /* Nothing else to do here. */
6714 return;
6715
6716 gas_assert (fixP->fx_addsy != NULL);
6717 if (fixP->fx_r_type == BFD_RELOC_UNUSED)
6718 {
6719 char *sfile;
6720 unsigned int sline;
6721
6722 /* Use expr_symbol_where to see if this is an expression
6723 symbol. */
6724 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6725 as_bad_where (fixP->fx_file, fixP->fx_line,
6726 _("unresolved expression that must be resolved"));
6727 else
6728 as_bad_where (fixP->fx_file, fixP->fx_line,
6729 _("unsupported relocation against %s"),
6730 S_GET_NAME (fixP->fx_addsy));
6731 fixP->fx_done = 1;
6732 return;
6733 }
6734 }
6735 else
6736 {
6737 /* Handle relocs in data. */
6738 switch (fixP->fx_r_type)
6739 {
252b5132 6740 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6741 if (fixP->fx_addsy
6742 && !S_IS_DEFINED (fixP->fx_addsy)
6743 && !S_IS_WEAK (fixP->fx_addsy))
6744 S_SET_WEAK (fixP->fx_addsy);
3b8b57a9 6745 /* Fall thru */
252b5132
RH		 6746
6747 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6748 fixP->fx_done = 0;
252b5132
RH		 6749 break;
6750
0baf16f2 6751#ifdef OBJ_ELF
3b8b57a9
AM		 6752 /* These can appear with @l etc. in data. */
6753 case BFD_RELOC_LO16:
3b8b57a9 6754 case BFD_RELOC_LO16_PCREL:
3b8b57a9 6755 case BFD_RELOC_HI16:
3b8b57a9 6756 case BFD_RELOC_HI16_PCREL:
3b8b57a9 6757 case BFD_RELOC_HI16_S:
3b8b57a9 6758 case BFD_RELOC_HI16_S_PCREL:
3b8b57a9 6759 case BFD_RELOC_PPC64_HIGHER:
3b8b57a9 6760 case BFD_RELOC_PPC64_HIGHER_S:
3b8b57a9 6761 case BFD_RELOC_PPC64_HIGHEST:
3b8b57a9 6762 case BFD_RELOC_PPC64_HIGHEST_S:
f9c6b907
AM		 6763 case BFD_RELOC_PPC64_ADDR16_HIGH:
6764 case BFD_RELOC_PPC64_ADDR16_HIGHA:
3b8b57a9
AM		 6765 break;
6766
6767 case BFD_RELOC_PPC_DTPMOD:
6768 case BFD_RELOC_PPC_TPREL:
6769 case BFD_RELOC_PPC_DTPREL:
6770 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6771 break;
6772
6773 /* Just punt all of these to the linker. */
6774 case BFD_RELOC_PPC_B16_BRTAKEN:
6775 case BFD_RELOC_PPC_B16_BRNTAKEN:
6776 case BFD_RELOC_16_GOTOFF:
6777 case BFD_RELOC_LO16_GOTOFF:
6778 case BFD_RELOC_HI16_GOTOFF:
6779 case BFD_RELOC_HI16_S_GOTOFF:
6780 case BFD_RELOC_LO16_PLTOFF:
6781 case BFD_RELOC_HI16_PLTOFF:
6782 case BFD_RELOC_HI16_S_PLTOFF:
6783 case BFD_RELOC_PPC_COPY:
6784 case BFD_RELOC_PPC_GLOB_DAT:
6785 case BFD_RELOC_16_BASEREL:
6786 case BFD_RELOC_LO16_BASEREL:
6787 case BFD_RELOC_HI16_BASEREL:
6788 case BFD_RELOC_HI16_S_BASEREL:
6789 case BFD_RELOC_PPC_TLS:
6790 case BFD_RELOC_PPC_DTPREL16_LO:
6791 case BFD_RELOC_PPC_DTPREL16_HI:
6792 case BFD_RELOC_PPC_DTPREL16_HA:
6793 case BFD_RELOC_PPC_TPREL16_LO:
6794 case BFD_RELOC_PPC_TPREL16_HI:
6795 case BFD_RELOC_PPC_TPREL16_HA:
6796 case BFD_RELOC_PPC_GOT_TLSGD16:
6797 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6798 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6799 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6800 case BFD_RELOC_PPC_GOT_TLSLD16:
6801 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6802 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6803 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6804 case BFD_RELOC_PPC_GOT_DTPREL16:
6805 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6806 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6807 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6808 case BFD_RELOC_PPC_GOT_TPREL16:
6809 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6810 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6811 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6812 case BFD_RELOC_24_PLT_PCREL:
6813 case BFD_RELOC_PPC_LOCAL24PC:
6814 case BFD_RELOC_32_PLT_PCREL:
6815 case BFD_RELOC_GPREL16:
6816 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6817 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6818 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6819 case BFD_RELOC_PPC_EMB_NADDR32:
6820 case BFD_RELOC_PPC_EMB_NADDR16:
6821 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6822 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6823 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6824 case BFD_RELOC_PPC_EMB_SDAI16:
6825 case BFD_RELOC_PPC_EMB_SDA2REL:
6826 case BFD_RELOC_PPC_EMB_SDA2I16:
6827 case BFD_RELOC_PPC_EMB_SDA21:
6828 case BFD_RELOC_PPC_VLE_SDA21_LO:
6829 case BFD_RELOC_PPC_EMB_MRKREF:
6830 case BFD_RELOC_PPC_EMB_RELSEC16:
6831 case BFD_RELOC_PPC_EMB_RELST_LO:
6832 case BFD_RELOC_PPC_EMB_RELST_HI:
6833 case BFD_RELOC_PPC_EMB_RELST_HA:
6834 case BFD_RELOC_PPC_EMB_BIT_FLD:
6835 case BFD_RELOC_PPC_EMB_RELSDA:
0baf16f2 6836 case BFD_RELOC_PPC64_TOC:
3b8b57a9
AM		 6837 case BFD_RELOC_PPC_TOC16:
6838 case BFD_RELOC_PPC64_TOC16_LO:
6839 case BFD_RELOC_PPC64_TOC16_HI:
6840 case BFD_RELOC_PPC64_TOC16_HA:
f9c6b907
AM		 6841 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6842 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
3b8b57a9
AM		 6843 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6844 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6845 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6846 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
f9c6b907
AM		 6847 case BFD_RELOC_PPC64_TPREL16_HIGH:
6848 case BFD_RELOC_PPC64_TPREL16_HIGHA:
3b8b57a9
AM		 6849 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6850 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6851 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6852 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
94f592af 6853 fixP->fx_done = 0;
0baf16f2 6854 break;
0baf16f2 6855#endif
3b8b57a9
AM		 6856
6857#ifdef OBJ_XCOFF
6858 case BFD_RELOC_NONE:
3b8b57a9 6859#endif
5656a981
AM		 6860 case BFD_RELOC_CTOR:
6861 case BFD_RELOC_32:
6862 case BFD_RELOC_32_PCREL:
6863 case BFD_RELOC_RVA:
6864 case BFD_RELOC_64:
6865 case BFD_RELOC_64_PCREL:
6866 case BFD_RELOC_16:
6867 case BFD_RELOC_16_PCREL:
6868 case BFD_RELOC_8:
6869 break;
3b8b57a9 6870
252b5132 6871 default:
bc805888 6872 fprintf (stderr,
94f592af 6873 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6874 fflush (stderr);
252b5132
RH		 6875 abort ();
6876 }
46b596ff 6877
5656a981 6878 if (fixP->fx_size && APPLY_RELOC)
46b596ff 6879 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5656a981
AM		 6880 fieldval, fixP->fx_size);
6881 }
6882
6883 /* We are only able to convert some relocs to pc-relative. */
6884 if (!fixP->fx_done && fixP->fx_pcrel)
6885 {
6886 switch (fixP->fx_r_type)
6887 {
6888 case BFD_RELOC_LO16:
6889 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6890 break;
6891
6892 case BFD_RELOC_HI16:
6893 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6894 break;
6895
6896 case BFD_RELOC_HI16_S:
6897 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6898 break;
6899
6900 case BFD_RELOC_64:
6901 fixP->fx_r_type = BFD_RELOC_64_PCREL;
6902 break;
6903
6904 case BFD_RELOC_32:
6905 fixP->fx_r_type = BFD_RELOC_32_PCREL;
6906 break;
6907
6908 case BFD_RELOC_16:
6909 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6910 break;
6911
6912 /* Some of course are already pc-relative. */
6913 case BFD_RELOC_LO16_PCREL:
6914 case BFD_RELOC_HI16_PCREL:
6915 case BFD_RELOC_HI16_S_PCREL:
6916 case BFD_RELOC_64_PCREL:
6917 case BFD_RELOC_32_PCREL:
6918 case BFD_RELOC_16_PCREL:
6919 case BFD_RELOC_PPC_B16:
6920 case BFD_RELOC_PPC_B16_BRTAKEN:
6921 case BFD_RELOC_PPC_B16_BRNTAKEN:
6922 case BFD_RELOC_PPC_B26:
6923 case BFD_RELOC_PPC_LOCAL24PC:
6924 case BFD_RELOC_24_PLT_PCREL:
6925 case BFD_RELOC_32_PLT_PCREL:
6926 case BFD_RELOC_64_PLT_PCREL:
6927 case BFD_RELOC_PPC_VLE_REL8:
6928 case BFD_RELOC_PPC_VLE_REL15:
6929 case BFD_RELOC_PPC_VLE_REL24:
6930 break;
6931
6932 default:
6933 if (fixP->fx_addsy)
6934 {
6935 char *sfile;
6936 unsigned int sline;
6937
6938 /* Use expr_symbol_where to see if this is an
6939 expression symbol. */
6940 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6941 as_bad_where (fixP->fx_file, fixP->fx_line,
6942 _("unresolved expression that must"
6943 " be resolved"));
6944 else
6945 as_bad_where (fixP->fx_file, fixP->fx_line,
6946 _("cannot emit PC relative %s relocation"
6947 " against %s"),
6948 bfd_get_reloc_code_name (fixP->fx_r_type),
6949 S_GET_NAME (fixP->fx_addsy));
6950 }
6951 else
6952 as_bad_where (fixP->fx_file, fixP->fx_line,
6953 _("unable to resolve expression"));
6954 fixP->fx_done = 1;
6955 break;
6956 }
252b5132
RH		 6957 }
6958
6959#ifdef OBJ_ELF
3b8b57a9 6960 ppc_elf_validate_fix (fixP, seg);
94f592af 6961 fixP->fx_addnumber = value;
4e6935a6
AM		 6962
6963 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6964 from the section contents. If we are going to be emitting a reloc
6965 then the section contents are immaterial, so don't warn if they
6966 happen to overflow. Leave such warnings to ld. */
6967 if (!fixP->fx_done)
a38a07e0
AM		 6968 {
6969 fixP->fx_no_overflow = 1;
6970
6971 /* Arrange to emit .TOC. as a normal symbol if used in anything
6972 but .TOC.@tocbase. */
6973 if (ppc_obj64
6974 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
6975 && fixP->fx_addsy != NULL
6976 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
6977 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
6978 }
252b5132 6979#else
94f592af
NC		 6980 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6981 fixP->fx_addnumber = 0;
252b5132
RH		 6982 else
6983 {
6984#ifdef TE_PE
94f592af 6985 fixP->fx_addnumber = 0;
252b5132 6986#else
8edcbfcd
TG		 6987 /* We want to use the offset within the toc, not the actual VMA
6988 of the symbol. */
94f592af 6989 fixP->fx_addnumber =
8edcbfcd
TG		 6990 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6991 - S_GET_VALUE (ppc_toc_csect);
ac21e7da
TG		 6992 /* Set *valP to avoid errors. */
6993 *valP = value;
252b5132
RH		 6994#endif
6995 }
6996#endif
252b5132
RH		 6997}
6998
6999/* Generate a reloc for a fixup. */
7000
7001arelent *
98027b10 7002tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 7003{
7004 arelent *reloc;
7005
7006 reloc = (arelent *) xmalloc (sizeof (arelent));
7007
49309057
ILT		 7008 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
7009 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 7010 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7011 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7012 if (reloc->howto == (reloc_howto_type *) NULL)
7013 {
7014 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 7015 _("reloc %d not supported by object file format"),
7016 (int) fixp->fx_r_type);
252b5132
RH		 7017 return NULL;
7018 }
7019 reloc->addend = fixp->fx_addnumber;
7020
7021 return reloc;
7022}
75e21f08
JJ		 7023
7024void
98027b10 7025ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 7026{
7027 cfi_add_CFA_def_cfa (1, 0);
7028}
7029
7030int
1df69f4f 7031tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 7032{
7033 unsigned int regnum = -1;
7034 unsigned int i;
7035 const char *p;
7036 char *q;
7037 static struct { char *name; int dw2regnum; } regnames[] =
7038 {
7039 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7040 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 7041 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 7042 { "spe_acc", 111 }, { "spefscr", 112 }
7043 };
7044
7045 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7046 if (strcmp (regnames[i].name, regname) == 0)
7047 return regnames[i].dw2regnum;
7048
7049 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7050 {
7051 p = regname + 1 + (regname[1] == '.');
7052 regnum = strtoul (p, &q, 10);
7053 if (p == q || *q || regnum >= 32)
7054 return -1;
7055 if (regname[0] == 'f')
b7d7dc63 7056 regnum += 32;
75e21f08 7057 else if (regname[0] == 'v')
b7d7dc63 7058 regnum += 77;
75e21f08
JJ		 7059 }
7060 else if (regname[0] == 'c' && regname[1] == 'r')
7061 {
7062 p = regname + 2 + (regname[2] == '.');
7063 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 7064 return -1;
75e21f08
JJ		 7065 regnum = p[0] - '0' + 68;
7066 }
7067 return regnum;
7068}
GDB Binutils - Deliverables
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