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* remote.c (remote_write_bytes_aux): Doc fix.
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
9622b051 3 2004, 2005, 2006 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
b34976b6 87static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 88static void ppc_set_cpu PARAMS ((void));
89static unsigned long ppc_insert_operand
90 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
91 offsetT val, char *file, unsigned int line));
92static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
93static void ppc_byte PARAMS ((int));
0baf16f2
AM		 94
95#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 96static int ppc_is_toc_sym PARAMS ((symbolS *sym));
97static void ppc_tc PARAMS ((int));
0baf16f2
AM		 98static void ppc_machine PARAMS ((int));
99#endif
252b5132
RH		 100
101#ifdef OBJ_XCOFF
102static void ppc_comm PARAMS ((int));
103static void ppc_bb PARAMS ((int));
104static void ppc_bc PARAMS ((int));
105static void ppc_bf PARAMS ((int));
106static void ppc_biei PARAMS ((int));
107static void ppc_bs PARAMS ((int));
108static void ppc_eb PARAMS ((int));
109static void ppc_ec PARAMS ((int));
110static void ppc_ef PARAMS ((int));
111static void ppc_es PARAMS ((int));
112static void ppc_csect PARAMS ((int));
931e13a6 113static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH		 114static void ppc_function PARAMS ((int));
115static void ppc_extern PARAMS ((int));
116static void ppc_lglobl PARAMS ((int));
117static void ppc_section PARAMS ((int));
118static void ppc_named_section PARAMS ((int));
119static void ppc_stabx PARAMS ((int));
120static void ppc_rename PARAMS ((int));
121static void ppc_toc PARAMS ((int));
122static void ppc_xcoff_cons PARAMS ((int));
123static void ppc_vbyte PARAMS ((int));
124#endif
125
126#ifdef OBJ_ELF
127static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
128static void ppc_elf_cons PARAMS ((int));
129static void ppc_elf_rdata PARAMS ((int));
130static void ppc_elf_lcomm PARAMS ((int));
131static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 132static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 133#endif
134
135#ifdef TE_PE
136static void ppc_set_current_section PARAMS ((segT));
137static void ppc_previous PARAMS ((int));
138static void ppc_pdata PARAMS ((int));
139static void ppc_ydata PARAMS ((int));
140static void ppc_reldata PARAMS ((int));
141static void ppc_rdata PARAMS ((int));
142static void ppc_ualong PARAMS ((int));
143static void ppc_znop PARAMS ((int));
144static void ppc_pe_comm PARAMS ((int));
145static void ppc_pe_section PARAMS ((int));
146static void ppc_pe_function PARAMS ((int));
147static void ppc_pe_tocd PARAMS ((int));
148#endif
149\f
150/* Generic assembler global variables which must be defined by all
151 targets. */
152
153#ifdef OBJ_ELF
154/* This string holds the chars that always start a comment. If the
155 pre-processor is disabled, these aren't very useful. The macro
156 tc_comment_chars points to this. We use this, rather than the
157 usual comment_chars, so that we can switch for Solaris conventions. */
158static const char ppc_solaris_comment_chars[] = "#!";
159static const char ppc_eabi_comment_chars[] = "#";
160
161#ifdef TARGET_SOLARIS_COMMENT
162const char *ppc_comment_chars = ppc_solaris_comment_chars;
163#else
164const char *ppc_comment_chars = ppc_eabi_comment_chars;
165#endif
166#else
167const char comment_chars[] = "#";
168#endif
169
170/* Characters which start a comment at the beginning of a line. */
171const char line_comment_chars[] = "#";
172
173/* Characters which may be used to separate multiple commands on a
174 single line. */
175const char line_separator_chars[] = ";";
176
177/* Characters which are used to indicate an exponent in a floating
178 point number. */
179const char EXP_CHARS[] = "eE";
180
181/* Characters which mean that a number is a floating point constant,
182 as in 0d1.0. */
183const char FLT_CHARS[] = "dD";
5ce8663f 184
b7d7dc63 185/* '+' and '-' can be used as postfix predicate predictors for conditional
ac805826
AM		 186 branches. So they need to be accepted as symbol characters.
187 Also, anything that can start an operand needs to be mentioned here,
188 to stop the input scrubber eating whitespace. */
189const char ppc_symbol_chars[] = "+-%[";
75e21f08
JJ		 190
191/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
192int ppc_cie_data_alignment;
252b5132
RH		 193\f
194/* The target specific pseudo-ops which we support. */
195
196const pseudo_typeS md_pseudo_table[] =
197{
198 /* Pseudo-ops which must be overridden. */
199 { "byte", ppc_byte, 0 },
200
201#ifdef OBJ_XCOFF
202 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
203 legitimately belong in the obj-*.c file. However, XCOFF is based
204 on COFF, and is only implemented for the RS/6000. We just use
205 obj-coff.c, and add what we need here. */
206 { "comm", ppc_comm, 0 },
207 { "lcomm", ppc_comm, 1 },
208 { "bb", ppc_bb, 0 },
209 { "bc", ppc_bc, 0 },
210 { "bf", ppc_bf, 0 },
211 { "bi", ppc_biei, 0 },
212 { "bs", ppc_bs, 0 },
213 { "csect", ppc_csect, 0 },
214 { "data", ppc_section, 'd' },
215 { "eb", ppc_eb, 0 },
216 { "ec", ppc_ec, 0 },
217 { "ef", ppc_ef, 0 },
218 { "ei", ppc_biei, 1 },
219 { "es", ppc_es, 0 },
220 { "extern", ppc_extern, 0 },
221 { "function", ppc_function, 0 },
222 { "lglobl", ppc_lglobl, 0 },
223 { "rename", ppc_rename, 0 },
224 { "section", ppc_named_section, 0 },
225 { "stabx", ppc_stabx, 0 },
226 { "text", ppc_section, 't' },
227 { "toc", ppc_toc, 0 },
228 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 229 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 230 { "word", ppc_xcoff_cons, 1 },
231 { "short", ppc_xcoff_cons, 1 },
232 { "vbyte", ppc_vbyte, 0 },
233#endif
234
235#ifdef OBJ_ELF
0baf16f2
AM		 236 { "llong", ppc_elf_cons, 8 },
237 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 238 { "long", ppc_elf_cons, 4 },
239 { "word", ppc_elf_cons, 2 },
240 { "short", ppc_elf_cons, 2 },
241 { "rdata", ppc_elf_rdata, 0 },
242 { "rodata", ppc_elf_rdata, 0 },
243 { "lcomm", ppc_elf_lcomm, 0 },
244#endif
245
246#ifdef TE_PE
99a814a1 247 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 248 { "previous", ppc_previous, 0 },
249 { "pdata", ppc_pdata, 0 },
250 { "ydata", ppc_ydata, 0 },
251 { "reldata", ppc_reldata, 0 },
252 { "rdata", ppc_rdata, 0 },
253 { "ualong", ppc_ualong, 0 },
254 { "znop", ppc_znop, 0 },
255 { "comm", ppc_pe_comm, 0 },
256 { "lcomm", ppc_pe_comm, 1 },
257 { "section", ppc_pe_section, 0 },
258 { "function", ppc_pe_function,0 },
259 { "tocd", ppc_pe_tocd, 0 },
260#endif
261
0baf16f2 262#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 263 { "tc", ppc_tc, 0 },
0baf16f2
AM		 264 { "machine", ppc_machine, 0 },
265#endif
252b5132
RH		 266
267 { NULL, NULL, 0 }
268};
269
270\f
99a814a1
AM		 271/* Predefined register names if -mregnames (or default for Windows NT).
272 In general, there are lots of them, in an attempt to be compatible
273 with a number of other Windows NT assemblers. */
252b5132
RH		 274
275/* Structure to hold information about predefined registers. */
276struct pd_reg
277 {
278 char *name;
279 int value;
280 };
281
282/* List of registers that are pre-defined:
283
284 Each general register has predefined names of the form:
285 1. r<reg_num> which has the value <reg_num>.
286 2. r.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each floating point register has predefined names of the form:
289 1. f<reg_num> which has the value <reg_num>.
290 2. f.<reg_num> which has the value <reg_num>.
291
7a899fff
C		 292 Each vector unit register has predefined names of the form:
293 1. v<reg_num> which has the value <reg_num>.
294 2. v.<reg_num> which has the value <reg_num>.
295
252b5132
RH		 296 Each condition register has predefined names of the form:
297 1. cr<reg_num> which has the value <reg_num>.
298 2. cr.<reg_num> which has the value <reg_num>.
299
300 There are individual registers as well:
301 sp or r.sp has the value 1
302 rtoc or r.toc has the value 2
303 fpscr has the value 0
304 xer has the value 1
305 lr has the value 8
306 ctr has the value 9
307 pmr has the value 0
308 dar has the value 19
309 dsisr has the value 18
310 dec has the value 22
311 sdr1 has the value 25
312 srr0 has the value 26
313 srr1 has the value 27
314
81d4177b 315 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 316
317static const struct pd_reg pre_defined_registers[] =
318{
319 { "cr.0", 0 }, /* Condition Registers */
320 { "cr.1", 1 },
321 { "cr.2", 2 },
322 { "cr.3", 3 },
323 { "cr.4", 4 },
324 { "cr.5", 5 },
325 { "cr.6", 6 },
326 { "cr.7", 7 },
327
328 { "cr0", 0 },
329 { "cr1", 1 },
330 { "cr2", 2 },
331 { "cr3", 3 },
332 { "cr4", 4 },
333 { "cr5", 5 },
334 { "cr6", 6 },
335 { "cr7", 7 },
336
337 { "ctr", 9 },
338
339 { "dar", 19 }, /* Data Access Register */
340 { "dec", 22 }, /* Decrementer */
341 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
342
343 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 344 { "f.1", 1 },
345 { "f.10", 10 },
346 { "f.11", 11 },
347 { "f.12", 12 },
348 { "f.13", 13 },
349 { "f.14", 14 },
350 { "f.15", 15 },
351 { "f.16", 16 },
352 { "f.17", 17 },
353 { "f.18", 18 },
354 { "f.19", 19 },
355 { "f.2", 2 },
356 { "f.20", 20 },
357 { "f.21", 21 },
358 { "f.22", 22 },
359 { "f.23", 23 },
360 { "f.24", 24 },
361 { "f.25", 25 },
362 { "f.26", 26 },
363 { "f.27", 27 },
364 { "f.28", 28 },
365 { "f.29", 29 },
366 { "f.3", 3 },
252b5132
RH		 367 { "f.30", 30 },
368 { "f.31", 31 },
81d4177b
KH		 369 { "f.4", 4 },
370 { "f.5", 5 },
371 { "f.6", 6 },
372 { "f.7", 7 },
373 { "f.8", 8 },
374 { "f.9", 9 },
375
376 { "f0", 0 },
377 { "f1", 1 },
378 { "f10", 10 },
379 { "f11", 11 },
380 { "f12", 12 },
381 { "f13", 13 },
382 { "f14", 14 },
383 { "f15", 15 },
384 { "f16", 16 },
385 { "f17", 17 },
386 { "f18", 18 },
387 { "f19", 19 },
388 { "f2", 2 },
389 { "f20", 20 },
390 { "f21", 21 },
391 { "f22", 22 },
392 { "f23", 23 },
393 { "f24", 24 },
394 { "f25", 25 },
395 { "f26", 26 },
396 { "f27", 27 },
397 { "f28", 28 },
398 { "f29", 29 },
399 { "f3", 3 },
252b5132
RH		 400 { "f30", 30 },
401 { "f31", 31 },
81d4177b
KH		 402 { "f4", 4 },
403 { "f5", 5 },
404 { "f6", 6 },
405 { "f7", 7 },
406 { "f8", 8 },
407 { "f9", 9 },
252b5132
RH		 408
409 { "fpscr", 0 },
410
411 { "lr", 8 }, /* Link Register */
412
413 { "pmr", 0 },
414
415 { "r.0", 0 }, /* General Purpose Registers */
416 { "r.1", 1 },
417 { "r.10", 10 },
418 { "r.11", 11 },
419 { "r.12", 12 },
420 { "r.13", 13 },
421 { "r.14", 14 },
422 { "r.15", 15 },
423 { "r.16", 16 },
424 { "r.17", 17 },
425 { "r.18", 18 },
426 { "r.19", 19 },
427 { "r.2", 2 },
428 { "r.20", 20 },
429 { "r.21", 21 },
430 { "r.22", 22 },
431 { "r.23", 23 },
432 { "r.24", 24 },
433 { "r.25", 25 },
434 { "r.26", 26 },
435 { "r.27", 27 },
436 { "r.28", 28 },
437 { "r.29", 29 },
438 { "r.3", 3 },
439 { "r.30", 30 },
440 { "r.31", 31 },
441 { "r.4", 4 },
442 { "r.5", 5 },
443 { "r.6", 6 },
444 { "r.7", 7 },
445 { "r.8", 8 },
446 { "r.9", 9 },
447
448 { "r.sp", 1 }, /* Stack Pointer */
449
450 { "r.toc", 2 }, /* Pointer to the table of contents */
451
452 { "r0", 0 }, /* More general purpose registers */
453 { "r1", 1 },
454 { "r10", 10 },
455 { "r11", 11 },
456 { "r12", 12 },
457 { "r13", 13 },
458 { "r14", 14 },
459 { "r15", 15 },
460 { "r16", 16 },
461 { "r17", 17 },
462 { "r18", 18 },
463 { "r19", 19 },
464 { "r2", 2 },
465 { "r20", 20 },
466 { "r21", 21 },
467 { "r22", 22 },
468 { "r23", 23 },
469 { "r24", 24 },
470 { "r25", 25 },
471 { "r26", 26 },
472 { "r27", 27 },
473 { "r28", 28 },
474 { "r29", 29 },
475 { "r3", 3 },
476 { "r30", 30 },
477 { "r31", 31 },
478 { "r4", 4 },
479 { "r5", 5 },
480 { "r6", 6 },
481 { "r7", 7 },
482 { "r8", 8 },
483 { "r9", 9 },
484
485 { "rtoc", 2 }, /* Table of contents */
486
487 { "sdr1", 25 }, /* Storage Description Register 1 */
488
489 { "sp", 1 },
490
491 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
492 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 493
7a899fff 494 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 495 { "v.1", 1 },
496 { "v.10", 10 },
497 { "v.11", 11 },
498 { "v.12", 12 },
499 { "v.13", 13 },
500 { "v.14", 14 },
501 { "v.15", 15 },
502 { "v.16", 16 },
503 { "v.17", 17 },
504 { "v.18", 18 },
505 { "v.19", 19 },
506 { "v.2", 2 },
507 { "v.20", 20 },
508 { "v.21", 21 },
509 { "v.22", 22 },
510 { "v.23", 23 },
511 { "v.24", 24 },
512 { "v.25", 25 },
513 { "v.26", 26 },
514 { "v.27", 27 },
515 { "v.28", 28 },
516 { "v.29", 29 },
517 { "v.3", 3 },
7a899fff
C		 518 { "v.30", 30 },
519 { "v.31", 31 },
81d4177b
KH		 520 { "v.4", 4 },
521 { "v.5", 5 },
522 { "v.6", 6 },
523 { "v.7", 7 },
524 { "v.8", 8 },
525 { "v.9", 9 },
7a899fff
C		 526
527 { "v0", 0 },
81d4177b
KH		 528 { "v1", 1 },
529 { "v10", 10 },
530 { "v11", 11 },
531 { "v12", 12 },
532 { "v13", 13 },
533 { "v14", 14 },
534 { "v15", 15 },
535 { "v16", 16 },
536 { "v17", 17 },
537 { "v18", 18 },
538 { "v19", 19 },
539 { "v2", 2 },
540 { "v20", 20 },
541 { "v21", 21 },
542 { "v22", 22 },
543 { "v23", 23 },
544 { "v24", 24 },
545 { "v25", 25 },
546 { "v26", 26 },
547 { "v27", 27 },
548 { "v28", 28 },
549 { "v29", 29 },
550 { "v3", 3 },
7a899fff
C		 551 { "v30", 30 },
552 { "v31", 31 },
81d4177b
KH		 553 { "v4", 4 },
554 { "v5", 5 },
555 { "v6", 6 },
556 { "v7", 7 },
557 { "v8", 8 },
7a899fff 558 { "v9", 9 },
252b5132
RH		 559
560 { "xer", 1 },
561
562};
563
bc805888 564#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 565
566/* Given NAME, find the register number associated with that name, return
567 the integer value associated with the given name or -1 on failure. */
568
569static int reg_name_search
570 PARAMS ((const struct pd_reg *, int, const char * name));
571
572static int
573reg_name_search (regs, regcount, name)
574 const struct pd_reg *regs;
575 int regcount;
576 const char *name;
577{
578 int middle, low, high;
579 int cmp;
580
581 low = 0;
582 high = regcount - 1;
583
584 do
585 {
586 middle = (low + high) / 2;
587 cmp = strcasecmp (name, regs[middle].name);
588 if (cmp < 0)
589 high = middle - 1;
590 else if (cmp > 0)
591 low = middle + 1;
592 else
593 return regs[middle].value;
594 }
595 while (low <= high);
596
597 return -1;
598}
599
600/*
99a814a1 601 * Summary of register_name.
252b5132
RH		 602 *
603 * in: Input_line_pointer points to 1st char of operand.
604 *
605 * out: A expressionS.
606 * The operand may have been a register: in this case, X_op == O_register,
607 * X_add_number is set to the register number, and truth is returned.
608 * Input_line_pointer->(next non-blank) char after operand, or is in its
609 * original state.
610 */
611
b34976b6 612static bfd_boolean
252b5132
RH		 613register_name (expressionP)
614 expressionS *expressionP;
615{
616 int reg_number;
617 char *name;
618 char *start;
619 char c;
620
99a814a1 621 /* Find the spelling of the operand. */
252b5132 622 start = name = input_line_pointer;
3882b010 623 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 624 name = ++input_line_pointer;
625
3882b010 626 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 627 return FALSE;
252b5132
RH		 628
629 c = get_symbol_end ();
630 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
631
468cced8
AM		 632 /* Put back the delimiting char. */
633 *input_line_pointer = c;
634
99a814a1 635 /* Look to see if it's in the register table. */
81d4177b 636 if (reg_number >= 0)
252b5132
RH		 637 {
638 expressionP->X_op = O_register;
639 expressionP->X_add_number = reg_number;
81d4177b 640
99a814a1 641 /* Make the rest nice. */
252b5132
RH		 642 expressionP->X_add_symbol = NULL;
643 expressionP->X_op_symbol = NULL;
b34976b6 644 return TRUE;
252b5132 645 }
468cced8
AM		 646
647 /* Reset the line as if we had not done anything. */
648 input_line_pointer = start;
b34976b6 649 return FALSE;
252b5132
RH		 650}
651\f
652/* This function is called for each symbol seen in an expression. It
653 handles the special parsing which PowerPC assemblers are supposed
654 to use for condition codes. */
655
656/* Whether to do the special parsing. */
b34976b6 657static bfd_boolean cr_operand;
252b5132
RH		 658
659/* Names to recognize in a condition code. This table is sorted. */
660static const struct pd_reg cr_names[] =
661{
662 { "cr0", 0 },
663 { "cr1", 1 },
664 { "cr2", 2 },
665 { "cr3", 3 },
666 { "cr4", 4 },
667 { "cr5", 5 },
668 { "cr6", 6 },
669 { "cr7", 7 },
670 { "eq", 2 },
671 { "gt", 1 },
672 { "lt", 0 },
673 { "so", 3 },
674 { "un", 3 }
675};
676
677/* Parsing function. This returns non-zero if it recognized an
678 expression. */
679
680int
681ppc_parse_name (name, expr)
682 const char *name;
683 expressionS *expr;
684{
685 int val;
686
687 if (! cr_operand)
688 return 0;
689
690 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
691 name);
692 if (val < 0)
693 return 0;
694
695 expr->X_op = O_constant;
696 expr->X_add_number = val;
697
698 return 1;
699}
700\f
701/* Local variables. */
702
703/* The type of processor we are assembling for. This is one or more
704 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 705static unsigned long ppc_cpu = 0;
252b5132 706
2b3c4602
AM		 707/* Whether to target xcoff64/elf64. */
708static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 709
252b5132
RH		 710/* Opcode hash table. */
711static struct hash_control *ppc_hash;
712
713/* Macro hash table. */
714static struct hash_control *ppc_macro_hash;
715
716#ifdef OBJ_ELF
99a814a1 717/* What type of shared library support to use. */
5d6f4f16 718static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 719
99a814a1 720/* Flags to set in the elf header. */
252b5132
RH		 721static flagword ppc_flags = 0;
722
723/* Whether this is Solaris or not. */
724#ifdef TARGET_SOLARIS_COMMENT
b34976b6 725#define SOLARIS_P TRUE
252b5132 726#else
b34976b6 727#define SOLARIS_P FALSE
252b5132
RH		 728#endif
729
b34976b6 730static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 731#endif
732
733#ifdef OBJ_XCOFF
734
735/* The RS/6000 assembler uses the .csect pseudo-op to generate code
736 using a bunch of different sections. These assembler sections,
737 however, are all encompassed within the .text or .data sections of
738 the final output file. We handle this by using different
739 subsegments within these main segments. */
740
741/* Next subsegment to allocate within the .text segment. */
742static subsegT ppc_text_subsegment = 2;
743
744/* Linked list of csects in the text section. */
745static symbolS *ppc_text_csects;
746
747/* Next subsegment to allocate within the .data segment. */
748static subsegT ppc_data_subsegment = 2;
749
750/* Linked list of csects in the data section. */
751static symbolS *ppc_data_csects;
752
753/* The current csect. */
754static symbolS *ppc_current_csect;
755
756/* The RS/6000 assembler uses a TOC which holds addresses of functions
757 and variables. Symbols are put in the TOC with the .tc pseudo-op.
758 A special relocation is used when accessing TOC entries. We handle
759 the TOC as a subsegment within the .data segment. We set it up if
760 we see a .toc pseudo-op, and save the csect symbol here. */
761static symbolS *ppc_toc_csect;
762
763/* The first frag in the TOC subsegment. */
764static fragS *ppc_toc_frag;
765
766/* The first frag in the first subsegment after the TOC in the .data
767 segment. NULL if there are no subsegments after the TOC. */
768static fragS *ppc_after_toc_frag;
769
770/* The current static block. */
771static symbolS *ppc_current_block;
772
773/* The COFF debugging section; set by md_begin. This is not the
774 .debug section, but is instead the secret BFD section which will
775 cause BFD to set the section number of a symbol to N_DEBUG. */
776static asection *ppc_coff_debug_section;
777
778#endif /* OBJ_XCOFF */
779
780#ifdef TE_PE
781
782/* Various sections that we need for PE coff support. */
783static segT ydata_section;
784static segT pdata_section;
785static segT reldata_section;
786static segT rdata_section;
787static segT tocdata_section;
788
81d4177b 789/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 790static segT ppc_previous_section;
791static segT ppc_current_section;
792
793#endif /* TE_PE */
794
795#ifdef OBJ_ELF
796symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 797#define PPC_APUINFO_ISEL 0x40
798#define PPC_APUINFO_PMR 0x41
799#define PPC_APUINFO_RFMCI 0x42
800#define PPC_APUINFO_CACHELCK 0x43
801#define PPC_APUINFO_SPE 0x100
802#define PPC_APUINFO_EFS 0x101
803#define PPC_APUINFO_BRLOCK 0x102
804
b34976b6
AM		 805/*
806 * We keep a list of APUinfo
6a0c61b7
EZ		 807 */
808unsigned long *ppc_apuinfo_list;
809unsigned int ppc_apuinfo_num;
810unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 811#endif /* OBJ_ELF */
812\f
813#ifdef OBJ_ELF
15c1449b 814const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 815#else
15c1449b 816const char *const md_shortopts = "um:";
252b5132 817#endif
15c1449b 818const struct option md_longopts[] = {
252b5132
RH		 819 {NULL, no_argument, NULL, 0}
820};
15c1449b 821const size_t md_longopts_size = sizeof (md_longopts);
252b5132 822
69c040df
AM		 823
824/* Handle -m options that set cpu type, and .machine arg. */
825
826static int
827parse_cpu (const char *arg)
828{
829 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
830 (RIOS2). */
831 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
832 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
833 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
834 else if (strcmp (arg, "pwr") == 0)
835 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
836 /* -m601 means to assemble for the PowerPC 601, which includes
837 instructions that are holdovers from the Power. */
838 else if (strcmp (arg, "601") == 0)
839 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
840 | PPC_OPCODE_601 | PPC_OPCODE_32);
841 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
842 PowerPC 603/604. */
843 else if (strcmp (arg, "ppc") == 0
844 || strcmp (arg, "ppc32") == 0
845 || strcmp (arg, "603") == 0
846 || strcmp (arg, "604") == 0)
847 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
848 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
849 else if (strcmp (arg, "403") == 0
850 || strcmp (arg, "405") == 0)
851 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
852 | PPC_OPCODE_403 | PPC_OPCODE_32);
853 else if (strcmp (arg, "440") == 0)
854 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
855 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
856 else if (strcmp (arg, "7400") == 0
857 || strcmp (arg, "7410") == 0
858 || strcmp (arg, "7450") == 0
859 || strcmp (arg, "7455") == 0)
860 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
861 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 862 else if (strcmp (arg, "e300") == 0)
863 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
864 | PPC_OPCODE_E300);
69c040df
AM		 865 else if (strcmp (arg, "altivec") == 0)
866 {
867 if (ppc_cpu == 0)
868 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
869 else
870 ppc_cpu |= PPC_OPCODE_ALTIVEC;
871 }
872 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
873 {
874 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
875 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
876 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
877 | PPC_OPCODE_RFMCI);
878 }
879 else if (strcmp (arg, "spe") == 0)
880 {
881 if (ppc_cpu == 0)
882 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
883 else
884 ppc_cpu |= PPC_OPCODE_SPE;
885 }
886 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
887 620. */
888 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
889 {
890 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
891 }
892 else if (strcmp (arg, "ppc64bridge") == 0)
893 {
894 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
895 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
896 }
897 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
898 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
899 {
900 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
901 }
902 /* -mbooke64 means enable 64-bit BookE support. */
903 else if (strcmp (arg, "booke64") == 0)
904 {
905 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
906 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
907 }
908 else if (strcmp (arg, "power4") == 0)
909 {
910 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
911 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
912 }
b0648eec
AM		 913 else if (strcmp (arg, "power5") == 0)
914 {
915 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
916 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
917 | PPC_OPCODE_POWER5);
918 }
9622b051
AM		 919 else if (strcmp (arg, "power6") == 0)
920 {
921 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
922 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
923 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
924 }
69c040df
AM		 925 /* -mcom means assemble for the common intersection between Power
926 and PowerPC. At present, we just allow the union, rather
927 than the intersection. */
928 else if (strcmp (arg, "com") == 0)
929 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
930 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
931 else if (strcmp (arg, "any") == 0)
932 ppc_cpu |= PPC_OPCODE_ANY;
933 else
934 return 0;
935
936 return 1;
937}
938
252b5132
RH		 939int
940md_parse_option (c, arg)
941 int c;
942 char *arg;
943{
944 switch (c)
945 {
946 case 'u':
947 /* -u means that any undefined symbols should be treated as
948 external, which is the default for gas anyhow. */
949 break;
950
951#ifdef OBJ_ELF
952 case 'l':
953 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 954 sake, recognize -be also. */
252b5132
RH		 955 if (strcmp (arg, "e") == 0)
956 {
957 target_big_endian = 0;
958 set_target_endian = 1;
959 }
960 else
961 return 0;
962
963 break;
964
965 case 'b':
966 if (strcmp (arg, "e") == 0)
967 {
968 target_big_endian = 1;
969 set_target_endian = 1;
970 }
971 else
972 return 0;
973
974 break;
975
976 case 'K':
99a814a1 977 /* Recognize -K PIC. */
252b5132
RH		 978 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
979 {
980 shlib = SHLIB_PIC;
981 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
982 }
983 else
984 return 0;
985
986 break;
987#endif
988
7f6d05e8
CP		 989 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
990 case 'a':
991 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 992 {
993#ifdef BFD64
994 ppc_obj64 = 1;
995#else
996 as_fatal (_("%s unsupported"), "-a64");
997#endif
998 }
7f6d05e8 999 else if (strcmp (arg, "32") == 0)
2b3c4602 1000 ppc_obj64 = 0;
7f6d05e8
CP		 1001 else
1002 return 0;
1003 break;
81d4177b 1004
252b5132 1005 case 'm':
69c040df
AM		 1006 if (parse_cpu (arg))
1007 ;
252b5132
RH		 1008
1009 else if (strcmp (arg, "regnames") == 0)
b34976b6 1010 reg_names_p = TRUE;
252b5132
RH		 1011
1012 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1013 reg_names_p = FALSE;
252b5132
RH		 1014
1015#ifdef OBJ_ELF
99a814a1
AM		 1016 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1017 that require relocation. */
252b5132
RH		 1018 else if (strcmp (arg, "relocatable") == 0)
1019 {
5d6f4f16 1020 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1021 ppc_flags |= EF_PPC_RELOCATABLE;
1022 }
1023
1024 else if (strcmp (arg, "relocatable-lib") == 0)
1025 {
5d6f4f16 1026 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1027 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1028 }
1029
99a814a1 1030 /* -memb, set embedded bit. */
252b5132
RH		 1031 else if (strcmp (arg, "emb") == 0)
1032 ppc_flags |= EF_PPC_EMB;
1033
99a814a1
AM		 1034 /* -mlittle/-mbig set the endianess. */
1035 else if (strcmp (arg, "little") == 0
1036 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1037 {
1038 target_big_endian = 0;
1039 set_target_endian = 1;
1040 }
1041
1042 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1043 {
1044 target_big_endian = 1;
1045 set_target_endian = 1;
1046 }
1047
1048 else if (strcmp (arg, "solaris") == 0)
1049 {
b34976b6 1050 msolaris = TRUE;
252b5132
RH		 1051 ppc_comment_chars = ppc_solaris_comment_chars;
1052 }
1053
1054 else if (strcmp (arg, "no-solaris") == 0)
1055 {
b34976b6 1056 msolaris = FALSE;
252b5132
RH		 1057 ppc_comment_chars = ppc_eabi_comment_chars;
1058 }
1059#endif
1060 else
1061 {
1062 as_bad (_("invalid switch -m%s"), arg);
1063 return 0;
1064 }
1065 break;
1066
1067#ifdef OBJ_ELF
1068 /* -V: SVR4 argument to print version ID. */
1069 case 'V':
1070 print_version_id ();
1071 break;
1072
1073 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1074 should be emitted or not. FIXME: Not implemented. */
1075 case 'Q':
1076 break;
1077
1078 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1079 rather than .stabs.excl, which is ignored by the linker.
1080 FIXME: Not implemented. */
1081 case 's':
1082 if (arg)
1083 return 0;
1084
1085 break;
1086#endif
1087
1088 default:
1089 return 0;
1090 }
1091
1092 return 1;
1093}
1094
1095void
1096md_show_usage (stream)
1097 FILE *stream;
1098{
bc805888 1099 fprintf (stream, _("\
252b5132 1100PowerPC options:\n\
df12615d
AM		 1101-a32 generate ELF32/XCOFF32\n\
1102-a64 generate ELF64/XCOFF64\n\
252b5132 1103-u ignored\n\
23e1d84c
AM		 1104-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1105-mpwr generate code for POWER (RIOS1)\n\
1106-m601 generate code for PowerPC 601\n\
418c1742 1107-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1108 generate code for PowerPC 603/604\n\
df12615d 1109-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1110-m440 generate code for PowerPC 440\n\
f5c120c5 1111-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1112 generate code For PowerPC 7400/7410/7450/7455\n"));
1113 fprintf (stream, _("\
23e1d84c 1114-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1115-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1116-mbooke64 generate code for 64-bit PowerPC BookE\n\
1117-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1118-mpower4 generate code for Power4 architecture\n\
b0648eec 1119-mpower5 generate code for Power5 architecture\n\
9622b051 1120-mpower6 generate code for Power6 architecture\n\
252b5132 1121-mcom generate code Power/PowerPC common instructions\n\
df12615d 1122-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1123 fprintf (stream, _("\
df12615d 1124-maltivec generate code for AltiVec\n\
36ae0db3 1125-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1126-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1127-mspe generate code for Motorola SPE instructions\n\
1128-mregnames Allow symbolic names for registers\n\
1129-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1130#ifdef OBJ_ELF
bc805888 1131 fprintf (stream, _("\
252b5132
RH		 1132-mrelocatable support for GCC's -mrelocatble option\n\
1133-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1134-memb set PPC_EMB bit in ELF flags\n\
df12615d 1135-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1136 generate code for a little endian machine\n\
df12615d
AM		 1137-mbig, -mbig-endian, -b, -be\n\
1138 generate code for a big endian machine\n\
252b5132
RH		 1139-msolaris generate code for Solaris\n\
1140-mno-solaris do not generate code for Solaris\n\
1141-V print assembler version number\n\
1142-Qy, -Qn ignored\n"));
1143#endif
1144}
1145\f
1146/* Set ppc_cpu if it is not already set. */
1147
1148static void
1149ppc_set_cpu ()
1150{
1151 const char *default_os = TARGET_OS;
1152 const char *default_cpu = TARGET_CPU;
1153
3c9030c1 1154 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1155 {
2a98c3a6 1156 if (ppc_obj64)
3c9030c1 1157 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1158 else if (strncmp (default_os, "aix", 3) == 0
1159 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1160 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1161 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1162 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1163 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1164 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1165 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1166 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1167 else
99a814a1
AM		 1168 as_fatal (_("Unknown default cpu = %s, os = %s"),
1169 default_cpu, default_os);
252b5132
RH		 1170 }
1171}
1172
9232bbb0
AM		 1173/* Figure out the BFD architecture to use. This function and ppc_mach
1174 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1175
1176enum bfd_architecture
1177ppc_arch ()
1178{
1179 const char *default_cpu = TARGET_CPU;
1180 ppc_set_cpu ();
1181
1182 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1183 return bfd_arch_powerpc;
1184 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1185 return bfd_arch_rs6000;
1186 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1187 {
1188 if (strcmp (default_cpu, "rs6000") == 0)
1189 return bfd_arch_rs6000;
0baf16f2 1190 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1191 return bfd_arch_powerpc;
1192 }
1193
1194 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1195 return bfd_arch_unknown;
1196}
1197
7f6d05e8
CP		 1198unsigned long
1199ppc_mach ()
1200{
2a98c3a6
AM		 1201 if (ppc_obj64)
1202 return bfd_mach_ppc64;
1203 else if (ppc_arch () == bfd_arch_rs6000)
1204 return bfd_mach_rs6k;
1205 else
1206 return bfd_mach_ppc;
7f6d05e8
CP		 1207}
1208
81d4177b 1209extern char*
99a814a1 1210ppc_target_format ()
7f6d05e8
CP		 1211{
1212#ifdef OBJ_COFF
1213#ifdef TE_PE
99a814a1 1214 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1215#elif TE_POWERMAC
0baf16f2 1216 return "xcoff-powermac";
7f6d05e8 1217#else
eb1e0e80 1218# ifdef TE_AIX5
2b3c4602 1219 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1220# else
2b3c4602 1221 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1222# endif
7f6d05e8 1223#endif
7f6d05e8
CP		 1224#endif
1225#ifdef OBJ_ELF
9d8504b1
PB		 1226# ifdef TE_VXWORKS
1227 return "elf32-powerpc-vxworks";
1228# else
0baf16f2 1229 return (target_big_endian
2b3c4602
AM		 1230 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1231 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1232# endif
7f6d05e8
CP		 1233#endif
1234}
1235
69c040df
AM		 1236/* Insert opcodes and macros into hash tables. Called at startup and
1237 for .cpu pseudo. */
252b5132 1238
69c040df
AM		 1239static void
1240ppc_setup_opcodes (void)
252b5132
RH		 1241{
1242 register const struct powerpc_opcode *op;
1243 const struct powerpc_opcode *op_end;
1244 const struct powerpc_macro *macro;
1245 const struct powerpc_macro *macro_end;
b34976b6 1246 bfd_boolean dup_insn = FALSE;
252b5132 1247
69c040df
AM		 1248 if (ppc_hash != NULL)
1249 hash_die (ppc_hash);
1250 if (ppc_macro_hash != NULL)
1251 hash_die (ppc_macro_hash);
252b5132
RH		 1252
1253 /* Insert the opcodes into a hash table. */
1254 ppc_hash = hash_new ();
1255
1256 op_end = powerpc_opcodes + powerpc_num_opcodes;
1257 for (op = powerpc_opcodes; op < op_end; op++)
1258 {
1259 know ((op->opcode & op->mask) == op->opcode);
1260
2b3c4602 1261 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1262 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1263 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1264 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1265 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1266 /* Certain instructions (eg: extsw) do not exist in the
1267 32-bit BookE instruction set, but they do exist in the
1268 64-bit BookE instruction set, and other PPC instruction
1269 sets. Check to see if the opcode has the BOOKE64 flag set.
1270 If it does make sure that the target CPU is not the BookE32. */
1271 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1272 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1273 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1274 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1275 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1276 == (ppc_cpu & PPC_OPCODE_POWER4)))
1277 && ((op->flags & PPC_OPCODE_POWER5) == 0
1278 || ((op->flags & PPC_OPCODE_POWER5)
9622b051
AM		 1279 == (ppc_cpu & PPC_OPCODE_POWER5)))
1280 && ((op->flags & PPC_OPCODE_POWER6) == 0
1281 || ((op->flags & PPC_OPCODE_POWER6)
1282 == (ppc_cpu & PPC_OPCODE_POWER6))))
252b5132
RH		 1283 {
1284 const char *retval;
1285
1286 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1287 if (retval != NULL)
252b5132 1288 {
99a814a1 1289 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1290 if ((ppc_cpu & PPC_OPCODE_601) != 0
1291 && (op->flags & PPC_OPCODE_POWER) != 0)
1292 continue;
1293
99a814a1
AM		 1294 as_bad (_("Internal assembler error for instruction %s"),
1295 op->name);
b34976b6 1296 dup_insn = TRUE;
252b5132
RH		 1297 }
1298 }
1299 }
1300
3c9030c1
AM		 1301 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1302 for (op = powerpc_opcodes; op < op_end; op++)
1303 hash_insert (ppc_hash, op->name, (PTR) op);
1304
252b5132
RH		 1305 /* Insert the macros into a hash table. */
1306 ppc_macro_hash = hash_new ();
1307
1308 macro_end = powerpc_macros + powerpc_num_macros;
1309 for (macro = powerpc_macros; macro < macro_end; macro++)
1310 {
1311 if ((macro->flags & ppc_cpu) != 0)
1312 {
1313 const char *retval;
1314
1315 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1316 if (retval != (const char *) NULL)
1317 {
1318 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1319 dup_insn = TRUE;
252b5132
RH		 1320 }
1321 }
1322 }
1323
1324 if (dup_insn)
1325 abort ();
69c040df
AM		 1326}
1327
1328/* This function is called when the assembler starts up. It is called
1329 after the options have been parsed and the output file has been
1330 opened. */
1331
1332void
1333md_begin ()
1334{
1335 ppc_set_cpu ();
1336
1337 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1338
1339#ifdef OBJ_ELF
1340 /* Set the ELF flags if desired. */
1341 if (ppc_flags && !msolaris)
1342 bfd_set_private_flags (stdoutput, ppc_flags);
1343#endif
1344
1345 ppc_setup_opcodes ();
252b5132 1346
67c1ffbe 1347 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1348 by the user. */
252b5132
RH		 1349 if (!set_target_endian)
1350 {
1351 set_target_endian = 1;
1352 target_big_endian = PPC_BIG_ENDIAN;
1353 }
1354
1355#ifdef OBJ_XCOFF
1356 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1357
1358 /* Create dummy symbols to serve as initial csects. This forces the
1359 text csects to precede the data csects. These symbols will not
1360 be output. */
1361 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1362 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1363 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1364 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1365#endif
1366
1367#ifdef TE_PE
1368
1369 ppc_current_section = text_section;
81d4177b 1370 ppc_previous_section = 0;
252b5132
RH		 1371
1372#endif
1373}
1374
6a0c61b7
EZ		 1375void
1376ppc_cleanup ()
1377{
dc1d03fc 1378#ifdef OBJ_ELF
6a0c61b7
EZ		 1379 if (ppc_apuinfo_list == NULL)
1380 return;
1381
1382 /* Ok, so write the section info out. We have this layout:
1383
1384 byte data what
1385 ---- ---- ----
1386 0 8 length of "APUinfo\0"
1387 4 (n*4) number of APU's (4 bytes each)
1388 8 2 note type 2
1389 12 "APUinfo\0" name
1390 20 APU#1 first APU's info
1391 24 APU#2 second APU's info
1392 ... ...
1393 */
1394 {
1395 char *p;
1396 asection *seg = now_seg;
1397 subsegT subseg = now_subseg;
1398 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1399 unsigned int i;
6a0c61b7
EZ		 1400
1401 /* Create the .PPC.EMB.apuinfo section. */
1402 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1403 bfd_set_section_flags (stdoutput,
1404 apuinfo_secp,
e1a9cb8e 1405 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1406
1407 p = frag_more (4);
1408 md_number_to_chars (p, (valueT) 8, 4);
1409
1410 p = frag_more (4);
e98d298c 1411 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1412
1413 p = frag_more (4);
1414 md_number_to_chars (p, (valueT) 2, 4);
1415
1416 p = frag_more (8);
1417 strcpy (p, "APUinfo");
1418
1419 for (i = 0; i < ppc_apuinfo_num; i++)
1420 {
b34976b6
AM		 1421 p = frag_more (4);
1422 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1423 }
1424
1425 frag_align (2, 0, 0);
1426
1427 /* We probably can't restore the current segment, for there likely
1428 isn't one yet... */
1429 if (seg && subseg)
1430 subseg_set (seg, subseg);
1431 }
dc1d03fc 1432#endif
6a0c61b7
EZ		 1433}
1434
252b5132
RH		 1435/* Insert an operand value into an instruction. */
1436
1437static unsigned long
1438ppc_insert_operand (insn, operand, val, file, line)
1439 unsigned long insn;
1440 const struct powerpc_operand *operand;
1441 offsetT val;
1442 char *file;
1443 unsigned int line;
1444{
1445 if (operand->bits != 32)
1446 {
1447 long min, max;
1448 offsetT test;
1449
1450 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1451 {
d0e9a01c 1452 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH		 1453 max = (1 << operand->bits) - 1;
1454 else
1455 max = (1 << (operand->bits - 1)) - 1;
1456 min = - (1 << (operand->bits - 1));
1457
2b3c4602 1458 if (!ppc_obj64)
252b5132
RH		 1459 {
1460 /* Some people write 32 bit hex constants with the sign
1461 extension done by hand. This shouldn't really be
1462 valid, but, to permit this code to assemble on a 64
1463 bit host, we sign extend the 32 bit value. */
1464 if (val > 0
92161534
ILT		 1465 && (val & (offsetT) 0x80000000) != 0
1466 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH		 1467 {
1468 val -= 0x80000000;
1469 val -= 0x80000000;
1470 }
1471 }
1472 }
1473 else
1474 {
1475 max = (1 << operand->bits) - 1;
1476 min = 0;
1477 }
1478
1479 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1480 test = - val;
1481 else
1482 test = val;
1483
1484 if (test < (offsetT) min || test > (offsetT) max)
e5976317 1485 as_bad_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
252b5132
RH		 1486 }
1487
1488 if (operand->insert)
1489 {
1490 const char *errmsg;
1491
1492 errmsg = NULL;
2b3c4602 1493 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1494 if (errmsg != (const char *) NULL)
0baf16f2 1495 as_bad_where (file, line, errmsg);
252b5132
RH		 1496 }
1497 else
1498 insn |= (((long) val & ((1 << operand->bits) - 1))
1499 << operand->shift);
1500
1501 return insn;
1502}
1503
1504\f
1505#ifdef OBJ_ELF
1506/* Parse @got, etc. and return the desired relocation. */
1507static bfd_reloc_code_real_type
1508ppc_elf_suffix (str_p, exp_p)
1509 char **str_p;
1510 expressionS *exp_p;
1511{
1512 struct map_bfd {
1513 char *string;
b7d7dc63
AM		 1514 unsigned int length : 8;
1515 unsigned int valid32 : 1;
1516 unsigned int valid64 : 1;
1517 unsigned int reloc;
252b5132
RH		 1518 };
1519
1520 char ident[20];
1521 char *str = *str_p;
1522 char *str2;
1523 int ch;
1524 int len;
15c1449b 1525 const struct map_bfd *ptr;
252b5132 1526
b7d7dc63
AM		 1527#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1528#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1529#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1530
15c1449b 1531 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1532 MAP ("l", BFD_RELOC_LO16),
1533 MAP ("h", BFD_RELOC_HI16),
1534 MAP ("ha", BFD_RELOC_HI16_S),
1535 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1536 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1537 MAP ("got", BFD_RELOC_16_GOTOFF),
1538 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1539 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1540 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1541 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1542 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1543 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1544 MAP ("copy", BFD_RELOC_PPC_COPY),
1545 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1546 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1547 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1548 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1549 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1550 MAP ("tls", BFD_RELOC_PPC_TLS),
1551 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1552 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1553 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1554 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1555 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1556 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1557 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1558 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1559 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1560 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1561 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1562 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1563 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1564 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1565 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1566 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1567 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1568 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1569 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1570 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1571 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1572 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1573 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1574 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1575 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1576 MAP32 ("fixup", BFD_RELOC_CTOR),
1577 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1578 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1579 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1580 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1581 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1582 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1583 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1584 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1585 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1586 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1587 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1588 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1589 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1590 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1591 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1592 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1593 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1594 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1595 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1596 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1597 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1598 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1599 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1600 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1601 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1602 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1603 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1604 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1605 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1606 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1607 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1608 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1609 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1610 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1611 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1612 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1613 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1614 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1615 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1616 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1617 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1618 };
1619
1620 if (*str++ != '@')
1621 return BFD_RELOC_UNUSED;
1622
1623 for (ch = *str, str2 = ident;
1624 (str2 < ident + sizeof (ident) - 1
3882b010 1625 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1626 ch = *++str)
1627 {
3882b010 1628 *str2++ = TOLOWER (ch);
252b5132
RH		 1629 }
1630
1631 *str2 = '\0';
1632 len = str2 - ident;
1633
1634 ch = ident[0];
1635 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1636 if (ch == ptr->string[0]
1637 && len == ptr->length
b7d7dc63
AM		 1638 && memcmp (ident, ptr->string, ptr->length) == 0
1639 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1640 {
15c1449b
AM		 1641 int reloc = ptr->reloc;
1642
cdba85ec 1643 if (!ppc_obj64)
5f6db75a
AM		 1644 if (exp_p->X_add_number != 0
1645 && (reloc == (int) BFD_RELOC_16_GOTOFF
1646 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1647 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1648 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1649 as_warn (_("identifier+constant@got means identifier@got+constant"));
1650
1651 /* Now check for identifier@suffix+constant. */
1652 if (*str == '-' || *str == '+')
252b5132 1653 {
5f6db75a
AM		 1654 char *orig_line = input_line_pointer;
1655 expressionS new_exp;
1656
1657 input_line_pointer = str;
1658 expression (&new_exp);
1659 if (new_exp.X_op == O_constant)
252b5132 1660 {
5f6db75a
AM		 1661 exp_p->X_add_number += new_exp.X_add_number;
1662 str = input_line_pointer;
252b5132 1663 }
5f6db75a
AM		 1664
1665 if (&input_line_pointer != str_p)
1666 input_line_pointer = orig_line;
252b5132 1667 }
252b5132 1668 *str_p = str;
0baf16f2 1669
2b3c4602 1670 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1671 && exp_p->X_op == O_symbol
1672 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1673 {
9f2b53d7
AM		 1674 /* Change the symbol so that the dummy .TOC. symbol can be
1675 omitted from the object file. */
0baf16f2
AM		 1676 exp_p->X_add_symbol = &abs_symbol;
1677 }
1678
15c1449b 1679 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1680 }
1681
1682 return BFD_RELOC_UNUSED;
1683}
1684
99a814a1
AM		 1685/* Like normal .long/.short/.word, except support @got, etc.
1686 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1687static void
1688ppc_elf_cons (nbytes)
0baf16f2 1689 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1690{
1691 expressionS exp;
1692 bfd_reloc_code_real_type reloc;
1693
1694 if (is_it_end_of_statement ())
1695 {
1696 demand_empty_rest_of_line ();
1697 return;
1698 }
1699
1700 do
1701 {
1702 expression (&exp);
1703 if (exp.X_op == O_symbol
1704 && *input_line_pointer == '@'
99a814a1
AM		 1705 && (reloc = ppc_elf_suffix (&input_line_pointer,
1706 &exp)) != BFD_RELOC_UNUSED)
252b5132 1707 {
99a814a1
AM		 1708 reloc_howto_type *reloc_howto;
1709 int size;
1710
1711 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1712 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1713
1714 if (size > nbytes)
0baf16f2
AM		 1715 {
1716 as_bad (_("%s relocations do not fit in %d bytes\n"),
1717 reloc_howto->name, nbytes);
1718 }
252b5132
RH		 1719 else
1720 {
0baf16f2
AM		 1721 char *p;
1722 int offset;
252b5132 1723
0baf16f2
AM		 1724 p = frag_more (nbytes);
1725 offset = 0;
1726 if (target_big_endian)
1727 offset = nbytes - size;
99a814a1
AM		 1728 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1729 &exp, 0, reloc);
252b5132
RH		 1730 }
1731 }
1732 else
1733 emit_expr (&exp, (unsigned int) nbytes);
1734 }
1735 while (*input_line_pointer++ == ',');
1736
99a814a1
AM		 1737 /* Put terminator back into stream. */
1738 input_line_pointer--;
252b5132
RH		 1739 demand_empty_rest_of_line ();
1740}
1741
1742/* Solaris pseduo op to change to the .rodata section. */
1743static void
1744ppc_elf_rdata (xxx)
1745 int xxx;
1746{
1747 char *save_line = input_line_pointer;
1748 static char section[] = ".rodata\n";
1749
99a814a1 1750 /* Just pretend this is .section .rodata */
252b5132
RH		 1751 input_line_pointer = section;
1752 obj_elf_section (xxx);
1753
1754 input_line_pointer = save_line;
1755}
1756
99a814a1 1757/* Pseudo op to make file scope bss items. */
252b5132 1758static void
99a814a1 1759ppc_elf_lcomm (xxx)
92161534 1760 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1761{
1762 register char *name;
1763 register char c;
1764 register char *p;
1765 offsetT size;
1766 register symbolS *symbolP;
1767 offsetT align;
1768 segT old_sec;
1769 int old_subsec;
1770 char *pfrag;
1771 int align2;
1772
1773 name = input_line_pointer;
1774 c = get_symbol_end ();
1775
99a814a1 1776 /* just after name is now '\0'. */
252b5132
RH		 1777 p = input_line_pointer;
1778 *p = c;
1779 SKIP_WHITESPACE ();
1780 if (*input_line_pointer != ',')
1781 {
1782 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1783 ignore_rest_of_line ();
1784 return;
1785 }
1786
1787 input_line_pointer++; /* skip ',' */
1788 if ((size = get_absolute_expression ()) < 0)
1789 {
1790 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1791 ignore_rest_of_line ();
1792 return;
1793 }
1794
1795 /* The third argument to .lcomm is the alignment. */
1796 if (*input_line_pointer != ',')
1797 align = 8;
1798 else
1799 {
1800 ++input_line_pointer;
1801 align = get_absolute_expression ();
1802 if (align <= 0)
1803 {
1804 as_warn (_("ignoring bad alignment"));
1805 align = 8;
1806 }
1807 }
1808
1809 *p = 0;
1810 symbolP = symbol_find_or_make (name);
1811 *p = c;
1812
1813 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1814 {
1815 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1816 S_GET_NAME (symbolP));
1817 ignore_rest_of_line ();
1818 return;
1819 }
1820
1821 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1822 {
1823 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1824 S_GET_NAME (symbolP),
1825 (long) S_GET_VALUE (symbolP),
1826 (long) size);
1827
1828 ignore_rest_of_line ();
1829 return;
1830 }
1831
99a814a1 1832 /* Allocate_bss. */
252b5132
RH		 1833 old_sec = now_seg;
1834 old_subsec = now_subseg;
1835 if (align)
1836 {
99a814a1 1837 /* Convert to a power of 2 alignment. */
252b5132
RH		 1838 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1839 if (align != 1)
1840 {
1841 as_bad (_("Common alignment not a power of 2"));
1842 ignore_rest_of_line ();
1843 return;
1844 }
1845 }
1846 else
1847 align2 = 0;
1848
1849 record_alignment (bss_section, align2);
1850 subseg_set (bss_section, 0);
1851 if (align2)
1852 frag_align (align2, 0, 0);
1853 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1854 symbol_get_frag (symbolP)->fr_symbol = 0;
1855 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1856 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1857 (char *) 0);
1858 *pfrag = 0;
1859 S_SET_SIZE (symbolP, size);
1860 S_SET_SEGMENT (symbolP, bss_section);
1861 subseg_set (old_sec, old_subsec);
1862 demand_empty_rest_of_line ();
1863}
1864
1865/* Validate any relocations emitted for -mrelocatable, possibly adding
1866 fixups for word relocations in writable segments, so we can adjust
1867 them at runtime. */
1868static void
1869ppc_elf_validate_fix (fixp, seg)
1870 fixS *fixp;
1871 segT seg;
1872{
1873 if (fixp->fx_done || fixp->fx_pcrel)
1874 return;
1875
1876 switch (shlib)
1877 {
1878 case SHLIB_NONE:
1879 case SHLIB_PIC:
1880 return;
1881
5d6f4f16 1882 case SHLIB_MRELOCATABLE:
252b5132
RH		 1883 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1884 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1885 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1886 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1887 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1888 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1889 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1890 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1891 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1892 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1893 && strcmp (segment_name (seg), ".got2") != 0
1894 && strcmp (segment_name (seg), ".dtors") != 0
1895 && strcmp (segment_name (seg), ".ctors") != 0
1896 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1897 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1898 && strcmp (segment_name (seg), ".eh_frame") != 0
1899 && strcmp (segment_name (seg), ".ex_shared") != 0)
1900 {
1901 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1902 || fixp->fx_r_type != BFD_RELOC_CTOR)
1903 {
1904 as_bad_where (fixp->fx_file, fixp->fx_line,
1905 _("Relocation cannot be done when using -mrelocatable"));
1906 }
1907 }
1908 return;
1909 }
1910}
0baf16f2 1911
7e8d4ab4
AM		 1912/* Prevent elf_frob_file_before_adjust removing a weak undefined
1913 function descriptor sym if the corresponding code sym is used. */
1914
1915void
1916ppc_frob_file_before_adjust ()
0baf16f2 1917{
7e8d4ab4 1918 symbolS *symp;
9232bbb0 1919 asection *toc;
0baf16f2 1920
7e8d4ab4
AM		 1921 if (!ppc_obj64)
1922 return;
1923
1924 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1925 {
7e8d4ab4
AM		 1926 const char *name;
1927 char *dotname;
1928 symbolS *dotsym;
1929 size_t len;
1930
1931 name = S_GET_NAME (symp);
1932 if (name[0] == '.')
1933 continue;
1934
1935 if (! S_IS_WEAK (symp)
1936 || S_IS_DEFINED (symp))
1937 continue;
1938
1939 len = strlen (name) + 1;
1940 dotname = xmalloc (len + 1);
1941 dotname[0] = '.';
1942 memcpy (dotname + 1, name, len);
461b725f 1943 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 1944 free (dotname);
1945 if (dotsym != NULL && (symbol_used_p (dotsym)
1946 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 1947 symbol_mark_used (symp);
1948
0baf16f2
AM		 1949 }
1950
9232bbb0
AM		 1951 toc = bfd_get_section_by_name (stdoutput, ".toc");
1952 if (toc != NULL
1953 && bfd_section_size (stdoutput, toc) > 0x10000)
1954 as_warn (_("TOC section size exceeds 64k"));
1955
7e8d4ab4
AM		 1956 /* Don't emit .TOC. symbol. */
1957 symp = symbol_find (".TOC.");
1958 if (symp != NULL)
1959 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1960}
252b5132
RH		 1961#endif /* OBJ_ELF */
1962\f
1963#ifdef TE_PE
1964
1965/*
99a814a1 1966 * Summary of parse_toc_entry.
252b5132
RH		 1967 *
1968 * in: Input_line_pointer points to the '[' in one of:
1969 *
1970 * [toc] [tocv] [toc32] [toc64]
1971 *
1972 * Anything else is an error of one kind or another.
1973 *
81d4177b 1974 * out:
252b5132
RH		 1975 * return value: success or failure
1976 * toc_kind: kind of toc reference
1977 * input_line_pointer:
1978 * success: first char after the ']'
1979 * failure: unchanged
1980 *
1981 * settings:
1982 *
1983 * [toc] - rv == success, toc_kind = default_toc
1984 * [tocv] - rv == success, toc_kind = data_in_toc
1985 * [toc32] - rv == success, toc_kind = must_be_32
1986 * [toc64] - rv == success, toc_kind = must_be_64
1987 *
1988 */
1989
81d4177b
KH		 1990enum toc_size_qualifier
1991{
252b5132
RH		 1992 default_toc, /* The toc cell constructed should be the system default size */
1993 data_in_toc, /* This is a direct reference to a toc cell */
1994 must_be_32, /* The toc cell constructed must be 32 bits wide */
1995 must_be_64 /* The toc cell constructed must be 64 bits wide */
1996};
1997
1998static int
99a814a1 1999parse_toc_entry (toc_kind)
252b5132
RH		 2000 enum toc_size_qualifier *toc_kind;
2001{
2002 char *start;
2003 char *toc_spec;
2004 char c;
2005 enum toc_size_qualifier t;
2006
99a814a1 2007 /* Save the input_line_pointer. */
252b5132
RH		 2008 start = input_line_pointer;
2009
99a814a1 2010 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2011 ++input_line_pointer;
2012 SKIP_WHITESPACE ();
81d4177b 2013
99a814a1 2014 /* Find the spelling of the operand. */
252b5132
RH		 2015 toc_spec = input_line_pointer;
2016 c = get_symbol_end ();
2017
99a814a1 2018 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2019 {
2020 t = default_toc;
2021 }
99a814a1 2022 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2023 {
2024 t = data_in_toc;
2025 }
99a814a1 2026 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2027 {
2028 t = must_be_32;
2029 }
99a814a1 2030 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2031 {
2032 t = must_be_64;
2033 }
2034 else
2035 {
2036 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2037 *input_line_pointer = c;
2038 input_line_pointer = start;
252b5132
RH		 2039 return 0;
2040 }
2041
99a814a1
AM		 2042 /* Now find the ']'. */
2043 *input_line_pointer = c;
252b5132 2044
81d4177b
KH		 2045 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2046 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2047
2048 if (c != ']')
2049 {
2050 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2051 input_line_pointer = start;
252b5132
RH		 2052 return 0;
2053 }
2054
99a814a1 2055 *toc_kind = t;
252b5132
RH		 2056 return 1;
2057}
2058#endif
2059\f
2060
dc1d03fc 2061#ifdef OBJ_ELF
6a0c61b7
EZ		 2062#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2063static void
dc1d03fc 2064ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2065 unsigned int apu, version;
2066{
2067 unsigned int i;
2068
2069 /* Check we don't already exist. */
2070 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2071 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2072 return;
b34976b6 2073
6a0c61b7
EZ		 2074 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2075 {
2076 if (ppc_apuinfo_num_alloc == 0)
2077 {
2078 ppc_apuinfo_num_alloc = 4;
2079 ppc_apuinfo_list = (unsigned long *)
2080 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2081 }
2082 else
2083 {
2084 ppc_apuinfo_num_alloc += 4;
2085 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2086 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2087 }
2088 }
dc1d03fc 2089 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2090}
2091#undef APUID
dc1d03fc 2092#endif
6a0c61b7
EZ		 2093\f
2094
252b5132
RH		 2095/* We need to keep a list of fixups. We can't simply generate them as
2096 we go, because that would require us to first create the frag, and
2097 that would screw up references to ``.''. */
2098
2099struct ppc_fixup
2100{
2101 expressionS exp;
2102 int opindex;
2103 bfd_reloc_code_real_type reloc;
2104};
2105
2106#define MAX_INSN_FIXUPS (5)
2107
2108/* This routine is called for each instruction to be assembled. */
2109
2110void
2111md_assemble (str)
2112 char *str;
2113{
2114 char *s;
2115 const struct powerpc_opcode *opcode;
2116 unsigned long insn;
2117 const unsigned char *opindex_ptr;
2118 int skip_optional;
2119 int need_paren;
2120 int next_opindex;
2121 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2122 int fc;
2123 char *f;
09b935ac 2124 int addr_mod;
252b5132
RH		 2125 int i;
2126#ifdef OBJ_ELF
2127 bfd_reloc_code_real_type reloc;
2128#endif
2129
2130 /* Get the opcode. */
3882b010 2131 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2132 ;
2133 if (*s != '\0')
2134 *s++ = '\0';
2135
2136 /* Look up the opcode in the hash table. */
2137 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2138 if (opcode == (const struct powerpc_opcode *) NULL)
2139 {
2140 const struct powerpc_macro *macro;
2141
2142 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2143 if (macro == (const struct powerpc_macro *) NULL)
2144 as_bad (_("Unrecognized opcode: `%s'"), str);
2145 else
2146 ppc_macro (s, macro);
2147
2148 return;
2149 }
2150
2151 insn = opcode->opcode;
2152
2153 str = s;
3882b010 2154 while (ISSPACE (*str))
252b5132
RH		 2155 ++str;
2156
2157 /* PowerPC operands are just expressions. The only real issue is
2158 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2159 an optional operand separate the operands only with commas (in some
2160 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2161 have optional operands). Most instructions with optional operands
2162 have only one. Those that have more than one optional operand can
2163 take either all their operands or none. So, before we start seriously
2164 parsing the operands, we check to see if we have optional operands,
2165 and if we do, we count the number of commas to see which operands
2166 have been omitted. */
252b5132
RH		 2167 skip_optional = 0;
2168 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2169 {
2170 const struct powerpc_operand *operand;
2171
2172 operand = &powerpc_operands[*opindex_ptr];
2173 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2174 {
2175 unsigned int opcount;
7fe9cf6b
NC		 2176 unsigned int num_operands_expected;
2177 unsigned int i;
252b5132
RH		 2178
2179 /* There is an optional operand. Count the number of
2180 commas in the input line. */
2181 if (*str == '\0')
2182 opcount = 0;
2183 else
2184 {
2185 opcount = 1;
2186 s = str;
2187 while ((s = strchr (s, ',')) != (char *) NULL)
2188 {
2189 ++opcount;
2190 ++s;
2191 }
2192 }
2193
7fe9cf6b
NC		 2194 /* Compute the number of expected operands.
2195 Do not count fake operands. */
2196 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2197 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2198 ++ num_operands_expected;
2199
252b5132
RH		 2200 /* If there are fewer operands in the line then are called
2201 for by the instruction, we want to skip the optional
1f6c9eb0 2202 operands. */
7fe9cf6b 2203 if (opcount < num_operands_expected)
252b5132
RH		 2204 skip_optional = 1;
2205
2206 break;
2207 }
2208 }
2209
2210 /* Gather the operands. */
2211 need_paren = 0;
2212 next_opindex = 0;
2213 fc = 0;
2214 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2215 {
2216 const struct powerpc_operand *operand;
2217 const char *errmsg;
2218 char *hold;
2219 expressionS ex;
2220 char endc;
2221
2222 if (next_opindex == 0)
2223 operand = &powerpc_operands[*opindex_ptr];
2224 else
2225 {
2226 operand = &powerpc_operands[next_opindex];
2227 next_opindex = 0;
2228 }
252b5132
RH		 2229 errmsg = NULL;
2230
2231 /* If this is a fake operand, then we do not expect anything
2232 from the input. */
2233 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2234 {
2b3c4602 2235 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2236 if (errmsg != (const char *) NULL)
2237 as_bad (errmsg);
2238 continue;
2239 }
2240
2241 /* If this is an optional operand, and we are skipping it, just
2242 insert a zero. */
2243 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2244 && skip_optional)
2245 {
2246 if (operand->insert)
2247 {
2b3c4602 2248 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2249 if (errmsg != (const char *) NULL)
2250 as_bad (errmsg);
2251 }
2252 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2253 next_opindex = *opindex_ptr + 1;
2254 continue;
2255 }
2256
2257 /* Gather the operand. */
2258 hold = input_line_pointer;
2259 input_line_pointer = str;
2260
2261#ifdef TE_PE
81d4177b 2262 if (*input_line_pointer == '[')
252b5132
RH		 2263 {
2264 /* We are expecting something like the second argument here:
99a814a1
AM		 2265 *
2266 * lwz r4,[toc].GS.0.static_int(rtoc)
2267 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2268 * The argument following the `]' must be a symbol name, and the
2269 * register must be the toc register: 'rtoc' or '2'
2270 *
2271 * The effect is to 0 as the displacement field
2272 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2273 * the appropriate variation) reloc against it based on the symbol.
2274 * The linker will build the toc, and insert the resolved toc offset.
2275 *
2276 * Note:
2277 * o The size of the toc entry is currently assumed to be
2278 * 32 bits. This should not be assumed to be a hard coded
2279 * number.
2280 * o In an effort to cope with a change from 32 to 64 bits,
2281 * there are also toc entries that are specified to be
2282 * either 32 or 64 bits:
2283 * lwz r4,[toc32].GS.0.static_int(rtoc)
2284 * lwz r4,[toc64].GS.0.static_int(rtoc)
2285 * These demand toc entries of the specified size, and the
2286 * instruction probably requires it.
2287 */
252b5132
RH		 2288
2289 int valid_toc;
2290 enum toc_size_qualifier toc_kind;
2291 bfd_reloc_code_real_type toc_reloc;
2292
99a814a1
AM		 2293 /* Go parse off the [tocXX] part. */
2294 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2295
81d4177b 2296 if (!valid_toc)
252b5132 2297 {
99a814a1
AM		 2298 /* Note: message has already been issued.
2299 FIXME: what sort of recovery should we do?
2300 demand_rest_of_line (); return; ? */
252b5132
RH		 2301 }
2302
99a814a1
AM		 2303 /* Now get the symbol following the ']'. */
2304 expression (&ex);
252b5132
RH		 2305
2306 switch (toc_kind)
2307 {
2308 case default_toc:
99a814a1
AM		 2309 /* In this case, we may not have seen the symbol yet,
2310 since it is allowed to appear on a .extern or .globl
2311 or just be a label in the .data section. */
252b5132
RH		 2312 toc_reloc = BFD_RELOC_PPC_TOC16;
2313 break;
2314 case data_in_toc:
99a814a1
AM		 2315 /* 1. The symbol must be defined and either in the toc
2316 section, or a global.
2317 2. The reloc generated must have the TOCDEFN flag set
2318 in upper bit mess of the reloc type.
2319 FIXME: It's a little confusing what the tocv
2320 qualifier can be used for. At the very least, I've
2321 seen three uses, only one of which I'm sure I can
2322 explain. */
81d4177b
KH		 2323 if (ex.X_op == O_symbol)
2324 {
252b5132 2325 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2326 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2327 != tocdata_section)
252b5132 2328 {
99a814a1 2329 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2330 }
2331 }
2332
2333 toc_reloc = BFD_RELOC_PPC_TOC16;
2334 break;
2335 case must_be_32:
99a814a1
AM		 2336 /* FIXME: these next two specifically specify 32/64 bit
2337 toc entries. We don't support them today. Is this
2338 the right way to say that? */
252b5132
RH		 2339 toc_reloc = BFD_RELOC_UNUSED;
2340 as_bad (_("Unimplemented toc32 expression modifier"));
2341 break;
2342 case must_be_64:
99a814a1 2343 /* FIXME: see above. */
252b5132
RH		 2344 toc_reloc = BFD_RELOC_UNUSED;
2345 as_bad (_("Unimplemented toc64 expression modifier"));
2346 break;
2347 default:
bc805888 2348 fprintf (stderr,
99a814a1
AM		 2349 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2350 toc_kind);
bc805888 2351 abort ();
252b5132
RH		 2352 break;
2353 }
2354
2355 /* We need to generate a fixup for this expression. */
2356 if (fc >= MAX_INSN_FIXUPS)
2357 as_fatal (_("too many fixups"));
2358
2359 fixups[fc].reloc = toc_reloc;
2360 fixups[fc].exp = ex;
2361 fixups[fc].opindex = *opindex_ptr;
2362 ++fc;
2363
99a814a1
AM		 2364 /* Ok. We've set up the fixup for the instruction. Now make it
2365 look like the constant 0 was found here. */
252b5132
RH		 2366 ex.X_unsigned = 1;
2367 ex.X_op = O_constant;
2368 ex.X_add_number = 0;
2369 ex.X_add_symbol = NULL;
2370 ex.X_op_symbol = NULL;
2371 }
2372
2373 else
2374#endif /* TE_PE */
2375 {
2376 if (! register_name (&ex))
2377 {
2378 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2379 cr_operand = TRUE;
252b5132 2380 expression (&ex);
b34976b6 2381 cr_operand = FALSE;
252b5132
RH		 2382 }
2383 }
2384
2385 str = input_line_pointer;
2386 input_line_pointer = hold;
2387
2388 if (ex.X_op == O_illegal)
2389 as_bad (_("illegal operand"));
2390 else if (ex.X_op == O_absent)
2391 as_bad (_("missing operand"));
2392 else if (ex.X_op == O_register)
2393 {
2394 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2395 (char *) NULL, 0);
2396 }
2397 else if (ex.X_op == O_constant)
2398 {
2399#ifdef OBJ_ELF
81d4177b 2400 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2401 char *orig_str = str;
2402
2403 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2404 switch (reloc)
2405 {
2406 default:
2407 str = orig_str;
2408 break;
2409
2410 case BFD_RELOC_LO16:
2411 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2412 something which cleared it, we always produce a
2413 signed value. */
2414 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2415 ex.X_add_number &= 0xffff;
2416 else
0baf16f2 2417 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2418 break;
2419
2420 case BFD_RELOC_HI16:
0baf16f2
AM		 2421 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2422 ex.X_add_number = PPC_HI (ex.X_add_number);
2423 else
2424 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2425 break;
2426
2427 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2428 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2429 ex.X_add_number = PPC_HA (ex.X_add_number);
2430 else
2431 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2432 break;
2433
0baf16f2
AM		 2434 case BFD_RELOC_PPC64_HIGHER:
2435 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2436 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2437 else
2438 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2439 break;
2440
2441 case BFD_RELOC_PPC64_HIGHER_S:
2442 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2443 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2444 else
2445 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2446 break;
0baf16f2
AM		 2447
2448 case BFD_RELOC_PPC64_HIGHEST:
2449 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2450 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2451 else
2452 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2453 break;
2454
2455 case BFD_RELOC_PPC64_HIGHEST_S:
2456 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2457 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2458 else
2459 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2460 break;
252b5132 2461 }
0baf16f2 2462#endif /* OBJ_ELF */
252b5132
RH		 2463 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2464 (char *) NULL, 0);
2465 }
2466#ifdef OBJ_ELF
2467 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2468 {
cdba85ec
AM		 2469 /* Some TLS tweaks. */
2470 switch (reloc)
2471 {
2472 default:
2473 break;
2474 case BFD_RELOC_PPC_TLS:
2475 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2476 (char *) NULL, 0);
2477 break;
2478 /* We'll only use the 32 (or 64) bit form of these relocations
2479 in constants. Instructions get the 16 bit form. */
2480 case BFD_RELOC_PPC_DTPREL:
2481 reloc = BFD_RELOC_PPC_DTPREL16;
2482 break;
2483 case BFD_RELOC_PPC_TPREL:
2484 reloc = BFD_RELOC_PPC_TPREL16;
2485 break;
2486 }
2487
99a814a1
AM		 2488 /* For the absolute forms of branches, convert the PC
2489 relative form back into the absolute. */
252b5132
RH		 2490 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2491 {
2492 switch (reloc)
2493 {
2494 case BFD_RELOC_PPC_B26:
2495 reloc = BFD_RELOC_PPC_BA26;
2496 break;
2497 case BFD_RELOC_PPC_B16:
2498 reloc = BFD_RELOC_PPC_BA16;
2499 break;
2500 case BFD_RELOC_PPC_B16_BRTAKEN:
2501 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2502 break;
2503 case BFD_RELOC_PPC_B16_BRNTAKEN:
2504 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2505 break;
2506 default:
2507 break;
2508 }
2509 }
2510
2b3c4602 2511 if (ppc_obj64
adadcc0c 2512 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2513 {
2514 switch (reloc)
2515 {
2516 case BFD_RELOC_16:
2517 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2518 break;
2519 case BFD_RELOC_LO16:
2520 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2521 break;
2522 case BFD_RELOC_16_GOTOFF:
2523 reloc = BFD_RELOC_PPC64_GOT16_DS;
2524 break;
2525 case BFD_RELOC_LO16_GOTOFF:
2526 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2527 break;
2528 case BFD_RELOC_LO16_PLTOFF:
2529 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2530 break;
1cfc59d5 2531 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2532 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2533 break;
2534 case BFD_RELOC_LO16_BASEREL:
2535 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2536 break;
2537 case BFD_RELOC_PPC_TOC16:
2538 reloc = BFD_RELOC_PPC64_TOC16_DS;
2539 break;
2540 case BFD_RELOC_PPC64_TOC16_LO:
2541 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2542 break;
2543 case BFD_RELOC_PPC64_PLTGOT16:
2544 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2545 break;
2546 case BFD_RELOC_PPC64_PLTGOT16_LO:
2547 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2548 break;
cdba85ec
AM		 2549 case BFD_RELOC_PPC_DTPREL16:
2550 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2551 break;
2552 case BFD_RELOC_PPC_DTPREL16_LO:
2553 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2554 break;
2555 case BFD_RELOC_PPC_TPREL16:
2556 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2557 break;
2558 case BFD_RELOC_PPC_TPREL16_LO:
2559 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2560 break;
2561 case BFD_RELOC_PPC_GOT_DTPREL16:
2562 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2563 case BFD_RELOC_PPC_GOT_TPREL16:
2564 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2565 break;
0baf16f2
AM		 2566 default:
2567 as_bad (_("unsupported relocation for DS offset field"));
2568 break;
2569 }
2570 }
2571
252b5132
RH		 2572 /* We need to generate a fixup for this expression. */
2573 if (fc >= MAX_INSN_FIXUPS)
2574 as_fatal (_("too many fixups"));
2575 fixups[fc].exp = ex;
2576 fixups[fc].opindex = 0;
2577 fixups[fc].reloc = reloc;
2578 ++fc;
2579 }
2580#endif /* OBJ_ELF */
2581
2582 else
2583 {
2584 /* We need to generate a fixup for this expression. */
2585 if (fc >= MAX_INSN_FIXUPS)
2586 as_fatal (_("too many fixups"));
2587 fixups[fc].exp = ex;
2588 fixups[fc].opindex = *opindex_ptr;
2589 fixups[fc].reloc = BFD_RELOC_UNUSED;
2590 ++fc;
2591 }
2592
2593 if (need_paren)
2594 {
2595 endc = ')';
2596 need_paren = 0;
2597 }
2598 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2599 {
2600 endc = '(';
2601 need_paren = 1;
2602 }
2603 else
2604 endc = ',';
2605
2606 /* The call to expression should have advanced str past any
2607 whitespace. */
2608 if (*str != endc
2609 && (endc != ',' || *str != '\0'))
2610 {
2611 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2612 break;
2613 }
2614
2615 if (*str != '\0')
2616 ++str;
2617 }
2618
3882b010 2619 while (ISSPACE (*str))
252b5132
RH		 2620 ++str;
2621
2622 if (*str != '\0')
2623 as_bad (_("junk at end of line: `%s'"), str);
2624
dc1d03fc 2625#ifdef OBJ_ELF
6a0c61b7
EZ		 2626 /* Do we need/want a APUinfo section? */
2627 if (ppc_cpu & (PPC_OPCODE_SPE
2628 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2629 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2630 | PPC_OPCODE_RFMCI))
2631 {
2632 /* These are all version "1". */
2633 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2634 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2635 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2636 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2637 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2638 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2639 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2640 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2641 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2642 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2643 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2644 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2645 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2646 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2647 }
dc1d03fc 2648#endif
6a0c61b7 2649
252b5132
RH		 2650 /* Write out the instruction. */
2651 f = frag_more (4);
09b935ac
AM		 2652 addr_mod = frag_now_fix () & 3;
2653 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2654 as_bad (_("instruction address is not a multiple of 4"));
2655 frag_now->insn_addr = addr_mod;
2656 frag_now->has_code = 1;
252b5132
RH		 2657 md_number_to_chars (f, insn, 4);
2658
5d6f4f16
GK		 2659#ifdef OBJ_ELF
2660 dwarf2_emit_insn (4);
2661#endif
2662
252b5132
RH		 2663 /* Create any fixups. At this point we do not use a
2664 bfd_reloc_code_real_type, but instead just use the
2665 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2666 handle fixups for any operand type, although that is admittedly
2667 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2668 md_apply_fix. */
252b5132
RH		 2669 for (i = 0; i < fc; i++)
2670 {
2671 const struct powerpc_operand *operand;
2672
2673 operand = &powerpc_operands[fixups[i].opindex];
2674 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2675 {
99a814a1 2676 reloc_howto_type *reloc_howto;
252b5132
RH		 2677 int size;
2678 int offset;
2679 fixS *fixP;
2680
99a814a1 2681 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2682 if (!reloc_howto)
2683 abort ();
2684
2685 size = bfd_get_reloc_size (reloc_howto);
2686 offset = target_big_endian ? (4 - size) : 0;
2687
2688 if (size < 1 || size > 4)
bc805888 2689 abort ();
252b5132 2690
99a814a1
AM		 2691 fixP = fix_new_exp (frag_now,
2692 f - frag_now->fr_literal + offset,
2693 size,
2694 &fixups[i].exp,
2695 reloc_howto->pc_relative,
252b5132
RH		 2696 fixups[i].reloc);
2697
2698 /* Turn off complaints that the addend is too large for things like
2699 foo+100000@ha. */
2700 switch (fixups[i].reloc)
2701 {
2702 case BFD_RELOC_16_GOTOFF:
2703 case BFD_RELOC_PPC_TOC16:
2704 case BFD_RELOC_LO16:
2705 case BFD_RELOC_HI16:
2706 case BFD_RELOC_HI16_S:
0baf16f2 2707#ifdef OBJ_ELF
0baf16f2
AM		 2708 case BFD_RELOC_PPC64_HIGHER:
2709 case BFD_RELOC_PPC64_HIGHER_S:
2710 case BFD_RELOC_PPC64_HIGHEST:
2711 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2712#endif
252b5132
RH		 2713 fixP->fx_no_overflow = 1;
2714 break;
2715 default:
2716 break;
2717 }
2718 }
2719 else
99a814a1
AM		 2720 fix_new_exp (frag_now,
2721 f - frag_now->fr_literal,
2722 4,
252b5132
RH		 2723 &fixups[i].exp,
2724 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2725 ((bfd_reloc_code_real_type)
99a814a1 2726 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2727 }
2728}
2729
2730/* Handle a macro. Gather all the operands, transform them as
2731 described by the macro, and call md_assemble recursively. All the
2732 operands are separated by commas; we don't accept parentheses
2733 around operands here. */
2734
2735static void
2736ppc_macro (str, macro)
2737 char *str;
2738 const struct powerpc_macro *macro;
2739{
2740 char *operands[10];
2741 unsigned int count;
2742 char *s;
2743 unsigned int len;
2744 const char *format;
2745 int arg;
2746 char *send;
2747 char *complete;
2748
2749 /* Gather the users operands into the operands array. */
2750 count = 0;
2751 s = str;
2752 while (1)
2753 {
2754 if (count >= sizeof operands / sizeof operands[0])
2755 break;
2756 operands[count++] = s;
2757 s = strchr (s, ',');
2758 if (s == (char *) NULL)
2759 break;
2760 *s++ = '\0';
81d4177b 2761 }
252b5132
RH		 2762
2763 if (count != macro->operands)
2764 {
2765 as_bad (_("wrong number of operands"));
2766 return;
2767 }
2768
2769 /* Work out how large the string must be (the size is unbounded
2770 because it includes user input). */
2771 len = 0;
2772 format = macro->format;
2773 while (*format != '\0')
2774 {
2775 if (*format != '%')
2776 {
2777 ++len;
2778 ++format;
2779 }
2780 else
2781 {
2782 arg = strtol (format + 1, &send, 10);
2783 know (send != format && arg >= 0 && arg < count);
2784 len += strlen (operands[arg]);
2785 format = send;
2786 }
2787 }
2788
2789 /* Put the string together. */
2790 complete = s = (char *) alloca (len + 1);
2791 format = macro->format;
2792 while (*format != '\0')
2793 {
2794 if (*format != '%')
2795 *s++ = *format++;
2796 else
2797 {
2798 arg = strtol (format + 1, &send, 10);
2799 strcpy (s, operands[arg]);
2800 s += strlen (s);
2801 format = send;
2802 }
2803 }
2804 *s = '\0';
2805
2806 /* Assemble the constructed instruction. */
2807 md_assemble (complete);
81d4177b 2808}
252b5132
RH		 2809\f
2810#ifdef OBJ_ELF
99a814a1 2811/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2812
2813int
2814ppc_section_letter (letter, ptr_msg)
2815 int letter;
2816 char **ptr_msg;
2817{
2818 if (letter == 'e')
2819 return SHF_EXCLUDE;
2820
13ae64f3 2821 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2822 return -1;
252b5132
RH		 2823}
2824
2825int
9de8d8f1
RH		 2826ppc_section_word (str, len)
2827 char *str;
2828 size_t len;
252b5132 2829{
9de8d8f1
RH		 2830 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2831 return SHF_EXCLUDE;
252b5132 2832
9de8d8f1 2833 return -1;
252b5132
RH		 2834}
2835
2836int
9de8d8f1
RH		 2837ppc_section_type (str, len)
2838 char *str;
2839 size_t len;
252b5132 2840{
9de8d8f1
RH		 2841 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2842 return SHT_ORDERED;
252b5132 2843
9de8d8f1 2844 return -1;
252b5132
RH		 2845}
2846
2847int
2848ppc_section_flags (flags, attr, type)
2849 int flags;
2850 int attr;
2851 int type;
2852{
2853 if (type == SHT_ORDERED)
2854 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2855
2856 if (attr & SHF_EXCLUDE)
2857 flags |= SEC_EXCLUDE;
2858
2859 return flags;
2860}
2861#endif /* OBJ_ELF */
2862
2863\f
2864/* Pseudo-op handling. */
2865
2866/* The .byte pseudo-op. This is similar to the normal .byte
2867 pseudo-op, but it can also take a single ASCII string. */
2868
2869static void
2870ppc_byte (ignore)
92161534 2871 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2872{
2873 if (*input_line_pointer != '\"')
2874 {
2875 cons (1);
2876 return;
2877 }
2878
2879 /* Gather characters. A real double quote is doubled. Unusual
2880 characters are not permitted. */
2881 ++input_line_pointer;
2882 while (1)
2883 {
2884 char c;
2885
2886 c = *input_line_pointer++;
2887
2888 if (c == '\"')
2889 {
2890 if (*input_line_pointer != '\"')
2891 break;
2892 ++input_line_pointer;
2893 }
2894
2895 FRAG_APPEND_1_CHAR (c);
2896 }
2897
2898 demand_empty_rest_of_line ();
2899}
2900\f
2901#ifdef OBJ_XCOFF
2902
2903/* XCOFF specific pseudo-op handling. */
2904
2905/* This is set if we are creating a .stabx symbol, since we don't want
2906 to handle symbol suffixes for such symbols. */
b34976b6 2907static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2908
2909/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2910 symbols in the .bss segment as though they were local common
67c1ffbe 2911 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2912 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2913
2914static void
2915ppc_comm (lcomm)
2916 int lcomm;
2917{
2918 asection *current_seg = now_seg;
2919 subsegT current_subseg = now_subseg;
2920 char *name;
2921 char endc;
2922 char *end_name;
2923 offsetT size;
2924 offsetT align;
2925 symbolS *lcomm_sym = NULL;
2926 symbolS *sym;
2927 char *pfrag;
2928
2929 name = input_line_pointer;
2930 endc = get_symbol_end ();
2931 end_name = input_line_pointer;
2932 *end_name = endc;
2933
2934 if (*input_line_pointer != ',')
2935 {
2936 as_bad (_("missing size"));
2937 ignore_rest_of_line ();
2938 return;
2939 }
2940 ++input_line_pointer;
2941
2942 size = get_absolute_expression ();
2943 if (size < 0)
2944 {
2945 as_bad (_("negative size"));
2946 ignore_rest_of_line ();
2947 return;
2948 }
2949
2950 if (! lcomm)
2951 {
2952 /* The third argument to .comm is the alignment. */
2953 if (*input_line_pointer != ',')
1ad63b2f 2954 align = 2;
252b5132
RH		 2955 else
2956 {
2957 ++input_line_pointer;
2958 align = get_absolute_expression ();
2959 if (align <= 0)
2960 {
2961 as_warn (_("ignoring bad alignment"));
1ad63b2f 2962 align = 2;
252b5132
RH		 2963 }
2964 }
2965 }
2966 else
2967 {
2968 char *lcomm_name;
2969 char lcomm_endc;
2970
1ad63b2f 2971 if (size <= 4)
252b5132
RH		 2972 align = 2;
2973 else
2974 align = 3;
2975
2976 /* The third argument to .lcomm appears to be the real local
2977 common symbol to create. References to the symbol named in
2978 the first argument are turned into references to the third
2979 argument. */
2980 if (*input_line_pointer != ',')
2981 {
2982 as_bad (_("missing real symbol name"));
2983 ignore_rest_of_line ();
2984 return;
2985 }
2986 ++input_line_pointer;
2987
2988 lcomm_name = input_line_pointer;
2989 lcomm_endc = get_symbol_end ();
81d4177b 2990
252b5132
RH		 2991 lcomm_sym = symbol_find_or_make (lcomm_name);
2992
2993 *input_line_pointer = lcomm_endc;
2994 }
2995
2996 *end_name = '\0';
2997 sym = symbol_find_or_make (name);
2998 *end_name = endc;
2999
3000 if (S_IS_DEFINED (sym)
3001 || S_GET_VALUE (sym) != 0)
3002 {
3003 as_bad (_("attempt to redefine symbol"));
3004 ignore_rest_of_line ();
3005 return;
3006 }
81d4177b 3007
252b5132 3008 record_alignment (bss_section, align);
81d4177b 3009
252b5132
RH		 3010 if (! lcomm
3011 || ! S_IS_DEFINED (lcomm_sym))
3012 {
3013 symbolS *def_sym;
3014 offsetT def_size;
3015
3016 if (! lcomm)
3017 {
3018 def_sym = sym;
3019 def_size = size;
3020 S_SET_EXTERNAL (sym);
3021 }
3022 else
3023 {
809ffe0d 3024 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3025 def_sym = lcomm_sym;
3026 def_size = 0;
3027 }
3028
3029 subseg_set (bss_section, 1);
3030 frag_align (align, 0, 0);
81d4177b 3031
809ffe0d 3032 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3033 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3034 def_size, (char *) NULL);
3035 *pfrag = 0;
3036 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3037 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3038 }
3039 else if (lcomm)
3040 {
3041 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3042 symbol_get_frag (lcomm_sym)->fr_offset =
3043 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3044 &~ ((1 << align) - 1));
809ffe0d
ILT		 3045 if (align > symbol_get_tc (lcomm_sym)->align)
3046 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3047 }
3048
3049 if (lcomm)
3050 {
3051 /* Make sym an offset from lcomm_sym. */
3052 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3053 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3054 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3055 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3056 }
3057
3058 subseg_set (current_seg, current_subseg);
3059
3060 demand_empty_rest_of_line ();
3061}
3062
3063/* The .csect pseudo-op. This switches us into a different
3064 subsegment. The first argument is a symbol whose value is the
3065 start of the .csect. In COFF, csect symbols get special aux
3066 entries defined by the x_csect field of union internal_auxent. The
3067 optional second argument is the alignment (the default is 2). */
3068
3069static void
3070ppc_csect (ignore)
5480ccf3 3071 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3072{
3073 char *name;
3074 char endc;
3075 symbolS *sym;
931e13a6 3076 offsetT align;
252b5132
RH		 3077
3078 name = input_line_pointer;
3079 endc = get_symbol_end ();
81d4177b 3080
252b5132
RH		 3081 sym = symbol_find_or_make (name);
3082
3083 *input_line_pointer = endc;
3084
3085 if (S_GET_NAME (sym)[0] == '\0')
3086 {
3087 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3088 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3089 }
3090
931e13a6 3091 align = 2;
252b5132
RH		 3092 if (*input_line_pointer == ',')
3093 {
3094 ++input_line_pointer;
931e13a6 3095 align = get_absolute_expression ();
252b5132
RH		 3096 }
3097
931e13a6
AM		 3098 ppc_change_csect (sym, align);
3099
252b5132
RH		 3100 demand_empty_rest_of_line ();
3101}
3102
3103/* Change to a different csect. */
3104
3105static void
931e13a6 3106ppc_change_csect (sym, align)
252b5132 3107 symbolS *sym;
931e13a6 3108 offsetT align;
252b5132
RH		 3109{
3110 if (S_IS_DEFINED (sym))
809ffe0d 3111 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3112 else
3113 {
3114 symbolS **list_ptr;
3115 int after_toc;
3116 int hold_chunksize;
3117 symbolS *list;
931e13a6
AM		 3118 int is_code;
3119 segT sec;
252b5132
RH		 3120
3121 /* This is a new csect. We need to look at the symbol class to
3122 figure out whether it should go in the text section or the
3123 data section. */
3124 after_toc = 0;
931e13a6 3125 is_code = 0;
809ffe0d 3126 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3127 {
3128 case XMC_PR:
3129 case XMC_RO:
3130 case XMC_DB:
3131 case XMC_GL:
3132 case XMC_XO:
3133 case XMC_SV:
3134 case XMC_TI:
3135 case XMC_TB:
3136 S_SET_SEGMENT (sym, text_section);
809ffe0d 3137 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3138 ++ppc_text_subsegment;
3139 list_ptr = &ppc_text_csects;
931e13a6 3140 is_code = 1;
252b5132
RH		 3141 break;
3142 case XMC_RW:
3143 case XMC_TC0:
3144 case XMC_TC:
3145 case XMC_DS:
3146 case XMC_UA:
3147 case XMC_BS:
3148 case XMC_UC:
3149 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3150 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3151 == ppc_data_subsegment))
252b5132
RH		 3152 after_toc = 1;
3153 S_SET_SEGMENT (sym, data_section);
809ffe0d 3154 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3155 ++ppc_data_subsegment;
3156 list_ptr = &ppc_data_csects;
3157 break;
3158 default:
3159 abort ();
3160 }
3161
3162 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3163 changing subsegments, so that we don't use a lot of memory
3164 space for what may be a small section. */
252b5132
RH		 3165 hold_chunksize = chunksize;
3166 chunksize = 64;
3167
931e13a6
AM		 3168 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3169 symbol_get_tc (sym)->subseg);
252b5132
RH		 3170
3171 chunksize = hold_chunksize;
3172
3173 if (after_toc)
3174 ppc_after_toc_frag = frag_now;
3175
931e13a6
AM		 3176 record_alignment (sec, align);
3177 if (is_code)
3178 frag_align_code (align, 0);
3179 else
3180 frag_align (align, 0, 0);
3181
809ffe0d 3182 symbol_set_frag (sym, frag_now);
252b5132
RH		 3183 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3184
931e13a6 3185 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3186 symbol_get_tc (sym)->output = 1;
3187 symbol_get_tc (sym)->within = sym;
81d4177b 3188
252b5132 3189 for (list = *list_ptr;
809ffe0d
ILT		 3190 symbol_get_tc (list)->next != (symbolS *) NULL;
3191 list = symbol_get_tc (list)->next)
252b5132 3192 ;
809ffe0d 3193 symbol_get_tc (list)->next = sym;
81d4177b 3194
252b5132 3195 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3196 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3197 &symbol_lastP);
252b5132
RH		 3198 }
3199
3200 ppc_current_csect = sym;
3201}
3202
3203/* This function handles the .text and .data pseudo-ops. These
3204 pseudo-ops aren't really used by XCOFF; we implement them for the
3205 convenience of people who aren't used to XCOFF. */
3206
3207static void
3208ppc_section (type)
3209 int type;
3210{
3211 const char *name;
3212 symbolS *sym;
3213
3214 if (type == 't')
3215 name = ".text[PR]";
3216 else if (type == 'd')
3217 name = ".data[RW]";
3218 else
3219 abort ();
3220
3221 sym = symbol_find_or_make (name);
3222
931e13a6 3223 ppc_change_csect (sym, 2);
252b5132
RH		 3224
3225 demand_empty_rest_of_line ();
3226}
3227
3228/* This function handles the .section pseudo-op. This is mostly to
3229 give an error, since XCOFF only supports .text, .data and .bss, but
3230 we do permit the user to name the text or data section. */
3231
3232static void
3233ppc_named_section (ignore)
5480ccf3 3234 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3235{
3236 char *user_name;
3237 const char *real_name;
3238 char c;
3239 symbolS *sym;
3240
3241 user_name = input_line_pointer;
3242 c = get_symbol_end ();
3243
3244 if (strcmp (user_name, ".text") == 0)
3245 real_name = ".text[PR]";
3246 else if (strcmp (user_name, ".data") == 0)
3247 real_name = ".data[RW]";
3248 else
3249 {
3250 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3251 *input_line_pointer = c;
3252 ignore_rest_of_line ();
3253 return;
3254 }
3255
3256 *input_line_pointer = c;
3257
3258 sym = symbol_find_or_make (real_name);
3259
931e13a6 3260 ppc_change_csect (sym, 2);
252b5132
RH		 3261
3262 demand_empty_rest_of_line ();
3263}
3264
3265/* The .extern pseudo-op. We create an undefined symbol. */
3266
3267static void
3268ppc_extern (ignore)
5480ccf3 3269 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3270{
3271 char *name;
3272 char endc;
3273
3274 name = input_line_pointer;
3275 endc = get_symbol_end ();
3276
3277 (void) symbol_find_or_make (name);
3278
3279 *input_line_pointer = endc;
3280
3281 demand_empty_rest_of_line ();
3282}
3283
3284/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3285
3286static void
3287ppc_lglobl (ignore)
5480ccf3 3288 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3289{
3290 char *name;
3291 char endc;
3292 symbolS *sym;
3293
3294 name = input_line_pointer;
3295 endc = get_symbol_end ();
3296
3297 sym = symbol_find_or_make (name);
3298
3299 *input_line_pointer = endc;
3300
809ffe0d 3301 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3302
3303 demand_empty_rest_of_line ();
3304}
3305
3306/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3307 although I don't know why it bothers. */
3308
3309static void
3310ppc_rename (ignore)
5480ccf3 3311 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3312{
3313 char *name;
3314 char endc;
3315 symbolS *sym;
3316 int len;
3317
3318 name = input_line_pointer;
3319 endc = get_symbol_end ();
3320
3321 sym = symbol_find_or_make (name);
3322
3323 *input_line_pointer = endc;
3324
3325 if (*input_line_pointer != ',')
3326 {
3327 as_bad (_("missing rename string"));
3328 ignore_rest_of_line ();
3329 return;
3330 }
3331 ++input_line_pointer;
3332
809ffe0d 3333 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3334
3335 demand_empty_rest_of_line ();
3336}
3337
3338/* The .stabx pseudo-op. This is similar to a normal .stabs
3339 pseudo-op, but slightly different. A sample is
3340 .stabx "main:F-1",.main,142,0
3341 The first argument is the symbol name to create. The second is the
3342 value, and the third is the storage class. The fourth seems to be
3343 always zero, and I am assuming it is the type. */
3344
3345static void
3346ppc_stabx (ignore)
5480ccf3 3347 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3348{
3349 char *name;
3350 int len;
3351 symbolS *sym;
3352 expressionS exp;
3353
3354 name = demand_copy_C_string (&len);
3355
3356 if (*input_line_pointer != ',')
3357 {
3358 as_bad (_("missing value"));
3359 return;
3360 }
3361 ++input_line_pointer;
3362
b34976b6 3363 ppc_stab_symbol = TRUE;
252b5132 3364 sym = symbol_make (name);
b34976b6 3365 ppc_stab_symbol = FALSE;
252b5132 3366
809ffe0d 3367 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3368
3369 (void) expression (&exp);
3370
3371 switch (exp.X_op)
3372 {
3373 case O_illegal:
3374 case O_absent:
3375 case O_big:
3376 as_bad (_("illegal .stabx expression; zero assumed"));
3377 exp.X_add_number = 0;
3378 /* Fall through. */
3379 case O_constant:
3380 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3381 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3382 break;
3383
3384 case O_symbol:
3385 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3386 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3387 else
3388 {
3389 S_SET_VALUE (sym,
3390 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3391 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3392 }
3393 break;
3394
3395 default:
3396 /* The value is some complex expression. This will probably
99a814a1
AM		 3397 fail at some later point, but this is probably the right
3398 thing to do here. */
809ffe0d 3399 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3400 break;
3401 }
3402
3403 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3404 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3405
3406 if (*input_line_pointer != ',')
3407 {
3408 as_bad (_("missing class"));
3409 return;
3410 }
3411 ++input_line_pointer;
3412
3413 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3414
3415 if (*input_line_pointer != ',')
3416 {
3417 as_bad (_("missing type"));
3418 return;
3419 }
3420 ++input_line_pointer;
3421
3422 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3423
809ffe0d 3424 symbol_get_tc (sym)->output = 1;
252b5132 3425
6877bb43 3426 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3427
809ffe0d 3428 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3429
41ea10b1 3430 /* In this case :
99a814a1 3431
41ea10b1
TR		 3432 .bs name
3433 .stabx "z",arrays_,133,0
3434 .es
99a814a1 3435
41ea10b1 3436 .comm arrays_,13768,3
99a814a1 3437
41ea10b1
TR		 3438 resolve_symbol_value will copy the exp's "within" into sym's when the
3439 offset is 0. Since this seems to be corner case problem,
3440 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3441 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3442
3443 if (exp.X_op == O_symbol)
41ea10b1
TR		 3444 {
3445 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3446 }
6877bb43 3447 }
99a814a1 3448
252b5132
RH		 3449 if (exp.X_op != O_symbol
3450 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3451 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3452 ppc_frob_label (sym);
3453 else
3454 {
3455 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3456 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3457 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3458 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3459 }
3460
3461 demand_empty_rest_of_line ();
3462}
3463
3464/* The .function pseudo-op. This takes several arguments. The first
3465 argument seems to be the external name of the symbol. The second
67c1ffbe 3466 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3467 uses the same name for both. I have no idea what the third and
3468 fourth arguments are meant to be. The optional fifth argument is
3469 an expression for the size of the function. In COFF this symbol
3470 gets an aux entry like that used for a csect. */
3471
3472static void
3473ppc_function (ignore)
5480ccf3 3474 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3475{
3476 char *name;
3477 char endc;
3478 char *s;
3479 symbolS *ext_sym;
3480 symbolS *lab_sym;
3481
3482 name = input_line_pointer;
3483 endc = get_symbol_end ();
3484
3485 /* Ignore any [PR] suffix. */
3486 name = ppc_canonicalize_symbol_name (name);
3487 s = strchr (name, '[');
3488 if (s != (char *) NULL
3489 && strcmp (s + 1, "PR]") == 0)
3490 *s = '\0';
3491
3492 ext_sym = symbol_find_or_make (name);
3493
3494 *input_line_pointer = endc;
3495
3496 if (*input_line_pointer != ',')
3497 {
3498 as_bad (_("missing symbol name"));
3499 ignore_rest_of_line ();
3500 return;
3501 }
3502 ++input_line_pointer;
3503
3504 name = input_line_pointer;
3505 endc = get_symbol_end ();
3506
3507 lab_sym = symbol_find_or_make (name);
3508
3509 *input_line_pointer = endc;
3510
3511 if (ext_sym != lab_sym)
3512 {
809ffe0d
ILT		 3513 expressionS exp;
3514
3515 exp.X_op = O_symbol;
3516 exp.X_add_symbol = lab_sym;
3517 exp.X_op_symbol = NULL;
3518 exp.X_add_number = 0;
3519 exp.X_unsigned = 0;
3520 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3521 }
3522
809ffe0d
ILT		 3523 if (symbol_get_tc (ext_sym)->class == -1)
3524 symbol_get_tc (ext_sym)->class = XMC_PR;
3525 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3526
3527 if (*input_line_pointer == ',')
3528 {
3529 expressionS ignore;
3530
3531 /* Ignore the third argument. */
3532 ++input_line_pointer;
3533 expression (&ignore);
3534 if (*input_line_pointer == ',')
3535 {
3536 /* Ignore the fourth argument. */
3537 ++input_line_pointer;
3538 expression (&ignore);
3539 if (*input_line_pointer == ',')
3540 {
3541 /* The fifth argument is the function size. */
3542 ++input_line_pointer;
809ffe0d
ILT		 3543 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3544 absolute_section,
3545 (valueT) 0,
3546 &zero_address_frag);
3547 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3548 }
3549 }
3550 }
3551
3552 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3553 SF_SET_FUNCTION (ext_sym);
3554 SF_SET_PROCESS (ext_sym);
3555 coff_add_linesym (ext_sym);
3556
3557 demand_empty_rest_of_line ();
3558}
3559
3560/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3561 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3562 with the correct line number */
5d6255fe 3563
8642cce8 3564static symbolS *saved_bi_sym = 0;
252b5132
RH		 3565
3566static void
3567ppc_bf (ignore)
5480ccf3 3568 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3569{
3570 symbolS *sym;
3571
3572 sym = symbol_make (".bf");
3573 S_SET_SEGMENT (sym, text_section);
809ffe0d 3574 symbol_set_frag (sym, frag_now);
252b5132
RH		 3575 S_SET_VALUE (sym, frag_now_fix ());
3576 S_SET_STORAGE_CLASS (sym, C_FCN);
3577
3578 coff_line_base = get_absolute_expression ();
3579
3580 S_SET_NUMBER_AUXILIARY (sym, 1);
3581 SA_SET_SYM_LNNO (sym, coff_line_base);
3582
8642cce8 3583 /* Line number for bi. */
5d6255fe 3584 if (saved_bi_sym)
8642cce8
TR		 3585 {
3586 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3587 saved_bi_sym = 0;
3588 }
5d6255fe 3589
8642cce8 3590
809ffe0d 3591 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3592
3593 ppc_frob_label (sym);
3594
3595 demand_empty_rest_of_line ();
3596}
3597
3598/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3599 ".ef", except that the line number is absolute, not relative to the
3600 most recent ".bf" symbol. */
3601
3602static void
3603ppc_ef (ignore)
5480ccf3 3604 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3605{
3606 symbolS *sym;
3607
3608 sym = symbol_make (".ef");
3609 S_SET_SEGMENT (sym, text_section);
809ffe0d 3610 symbol_set_frag (sym, frag_now);
252b5132
RH		 3611 S_SET_VALUE (sym, frag_now_fix ());
3612 S_SET_STORAGE_CLASS (sym, C_FCN);
3613 S_SET_NUMBER_AUXILIARY (sym, 1);
3614 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3615 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3616
3617 ppc_frob_label (sym);
3618
3619 demand_empty_rest_of_line ();
3620}
3621
3622/* The .bi and .ei pseudo-ops. These take a string argument and
3623 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3624 the symbol list. The value of .bi will be know when the next .bf
3625 is encountered. */
252b5132
RH		 3626
3627static void
3628ppc_biei (ei)
3629 int ei;
3630{
3631 static symbolS *last_biei;
3632
3633 char *name;
3634 int len;
3635 symbolS *sym;
3636 symbolS *look;
3637
3638 name = demand_copy_C_string (&len);
3639
3640 /* The value of these symbols is actually file offset. Here we set
3641 the value to the index into the line number entries. In
3642 ppc_frob_symbols we set the fix_line field, which will cause BFD
3643 to do the right thing. */
3644
3645 sym = symbol_make (name);
3646 /* obj-coff.c currently only handles line numbers correctly in the
3647 .text section. */
3648 S_SET_SEGMENT (sym, text_section);
3649 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3650 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3651
3652 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3653 symbol_get_tc (sym)->output = 1;
81d4177b 3654
8642cce8 3655 /* Save bi. */
5d6255fe 3656 if (ei)
8642cce8
TR		 3657 saved_bi_sym = 0;
3658 else
3659 saved_bi_sym = sym;
3660
252b5132
RH		 3661 for (look = last_biei ? last_biei : symbol_rootP;
3662 (look != (symbolS *) NULL
3663 && (S_GET_STORAGE_CLASS (look) == C_FILE
3664 || S_GET_STORAGE_CLASS (look) == C_BINCL
3665 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3666 look = symbol_next (look))
3667 ;
3668 if (look != (symbolS *) NULL)
3669 {
3670 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3671 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3672 last_biei = sym;
3673 }
3674
3675 demand_empty_rest_of_line ();
3676}
3677
3678/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3679 There is one argument, which is a csect symbol. The value of the
3680 .bs symbol is the index of this csect symbol. */
3681
3682static void
3683ppc_bs (ignore)
5480ccf3 3684 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3685{
3686 char *name;
3687 char endc;
3688 symbolS *csect;
3689 symbolS *sym;
3690
3691 if (ppc_current_block != NULL)
3692 as_bad (_("nested .bs blocks"));
3693
3694 name = input_line_pointer;
3695 endc = get_symbol_end ();
3696
3697 csect = symbol_find_or_make (name);
3698
3699 *input_line_pointer = endc;
3700
3701 sym = symbol_make (".bs");
3702 S_SET_SEGMENT (sym, now_seg);
3703 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3704 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3705 symbol_get_tc (sym)->output = 1;
252b5132 3706
809ffe0d 3707 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3708
3709 ppc_frob_label (sym);
3710
3711 ppc_current_block = sym;
3712
3713 demand_empty_rest_of_line ();
3714}
3715
3716/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3717
3718static void
3719ppc_es (ignore)
5480ccf3 3720 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3721{
3722 symbolS *sym;
3723
3724 if (ppc_current_block == NULL)
3725 as_bad (_(".es without preceding .bs"));
3726
3727 sym = symbol_make (".es");
3728 S_SET_SEGMENT (sym, now_seg);
3729 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3730 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3731 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3732
3733 ppc_frob_label (sym);
3734
3735 ppc_current_block = NULL;
3736
3737 demand_empty_rest_of_line ();
3738}
3739
3740/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3741 line number. */
3742
3743static void
3744ppc_bb (ignore)
5480ccf3 3745 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3746{
3747 symbolS *sym;
3748
3749 sym = symbol_make (".bb");
3750 S_SET_SEGMENT (sym, text_section);
809ffe0d 3751 symbol_set_frag (sym, frag_now);
252b5132
RH		 3752 S_SET_VALUE (sym, frag_now_fix ());
3753 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3754
3755 S_SET_NUMBER_AUXILIARY (sym, 1);
3756 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3757
809ffe0d 3758 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3759
3760 SF_SET_PROCESS (sym);
3761
3762 ppc_frob_label (sym);
3763
3764 demand_empty_rest_of_line ();
3765}
3766
3767/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3768 line number. */
3769
3770static void
3771ppc_eb (ignore)
5480ccf3 3772 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3773{
3774 symbolS *sym;
3775
3776 sym = symbol_make (".eb");
3777 S_SET_SEGMENT (sym, text_section);
809ffe0d 3778 symbol_set_frag (sym, frag_now);
252b5132
RH		 3779 S_SET_VALUE (sym, frag_now_fix ());
3780 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3781 S_SET_NUMBER_AUXILIARY (sym, 1);
3782 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3783 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3784
3785 SF_SET_PROCESS (sym);
3786
3787 ppc_frob_label (sym);
3788
3789 demand_empty_rest_of_line ();
3790}
3791
3792/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3793 specified name. */
3794
3795static void
3796ppc_bc (ignore)
5480ccf3 3797 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3798{
3799 char *name;
3800 int len;
3801 symbolS *sym;
3802
3803 name = demand_copy_C_string (&len);
3804 sym = symbol_make (name);
3805 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3806 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3807 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3808 S_SET_VALUE (sym, 0);
809ffe0d 3809 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3810
3811 ppc_frob_label (sym);
3812
3813 demand_empty_rest_of_line ();
3814}
3815
3816/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3817
3818static void
3819ppc_ec (ignore)
5480ccf3 3820 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3821{
3822 symbolS *sym;
3823
3824 sym = symbol_make (".ec");
3825 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3826 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3827 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3828 S_SET_VALUE (sym, 0);
809ffe0d 3829 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3830
3831 ppc_frob_label (sym);
3832
3833 demand_empty_rest_of_line ();
3834}
3835
3836/* The .toc pseudo-op. Switch to the .toc subsegment. */
3837
3838static void
3839ppc_toc (ignore)
5480ccf3 3840 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3841{
3842 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3843 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3844 else
3845 {
3846 subsegT subseg;
3847 symbolS *sym;
3848 symbolS *list;
81d4177b 3849
252b5132
RH		 3850 subseg = ppc_data_subsegment;
3851 ++ppc_data_subsegment;
3852
3853 subseg_new (segment_name (data_section), subseg);
3854 ppc_toc_frag = frag_now;
3855
3856 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3857 symbol_set_frag (sym, frag_now);
252b5132
RH		 3858 S_SET_SEGMENT (sym, data_section);
3859 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3860 symbol_get_tc (sym)->subseg = subseg;
3861 symbol_get_tc (sym)->output = 1;
3862 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3863
3864 ppc_toc_csect = sym;
81d4177b 3865
252b5132 3866 for (list = ppc_data_csects;
809ffe0d
ILT		 3867 symbol_get_tc (list)->next != (symbolS *) NULL;
3868 list = symbol_get_tc (list)->next)
252b5132 3869 ;
809ffe0d 3870 symbol_get_tc (list)->next = sym;
252b5132
RH		 3871
3872 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3873 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3874 &symbol_lastP);
252b5132
RH		 3875 }
3876
3877 ppc_current_csect = ppc_toc_csect;
3878
3879 demand_empty_rest_of_line ();
3880}
3881
3882/* The AIX assembler automatically aligns the operands of a .long or
3883 .short pseudo-op, and we want to be compatible. */
3884
3885static void
3886ppc_xcoff_cons (log_size)
3887 int log_size;
3888{
3889 frag_align (log_size, 0, 0);
3890 record_alignment (now_seg, log_size);
3891 cons (1 << log_size);
3892}
3893
3894static void
3895ppc_vbyte (dummy)
5480ccf3 3896 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3897{
3898 expressionS exp;
3899 int byte_count;
3900
3901 (void) expression (&exp);
3902
3903 if (exp.X_op != O_constant)
3904 {
3905 as_bad (_("non-constant byte count"));
3906 return;
3907 }
3908
3909 byte_count = exp.X_add_number;
3910
3911 if (*input_line_pointer != ',')
3912 {
3913 as_bad (_("missing value"));
3914 return;
3915 }
3916
3917 ++input_line_pointer;
3918 cons (byte_count);
3919}
3920
3921#endif /* OBJ_XCOFF */
0baf16f2 3922#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3923\f
3924/* The .tc pseudo-op. This is used when generating either XCOFF or
3925 ELF. This takes two or more arguments.
3926
3927 When generating XCOFF output, the first argument is the name to
3928 give to this location in the toc; this will be a symbol with class
0baf16f2 3929 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3930 this location in the TOC; often there is just one more argument, a
1049f94e 3931 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3932 depends on target word size. A 32-bit target uses 4-byte values, a
3933 64-bit target uses 8-byte values.
252b5132
RH		 3934
3935 When not generating XCOFF output, the arguments are the same, but
3936 the first argument is simply ignored. */
3937
3938static void
3939ppc_tc (ignore)
92161534 3940 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3941{
3942#ifdef OBJ_XCOFF
3943
3944 /* Define the TOC symbol name. */
3945 {
3946 char *name;
3947 char endc;
3948 symbolS *sym;
3949
3950 if (ppc_toc_csect == (symbolS *) NULL
3951 || ppc_toc_csect != ppc_current_csect)
3952 {
3953 as_bad (_(".tc not in .toc section"));
3954 ignore_rest_of_line ();
3955 return;
3956 }
3957
3958 name = input_line_pointer;
3959 endc = get_symbol_end ();
3960
3961 sym = symbol_find_or_make (name);
3962
3963 *input_line_pointer = endc;
3964
3965 if (S_IS_DEFINED (sym))
3966 {
3967 symbolS *label;
3968
809ffe0d
ILT		 3969 label = symbol_get_tc (ppc_current_csect)->within;
3970 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3971 {
3972 as_bad (_(".tc with no label"));
3973 ignore_rest_of_line ();
3974 return;
3975 }
3976
3977 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3978 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3979 S_SET_VALUE (label, S_GET_VALUE (sym));
3980
3981 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3982 ++input_line_pointer;
3983
3984 return;
3985 }
3986
3987 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3988 symbol_set_frag (sym, frag_now);
252b5132 3989 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3990 symbol_get_tc (sym)->class = XMC_TC;
3991 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3992
3993 ppc_frob_label (sym);
3994 }
3995
0baf16f2
AM		 3996#endif /* OBJ_XCOFF */
3997#ifdef OBJ_ELF
9c7977b3 3998 int align;
252b5132
RH		 3999
4000 /* Skip the TOC symbol name. */
4001 while (is_part_of_name (*input_line_pointer)
4002 || *input_line_pointer == '['
4003 || *input_line_pointer == ']'
4004 || *input_line_pointer == '{'
4005 || *input_line_pointer == '}')
4006 ++input_line_pointer;
4007
0baf16f2 4008 /* Align to a four/eight byte boundary. */
2b3c4602 4009 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4010 frag_align (align, 0, 0);
4011 record_alignment (now_seg, align);
0baf16f2 4012#endif /* OBJ_ELF */
252b5132
RH		 4013
4014 if (*input_line_pointer != ',')
4015 demand_empty_rest_of_line ();
4016 else
4017 {
4018 ++input_line_pointer;
2b3c4602 4019 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4020 }
4021}
0baf16f2
AM		 4022
4023/* Pseudo-op .machine. */
0baf16f2
AM		 4024
4025static void
4026ppc_machine (ignore)
4027 int ignore ATTRIBUTE_UNUSED;
4028{
69c040df
AM		 4029 char *cpu_string;
4030#define MAX_HISTORY 100
4031 static unsigned long *cpu_history;
4032 static int curr_hist;
4033
4034 SKIP_WHITESPACE ();
4035
4036 if (*input_line_pointer == '"')
4037 {
4038 int len;
4039 cpu_string = demand_copy_C_string (&len);
4040 }
4041 else
4042 {
4043 char c;
4044 cpu_string = input_line_pointer;
4045 c = get_symbol_end ();
4046 cpu_string = xstrdup (cpu_string);
4047 *input_line_pointer = c;
4048 }
4049
4050 if (cpu_string != NULL)
4051 {
4052 unsigned long old_cpu = ppc_cpu;
4053 char *p;
4054
4055 for (p = cpu_string; *p != 0; p++)
4056 *p = TOLOWER (*p);
4057
4058 if (strcmp (cpu_string, "push") == 0)
4059 {
4060 if (cpu_history == NULL)
4061 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4062
4063 if (curr_hist >= MAX_HISTORY)
4064 as_bad (_(".machine stack overflow"));
4065 else
4066 cpu_history[curr_hist++] = ppc_cpu;
4067 }
4068 else if (strcmp (cpu_string, "pop") == 0)
4069 {
4070 if (curr_hist <= 0)
4071 as_bad (_(".machine stack underflow"));
4072 else
4073 ppc_cpu = cpu_history[--curr_hist];
4074 }
4075 else if (parse_cpu (cpu_string))
4076 ;
4077 else
4078 as_bad (_("invalid machine `%s'"), cpu_string);
4079
4080 if (ppc_cpu != old_cpu)
4081 ppc_setup_opcodes ();
4082 }
4083
4084 demand_empty_rest_of_line ();
0baf16f2
AM		 4085}
4086
4087/* See whether a symbol is in the TOC section. */
4088
4089static int
4090ppc_is_toc_sym (sym)
4091 symbolS *sym;
4092{
4093#ifdef OBJ_XCOFF
4094 return symbol_get_tc (sym)->class == XMC_TC;
4095#endif
4096#ifdef OBJ_ELF
4097 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4098 if (ppc_obj64)
0baf16f2
AM		 4099 return strcmp (sname, ".toc") == 0;
4100 else
4101 return strcmp (sname, ".got") == 0;
4102#endif
4103}
4104#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4105\f
4106#ifdef TE_PE
4107
99a814a1 4108/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4109
4110/* Set the current section. */
4111static void
4112ppc_set_current_section (new)
4113 segT new;
4114{
4115 ppc_previous_section = ppc_current_section;
4116 ppc_current_section = new;
4117}
4118
4119/* pseudo-op: .previous
4120 behaviour: toggles the current section with the previous section.
4121 errors: None
99a814a1
AM		 4122 warnings: "No previous section" */
4123
252b5132 4124static void
99a814a1 4125ppc_previous (ignore)
5480ccf3 4126 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4127{
4128 symbolS *tmp;
4129
81d4177b 4130 if (ppc_previous_section == NULL)
252b5132 4131 {
99a814a1 4132 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4133 return;
4134 }
4135
99a814a1 4136 subseg_set (ppc_previous_section, 0);
252b5132 4137
99a814a1 4138 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4139}
4140
4141/* pseudo-op: .pdata
4142 behaviour: predefined read only data section
b34976b6 4143 double word aligned
252b5132
RH		 4144 errors: None
4145 warnings: None
4146 initial: .section .pdata "adr3"
b34976b6 4147 a - don't know -- maybe a misprint
252b5132
RH		 4148 d - initialized data
4149 r - readable
4150 3 - double word aligned (that would be 4 byte boundary)
4151
4152 commentary:
4153 Tag index tables (also known as the function table) for exception
99a814a1 4154 handling, debugging, etc. */
252b5132 4155
252b5132 4156static void
99a814a1 4157ppc_pdata (ignore)
5480ccf3 4158 int ignore ATTRIBUTE_UNUSED;
252b5132 4159{
81d4177b 4160 if (pdata_section == 0)
252b5132
RH		 4161 {
4162 pdata_section = subseg_new (".pdata", 0);
81d4177b 4163
252b5132
RH		 4164 bfd_set_section_flags (stdoutput, pdata_section,
4165 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4166 | SEC_READONLY | SEC_DATA ));
81d4177b 4167
252b5132
RH		 4168 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4169 }
4170 else
4171 {
99a814a1 4172 pdata_section = subseg_new (".pdata", 0);
252b5132 4173 }
99a814a1 4174 ppc_set_current_section (pdata_section);
252b5132
RH		 4175}
4176
4177/* pseudo-op: .ydata
4178 behaviour: predefined read only data section
b34976b6 4179 double word aligned
252b5132
RH		 4180 errors: None
4181 warnings: None
4182 initial: .section .ydata "drw3"
b34976b6 4183 a - don't know -- maybe a misprint
252b5132
RH		 4184 d - initialized data
4185 r - readable
4186 3 - double word aligned (that would be 4 byte boundary)
4187 commentary:
4188 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4189 debugging, etc. */
4190
252b5132 4191static void
99a814a1 4192ppc_ydata (ignore)
5480ccf3 4193 int ignore ATTRIBUTE_UNUSED;
252b5132 4194{
81d4177b 4195 if (ydata_section == 0)
252b5132
RH		 4196 {
4197 ydata_section = subseg_new (".ydata", 0);
4198 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4199 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4200 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4201
4202 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4203 }
4204 else
4205 {
4206 ydata_section = subseg_new (".ydata", 0);
4207 }
99a814a1 4208 ppc_set_current_section (ydata_section);
252b5132
RH		 4209}
4210
4211/* pseudo-op: .reldata
4212 behaviour: predefined read write data section
b34976b6 4213 double word aligned (4-byte)
252b5132
RH		 4214 FIXME: relocation is applied to it
4215 FIXME: what's the difference between this and .data?
4216 errors: None
4217 warnings: None
4218 initial: .section .reldata "drw3"
4219 d - initialized data
4220 r - readable
4221 w - writeable
4222 3 - double word aligned (that would be 8 byte boundary)
4223
4224 commentary:
4225 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4226 function descriptors, etc. */
4227
252b5132 4228static void
99a814a1 4229ppc_reldata (ignore)
5480ccf3 4230 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4231{
4232 if (reldata_section == 0)
4233 {
4234 reldata_section = subseg_new (".reldata", 0);
4235
4236 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4237 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4238 | SEC_DATA));
252b5132
RH		 4239
4240 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4241 }
4242 else
4243 {
4244 reldata_section = subseg_new (".reldata", 0);
4245 }
99a814a1 4246 ppc_set_current_section (reldata_section);
252b5132
RH		 4247}
4248
4249/* pseudo-op: .rdata
4250 behaviour: predefined read only data section
b34976b6 4251 double word aligned
252b5132
RH		 4252 errors: None
4253 warnings: None
4254 initial: .section .rdata "dr3"
4255 d - initialized data
4256 r - readable
99a814a1
AM		 4257 3 - double word aligned (that would be 4 byte boundary) */
4258
252b5132 4259static void
99a814a1 4260ppc_rdata (ignore)
5480ccf3 4261 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4262{
4263 if (rdata_section == 0)
4264 {
4265 rdata_section = subseg_new (".rdata", 0);
4266 bfd_set_section_flags (stdoutput, rdata_section,
4267 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4268 | SEC_READONLY | SEC_DATA ));
4269
4270 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4271 }
4272 else
4273 {
4274 rdata_section = subseg_new (".rdata", 0);
4275 }
99a814a1 4276 ppc_set_current_section (rdata_section);
252b5132
RH		 4277}
4278
4279/* pseudo-op: .ualong
81d4177b 4280 behaviour: much like .int, with the exception that no alignment is
b34976b6 4281 performed.
252b5132
RH		 4282 FIXME: test the alignment statement
4283 errors: None
99a814a1
AM		 4284 warnings: None */
4285
252b5132 4286static void
99a814a1 4287ppc_ualong (ignore)
5480ccf3 4288 int ignore ATTRIBUTE_UNUSED;
252b5132 4289{
99a814a1
AM		 4290 /* Try for long. */
4291 cons (4);
252b5132
RH		 4292}
4293
4294/* pseudo-op: .znop <symbol name>
4295 behaviour: Issue a nop instruction
b34976b6 4296 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4297 the supplied symbol name.
4298 errors: None
99a814a1
AM		 4299 warnings: Missing symbol name */
4300
252b5132 4301static void
99a814a1 4302ppc_znop (ignore)
5480ccf3 4303 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4304{
4305 unsigned long insn;
4306 const struct powerpc_opcode *opcode;
4307 expressionS ex;
4308 char *f;
252b5132 4309 symbolS *sym;
252b5132
RH		 4310 char *symbol_name;
4311 char c;
4312 char *name;
4313 unsigned int exp;
4314 flagword flags;
4315 asection *sec;
4316
99a814a1 4317 /* Strip out the symbol name. */
252b5132
RH		 4318 symbol_name = input_line_pointer;
4319 c = get_symbol_end ();
4320
4321 name = xmalloc (input_line_pointer - symbol_name + 1);
4322 strcpy (name, symbol_name);
4323
4324 sym = symbol_find_or_make (name);
4325
4326 *input_line_pointer = c;
4327
4328 SKIP_WHITESPACE ();
4329
4330 /* Look up the opcode in the hash table. */
4331 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4332
99a814a1 4333 /* Stick in the nop. */
252b5132
RH		 4334 insn = opcode->opcode;
4335
4336 /* Write out the instruction. */
4337 f = frag_more (4);
4338 md_number_to_chars (f, insn, 4);
4339 fix_new (frag_now,
4340 f - frag_now->fr_literal,
4341 4,
4342 sym,
4343 0,
4344 0,
4345 BFD_RELOC_16_GOT_PCREL);
4346
4347}
4348
81d4177b
KH		 4349/* pseudo-op:
4350 behaviour:
4351 errors:
99a814a1
AM		 4352 warnings: */
4353
252b5132 4354static void
99a814a1 4355ppc_pe_comm (lcomm)
252b5132
RH		 4356 int lcomm;
4357{
4358 register char *name;
4359 register char c;
4360 register char *p;
4361 offsetT temp;
4362 register symbolS *symbolP;
4363 offsetT align;
4364
4365 name = input_line_pointer;
4366 c = get_symbol_end ();
4367
99a814a1 4368 /* just after name is now '\0'. */
252b5132
RH		 4369 p = input_line_pointer;
4370 *p = c;
4371 SKIP_WHITESPACE ();
4372 if (*input_line_pointer != ',')
4373 {
4374 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4375 ignore_rest_of_line ();
4376 return;
4377 }
4378
4379 input_line_pointer++; /* skip ',' */
4380 if ((temp = get_absolute_expression ()) < 0)
4381 {
4382 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4383 ignore_rest_of_line ();
4384 return;
4385 }
4386
4387 if (! lcomm)
4388 {
4389 /* The third argument to .comm is the alignment. */
4390 if (*input_line_pointer != ',')
4391 align = 3;
4392 else
4393 {
4394 ++input_line_pointer;
4395 align = get_absolute_expression ();
4396 if (align <= 0)
4397 {
4398 as_warn (_("ignoring bad alignment"));
4399 align = 3;
4400 }
4401 }
4402 }
4403
4404 *p = 0;
4405 symbolP = symbol_find_or_make (name);
4406
4407 *p = c;
4408 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4409 {
4410 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4411 S_GET_NAME (symbolP));
4412 ignore_rest_of_line ();
4413 return;
4414 }
4415
4416 if (S_GET_VALUE (symbolP))
4417 {
4418 if (S_GET_VALUE (symbolP) != (valueT) temp)
4419 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4420 S_GET_NAME (symbolP),
4421 (long) S_GET_VALUE (symbolP),
4422 (long) temp);
4423 }
4424 else
4425 {
4426 S_SET_VALUE (symbolP, (valueT) temp);
4427 S_SET_EXTERNAL (symbolP);
86ebace2 4428 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4429 }
4430
4431 demand_empty_rest_of_line ();
4432}
4433
4434/*
4435 * implement the .section pseudo op:
4436 * .section name {, "flags"}
4437 * ^ ^
4438 * | +--- optional flags: 'b' for bss
4439 * | 'i' for info
4440 * +-- section name 'l' for lib
4441 * 'n' for noload
4442 * 'o' for over
4443 * 'w' for data
4444 * 'd' (apparently m88k for data)
4445 * 'x' for text
4446 * But if the argument is not a quoted string, treat it as a
4447 * subsegment number.
4448 *
4449 * FIXME: this is a copy of the section processing from obj-coff.c, with
4450 * additions/changes for the moto-pas assembler support. There are three
4451 * categories:
4452 *
81d4177b 4453 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4454 * setting bits that bfd probably neither understands or uses. The
4455 * correct approach (?) will have to incorporate extra fields attached
4456 * to the section to hold the system specific stuff. (krk)
4457 *
4458 * Section Contents:
4459 * 'a' - unknown - referred to in documentation, but no definition supplied
4460 * 'c' - section has code
4461 * 'd' - section has initialized data
4462 * 'u' - section has uninitialized data
4463 * 'i' - section contains directives (info)
4464 * 'n' - section can be discarded
4465 * 'R' - remove section at link time
4466 *
4467 * Section Protection:
4468 * 'r' - section is readable
4469 * 'w' - section is writeable
4470 * 'x' - section is executable
4471 * 's' - section is sharable
4472 *
4473 * Section Alignment:
4474 * '0' - align to byte boundary
4475 * '1' - align to halfword undary
4476 * '2' - align to word boundary
4477 * '3' - align to doubleword boundary
4478 * '4' - align to quadword boundary
4479 * '5' - align to 32 byte boundary
4480 * '6' - align to 64 byte boundary
4481 *
4482 */
4483
4484void
4485ppc_pe_section (ignore)
5480ccf3 4486 int ignore ATTRIBUTE_UNUSED;
252b5132 4487{
99a814a1 4488 /* Strip out the section name. */
252b5132
RH		 4489 char *section_name;
4490 char c;
4491 char *name;
4492 unsigned int exp;
4493 flagword flags;
4494 segT sec;
4495 int align;
4496
4497 section_name = input_line_pointer;
4498 c = get_symbol_end ();
4499
4500 name = xmalloc (input_line_pointer - section_name + 1);
4501 strcpy (name, section_name);
4502
4503 *input_line_pointer = c;
4504
4505 SKIP_WHITESPACE ();
4506
4507 exp = 0;
4508 flags = SEC_NO_FLAGS;
4509
4510 if (strcmp (name, ".idata$2") == 0)
4511 {
4512 align = 0;
4513 }
4514 else if (strcmp (name, ".idata$3") == 0)
4515 {
4516 align = 0;
4517 }
4518 else if (strcmp (name, ".idata$4") == 0)
4519 {
4520 align = 2;
4521 }
4522 else if (strcmp (name, ".idata$5") == 0)
4523 {
4524 align = 2;
4525 }
4526 else if (strcmp (name, ".idata$6") == 0)
4527 {
4528 align = 1;
4529 }
4530 else
99a814a1
AM		 4531 /* Default alignment to 16 byte boundary. */
4532 align = 4;
252b5132
RH		 4533
4534 if (*input_line_pointer == ',')
4535 {
4536 ++input_line_pointer;
4537 SKIP_WHITESPACE ();
4538 if (*input_line_pointer != '"')
4539 exp = get_absolute_expression ();
4540 else
4541 {
4542 ++input_line_pointer;
4543 while (*input_line_pointer != '"'
4544 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4545 {
4546 switch (*input_line_pointer)
4547 {
4548 /* Section Contents */
4549 case 'a': /* unknown */
4550 as_bad (_("Unsupported section attribute -- 'a'"));
4551 break;
4552 case 'c': /* code section */
81d4177b 4553 flags |= SEC_CODE;
252b5132
RH		 4554 break;
4555 case 'd': /* section has initialized data */
4556 flags |= SEC_DATA;
4557 break;
4558 case 'u': /* section has uninitialized data */
4559 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4560 in winnt.h */
4561 flags |= SEC_ROM;
4562 break;
4563 case 'i': /* section contains directives (info) */
4564 /* FIXME: This is IMAGE_SCN_LNK_INFO
4565 in winnt.h */
4566 flags |= SEC_HAS_CONTENTS;
4567 break;
4568 case 'n': /* section can be discarded */
81d4177b 4569 flags &=~ SEC_LOAD;
252b5132
RH		 4570 break;
4571 case 'R': /* Remove section at link time */
4572 flags |= SEC_NEVER_LOAD;
4573 break;
4574
4575 /* Section Protection */
4576 case 'r': /* section is readable */
4577 flags |= IMAGE_SCN_MEM_READ;
4578 break;
4579 case 'w': /* section is writeable */
4580 flags |= IMAGE_SCN_MEM_WRITE;
4581 break;
4582 case 'x': /* section is executable */
4583 flags |= IMAGE_SCN_MEM_EXECUTE;
4584 break;
4585 case 's': /* section is sharable */
4586 flags |= IMAGE_SCN_MEM_SHARED;
4587 break;
4588
4589 /* Section Alignment */
4590 case '0': /* align to byte boundary */
4591 flags |= IMAGE_SCN_ALIGN_1BYTES;
4592 align = 0;
4593 break;
4594 case '1': /* align to halfword boundary */
4595 flags |= IMAGE_SCN_ALIGN_2BYTES;
4596 align = 1;
4597 break;
4598 case '2': /* align to word boundary */
4599 flags |= IMAGE_SCN_ALIGN_4BYTES;
4600 align = 2;
4601 break;
4602 case '3': /* align to doubleword boundary */
4603 flags |= IMAGE_SCN_ALIGN_8BYTES;
4604 align = 3;
4605 break;
4606 case '4': /* align to quadword boundary */
4607 flags |= IMAGE_SCN_ALIGN_16BYTES;
4608 align = 4;
4609 break;
4610 case '5': /* align to 32 byte boundary */
4611 flags |= IMAGE_SCN_ALIGN_32BYTES;
4612 align = 5;
4613 break;
4614 case '6': /* align to 64 byte boundary */
4615 flags |= IMAGE_SCN_ALIGN_64BYTES;
4616 align = 6;
4617 break;
4618
4619 default:
99a814a1
AM		 4620 as_bad (_("unknown section attribute '%c'"),
4621 *input_line_pointer);
252b5132
RH		 4622 break;
4623 }
4624 ++input_line_pointer;
4625 }
4626 if (*input_line_pointer == '"')
4627 ++input_line_pointer;
4628 }
4629 }
4630
4631 sec = subseg_new (name, (subsegT) exp);
4632
99a814a1 4633 ppc_set_current_section (sec);
252b5132
RH		 4634
4635 if (flags != SEC_NO_FLAGS)
4636 {
4637 if (! bfd_set_section_flags (stdoutput, sec, flags))
4638 as_bad (_("error setting flags for \"%s\": %s"),
4639 bfd_section_name (stdoutput, sec),
4640 bfd_errmsg (bfd_get_error ()));
4641 }
4642
99a814a1 4643 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4644
4645}
4646
4647static void
4648ppc_pe_function (ignore)
5480ccf3 4649 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4650{
4651 char *name;
4652 char endc;
4653 symbolS *ext_sym;
4654
4655 name = input_line_pointer;
4656 endc = get_symbol_end ();
4657
4658 ext_sym = symbol_find_or_make (name);
4659
4660 *input_line_pointer = endc;
4661
4662 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4663 SF_SET_FUNCTION (ext_sym);
4664 SF_SET_PROCESS (ext_sym);
4665 coff_add_linesym (ext_sym);
4666
4667 demand_empty_rest_of_line ();
4668}
4669
4670static void
4671ppc_pe_tocd (ignore)
5480ccf3 4672 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4673{
4674 if (tocdata_section == 0)
4675 {
4676 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4677 /* FIXME: section flags won't work. */
252b5132
RH		 4678 bfd_set_section_flags (stdoutput, tocdata_section,
4679 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4680 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4681
4682 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4683 }
4684 else
4685 {
4686 rdata_section = subseg_new (".tocd", 0);
4687 }
4688
99a814a1 4689 ppc_set_current_section (tocdata_section);
252b5132
RH		 4690
4691 demand_empty_rest_of_line ();
4692}
4693
4694/* Don't adjust TOC relocs to use the section symbol. */
4695
4696int
4697ppc_pe_fix_adjustable (fix)
4698 fixS *fix;
4699{
4700 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4701}
4702
4703#endif
4704\f
4705#ifdef OBJ_XCOFF
4706
4707/* XCOFF specific symbol and file handling. */
4708
4709/* Canonicalize the symbol name. We use the to force the suffix, if
4710 any, to use square brackets, and to be in upper case. */
4711
4712char *
4713ppc_canonicalize_symbol_name (name)
4714 char *name;
4715{
4716 char *s;
4717
4718 if (ppc_stab_symbol)
4719 return name;
4720
4721 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4722 ;
4723 if (*s != '\0')
4724 {
4725 char brac;
4726
4727 if (*s == '[')
4728 brac = ']';
4729 else
4730 {
4731 *s = '[';
4732 brac = '}';
4733 }
4734
4735 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4736 *s = TOUPPER (*s);
252b5132
RH		 4737
4738 if (*s == '\0' || s[1] != '\0')
4739 as_bad (_("bad symbol suffix"));
4740
4741 *s = ']';
4742 }
4743
4744 return name;
4745}
4746
4747/* Set the class of a symbol based on the suffix, if any. This is
4748 called whenever a new symbol is created. */
4749
4750void
4751ppc_symbol_new_hook (sym)
4752 symbolS *sym;
4753{
809ffe0d 4754 struct ppc_tc_sy *tc;
252b5132
RH		 4755 const char *s;
4756
809ffe0d
ILT		 4757 tc = symbol_get_tc (sym);
4758 tc->next = NULL;
4759 tc->output = 0;
4760 tc->class = -1;
4761 tc->real_name = NULL;
4762 tc->subseg = 0;
4763 tc->align = 0;
4764 tc->size = NULL;
4765 tc->within = NULL;
252b5132
RH		 4766
4767 if (ppc_stab_symbol)
4768 return;
4769
4770 s = strchr (S_GET_NAME (sym), '[');
4771 if (s == (const char *) NULL)
4772 {
4773 /* There is no suffix. */
4774 return;
4775 }
4776
4777 ++s;
4778
4779 switch (s[0])
4780 {
4781 case 'B':
4782 if (strcmp (s, "BS]") == 0)
809ffe0d 4783 tc->class = XMC_BS;
252b5132
RH		 4784 break;
4785 case 'D':
4786 if (strcmp (s, "DB]") == 0)
809ffe0d 4787 tc->class = XMC_DB;
252b5132 4788 else if (strcmp (s, "DS]") == 0)
809ffe0d 4789 tc->class = XMC_DS;
252b5132
RH		 4790 break;
4791 case 'G':
4792 if (strcmp (s, "GL]") == 0)
809ffe0d 4793 tc->class = XMC_GL;
252b5132
RH		 4794 break;
4795 case 'P':
4796 if (strcmp (s, "PR]") == 0)
809ffe0d 4797 tc->class = XMC_PR;
252b5132
RH		 4798 break;
4799 case 'R':
4800 if (strcmp (s, "RO]") == 0)
809ffe0d 4801 tc->class = XMC_RO;
252b5132 4802 else if (strcmp (s, "RW]") == 0)
809ffe0d 4803 tc->class = XMC_RW;
252b5132
RH		 4804 break;
4805 case 'S':
4806 if (strcmp (s, "SV]") == 0)
809ffe0d 4807 tc->class = XMC_SV;
252b5132
RH		 4808 break;
4809 case 'T':
4810 if (strcmp (s, "TC]") == 0)
809ffe0d 4811 tc->class = XMC_TC;
252b5132 4812 else if (strcmp (s, "TI]") == 0)
809ffe0d 4813 tc->class = XMC_TI;
252b5132 4814 else if (strcmp (s, "TB]") == 0)
809ffe0d 4815 tc->class = XMC_TB;
252b5132 4816 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4817 tc->class = XMC_TC0;
252b5132
RH		 4818 break;
4819 case 'U':
4820 if (strcmp (s, "UA]") == 0)
809ffe0d 4821 tc->class = XMC_UA;
252b5132 4822 else if (strcmp (s, "UC]") == 0)
809ffe0d 4823 tc->class = XMC_UC;
252b5132
RH		 4824 break;
4825 case 'X':
4826 if (strcmp (s, "XO]") == 0)
809ffe0d 4827 tc->class = XMC_XO;
252b5132
RH		 4828 break;
4829 }
4830
809ffe0d 4831 if (tc->class == -1)
252b5132
RH		 4832 as_bad (_("Unrecognized symbol suffix"));
4833}
4834
4835/* Set the class of a label based on where it is defined. This
4836 handles symbols without suffixes. Also, move the symbol so that it
4837 follows the csect symbol. */
4838
4839void
4840ppc_frob_label (sym)
4841 symbolS *sym;
4842{
4843 if (ppc_current_csect != (symbolS *) NULL)
4844 {
809ffe0d
ILT		 4845 if (symbol_get_tc (sym)->class == -1)
4846 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4847
4848 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4849 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4850 &symbol_rootP, &symbol_lastP);
4851 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4852 }
07a53e5c
RH		 4853
4854#ifdef OBJ_ELF
4855 dwarf2_emit_label (sym);
4856#endif
252b5132
RH		 4857}
4858
4859/* This variable is set by ppc_frob_symbol if any absolute symbols are
4860 seen. It tells ppc_adjust_symtab whether it needs to look through
4861 the symbols. */
4862
b34976b6 4863static bfd_boolean ppc_saw_abs;
252b5132
RH		 4864
4865/* Change the name of a symbol just before writing it out. Set the
4866 real name if the .rename pseudo-op was used. Otherwise, remove any
4867 class suffix. Return 1 if the symbol should not be included in the
4868 symbol table. */
4869
4870int
4871ppc_frob_symbol (sym)
4872 symbolS *sym;
4873{
4874 static symbolS *ppc_last_function;
4875 static symbolS *set_end;
4876
4877 /* Discard symbols that should not be included in the output symbol
4878 table. */
809ffe0d
ILT		 4879 if (! symbol_used_in_reloc_p (sym)
4880 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4881 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4882 && ! symbol_get_tc (sym)->output
252b5132
RH		 4883 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4884 return 1;
4885
a161fe53
AM		 4886 /* This one will disappear anyway. Don't make a csect sym for it. */
4887 if (sym == abs_section_sym)
4888 return 1;
4889
809ffe0d
ILT		 4890 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4891 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4892 else
4893 {
4894 const char *name;
4895 const char *s;
4896
4897 name = S_GET_NAME (sym);
4898 s = strchr (name, '[');
4899 if (s != (char *) NULL)
4900 {
4901 unsigned int len;
4902 char *snew;
4903
4904 len = s - name;
4905 snew = xmalloc (len + 1);
4906 memcpy (snew, name, len);
4907 snew[len] = '\0';
4908
4909 S_SET_NAME (sym, snew);
4910 }
4911 }
4912
4913 if (set_end != (symbolS *) NULL)
4914 {
4915 SA_SET_SYM_ENDNDX (set_end, sym);
4916 set_end = NULL;
4917 }
4918
4919 if (SF_GET_FUNCTION (sym))
4920 {
4921 if (ppc_last_function != (symbolS *) NULL)
4922 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4923 ppc_last_function = sym;
809ffe0d 4924 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4925 {
6386f3a7 4926 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4927 SA_SET_SYM_FSIZE (sym,
4928 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4929 }
4930 }
4931 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4932 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4933 {
4934 if (ppc_last_function == (symbolS *) NULL)
4935 as_bad (_(".ef with no preceding .function"));
4936 else
4937 {
4938 set_end = ppc_last_function;
4939 ppc_last_function = NULL;
4940
4941 /* We don't have a C_EFCN symbol, but we need to force the
4942 COFF backend to believe that it has seen one. */
4943 coff_last_function = NULL;
4944 }
4945 }
4946
670ec21d 4947 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4948 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4949 && S_GET_STORAGE_CLASS (sym) != C_FILE
4950 && S_GET_STORAGE_CLASS (sym) != C_FCN
4951 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4952 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4953 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4954 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4955 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4956 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4957 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4958
4959 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4960 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4961 {
4962 int i;
4963 union internal_auxent *a;
4964
4965 /* Create a csect aux. */
4966 i = S_GET_NUMBER_AUXILIARY (sym);
4967 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4968 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4969 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4970 {
4971 /* This is the TOC table. */
4972 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4973 a->x_csect.x_scnlen.l = 0;
4974 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4975 }
809ffe0d 4976 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4977 {
4978 /* This is a csect symbol. x_scnlen is the size of the
4979 csect. */
809ffe0d 4980 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4981 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4982 S_GET_SEGMENT (sym))
4983 - S_GET_VALUE (sym));
4984 else
4985 {
6386f3a7 4986 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4987 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4988 - S_GET_VALUE (sym));
4989 }
809ffe0d 4990 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4991 }
4992 else if (S_GET_SEGMENT (sym) == bss_section)
4993 {
4994 /* This is a common symbol. */
809ffe0d
ILT		 4995 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4996 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4997 if (S_IS_EXTERNAL (sym))
809ffe0d 4998 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4999 else
809ffe0d 5000 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5001 }
5002 else if (S_GET_SEGMENT (sym) == absolute_section)
5003 {
5004 /* This is an absolute symbol. The csect will be created by
99a814a1 5005 ppc_adjust_symtab. */
b34976b6 5006 ppc_saw_abs = TRUE;
252b5132 5007 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5008 if (symbol_get_tc (sym)->class == -1)
5009 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5010 }
5011 else if (! S_IS_DEFINED (sym))
5012 {
5013 /* This is an external symbol. */
5014 a->x_csect.x_scnlen.l = 0;
5015 a->x_csect.x_smtyp = XTY_ER;
5016 }
809ffe0d 5017 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5018 {
5019 symbolS *next;
5020
5021 /* This is a TOC definition. x_scnlen is the size of the
5022 TOC entry. */
5023 next = symbol_next (sym);
809ffe0d 5024 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5025 next = symbol_next (next);
5026 if (next == (symbolS *) NULL
809ffe0d 5027 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5028 {
5029 if (ppc_after_toc_frag == (fragS *) NULL)
5030 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5031 data_section)
5032 - S_GET_VALUE (sym));
5033 else
5034 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5035 - S_GET_VALUE (sym));
5036 }
5037 else
5038 {
6386f3a7 5039 resolve_symbol_value (next);
252b5132
RH		 5040 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5041 - S_GET_VALUE (sym));
5042 }
5043 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5044 }
5045 else
5046 {
5047 symbolS *csect;
5048
5049 /* This is a normal symbol definition. x_scnlen is the
5050 symbol index of the containing csect. */
5051 if (S_GET_SEGMENT (sym) == text_section)
5052 csect = ppc_text_csects;
5053 else if (S_GET_SEGMENT (sym) == data_section)
5054 csect = ppc_data_csects;
5055 else
5056 abort ();
5057
5058 /* Skip the initial dummy symbol. */
809ffe0d 5059 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5060
5061 if (csect == (symbolS *) NULL)
5062 {
5063 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5064 a->x_csect.x_scnlen.l = 0;
5065 }
5066 else
5067 {
809ffe0d 5068 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5069 {
6386f3a7 5070 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5071 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5072 > S_GET_VALUE (sym))
252b5132 5073 break;
809ffe0d 5074 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5075 }
5076
809ffe0d
ILT		 5077 a->x_csect.x_scnlen.p =
5078 coffsymbol (symbol_get_bfdsym (csect))->native;
5079 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5080 1;
252b5132
RH		 5081 }
5082 a->x_csect.x_smtyp = XTY_LD;
5083 }
81d4177b 5084
252b5132
RH		 5085 a->x_csect.x_parmhash = 0;
5086 a->x_csect.x_snhash = 0;
809ffe0d 5087 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5088 a->x_csect.x_smclas = XMC_PR;
5089 else
809ffe0d 5090 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5091 a->x_csect.x_stab = 0;
5092 a->x_csect.x_snstab = 0;
5093
5094 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5095 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5096 }
5097 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5098 {
5099 /* We want the value to be the symbol index of the referenced
5100 csect symbol. BFD will do that for us if we set the right
5101 flags. */
b782de16
AM		 5102 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5103 combined_entry_type *c = coffsymbol (bsym)->native;
5104
5105 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5106 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5107 }
5108 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5109 {
5110 symbolS *block;
5111 symbolS *csect;
5112
5113 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5114 block = symbol_get_tc (sym)->within;
5115 csect = symbol_get_tc (block)->within;
6386f3a7 5116 resolve_symbol_value (csect);
252b5132
RH		 5117 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5118 }
5119 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5120 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5121 {
5122 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5123 BFD will do that for us if we set the right flags. We have
5124 already set the value correctly. */
809ffe0d 5125 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5126 }
5127
5128 return 0;
5129}
5130
5131/* Adjust the symbol table. This creates csect symbols for all
5132 absolute symbols. */
5133
5134void
5135ppc_adjust_symtab ()
5136{
5137 symbolS *sym;
5138
5139 if (! ppc_saw_abs)
5140 return;
5141
5142 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5143 {
5144 symbolS *csect;
5145 int i;
5146 union internal_auxent *a;
5147
5148 if (S_GET_SEGMENT (sym) != absolute_section)
5149 continue;
5150
5151 csect = symbol_create (".abs[XO]", absolute_section,
5152 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5153 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5154 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5155 i = S_GET_NUMBER_AUXILIARY (csect);
5156 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5157 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5158 a->x_csect.x_scnlen.l = 0;
5159 a->x_csect.x_smtyp = XTY_SD;
5160 a->x_csect.x_parmhash = 0;
5161 a->x_csect.x_snhash = 0;
5162 a->x_csect.x_smclas = XMC_XO;
5163 a->x_csect.x_stab = 0;
5164 a->x_csect.x_snstab = 0;
5165
5166 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5167
5168 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5169 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5170 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5171 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5172 }
5173
b34976b6 5174 ppc_saw_abs = FALSE;
252b5132
RH		 5175}
5176
5177/* Set the VMA for a section. This is called on all the sections in
5178 turn. */
5179
5180void
5181ppc_frob_section (sec)
5182 asection *sec;
5183{
931e13a6 5184 static bfd_vma vma = 0;
252b5132 5185
931e13a6 5186 vma = md_section_align (sec, vma);
252b5132
RH		 5187 bfd_set_section_vma (stdoutput, sec, vma);
5188 vma += bfd_section_size (stdoutput, sec);
5189}
5190
5191#endif /* OBJ_XCOFF */
5192\f
5193/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5194 of type TYPE, and store the appropriate bytes in *LITP. The number
5195 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5196 returned, or NULL on OK. */
5197
5198char *
5199md_atof (type, litp, sizep)
5200 int type;
5201 char *litp;
5202 int *sizep;
5203{
5204 int prec;
5205 LITTLENUM_TYPE words[4];
5206 char *t;
5207 int i;
5208
5209 switch (type)
5210 {
5211 case 'f':
5212 prec = 2;
5213 break;
5214
5215 case 'd':
5216 prec = 4;
5217 break;
5218
5219 default:
5220 *sizep = 0;
5221 return _("bad call to md_atof");
5222 }
5223
5224 t = atof_ieee (input_line_pointer, type, words);
5225 if (t)
5226 input_line_pointer = t;
5227
5228 *sizep = prec * 2;
5229
5230 if (target_big_endian)
5231 {
5232 for (i = 0; i < prec; i++)
5233 {
5234 md_number_to_chars (litp, (valueT) words[i], 2);
5235 litp += 2;
5236 }
5237 }
5238 else
5239 {
5240 for (i = prec - 1; i >= 0; i--)
5241 {
5242 md_number_to_chars (litp, (valueT) words[i], 2);
5243 litp += 2;
5244 }
5245 }
81d4177b 5246
252b5132
RH		 5247 return NULL;
5248}
5249
5250/* Write a value out to the object file, using the appropriate
5251 endianness. */
5252
5253void
5254md_number_to_chars (buf, val, n)
5255 char *buf;
5256 valueT val;
5257 int n;
5258{
5259 if (target_big_endian)
5260 number_to_chars_bigendian (buf, val, n);
5261 else
5262 number_to_chars_littleendian (buf, val, n);
5263}
5264
5265/* Align a section (I don't know why this is machine dependent). */
5266
5267valueT
3aeeedbb 5268md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5269{
3aeeedbb
AM		 5270#ifdef OBJ_ELF
5271 return addr;
5272#else
252b5132
RH		 5273 int align = bfd_get_section_alignment (stdoutput, seg);
5274
5275 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5276#endif
252b5132
RH		 5277}
5278
5279/* We don't have any form of relaxing. */
5280
5281int
5282md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5283 fragS *fragp ATTRIBUTE_UNUSED;
5284 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5285{
5286 abort ();
5287 return 0;
5288}
5289
5290/* Convert a machine dependent frag. We never generate these. */
5291
5292void
5293md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5294 bfd *abfd ATTRIBUTE_UNUSED;
5295 asection *sec ATTRIBUTE_UNUSED;
5296 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5297{
5298 abort ();
5299}
5300
5301/* We have no need to default values of symbols. */
5302
252b5132
RH		 5303symbolS *
5304md_undefined_symbol (name)
92161534 5305 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5306{
5307 return 0;
5308}
5309\f
5310/* Functions concerning relocs. */
5311
5312/* The location from which a PC relative jump should be calculated,
5313 given a PC relative reloc. */
5314
5315long
5316md_pcrel_from_section (fixp, sec)
5317 fixS *fixp;
92161534 5318 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5319{
5320 return fixp->fx_frag->fr_address + fixp->fx_where;
5321}
5322
5323#ifdef OBJ_XCOFF
5324
5325/* This is called to see whether a fixup should be adjusted to use a
5326 section symbol. We take the opportunity to change a fixup against
5327 a symbol in the TOC subsegment into a reloc against the
5328 corresponding .tc symbol. */
5329
5330int
5331ppc_fix_adjustable (fix)
5332 fixS *fix;
5333{
b782de16
AM		 5334 valueT val = resolve_symbol_value (fix->fx_addsy);
5335 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5336 TC_SYMFIELD_TYPE *tc;
5337
5338 if (symseg == absolute_section)
5339 return 0;
252b5132 5340
252b5132 5341 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5342 && fix->fx_addsy != ppc_toc_csect
b782de16 5343 && symseg == data_section
252b5132
RH		 5344 && val >= ppc_toc_frag->fr_address
5345 && (ppc_after_toc_frag == (fragS *) NULL
5346 || val < ppc_after_toc_frag->fr_address))
5347 {
5348 symbolS *sy;
5349
5350 for (sy = symbol_next (ppc_toc_csect);
5351 sy != (symbolS *) NULL;
5352 sy = symbol_next (sy))
5353 {
b782de16
AM		 5354 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5355
5356 if (sy_tc->class == XMC_TC0)
252b5132 5357 continue;
b782de16 5358 if (sy_tc->class != XMC_TC)
252b5132 5359 break;
b782de16 5360 if (val == resolve_symbol_value (sy))
252b5132
RH		 5361 {
5362 fix->fx_addsy = sy;
5363 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5364 return 0;
5365 }
5366 }
5367
5368 as_bad_where (fix->fx_file, fix->fx_line,
5369 _("symbol in .toc does not match any .tc"));
5370 }
5371
5372 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5373 tc = symbol_get_tc (fix->fx_addsy);
5374 if (tc->subseg == 0
5375 && tc->class != XMC_TC0
5376 && tc->class != XMC_TC
5377 && symseg != bss_section
252b5132 5378 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5379 && (symseg != data_section
252b5132
RH		 5380 || ppc_toc_csect == NULL
5381 || val < ppc_toc_frag->fr_address
5382 || (ppc_after_toc_frag != NULL
5383 && val >= ppc_after_toc_frag->fr_address)))
5384 {
5385 symbolS *csect;
b782de16 5386 symbolS *next_csect;
252b5132 5387
b782de16 5388 if (symseg == text_section)
252b5132 5389 csect = ppc_text_csects;
b782de16 5390 else if (symseg == data_section)
252b5132
RH		 5391 csect = ppc_data_csects;
5392 else
5393 abort ();
5394
5395 /* Skip the initial dummy symbol. */
809ffe0d 5396 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5397
5398 if (csect != (symbolS *) NULL)
5399 {
b782de16
AM		 5400 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5401 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5402 {
5403 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5404 have to look through the full symbol table to see
5405 whether this is the csect we want. Note that we will
5406 only get here if the csect has zero length. */
b782de16
AM		 5407 if (symbol_get_frag (csect)->fr_address == val
5408 && S_GET_VALUE (csect) == val)
252b5132
RH		 5409 {
5410 symbolS *scan;
5411
809ffe0d 5412 for (scan = symbol_next (csect);
252b5132 5413 scan != NULL;
809ffe0d 5414 scan = symbol_next (scan))
252b5132 5415 {
809ffe0d 5416 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5417 break;
5418 if (scan == fix->fx_addsy)
5419 break;
5420 }
5421
5422 /* If we found the symbol before the next csect
99a814a1 5423 symbol, then this is the csect we want. */
252b5132
RH		 5424 if (scan == fix->fx_addsy)
5425 break;
5426 }
5427
b782de16 5428 csect = next_csect;
252b5132
RH		 5429 }
5430
b782de16 5431 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5432 fix->fx_addsy = csect;
5433 }
b782de16 5434 return 0;
252b5132
RH		 5435 }
5436
5437 /* Adjust a reloc against a .lcomm symbol to be against the base
5438 .lcomm. */
b782de16 5439 if (symseg == bss_section
252b5132
RH		 5440 && ! S_IS_EXTERNAL (fix->fx_addsy))
5441 {
b782de16
AM		 5442 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5443
5444 fix->fx_offset += val - resolve_symbol_value (sy);
5445 fix->fx_addsy = sy;
252b5132
RH		 5446 }
5447
5448 return 0;
5449}
5450
5451/* A reloc from one csect to another must be kept. The assembler
5452 will, of course, keep relocs between sections, and it will keep
5453 absolute relocs, but we need to force it to keep PC relative relocs
5454 between two csects in the same section. */
5455
5456int
5457ppc_force_relocation (fix)
5458 fixS *fix;
5459{
5460 /* At this point fix->fx_addsy should already have been converted to
5461 a csect symbol. If the csect does not include the fragment, then
5462 we need to force the relocation. */
5463 if (fix->fx_pcrel
5464 && fix->fx_addsy != NULL
809ffe0d
ILT		 5465 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5466 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5467 > fix->fx_frag->fr_address)
5468 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5469 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5470 <= fix->fx_frag->fr_address))))
5471 return 1;
5472
ae6063d4 5473 return generic_force_reloc (fix);
252b5132
RH		 5474}
5475
5476#endif /* OBJ_XCOFF */
5477
0baf16f2 5478#ifdef OBJ_ELF
a161fe53
AM		 5479/* If this function returns non-zero, it guarantees that a relocation
5480 will be emitted for a fixup. */
5481
5482int
5483ppc_force_relocation (fix)
5484 fixS *fix;
5485{
5486 /* Branch prediction relocations must force a relocation, as must
5487 the vtable description relocs. */
5488 switch (fix->fx_r_type)
5489 {
5490 case BFD_RELOC_PPC_B16_BRTAKEN:
5491 case BFD_RELOC_PPC_B16_BRNTAKEN:
5492 case BFD_RELOC_PPC_BA16_BRTAKEN:
5493 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5494 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5495 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5496 return 1;
5497 default:
5498 break;
5499 }
5500
cdba85ec
AM		 5501 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5502 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5503 return 1;
5504
ae6063d4 5505 return generic_force_reloc (fix);
a161fe53
AM		 5506}
5507
0baf16f2
AM		 5508int
5509ppc_fix_adjustable (fix)
5510 fixS *fix;
252b5132 5511{
0baf16f2
AM		 5512 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5513 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5514 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5515 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5516 && fix->fx_r_type != BFD_RELOC_GPREL16
5517 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5518 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5519 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5520 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5521}
0baf16f2 5522#endif
252b5132 5523
3aeeedbb
AM		 5524/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5525 rs_align_code frag. */
5526
5527void
5528ppc_handle_align (struct frag *fragP)
5529{
5530 valueT count = (fragP->fr_next->fr_address
5531 - (fragP->fr_address + fragP->fr_fix));
5532
5533 if (count != 0 && (count & 3) == 0)
5534 {
5535 char *dest = fragP->fr_literal + fragP->fr_fix;
5536
5537 fragP->fr_var = 4;
5538 md_number_to_chars (dest, 0x60000000, 4);
5539
5540 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5541 {
5542 /* For power6, we want the last nop to be a group terminating
5543 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5544 immediately after this one, with its address set to the last
5545 nop location. This will automatically reduce the number of
5546 nops in the current frag by one. */
5547 if (count > 4)
5548 {
5549 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5550
5551 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5552 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5553 group_nop->fr_fix = 0;
5554 group_nop->fr_offset = 1;
5555 group_nop->fr_type = rs_fill;
5556 fragP->fr_next = group_nop;
5557 dest = group_nop->fr_literal;
5558 }
5559
5560 md_number_to_chars (dest, 0x60210000, 4);
5561 }
5562 }
5563}
5564
252b5132
RH		 5565/* Apply a fixup to the object code. This is called for all the
5566 fixups we generated by the call to fix_new_exp, above. In the call
5567 above we used a reloc code which was the largest legal reloc code
5568 plus the operand index. Here we undo that to recover the operand
5569 index. At this point all symbol values should be fully resolved,
5570 and we attempt to completely resolve the reloc. If we can not do
5571 that, we determine the correct reloc code and put it back in the
5572 fixup. */
5573
94f592af 5574void
55cf6793 5575md_apply_fix (fixP, valP, seg)
94f592af
NC		 5576 fixS *fixP;
5577 valueT * valP;
0baf16f2 5578 segT seg ATTRIBUTE_UNUSED;
252b5132 5579{
94f592af 5580 valueT value = * valP;
252b5132
RH		 5581
5582#ifdef OBJ_ELF
94f592af 5583 if (fixP->fx_addsy != NULL)
252b5132 5584 {
a161fe53 5585 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5586 if (fixP->fx_pcrel)
5587 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5588 }
5589 else
94f592af 5590 fixP->fx_done = 1;
252b5132 5591#else
a161fe53 5592 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5593 the symbol values. If we are doing this relocation the code in
5594 write.c is going to call bfd_install_relocation, which is also
5595 going to use the symbol value. That means that if the reloc is
5596 fully resolved we want to use *valP since bfd_install_relocation is
5597 not being used.
252b5132 5598 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5599 *valP, and must use fx_offset instead. However, if the reloc
5600 is PC relative, we do want to use *valP since it includes the
252b5132 5601 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5602 if (fixP->fx_addsy == (symbolS *) NULL)
5603 fixP->fx_done = 1;
5604
5605 else if (fixP->fx_pcrel)
5606 ;
5607
252b5132 5608 else
a161fe53
AM		 5609 value = fixP->fx_offset;
5610#endif
5611
5612 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5613 {
a161fe53
AM		 5614 /* We can't actually support subtracting a symbol. */
5615 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5616 }
252b5132 5617
94f592af 5618 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5619 {
5620 int opindex;
5621 const struct powerpc_operand *operand;
5622 char *where;
5623 unsigned long insn;
5624
94f592af 5625 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5626
5627 operand = &powerpc_operands[opindex];
5628
5629#ifdef OBJ_XCOFF
0baf16f2
AM		 5630 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5631 does not generate a reloc. It uses the offset of `sym' within its
5632 csect. Other usages, such as `.long sym', generate relocs. This
5633 is the documented behaviour of non-TOC symbols. */
252b5132
RH		 5634 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5635 && operand->bits == 16
5636 && operand->shift == 0
2b3c4602 5637 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5638 && fixP->fx_addsy != NULL
5639 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5640 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5641 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5642 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5643 {
94f592af
NC		 5644 value = fixP->fx_offset;
5645 fixP->fx_done = 1;
252b5132
RH		 5646 }
5647#endif
5648
5649 /* Fetch the instruction, insert the fully resolved operand
5650 value, and stuff the instruction back again. */
94f592af 5651 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5652 if (target_big_endian)
5653 insn = bfd_getb32 ((unsigned char *) where);
5654 else
5655 insn = bfd_getl32 ((unsigned char *) where);
5656 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5657 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5658 if (target_big_endian)
5659 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5660 else
5661 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5662
94f592af
NC		 5663 if (fixP->fx_done)
5664 /* Nothing else to do here. */
5665 return;
252b5132 5666
94f592af 5667 assert (fixP->fx_addsy != NULL);
0baf16f2 5668
252b5132
RH		 5669 /* Determine a BFD reloc value based on the operand information.
5670 We are only prepared to turn a few of the operands into
0baf16f2 5671 relocs. */
11b37b7b
AM		 5672 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5673 && operand->bits == 26
5674 && operand->shift == 0)
94f592af 5675 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM		 5676 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5677 && operand->bits == 16
5678 && operand->shift == 0)
95210096
AM		 5679 {
5680 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5681#ifdef OBJ_XCOFF
5682 fixP->fx_size = 2;
5683 if (target_big_endian)
5684 fixP->fx_where += 2;
5685#endif
5686 }
11b37b7b
AM		 5687 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5688 && operand->bits == 26
5689 && operand->shift == 0)
94f592af 5690 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM		 5691 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5692 && operand->bits == 16
5693 && operand->shift == 0)
95210096
AM		 5694 {
5695 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5696#ifdef OBJ_XCOFF
5697 fixP->fx_size = 2;
5698 if (target_big_endian)
5699 fixP->fx_where += 2;
5700#endif
5701 }
0baf16f2 5702#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM		 5703 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5704 && operand->bits == 16
a7fc733f 5705 && operand->shift == 0)
11b37b7b 5706 {
a7fc733f
AM		 5707 if (ppc_is_toc_sym (fixP->fx_addsy))
5708 {
5709 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5710#ifdef OBJ_ELF
a7fc733f
AM		 5711 if (ppc_obj64
5712 && (operand->flags & PPC_OPERAND_DS) != 0)
5713 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5714#endif
5715 }
5716 else
5717 {
5718 fixP->fx_r_type = BFD_RELOC_16;
5719#ifdef OBJ_ELF
5720 if (ppc_obj64
5721 && (operand->flags & PPC_OPERAND_DS) != 0)
5722 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5723#endif
a7fc733f 5724 }
94f592af 5725 fixP->fx_size = 2;
11b37b7b 5726 if (target_big_endian)
94f592af 5727 fixP->fx_where += 2;
11b37b7b 5728 }
0baf16f2 5729#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5730 else
252b5132
RH		 5731 {
5732 char *sfile;
5733 unsigned int sline;
5734
5735 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5736 symbol. */
94f592af
NC		 5737 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5738 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5739 _("unresolved expression that must be resolved"));
5740 else
94f592af 5741 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5742 _("unsupported relocation against %s"),
94f592af
NC		 5743 S_GET_NAME (fixP->fx_addsy));
5744 fixP->fx_done = 1;
5745 return;
252b5132
RH		 5746 }
5747 }
5748 else
5749 {
5750#ifdef OBJ_ELF
94f592af 5751 ppc_elf_validate_fix (fixP, seg);
252b5132 5752#endif
94f592af 5753 switch (fixP->fx_r_type)
252b5132 5754 {
252b5132 5755 case BFD_RELOC_CTOR:
2b3c4602 5756 if (ppc_obj64)
9c7977b3
AM		 5757 goto ctor64;
5758 /* fall through */
5759
0baf16f2 5760 case BFD_RELOC_32:
94f592af
NC		 5761 if (fixP->fx_pcrel)
5762 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5763 /* fall through */
252b5132
RH		 5764
5765 case BFD_RELOC_RVA:
5766 case BFD_RELOC_32_PCREL:
252b5132 5767 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5768 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5769 value, 4);
5770 break;
5771
7f6d05e8 5772 case BFD_RELOC_64:
9c7977b3 5773 ctor64:
94f592af
NC		 5774 if (fixP->fx_pcrel)
5775 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5776 /* fall through */
0baf16f2 5777
7f6d05e8 5778 case BFD_RELOC_64_PCREL:
94f592af 5779 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5780 value, 8);
81d4177b 5781 break;
0baf16f2 5782
252b5132
RH		 5783 case BFD_RELOC_GPREL16:
5784 case BFD_RELOC_16_GOT_PCREL:
5785 case BFD_RELOC_16_GOTOFF:
5786 case BFD_RELOC_LO16_GOTOFF:
5787 case BFD_RELOC_HI16_GOTOFF:
5788 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5789 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5790 case BFD_RELOC_LO16_BASEREL:
5791 case BFD_RELOC_HI16_BASEREL:
5792 case BFD_RELOC_HI16_S_BASEREL:
5793 case BFD_RELOC_PPC_EMB_NADDR16:
5794 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5795 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5796 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5797 case BFD_RELOC_PPC_EMB_SDAI16:
5798 case BFD_RELOC_PPC_EMB_SDA2REL:
5799 case BFD_RELOC_PPC_EMB_SDA2I16:
5800 case BFD_RELOC_PPC_EMB_RELSEC16:
5801 case BFD_RELOC_PPC_EMB_RELST_LO:
5802 case BFD_RELOC_PPC_EMB_RELST_HI:
5803 case BFD_RELOC_PPC_EMB_RELST_HA:
5804 case BFD_RELOC_PPC_EMB_RELSDA:
5805 case BFD_RELOC_PPC_TOC16:
0baf16f2 5806#ifdef OBJ_ELF
0baf16f2
AM		 5807 case BFD_RELOC_PPC64_TOC16_LO:
5808 case BFD_RELOC_PPC64_TOC16_HI:
5809 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5810#endif
94f592af 5811 if (fixP->fx_pcrel)
252b5132 5812 {
94f592af
NC		 5813 if (fixP->fx_addsy != NULL)
5814 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5815 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5816 bfd_get_reloc_code_name (fixP->fx_r_type),
5817 S_GET_NAME (fixP->fx_addsy));
252b5132 5818 else
94f592af 5819 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5820 _("cannot emit PC relative %s relocation"),
94f592af 5821 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5822 }
5823
94f592af 5824 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5825 value, 2);
5826 break;
5827
3c9d25f4
AM		 5828 case BFD_RELOC_16:
5829 if (fixP->fx_pcrel)
5830 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5831 /* fall through */
5832
5833 case BFD_RELOC_16_PCREL:
5834 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5835 value, 2);
5836 break;
5837
5838 case BFD_RELOC_LO16:
5839 if (fixP->fx_pcrel)
5840 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5841 /* fall through */
5842
5843 case BFD_RELOC_LO16_PCREL:
5844 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5845 value, 2);
5846 break;
5847
252b5132
RH		 5848 /* This case happens when you write, for example,
5849 lis %r3,(L1-L2)@ha
5850 where L1 and L2 are defined later. */
5851 case BFD_RELOC_HI16:
94f592af 5852 if (fixP->fx_pcrel)
3c9d25f4
AM		 5853 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5854 /* fall through */
5855
5856 case BFD_RELOC_HI16_PCREL:
94f592af 5857 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5858 PPC_HI (value), 2);
252b5132 5859 break;
0baf16f2 5860
252b5132 5861 case BFD_RELOC_HI16_S:
94f592af 5862 if (fixP->fx_pcrel)
3c9d25f4
AM		 5863 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5864 /* fall through */
5865
5866 case BFD_RELOC_HI16_S_PCREL:
94f592af 5867 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5868 PPC_HA (value), 2);
5869 break;
5870
5871#ifdef OBJ_ELF
0baf16f2 5872 case BFD_RELOC_PPC64_HIGHER:
94f592af 5873 if (fixP->fx_pcrel)
0baf16f2 5874 abort ();
94f592af 5875 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5876 PPC_HIGHER (value), 2);
252b5132
RH		 5877 break;
5878
0baf16f2 5879 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5880 if (fixP->fx_pcrel)
0baf16f2 5881 abort ();
94f592af 5882 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5883 PPC_HIGHERA (value), 2);
5884 break;
5885
5886 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5887 if (fixP->fx_pcrel)
0baf16f2 5888 abort ();
94f592af 5889 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5890 PPC_HIGHEST (value), 2);
5891 break;
5892
5893 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5894 if (fixP->fx_pcrel)
0baf16f2 5895 abort ();
94f592af 5896 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5897 PPC_HIGHESTA (value), 2);
5898 break;
5899
5900 case BFD_RELOC_PPC64_ADDR16_DS:
5901 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5902 case BFD_RELOC_PPC64_GOT16_DS:
5903 case BFD_RELOC_PPC64_GOT16_LO_DS:
5904 case BFD_RELOC_PPC64_PLT16_LO_DS:
5905 case BFD_RELOC_PPC64_SECTOFF_DS:
5906 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5907 case BFD_RELOC_PPC64_TOC16_DS:
5908 case BFD_RELOC_PPC64_TOC16_LO_DS:
5909 case BFD_RELOC_PPC64_PLTGOT16_DS:
5910 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5911 if (fixP->fx_pcrel)
0baf16f2
AM		 5912 abort ();
5913 {
2132e3a3 5914 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5915 unsigned long val, mask;
0baf16f2
AM		 5916
5917 if (target_big_endian)
adadcc0c 5918 val = bfd_getb32 (where - 2);
0baf16f2 5919 else
adadcc0c
AM		 5920 val = bfd_getl32 (where);
5921 mask = 0xfffc;
5922 /* lq insns reserve the four lsbs. */
5923 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5924 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5925 mask = 0xfff0;
5926 val |= value & mask;
0baf16f2
AM		 5927 if (target_big_endian)
5928 bfd_putb16 ((bfd_vma) val, where);
5929 else
5930 bfd_putl16 ((bfd_vma) val, where);
5931 }
5932 break;
cdba85ec 5933
ba0b2174
AM		 5934 case BFD_RELOC_PPC_B16_BRTAKEN:
5935 case BFD_RELOC_PPC_B16_BRNTAKEN:
5936 case BFD_RELOC_PPC_BA16_BRTAKEN:
5937 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5938 break;
5939
cdba85ec 5940 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5941 break;
5942
cdba85ec
AM		 5943 case BFD_RELOC_PPC_DTPMOD:
5944 case BFD_RELOC_PPC_TPREL16:
5945 case BFD_RELOC_PPC_TPREL16_LO:
5946 case BFD_RELOC_PPC_TPREL16_HI:
5947 case BFD_RELOC_PPC_TPREL16_HA:
5948 case BFD_RELOC_PPC_TPREL:
5949 case BFD_RELOC_PPC_DTPREL16:
5950 case BFD_RELOC_PPC_DTPREL16_LO:
5951 case BFD_RELOC_PPC_DTPREL16_HI:
5952 case BFD_RELOC_PPC_DTPREL16_HA:
5953 case BFD_RELOC_PPC_DTPREL:
5954 case BFD_RELOC_PPC_GOT_TLSGD16:
5955 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5956 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5957 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5958 case BFD_RELOC_PPC_GOT_TLSLD16:
5959 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5960 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5961 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5962 case BFD_RELOC_PPC_GOT_TPREL16:
5963 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5964 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5965 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5966 case BFD_RELOC_PPC_GOT_DTPREL16:
5967 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5968 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5969 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5970 case BFD_RELOC_PPC64_TPREL16_DS:
5971 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5972 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5973 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5974 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5975 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5976 case BFD_RELOC_PPC64_DTPREL16_DS:
5977 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5978 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5979 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5980 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5981 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 5982 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 5983 break;
0baf16f2 5984#endif
252b5132 5985 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5986 bytes, rather than 2, so offset it here appropriately. */
252b5132 5987 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5988 if (fixP->fx_pcrel)
252b5132
RH		 5989 abort ();
5990
94f592af 5991 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5992 + ((target_big_endian) ? 2 : 0),
5993 value, 2);
5994 break;
5995
5996 case BFD_RELOC_8:
94f592af 5997 if (fixP->fx_pcrel)
31a91399
NC		 5998 {
5999 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6000 ".byte <undefined_symbol> - ." */
31a91399
NC		 6001 if (fixP->fx_addsy)
6002 as_bad (_("Unable to handle reference to symbol %s"),
6003 S_GET_NAME (fixP->fx_addsy));
6004 else
6005 as_bad (_("Unable to resolve expression"));
6006 fixP->fx_done = 1;
6007 }
6008 else
6009 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6010 value, 1);
252b5132
RH		 6011 break;
6012
6013 case BFD_RELOC_24_PLT_PCREL:
6014 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6015 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6016 abort ();
6017
94f592af 6018 if (fixP->fx_done)
99a814a1
AM		 6019 {
6020 char *where;
6021 unsigned long insn;
6022
6023 /* Fetch the instruction, insert the fully resolved operand
6024 value, and stuff the instruction back again. */
94f592af 6025 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6026 if (target_big_endian)
6027 insn = bfd_getb32 ((unsigned char *) where);
6028 else
6029 insn = bfd_getl32 ((unsigned char *) where);
6030 if ((value & 3) != 0)
94f592af 6031 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6032 _("must branch to an address a multiple of 4"));
6033 if ((offsetT) value < -0x40000000
6034 || (offsetT) value >= 0x40000000)
94f592af 6035 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6036 _("@local or @plt branch destination is too far away, %ld bytes"),
6037 (long) value);
6038 insn = insn | (value & 0x03fffffc);
6039 if (target_big_endian)
6040 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6041 else
6042 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6043 }
252b5132
RH		 6044 break;
6045
6046 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6047 fixP->fx_done = 0;
6048 if (fixP->fx_addsy
6049 && !S_IS_DEFINED (fixP->fx_addsy)
6050 && !S_IS_WEAK (fixP->fx_addsy))
6051 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6052 break;
6053
6054 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6055 fixP->fx_done = 0;
252b5132
RH		 6056 break;
6057
0baf16f2 6058#ifdef OBJ_ELF
0baf16f2
AM		 6059 /* Generated by reference to `sym@tocbase'. The sym is
6060 ignored by the linker. */
6061 case BFD_RELOC_PPC64_TOC:
94f592af 6062 fixP->fx_done = 0;
0baf16f2 6063 break;
0baf16f2 6064#endif
252b5132 6065 default:
bc805888 6066 fprintf (stderr,
94f592af 6067 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6068 fflush (stderr);
252b5132
RH		 6069 abort ();
6070 }
6071 }
6072
6073#ifdef OBJ_ELF
94f592af 6074 fixP->fx_addnumber = value;
4e6935a6
AM		 6075
6076 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6077 from the section contents. If we are going to be emitting a reloc
6078 then the section contents are immaterial, so don't warn if they
6079 happen to overflow. Leave such warnings to ld. */
6080 if (!fixP->fx_done)
6081 fixP->fx_no_overflow = 1;
252b5132 6082#else
94f592af
NC		 6083 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6084 fixP->fx_addnumber = 0;
252b5132
RH		 6085 else
6086 {
6087#ifdef TE_PE
94f592af 6088 fixP->fx_addnumber = 0;
252b5132
RH		 6089#else
6090 /* We want to use the offset within the data segment of the
6091 symbol, not the actual VMA of the symbol. */
94f592af
NC		 6092 fixP->fx_addnumber =
6093 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 6094#endif
6095 }
6096#endif
252b5132
RH		 6097}
6098
6099/* Generate a reloc for a fixup. */
6100
6101arelent *
6102tc_gen_reloc (seg, fixp)
92161534 6103 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 6104 fixS *fixp;
6105{
6106 arelent *reloc;
6107
6108 reloc = (arelent *) xmalloc (sizeof (arelent));
6109
49309057
ILT		 6110 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6111 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6112 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6113 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6114 if (reloc->howto == (reloc_howto_type *) NULL)
6115 {
6116 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6117 _("reloc %d not supported by object file format"),
6118 (int) fixp->fx_r_type);
252b5132
RH		 6119 return NULL;
6120 }
6121 reloc->addend = fixp->fx_addnumber;
6122
6123 return reloc;
6124}
75e21f08
JJ		 6125
6126void
6127ppc_cfi_frame_initial_instructions ()
6128{
6129 cfi_add_CFA_def_cfa (1, 0);
6130}
6131
6132int
1df69f4f 6133tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6134{
6135 unsigned int regnum = -1;
6136 unsigned int i;
6137 const char *p;
6138 char *q;
6139 static struct { char *name; int dw2regnum; } regnames[] =
6140 {
6141 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6142 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6143 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6144 { "spe_acc", 111 }, { "spefscr", 112 }
6145 };
6146
6147 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6148 if (strcmp (regnames[i].name, regname) == 0)
6149 return regnames[i].dw2regnum;
6150
6151 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6152 {
6153 p = regname + 1 + (regname[1] == '.');
6154 regnum = strtoul (p, &q, 10);
6155 if (p == q || *q || regnum >= 32)
6156 return -1;
6157 if (regname[0] == 'f')
b7d7dc63 6158 regnum += 32;
75e21f08 6159 else if (regname[0] == 'v')
b7d7dc63 6160 regnum += 77;
75e21f08
JJ		 6161 }
6162 else if (regname[0] == 'c' && regname[1] == 'r')
6163 {
6164 p = regname + 2 + (regname[2] == '.');
6165 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6166 return -1;
75e21f08
JJ		 6167 regnum = p[0] - '0' + 68;
6168 }
6169 return regnum;
6170}
GDB Binutils - Deliverables
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