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[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
0dc93057 3 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
c865e45b 111static void ppc_ref (int);
98027b10
AM		 112static void ppc_section (int);
113static void ppc_named_section (int);
114static void ppc_stabx (int);
115static void ppc_rename (int);
116static void ppc_toc (int);
117static void ppc_xcoff_cons (int);
118static void ppc_vbyte (int);
252b5132
RH		 119#endif
120
121#ifdef OBJ_ELF
98027b10
AM		 122static void ppc_elf_cons (int);
123static void ppc_elf_rdata (int);
124static void ppc_elf_lcomm (int);
252b5132
RH		 125#endif
126
127#ifdef TE_PE
98027b10
AM		 128static void ppc_previous (int);
129static void ppc_pdata (int);
130static void ppc_ydata (int);
131static void ppc_reldata (int);
132static void ppc_rdata (int);
133static void ppc_ualong (int);
134static void ppc_znop (int);
135static void ppc_pe_comm (int);
136static void ppc_pe_section (int);
137static void ppc_pe_function (int);
138static void ppc_pe_tocd (int);
252b5132
RH		 139#endif
140\f
141/* Generic assembler global variables which must be defined by all
142 targets. */
143
144#ifdef OBJ_ELF
145/* This string holds the chars that always start a comment. If the
146 pre-processor is disabled, these aren't very useful. The macro
147 tc_comment_chars points to this. We use this, rather than the
148 usual comment_chars, so that we can switch for Solaris conventions. */
149static const char ppc_solaris_comment_chars[] = "#!";
150static const char ppc_eabi_comment_chars[] = "#";
151
152#ifdef TARGET_SOLARIS_COMMENT
153const char *ppc_comment_chars = ppc_solaris_comment_chars;
154#else
155const char *ppc_comment_chars = ppc_eabi_comment_chars;
156#endif
157#else
158const char comment_chars[] = "#";
159#endif
160
161/* Characters which start a comment at the beginning of a line. */
162const char line_comment_chars[] = "#";
163
164/* Characters which may be used to separate multiple commands on a
165 single line. */
166const char line_separator_chars[] = ";";
167
168/* Characters which are used to indicate an exponent in a floating
169 point number. */
170const char EXP_CHARS[] = "eE";
171
172/* Characters which mean that a number is a floating point constant,
173 as in 0d1.0. */
174const char FLT_CHARS[] = "dD";
5ce8663f 175
5e02f92e 176/* Anything that can start an operand needs to be mentioned here,
ac805826 177 to stop the input scrubber eating whitespace. */
5e02f92e 178const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 179
180/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
181int ppc_cie_data_alignment;
783de163
AM		 182
183/* The type of processor we are assembling for. This is one or more
184 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 185ppc_cpu_t ppc_cpu = 0;
252b5132
RH		 186\f
187/* The target specific pseudo-ops which we support. */
188
189const pseudo_typeS md_pseudo_table[] =
190{
191 /* Pseudo-ops which must be overridden. */
192 { "byte", ppc_byte, 0 },
193
194#ifdef OBJ_XCOFF
195 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
196 legitimately belong in the obj-*.c file. However, XCOFF is based
197 on COFF, and is only implemented for the RS/6000. We just use
198 obj-coff.c, and add what we need here. */
199 { "comm", ppc_comm, 0 },
200 { "lcomm", ppc_comm, 1 },
201 { "bb", ppc_bb, 0 },
202 { "bc", ppc_bc, 0 },
203 { "bf", ppc_bf, 0 },
204 { "bi", ppc_biei, 0 },
205 { "bs", ppc_bs, 0 },
206 { "csect", ppc_csect, 0 },
207 { "data", ppc_section, 'd' },
208 { "eb", ppc_eb, 0 },
209 { "ec", ppc_ec, 0 },
210 { "ef", ppc_ef, 0 },
211 { "ei", ppc_biei, 1 },
212 { "es", ppc_es, 0 },
213 { "extern", ppc_extern, 0 },
214 { "function", ppc_function, 0 },
215 { "lglobl", ppc_lglobl, 0 },
c865e45b 216 { "ref", ppc_ref, 0 },
252b5132
RH		 217 { "rename", ppc_rename, 0 },
218 { "section", ppc_named_section, 0 },
219 { "stabx", ppc_stabx, 0 },
220 { "text", ppc_section, 't' },
221 { "toc", ppc_toc, 0 },
222 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 223 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 224 { "word", ppc_xcoff_cons, 1 },
225 { "short", ppc_xcoff_cons, 1 },
226 { "vbyte", ppc_vbyte, 0 },
227#endif
228
229#ifdef OBJ_ELF
0baf16f2
AM		 230 { "llong", ppc_elf_cons, 8 },
231 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 232 { "long", ppc_elf_cons, 4 },
233 { "word", ppc_elf_cons, 2 },
234 { "short", ppc_elf_cons, 2 },
235 { "rdata", ppc_elf_rdata, 0 },
236 { "rodata", ppc_elf_rdata, 0 },
237 { "lcomm", ppc_elf_lcomm, 0 },
238#endif
239
240#ifdef TE_PE
99a814a1 241 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 242 { "previous", ppc_previous, 0 },
243 { "pdata", ppc_pdata, 0 },
244 { "ydata", ppc_ydata, 0 },
245 { "reldata", ppc_reldata, 0 },
246 { "rdata", ppc_rdata, 0 },
247 { "ualong", ppc_ualong, 0 },
248 { "znop", ppc_znop, 0 },
249 { "comm", ppc_pe_comm, 0 },
250 { "lcomm", ppc_pe_comm, 1 },
251 { "section", ppc_pe_section, 0 },
252 { "function", ppc_pe_function,0 },
253 { "tocd", ppc_pe_tocd, 0 },
254#endif
255
0baf16f2 256#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 257 { "tc", ppc_tc, 0 },
0baf16f2
AM		 258 { "machine", ppc_machine, 0 },
259#endif
252b5132
RH		 260
261 { NULL, NULL, 0 }
262};
263
264\f
99a814a1
AM		 265/* Predefined register names if -mregnames (or default for Windows NT).
266 In general, there are lots of them, in an attempt to be compatible
267 with a number of other Windows NT assemblers. */
252b5132
RH		 268
269/* Structure to hold information about predefined registers. */
270struct pd_reg
271 {
272 char *name;
273 int value;
274 };
275
276/* List of registers that are pre-defined:
277
278 Each general register has predefined names of the form:
279 1. r<reg_num> which has the value <reg_num>.
280 2. r.<reg_num> which has the value <reg_num>.
281
252b5132
RH		 282 Each floating point register has predefined names of the form:
283 1. f<reg_num> which has the value <reg_num>.
284 2. f.<reg_num> which has the value <reg_num>.
285
7a899fff
C		 286 Each vector unit register has predefined names of the form:
287 1. v<reg_num> which has the value <reg_num>.
288 2. v.<reg_num> which has the value <reg_num>.
289
252b5132
RH		 290 Each condition register has predefined names of the form:
291 1. cr<reg_num> which has the value <reg_num>.
292 2. cr.<reg_num> which has the value <reg_num>.
293
294 There are individual registers as well:
295 sp or r.sp has the value 1
296 rtoc or r.toc has the value 2
297 fpscr has the value 0
298 xer has the value 1
299 lr has the value 8
300 ctr has the value 9
301 pmr has the value 0
302 dar has the value 19
303 dsisr has the value 18
304 dec has the value 22
305 sdr1 has the value 25
306 srr0 has the value 26
307 srr1 has the value 27
308
81d4177b 309 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 310
311static const struct pd_reg pre_defined_registers[] =
312{
313 { "cr.0", 0 }, /* Condition Registers */
314 { "cr.1", 1 },
315 { "cr.2", 2 },
316 { "cr.3", 3 },
317 { "cr.4", 4 },
318 { "cr.5", 5 },
319 { "cr.6", 6 },
320 { "cr.7", 7 },
321
322 { "cr0", 0 },
323 { "cr1", 1 },
324 { "cr2", 2 },
325 { "cr3", 3 },
326 { "cr4", 4 },
327 { "cr5", 5 },
328 { "cr6", 6 },
329 { "cr7", 7 },
330
331 { "ctr", 9 },
332
333 { "dar", 19 }, /* Data Access Register */
334 { "dec", 22 }, /* Decrementer */
335 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
336
337 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 338 { "f.1", 1 },
339 { "f.10", 10 },
340 { "f.11", 11 },
341 { "f.12", 12 },
342 { "f.13", 13 },
343 { "f.14", 14 },
344 { "f.15", 15 },
345 { "f.16", 16 },
346 { "f.17", 17 },
347 { "f.18", 18 },
348 { "f.19", 19 },
349 { "f.2", 2 },
350 { "f.20", 20 },
351 { "f.21", 21 },
352 { "f.22", 22 },
353 { "f.23", 23 },
354 { "f.24", 24 },
355 { "f.25", 25 },
356 { "f.26", 26 },
357 { "f.27", 27 },
358 { "f.28", 28 },
359 { "f.29", 29 },
360 { "f.3", 3 },
252b5132
RH		 361 { "f.30", 30 },
362 { "f.31", 31 },
066be9f7
PB		 363
364 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
365 { "f.33", 33 },
366 { "f.34", 34 },
367 { "f.35", 35 },
368 { "f.36", 36 },
369 { "f.37", 37 },
370 { "f.38", 38 },
371 { "f.39", 39 },
81d4177b 372 { "f.4", 4 },
066be9f7
PB		 373 { "f.40", 40 },
374 { "f.41", 41 },
375 { "f.42", 42 },
376 { "f.43", 43 },
377 { "f.44", 44 },
378 { "f.45", 45 },
379 { "f.46", 46 },
380 { "f.47", 47 },
381 { "f.48", 48 },
382 { "f.49", 49 },
81d4177b 383 { "f.5", 5 },
066be9f7
PB		 384 { "f.50", 50 },
385 { "f.51", 51 },
386 { "f.52", 52 },
387 { "f.53", 53 },
388 { "f.54", 54 },
389 { "f.55", 55 },
390 { "f.56", 56 },
391 { "f.57", 57 },
392 { "f.58", 58 },
393 { "f.59", 59 },
81d4177b 394 { "f.6", 6 },
066be9f7
PB		 395 { "f.60", 60 },
396 { "f.61", 61 },
397 { "f.62", 62 },
398 { "f.63", 63 },
81d4177b
KH		 399 { "f.7", 7 },
400 { "f.8", 8 },
401 { "f.9", 9 },
402
403 { "f0", 0 },
404 { "f1", 1 },
405 { "f10", 10 },
406 { "f11", 11 },
407 { "f12", 12 },
408 { "f13", 13 },
409 { "f14", 14 },
410 { "f15", 15 },
411 { "f16", 16 },
412 { "f17", 17 },
413 { "f18", 18 },
414 { "f19", 19 },
415 { "f2", 2 },
416 { "f20", 20 },
417 { "f21", 21 },
418 { "f22", 22 },
419 { "f23", 23 },
420 { "f24", 24 },
421 { "f25", 25 },
422 { "f26", 26 },
423 { "f27", 27 },
424 { "f28", 28 },
425 { "f29", 29 },
426 { "f3", 3 },
252b5132
RH		 427 { "f30", 30 },
428 { "f31", 31 },
066be9f7
PB		 429
430 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
431 { "f33", 33 },
432 { "f34", 34 },
433 { "f35", 35 },
434 { "f36", 36 },
435 { "f37", 37 },
436 { "f38", 38 },
437 { "f39", 39 },
81d4177b 438 { "f4", 4 },
066be9f7
PB		 439 { "f40", 40 },
440 { "f41", 41 },
441 { "f42", 42 },
442 { "f43", 43 },
443 { "f44", 44 },
444 { "f45", 45 },
445 { "f46", 46 },
446 { "f47", 47 },
447 { "f48", 48 },
448 { "f49", 49 },
81d4177b 449 { "f5", 5 },
066be9f7
PB		 450 { "f50", 50 },
451 { "f51", 51 },
452 { "f52", 52 },
453 { "f53", 53 },
454 { "f54", 54 },
455 { "f55", 55 },
456 { "f56", 56 },
457 { "f57", 57 },
458 { "f58", 58 },
459 { "f59", 59 },
81d4177b 460 { "f6", 6 },
066be9f7
PB		 461 { "f60", 60 },
462 { "f61", 61 },
463 { "f62", 62 },
464 { "f63", 63 },
81d4177b
KH		 465 { "f7", 7 },
466 { "f8", 8 },
467 { "f9", 9 },
252b5132
RH		 468
469 { "fpscr", 0 },
470
c3d65c1c
BE		 471 /* Quantization registers used with pair single instructions. */
472 { "gqr.0", 0 },
473 { "gqr.1", 1 },
474 { "gqr.2", 2 },
475 { "gqr.3", 3 },
476 { "gqr.4", 4 },
477 { "gqr.5", 5 },
478 { "gqr.6", 6 },
479 { "gqr.7", 7 },
480 { "gqr0", 0 },
481 { "gqr1", 1 },
482 { "gqr2", 2 },
483 { "gqr3", 3 },
484 { "gqr4", 4 },
485 { "gqr5", 5 },
486 { "gqr6", 6 },
487 { "gqr7", 7 },
488
252b5132
RH		 489 { "lr", 8 }, /* Link Register */
490
491 { "pmr", 0 },
492
493 { "r.0", 0 }, /* General Purpose Registers */
494 { "r.1", 1 },
495 { "r.10", 10 },
496 { "r.11", 11 },
497 { "r.12", 12 },
498 { "r.13", 13 },
499 { "r.14", 14 },
500 { "r.15", 15 },
501 { "r.16", 16 },
502 { "r.17", 17 },
503 { "r.18", 18 },
504 { "r.19", 19 },
505 { "r.2", 2 },
506 { "r.20", 20 },
507 { "r.21", 21 },
508 { "r.22", 22 },
509 { "r.23", 23 },
510 { "r.24", 24 },
511 { "r.25", 25 },
512 { "r.26", 26 },
513 { "r.27", 27 },
514 { "r.28", 28 },
515 { "r.29", 29 },
516 { "r.3", 3 },
517 { "r.30", 30 },
518 { "r.31", 31 },
519 { "r.4", 4 },
520 { "r.5", 5 },
521 { "r.6", 6 },
522 { "r.7", 7 },
523 { "r.8", 8 },
524 { "r.9", 9 },
525
526 { "r.sp", 1 }, /* Stack Pointer */
527
528 { "r.toc", 2 }, /* Pointer to the table of contents */
529
530 { "r0", 0 }, /* More general purpose registers */
531 { "r1", 1 },
532 { "r10", 10 },
533 { "r11", 11 },
534 { "r12", 12 },
535 { "r13", 13 },
536 { "r14", 14 },
537 { "r15", 15 },
538 { "r16", 16 },
539 { "r17", 17 },
540 { "r18", 18 },
541 { "r19", 19 },
542 { "r2", 2 },
543 { "r20", 20 },
544 { "r21", 21 },
545 { "r22", 22 },
546 { "r23", 23 },
547 { "r24", 24 },
548 { "r25", 25 },
549 { "r26", 26 },
550 { "r27", 27 },
551 { "r28", 28 },
552 { "r29", 29 },
553 { "r3", 3 },
554 { "r30", 30 },
555 { "r31", 31 },
556 { "r4", 4 },
557 { "r5", 5 },
558 { "r6", 6 },
559 { "r7", 7 },
560 { "r8", 8 },
561 { "r9", 9 },
562
563 { "rtoc", 2 }, /* Table of contents */
564
565 { "sdr1", 25 }, /* Storage Description Register 1 */
566
567 { "sp", 1 },
568
569 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
570 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 571
066be9f7 572 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 573 { "v.1", 1 },
574 { "v.10", 10 },
575 { "v.11", 11 },
576 { "v.12", 12 },
577 { "v.13", 13 },
578 { "v.14", 14 },
579 { "v.15", 15 },
580 { "v.16", 16 },
581 { "v.17", 17 },
582 { "v.18", 18 },
583 { "v.19", 19 },
584 { "v.2", 2 },
585 { "v.20", 20 },
586 { "v.21", 21 },
587 { "v.22", 22 },
588 { "v.23", 23 },
589 { "v.24", 24 },
590 { "v.25", 25 },
591 { "v.26", 26 },
592 { "v.27", 27 },
593 { "v.28", 28 },
594 { "v.29", 29 },
595 { "v.3", 3 },
7a899fff
C		 596 { "v.30", 30 },
597 { "v.31", 31 },
81d4177b
KH		 598 { "v.4", 4 },
599 { "v.5", 5 },
600 { "v.6", 6 },
601 { "v.7", 7 },
602 { "v.8", 8 },
603 { "v.9", 9 },
7a899fff
C		 604
605 { "v0", 0 },
81d4177b
KH		 606 { "v1", 1 },
607 { "v10", 10 },
608 { "v11", 11 },
609 { "v12", 12 },
610 { "v13", 13 },
611 { "v14", 14 },
612 { "v15", 15 },
613 { "v16", 16 },
614 { "v17", 17 },
615 { "v18", 18 },
616 { "v19", 19 },
617 { "v2", 2 },
618 { "v20", 20 },
619 { "v21", 21 },
620 { "v22", 22 },
621 { "v23", 23 },
622 { "v24", 24 },
623 { "v25", 25 },
624 { "v26", 26 },
625 { "v27", 27 },
626 { "v28", 28 },
627 { "v29", 29 },
628 { "v3", 3 },
7a899fff
C		 629 { "v30", 30 },
630 { "v31", 31 },
81d4177b
KH		 631 { "v4", 4 },
632 { "v5", 5 },
633 { "v6", 6 },
634 { "v7", 7 },
635 { "v8", 8 },
7a899fff 636 { "v9", 9 },
252b5132 637
066be9f7
PB		 638 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
639 { "vs.1", 1 },
640 { "vs.10", 10 },
641 { "vs.11", 11 },
642 { "vs.12", 12 },
643 { "vs.13", 13 },
644 { "vs.14", 14 },
645 { "vs.15", 15 },
646 { "vs.16", 16 },
647 { "vs.17", 17 },
648 { "vs.18", 18 },
649 { "vs.19", 19 },
650 { "vs.2", 2 },
651 { "vs.20", 20 },
652 { "vs.21", 21 },
653 { "vs.22", 22 },
654 { "vs.23", 23 },
655 { "vs.24", 24 },
656 { "vs.25", 25 },
657 { "vs.26", 26 },
658 { "vs.27", 27 },
659 { "vs.28", 28 },
660 { "vs.29", 29 },
661 { "vs.3", 3 },
662 { "vs.30", 30 },
663 { "vs.31", 31 },
664 { "vs.32", 32 },
665 { "vs.33", 33 },
666 { "vs.34", 34 },
667 { "vs.35", 35 },
668 { "vs.36", 36 },
669 { "vs.37", 37 },
670 { "vs.38", 38 },
671 { "vs.39", 39 },
672 { "vs.4", 4 },
673 { "vs.40", 40 },
674 { "vs.41", 41 },
675 { "vs.42", 42 },
676 { "vs.43", 43 },
677 { "vs.44", 44 },
678 { "vs.45", 45 },
679 { "vs.46", 46 },
680 { "vs.47", 47 },
681 { "vs.48", 48 },
682 { "vs.49", 49 },
683 { "vs.5", 5 },
684 { "vs.50", 50 },
685 { "vs.51", 51 },
686 { "vs.52", 52 },
687 { "vs.53", 53 },
688 { "vs.54", 54 },
689 { "vs.55", 55 },
690 { "vs.56", 56 },
691 { "vs.57", 57 },
692 { "vs.58", 58 },
693 { "vs.59", 59 },
694 { "vs.6", 6 },
695 { "vs.60", 60 },
696 { "vs.61", 61 },
697 { "vs.62", 62 },
698 { "vs.63", 63 },
699 { "vs.7", 7 },
700 { "vs.8", 8 },
701 { "vs.9", 9 },
702
703 { "vs0", 0 },
704 { "vs1", 1 },
705 { "vs10", 10 },
706 { "vs11", 11 },
707 { "vs12", 12 },
708 { "vs13", 13 },
709 { "vs14", 14 },
710 { "vs15", 15 },
711 { "vs16", 16 },
712 { "vs17", 17 },
713 { "vs18", 18 },
714 { "vs19", 19 },
715 { "vs2", 2 },
716 { "vs20", 20 },
717 { "vs21", 21 },
718 { "vs22", 22 },
719 { "vs23", 23 },
720 { "vs24", 24 },
721 { "vs25", 25 },
722 { "vs26", 26 },
723 { "vs27", 27 },
724 { "vs28", 28 },
725 { "vs29", 29 },
726 { "vs3", 3 },
727 { "vs30", 30 },
728 { "vs31", 31 },
729 { "vs32", 32 },
730 { "vs33", 33 },
731 { "vs34", 34 },
732 { "vs35", 35 },
733 { "vs36", 36 },
734 { "vs37", 37 },
735 { "vs38", 38 },
736 { "vs39", 39 },
737 { "vs4", 4 },
738 { "vs40", 40 },
739 { "vs41", 41 },
740 { "vs42", 42 },
741 { "vs43", 43 },
742 { "vs44", 44 },
743 { "vs45", 45 },
744 { "vs46", 46 },
745 { "vs47", 47 },
746 { "vs48", 48 },
747 { "vs49", 49 },
748 { "vs5", 5 },
749 { "vs50", 50 },
750 { "vs51", 51 },
751 { "vs52", 52 },
752 { "vs53", 53 },
753 { "vs54", 54 },
754 { "vs55", 55 },
755 { "vs56", 56 },
756 { "vs57", 57 },
757 { "vs58", 58 },
758 { "vs59", 59 },
759 { "vs6", 6 },
760 { "vs60", 60 },
761 { "vs61", 61 },
762 { "vs62", 62 },
763 { "vs63", 63 },
764 { "vs7", 7 },
765 { "vs8", 8 },
766 { "vs9", 9 },
767
252b5132
RH		 768 { "xer", 1 },
769
770};
771
bc805888 772#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 773
774/* Given NAME, find the register number associated with that name, return
775 the integer value associated with the given name or -1 on failure. */
776
252b5132 777static int
98027b10 778reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 779{
780 int middle, low, high;
781 int cmp;
782
783 low = 0;
784 high = regcount - 1;
785
786 do
787 {
788 middle = (low + high) / 2;
789 cmp = strcasecmp (name, regs[middle].name);
790 if (cmp < 0)
791 high = middle - 1;
792 else if (cmp > 0)
793 low = middle + 1;
794 else
795 return regs[middle].value;
796 }
797 while (low <= high);
798
799 return -1;
800}
801
802/*
99a814a1 803 * Summary of register_name.
252b5132
RH		 804 *
805 * in: Input_line_pointer points to 1st char of operand.
806 *
807 * out: A expressionS.
808 * The operand may have been a register: in this case, X_op == O_register,
809 * X_add_number is set to the register number, and truth is returned.
810 * Input_line_pointer->(next non-blank) char after operand, or is in its
811 * original state.
812 */
813
b34976b6 814static bfd_boolean
98027b10 815register_name (expressionS *expressionP)
252b5132
RH		 816{
817 int reg_number;
818 char *name;
819 char *start;
820 char c;
821
99a814a1 822 /* Find the spelling of the operand. */
252b5132 823 start = name = input_line_pointer;
3882b010 824 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 825 name = ++input_line_pointer;
826
3882b010 827 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 828 return FALSE;
252b5132
RH		 829
830 c = get_symbol_end ();
831 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
832
468cced8
AM		 833 /* Put back the delimiting char. */
834 *input_line_pointer = c;
835
99a814a1 836 /* Look to see if it's in the register table. */
81d4177b 837 if (reg_number >= 0)
252b5132
RH		 838 {
839 expressionP->X_op = O_register;
840 expressionP->X_add_number = reg_number;
81d4177b 841
99a814a1 842 /* Make the rest nice. */
252b5132
RH		 843 expressionP->X_add_symbol = NULL;
844 expressionP->X_op_symbol = NULL;
b34976b6 845 return TRUE;
252b5132 846 }
468cced8
AM		 847
848 /* Reset the line as if we had not done anything. */
849 input_line_pointer = start;
b34976b6 850 return FALSE;
252b5132
RH		 851}
852\f
853/* This function is called for each symbol seen in an expression. It
854 handles the special parsing which PowerPC assemblers are supposed
855 to use for condition codes. */
856
857/* Whether to do the special parsing. */
b34976b6 858static bfd_boolean cr_operand;
252b5132
RH		 859
860/* Names to recognize in a condition code. This table is sorted. */
861static const struct pd_reg cr_names[] =
862{
863 { "cr0", 0 },
864 { "cr1", 1 },
865 { "cr2", 2 },
866 { "cr3", 3 },
867 { "cr4", 4 },
868 { "cr5", 5 },
869 { "cr6", 6 },
870 { "cr7", 7 },
871 { "eq", 2 },
872 { "gt", 1 },
873 { "lt", 0 },
874 { "so", 3 },
875 { "un", 3 }
876};
877
878/* Parsing function. This returns non-zero if it recognized an
879 expression. */
880
881int
91d6fa6a 882ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 883{
884 int val;
885
886 if (! cr_operand)
887 return 0;
888
13abbae3
AM		 889 if (*name == '%')
890 ++name;
252b5132
RH		 891 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
892 name);
893 if (val < 0)
894 return 0;
895
91d6fa6a
NC		 896 exp->X_op = O_constant;
897 exp->X_add_number = val;
252b5132
RH		 898
899 return 1;
900}
901\f
902/* Local variables. */
903
2b3c4602
AM		 904/* Whether to target xcoff64/elf64. */
905static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 906
252b5132
RH		 907/* Opcode hash table. */
908static struct hash_control *ppc_hash;
909
910/* Macro hash table. */
911static struct hash_control *ppc_macro_hash;
912
913#ifdef OBJ_ELF
99a814a1 914/* What type of shared library support to use. */
5d6f4f16 915static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 916
99a814a1 917/* Flags to set in the elf header. */
252b5132
RH		 918static flagword ppc_flags = 0;
919
920/* Whether this is Solaris or not. */
921#ifdef TARGET_SOLARIS_COMMENT
b34976b6 922#define SOLARIS_P TRUE
252b5132 923#else
b34976b6 924#define SOLARIS_P FALSE
252b5132
RH		 925#endif
926
b34976b6 927static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 928#endif
929
930#ifdef OBJ_XCOFF
931
932/* The RS/6000 assembler uses the .csect pseudo-op to generate code
933 using a bunch of different sections. These assembler sections,
934 however, are all encompassed within the .text or .data sections of
935 the final output file. We handle this by using different
936 subsegments within these main segments. */
937
938/* Next subsegment to allocate within the .text segment. */
939static subsegT ppc_text_subsegment = 2;
940
941/* Linked list of csects in the text section. */
942static symbolS *ppc_text_csects;
943
944/* Next subsegment to allocate within the .data segment. */
945static subsegT ppc_data_subsegment = 2;
946
947/* Linked list of csects in the data section. */
948static symbolS *ppc_data_csects;
949
950/* The current csect. */
951static symbolS *ppc_current_csect;
952
953/* The RS/6000 assembler uses a TOC which holds addresses of functions
954 and variables. Symbols are put in the TOC with the .tc pseudo-op.
955 A special relocation is used when accessing TOC entries. We handle
956 the TOC as a subsegment within the .data segment. We set it up if
957 we see a .toc pseudo-op, and save the csect symbol here. */
958static symbolS *ppc_toc_csect;
959
960/* The first frag in the TOC subsegment. */
961static fragS *ppc_toc_frag;
962
963/* The first frag in the first subsegment after the TOC in the .data
964 segment. NULL if there are no subsegments after the TOC. */
965static fragS *ppc_after_toc_frag;
966
967/* The current static block. */
968static symbolS *ppc_current_block;
969
970/* The COFF debugging section; set by md_begin. This is not the
971 .debug section, but is instead the secret BFD section which will
972 cause BFD to set the section number of a symbol to N_DEBUG. */
973static asection *ppc_coff_debug_section;
974
975#endif /* OBJ_XCOFF */
976
977#ifdef TE_PE
978
979/* Various sections that we need for PE coff support. */
980static segT ydata_section;
981static segT pdata_section;
982static segT reldata_section;
983static segT rdata_section;
984static segT tocdata_section;
985
81d4177b 986/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 987static segT ppc_previous_section;
988static segT ppc_current_section;
989
990#endif /* TE_PE */
991
992#ifdef OBJ_ELF
993symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 994#define PPC_APUINFO_ISEL 0x40
995#define PPC_APUINFO_PMR 0x41
996#define PPC_APUINFO_RFMCI 0x42
997#define PPC_APUINFO_CACHELCK 0x43
998#define PPC_APUINFO_SPE 0x100
999#define PPC_APUINFO_EFS 0x101
1000#define PPC_APUINFO_BRLOCK 0x102
1001
b34976b6
AM		 1002/*
1003 * We keep a list of APUinfo
6a0c61b7
EZ		 1004 */
1005unsigned long *ppc_apuinfo_list;
1006unsigned int ppc_apuinfo_num;
1007unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1008#endif /* OBJ_ELF */
1009\f
1010#ifdef OBJ_ELF
15c1449b 1011const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1012#else
15c1449b 1013const char *const md_shortopts = "um:";
252b5132 1014#endif
15c1449b 1015const struct option md_longopts[] = {
252b5132
RH		 1016 {NULL, no_argument, NULL, 0}
1017};
15c1449b 1018const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1019
1020int
98027b10 1021md_parse_option (int c, char *arg)
252b5132 1022{
69fe9ce5
AM		 1023 ppc_cpu_t new_cpu;
1024
252b5132
RH		 1025 switch (c)
1026 {
1027 case 'u':
1028 /* -u means that any undefined symbols should be treated as
1029 external, which is the default for gas anyhow. */
1030 break;
1031
1032#ifdef OBJ_ELF
1033 case 'l':
1034 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1035 sake, recognize -be also. */
252b5132
RH		 1036 if (strcmp (arg, "e") == 0)
1037 {
1038 target_big_endian = 0;
1039 set_target_endian = 1;
1040 }
1041 else
1042 return 0;
1043
1044 break;
1045
1046 case 'b':
1047 if (strcmp (arg, "e") == 0)
1048 {
1049 target_big_endian = 1;
1050 set_target_endian = 1;
1051 }
1052 else
1053 return 0;
1054
1055 break;
1056
1057 case 'K':
99a814a1 1058 /* Recognize -K PIC. */
252b5132
RH		 1059 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1060 {
1061 shlib = SHLIB_PIC;
1062 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1063 }
1064 else
1065 return 0;
1066
1067 break;
1068#endif
1069
7f6d05e8
CP		 1070 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1071 case 'a':
1072 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1073 {
1074#ifdef BFD64
1075 ppc_obj64 = 1;
1076#else
1077 as_fatal (_("%s unsupported"), "-a64");
1078#endif
1079 }
7f6d05e8 1080 else if (strcmp (arg, "32") == 0)
2b3c4602 1081 ppc_obj64 = 0;
7f6d05e8
CP		 1082 else
1083 return 0;
1084 break;
81d4177b 1085
252b5132 1086 case 'm':
69fe9ce5
AM		 1087 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1088 ppc_cpu = new_cpu;
252b5132
RH		 1089
1090 else if (strcmp (arg, "regnames") == 0)
b34976b6 1091 reg_names_p = TRUE;
252b5132
RH		 1092
1093 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1094 reg_names_p = FALSE;
252b5132
RH		 1095
1096#ifdef OBJ_ELF
99a814a1
AM		 1097 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1098 that require relocation. */
252b5132
RH		 1099 else if (strcmp (arg, "relocatable") == 0)
1100 {
5d6f4f16 1101 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1102 ppc_flags |= EF_PPC_RELOCATABLE;
1103 }
1104
1105 else if (strcmp (arg, "relocatable-lib") == 0)
1106 {
5d6f4f16 1107 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1108 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1109 }
1110
99a814a1 1111 /* -memb, set embedded bit. */
252b5132
RH		 1112 else if (strcmp (arg, "emb") == 0)
1113 ppc_flags |= EF_PPC_EMB;
1114
99a814a1
AM		 1115 /* -mlittle/-mbig set the endianess. */
1116 else if (strcmp (arg, "little") == 0
1117 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1118 {
1119 target_big_endian = 0;
1120 set_target_endian = 1;
1121 }
1122
1123 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1124 {
1125 target_big_endian = 1;
1126 set_target_endian = 1;
1127 }
1128
1129 else if (strcmp (arg, "solaris") == 0)
1130 {
b34976b6 1131 msolaris = TRUE;
252b5132
RH		 1132 ppc_comment_chars = ppc_solaris_comment_chars;
1133 }
1134
1135 else if (strcmp (arg, "no-solaris") == 0)
1136 {
b34976b6 1137 msolaris = FALSE;
252b5132
RH		 1138 ppc_comment_chars = ppc_eabi_comment_chars;
1139 }
1140#endif
1141 else
1142 {
1143 as_bad (_("invalid switch -m%s"), arg);
1144 return 0;
1145 }
1146 break;
1147
1148#ifdef OBJ_ELF
1149 /* -V: SVR4 argument to print version ID. */
1150 case 'V':
1151 print_version_id ();
1152 break;
1153
1154 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1155 should be emitted or not. FIXME: Not implemented. */
1156 case 'Q':
1157 break;
1158
1159 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1160 rather than .stabs.excl, which is ignored by the linker.
1161 FIXME: Not implemented. */
1162 case 's':
1163 if (arg)
1164 return 0;
1165
1166 break;
1167#endif
1168
1169 default:
1170 return 0;
1171 }
1172
1173 return 1;
1174}
1175
1176void
98027b10 1177md_show_usage (FILE *stream)
252b5132 1178{
bc805888 1179 fprintf (stream, _("\
252b5132 1180PowerPC options:\n\
ce3d2015
AM		 1181-a32 generate ELF32/XCOFF32\n\
1182-a64 generate ELF64/XCOFF64\n\
1183-u ignored\n\
1184-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1185-mpwr generate code for POWER (RIOS1)\n\
1186-m601 generate code for PowerPC 601\n\
418c1742 1187-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1188 generate code for PowerPC 603/604\n\
1189-m403 generate code for PowerPC 403\n\
1190-m405 generate code for PowerPC 405\n\
1191-m440 generate code for PowerPC 440\n\
1192-m464 generate code for PowerPC 464\n\
1193-m476 generate code for PowerPC 476\n\
f5c120c5 1194-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1195 generate code for PowerPC 7400/7410/7450/7455\n\
1196-m750cl generate code for PowerPC 750cl\n"));
df12615d 1197 fprintf (stream, _("\
ce3d2015
AM		 1198-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1199-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1200-mbooke generate code for 32-bit PowerPC BookE\n\
1201-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1202-mpower4, -mpwr4 generate code for Power4 architecture\n\
1203-mpower5, -mpwr5, -mpwr5x\n\
1204 generate code for Power5 architecture\n\
1205-mpower6, -mpwr6 generate code for Power6 architecture\n\
1206-mpower7, -mpwr7 generate code for Power7 architecture\n\
ce3d2015
AM		 1207-mcell generate code for Cell Broadband Engine architecture\n\
1208-mcom generate code Power/PowerPC common instructions\n\
1209-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1210 fprintf (stream, _("\
ce3d2015
AM		 1211-maltivec generate code for AltiVec\n\
1212-mvsx generate code for Vector-Scalar (VSX) instructions\n\
1213-me300 generate code for PowerPC e300 family\n\
1214-me500, -me500x2 generate code for Motorola e500 core complex\n\
1215-me500mc, generate code for Freescale e500mc core complex\n\
1216-me500mc64, generate code for Freescale e500mc64 core complex\n\
1217-mspe generate code for Motorola SPE instructions\n\
1218-mtitan generate code for AppliedMicro Titan core complex\n\
1219-mregnames Allow symbolic names for registers\n\
1220-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1221#ifdef OBJ_ELF
bc805888 1222 fprintf (stream, _("\
ce3d2015
AM		 1223-mrelocatable support for GCC's -mrelocatble option\n\
1224-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1225-memb set PPC_EMB bit in ELF flags\n\
df12615d 1226-mlittle, -mlittle-endian, -l, -le\n\
ce3d2015 1227 generate code for a little endian machine\n\
df12615d 1228-mbig, -mbig-endian, -b, -be\n\
ce3d2015
AM		 1229 generate code for a big endian machine\n\
1230-msolaris generate code for Solaris\n\
1231-mno-solaris do not generate code for Solaris\n\
1232-V print assembler version number\n\
1233-Qy, -Qn ignored\n"));
252b5132
RH		 1234#endif
1235}
1236\f
1237/* Set ppc_cpu if it is not already set. */
1238
1239static void
98027b10 1240ppc_set_cpu (void)
252b5132
RH		 1241{
1242 const char *default_os = TARGET_OS;
1243 const char *default_cpu = TARGET_CPU;
1244
3c9030c1 1245 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1246 {
2a98c3a6 1247 if (ppc_obj64)
3c9030c1 1248 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1249 else if (strncmp (default_os, "aix", 3) == 0
1250 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1251 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1252 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1253 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1254 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1255 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1256 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1257 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1258 else
99a814a1
AM		 1259 as_fatal (_("Unknown default cpu = %s, os = %s"),
1260 default_cpu, default_os);
252b5132
RH		 1261 }
1262}
1263
9232bbb0
AM		 1264/* Figure out the BFD architecture to use. This function and ppc_mach
1265 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1266
1267enum bfd_architecture
98027b10 1268ppc_arch (void)
252b5132
RH		 1269{
1270 const char *default_cpu = TARGET_CPU;
1271 ppc_set_cpu ();
1272
1273 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1274 return bfd_arch_powerpc;
1275 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1276 return bfd_arch_rs6000;
1277 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1278 {
1279 if (strcmp (default_cpu, "rs6000") == 0)
1280 return bfd_arch_rs6000;
0baf16f2 1281 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1282 return bfd_arch_powerpc;
1283 }
1284
1285 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1286 return bfd_arch_unknown;
1287}
1288
7f6d05e8 1289unsigned long
98027b10 1290ppc_mach (void)
7f6d05e8 1291{
2a98c3a6
AM		 1292 if (ppc_obj64)
1293 return bfd_mach_ppc64;
1294 else if (ppc_arch () == bfd_arch_rs6000)
1295 return bfd_mach_rs6k;
ce3d2015
AM		 1296 else if (ppc_cpu & PPC_OPCODE_TITAN)
1297 return bfd_mach_ppc_titan;
2a98c3a6
AM		 1298 else
1299 return bfd_mach_ppc;
7f6d05e8
CP		 1300}
1301
81d4177b 1302extern char*
98027b10 1303ppc_target_format (void)
7f6d05e8
CP		 1304{
1305#ifdef OBJ_COFF
1306#ifdef TE_PE
99a814a1 1307 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1308#elif TE_POWERMAC
0baf16f2 1309 return "xcoff-powermac";
7f6d05e8 1310#else
eb1e0e80 1311# ifdef TE_AIX5
2b3c4602 1312 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1313# else
2b3c4602 1314 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1315# endif
7f6d05e8 1316#endif
7f6d05e8
CP		 1317#endif
1318#ifdef OBJ_ELF
9d8504b1
PB		 1319# ifdef TE_VXWORKS
1320 return "elf32-powerpc-vxworks";
1321# else
0baf16f2 1322 return (target_big_endian
2b3c4602
AM		 1323 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1324 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1325# endif
7f6d05e8
CP		 1326#endif
1327}
1328
69c040df
AM		 1329/* Insert opcodes and macros into hash tables. Called at startup and
1330 for .cpu pseudo. */
252b5132 1331
69c040df
AM		 1332static void
1333ppc_setup_opcodes (void)
252b5132 1334{
98027b10 1335 const struct powerpc_opcode *op;
252b5132
RH		 1336 const struct powerpc_opcode *op_end;
1337 const struct powerpc_macro *macro;
1338 const struct powerpc_macro *macro_end;
b84bf58a 1339 bfd_boolean bad_insn = FALSE;
252b5132 1340
69c040df
AM		 1341 if (ppc_hash != NULL)
1342 hash_die (ppc_hash);
1343 if (ppc_macro_hash != NULL)
1344 hash_die (ppc_macro_hash);
252b5132
RH		 1345
1346 /* Insert the opcodes into a hash table. */
1347 ppc_hash = hash_new ();
1348
c43a438d 1349 if (ENABLE_CHECKING)
b84bf58a 1350 {
c43a438d 1351 unsigned int i;
b84bf58a 1352
c43a438d
AM		 1353 /* Check operand masks. Code here and in the disassembler assumes
1354 all the 1's in the mask are contiguous. */
1355 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1356 {
c43a438d
AM		 1357 unsigned long mask = powerpc_operands[i].bitm;
1358 unsigned long right_bit;
1359 unsigned int j;
1360
1361 right_bit = mask & -mask;
1362 mask += right_bit;
1363 right_bit = mask & -mask;
1364 if (mask != right_bit)
1365 {
1366 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1367 bad_insn = TRUE;
1368 }
1369 for (j = i + 1; j < num_powerpc_operands; ++j)
1370 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1371 sizeof (powerpc_operands[0])) == 0)
1372 {
1373 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1374 j, i);
1375 bad_insn = TRUE;
1376 }
b84bf58a
AM		 1377 }
1378 }
1379
252b5132
RH		 1380 op_end = powerpc_opcodes + powerpc_num_opcodes;
1381 for (op = powerpc_opcodes; op < op_end; op++)
1382 {
c43a438d 1383 if (ENABLE_CHECKING)
b84bf58a 1384 {
c43a438d
AM		 1385 const unsigned char *o;
1386 unsigned long omask = op->mask;
8dbcd839 1387
d815f1a9 1388 if (op != powerpc_opcodes)
8dbcd839 1389 {
d815f1a9
AM		 1390 /* The major opcodes had better be sorted. Code in the
1391 disassembler assumes the insns are sorted according to
1392 major opcode. */
1393 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1394 {
1395 as_bad (_("major opcode is not sorted for %s"),
1396 op->name);
1397 bad_insn = TRUE;
1398 }
1399
1400 /* Warn if the table isn't more strictly ordered.
1401 Unfortunately it doesn't seem possible to order the
1402 table on much more than the major opcode, which makes
1403 it difficult to implement a binary search in the
1404 disassembler. The problem is that we have multiple
1405 ways to disassemble instructions, and we usually want
1406 to choose a more specific form (with more bits set in
1407 the opcode) than a more general form. eg. all of the
1408 following are equivalent:
1409 bne label # opcode = 0x40820000, mask = 0xff830003
1410 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1411 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1412
1413 There are also cases where the table needs to be out
1414 of order to disassemble the correct instruction for
2f3bb96a 1415 processor variants. */
d815f1a9
AM		 1416 else if (0)
1417 {
1418 unsigned long t1 = op[0].opcode;
1419 unsigned long t2 = op[-1].opcode;
1420
1421 if (((t1 ^ t2) & 0xfc0007ff) == 0
1422 && (t1 & 0xfc0006df) == 0x7c000286)
1423 {
1424 /* spr field is split. */
1425 t1 = ((t1 & ~0x1ff800)
1426 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1427 t2 = ((t2 & ~0x1ff800)
1428 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1429 }
1430 if (t1 < t2)
1431 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1432 op[0].name, op[0].opcode, op[0].mask,
1433 op[-1].name, op[-1].opcode, op[-1].mask);
1434 }
8dbcd839 1435 }
c43a438d
AM		 1436
1437 /* The mask had better not trim off opcode bits. */
1438 if ((op->opcode & omask) != op->opcode)
1439 {
1440 as_bad (_("mask trims opcode bits for %s"),
1441 op->name);
1442 bad_insn = TRUE;
1443 }
1444
1445 /* The operands must not overlap the opcode or each other. */
1446 for (o = op->operands; *o; ++o)
1447 if (*o >= num_powerpc_operands)
1448 {
1449 as_bad (_("operand index error for %s"),
1450 op->name);
1451 bad_insn = TRUE;
1452 }
1453 else
b84bf58a 1454 {
c43a438d
AM		 1455 const struct powerpc_operand *operand = &powerpc_operands[*o];
1456 if (operand->shift >= 0)
b84bf58a 1457 {
c43a438d
AM		 1458 unsigned long mask = operand->bitm << operand->shift;
1459 if (omask & mask)
1460 {
1461 as_bad (_("operand %d overlap in %s"),
1462 (int) (o - op->operands), op->name);
1463 bad_insn = TRUE;
1464 }
1465 omask |= mask;
b84bf58a 1466 }
b84bf58a 1467 }
c43a438d 1468 }
252b5132 1469
2b3c4602 1470 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1471 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1472 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1473 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1474 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
1cb0a767 1475 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1476 {
1477 const char *retval;
1478
98027b10 1479 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1480 if (retval != NULL)
252b5132 1481 {
99a814a1 1482 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1483 if ((ppc_cpu & PPC_OPCODE_601) != 0
1484 && (op->flags & PPC_OPCODE_POWER) != 0)
1485 continue;
1486
b84bf58a 1487 as_bad (_("duplicate instruction %s"),
99a814a1 1488 op->name);
b84bf58a 1489 bad_insn = TRUE;
252b5132
RH		 1490 }
1491 }
1492 }
1493
3c9030c1
AM		 1494 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1495 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1496 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1497
252b5132
RH		 1498 /* Insert the macros into a hash table. */
1499 ppc_macro_hash = hash_new ();
1500
1501 macro_end = powerpc_macros + powerpc_num_macros;
1502 for (macro = powerpc_macros; macro < macro_end; macro++)
1503 {
1504 if ((macro->flags & ppc_cpu) != 0)
1505 {
1506 const char *retval;
1507
98027b10 1508 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1509 if (retval != (const char *) NULL)
1510 {
b84bf58a
AM		 1511 as_bad (_("duplicate macro %s"), macro->name);
1512 bad_insn = TRUE;
252b5132
RH		 1513 }
1514 }
1515 }
1516
b84bf58a 1517 if (bad_insn)
252b5132 1518 abort ();
69c040df
AM		 1519}
1520
1521/* This function is called when the assembler starts up. It is called
1522 after the options have been parsed and the output file has been
1523 opened. */
1524
1525void
98027b10 1526md_begin (void)
69c040df
AM		 1527{
1528 ppc_set_cpu ();
1529
1530 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1531
1532#ifdef OBJ_ELF
1533 /* Set the ELF flags if desired. */
1534 if (ppc_flags && !msolaris)
1535 bfd_set_private_flags (stdoutput, ppc_flags);
1536#endif
1537
1538 ppc_setup_opcodes ();
252b5132 1539
67c1ffbe 1540 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1541 by the user. */
252b5132
RH		 1542 if (!set_target_endian)
1543 {
1544 set_target_endian = 1;
1545 target_big_endian = PPC_BIG_ENDIAN;
1546 }
1547
1548#ifdef OBJ_XCOFF
1549 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1550
1551 /* Create dummy symbols to serve as initial csects. This forces the
1552 text csects to precede the data csects. These symbols will not
1553 be output. */
1554 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1555 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1556 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1557 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1558#endif
1559
1560#ifdef TE_PE
1561
1562 ppc_current_section = text_section;
81d4177b 1563 ppc_previous_section = 0;
252b5132
RH		 1564
1565#endif
1566}
1567
6a0c61b7 1568void
98027b10 1569ppc_cleanup (void)
6a0c61b7 1570{
dc1d03fc 1571#ifdef OBJ_ELF
6a0c61b7
EZ		 1572 if (ppc_apuinfo_list == NULL)
1573 return;
1574
1575 /* Ok, so write the section info out. We have this layout:
1576
1577 byte data what
1578 ---- ---- ----
1579 0 8 length of "APUinfo\0"
1580 4 (n*4) number of APU's (4 bytes each)
1581 8 2 note type 2
1582 12 "APUinfo\0" name
1583 20 APU#1 first APU's info
1584 24 APU#2 second APU's info
1585 ... ...
1586 */
1587 {
1588 char *p;
1589 asection *seg = now_seg;
1590 subsegT subseg = now_subseg;
1591 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1592 unsigned int i;
6a0c61b7
EZ		 1593
1594 /* Create the .PPC.EMB.apuinfo section. */
1595 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1596 bfd_set_section_flags (stdoutput,
1597 apuinfo_secp,
e1a9cb8e 1598 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1599
1600 p = frag_more (4);
1601 md_number_to_chars (p, (valueT) 8, 4);
1602
1603 p = frag_more (4);
e98d298c 1604 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1605
1606 p = frag_more (4);
1607 md_number_to_chars (p, (valueT) 2, 4);
1608
1609 p = frag_more (8);
1610 strcpy (p, "APUinfo");
1611
1612 for (i = 0; i < ppc_apuinfo_num; i++)
1613 {
b34976b6
AM		 1614 p = frag_more (4);
1615 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1616 }
1617
1618 frag_align (2, 0, 0);
1619
1620 /* We probably can't restore the current segment, for there likely
1621 isn't one yet... */
1622 if (seg && subseg)
1623 subseg_set (seg, subseg);
1624 }
dc1d03fc 1625#endif
6a0c61b7
EZ		 1626}
1627
252b5132
RH		 1628/* Insert an operand value into an instruction. */
1629
1630static unsigned long
a1867a27
AM		 1631ppc_insert_operand (unsigned long insn,
1632 const struct powerpc_operand *operand,
1633 offsetT val,
91d6fa6a 1634 ppc_cpu_t cpu,
a1867a27
AM		 1635 char *file,
1636 unsigned int line)
252b5132 1637{
b84bf58a 1638 long min, max, right;
eb42fac1 1639
b84bf58a
AM		 1640 max = operand->bitm;
1641 right = max & -max;
1642 min = 0;
1643
1644 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1645 {
b84bf58a 1646 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1647 max = (max >> 1) & -right;
1648 min = ~max & -right;
b84bf58a 1649 }
252b5132 1650
b84bf58a 1651 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1652 max++;
252b5132 1653
b84bf58a 1654 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1655 {
1656 long tmp = min;
1657 min = -max;
1658 max = -tmp;
1659 }
b84bf58a 1660
a1867a27
AM		 1661 if (min <= max)
1662 {
1663 /* Some people write constants with the sign extension done by
1664 hand but only up to 32 bits. This shouldn't really be valid,
1665 but, to permit this code to assemble on a 64-bit host, we
1666 sign extend the 32-bit value to 64 bits if so doing makes the
1667 value valid. */
1668 if (val > max
1669 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1670 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1671 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1672 val = val - 0x80000000 - 0x80000000;
1673
1674 /* Similarly, people write expressions like ~(1<<15), and expect
1675 this to be OK for a 32-bit unsigned value. */
1676 else if (val < min
1677 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1678 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1679 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1680 val = val + 0x80000000 + 0x80000000;
1681
1682 else if (val < min
1683 || val > max
1684 || (val & (right - 1)) != 0)
1685 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1686 }
b84bf58a 1687
252b5132
RH		 1688 if (operand->insert)
1689 {
1690 const char *errmsg;
1691
1692 errmsg = NULL;
91d6fa6a 1693 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1694 if (errmsg != (const char *) NULL)
ee2c9aa9 1695 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1696 }
1697 else
b84bf58a 1698 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1699
1700 return insn;
1701}
1702
1703\f
1704#ifdef OBJ_ELF
1705/* Parse @got, etc. and return the desired relocation. */
1706static bfd_reloc_code_real_type
98027b10 1707ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1708{
1709 struct map_bfd {
1710 char *string;
b7d7dc63
AM		 1711 unsigned int length : 8;
1712 unsigned int valid32 : 1;
1713 unsigned int valid64 : 1;
1714 unsigned int reloc;
252b5132
RH		 1715 };
1716
1717 char ident[20];
1718 char *str = *str_p;
1719 char *str2;
1720 int ch;
1721 int len;
15c1449b 1722 const struct map_bfd *ptr;
252b5132 1723
b7d7dc63
AM		 1724#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1725#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1726#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1727
15c1449b 1728 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1729 MAP ("l", BFD_RELOC_LO16),
1730 MAP ("h", BFD_RELOC_HI16),
1731 MAP ("ha", BFD_RELOC_HI16_S),
1732 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1733 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1734 MAP ("got", BFD_RELOC_16_GOTOFF),
1735 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1736 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1737 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1738 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1739 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1740 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1741 MAP ("copy", BFD_RELOC_PPC_COPY),
1742 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1743 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1744 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1745 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1746 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1747 MAP ("tls", BFD_RELOC_PPC_TLS),
1748 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1749 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1750 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1751 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1752 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1753 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1754 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1755 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1756 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1757 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1758 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1759 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1760 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1761 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1762 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1763 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1764 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1765 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1766 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1767 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1768 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1769 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1770 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1771 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1772 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1773 MAP32 ("fixup", BFD_RELOC_CTOR),
1774 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1775 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1776 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1777 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1778 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1779 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1780 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1781 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1782 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1783 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1784 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1785 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1786 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1787 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1788 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1789 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1790 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1791 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1792 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1793 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1794 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1795 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1796 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1797 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1798 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1799 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1800 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1801 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1802 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1803 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1804 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1805 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1806 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1807 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1808 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1809 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1810 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1811 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1812 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1813 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1814 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1815 };
1816
1817 if (*str++ != '@')
1818 return BFD_RELOC_UNUSED;
1819
1820 for (ch = *str, str2 = ident;
1821 (str2 < ident + sizeof (ident) - 1
3882b010 1822 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1823 ch = *++str)
1824 {
3882b010 1825 *str2++ = TOLOWER (ch);
252b5132
RH		 1826 }
1827
1828 *str2 = '\0';
1829 len = str2 - ident;
1830
1831 ch = ident[0];
1832 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1833 if (ch == ptr->string[0]
1834 && len == ptr->length
b7d7dc63
AM		 1835 && memcmp (ident, ptr->string, ptr->length) == 0
1836 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1837 {
15c1449b
AM		 1838 int reloc = ptr->reloc;
1839
727fc41e
AM		 1840 if (!ppc_obj64 && exp_p->X_add_number != 0)
1841 {
1842 switch (reloc)
1843 {
1844 case BFD_RELOC_16_GOTOFF:
1845 case BFD_RELOC_LO16_GOTOFF:
1846 case BFD_RELOC_HI16_GOTOFF:
1847 case BFD_RELOC_HI16_S_GOTOFF:
1848 as_warn (_("identifier+constant@got means "
1849 "identifier@got+constant"));
1850 break;
1851
1852 case BFD_RELOC_PPC_GOT_TLSGD16:
1853 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1854 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1855 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1856 case BFD_RELOC_PPC_GOT_TLSLD16:
1857 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1858 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1859 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1860 case BFD_RELOC_PPC_GOT_DTPREL16:
1861 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1862 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1863 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1864 case BFD_RELOC_PPC_GOT_TPREL16:
1865 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1866 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1867 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1868 as_bad (_("symbol+offset not supported for got tls"));
1869 break;
1870 }
1871 }
5f6db75a
AM		 1872
1873 /* Now check for identifier@suffix+constant. */
1874 if (*str == '-' || *str == '+')
252b5132 1875 {
5f6db75a
AM		 1876 char *orig_line = input_line_pointer;
1877 expressionS new_exp;
1878
1879 input_line_pointer = str;
1880 expression (&new_exp);
1881 if (new_exp.X_op == O_constant)
252b5132 1882 {
5f6db75a
AM		 1883 exp_p->X_add_number += new_exp.X_add_number;
1884 str = input_line_pointer;
252b5132 1885 }
5f6db75a
AM		 1886
1887 if (&input_line_pointer != str_p)
1888 input_line_pointer = orig_line;
252b5132 1889 }
252b5132 1890 *str_p = str;
0baf16f2 1891
2b3c4602 1892 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1893 && exp_p->X_op == O_symbol
1894 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1895 {
9f2b53d7
AM		 1896 /* Change the symbol so that the dummy .TOC. symbol can be
1897 omitted from the object file. */
0baf16f2
AM		 1898 exp_p->X_add_symbol = &abs_symbol;
1899 }
1900
15c1449b 1901 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1902 }
1903
1904 return BFD_RELOC_UNUSED;
1905}
1906
99a814a1
AM		 1907/* Like normal .long/.short/.word, except support @got, etc.
1908 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1909static void
98027b10 1910ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1911{
1912 expressionS exp;
1913 bfd_reloc_code_real_type reloc;
1914
1915 if (is_it_end_of_statement ())
1916 {
1917 demand_empty_rest_of_line ();
1918 return;
1919 }
1920
1921 do
1922 {
1923 expression (&exp);
1924 if (exp.X_op == O_symbol
1925 && *input_line_pointer == '@'
99a814a1
AM		 1926 && (reloc = ppc_elf_suffix (&input_line_pointer,
1927 &exp)) != BFD_RELOC_UNUSED)
252b5132 1928 {
99a814a1
AM		 1929 reloc_howto_type *reloc_howto;
1930 int size;
1931
1932 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1933 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1934
1935 if (size > nbytes)
0baf16f2
AM		 1936 {
1937 as_bad (_("%s relocations do not fit in %d bytes\n"),
1938 reloc_howto->name, nbytes);
1939 }
252b5132
RH		 1940 else
1941 {
0baf16f2
AM		 1942 char *p;
1943 int offset;
252b5132 1944
0baf16f2 1945 p = frag_more (nbytes);
aa0c8c1a 1946 memset (p, 0, nbytes);
0baf16f2
AM		 1947 offset = 0;
1948 if (target_big_endian)
1949 offset = nbytes - size;
99a814a1
AM		 1950 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1951 &exp, 0, reloc);
252b5132
RH		 1952 }
1953 }
1954 else
1955 emit_expr (&exp, (unsigned int) nbytes);
1956 }
1957 while (*input_line_pointer++ == ',');
1958
99a814a1
AM		 1959 /* Put terminator back into stream. */
1960 input_line_pointer--;
252b5132
RH		 1961 demand_empty_rest_of_line ();
1962}
1963
1964/* Solaris pseduo op to change to the .rodata section. */
1965static void
98027b10 1966ppc_elf_rdata (int xxx)
252b5132
RH		 1967{
1968 char *save_line = input_line_pointer;
1969 static char section[] = ".rodata\n";
1970
99a814a1 1971 /* Just pretend this is .section .rodata */
252b5132
RH		 1972 input_line_pointer = section;
1973 obj_elf_section (xxx);
1974
1975 input_line_pointer = save_line;
1976}
1977
99a814a1 1978/* Pseudo op to make file scope bss items. */
252b5132 1979static void
98027b10 1980ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1981{
98027b10
AM		 1982 char *name;
1983 char c;
1984 char *p;
252b5132 1985 offsetT size;
98027b10 1986 symbolS *symbolP;
252b5132
RH		 1987 offsetT align;
1988 segT old_sec;
1989 int old_subsec;
1990 char *pfrag;
1991 int align2;
1992
1993 name = input_line_pointer;
1994 c = get_symbol_end ();
1995
99a814a1 1996 /* just after name is now '\0'. */
252b5132
RH		 1997 p = input_line_pointer;
1998 *p = c;
1999 SKIP_WHITESPACE ();
2000 if (*input_line_pointer != ',')
2001 {
2002 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
2003 ignore_rest_of_line ();
2004 return;
2005 }
2006
2007 input_line_pointer++; /* skip ',' */
2008 if ((size = get_absolute_expression ()) < 0)
2009 {
2010 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2011 ignore_rest_of_line ();
2012 return;
2013 }
2014
2015 /* The third argument to .lcomm is the alignment. */
2016 if (*input_line_pointer != ',')
2017 align = 8;
2018 else
2019 {
2020 ++input_line_pointer;
2021 align = get_absolute_expression ();
2022 if (align <= 0)
2023 {
2024 as_warn (_("ignoring bad alignment"));
2025 align = 8;
2026 }
2027 }
2028
2029 *p = 0;
2030 symbolP = symbol_find_or_make (name);
2031 *p = c;
2032
2033 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2034 {
2035 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2036 S_GET_NAME (symbolP));
2037 ignore_rest_of_line ();
2038 return;
2039 }
2040
2041 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2042 {
2043 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2044 S_GET_NAME (symbolP),
2045 (long) S_GET_VALUE (symbolP),
2046 (long) size);
2047
2048 ignore_rest_of_line ();
2049 return;
2050 }
2051
99a814a1 2052 /* Allocate_bss. */
252b5132
RH		 2053 old_sec = now_seg;
2054 old_subsec = now_subseg;
2055 if (align)
2056 {
99a814a1 2057 /* Convert to a power of 2 alignment. */
252b5132
RH		 2058 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2059 if (align != 1)
2060 {
2061 as_bad (_("Common alignment not a power of 2"));
2062 ignore_rest_of_line ();
2063 return;
2064 }
2065 }
2066 else
2067 align2 = 0;
2068
2069 record_alignment (bss_section, align2);
2070 subseg_set (bss_section, 0);
2071 if (align2)
2072 frag_align (align2, 0, 0);
2073 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2074 symbol_get_frag (symbolP)->fr_symbol = 0;
2075 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2076 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2077 (char *) 0);
2078 *pfrag = 0;
2079 S_SET_SIZE (symbolP, size);
2080 S_SET_SEGMENT (symbolP, bss_section);
2081 subseg_set (old_sec, old_subsec);
2082 demand_empty_rest_of_line ();
2083}
2084
2085/* Validate any relocations emitted for -mrelocatable, possibly adding
2086 fixups for word relocations in writable segments, so we can adjust
2087 them at runtime. */
2088static void
98027b10 2089ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2090{
2091 if (fixp->fx_done || fixp->fx_pcrel)
2092 return;
2093
2094 switch (shlib)
2095 {
2096 case SHLIB_NONE:
2097 case SHLIB_PIC:
2098 return;
2099
5d6f4f16 2100 case SHLIB_MRELOCATABLE:
252b5132
RH		 2101 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2102 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2103 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2104 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2105 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2106 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2107 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2108 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2109 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2110 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2111 && strcmp (segment_name (seg), ".got2") != 0
2112 && strcmp (segment_name (seg), ".dtors") != 0
2113 && strcmp (segment_name (seg), ".ctors") != 0
2114 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2115 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2116 && strcmp (segment_name (seg), ".eh_frame") != 0
2117 && strcmp (segment_name (seg), ".ex_shared") != 0)
2118 {
2119 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2120 || fixp->fx_r_type != BFD_RELOC_CTOR)
2121 {
2122 as_bad_where (fixp->fx_file, fixp->fx_line,
2123 _("Relocation cannot be done when using -mrelocatable"));
2124 }
2125 }
2126 return;
2127 }
2128}
0baf16f2 2129
7e8d4ab4
AM		 2130/* Prevent elf_frob_file_before_adjust removing a weak undefined
2131 function descriptor sym if the corresponding code sym is used. */
2132
2133void
98027b10 2134ppc_frob_file_before_adjust (void)
0baf16f2 2135{
7e8d4ab4 2136 symbolS *symp;
9232bbb0 2137 asection *toc;
0baf16f2 2138
7e8d4ab4
AM		 2139 if (!ppc_obj64)
2140 return;
2141
2142 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2143 {
7e8d4ab4
AM		 2144 const char *name;
2145 char *dotname;
2146 symbolS *dotsym;
2147 size_t len;
2148
2149 name = S_GET_NAME (symp);
2150 if (name[0] == '.')
2151 continue;
2152
2153 if (! S_IS_WEAK (symp)
2154 || S_IS_DEFINED (symp))
2155 continue;
2156
2157 len = strlen (name) + 1;
2158 dotname = xmalloc (len + 1);
2159 dotname[0] = '.';
2160 memcpy (dotname + 1, name, len);
461b725f 2161 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2162 free (dotname);
2163 if (dotsym != NULL && (symbol_used_p (dotsym)
2164 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2165 symbol_mark_used (symp);
2166
0baf16f2
AM		 2167 }
2168
9232bbb0
AM		 2169 toc = bfd_get_section_by_name (stdoutput, ".toc");
2170 if (toc != NULL
2171 && bfd_section_size (stdoutput, toc) > 0x10000)
2172 as_warn (_("TOC section size exceeds 64k"));
2173
7e8d4ab4
AM		 2174 /* Don't emit .TOC. symbol. */
2175 symp = symbol_find (".TOC.");
2176 if (symp != NULL)
2177 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2178}
252b5132
RH		 2179#endif /* OBJ_ELF */
2180\f
2181#ifdef TE_PE
2182
2183/*
99a814a1 2184 * Summary of parse_toc_entry.
252b5132
RH		 2185 *
2186 * in: Input_line_pointer points to the '[' in one of:
2187 *
2188 * [toc] [tocv] [toc32] [toc64]
2189 *
2190 * Anything else is an error of one kind or another.
2191 *
81d4177b 2192 * out:
252b5132
RH		 2193 * return value: success or failure
2194 * toc_kind: kind of toc reference
2195 * input_line_pointer:
2196 * success: first char after the ']'
2197 * failure: unchanged
2198 *
2199 * settings:
2200 *
2201 * [toc] - rv == success, toc_kind = default_toc
2202 * [tocv] - rv == success, toc_kind = data_in_toc
2203 * [toc32] - rv == success, toc_kind = must_be_32
2204 * [toc64] - rv == success, toc_kind = must_be_64
2205 *
2206 */
2207
81d4177b
KH		 2208enum toc_size_qualifier
2209{
252b5132
RH		 2210 default_toc, /* The toc cell constructed should be the system default size */
2211 data_in_toc, /* This is a direct reference to a toc cell */
2212 must_be_32, /* The toc cell constructed must be 32 bits wide */
2213 must_be_64 /* The toc cell constructed must be 64 bits wide */
2214};
2215
2216static int
98027b10 2217parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2218{
2219 char *start;
2220 char *toc_spec;
2221 char c;
2222 enum toc_size_qualifier t;
2223
99a814a1 2224 /* Save the input_line_pointer. */
252b5132
RH		 2225 start = input_line_pointer;
2226
99a814a1 2227 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2228 ++input_line_pointer;
2229 SKIP_WHITESPACE ();
81d4177b 2230
99a814a1 2231 /* Find the spelling of the operand. */
252b5132
RH		 2232 toc_spec = input_line_pointer;
2233 c = get_symbol_end ();
2234
99a814a1 2235 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2236 {
2237 t = default_toc;
2238 }
99a814a1 2239 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2240 {
2241 t = data_in_toc;
2242 }
99a814a1 2243 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2244 {
2245 t = must_be_32;
2246 }
99a814a1 2247 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2248 {
2249 t = must_be_64;
2250 }
2251 else
2252 {
2253 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2254 *input_line_pointer = c;
2255 input_line_pointer = start;
252b5132
RH		 2256 return 0;
2257 }
2258
99a814a1
AM		 2259 /* Now find the ']'. */
2260 *input_line_pointer = c;
252b5132 2261
81d4177b
KH		 2262 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2263 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2264
2265 if (c != ']')
2266 {
2267 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2268 input_line_pointer = start;
252b5132
RH		 2269 return 0;
2270 }
2271
99a814a1 2272 *toc_kind = t;
252b5132
RH		 2273 return 1;
2274}
2275#endif
2276\f
2277
dc1d03fc 2278#ifdef OBJ_ELF
6a0c61b7
EZ		 2279#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2280static void
98027b10 2281ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2282{
2283 unsigned int i;
2284
2285 /* Check we don't already exist. */
2286 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2287 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2288 return;
b34976b6 2289
6a0c61b7
EZ		 2290 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2291 {
2292 if (ppc_apuinfo_num_alloc == 0)
2293 {
2294 ppc_apuinfo_num_alloc = 4;
2295 ppc_apuinfo_list = (unsigned long *)
2296 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2297 }
2298 else
2299 {
2300 ppc_apuinfo_num_alloc += 4;
2301 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2302 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2303 }
2304 }
dc1d03fc 2305 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2306}
2307#undef APUID
dc1d03fc 2308#endif
6a0c61b7
EZ		 2309\f
2310
252b5132
RH		 2311/* We need to keep a list of fixups. We can't simply generate them as
2312 we go, because that would require us to first create the frag, and
2313 that would screw up references to ``.''. */
2314
2315struct ppc_fixup
2316{
2317 expressionS exp;
2318 int opindex;
2319 bfd_reloc_code_real_type reloc;
2320};
2321
2322#define MAX_INSN_FIXUPS (5)
2323
2324/* This routine is called for each instruction to be assembled. */
2325
2326void
98027b10 2327md_assemble (char *str)
252b5132
RH		 2328{
2329 char *s;
2330 const struct powerpc_opcode *opcode;
2331 unsigned long insn;
2332 const unsigned char *opindex_ptr;
2333 int skip_optional;
2334 int need_paren;
2335 int next_opindex;
2336 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2337 int fc;
2338 char *f;
09b935ac 2339 int addr_mod;
252b5132
RH		 2340 int i;
2341#ifdef OBJ_ELF
2342 bfd_reloc_code_real_type reloc;
2343#endif
2344
2345 /* Get the opcode. */
3882b010 2346 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2347 ;
2348 if (*s != '\0')
2349 *s++ = '\0';
2350
2351 /* Look up the opcode in the hash table. */
2352 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2353 if (opcode == (const struct powerpc_opcode *) NULL)
2354 {
2355 const struct powerpc_macro *macro;
2356
2357 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2358 if (macro == (const struct powerpc_macro *) NULL)
2359 as_bad (_("Unrecognized opcode: `%s'"), str);
2360 else
2361 ppc_macro (s, macro);
2362
2363 return;
2364 }
2365
2366 insn = opcode->opcode;
2367
2368 str = s;
3882b010 2369 while (ISSPACE (*str))
252b5132
RH		 2370 ++str;
2371
2372 /* PowerPC operands are just expressions. The only real issue is
2373 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2374 an optional operand separate the operands only with commas (in some
2375 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2376 have optional operands). Most instructions with optional operands
2377 have only one. Those that have more than one optional operand can
2378 take either all their operands or none. So, before we start seriously
2379 parsing the operands, we check to see if we have optional operands,
2380 and if we do, we count the number of commas to see which operands
2381 have been omitted. */
252b5132
RH		 2382 skip_optional = 0;
2383 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2384 {
2385 const struct powerpc_operand *operand;
2386
2387 operand = &powerpc_operands[*opindex_ptr];
2388 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2389 {
2390 unsigned int opcount;
7fe9cf6b 2391 unsigned int num_operands_expected;
252b5132
RH		 2392
2393 /* There is an optional operand. Count the number of
2394 commas in the input line. */
2395 if (*str == '\0')
2396 opcount = 0;
2397 else
2398 {
2399 opcount = 1;
2400 s = str;
2401 while ((s = strchr (s, ',')) != (char *) NULL)
2402 {
2403 ++opcount;
2404 ++s;
2405 }
2406 }
2407
7fe9cf6b
NC		 2408 /* Compute the number of expected operands.
2409 Do not count fake operands. */
2410 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2411 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2412 ++ num_operands_expected;
2413
252b5132
RH		 2414 /* If there are fewer operands in the line then are called
2415 for by the instruction, we want to skip the optional
1f6c9eb0 2416 operands. */
7fe9cf6b 2417 if (opcount < num_operands_expected)
252b5132
RH		 2418 skip_optional = 1;
2419
2420 break;
2421 }
2422 }
2423
2424 /* Gather the operands. */
2425 need_paren = 0;
2426 next_opindex = 0;
2427 fc = 0;
2428 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2429 {
2430 const struct powerpc_operand *operand;
2431 const char *errmsg;
2432 char *hold;
2433 expressionS ex;
2434 char endc;
2435
2436 if (next_opindex == 0)
2437 operand = &powerpc_operands[*opindex_ptr];
2438 else
2439 {
2440 operand = &powerpc_operands[next_opindex];
2441 next_opindex = 0;
2442 }
252b5132
RH		 2443 errmsg = NULL;
2444
2445 /* If this is a fake operand, then we do not expect anything
2446 from the input. */
2447 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2448 {
2b3c4602 2449 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2450 if (errmsg != (const char *) NULL)
ee2c9aa9 2451 as_bad ("%s", errmsg);
252b5132
RH		 2452 continue;
2453 }
2454
2455 /* If this is an optional operand, and we are skipping it, just
2456 insert a zero. */
2457 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2458 && skip_optional)
2459 {
2460 if (operand->insert)
2461 {
2b3c4602 2462 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2463 if (errmsg != (const char *) NULL)
ee2c9aa9 2464 as_bad ("%s", errmsg);
252b5132
RH		 2465 }
2466 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2467 next_opindex = *opindex_ptr + 1;
2468 continue;
2469 }
2470
2471 /* Gather the operand. */
2472 hold = input_line_pointer;
2473 input_line_pointer = str;
2474
2475#ifdef TE_PE
81d4177b 2476 if (*input_line_pointer == '[')
252b5132
RH		 2477 {
2478 /* We are expecting something like the second argument here:
99a814a1
AM		 2479 *
2480 * lwz r4,[toc].GS.0.static_int(rtoc)
2481 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2482 * The argument following the `]' must be a symbol name, and the
2483 * register must be the toc register: 'rtoc' or '2'
2484 *
2485 * The effect is to 0 as the displacement field
2486 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2487 * the appropriate variation) reloc against it based on the symbol.
2488 * The linker will build the toc, and insert the resolved toc offset.
2489 *
2490 * Note:
2491 * o The size of the toc entry is currently assumed to be
2492 * 32 bits. This should not be assumed to be a hard coded
2493 * number.
2494 * o In an effort to cope with a change from 32 to 64 bits,
2495 * there are also toc entries that are specified to be
2496 * either 32 or 64 bits:
2497 * lwz r4,[toc32].GS.0.static_int(rtoc)
2498 * lwz r4,[toc64].GS.0.static_int(rtoc)
2499 * These demand toc entries of the specified size, and the
2500 * instruction probably requires it.
2501 */
252b5132
RH		 2502
2503 int valid_toc;
2504 enum toc_size_qualifier toc_kind;
2505 bfd_reloc_code_real_type toc_reloc;
2506
99a814a1
AM		 2507 /* Go parse off the [tocXX] part. */
2508 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2509
81d4177b 2510 if (!valid_toc)
252b5132 2511 {
99a814a1
AM		 2512 /* Note: message has already been issued.
2513 FIXME: what sort of recovery should we do?
2514 demand_rest_of_line (); return; ? */
252b5132
RH		 2515 }
2516
99a814a1
AM		 2517 /* Now get the symbol following the ']'. */
2518 expression (&ex);
252b5132
RH		 2519
2520 switch (toc_kind)
2521 {
2522 case default_toc:
99a814a1
AM		 2523 /* In this case, we may not have seen the symbol yet,
2524 since it is allowed to appear on a .extern or .globl
2525 or just be a label in the .data section. */
252b5132
RH		 2526 toc_reloc = BFD_RELOC_PPC_TOC16;
2527 break;
2528 case data_in_toc:
99a814a1
AM		 2529 /* 1. The symbol must be defined and either in the toc
2530 section, or a global.
2531 2. The reloc generated must have the TOCDEFN flag set
2532 in upper bit mess of the reloc type.
2533 FIXME: It's a little confusing what the tocv
2534 qualifier can be used for. At the very least, I've
2535 seen three uses, only one of which I'm sure I can
2536 explain. */
81d4177b
KH		 2537 if (ex.X_op == O_symbol)
2538 {
9c2799c2 2539 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2540 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2541 != tocdata_section)
252b5132 2542 {
99a814a1 2543 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2544 }
2545 }
2546
2547 toc_reloc = BFD_RELOC_PPC_TOC16;
2548 break;
2549 case must_be_32:
99a814a1
AM		 2550 /* FIXME: these next two specifically specify 32/64 bit
2551 toc entries. We don't support them today. Is this
2552 the right way to say that? */
252b5132
RH		 2553 toc_reloc = BFD_RELOC_UNUSED;
2554 as_bad (_("Unimplemented toc32 expression modifier"));
2555 break;
2556 case must_be_64:
99a814a1 2557 /* FIXME: see above. */
252b5132
RH		 2558 toc_reloc = BFD_RELOC_UNUSED;
2559 as_bad (_("Unimplemented toc64 expression modifier"));
2560 break;
2561 default:
bc805888 2562 fprintf (stderr,
99a814a1
AM		 2563 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2564 toc_kind);
bc805888 2565 abort ();
252b5132
RH		 2566 break;
2567 }
2568
2569 /* We need to generate a fixup for this expression. */
2570 if (fc >= MAX_INSN_FIXUPS)
2571 as_fatal (_("too many fixups"));
2572
2573 fixups[fc].reloc = toc_reloc;
2574 fixups[fc].exp = ex;
2575 fixups[fc].opindex = *opindex_ptr;
2576 ++fc;
2577
99a814a1
AM		 2578 /* Ok. We've set up the fixup for the instruction. Now make it
2579 look like the constant 0 was found here. */
252b5132
RH		 2580 ex.X_unsigned = 1;
2581 ex.X_op = O_constant;
2582 ex.X_add_number = 0;
2583 ex.X_add_symbol = NULL;
2584 ex.X_op_symbol = NULL;
2585 }
2586
2587 else
2588#endif /* TE_PE */
2589 {
2ad068be
AM		 2590 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2591 || !register_name (&ex))
252b5132 2592 {
13abbae3
AM		 2593 char save_lex = lex_type['%'];
2594
252b5132 2595 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2596 {
2597 cr_operand = TRUE;
2598 lex_type['%'] |= LEX_BEGIN_NAME;
2599 }
252b5132 2600 expression (&ex);
b34976b6 2601 cr_operand = FALSE;
13abbae3 2602 lex_type['%'] = save_lex;
252b5132
RH		 2603 }
2604 }
2605
2606 str = input_line_pointer;
2607 input_line_pointer = hold;
2608
2609 if (ex.X_op == O_illegal)
2610 as_bad (_("illegal operand"));
2611 else if (ex.X_op == O_absent)
2612 as_bad (_("missing operand"));
2613 else if (ex.X_op == O_register)
2614 {
2615 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2616 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2617 }
2618 else if (ex.X_op == O_constant)
2619 {
2620#ifdef OBJ_ELF
81d4177b 2621 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2622 char *orig_str = str;
2623
2624 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2625 switch (reloc)
2626 {
2627 default:
2628 str = orig_str;
2629 break;
2630
2631 case BFD_RELOC_LO16:
2632 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2633 something which cleared it, we always produce a
2634 signed value. */
2635 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2636 ex.X_add_number &= 0xffff;
2637 else
0baf16f2 2638 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2639 break;
2640
2641 case BFD_RELOC_HI16:
0baf16f2
AM		 2642 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2643 ex.X_add_number = PPC_HI (ex.X_add_number);
2644 else
2645 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2646 break;
2647
2648 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2649 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2650 ex.X_add_number = PPC_HA (ex.X_add_number);
2651 else
2652 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2653 break;
2654
0baf16f2
AM		 2655 case BFD_RELOC_PPC64_HIGHER:
2656 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2657 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2658 else
2659 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2660 break;
2661
2662 case BFD_RELOC_PPC64_HIGHER_S:
2663 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2664 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2665 else
2666 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2667 break;
0baf16f2
AM		 2668
2669 case BFD_RELOC_PPC64_HIGHEST:
2670 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2671 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2672 else
2673 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2674 break;
2675
2676 case BFD_RELOC_PPC64_HIGHEST_S:
2677 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2678 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2679 else
2680 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2681 break;
252b5132 2682 }
0baf16f2 2683#endif /* OBJ_ELF */
252b5132 2684 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2685 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2686 }
2687#ifdef OBJ_ELF
727fc41e 2688 else
252b5132 2689 {
727fc41e 2690 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2691 {
727fc41e
AM		 2692 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2693 if (sym_name[0] == '.')
2694 ++sym_name;
cdba85ec 2695
727fc41e 2696 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2697 {
727fc41e
AM		 2698 expressionS tls_exp;
2699
2700 hold = input_line_pointer;
2701 input_line_pointer = str + 1;
2702 expression (&tls_exp);
2703 if (tls_exp.X_op == O_symbol)
2704 {
2705 reloc = BFD_RELOC_UNUSED;
2706 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2707 {
2708 reloc = BFD_RELOC_PPC_TLSGD;
2709 input_line_pointer += 7;
2710 }
2711 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2712 {
2713 reloc = BFD_RELOC_PPC_TLSLD;
2714 input_line_pointer += 7;
2715 }
2716 if (reloc != BFD_RELOC_UNUSED)
2717 {
2718 SKIP_WHITESPACE ();
2719 str = input_line_pointer;
2720
2721 if (fc >= MAX_INSN_FIXUPS)
2722 as_fatal (_("too many fixups"));
2723 fixups[fc].exp = tls_exp;
2724 fixups[fc].opindex = *opindex_ptr;
2725 fixups[fc].reloc = reloc;
2726 ++fc;
2727 }
2728 }
2729 input_line_pointer = hold;
252b5132
RH		 2730 }
2731 }
2732
727fc41e 2733 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2734 {
727fc41e 2735 /* Some TLS tweaks. */
0baf16f2
AM		 2736 switch (reloc)
2737 {
727fc41e 2738 default:
cdba85ec 2739 break;
727fc41e
AM		 2740
2741 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2742 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2743 as_bad (_("@tls may not be used with \"%s\" operands"),
2744 opcode->name);
2745 else if (operand->shift != 11)
2746 as_bad (_("@tls may only be used in last operand"));
2747 else
2748 insn = ppc_insert_operand (insn, operand,
2749 ppc_obj64 ? 13 : 2,
2750 ppc_cpu, (char *) NULL, 0);
cdba85ec 2751 break;
727fc41e
AM		 2752
2753 /* We'll only use the 32 (or 64) bit form of these relocations
2754 in constants. Instructions get the 16 bit form. */
2755 case BFD_RELOC_PPC_DTPREL:
2756 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2757 break;
727fc41e
AM		 2758 case BFD_RELOC_PPC_TPREL:
2759 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2760 break;
2761 }
727fc41e
AM		 2762
2763 /* For the absolute forms of branches, convert the PC
2764 relative form back into the absolute. */
2765 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2766 {
2767 switch (reloc)
2768 {
2769 case BFD_RELOC_PPC_B26:
2770 reloc = BFD_RELOC_PPC_BA26;
2771 break;
2772 case BFD_RELOC_PPC_B16:
2773 reloc = BFD_RELOC_PPC_BA16;
2774 break;
2775 case BFD_RELOC_PPC_B16_BRTAKEN:
2776 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2777 break;
2778 case BFD_RELOC_PPC_B16_BRNTAKEN:
2779 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2780 break;
2781 default:
2782 break;
2783 }
2784 }
2785
2786 if (ppc_obj64
2787 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2788 {
2789 switch (reloc)
2790 {
2791 case BFD_RELOC_16:
2792 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2793 break;
2794 case BFD_RELOC_LO16:
2795 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2796 break;
2797 case BFD_RELOC_16_GOTOFF:
2798 reloc = BFD_RELOC_PPC64_GOT16_DS;
2799 break;
2800 case BFD_RELOC_LO16_GOTOFF:
2801 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2802 break;
2803 case BFD_RELOC_LO16_PLTOFF:
2804 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2805 break;
2806 case BFD_RELOC_16_BASEREL:
2807 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2808 break;
2809 case BFD_RELOC_LO16_BASEREL:
2810 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2811 break;
2812 case BFD_RELOC_PPC_TOC16:
2813 reloc = BFD_RELOC_PPC64_TOC16_DS;
2814 break;
2815 case BFD_RELOC_PPC64_TOC16_LO:
2816 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2817 break;
2818 case BFD_RELOC_PPC64_PLTGOT16:
2819 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2820 break;
2821 case BFD_RELOC_PPC64_PLTGOT16_LO:
2822 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2823 break;
2824 case BFD_RELOC_PPC_DTPREL16:
2825 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2826 break;
2827 case BFD_RELOC_PPC_DTPREL16_LO:
2828 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2829 break;
2830 case BFD_RELOC_PPC_TPREL16:
2831 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2832 break;
2833 case BFD_RELOC_PPC_TPREL16_LO:
2834 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2835 break;
2836 case BFD_RELOC_PPC_GOT_DTPREL16:
2837 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2838 case BFD_RELOC_PPC_GOT_TPREL16:
2839 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2840 break;
2841 default:
2842 as_bad (_("unsupported relocation for DS offset field"));
2843 break;
2844 }
2845 }
0baf16f2
AM		 2846 }
2847
252b5132
RH		 2848 /* We need to generate a fixup for this expression. */
2849 if (fc >= MAX_INSN_FIXUPS)
2850 as_fatal (_("too many fixups"));
2851 fixups[fc].exp = ex;
727fc41e 2852 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2853 fixups[fc].reloc = reloc;
2854 ++fc;
2855 }
727fc41e 2856#else /* OBJ_ELF */
252b5132
RH		 2857 else
2858 {
2859 /* We need to generate a fixup for this expression. */
2860 if (fc >= MAX_INSN_FIXUPS)
2861 as_fatal (_("too many fixups"));
2862 fixups[fc].exp = ex;
2863 fixups[fc].opindex = *opindex_ptr;
2864 fixups[fc].reloc = BFD_RELOC_UNUSED;
2865 ++fc;
2866 }
727fc41e 2867#endif /* OBJ_ELF */
252b5132
RH		 2868
2869 if (need_paren)
2870 {
2871 endc = ')';
2872 need_paren = 0;
c3d65c1c
BE		 2873 /* If expecting more operands, then we want to see "),". */
2874 if (*str == endc && opindex_ptr[1] != 0)
2875 {
2876 do
2877 ++str;
2878 while (ISSPACE (*str));
2879 endc = ',';
2880 }
252b5132
RH		 2881 }
2882 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2883 {
2884 endc = '(';
2885 need_paren = 1;
2886 }
2887 else
2888 endc = ',';
2889
2890 /* The call to expression should have advanced str past any
2891 whitespace. */
2892 if (*str != endc
2893 && (endc != ',' || *str != '\0'))
2894 {
2895 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2896 break;
2897 }
2898
2899 if (*str != '\0')
2900 ++str;
2901 }
2902
3882b010 2903 while (ISSPACE (*str))
252b5132
RH		 2904 ++str;
2905
2906 if (*str != '\0')
2907 as_bad (_("junk at end of line: `%s'"), str);
2908
dc1d03fc 2909#ifdef OBJ_ELF
6a0c61b7 2910 /* Do we need/want a APUinfo section? */
ed84b57b 2911 if ((ppc_cpu & PPC_OPCODE_E500MC) != 0)
6a0c61b7
EZ		 2912 {
2913 /* These are all version "1". */
2914 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2915 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2916 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2917 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2918 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2919 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2920 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2921 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2922 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2923 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2924 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2925 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2926 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2927 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2928 }
dc1d03fc 2929#endif
6a0c61b7 2930
252b5132
RH		 2931 /* Write out the instruction. */
2932 f = frag_more (4);
09b935ac
AM		 2933 addr_mod = frag_now_fix () & 3;
2934 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2935 as_bad (_("instruction address is not a multiple of 4"));
2936 frag_now->insn_addr = addr_mod;
2937 frag_now->has_code = 1;
252b5132
RH		 2938 md_number_to_chars (f, insn, 4);
2939
5d6f4f16
GK		 2940#ifdef OBJ_ELF
2941 dwarf2_emit_insn (4);
2942#endif
2943
252b5132
RH		 2944 /* Create any fixups. At this point we do not use a
2945 bfd_reloc_code_real_type, but instead just use the
2946 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2947 handle fixups for any operand type, although that is admittedly
2948 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2949 md_apply_fix. */
252b5132
RH		 2950 for (i = 0; i < fc; i++)
2951 {
252b5132
RH		 2952 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2953 {
99a814a1 2954 reloc_howto_type *reloc_howto;
252b5132
RH		 2955 int size;
2956 int offset;
2957 fixS *fixP;
2958
99a814a1 2959 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2960 if (!reloc_howto)
2961 abort ();
2962
2963 size = bfd_get_reloc_size (reloc_howto);
2964 offset = target_big_endian ? (4 - size) : 0;
2965
2966 if (size < 1 || size > 4)
bc805888 2967 abort ();
252b5132 2968
99a814a1
AM		 2969 fixP = fix_new_exp (frag_now,
2970 f - frag_now->fr_literal + offset,
2971 size,
2972 &fixups[i].exp,
2973 reloc_howto->pc_relative,
252b5132
RH		 2974 fixups[i].reloc);
2975
2976 /* Turn off complaints that the addend is too large for things like
2977 foo+100000@ha. */
2978 switch (fixups[i].reloc)
2979 {
2980 case BFD_RELOC_16_GOTOFF:
2981 case BFD_RELOC_PPC_TOC16:
2982 case BFD_RELOC_LO16:
2983 case BFD_RELOC_HI16:
2984 case BFD_RELOC_HI16_S:
0baf16f2 2985#ifdef OBJ_ELF
0baf16f2
AM		 2986 case BFD_RELOC_PPC64_HIGHER:
2987 case BFD_RELOC_PPC64_HIGHER_S:
2988 case BFD_RELOC_PPC64_HIGHEST:
2989 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2990#endif
252b5132
RH		 2991 fixP->fx_no_overflow = 1;
2992 break;
2993 default:
2994 break;
2995 }
2996 }
2997 else
727fc41e
AM		 2998 {
2999 const struct powerpc_operand *operand;
3000
3001 operand = &powerpc_operands[fixups[i].opindex];
3002 fix_new_exp (frag_now,
3003 f - frag_now->fr_literal,
3004 4,
3005 &fixups[i].exp,
3006 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3007 ((bfd_reloc_code_real_type)
3008 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3009 }
252b5132
RH		 3010 }
3011}
3012
3013/* Handle a macro. Gather all the operands, transform them as
3014 described by the macro, and call md_assemble recursively. All the
3015 operands are separated by commas; we don't accept parentheses
3016 around operands here. */
3017
3018static void
98027b10 3019ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3020{
3021 char *operands[10];
3022 unsigned int count;
3023 char *s;
3024 unsigned int len;
3025 const char *format;
db557034 3026 unsigned int arg;
252b5132
RH		 3027 char *send;
3028 char *complete;
3029
3030 /* Gather the users operands into the operands array. */
3031 count = 0;
3032 s = str;
3033 while (1)
3034 {
3035 if (count >= sizeof operands / sizeof operands[0])
3036 break;
3037 operands[count++] = s;
3038 s = strchr (s, ',');
3039 if (s == (char *) NULL)
3040 break;
3041 *s++ = '\0';
81d4177b 3042 }
252b5132
RH		 3043
3044 if (count != macro->operands)
3045 {
3046 as_bad (_("wrong number of operands"));
3047 return;
3048 }
3049
3050 /* Work out how large the string must be (the size is unbounded
3051 because it includes user input). */
3052 len = 0;
3053 format = macro->format;
3054 while (*format != '\0')
3055 {
3056 if (*format != '%')
3057 {
3058 ++len;
3059 ++format;
3060 }
3061 else
3062 {
3063 arg = strtol (format + 1, &send, 10);
db557034 3064 know (send != format && arg < count);
252b5132
RH		 3065 len += strlen (operands[arg]);
3066 format = send;
3067 }
3068 }
3069
3070 /* Put the string together. */
3071 complete = s = (char *) alloca (len + 1);
3072 format = macro->format;
3073 while (*format != '\0')
3074 {
3075 if (*format != '%')
3076 *s++ = *format++;
3077 else
3078 {
3079 arg = strtol (format + 1, &send, 10);
3080 strcpy (s, operands[arg]);
3081 s += strlen (s);
3082 format = send;
3083 }
3084 }
3085 *s = '\0';
3086
3087 /* Assemble the constructed instruction. */
3088 md_assemble (complete);
81d4177b 3089}
252b5132
RH		 3090\f
3091#ifdef OBJ_ELF
18ae9cc1 3092/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3093
3094int
98027b10 3095ppc_section_type (char *str, size_t len)
252b5132 3096{
9de8d8f1
RH		 3097 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3098 return SHT_ORDERED;
252b5132 3099
9de8d8f1 3100 return -1;
252b5132
RH		 3101}
3102
3103int
01e1a5bc 3104ppc_section_flags (flagword flags, bfd_vma attr, int type)
252b5132
RH		 3105{
3106 if (type == SHT_ORDERED)
3107 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3108
252b5132
RH		 3109 return flags;
3110}
3111#endif /* OBJ_ELF */
3112
3113\f
3114/* Pseudo-op handling. */
3115
3116/* The .byte pseudo-op. This is similar to the normal .byte
3117 pseudo-op, but it can also take a single ASCII string. */
3118
3119static void
98027b10 3120ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3121{
3122 if (*input_line_pointer != '\"')
3123 {
3124 cons (1);
3125 return;
3126 }
3127
3128 /* Gather characters. A real double quote is doubled. Unusual
3129 characters are not permitted. */
3130 ++input_line_pointer;
3131 while (1)
3132 {
3133 char c;
3134
3135 c = *input_line_pointer++;
3136
3137 if (c == '\"')
3138 {
3139 if (*input_line_pointer != '\"')
3140 break;
3141 ++input_line_pointer;
3142 }
3143
3144 FRAG_APPEND_1_CHAR (c);
3145 }
3146
3147 demand_empty_rest_of_line ();
3148}
3149\f
3150#ifdef OBJ_XCOFF
3151
3152/* XCOFF specific pseudo-op handling. */
3153
3154/* This is set if we are creating a .stabx symbol, since we don't want
3155 to handle symbol suffixes for such symbols. */
b34976b6 3156static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3157
3158/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3159 symbols in the .bss segment as though they were local common
67c1ffbe 3160 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3161 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3162
3163static void
98027b10 3164ppc_comm (int lcomm)
252b5132
RH		 3165{
3166 asection *current_seg = now_seg;
3167 subsegT current_subseg = now_subseg;
3168 char *name;
3169 char endc;
3170 char *end_name;
3171 offsetT size;
3172 offsetT align;
3173 symbolS *lcomm_sym = NULL;
3174 symbolS *sym;
3175 char *pfrag;
3176
3177 name = input_line_pointer;
3178 endc = get_symbol_end ();
3179 end_name = input_line_pointer;
3180 *end_name = endc;
3181
3182 if (*input_line_pointer != ',')
3183 {
3184 as_bad (_("missing size"));
3185 ignore_rest_of_line ();
3186 return;
3187 }
3188 ++input_line_pointer;
3189
3190 size = get_absolute_expression ();
3191 if (size < 0)
3192 {
3193 as_bad (_("negative size"));
3194 ignore_rest_of_line ();
3195 return;
3196 }
3197
3198 if (! lcomm)
3199 {
3200 /* The third argument to .comm is the alignment. */
3201 if (*input_line_pointer != ',')
1ad63b2f 3202 align = 2;
252b5132
RH		 3203 else
3204 {
3205 ++input_line_pointer;
3206 align = get_absolute_expression ();
3207 if (align <= 0)
3208 {
3209 as_warn (_("ignoring bad alignment"));
1ad63b2f 3210 align = 2;
252b5132
RH		 3211 }
3212 }
3213 }
3214 else
3215 {
3216 char *lcomm_name;
3217 char lcomm_endc;
3218
1ad63b2f 3219 if (size <= 4)
252b5132
RH		 3220 align = 2;
3221 else
3222 align = 3;
3223
3224 /* The third argument to .lcomm appears to be the real local
3225 common symbol to create. References to the symbol named in
3226 the first argument are turned into references to the third
3227 argument. */
3228 if (*input_line_pointer != ',')
3229 {
3230 as_bad (_("missing real symbol name"));
3231 ignore_rest_of_line ();
3232 return;
3233 }
3234 ++input_line_pointer;
3235
3236 lcomm_name = input_line_pointer;
3237 lcomm_endc = get_symbol_end ();
81d4177b 3238
252b5132
RH		 3239 lcomm_sym = symbol_find_or_make (lcomm_name);
3240
3241 *input_line_pointer = lcomm_endc;
3242 }
3243
3244 *end_name = '\0';
3245 sym = symbol_find_or_make (name);
3246 *end_name = endc;
3247
3248 if (S_IS_DEFINED (sym)
3249 || S_GET_VALUE (sym) != 0)
3250 {
3251 as_bad (_("attempt to redefine symbol"));
3252 ignore_rest_of_line ();
3253 return;
3254 }
81d4177b 3255
252b5132 3256 record_alignment (bss_section, align);
81d4177b 3257
252b5132
RH		 3258 if (! lcomm
3259 || ! S_IS_DEFINED (lcomm_sym))
3260 {
3261 symbolS *def_sym;
3262 offsetT def_size;
3263
3264 if (! lcomm)
3265 {
3266 def_sym = sym;
3267 def_size = size;
3268 S_SET_EXTERNAL (sym);
3269 }
3270 else
3271 {
809ffe0d 3272 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3273 def_sym = lcomm_sym;
3274 def_size = 0;
3275 }
3276
3277 subseg_set (bss_section, 1);
3278 frag_align (align, 0, 0);
81d4177b 3279
809ffe0d 3280 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3281 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3282 def_size, (char *) NULL);
3283 *pfrag = 0;
3284 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3285 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3286 }
3287 else if (lcomm)
3288 {
3289 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3290 symbol_get_frag (lcomm_sym)->fr_offset =
3291 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3292 &~ ((1 << align) - 1));
809ffe0d
ILT		 3293 if (align > symbol_get_tc (lcomm_sym)->align)
3294 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3295 }
3296
3297 if (lcomm)
3298 {
3299 /* Make sym an offset from lcomm_sym. */
3300 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3301 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3302 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3303 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3304 }
3305
3306 subseg_set (current_seg, current_subseg);
3307
3308 demand_empty_rest_of_line ();
3309}
3310
3311/* The .csect pseudo-op. This switches us into a different
3312 subsegment. The first argument is a symbol whose value is the
3313 start of the .csect. In COFF, csect symbols get special aux
3314 entries defined by the x_csect field of union internal_auxent. The
3315 optional second argument is the alignment (the default is 2). */
3316
3317static void
98027b10 3318ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3319{
3320 char *name;
3321 char endc;
3322 symbolS *sym;
931e13a6 3323 offsetT align;
252b5132
RH		 3324
3325 name = input_line_pointer;
3326 endc = get_symbol_end ();
81d4177b 3327
252b5132
RH		 3328 sym = symbol_find_or_make (name);
3329
3330 *input_line_pointer = endc;
3331
3332 if (S_GET_NAME (sym)[0] == '\0')
3333 {
3334 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3335 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3336 }
3337
931e13a6 3338 align = 2;
252b5132
RH		 3339 if (*input_line_pointer == ',')
3340 {
3341 ++input_line_pointer;
931e13a6 3342 align = get_absolute_expression ();
252b5132
RH		 3343 }
3344
931e13a6
AM		 3345 ppc_change_csect (sym, align);
3346
252b5132
RH		 3347 demand_empty_rest_of_line ();
3348}
3349
3350/* Change to a different csect. */
3351
3352static void
98027b10 3353ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3354{
3355 if (S_IS_DEFINED (sym))
809ffe0d 3356 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3357 else
3358 {
3359 symbolS **list_ptr;
3360 int after_toc;
3361 int hold_chunksize;
3362 symbolS *list;
931e13a6
AM		 3363 int is_code;
3364 segT sec;
252b5132
RH		 3365
3366 /* This is a new csect. We need to look at the symbol class to
3367 figure out whether it should go in the text section or the
3368 data section. */
3369 after_toc = 0;
931e13a6 3370 is_code = 0;
96d56e9f 3371 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3372 {
3373 case XMC_PR:
3374 case XMC_RO:
3375 case XMC_DB:
3376 case XMC_GL:
3377 case XMC_XO:
3378 case XMC_SV:
3379 case XMC_TI:
3380 case XMC_TB:
3381 S_SET_SEGMENT (sym, text_section);
809ffe0d 3382 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3383 ++ppc_text_subsegment;
3384 list_ptr = &ppc_text_csects;
931e13a6 3385 is_code = 1;
252b5132
RH		 3386 break;
3387 case XMC_RW:
3388 case XMC_TC0:
3389 case XMC_TC:
3390 case XMC_DS:
3391 case XMC_UA:
3392 case XMC_BS:
3393 case XMC_UC:
3394 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3395 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3396 == ppc_data_subsegment))
252b5132
RH		 3397 after_toc = 1;
3398 S_SET_SEGMENT (sym, data_section);
809ffe0d 3399 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3400 ++ppc_data_subsegment;
3401 list_ptr = &ppc_data_csects;
3402 break;
3403 default:
3404 abort ();
3405 }
3406
3407 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3408 changing subsegments, so that we don't use a lot of memory
3409 space for what may be a small section. */
252b5132
RH		 3410 hold_chunksize = chunksize;
3411 chunksize = 64;
3412
931e13a6
AM		 3413 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3414 symbol_get_tc (sym)->subseg);
252b5132
RH		 3415
3416 chunksize = hold_chunksize;
3417
3418 if (after_toc)
3419 ppc_after_toc_frag = frag_now;
3420
931e13a6
AM		 3421 record_alignment (sec, align);
3422 if (is_code)
3423 frag_align_code (align, 0);
3424 else
3425 frag_align (align, 0, 0);
3426
809ffe0d 3427 symbol_set_frag (sym, frag_now);
252b5132
RH		 3428 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3429
931e13a6 3430 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3431 symbol_get_tc (sym)->output = 1;
3432 symbol_get_tc (sym)->within = sym;
81d4177b 3433
252b5132 3434 for (list = *list_ptr;
809ffe0d
ILT		 3435 symbol_get_tc (list)->next != (symbolS *) NULL;
3436 list = symbol_get_tc (list)->next)
252b5132 3437 ;
809ffe0d 3438 symbol_get_tc (list)->next = sym;
81d4177b 3439
252b5132 3440 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3441 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3442 &symbol_lastP);
252b5132
RH		 3443 }
3444
3445 ppc_current_csect = sym;
3446}
3447
3448/* This function handles the .text and .data pseudo-ops. These
3449 pseudo-ops aren't really used by XCOFF; we implement them for the
3450 convenience of people who aren't used to XCOFF. */
3451
3452static void
98027b10 3453ppc_section (int type)
252b5132
RH		 3454{
3455 const char *name;
3456 symbolS *sym;
3457
3458 if (type == 't')
3459 name = ".text[PR]";
3460 else if (type == 'd')
3461 name = ".data[RW]";
3462 else
3463 abort ();
3464
3465 sym = symbol_find_or_make (name);
3466
931e13a6 3467 ppc_change_csect (sym, 2);
252b5132
RH		 3468
3469 demand_empty_rest_of_line ();
3470}
3471
3472/* This function handles the .section pseudo-op. This is mostly to
3473 give an error, since XCOFF only supports .text, .data and .bss, but
3474 we do permit the user to name the text or data section. */
3475
3476static void
98027b10 3477ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3478{
3479 char *user_name;
3480 const char *real_name;
3481 char c;
3482 symbolS *sym;
3483
3484 user_name = input_line_pointer;
3485 c = get_symbol_end ();
3486
3487 if (strcmp (user_name, ".text") == 0)
3488 real_name = ".text[PR]";
3489 else if (strcmp (user_name, ".data") == 0)
3490 real_name = ".data[RW]";
3491 else
3492 {
3493 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3494 *input_line_pointer = c;
3495 ignore_rest_of_line ();
3496 return;
3497 }
3498
3499 *input_line_pointer = c;
3500
3501 sym = symbol_find_or_make (real_name);
3502
931e13a6 3503 ppc_change_csect (sym, 2);
252b5132
RH		 3504
3505 demand_empty_rest_of_line ();
3506}
3507
3508/* The .extern pseudo-op. We create an undefined symbol. */
3509
3510static void
98027b10 3511ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3512{
3513 char *name;
3514 char endc;
3515
3516 name = input_line_pointer;
3517 endc = get_symbol_end ();
3518
3519 (void) symbol_find_or_make (name);
3520
3521 *input_line_pointer = endc;
3522
3523 demand_empty_rest_of_line ();
3524}
3525
3526/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3527
3528static void
98027b10 3529ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3530{
3531 char *name;
3532 char endc;
3533 symbolS *sym;
3534
3535 name = input_line_pointer;
3536 endc = get_symbol_end ();
3537
3538 sym = symbol_find_or_make (name);
3539
3540 *input_line_pointer = endc;
3541
809ffe0d 3542 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3543
3544 demand_empty_rest_of_line ();
3545}
3546
c865e45b
RS		 3547/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
3548 relocations at the beginning of the current csect.
3549
3550 (In principle, there's no reason why the relocations _have_ to be at
3551 the beginning. Anywhere in the csect would do. However, inserting
3552 at the beginning is what the native assmebler does, and it helps to
3553 deal with cases where the .ref statements follow the section contents.)
3554
3555 ??? .refs don't work for empty .csects. However, the native assembler
3556 doesn't report an error in this case, and neither yet do we. */
3557
3558static void
3559ppc_ref (int ignore ATTRIBUTE_UNUSED)
3560{
3561 char *name;
3562 char c;
3563
3564 if (ppc_current_csect == NULL)
3565 {
3566 as_bad (_(".ref outside .csect"));
3567 ignore_rest_of_line ();
3568 return;
3569 }
3570
3571 do
3572 {
3573 name = input_line_pointer;
3574 c = get_symbol_end ();
3575
3576 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
3577 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
3578
3579 *input_line_pointer = c;
3580 SKIP_WHITESPACE ();
3581 c = *input_line_pointer;
3582 if (c == ',')
3583 {
3584 input_line_pointer++;
3585 SKIP_WHITESPACE ();
3586 if (is_end_of_line[(unsigned char) *input_line_pointer])
3587 {
3588 as_bad (_("missing symbol name"));
3589 ignore_rest_of_line ();
3590 return;
3591 }
3592 }
3593 }
3594 while (c == ',');
3595
3596 demand_empty_rest_of_line ();
3597}
3598
252b5132
RH		 3599/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3600 although I don't know why it bothers. */
3601
3602static void
98027b10 3603ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3604{
3605 char *name;
3606 char endc;
3607 symbolS *sym;
3608 int len;
3609
3610 name = input_line_pointer;
3611 endc = get_symbol_end ();
3612
3613 sym = symbol_find_or_make (name);
3614
3615 *input_line_pointer = endc;
3616
3617 if (*input_line_pointer != ',')
3618 {
3619 as_bad (_("missing rename string"));
3620 ignore_rest_of_line ();
3621 return;
3622 }
3623 ++input_line_pointer;
3624
809ffe0d 3625 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3626
3627 demand_empty_rest_of_line ();
3628}
3629
3630/* The .stabx pseudo-op. This is similar to a normal .stabs
3631 pseudo-op, but slightly different. A sample is
3632 .stabx "main:F-1",.main,142,0
3633 The first argument is the symbol name to create. The second is the
3634 value, and the third is the storage class. The fourth seems to be
3635 always zero, and I am assuming it is the type. */
3636
3637static void
98027b10 3638ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3639{
3640 char *name;
3641 int len;
3642 symbolS *sym;
3643 expressionS exp;
3644
3645 name = demand_copy_C_string (&len);
3646
3647 if (*input_line_pointer != ',')
3648 {
3649 as_bad (_("missing value"));
3650 return;
3651 }
3652 ++input_line_pointer;
3653
b34976b6 3654 ppc_stab_symbol = TRUE;
252b5132 3655 sym = symbol_make (name);
b34976b6 3656 ppc_stab_symbol = FALSE;
252b5132 3657
809ffe0d 3658 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3659
3660 (void) expression (&exp);
3661
3662 switch (exp.X_op)
3663 {
3664 case O_illegal:
3665 case O_absent:
3666 case O_big:
3667 as_bad (_("illegal .stabx expression; zero assumed"));
3668 exp.X_add_number = 0;
3669 /* Fall through. */
3670 case O_constant:
3671 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3672 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3673 break;
3674
3675 case O_symbol:
3676 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3677 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3678 else
3679 {
3680 S_SET_VALUE (sym,
3681 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3682 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3683 }
3684 break;
3685
3686 default:
3687 /* The value is some complex expression. This will probably
99a814a1
AM		 3688 fail at some later point, but this is probably the right
3689 thing to do here. */
809ffe0d 3690 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3691 break;
3692 }
3693
3694 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3695 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3696
3697 if (*input_line_pointer != ',')
3698 {
3699 as_bad (_("missing class"));
3700 return;
3701 }
3702 ++input_line_pointer;
3703
3704 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3705
3706 if (*input_line_pointer != ',')
3707 {
3708 as_bad (_("missing type"));
3709 return;
3710 }
3711 ++input_line_pointer;
3712
3713 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3714
809ffe0d 3715 symbol_get_tc (sym)->output = 1;
252b5132 3716
6877bb43 3717 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3718
809ffe0d 3719 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3720
41ea10b1 3721 /* In this case :
99a814a1 3722
41ea10b1
TR		 3723 .bs name
3724 .stabx "z",arrays_,133,0
3725 .es
99a814a1 3726
41ea10b1 3727 .comm arrays_,13768,3
99a814a1 3728
41ea10b1
TR		 3729 resolve_symbol_value will copy the exp's "within" into sym's when the
3730 offset is 0. Since this seems to be corner case problem,
3731 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3732 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3733
3734 if (exp.X_op == O_symbol)
41ea10b1
TR		 3735 {
3736 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3737 }
6877bb43 3738 }
99a814a1 3739
252b5132
RH		 3740 if (exp.X_op != O_symbol
3741 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3742 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3743 ppc_frob_label (sym);
3744 else
3745 {
3746 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3747 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3748 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3749 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3750 }
3751
3752 demand_empty_rest_of_line ();
3753}
3754
3755/* The .function pseudo-op. This takes several arguments. The first
3756 argument seems to be the external name of the symbol. The second
67c1ffbe 3757 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3758 uses the same name for both. I have no idea what the third and
3759 fourth arguments are meant to be. The optional fifth argument is
3760 an expression for the size of the function. In COFF this symbol
3761 gets an aux entry like that used for a csect. */
3762
3763static void
98027b10 3764ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3765{
3766 char *name;
3767 char endc;
3768 char *s;
3769 symbolS *ext_sym;
3770 symbolS *lab_sym;
3771
3772 name = input_line_pointer;
3773 endc = get_symbol_end ();
3774
3775 /* Ignore any [PR] suffix. */
3776 name = ppc_canonicalize_symbol_name (name);
3777 s = strchr (name, '[');
3778 if (s != (char *) NULL
3779 && strcmp (s + 1, "PR]") == 0)
3780 *s = '\0';
3781
3782 ext_sym = symbol_find_or_make (name);
3783
3784 *input_line_pointer = endc;
3785
3786 if (*input_line_pointer != ',')
3787 {
3788 as_bad (_("missing symbol name"));
3789 ignore_rest_of_line ();
3790 return;
3791 }
3792 ++input_line_pointer;
3793
3794 name = input_line_pointer;
3795 endc = get_symbol_end ();
3796
3797 lab_sym = symbol_find_or_make (name);
3798
3799 *input_line_pointer = endc;
3800
3801 if (ext_sym != lab_sym)
3802 {
809ffe0d
ILT		 3803 expressionS exp;
3804
3805 exp.X_op = O_symbol;
3806 exp.X_add_symbol = lab_sym;
3807 exp.X_op_symbol = NULL;
3808 exp.X_add_number = 0;
3809 exp.X_unsigned = 0;
3810 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3811 }
3812
96d56e9f
NC		 3813 if (symbol_get_tc (ext_sym)->symbol_class == -1)
3814 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 3815 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3816
3817 if (*input_line_pointer == ',')
3818 {
91d6fa6a 3819 expressionS exp;
252b5132
RH		 3820
3821 /* Ignore the third argument. */
3822 ++input_line_pointer;
91d6fa6a 3823 expression (& exp);
252b5132
RH		 3824 if (*input_line_pointer == ',')
3825 {
3826 /* Ignore the fourth argument. */
3827 ++input_line_pointer;
91d6fa6a 3828 expression (& exp);
252b5132
RH		 3829 if (*input_line_pointer == ',')
3830 {
3831 /* The fifth argument is the function size. */
3832 ++input_line_pointer;
809ffe0d
ILT		 3833 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3834 absolute_section,
3835 (valueT) 0,
3836 &zero_address_frag);
3837 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3838 }
3839 }
3840 }
3841
3842 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3843 SF_SET_FUNCTION (ext_sym);
3844 SF_SET_PROCESS (ext_sym);
3845 coff_add_linesym (ext_sym);
3846
3847 demand_empty_rest_of_line ();
3848}
3849
3850/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3851 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3852 with the correct line number */
5d6255fe 3853
8642cce8 3854static symbolS *saved_bi_sym = 0;
252b5132
RH		 3855
3856static void
98027b10 3857ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3858{
3859 symbolS *sym;
3860
3861 sym = symbol_make (".bf");
3862 S_SET_SEGMENT (sym, text_section);
809ffe0d 3863 symbol_set_frag (sym, frag_now);
252b5132
RH		 3864 S_SET_VALUE (sym, frag_now_fix ());
3865 S_SET_STORAGE_CLASS (sym, C_FCN);
3866
3867 coff_line_base = get_absolute_expression ();
3868
3869 S_SET_NUMBER_AUXILIARY (sym, 1);
3870 SA_SET_SYM_LNNO (sym, coff_line_base);
3871
8642cce8 3872 /* Line number for bi. */
5d6255fe 3873 if (saved_bi_sym)
8642cce8
TR		 3874 {
3875 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3876 saved_bi_sym = 0;
3877 }
5d6255fe 3878
8642cce8 3879
809ffe0d 3880 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3881
3882 ppc_frob_label (sym);
3883
3884 demand_empty_rest_of_line ();
3885}
3886
3887/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3888 ".ef", except that the line number is absolute, not relative to the
3889 most recent ".bf" symbol. */
3890
3891static void
98027b10 3892ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3893{
3894 symbolS *sym;
3895
3896 sym = symbol_make (".ef");
3897 S_SET_SEGMENT (sym, text_section);
809ffe0d 3898 symbol_set_frag (sym, frag_now);
252b5132
RH		 3899 S_SET_VALUE (sym, frag_now_fix ());
3900 S_SET_STORAGE_CLASS (sym, C_FCN);
3901 S_SET_NUMBER_AUXILIARY (sym, 1);
3902 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3903 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3904
3905 ppc_frob_label (sym);
3906
3907 demand_empty_rest_of_line ();
3908}
3909
3910/* The .bi and .ei pseudo-ops. These take a string argument and
3911 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3912 the symbol list. The value of .bi will be know when the next .bf
3913 is encountered. */
252b5132
RH		 3914
3915static void
98027b10 3916ppc_biei (int ei)
252b5132
RH		 3917{
3918 static symbolS *last_biei;
3919
3920 char *name;
3921 int len;
3922 symbolS *sym;
3923 symbolS *look;
3924
3925 name = demand_copy_C_string (&len);
3926
3927 /* The value of these symbols is actually file offset. Here we set
3928 the value to the index into the line number entries. In
3929 ppc_frob_symbols we set the fix_line field, which will cause BFD
3930 to do the right thing. */
3931
3932 sym = symbol_make (name);
3933 /* obj-coff.c currently only handles line numbers correctly in the
3934 .text section. */
3935 S_SET_SEGMENT (sym, text_section);
3936 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3937 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3938
3939 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3940 symbol_get_tc (sym)->output = 1;
81d4177b 3941
8642cce8 3942 /* Save bi. */
5d6255fe 3943 if (ei)
8642cce8
TR		 3944 saved_bi_sym = 0;
3945 else
3946 saved_bi_sym = sym;
3947
252b5132
RH		 3948 for (look = last_biei ? last_biei : symbol_rootP;
3949 (look != (symbolS *) NULL
3950 && (S_GET_STORAGE_CLASS (look) == C_FILE
3951 || S_GET_STORAGE_CLASS (look) == C_BINCL
3952 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3953 look = symbol_next (look))
3954 ;
3955 if (look != (symbolS *) NULL)
3956 {
3957 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3958 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3959 last_biei = sym;
3960 }
3961
3962 demand_empty_rest_of_line ();
3963}
3964
3965/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3966 There is one argument, which is a csect symbol. The value of the
3967 .bs symbol is the index of this csect symbol. */
3968
3969static void
98027b10 3970ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3971{
3972 char *name;
3973 char endc;
3974 symbolS *csect;
3975 symbolS *sym;
3976
3977 if (ppc_current_block != NULL)
3978 as_bad (_("nested .bs blocks"));
3979
3980 name = input_line_pointer;
3981 endc = get_symbol_end ();
3982
3983 csect = symbol_find_or_make (name);
3984
3985 *input_line_pointer = endc;
3986
3987 sym = symbol_make (".bs");
3988 S_SET_SEGMENT (sym, now_seg);
3989 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3990 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3991 symbol_get_tc (sym)->output = 1;
252b5132 3992
809ffe0d 3993 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3994
3995 ppc_frob_label (sym);
3996
3997 ppc_current_block = sym;
3998
3999 demand_empty_rest_of_line ();
4000}
4001
4002/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4003
4004static void
98027b10 4005ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4006{
4007 symbolS *sym;
4008
4009 if (ppc_current_block == NULL)
4010 as_bad (_(".es without preceding .bs"));
4011
4012 sym = symbol_make (".es");
4013 S_SET_SEGMENT (sym, now_seg);
4014 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4015 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4016 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4017
4018 ppc_frob_label (sym);
4019
4020 ppc_current_block = NULL;
4021
4022 demand_empty_rest_of_line ();
4023}
4024
4025/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4026 line number. */
4027
4028static void
98027b10 4029ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4030{
4031 symbolS *sym;
4032
4033 sym = symbol_make (".bb");
4034 S_SET_SEGMENT (sym, text_section);
809ffe0d 4035 symbol_set_frag (sym, frag_now);
252b5132
RH		 4036 S_SET_VALUE (sym, frag_now_fix ());
4037 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4038
4039 S_SET_NUMBER_AUXILIARY (sym, 1);
4040 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4041
809ffe0d 4042 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4043
4044 SF_SET_PROCESS (sym);
4045
4046 ppc_frob_label (sym);
4047
4048 demand_empty_rest_of_line ();
4049}
4050
4051/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4052 line number. */
4053
4054static void
98027b10 4055ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4056{
4057 symbolS *sym;
4058
4059 sym = symbol_make (".eb");
4060 S_SET_SEGMENT (sym, text_section);
809ffe0d 4061 symbol_set_frag (sym, frag_now);
252b5132
RH		 4062 S_SET_VALUE (sym, frag_now_fix ());
4063 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4064 S_SET_NUMBER_AUXILIARY (sym, 1);
4065 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4066 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4067
4068 SF_SET_PROCESS (sym);
4069
4070 ppc_frob_label (sym);
4071
4072 demand_empty_rest_of_line ();
4073}
4074
4075/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4076 specified name. */
4077
4078static void
98027b10 4079ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4080{
4081 char *name;
4082 int len;
4083 symbolS *sym;
4084
4085 name = demand_copy_C_string (&len);
4086 sym = symbol_make (name);
4087 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4088 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4089 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4090 S_SET_VALUE (sym, 0);
809ffe0d 4091 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4092
4093 ppc_frob_label (sym);
4094
4095 demand_empty_rest_of_line ();
4096}
4097
4098/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4099
4100static void
98027b10 4101ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4102{
4103 symbolS *sym;
4104
4105 sym = symbol_make (".ec");
4106 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4107 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4108 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4109 S_SET_VALUE (sym, 0);
809ffe0d 4110 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4111
4112 ppc_frob_label (sym);
4113
4114 demand_empty_rest_of_line ();
4115}
4116
4117/* The .toc pseudo-op. Switch to the .toc subsegment. */
4118
4119static void
98027b10 4120ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4121{
4122 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4123 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4124 else
4125 {
4126 subsegT subseg;
4127 symbolS *sym;
4128 symbolS *list;
81d4177b 4129
252b5132
RH		 4130 subseg = ppc_data_subsegment;
4131 ++ppc_data_subsegment;
4132
4133 subseg_new (segment_name (data_section), subseg);
4134 ppc_toc_frag = frag_now;
4135
4136 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4137 symbol_set_frag (sym, frag_now);
252b5132
RH		 4138 S_SET_SEGMENT (sym, data_section);
4139 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4140 symbol_get_tc (sym)->subseg = subseg;
4141 symbol_get_tc (sym)->output = 1;
4142 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4143
4144 ppc_toc_csect = sym;
81d4177b 4145
252b5132 4146 for (list = ppc_data_csects;
809ffe0d
ILT		 4147 symbol_get_tc (list)->next != (symbolS *) NULL;
4148 list = symbol_get_tc (list)->next)
252b5132 4149 ;
809ffe0d 4150 symbol_get_tc (list)->next = sym;
252b5132
RH		 4151
4152 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4153 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4154 &symbol_lastP);
252b5132
RH		 4155 }
4156
4157 ppc_current_csect = ppc_toc_csect;
4158
4159 demand_empty_rest_of_line ();
4160}
4161
4162/* The AIX assembler automatically aligns the operands of a .long or
4163 .short pseudo-op, and we want to be compatible. */
4164
4165static void
98027b10 4166ppc_xcoff_cons (int log_size)
252b5132
RH		 4167{
4168 frag_align (log_size, 0, 0);
4169 record_alignment (now_seg, log_size);
4170 cons (1 << log_size);
4171}
4172
4173static void
98027b10 4174ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4175{
4176 expressionS exp;
4177 int byte_count;
4178
4179 (void) expression (&exp);
4180
4181 if (exp.X_op != O_constant)
4182 {
4183 as_bad (_("non-constant byte count"));
4184 return;
4185 }
4186
4187 byte_count = exp.X_add_number;
4188
4189 if (*input_line_pointer != ',')
4190 {
4191 as_bad (_("missing value"));
4192 return;
4193 }
4194
4195 ++input_line_pointer;
4196 cons (byte_count);
4197}
4198
4199#endif /* OBJ_XCOFF */
0baf16f2 4200#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4201\f
4202/* The .tc pseudo-op. This is used when generating either XCOFF or
4203 ELF. This takes two or more arguments.
4204
4205 When generating XCOFF output, the first argument is the name to
4206 give to this location in the toc; this will be a symbol with class
0baf16f2 4207 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4208 this location in the TOC; often there is just one more argument, a
1049f94e 4209 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4210 depends on target word size. A 32-bit target uses 4-byte values, a
4211 64-bit target uses 8-byte values.
252b5132
RH		 4212
4213 When not generating XCOFF output, the arguments are the same, but
4214 the first argument is simply ignored. */
4215
4216static void
98027b10 4217ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4218{
4219#ifdef OBJ_XCOFF
4220
4221 /* Define the TOC symbol name. */
4222 {
4223 char *name;
4224 char endc;
4225 symbolS *sym;
4226
4227 if (ppc_toc_csect == (symbolS *) NULL
4228 || ppc_toc_csect != ppc_current_csect)
4229 {
4230 as_bad (_(".tc not in .toc section"));
4231 ignore_rest_of_line ();
4232 return;
4233 }
4234
4235 name = input_line_pointer;
4236 endc = get_symbol_end ();
4237
4238 sym = symbol_find_or_make (name);
4239
4240 *input_line_pointer = endc;
4241
4242 if (S_IS_DEFINED (sym))
4243 {
4244 symbolS *label;
4245
809ffe0d 4246 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4247 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4248 {
4249 as_bad (_(".tc with no label"));
4250 ignore_rest_of_line ();
4251 return;
4252 }
4253
4254 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4255 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4256 S_SET_VALUE (label, S_GET_VALUE (sym));
4257
4258 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4259 ++input_line_pointer;
4260
4261 return;
4262 }
4263
4264 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4265 symbol_set_frag (sym, frag_now);
252b5132 4266 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4267 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4268 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4269
4270 ppc_frob_label (sym);
4271 }
4272
0baf16f2
AM		 4273#endif /* OBJ_XCOFF */
4274#ifdef OBJ_ELF
9c7977b3 4275 int align;
252b5132
RH		 4276
4277 /* Skip the TOC symbol name. */
4278 while (is_part_of_name (*input_line_pointer)
d13d4015 4279 || *input_line_pointer == ' '
252b5132
RH		 4280 || *input_line_pointer == '['
4281 || *input_line_pointer == ']'
4282 || *input_line_pointer == '{'
4283 || *input_line_pointer == '}')
4284 ++input_line_pointer;
4285
0baf16f2 4286 /* Align to a four/eight byte boundary. */
2b3c4602 4287 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4288 frag_align (align, 0, 0);
4289 record_alignment (now_seg, align);
0baf16f2 4290#endif /* OBJ_ELF */
252b5132
RH		 4291
4292 if (*input_line_pointer != ',')
4293 demand_empty_rest_of_line ();
4294 else
4295 {
4296 ++input_line_pointer;
2b3c4602 4297 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4298 }
4299}
0baf16f2
AM		 4300
4301/* Pseudo-op .machine. */
0baf16f2
AM		 4302
4303static void
98027b10 4304ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4305{
69c040df
AM		 4306 char *cpu_string;
4307#define MAX_HISTORY 100
fa452fa6 4308 static ppc_cpu_t *cpu_history;
69c040df
AM		 4309 static int curr_hist;
4310
4311 SKIP_WHITESPACE ();
4312
4313 if (*input_line_pointer == '"')
4314 {
4315 int len;
4316 cpu_string = demand_copy_C_string (&len);
4317 }
4318 else
4319 {
4320 char c;
4321 cpu_string = input_line_pointer;
4322 c = get_symbol_end ();
4323 cpu_string = xstrdup (cpu_string);
4324 *input_line_pointer = c;
4325 }
4326
4327 if (cpu_string != NULL)
4328 {
fa452fa6 4329 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4330 ppc_cpu_t new_cpu;
69c040df
AM		 4331 char *p;
4332
4333 for (p = cpu_string; *p != 0; p++)
4334 *p = TOLOWER (*p);
4335
4336 if (strcmp (cpu_string, "push") == 0)
4337 {
4338 if (cpu_history == NULL)
4339 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4340
4341 if (curr_hist >= MAX_HISTORY)
4342 as_bad (_(".machine stack overflow"));
4343 else
4344 cpu_history[curr_hist++] = ppc_cpu;
4345 }
4346 else if (strcmp (cpu_string, "pop") == 0)
4347 {
4348 if (curr_hist <= 0)
4349 as_bad (_(".machine stack underflow"));
4350 else
4351 ppc_cpu = cpu_history[--curr_hist];
4352 }
69fe9ce5
AM		 4353 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4354 ppc_cpu = new_cpu;
69c040df
AM		 4355 else
4356 as_bad (_("invalid machine `%s'"), cpu_string);
4357
4358 if (ppc_cpu != old_cpu)
4359 ppc_setup_opcodes ();
4360 }
4361
4362 demand_empty_rest_of_line ();
0baf16f2
AM		 4363}
4364
4365/* See whether a symbol is in the TOC section. */
4366
4367static int
98027b10 4368ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4369{
4370#ifdef OBJ_XCOFF
96d56e9f 4371 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4372#endif
4373#ifdef OBJ_ELF
4374 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4375 if (ppc_obj64)
0baf16f2
AM		 4376 return strcmp (sname, ".toc") == 0;
4377 else
4378 return strcmp (sname, ".got") == 0;
4379#endif
4380}
4381#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4382\f
4383#ifdef TE_PE
4384
99a814a1 4385/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4386
4387/* Set the current section. */
4388static void
98027b10 4389ppc_set_current_section (segT new)
252b5132
RH		 4390{
4391 ppc_previous_section = ppc_current_section;
4392 ppc_current_section = new;
4393}
4394
4395/* pseudo-op: .previous
4396 behaviour: toggles the current section with the previous section.
4397 errors: None
99a814a1
AM		 4398 warnings: "No previous section" */
4399
252b5132 4400static void
98027b10 4401ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4402{
4403 symbolS *tmp;
4404
81d4177b 4405 if (ppc_previous_section == NULL)
252b5132 4406 {
99a814a1 4407 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4408 return;
4409 }
4410
99a814a1 4411 subseg_set (ppc_previous_section, 0);
252b5132 4412
99a814a1 4413 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4414}
4415
4416/* pseudo-op: .pdata
4417 behaviour: predefined read only data section
b34976b6 4418 double word aligned
252b5132
RH		 4419 errors: None
4420 warnings: None
4421 initial: .section .pdata "adr3"
b34976b6 4422 a - don't know -- maybe a misprint
252b5132
RH		 4423 d - initialized data
4424 r - readable
4425 3 - double word aligned (that would be 4 byte boundary)
4426
4427 commentary:
4428 Tag index tables (also known as the function table) for exception
99a814a1 4429 handling, debugging, etc. */
252b5132 4430
252b5132 4431static void
98027b10 4432ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4433{
81d4177b 4434 if (pdata_section == 0)
252b5132
RH		 4435 {
4436 pdata_section = subseg_new (".pdata", 0);
81d4177b 4437
252b5132
RH		 4438 bfd_set_section_flags (stdoutput, pdata_section,
4439 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4440 | SEC_READONLY | SEC_DATA ));
81d4177b 4441
252b5132
RH		 4442 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4443 }
4444 else
4445 {
99a814a1 4446 pdata_section = subseg_new (".pdata", 0);
252b5132 4447 }
99a814a1 4448 ppc_set_current_section (pdata_section);
252b5132
RH		 4449}
4450
4451/* pseudo-op: .ydata
4452 behaviour: predefined read only data section
b34976b6 4453 double word aligned
252b5132
RH		 4454 errors: None
4455 warnings: None
4456 initial: .section .ydata "drw3"
b34976b6 4457 a - don't know -- maybe a misprint
252b5132
RH		 4458 d - initialized data
4459 r - readable
4460 3 - double word aligned (that would be 4 byte boundary)
4461 commentary:
4462 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4463 debugging, etc. */
4464
252b5132 4465static void
98027b10 4466ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4467{
81d4177b 4468 if (ydata_section == 0)
252b5132
RH		 4469 {
4470 ydata_section = subseg_new (".ydata", 0);
4471 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4472 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4473 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4474
4475 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4476 }
4477 else
4478 {
4479 ydata_section = subseg_new (".ydata", 0);
4480 }
99a814a1 4481 ppc_set_current_section (ydata_section);
252b5132
RH		 4482}
4483
4484/* pseudo-op: .reldata
4485 behaviour: predefined read write data section
b34976b6 4486 double word aligned (4-byte)
252b5132
RH		 4487 FIXME: relocation is applied to it
4488 FIXME: what's the difference between this and .data?
4489 errors: None
4490 warnings: None
4491 initial: .section .reldata "drw3"
4492 d - initialized data
4493 r - readable
4494 w - writeable
4495 3 - double word aligned (that would be 8 byte boundary)
4496
4497 commentary:
4498 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4499 function descriptors, etc. */
4500
252b5132 4501static void
98027b10 4502ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4503{
4504 if (reldata_section == 0)
4505 {
4506 reldata_section = subseg_new (".reldata", 0);
4507
4508 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4509 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4510 | SEC_DATA));
252b5132
RH		 4511
4512 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4513 }
4514 else
4515 {
4516 reldata_section = subseg_new (".reldata", 0);
4517 }
99a814a1 4518 ppc_set_current_section (reldata_section);
252b5132
RH		 4519}
4520
4521/* pseudo-op: .rdata
4522 behaviour: predefined read only data section
b34976b6 4523 double word aligned
252b5132
RH		 4524 errors: None
4525 warnings: None
4526 initial: .section .rdata "dr3"
4527 d - initialized data
4528 r - readable
99a814a1
AM		 4529 3 - double word aligned (that would be 4 byte boundary) */
4530
252b5132 4531static void
98027b10 4532ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4533{
4534 if (rdata_section == 0)
4535 {
4536 rdata_section = subseg_new (".rdata", 0);
4537 bfd_set_section_flags (stdoutput, rdata_section,
4538 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4539 | SEC_READONLY | SEC_DATA ));
4540
4541 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4542 }
4543 else
4544 {
4545 rdata_section = subseg_new (".rdata", 0);
4546 }
99a814a1 4547 ppc_set_current_section (rdata_section);
252b5132
RH		 4548}
4549
4550/* pseudo-op: .ualong
81d4177b 4551 behaviour: much like .int, with the exception that no alignment is
b34976b6 4552 performed.
252b5132
RH		 4553 FIXME: test the alignment statement
4554 errors: None
99a814a1
AM		 4555 warnings: None */
4556
252b5132 4557static void
98027b10 4558ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4559{
99a814a1
AM		 4560 /* Try for long. */
4561 cons (4);
252b5132
RH		 4562}
4563
4564/* pseudo-op: .znop <symbol name>
4565 behaviour: Issue a nop instruction
b34976b6 4566 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4567 the supplied symbol name.
4568 errors: None
99a814a1
AM		 4569 warnings: Missing symbol name */
4570
252b5132 4571static void
98027b10 4572ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4573{
4574 unsigned long insn;
4575 const struct powerpc_opcode *opcode;
4576 expressionS ex;
4577 char *f;
252b5132 4578 symbolS *sym;
252b5132
RH		 4579 char *symbol_name;
4580 char c;
4581 char *name;
4582 unsigned int exp;
4583 flagword flags;
4584 asection *sec;
4585
99a814a1 4586 /* Strip out the symbol name. */
252b5132
RH		 4587 symbol_name = input_line_pointer;
4588 c = get_symbol_end ();
4589
4590 name = xmalloc (input_line_pointer - symbol_name + 1);
4591 strcpy (name, symbol_name);
4592
4593 sym = symbol_find_or_make (name);
4594
4595 *input_line_pointer = c;
4596
4597 SKIP_WHITESPACE ();
4598
4599 /* Look up the opcode in the hash table. */
4600 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4601
99a814a1 4602 /* Stick in the nop. */
252b5132
RH		 4603 insn = opcode->opcode;
4604
4605 /* Write out the instruction. */
4606 f = frag_more (4);
4607 md_number_to_chars (f, insn, 4);
4608 fix_new (frag_now,
4609 f - frag_now->fr_literal,
4610 4,
4611 sym,
4612 0,
4613 0,
4614 BFD_RELOC_16_GOT_PCREL);
4615
4616}
4617
81d4177b
KH		 4618/* pseudo-op:
4619 behaviour:
4620 errors:
99a814a1
AM		 4621 warnings: */
4622
252b5132 4623static void
98027b10 4624ppc_pe_comm (int lcomm)
252b5132 4625{
98027b10
AM		 4626 char *name;
4627 char c;
4628 char *p;
252b5132 4629 offsetT temp;
98027b10 4630 symbolS *symbolP;
252b5132
RH		 4631 offsetT align;
4632
4633 name = input_line_pointer;
4634 c = get_symbol_end ();
4635
99a814a1 4636 /* just after name is now '\0'. */
252b5132
RH		 4637 p = input_line_pointer;
4638 *p = c;
4639 SKIP_WHITESPACE ();
4640 if (*input_line_pointer != ',')
4641 {
4642 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4643 ignore_rest_of_line ();
4644 return;
4645 }
4646
4647 input_line_pointer++; /* skip ',' */
4648 if ((temp = get_absolute_expression ()) < 0)
4649 {
4650 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4651 ignore_rest_of_line ();
4652 return;
4653 }
4654
4655 if (! lcomm)
4656 {
4657 /* The third argument to .comm is the alignment. */
4658 if (*input_line_pointer != ',')
4659 align = 3;
4660 else
4661 {
4662 ++input_line_pointer;
4663 align = get_absolute_expression ();
4664 if (align <= 0)
4665 {
4666 as_warn (_("ignoring bad alignment"));
4667 align = 3;
4668 }
4669 }
4670 }
4671
4672 *p = 0;
4673 symbolP = symbol_find_or_make (name);
4674
4675 *p = c;
4676 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4677 {
4678 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4679 S_GET_NAME (symbolP));
4680 ignore_rest_of_line ();
4681 return;
4682 }
4683
4684 if (S_GET_VALUE (symbolP))
4685 {
4686 if (S_GET_VALUE (symbolP) != (valueT) temp)
4687 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4688 S_GET_NAME (symbolP),
4689 (long) S_GET_VALUE (symbolP),
4690 (long) temp);
4691 }
4692 else
4693 {
4694 S_SET_VALUE (symbolP, (valueT) temp);
4695 S_SET_EXTERNAL (symbolP);
86ebace2 4696 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4697 }
4698
4699 demand_empty_rest_of_line ();
4700}
4701
4702/*
4703 * implement the .section pseudo op:
4704 * .section name {, "flags"}
4705 * ^ ^
4706 * | +--- optional flags: 'b' for bss
4707 * | 'i' for info
4708 * +-- section name 'l' for lib
4709 * 'n' for noload
4710 * 'o' for over
4711 * 'w' for data
4712 * 'd' (apparently m88k for data)
4713 * 'x' for text
4714 * But if the argument is not a quoted string, treat it as a
4715 * subsegment number.
4716 *
4717 * FIXME: this is a copy of the section processing from obj-coff.c, with
4718 * additions/changes for the moto-pas assembler support. There are three
4719 * categories:
4720 *
81d4177b 4721 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4722 * setting bits that bfd probably neither understands or uses. The
4723 * correct approach (?) will have to incorporate extra fields attached
4724 * to the section to hold the system specific stuff. (krk)
4725 *
4726 * Section Contents:
4727 * 'a' - unknown - referred to in documentation, but no definition supplied
4728 * 'c' - section has code
4729 * 'd' - section has initialized data
4730 * 'u' - section has uninitialized data
4731 * 'i' - section contains directives (info)
4732 * 'n' - section can be discarded
4733 * 'R' - remove section at link time
4734 *
4735 * Section Protection:
4736 * 'r' - section is readable
4737 * 'w' - section is writeable
4738 * 'x' - section is executable
4739 * 's' - section is sharable
4740 *
4741 * Section Alignment:
4742 * '0' - align to byte boundary
4743 * '1' - align to halfword undary
4744 * '2' - align to word boundary
4745 * '3' - align to doubleword boundary
4746 * '4' - align to quadword boundary
4747 * '5' - align to 32 byte boundary
4748 * '6' - align to 64 byte boundary
4749 *
4750 */
4751
4752void
98027b10 4753ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4754{
99a814a1 4755 /* Strip out the section name. */
252b5132
RH		 4756 char *section_name;
4757 char c;
4758 char *name;
4759 unsigned int exp;
4760 flagword flags;
4761 segT sec;
4762 int align;
4763
4764 section_name = input_line_pointer;
4765 c = get_symbol_end ();
4766
4767 name = xmalloc (input_line_pointer - section_name + 1);
4768 strcpy (name, section_name);
4769
4770 *input_line_pointer = c;
4771
4772 SKIP_WHITESPACE ();
4773
4774 exp = 0;
4775 flags = SEC_NO_FLAGS;
4776
4777 if (strcmp (name, ".idata$2") == 0)
4778 {
4779 align = 0;
4780 }
4781 else if (strcmp (name, ".idata$3") == 0)
4782 {
4783 align = 0;
4784 }
4785 else if (strcmp (name, ".idata$4") == 0)
4786 {
4787 align = 2;
4788 }
4789 else if (strcmp (name, ".idata$5") == 0)
4790 {
4791 align = 2;
4792 }
4793 else if (strcmp (name, ".idata$6") == 0)
4794 {
4795 align = 1;
4796 }
4797 else
99a814a1
AM		 4798 /* Default alignment to 16 byte boundary. */
4799 align = 4;
252b5132
RH		 4800
4801 if (*input_line_pointer == ',')
4802 {
4803 ++input_line_pointer;
4804 SKIP_WHITESPACE ();
4805 if (*input_line_pointer != '"')
4806 exp = get_absolute_expression ();
4807 else
4808 {
4809 ++input_line_pointer;
4810 while (*input_line_pointer != '"'
4811 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4812 {
4813 switch (*input_line_pointer)
4814 {
4815 /* Section Contents */
4816 case 'a': /* unknown */
4817 as_bad (_("Unsupported section attribute -- 'a'"));
4818 break;
4819 case 'c': /* code section */
81d4177b 4820 flags |= SEC_CODE;
252b5132
RH		 4821 break;
4822 case 'd': /* section has initialized data */
4823 flags |= SEC_DATA;
4824 break;
4825 case 'u': /* section has uninitialized data */
4826 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4827 in winnt.h */
4828 flags |= SEC_ROM;
4829 break;
4830 case 'i': /* section contains directives (info) */
4831 /* FIXME: This is IMAGE_SCN_LNK_INFO
4832 in winnt.h */
4833 flags |= SEC_HAS_CONTENTS;
4834 break;
4835 case 'n': /* section can be discarded */
81d4177b 4836 flags &=~ SEC_LOAD;
252b5132
RH		 4837 break;
4838 case 'R': /* Remove section at link time */
4839 flags |= SEC_NEVER_LOAD;
4840 break;
8d452c78 4841#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4842 /* Section Protection */
4843 case 'r': /* section is readable */
4844 flags |= IMAGE_SCN_MEM_READ;
4845 break;
4846 case 'w': /* section is writeable */
4847 flags |= IMAGE_SCN_MEM_WRITE;
4848 break;
4849 case 'x': /* section is executable */
4850 flags |= IMAGE_SCN_MEM_EXECUTE;
4851 break;
4852 case 's': /* section is sharable */
4853 flags |= IMAGE_SCN_MEM_SHARED;
4854 break;
4855
4856 /* Section Alignment */
4857 case '0': /* align to byte boundary */
4858 flags |= IMAGE_SCN_ALIGN_1BYTES;
4859 align = 0;
4860 break;
4861 case '1': /* align to halfword boundary */
4862 flags |= IMAGE_SCN_ALIGN_2BYTES;
4863 align = 1;
4864 break;
4865 case '2': /* align to word boundary */
4866 flags |= IMAGE_SCN_ALIGN_4BYTES;
4867 align = 2;
4868 break;
4869 case '3': /* align to doubleword boundary */
4870 flags |= IMAGE_SCN_ALIGN_8BYTES;
4871 align = 3;
4872 break;
4873 case '4': /* align to quadword boundary */
4874 flags |= IMAGE_SCN_ALIGN_16BYTES;
4875 align = 4;
4876 break;
4877 case '5': /* align to 32 byte boundary */
4878 flags |= IMAGE_SCN_ALIGN_32BYTES;
4879 align = 5;
4880 break;
4881 case '6': /* align to 64 byte boundary */
4882 flags |= IMAGE_SCN_ALIGN_64BYTES;
4883 align = 6;
4884 break;
8d452c78 4885#endif
252b5132 4886 default:
99a814a1
AM		 4887 as_bad (_("unknown section attribute '%c'"),
4888 *input_line_pointer);
252b5132
RH		 4889 break;
4890 }
4891 ++input_line_pointer;
4892 }
4893 if (*input_line_pointer == '"')
4894 ++input_line_pointer;
4895 }
4896 }
4897
4898 sec = subseg_new (name, (subsegT) exp);
4899
99a814a1 4900 ppc_set_current_section (sec);
252b5132
RH		 4901
4902 if (flags != SEC_NO_FLAGS)
4903 {
4904 if (! bfd_set_section_flags (stdoutput, sec, flags))
4905 as_bad (_("error setting flags for \"%s\": %s"),
4906 bfd_section_name (stdoutput, sec),
4907 bfd_errmsg (bfd_get_error ()));
4908 }
4909
99a814a1 4910 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4911}
4912
4913static void
98027b10 4914ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4915{
4916 char *name;
4917 char endc;
4918 symbolS *ext_sym;
4919
4920 name = input_line_pointer;
4921 endc = get_symbol_end ();
4922
4923 ext_sym = symbol_find_or_make (name);
4924
4925 *input_line_pointer = endc;
4926
4927 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4928 SF_SET_FUNCTION (ext_sym);
4929 SF_SET_PROCESS (ext_sym);
4930 coff_add_linesym (ext_sym);
4931
4932 demand_empty_rest_of_line ();
4933}
4934
4935static void
98027b10 4936ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4937{
4938 if (tocdata_section == 0)
4939 {
4940 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4941 /* FIXME: section flags won't work. */
252b5132
RH		 4942 bfd_set_section_flags (stdoutput, tocdata_section,
4943 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4944 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4945
4946 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4947 }
4948 else
4949 {
4950 rdata_section = subseg_new (".tocd", 0);
4951 }
4952
99a814a1 4953 ppc_set_current_section (tocdata_section);
252b5132
RH		 4954
4955 demand_empty_rest_of_line ();
4956}
4957
4958/* Don't adjust TOC relocs to use the section symbol. */
4959
4960int
98027b10 4961ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4962{
4963 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4964}
4965
4966#endif
4967\f
4968#ifdef OBJ_XCOFF
4969
4970/* XCOFF specific symbol and file handling. */
4971
4972/* Canonicalize the symbol name. We use the to force the suffix, if
4973 any, to use square brackets, and to be in upper case. */
4974
4975char *
98027b10 4976ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4977{
4978 char *s;
4979
4980 if (ppc_stab_symbol)
4981 return name;
4982
4983 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4984 ;
4985 if (*s != '\0')
4986 {
4987 char brac;
4988
4989 if (*s == '[')
4990 brac = ']';
4991 else
4992 {
4993 *s = '[';
4994 brac = '}';
4995 }
4996
4997 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4998 *s = TOUPPER (*s);
252b5132
RH		 4999
5000 if (*s == '\0' || s[1] != '\0')
5001 as_bad (_("bad symbol suffix"));
5002
5003 *s = ']';
5004 }
5005
5006 return name;
5007}
5008
5009/* Set the class of a symbol based on the suffix, if any. This is
5010 called whenever a new symbol is created. */
5011
5012void
98027b10 5013ppc_symbol_new_hook (symbolS *sym)
252b5132 5014{
809ffe0d 5015 struct ppc_tc_sy *tc;
252b5132
RH		 5016 const char *s;
5017
809ffe0d
ILT		 5018 tc = symbol_get_tc (sym);
5019 tc->next = NULL;
5020 tc->output = 0;
96d56e9f 5021 tc->symbol_class = -1;
809ffe0d
ILT		 5022 tc->real_name = NULL;
5023 tc->subseg = 0;
5024 tc->align = 0;
5025 tc->size = NULL;
5026 tc->within = NULL;
252b5132
RH		 5027
5028 if (ppc_stab_symbol)
5029 return;
5030
5031 s = strchr (S_GET_NAME (sym), '[');
5032 if (s == (const char *) NULL)
5033 {
5034 /* There is no suffix. */
5035 return;
5036 }
5037
5038 ++s;
5039
5040 switch (s[0])
5041 {
5042 case 'B':
5043 if (strcmp (s, "BS]") == 0)
96d56e9f 5044 tc->symbol_class = XMC_BS;
252b5132
RH		 5045 break;
5046 case 'D':
5047 if (strcmp (s, "DB]") == 0)
96d56e9f 5048 tc->symbol_class = XMC_DB;
252b5132 5049 else if (strcmp (s, "DS]") == 0)
96d56e9f 5050 tc->symbol_class = XMC_DS;
252b5132
RH		 5051 break;
5052 case 'G':
5053 if (strcmp (s, "GL]") == 0)
96d56e9f 5054 tc->symbol_class = XMC_GL;
252b5132
RH		 5055 break;
5056 case 'P':
5057 if (strcmp (s, "PR]") == 0)
96d56e9f 5058 tc->symbol_class = XMC_PR;
252b5132
RH		 5059 break;
5060 case 'R':
5061 if (strcmp (s, "RO]") == 0)
96d56e9f 5062 tc->symbol_class = XMC_RO;
252b5132 5063 else if (strcmp (s, "RW]") == 0)
96d56e9f 5064 tc->symbol_class = XMC_RW;
252b5132
RH		 5065 break;
5066 case 'S':
5067 if (strcmp (s, "SV]") == 0)
96d56e9f 5068 tc->symbol_class = XMC_SV;
252b5132
RH		 5069 break;
5070 case 'T':
5071 if (strcmp (s, "TC]") == 0)
96d56e9f 5072 tc->symbol_class = XMC_TC;
252b5132 5073 else if (strcmp (s, "TI]") == 0)
96d56e9f 5074 tc->symbol_class = XMC_TI;
252b5132 5075 else if (strcmp (s, "TB]") == 0)
96d56e9f 5076 tc->symbol_class = XMC_TB;
252b5132 5077 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5078 tc->symbol_class = XMC_TC0;
252b5132
RH		 5079 break;
5080 case 'U':
5081 if (strcmp (s, "UA]") == 0)
96d56e9f 5082 tc->symbol_class = XMC_UA;
252b5132 5083 else if (strcmp (s, "UC]") == 0)
96d56e9f 5084 tc->symbol_class = XMC_UC;
252b5132
RH		 5085 break;
5086 case 'X':
5087 if (strcmp (s, "XO]") == 0)
96d56e9f 5088 tc->symbol_class = XMC_XO;
252b5132
RH		 5089 break;
5090 }
5091
96d56e9f 5092 if (tc->symbol_class == -1)
252b5132
RH		 5093 as_bad (_("Unrecognized symbol suffix"));
5094}
5095
5096/* Set the class of a label based on where it is defined. This
5097 handles symbols without suffixes. Also, move the symbol so that it
5098 follows the csect symbol. */
5099
5100void
98027b10 5101ppc_frob_label (symbolS *sym)
252b5132
RH		 5102{
5103 if (ppc_current_csect != (symbolS *) NULL)
5104 {
96d56e9f
NC		 5105 if (symbol_get_tc (sym)->symbol_class == -1)
5106 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5107
5108 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5109 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5110 &symbol_rootP, &symbol_lastP);
5111 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 5112 }
07a53e5c
RH		 5113
5114#ifdef OBJ_ELF
5115 dwarf2_emit_label (sym);
5116#endif
252b5132
RH		 5117}
5118
5119/* This variable is set by ppc_frob_symbol if any absolute symbols are
5120 seen. It tells ppc_adjust_symtab whether it needs to look through
5121 the symbols. */
5122
b34976b6 5123static bfd_boolean ppc_saw_abs;
252b5132
RH		 5124
5125/* Change the name of a symbol just before writing it out. Set the
5126 real name if the .rename pseudo-op was used. Otherwise, remove any
5127 class suffix. Return 1 if the symbol should not be included in the
5128 symbol table. */
5129
5130int
98027b10 5131ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5132{
5133 static symbolS *ppc_last_function;
5134 static symbolS *set_end;
5135
5136 /* Discard symbols that should not be included in the output symbol
5137 table. */
809ffe0d
ILT		 5138 if (! symbol_used_in_reloc_p (sym)
5139 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5140 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5141 && ! symbol_get_tc (sym)->output
252b5132
RH		 5142 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5143 return 1;
5144
a161fe53
AM		 5145 /* This one will disappear anyway. Don't make a csect sym for it. */
5146 if (sym == abs_section_sym)
5147 return 1;
5148
809ffe0d
ILT		 5149 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5150 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5151 else
5152 {
5153 const char *name;
5154 const char *s;
5155
5156 name = S_GET_NAME (sym);
5157 s = strchr (name, '[');
5158 if (s != (char *) NULL)
5159 {
5160 unsigned int len;
5161 char *snew;
5162
5163 len = s - name;
5164 snew = xmalloc (len + 1);
5165 memcpy (snew, name, len);
5166 snew[len] = '\0';
5167
5168 S_SET_NAME (sym, snew);
5169 }
5170 }
5171
5172 if (set_end != (symbolS *) NULL)
5173 {
5174 SA_SET_SYM_ENDNDX (set_end, sym);
5175 set_end = NULL;
5176 }
5177
5178 if (SF_GET_FUNCTION (sym))
5179 {
5180 if (ppc_last_function != (symbolS *) NULL)
5181 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5182 ppc_last_function = sym;
809ffe0d 5183 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5184 {
6386f3a7 5185 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5186 SA_SET_SYM_FSIZE (sym,
5187 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5188 }
5189 }
5190 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5191 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5192 {
5193 if (ppc_last_function == (symbolS *) NULL)
5194 as_bad (_(".ef with no preceding .function"));
5195 else
5196 {
5197 set_end = ppc_last_function;
5198 ppc_last_function = NULL;
5199
5200 /* We don't have a C_EFCN symbol, but we need to force the
5201 COFF backend to believe that it has seen one. */
5202 coff_last_function = NULL;
5203 }
5204 }
5205
670ec21d 5206 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5207 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5208 && S_GET_STORAGE_CLASS (sym) != C_FILE
5209 && S_GET_STORAGE_CLASS (sym) != C_FCN
5210 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5211 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5212 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5213 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5214 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5215 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5216 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5217
5218 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5219 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5220 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5221 {
5222 int i;
5223 union internal_auxent *a;
5224
5225 /* Create a csect aux. */
5226 i = S_GET_NUMBER_AUXILIARY (sym);
5227 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5228 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5229 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5230 {
5231 /* This is the TOC table. */
5232 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5233 a->x_csect.x_scnlen.l = 0;
5234 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5235 }
809ffe0d 5236 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5237 {
5238 /* This is a csect symbol. x_scnlen is the size of the
5239 csect. */
809ffe0d 5240 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5241 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5242 S_GET_SEGMENT (sym))
5243 - S_GET_VALUE (sym));
5244 else
5245 {
6386f3a7 5246 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5247 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5248 - S_GET_VALUE (sym));
5249 }
809ffe0d 5250 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5251 }
5252 else if (S_GET_SEGMENT (sym) == bss_section)
5253 {
5254 /* This is a common symbol. */
809ffe0d
ILT		 5255 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5256 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5257 if (S_IS_EXTERNAL (sym))
96d56e9f 5258 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5259 else
96d56e9f 5260 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5261 }
5262 else if (S_GET_SEGMENT (sym) == absolute_section)
5263 {
5264 /* This is an absolute symbol. The csect will be created by
99a814a1 5265 ppc_adjust_symtab. */
b34976b6 5266 ppc_saw_abs = TRUE;
252b5132 5267 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5268 if (symbol_get_tc (sym)->symbol_class == -1)
5269 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5270 }
5271 else if (! S_IS_DEFINED (sym))
5272 {
5273 /* This is an external symbol. */
5274 a->x_csect.x_scnlen.l = 0;
5275 a->x_csect.x_smtyp = XTY_ER;
5276 }
96d56e9f 5277 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5278 {
5279 symbolS *next;
5280
5281 /* This is a TOC definition. x_scnlen is the size of the
5282 TOC entry. */
5283 next = symbol_next (sym);
96d56e9f 5284 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5285 next = symbol_next (next);
5286 if (next == (symbolS *) NULL
96d56e9f 5287 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5288 {
5289 if (ppc_after_toc_frag == (fragS *) NULL)
5290 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5291 data_section)
5292 - S_GET_VALUE (sym));
5293 else
5294 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5295 - S_GET_VALUE (sym));
5296 }
5297 else
5298 {
6386f3a7 5299 resolve_symbol_value (next);
252b5132
RH		 5300 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5301 - S_GET_VALUE (sym));
5302 }
5303 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5304 }
5305 else
5306 {
5307 symbolS *csect;
5308
5309 /* This is a normal symbol definition. x_scnlen is the
5310 symbol index of the containing csect. */
5311 if (S_GET_SEGMENT (sym) == text_section)
5312 csect = ppc_text_csects;
5313 else if (S_GET_SEGMENT (sym) == data_section)
5314 csect = ppc_data_csects;
5315 else
5316 abort ();
5317
5318 /* Skip the initial dummy symbol. */
809ffe0d 5319 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5320
5321 if (csect == (symbolS *) NULL)
5322 {
5323 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5324 a->x_csect.x_scnlen.l = 0;
5325 }
5326 else
5327 {
809ffe0d 5328 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5329 {
6386f3a7 5330 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5331 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5332 > S_GET_VALUE (sym))
252b5132 5333 break;
809ffe0d 5334 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5335 }
5336
809ffe0d
ILT		 5337 a->x_csect.x_scnlen.p =
5338 coffsymbol (symbol_get_bfdsym (csect))->native;
5339 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5340 1;
252b5132
RH		 5341 }
5342 a->x_csect.x_smtyp = XTY_LD;
5343 }
81d4177b 5344
252b5132
RH		 5345 a->x_csect.x_parmhash = 0;
5346 a->x_csect.x_snhash = 0;
96d56e9f 5347 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5348 a->x_csect.x_smclas = XMC_PR;
5349 else
96d56e9f 5350 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5351 a->x_csect.x_stab = 0;
5352 a->x_csect.x_snstab = 0;
5353
5354 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5355 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5356 }
5357 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5358 {
5359 /* We want the value to be the symbol index of the referenced
5360 csect symbol. BFD will do that for us if we set the right
5361 flags. */
b782de16
AM		 5362 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5363 combined_entry_type *c = coffsymbol (bsym)->native;
5364
5365 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5366 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5367 }
5368 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5369 {
5370 symbolS *block;
5371 symbolS *csect;
5372
5373 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5374 block = symbol_get_tc (sym)->within;
5375 csect = symbol_get_tc (block)->within;
6386f3a7 5376 resolve_symbol_value (csect);
252b5132
RH		 5377 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5378 }
5379 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5380 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5381 {
5382 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5383 BFD will do that for us if we set the right flags. We have
5384 already set the value correctly. */
809ffe0d 5385 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5386 }
5387
5388 return 0;
5389}
5390
5391/* Adjust the symbol table. This creates csect symbols for all
5392 absolute symbols. */
5393
5394void
98027b10 5395ppc_adjust_symtab (void)
252b5132
RH		 5396{
5397 symbolS *sym;
5398
5399 if (! ppc_saw_abs)
5400 return;
5401
5402 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5403 {
5404 symbolS *csect;
5405 int i;
5406 union internal_auxent *a;
5407
5408 if (S_GET_SEGMENT (sym) != absolute_section)
5409 continue;
5410
5411 csect = symbol_create (".abs[XO]", absolute_section,
5412 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5413 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5414 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5415 i = S_GET_NUMBER_AUXILIARY (csect);
5416 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5417 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5418 a->x_csect.x_scnlen.l = 0;
5419 a->x_csect.x_smtyp = XTY_SD;
5420 a->x_csect.x_parmhash = 0;
5421 a->x_csect.x_snhash = 0;
5422 a->x_csect.x_smclas = XMC_XO;
5423 a->x_csect.x_stab = 0;
5424 a->x_csect.x_snstab = 0;
5425
5426 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5427
5428 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5429 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5430 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5431 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5432 }
5433
b34976b6 5434 ppc_saw_abs = FALSE;
252b5132
RH		 5435}
5436
5437/* Set the VMA for a section. This is called on all the sections in
5438 turn. */
5439
5440void
98027b10 5441ppc_frob_section (asection *sec)
252b5132 5442{
931e13a6 5443 static bfd_vma vma = 0;
252b5132 5444
931e13a6 5445 vma = md_section_align (sec, vma);
252b5132
RH		 5446 bfd_set_section_vma (stdoutput, sec, vma);
5447 vma += bfd_section_size (stdoutput, sec);
5448}
5449
5450#endif /* OBJ_XCOFF */
5451\f
252b5132 5452char *
98027b10 5453md_atof (int type, char *litp, int *sizep)
252b5132 5454{
499ac353 5455 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5456}
5457
5458/* Write a value out to the object file, using the appropriate
5459 endianness. */
5460
5461void
98027b10 5462md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5463{
5464 if (target_big_endian)
5465 number_to_chars_bigendian (buf, val, n);
5466 else
5467 number_to_chars_littleendian (buf, val, n);
5468}
5469
5470/* Align a section (I don't know why this is machine dependent). */
5471
5472valueT
3aeeedbb 5473md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5474{
3aeeedbb
AM		 5475#ifdef OBJ_ELF
5476 return addr;
5477#else
252b5132
RH		 5478 int align = bfd_get_section_alignment (stdoutput, seg);
5479
5480 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5481#endif
252b5132
RH		 5482}
5483
5484/* We don't have any form of relaxing. */
5485
5486int
98027b10
AM		 5487md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5488 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5489{
5490 abort ();
5491 return 0;
5492}
5493
5494/* Convert a machine dependent frag. We never generate these. */
5495
5496void
98027b10
AM		 5497md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5498 asection *sec ATTRIBUTE_UNUSED,
5499 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5500{
5501 abort ();
5502}
5503
5504/* We have no need to default values of symbols. */
5505
252b5132 5506symbolS *
98027b10 5507md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5508{
5509 return 0;
5510}
5511\f
5512/* Functions concerning relocs. */
5513
5514/* The location from which a PC relative jump should be calculated,
5515 given a PC relative reloc. */
5516
5517long
98027b10 5518md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5519{
5520 return fixp->fx_frag->fr_address + fixp->fx_where;
5521}
5522
5523#ifdef OBJ_XCOFF
5524
5525/* This is called to see whether a fixup should be adjusted to use a
5526 section symbol. We take the opportunity to change a fixup against
5527 a symbol in the TOC subsegment into a reloc against the
5528 corresponding .tc symbol. */
5529
5530int
98027b10 5531ppc_fix_adjustable (fixS *fix)
252b5132 5532{
b782de16
AM		 5533 valueT val = resolve_symbol_value (fix->fx_addsy);
5534 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5535 TC_SYMFIELD_TYPE *tc;
5536
5537 if (symseg == absolute_section)
5538 return 0;
252b5132 5539
252b5132 5540 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5541 && fix->fx_addsy != ppc_toc_csect
b782de16 5542 && symseg == data_section
252b5132
RH		 5543 && val >= ppc_toc_frag->fr_address
5544 && (ppc_after_toc_frag == (fragS *) NULL
5545 || val < ppc_after_toc_frag->fr_address))
5546 {
5547 symbolS *sy;
5548
5549 for (sy = symbol_next (ppc_toc_csect);
5550 sy != (symbolS *) NULL;
5551 sy = symbol_next (sy))
5552 {
b782de16
AM		 5553 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5554
96d56e9f 5555 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5556 continue;
96d56e9f 5557 if (sy_tc->symbol_class != XMC_TC)
252b5132 5558 break;
b782de16 5559 if (val == resolve_symbol_value (sy))
252b5132
RH		 5560 {
5561 fix->fx_addsy = sy;
5562 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5563 return 0;
5564 }
5565 }
5566
5567 as_bad_where (fix->fx_file, fix->fx_line,
5568 _("symbol in .toc does not match any .tc"));
5569 }
5570
5571 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5572 tc = symbol_get_tc (fix->fx_addsy);
5573 if (tc->subseg == 0
96d56e9f
NC		 5574 && tc->symbol_class != XMC_TC0
5575 && tc->symbol_class != XMC_TC
b782de16 5576 && symseg != bss_section
252b5132 5577 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5578 && (symseg != data_section
252b5132
RH		 5579 || ppc_toc_csect == NULL
5580 || val < ppc_toc_frag->fr_address
5581 || (ppc_after_toc_frag != NULL
5582 && val >= ppc_after_toc_frag->fr_address)))
5583 {
5584 symbolS *csect;
b782de16 5585 symbolS *next_csect;
252b5132 5586
b782de16 5587 if (symseg == text_section)
252b5132 5588 csect = ppc_text_csects;
b782de16 5589 else if (symseg == data_section)
252b5132
RH		 5590 csect = ppc_data_csects;
5591 else
5592 abort ();
5593
5594 /* Skip the initial dummy symbol. */
809ffe0d 5595 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5596
5597 if (csect != (symbolS *) NULL)
5598 {
b782de16
AM		 5599 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5600 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5601 {
5602 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5603 have to look through the full symbol table to see
5604 whether this is the csect we want. Note that we will
5605 only get here if the csect has zero length. */
b782de16
AM		 5606 if (symbol_get_frag (csect)->fr_address == val
5607 && S_GET_VALUE (csect) == val)
252b5132
RH		 5608 {
5609 symbolS *scan;
5610
809ffe0d 5611 for (scan = symbol_next (csect);
252b5132 5612 scan != NULL;
809ffe0d 5613 scan = symbol_next (scan))
252b5132 5614 {
809ffe0d 5615 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5616 break;
5617 if (scan == fix->fx_addsy)
5618 break;
5619 }
5620
5621 /* If we found the symbol before the next csect
99a814a1 5622 symbol, then this is the csect we want. */
252b5132
RH		 5623 if (scan == fix->fx_addsy)
5624 break;
5625 }
5626
b782de16 5627 csect = next_csect;
252b5132
RH		 5628 }
5629
b782de16 5630 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5631 fix->fx_addsy = csect;
5632 }
b782de16 5633 return 0;
252b5132
RH		 5634 }
5635
5636 /* Adjust a reloc against a .lcomm symbol to be against the base
5637 .lcomm. */
b782de16 5638 if (symseg == bss_section
252b5132
RH		 5639 && ! S_IS_EXTERNAL (fix->fx_addsy))
5640 {
b782de16
AM		 5641 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5642
5643 fix->fx_offset += val - resolve_symbol_value (sy);
5644 fix->fx_addsy = sy;
252b5132
RH		 5645 }
5646
5647 return 0;
5648}
5649
5650/* A reloc from one csect to another must be kept. The assembler
5651 will, of course, keep relocs between sections, and it will keep
5652 absolute relocs, but we need to force it to keep PC relative relocs
5653 between two csects in the same section. */
5654
5655int
98027b10 5656ppc_force_relocation (fixS *fix)
252b5132
RH		 5657{
5658 /* At this point fix->fx_addsy should already have been converted to
5659 a csect symbol. If the csect does not include the fragment, then
5660 we need to force the relocation. */
5661 if (fix->fx_pcrel
5662 && fix->fx_addsy != NULL
809ffe0d
ILT		 5663 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5664 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5665 > fix->fx_frag->fr_address)
5666 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5667 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5668 <= fix->fx_frag->fr_address))))
5669 return 1;
5670
ae6063d4 5671 return generic_force_reloc (fix);
252b5132
RH		 5672}
5673
5674#endif /* OBJ_XCOFF */
5675
0baf16f2 5676#ifdef OBJ_ELF
a161fe53
AM		 5677/* If this function returns non-zero, it guarantees that a relocation
5678 will be emitted for a fixup. */
5679
5680int
98027b10 5681ppc_force_relocation (fixS *fix)
a161fe53
AM		 5682{
5683 /* Branch prediction relocations must force a relocation, as must
5684 the vtable description relocs. */
5685 switch (fix->fx_r_type)
5686 {
5687 case BFD_RELOC_PPC_B16_BRTAKEN:
5688 case BFD_RELOC_PPC_B16_BRNTAKEN:
5689 case BFD_RELOC_PPC_BA16_BRTAKEN:
5690 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5691 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5692 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5693 return 1;
5694 default:
5695 break;
5696 }
5697
cdba85ec
AM		 5698 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5699 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5700 return 1;
5701
ae6063d4 5702 return generic_force_reloc (fix);
a161fe53
AM		 5703}
5704
0baf16f2 5705int
98027b10 5706ppc_fix_adjustable (fixS *fix)
252b5132 5707{
0baf16f2
AM		 5708 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5709 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5710 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5711 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5712 && fix->fx_r_type != BFD_RELOC_GPREL16
5713 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5714 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5715 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5716 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5717}
0baf16f2 5718#endif
252b5132 5719
3aeeedbb
AM		 5720/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5721 rs_align_code frag. */
5722
5723void
5724ppc_handle_align (struct frag *fragP)
5725{
5726 valueT count = (fragP->fr_next->fr_address
5727 - (fragP->fr_address + fragP->fr_fix));
5728
5729 if (count != 0 && (count & 3) == 0)
5730 {
5731 char *dest = fragP->fr_literal + fragP->fr_fix;
5732
5733 fragP->fr_var = 4;
5734 md_number_to_chars (dest, 0x60000000, 4);
5735
42240548
PB		 5736 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5737 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 5738 {
42240548
PB		 5739 /* For power6 and power7, we want the last nop to be a group
5740 terminating one. Do this by inserting an rs_fill frag immediately
5741 after this one, with its address set to the last nop location.
5742 This will automatically reduce the number of nops in the current
5743 frag by one. */
3aeeedbb
AM		 5744 if (count > 4)
5745 {
5746 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5747
5748 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5749 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5750 group_nop->fr_fix = 0;
5751 group_nop->fr_offset = 1;
5752 group_nop->fr_type = rs_fill;
5753 fragP->fr_next = group_nop;
5754 dest = group_nop->fr_literal;
5755 }
5756
42240548
PB		 5757 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
5758 /* power7 group terminating nop: "ori 2,2,0". */
5759 md_number_to_chars (dest, 0x60420000, 4);
5760 else
5761 /* power6 group terminating nop: "ori 1,1,0". */
5762 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 5763 }
5764 }
5765}
5766
252b5132
RH		 5767/* Apply a fixup to the object code. This is called for all the
5768 fixups we generated by the call to fix_new_exp, above. In the call
5769 above we used a reloc code which was the largest legal reloc code
5770 plus the operand index. Here we undo that to recover the operand
5771 index. At this point all symbol values should be fully resolved,
5772 and we attempt to completely resolve the reloc. If we can not do
5773 that, we determine the correct reloc code and put it back in the
5774 fixup. */
5775
94f592af 5776void
98027b10 5777md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5778{
94f592af 5779 valueT value = * valP;
252b5132
RH		 5780
5781#ifdef OBJ_ELF
94f592af 5782 if (fixP->fx_addsy != NULL)
252b5132 5783 {
a161fe53 5784 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5785 if (fixP->fx_pcrel)
5786 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5787 }
5788 else
94f592af 5789 fixP->fx_done = 1;
252b5132 5790#else
a161fe53 5791 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5792 the symbol values. If we are doing this relocation the code in
5793 write.c is going to call bfd_install_relocation, which is also
5794 going to use the symbol value. That means that if the reloc is
5795 fully resolved we want to use *valP since bfd_install_relocation is
5796 not being used.
9f0eb232
RS		 5797 However, if the reloc is not fully resolved we do not want to
5798 use *valP, and must use fx_offset instead. If the relocation
5799 is PC-relative, we then need to re-apply md_pcrel_from_section
5800 to this new relocation value. */
94f592af
NC		 5801 if (fixP->fx_addsy == (symbolS *) NULL)
5802 fixP->fx_done = 1;
5803
252b5132 5804 else
9f0eb232
RS		 5805 {
5806 value = fixP->fx_offset;
5807 if (fixP->fx_pcrel)
5808 value -= md_pcrel_from_section (fixP, seg);
5809 }
a161fe53
AM		 5810#endif
5811
5812 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5813 {
a161fe53
AM		 5814 /* We can't actually support subtracting a symbol. */
5815 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5816 }
252b5132 5817
94f592af 5818 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5819 {
5820 int opindex;
5821 const struct powerpc_operand *operand;
5822 char *where;
5823 unsigned long insn;
5824
94f592af 5825 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5826
5827 operand = &powerpc_operands[opindex];
5828
5829#ifdef OBJ_XCOFF
0baf16f2
AM		 5830 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5831 does not generate a reloc. It uses the offset of `sym' within its
5832 csect. Other usages, such as `.long sym', generate relocs. This
5833 is the documented behaviour of non-TOC symbols. */
252b5132 5834 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5835 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5836 && operand->shift == 0
2b3c4602 5837 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5838 && fixP->fx_addsy != NULL
5839 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 5840 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
5841 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 5842 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5843 {
94f592af
NC		 5844 value = fixP->fx_offset;
5845 fixP->fx_done = 1;
252b5132
RH		 5846 }
5847#endif
5848
5849 /* Fetch the instruction, insert the fully resolved operand
5850 value, and stuff the instruction back again. */
94f592af 5851 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5852 if (target_big_endian)
5853 insn = bfd_getb32 ((unsigned char *) where);
5854 else
5855 insn = bfd_getl32 ((unsigned char *) where);
5856 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5857 fixP->tc_fix_data.ppc_cpu,
94f592af 5858 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5859 if (target_big_endian)
5860 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5861 else
5862 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5863
94f592af
NC		 5864 if (fixP->fx_done)
5865 /* Nothing else to do here. */
5866 return;
252b5132 5867
9c2799c2 5868 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 5869
252b5132
RH		 5870 /* Determine a BFD reloc value based on the operand information.
5871 We are only prepared to turn a few of the operands into
0baf16f2 5872 relocs. */
11b37b7b 5873 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5874 && operand->bitm == 0x3fffffc
11b37b7b 5875 && operand->shift == 0)
94f592af 5876 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5877 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5878 && operand->bitm == 0xfffc
11b37b7b 5879 && operand->shift == 0)
95210096
AM		 5880 {
5881 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5882#ifdef OBJ_XCOFF
5883 fixP->fx_size = 2;
5884 if (target_big_endian)
5885 fixP->fx_where += 2;
5886#endif
5887 }
11b37b7b 5888 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5889 && operand->bitm == 0x3fffffc
11b37b7b 5890 && operand->shift == 0)
94f592af 5891 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5892 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5893 && operand->bitm == 0xfffc
11b37b7b 5894 && operand->shift == 0)
95210096
AM		 5895 {
5896 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5897#ifdef OBJ_XCOFF
5898 fixP->fx_size = 2;
5899 if (target_big_endian)
5900 fixP->fx_where += 2;
5901#endif
5902 }
0baf16f2 5903#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5904 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5905 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5906 && operand->shift == 0)
11b37b7b 5907 {
a7fc733f
AM		 5908 if (ppc_is_toc_sym (fixP->fx_addsy))
5909 {
5910 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5911#ifdef OBJ_ELF
a7fc733f
AM		 5912 if (ppc_obj64
5913 && (operand->flags & PPC_OPERAND_DS) != 0)
5914 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5915#endif
5916 }
5917 else
5918 {
5919 fixP->fx_r_type = BFD_RELOC_16;
5920#ifdef OBJ_ELF
5921 if (ppc_obj64
5922 && (operand->flags & PPC_OPERAND_DS) != 0)
5923 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5924#endif
a7fc733f 5925 }
94f592af 5926 fixP->fx_size = 2;
11b37b7b 5927 if (target_big_endian)
94f592af 5928 fixP->fx_where += 2;
11b37b7b 5929 }
0baf16f2 5930#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5931 else
252b5132
RH		 5932 {
5933 char *sfile;
5934 unsigned int sline;
5935
5936 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5937 symbol. */
94f592af
NC		 5938 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5939 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5940 _("unresolved expression that must be resolved"));
5941 else
94f592af 5942 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5943 _("unsupported relocation against %s"),
94f592af
NC		 5944 S_GET_NAME (fixP->fx_addsy));
5945 fixP->fx_done = 1;
5946 return;
252b5132
RH		 5947 }
5948 }
5949 else
5950 {
5951#ifdef OBJ_ELF
94f592af 5952 ppc_elf_validate_fix (fixP, seg);
252b5132 5953#endif
94f592af 5954 switch (fixP->fx_r_type)
252b5132 5955 {
252b5132 5956 case BFD_RELOC_CTOR:
2b3c4602 5957 if (ppc_obj64)
9c7977b3
AM		 5958 goto ctor64;
5959 /* fall through */
5960
0baf16f2 5961 case BFD_RELOC_32:
94f592af
NC		 5962 if (fixP->fx_pcrel)
5963 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5964 /* fall through */
252b5132
RH		 5965
5966 case BFD_RELOC_RVA:
5967 case BFD_RELOC_32_PCREL:
252b5132 5968 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5969 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5970 value, 4);
5971 break;
5972
7f6d05e8 5973 case BFD_RELOC_64:
9c7977b3 5974 ctor64:
94f592af
NC		 5975 if (fixP->fx_pcrel)
5976 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5977 /* fall through */
0baf16f2 5978
7f6d05e8 5979 case BFD_RELOC_64_PCREL:
94f592af 5980 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5981 value, 8);
81d4177b 5982 break;
0baf16f2 5983
252b5132
RH		 5984 case BFD_RELOC_GPREL16:
5985 case BFD_RELOC_16_GOT_PCREL:
5986 case BFD_RELOC_16_GOTOFF:
5987 case BFD_RELOC_LO16_GOTOFF:
5988 case BFD_RELOC_HI16_GOTOFF:
5989 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5990 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5991 case BFD_RELOC_LO16_BASEREL:
5992 case BFD_RELOC_HI16_BASEREL:
5993 case BFD_RELOC_HI16_S_BASEREL:
5994 case BFD_RELOC_PPC_EMB_NADDR16:
5995 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5996 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5997 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5998 case BFD_RELOC_PPC_EMB_SDAI16:
5999 case BFD_RELOC_PPC_EMB_SDA2REL:
6000 case BFD_RELOC_PPC_EMB_SDA2I16:
6001 case BFD_RELOC_PPC_EMB_RELSEC16:
6002 case BFD_RELOC_PPC_EMB_RELST_LO:
6003 case BFD_RELOC_PPC_EMB_RELST_HI:
6004 case BFD_RELOC_PPC_EMB_RELST_HA:
6005 case BFD_RELOC_PPC_EMB_RELSDA:
6006 case BFD_RELOC_PPC_TOC16:
0baf16f2 6007#ifdef OBJ_ELF
0baf16f2
AM		 6008 case BFD_RELOC_PPC64_TOC16_LO:
6009 case BFD_RELOC_PPC64_TOC16_HI:
6010 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 6011#endif
94f592af 6012 if (fixP->fx_pcrel)
252b5132 6013 {
94f592af
NC		 6014 if (fixP->fx_addsy != NULL)
6015 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6016 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 6017 bfd_get_reloc_code_name (fixP->fx_r_type),
6018 S_GET_NAME (fixP->fx_addsy));
252b5132 6019 else
94f592af 6020 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6021 _("cannot emit PC relative %s relocation"),
94f592af 6022 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 6023 }
6024
94f592af 6025 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6026 value, 2);
6027 break;
6028
3c9d25f4
AM		 6029 case BFD_RELOC_16:
6030 if (fixP->fx_pcrel)
6031 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6032 /* fall through */
6033
6034 case BFD_RELOC_16_PCREL:
6035 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6036 value, 2);
6037 break;
6038
6039 case BFD_RELOC_LO16:
6040 if (fixP->fx_pcrel)
6041 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6042 /* fall through */
6043
6044 case BFD_RELOC_LO16_PCREL:
6045 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6046 value, 2);
6047 break;
6048
252b5132
RH		 6049 /* This case happens when you write, for example,
6050 lis %r3,(L1-L2)@ha
6051 where L1 and L2 are defined later. */
6052 case BFD_RELOC_HI16:
94f592af 6053 if (fixP->fx_pcrel)
3c9d25f4
AM		 6054 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6055 /* fall through */
6056
6057 case BFD_RELOC_HI16_PCREL:
94f592af 6058 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6059 PPC_HI (value), 2);
252b5132 6060 break;
0baf16f2 6061
252b5132 6062 case BFD_RELOC_HI16_S:
94f592af 6063 if (fixP->fx_pcrel)
3c9d25f4
AM		 6064 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6065 /* fall through */
6066
6067 case BFD_RELOC_HI16_S_PCREL:
94f592af 6068 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6069 PPC_HA (value), 2);
6070 break;
6071
c865e45b
RS		 6072#ifdef OBJ_XCOFF
6073 case BFD_RELOC_NONE:
6074 break;
6075#endif
6076
0baf16f2 6077#ifdef OBJ_ELF
0baf16f2 6078 case BFD_RELOC_PPC64_HIGHER:
94f592af 6079 if (fixP->fx_pcrel)
0baf16f2 6080 abort ();
94f592af 6081 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6082 PPC_HIGHER (value), 2);
252b5132
RH		 6083 break;
6084
0baf16f2 6085 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6086 if (fixP->fx_pcrel)
0baf16f2 6087 abort ();
94f592af 6088 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6089 PPC_HIGHERA (value), 2);
6090 break;
6091
6092 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6093 if (fixP->fx_pcrel)
0baf16f2 6094 abort ();
94f592af 6095 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6096 PPC_HIGHEST (value), 2);
6097 break;
6098
6099 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6100 if (fixP->fx_pcrel)
0baf16f2 6101 abort ();
94f592af 6102 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6103 PPC_HIGHESTA (value), 2);
6104 break;
6105
6106 case BFD_RELOC_PPC64_ADDR16_DS:
6107 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6108 case BFD_RELOC_PPC64_GOT16_DS:
6109 case BFD_RELOC_PPC64_GOT16_LO_DS:
6110 case BFD_RELOC_PPC64_PLT16_LO_DS:
6111 case BFD_RELOC_PPC64_SECTOFF_DS:
6112 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6113 case BFD_RELOC_PPC64_TOC16_DS:
6114 case BFD_RELOC_PPC64_TOC16_LO_DS:
6115 case BFD_RELOC_PPC64_PLTGOT16_DS:
6116 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6117 if (fixP->fx_pcrel)
0baf16f2
AM		 6118 abort ();
6119 {
2132e3a3 6120 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6121 unsigned long val, mask;
0baf16f2
AM		 6122
6123 if (target_big_endian)
adadcc0c 6124 val = bfd_getb32 (where - 2);
0baf16f2 6125 else
adadcc0c
AM		 6126 val = bfd_getl32 (where);
6127 mask = 0xfffc;
6128 /* lq insns reserve the four lsbs. */
6129 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6130 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6131 mask = 0xfff0;
6132 val |= value & mask;
0baf16f2
AM		 6133 if (target_big_endian)
6134 bfd_putb16 ((bfd_vma) val, where);
6135 else
6136 bfd_putl16 ((bfd_vma) val, where);
6137 }
6138 break;
cdba85ec 6139
ba0b2174
AM		 6140 case BFD_RELOC_PPC_B16_BRTAKEN:
6141 case BFD_RELOC_PPC_B16_BRNTAKEN:
6142 case BFD_RELOC_PPC_BA16_BRTAKEN:
6143 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6144 break;
6145
cdba85ec 6146 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6147 case BFD_RELOC_PPC_TLSGD:
6148 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6149 break;
6150
cdba85ec
AM		 6151 case BFD_RELOC_PPC_DTPMOD:
6152 case BFD_RELOC_PPC_TPREL16:
6153 case BFD_RELOC_PPC_TPREL16_LO:
6154 case BFD_RELOC_PPC_TPREL16_HI:
6155 case BFD_RELOC_PPC_TPREL16_HA:
6156 case BFD_RELOC_PPC_TPREL:
6157 case BFD_RELOC_PPC_DTPREL16:
6158 case BFD_RELOC_PPC_DTPREL16_LO:
6159 case BFD_RELOC_PPC_DTPREL16_HI:
6160 case BFD_RELOC_PPC_DTPREL16_HA:
6161 case BFD_RELOC_PPC_DTPREL:
6162 case BFD_RELOC_PPC_GOT_TLSGD16:
6163 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6164 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6165 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6166 case BFD_RELOC_PPC_GOT_TLSLD16:
6167 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6168 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6169 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6170 case BFD_RELOC_PPC_GOT_TPREL16:
6171 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6172 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6173 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6174 case BFD_RELOC_PPC_GOT_DTPREL16:
6175 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6176 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6177 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6178 case BFD_RELOC_PPC64_TPREL16_DS:
6179 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6180 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6181 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6182 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6183 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6184 case BFD_RELOC_PPC64_DTPREL16_DS:
6185 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6186 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6187 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6188 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6189 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6190 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6191 break;
0baf16f2 6192#endif
252b5132 6193 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6194 bytes, rather than 2, so offset it here appropriately. */
252b5132 6195 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6196 if (fixP->fx_pcrel)
252b5132
RH		 6197 abort ();
6198
94f592af 6199 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6200 + ((target_big_endian) ? 2 : 0),
6201 value, 2);
6202 break;
6203
6204 case BFD_RELOC_8:
94f592af 6205 if (fixP->fx_pcrel)
31a91399
NC		 6206 {
6207 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6208 ".byte <undefined_symbol> - ." */
31a91399
NC		 6209 if (fixP->fx_addsy)
6210 as_bad (_("Unable to handle reference to symbol %s"),
6211 S_GET_NAME (fixP->fx_addsy));
6212 else
6213 as_bad (_("Unable to resolve expression"));
6214 fixP->fx_done = 1;
6215 }
6216 else
6217 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6218 value, 1);
252b5132
RH		 6219 break;
6220
6221 case BFD_RELOC_24_PLT_PCREL:
6222 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6223 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6224 abort ();
6225
94f592af 6226 if (fixP->fx_done)
99a814a1
AM		 6227 {
6228 char *where;
6229 unsigned long insn;
6230
6231 /* Fetch the instruction, insert the fully resolved operand
6232 value, and stuff the instruction back again. */
94f592af 6233 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6234 if (target_big_endian)
6235 insn = bfd_getb32 ((unsigned char *) where);
6236 else
6237 insn = bfd_getl32 ((unsigned char *) where);
6238 if ((value & 3) != 0)
94f592af 6239 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6240 _("must branch to an address a multiple of 4"));
6241 if ((offsetT) value < -0x40000000
6242 || (offsetT) value >= 0x40000000)
94f592af 6243 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6244 _("@local or @plt branch destination is too far away, %ld bytes"),
6245 (long) value);
6246 insn = insn | (value & 0x03fffffc);
6247 if (target_big_endian)
6248 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6249 else
6250 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6251 }
252b5132
RH		 6252 break;
6253
6254 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6255 fixP->fx_done = 0;
6256 if (fixP->fx_addsy
6257 && !S_IS_DEFINED (fixP->fx_addsy)
6258 && !S_IS_WEAK (fixP->fx_addsy))
6259 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6260 break;
6261
6262 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6263 fixP->fx_done = 0;
252b5132
RH		 6264 break;
6265
0baf16f2 6266#ifdef OBJ_ELF
0baf16f2
AM		 6267 /* Generated by reference to `sym@tocbase'. The sym is
6268 ignored by the linker. */
6269 case BFD_RELOC_PPC64_TOC:
94f592af 6270 fixP->fx_done = 0;
0baf16f2 6271 break;
0baf16f2 6272#endif
252b5132 6273 default:
bc805888 6274 fprintf (stderr,
94f592af 6275 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6276 fflush (stderr);
252b5132
RH		 6277 abort ();
6278 }
6279 }
6280
6281#ifdef OBJ_ELF
94f592af 6282 fixP->fx_addnumber = value;
4e6935a6
AM		 6283
6284 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6285 from the section contents. If we are going to be emitting a reloc
6286 then the section contents are immaterial, so don't warn if they
6287 happen to overflow. Leave such warnings to ld. */
6288 if (!fixP->fx_done)
6289 fixP->fx_no_overflow = 1;
252b5132 6290#else
94f592af
NC		 6291 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6292 fixP->fx_addnumber = 0;
252b5132
RH		 6293 else
6294 {
6295#ifdef TE_PE
94f592af 6296 fixP->fx_addnumber = 0;
252b5132 6297#else
8edcbfcd
TG		 6298 /* We want to use the offset within the toc, not the actual VMA
6299 of the symbol. */
94f592af 6300 fixP->fx_addnumber =
8edcbfcd
TG		 6301 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6302 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6303#endif
6304 }
6305#endif
252b5132
RH		 6306}
6307
6308/* Generate a reloc for a fixup. */
6309
6310arelent *
98027b10 6311tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6312{
6313 arelent *reloc;
6314
6315 reloc = (arelent *) xmalloc (sizeof (arelent));
6316
49309057
ILT		 6317 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6318 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6319 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6320 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6321 if (reloc->howto == (reloc_howto_type *) NULL)
6322 {
6323 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6324 _("reloc %d not supported by object file format"),
6325 (int) fixp->fx_r_type);
252b5132
RH		 6326 return NULL;
6327 }
6328 reloc->addend = fixp->fx_addnumber;
6329
6330 return reloc;
6331}
75e21f08
JJ		 6332
6333void
98027b10 6334ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6335{
6336 cfi_add_CFA_def_cfa (1, 0);
6337}
6338
6339int
1df69f4f 6340tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6341{
6342 unsigned int regnum = -1;
6343 unsigned int i;
6344 const char *p;
6345 char *q;
6346 static struct { char *name; int dw2regnum; } regnames[] =
6347 {
6348 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6349 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6350 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6351 { "spe_acc", 111 }, { "spefscr", 112 }
6352 };
6353
6354 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6355 if (strcmp (regnames[i].name, regname) == 0)
6356 return regnames[i].dw2regnum;
6357
6358 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6359 {
6360 p = regname + 1 + (regname[1] == '.');
6361 regnum = strtoul (p, &q, 10);
6362 if (p == q || *q || regnum >= 32)
6363 return -1;
6364 if (regname[0] == 'f')
b7d7dc63 6365 regnum += 32;
75e21f08 6366 else if (regname[0] == 'v')
b7d7dc63 6367 regnum += 77;
75e21f08
JJ		 6368 }
6369 else if (regname[0] == 'c' && regname[1] == 'r')
6370 {
6371 p = regname + 2 + (regname[2] == '.');
6372 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6373 return -1;
75e21f08
JJ		 6374 regnum = p[0] - '0' + 68;
6375 }
6376 return regnum;
6377}
GDB Binutils - Deliverables
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