Commit | Line | Data |
---|---|---|
ef230218 | 1 | /* tc-sh.c -- Assemble code for the Renesas / SuperH SH |
ae6063d4 | 2 | Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 |
f7e42eb4 | 3 | Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
6b31947e | 22 | /* Written By Steve Chamberlain <sac@cygnus.com> */ |
252b5132 RH |
23 | |
24 | #include <stdio.h> | |
25 | #include "as.h" | |
26 | #include "bfd.h" | |
27 | #include "subsegs.h" | |
28 | #define DEFINE_TABLE | |
29 | #include "opcodes/sh-opc.h" | |
3882b010 | 30 | #include "safe-ctype.h" |
43841e91 | 31 | #include "struc-symbol.h" |
d4845d57 JR |
32 | |
33 | #ifdef OBJ_ELF | |
34 | #include "elf/sh.h" | |
35 | #endif | |
36 | ||
0d10e182 | 37 | #include "dwarf2dbg.h" |
0d10e182 | 38 | |
e08ae979 HPN |
39 | typedef struct |
40 | { | |
41 | sh_arg_type type; | |
42 | int reg; | |
43 | expressionS immediate; | |
44 | } | |
45 | sh_operand_info; | |
46 | ||
252b5132 RH |
47 | const char comment_chars[] = "!"; |
48 | const char line_separator_chars[] = ";"; | |
49 | const char line_comment_chars[] = "!#"; | |
50 | ||
8edc77b9 KK |
51 | static void s_uses (int); |
52 | static void s_uacons (int); | |
252b5132 | 53 | |
a1cc9221 | 54 | #ifdef OBJ_ELF |
8edc77b9 | 55 | static void sh_elf_cons (int); |
538cd60f | 56 | |
a1cc9221 AO |
57 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ |
58 | #endif | |
59 | ||
05982cac | 60 | static void |
8edc77b9 | 61 | big (int ignore ATTRIBUTE_UNUSED) |
05982cac HPN |
62 | { |
63 | if (! target_big_endian) | |
64 | as_bad (_("directive .big encountered when option -big required")); | |
65 | ||
66 | /* Stop further messages. */ | |
67 | target_big_endian = 1; | |
68 | } | |
252b5132 RH |
69 | |
70 | static void | |
8edc77b9 | 71 | little (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 72 | { |
05982cac HPN |
73 | if (target_big_endian) |
74 | as_bad (_("directive .little encountered when option -little required")); | |
75 | ||
76 | /* Stop further messages. */ | |
252b5132 RH |
77 | target_big_endian = 0; |
78 | } | |
79 | ||
d4845d57 JR |
80 | /* This table describes all the machine specific pseudo-ops the assembler |
81 | has to support. The fields are: | |
82 | pseudo-op name without dot | |
83 | function to call to execute this pseudo-op | |
6b31947e | 84 | Integer arg to pass to the function. */ |
d4845d57 | 85 | |
252b5132 RH |
86 | const pseudo_typeS md_pseudo_table[] = |
87 | { | |
a1cc9221 AO |
88 | #ifdef OBJ_ELF |
89 | {"long", sh_elf_cons, 4}, | |
90 | {"int", sh_elf_cons, 4}, | |
91 | {"word", sh_elf_cons, 2}, | |
92 | {"short", sh_elf_cons, 2}, | |
93 | #else | |
252b5132 RH |
94 | {"int", cons, 4}, |
95 | {"word", cons, 2}, | |
a1cc9221 | 96 | #endif /* OBJ_ELF */ |
05982cac | 97 | {"big", big, 0}, |
252b5132 RH |
98 | {"form", listing_psize, 0}, |
99 | {"little", little, 0}, | |
100 | {"heading", listing_title, 0}, | |
101 | {"import", s_ignore, 0}, | |
102 | {"page", listing_eject, 0}, | |
103 | {"program", s_ignore, 0}, | |
104 | {"uses", s_uses, 0}, | |
105 | {"uaword", s_uacons, 2}, | |
106 | {"ualong", s_uacons, 4}, | |
de68de20 AO |
107 | {"uaquad", s_uacons, 8}, |
108 | {"2byte", s_uacons, 2}, | |
109 | {"4byte", s_uacons, 4}, | |
110 | {"8byte", s_uacons, 8}, | |
324bfcf3 AO |
111 | #ifdef HAVE_SH64 |
112 | {"mode", s_sh64_mode, 0 }, | |
113 | ||
114 | /* Have the old name too. */ | |
115 | {"isa", s_sh64_mode, 0 }, | |
116 | ||
117 | /* Assert that the right ABI is used. */ | |
118 | {"abi", s_sh64_abi, 0 }, | |
119 | ||
120 | { "vtable_inherit", sh64_vtable_inherit, 0 }, | |
121 | { "vtable_entry", sh64_vtable_entry, 0 }, | |
122 | #endif /* HAVE_SH64 */ | |
252b5132 RH |
123 | {0, 0, 0} |
124 | }; | |
125 | ||
126 | /*int md_reloc_size; */ | |
127 | ||
128 | int sh_relax; /* set if -relax seen */ | |
129 | ||
130 | /* Whether -small was seen. */ | |
131 | ||
132 | int sh_small; | |
133 | ||
bdfaef52 | 134 | /* preset architecture set, if given; zero otherwise. */ |
d4845d57 | 135 | |
bdfaef52 | 136 | static int preset_target_arch; |
d4845d57 JR |
137 | |
138 | /* The bit mask of architectures that could | |
67c1ffbe | 139 | accommodate the insns seen so far. */ |
d4845d57 JR |
140 | static int valid_arch; |
141 | ||
252b5132 RH |
142 | const char EXP_CHARS[] = "eE"; |
143 | ||
6b31947e | 144 | /* Chars that mean this number is a floating point constant. */ |
252b5132 RH |
145 | /* As in 0f12.456 */ |
146 | /* or 0d1.2345e12 */ | |
147 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
148 | ||
149 | #define C(a,b) ENCODE_RELAX(a,b) | |
150 | ||
252b5132 RH |
151 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) |
152 | #define GET_WHAT(x) ((x>>4)) | |
153 | ||
67c1ffbe | 154 | /* These are the three types of relaxable instruction. */ |
324bfcf3 AO |
155 | /* These are the types of relaxable instructions; except for END which is |
156 | a marker. */ | |
252b5132 RH |
157 | #define COND_JUMP 1 |
158 | #define COND_JUMP_DELAY 2 | |
159 | #define UNCOND_JUMP 3 | |
324bfcf3 AO |
160 | |
161 | #ifdef HAVE_SH64 | |
162 | ||
163 | /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */ | |
164 | #define SH64PCREL16_32 4 | |
165 | /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */ | |
166 | #define SH64PCREL16_64 5 | |
167 | ||
168 | /* Variants of the above for adjusting the insn to PTA or PTB according to | |
169 | the label. */ | |
170 | #define SH64PCREL16PT_32 6 | |
171 | #define SH64PCREL16PT_64 7 | |
172 | ||
173 | /* A MOVI expansion, expanding to at most 32 or 64 bits. */ | |
174 | #define MOVI_IMM_32 8 | |
175 | #define MOVI_IMM_32_PCREL 9 | |
176 | #define MOVI_IMM_64 10 | |
177 | #define MOVI_IMM_64_PCREL 11 | |
178 | #define END 12 | |
179 | ||
180 | #else /* HAVE_SH64 */ | |
181 | ||
252b5132 RH |
182 | #define END 4 |
183 | ||
324bfcf3 AO |
184 | #endif /* HAVE_SH64 */ |
185 | ||
252b5132 RH |
186 | #define UNDEF_DISP 0 |
187 | #define COND8 1 | |
188 | #define COND12 2 | |
189 | #define COND32 3 | |
252b5132 RH |
190 | #define UNDEF_WORD_DISP 4 |
191 | ||
192 | #define UNCOND12 1 | |
193 | #define UNCOND32 2 | |
194 | ||
324bfcf3 AO |
195 | #ifdef HAVE_SH64 |
196 | #define UNDEF_SH64PCREL 0 | |
197 | #define SH64PCREL16 1 | |
198 | #define SH64PCREL32 2 | |
199 | #define SH64PCREL48 3 | |
200 | #define SH64PCREL64 4 | |
201 | #define SH64PCRELPLT 5 | |
202 | ||
203 | #define UNDEF_MOVI 0 | |
204 | #define MOVI_16 1 | |
205 | #define MOVI_32 2 | |
206 | #define MOVI_48 3 | |
207 | #define MOVI_64 4 | |
208 | #define MOVI_PLT 5 | |
209 | #define MOVI_GOTOFF 6 | |
210 | #define MOVI_GOTPC 7 | |
211 | #endif /* HAVE_SH64 */ | |
212 | ||
252b5132 RH |
213 | /* Branch displacements are from the address of the branch plus |
214 | four, thus all minimum and maximum values have 4 added to them. */ | |
215 | #define COND8_F 258 | |
216 | #define COND8_M -252 | |
217 | #define COND8_LENGTH 2 | |
218 | ||
219 | /* There is one extra instruction before the branch, so we must add | |
220 | two more bytes to account for it. */ | |
221 | #define COND12_F 4100 | |
222 | #define COND12_M -4090 | |
223 | #define COND12_LENGTH 6 | |
224 | ||
225 | #define COND12_DELAY_LENGTH 4 | |
226 | ||
227 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
228 | since this relocation type is not supported yet. */ | |
229 | #define COND32_F (1<<30) | |
230 | #define COND32_M -(1<<30) | |
231 | #define COND32_LENGTH 14 | |
232 | ||
233 | #define UNCOND12_F 4098 | |
234 | #define UNCOND12_M -4092 | |
235 | #define UNCOND12_LENGTH 2 | |
236 | ||
237 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
238 | since this relocation type is not supported yet. */ | |
239 | #define UNCOND32_F (1<<30) | |
240 | #define UNCOND32_M -(1<<30) | |
241 | #define UNCOND32_LENGTH 14 | |
242 | ||
324bfcf3 AO |
243 | #ifdef HAVE_SH64 |
244 | /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label, | |
245 | TRd" as is the current insn, so no extra length. Note that the "reach" | |
246 | is calculated from the address *after* that insn, but the offset in the | |
247 | insn is calculated from the beginning of the insn. We also need to | |
248 | take into account the implicit 1 coded as the "A" in PTA when counting | |
249 | forward. If PTB reaches an odd address, we trap that as an error | |
250 | elsewhere, so we don't have to have different relaxation entries. We | |
251 | don't add a one to the negative range, since PTB would then have the | |
252 | farthest backward-reaching value skipped, not generated at relaxation. */ | |
253 | #define SH64PCREL16_F (32767 * 4 - 4 + 1) | |
254 | #define SH64PCREL16_M (-32768 * 4 - 4) | |
255 | #define SH64PCREL16_LENGTH 0 | |
256 | ||
257 | /* The next step is to change that PT insn into | |
258 | MOVI ((label - datalabel Ln) >> 16) & 65535, R25 | |
259 | SHORI (label - datalabel Ln) & 65535, R25 | |
260 | Ln: | |
261 | PTREL R25,TRd | |
262 | which means two extra insns, 8 extra bytes. This is the limit for the | |
263 | 32-bit ABI. | |
264 | ||
265 | The expressions look a bit bad since we have to adjust this to avoid overflow on a | |
266 | 32-bit host. */ | |
267 | #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) | |
268 | #define SH64PCREL32_LENGTH (2 * 4) | |
269 | ||
270 | /* Similarly, we just change the MOVI and add a SHORI for the 48-bit | |
271 | expansion. */ | |
272 | #if BFD_HOST_64BIT_LONG | |
273 | /* The "reach" type is long, so we can only do this for a 64-bit-long | |
274 | host. */ | |
275 | #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4) | |
276 | #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4) | |
277 | #define SH64PCREL48_M (((long) -1 << 47) - 4) | |
278 | #define SH64PCREL48_LENGTH (3 * 4) | |
279 | #else | |
280 | /* If the host does not have 64-bit longs, just make this state identical | |
281 | in reach to the 32-bit state. Note that we have a slightly incorrect | |
282 | reach, but the correct one above will overflow a 32-bit number. */ | |
283 | #define SH64PCREL32_M (((long) -1 << 30) * 2) | |
284 | #define SH64PCREL48_F SH64PCREL32_F | |
285 | #define SH64PCREL48_M SH64PCREL32_M | |
286 | #define SH64PCREL48_LENGTH (3 * 4) | |
287 | #endif /* BFD_HOST_64BIT_LONG */ | |
288 | ||
289 | /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI | |
290 | + PTREL sequence. */ | |
291 | #define SH64PCREL64_LENGTH (4 * 4) | |
292 | ||
293 | /* For MOVI, we make the MOVI + SHORI... expansion you can see in the | |
294 | SH64PCREL expansions. The PCREL one is similar, but the other has no | |
295 | pc-relative reach; it must be fully expanded in | |
296 | shmedia_md_estimate_size_before_relax. */ | |
297 | #define MOVI_16_LENGTH 0 | |
298 | #define MOVI_16_F (32767 - 4) | |
299 | #define MOVI_16_M (-32768 - 4) | |
300 | #define MOVI_32_LENGTH 4 | |
301 | #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) | |
302 | #define MOVI_48_LENGTH 8 | |
303 | ||
304 | #if BFD_HOST_64BIT_LONG | |
305 | /* The "reach" type is long, so we can only do this for a 64-bit-long | |
306 | host. */ | |
307 | #define MOVI_32_M (((long) -1 << 30) * 2 - 4) | |
308 | #define MOVI_48_F ((((long) 1 << 47) - 1) - 4) | |
309 | #define MOVI_48_M (((long) -1 << 47) - 4) | |
310 | #else | |
311 | /* If the host does not have 64-bit longs, just make this state identical | |
312 | in reach to the 32-bit state. Note that we have a slightly incorrect | |
313 | reach, but the correct one above will overflow a 32-bit number. */ | |
314 | #define MOVI_32_M (((long) -1 << 30) * 2) | |
315 | #define MOVI_48_F MOVI_32_F | |
316 | #define MOVI_48_M MOVI_32_M | |
317 | #endif /* BFD_HOST_64BIT_LONG */ | |
318 | ||
319 | #define MOVI_64_LENGTH 12 | |
320 | #endif /* HAVE_SH64 */ | |
321 | ||
43841e91 NC |
322 | #define EMPTY { 0, 0, 0, 0 } |
323 | ||
252b5132 | 324 | const relax_typeS md_relax_table[C (END, 0)] = { |
43841e91 NC |
325 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
326 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 327 | |
43841e91 | 328 | EMPTY, |
252b5132 RH |
329 | /* C (COND_JUMP, COND8) */ |
330 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
331 | /* C (COND_JUMP, COND12) */ | |
332 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
333 | /* C (COND_JUMP, COND32) */ | |
334 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
335 | /* C (COND_JUMP, UNDEF_WORD_DISP) */ |
336 | { 0, 0, COND32_LENGTH, 0, }, | |
337 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 338 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 339 | |
43841e91 | 340 | EMPTY, |
252b5132 RH |
341 | /* C (COND_JUMP_DELAY, COND8) */ |
342 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
343 | /* C (COND_JUMP_DELAY, COND12) */ | |
344 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
345 | /* C (COND_JUMP_DELAY, COND32) */ | |
346 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
347 | /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ |
348 | { 0, 0, COND32_LENGTH, 0, }, | |
349 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 350 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 351 | |
43841e91 | 352 | EMPTY, |
252b5132 RH |
353 | /* C (UNCOND_JUMP, UNCOND12) */ |
354 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
355 | /* C (UNCOND_JUMP, UNCOND32) */ | |
356 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
e66457fb AM |
357 | EMPTY, |
358 | /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ | |
359 | { 0, 0, UNCOND32_LENGTH, 0, }, | |
360 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 361 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
324bfcf3 AO |
362 | |
363 | #ifdef HAVE_SH64 | |
364 | /* C (SH64PCREL16_32, SH64PCREL16) */ | |
365 | EMPTY, | |
366 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) }, | |
367 | /* C (SH64PCREL16_32, SH64PCREL32) */ | |
368 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
369 | EMPTY, EMPTY, | |
370 | /* C (SH64PCREL16_32, SH64PCRELPLT) */ | |
371 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
372 | EMPTY, EMPTY, | |
373 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
374 | ||
375 | /* C (SH64PCREL16_64, SH64PCREL16) */ | |
376 | EMPTY, | |
377 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) }, | |
378 | /* C (SH64PCREL16_64, SH64PCREL32) */ | |
379 | { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) }, | |
380 | /* C (SH64PCREL16_64, SH64PCREL48) */ | |
381 | { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) }, | |
382 | /* C (SH64PCREL16_64, SH64PCREL64) */ | |
383 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
384 | /* C (SH64PCREL16_64, SH64PCRELPLT) */ | |
385 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
386 | EMPTY, EMPTY, | |
387 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
388 | ||
389 | /* C (SH64PCREL16PT_32, SH64PCREL16) */ | |
390 | EMPTY, | |
391 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) }, | |
392 | /* C (SH64PCREL16PT_32, SH64PCREL32) */ | |
393 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
394 | EMPTY, EMPTY, | |
395 | /* C (SH64PCREL16PT_32, SH64PCRELPLT) */ | |
396 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
397 | EMPTY, EMPTY, | |
398 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
399 | ||
400 | /* C (SH64PCREL16PT_64, SH64PCREL16) */ | |
401 | EMPTY, | |
402 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) }, | |
403 | /* C (SH64PCREL16PT_64, SH64PCREL32) */ | |
404 | { SH64PCREL32_F, | |
5d6255fe | 405 | SH64PCREL32_M, |
324bfcf3 AO |
406 | SH64PCREL32_LENGTH, |
407 | C (SH64PCREL16PT_64, SH64PCREL48) }, | |
408 | /* C (SH64PCREL16PT_64, SH64PCREL48) */ | |
409 | { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) }, | |
410 | /* C (SH64PCREL16PT_64, SH64PCREL64) */ | |
411 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
412 | /* C (SH64PCREL16PT_64, SH64PCRELPLT) */ | |
413 | { 0, 0, SH64PCREL64_LENGTH, 0}, | |
414 | EMPTY, EMPTY, | |
415 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
416 | ||
417 | /* C (MOVI_IMM_32, UNDEF_MOVI) */ | |
418 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
419 | /* C (MOVI_IMM_32, MOVI_16) */ | |
420 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) }, | |
421 | /* C (MOVI_IMM_32, MOVI_32) */ | |
422 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 }, | |
423 | EMPTY, EMPTY, EMPTY, | |
424 | /* C (MOVI_IMM_32, MOVI_GOTOFF) */ | |
425 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
426 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
427 | ||
428 | /* C (MOVI_IMM_32_PCREL, MOVI_16) */ | |
429 | EMPTY, | |
430 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) }, | |
431 | /* C (MOVI_IMM_32_PCREL, MOVI_32) */ | |
432 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
433 | EMPTY, EMPTY, | |
434 | /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */ | |
435 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
436 | EMPTY, | |
437 | /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */ | |
438 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
439 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
440 | ||
441 | /* C (MOVI_IMM_64, UNDEF_MOVI) */ | |
442 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
443 | /* C (MOVI_IMM_64, MOVI_16) */ | |
444 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) }, | |
445 | /* C (MOVI_IMM_64, MOVI_32) */ | |
446 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) }, | |
447 | /* C (MOVI_IMM_64, MOVI_48) */ | |
448 | { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) }, | |
449 | /* C (MOVI_IMM_64, MOVI_64) */ | |
450 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
451 | EMPTY, | |
452 | /* C (MOVI_IMM_64, MOVI_GOTOFF) */ | |
453 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
454 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
455 | ||
456 | /* C (MOVI_IMM_64_PCREL, MOVI_16) */ | |
457 | EMPTY, | |
458 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) }, | |
459 | /* C (MOVI_IMM_64_PCREL, MOVI_32) */ | |
460 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) }, | |
461 | /* C (MOVI_IMM_64_PCREL, MOVI_48) */ | |
462 | { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) }, | |
463 | /* C (MOVI_IMM_64_PCREL, MOVI_64) */ | |
464 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
465 | /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */ | |
466 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
467 | EMPTY, | |
468 | /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */ | |
469 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
470 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
471 | ||
472 | #endif /* HAVE_SH64 */ | |
473 | ||
252b5132 RH |
474 | }; |
475 | ||
43841e91 NC |
476 | #undef EMPTY |
477 | ||
252b5132 RH |
478 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ |
479 | ||
a1cc9221 AO |
480 | \f |
481 | #ifdef OBJ_ELF | |
538cd60f AO |
482 | /* Determinet whether the symbol needs any kind of PIC relocation. */ |
483 | ||
484 | inline static int | |
8edc77b9 | 485 | sh_PIC_related_p (symbolS *sym) |
a1cc9221 | 486 | { |
538cd60f | 487 | expressionS *exp; |
a1cc9221 | 488 | |
538cd60f AO |
489 | if (! sym) |
490 | return 0; | |
491 | ||
492 | if (sym == GOT_symbol) | |
493 | return 1; | |
494 | ||
324bfcf3 AO |
495 | #ifdef HAVE_SH64 |
496 | if (sh_PIC_related_p (*symbol_get_tc (sym))) | |
497 | return 1; | |
498 | #endif | |
499 | ||
538cd60f AO |
500 | exp = symbol_get_value_expression (sym); |
501 | ||
502 | return (exp->X_op == O_PIC_reloc | |
503 | || sh_PIC_related_p (exp->X_add_symbol) | |
504 | || sh_PIC_related_p (exp->X_op_symbol)); | |
505 | } | |
506 | ||
507 | /* Determine the relocation type to be used to represent the | |
508 | expression, that may be rearranged. */ | |
509 | ||
510 | static int | |
8edc77b9 | 511 | sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) |
538cd60f AO |
512 | { |
513 | expressionS *exp = main_exp; | |
514 | ||
515 | /* This is here for backward-compatibility only. GCC used to generated: | |
516 | ||
517 | f@PLT + . - (.LPCS# + 2) | |
518 | ||
519 | but we'd rather be able to handle this as a PIC-related reference | |
520 | plus/minus a symbol. However, gas' parser gives us: | |
521 | ||
522 | O_subtract (O_add (f@PLT, .), .LPCS#+2) | |
5d6255fe | 523 | |
538cd60f AO |
524 | so we attempt to transform this into: |
525 | ||
526 | O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) | |
527 | ||
5d6255fe | 528 | which we can handle simply below. */ |
538cd60f AO |
529 | if (exp->X_op == O_subtract) |
530 | { | |
531 | if (sh_PIC_related_p (exp->X_op_symbol)) | |
532 | return 1; | |
533 | ||
534 | exp = symbol_get_value_expression (exp->X_add_symbol); | |
535 | ||
536 | if (exp && sh_PIC_related_p (exp->X_op_symbol)) | |
537 | return 1; | |
538 | ||
539 | if (exp && exp->X_op == O_add | |
540 | && sh_PIC_related_p (exp->X_add_symbol)) | |
541 | { | |
542 | symbolS *sym = exp->X_add_symbol; | |
543 | ||
544 | exp->X_op = O_subtract; | |
545 | exp->X_add_symbol = main_exp->X_op_symbol; | |
546 | ||
547 | main_exp->X_op_symbol = main_exp->X_add_symbol; | |
548 | main_exp->X_add_symbol = sym; | |
549 | ||
550 | main_exp->X_add_number += exp->X_add_number; | |
551 | exp->X_add_number = 0; | |
552 | } | |
553 | ||
554 | exp = main_exp; | |
555 | } | |
556 | else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) | |
557 | return 1; | |
558 | ||
559 | if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) | |
560 | { | |
324bfcf3 AO |
561 | #ifdef HAVE_SH64 |
562 | if (exp->X_add_symbol | |
563 | && (exp->X_add_symbol == GOT_symbol | |
564 | || (GOT_symbol | |
565 | && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol))) | |
566 | { | |
567 | switch (*r_type_p) | |
568 | { | |
569 | case BFD_RELOC_SH_IMM_LOW16: | |
570 | *r_type_p = BFD_RELOC_SH_GOTPC_LOW16; | |
571 | break; | |
572 | ||
573 | case BFD_RELOC_SH_IMM_MEDLOW16: | |
574 | *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16; | |
575 | break; | |
576 | ||
577 | case BFD_RELOC_SH_IMM_MEDHI16: | |
578 | *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16; | |
579 | break; | |
580 | ||
581 | case BFD_RELOC_SH_IMM_HI16: | |
582 | *r_type_p = BFD_RELOC_SH_GOTPC_HI16; | |
583 | break; | |
584 | ||
585 | case BFD_RELOC_NONE: | |
586 | case BFD_RELOC_UNUSED: | |
587 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
588 | break; | |
5d6255fe | 589 | |
324bfcf3 AO |
590 | default: |
591 | abort (); | |
592 | } | |
593 | return 0; | |
594 | } | |
595 | #else | |
538cd60f AO |
596 | if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) |
597 | { | |
598 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
599 | return 0; | |
600 | } | |
324bfcf3 | 601 | #endif |
538cd60f AO |
602 | exp = symbol_get_value_expression (exp->X_add_symbol); |
603 | if (! exp) | |
604 | return 0; | |
605 | } | |
606 | ||
607 | if (exp->X_op == O_PIC_reloc) | |
608 | { | |
324bfcf3 AO |
609 | #ifdef HAVE_SH64 |
610 | switch (*r_type_p) | |
611 | { | |
612 | case BFD_RELOC_NONE: | |
613 | case BFD_RELOC_UNUSED: | |
614 | *r_type_p = exp->X_md; | |
615 | break; | |
616 | ||
617 | case BFD_RELOC_SH_IMM_LOW16: | |
618 | switch (exp->X_md) | |
619 | { | |
620 | case BFD_RELOC_32_GOTOFF: | |
621 | *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16; | |
622 | break; | |
5d6255fe | 623 | |
324bfcf3 AO |
624 | case BFD_RELOC_SH_GOTPLT32: |
625 | *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16; | |
626 | break; | |
5d6255fe | 627 | |
324bfcf3 AO |
628 | case BFD_RELOC_32_GOT_PCREL: |
629 | *r_type_p = BFD_RELOC_SH_GOT_LOW16; | |
630 | break; | |
5d6255fe | 631 | |
324bfcf3 AO |
632 | case BFD_RELOC_32_PLT_PCREL: |
633 | *r_type_p = BFD_RELOC_SH_PLT_LOW16; | |
634 | break; | |
635 | ||
636 | default: | |
637 | abort (); | |
638 | } | |
639 | break; | |
640 | ||
641 | case BFD_RELOC_SH_IMM_MEDLOW16: | |
642 | switch (exp->X_md) | |
643 | { | |
644 | case BFD_RELOC_32_GOTOFF: | |
645 | *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16; | |
646 | break; | |
5d6255fe | 647 | |
324bfcf3 AO |
648 | case BFD_RELOC_SH_GOTPLT32: |
649 | *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16; | |
650 | break; | |
5d6255fe | 651 | |
324bfcf3 AO |
652 | case BFD_RELOC_32_GOT_PCREL: |
653 | *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16; | |
654 | break; | |
5d6255fe | 655 | |
324bfcf3 AO |
656 | case BFD_RELOC_32_PLT_PCREL: |
657 | *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16; | |
658 | break; | |
659 | ||
660 | default: | |
661 | abort (); | |
662 | } | |
663 | break; | |
664 | ||
665 | case BFD_RELOC_SH_IMM_MEDHI16: | |
666 | switch (exp->X_md) | |
667 | { | |
668 | case BFD_RELOC_32_GOTOFF: | |
669 | *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16; | |
670 | break; | |
5d6255fe | 671 | |
324bfcf3 AO |
672 | case BFD_RELOC_SH_GOTPLT32: |
673 | *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16; | |
674 | break; | |
5d6255fe | 675 | |
324bfcf3 AO |
676 | case BFD_RELOC_32_GOT_PCREL: |
677 | *r_type_p = BFD_RELOC_SH_GOT_MEDHI16; | |
678 | break; | |
5d6255fe | 679 | |
324bfcf3 AO |
680 | case BFD_RELOC_32_PLT_PCREL: |
681 | *r_type_p = BFD_RELOC_SH_PLT_MEDHI16; | |
682 | break; | |
683 | ||
684 | default: | |
685 | abort (); | |
686 | } | |
687 | break; | |
688 | ||
689 | case BFD_RELOC_SH_IMM_HI16: | |
690 | switch (exp->X_md) | |
691 | { | |
692 | case BFD_RELOC_32_GOTOFF: | |
693 | *r_type_p = BFD_RELOC_SH_GOTOFF_HI16; | |
694 | break; | |
5d6255fe | 695 | |
324bfcf3 AO |
696 | case BFD_RELOC_SH_GOTPLT32: |
697 | *r_type_p = BFD_RELOC_SH_GOTPLT_HI16; | |
698 | break; | |
5d6255fe | 699 | |
324bfcf3 AO |
700 | case BFD_RELOC_32_GOT_PCREL: |
701 | *r_type_p = BFD_RELOC_SH_GOT_HI16; | |
702 | break; | |
5d6255fe | 703 | |
324bfcf3 AO |
704 | case BFD_RELOC_32_PLT_PCREL: |
705 | *r_type_p = BFD_RELOC_SH_PLT_HI16; | |
706 | break; | |
707 | ||
708 | default: | |
709 | abort (); | |
710 | } | |
711 | break; | |
712 | ||
713 | default: | |
714 | abort (); | |
715 | } | |
716 | #else | |
538cd60f | 717 | *r_type_p = exp->X_md; |
324bfcf3 | 718 | #endif |
538cd60f AO |
719 | if (exp == main_exp) |
720 | exp->X_op = O_symbol; | |
721 | else | |
722 | { | |
723 | main_exp->X_add_symbol = exp->X_add_symbol; | |
724 | main_exp->X_add_number += exp->X_add_number; | |
725 | } | |
726 | } | |
727 | else | |
728 | return (sh_PIC_related_p (exp->X_add_symbol) | |
729 | || sh_PIC_related_p (exp->X_op_symbol)); | |
730 | ||
731 | return 0; | |
732 | } | |
733 | ||
734 | /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ | |
735 | ||
736 | void | |
8edc77b9 | 737 | sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp) |
538cd60f AO |
738 | { |
739 | bfd_reloc_code_real_type r_type = BFD_RELOC_UNUSED; | |
740 | ||
741 | if (sh_check_fixup (exp, &r_type)) | |
742 | as_bad (_("Invalid PIC expression.")); | |
743 | ||
744 | if (r_type == BFD_RELOC_UNUSED) | |
745 | switch (size) | |
a1cc9221 | 746 | { |
538cd60f AO |
747 | case 1: |
748 | r_type = BFD_RELOC_8; | |
749 | break; | |
a1cc9221 | 750 | |
538cd60f AO |
751 | case 2: |
752 | r_type = BFD_RELOC_16; | |
753 | break; | |
754 | ||
755 | case 4: | |
756 | r_type = BFD_RELOC_32; | |
757 | break; | |
a1cc9221 | 758 | |
324bfcf3 AO |
759 | #ifdef HAVE_SH64 |
760 | case 8: | |
761 | r_type = BFD_RELOC_64; | |
762 | break; | |
763 | #endif | |
764 | ||
538cd60f AO |
765 | default: |
766 | goto error; | |
767 | } | |
768 | else if (size != 4) | |
769 | { | |
770 | error: | |
771 | as_bad (_("unsupported BFD relocation size %u"), size); | |
772 | r_type = BFD_RELOC_UNUSED; | |
773 | } | |
5d6255fe | 774 | |
538cd60f | 775 | fix_new_exp (frag, off, size, exp, 0, r_type); |
a1cc9221 AO |
776 | } |
777 | ||
778 | /* The regular cons() function, that reads constants, doesn't support | |
779 | suffixes such as @GOT, @GOTOFF and @PLT, that generate | |
780 | machine-specific relocation types. So we must define it here. */ | |
781 | /* Clobbers input_line_pointer, checks end-of-line. */ | |
8edc77b9 | 782 | /* NBYTES 1=.byte, 2=.word, 4=.long */ |
a1cc9221 | 783 | static void |
8edc77b9 | 784 | sh_elf_cons (register int nbytes) |
a1cc9221 | 785 | { |
538cd60f | 786 | expressionS exp; |
a1cc9221 | 787 | |
324bfcf3 AO |
788 | #ifdef HAVE_SH64 |
789 | ||
790 | /* Update existing range to include a previous insn, if there was one. */ | |
b34976b6 | 791 | sh64_update_contents_mark (TRUE); |
324bfcf3 AO |
792 | |
793 | /* We need to make sure the contents type is set to data. */ | |
794 | sh64_flag_output (); | |
795 | ||
796 | #endif /* HAVE_SH64 */ | |
797 | ||
a1cc9221 AO |
798 | if (is_it_end_of_statement ()) |
799 | { | |
800 | demand_empty_rest_of_line (); | |
801 | return; | |
802 | } | |
803 | ||
028f09bd NC |
804 | #ifdef md_cons_align |
805 | md_cons_align (nbytes); | |
806 | #endif | |
807 | ||
a1cc9221 AO |
808 | do |
809 | { | |
810 | expression (&exp); | |
538cd60f | 811 | emit_expr (&exp, (unsigned int) nbytes); |
a1cc9221 AO |
812 | } |
813 | while (*input_line_pointer++ == ','); | |
814 | ||
81d4177b | 815 | input_line_pointer--; /* Put terminator back into stream. */ |
a1cc9221 AO |
816 | if (*input_line_pointer == '#' || *input_line_pointer == '!') |
817 | { | |
dda5ecfc | 818 | while (! is_end_of_line[(unsigned char) *input_line_pointer++]); |
a1cc9221 AO |
819 | } |
820 | else | |
821 | demand_empty_rest_of_line (); | |
822 | } | |
823 | #endif /* OBJ_ELF */ | |
824 | ||
825 | \f | |
6b31947e NC |
826 | /* This function is called once, at assembler startup time. This should |
827 | set up all the tables, etc that the MD part of the assembler needs. */ | |
252b5132 RH |
828 | |
829 | void | |
8edc77b9 | 830 | md_begin (void) |
252b5132 | 831 | { |
5ff37431 | 832 | const sh_opcode_info *opcode; |
252b5132 | 833 | char *prev_name = ""; |
d4845d57 | 834 | int target_arch; |
252b5132 | 835 | |
bdfaef52 JR |
836 | target_arch |
837 | = preset_target_arch ? preset_target_arch : arch_sh1_up & ~arch_sh_dsp_up; | |
d4845d57 JR |
838 | valid_arch = target_arch; |
839 | ||
324bfcf3 AO |
840 | #ifdef HAVE_SH64 |
841 | shmedia_md_begin (); | |
842 | #endif | |
843 | ||
252b5132 RH |
844 | opcode_hash_control = hash_new (); |
845 | ||
6b31947e | 846 | /* Insert unique names into hash table. */ |
252b5132 RH |
847 | for (opcode = sh_table; opcode->name; opcode++) |
848 | { | |
5ff37431 | 849 | if (strcmp (prev_name, opcode->name) != 0) |
252b5132 | 850 | { |
a37c8f88 JR |
851 | if (! (opcode->arch & target_arch)) |
852 | continue; | |
252b5132 RH |
853 | prev_name = opcode->name; |
854 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
855 | } | |
252b5132 RH |
856 | } |
857 | } | |
858 | ||
859 | static int reg_m; | |
860 | static int reg_n; | |
d4845d57 JR |
861 | static int reg_x, reg_y; |
862 | static int reg_efg; | |
252b5132 RH |
863 | static int reg_b; |
864 | ||
3882b010 | 865 | #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') |
dead1419 | 866 | |
6b31947e NC |
867 | /* Try to parse a reg name. Return the number of chars consumed. */ |
868 | ||
252b5132 | 869 | static int |
8edc77b9 | 870 | parse_reg (char *src, int *mode, int *reg) |
252b5132 | 871 | { |
3882b010 L |
872 | char l0 = TOLOWER (src[0]); |
873 | char l1 = l0 ? TOLOWER (src[1]) : 0; | |
e46fee70 | 874 | |
dead1419 | 875 | /* We use ! IDENT_CHAR for the next character after the register name, to |
252b5132 | 876 | make sure that we won't accidentally recognize a symbol name such as |
dead1419 | 877 | 'sram' or sr_ram as being a reference to the register 'sr'. */ |
252b5132 | 878 | |
e46fee70 | 879 | if (l0 == 'r') |
252b5132 | 880 | { |
e46fee70 | 881 | if (l1 == '1') |
d4845d57 JR |
882 | { |
883 | if (src[2] >= '0' && src[2] <= '5' | |
dead1419 | 884 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
885 | { |
886 | *mode = A_REG_N; | |
887 | *reg = 10 + src[2] - '0'; | |
888 | return 3; | |
889 | } | |
890 | } | |
e46fee70 | 891 | if (l1 >= '0' && l1 <= '9' |
dead1419 | 892 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
893 | { |
894 | *mode = A_REG_N; | |
e46fee70 | 895 | *reg = (l1 - '0'); |
d4845d57 JR |
896 | return 2; |
897 | } | |
e46fee70 | 898 | if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 |
dead1419 JR |
899 | && ! IDENT_CHAR ((unsigned char) src[7])) |
900 | { | |
901 | *mode = A_REG_B; | |
e46fee70 | 902 | *reg = (l1 - '0'); |
dead1419 JR |
903 | return 7; |
904 | } | |
d4845d57 | 905 | |
e46fee70 | 906 | if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
907 | { |
908 | *mode = A_RE; | |
909 | return 2; | |
910 | } | |
e46fee70 | 911 | if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
912 | { |
913 | *mode = A_RS; | |
914 | return 2; | |
915 | } | |
252b5132 RH |
916 | } |
917 | ||
e46fee70 | 918 | if (l0 == 'a') |
252b5132 | 919 | { |
e46fee70 | 920 | if (l1 == '0') |
d4845d57 | 921 | { |
dead1419 | 922 | if (! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
923 | { |
924 | *mode = DSP_REG_N; | |
925 | *reg = A_A0_NUM; | |
926 | return 2; | |
927 | } | |
3882b010 | 928 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
929 | { |
930 | *mode = DSP_REG_N; | |
931 | *reg = A_A0G_NUM; | |
932 | return 3; | |
933 | } | |
934 | } | |
e46fee70 | 935 | if (l1 == '1') |
252b5132 | 936 | { |
dead1419 | 937 | if (! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 938 | { |
d4845d57 JR |
939 | *mode = DSP_REG_N; |
940 | *reg = A_A1_NUM; | |
941 | return 2; | |
942 | } | |
3882b010 | 943 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
944 | { |
945 | *mode = DSP_REG_N; | |
946 | *reg = A_A1G_NUM; | |
252b5132 RH |
947 | return 3; |
948 | } | |
949 | } | |
d4845d57 | 950 | |
e46fee70 | 951 | if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 952 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
953 | { |
954 | *mode = A_REG_N; | |
e46fee70 | 955 | *reg = 4 + (l1 - '0'); |
d4845d57 JR |
956 | return 3; |
957 | } | |
e46fee70 | 958 | if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 959 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
960 | { |
961 | *mode = A_REG_N; | |
e46fee70 | 962 | *reg = 6 + (l1 - '0'); |
d4845d57 JR |
963 | return 3; |
964 | } | |
e46fee70 | 965 | if (l1 == 's' && src[2] >= '0' && src[2] <= '3' |
dead1419 | 966 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 | 967 | { |
e46fee70 | 968 | int n = l1 - '0'; |
d4845d57 JR |
969 | |
970 | *mode = A_REG_N; | |
971 | *reg = n | ((~n & 2) << 1); | |
972 | return 3; | |
973 | } | |
974 | } | |
975 | ||
912a07db | 976 | if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 | 977 | { |
e46fee70 | 978 | if (l1 == 's') |
d4845d57 JR |
979 | { |
980 | *mode = A_REG_N; | |
981 | *reg = 8; | |
252b5132 RH |
982 | return 2; |
983 | } | |
e46fee70 | 984 | if (l1 == 'x') |
d4845d57 JR |
985 | { |
986 | *mode = A_REG_N; | |
987 | *reg = 8; | |
988 | return 2; | |
989 | } | |
e46fee70 | 990 | if (l1 == 'y') |
d4845d57 JR |
991 | { |
992 | *mode = A_REG_N; | |
993 | *reg = 9; | |
994 | return 2; | |
995 | } | |
996 | } | |
997 | ||
e46fee70 | 998 | if (l0 == 'x' && l1 >= '0' && l1 <= '1' |
dead1419 | 999 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1000 | { |
1001 | *mode = DSP_REG_N; | |
e46fee70 | 1002 | *reg = A_X0_NUM + l1 - '0'; |
d4845d57 JR |
1003 | return 2; |
1004 | } | |
1005 | ||
e46fee70 | 1006 | if (l0 == 'y' && l1 >= '0' && l1 <= '1' |
dead1419 | 1007 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1008 | { |
1009 | *mode = DSP_REG_N; | |
e46fee70 | 1010 | *reg = A_Y0_NUM + l1 - '0'; |
d4845d57 JR |
1011 | return 2; |
1012 | } | |
1013 | ||
e46fee70 | 1014 | if (l0 == 'm' && l1 >= '0' && l1 <= '1' |
dead1419 | 1015 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1016 | { |
1017 | *mode = DSP_REG_N; | |
e46fee70 | 1018 | *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; |
d4845d57 | 1019 | return 2; |
252b5132 RH |
1020 | } |
1021 | ||
e46fee70 HPN |
1022 | if (l0 == 's' |
1023 | && l1 == 's' | |
3882b010 | 1024 | && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1025 | { |
1026 | *mode = A_SSR; | |
1027 | return 3; | |
1028 | } | |
1029 | ||
3882b010 | 1030 | if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' |
dead1419 | 1031 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1032 | { |
1033 | *mode = A_SPC; | |
1034 | return 3; | |
1035 | } | |
1036 | ||
3882b010 | 1037 | if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' |
dead1419 | 1038 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1039 | { |
1040 | *mode = A_SGR; | |
1041 | return 3; | |
1042 | } | |
1043 | ||
3882b010 | 1044 | if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' |
dead1419 | 1045 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1046 | { |
1047 | *mode = A_DSR; | |
1048 | return 3; | |
1049 | } | |
1050 | ||
3882b010 | 1051 | if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1052 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1053 | { |
1054 | *mode = A_DBR; | |
1055 | return 3; | |
1056 | } | |
1057 | ||
e46fee70 | 1058 | if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1059 | { |
1060 | *mode = A_SR; | |
1061 | return 2; | |
1062 | } | |
1063 | ||
e46fee70 | 1064 | if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1065 | { |
1066 | *mode = A_REG_N; | |
1067 | *reg = 15; | |
1068 | return 2; | |
1069 | } | |
1070 | ||
e46fee70 | 1071 | if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1072 | { |
1073 | *mode = A_PR; | |
1074 | return 2; | |
1075 | } | |
e46fee70 | 1076 | if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 1077 | { |
015551fc JR |
1078 | /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' |
1079 | and use an uninitialized immediate. */ | |
1080 | *mode = A_PC; | |
252b5132 RH |
1081 | return 2; |
1082 | } | |
3882b010 | 1083 | if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1084 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1085 | { |
1086 | *mode = A_GBR; | |
1087 | return 3; | |
1088 | } | |
3882b010 | 1089 | if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1090 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1091 | { |
1092 | *mode = A_VBR; | |
1093 | return 3; | |
1094 | } | |
1095 | ||
3882b010 | 1096 | if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' |
dead1419 | 1097 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 | 1098 | { |
3882b010 | 1099 | if (TOLOWER (src[3]) == 'l') |
252b5132 RH |
1100 | { |
1101 | *mode = A_MACL; | |
1102 | return 4; | |
1103 | } | |
3882b010 | 1104 | if (TOLOWER (src[3]) == 'h') |
252b5132 RH |
1105 | { |
1106 | *mode = A_MACH; | |
1107 | return 4; | |
1108 | } | |
1109 | } | |
3882b010 | 1110 | if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' |
912a07db | 1111 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1112 | { |
1113 | *mode = A_MOD; | |
1114 | return 3; | |
1115 | } | |
e46fee70 | 1116 | if (l0 == 'f' && l1 == 'r') |
252b5132 RH |
1117 | { |
1118 | if (src[2] == '1') | |
1119 | { | |
1120 | if (src[3] >= '0' && src[3] <= '5' | |
dead1419 | 1121 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1122 | { |
1123 | *mode = F_REG_N; | |
1124 | *reg = 10 + src[3] - '0'; | |
1125 | return 4; | |
1126 | } | |
1127 | } | |
1128 | if (src[2] >= '0' && src[2] <= '9' | |
dead1419 | 1129 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1130 | { |
1131 | *mode = F_REG_N; | |
1132 | *reg = (src[2] - '0'); | |
1133 | return 3; | |
1134 | } | |
1135 | } | |
e46fee70 | 1136 | if (l0 == 'd' && l1 == 'r') |
252b5132 RH |
1137 | { |
1138 | if (src[2] == '1') | |
1139 | { | |
1140 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 1141 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1142 | { |
1143 | *mode = D_REG_N; | |
1144 | *reg = 10 + src[3] - '0'; | |
1145 | return 4; | |
1146 | } | |
1147 | } | |
1148 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 1149 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1150 | { |
1151 | *mode = D_REG_N; | |
1152 | *reg = (src[2] - '0'); | |
1153 | return 3; | |
1154 | } | |
1155 | } | |
e46fee70 | 1156 | if (l0 == 'x' && l1 == 'd') |
252b5132 RH |
1157 | { |
1158 | if (src[2] == '1') | |
1159 | { | |
1160 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 1161 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1162 | { |
1163 | *mode = X_REG_N; | |
1164 | *reg = 11 + src[3] - '0'; | |
1165 | return 4; | |
1166 | } | |
1167 | } | |
1168 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 1169 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1170 | { |
1171 | *mode = X_REG_N; | |
1172 | *reg = (src[2] - '0') + 1; | |
1173 | return 3; | |
1174 | } | |
1175 | } | |
e46fee70 | 1176 | if (l0 == 'f' && l1 == 'v') |
252b5132 | 1177 | { |
dead1419 | 1178 | if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1179 | { |
1180 | *mode = V_REG_N; | |
1181 | *reg = 12; | |
1182 | return 4; | |
1183 | } | |
1184 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') | |
dead1419 | 1185 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1186 | { |
1187 | *mode = V_REG_N; | |
1188 | *reg = (src[2] - '0'); | |
1189 | return 3; | |
1190 | } | |
1191 | } | |
3882b010 L |
1192 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' |
1193 | && TOLOWER (src[3]) == 'l' | |
dead1419 | 1194 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1195 | { |
1196 | *mode = FPUL_N; | |
1197 | return 4; | |
1198 | } | |
1199 | ||
3882b010 L |
1200 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' |
1201 | && TOLOWER (src[3]) == 'c' | |
1202 | && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
1203 | { |
1204 | *mode = FPSCR_N; | |
1205 | return 5; | |
1206 | } | |
1207 | ||
3882b010 L |
1208 | if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' |
1209 | && TOLOWER (src[3]) == 'r' | |
1210 | && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
1211 | { |
1212 | *mode = XMTRX_M4; | |
1213 | return 5; | |
1214 | } | |
1215 | ||
1216 | return 0; | |
1217 | } | |
1218 | ||
c4aa876b | 1219 | static char * |
8edc77b9 | 1220 | parse_exp (char *s, sh_operand_info *op) |
252b5132 RH |
1221 | { |
1222 | char *save; | |
1223 | char *new; | |
1224 | ||
1225 | save = input_line_pointer; | |
1226 | input_line_pointer = s; | |
015551fc JR |
1227 | expression (&op->immediate); |
1228 | if (op->immediate.X_op == O_absent) | |
252b5132 | 1229 | as_bad (_("missing operand")); |
538cd60f AO |
1230 | #ifdef OBJ_ELF |
1231 | else if (op->immediate.X_op == O_PIC_reloc | |
1232 | || sh_PIC_related_p (op->immediate.X_add_symbol) | |
1233 | || sh_PIC_related_p (op->immediate.X_op_symbol)) | |
1234 | as_bad (_("misplaced PIC operand")); | |
1235 | #endif | |
252b5132 RH |
1236 | new = input_line_pointer; |
1237 | input_line_pointer = save; | |
1238 | return new; | |
1239 | } | |
1240 | ||
252b5132 RH |
1241 | /* The many forms of operand: |
1242 | ||
1243 | Rn Register direct | |
1244 | @Rn Register indirect | |
1245 | @Rn+ Autoincrement | |
1246 | @-Rn Autodecrement | |
1247 | @(disp:4,Rn) | |
1248 | @(disp:8,GBR) | |
1249 | @(disp:8,PC) | |
1250 | ||
1251 | @(R0,Rn) | |
1252 | @(R0,GBR) | |
1253 | ||
1254 | disp:8 | |
1255 | disp:12 | |
1256 | #imm8 | |
1257 | pr, gbr, vbr, macl, mach | |
252b5132 RH |
1258 | */ |
1259 | ||
c4aa876b | 1260 | static char * |
8edc77b9 | 1261 | parse_at (char *src, sh_operand_info *op) |
252b5132 RH |
1262 | { |
1263 | int len; | |
1264 | int mode; | |
1265 | src++; | |
1266 | if (src[0] == '-') | |
1267 | { | |
6b31947e | 1268 | /* Must be predecrement. */ |
252b5132 RH |
1269 | src++; |
1270 | ||
1271 | len = parse_reg (src, &mode, &(op->reg)); | |
1272 | if (mode != A_REG_N) | |
1273 | as_bad (_("illegal register after @-")); | |
1274 | ||
1275 | op->type = A_DEC_N; | |
1276 | src += len; | |
1277 | } | |
1278 | else if (src[0] == '(') | |
1279 | { | |
1280 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
8d4d84c2 | 1281 | @(r0, rn). */ |
252b5132 RH |
1282 | src++; |
1283 | len = parse_reg (src, &mode, &(op->reg)); | |
1284 | if (len && mode == A_REG_N) | |
1285 | { | |
1286 | src += len; | |
1287 | if (op->reg != 0) | |
1288 | { | |
1289 | as_bad (_("must be @(r0,...)")); | |
1290 | } | |
1291 | if (src[0] == ',') | |
252b5132 | 1292 | { |
8d4d84c2 AO |
1293 | src++; |
1294 | /* Now can be rn or gbr. */ | |
1295 | len = parse_reg (src, &mode, &(op->reg)); | |
1296 | } | |
1297 | else | |
1298 | { | |
1299 | len = 0; | |
252b5132 | 1300 | } |
8d4d84c2 | 1301 | if (len) |
252b5132 | 1302 | { |
8d4d84c2 AO |
1303 | if (mode == A_GBR) |
1304 | { | |
1305 | op->type = A_R0_GBR; | |
1306 | } | |
1307 | else if (mode == A_REG_N) | |
1308 | { | |
1309 | op->type = A_IND_R0_REG_N; | |
1310 | } | |
1311 | else | |
1312 | { | |
1313 | as_bad (_("syntax error in @(r0,...)")); | |
1314 | } | |
252b5132 RH |
1315 | } |
1316 | else | |
1317 | { | |
8d4d84c2 | 1318 | as_bad (_("syntax error in @(r0...)")); |
252b5132 RH |
1319 | } |
1320 | } | |
1321 | else | |
1322 | { | |
8d4d84c2 | 1323 | /* Must be an @(disp,.. thing). */ |
015551fc | 1324 | src = parse_exp (src, op); |
252b5132 RH |
1325 | if (src[0] == ',') |
1326 | src++; | |
8d4d84c2 | 1327 | /* Now can be rn, gbr or pc. */ |
252b5132 RH |
1328 | len = parse_reg (src, &mode, &op->reg); |
1329 | if (len) | |
1330 | { | |
1331 | if (mode == A_REG_N) | |
1332 | { | |
1333 | op->type = A_DISP_REG_N; | |
1334 | } | |
1335 | else if (mode == A_GBR) | |
1336 | { | |
1337 | op->type = A_DISP_GBR; | |
1338 | } | |
015551fc | 1339 | else if (mode == A_PC) |
252b5132 | 1340 | { |
dbb4348d JR |
1341 | /* We want @(expr, pc) to uniformly address . + expr, |
1342 | no matter if expr is a constant, or a more complex | |
1343 | expression, e.g. sym-. or sym1-sym2. | |
1344 | However, we also used to accept @(sym,pc) | |
67c1ffbe | 1345 | as addressing sym, i.e. meaning the same as plain sym. |
dbb4348d JR |
1346 | Some existing code does use the @(sym,pc) syntax, so |
1347 | we give it the old semantics for now, but warn about | |
1348 | its use, so that users have some time to fix their code. | |
1349 | ||
1350 | Note that due to this backward compatibility hack, | |
1351 | we'll get unexpected results when @(offset, pc) is used, | |
1352 | and offset is a symbol that is set later to an an address | |
1353 | difference, or an external symbol that is set to an | |
1354 | address difference in another source file, so we want to | |
1355 | eventually remove it. */ | |
9691d64f JR |
1356 | if (op->immediate.X_op == O_symbol) |
1357 | { | |
1358 | op->type = A_DISP_PC; | |
1359 | as_warn (_("Deprecated syntax.")); | |
1360 | } | |
1361 | else | |
1362 | { | |
1363 | op->type = A_DISP_PC_ABS; | |
1364 | /* Such operands don't get corrected for PC==.+4, so | |
1365 | make the correction here. */ | |
1366 | op->immediate.X_add_number -= 4; | |
1367 | } | |
252b5132 RH |
1368 | } |
1369 | else | |
1370 | { | |
1371 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1372 | } | |
1373 | } | |
1374 | else | |
1375 | { | |
1376 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1377 | } | |
1378 | } | |
1379 | src += len; | |
1380 | if (src[0] != ')') | |
1381 | as_bad (_("expecting )")); | |
1382 | else | |
1383 | src++; | |
1384 | } | |
1385 | else | |
1386 | { | |
1387 | src += parse_reg (src, &mode, &(op->reg)); | |
1388 | if (mode != A_REG_N) | |
006299d3 NC |
1389 | as_bad (_("illegal register after @")); |
1390 | ||
252b5132 RH |
1391 | if (src[0] == '+') |
1392 | { | |
1000a02a NC |
1393 | char l0, l1; |
1394 | ||
252b5132 | 1395 | src++; |
1000a02a NC |
1396 | l0 = TOLOWER (src[0]); |
1397 | l1 = TOLOWER (src[1]); | |
1398 | ||
1399 | if ((l0 == 'r' && l1 == '8') | |
1400 | || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) | |
d4845d57 JR |
1401 | { |
1402 | src += 2; | |
88da98f3 | 1403 | op->type = AX_PMOD_N; |
d4845d57 | 1404 | } |
006299d3 NC |
1405 | else if ( (l0 == 'r' && l1 == '9') |
1406 | || (l0 == 'i' && l1 == 'y')) | |
d4845d57 JR |
1407 | { |
1408 | src += 2; | |
88da98f3 | 1409 | op->type = AY_PMOD_N; |
d4845d57 JR |
1410 | } |
1411 | else | |
1412 | op->type = A_INC_N; | |
252b5132 RH |
1413 | } |
1414 | else | |
006299d3 | 1415 | op->type = A_IND_N; |
252b5132 RH |
1416 | } |
1417 | return src; | |
1418 | } | |
1419 | ||
1420 | static void | |
8edc77b9 | 1421 | get_operand (char **ptr, sh_operand_info *op) |
252b5132 RH |
1422 | { |
1423 | char *src = *ptr; | |
1424 | int mode = -1; | |
1425 | unsigned int len; | |
1426 | ||
1427 | if (src[0] == '#') | |
1428 | { | |
1429 | src++; | |
015551fc | 1430 | *ptr = parse_exp (src, op); |
252b5132 RH |
1431 | op->type = A_IMM; |
1432 | return; | |
1433 | } | |
1434 | ||
1435 | else if (src[0] == '@') | |
1436 | { | |
1437 | *ptr = parse_at (src, op); | |
1438 | return; | |
1439 | } | |
1440 | len = parse_reg (src, &mode, &(op->reg)); | |
1441 | if (len) | |
1442 | { | |
1443 | *ptr = src + len; | |
1444 | op->type = mode; | |
1445 | return; | |
1446 | } | |
1447 | else | |
1448 | { | |
6b31947e | 1449 | /* Not a reg, the only thing left is a displacement. */ |
015551fc | 1450 | *ptr = parse_exp (src, op); |
252b5132 RH |
1451 | op->type = A_DISP_PC; |
1452 | return; | |
1453 | } | |
1454 | } | |
1455 | ||
c4aa876b | 1456 | static char * |
8edc77b9 | 1457 | get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) |
252b5132 RH |
1458 | { |
1459 | char *ptr = args; | |
1460 | if (info->arg[0]) | |
1461 | { | |
d4845d57 JR |
1462 | /* The pre-processor will eliminate whitespace in front of '@' |
1463 | after the first argument; we may be called multiple times | |
1464 | from assemble_ppi, so don't insist on finding whitespace here. */ | |
1465 | if (*ptr == ' ') | |
1466 | ptr++; | |
252b5132 RH |
1467 | |
1468 | get_operand (&ptr, operand + 0); | |
1469 | if (info->arg[1]) | |
1470 | { | |
1471 | if (*ptr == ',') | |
1472 | { | |
1473 | ptr++; | |
1474 | } | |
1475 | get_operand (&ptr, operand + 1); | |
52ccafd0 JR |
1476 | /* ??? Hack: psha/pshl have a varying operand number depending on |
1477 | the type of the first operand. We handle this by having the | |
1478 | three-operand version first and reducing the number of operands | |
1479 | parsed to two if we see that the first operand is an immediate. | |
1480 | This works because no insn with three operands has an immediate | |
1481 | as first operand. */ | |
1482 | if (info->arg[2] && operand[0].type != A_IMM) | |
252b5132 RH |
1483 | { |
1484 | if (*ptr == ',') | |
1485 | { | |
1486 | ptr++; | |
1487 | } | |
1488 | get_operand (&ptr, operand + 2); | |
1489 | } | |
1490 | else | |
1491 | { | |
1492 | operand[2].type = 0; | |
1493 | } | |
1494 | } | |
1495 | else | |
1496 | { | |
1497 | operand[1].type = 0; | |
1498 | operand[2].type = 0; | |
1499 | } | |
1500 | } | |
1501 | else | |
1502 | { | |
1503 | operand[0].type = 0; | |
1504 | operand[1].type = 0; | |
1505 | operand[2].type = 0; | |
1506 | } | |
1507 | return ptr; | |
1508 | } | |
1509 | ||
1510 | /* Passed a pointer to a list of opcodes which use different | |
1511 | addressing modes, return the opcode which matches the opcodes | |
6b31947e | 1512 | provided. */ |
252b5132 | 1513 | |
c4aa876b | 1514 | static sh_opcode_info * |
8edc77b9 | 1515 | get_specific (sh_opcode_info *opcode, sh_operand_info *operands) |
252b5132 RH |
1516 | { |
1517 | sh_opcode_info *this_try = opcode; | |
1518 | char *name = opcode->name; | |
1519 | int n = 0; | |
c4aa876b | 1520 | |
252b5132 RH |
1521 | while (opcode->name) |
1522 | { | |
1523 | this_try = opcode++; | |
5ff37431 | 1524 | if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) |
252b5132 RH |
1525 | { |
1526 | /* We've looked so far down the table that we've run out of | |
6b31947e | 1527 | opcodes with the same name. */ |
252b5132 RH |
1528 | return 0; |
1529 | } | |
c4aa876b | 1530 | |
6b31947e | 1531 | /* Look at both operands needed by the opcodes and provided by |
252b5132 RH |
1532 | the user - since an arg test will often fail on the same arg |
1533 | again and again, we'll try and test the last failing arg the | |
6b31947e | 1534 | first on each opcode try. */ |
252b5132 RH |
1535 | for (n = 0; this_try->arg[n]; n++) |
1536 | { | |
1537 | sh_operand_info *user = operands + n; | |
1538 | sh_arg_type arg = this_try->arg[n]; | |
c4aa876b | 1539 | |
252b5132 RH |
1540 | switch (arg) |
1541 | { | |
7679ead9 AO |
1542 | case A_DISP_PC: |
1543 | if (user->type == A_DISP_PC_ABS) | |
1544 | break; | |
1545 | /* Fall through. */ | |
252b5132 RH |
1546 | case A_IMM: |
1547 | case A_BDISP12: | |
1548 | case A_BDISP8: | |
1549 | case A_DISP_GBR: | |
252b5132 RH |
1550 | case A_MACH: |
1551 | case A_PR: | |
1552 | case A_MACL: | |
1553 | if (user->type != arg) | |
1554 | goto fail; | |
1555 | break; | |
1556 | case A_R0: | |
1557 | /* opcode needs r0 */ | |
1558 | if (user->type != A_REG_N || user->reg != 0) | |
1559 | goto fail; | |
1560 | break; | |
1561 | case A_R0_GBR: | |
1562 | if (user->type != A_R0_GBR || user->reg != 0) | |
1563 | goto fail; | |
1564 | break; | |
1565 | case F_FR0: | |
1566 | if (user->type != F_REG_N || user->reg != 0) | |
1567 | goto fail; | |
1568 | break; | |
1569 | ||
1570 | case A_REG_N: | |
1571 | case A_INC_N: | |
1572 | case A_DEC_N: | |
1573 | case A_IND_N: | |
1574 | case A_IND_R0_REG_N: | |
1575 | case A_DISP_REG_N: | |
1576 | case F_REG_N: | |
1577 | case D_REG_N: | |
1578 | case X_REG_N: | |
1579 | case V_REG_N: | |
1580 | case FPUL_N: | |
1581 | case FPSCR_N: | |
d4845d57 | 1582 | case DSP_REG_N: |
252b5132 RH |
1583 | /* Opcode needs rn */ |
1584 | if (user->type != arg) | |
1585 | goto fail; | |
1586 | reg_n = user->reg; | |
1587 | break; | |
252b5132 RH |
1588 | case DX_REG_N: |
1589 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1590 | goto fail; | |
1591 | reg_n = user->reg; | |
1592 | break; | |
1593 | case A_GBR: | |
1594 | case A_SR: | |
1595 | case A_VBR: | |
d4845d57 JR |
1596 | case A_DSR: |
1597 | case A_MOD: | |
1598 | case A_RE: | |
1599 | case A_RS: | |
252b5132 RH |
1600 | case A_SSR: |
1601 | case A_SPC: | |
1602 | case A_SGR: | |
1603 | case A_DBR: | |
1604 | if (user->type != arg) | |
1605 | goto fail; | |
1606 | break; | |
1607 | ||
c4aa876b | 1608 | case A_REG_B: |
252b5132 RH |
1609 | if (user->type != arg) |
1610 | goto fail; | |
1611 | reg_b = user->reg; | |
1612 | break; | |
1613 | ||
1614 | case A_REG_M: | |
1615 | case A_INC_M: | |
1616 | case A_DEC_M: | |
1617 | case A_IND_M: | |
1618 | case A_IND_R0_REG_M: | |
1619 | case A_DISP_REG_M: | |
d4845d57 | 1620 | case DSP_REG_M: |
252b5132 RH |
1621 | /* Opcode needs rn */ |
1622 | if (user->type != arg - A_REG_M + A_REG_N) | |
1623 | goto fail; | |
1624 | reg_m = user->reg; | |
1625 | break; | |
1626 | ||
88da98f3 MS |
1627 | case AS_DEC_N: |
1628 | if (user->type != A_DEC_N) | |
1629 | goto fail; | |
1630 | if (user->reg < 2 || user->reg > 5) | |
1631 | goto fail; | |
1632 | reg_n = user->reg; | |
1633 | break; | |
1634 | ||
1635 | case AS_INC_N: | |
1636 | if (user->type != A_INC_N) | |
1637 | goto fail; | |
1638 | if (user->reg < 2 || user->reg > 5) | |
1639 | goto fail; | |
1640 | reg_n = user->reg; | |
1641 | break; | |
1642 | ||
1643 | case AS_IND_N: | |
1644 | if (user->type != A_IND_N) | |
1645 | goto fail; | |
1646 | if (user->reg < 2 || user->reg > 5) | |
1647 | goto fail; | |
1648 | reg_n = user->reg; | |
1649 | break; | |
1650 | ||
1651 | case AS_PMOD_N: | |
1652 | if (user->type != AX_PMOD_N) | |
1653 | goto fail; | |
1654 | if (user->reg < 2 || user->reg > 5) | |
1655 | goto fail; | |
1656 | reg_n = user->reg; | |
1657 | break; | |
1658 | ||
1659 | case AX_INC_N: | |
1660 | if (user->type != A_INC_N) | |
1661 | goto fail; | |
1662 | if (user->reg < 4 || user->reg > 5) | |
1663 | goto fail; | |
1664 | reg_n = user->reg; | |
1665 | break; | |
1666 | ||
1667 | case AX_IND_N: | |
1668 | if (user->type != A_IND_N) | |
1669 | goto fail; | |
1670 | if (user->reg < 4 || user->reg > 5) | |
1671 | goto fail; | |
1672 | reg_n = user->reg; | |
1673 | break; | |
1674 | ||
1675 | case AX_PMOD_N: | |
1676 | if (user->type != AX_PMOD_N) | |
1677 | goto fail; | |
1678 | if (user->reg < 4 || user->reg > 5) | |
1679 | goto fail; | |
1680 | reg_n = user->reg; | |
1681 | break; | |
1682 | ||
1683 | case AXY_INC_N: | |
1684 | if (user->type != A_INC_N) | |
1685 | goto fail; | |
1686 | if ((user->reg < 4 || user->reg > 5) | |
1687 | && (user->reg < 0 || user->reg > 1)) | |
1688 | goto fail; | |
1689 | reg_n = user->reg; | |
1690 | break; | |
1691 | ||
1692 | case AXY_IND_N: | |
1693 | if (user->type != A_IND_N) | |
1694 | goto fail; | |
1695 | if ((user->reg < 4 || user->reg > 5) | |
1696 | && (user->reg < 0 || user->reg > 1)) | |
1697 | goto fail; | |
1698 | reg_n = user->reg; | |
1699 | break; | |
1700 | ||
1701 | case AXY_PMOD_N: | |
1702 | if (user->type != AX_PMOD_N) | |
1703 | goto fail; | |
1704 | if ((user->reg < 4 || user->reg > 5) | |
1705 | && (user->reg < 0 || user->reg > 1)) | |
1706 | goto fail; | |
1707 | reg_n = user->reg; | |
1708 | break; | |
1709 | ||
1710 | case AY_INC_N: | |
1711 | if (user->type != A_INC_N) | |
1712 | goto fail; | |
1713 | if (user->reg < 6 || user->reg > 7) | |
1714 | goto fail; | |
1715 | reg_n = user->reg; | |
1716 | break; | |
1717 | ||
1718 | case AY_IND_N: | |
1719 | if (user->type != A_IND_N) | |
1720 | goto fail; | |
1721 | if (user->reg < 6 || user->reg > 7) | |
1722 | goto fail; | |
1723 | reg_n = user->reg; | |
1724 | break; | |
1725 | ||
1726 | case AY_PMOD_N: | |
1727 | if (user->type != AY_PMOD_N) | |
1728 | goto fail; | |
1729 | if (user->reg < 6 || user->reg > 7) | |
1730 | goto fail; | |
1731 | reg_n = user->reg; | |
1732 | break; | |
1733 | ||
1734 | case AYX_INC_N: | |
1735 | if (user->type != A_INC_N) | |
1736 | goto fail; | |
1737 | if ((user->reg < 6 || user->reg > 7) | |
1738 | && (user->reg < 2 || user->reg > 3)) | |
1739 | goto fail; | |
1740 | reg_n = user->reg; | |
1741 | break; | |
1742 | ||
1743 | case AYX_IND_N: | |
1744 | if (user->type != A_IND_N) | |
1745 | goto fail; | |
1746 | if ((user->reg < 6 || user->reg > 7) | |
1747 | && (user->reg < 2 || user->reg > 3)) | |
1748 | goto fail; | |
1749 | reg_n = user->reg; | |
1750 | break; | |
1751 | ||
1752 | case AYX_PMOD_N: | |
1753 | if (user->type != AY_PMOD_N) | |
1754 | goto fail; | |
1755 | if ((user->reg < 6 || user->reg > 7) | |
1756 | && (user->reg < 2 || user->reg > 3)) | |
1757 | goto fail; | |
1758 | reg_n = user->reg; | |
1759 | break; | |
1760 | ||
1761 | case DSP_REG_A_M: | |
1762 | if (user->type != DSP_REG_N) | |
1763 | goto fail; | |
1764 | if (user->reg != A_A0_NUM | |
1765 | && user->reg != A_A1_NUM) | |
1766 | goto fail; | |
1767 | reg_m = user->reg; | |
1768 | break; | |
1769 | ||
1770 | case DSP_REG_AX: | |
1771 | if (user->type != DSP_REG_N) | |
1772 | goto fail; | |
1773 | switch (user->reg) | |
1774 | { | |
1775 | case A_A0_NUM: | |
1776 | reg_x = 0; | |
1777 | break; | |
1778 | case A_A1_NUM: | |
1779 | reg_x = 2; | |
1780 | break; | |
1781 | case A_X0_NUM: | |
1782 | reg_x = 1; | |
1783 | break; | |
1784 | case A_X1_NUM: | |
1785 | reg_x = 3; | |
1786 | break; | |
1787 | default: | |
1788 | goto fail; | |
1789 | } | |
1790 | break; | |
1791 | ||
1792 | case DSP_REG_XY: | |
1793 | if (user->type != DSP_REG_N) | |
1794 | goto fail; | |
1795 | switch (user->reg) | |
1796 | { | |
1797 | case A_X0_NUM: | |
1798 | reg_x = 0; | |
1799 | break; | |
1800 | case A_X1_NUM: | |
1801 | reg_x = 2; | |
1802 | break; | |
1803 | case A_Y0_NUM: | |
1804 | reg_x = 1; | |
1805 | break; | |
1806 | case A_Y1_NUM: | |
1807 | reg_x = 3; | |
1808 | break; | |
1809 | default: | |
1810 | goto fail; | |
1811 | } | |
1812 | break; | |
1813 | ||
1814 | case DSP_REG_AY: | |
1815 | if (user->type != DSP_REG_N) | |
1816 | goto fail; | |
1817 | switch (user->reg) | |
1818 | { | |
1819 | case A_A0_NUM: | |
1820 | reg_y = 0; | |
1821 | break; | |
1822 | case A_A1_NUM: | |
1823 | reg_y = 1; | |
1824 | break; | |
1825 | case A_Y0_NUM: | |
1826 | reg_y = 2; | |
1827 | break; | |
1828 | case A_Y1_NUM: | |
1829 | reg_y = 3; | |
1830 | break; | |
1831 | default: | |
1832 | goto fail; | |
1833 | } | |
1834 | break; | |
1835 | ||
1836 | case DSP_REG_YX: | |
1837 | if (user->type != DSP_REG_N) | |
1838 | goto fail; | |
1839 | switch (user->reg) | |
1840 | { | |
1841 | case A_Y0_NUM: | |
1842 | reg_y = 0; | |
1843 | break; | |
1844 | case A_Y1_NUM: | |
1845 | reg_y = 1; | |
1846 | break; | |
1847 | case A_X0_NUM: | |
1848 | reg_y = 2; | |
1849 | break; | |
1850 | case A_X1_NUM: | |
1851 | reg_y = 3; | |
1852 | break; | |
1853 | default: | |
1854 | goto fail; | |
1855 | } | |
1856 | break; | |
1857 | ||
d4845d57 JR |
1858 | case DSP_REG_X: |
1859 | if (user->type != DSP_REG_N) | |
1860 | goto fail; | |
1861 | switch (user->reg) | |
1862 | { | |
1863 | case A_X0_NUM: | |
1864 | reg_x = 0; | |
1865 | break; | |
1866 | case A_X1_NUM: | |
1867 | reg_x = 1; | |
1868 | break; | |
1869 | case A_A0_NUM: | |
1870 | reg_x = 2; | |
1871 | break; | |
1872 | case A_A1_NUM: | |
1873 | reg_x = 3; | |
1874 | break; | |
1875 | default: | |
1876 | goto fail; | |
1877 | } | |
1878 | break; | |
1879 | ||
1880 | case DSP_REG_Y: | |
1881 | if (user->type != DSP_REG_N) | |
1882 | goto fail; | |
1883 | switch (user->reg) | |
1884 | { | |
1885 | case A_Y0_NUM: | |
1886 | reg_y = 0; | |
1887 | break; | |
1888 | case A_Y1_NUM: | |
1889 | reg_y = 1; | |
1890 | break; | |
1891 | case A_M0_NUM: | |
1892 | reg_y = 2; | |
1893 | break; | |
1894 | case A_M1_NUM: | |
1895 | reg_y = 3; | |
1896 | break; | |
1897 | default: | |
1898 | goto fail; | |
1899 | } | |
1900 | break; | |
1901 | ||
1902 | case DSP_REG_E: | |
1903 | if (user->type != DSP_REG_N) | |
1904 | goto fail; | |
1905 | switch (user->reg) | |
1906 | { | |
1907 | case A_X0_NUM: | |
1908 | reg_efg = 0 << 10; | |
1909 | break; | |
1910 | case A_X1_NUM: | |
1911 | reg_efg = 1 << 10; | |
1912 | break; | |
1913 | case A_Y0_NUM: | |
1914 | reg_efg = 2 << 10; | |
1915 | break; | |
1916 | case A_A1_NUM: | |
1917 | reg_efg = 3 << 10; | |
1918 | break; | |
1919 | default: | |
1920 | goto fail; | |
1921 | } | |
1922 | break; | |
1923 | ||
1924 | case DSP_REG_F: | |
1925 | if (user->type != DSP_REG_N) | |
1926 | goto fail; | |
1927 | switch (user->reg) | |
1928 | { | |
1929 | case A_Y0_NUM: | |
1930 | reg_efg |= 0 << 8; | |
1931 | break; | |
1932 | case A_Y1_NUM: | |
1933 | reg_efg |= 1 << 8; | |
1934 | break; | |
1935 | case A_X0_NUM: | |
1936 | reg_efg |= 2 << 8; | |
1937 | break; | |
1938 | case A_A1_NUM: | |
1939 | reg_efg |= 3 << 8; | |
1940 | break; | |
1941 | default: | |
1942 | goto fail; | |
1943 | } | |
1944 | break; | |
1945 | ||
1946 | case DSP_REG_G: | |
1947 | if (user->type != DSP_REG_N) | |
1948 | goto fail; | |
1949 | switch (user->reg) | |
1950 | { | |
1951 | case A_M0_NUM: | |
1952 | reg_efg |= 0 << 2; | |
1953 | break; | |
1954 | case A_M1_NUM: | |
1955 | reg_efg |= 1 << 2; | |
1956 | break; | |
1957 | case A_A0_NUM: | |
1958 | reg_efg |= 2 << 2; | |
1959 | break; | |
1960 | case A_A1_NUM: | |
1961 | reg_efg |= 3 << 2; | |
1962 | break; | |
1963 | default: | |
1964 | goto fail; | |
1965 | } | |
1966 | break; | |
1967 | ||
1968 | case A_A0: | |
1969 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) | |
1970 | goto fail; | |
1971 | break; | |
1972 | case A_X0: | |
1973 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) | |
1974 | goto fail; | |
1975 | break; | |
1976 | case A_X1: | |
1977 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) | |
1978 | goto fail; | |
1979 | break; | |
1980 | case A_Y0: | |
1981 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) | |
1982 | goto fail; | |
1983 | break; | |
1984 | case A_Y1: | |
1985 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) | |
1986 | goto fail; | |
1987 | break; | |
1988 | ||
252b5132 RH |
1989 | case F_REG_M: |
1990 | case D_REG_M: | |
1991 | case X_REG_M: | |
1992 | case V_REG_M: | |
1993 | case FPUL_M: | |
1994 | case FPSCR_M: | |
1995 | /* Opcode needs rn */ | |
1996 | if (user->type != arg - F_REG_M + F_REG_N) | |
1997 | goto fail; | |
1998 | reg_m = user->reg; | |
1999 | break; | |
2000 | case DX_REG_M: | |
2001 | if (user->type != D_REG_N && user->type != X_REG_N) | |
2002 | goto fail; | |
2003 | reg_m = user->reg; | |
2004 | break; | |
2005 | case XMTRX_M4: | |
2006 | if (user->type != XMTRX_M4) | |
2007 | goto fail; | |
2008 | reg_m = 4; | |
2009 | break; | |
c4aa876b | 2010 | |
252b5132 RH |
2011 | default: |
2012 | printf (_("unhandled %d\n"), arg); | |
2013 | goto fail; | |
2014 | } | |
2015 | } | |
a37c8f88 JR |
2016 | if ( !(valid_arch & this_try->arch)) |
2017 | goto fail; | |
d4845d57 | 2018 | valid_arch &= this_try->arch; |
252b5132 | 2019 | return this_try; |
c4aa876b NC |
2020 | fail: |
2021 | ; | |
252b5132 RH |
2022 | } |
2023 | ||
2024 | return 0; | |
2025 | } | |
2026 | ||
252b5132 | 2027 | static void |
8edc77b9 | 2028 | insert (char *where, int how, int pcrel, sh_operand_info *op) |
252b5132 RH |
2029 | { |
2030 | fix_new_exp (frag_now, | |
2031 | where - frag_now->fr_literal, | |
2032 | 2, | |
015551fc | 2033 | &op->immediate, |
252b5132 RH |
2034 | pcrel, |
2035 | how); | |
2036 | } | |
2037 | ||
2038 | static void | |
8edc77b9 | 2039 | build_relax (sh_opcode_info *opcode, sh_operand_info *op) |
252b5132 RH |
2040 | { |
2041 | int high_byte = target_big_endian ? 0 : 1; | |
2042 | char *p; | |
2043 | ||
2044 | if (opcode->arg[0] == A_BDISP8) | |
2045 | { | |
2046 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; | |
2047 | p = frag_var (rs_machine_dependent, | |
2048 | md_relax_table[C (what, COND32)].rlx_length, | |
2049 | md_relax_table[C (what, COND8)].rlx_length, | |
2050 | C (what, 0), | |
015551fc JR |
2051 | op->immediate.X_add_symbol, |
2052 | op->immediate.X_add_number, | |
252b5132 RH |
2053 | 0); |
2054 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); | |
2055 | } | |
2056 | else if (opcode->arg[0] == A_BDISP12) | |
2057 | { | |
2058 | p = frag_var (rs_machine_dependent, | |
2059 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
2060 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, | |
2061 | C (UNCOND_JUMP, 0), | |
015551fc JR |
2062 | op->immediate.X_add_symbol, |
2063 | op->immediate.X_add_number, | |
252b5132 RH |
2064 | 0); |
2065 | p[high_byte] = (opcode->nibbles[0] << 4); | |
2066 | } | |
2067 | ||
2068 | } | |
2069 | ||
6b31947e | 2070 | /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ |
d67b5d6d | 2071 | |
015551fc | 2072 | static char * |
8edc77b9 | 2073 | insert_loop_bounds (char *output, sh_operand_info *operand) |
015551fc JR |
2074 | { |
2075 | char *name; | |
2076 | symbolS *end_sym; | |
2077 | ||
2078 | /* Since the low byte of the opcode will be overwritten by the reloc, we | |
2079 | can just stash the high byte into both bytes and ignore endianness. */ | |
2080 | output[0] = 0x8c; | |
2081 | output[1] = 0x8c; | |
2082 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
2083 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
2084 | ||
2085 | if (sh_relax) | |
2086 | { | |
2087 | static int count = 0; | |
2088 | ||
2089 | /* If the last loop insn is a two-byte-insn, it is in danger of being | |
2090 | swapped with the insn after it. To prevent this, create a new | |
2091 | symbol - complete with SH_LABEL reloc - after the last loop insn. | |
2092 | If the last loop insn is four bytes long, the symbol will be | |
2093 | right in the middle, but four byte insns are not swapped anyways. */ | |
2094 | /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. | |
2095 | Hence a 9 digit number should be enough to count all REPEATs. */ | |
2096 | name = alloca (11); | |
2097 | sprintf (name, "_R%x", count++ & 0x3fffffff); | |
c4aa876b | 2098 | end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); |
015551fc JR |
2099 | /* Make this a local symbol. */ |
2100 | #ifdef OBJ_COFF | |
2101 | SF_SET_LOCAL (end_sym); | |
2102 | #endif /* OBJ_COFF */ | |
2103 | symbol_table_insert (end_sym); | |
2104 | end_sym->sy_value = operand[1].immediate; | |
2105 | end_sym->sy_value.X_add_number += 2; | |
2106 | fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); | |
2107 | } | |
2108 | ||
2109 | output = frag_more (2); | |
2110 | output[0] = 0x8e; | |
2111 | output[1] = 0x8e; | |
2112 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
2113 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
2114 | ||
2115 | return frag_more (2); | |
2116 | } | |
2117 | ||
d67b5d6d | 2118 | /* Now we know what sort of opcodes it is, let's build the bytes. */ |
6b31947e | 2119 | |
0d10e182 | 2120 | static unsigned int |
8edc77b9 | 2121 | build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) |
252b5132 RH |
2122 | { |
2123 | int index; | |
2124 | char nbuf[4]; | |
2125 | char *output = frag_more (2); | |
0d10e182 | 2126 | unsigned int size = 2; |
252b5132 RH |
2127 | int low_byte = target_big_endian ? 1 : 0; |
2128 | nbuf[0] = 0; | |
2129 | nbuf[1] = 0; | |
2130 | nbuf[2] = 0; | |
2131 | nbuf[3] = 0; | |
2132 | ||
2133 | for (index = 0; index < 4; index++) | |
2134 | { | |
2135 | sh_nibble_type i = opcode->nibbles[index]; | |
2136 | if (i < 16) | |
2137 | { | |
2138 | nbuf[index] = i; | |
2139 | } | |
2140 | else | |
2141 | { | |
2142 | switch (i) | |
2143 | { | |
2144 | case REG_N: | |
6a5709a5 | 2145 | case REG_N_D: |
252b5132 RH |
2146 | nbuf[index] = reg_n; |
2147 | break; | |
2148 | case REG_M: | |
2149 | nbuf[index] = reg_m; | |
2150 | break; | |
d4845d57 JR |
2151 | case SDT_REG_N: |
2152 | if (reg_n < 2 || reg_n > 5) | |
2153 | as_bad (_("Invalid register: 'r%d'"), reg_n); | |
2154 | nbuf[index] = (reg_n & 3) | 4; | |
2155 | break; | |
252b5132 RH |
2156 | case REG_NM: |
2157 | nbuf[index] = reg_n | (reg_m >> 2); | |
2158 | break; | |
c4aa876b | 2159 | case REG_B: |
252b5132 RH |
2160 | nbuf[index] = reg_b | 0x08; |
2161 | break; | |
6a5709a5 JR |
2162 | case REG_N_B01: |
2163 | nbuf[index] = reg_n | 0x01; | |
2164 | break; | |
015551fc JR |
2165 | case IMM0_4BY4: |
2166 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); | |
2167 | break; | |
2168 | case IMM0_4BY2: | |
2169 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); | |
2170 | break; | |
2171 | case IMM0_4: | |
2172 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); | |
2173 | break; | |
2174 | case IMM1_4BY4: | |
2175 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); | |
2176 | break; | |
2177 | case IMM1_4BY2: | |
2178 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); | |
252b5132 | 2179 | break; |
015551fc JR |
2180 | case IMM1_4: |
2181 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); | |
252b5132 | 2182 | break; |
015551fc JR |
2183 | case IMM0_8BY4: |
2184 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); | |
252b5132 | 2185 | break; |
015551fc JR |
2186 | case IMM0_8BY2: |
2187 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); | |
252b5132 | 2188 | break; |
015551fc JR |
2189 | case IMM0_8: |
2190 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); | |
252b5132 | 2191 | break; |
015551fc JR |
2192 | case IMM1_8BY4: |
2193 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); | |
252b5132 | 2194 | break; |
015551fc JR |
2195 | case IMM1_8BY2: |
2196 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); | |
2197 | break; | |
2198 | case IMM1_8: | |
2199 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); | |
252b5132 RH |
2200 | break; |
2201 | case PCRELIMM_8BY4: | |
7679ead9 AO |
2202 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, |
2203 | operand->type != A_DISP_PC_ABS, operand); | |
252b5132 RH |
2204 | break; |
2205 | case PCRELIMM_8BY2: | |
7679ead9 AO |
2206 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, |
2207 | operand->type != A_DISP_PC_ABS, operand); | |
015551fc JR |
2208 | break; |
2209 | case REPEAT: | |
2210 | output = insert_loop_bounds (output, operand); | |
2211 | nbuf[index] = opcode->nibbles[3]; | |
2212 | operand += 2; | |
252b5132 RH |
2213 | break; |
2214 | default: | |
2215 | printf (_("failed for %d\n"), i); | |
2216 | } | |
2217 | } | |
2218 | } | |
c4aa876b NC |
2219 | if (!target_big_endian) |
2220 | { | |
2221 | output[1] = (nbuf[0] << 4) | (nbuf[1]); | |
2222 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
2223 | } | |
2224 | else | |
2225 | { | |
2226 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
2227 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
2228 | } | |
0d10e182 | 2229 | return size; |
252b5132 RH |
2230 | } |
2231 | ||
d4845d57 JR |
2232 | /* Find an opcode at the start of *STR_P in the hash table, and set |
2233 | *STR_P to the first character after the last one read. */ | |
252b5132 | 2234 | |
d4845d57 | 2235 | static sh_opcode_info * |
8edc77b9 | 2236 | find_cooked_opcode (char **str_p) |
252b5132 | 2237 | { |
d4845d57 | 2238 | char *str = *str_p; |
252b5132 RH |
2239 | unsigned char *op_start; |
2240 | unsigned char *op_end; | |
252b5132 RH |
2241 | char name[20]; |
2242 | int nlen = 0; | |
c4aa876b | 2243 | |
6b31947e | 2244 | /* Drop leading whitespace. */ |
252b5132 RH |
2245 | while (*str == ' ') |
2246 | str++; | |
2247 | ||
d4845d57 JR |
2248 | /* Find the op code end. |
2249 | The pre-processor will eliminate whitespace in front of | |
2250 | any '@' after the first argument; we may be called from | |
2251 | assemble_ppi, so the opcode might be terminated by an '@'. */ | |
252b5132 RH |
2252 | for (op_start = op_end = (unsigned char *) (str); |
2253 | *op_end | |
2254 | && nlen < 20 | |
d4845d57 | 2255 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
252b5132 RH |
2256 | op_end++) |
2257 | { | |
2258 | unsigned char c = op_start[nlen]; | |
2259 | ||
2260 | /* The machine independent code will convert CMP/EQ into cmp/EQ | |
d4845d57 JR |
2261 | because it thinks the '/' is the end of the symbol. Moreover, |
2262 | all but the first sub-insn is a parallel processing insn won't | |
3882b010 | 2263 | be capitalized. Instead of hacking up the machine independent |
d4845d57 | 2264 | code, we just deal with it here. */ |
3882b010 | 2265 | c = TOLOWER (c); |
252b5132 RH |
2266 | name[nlen] = c; |
2267 | nlen++; | |
2268 | } | |
c4aa876b | 2269 | |
252b5132 | 2270 | name[nlen] = 0; |
d4845d57 | 2271 | *str_p = op_end; |
252b5132 RH |
2272 | |
2273 | if (nlen == 0) | |
6b31947e | 2274 | as_bad (_("can't find opcode ")); |
252b5132 | 2275 | |
d4845d57 JR |
2276 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
2277 | } | |
2278 | ||
2279 | /* Assemble a parallel processing insn. */ | |
2280 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ | |
6b31947e | 2281 | |
0d10e182 | 2282 | static unsigned int |
8edc77b9 | 2283 | assemble_ppi (char *op_end, sh_opcode_info *opcode) |
d4845d57 JR |
2284 | { |
2285 | int movx = 0; | |
2286 | int movy = 0; | |
2287 | int cond = 0; | |
2288 | int field_b = 0; | |
2289 | char *output; | |
2290 | int move_code; | |
0d10e182 | 2291 | unsigned int size; |
d4845d57 | 2292 | |
d4845d57 JR |
2293 | for (;;) |
2294 | { | |
2295 | sh_operand_info operand[3]; | |
2296 | ||
ac62e7a3 JR |
2297 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. |
2298 | Make sure we encode a defined insn pattern. */ | |
2299 | reg_x = 0; | |
2300 | reg_y = 0; | |
2301 | reg_n = 0; | |
2302 | ||
d4845d57 JR |
2303 | if (opcode->arg[0] != A_END) |
2304 | op_end = get_operands (opcode, op_end, operand); | |
88da98f3 | 2305 | try_another_opcode: |
d4845d57 JR |
2306 | opcode = get_specific (opcode, operand); |
2307 | if (opcode == 0) | |
2308 | { | |
6b31947e | 2309 | /* Couldn't find an opcode which matched the operands. */ |
d4845d57 | 2310 | char *where = frag_more (2); |
0d10e182 | 2311 | size = 2; |
d4845d57 JR |
2312 | |
2313 | where[0] = 0x0; | |
2314 | where[1] = 0x0; | |
2315 | as_bad (_("invalid operands for opcode")); | |
0d10e182 | 2316 | return size; |
d4845d57 | 2317 | } |
c4aa876b | 2318 | |
d4845d57 JR |
2319 | if (opcode->nibbles[0] != PPI) |
2320 | as_bad (_("insn can't be combined with parallel processing insn")); | |
2321 | ||
2322 | switch (opcode->nibbles[1]) | |
2323 | { | |
2324 | ||
2325 | case NOPX: | |
2326 | if (movx) | |
2327 | as_bad (_("multiple movx specifications")); | |
2328 | movx = DDT_BASE; | |
2329 | break; | |
2330 | case NOPY: | |
2331 | if (movy) | |
2332 | as_bad (_("multiple movy specifications")); | |
2333 | movy = DDT_BASE; | |
2334 | break; | |
2335 | ||
88da98f3 MS |
2336 | case MOVX_NOPY: |
2337 | if (movx) | |
2338 | as_bad (_("multiple movx specifications")); | |
2339 | if ((reg_n < 4 || reg_n > 5) | |
2340 | && (reg_n < 0 || reg_n > 1)) | |
2341 | as_bad (_("invalid movx address register")); | |
2342 | if (movy && movy != DDT_BASE) | |
2343 | as_bad (_("insn cannot be combined with non-nopy")); | |
2344 | movx = ((((reg_n & 1) != 0) << 9) | |
2345 | + (((reg_n & 4) == 0) << 8) | |
2346 | + (reg_x << 6) | |
2347 | + (opcode->nibbles[2] << 4) | |
2348 | + opcode->nibbles[3] | |
2349 | + DDT_BASE); | |
2350 | break; | |
2351 | ||
2352 | case MOVY_NOPX: | |
2353 | if (movy) | |
2354 | as_bad (_("multiple movy specifications")); | |
2355 | if ((reg_n < 6 || reg_n > 7) | |
2356 | && (reg_n < 2 || reg_n > 3)) | |
2357 | as_bad (_("invalid movy address register")); | |
2358 | if (movx && movx != DDT_BASE) | |
2359 | as_bad (_("insn cannot be combined with non-nopx")); | |
2360 | movy = ((((reg_n & 1) != 0) << 8) | |
2361 | + (((reg_n & 4) == 0) << 9) | |
2362 | + (reg_y << 6) | |
2363 | + (opcode->nibbles[2] << 4) | |
2364 | + opcode->nibbles[3] | |
2365 | + DDT_BASE); | |
2366 | break; | |
2367 | ||
d4845d57 JR |
2368 | case MOVX: |
2369 | if (movx) | |
2370 | as_bad (_("multiple movx specifications")); | |
88da98f3 MS |
2371 | if (movy & 0x2ac) |
2372 | as_bad (_("previous movy requires nopx")); | |
d4845d57 JR |
2373 | if (reg_n < 4 || reg_n > 5) |
2374 | as_bad (_("invalid movx address register")); | |
2375 | if (opcode->nibbles[2] & 8) | |
2376 | { | |
2377 | if (reg_m == A_A1_NUM) | |
2378 | movx = 1 << 7; | |
2379 | else if (reg_m != A_A0_NUM) | |
2380 | as_bad (_("invalid movx dsp register")); | |
2381 | } | |
2382 | else | |
2383 | { | |
2384 | if (reg_x > 1) | |
2385 | as_bad (_("invalid movx dsp register")); | |
2386 | movx = reg_x << 7; | |
2387 | } | |
2388 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; | |
2389 | break; | |
2390 | ||
2391 | case MOVY: | |
2392 | if (movy) | |
2393 | as_bad (_("multiple movy specifications")); | |
88da98f3 MS |
2394 | if (movx & 0x153) |
2395 | as_bad (_("previous movx requires nopy")); | |
d4845d57 JR |
2396 | if (opcode->nibbles[2] & 8) |
2397 | { | |
2398 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, | |
2399 | so add 8 more. */ | |
2400 | movy = 8; | |
2401 | if (reg_m == A_A1_NUM) | |
2402 | movy += 1 << 6; | |
2403 | else if (reg_m != A_A0_NUM) | |
2404 | as_bad (_("invalid movy dsp register")); | |
2405 | } | |
2406 | else | |
2407 | { | |
2408 | if (reg_y > 1) | |
2409 | as_bad (_("invalid movy dsp register")); | |
2410 | movy = reg_y << 6; | |
2411 | } | |
2412 | if (reg_n < 6 || reg_n > 7) | |
2413 | as_bad (_("invalid movy address register")); | |
2414 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; | |
2415 | break; | |
2416 | ||
2417 | case PSH: | |
015551fc | 2418 | if (operand[0].immediate.X_op != O_constant) |
d4845d57 JR |
2419 | as_bad (_("dsp immediate shift value not constant")); |
2420 | field_b = ((opcode->nibbles[2] << 12) | |
015551fc | 2421 | | (operand[0].immediate.X_add_number & 127) << 4 |
d4845d57 JR |
2422 | | reg_n); |
2423 | break; | |
88da98f3 MS |
2424 | case PPI3NC: |
2425 | if (cond) | |
2426 | { | |
2427 | opcode++; | |
2428 | goto try_another_opcode; | |
2429 | } | |
2430 | /* Fall through. */ | |
d4845d57 JR |
2431 | case PPI3: |
2432 | if (field_b) | |
2433 | as_bad (_("multiple parallel processing specifications")); | |
2434 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2435 | + (reg_x << 6) + (reg_y << 4) + reg_n); | |
88da98f3 MS |
2436 | switch (opcode->nibbles[4]) |
2437 | { | |
2438 | case HEX_0: | |
2439 | case HEX_XX00: | |
2440 | case HEX_00YY: | |
2441 | break; | |
2442 | case HEX_1: | |
2443 | case HEX_4: | |
2444 | field_b += opcode->nibbles[4] << 4; | |
2445 | break; | |
2446 | default: | |
2447 | abort (); | |
2448 | } | |
d4845d57 JR |
2449 | break; |
2450 | case PDC: | |
2451 | if (cond) | |
2452 | as_bad (_("multiple condition specifications")); | |
2453 | cond = opcode->nibbles[2] << 8; | |
2454 | if (*op_end) | |
2455 | goto skip_cond_check; | |
2456 | break; | |
2457 | case PPIC: | |
2458 | if (field_b) | |
2459 | as_bad (_("multiple parallel processing specifications")); | |
2460 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2461 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); | |
2462 | cond = 0; | |
88da98f3 MS |
2463 | switch (opcode->nibbles[4]) |
2464 | { | |
2465 | case HEX_0: | |
2466 | case HEX_XX00: | |
2467 | case HEX_00YY: | |
2468 | break; | |
2469 | case HEX_1: | |
2470 | case HEX_4: | |
2471 | field_b += opcode->nibbles[4] << 4; | |
2472 | break; | |
2473 | default: | |
2474 | abort (); | |
2475 | } | |
d4845d57 JR |
2476 | break; |
2477 | case PMUL: | |
2478 | if (field_b) | |
2479 | { | |
88da98f3 MS |
2480 | if ((field_b & 0xef00) == 0xa100) |
2481 | field_b -= 0x8100; | |
2482 | /* pclr Dz pmuls Se,Sf,Dg */ | |
2483 | else if ((field_b & 0xff00) == 0x8d00 | |
2484 | && (valid_arch & arch_sh4al_dsp_up)) | |
2485 | { | |
2486 | valid_arch &= arch_sh4al_dsp_up; | |
2487 | field_b -= 0x8cf0; | |
2488 | } | |
2489 | else | |
d4845d57 | 2490 | as_bad (_("insn cannot be combined with pmuls")); |
d4845d57 JR |
2491 | switch (field_b & 0xf) |
2492 | { | |
2493 | case A_X0_NUM: | |
2494 | field_b += 0 - A_X0_NUM; | |
2495 | break; | |
2496 | case A_Y0_NUM: | |
2497 | field_b += 1 - A_Y0_NUM; | |
2498 | break; | |
2499 | case A_A0_NUM: | |
2500 | field_b += 2 - A_A0_NUM; | |
2501 | break; | |
2502 | case A_A1_NUM: | |
2503 | field_b += 3 - A_A1_NUM; | |
2504 | break; | |
2505 | default: | |
88da98f3 | 2506 | as_bad (_("bad combined pmuls output operand")); |
d4845d57 | 2507 | } |
7dd04abd JR |
2508 | /* Generate warning if the destination register for padd / psub |
2509 | and pmuls is the same ( only for A0 or A1 ). | |
2510 | If the last nibble is 1010 then A0 is used in both | |
2511 | padd / psub and pmuls. If it is 1111 then A1 is used | |
2512 | as destination register in both padd / psub and pmuls. */ | |
5db33d76 JR |
2513 | |
2514 | if ((((field_b | reg_efg) & 0x000F) == 0x000A) | |
2515 | || (((field_b | reg_efg) & 0x000F) == 0x000F)) | |
2516 | as_warn (_("destination register is same for parallel insns")); | |
d4845d57 JR |
2517 | } |
2518 | field_b += 0x4000 + reg_efg; | |
2519 | break; | |
2520 | default: | |
2521 | abort (); | |
2522 | } | |
2523 | if (cond) | |
2524 | { | |
2525 | as_bad (_("condition not followed by conditionalizable insn")); | |
2526 | cond = 0; | |
2527 | } | |
2528 | if (! *op_end) | |
2529 | break; | |
2530 | skip_cond_check: | |
2531 | opcode = find_cooked_opcode (&op_end); | |
2532 | if (opcode == NULL) | |
2533 | { | |
2534 | (as_bad | |
2535 | (_("unrecognized characters at end of parallel processing insn"))); | |
2536 | break; | |
2537 | } | |
2538 | } | |
2539 | ||
2540 | move_code = movx | movy; | |
2541 | if (field_b) | |
2542 | { | |
2543 | /* Parallel processing insn. */ | |
2544 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; | |
2545 | ||
2546 | output = frag_more (4); | |
0d10e182 | 2547 | size = 4; |
d4845d57 JR |
2548 | if (! target_big_endian) |
2549 | { | |
2550 | output[3] = ppi_code >> 8; | |
2551 | output[2] = ppi_code; | |
2552 | } | |
2553 | else | |
2554 | { | |
2555 | output[2] = ppi_code >> 8; | |
2556 | output[3] = ppi_code; | |
2557 | } | |
2558 | move_code |= 0xf800; | |
2559 | } | |
2560 | else | |
0d10e182 JL |
2561 | { |
2562 | /* Just a double data transfer. */ | |
2563 | output = frag_more (2); | |
2564 | size = 2; | |
2565 | } | |
d4845d57 JR |
2566 | if (! target_big_endian) |
2567 | { | |
2568 | output[1] = move_code >> 8; | |
2569 | output[0] = move_code; | |
2570 | } | |
2571 | else | |
2572 | { | |
2573 | output[0] = move_code >> 8; | |
2574 | output[1] = move_code; | |
2575 | } | |
0d10e182 | 2576 | return size; |
d4845d57 JR |
2577 | } |
2578 | ||
2579 | /* This is the guts of the machine-dependent assembler. STR points to a | |
2580 | machine dependent instruction. This function is supposed to emit | |
6b31947e | 2581 | the frags/bytes it assembles to. */ |
d4845d57 JR |
2582 | |
2583 | void | |
8edc77b9 | 2584 | md_assemble (char *str) |
d4845d57 JR |
2585 | { |
2586 | unsigned char *op_end; | |
2587 | sh_operand_info operand[3]; | |
2588 | sh_opcode_info *opcode; | |
dda5ecfc | 2589 | unsigned int size = 0; |
d4845d57 | 2590 | |
324bfcf3 AO |
2591 | #ifdef HAVE_SH64 |
2592 | if (sh64_isa_mode == sh64_isa_shmedia) | |
2593 | { | |
2594 | shmedia_md_assemble (str); | |
2595 | return; | |
2596 | } | |
2597 | else | |
2598 | { | |
2599 | /* If we've seen pseudo-directives, make sure any emitted data or | |
2600 | frags are marked as data. */ | |
b34976b6 | 2601 | if (!seen_insn) |
324bfcf3 | 2602 | { |
b34976b6 | 2603 | sh64_update_contents_mark (TRUE); |
324bfcf3 AO |
2604 | sh64_set_contents_type (CRT_SH5_ISA16); |
2605 | } | |
2606 | ||
b34976b6 | 2607 | seen_insn = TRUE; |
324bfcf3 AO |
2608 | } |
2609 | #endif /* HAVE_SH64 */ | |
2610 | ||
d4845d57 JR |
2611 | opcode = find_cooked_opcode (&str); |
2612 | op_end = str; | |
252b5132 RH |
2613 | |
2614 | if (opcode == NULL) | |
2615 | { | |
2616 | as_bad (_("unknown opcode")); | |
2617 | return; | |
2618 | } | |
2619 | ||
2620 | if (sh_relax | |
2621 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
2622 | { | |
2623 | /* Output a CODE reloc to tell the linker that the following | |
2624 | bytes are instructions, not data. */ | |
2625 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2626 | BFD_RELOC_SH_CODE); | |
2627 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; | |
2628 | } | |
2629 | ||
d4845d57 JR |
2630 | if (opcode->nibbles[0] == PPI) |
2631 | { | |
0d10e182 | 2632 | size = assemble_ppi (op_end, opcode); |
252b5132 RH |
2633 | } |
2634 | else | |
2635 | { | |
0d10e182 JL |
2636 | if (opcode->arg[0] == A_BDISP12 |
2637 | || opcode->arg[0] == A_BDISP8) | |
252b5132 | 2638 | { |
26c9b704 JR |
2639 | /* Since we skip get_specific here, we have to check & update |
2640 | valid_arch now. */ | |
2641 | if (valid_arch & opcode->arch) | |
2642 | valid_arch &= opcode->arch; | |
2643 | else | |
2644 | as_bad (_("Delayed branches not available on SH1")); | |
0d10e182 JL |
2645 | parse_exp (op_end + 1, &operand[0]); |
2646 | build_relax (opcode, &operand[0]); | |
5fc44b2d JR |
2647 | } |
2648 | else | |
2649 | { | |
0d10e182 JL |
2650 | if (opcode->arg[0] == A_END) |
2651 | { | |
2652 | /* Ignore trailing whitespace. If there is any, it has already | |
2653 | been compressed to a single space. */ | |
2654 | if (*op_end == ' ') | |
2655 | op_end++; | |
2656 | } | |
2657 | else | |
2658 | { | |
2659 | op_end = get_operands (opcode, op_end, operand); | |
2660 | } | |
2661 | opcode = get_specific (opcode, operand); | |
252b5132 | 2662 | |
0d10e182 JL |
2663 | if (opcode == 0) |
2664 | { | |
2665 | /* Couldn't find an opcode which matched the operands. */ | |
2666 | char *where = frag_more (2); | |
2667 | size = 2; | |
252b5132 | 2668 | |
0d10e182 JL |
2669 | where[0] = 0x0; |
2670 | where[1] = 0x0; | |
2671 | as_bad (_("invalid operands for opcode")); | |
2672 | } | |
2673 | else | |
2674 | { | |
2675 | if (*op_end) | |
2676 | as_bad (_("excess operands: '%s'"), op_end); | |
2677 | ||
2678 | size = build_Mytes (opcode, operand); | |
2679 | } | |
252b5132 | 2680 | } |
0d10e182 | 2681 | } |
252b5132 | 2682 | |
2bc0a128 | 2683 | #ifdef BFD_ASSEMBLER |
4dc7ead9 | 2684 | dwarf2_emit_insn (size); |
2bc0a128 | 2685 | #endif |
252b5132 RH |
2686 | } |
2687 | ||
2688 | /* This routine is called each time a label definition is seen. It | |
2689 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ | |
2690 | ||
2691 | void | |
8edc77b9 | 2692 | sh_frob_label (void) |
252b5132 RH |
2693 | { |
2694 | static fragS *last_label_frag; | |
2695 | static int last_label_offset; | |
2696 | ||
2697 | if (sh_relax | |
2698 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
2699 | { | |
2700 | int offset; | |
2701 | ||
2702 | offset = frag_now_fix (); | |
2703 | if (frag_now != last_label_frag | |
2704 | || offset != last_label_offset) | |
c4aa876b | 2705 | { |
252b5132 RH |
2706 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); |
2707 | last_label_frag = frag_now; | |
2708 | last_label_offset = offset; | |
2709 | } | |
2710 | } | |
2711 | } | |
2712 | ||
2713 | /* This routine is called when the assembler is about to output some | |
2714 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ | |
2715 | ||
2716 | void | |
8edc77b9 | 2717 | sh_flush_pending_output (void) |
252b5132 RH |
2718 | { |
2719 | if (sh_relax | |
2720 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
2721 | { | |
2722 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2723 | BFD_RELOC_SH_DATA); | |
2724 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; | |
2725 | } | |
2726 | } | |
2727 | ||
2728 | symbolS * | |
8edc77b9 | 2729 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
2730 | { |
2731 | return 0; | |
2732 | } | |
2733 | ||
2734 | #ifdef OBJ_COFF | |
056350c6 | 2735 | #ifndef BFD_ASSEMBLER |
252b5132 RH |
2736 | |
2737 | void | |
8edc77b9 | 2738 | tc_crawl_symbol_chain (object_headers *headers ATTRIBUTE_UNUSED) |
252b5132 RH |
2739 | { |
2740 | printf (_("call to tc_crawl_symbol_chain \n")); | |
2741 | } | |
2742 | ||
2743 | void | |
8edc77b9 | 2744 | tc_headers_hook (object_headers *headers ATTRIBUTE_UNUSED) |
252b5132 RH |
2745 | { |
2746 | printf (_("call to tc_headers_hook \n")); | |
2747 | } | |
2748 | ||
056350c6 | 2749 | #endif |
252b5132 RH |
2750 | #endif |
2751 | ||
6b31947e NC |
2752 | /* Various routines to kill one day. */ |
2753 | /* Equal to MAX_PRECISION in atof-ieee.c. */ | |
252b5132 RH |
2754 | #define MAX_LITTLENUMS 6 |
2755 | ||
6b31947e NC |
2756 | /* Turn a string in input_line_pointer into a floating point constant |
2757 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
2758 | of LITTLENUMS emitted is stored in *SIZEP . An error message is | |
2759 | returned, or NULL on OK. */ | |
2760 | ||
252b5132 | 2761 | char * |
8edc77b9 | 2762 | md_atof (int type, char *litP, int *sizeP) |
252b5132 RH |
2763 | { |
2764 | int prec; | |
2765 | LITTLENUM_TYPE words[4]; | |
2766 | char *t; | |
2767 | int i; | |
2768 | ||
2769 | switch (type) | |
2770 | { | |
2771 | case 'f': | |
2772 | prec = 2; | |
2773 | break; | |
2774 | ||
2775 | case 'd': | |
2776 | prec = 4; | |
2777 | break; | |
2778 | ||
2779 | default: | |
2780 | *sizeP = 0; | |
2781 | return _("bad call to md_atof"); | |
2782 | } | |
2783 | ||
2784 | t = atof_ieee (input_line_pointer, type, words); | |
2785 | if (t) | |
2786 | input_line_pointer = t; | |
2787 | ||
2788 | *sizeP = prec * 2; | |
2789 | ||
2790 | if (! target_big_endian) | |
2791 | { | |
2792 | for (i = prec - 1; i >= 0; i--) | |
2793 | { | |
2794 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2795 | litP += 2; | |
2796 | } | |
2797 | } | |
2798 | else | |
2799 | { | |
2800 | for (i = 0; i < prec; i++) | |
2801 | { | |
2802 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2803 | litP += 2; | |
2804 | } | |
2805 | } | |
c4aa876b | 2806 | |
252b5132 RH |
2807 | return NULL; |
2808 | } | |
2809 | ||
2810 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a | |
2811 | call instruction. It refers to a label of the instruction which | |
2812 | loads the register which the call uses. We use it to generate a | |
2813 | special reloc for the linker. */ | |
2814 | ||
2815 | static void | |
8edc77b9 | 2816 | s_uses (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
2817 | { |
2818 | expressionS ex; | |
2819 | ||
2820 | if (! sh_relax) | |
2821 | as_warn (_(".uses pseudo-op seen when not relaxing")); | |
2822 | ||
2823 | expression (&ex); | |
2824 | ||
2825 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
2826 | { | |
2827 | as_bad (_("bad .uses format")); | |
2828 | ignore_rest_of_line (); | |
2829 | return; | |
2830 | } | |
2831 | ||
2832 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); | |
2833 | ||
2834 | demand_empty_rest_of_line (); | |
2835 | } | |
2836 | \f | |
5a38dc70 | 2837 | const char *md_shortopts = ""; |
6b31947e NC |
2838 | struct option md_longopts[] = |
2839 | { | |
252b5132 | 2840 | #define OPTION_RELAX (OPTION_MD_BASE) |
05982cac HPN |
2841 | #define OPTION_BIG (OPTION_MD_BASE + 1) |
2842 | #define OPTION_LITTLE (OPTION_BIG + 1) | |
252b5132 | 2843 | #define OPTION_SMALL (OPTION_LITTLE + 1) |
d4845d57 | 2844 | #define OPTION_DSP (OPTION_SMALL + 1) |
bdfaef52 | 2845 | #define OPTION_ISA (OPTION_DSP + 1) |
252b5132 RH |
2846 | |
2847 | {"relax", no_argument, NULL, OPTION_RELAX}, | |
05982cac | 2848 | {"big", no_argument, NULL, OPTION_BIG}, |
252b5132 RH |
2849 | {"little", no_argument, NULL, OPTION_LITTLE}, |
2850 | {"small", no_argument, NULL, OPTION_SMALL}, | |
d4845d57 | 2851 | {"dsp", no_argument, NULL, OPTION_DSP}, |
bdfaef52 | 2852 | {"isa", required_argument, NULL, OPTION_ISA}, |
324bfcf3 | 2853 | #ifdef HAVE_SH64 |
324bfcf3 AO |
2854 | #define OPTION_ABI (OPTION_ISA + 1) |
2855 | #define OPTION_NO_MIX (OPTION_ABI + 1) | |
2856 | #define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1) | |
2857 | #define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1) | |
2858 | #define OPTION_PT32 (OPTION_NO_EXPAND + 1) | |
324bfcf3 AO |
2859 | {"abi", required_argument, NULL, OPTION_ABI}, |
2860 | {"no-mix", no_argument, NULL, OPTION_NO_MIX}, | |
2861 | {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE}, | |
2862 | {"no-expand", no_argument, NULL, OPTION_NO_EXPAND}, | |
2863 | {"expand-pt32", no_argument, NULL, OPTION_PT32}, | |
2864 | #endif /* HAVE_SH64 */ | |
2865 | ||
252b5132 RH |
2866 | {NULL, no_argument, NULL, 0} |
2867 | }; | |
c4aa876b | 2868 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
2869 | |
2870 | int | |
8edc77b9 | 2871 | md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) |
252b5132 RH |
2872 | { |
2873 | switch (c) | |
2874 | { | |
2875 | case OPTION_RELAX: | |
2876 | sh_relax = 1; | |
2877 | break; | |
2878 | ||
05982cac HPN |
2879 | case OPTION_BIG: |
2880 | target_big_endian = 1; | |
2881 | break; | |
2882 | ||
252b5132 | 2883 | case OPTION_LITTLE: |
252b5132 RH |
2884 | target_big_endian = 0; |
2885 | break; | |
2886 | ||
2887 | case OPTION_SMALL: | |
2888 | sh_small = 1; | |
2889 | break; | |
2890 | ||
d4845d57 | 2891 | case OPTION_DSP: |
88da98f3 | 2892 | preset_target_arch = arch_sh1_up & ~arch_sh2e_up; |
d4845d57 JR |
2893 | break; |
2894 | ||
324bfcf3 | 2895 | case OPTION_ISA: |
bdfaef52 JR |
2896 | if (strcasecmp (arg, "sh4") == 0) |
2897 | preset_target_arch = arch_sh4; | |
88da98f3 MS |
2898 | else if (strcasecmp (arg, "sh4a") == 0) |
2899 | preset_target_arch = arch_sh4a; | |
2900 | else if (strcasecmp (arg, "dsp") == 0) | |
2901 | preset_target_arch = arch_sh1_up & ~arch_sh2e_up; | |
2902 | else if (strcasecmp (arg, "fp") == 0) | |
2903 | preset_target_arch = arch_sh2e_up; | |
bdfaef52 JR |
2904 | else if (strcasecmp (arg, "any") == 0) |
2905 | preset_target_arch = arch_sh1_up; | |
2906 | #ifdef HAVE_SH64 | |
2907 | else if (strcasecmp (arg, "shmedia") == 0) | |
324bfcf3 AO |
2908 | { |
2909 | if (sh64_isa_mode == sh64_isa_shcompact) | |
2910 | as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia")); | |
2911 | sh64_isa_mode = sh64_isa_shmedia; | |
2912 | } | |
2913 | else if (strcasecmp (arg, "shcompact") == 0) | |
2914 | { | |
2915 | if (sh64_isa_mode == sh64_isa_shmedia) | |
2916 | as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact")); | |
2917 | if (sh64_abi == sh64_abi_64) | |
2918 | as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact")); | |
2919 | sh64_isa_mode = sh64_isa_shcompact; | |
2920 | } | |
bdfaef52 | 2921 | #endif /* HAVE_SH64 */ |
324bfcf3 AO |
2922 | else |
2923 | as_bad ("Invalid argument to --isa option: %s", arg); | |
2924 | break; | |
2925 | ||
bdfaef52 | 2926 | #ifdef HAVE_SH64 |
324bfcf3 AO |
2927 | case OPTION_ABI: |
2928 | if (strcmp (arg, "32") == 0) | |
2929 | { | |
2930 | if (sh64_abi == sh64_abi_64) | |
2931 | as_bad (_("Invalid combination: --abi=32 with --abi=64")); | |
2932 | sh64_abi = sh64_abi_32; | |
2933 | } | |
2934 | else if (strcmp (arg, "64") == 0) | |
2935 | { | |
2936 | if (sh64_abi == sh64_abi_32) | |
2937 | as_bad (_("Invalid combination: --abi=64 with --abi=32")); | |
2938 | if (sh64_isa_mode == sh64_isa_shcompact) | |
2939 | as_bad (_("Invalid combination: --isa=SHcompact with --abi=64")); | |
2940 | sh64_abi = sh64_abi_64; | |
2941 | } | |
2942 | else | |
2943 | as_bad ("Invalid argument to --abi option: %s", arg); | |
2944 | break; | |
2945 | ||
2946 | case OPTION_NO_MIX: | |
b34976b6 | 2947 | sh64_mix = FALSE; |
324bfcf3 AO |
2948 | break; |
2949 | ||
2950 | case OPTION_SHCOMPACT_CONST_CRANGE: | |
b34976b6 | 2951 | sh64_shcompact_const_crange = TRUE; |
324bfcf3 AO |
2952 | break; |
2953 | ||
2954 | case OPTION_NO_EXPAND: | |
b34976b6 | 2955 | sh64_expand = FALSE; |
324bfcf3 AO |
2956 | break; |
2957 | ||
2958 | case OPTION_PT32: | |
b34976b6 | 2959 | sh64_pt32 = TRUE; |
324bfcf3 AO |
2960 | break; |
2961 | #endif /* HAVE_SH64 */ | |
2962 | ||
252b5132 RH |
2963 | default: |
2964 | return 0; | |
2965 | } | |
2966 | ||
2967 | return 1; | |
2968 | } | |
2969 | ||
2970 | void | |
8edc77b9 | 2971 | md_show_usage (FILE *stream) |
252b5132 | 2972 | { |
c4aa876b | 2973 | fprintf (stream, _("\ |
252b5132 RH |
2974 | SH options:\n\ |
2975 | -little generate little endian code\n\ | |
05982cac | 2976 | -big generate big endian code\n\ |
252b5132 | 2977 | -relax alter jump instructions for long displacements\n\ |
5b8274e3 | 2978 | -small align sections to 4 byte boundaries, not 16\n\ |
88da98f3 | 2979 | -dsp enable sh-dsp insns, and disable floating-point ISAs.\n")); |
2acb89ed | 2980 | #ifdef HAVE_SH64 |
88da98f3 MS |
2981 | fprintf (stream, _("\ |
2982 | -isa=[sh4\n\ | |
2983 | | sh4a\n\ | |
2984 | | dsp same as '-dsp'\n\ | |
2acb89ed NC |
2985 | | fp\n\ |
2986 | | shmedia set as the default instruction set for SH64\n\ | |
88da98f3 MS |
2987 | | SHmedia\n\ |
2988 | | shcompact\n\ | |
2acb89ed | 2989 | | SHcompact\n")); |
324bfcf3 | 2990 | fprintf (stream, _("\ |
324bfcf3 AO |
2991 | -abi=[32|64] set size of expanded SHmedia operands and object\n\ |
2992 | file type\n\ | |
2993 | -shcompact-const-crange emit code-range descriptors for constants in\n\ | |
2994 | SHcompact code sections\n\ | |
2995 | -no-mix disallow SHmedia code in the same section as\n\ | |
2996 | constants and SHcompact code\n\ | |
2997 | -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\ | |
2998 | -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\ | |
2acb89ed NC |
2999 | to 32 bits only\n")); |
3000 | #else | |
3001 | fprintf (stream, _("\ | |
3002 | -isa=[sh4\n\ | |
3003 | | sh4a\n\ | |
3004 | | dsp same as '-dsp'\n\ | |
3005 | | fp\n\ | |
3006 | | any]\n")); | |
324bfcf3 | 3007 | #endif /* HAVE_SH64 */ |
252b5132 RH |
3008 | } |
3009 | \f | |
252b5132 RH |
3010 | /* This struct is used to pass arguments to sh_count_relocs through |
3011 | bfd_map_over_sections. */ | |
3012 | ||
3013 | struct sh_count_relocs | |
3014 | { | |
3015 | /* Symbol we are looking for. */ | |
3016 | symbolS *sym; | |
3017 | /* Count of relocs found. */ | |
3018 | int count; | |
3019 | }; | |
3020 | ||
3021 | /* Count the number of fixups in a section which refer to a particular | |
3022 | symbol. When using BFD_ASSEMBLER, this is called via | |
3023 | bfd_map_over_sections. */ | |
3024 | ||
252b5132 | 3025 | static void |
8edc77b9 | 3026 | sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) |
252b5132 RH |
3027 | { |
3028 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
3029 | segment_info_type *seginfo; | |
3030 | symbolS *sym; | |
3031 | fixS *fix; | |
3032 | ||
3033 | seginfo = seg_info (sec); | |
3034 | if (seginfo == NULL) | |
3035 | return; | |
3036 | ||
3037 | sym = info->sym; | |
3038 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
3039 | { | |
3040 | if (fix->fx_addsy == sym) | |
3041 | { | |
3042 | ++info->count; | |
3043 | fix->fx_tcbit = 1; | |
3044 | } | |
3045 | } | |
3046 | } | |
3047 | ||
3048 | /* Handle the count relocs for a particular section. When using | |
3049 | BFD_ASSEMBLER, this is called via bfd_map_over_sections. */ | |
3050 | ||
252b5132 | 3051 | static void |
8edc77b9 KK |
3052 | sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, |
3053 | void *ignore ATTRIBUTE_UNUSED) | |
252b5132 RH |
3054 | { |
3055 | segment_info_type *seginfo; | |
3056 | fixS *fix; | |
3057 | ||
3058 | seginfo = seg_info (sec); | |
3059 | if (seginfo == NULL) | |
3060 | return; | |
3061 | ||
3062 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
3063 | { | |
3064 | symbolS *sym; | |
3065 | bfd_vma val; | |
3066 | fixS *fscan; | |
3067 | struct sh_count_relocs info; | |
3068 | ||
3069 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
3070 | continue; | |
3071 | ||
3072 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
3073 | symbol in the same section. */ | |
3074 | sym = fix->fx_addsy; | |
3075 | if (sym == NULL | |
3076 | || fix->fx_subsy != NULL | |
3077 | || fix->fx_addnumber != 0 | |
3078 | || S_GET_SEGMENT (sym) != sec | |
3079 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
3080 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
3081 | #endif | |
3082 | || S_IS_EXTERNAL (sym)) | |
3083 | { | |
3084 | as_warn_where (fix->fx_file, fix->fx_line, | |
3085 | _(".uses does not refer to a local symbol in the same section")); | |
3086 | continue; | |
3087 | } | |
3088 | ||
3089 | /* Look through the fixups again, this time looking for one | |
3090 | at the same location as sym. */ | |
3091 | val = S_GET_VALUE (sym); | |
3092 | for (fscan = seginfo->fix_root; | |
3093 | fscan != NULL; | |
3094 | fscan = fscan->fx_next) | |
3095 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
3096 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
3097 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
3098 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
3099 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
3100 | break; | |
3101 | if (fscan == NULL) | |
3102 | { | |
3103 | as_warn_where (fix->fx_file, fix->fx_line, | |
3104 | _("can't find fixup pointed to by .uses")); | |
3105 | continue; | |
3106 | } | |
3107 | ||
3108 | if (fscan->fx_tcbit) | |
3109 | { | |
3110 | /* We've already done this one. */ | |
3111 | continue; | |
3112 | } | |
3113 | ||
6b31947e NC |
3114 | /* The variable fscan should also be a fixup to a local symbol |
3115 | in the same section. */ | |
252b5132 RH |
3116 | sym = fscan->fx_addsy; |
3117 | if (sym == NULL | |
3118 | || fscan->fx_subsy != NULL | |
3119 | || fscan->fx_addnumber != 0 | |
3120 | || S_GET_SEGMENT (sym) != sec | |
3121 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
3122 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
3123 | #endif | |
3124 | || S_IS_EXTERNAL (sym)) | |
3125 | { | |
3126 | as_warn_where (fix->fx_file, fix->fx_line, | |
3127 | _(".uses target does not refer to a local symbol in the same section")); | |
3128 | continue; | |
3129 | } | |
3130 | ||
3131 | /* Now we look through all the fixups of all the sections, | |
3132 | counting the number of times we find a reference to sym. */ | |
3133 | info.sym = sym; | |
3134 | info.count = 0; | |
3135 | #ifdef BFD_ASSEMBLER | |
8edc77b9 | 3136 | bfd_map_over_sections (stdoutput, sh_count_relocs, &info); |
252b5132 RH |
3137 | #else |
3138 | { | |
3139 | int iscan; | |
3140 | ||
3141 | for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++) | |
8edc77b9 | 3142 | sh_count_relocs ((bfd *) NULL, iscan, &info); |
252b5132 RH |
3143 | } |
3144 | #endif | |
3145 | ||
3146 | if (info.count < 1) | |
3147 | abort (); | |
3148 | ||
3149 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
3150 | We have already adjusted the value of sym to include the | |
3151 | fragment address, so we undo that adjustment here. */ | |
3152 | subseg_change (sec, 0); | |
7bcad3e5 NC |
3153 | fix_new (fscan->fx_frag, |
3154 | S_GET_VALUE (sym) - fscan->fx_frag->fr_address, | |
252b5132 RH |
3155 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
3156 | } | |
3157 | } | |
3158 | ||
3159 | /* This function is called after the symbol table has been completed, | |
3160 | but before the relocs or section contents have been written out. | |
3161 | If we have seen any .uses pseudo-ops, they point to an instruction | |
3162 | which loads a register with the address of a function. We look | |
3163 | through the fixups to find where the function address is being | |
3164 | loaded from. We then generate a COUNT reloc giving the number of | |
3165 | times that function address is referred to. The linker uses this | |
3166 | information when doing relaxing, to decide when it can eliminate | |
3167 | the stored function address entirely. */ | |
3168 | ||
3169 | void | |
8edc77b9 | 3170 | sh_frob_file (void) |
252b5132 | 3171 | { |
324bfcf3 AO |
3172 | #ifdef HAVE_SH64 |
3173 | shmedia_frob_file_before_adjust (); | |
3174 | #endif | |
3175 | ||
252b5132 RH |
3176 | if (! sh_relax) |
3177 | return; | |
3178 | ||
3179 | #ifdef BFD_ASSEMBLER | |
8edc77b9 | 3180 | bfd_map_over_sections (stdoutput, sh_frob_section, NULL); |
252b5132 RH |
3181 | #else |
3182 | { | |
3183 | int iseg; | |
3184 | ||
3185 | for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++) | |
8edc77b9 | 3186 | sh_frob_section ((bfd *) NULL, iseg, NULL); |
252b5132 RH |
3187 | } |
3188 | #endif | |
3189 | } | |
3190 | ||
3191 | /* Called after relaxing. Set the correct sizes of the fragments, and | |
94f592af | 3192 | create relocs so that md_apply_fix3 will fill in the correct values. */ |
252b5132 RH |
3193 | |
3194 | void | |
252b5132 | 3195 | #ifdef BFD_ASSEMBLER |
8edc77b9 | 3196 | md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) |
252b5132 | 3197 | #else |
8edc77b9 KK |
3198 | md_convert_frag (object_headers *headers ATTRIBUTE_UNUSED, segT seg, |
3199 | fragS *fragP) | |
252b5132 | 3200 | #endif |
252b5132 RH |
3201 | { |
3202 | int donerelax = 0; | |
3203 | ||
3204 | switch (fragP->fr_subtype) | |
3205 | { | |
3206 | case C (COND_JUMP, COND8): | |
3207 | case C (COND_JUMP_DELAY, COND8): | |
3208 | subseg_change (seg, 0); | |
3209 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
3210 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
3211 | fragP->fr_fix += 2; | |
3212 | fragP->fr_var = 0; | |
3213 | break; | |
3214 | ||
3215 | case C (UNCOND_JUMP, UNCOND12): | |
3216 | subseg_change (seg, 0); | |
3217 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
3218 | 1, BFD_RELOC_SH_PCDISP12BY2); | |
3219 | fragP->fr_fix += 2; | |
3220 | fragP->fr_var = 0; | |
3221 | break; | |
3222 | ||
3223 | case C (UNCOND_JUMP, UNCOND32): | |
3224 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
3225 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
3226 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3227 | _("displacement overflows 12-bit field")); | |
252b5132 | 3228 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
3229 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3230 | _("displacement to defined symbol %s overflows 12-bit field"), | |
3231 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 3232 | else |
99b222b4 HPN |
3233 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3234 | _("displacement to undefined symbol %s overflows 12-bit field"), | |
3235 | S_GET_NAME (fragP->fr_symbol)); | |
3236 | /* Stabilize this frag, so we don't trip an assert. */ | |
3237 | fragP->fr_fix += fragP->fr_var; | |
3238 | fragP->fr_var = 0; | |
252b5132 RH |
3239 | break; |
3240 | ||
3241 | case C (COND_JUMP, COND12): | |
3242 | case C (COND_JUMP_DELAY, COND12): | |
6b31947e | 3243 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ |
252b5132 RH |
3244 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c |
3245 | was due to gas incorrectly relaxing an out-of-range conditional | |
3246 | branch with delay slot. It turned: | |
3247 | bf.s L6 (slot mov.l r12,@(44,r0)) | |
3248 | into: | |
c4aa876b | 3249 | |
252b5132 RH |
3250 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) |
3251 | 30: 00 09 nop | |
3252 | 32: 10 cb mov.l r12,@(44,r0) | |
3253 | Therefore, branches with delay slots have to be handled | |
3254 | differently from ones without delay slots. */ | |
3255 | { | |
3256 | unsigned char *buffer = | |
3257 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
3258 | int highbyte = target_big_endian ? 0 : 1; | |
3259 | int lowbyte = target_big_endian ? 1 : 0; | |
3260 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); | |
3261 | ||
3262 | /* Toggle the true/false bit of the bcond. */ | |
3263 | buffer[highbyte] ^= 0x2; | |
3264 | ||
d3ecfc59 | 3265 | /* If this is a delayed branch, we may not put the bra in the |
252b5132 RH |
3266 | slot. So we change it to a non-delayed branch, like that: |
3267 | b! cond slot_label; bra disp; slot_label: slot_insn | |
3268 | ??? We should try if swapping the conditional branch and | |
3269 | its delay-slot insn already makes the branch reach. */ | |
3270 | ||
3271 | /* Build a relocation to six / four bytes farther on. */ | |
3272 | subseg_change (seg, 0); | |
3273 | fix_new (fragP, fragP->fr_fix, 2, | |
3274 | #ifdef BFD_ASSEMBLER | |
3275 | section_symbol (seg), | |
3276 | #else | |
3277 | seg_info (seg)->dot, | |
3278 | #endif | |
3279 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), | |
3280 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
3281 | ||
3282 | /* Set up a jump instruction. */ | |
3283 | buffer[highbyte + 2] = 0xa0; | |
3284 | buffer[lowbyte + 2] = 0; | |
3285 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
3286 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); | |
3287 | ||
3288 | if (delay) | |
3289 | { | |
3290 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
3291 | fragP->fr_fix += 4; | |
3292 | } | |
3293 | else | |
3294 | { | |
3295 | /* Fill in a NOP instruction. */ | |
3296 | buffer[highbyte + 4] = 0x0; | |
3297 | buffer[lowbyte + 4] = 0x9; | |
3298 | ||
3299 | fragP->fr_fix += 6; | |
3300 | } | |
3301 | fragP->fr_var = 0; | |
3302 | donerelax = 1; | |
3303 | } | |
3304 | break; | |
3305 | ||
3306 | case C (COND_JUMP, COND32): | |
3307 | case C (COND_JUMP_DELAY, COND32): | |
3308 | case C (COND_JUMP, UNDEF_WORD_DISP): | |
3309 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): | |
3310 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
3311 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3312 | _("displacement overflows 8-bit field")); | |
252b5132 | 3313 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
3314 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3315 | _("displacement to defined symbol %s overflows 8-bit field"), | |
3316 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 3317 | else |
99b222b4 HPN |
3318 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3319 | _("displacement to undefined symbol %s overflows 8-bit field "), | |
3320 | S_GET_NAME (fragP->fr_symbol)); | |
3321 | /* Stabilize this frag, so we don't trip an assert. */ | |
3322 | fragP->fr_fix += fragP->fr_var; | |
3323 | fragP->fr_var = 0; | |
252b5132 RH |
3324 | break; |
3325 | ||
3326 | default: | |
324bfcf3 | 3327 | #ifdef HAVE_SH64 |
b34976b6 | 3328 | shmedia_md_convert_frag (headers, seg, fragP, TRUE); |
324bfcf3 | 3329 | #else |
252b5132 | 3330 | abort (); |
324bfcf3 | 3331 | #endif |
252b5132 RH |
3332 | } |
3333 | ||
3334 | if (donerelax && !sh_relax) | |
3335 | as_warn_where (fragP->fr_file, fragP->fr_line, | |
3336 | _("overflow in branch to %s; converted into longer instruction sequence"), | |
3337 | (fragP->fr_symbol != NULL | |
3338 | ? S_GET_NAME (fragP->fr_symbol) | |
3339 | : "")); | |
3340 | } | |
3341 | ||
3342 | valueT | |
8edc77b9 | 3343 | md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) |
252b5132 RH |
3344 | { |
3345 | #ifdef BFD_ASSEMBLER | |
3346 | #ifdef OBJ_ELF | |
3347 | return size; | |
3348 | #else /* ! OBJ_ELF */ | |
3349 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) | |
3350 | & (-1 << bfd_get_section_alignment (stdoutput, seg))); | |
3351 | #endif /* ! OBJ_ELF */ | |
3352 | #else /* ! BFD_ASSEMBLER */ | |
3353 | return ((size + (1 << section_alignment[(int) seg]) - 1) | |
3354 | & (-1 << section_alignment[(int) seg])); | |
3355 | #endif /* ! BFD_ASSEMBLER */ | |
3356 | } | |
3357 | ||
3358 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
67c1ffbe | 3359 | the expression does not need to be aligned. */ |
252b5132 RH |
3360 | |
3361 | static int sh_no_align_cons = 0; | |
3362 | ||
3363 | /* This handles the unaligned space allocation pseudo-ops, such as | |
3364 | .uaword. .uaword is just like .word, but the value does not need | |
3365 | to be aligned. */ | |
3366 | ||
3367 | static void | |
8edc77b9 | 3368 | s_uacons (int bytes) |
252b5132 RH |
3369 | { |
3370 | /* Tell sh_cons_align not to align this value. */ | |
3371 | sh_no_align_cons = 1; | |
3372 | cons (bytes); | |
3373 | } | |
3374 | ||
3375 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
3376 | aligned correctly. Note that this can cause warnings to be issued | |
3377 | when assembling initialized structured which were declared with the | |
3378 | packed attribute. FIXME: Perhaps we should require an option to | |
3379 | enable this warning? */ | |
3380 | ||
3381 | void | |
8edc77b9 | 3382 | sh_cons_align (int nbytes) |
252b5132 RH |
3383 | { |
3384 | int nalign; | |
3385 | char *p; | |
3386 | ||
3387 | if (sh_no_align_cons) | |
3388 | { | |
3389 | /* This is an unaligned pseudo-op. */ | |
3390 | sh_no_align_cons = 0; | |
3391 | return; | |
3392 | } | |
3393 | ||
3394 | nalign = 0; | |
3395 | while ((nbytes & 1) == 0) | |
3396 | { | |
3397 | ++nalign; | |
3398 | nbytes >>= 1; | |
3399 | } | |
3400 | ||
3401 | if (nalign == 0) | |
3402 | return; | |
3403 | ||
3404 | if (now_seg == absolute_section) | |
3405 | { | |
3406 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
3407 | as_warn (_("misaligned data")); | |
3408 | return; | |
3409 | } | |
3410 | ||
0a9ef439 | 3411 | p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0, |
252b5132 RH |
3412 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); |
3413 | ||
3414 | record_alignment (now_seg, nalign); | |
3415 | } | |
3416 | ||
3417 | /* When relaxing, we need to output a reloc for any .align directive | |
3418 | that requests alignment to a four byte boundary or larger. This is | |
3419 | also where we check for misaligned data. */ | |
3420 | ||
3421 | void | |
8edc77b9 | 3422 | sh_handle_align (fragS *frag) |
252b5132 | 3423 | { |
0a9ef439 RH |
3424 | int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; |
3425 | ||
3426 | if (frag->fr_type == rs_align_code) | |
3427 | { | |
3428 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
3429 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
3430 | ||
3431 | char *p = frag->fr_literal + frag->fr_fix; | |
3432 | ||
3433 | if (bytes & 1) | |
3434 | { | |
3435 | *p++ = 0; | |
3436 | bytes--; | |
3437 | frag->fr_fix += 1; | |
3438 | } | |
3439 | ||
3440 | if (target_big_endian) | |
3441 | { | |
3442 | memcpy (p, big_nop_pattern, sizeof big_nop_pattern); | |
3443 | frag->fr_var = sizeof big_nop_pattern; | |
3444 | } | |
3445 | else | |
3446 | { | |
3447 | memcpy (p, little_nop_pattern, sizeof little_nop_pattern); | |
3448 | frag->fr_var = sizeof little_nop_pattern; | |
3449 | } | |
3450 | } | |
3451 | else if (frag->fr_type == rs_align_test) | |
3452 | { | |
3453 | if (bytes != 0) | |
3454 | as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); | |
3455 | } | |
3456 | ||
252b5132 | 3457 | if (sh_relax |
0a9ef439 RH |
3458 | && (frag->fr_type == rs_align |
3459 | || frag->fr_type == rs_align_code) | |
252b5132 RH |
3460 | && frag->fr_address + frag->fr_fix > 0 |
3461 | && frag->fr_offset > 1 | |
3462 | && now_seg != bss_section) | |
3463 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, | |
3464 | BFD_RELOC_SH_ALIGN); | |
252b5132 RH |
3465 | } |
3466 | ||
28602ebf KK |
3467 | /* See whether the relocation should be resolved locally. */ |
3468 | ||
b34976b6 | 3469 | static bfd_boolean |
8edc77b9 | 3470 | sh_local_pcrel (fixS *fix) |
28602ebf | 3471 | { |
b34976b6 AM |
3472 | return (! sh_relax |
3473 | && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 | |
3474 | || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 | |
3475 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 | |
3476 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 | |
3477 | || fix->fx_r_type == BFD_RELOC_8_PCREL | |
3478 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 | |
3479 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); | |
28602ebf KK |
3480 | } |
3481 | ||
252b5132 RH |
3482 | /* See whether we need to force a relocation into the output file. |
3483 | This is used to force out switch and PC relative relocations when | |
3484 | relaxing. */ | |
3485 | ||
3486 | int | |
8edc77b9 | 3487 | sh_force_relocation (fixS *fix) |
252b5132 | 3488 | { |
8ba4dac0 DJ |
3489 | /* These relocations can't make it into a DSO, so no use forcing |
3490 | them for global symbols. */ | |
28602ebf | 3491 | if (sh_local_pcrel (fix)) |
8ba4dac0 DJ |
3492 | return 0; |
3493 | ||
9efb3b7b | 3494 | /* Make sure some relocations get emitted. */ |
ae6063d4 | 3495 | if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START |
a161fe53 | 3496 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_END |
9efb3b7b KK |
3497 | || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 |
3498 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 | |
3499 | || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 | |
3500 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 | |
3501 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 | |
ae6063d4 | 3502 | || generic_force_reloc (fix)) |
252b5132 RH |
3503 | return 1; |
3504 | ||
3505 | if (! sh_relax) | |
3506 | return 0; | |
3507 | ||
3508 | return (fix->fx_pcrel | |
3509 | || SWITCH_TABLE (fix) | |
3510 | || fix->fx_r_type == BFD_RELOC_SH_COUNT | |
3511 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
3512 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
3513 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
324bfcf3 AO |
3514 | #ifdef HAVE_SH64 |
3515 | || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE | |
3516 | #endif | |
252b5132 RH |
3517 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); |
3518 | } | |
3519 | ||
3520 | #ifdef OBJ_ELF | |
b34976b6 | 3521 | bfd_boolean |
8edc77b9 | 3522 | sh_fix_adjustable (fixS *fixP) |
252b5132 | 3523 | { |
a161fe53 AM |
3524 | if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL |
3525 | || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL | |
3526 | || fixP->fx_r_type == BFD_RELOC_SH_GOTPC | |
a1cc9221 AO |
3527 | || fixP->fx_r_type == BFD_RELOC_RVA) |
3528 | return 0; | |
3529 | ||
252b5132 RH |
3530 | /* We need the symbol name for the VTABLE entries */ |
3531 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
3532 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
3533 | return 0; | |
3534 | ||
3535 | return 1; | |
3536 | } | |
d4845d57 | 3537 | |
6b31947e | 3538 | void |
8edc77b9 | 3539 | sh_elf_final_processing (void) |
d4845d57 JR |
3540 | { |
3541 | int val; | |
3542 | ||
3543 | /* Set file-specific flags to indicate if this code needs | |
88da98f3 | 3544 | a processor with the sh-dsp / sh2e ISA to execute. */ |
324bfcf3 AO |
3545 | #ifdef HAVE_SH64 |
3546 | /* SH5 and above don't know about the valid_arch arch_sh* bits defined | |
3547 | in sh-opc.h, so check SH64 mode before checking valid_arch. */ | |
3548 | if (sh64_isa_mode != sh64_isa_unspecified) | |
3549 | val = EF_SH5; | |
3550 | else | |
3551 | #endif /* HAVE_SH64 */ | |
d4845d57 JR |
3552 | if (valid_arch & arch_sh1) |
3553 | val = EF_SH1; | |
3554 | else if (valid_arch & arch_sh2) | |
3555 | val = EF_SH2; | |
5177500f NC |
3556 | else if (valid_arch & arch_sh2e) |
3557 | val = EF_SH2E; | |
d4845d57 JR |
3558 | else if (valid_arch & arch_sh_dsp) |
3559 | val = EF_SH_DSP; | |
3560 | else if (valid_arch & arch_sh3) | |
3561 | val = EF_SH3; | |
3562 | else if (valid_arch & arch_sh3_dsp) | |
88da98f3 | 3563 | val = EF_SH3_DSP; |
d4845d57 JR |
3564 | else if (valid_arch & arch_sh3e) |
3565 | val = EF_SH3E; | |
88da98f3 MS |
3566 | else if (valid_arch & arch_sh4_nofpu) |
3567 | val = EF_SH4_NOFPU; | |
d4845d57 JR |
3568 | else if (valid_arch & arch_sh4) |
3569 | val = EF_SH4; | |
88da98f3 MS |
3570 | else if (valid_arch & arch_sh4a_nofpu) |
3571 | val = EF_SH4A_NOFPU; | |
3572 | else if (valid_arch & arch_sh4a) | |
3573 | val = EF_SH4A; | |
3574 | else if (valid_arch & arch_sh4al_dsp) | |
3575 | val = EF_SH4AL_DSP; | |
d4845d57 JR |
3576 | else |
3577 | abort (); | |
3578 | ||
3579 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; | |
3580 | elf_elfheader (stdoutput)->e_flags |= val; | |
3581 | } | |
252b5132 RH |
3582 | #endif |
3583 | ||
3584 | /* Apply a fixup to the object file. */ | |
3585 | ||
252b5132 | 3586 | void |
8edc77b9 | 3587 | md_apply_fix3 (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
252b5132 RH |
3588 | { |
3589 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
3590 | int lowbyte = target_big_endian ? 1 : 0; | |
3591 | int highbyte = target_big_endian ? 0 : 1; | |
2ed5f585 | 3592 | long val = (long) *valP; |
252b5132 RH |
3593 | long max, min; |
3594 | int shift; | |
3595 | ||
3596 | #ifdef BFD_ASSEMBLER | |
a1cc9221 AO |
3597 | /* A difference between two symbols, the second of which is in the |
3598 | current section, is transformed in a PC-relative relocation to | |
3599 | the other symbol. We have to adjust the relocation type here. */ | |
3600 | if (fixP->fx_pcrel) | |
3601 | { | |
3602 | switch (fixP->fx_r_type) | |
3603 | { | |
3604 | default: | |
3605 | break; | |
3606 | ||
3607 | case BFD_RELOC_32: | |
3608 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
3609 | break; | |
3610 | ||
3611 | /* Currently, we only support 32-bit PCREL relocations. | |
3612 | We'd need a new reloc type to handle 16_PCREL, and | |
3613 | 8_PCREL is already taken for R_SH_SWITCH8, which | |
3614 | apparently does something completely different than what | |
3615 | we need. FIXME. */ | |
3616 | case BFD_RELOC_16: | |
3617 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3618 | return; |
81d4177b | 3619 | |
a1cc9221 AO |
3620 | case BFD_RELOC_8: |
3621 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3622 | return; |
a1cc9221 AO |
3623 | } |
3624 | } | |
3625 | ||
6b31947e NC |
3626 | /* The function adjust_reloc_syms won't convert a reloc against a weak |
3627 | symbol into a reloc against a section, but bfd_install_relocation | |
3628 | will screw up if the symbol is defined, so we have to adjust val here | |
1308f14c HPN |
3629 | to avoid the screw up later. |
3630 | ||
3631 | For ordinary relocs, this does not happen for ELF, since for ELF, | |
3632 | bfd_install_relocation uses the "special function" field of the | |
3633 | howto, and does not execute the code that needs to be undone, as long | |
3634 | as the special function does not return bfd_reloc_continue. | |
3635 | It can happen for GOT- and PLT-type relocs the way they are | |
3636 | described in elf32-sh.c as they use bfd_elf_generic_reloc, but it | |
3637 | doesn't matter here since those relocs don't use VAL; see below. */ | |
3638 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour | |
3639 | && fixP->fx_addsy != NULL | |
252b5132 RH |
3640 | && S_IS_WEAK (fixP->fx_addsy)) |
3641 | val -= S_GET_VALUE (fixP->fx_addsy); | |
3642 | #endif | |
3643 | ||
bdfaef52 JR |
3644 | #ifdef BFD_ASSEMBLER |
3645 | if (SWITCH_TABLE (fixP)) | |
3646 | val -= S_GET_VALUE (fixP->fx_subsy); | |
3647 | #else | |
252b5132 RH |
3648 | if (fixP->fx_r_type == 0) |
3649 | { | |
3650 | if (fixP->fx_size == 2) | |
3651 | fixP->fx_r_type = BFD_RELOC_16; | |
3652 | else if (fixP->fx_size == 4) | |
3653 | fixP->fx_r_type = BFD_RELOC_32; | |
3654 | else if (fixP->fx_size == 1) | |
3655 | fixP->fx_r_type = BFD_RELOC_8; | |
3656 | else | |
3657 | abort (); | |
3658 | } | |
3659 | #endif | |
3660 | ||
3661 | max = min = 0; | |
3662 | shift = 0; | |
3663 | switch (fixP->fx_r_type) | |
3664 | { | |
3665 | case BFD_RELOC_SH_IMM4: | |
3666 | max = 0xf; | |
3667 | *buf = (*buf & 0xf0) | (val & 0xf); | |
3668 | break; | |
3669 | ||
3670 | case BFD_RELOC_SH_IMM4BY2: | |
3671 | max = 0xf; | |
3672 | shift = 1; | |
3673 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); | |
3674 | break; | |
3675 | ||
3676 | case BFD_RELOC_SH_IMM4BY4: | |
3677 | max = 0xf; | |
3678 | shift = 2; | |
3679 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); | |
3680 | break; | |
3681 | ||
3682 | case BFD_RELOC_SH_IMM8BY2: | |
3683 | max = 0xff; | |
3684 | shift = 1; | |
3685 | *buf = val >> 1; | |
3686 | break; | |
3687 | ||
3688 | case BFD_RELOC_SH_IMM8BY4: | |
3689 | max = 0xff; | |
3690 | shift = 2; | |
3691 | *buf = val >> 2; | |
3692 | break; | |
3693 | ||
3694 | case BFD_RELOC_8: | |
3695 | case BFD_RELOC_SH_IMM8: | |
3696 | /* Sometimes the 8 bit value is sign extended (e.g., add) and | |
3697 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
3698 | Note that adding further restrictions may invalidate | |
3699 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
3700 | max = 0xff; | |
c4aa876b | 3701 | min = -0xff; |
252b5132 RH |
3702 | *buf++ = val; |
3703 | break; | |
3704 | ||
3705 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
3706 | /* The lower two bits of the PC are cleared before the | |
3707 | displacement is added in. We can assume that the destination | |
67c1ffbe | 3708 | is on a 4 byte boundary. If this instruction is also on a 4 |
252b5132 RH |
3709 | byte boundary, then we want |
3710 | (target - here) / 4 | |
3711 | and target - here is a multiple of 4. | |
3712 | Otherwise, we are on a 2 byte boundary, and we want | |
3713 | (target - (here - 2)) / 4 | |
3714 | and target - here is not a multiple of 4. Computing | |
3715 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
3716 | works for both cases, since in the first case the addition of | |
3717 | 2 will be removed by the division. target - here is in the | |
3718 | variable val. */ | |
3719 | val = (val + 2) / 4; | |
3720 | if (val & ~0xff) | |
3721 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3722 | buf[lowbyte] = val; | |
3723 | break; | |
3724 | ||
3725 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
3726 | val /= 2; | |
3727 | if (val & ~0xff) | |
3728 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3729 | buf[lowbyte] = val; | |
3730 | break; | |
3731 | ||
3732 | case BFD_RELOC_SH_PCDISP8BY2: | |
3733 | val /= 2; | |
3734 | if (val < -0x80 || val > 0x7f) | |
3735 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3736 | buf[lowbyte] = val; | |
3737 | break; | |
3738 | ||
3739 | case BFD_RELOC_SH_PCDISP12BY2: | |
3740 | val /= 2; | |
8637c045 | 3741 | if (val < -0x800 || val > 0x7ff) |
252b5132 RH |
3742 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
3743 | buf[lowbyte] = val & 0xff; | |
3744 | buf[highbyte] |= (val >> 8) & 0xf; | |
3745 | break; | |
3746 | ||
3747 | case BFD_RELOC_32: | |
a1cc9221 | 3748 | case BFD_RELOC_32_PCREL: |
1db77c8e | 3749 | md_number_to_chars (buf, val, 4); |
252b5132 RH |
3750 | break; |
3751 | ||
3752 | case BFD_RELOC_16: | |
1db77c8e | 3753 | md_number_to_chars (buf, val, 2); |
252b5132 RH |
3754 | break; |
3755 | ||
3756 | case BFD_RELOC_SH_USES: | |
3757 | /* Pass the value into sh_coff_reloc_mangle. */ | |
3758 | fixP->fx_addnumber = val; | |
3759 | break; | |
3760 | ||
3761 | case BFD_RELOC_SH_COUNT: | |
3762 | case BFD_RELOC_SH_ALIGN: | |
3763 | case BFD_RELOC_SH_CODE: | |
3764 | case BFD_RELOC_SH_DATA: | |
3765 | case BFD_RELOC_SH_LABEL: | |
3766 | /* Nothing to do here. */ | |
3767 | break; | |
3768 | ||
015551fc JR |
3769 | case BFD_RELOC_SH_LOOP_START: |
3770 | case BFD_RELOC_SH_LOOP_END: | |
3771 | ||
252b5132 RH |
3772 | case BFD_RELOC_VTABLE_INHERIT: |
3773 | case BFD_RELOC_VTABLE_ENTRY: | |
3774 | fixP->fx_done = 0; | |
3775 | return; | |
3776 | ||
a1cc9221 AO |
3777 | #ifdef OBJ_ELF |
3778 | case BFD_RELOC_32_PLT_PCREL: | |
3779 | /* Make the jump instruction point to the address of the operand. At | |
81d4177b | 3780 | runtime we merely add the offset to the actual PLT entry. */ |
94f592af | 3781 | * valP = 0xfffffffc; |
0174e383 | 3782 | val = fixP->fx_offset; |
ac3f04d7 AO |
3783 | if (fixP->fx_subsy) |
3784 | val -= S_GET_VALUE (fixP->fx_subsy); | |
a161fe53 | 3785 | fixP->fx_addnumber = val; |
538cd60f | 3786 | md_number_to_chars (buf, val, 4); |
a1cc9221 AO |
3787 | break; |
3788 | ||
3789 | case BFD_RELOC_SH_GOTPC: | |
3790 | /* This is tough to explain. We end up with this one if we have | |
3791 | operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". | |
3792 | The goal here is to obtain the absolute address of the GOT, | |
3793 | and it is strongly preferable from a performance point of | |
3794 | view to avoid using a runtime relocation for this. There are | |
3795 | cases where you have something like: | |
81d4177b | 3796 | |
a1cc9221 | 3797 | .long _GLOBAL_OFFSET_TABLE_+[.-.L66] |
81d4177b | 3798 | |
a1cc9221 AO |
3799 | and here no correction would be required. Internally in the |
3800 | assembler we treat operands of this form as not being pcrel | |
3801 | since the '.' is explicitly mentioned, and I wonder whether | |
3802 | it would simplify matters to do it this way. Who knows. In | |
3803 | earlier versions of the PIC patches, the pcrel_adjust field | |
3804 | was used to store the correction, but since the expression is | |
3805 | not pcrel, I felt it would be confusing to do it this way. */ | |
94f592af | 3806 | * valP -= 1; |
a1cc9221 AO |
3807 | md_number_to_chars (buf, val, 4); |
3808 | break; | |
3809 | ||
9efb3b7b KK |
3810 | case BFD_RELOC_SH_TLS_GD_32: |
3811 | case BFD_RELOC_SH_TLS_LD_32: | |
3812 | case BFD_RELOC_SH_TLS_IE_32: | |
2bba4140 KK |
3813 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
3814 | /* Fallthrough */ | |
3815 | case BFD_RELOC_32_GOT_PCREL: | |
3816 | case BFD_RELOC_SH_GOTPLT32: | |
94f592af | 3817 | * valP = 0; /* Fully resolved at runtime. No addend. */ |
a1cc9221 AO |
3818 | md_number_to_chars (buf, 0, 4); |
3819 | break; | |
3820 | ||
9efb3b7b KK |
3821 | case BFD_RELOC_SH_TLS_LDO_32: |
3822 | case BFD_RELOC_SH_TLS_LE_32: | |
2bba4140 KK |
3823 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
3824 | /* Fallthrough */ | |
3825 | case BFD_RELOC_32_GOTOFF: | |
538cd60f | 3826 | md_number_to_chars (buf, val, 4); |
a1cc9221 AO |
3827 | break; |
3828 | #endif | |
3829 | ||
252b5132 | 3830 | default: |
324bfcf3 AO |
3831 | #ifdef HAVE_SH64 |
3832 | shmedia_md_apply_fix3 (fixP, valP); | |
3833 | return; | |
3834 | #else | |
252b5132 | 3835 | abort (); |
324bfcf3 | 3836 | #endif |
252b5132 RH |
3837 | } |
3838 | ||
3839 | if (shift != 0) | |
3840 | { | |
3841 | if ((val & ((1 << shift) - 1)) != 0) | |
3842 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
3843 | if (val >= 0) | |
3844 | val >>= shift; | |
3845 | else | |
3846 | val = ((val >> shift) | |
3847 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
3848 | } | |
3849 | if (max != 0 && (val < min || val > max)) | |
3850 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
3851 | ||
94f592af NC |
3852 | if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) |
3853 | fixP->fx_done = 1; | |
252b5132 RH |
3854 | } |
3855 | ||
3856 | /* Called just before address relaxation. Return the length | |
3857 | by which a fragment must grow to reach it's destination. */ | |
3858 | ||
3859 | int | |
8edc77b9 | 3860 | md_estimate_size_before_relax (fragS *fragP, segT segment_type) |
252b5132 | 3861 | { |
e66457fb AM |
3862 | int what; |
3863 | ||
252b5132 RH |
3864 | switch (fragP->fr_subtype) |
3865 | { | |
93c2a809 | 3866 | default: |
324bfcf3 AO |
3867 | #ifdef HAVE_SH64 |
3868 | return shmedia_md_estimate_size_before_relax (fragP, segment_type); | |
3869 | #else | |
93c2a809 | 3870 | abort (); |
324bfcf3 AO |
3871 | #endif |
3872 | ||
93c2a809 | 3873 | |
252b5132 | 3874 | case C (UNCOND_JUMP, UNDEF_DISP): |
6b31947e | 3875 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3876 | if (!fragP->fr_symbol) |
3877 | { | |
3878 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3879 | } |
3880 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3881 | { | |
3882 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3883 | } |
3884 | else | |
3885 | { | |
3886 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
252b5132 RH |
3887 | } |
3888 | break; | |
3889 | ||
252b5132 RH |
3890 | case C (COND_JUMP, UNDEF_DISP): |
3891 | case C (COND_JUMP_DELAY, UNDEF_DISP): | |
e66457fb | 3892 | what = GET_WHAT (fragP->fr_subtype); |
6b31947e | 3893 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3894 | if (fragP->fr_symbol |
3895 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3896 | { | |
252b5132 | 3897 | /* Got a symbol and it's defined in this segment, become byte |
6b31947e | 3898 | sized - maybe it will fix up. */ |
252b5132 | 3899 | fragP->fr_subtype = C (what, COND8); |
252b5132 RH |
3900 | } |
3901 | else if (fragP->fr_symbol) | |
3902 | { | |
6b31947e | 3903 | /* Its got a segment, but its not ours, so it will always be long. */ |
252b5132 | 3904 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); |
252b5132 RH |
3905 | } |
3906 | else | |
3907 | { | |
6b31947e | 3908 | /* We know the abs value. */ |
252b5132 | 3909 | fragP->fr_subtype = C (what, COND8); |
252b5132 | 3910 | } |
93c2a809 | 3911 | break; |
252b5132 | 3912 | |
93c2a809 | 3913 | case C (UNCOND_JUMP, UNCOND12): |
e66457fb | 3914 | case C (UNCOND_JUMP, UNCOND32): |
93c2a809 AM |
3915 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): |
3916 | case C (COND_JUMP, COND8): | |
e66457fb AM |
3917 | case C (COND_JUMP, COND12): |
3918 | case C (COND_JUMP, COND32): | |
93c2a809 AM |
3919 | case C (COND_JUMP, UNDEF_WORD_DISP): |
3920 | case C (COND_JUMP_DELAY, COND8): | |
e66457fb AM |
3921 | case C (COND_JUMP_DELAY, COND12): |
3922 | case C (COND_JUMP_DELAY, COND32): | |
93c2a809 AM |
3923 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): |
3924 | /* When relaxing a section for the second time, we don't need to | |
e66457fb | 3925 | do anything besides return the current size. */ |
252b5132 RH |
3926 | break; |
3927 | } | |
e66457fb AM |
3928 | |
3929 | fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; | |
252b5132 RH |
3930 | return fragP->fr_var; |
3931 | } | |
3932 | ||
6b31947e | 3933 | /* Put number into target byte order. */ |
252b5132 RH |
3934 | |
3935 | void | |
8edc77b9 | 3936 | md_number_to_chars (char *ptr, valueT use, int nbytes) |
252b5132 | 3937 | { |
324bfcf3 AO |
3938 | #ifdef HAVE_SH64 |
3939 | /* We might need to set the contents type to data. */ | |
3940 | sh64_flag_output (); | |
3941 | #endif | |
3942 | ||
252b5132 RH |
3943 | if (! target_big_endian) |
3944 | number_to_chars_littleendian (ptr, use, nbytes); | |
3945 | else | |
3946 | number_to_chars_bigendian (ptr, use, nbytes); | |
3947 | } | |
3948 | ||
cce5a618 NC |
3949 | /* This version is used in obj-coff.c when not using BFD_ASSEMBLER. |
3950 | eg for the sh-hms target. */ | |
3951 | ||
3952 | long | |
8edc77b9 | 3953 | md_pcrel_from (fixS *fixP) |
cce5a618 NC |
3954 | { |
3955 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; | |
3956 | } | |
3957 | ||
252b5132 | 3958 | long |
8edc77b9 | 3959 | md_pcrel_from_section (fixS *fixP, segT sec) |
252b5132 | 3960 | { |
28602ebf KK |
3961 | if (! sh_local_pcrel (fixP) |
3962 | && fixP->fx_addsy != (symbolS *) NULL | |
ae6063d4 | 3963 | && (generic_force_reloc (fixP) |
ef17112f HPN |
3964 | || S_GET_SEGMENT (fixP->fx_addsy) != sec)) |
3965 | { | |
3966 | /* The symbol is undefined (or is defined but not in this section, | |
3967 | or we're not sure about it being the final definition). Let the | |
3968 | linker figure it out. We need to adjust the subtraction of a | |
3969 | symbol to the position of the relocated data, though. */ | |
3970 | return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; | |
3971 | } | |
3972 | ||
cce5a618 | 3973 | return md_pcrel_from (fixP); |
252b5132 RH |
3974 | } |
3975 | ||
3976 | #ifdef OBJ_COFF | |
3977 | ||
3978 | int | |
8edc77b9 | 3979 | tc_coff_sizemachdep (fragS *frag) |
252b5132 RH |
3980 | { |
3981 | return md_relax_table[frag->fr_subtype].rlx_length; | |
3982 | } | |
3983 | ||
3984 | #endif /* OBJ_COFF */ | |
3985 | ||
252b5132 RH |
3986 | #ifndef BFD_ASSEMBLER |
3987 | #ifdef OBJ_COFF | |
3988 | ||
3989 | /* Map BFD relocs to SH COFF relocs. */ | |
3990 | ||
3991 | struct reloc_map | |
3992 | { | |
3993 | bfd_reloc_code_real_type bfd_reloc; | |
3994 | int sh_reloc; | |
3995 | }; | |
3996 | ||
3997 | static const struct reloc_map coff_reloc_map[] = | |
3998 | { | |
3999 | { BFD_RELOC_32, R_SH_IMM32 }, | |
4000 | { BFD_RELOC_16, R_SH_IMM16 }, | |
4001 | { BFD_RELOC_8, R_SH_IMM8 }, | |
4002 | { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 }, | |
4003 | { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP }, | |
4004 | { BFD_RELOC_SH_IMM4, R_SH_IMM4 }, | |
4005 | { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 }, | |
4006 | { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 }, | |
4007 | { BFD_RELOC_SH_IMM8, R_SH_IMM8 }, | |
4008 | { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 }, | |
4009 | { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 }, | |
4010 | { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 }, | |
4011 | { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 }, | |
4012 | { BFD_RELOC_8_PCREL, R_SH_SWITCH8 }, | |
4013 | { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 }, | |
4014 | { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 }, | |
4015 | { BFD_RELOC_SH_USES, R_SH_USES }, | |
4016 | { BFD_RELOC_SH_COUNT, R_SH_COUNT }, | |
4017 | { BFD_RELOC_SH_ALIGN, R_SH_ALIGN }, | |
4018 | { BFD_RELOC_SH_CODE, R_SH_CODE }, | |
4019 | { BFD_RELOC_SH_DATA, R_SH_DATA }, | |
4020 | { BFD_RELOC_SH_LABEL, R_SH_LABEL }, | |
4021 | { BFD_RELOC_UNUSED, 0 } | |
4022 | }; | |
4023 | ||
4024 | /* Adjust a reloc for the SH. This is similar to the generic code, | |
4025 | but does some minor tweaking. */ | |
4026 | ||
4027 | void | |
8edc77b9 KK |
4028 | sh_coff_reloc_mangle (segment_info_type *seg, fixS *fix, |
4029 | struct internal_reloc *intr, unsigned int paddr) | |
252b5132 RH |
4030 | { |
4031 | symbolS *symbol_ptr = fix->fx_addsy; | |
4032 | symbolS *dot; | |
4033 | ||
4034 | intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where; | |
4035 | ||
4036 | if (! SWITCH_TABLE (fix)) | |
4037 | { | |
4038 | const struct reloc_map *rm; | |
4039 | ||
4040 | for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++) | |
4041 | if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type) | |
4042 | break; | |
4043 | if (rm->bfd_reloc == BFD_RELOC_UNUSED) | |
4044 | as_bad_where (fix->fx_file, fix->fx_line, | |
4045 | _("Can not represent %s relocation in this object file format"), | |
4046 | bfd_get_reloc_code_name (fix->fx_r_type)); | |
4047 | intr->r_type = rm->sh_reloc; | |
4048 | intr->r_offset = 0; | |
4049 | } | |
4050 | else | |
4051 | { | |
4052 | know (sh_relax); | |
4053 | ||
4054 | if (fix->fx_r_type == BFD_RELOC_16) | |
4055 | intr->r_type = R_SH_SWITCH16; | |
4056 | else if (fix->fx_r_type == BFD_RELOC_8) | |
4057 | intr->r_type = R_SH_SWITCH8; | |
4058 | else if (fix->fx_r_type == BFD_RELOC_32) | |
4059 | intr->r_type = R_SH_SWITCH32; | |
4060 | else | |
4061 | abort (); | |
4062 | ||
4063 | /* For a switch reloc, we set r_offset to the difference between | |
4064 | the reloc address and the subtrahend. When the linker is | |
4065 | doing relaxing, it can use the determine the starting and | |
4066 | ending points of the switch difference expression. */ | |
4067 | intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy); | |
4068 | } | |
4069 | ||
4070 | /* PC relative relocs are always against the current section. */ | |
4071 | if (symbol_ptr == NULL) | |
4072 | { | |
4073 | switch (fix->fx_r_type) | |
4074 | { | |
4075 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
4076 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
4077 | case BFD_RELOC_SH_PCDISP8BY2: | |
4078 | case BFD_RELOC_SH_PCDISP12BY2: | |
4079 | case BFD_RELOC_SH_USES: | |
4080 | symbol_ptr = seg->dot; | |
4081 | break; | |
4082 | default: | |
4083 | break; | |
4084 | } | |
4085 | } | |
4086 | ||
4087 | if (fix->fx_r_type == BFD_RELOC_SH_USES) | |
4088 | { | |
4089 | /* We can't store the offset in the object file, since this | |
4090 | reloc does not take up any space, so we store it in r_offset. | |
94f592af | 4091 | The fx_addnumber field was set in md_apply_fix3. */ |
252b5132 RH |
4092 | intr->r_offset = fix->fx_addnumber; |
4093 | } | |
4094 | else if (fix->fx_r_type == BFD_RELOC_SH_COUNT) | |
4095 | { | |
4096 | /* We can't store the count in the object file, since this reloc | |
4097 | does not take up any space, so we store it in r_offset. The | |
4098 | fx_offset field was set when the fixup was created in | |
4099 | sh_coff_frob_file. */ | |
4100 | intr->r_offset = fix->fx_offset; | |
4101 | /* This reloc is always absolute. */ | |
4102 | symbol_ptr = NULL; | |
4103 | } | |
4104 | else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN) | |
4105 | { | |
4106 | /* Store the alignment in the r_offset field. */ | |
4107 | intr->r_offset = fix->fx_offset; | |
4108 | /* This reloc is always absolute. */ | |
4109 | symbol_ptr = NULL; | |
4110 | } | |
4111 | else if (fix->fx_r_type == BFD_RELOC_SH_CODE | |
4112 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
4113 | || fix->fx_r_type == BFD_RELOC_SH_LABEL) | |
4114 | { | |
4115 | /* These relocs are always absolute. */ | |
4116 | symbol_ptr = NULL; | |
4117 | } | |
4118 | ||
4119 | /* Turn the segment of the symbol into an offset. */ | |
4120 | if (symbol_ptr != NULL) | |
4121 | { | |
4122 | dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot; | |
4123 | if (dot != NULL) | |
4124 | intr->r_symndx = dot->sy_number; | |
4125 | else | |
4126 | intr->r_symndx = symbol_ptr->sy_number; | |
4127 | } | |
4128 | else | |
4129 | intr->r_symndx = -1; | |
4130 | } | |
4131 | ||
4132 | #endif /* OBJ_COFF */ | |
4133 | #endif /* ! BFD_ASSEMBLER */ | |
4134 | ||
4135 | #ifdef BFD_ASSEMBLER | |
4136 | ||
4137 | /* Create a reloc. */ | |
4138 | ||
4139 | arelent * | |
8edc77b9 | 4140 | tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 RH |
4141 | { |
4142 | arelent *rel; | |
4143 | bfd_reloc_code_real_type r_type; | |
4144 | ||
4145 | rel = (arelent *) xmalloc (sizeof (arelent)); | |
49309057 ILT |
4146 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
4147 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
4148 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
4149 | ||
4150 | r_type = fixp->fx_r_type; | |
4151 | ||
4152 | if (SWITCH_TABLE (fixp)) | |
4153 | { | |
bdfaef52 JR |
4154 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); |
4155 | rel->addend = 0; | |
252b5132 RH |
4156 | if (r_type == BFD_RELOC_16) |
4157 | r_type = BFD_RELOC_SH_SWITCH16; | |
4158 | else if (r_type == BFD_RELOC_8) | |
4159 | r_type = BFD_RELOC_8_PCREL; | |
4160 | else if (r_type == BFD_RELOC_32) | |
4161 | r_type = BFD_RELOC_SH_SWITCH32; | |
4162 | else | |
4163 | abort (); | |
4164 | } | |
4165 | else if (r_type == BFD_RELOC_SH_USES) | |
4166 | rel->addend = fixp->fx_addnumber; | |
4167 | else if (r_type == BFD_RELOC_SH_COUNT) | |
4168 | rel->addend = fixp->fx_offset; | |
4169 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
4170 | rel->addend = fixp->fx_offset; | |
4171 | else if (r_type == BFD_RELOC_VTABLE_INHERIT | |
4172 | || r_type == BFD_RELOC_VTABLE_ENTRY) | |
4173 | rel->addend = fixp->fx_offset; | |
015551fc JR |
4174 | else if (r_type == BFD_RELOC_SH_LOOP_START |
4175 | || r_type == BFD_RELOC_SH_LOOP_END) | |
4176 | rel->addend = fixp->fx_offset; | |
4177 | else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) | |
4178 | { | |
4179 | rel->addend = 0; | |
4180 | rel->address = rel->addend = fixp->fx_offset; | |
4181 | } | |
324bfcf3 AO |
4182 | #ifdef HAVE_SH64 |
4183 | else if (shmedia_init_reloc (rel, fixp)) | |
4184 | ; | |
4185 | #endif | |
252b5132 RH |
4186 | else if (fixp->fx_pcrel) |
4187 | rel->addend = fixp->fx_addnumber; | |
a1cc9221 AO |
4188 | else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF) |
4189 | rel->addend = fixp->fx_addnumber; | |
252b5132 RH |
4190 | else |
4191 | rel->addend = 0; | |
4192 | ||
4193 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
c861c80c | 4194 | #ifdef OBJ_ELF |
bdfaef52 JR |
4195 | if (rel->howto->type == R_SH_IND12W) |
4196 | rel->addend += fixp->fx_offset - 4; | |
c861c80c | 4197 | #endif |
a161fe53 | 4198 | if (rel->howto == NULL) |
252b5132 RH |
4199 | { |
4200 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
4201 | _("Cannot represent relocation type %s"), | |
4202 | bfd_get_reloc_code_name (r_type)); | |
4203 | /* Set howto to a garbage value so that we can keep going. */ | |
4204 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
4205 | assert (rel->howto != NULL); | |
4206 | } | |
4207 | ||
4208 | return rel; | |
4209 | } | |
4210 | ||
538cd60f AO |
4211 | #ifdef OBJ_ELF |
4212 | inline static char * | |
8edc77b9 | 4213 | sh_end_of_match (char *cont, char *what) |
538cd60f AO |
4214 | { |
4215 | int len = strlen (what); | |
4216 | ||
4217 | if (strncasecmp (cont, what, strlen (what)) == 0 | |
4218 | && ! is_part_of_name (cont[len])) | |
4219 | return cont + len; | |
4220 | ||
4221 | return NULL; | |
5d6255fe | 4222 | } |
538cd60f AO |
4223 | |
4224 | int | |
8edc77b9 | 4225 | sh_parse_name (char const *name, expressionS *exprP, char *nextcharP) |
538cd60f AO |
4226 | { |
4227 | char *next = input_line_pointer; | |
4228 | char *next_end; | |
4229 | int reloc_type; | |
4230 | segT segment; | |
4231 | ||
4232 | exprP->X_op_symbol = NULL; | |
4233 | ||
4234 | if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) | |
4235 | { | |
4236 | if (! GOT_symbol) | |
4237 | GOT_symbol = symbol_find_or_make (name); | |
4238 | ||
4239 | exprP->X_add_symbol = GOT_symbol; | |
4240 | no_suffix: | |
4241 | /* If we have an absolute symbol or a reg, then we know its | |
4242 | value now. */ | |
4243 | segment = S_GET_SEGMENT (exprP->X_add_symbol); | |
4244 | if (segment == absolute_section) | |
4245 | { | |
4246 | exprP->X_op = O_constant; | |
4247 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
4248 | exprP->X_add_symbol = NULL; | |
4249 | } | |
4250 | else if (segment == reg_section) | |
4251 | { | |
4252 | exprP->X_op = O_register; | |
4253 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
4254 | exprP->X_add_symbol = NULL; | |
4255 | } | |
4256 | else | |
4257 | { | |
4258 | exprP->X_op = O_symbol; | |
4259 | exprP->X_add_number = 0; | |
4260 | } | |
4261 | ||
4262 | return 1; | |
4263 | } | |
4264 | ||
4265 | exprP->X_add_symbol = symbol_find_or_make (name); | |
5d6255fe | 4266 | |
538cd60f AO |
4267 | if (*nextcharP != '@') |
4268 | goto no_suffix; | |
4269 | else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) | |
4270 | reloc_type = BFD_RELOC_32_GOTOFF; | |
324bfcf3 AO |
4271 | else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) |
4272 | reloc_type = BFD_RELOC_SH_GOTPLT32; | |
538cd60f AO |
4273 | else if ((next_end = sh_end_of_match (next + 1, "GOT"))) |
4274 | reloc_type = BFD_RELOC_32_GOT_PCREL; | |
4275 | else if ((next_end = sh_end_of_match (next + 1, "PLT"))) | |
4276 | reloc_type = BFD_RELOC_32_PLT_PCREL; | |
9efb3b7b KK |
4277 | else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) |
4278 | reloc_type = BFD_RELOC_SH_TLS_GD_32; | |
4279 | else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) | |
4280 | reloc_type = BFD_RELOC_SH_TLS_LD_32; | |
4281 | else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) | |
4282 | reloc_type = BFD_RELOC_SH_TLS_IE_32; | |
4283 | else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) | |
4284 | reloc_type = BFD_RELOC_SH_TLS_LE_32; | |
4285 | else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) | |
4286 | reloc_type = BFD_RELOC_SH_TLS_LDO_32; | |
538cd60f AO |
4287 | else |
4288 | goto no_suffix; | |
4289 | ||
4290 | *input_line_pointer = *nextcharP; | |
4291 | input_line_pointer = next_end; | |
4292 | *nextcharP = *input_line_pointer; | |
4293 | *input_line_pointer = '\0'; | |
4294 | ||
4295 | exprP->X_op = O_PIC_reloc; | |
4296 | exprP->X_add_number = 0; | |
4297 | exprP->X_md = reloc_type; | |
4298 | ||
4299 | return 1; | |
4300 | } | |
4301 | #endif | |
252b5132 | 4302 | #endif /* BFD_ASSEMBLER */ |