Commit | Line | Data |
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252b5132 | 1 | /* tc-sh.c -- Assemble code for the Hitachi Super-H |
49309057 | 2 | Copyright (C) 1993, 94, 95, 96, 97, 98, 1999 Free Software Foundation. |
252b5132 RH |
3 | |
4 | This file is part of GAS, the GNU Assembler. | |
5 | ||
6 | GAS is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GAS is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GAS; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | /* | |
22 | Written By Steve Chamberlain | |
23 | sac@cygnus.com | |
24 | */ | |
25 | ||
26 | #include <stdio.h> | |
27 | #include "as.h" | |
28 | #include "bfd.h" | |
29 | #include "subsegs.h" | |
30 | #define DEFINE_TABLE | |
31 | #include "opcodes/sh-opc.h" | |
32 | #include <ctype.h> | |
d4845d57 JR |
33 | |
34 | #ifdef OBJ_ELF | |
35 | #include "elf/sh.h" | |
36 | #endif | |
37 | ||
252b5132 RH |
38 | const char comment_chars[] = "!"; |
39 | const char line_separator_chars[] = ";"; | |
40 | const char line_comment_chars[] = "!#"; | |
41 | ||
42 | static void s_uses PARAMS ((int)); | |
43 | ||
44 | static void sh_count_relocs PARAMS ((bfd *, segT, PTR)); | |
45 | static void sh_frob_section PARAMS ((bfd *, segT, PTR)); | |
46 | ||
252b5132 RH |
47 | void cons (); |
48 | void s_align_bytes (); | |
49 | static void s_uacons PARAMS ((int)); | |
d4845d57 JR |
50 | static sh_opcode_info *find_cooked_opcode PARAMS ((char **)); |
51 | static void assemble_ppi PARAMS ((char *, sh_opcode_info *)); | |
252b5132 RH |
52 | |
53 | int shl = 0; | |
54 | ||
55 | static void | |
56 | little (ignore) | |
57 | int ignore; | |
58 | { | |
59 | shl = 1; | |
60 | target_big_endian = 0; | |
61 | } | |
62 | ||
d4845d57 JR |
63 | /* This table describes all the machine specific pseudo-ops the assembler |
64 | has to support. The fields are: | |
65 | pseudo-op name without dot | |
66 | function to call to execute this pseudo-op | |
67 | Integer arg to pass to the function | |
68 | */ | |
69 | ||
252b5132 RH |
70 | const pseudo_typeS md_pseudo_table[] = |
71 | { | |
72 | {"int", cons, 4}, | |
73 | {"word", cons, 2}, | |
74 | {"form", listing_psize, 0}, | |
75 | {"little", little, 0}, | |
76 | {"heading", listing_title, 0}, | |
77 | {"import", s_ignore, 0}, | |
78 | {"page", listing_eject, 0}, | |
79 | {"program", s_ignore, 0}, | |
80 | {"uses", s_uses, 0}, | |
81 | {"uaword", s_uacons, 2}, | |
82 | {"ualong", s_uacons, 4}, | |
83 | {0, 0, 0} | |
84 | }; | |
85 | ||
86 | /*int md_reloc_size; */ | |
87 | ||
88 | int sh_relax; /* set if -relax seen */ | |
89 | ||
90 | /* Whether -small was seen. */ | |
91 | ||
92 | int sh_small; | |
93 | ||
d4845d57 JR |
94 | /* Whether -dsp was seen. */ |
95 | ||
96 | static int sh_dsp; | |
97 | ||
98 | /* The bit mask of architectures that could | |
99 | accomodate the insns seen so far. */ | |
100 | static int valid_arch; | |
101 | ||
252b5132 RH |
102 | const char EXP_CHARS[] = "eE"; |
103 | ||
104 | /* Chars that mean this number is a floating point constant */ | |
105 | /* As in 0f12.456 */ | |
106 | /* or 0d1.2345e12 */ | |
107 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
108 | ||
109 | #define C(a,b) ENCODE_RELAX(a,b) | |
110 | ||
111 | #define JREG 14 /* Register used as a temp when relaxing */ | |
112 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) | |
113 | #define GET_WHAT(x) ((x>>4)) | |
114 | ||
115 | /* These are the three types of relaxable instrction */ | |
116 | #define COND_JUMP 1 | |
117 | #define COND_JUMP_DELAY 2 | |
118 | #define UNCOND_JUMP 3 | |
119 | #define END 4 | |
120 | ||
121 | #define UNDEF_DISP 0 | |
122 | #define COND8 1 | |
123 | #define COND12 2 | |
124 | #define COND32 3 | |
125 | #define UNCOND12 1 | |
126 | #define UNCOND32 2 | |
127 | #define UNDEF_WORD_DISP 4 | |
128 | ||
129 | #define UNCOND12 1 | |
130 | #define UNCOND32 2 | |
131 | ||
132 | /* Branch displacements are from the address of the branch plus | |
133 | four, thus all minimum and maximum values have 4 added to them. */ | |
134 | #define COND8_F 258 | |
135 | #define COND8_M -252 | |
136 | #define COND8_LENGTH 2 | |
137 | ||
138 | /* There is one extra instruction before the branch, so we must add | |
139 | two more bytes to account for it. */ | |
140 | #define COND12_F 4100 | |
141 | #define COND12_M -4090 | |
142 | #define COND12_LENGTH 6 | |
143 | ||
144 | #define COND12_DELAY_LENGTH 4 | |
145 | ||
146 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
147 | since this relocation type is not supported yet. */ | |
148 | #define COND32_F (1<<30) | |
149 | #define COND32_M -(1<<30) | |
150 | #define COND32_LENGTH 14 | |
151 | ||
152 | #define UNCOND12_F 4098 | |
153 | #define UNCOND12_M -4092 | |
154 | #define UNCOND12_LENGTH 2 | |
155 | ||
156 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
157 | since this relocation type is not supported yet. */ | |
158 | #define UNCOND32_F (1<<30) | |
159 | #define UNCOND32_M -(1<<30) | |
160 | #define UNCOND32_LENGTH 14 | |
161 | ||
162 | const relax_typeS md_relax_table[C (END, 0)] = { | |
163 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
164 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
165 | ||
166 | { 0 }, | |
167 | /* C (COND_JUMP, COND8) */ | |
168 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
169 | /* C (COND_JUMP, COND12) */ | |
170 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
171 | /* C (COND_JUMP, COND32) */ | |
172 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
173 | { 0 }, { 0 }, { 0 }, { 0 }, | |
174 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
175 | ||
176 | { 0 }, | |
177 | /* C (COND_JUMP_DELAY, COND8) */ | |
178 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
179 | /* C (COND_JUMP_DELAY, COND12) */ | |
180 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
181 | /* C (COND_JUMP_DELAY, COND32) */ | |
182 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
183 | { 0 }, { 0 }, { 0 }, { 0 }, | |
184 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
185 | ||
186 | { 0 }, | |
187 | /* C (UNCOND_JUMP, UNCOND12) */ | |
188 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
189 | /* C (UNCOND_JUMP, UNCOND32) */ | |
190 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
191 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
192 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
193 | }; | |
194 | ||
195 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ | |
196 | ||
197 | /* | |
198 | This function is called once, at assembler startup time. This should | |
199 | set up all the tables, etc that the MD part of the assembler needs | |
200 | */ | |
201 | ||
202 | void | |
203 | md_begin () | |
204 | { | |
205 | sh_opcode_info *opcode; | |
206 | char *prev_name = ""; | |
d4845d57 | 207 | int target_arch; |
252b5132 RH |
208 | |
209 | if (! shl) | |
210 | target_big_endian = 1; | |
211 | ||
d4845d57 JR |
212 | target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up); |
213 | valid_arch = target_arch; | |
214 | ||
252b5132 RH |
215 | opcode_hash_control = hash_new (); |
216 | ||
217 | /* Insert unique names into hash table */ | |
218 | for (opcode = sh_table; opcode->name; opcode++) | |
219 | { | |
d4845d57 | 220 | if (opcode->arch & target_arch && strcmp (prev_name, opcode->name)) |
252b5132 RH |
221 | { |
222 | prev_name = opcode->name; | |
223 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
224 | } | |
225 | else | |
226 | { | |
227 | /* Make all the opcodes with the same name point to the same | |
228 | string */ | |
229 | opcode->name = prev_name; | |
230 | } | |
231 | } | |
232 | } | |
233 | ||
234 | static int reg_m; | |
235 | static int reg_n; | |
d4845d57 JR |
236 | static int reg_x, reg_y; |
237 | static int reg_efg; | |
252b5132 RH |
238 | static int reg_b; |
239 | ||
240 | static expressionS immediate; /* absolute expression */ | |
241 | ||
242 | typedef struct | |
243 | { | |
244 | sh_arg_type type; | |
245 | int reg; | |
246 | } | |
247 | ||
248 | sh_operand_info; | |
249 | ||
250 | /* try and parse a reg name, returns number of chars consumed */ | |
251 | static int | |
252 | parse_reg (src, mode, reg) | |
253 | char *src; | |
254 | int *mode; | |
255 | int *reg; | |
256 | { | |
257 | /* We use !isalnum for the next character after the register name, to | |
258 | make sure that we won't accidentally recognize a symbol name such as | |
259 | 'sram' as being a reference to the register 'sr'. */ | |
260 | ||
261 | if (src[0] == 'r') | |
262 | { | |
d4845d57 JR |
263 | if (src[1] == '1') |
264 | { | |
265 | if (src[2] >= '0' && src[2] <= '5' | |
266 | && ! isalnum ((unsigned char) src[3])) | |
267 | { | |
268 | *mode = A_REG_N; | |
269 | *reg = 10 + src[2] - '0'; | |
270 | return 3; | |
271 | } | |
272 | } | |
273 | if (src[1] >= '0' && src[1] <= '9' | |
274 | && ! isalnum ((unsigned char) src[2])) | |
275 | { | |
276 | *mode = A_REG_N; | |
277 | *reg = (src[1] - '0'); | |
278 | return 2; | |
279 | } | |
252b5132 RH |
280 | if (src[1] >= '0' && src[1] <= '7' && strncmp(&src[2], "_bank", 5) == 0 |
281 | && ! isalnum ((unsigned char) src[7])) | |
282 | { | |
283 | *mode = A_REG_B; | |
284 | *reg = (src[1] - '0'); | |
285 | return 7; | |
286 | } | |
d4845d57 JR |
287 | |
288 | if (src[1] == 'e' && ! isalnum ((unsigned char) src[2])) | |
289 | { | |
290 | *mode = A_RE; | |
291 | return 2; | |
292 | } | |
293 | if (src[1] == 's' && ! isalnum ((unsigned char) src[2])) | |
294 | { | |
295 | *mode = A_RS; | |
296 | return 2; | |
297 | } | |
252b5132 RH |
298 | } |
299 | ||
d4845d57 | 300 | if (src[0] == 'a') |
252b5132 | 301 | { |
d4845d57 JR |
302 | if (src[1] == '0') |
303 | { | |
304 | if (! isalnum ((unsigned char) src[2])) | |
305 | { | |
306 | *mode = DSP_REG_N; | |
307 | *reg = A_A0_NUM; | |
308 | return 2; | |
309 | } | |
310 | if (src[2] == 'g' && ! isalnum ((unsigned char) src[3])) | |
311 | { | |
312 | *mode = DSP_REG_N; | |
313 | *reg = A_A0G_NUM; | |
314 | return 3; | |
315 | } | |
316 | } | |
252b5132 RH |
317 | if (src[1] == '1') |
318 | { | |
d4845d57 | 319 | if (! isalnum ((unsigned char) src[2])) |
252b5132 | 320 | { |
d4845d57 JR |
321 | *mode = DSP_REG_N; |
322 | *reg = A_A1_NUM; | |
323 | return 2; | |
324 | } | |
325 | if (src[2] == 'g' && ! isalnum ((unsigned char) src[3])) | |
326 | { | |
327 | *mode = DSP_REG_N; | |
328 | *reg = A_A1G_NUM; | |
252b5132 RH |
329 | return 3; |
330 | } | |
331 | } | |
d4845d57 JR |
332 | |
333 | if (src[1] == 'x' && src[2] >= '0' && src[2] <= '1' | |
334 | && ! isalnum ((unsigned char) src[3])) | |
252b5132 RH |
335 | { |
336 | *mode = A_REG_N; | |
d4845d57 JR |
337 | *reg = 4 + (src[1] - '0'); |
338 | return 3; | |
339 | } | |
340 | if (src[1] == 'y' && src[2] >= '0' && src[2] <= '1' | |
341 | && ! isalnum ((unsigned char) src[3])) | |
342 | { | |
343 | *mode = A_REG_N; | |
344 | *reg = 6 + (src[1] - '0'); | |
345 | return 3; | |
346 | } | |
347 | if (src[1] == 's' && src[2] >= '0' && src[2] <= '3' | |
348 | && ! isalnum ((unsigned char) src[3])) | |
349 | { | |
350 | int n = src[1] - '0'; | |
351 | ||
352 | *mode = A_REG_N; | |
353 | *reg = n | ((~n & 2) << 1); | |
354 | return 3; | |
355 | } | |
356 | } | |
357 | ||
358 | if (src[0] == 'i' && src[1] && ! isalnum ((unsigned char) src[3])) | |
359 | { | |
360 | if (src[1] == 's') | |
361 | { | |
362 | *mode = A_REG_N; | |
363 | *reg = 8; | |
252b5132 RH |
364 | return 2; |
365 | } | |
d4845d57 JR |
366 | if (src[1] == 'x') |
367 | { | |
368 | *mode = A_REG_N; | |
369 | *reg = 8; | |
370 | return 2; | |
371 | } | |
372 | if (src[1] == 'y') | |
373 | { | |
374 | *mode = A_REG_N; | |
375 | *reg = 9; | |
376 | return 2; | |
377 | } | |
378 | } | |
379 | ||
380 | if (src[0] == 'x' && src[1] >= '0' && src[1] <= '1' | |
381 | && ! isalnum ((unsigned char) src[2])) | |
382 | { | |
383 | *mode = DSP_REG_N; | |
384 | *reg = A_X0_NUM + src[1] - '0'; | |
385 | return 2; | |
386 | } | |
387 | ||
388 | if (src[0] == 'y' && src[1] >= '0' && src[1] <= '1' | |
389 | && ! isalnum ((unsigned char) src[2])) | |
390 | { | |
391 | *mode = DSP_REG_N; | |
392 | *reg = A_Y0_NUM + src[1] - '0'; | |
393 | return 2; | |
394 | } | |
395 | ||
396 | if (src[0] == 'm' && src[1] >= '0' && src[1] <= '1' | |
397 | && ! isalnum ((unsigned char) src[2])) | |
398 | { | |
399 | *mode = DSP_REG_N; | |
400 | *reg = src[1] == '0' ? A_M0_NUM : A_M1_NUM; | |
401 | return 2; | |
252b5132 RH |
402 | } |
403 | ||
404 | if (src[0] == 's' | |
405 | && src[1] == 's' | |
406 | && src[2] == 'r' && ! isalnum ((unsigned char) src[3])) | |
407 | { | |
408 | *mode = A_SSR; | |
409 | return 3; | |
410 | } | |
411 | ||
412 | if (src[0] == 's' && src[1] == 'p' && src[2] == 'c' | |
413 | && ! isalnum ((unsigned char) src[3])) | |
414 | { | |
415 | *mode = A_SPC; | |
416 | return 3; | |
417 | } | |
418 | ||
419 | if (src[0] == 's' && src[1] == 'g' && src[2] == 'r' | |
420 | && ! isalnum ((unsigned char) src[3])) | |
421 | { | |
422 | *mode = A_SGR; | |
423 | return 3; | |
424 | } | |
425 | ||
d4845d57 JR |
426 | if (src[0] == 'd' && src[1] == 's' && src[2] == 'r' |
427 | && ! isalnum ((unsigned char) src[3])) | |
428 | { | |
429 | *mode = A_DSR; | |
430 | return 3; | |
431 | } | |
432 | ||
252b5132 RH |
433 | if (src[0] == 'd' && src[1] == 'b' && src[2] == 'r' |
434 | && ! isalnum ((unsigned char) src[3])) | |
435 | { | |
436 | *mode = A_DBR; | |
437 | return 3; | |
438 | } | |
439 | ||
440 | if (src[0] == 's' && src[1] == 'r' && ! isalnum ((unsigned char) src[2])) | |
441 | { | |
442 | *mode = A_SR; | |
443 | return 2; | |
444 | } | |
445 | ||
446 | if (src[0] == 's' && src[1] == 'p' && ! isalnum ((unsigned char) src[2])) | |
447 | { | |
448 | *mode = A_REG_N; | |
449 | *reg = 15; | |
450 | return 2; | |
451 | } | |
452 | ||
453 | if (src[0] == 'p' && src[1] == 'r' && ! isalnum ((unsigned char) src[2])) | |
454 | { | |
455 | *mode = A_PR; | |
456 | return 2; | |
457 | } | |
458 | if (src[0] == 'p' && src[1] == 'c' && ! isalnum ((unsigned char) src[2])) | |
459 | { | |
460 | *mode = A_DISP_PC; | |
461 | return 2; | |
462 | } | |
463 | if (src[0] == 'g' && src[1] == 'b' && src[2] == 'r' | |
464 | && ! isalnum ((unsigned char) src[3])) | |
465 | { | |
466 | *mode = A_GBR; | |
467 | return 3; | |
468 | } | |
469 | if (src[0] == 'v' && src[1] == 'b' && src[2] == 'r' | |
470 | && ! isalnum ((unsigned char) src[3])) | |
471 | { | |
472 | *mode = A_VBR; | |
473 | return 3; | |
474 | } | |
475 | ||
476 | if (src[0] == 'm' && src[1] == 'a' && src[2] == 'c' | |
477 | && ! isalnum ((unsigned char) src[4])) | |
478 | { | |
479 | if (src[3] == 'l') | |
480 | { | |
481 | *mode = A_MACL; | |
482 | return 4; | |
483 | } | |
484 | if (src[3] == 'h') | |
485 | { | |
486 | *mode = A_MACH; | |
487 | return 4; | |
488 | } | |
489 | } | |
d4845d57 JR |
490 | if (src[0] == 'm' && src[1] == 'o' && src[2] == 'd' |
491 | && ! isalnum ((unsigned char) src[4])) | |
492 | { | |
493 | *mode = A_MOD; | |
494 | return 3; | |
495 | } | |
252b5132 RH |
496 | if (src[0] == 'f' && src[1] == 'r') |
497 | { | |
498 | if (src[2] == '1') | |
499 | { | |
500 | if (src[3] >= '0' && src[3] <= '5' | |
501 | && ! isalnum ((unsigned char) src[4])) | |
502 | { | |
503 | *mode = F_REG_N; | |
504 | *reg = 10 + src[3] - '0'; | |
505 | return 4; | |
506 | } | |
507 | } | |
508 | if (src[2] >= '0' && src[2] <= '9' | |
509 | && ! isalnum ((unsigned char) src[3])) | |
510 | { | |
511 | *mode = F_REG_N; | |
512 | *reg = (src[2] - '0'); | |
513 | return 3; | |
514 | } | |
515 | } | |
516 | if (src[0] == 'd' && src[1] == 'r') | |
517 | { | |
518 | if (src[2] == '1') | |
519 | { | |
520 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
521 | && ! isalnum ((unsigned char) src[4])) | |
522 | { | |
523 | *mode = D_REG_N; | |
524 | *reg = 10 + src[3] - '0'; | |
525 | return 4; | |
526 | } | |
527 | } | |
528 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
529 | && ! isalnum ((unsigned char) src[3])) | |
530 | { | |
531 | *mode = D_REG_N; | |
532 | *reg = (src[2] - '0'); | |
533 | return 3; | |
534 | } | |
535 | } | |
536 | if (src[0] == 'x' && src[1] == 'd') | |
537 | { | |
538 | if (src[2] == '1') | |
539 | { | |
540 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
541 | && ! isalnum ((unsigned char) src[4])) | |
542 | { | |
543 | *mode = X_REG_N; | |
544 | *reg = 11 + src[3] - '0'; | |
545 | return 4; | |
546 | } | |
547 | } | |
548 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
549 | && ! isalnum ((unsigned char) src[3])) | |
550 | { | |
551 | *mode = X_REG_N; | |
552 | *reg = (src[2] - '0') + 1; | |
553 | return 3; | |
554 | } | |
555 | } | |
556 | if (src[0] == 'f' && src[1] == 'v') | |
557 | { | |
558 | if (src[2] == '1'&& src[3] == '2' && ! isalnum ((unsigned char) src[4])) | |
559 | { | |
560 | *mode = V_REG_N; | |
561 | *reg = 12; | |
562 | return 4; | |
563 | } | |
564 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') | |
565 | && ! isalnum ((unsigned char) src[3])) | |
566 | { | |
567 | *mode = V_REG_N; | |
568 | *reg = (src[2] - '0'); | |
569 | return 3; | |
570 | } | |
571 | } | |
572 | if (src[0] == 'f' && src[1] == 'p' && src[2] == 'u' && src[3] == 'l' | |
573 | && ! isalnum ((unsigned char) src[4])) | |
574 | { | |
575 | *mode = FPUL_N; | |
576 | return 4; | |
577 | } | |
578 | ||
579 | if (src[0] == 'f' && src[1] == 'p' && src[2] == 's' && src[3] == 'c' | |
580 | && src[4] == 'r' && ! isalnum ((unsigned char) src[5])) | |
581 | { | |
582 | *mode = FPSCR_N; | |
583 | return 5; | |
584 | } | |
585 | ||
586 | if (src[0] == 'x' && src[1] == 'm' && src[2] == 't' && src[3] == 'r' | |
587 | && src[4] == 'x' && ! isalnum ((unsigned char) src[5])) | |
588 | { | |
589 | *mode = XMTRX_M4; | |
590 | return 5; | |
591 | } | |
592 | ||
593 | return 0; | |
594 | } | |
595 | ||
596 | static symbolS *dot() | |
597 | { | |
598 | const char *fake; | |
599 | ||
600 | /* JF: '.' is pseudo symbol with value of current location | |
601 | in current segment. */ | |
602 | fake = FAKE_LABEL_NAME; | |
603 | return symbol_new (fake, | |
604 | now_seg, | |
605 | (valueT) frag_now_fix (), | |
606 | frag_now); | |
607 | ||
608 | } | |
609 | ||
610 | ||
611 | static | |
612 | char * | |
613 | parse_exp (s) | |
614 | char *s; | |
615 | { | |
616 | char *save; | |
617 | char *new; | |
618 | ||
619 | save = input_line_pointer; | |
620 | input_line_pointer = s; | |
621 | expression (&immediate); | |
622 | if (immediate.X_op == O_absent) | |
623 | as_bad (_("missing operand")); | |
624 | new = input_line_pointer; | |
625 | input_line_pointer = save; | |
626 | return new; | |
627 | } | |
628 | ||
629 | ||
630 | /* The many forms of operand: | |
631 | ||
632 | Rn Register direct | |
633 | @Rn Register indirect | |
634 | @Rn+ Autoincrement | |
635 | @-Rn Autodecrement | |
636 | @(disp:4,Rn) | |
637 | @(disp:8,GBR) | |
638 | @(disp:8,PC) | |
639 | ||
640 | @(R0,Rn) | |
641 | @(R0,GBR) | |
642 | ||
643 | disp:8 | |
644 | disp:12 | |
645 | #imm8 | |
646 | pr, gbr, vbr, macl, mach | |
647 | ||
648 | */ | |
649 | ||
650 | static | |
651 | char * | |
652 | parse_at (src, op) | |
653 | char *src; | |
654 | sh_operand_info *op; | |
655 | { | |
656 | int len; | |
657 | int mode; | |
658 | src++; | |
659 | if (src[0] == '-') | |
660 | { | |
661 | /* Must be predecrement */ | |
662 | src++; | |
663 | ||
664 | len = parse_reg (src, &mode, &(op->reg)); | |
665 | if (mode != A_REG_N) | |
666 | as_bad (_("illegal register after @-")); | |
667 | ||
668 | op->type = A_DEC_N; | |
669 | src += len; | |
670 | } | |
671 | else if (src[0] == '(') | |
672 | { | |
673 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
674 | @(r0, rn) */ | |
675 | src++; | |
676 | len = parse_reg (src, &mode, &(op->reg)); | |
677 | if (len && mode == A_REG_N) | |
678 | { | |
679 | src += len; | |
680 | if (op->reg != 0) | |
681 | { | |
682 | as_bad (_("must be @(r0,...)")); | |
683 | } | |
684 | if (src[0] == ',') | |
685 | src++; | |
686 | /* Now can be rn or gbr */ | |
687 | len = parse_reg (src, &mode, &(op->reg)); | |
688 | if (mode == A_GBR) | |
689 | { | |
690 | op->type = A_R0_GBR; | |
691 | } | |
692 | else if (mode == A_REG_N) | |
693 | { | |
694 | op->type = A_IND_R0_REG_N; | |
695 | } | |
696 | else | |
697 | { | |
698 | as_bad (_("syntax error in @(r0,...)")); | |
699 | } | |
700 | } | |
701 | else | |
702 | { | |
703 | /* Must be an @(disp,.. thing) */ | |
704 | src = parse_exp (src); | |
705 | if (src[0] == ',') | |
706 | src++; | |
707 | /* Now can be rn, gbr or pc */ | |
708 | len = parse_reg (src, &mode, &op->reg); | |
709 | if (len) | |
710 | { | |
711 | if (mode == A_REG_N) | |
712 | { | |
713 | op->type = A_DISP_REG_N; | |
714 | } | |
715 | else if (mode == A_GBR) | |
716 | { | |
717 | op->type = A_DISP_GBR; | |
718 | } | |
719 | else if (mode == A_DISP_PC) | |
720 | { | |
721 | /* Turn a plain @(4,pc) into @(.+4,pc) */ | |
722 | if (immediate.X_op == O_constant) { | |
723 | immediate.X_add_symbol = dot(); | |
724 | immediate.X_op = O_symbol; | |
725 | } | |
726 | op->type = A_DISP_PC; | |
727 | } | |
728 | else | |
729 | { | |
730 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
731 | } | |
732 | } | |
733 | else | |
734 | { | |
735 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
736 | } | |
737 | } | |
738 | src += len; | |
739 | if (src[0] != ')') | |
740 | as_bad (_("expecting )")); | |
741 | else | |
742 | src++; | |
743 | } | |
744 | else | |
745 | { | |
746 | src += parse_reg (src, &mode, &(op->reg)); | |
747 | if (mode != A_REG_N) | |
748 | { | |
749 | as_bad (_("illegal register after @")); | |
750 | } | |
751 | if (src[0] == '+') | |
752 | { | |
252b5132 | 753 | src++; |
d4845d57 JR |
754 | if ((src[0] == 'r' && src[1] == '8') |
755 | || (src[0] == 'i' && (src[1] == 'x' || src[1] == 's'))) | |
756 | { | |
757 | src += 2; | |
758 | op->type = A_PMOD_N; | |
759 | } | |
760 | if ((src[0] == 'r' && src[1] == '9') | |
761 | || (src[0] == 'i' && src[1] == 'y')) | |
762 | { | |
763 | src += 2; | |
764 | op->type = A_PMODY_N; | |
765 | } | |
766 | else | |
767 | op->type = A_INC_N; | |
252b5132 RH |
768 | } |
769 | else | |
770 | { | |
771 | op->type = A_IND_N; | |
772 | } | |
773 | } | |
774 | return src; | |
775 | } | |
776 | ||
777 | static void | |
778 | get_operand (ptr, op) | |
779 | char **ptr; | |
780 | sh_operand_info *op; | |
781 | { | |
782 | char *src = *ptr; | |
783 | int mode = -1; | |
784 | unsigned int len; | |
785 | ||
786 | if (src[0] == '#') | |
787 | { | |
788 | src++; | |
789 | *ptr = parse_exp (src); | |
790 | op->type = A_IMM; | |
791 | return; | |
792 | } | |
793 | ||
794 | else if (src[0] == '@') | |
795 | { | |
796 | *ptr = parse_at (src, op); | |
797 | return; | |
798 | } | |
799 | len = parse_reg (src, &mode, &(op->reg)); | |
800 | if (len) | |
801 | { | |
802 | *ptr = src + len; | |
803 | op->type = mode; | |
804 | return; | |
805 | } | |
806 | else | |
807 | { | |
808 | /* Not a reg, the only thing left is a displacement */ | |
809 | *ptr = parse_exp (src); | |
810 | op->type = A_DISP_PC; | |
811 | return; | |
812 | } | |
813 | } | |
814 | ||
815 | static | |
816 | char * | |
817 | get_operands (info, args, operand) | |
818 | sh_opcode_info *info; | |
819 | char *args; | |
820 | sh_operand_info *operand; | |
821 | ||
822 | { | |
823 | char *ptr = args; | |
824 | if (info->arg[0]) | |
825 | { | |
d4845d57 JR |
826 | /* The pre-processor will eliminate whitespace in front of '@' |
827 | after the first argument; we may be called multiple times | |
828 | from assemble_ppi, so don't insist on finding whitespace here. */ | |
829 | if (*ptr == ' ') | |
830 | ptr++; | |
252b5132 RH |
831 | |
832 | get_operand (&ptr, operand + 0); | |
833 | if (info->arg[1]) | |
834 | { | |
835 | if (*ptr == ',') | |
836 | { | |
837 | ptr++; | |
838 | } | |
839 | get_operand (&ptr, operand + 1); | |
840 | if (info->arg[2]) | |
841 | { | |
842 | if (*ptr == ',') | |
843 | { | |
844 | ptr++; | |
845 | } | |
846 | get_operand (&ptr, operand + 2); | |
847 | } | |
848 | else | |
849 | { | |
850 | operand[2].type = 0; | |
851 | } | |
852 | } | |
853 | else | |
854 | { | |
855 | operand[1].type = 0; | |
856 | operand[2].type = 0; | |
857 | } | |
858 | } | |
859 | else | |
860 | { | |
861 | operand[0].type = 0; | |
862 | operand[1].type = 0; | |
863 | operand[2].type = 0; | |
864 | } | |
865 | return ptr; | |
866 | } | |
867 | ||
868 | /* Passed a pointer to a list of opcodes which use different | |
869 | addressing modes, return the opcode which matches the opcodes | |
870 | provided | |
871 | */ | |
872 | ||
873 | static | |
874 | sh_opcode_info * | |
875 | get_specific (opcode, operands) | |
876 | sh_opcode_info *opcode; | |
877 | sh_operand_info *operands; | |
878 | { | |
879 | sh_opcode_info *this_try = opcode; | |
880 | char *name = opcode->name; | |
881 | int n = 0; | |
882 | while (opcode->name) | |
883 | { | |
884 | this_try = opcode++; | |
885 | if (this_try->name != name) | |
886 | { | |
887 | /* We've looked so far down the table that we've run out of | |
888 | opcodes with the same name */ | |
889 | return 0; | |
890 | } | |
891 | /* look at both operands needed by the opcodes and provided by | |
892 | the user - since an arg test will often fail on the same arg | |
893 | again and again, we'll try and test the last failing arg the | |
894 | first on each opcode try */ | |
895 | ||
896 | for (n = 0; this_try->arg[n]; n++) | |
897 | { | |
898 | sh_operand_info *user = operands + n; | |
899 | sh_arg_type arg = this_try->arg[n]; | |
900 | switch (arg) | |
901 | { | |
902 | case A_IMM: | |
903 | case A_BDISP12: | |
904 | case A_BDISP8: | |
905 | case A_DISP_GBR: | |
906 | case A_DISP_PC: | |
907 | case A_MACH: | |
908 | case A_PR: | |
909 | case A_MACL: | |
910 | if (user->type != arg) | |
911 | goto fail; | |
912 | break; | |
913 | case A_R0: | |
914 | /* opcode needs r0 */ | |
915 | if (user->type != A_REG_N || user->reg != 0) | |
916 | goto fail; | |
917 | break; | |
918 | case A_R0_GBR: | |
919 | if (user->type != A_R0_GBR || user->reg != 0) | |
920 | goto fail; | |
921 | break; | |
922 | case F_FR0: | |
923 | if (user->type != F_REG_N || user->reg != 0) | |
924 | goto fail; | |
925 | break; | |
926 | ||
927 | case A_REG_N: | |
928 | case A_INC_N: | |
929 | case A_DEC_N: | |
930 | case A_IND_N: | |
931 | case A_IND_R0_REG_N: | |
932 | case A_DISP_REG_N: | |
933 | case F_REG_N: | |
934 | case D_REG_N: | |
935 | case X_REG_N: | |
936 | case V_REG_N: | |
937 | case FPUL_N: | |
938 | case FPSCR_N: | |
d4845d57 JR |
939 | case A_PMOD_N: |
940 | case A_PMODY_N: | |
941 | case DSP_REG_N: | |
252b5132 RH |
942 | /* Opcode needs rn */ |
943 | if (user->type != arg) | |
944 | goto fail; | |
945 | reg_n = user->reg; | |
946 | break; | |
252b5132 RH |
947 | case DX_REG_N: |
948 | if (user->type != D_REG_N && user->type != X_REG_N) | |
949 | goto fail; | |
950 | reg_n = user->reg; | |
951 | break; | |
952 | case A_GBR: | |
953 | case A_SR: | |
954 | case A_VBR: | |
d4845d57 JR |
955 | case A_DSR: |
956 | case A_MOD: | |
957 | case A_RE: | |
958 | case A_RS: | |
252b5132 RH |
959 | case A_SSR: |
960 | case A_SPC: | |
961 | case A_SGR: | |
962 | case A_DBR: | |
963 | if (user->type != arg) | |
964 | goto fail; | |
965 | break; | |
966 | ||
967 | case A_REG_B: | |
968 | if (user->type != arg) | |
969 | goto fail; | |
970 | reg_b = user->reg; | |
971 | break; | |
972 | ||
973 | case A_REG_M: | |
974 | case A_INC_M: | |
975 | case A_DEC_M: | |
976 | case A_IND_M: | |
977 | case A_IND_R0_REG_M: | |
978 | case A_DISP_REG_M: | |
d4845d57 | 979 | case DSP_REG_M: |
252b5132 RH |
980 | /* Opcode needs rn */ |
981 | if (user->type != arg - A_REG_M + A_REG_N) | |
982 | goto fail; | |
983 | reg_m = user->reg; | |
984 | break; | |
985 | ||
d4845d57 JR |
986 | case DSP_REG_X: |
987 | if (user->type != DSP_REG_N) | |
988 | goto fail; | |
989 | switch (user->reg) | |
990 | { | |
991 | case A_X0_NUM: | |
992 | reg_x = 0; | |
993 | break; | |
994 | case A_X1_NUM: | |
995 | reg_x = 1; | |
996 | break; | |
997 | case A_A0_NUM: | |
998 | reg_x = 2; | |
999 | break; | |
1000 | case A_A1_NUM: | |
1001 | reg_x = 3; | |
1002 | break; | |
1003 | default: | |
1004 | goto fail; | |
1005 | } | |
1006 | break; | |
1007 | ||
1008 | case DSP_REG_Y: | |
1009 | if (user->type != DSP_REG_N) | |
1010 | goto fail; | |
1011 | switch (user->reg) | |
1012 | { | |
1013 | case A_Y0_NUM: | |
1014 | reg_y = 0; | |
1015 | break; | |
1016 | case A_Y1_NUM: | |
1017 | reg_y = 1; | |
1018 | break; | |
1019 | case A_M0_NUM: | |
1020 | reg_y = 2; | |
1021 | break; | |
1022 | case A_M1_NUM: | |
1023 | reg_y = 3; | |
1024 | break; | |
1025 | default: | |
1026 | goto fail; | |
1027 | } | |
1028 | break; | |
1029 | ||
1030 | case DSP_REG_E: | |
1031 | if (user->type != DSP_REG_N) | |
1032 | goto fail; | |
1033 | switch (user->reg) | |
1034 | { | |
1035 | case A_X0_NUM: | |
1036 | reg_efg = 0 << 10; | |
1037 | break; | |
1038 | case A_X1_NUM: | |
1039 | reg_efg = 1 << 10; | |
1040 | break; | |
1041 | case A_Y0_NUM: | |
1042 | reg_efg = 2 << 10; | |
1043 | break; | |
1044 | case A_A1_NUM: | |
1045 | reg_efg = 3 << 10; | |
1046 | break; | |
1047 | default: | |
1048 | goto fail; | |
1049 | } | |
1050 | break; | |
1051 | ||
1052 | case DSP_REG_F: | |
1053 | if (user->type != DSP_REG_N) | |
1054 | goto fail; | |
1055 | switch (user->reg) | |
1056 | { | |
1057 | case A_Y0_NUM: | |
1058 | reg_efg |= 0 << 8; | |
1059 | break; | |
1060 | case A_Y1_NUM: | |
1061 | reg_efg |= 1 << 8; | |
1062 | break; | |
1063 | case A_X0_NUM: | |
1064 | reg_efg |= 2 << 8; | |
1065 | break; | |
1066 | case A_A1_NUM: | |
1067 | reg_efg |= 3 << 8; | |
1068 | break; | |
1069 | default: | |
1070 | goto fail; | |
1071 | } | |
1072 | break; | |
1073 | ||
1074 | case DSP_REG_G: | |
1075 | if (user->type != DSP_REG_N) | |
1076 | goto fail; | |
1077 | switch (user->reg) | |
1078 | { | |
1079 | case A_M0_NUM: | |
1080 | reg_efg |= 0 << 2; | |
1081 | break; | |
1082 | case A_M1_NUM: | |
1083 | reg_efg |= 1 << 2; | |
1084 | break; | |
1085 | case A_A0_NUM: | |
1086 | reg_efg |= 2 << 2; | |
1087 | break; | |
1088 | case A_A1_NUM: | |
1089 | reg_efg |= 3 << 2; | |
1090 | break; | |
1091 | default: | |
1092 | goto fail; | |
1093 | } | |
1094 | break; | |
1095 | ||
1096 | case A_A0: | |
1097 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) | |
1098 | goto fail; | |
1099 | break; | |
1100 | case A_X0: | |
1101 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) | |
1102 | goto fail; | |
1103 | break; | |
1104 | case A_X1: | |
1105 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) | |
1106 | goto fail; | |
1107 | break; | |
1108 | case A_Y0: | |
1109 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) | |
1110 | goto fail; | |
1111 | break; | |
1112 | case A_Y1: | |
1113 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) | |
1114 | goto fail; | |
1115 | break; | |
1116 | ||
252b5132 RH |
1117 | case F_REG_M: |
1118 | case D_REG_M: | |
1119 | case X_REG_M: | |
1120 | case V_REG_M: | |
1121 | case FPUL_M: | |
1122 | case FPSCR_M: | |
1123 | /* Opcode needs rn */ | |
1124 | if (user->type != arg - F_REG_M + F_REG_N) | |
1125 | goto fail; | |
1126 | reg_m = user->reg; | |
1127 | break; | |
1128 | case DX_REG_M: | |
1129 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1130 | goto fail; | |
1131 | reg_m = user->reg; | |
1132 | break; | |
1133 | case XMTRX_M4: | |
1134 | if (user->type != XMTRX_M4) | |
1135 | goto fail; | |
1136 | reg_m = 4; | |
1137 | break; | |
1138 | ||
1139 | default: | |
1140 | printf (_("unhandled %d\n"), arg); | |
1141 | goto fail; | |
1142 | } | |
1143 | } | |
d4845d57 | 1144 | valid_arch &= this_try->arch; |
252b5132 RH |
1145 | return this_try; |
1146 | fail:; | |
1147 | } | |
1148 | ||
1149 | return 0; | |
1150 | } | |
1151 | ||
1152 | int | |
1153 | check (operand, low, high) | |
1154 | expressionS *operand; | |
1155 | int low; | |
1156 | int high; | |
1157 | { | |
1158 | if (operand->X_op != O_constant | |
1159 | || operand->X_add_number < low | |
1160 | || operand->X_add_number > high) | |
1161 | { | |
1162 | as_bad (_("operand must be absolute in range %d..%d"), low, high); | |
1163 | } | |
1164 | return operand->X_add_number; | |
1165 | } | |
1166 | ||
1167 | ||
1168 | static void | |
1169 | insert (where, how, pcrel) | |
1170 | char *where; | |
1171 | int how; | |
1172 | int pcrel; | |
1173 | { | |
1174 | fix_new_exp (frag_now, | |
1175 | where - frag_now->fr_literal, | |
1176 | 2, | |
1177 | &immediate, | |
1178 | pcrel, | |
1179 | how); | |
1180 | } | |
1181 | ||
1182 | static void | |
1183 | build_relax (opcode) | |
1184 | sh_opcode_info *opcode; | |
1185 | { | |
1186 | int high_byte = target_big_endian ? 0 : 1; | |
1187 | char *p; | |
1188 | ||
1189 | if (opcode->arg[0] == A_BDISP8) | |
1190 | { | |
1191 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; | |
1192 | p = frag_var (rs_machine_dependent, | |
1193 | md_relax_table[C (what, COND32)].rlx_length, | |
1194 | md_relax_table[C (what, COND8)].rlx_length, | |
1195 | C (what, 0), | |
1196 | immediate.X_add_symbol, | |
1197 | immediate.X_add_number, | |
1198 | 0); | |
1199 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); | |
1200 | } | |
1201 | else if (opcode->arg[0] == A_BDISP12) | |
1202 | { | |
1203 | p = frag_var (rs_machine_dependent, | |
1204 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
1205 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, | |
1206 | C (UNCOND_JUMP, 0), | |
1207 | immediate.X_add_symbol, | |
1208 | immediate.X_add_number, | |
1209 | 0); | |
1210 | p[high_byte] = (opcode->nibbles[0] << 4); | |
1211 | } | |
1212 | ||
1213 | } | |
1214 | ||
1215 | /* Now we know what sort of opcodes it is, lets build the bytes - | |
1216 | */ | |
1217 | static void | |
1218 | build_Mytes (opcode, operand) | |
1219 | sh_opcode_info *opcode; | |
1220 | sh_operand_info *operand; | |
1221 | ||
1222 | { | |
1223 | int index; | |
1224 | char nbuf[4]; | |
1225 | char *output = frag_more (2); | |
1226 | int low_byte = target_big_endian ? 1 : 0; | |
1227 | nbuf[0] = 0; | |
1228 | nbuf[1] = 0; | |
1229 | nbuf[2] = 0; | |
1230 | nbuf[3] = 0; | |
1231 | ||
1232 | for (index = 0; index < 4; index++) | |
1233 | { | |
1234 | sh_nibble_type i = opcode->nibbles[index]; | |
1235 | if (i < 16) | |
1236 | { | |
1237 | nbuf[index] = i; | |
1238 | } | |
1239 | else | |
1240 | { | |
1241 | switch (i) | |
1242 | { | |
1243 | case REG_N: | |
1244 | nbuf[index] = reg_n; | |
1245 | break; | |
1246 | case REG_M: | |
1247 | nbuf[index] = reg_m; | |
1248 | break; | |
d4845d57 JR |
1249 | case SDT_REG_N: |
1250 | if (reg_n < 2 || reg_n > 5) | |
1251 | as_bad (_("Invalid register: 'r%d'"), reg_n); | |
1252 | nbuf[index] = (reg_n & 3) | 4; | |
1253 | break; | |
252b5132 RH |
1254 | case REG_NM: |
1255 | nbuf[index] = reg_n | (reg_m >> 2); | |
1256 | break; | |
1257 | case REG_B: | |
1258 | nbuf[index] = reg_b | 0x08; | |
1259 | break; | |
1260 | case DISP_4: | |
1261 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0); | |
1262 | break; | |
1263 | case IMM_4BY4: | |
1264 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0); | |
1265 | break; | |
1266 | case IMM_4BY2: | |
1267 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0); | |
1268 | break; | |
1269 | case IMM_4: | |
1270 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0); | |
1271 | break; | |
1272 | case IMM_8BY4: | |
1273 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0); | |
1274 | break; | |
1275 | case IMM_8BY2: | |
1276 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0); | |
1277 | break; | |
1278 | case IMM_8: | |
1279 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0); | |
1280 | break; | |
1281 | case PCRELIMM_8BY4: | |
1282 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 1); | |
1283 | break; | |
1284 | case PCRELIMM_8BY2: | |
1285 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 1); | |
1286 | break; | |
1287 | default: | |
1288 | printf (_("failed for %d\n"), i); | |
1289 | } | |
1290 | } | |
1291 | } | |
1292 | if (! target_big_endian) { | |
1293 | output[1] = (nbuf[0] << 4) | (nbuf[1]); | |
1294 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
1295 | } | |
1296 | else { | |
1297 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
1298 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
1299 | } | |
1300 | } | |
1301 | ||
d4845d57 JR |
1302 | /* Find an opcode at the start of *STR_P in the hash table, and set |
1303 | *STR_P to the first character after the last one read. */ | |
252b5132 | 1304 | |
d4845d57 JR |
1305 | static sh_opcode_info * |
1306 | find_cooked_opcode (str_p) | |
1307 | char **str_p; | |
252b5132 | 1308 | { |
d4845d57 | 1309 | char *str = *str_p; |
252b5132 RH |
1310 | unsigned char *op_start; |
1311 | unsigned char *op_end; | |
252b5132 RH |
1312 | char name[20]; |
1313 | int nlen = 0; | |
1314 | /* Drop leading whitespace */ | |
1315 | while (*str == ' ') | |
1316 | str++; | |
1317 | ||
d4845d57 JR |
1318 | /* Find the op code end. |
1319 | The pre-processor will eliminate whitespace in front of | |
1320 | any '@' after the first argument; we may be called from | |
1321 | assemble_ppi, so the opcode might be terminated by an '@'. */ | |
252b5132 RH |
1322 | for (op_start = op_end = (unsigned char *) (str); |
1323 | *op_end | |
1324 | && nlen < 20 | |
d4845d57 | 1325 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
252b5132 RH |
1326 | op_end++) |
1327 | { | |
1328 | unsigned char c = op_start[nlen]; | |
1329 | ||
1330 | /* The machine independent code will convert CMP/EQ into cmp/EQ | |
d4845d57 JR |
1331 | because it thinks the '/' is the end of the symbol. Moreover, |
1332 | all but the first sub-insn is a parallel processing insn won't | |
1333 | be capitailzed. Instead of hacking up the machine independent | |
1334 | code, we just deal with it here. */ | |
252b5132 RH |
1335 | c = isupper (c) ? tolower (c) : c; |
1336 | name[nlen] = c; | |
1337 | nlen++; | |
1338 | } | |
1339 | name[nlen] = 0; | |
d4845d57 | 1340 | *str_p = op_end; |
252b5132 RH |
1341 | |
1342 | if (nlen == 0) | |
1343 | { | |
1344 | as_bad (_("can't find opcode ")); | |
1345 | } | |
1346 | ||
d4845d57 JR |
1347 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
1348 | } | |
1349 | ||
1350 | /* Assemble a parallel processing insn. */ | |
1351 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ | |
1352 | static void | |
1353 | assemble_ppi (op_end, opcode) | |
1354 | char *op_end; | |
1355 | sh_opcode_info *opcode; | |
1356 | { | |
1357 | int movx = 0; | |
1358 | int movy = 0; | |
1359 | int cond = 0; | |
1360 | int field_b = 0; | |
1361 | char *output; | |
1362 | int move_code; | |
1363 | ||
1364 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. | |
1365 | Make sure we encode a defined insn pattern. */ | |
1366 | reg_x = 0; | |
1367 | reg_y = 0; | |
1368 | ||
1369 | for (;;) | |
1370 | { | |
1371 | sh_operand_info operand[3]; | |
1372 | ||
1373 | if (opcode->arg[0] != A_END) | |
1374 | op_end = get_operands (opcode, op_end, operand); | |
1375 | opcode = get_specific (opcode, operand); | |
1376 | if (opcode == 0) | |
1377 | { | |
1378 | /* Couldn't find an opcode which matched the operands */ | |
1379 | char *where = frag_more (2); | |
1380 | ||
1381 | where[0] = 0x0; | |
1382 | where[1] = 0x0; | |
1383 | as_bad (_("invalid operands for opcode")); | |
1384 | return; | |
1385 | } | |
1386 | if (opcode->nibbles[0] != PPI) | |
1387 | as_bad (_("insn can't be combined with parallel processing insn")); | |
1388 | ||
1389 | switch (opcode->nibbles[1]) | |
1390 | { | |
1391 | ||
1392 | case NOPX: | |
1393 | if (movx) | |
1394 | as_bad (_("multiple movx specifications")); | |
1395 | movx = DDT_BASE; | |
1396 | break; | |
1397 | case NOPY: | |
1398 | if (movy) | |
1399 | as_bad (_("multiple movy specifications")); | |
1400 | movy = DDT_BASE; | |
1401 | break; | |
1402 | ||
1403 | case MOVX: | |
1404 | if (movx) | |
1405 | as_bad (_("multiple movx specifications")); | |
1406 | if (reg_n < 4 || reg_n > 5) | |
1407 | as_bad (_("invalid movx address register")); | |
1408 | if (opcode->nibbles[2] & 8) | |
1409 | { | |
1410 | if (reg_m == A_A1_NUM) | |
1411 | movx = 1 << 7; | |
1412 | else if (reg_m != A_A0_NUM) | |
1413 | as_bad (_("invalid movx dsp register")); | |
1414 | } | |
1415 | else | |
1416 | { | |
1417 | if (reg_x > 1) | |
1418 | as_bad (_("invalid movx dsp register")); | |
1419 | movx = reg_x << 7; | |
1420 | } | |
1421 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; | |
1422 | break; | |
1423 | ||
1424 | case MOVY: | |
1425 | if (movy) | |
1426 | as_bad (_("multiple movy specifications")); | |
1427 | if (opcode->nibbles[2] & 8) | |
1428 | { | |
1429 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, | |
1430 | so add 8 more. */ | |
1431 | movy = 8; | |
1432 | if (reg_m == A_A1_NUM) | |
1433 | movy += 1 << 6; | |
1434 | else if (reg_m != A_A0_NUM) | |
1435 | as_bad (_("invalid movy dsp register")); | |
1436 | } | |
1437 | else | |
1438 | { | |
1439 | if (reg_y > 1) | |
1440 | as_bad (_("invalid movy dsp register")); | |
1441 | movy = reg_y << 6; | |
1442 | } | |
1443 | if (reg_n < 6 || reg_n > 7) | |
1444 | as_bad (_("invalid movy address register")); | |
1445 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; | |
1446 | break; | |
1447 | ||
1448 | case PSH: | |
1449 | if (immediate.X_op != O_constant) | |
1450 | as_bad (_("dsp immediate shift value not constant")); | |
1451 | field_b = ((opcode->nibbles[2] << 12) | |
1452 | | (immediate.X_add_number & 127) << 4 | |
1453 | | reg_n); | |
1454 | break; | |
1455 | case PPI3: | |
1456 | if (field_b) | |
1457 | as_bad (_("multiple parallel processing specifications")); | |
1458 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
1459 | + (reg_x << 6) + (reg_y << 4) + reg_n); | |
1460 | break; | |
1461 | case PDC: | |
1462 | if (cond) | |
1463 | as_bad (_("multiple condition specifications")); | |
1464 | cond = opcode->nibbles[2] << 8; | |
1465 | if (*op_end) | |
1466 | goto skip_cond_check; | |
1467 | break; | |
1468 | case PPIC: | |
1469 | if (field_b) | |
1470 | as_bad (_("multiple parallel processing specifications")); | |
1471 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
1472 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); | |
1473 | cond = 0; | |
1474 | break; | |
1475 | case PMUL: | |
1476 | if (field_b) | |
1477 | { | |
1478 | if ((field_b & 0xef00) != 0xa100) | |
1479 | as_bad (_("insn cannot be combined with pmuls")); | |
1480 | field_b -= 0x8100; | |
1481 | switch (field_b & 0xf) | |
1482 | { | |
1483 | case A_X0_NUM: | |
1484 | field_b += 0 - A_X0_NUM; | |
1485 | break; | |
1486 | case A_Y0_NUM: | |
1487 | field_b += 1 - A_Y0_NUM; | |
1488 | break; | |
1489 | case A_A0_NUM: | |
1490 | field_b += 2 - A_A0_NUM; | |
1491 | break; | |
1492 | case A_A1_NUM: | |
1493 | field_b += 3 - A_A1_NUM; | |
1494 | break; | |
1495 | default: | |
1496 | as_bad (_("bad padd / psub pmuls output operand")); | |
1497 | } | |
1498 | } | |
1499 | field_b += 0x4000 + reg_efg; | |
1500 | break; | |
1501 | default: | |
1502 | abort (); | |
1503 | } | |
1504 | if (cond) | |
1505 | { | |
1506 | as_bad (_("condition not followed by conditionalizable insn")); | |
1507 | cond = 0; | |
1508 | } | |
1509 | if (! *op_end) | |
1510 | break; | |
1511 | skip_cond_check: | |
1512 | opcode = find_cooked_opcode (&op_end); | |
1513 | if (opcode == NULL) | |
1514 | { | |
1515 | (as_bad | |
1516 | (_("unrecognized characters at end of parallel processing insn"))); | |
1517 | break; | |
1518 | } | |
1519 | } | |
1520 | ||
1521 | move_code = movx | movy; | |
1522 | if (field_b) | |
1523 | { | |
1524 | /* Parallel processing insn. */ | |
1525 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; | |
1526 | ||
1527 | output = frag_more (4); | |
1528 | if (! target_big_endian) | |
1529 | { | |
1530 | output[3] = ppi_code >> 8; | |
1531 | output[2] = ppi_code; | |
1532 | } | |
1533 | else | |
1534 | { | |
1535 | output[2] = ppi_code >> 8; | |
1536 | output[3] = ppi_code; | |
1537 | } | |
1538 | move_code |= 0xf800; | |
1539 | } | |
1540 | else | |
1541 | /* Just a double data transfer. */ | |
1542 | output = frag_more (2); | |
1543 | if (! target_big_endian) | |
1544 | { | |
1545 | output[1] = move_code >> 8; | |
1546 | output[0] = move_code; | |
1547 | } | |
1548 | else | |
1549 | { | |
1550 | output[0] = move_code >> 8; | |
1551 | output[1] = move_code; | |
1552 | } | |
1553 | } | |
1554 | ||
1555 | /* This is the guts of the machine-dependent assembler. STR points to a | |
1556 | machine dependent instruction. This function is supposed to emit | |
1557 | the frags/bytes it assembles to. | |
1558 | */ | |
1559 | ||
1560 | void | |
1561 | md_assemble (str) | |
1562 | char *str; | |
1563 | { | |
1564 | unsigned char *op_end; | |
1565 | sh_operand_info operand[3]; | |
1566 | sh_opcode_info *opcode; | |
1567 | ||
1568 | opcode = find_cooked_opcode (&str); | |
1569 | op_end = str; | |
252b5132 RH |
1570 | |
1571 | if (opcode == NULL) | |
1572 | { | |
1573 | as_bad (_("unknown opcode")); | |
1574 | return; | |
1575 | } | |
1576 | ||
1577 | if (sh_relax | |
1578 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
1579 | { | |
1580 | /* Output a CODE reloc to tell the linker that the following | |
1581 | bytes are instructions, not data. */ | |
1582 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
1583 | BFD_RELOC_SH_CODE); | |
1584 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; | |
1585 | } | |
1586 | ||
d4845d57 JR |
1587 | if (opcode->nibbles[0] == PPI) |
1588 | { | |
1589 | assemble_ppi (op_end, opcode); | |
1590 | return; | |
1591 | } | |
1592 | ||
252b5132 RH |
1593 | if (opcode->arg[0] == A_BDISP12 |
1594 | || opcode->arg[0] == A_BDISP8) | |
1595 | { | |
1596 | parse_exp (op_end + 1); | |
1597 | build_relax (opcode); | |
1598 | } | |
1599 | else | |
1600 | { | |
5fc44b2d | 1601 | if (opcode->arg[0] == A_END) |
252b5132 | 1602 | { |
5fc44b2d JR |
1603 | /* Ignore trailing whitespace. If there is any, it has already |
1604 | been compressed to a single space. */ | |
1605 | if (*op_end == ' ') | |
1606 | op_end++; | |
1607 | } | |
1608 | else | |
1609 | { | |
1610 | op_end = get_operands (opcode, op_end, operand); | |
252b5132 RH |
1611 | } |
1612 | opcode = get_specific (opcode, operand); | |
1613 | ||
1614 | if (opcode == 0) | |
1615 | { | |
1616 | /* Couldn't find an opcode which matched the operands */ | |
1617 | char *where = frag_more (2); | |
1618 | ||
1619 | where[0] = 0x0; | |
1620 | where[1] = 0x0; | |
1621 | as_bad (_("invalid operands for opcode")); | |
1622 | return; | |
1623 | } | |
1624 | ||
5fc44b2d JR |
1625 | if (*op_end) |
1626 | as_bad (_("excess operands: '%s'"), op_end); | |
1627 | ||
252b5132 RH |
1628 | build_Mytes (opcode, operand); |
1629 | } | |
1630 | ||
1631 | } | |
1632 | ||
1633 | /* This routine is called each time a label definition is seen. It | |
1634 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ | |
1635 | ||
1636 | void | |
1637 | sh_frob_label () | |
1638 | { | |
1639 | static fragS *last_label_frag; | |
1640 | static int last_label_offset; | |
1641 | ||
1642 | if (sh_relax | |
1643 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
1644 | { | |
1645 | int offset; | |
1646 | ||
1647 | offset = frag_now_fix (); | |
1648 | if (frag_now != last_label_frag | |
1649 | || offset != last_label_offset) | |
1650 | { | |
1651 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); | |
1652 | last_label_frag = frag_now; | |
1653 | last_label_offset = offset; | |
1654 | } | |
1655 | } | |
1656 | } | |
1657 | ||
1658 | /* This routine is called when the assembler is about to output some | |
1659 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ | |
1660 | ||
1661 | void | |
1662 | sh_flush_pending_output () | |
1663 | { | |
1664 | if (sh_relax | |
1665 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
1666 | { | |
1667 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
1668 | BFD_RELOC_SH_DATA); | |
1669 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; | |
1670 | } | |
1671 | } | |
1672 | ||
1673 | symbolS * | |
1674 | DEFUN (md_undefined_symbol, (name), | |
1675 | char *name) | |
1676 | { | |
1677 | return 0; | |
1678 | } | |
1679 | ||
1680 | #ifdef OBJ_COFF | |
1681 | ||
1682 | void | |
1683 | DEFUN (tc_crawl_symbol_chain, (headers), | |
1684 | object_headers * headers) | |
1685 | { | |
1686 | printf (_("call to tc_crawl_symbol_chain \n")); | |
1687 | } | |
1688 | ||
1689 | void | |
1690 | DEFUN (tc_headers_hook, (headers), | |
1691 | object_headers * headers) | |
1692 | { | |
1693 | printf (_("call to tc_headers_hook \n")); | |
1694 | } | |
1695 | ||
1696 | #endif | |
1697 | ||
1698 | /* Various routines to kill one day */ | |
1699 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
1700 | #define MAX_LITTLENUMS 6 | |
1701 | ||
1702 | /* Turn a string in input_line_pointer into a floating point constant of type | |
1703 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
1704 | emitted is stored in *sizeP . An error message is returned, or NULL on OK. | |
1705 | */ | |
1706 | char * | |
1707 | md_atof (type, litP, sizeP) | |
1708 | int type; | |
1709 | char *litP; | |
1710 | int *sizeP; | |
1711 | { | |
1712 | int prec; | |
1713 | LITTLENUM_TYPE words[4]; | |
1714 | char *t; | |
1715 | int i; | |
1716 | ||
1717 | switch (type) | |
1718 | { | |
1719 | case 'f': | |
1720 | prec = 2; | |
1721 | break; | |
1722 | ||
1723 | case 'd': | |
1724 | prec = 4; | |
1725 | break; | |
1726 | ||
1727 | default: | |
1728 | *sizeP = 0; | |
1729 | return _("bad call to md_atof"); | |
1730 | } | |
1731 | ||
1732 | t = atof_ieee (input_line_pointer, type, words); | |
1733 | if (t) | |
1734 | input_line_pointer = t; | |
1735 | ||
1736 | *sizeP = prec * 2; | |
1737 | ||
1738 | if (! target_big_endian) | |
1739 | { | |
1740 | for (i = prec - 1; i >= 0; i--) | |
1741 | { | |
1742 | md_number_to_chars (litP, (valueT) words[i], 2); | |
1743 | litP += 2; | |
1744 | } | |
1745 | } | |
1746 | else | |
1747 | { | |
1748 | for (i = 0; i < prec; i++) | |
1749 | { | |
1750 | md_number_to_chars (litP, (valueT) words[i], 2); | |
1751 | litP += 2; | |
1752 | } | |
1753 | } | |
1754 | ||
1755 | return NULL; | |
1756 | } | |
1757 | ||
1758 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a | |
1759 | call instruction. It refers to a label of the instruction which | |
1760 | loads the register which the call uses. We use it to generate a | |
1761 | special reloc for the linker. */ | |
1762 | ||
1763 | static void | |
1764 | s_uses (ignore) | |
1765 | int ignore; | |
1766 | { | |
1767 | expressionS ex; | |
1768 | ||
1769 | if (! sh_relax) | |
1770 | as_warn (_(".uses pseudo-op seen when not relaxing")); | |
1771 | ||
1772 | expression (&ex); | |
1773 | ||
1774 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
1775 | { | |
1776 | as_bad (_("bad .uses format")); | |
1777 | ignore_rest_of_line (); | |
1778 | return; | |
1779 | } | |
1780 | ||
1781 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); | |
1782 | ||
1783 | demand_empty_rest_of_line (); | |
1784 | } | |
1785 | \f | |
1786 | CONST char *md_shortopts = ""; | |
1787 | struct option md_longopts[] = { | |
1788 | ||
1789 | #define OPTION_RELAX (OPTION_MD_BASE) | |
1790 | #define OPTION_LITTLE (OPTION_MD_BASE + 1) | |
1791 | #define OPTION_SMALL (OPTION_LITTLE + 1) | |
d4845d57 | 1792 | #define OPTION_DSP (OPTION_SMALL + 1) |
252b5132 RH |
1793 | |
1794 | {"relax", no_argument, NULL, OPTION_RELAX}, | |
1795 | {"little", no_argument, NULL, OPTION_LITTLE}, | |
1796 | {"small", no_argument, NULL, OPTION_SMALL}, | |
d4845d57 | 1797 | {"dsp", no_argument, NULL, OPTION_DSP}, |
252b5132 RH |
1798 | {NULL, no_argument, NULL, 0} |
1799 | }; | |
1800 | size_t md_longopts_size = sizeof(md_longopts); | |
1801 | ||
1802 | int | |
1803 | md_parse_option (c, arg) | |
1804 | int c; | |
1805 | char *arg; | |
1806 | { | |
1807 | switch (c) | |
1808 | { | |
1809 | case OPTION_RELAX: | |
1810 | sh_relax = 1; | |
1811 | break; | |
1812 | ||
1813 | case OPTION_LITTLE: | |
1814 | shl = 1; | |
1815 | target_big_endian = 0; | |
1816 | break; | |
1817 | ||
1818 | case OPTION_SMALL: | |
1819 | sh_small = 1; | |
1820 | break; | |
1821 | ||
d4845d57 JR |
1822 | case OPTION_DSP: |
1823 | sh_dsp = 1; | |
1824 | break; | |
1825 | ||
252b5132 RH |
1826 | default: |
1827 | return 0; | |
1828 | } | |
1829 | ||
1830 | return 1; | |
1831 | } | |
1832 | ||
1833 | void | |
1834 | md_show_usage (stream) | |
1835 | FILE *stream; | |
1836 | { | |
1837 | fprintf(stream, _("\ | |
1838 | SH options:\n\ | |
1839 | -little generate little endian code\n\ | |
1840 | -relax alter jump instructions for long displacements\n\ | |
1841 | -small align sections to 4 byte boundaries, not 16\n")); | |
1842 | } | |
1843 | \f | |
1844 | void | |
1845 | tc_Nout_fix_to_chars () | |
1846 | { | |
1847 | printf (_("call to tc_Nout_fix_to_chars \n")); | |
1848 | abort (); | |
1849 | } | |
1850 | ||
1851 | /* This struct is used to pass arguments to sh_count_relocs through | |
1852 | bfd_map_over_sections. */ | |
1853 | ||
1854 | struct sh_count_relocs | |
1855 | { | |
1856 | /* Symbol we are looking for. */ | |
1857 | symbolS *sym; | |
1858 | /* Count of relocs found. */ | |
1859 | int count; | |
1860 | }; | |
1861 | ||
1862 | /* Count the number of fixups in a section which refer to a particular | |
1863 | symbol. When using BFD_ASSEMBLER, this is called via | |
1864 | bfd_map_over_sections. */ | |
1865 | ||
1866 | /*ARGSUSED*/ | |
1867 | static void | |
1868 | sh_count_relocs (abfd, sec, data) | |
1869 | bfd *abfd; | |
1870 | segT sec; | |
1871 | PTR data; | |
1872 | { | |
1873 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
1874 | segment_info_type *seginfo; | |
1875 | symbolS *sym; | |
1876 | fixS *fix; | |
1877 | ||
1878 | seginfo = seg_info (sec); | |
1879 | if (seginfo == NULL) | |
1880 | return; | |
1881 | ||
1882 | sym = info->sym; | |
1883 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
1884 | { | |
1885 | if (fix->fx_addsy == sym) | |
1886 | { | |
1887 | ++info->count; | |
1888 | fix->fx_tcbit = 1; | |
1889 | } | |
1890 | } | |
1891 | } | |
1892 | ||
1893 | /* Handle the count relocs for a particular section. When using | |
1894 | BFD_ASSEMBLER, this is called via bfd_map_over_sections. */ | |
1895 | ||
1896 | /*ARGSUSED*/ | |
1897 | static void | |
1898 | sh_frob_section (abfd, sec, ignore) | |
1899 | bfd *abfd; | |
1900 | segT sec; | |
1901 | PTR ignore; | |
1902 | { | |
1903 | segment_info_type *seginfo; | |
1904 | fixS *fix; | |
1905 | ||
1906 | seginfo = seg_info (sec); | |
1907 | if (seginfo == NULL) | |
1908 | return; | |
1909 | ||
1910 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
1911 | { | |
1912 | symbolS *sym; | |
1913 | bfd_vma val; | |
1914 | fixS *fscan; | |
1915 | struct sh_count_relocs info; | |
1916 | ||
1917 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
1918 | continue; | |
1919 | ||
1920 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
1921 | symbol in the same section. */ | |
1922 | sym = fix->fx_addsy; | |
1923 | if (sym == NULL | |
1924 | || fix->fx_subsy != NULL | |
1925 | || fix->fx_addnumber != 0 | |
1926 | || S_GET_SEGMENT (sym) != sec | |
1927 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
1928 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
1929 | #endif | |
1930 | || S_IS_EXTERNAL (sym)) | |
1931 | { | |
1932 | as_warn_where (fix->fx_file, fix->fx_line, | |
1933 | _(".uses does not refer to a local symbol in the same section")); | |
1934 | continue; | |
1935 | } | |
1936 | ||
1937 | /* Look through the fixups again, this time looking for one | |
1938 | at the same location as sym. */ | |
1939 | val = S_GET_VALUE (sym); | |
1940 | for (fscan = seginfo->fix_root; | |
1941 | fscan != NULL; | |
1942 | fscan = fscan->fx_next) | |
1943 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
1944 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
1945 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
1946 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
1947 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
1948 | break; | |
1949 | if (fscan == NULL) | |
1950 | { | |
1951 | as_warn_where (fix->fx_file, fix->fx_line, | |
1952 | _("can't find fixup pointed to by .uses")); | |
1953 | continue; | |
1954 | } | |
1955 | ||
1956 | if (fscan->fx_tcbit) | |
1957 | { | |
1958 | /* We've already done this one. */ | |
1959 | continue; | |
1960 | } | |
1961 | ||
1962 | /* fscan should also be a fixup to a local symbol in the same | |
1963 | section. */ | |
1964 | sym = fscan->fx_addsy; | |
1965 | if (sym == NULL | |
1966 | || fscan->fx_subsy != NULL | |
1967 | || fscan->fx_addnumber != 0 | |
1968 | || S_GET_SEGMENT (sym) != sec | |
1969 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
1970 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
1971 | #endif | |
1972 | || S_IS_EXTERNAL (sym)) | |
1973 | { | |
1974 | as_warn_where (fix->fx_file, fix->fx_line, | |
1975 | _(".uses target does not refer to a local symbol in the same section")); | |
1976 | continue; | |
1977 | } | |
1978 | ||
1979 | /* Now we look through all the fixups of all the sections, | |
1980 | counting the number of times we find a reference to sym. */ | |
1981 | info.sym = sym; | |
1982 | info.count = 0; | |
1983 | #ifdef BFD_ASSEMBLER | |
1984 | bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info); | |
1985 | #else | |
1986 | { | |
1987 | int iscan; | |
1988 | ||
1989 | for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++) | |
1990 | sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info); | |
1991 | } | |
1992 | #endif | |
1993 | ||
1994 | if (info.count < 1) | |
1995 | abort (); | |
1996 | ||
1997 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
1998 | We have already adjusted the value of sym to include the | |
1999 | fragment address, so we undo that adjustment here. */ | |
2000 | subseg_change (sec, 0); | |
49309057 ILT |
2001 | fix_new (symbol_get_frag (sym), |
2002 | S_GET_VALUE (sym) - symbol_get_frag (sym)->fr_address, | |
252b5132 RH |
2003 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
2004 | } | |
2005 | } | |
2006 | ||
2007 | /* This function is called after the symbol table has been completed, | |
2008 | but before the relocs or section contents have been written out. | |
2009 | If we have seen any .uses pseudo-ops, they point to an instruction | |
2010 | which loads a register with the address of a function. We look | |
2011 | through the fixups to find where the function address is being | |
2012 | loaded from. We then generate a COUNT reloc giving the number of | |
2013 | times that function address is referred to. The linker uses this | |
2014 | information when doing relaxing, to decide when it can eliminate | |
2015 | the stored function address entirely. */ | |
2016 | ||
2017 | void | |
2018 | sh_frob_file () | |
2019 | { | |
2020 | if (! sh_relax) | |
2021 | return; | |
2022 | ||
2023 | #ifdef BFD_ASSEMBLER | |
2024 | bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL); | |
2025 | #else | |
2026 | { | |
2027 | int iseg; | |
2028 | ||
2029 | for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++) | |
2030 | sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL); | |
2031 | } | |
2032 | #endif | |
2033 | } | |
2034 | ||
2035 | /* Called after relaxing. Set the correct sizes of the fragments, and | |
2036 | create relocs so that md_apply_fix will fill in the correct values. */ | |
2037 | ||
2038 | void | |
2039 | md_convert_frag (headers, seg, fragP) | |
2040 | #ifdef BFD_ASSEMBLER | |
2041 | bfd *headers; | |
2042 | #else | |
2043 | object_headers *headers; | |
2044 | #endif | |
2045 | segT seg; | |
2046 | fragS *fragP; | |
2047 | { | |
2048 | int donerelax = 0; | |
2049 | ||
2050 | switch (fragP->fr_subtype) | |
2051 | { | |
2052 | case C (COND_JUMP, COND8): | |
2053 | case C (COND_JUMP_DELAY, COND8): | |
2054 | subseg_change (seg, 0); | |
2055 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2056 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2057 | fragP->fr_fix += 2; | |
2058 | fragP->fr_var = 0; | |
2059 | break; | |
2060 | ||
2061 | case C (UNCOND_JUMP, UNCOND12): | |
2062 | subseg_change (seg, 0); | |
2063 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2064 | 1, BFD_RELOC_SH_PCDISP12BY2); | |
2065 | fragP->fr_fix += 2; | |
2066 | fragP->fr_var = 0; | |
2067 | break; | |
2068 | ||
2069 | case C (UNCOND_JUMP, UNCOND32): | |
2070 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
2071 | if (fragP->fr_symbol == NULL) | |
2072 | as_bad (_("at 0x%lx, displacement overflows 12-bit field"), | |
2073 | (unsigned long) fragP->fr_address); | |
2074 | else if (S_IS_DEFINED (fragP->fr_symbol)) | |
2075 | as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"), | |
2076 | (unsigned long) fragP->fr_address, | |
2077 | S_GET_NAME (fragP->fr_symbol)); | |
2078 | else | |
2079 | as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"), | |
2080 | (unsigned long) fragP->fr_address, | |
2081 | S_GET_NAME (fragP->fr_symbol)); | |
2082 | ||
2083 | #if 0 /* This code works, but generates poor code and the compiler | |
2084 | should never produce a sequence that requires it to be used. */ | |
2085 | ||
2086 | /* A jump wont fit in 12 bits, make code which looks like | |
2087 | bra foo | |
2088 | mov.w @(0, PC), r14 | |
2089 | .long disp | |
2090 | foo: bra @r14 | |
2091 | */ | |
2092 | int t = buffer[0] & 0x10; | |
2093 | ||
2094 | buffer[highbyte] = 0xa0; /* branch over move and disp */ | |
2095 | buffer[lowbyte] = 3; | |
2096 | buffer[highbyte+2] = 0xd0 | JREG; /* Build mov insn */ | |
2097 | buffer[lowbyte+2] = 0x00; | |
2098 | ||
2099 | buffer[highbyte+4] = 0; /* space for 32 bit jump disp */ | |
2100 | buffer[lowbyte+4] = 0; | |
2101 | buffer[highbyte+6] = 0; | |
2102 | buffer[lowbyte+6] = 0; | |
2103 | ||
2104 | buffer[highbyte+8] = 0x40 | JREG; /* Build jmp @JREG */ | |
2105 | buffer[lowbyte+8] = t ? 0xb : 0x2b; | |
2106 | ||
2107 | buffer[highbyte+10] = 0x20; /* build nop */ | |
2108 | buffer[lowbyte+10] = 0x0b; | |
2109 | ||
2110 | /* Make reloc for the long disp */ | |
2111 | fix_new (fragP, | |
2112 | fragP->fr_fix + 4, | |
2113 | 4, | |
2114 | fragP->fr_symbol, | |
2115 | fragP->fr_offset, | |
2116 | 0, | |
2117 | BFD_RELOC_32); | |
2118 | fragP->fr_fix += UNCOND32_LENGTH; | |
2119 | fragP->fr_var = 0; | |
2120 | donerelax = 1; | |
2121 | #endif | |
2122 | ||
2123 | break; | |
2124 | ||
2125 | case C (COND_JUMP, COND12): | |
2126 | case C (COND_JUMP_DELAY, COND12): | |
2127 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop */ | |
2128 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c | |
2129 | was due to gas incorrectly relaxing an out-of-range conditional | |
2130 | branch with delay slot. It turned: | |
2131 | bf.s L6 (slot mov.l r12,@(44,r0)) | |
2132 | into: | |
2133 | ||
2134 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) | |
2135 | 30: 00 09 nop | |
2136 | 32: 10 cb mov.l r12,@(44,r0) | |
2137 | Therefore, branches with delay slots have to be handled | |
2138 | differently from ones without delay slots. */ | |
2139 | { | |
2140 | unsigned char *buffer = | |
2141 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
2142 | int highbyte = target_big_endian ? 0 : 1; | |
2143 | int lowbyte = target_big_endian ? 1 : 0; | |
2144 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); | |
2145 | ||
2146 | /* Toggle the true/false bit of the bcond. */ | |
2147 | buffer[highbyte] ^= 0x2; | |
2148 | ||
2149 | /* If this is a dalayed branch, we may not put the the bra in the | |
2150 | slot. So we change it to a non-delayed branch, like that: | |
2151 | b! cond slot_label; bra disp; slot_label: slot_insn | |
2152 | ??? We should try if swapping the conditional branch and | |
2153 | its delay-slot insn already makes the branch reach. */ | |
2154 | ||
2155 | /* Build a relocation to six / four bytes farther on. */ | |
2156 | subseg_change (seg, 0); | |
2157 | fix_new (fragP, fragP->fr_fix, 2, | |
2158 | #ifdef BFD_ASSEMBLER | |
2159 | section_symbol (seg), | |
2160 | #else | |
2161 | seg_info (seg)->dot, | |
2162 | #endif | |
2163 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), | |
2164 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2165 | ||
2166 | /* Set up a jump instruction. */ | |
2167 | buffer[highbyte + 2] = 0xa0; | |
2168 | buffer[lowbyte + 2] = 0; | |
2169 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
2170 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); | |
2171 | ||
2172 | if (delay) | |
2173 | { | |
2174 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
2175 | fragP->fr_fix += 4; | |
2176 | } | |
2177 | else | |
2178 | { | |
2179 | /* Fill in a NOP instruction. */ | |
2180 | buffer[highbyte + 4] = 0x0; | |
2181 | buffer[lowbyte + 4] = 0x9; | |
2182 | ||
2183 | fragP->fr_fix += 6; | |
2184 | } | |
2185 | fragP->fr_var = 0; | |
2186 | donerelax = 1; | |
2187 | } | |
2188 | break; | |
2189 | ||
2190 | case C (COND_JUMP, COND32): | |
2191 | case C (COND_JUMP_DELAY, COND32): | |
2192 | case C (COND_JUMP, UNDEF_WORD_DISP): | |
2193 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): | |
2194 | if (fragP->fr_symbol == NULL) | |
2195 | as_bad (_("at 0x%lx, displacement overflows 8-bit field"), | |
2196 | (unsigned long) fragP->fr_address); | |
2197 | else if (S_IS_DEFINED (fragP->fr_symbol)) | |
2198 | as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "), | |
2199 | (unsigned long) fragP->fr_address, | |
2200 | S_GET_NAME (fragP->fr_symbol)); | |
2201 | else | |
2202 | as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "), | |
2203 | (unsigned long) fragP->fr_address, | |
2204 | S_GET_NAME (fragP->fr_symbol)); | |
2205 | ||
2206 | #if 0 /* This code works, but generates poor code, and the compiler | |
2207 | should never produce a sequence that requires it to be used. */ | |
2208 | ||
2209 | /* A bcond won't fit and it won't go into a 12 bit | |
2210 | displacement either, the code sequence looks like: | |
2211 | b!cond foop | |
2212 | mov.w @(n, PC), r14 | |
2213 | jmp @r14 | |
2214 | nop | |
2215 | .long where | |
2216 | foop: | |
2217 | */ | |
2218 | ||
2219 | buffer[0] ^= 0x2; /* Toggle T/F bit */ | |
2220 | #define JREG 14 | |
2221 | buffer[1] = 5; /* branch over mov, jump, nop and ptr */ | |
2222 | buffer[2] = 0xd0 | JREG; /* Build mov insn */ | |
2223 | buffer[3] = 0x2; | |
2224 | buffer[4] = 0x40 | JREG; /* Build jmp @JREG */ | |
2225 | buffer[5] = 0x0b; | |
2226 | buffer[6] = 0x20; /* build nop */ | |
2227 | buffer[7] = 0x0b; | |
2228 | buffer[8] = 0; /* space for 32 bit jump disp */ | |
2229 | buffer[9] = 0; | |
2230 | buffer[10] = 0; | |
2231 | buffer[11] = 0; | |
2232 | buffer[12] = 0; | |
2233 | buffer[13] = 0; | |
2234 | /* Make reloc for the long disp */ | |
2235 | fix_new (fragP, | |
2236 | fragP->fr_fix + 8, | |
2237 | 4, | |
2238 | fragP->fr_symbol, | |
2239 | fragP->fr_offset, | |
2240 | 0, | |
2241 | BFD_RELOC_32); | |
2242 | fragP->fr_fix += COND32_LENGTH; | |
2243 | fragP->fr_var = 0; | |
2244 | donerelax = 1; | |
2245 | #endif | |
2246 | ||
2247 | break; | |
2248 | ||
2249 | default: | |
2250 | abort (); | |
2251 | } | |
2252 | ||
2253 | if (donerelax && !sh_relax) | |
2254 | as_warn_where (fragP->fr_file, fragP->fr_line, | |
2255 | _("overflow in branch to %s; converted into longer instruction sequence"), | |
2256 | (fragP->fr_symbol != NULL | |
2257 | ? S_GET_NAME (fragP->fr_symbol) | |
2258 | : "")); | |
2259 | } | |
2260 | ||
2261 | valueT | |
2262 | DEFUN (md_section_align, (seg, size), | |
2263 | segT seg AND | |
2264 | valueT size) | |
2265 | { | |
2266 | #ifdef BFD_ASSEMBLER | |
2267 | #ifdef OBJ_ELF | |
2268 | return size; | |
2269 | #else /* ! OBJ_ELF */ | |
2270 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) | |
2271 | & (-1 << bfd_get_section_alignment (stdoutput, seg))); | |
2272 | #endif /* ! OBJ_ELF */ | |
2273 | #else /* ! BFD_ASSEMBLER */ | |
2274 | return ((size + (1 << section_alignment[(int) seg]) - 1) | |
2275 | & (-1 << section_alignment[(int) seg])); | |
2276 | #endif /* ! BFD_ASSEMBLER */ | |
2277 | } | |
2278 | ||
2279 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
2280 | the expession does not need to be aligned. */ | |
2281 | ||
2282 | static int sh_no_align_cons = 0; | |
2283 | ||
2284 | /* This handles the unaligned space allocation pseudo-ops, such as | |
2285 | .uaword. .uaword is just like .word, but the value does not need | |
2286 | to be aligned. */ | |
2287 | ||
2288 | static void | |
2289 | s_uacons (bytes) | |
2290 | int bytes; | |
2291 | { | |
2292 | /* Tell sh_cons_align not to align this value. */ | |
2293 | sh_no_align_cons = 1; | |
2294 | cons (bytes); | |
2295 | } | |
2296 | ||
2297 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
2298 | aligned correctly. Note that this can cause warnings to be issued | |
2299 | when assembling initialized structured which were declared with the | |
2300 | packed attribute. FIXME: Perhaps we should require an option to | |
2301 | enable this warning? */ | |
2302 | ||
2303 | void | |
2304 | sh_cons_align (nbytes) | |
2305 | int nbytes; | |
2306 | { | |
2307 | int nalign; | |
2308 | char *p; | |
2309 | ||
2310 | if (sh_no_align_cons) | |
2311 | { | |
2312 | /* This is an unaligned pseudo-op. */ | |
2313 | sh_no_align_cons = 0; | |
2314 | return; | |
2315 | } | |
2316 | ||
2317 | nalign = 0; | |
2318 | while ((nbytes & 1) == 0) | |
2319 | { | |
2320 | ++nalign; | |
2321 | nbytes >>= 1; | |
2322 | } | |
2323 | ||
2324 | if (nalign == 0) | |
2325 | return; | |
2326 | ||
2327 | if (now_seg == absolute_section) | |
2328 | { | |
2329 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
2330 | as_warn (_("misaligned data")); | |
2331 | return; | |
2332 | } | |
2333 | ||
2334 | p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0, | |
2335 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); | |
2336 | ||
2337 | record_alignment (now_seg, nalign); | |
2338 | } | |
2339 | ||
2340 | /* When relaxing, we need to output a reloc for any .align directive | |
2341 | that requests alignment to a four byte boundary or larger. This is | |
2342 | also where we check for misaligned data. */ | |
2343 | ||
2344 | void | |
2345 | sh_handle_align (frag) | |
2346 | fragS *frag; | |
2347 | { | |
2348 | if (sh_relax | |
2349 | && frag->fr_type == rs_align | |
2350 | && frag->fr_address + frag->fr_fix > 0 | |
2351 | && frag->fr_offset > 1 | |
2352 | && now_seg != bss_section) | |
2353 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, | |
2354 | BFD_RELOC_SH_ALIGN); | |
2355 | ||
2356 | if (frag->fr_type == rs_align_code | |
2357 | && frag->fr_next->fr_address - frag->fr_address - frag->fr_fix != 0) | |
2358 | as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); | |
2359 | } | |
2360 | ||
2361 | /* This macro decides whether a particular reloc is an entry in a | |
2362 | switch table. It is used when relaxing, because the linker needs | |
2363 | to know about all such entries so that it can adjust them if | |
2364 | necessary. */ | |
2365 | ||
2366 | #ifdef BFD_ASSEMBLER | |
2367 | #define SWITCH_TABLE_CONS(fix) (0) | |
2368 | #else | |
2369 | #define SWITCH_TABLE_CONS(fix) \ | |
2370 | ((fix)->fx_r_type == 0 \ | |
2371 | && ((fix)->fx_size == 2 \ | |
2372 | || (fix)->fx_size == 1 \ | |
2373 | || (fix)->fx_size == 4)) | |
2374 | #endif | |
2375 | ||
2376 | #define SWITCH_TABLE(fix) \ | |
2377 | ((fix)->fx_addsy != NULL \ | |
2378 | && (fix)->fx_subsy != NULL \ | |
2379 | && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \ | |
2380 | && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \ | |
2381 | && ((fix)->fx_r_type == BFD_RELOC_32 \ | |
2382 | || (fix)->fx_r_type == BFD_RELOC_16 \ | |
2383 | || (fix)->fx_r_type == BFD_RELOC_8 \ | |
2384 | || SWITCH_TABLE_CONS (fix))) | |
2385 | ||
2386 | /* See whether we need to force a relocation into the output file. | |
2387 | This is used to force out switch and PC relative relocations when | |
2388 | relaxing. */ | |
2389 | ||
2390 | int | |
2391 | sh_force_relocation (fix) | |
2392 | fixS *fix; | |
2393 | { | |
2394 | ||
2395 | if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
2396 | || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
2397 | return 1; | |
2398 | ||
2399 | if (! sh_relax) | |
2400 | return 0; | |
2401 | ||
2402 | return (fix->fx_pcrel | |
2403 | || SWITCH_TABLE (fix) | |
2404 | || fix->fx_r_type == BFD_RELOC_SH_COUNT | |
2405 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
2406 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
2407 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
2408 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); | |
2409 | } | |
2410 | ||
2411 | #ifdef OBJ_ELF | |
2412 | boolean | |
2413 | sh_fix_adjustable (fixP) | |
2414 | fixS *fixP; | |
2415 | { | |
2416 | ||
2417 | if (fixP->fx_addsy == NULL) | |
2418 | return 1; | |
2419 | ||
2420 | /* We need the symbol name for the VTABLE entries */ | |
2421 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
2422 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
2423 | return 0; | |
2424 | ||
2425 | return 1; | |
2426 | } | |
d4845d57 JR |
2427 | |
2428 | void sh_elf_final_processing() | |
2429 | { | |
2430 | int val; | |
2431 | ||
2432 | /* Set file-specific flags to indicate if this code needs | |
2433 | a processor with the sh-dsp / sh3e ISA to execute. */ | |
2434 | if (valid_arch & arch_sh1) | |
2435 | val = EF_SH1; | |
2436 | else if (valid_arch & arch_sh2) | |
2437 | val = EF_SH2; | |
2438 | else if (valid_arch & arch_sh_dsp) | |
2439 | val = EF_SH_DSP; | |
2440 | else if (valid_arch & arch_sh3) | |
2441 | val = EF_SH3; | |
2442 | else if (valid_arch & arch_sh3_dsp) | |
2443 | val = EF_SH_DSP; | |
2444 | else if (valid_arch & arch_sh3e) | |
2445 | val = EF_SH3E; | |
2446 | else if (valid_arch & arch_sh4) | |
2447 | val = EF_SH4; | |
2448 | else | |
2449 | abort (); | |
2450 | ||
2451 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; | |
2452 | elf_elfheader (stdoutput)->e_flags |= val; | |
2453 | } | |
252b5132 RH |
2454 | #endif |
2455 | ||
2456 | /* Apply a fixup to the object file. */ | |
2457 | ||
2458 | #ifdef BFD_ASSEMBLER | |
2459 | int | |
2460 | md_apply_fix (fixP, valp) | |
2461 | fixS *fixP; | |
2462 | valueT *valp; | |
2463 | #else | |
2464 | void | |
2465 | md_apply_fix (fixP, val) | |
2466 | fixS *fixP; | |
2467 | long val; | |
2468 | #endif | |
2469 | { | |
2470 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
2471 | int lowbyte = target_big_endian ? 1 : 0; | |
2472 | int highbyte = target_big_endian ? 0 : 1; | |
2473 | #ifdef BFD_ASSEMBLER | |
2474 | long val = *valp; | |
2475 | #endif | |
2476 | long max, min; | |
2477 | int shift; | |
2478 | ||
2479 | #ifdef BFD_ASSEMBLER | |
2480 | /* adjust_reloc_syms won't convert a reloc against a weak symbol | |
2481 | into a reloc against a section, but bfd_install_relocation will | |
2482 | screw up if the symbol is defined, so we have to adjust val here | |
2483 | to avoid the screw up later. */ | |
2484 | if (fixP->fx_addsy != NULL | |
2485 | && S_IS_WEAK (fixP->fx_addsy)) | |
2486 | val -= S_GET_VALUE (fixP->fx_addsy); | |
2487 | #endif | |
2488 | ||
2489 | #ifndef BFD_ASSEMBLER | |
2490 | if (fixP->fx_r_type == 0) | |
2491 | { | |
2492 | if (fixP->fx_size == 2) | |
2493 | fixP->fx_r_type = BFD_RELOC_16; | |
2494 | else if (fixP->fx_size == 4) | |
2495 | fixP->fx_r_type = BFD_RELOC_32; | |
2496 | else if (fixP->fx_size == 1) | |
2497 | fixP->fx_r_type = BFD_RELOC_8; | |
2498 | else | |
2499 | abort (); | |
2500 | } | |
2501 | #endif | |
2502 | ||
2503 | max = min = 0; | |
2504 | shift = 0; | |
2505 | switch (fixP->fx_r_type) | |
2506 | { | |
2507 | case BFD_RELOC_SH_IMM4: | |
2508 | max = 0xf; | |
2509 | *buf = (*buf & 0xf0) | (val & 0xf); | |
2510 | break; | |
2511 | ||
2512 | case BFD_RELOC_SH_IMM4BY2: | |
2513 | max = 0xf; | |
2514 | shift = 1; | |
2515 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); | |
2516 | break; | |
2517 | ||
2518 | case BFD_RELOC_SH_IMM4BY4: | |
2519 | max = 0xf; | |
2520 | shift = 2; | |
2521 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); | |
2522 | break; | |
2523 | ||
2524 | case BFD_RELOC_SH_IMM8BY2: | |
2525 | max = 0xff; | |
2526 | shift = 1; | |
2527 | *buf = val >> 1; | |
2528 | break; | |
2529 | ||
2530 | case BFD_RELOC_SH_IMM8BY4: | |
2531 | max = 0xff; | |
2532 | shift = 2; | |
2533 | *buf = val >> 2; | |
2534 | break; | |
2535 | ||
2536 | case BFD_RELOC_8: | |
2537 | case BFD_RELOC_SH_IMM8: | |
2538 | /* Sometimes the 8 bit value is sign extended (e.g., add) and | |
2539 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
2540 | Note that adding further restrictions may invalidate | |
2541 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
2542 | max = 0xff; | |
2543 | min = - 0xff; | |
2544 | *buf++ = val; | |
2545 | break; | |
2546 | ||
2547 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
2548 | /* The lower two bits of the PC are cleared before the | |
2549 | displacement is added in. We can assume that the destination | |
2550 | is on a 4 byte bounday. If this instruction is also on a 4 | |
2551 | byte boundary, then we want | |
2552 | (target - here) / 4 | |
2553 | and target - here is a multiple of 4. | |
2554 | Otherwise, we are on a 2 byte boundary, and we want | |
2555 | (target - (here - 2)) / 4 | |
2556 | and target - here is not a multiple of 4. Computing | |
2557 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
2558 | works for both cases, since in the first case the addition of | |
2559 | 2 will be removed by the division. target - here is in the | |
2560 | variable val. */ | |
2561 | val = (val + 2) / 4; | |
2562 | if (val & ~0xff) | |
2563 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2564 | buf[lowbyte] = val; | |
2565 | break; | |
2566 | ||
2567 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
2568 | val /= 2; | |
2569 | if (val & ~0xff) | |
2570 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2571 | buf[lowbyte] = val; | |
2572 | break; | |
2573 | ||
2574 | case BFD_RELOC_SH_PCDISP8BY2: | |
2575 | val /= 2; | |
2576 | if (val < -0x80 || val > 0x7f) | |
2577 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2578 | buf[lowbyte] = val; | |
2579 | break; | |
2580 | ||
2581 | case BFD_RELOC_SH_PCDISP12BY2: | |
2582 | val /= 2; | |
2583 | if (val < -0x800 || val >= 0x7ff) | |
2584 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2585 | buf[lowbyte] = val & 0xff; | |
2586 | buf[highbyte] |= (val >> 8) & 0xf; | |
2587 | break; | |
2588 | ||
2589 | case BFD_RELOC_32: | |
2590 | if (! target_big_endian) | |
2591 | { | |
2592 | *buf++ = val >> 0; | |
2593 | *buf++ = val >> 8; | |
2594 | *buf++ = val >> 16; | |
2595 | *buf++ = val >> 24; | |
2596 | } | |
2597 | else | |
2598 | { | |
2599 | *buf++ = val >> 24; | |
2600 | *buf++ = val >> 16; | |
2601 | *buf++ = val >> 8; | |
2602 | *buf++ = val >> 0; | |
2603 | } | |
2604 | break; | |
2605 | ||
2606 | case BFD_RELOC_16: | |
2607 | if (! target_big_endian) | |
2608 | { | |
2609 | *buf++ = val >> 0; | |
2610 | *buf++ = val >> 8; | |
2611 | } | |
2612 | else | |
2613 | { | |
2614 | *buf++ = val >> 8; | |
2615 | *buf++ = val >> 0; | |
2616 | } | |
2617 | break; | |
2618 | ||
2619 | case BFD_RELOC_SH_USES: | |
2620 | /* Pass the value into sh_coff_reloc_mangle. */ | |
2621 | fixP->fx_addnumber = val; | |
2622 | break; | |
2623 | ||
2624 | case BFD_RELOC_SH_COUNT: | |
2625 | case BFD_RELOC_SH_ALIGN: | |
2626 | case BFD_RELOC_SH_CODE: | |
2627 | case BFD_RELOC_SH_DATA: | |
2628 | case BFD_RELOC_SH_LABEL: | |
2629 | /* Nothing to do here. */ | |
2630 | break; | |
2631 | ||
2632 | case BFD_RELOC_VTABLE_INHERIT: | |
2633 | case BFD_RELOC_VTABLE_ENTRY: | |
2634 | fixP->fx_done = 0; | |
49309057 ILT |
2635 | #ifdef BFD_ASSEMBLER |
2636 | return 0; | |
2637 | #else | |
252b5132 | 2638 | return; |
49309057 | 2639 | #endif |
252b5132 RH |
2640 | |
2641 | default: | |
2642 | abort (); | |
2643 | } | |
2644 | ||
2645 | if (shift != 0) | |
2646 | { | |
2647 | if ((val & ((1 << shift) - 1)) != 0) | |
2648 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
2649 | if (val >= 0) | |
2650 | val >>= shift; | |
2651 | else | |
2652 | val = ((val >> shift) | |
2653 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
2654 | } | |
2655 | if (max != 0 && (val < min || val > max)) | |
2656 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
2657 | ||
2658 | #ifdef BFD_ASSEMBLER | |
2659 | return 0; | |
2660 | #endif | |
2661 | } | |
2662 | ||
2663 | /* Called just before address relaxation. Return the length | |
2664 | by which a fragment must grow to reach it's destination. */ | |
2665 | ||
2666 | int | |
2667 | md_estimate_size_before_relax (fragP, segment_type) | |
2668 | register fragS *fragP; | |
2669 | register segT segment_type; | |
2670 | { | |
2671 | switch (fragP->fr_subtype) | |
2672 | { | |
2673 | case C (UNCOND_JUMP, UNDEF_DISP): | |
2674 | /* used to be a branch to somewhere which was unknown */ | |
2675 | if (!fragP->fr_symbol) | |
2676 | { | |
2677 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
2678 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length; | |
2679 | } | |
2680 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
2681 | { | |
2682 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
2683 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length; | |
2684 | } | |
2685 | else | |
2686 | { | |
2687 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
2688 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length; | |
2689 | return md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length; | |
2690 | } | |
2691 | break; | |
2692 | ||
2693 | default: | |
2694 | abort (); | |
2695 | case C (COND_JUMP, UNDEF_DISP): | |
2696 | case C (COND_JUMP_DELAY, UNDEF_DISP): | |
2697 | /* used to be a branch to somewhere which was unknown */ | |
2698 | if (fragP->fr_symbol | |
2699 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
2700 | { | |
2701 | int what = GET_WHAT (fragP->fr_subtype); | |
2702 | /* Got a symbol and it's defined in this segment, become byte | |
2703 | sized - maybe it will fix up */ | |
2704 | fragP->fr_subtype = C (what, COND8); | |
2705 | fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length; | |
2706 | } | |
2707 | else if (fragP->fr_symbol) | |
2708 | { | |
2709 | int what = GET_WHAT (fragP->fr_subtype); | |
2710 | /* Its got a segment, but its not ours, so it will always be long */ | |
2711 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); | |
2712 | fragP->fr_var = md_relax_table[C (what, COND32)].rlx_length; | |
2713 | return md_relax_table[C (what, COND32)].rlx_length; | |
2714 | } | |
2715 | else | |
2716 | { | |
2717 | int what = GET_WHAT (fragP->fr_subtype); | |
2718 | /* We know the abs value */ | |
2719 | fragP->fr_subtype = C (what, COND8); | |
2720 | fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length; | |
2721 | } | |
2722 | ||
2723 | break; | |
2724 | } | |
2725 | return fragP->fr_var; | |
2726 | } | |
2727 | ||
2728 | /* Put number into target byte order */ | |
2729 | ||
2730 | void | |
2731 | md_number_to_chars (ptr, use, nbytes) | |
2732 | char *ptr; | |
2733 | valueT use; | |
2734 | int nbytes; | |
2735 | { | |
2736 | if (! target_big_endian) | |
2737 | number_to_chars_littleendian (ptr, use, nbytes); | |
2738 | else | |
2739 | number_to_chars_bigendian (ptr, use, nbytes); | |
2740 | } | |
2741 | ||
2742 | long | |
2743 | md_pcrel_from (fixP) | |
2744 | fixS *fixP; | |
2745 | { | |
2746 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; | |
2747 | } | |
2748 | ||
2749 | #ifdef OBJ_COFF | |
2750 | ||
2751 | int | |
2752 | tc_coff_sizemachdep (frag) | |
2753 | fragS *frag; | |
2754 | { | |
2755 | return md_relax_table[frag->fr_subtype].rlx_length; | |
2756 | } | |
2757 | ||
2758 | #endif /* OBJ_COFF */ | |
2759 | ||
2760 | /* When we align the .text section, insert the correct NOP pattern. */ | |
2761 | ||
2762 | int | |
2763 | sh_do_align (n, fill, len, max) | |
2764 | int n; | |
2765 | const char *fill; | |
2766 | int len; | |
2767 | int max; | |
2768 | { | |
2769 | if (fill == NULL | |
b9e57a38 | 2770 | && subseg_text_p (now_seg) |
252b5132 RH |
2771 | && n > 1) |
2772 | { | |
2773 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
2774 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
2775 | ||
2776 | /* First align to a 2 byte boundary, in case there is an odd | |
2777 | .byte. */ | |
2778 | frag_align (1, 0, 0); | |
2779 | if (target_big_endian) | |
2780 | frag_align_pattern (n, big_nop_pattern, sizeof big_nop_pattern, max); | |
2781 | else | |
2782 | frag_align_pattern (n, little_nop_pattern, sizeof little_nop_pattern, | |
2783 | max); | |
2784 | return 1; | |
2785 | } | |
2786 | ||
2787 | return 0; | |
2788 | } | |
2789 | ||
2790 | #ifndef BFD_ASSEMBLER | |
2791 | #ifdef OBJ_COFF | |
2792 | ||
2793 | /* Map BFD relocs to SH COFF relocs. */ | |
2794 | ||
2795 | struct reloc_map | |
2796 | { | |
2797 | bfd_reloc_code_real_type bfd_reloc; | |
2798 | int sh_reloc; | |
2799 | }; | |
2800 | ||
2801 | static const struct reloc_map coff_reloc_map[] = | |
2802 | { | |
2803 | { BFD_RELOC_32, R_SH_IMM32 }, | |
2804 | { BFD_RELOC_16, R_SH_IMM16 }, | |
2805 | { BFD_RELOC_8, R_SH_IMM8 }, | |
2806 | { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 }, | |
2807 | { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP }, | |
2808 | { BFD_RELOC_SH_IMM4, R_SH_IMM4 }, | |
2809 | { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 }, | |
2810 | { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 }, | |
2811 | { BFD_RELOC_SH_IMM8, R_SH_IMM8 }, | |
2812 | { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 }, | |
2813 | { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 }, | |
2814 | { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 }, | |
2815 | { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 }, | |
2816 | { BFD_RELOC_8_PCREL, R_SH_SWITCH8 }, | |
2817 | { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 }, | |
2818 | { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 }, | |
2819 | { BFD_RELOC_SH_USES, R_SH_USES }, | |
2820 | { BFD_RELOC_SH_COUNT, R_SH_COUNT }, | |
2821 | { BFD_RELOC_SH_ALIGN, R_SH_ALIGN }, | |
2822 | { BFD_RELOC_SH_CODE, R_SH_CODE }, | |
2823 | { BFD_RELOC_SH_DATA, R_SH_DATA }, | |
2824 | { BFD_RELOC_SH_LABEL, R_SH_LABEL }, | |
2825 | { BFD_RELOC_UNUSED, 0 } | |
2826 | }; | |
2827 | ||
2828 | /* Adjust a reloc for the SH. This is similar to the generic code, | |
2829 | but does some minor tweaking. */ | |
2830 | ||
2831 | void | |
2832 | sh_coff_reloc_mangle (seg, fix, intr, paddr) | |
2833 | segment_info_type *seg; | |
2834 | fixS *fix; | |
2835 | struct internal_reloc *intr; | |
2836 | unsigned int paddr; | |
2837 | { | |
2838 | symbolS *symbol_ptr = fix->fx_addsy; | |
2839 | symbolS *dot; | |
2840 | ||
2841 | intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where; | |
2842 | ||
2843 | if (! SWITCH_TABLE (fix)) | |
2844 | { | |
2845 | const struct reloc_map *rm; | |
2846 | ||
2847 | for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++) | |
2848 | if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type) | |
2849 | break; | |
2850 | if (rm->bfd_reloc == BFD_RELOC_UNUSED) | |
2851 | as_bad_where (fix->fx_file, fix->fx_line, | |
2852 | _("Can not represent %s relocation in this object file format"), | |
2853 | bfd_get_reloc_code_name (fix->fx_r_type)); | |
2854 | intr->r_type = rm->sh_reloc; | |
2855 | intr->r_offset = 0; | |
2856 | } | |
2857 | else | |
2858 | { | |
2859 | know (sh_relax); | |
2860 | ||
2861 | if (fix->fx_r_type == BFD_RELOC_16) | |
2862 | intr->r_type = R_SH_SWITCH16; | |
2863 | else if (fix->fx_r_type == BFD_RELOC_8) | |
2864 | intr->r_type = R_SH_SWITCH8; | |
2865 | else if (fix->fx_r_type == BFD_RELOC_32) | |
2866 | intr->r_type = R_SH_SWITCH32; | |
2867 | else | |
2868 | abort (); | |
2869 | ||
2870 | /* For a switch reloc, we set r_offset to the difference between | |
2871 | the reloc address and the subtrahend. When the linker is | |
2872 | doing relaxing, it can use the determine the starting and | |
2873 | ending points of the switch difference expression. */ | |
2874 | intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy); | |
2875 | } | |
2876 | ||
2877 | /* PC relative relocs are always against the current section. */ | |
2878 | if (symbol_ptr == NULL) | |
2879 | { | |
2880 | switch (fix->fx_r_type) | |
2881 | { | |
2882 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
2883 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
2884 | case BFD_RELOC_SH_PCDISP8BY2: | |
2885 | case BFD_RELOC_SH_PCDISP12BY2: | |
2886 | case BFD_RELOC_SH_USES: | |
2887 | symbol_ptr = seg->dot; | |
2888 | break; | |
2889 | default: | |
2890 | break; | |
2891 | } | |
2892 | } | |
2893 | ||
2894 | if (fix->fx_r_type == BFD_RELOC_SH_USES) | |
2895 | { | |
2896 | /* We can't store the offset in the object file, since this | |
2897 | reloc does not take up any space, so we store it in r_offset. | |
2898 | The fx_addnumber field was set in md_apply_fix. */ | |
2899 | intr->r_offset = fix->fx_addnumber; | |
2900 | } | |
2901 | else if (fix->fx_r_type == BFD_RELOC_SH_COUNT) | |
2902 | { | |
2903 | /* We can't store the count in the object file, since this reloc | |
2904 | does not take up any space, so we store it in r_offset. The | |
2905 | fx_offset field was set when the fixup was created in | |
2906 | sh_coff_frob_file. */ | |
2907 | intr->r_offset = fix->fx_offset; | |
2908 | /* This reloc is always absolute. */ | |
2909 | symbol_ptr = NULL; | |
2910 | } | |
2911 | else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN) | |
2912 | { | |
2913 | /* Store the alignment in the r_offset field. */ | |
2914 | intr->r_offset = fix->fx_offset; | |
2915 | /* This reloc is always absolute. */ | |
2916 | symbol_ptr = NULL; | |
2917 | } | |
2918 | else if (fix->fx_r_type == BFD_RELOC_SH_CODE | |
2919 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
2920 | || fix->fx_r_type == BFD_RELOC_SH_LABEL) | |
2921 | { | |
2922 | /* These relocs are always absolute. */ | |
2923 | symbol_ptr = NULL; | |
2924 | } | |
2925 | ||
2926 | /* Turn the segment of the symbol into an offset. */ | |
2927 | if (symbol_ptr != NULL) | |
2928 | { | |
2929 | dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot; | |
2930 | if (dot != NULL) | |
2931 | intr->r_symndx = dot->sy_number; | |
2932 | else | |
2933 | intr->r_symndx = symbol_ptr->sy_number; | |
2934 | } | |
2935 | else | |
2936 | intr->r_symndx = -1; | |
2937 | } | |
2938 | ||
2939 | #endif /* OBJ_COFF */ | |
2940 | #endif /* ! BFD_ASSEMBLER */ | |
2941 | ||
2942 | #ifdef BFD_ASSEMBLER | |
2943 | ||
2944 | /* Create a reloc. */ | |
2945 | ||
2946 | arelent * | |
2947 | tc_gen_reloc (section, fixp) | |
2948 | asection *section; | |
2949 | fixS *fixp; | |
2950 | { | |
2951 | arelent *rel; | |
2952 | bfd_reloc_code_real_type r_type; | |
2953 | ||
2954 | rel = (arelent *) xmalloc (sizeof (arelent)); | |
49309057 ILT |
2955 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
2956 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
2957 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
2958 | ||
2959 | r_type = fixp->fx_r_type; | |
2960 | ||
2961 | if (SWITCH_TABLE (fixp)) | |
2962 | { | |
2963 | rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy); | |
2964 | if (r_type == BFD_RELOC_16) | |
2965 | r_type = BFD_RELOC_SH_SWITCH16; | |
2966 | else if (r_type == BFD_RELOC_8) | |
2967 | r_type = BFD_RELOC_8_PCREL; | |
2968 | else if (r_type == BFD_RELOC_32) | |
2969 | r_type = BFD_RELOC_SH_SWITCH32; | |
2970 | else | |
2971 | abort (); | |
2972 | } | |
2973 | else if (r_type == BFD_RELOC_SH_USES) | |
2974 | rel->addend = fixp->fx_addnumber; | |
2975 | else if (r_type == BFD_RELOC_SH_COUNT) | |
2976 | rel->addend = fixp->fx_offset; | |
2977 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
2978 | rel->addend = fixp->fx_offset; | |
2979 | else if (r_type == BFD_RELOC_VTABLE_INHERIT | |
2980 | || r_type == BFD_RELOC_VTABLE_ENTRY) | |
2981 | rel->addend = fixp->fx_offset; | |
2982 | else if (fixp->fx_pcrel) | |
2983 | rel->addend = fixp->fx_addnumber; | |
2984 | else | |
2985 | rel->addend = 0; | |
2986 | ||
2987 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
2988 | if (rel->howto == NULL) | |
2989 | { | |
2990 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
2991 | _("Cannot represent relocation type %s"), | |
2992 | bfd_get_reloc_code_name (r_type)); | |
2993 | /* Set howto to a garbage value so that we can keep going. */ | |
2994 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
2995 | assert (rel->howto != NULL); | |
2996 | } | |
2997 | ||
2998 | return rel; | |
2999 | } | |
3000 | ||
3001 | #endif /* BFD_ASSEMBLER */ |