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4b95cf5c 1@c Copyright (C) 2002-2014 Free Software Foundation, Inc.
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2@c This is part of the GAS manual.
3@c For copying conditions, see the file as.texinfo.
4@ifset GENERIC
5@page
6@node MSP430-Dependent
7@chapter MSP 430 Dependent Features
8@end ifset
9@ifclear GENERIC
10@node Machine Dependencies
11@chapter MSP 430 Dependent Features
12@end ifclear
13
14@cindex MSP 430 support
15@cindex 430 support
16@menu
17* MSP430 Options:: Options
18* MSP430 Syntax:: Syntax
19* MSP430 Floating Point:: Floating Point
20* MSP430 Directives:: MSP 430 Machine Directives
21* MSP430 Opcodes:: Opcodes
b18c562e 22* MSP430 Profiling Capability:: Profiling Capability
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23@end menu
24
25@node MSP430 Options
26@section Options
27@cindex MSP 430 options (none)
28@cindex options for MSP430 (none)
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29@table @code
30
638d3803 31@item -mmcu
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32selects the mcu architecture. If the architecture is 430Xv2 then this
33also enables NOP generation unless the @option{-mN} is also specified.
638d3803 34
997b26e8 35@item -mcpu
638d3803 36selects the cpu architecture. If the architecture is 430Xv2 then this
65d7bab5 37also enables NOP generation unless the @option{-mN} is also specified.
638d3803 38
34bca508 39@item -mP
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40enables polymorph instructions handler.
41
34bca508 42@item -mQ
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43enables relaxation at assembly time. DANGEROUS!
44
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45@item -ml
46indicates that the input uses the large code model.
47
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48@item -mn
49enables the generation of a NOP instruction following any instruction
50that might change the interrupts enabled/disabled state. The
51pipelined nature of the MSP430 core means that any instruction that
52changes the interrupt state (@code{EINT}, @code{DINT}, @code{BIC #8,
53SR}, @code{BIS #8, SR} or @code{MOV.W <>, SR}) must be
54followed by a NOP instruction in order to ensure the correct
55processing of interrupts. By default it is up to the programmer to
56supply these NOP instructions, but this command line option enables
65d7bab5 57the automatic insertion by the assembler, if they are missing.
a75555d1 58
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59@item -mN
60disables the generation of a NOP instruction following any instruction
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61that might change the interrupts enabled/disabled state. This is the
62default behaviour.
13761a11 63
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64@item -mz
65tells the assembler to generate a warning message if a NOP does not
66immediately forllow an instruction that enables or disables
67interrupts. This is the default.
68
69Note that this option can be stacked with the @option{-mn} option so
70that the assembler will both warn about missing NOP instructions and
71then insert them automatically.
72
73@item -mZ
74disables warnings about missing NOP instructions.
75
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76@item -md
77mark the object file as one that requires data to copied from ROM to
78RAM at execution startup. Disabled by default.
79
77592908 80@end table
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81
82@node MSP430 Syntax
83@section Syntax
84@menu
85* MSP430-Macros:: Macros
86* MSP430-Chars:: Special Characters
87* MSP430-Regs:: Register Names
88* MSP430-Ext:: Assembler Extensions
89@end menu
90
91@node MSP430-Macros
92@subsection Macros
93
94@cindex Macros, MSP 430
95@cindex MSP 430 macros
96The macro syntax used on the MSP 430 is like that described in the MSP
97430 Family Assembler Specification. Normal @code{@value{AS}}
98macros should still work.
99
100Additional built-in macros are:
101
102@table @code
103
34bca508 104@item llo(exp)
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105Extracts least significant word from 32-bit expression 'exp'.
106
107@item lhi(exp)
108Extracts most significant word from 32-bit expression 'exp'.
109
110@item hlo(exp)
111Extracts 3rd word from 64-bit expression 'exp'.
112
34bca508 113@item hhi(exp)
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114Extracts 4rd word from 64-bit expression 'exp'.
115
116@end table
117
118They normally being used as an immediate source operand.
119@smallexample
34bca508 120 mov #llo(1), r10 ; == mov #1, r10
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121 mov #lhi(1), r10 ; == mov #0, r10
122@end smallexample
34bca508 123
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124@node MSP430-Chars
125@subsection Special Characters
126
127@cindex line comment character, MSP 430
128@cindex MSP 430 line comment character
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129A semicolon (@samp{;}) appearing anywhere on a line starts a comment
130that extends to the end of that line.
131
132If a @samp{#} appears as the first character of a line then the whole
133line is treated as a comment, but it can also be a logical line number
134directive (@pxref{Comments}) or a preprocessor control command
135(@pxref{Preprocessing}).
136
137@cindex line separator, MSP 430
138@cindex statement separator, MSP 430
139@cindex MSP 430 line separator
140Multiple statements can appear on the same line provided that they are
141separated by the @samp{@{} character.
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142
143@cindex identifiers, MSP 430
144@cindex MSP 430 identifiers
34bca508 145The character @samp{$} in jump instructions indicates current location and
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146implemented only for TI syntax compatibility.
147
148@node MSP430-Regs
149@subsection Register Names
150
151@cindex MSP 430 register names
152@cindex register names, MSP 430
153General-purpose registers are represented by predefined symbols of the
154form @samp{r@var{N}} (for global registers), where @var{N} represents
155a number between @code{0} and @code{15}. The leading
156letters may be in either upper or lower case; for example, @samp{r13}
157and @samp{R7} are both valid register names.
158
159@cindex special purpose registers, MSP 430
160Register names @samp{PC}, @samp{SP} and @samp{SR} cannot be used as register names
161and will be treated as variables. Use @samp{r0}, @samp{r1}, and @samp{r2} instead.
162
163
164@node MSP430-Ext
165@subsection Assembler Extensions
166@cindex MSP430 Assembler Extensions
167
168@table @code
169
170@item @@rN
171As destination operand being treated as @samp{0(rn)}
172
173@item 0(rN)
174As source operand being treated as @samp{@@rn}
175
176@item jCOND +N
177Skips next N bytes followed by jump instruction and equivalent to
178@samp{jCOND $+N+2}
179
180@end table
181
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182Also, there are some instructions, which cannot be found in other assemblers.
183These are branch instructions, which has different opcodes upon jump distance.
184They all got PC relative addressing mode.
185
186@table @code
187@item beq label
188A polymorph instruction which is @samp{jeq label} in case if jump distance
189within allowed range for cpu's jump instruction. If not, this unrolls into
190a sequence of
191@smallexample
192 jne $+6
193 br label
194@end smallexample
195
196@item bne label
197A polymorph instruction which is @samp{jne label} or @samp{jeq +4; br label}
198
199@item blt label
200A polymorph instruction which is @samp{jl label} or @samp{jge +4; br label}
201
202@item bltn label
203A polymorph instruction which is @samp{jn label} or @samp{jn +2; jmp +4; br label}
204
205@item bltu label
206A polymorph instruction which is @samp{jlo label} or @samp{jhs +2; br label}
207
208@item bge label
209A polymorph instruction which is @samp{jge label} or @samp{jl +4; br label}
210
211@item bgeu label
212A polymorph instruction which is @samp{jhs label} or @samp{jlo +4; br label}
213
214@item bgt label
215A polymorph instruction which is @samp{jeq +2; jge label} or @samp{jeq +6; jl +4; br label}
216
217@item bgtu label
218A polymorph instruction which is @samp{jeq +2; jhs label} or @samp{jeq +6; jlo +4; br label}
219
220@item bleu label
221A polymorph instruction which is @samp{jeq label; jlo label} or @samp{jeq +2; jhs +4; br label}
222
223@item ble label
224A polymorph instruction which is @samp{jeq label; jl label} or @samp{jeq +2; jge +4; br label}
225
226@item jump label
227A polymorph instruction which is @samp{jmp label} or @samp{br label}
228@end table
229
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230
231@node MSP430 Floating Point
232@section Floating Point
233
234@cindex floating point, MSP 430 (@sc{ieee})
235@cindex MSP 430 floating point (@sc{ieee})
236The MSP 430 family uses @sc{ieee} 32-bit floating-point numbers.
237
238@node MSP430 Directives
239@section MSP 430 Machine Directives
240
241@cindex machine directives, MSP 430
242@cindex MSP 430 machine directives
243@table @code
244@cindex @code{file} directive, MSP 430
245@item .file
246This directive is ignored; it is accepted for compatibility with other
247MSP 430 assemblers.
248
249@quotation
250@emph{Warning:} in other versions of the @sc{gnu} assembler, @code{.file} is
251used for the directive called @code{.app-file} in the MSP 430 support.
252@end quotation
253
254@cindex @code{line} directive, MSP 430
255@item .line
256This directive is ignored; it is accepted for compatibility with other
257MSP 430 assemblers.
258
638d3803 259@cindex @code{arch} directive, MSP 430
2469cfa2 260@item .arch
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261Sets the target microcontroller in the same way as the @option{-mmcu}
262command line option.
263
264@cindex @code{cpu} directive, MSP 430
265@item .cpu
266Sets the target architecture in the same way as the @option{-mcpu}
267command line option.
2469cfa2 268
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269@cindex @code{profiler} directive, MSP 430
270@item .profiler
271This directive instructs assembler to add new profile entry to the object file.
272
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273@cindex @code{refsym} directive, MSP 430
274@item .refsym
275This directive instructs assembler to add an undefined reference to
276the symbol following the directive. The maximum symbol name length is
2771023 characters. No relocation is created for this symbol; it will
278exist purely for pulling in object files from archives. Note that
279this reloc is not sufficient to prevent garbage collection; use a
280KEEP() directive in the linker file to preserve such objects.
281
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282@end table
283
284@node MSP430 Opcodes
285@section Opcodes
286
287@cindex MSP 430 opcodes
288@cindex opcodes for MSP 430
289@code{@value{AS}} implements all the standard MSP 430 opcodes. No
290additional pseudo-instructions are needed on this family.
291
292For information on the 430 machine instruction set, see @cite{MSP430
77592908 293User's Manual, document slau049d}, Texas Instrument, Inc.
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294
295@node MSP430 Profiling Capability
296@section Profiling Capability
297
298@cindex MSP 430 profiling capability
299@cindex profiling capability for MSP 430
300It is a performance hit to use gcc's profiling approach for this tiny target.
301Even more -- jtag hardware facility does not perform any profiling functions.
302However we've got gdb's built-in simulator where we can do anything.
303
304We define new section @samp{.profiler} which holds all profiling information.
305We define new pseudo operation @samp{.profiler} which will instruct assembler to
306add new profile entry to the object file. Profile should take place at the
307present address.
308
309Pseudo operation format:
310
311@samp{.profiler flags,function_to_profile [, cycle_corrector, extra]}
312
313
314where:
315
316@table @code
317
318@table @code
319
320@samp{flags} is a combination of the following characters:
321
34bca508 322@item s
b18c562e 323function entry
34bca508 324@item x
b18c562e 325function exit
34bca508 326@item i
b18c562e 327function is in init section
34bca508 328@item f
b18c562e 329function is in fini section
34bca508 330@item l
b18c562e 331library call
34bca508 332@item c
b18c562e 333libc standard call
34bca508 334@item d
b18c562e 335stack value demand
34bca508 336@item I
b18c562e 337interrupt service routine
34bca508 338@item P
b18c562e 339prologue start
34bca508 340@item p
b18c562e 341prologue end
34bca508 342@item E
b18c562e 343epilogue start
34bca508 344@item e
b18c562e 345epilogue end
34bca508 346@item j
b18c562e 347long jump / sjlj unwind
34bca508 348@item a
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349an arbitrary code fragment
350@item t
351extra parameter saved (a constant value like frame size)
352@end table
353
34bca508 354@item function_to_profile
b18c562e 355a function address
34bca508 356@item cycle_corrector
b18c562e 357a value which should be added to the cycle counter, zero if omitted.
34bca508 358@item extra
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359any extra parameter, zero if omitted.
360
361@end table
362
363For example:
364@smallexample
365.global fxx
366.type fxx,@@function
367fxx:
368.LFrameOffset_fxx=0x08
369.profiler "scdP", fxx ; function entry.
370 ; we also demand stack value to be saved
371 push r11
372 push r10
373 push r9
374 push r8
375.profiler "cdpt",fxx,0, .LFrameOffset_fxx ; check stack value at this point
376 ; (this is a prologue end)
34bca508 377 ; note, that spare var filled with
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378 ; the farme size
379 mov r15,r8
380...
381.profiler cdE,fxx ; check stack
382 pop r8
383 pop r9
384 pop r10
385 pop r11
386.profiler xcde,fxx,3 ; exit adds 3 to the cycle counter
387 ret ; cause 'ret' insn takes 3 cycles
388@end smallexample
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