update copyright dates
[deliverable/binutils-gdb.git] / gas / doc / c-sh64.texi
CommitLineData
aa820537 1@c Copyright (C) 2002, 2003, 2008 Free Software Foundation, Inc.
324bfcf3
AO
2@c This is part of the GAS manual.
3@c For copying conditions, see the file as.texinfo.
4@page
5@node SH64-Dependent
ef230218 6@chapter SuperH SH64 Dependent Features
324bfcf3
AO
7
8@cindex SH64 support
9@menu
10* SH64 Options:: Options
11* SH64 Syntax:: Syntax
12* SH64 Directives:: SH64 Machine Directives
13* SH64 Opcodes:: Opcodes
14@end menu
15
16@node SH64 Options
17@section Options
18
19@cindex SH64 options
20@cindex options, SH64
21@table @code
22
23@cindex SH64 ISA options
24@cindex ISA options, SH64
88da98f3
MS
25@item -isa=sh4 | sh4a
26Specify the sh4 or sh4a instruction set.
27@item -isa=dsp
28Enable sh-dsp insns, and disable sh3e / sh4 insns.
29@item -isa=fp
30Enable sh2e, sh3e, sh4, and sh4a insn sets.
31@item -isa=all
32Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
324bfcf3
AO
33@item -isa=shmedia | -isa=shcompact
34Specify the default instruction set. @code{SHmedia} specifies the
3532-bit opcodes, and @code{SHcompact} specifies the 16-bit opcodes
36compatible with previous SH families. The default depends on the ABI
37selected; the default for the 64-bit ABI is SHmedia, and the default for
38the 32-bit ABI is SHcompact. If neither the ABI nor the ISA is
39specified, the default is 32-bit SHcompact.
40
41Note that the @code{.mode} pseudo-op is not permitted if the ISA is not
42specified on the command line.
43
44@cindex SH64 ABI options
45@cindex ABI options, SH64
46@item -abi=32 | -abi=64
47Specify the default ABI. If the ISA is specified and the ABI is not,
48the default ABI depends on the ISA, with SHmedia defaulting to 64-bit
49and SHcompact defaulting to 32-bit.
50
51Note that the @code{.abi} pseudo-op is not permitted if the ABI is not
52specified on the command line. When the ABI is specified on the command
53line, any @code{.abi} pseudo-ops in the source must match it.
54
55@item -shcompact-const-crange
56Emit code-range descriptors for constants in SHcompact code sections.
57
58@item -no-mix
59Disallow SHmedia code in the same section as constants and SHcompact
60code.
61
62@item -no-expand
63Do not expand MOVI, PT, PTA or PTB instructions.
64
65@item -expand-pt32
66With -abi=64, expand PT, PTA and PTB instructions to 32 bits only.
67
6fd4f6cc
DD
68@item -h-tick-hex
69Support H'00 style hex constants in addition to 0x00 style.
70
324bfcf3
AO
71@end table
72
73@node SH64 Syntax
74@section Syntax
75
76@menu
77* SH64-Chars:: Special Characters
78* SH64-Regs:: Register Names
79* SH64-Addressing:: Addressing Modes
80@end menu
81
82@node SH64-Chars
83@subsection Special Characters
84
85@cindex line comment character, SH64
86@cindex SH64 line comment character
87@samp{!} is the line comment character.
88
89@cindex line separator, SH64
90@cindex statement separator, SH64
91@cindex SH64 line separator
92You can use @samp{;} instead of a newline to separate statements.
93
94@cindex symbol names, @samp{$} in
95@cindex @code{$} in symbol names
96Since @samp{$} has no special meaning, you may use it in symbol names.
97
98@node SH64-Regs
99@subsection Register Names
100
101@cindex SH64 registers
102@cindex registers, SH64
103You can use the predefined symbols @samp{r0} through @samp{r63} to refer
104to the SH64 general registers, @samp{cr0} through @code{cr63} for
105control registers, @samp{tr0} through @samp{tr7} for target address
106registers, @samp{fr0} through @samp{fr63} for single-precision floating
107point registers, @samp{dr0} through @samp{dr62} (even numbered registers
108only) for double-precision floating point registers, @samp{fv0} through
109@samp{fv60} (multiples of four only) for single-precision floating point
110vectors, @samp{fp0} through @samp{fp62} (even numbered registers only)
111for single-precision floating point pairs, @samp{mtrx0} through
112@samp{mtrx48} (multiples of 16 only) for 4x4 matrices of
113single-precision floating point registers, @samp{pc} for the program
114counter, and @samp{fpscr} for the floating point status and control
115register.
116
117You can also refer to the control registers by the mnemonics @samp{sr},
118@samp{ssr}, @samp{pssr}, @samp{intevt}, @samp{expevt}, @samp{pexpevt},
119@samp{tra}, @samp{spc}, @samp{pspc}, @samp{resvec}, @samp{vbr},
120@samp{tea}, @samp{dcr}, @samp{kcr0}, @samp{kcr1}, @samp{ctc}, and
121@samp{usr}.
122
123@node SH64-Addressing
124@subsection Addressing Modes
125
126@cindex addressing modes, SH64
127@cindex SH64 addressing modes
128
129SH64 operands consist of either a register or immediate value. The
130immediate value can be a constant or label reference (or portion of a
131label reference), as in this example:
132
133@example
134 movi 4,r2
135 pt function, tr4
136 movi (function >> 16) & 65535,r0
137 shori function & 65535, r0
138 ld.l r0,4,r0
139@end example
140
141@cindex datalabel, SH64
142Instruction label references can reference labels in either SHmedia or
143SHcompact. To differentiate between the two, labels in SHmedia sections
144will always have the least significant bit set (i.e. they will be odd),
145which SHcompact labels will have the least significant bit reset
146(i.e. they will be even). If you need to reference the actual address
147of a label, you can use the @code{datalabel} modifier, as in this
148example:
149
150@example
151 .long function
152 .long datalabel function
153@end example
154
155In that example, the first longword may or may not have the least
156significant bit set depending on whether the label is an SHmedia label
157or an SHcompact label. The second longword will be the actual address
062b7c0c 158of the label, regardless of what type of label it is.
324bfcf3
AO
159
160@node SH64 Directives
161@section SH64 Machine Directives
162
163In addition to the SH directives, the SH64 provides the following
164directives:
165
166@cindex SH64 machine directives
167@cindex machine directives, SH64
168
169@table @code
170
171@item .mode [shmedia|shcompact]
172@itemx .isa [shmedia|shcompact]
173Specify the ISA for the following instructions (the two directives are
174equivalent). Note that programs such as @code{objdump} rely on symbolic
175labels to determine when such mode switches occur (by checking the least
176significant bit of the label's address), so such mode/isa changes should
177always be followed by a label (in practice, this is true anyway). Note
178that you cannot use these directives if you didn't specify an ISA on the
179command line.
180
181@item .abi [32|64]
182Specify the ABI for the following instructions. Note that you cannot use
183this directive unless you specified an ABI on the command line, and the
184ABIs specified must match.
185
186@item .uaquad
a8015998 187Like .uaword and .ualong, this allows you to specify an intentionally
324bfcf3
AO
188unaligned quadword (64 bit word).
189
190@end table
191
192@node SH64 Opcodes
193@section Opcodes
194
195@cindex SH64 opcode summary
196@cindex opcode summary, SH64
197@cindex mnemonics, SH64
198@cindex instruction summary, SH64
199For detailed information on the SH64 machine instruction set, see
200@cite{SuperH 64 bit RISC Series Architecture Manual} (SuperH, Inc.).
201
202@code{@value{AS}} implements all the standard SH64 opcodes. In
203addition, the following pseudo-opcodes may be expanded into one or more
204alternate opcodes:
205
206@table @code
207
208@item movi
209If the value doesn't fit into a standard @code{movi} opcode,
210@code{@value{AS}} will replace the @code{movi} with a sequence of
211@code{movi} and @code{shori} opcodes.
212
213@item pt
214This expands to a sequence of @code{movi} and @code{shori} opcode,
215followed by a @code{ptrel} opcode, or to a @code{pta} or @code{ptb}
216opcode, depending on the label referenced.
217
218@end table
This page took 0.360636 seconds and 4 git commands to generate.