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[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / group-reloc-ldc.d
CommitLineData
4962c51a 1#objdump: -dr --prefix-addresses --show-raw-insn
f91609ee 2#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks
4962c51a
MS		 3#name: Group relocation tests (ldc)
4
5.*: +file format .*arm.*
6
7Disassembly of section .text:
80[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\]
9 0: R_ARM_LDC_PC_G0 f
100[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\]
11 4: R_ARM_LDC_PC_G1 f
120[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\]
13 8: R_ARM_LDC_PC_G2 f
140[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\]
15 c: R_ARM_LDC_SB_G0 f
160[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\]
17 10: R_ARM_LDC_SB_G1 f
180[0-9a-f]+ <[^>]+> ed900085 ldc 0, cr0, \[r0, #532\]
19 14: R_ARM_LDC_SB_G2 f
200[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\]
21 18: R_ARM_LDC_PC_G0 f
220[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\]
23 1c: R_ARM_LDC_PC_G1 f
240[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\]
25 20: R_ARM_LDC_PC_G2 f
260[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\]
27 24: R_ARM_LDC_SB_G0 f
280[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\]
29 28: R_ARM_LDC_SB_G1 f
300[0-9a-f]+ <[^>]+> ed800085 stc 0, cr0, \[r0, #532\]
31 2c: R_ARM_LDC_SB_G2 f
320[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\]
33 30: R_ARM_LDC_PC_G0 f
340[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\]
35 34: R_ARM_LDC_PC_G1 f
360[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\]
37 38: R_ARM_LDC_PC_G2 f
380[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\]
39 3c: R_ARM_LDC_SB_G0 f
400[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\]
41 40: R_ARM_LDC_SB_G1 f
420[0-9a-f]+ <[^>]+> ed100085 ldc 0, cr0, \[r0, #-532\]
43 44: R_ARM_LDC_SB_G2 f
440[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\]
45 48: R_ARM_LDC_PC_G0 f
460[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\]
47 4c: R_ARM_LDC_PC_G1 f
480[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\]
49 50: R_ARM_LDC_PC_G2 f
500[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\]
51 54: R_ARM_LDC_SB_G0 f
520[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\]
53 58: R_ARM_LDC_SB_G1 f
540[0-9a-f]+ <[^>]+> ed000085 stc 0, cr0, \[r0, #-532\]
55 5c: R_ARM_LDC_SB_G2 f
560[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\]
57 60: R_ARM_LDC_PC_G0 f
580[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\]
59 64: R_ARM_LDC_PC_G1 f
600[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\]
61 68: R_ARM_LDC_PC_G2 f
620[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\]
63 6c: R_ARM_LDC_SB_G0 f
640[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\]
65 70: R_ARM_LDC_SB_G1 f
660[0-9a-f]+ <[^>]+> edd00085 ldcl 0, cr0, \[r0, #532\]
67 74: R_ARM_LDC_SB_G2 f
680[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\]
69 78: R_ARM_LDC_PC_G0 f
700[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\]
71 7c: R_ARM_LDC_PC_G1 f
720[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\]
73 80: R_ARM_LDC_PC_G2 f
740[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\]
75 84: R_ARM_LDC_SB_G0 f
760[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\]
77 88: R_ARM_LDC_SB_G1 f
780[0-9a-f]+ <[^>]+> edc00085 stcl 0, cr0, \[r0, #532\]
79 8c: R_ARM_LDC_SB_G2 f
800[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\]
81 90: R_ARM_LDC_PC_G0 f
820[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\]
83 94: R_ARM_LDC_PC_G1 f
840[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\]
85 98: R_ARM_LDC_PC_G2 f
860[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\]
87 9c: R_ARM_LDC_SB_G0 f
880[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\]
89 a0: R_ARM_LDC_SB_G1 f
900[0-9a-f]+ <[^>]+> ed500085 ldcl 0, cr0, \[r0, #-532\]
91 a4: R_ARM_LDC_SB_G2 f
920[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\]
93 a8: R_ARM_LDC_PC_G0 f
940[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\]
95 ac: R_ARM_LDC_PC_G1 f
960[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\]
97 b0: R_ARM_LDC_PC_G2 f
980[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\]
99 b4: R_ARM_LDC_SB_G0 f
1000[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\]
101 b8: R_ARM_LDC_SB_G1 f
1020[0-9a-f]+ <[^>]+> ed400085 stcl 0, cr0, \[r0, #-532\]
103 bc: R_ARM_LDC_SB_G2 f
1040[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\]
105 c0: R_ARM_LDC_PC_G0 f
1060[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\]
107 c4: R_ARM_LDC_PC_G1 f
1080[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\]
109 c8: R_ARM_LDC_PC_G2 f
1100[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\]
111 cc: R_ARM_LDC_SB_G0 f
1120[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\]
113 d0: R_ARM_LDC_SB_G1 f
1140[0-9a-f]+ <[^>]+> fd900085 ldc2 0, cr0, \[r0, #532\]
115 d4: R_ARM_LDC_SB_G2 f
1160[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\]
117 d8: R_ARM_LDC_PC_G0 f
1180[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\]
119 dc: R_ARM_LDC_PC_G1 f
1200[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\]
121 e0: R_ARM_LDC_PC_G2 f
1220[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\]
123 e4: R_ARM_LDC_SB_G0 f
1240[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\]
125 e8: R_ARM_LDC_SB_G1 f
1260[0-9a-f]+ <[^>]+> fd800085 stc2 0, cr0, \[r0, #532\]
127 ec: R_ARM_LDC_SB_G2 f
1280[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\]
129 f0: R_ARM_LDC_PC_G0 f
1300[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\]
131 f4: R_ARM_LDC_PC_G1 f
1320[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\]
133 f8: R_ARM_LDC_PC_G2 f
1340[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\]
135 fc: R_ARM_LDC_SB_G0 f
1360[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\]
137 100: R_ARM_LDC_SB_G1 f
1380[0-9a-f]+ <[^>]+> fd100085 ldc2 0, cr0, \[r0, #-532\]
139 104: R_ARM_LDC_SB_G2 f
1400[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\]
141 108: R_ARM_LDC_PC_G0 f
1420[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\]
143 10c: R_ARM_LDC_PC_G1 f
1440[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\]
145 110: R_ARM_LDC_PC_G2 f
1460[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\]
147 114: R_ARM_LDC_SB_G0 f
1480[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\]
149 118: R_ARM_LDC_SB_G1 f
1500[0-9a-f]+ <[^>]+> fd000085 stc2 0, cr0, \[r0, #-532\]
151 11c: R_ARM_LDC_SB_G2 f
1520[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\]
153 120: R_ARM_LDC_PC_G0 f
1540[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\]
155 124: R_ARM_LDC_PC_G1 f
1560[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\]
157 128: R_ARM_LDC_PC_G2 f
1580[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\]
159 12c: R_ARM_LDC_SB_G0 f
1600[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\]
161 130: R_ARM_LDC_SB_G1 f
1620[0-9a-f]+ <[^>]+> fdd00085 ldc2l 0, cr0, \[r0, #532\]
163 134: R_ARM_LDC_SB_G2 f
1640[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\]
165 138: R_ARM_LDC_PC_G0 f
1660[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\]
167 13c: R_ARM_LDC_PC_G1 f
1680[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\]
169 140: R_ARM_LDC_PC_G2 f
1700[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\]
171 144: R_ARM_LDC_SB_G0 f
1720[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\]
173 148: R_ARM_LDC_SB_G1 f
1740[0-9a-f]+ <[^>]+> fdc00085 stc2l 0, cr0, \[r0, #532\]
175 14c: R_ARM_LDC_SB_G2 f
1760[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\]
177 150: R_ARM_LDC_PC_G0 f
1780[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\]
179 154: R_ARM_LDC_PC_G1 f
1800[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\]
181 158: R_ARM_LDC_PC_G2 f
1820[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\]
183 15c: R_ARM_LDC_SB_G0 f
1840[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\]
185 160: R_ARM_LDC_SB_G1 f
1860[0-9a-f]+ <[^>]+> fd500085 ldc2l 0, cr0, \[r0, #-532\]
187 164: R_ARM_LDC_SB_G2 f
1880[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\]
189 168: R_ARM_LDC_PC_G0 f
1900[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\]
191 16c: R_ARM_LDC_PC_G1 f
1920[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\]
193 170: R_ARM_LDC_PC_G2 f
1940[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\]
195 174: R_ARM_LDC_SB_G0 f
1960[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\]
197 178: R_ARM_LDC_SB_G1 f
1980[0-9a-f]+ <[^>]+> fd400085 stc2l 0, cr0, \[r0, #-532\]
199 17c: R_ARM_LDC_SB_G2 f
2000[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\]
201 180: R_ARM_LDC_PC_G0 f
2020[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\]
203 184: R_ARM_LDC_PC_G1 f
2040[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\]
205 188: R_ARM_LDC_PC_G2 f
2060[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\]
207 18c: R_ARM_LDC_SB_G0 f
2080[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\]
209 190: R_ARM_LDC_SB_G1 f
2100[0-9a-f]+ <[^>]+> ed900185 ldfs f0, \[r0, #532\]
211 194: R_ARM_LDC_SB_G2 f
2120[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\]
213 198: R_ARM_LDC_PC_G0 f
2140[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\]
215 19c: R_ARM_LDC_PC_G1 f
2160[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\]
217 1a0: R_ARM_LDC_PC_G2 f
2180[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\]
219 1a4: R_ARM_LDC_SB_G0 f
2200[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\]
221 1a8: R_ARM_LDC_SB_G1 f
2220[0-9a-f]+ <[^>]+> ed800185 stfs f0, \[r0, #532\]
223 1ac: R_ARM_LDC_SB_G2 f
2240[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\]
225 1b0: R_ARM_LDC_PC_G0 f
2260[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\]
227 1b4: R_ARM_LDC_PC_G1 f
2280[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\]
229 1b8: R_ARM_LDC_PC_G2 f
2300[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\]
231 1bc: R_ARM_LDC_SB_G0 f
2320[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\]
233 1c0: R_ARM_LDC_SB_G1 f
2340[0-9a-f]+ <[^>]+> ed100185 ldfs f0, \[r0, #-532\]
235 1c4: R_ARM_LDC_SB_G2 f
2360[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\]
237 1c8: R_ARM_LDC_PC_G0 f
2380[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\]
239 1cc: R_ARM_LDC_PC_G1 f
2400[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\]
241 1d0: R_ARM_LDC_PC_G2 f
2420[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\]
243 1d4: R_ARM_LDC_SB_G0 f
2440[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\]
245 1d8: R_ARM_LDC_SB_G1 f
2460[0-9a-f]+ <[^>]+> ed000185 stfs f0, \[r0, #-532\]
247 1dc: R_ARM_LDC_SB_G2 f
2480[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\]
249 1e0: R_ARM_LDC_PC_G0 f
2500[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\]
251 1e4: R_ARM_LDC_PC_G1 f
2520[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\]
253 1e8: R_ARM_LDC_PC_G2 f
2540[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\]
255 1ec: R_ARM_LDC_SB_G0 f
2560[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\]
257 1f0: R_ARM_LDC_SB_G1 f
2580[0-9a-f]+ <[^>]+> ed908185 ldfd f0, \[r0, #532\]
259 1f4: R_ARM_LDC_SB_G2 f
2600[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\]
261 1f8: R_ARM_LDC_PC_G0 f
2620[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\]
263 1fc: R_ARM_LDC_PC_G1 f
2640[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\]
265 200: R_ARM_LDC_PC_G2 f
2660[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\]
267 204: R_ARM_LDC_SB_G0 f
2680[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\]
269 208: R_ARM_LDC_SB_G1 f
2700[0-9a-f]+ <[^>]+> ed808185 stfd f0, \[r0, #532\]
271 20c: R_ARM_LDC_SB_G2 f
2720[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\]
273 210: R_ARM_LDC_PC_G0 f
2740[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\]
275 214: R_ARM_LDC_PC_G1 f
2760[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\]
277 218: R_ARM_LDC_PC_G2 f
2780[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\]
279 21c: R_ARM_LDC_SB_G0 f
2800[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\]
281 220: R_ARM_LDC_SB_G1 f
2820[0-9a-f]+ <[^>]+> ed108185 ldfd f0, \[r0, #-532\]
283 224: R_ARM_LDC_SB_G2 f
2840[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\]
285 228: R_ARM_LDC_PC_G0 f
2860[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\]
287 22c: R_ARM_LDC_PC_G1 f
2880[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\]
289 230: R_ARM_LDC_PC_G2 f
2900[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\]
291 234: R_ARM_LDC_SB_G0 f
2920[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\]
293 238: R_ARM_LDC_SB_G1 f
2940[0-9a-f]+ <[^>]+> ed008185 stfd f0, \[r0, #-532\]
295 23c: R_ARM_LDC_SB_G2 f
2960[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\]
297 240: R_ARM_LDC_PC_G0 f
2980[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\]
299 244: R_ARM_LDC_PC_G1 f
3000[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\]
301 248: R_ARM_LDC_PC_G2 f
3020[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\]
303 24c: R_ARM_LDC_SB_G0 f
3040[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\]
305 250: R_ARM_LDC_SB_G1 f
3060[0-9a-f]+ <[^>]+> edd00185 ldfe f0, \[r0, #532\]
307 254: R_ARM_LDC_SB_G2 f
3080[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\]
309 258: R_ARM_LDC_PC_G0 f
3100[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\]
311 25c: R_ARM_LDC_PC_G1 f
3120[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\]
313 260: R_ARM_LDC_PC_G2 f
3140[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\]
315 264: R_ARM_LDC_SB_G0 f
3160[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\]
317 268: R_ARM_LDC_SB_G1 f
3180[0-9a-f]+ <[^>]+> edc00185 stfe f0, \[r0, #532\]
319 26c: R_ARM_LDC_SB_G2 f
3200[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\]
321 270: R_ARM_LDC_PC_G0 f
3220[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\]
323 274: R_ARM_LDC_PC_G1 f
3240[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\]
325 278: R_ARM_LDC_PC_G2 f
3260[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\]
327 27c: R_ARM_LDC_SB_G0 f
3280[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\]
329 280: R_ARM_LDC_SB_G1 f
3300[0-9a-f]+ <[^>]+> ed500185 ldfe f0, \[r0, #-532\]
331 284: R_ARM_LDC_SB_G2 f
3320[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\]
333 288: R_ARM_LDC_PC_G0 f
3340[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\]
335 28c: R_ARM_LDC_PC_G1 f
3360[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\]
337 290: R_ARM_LDC_PC_G2 f
3380[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\]
339 294: R_ARM_LDC_SB_G0 f
3400[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\]
341 298: R_ARM_LDC_SB_G1 f
3420[0-9a-f]+ <[^>]+> ed400185 stfe f0, \[r0, #-532\]
343 29c: R_ARM_LDC_SB_G2 f
3440[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\]
345 2a0: R_ARM_LDC_PC_G0 f
3460[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\]
347 2a4: R_ARM_LDC_PC_G1 f
3480[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\]
349 2a8: R_ARM_LDC_PC_G2 f
3500[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\]
351 2ac: R_ARM_LDC_SB_G0 f
3520[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\]
353 2b0: R_ARM_LDC_SB_G1 f
3540[0-9a-f]+ <[^>]+> edd08185 ldfp f0, \[r0, #532\]
355 2b4: R_ARM_LDC_SB_G2 f
3560[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\]
357 2b8: R_ARM_LDC_PC_G0 f
3580[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\]
359 2bc: R_ARM_LDC_PC_G1 f
3600[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\]
361 2c0: R_ARM_LDC_PC_G2 f
3620[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\]
363 2c4: R_ARM_LDC_SB_G0 f
3640[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\]
365 2c8: R_ARM_LDC_SB_G1 f
3660[0-9a-f]+ <[^>]+> edc08185 stfp f0, \[r0, #532\]
367 2cc: R_ARM_LDC_SB_G2 f
3680[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\]
369 2d0: R_ARM_LDC_PC_G0 f
3700[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\]
371 2d4: R_ARM_LDC_PC_G1 f
3720[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\]
373 2d8: R_ARM_LDC_PC_G2 f
3740[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\]
375 2dc: R_ARM_LDC_SB_G0 f
3760[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\]
377 2e0: R_ARM_LDC_SB_G1 f
3780[0-9a-f]+ <[^>]+> ed508185 ldfp f0, \[r0, #-532\]
379 2e4: R_ARM_LDC_SB_G2 f
3800[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\]
381 2e8: R_ARM_LDC_PC_G0 f
3820[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\]
383 2ec: R_ARM_LDC_PC_G1 f
3840[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\]
385 2f0: R_ARM_LDC_PC_G2 f
3860[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\]
387 2f4: R_ARM_LDC_SB_G0 f
3880[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\]
389 2f8: R_ARM_LDC_SB_G1 f
3900[0-9a-f]+ <[^>]+> ed408185 stfp f0, \[r0, #-532\]
391 2fc: R_ARM_LDC_SB_G2 f
7df76b80 3920[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\]
4962c51a 393 300: R_ARM_LDC_PC_G0 f
7df76b80 3940[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\]
4962c51a 395 304: R_ARM_LDC_PC_G1 f
7df76b80 3960[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\]
4962c51a 397 308: R_ARM_LDC_PC_G2 f
7df76b80 3980[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\]
4962c51a 399 30c: R_ARM_LDC_SB_G0 f
7df76b80 4000[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\]
4962c51a 401 310: R_ARM_LDC_SB_G1 f
7df76b80 4020[0-9a-f]+ <[^>]+> ed900a85 (vldr|flds) s0, \[r0, #532\]
4962c51a 403 314: R_ARM_LDC_SB_G2 f
7df76b80 4040[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\]
4962c51a 405 318: R_ARM_LDC_PC_G0 f
7df76b80 4060[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\]
4962c51a 407 31c: R_ARM_LDC_PC_G1 f
7df76b80 4080[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\]
4962c51a 409 320: R_ARM_LDC_PC_G2 f
7df76b80 4100[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\]
4962c51a 411 324: R_ARM_LDC_SB_G0 f
7df76b80 4120[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\]
4962c51a 413 328: R_ARM_LDC_SB_G1 f
7df76b80 4140[0-9a-f]+ <[^>]+> ed800a85 (vstr|fsts) s0, \[r0, #532\]
4962c51a 415 32c: R_ARM_LDC_SB_G2 f
7df76b80 4160[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\]
4962c51a 417 330: R_ARM_LDC_PC_G0 f
7df76b80 4180[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\]
4962c51a 419 334: R_ARM_LDC_PC_G1 f
7df76b80 4200[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\]
4962c51a 421 338: R_ARM_LDC_PC_G2 f
7df76b80 4220[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\]
4962c51a 423 33c: R_ARM_LDC_SB_G0 f
7df76b80 4240[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\]
4962c51a 425 340: R_ARM_LDC_SB_G1 f
7df76b80 4260[0-9a-f]+ <[^>]+> ed100a85 (vldr|flds) s0, \[r0, #-532\]
4962c51a 427 344: R_ARM_LDC_SB_G2 f
7df76b80 4280[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\]
4962c51a 429 348: R_ARM_LDC_PC_G0 f
7df76b80 4300[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\]
4962c51a 431 34c: R_ARM_LDC_PC_G1 f
7df76b80 4320[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\]
4962c51a 433 350: R_ARM_LDC_PC_G2 f
7df76b80 4340[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\]
4962c51a 435 354: R_ARM_LDC_SB_G0 f
7df76b80 4360[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\]
4962c51a 437 358: R_ARM_LDC_SB_G1 f
7df76b80 4380[0-9a-f]+ <[^>]+> ed000a85 (vstr|fsts) s0, \[r0, #-532\]
4962c51a
MS		 439 35c: R_ARM_LDC_SB_G2 f
4400[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
441 360: R_ARM_LDC_PC_G0 f
4420[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
443 364: R_ARM_LDC_PC_G1 f
4440[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
445 368: R_ARM_LDC_PC_G2 f
4460[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
447 36c: R_ARM_LDC_SB_G0 f
4480[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
449 370: R_ARM_LDC_SB_G1 f
4500[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
451 374: R_ARM_LDC_SB_G2 f
4520[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
453 378: R_ARM_LDC_PC_G0 f
4540[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
455 37c: R_ARM_LDC_PC_G1 f
4560[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
457 380: R_ARM_LDC_PC_G2 f
4580[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
459 384: R_ARM_LDC_SB_G0 f
4600[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
461 388: R_ARM_LDC_SB_G1 f
4620[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
463 38c: R_ARM_LDC_SB_G2 f
4640[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
465 390: R_ARM_LDC_PC_G0 f
4660[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
467 394: R_ARM_LDC_PC_G1 f
4680[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
469 398: R_ARM_LDC_PC_G2 f
4700[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
471 39c: R_ARM_LDC_SB_G0 f
4720[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
473 3a0: R_ARM_LDC_SB_G1 f
4740[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
475 3a4: R_ARM_LDC_SB_G2 f
4760[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
477 3a8: R_ARM_LDC_PC_G0 f
4780[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
479 3ac: R_ARM_LDC_PC_G1 f
4800[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
481 3b0: R_ARM_LDC_PC_G2 f
4820[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
483 3b4: R_ARM_LDC_SB_G0 f
4840[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
485 3b8: R_ARM_LDC_SB_G1 f
4860[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
487 3bc: R_ARM_LDC_SB_G2 f
4880[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
489 3c0: R_ARM_LDC_PC_G0 f
4900[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
491 3c4: R_ARM_LDC_PC_G1 f
4920[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
493 3c8: R_ARM_LDC_PC_G2 f
4940[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
495 3cc: R_ARM_LDC_SB_G0 f
4960[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
497 3d0: R_ARM_LDC_SB_G1 f
4980[0-9a-f]+ <[^>]+> ed900b85 vldr d0, \[r0, #532\]
499 3d4: R_ARM_LDC_SB_G2 f
5000[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
501 3d8: R_ARM_LDC_PC_G0 f
5020[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
503 3dc: R_ARM_LDC_PC_G1 f
5040[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
505 3e0: R_ARM_LDC_PC_G2 f
5060[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
507 3e4: R_ARM_LDC_SB_G0 f
5080[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
509 3e8: R_ARM_LDC_SB_G1 f
5100[0-9a-f]+ <[^>]+> ed800b85 vstr d0, \[r0, #532\]
511 3ec: R_ARM_LDC_SB_G2 f
5120[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
513 3f0: R_ARM_LDC_PC_G0 f
5140[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
515 3f4: R_ARM_LDC_PC_G1 f
5160[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
517 3f8: R_ARM_LDC_PC_G2 f
5180[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
519 3fc: R_ARM_LDC_SB_G0 f
5200[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
521 400: R_ARM_LDC_SB_G1 f
5220[0-9a-f]+ <[^>]+> ed100b85 vldr d0, \[r0, #-532\]
523 404: R_ARM_LDC_SB_G2 f
5240[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
525 408: R_ARM_LDC_PC_G0 f
5260[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
527 40c: R_ARM_LDC_PC_G1 f
5280[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
529 410: R_ARM_LDC_PC_G2 f
5300[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
531 414: R_ARM_LDC_SB_G0 f
5320[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
533 418: R_ARM_LDC_SB_G1 f
5340[0-9a-f]+ <[^>]+> ed000b85 vstr d0, \[r0, #-532\]
535 41c: R_ARM_LDC_SB_G2 f
5360[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\]
537 420: R_ARM_LDC_PC_G0 f
5380[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\]
539 424: R_ARM_LDC_PC_G1 f
5400[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\]
541 428: R_ARM_LDC_PC_G2 f
5420[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\]
543 42c: R_ARM_LDC_SB_G0 f
5440[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\]
545 430: R_ARM_LDC_SB_G1 f
5460[0-9a-f]+ <[^>]+> ed900485 cfldrs mvf0, \[r0, #532\]
547 434: R_ARM_LDC_SB_G2 f
5480[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\]
549 438: R_ARM_LDC_PC_G0 f
5500[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\]
551 43c: R_ARM_LDC_PC_G1 f
5520[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\]
553 440: R_ARM_LDC_PC_G2 f
5540[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\]
555 444: R_ARM_LDC_SB_G0 f
5560[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\]
557 448: R_ARM_LDC_SB_G1 f
5580[0-9a-f]+ <[^>]+> ed800485 cfstrs mvf0, \[r0, #532\]
559 44c: R_ARM_LDC_SB_G2 f
5600[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\]
561 450: R_ARM_LDC_PC_G0 f
5620[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\]
563 454: R_ARM_LDC_PC_G1 f
5640[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\]
565 458: R_ARM_LDC_PC_G2 f
5660[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\]
567 45c: R_ARM_LDC_SB_G0 f
5680[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\]
569 460: R_ARM_LDC_SB_G1 f
5700[0-9a-f]+ <[^>]+> ed100485 cfldrs mvf0, \[r0, #-532\]
571 464: R_ARM_LDC_SB_G2 f
5720[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\]
573 468: R_ARM_LDC_PC_G0 f
5740[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\]
575 46c: R_ARM_LDC_PC_G1 f
5760[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\]
577 470: R_ARM_LDC_PC_G2 f
5780[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\]
579 474: R_ARM_LDC_SB_G0 f
5800[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\]
581 478: R_ARM_LDC_SB_G1 f
5820[0-9a-f]+ <[^>]+> ed000485 cfstrs mvf0, \[r0, #-532\]
583 47c: R_ARM_LDC_SB_G2 f
5840[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\]
585 480: R_ARM_LDC_PC_G0 f
5860[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\]
587 484: R_ARM_LDC_PC_G1 f
5880[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\]
589 488: R_ARM_LDC_PC_G2 f
5900[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\]
591 48c: R_ARM_LDC_SB_G0 f
5920[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\]
593 490: R_ARM_LDC_SB_G1 f
5940[0-9a-f]+ <[^>]+> edd00485 cfldrd mvd0, \[r0, #532\]
595 494: R_ARM_LDC_SB_G2 f
5960[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\]
597 498: R_ARM_LDC_PC_G0 f
5980[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\]
599 49c: R_ARM_LDC_PC_G1 f
6000[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\]
601 4a0: R_ARM_LDC_PC_G2 f
6020[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\]
603 4a4: R_ARM_LDC_SB_G0 f
6040[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\]
605 4a8: R_ARM_LDC_SB_G1 f
6060[0-9a-f]+ <[^>]+> edc00485 cfstrd mvd0, \[r0, #532\]
607 4ac: R_ARM_LDC_SB_G2 f
6080[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\]
609 4b0: R_ARM_LDC_PC_G0 f
6100[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\]
611 4b4: R_ARM_LDC_PC_G1 f
6120[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\]
613 4b8: R_ARM_LDC_PC_G2 f
6140[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\]
615 4bc: R_ARM_LDC_SB_G0 f
6160[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\]
617 4c0: R_ARM_LDC_SB_G1 f
6180[0-9a-f]+ <[^>]+> ed500485 cfldrd mvd0, \[r0, #-532\]
619 4c4: R_ARM_LDC_SB_G2 f
6200[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\]
621 4c8: R_ARM_LDC_PC_G0 f
6220[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\]
623 4cc: R_ARM_LDC_PC_G1 f
6240[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\]
625 4d0: R_ARM_LDC_PC_G2 f
6260[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\]
627 4d4: R_ARM_LDC_SB_G0 f
6280[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\]
629 4d8: R_ARM_LDC_SB_G1 f
6300[0-9a-f]+ <[^>]+> ed400485 cfstrd mvd0, \[r0, #-532\]
631 4dc: R_ARM_LDC_SB_G2 f
6320[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\]
633 4e0: R_ARM_LDC_PC_G0 f
6340[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\]
635 4e4: R_ARM_LDC_PC_G1 f
6360[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\]
637 4e8: R_ARM_LDC_PC_G2 f
6380[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\]
639 4ec: R_ARM_LDC_SB_G0 f
6400[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\]
641 4f0: R_ARM_LDC_SB_G1 f
6420[0-9a-f]+ <[^>]+> ed900585 cfldr32 mvfx0, \[r0, #532\]
643 4f4: R_ARM_LDC_SB_G2 f
6440[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\]
645 4f8: R_ARM_LDC_PC_G0 f
6460[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\]
647 4fc: R_ARM_LDC_PC_G1 f
6480[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\]
649 500: R_ARM_LDC_PC_G2 f
6500[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\]
651 504: R_ARM_LDC_SB_G0 f
6520[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\]
653 508: R_ARM_LDC_SB_G1 f
6540[0-9a-f]+ <[^>]+> ed800585 cfstr32 mvfx0, \[r0, #532\]
655 50c: R_ARM_LDC_SB_G2 f
6560[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\]
657 510: R_ARM_LDC_PC_G0 f
6580[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\]
659 514: R_ARM_LDC_PC_G1 f
6600[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\]
661 518: R_ARM_LDC_PC_G2 f
6620[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\]
663 51c: R_ARM_LDC_SB_G0 f
6640[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\]
665 520: R_ARM_LDC_SB_G1 f
6660[0-9a-f]+ <[^>]+> ed100585 cfldr32 mvfx0, \[r0, #-532\]
667 524: R_ARM_LDC_SB_G2 f
6680[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\]
669 528: R_ARM_LDC_PC_G0 f
6700[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\]
671 52c: R_ARM_LDC_PC_G1 f
6720[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\]
673 530: R_ARM_LDC_PC_G2 f
6740[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\]
675 534: R_ARM_LDC_SB_G0 f
6760[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\]
677 538: R_ARM_LDC_SB_G1 f
6780[0-9a-f]+ <[^>]+> ed000585 cfstr32 mvfx0, \[r0, #-532\]
679 53c: R_ARM_LDC_SB_G2 f
6800[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\]
681 540: R_ARM_LDC_PC_G0 f
6820[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\]
683 544: R_ARM_LDC_PC_G1 f
6840[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\]
685 548: R_ARM_LDC_PC_G2 f
6860[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\]
687 54c: R_ARM_LDC_SB_G0 f
6880[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\]
689 550: R_ARM_LDC_SB_G1 f
6900[0-9a-f]+ <[^>]+> edd00585 cfldr64 mvdx0, \[r0, #532\]
691 554: R_ARM_LDC_SB_G2 f
6920[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\]
693 558: R_ARM_LDC_PC_G0 f
6940[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\]
695 55c: R_ARM_LDC_PC_G1 f
6960[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\]
697 560: R_ARM_LDC_PC_G2 f
6980[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\]
699 564: R_ARM_LDC_SB_G0 f
7000[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\]
701 568: R_ARM_LDC_SB_G1 f
7020[0-9a-f]+ <[^>]+> edc00585 cfstr64 mvdx0, \[r0, #532\]
703 56c: R_ARM_LDC_SB_G2 f
7040[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\]
705 570: R_ARM_LDC_PC_G0 f
7060[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\]
707 574: R_ARM_LDC_PC_G1 f
7080[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\]
709 578: R_ARM_LDC_PC_G2 f
7100[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\]
711 57c: R_ARM_LDC_SB_G0 f
7120[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\]
713 580: R_ARM_LDC_SB_G1 f
7140[0-9a-f]+ <[^>]+> ed500585 cfldr64 mvdx0, \[r0, #-532\]
715 584: R_ARM_LDC_SB_G2 f
7160[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\]
717 588: R_ARM_LDC_PC_G0 f
7180[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\]
719 58c: R_ARM_LDC_PC_G1 f
7200[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\]
721 590: R_ARM_LDC_PC_G2 f
7220[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\]
723 594: R_ARM_LDC_SB_G0 f
7240[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\]
725 598: R_ARM_LDC_SB_G1 f
7260[0-9a-f]+ <[^>]+> ed400585 cfstr64 mvdx0, \[r0, #-532\]
727 59c: R_ARM_LDC_SB_G2 f
GDB Binutils - Deliverables
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