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strip off +x bits on non-executable/script files
[deliverable/binutils-gdb.git] / gas / testsuite / gas / bfin / shift2.s
CommitLineData
a9298102
JZ		 1
2.EXTERN MY_LABEL2;
3.section .text;
4
5//
6//9 SHIFT/ROTATE OPERATIONS
7//
8
9//Preg = ( Preg + Preg ) << 1 ; /* dest_reg = (dest_reg + src_reg) x 2 (a) */
10P0 = (P0+P0)<<1;
11P0 = (P0+P1)<<1;
12P2 = (P2+P0)<<1;
13P1 = (P1+P2)<<1;
14
15//P0 = (P2+P0)<<1;
16
17//Preg = ( Preg + Preg ) << 2 ; /* dest_reg = (dest_reg + src_reg) x 4 (a) */
18P0 = (P0+P0)<<2;
19P0 = (P0+P1)<<2;
20P2 = (P2+P0)<<2;
21P1 = (P1+P2)<<2;
22
23//P0 = (P2+P0)<<2;
24
25//Dreg = (Dreg + Dreg) << 1 ; /* dest_reg = (dest_reg + src_reg) x 2 (a) */
26R0 = (R0+R0)<<1;
27R0 = (R0+R1)<<1;
28R2 = (R2+R0)<<1;
29R1 = (R1+R2)<<1;
30
31//R0 = (R2+R0)<<1;
32
33
34//Dreg = (Dreg + Dreg) << 2 ; /* dest_reg = (dest_reg + src_reg) x 4 (a) */
35R0 = (R0+R0)<<2;
36R0 = (R0+R1)<<2;
37R2 = (R2+R0)<<2;
38R1 = (R1+R2)<<2;
39
40//R0 = (R2+R0)<<2;
41
42//Preg = Preg + ( Preg << 1 ) ; /* adder_pntr + (src_pntr x 2) (a) */
43P0 = P0 + (P0 << 1);
44P0 = P0 + (P1 << 1);
45P0 = P0 + (P2 << 1);
46P0 = P1 + (P2 << 1);
47P0 = P2 + (P3 << 1);
48P1 = P0 + (P0 << 1);
49P1 = P0 + (P1 << 1);
50P1 = P0 + (P2 << 1);
51P1 = P1 + (P2 << 1);
52P1 = P2 + (P3 << 1);
53
54//Preg = Preg + ( Preg << 2 ) ; /* adder_pntr + (src_pntr x 4) (a) */
55P0 = P0 + (P0 << 2);
56P0 = P0 + (P1 << 2);
57P0 = P0 + (P2 << 2);
58P0 = P1 + (P2 << 2);
59P0 = P2 + (P3 << 2);
60P1 = P0 + (P0 << 2);
61P1 = P0 + (P1 << 2);
62P1 = P0 + (P2 << 2);
63P1 = P1 + (P2 << 2);
64P1 = P2 + (P3 << 2);
65
66//Dreg >>>= uimm5 ; /* arithmetic right shift (a) */
67R0 >>>= 0;
68R0 >>>= 31;
69R0 >>>= 5;
70R5 >>>= 0;
71R5 >>>= 31;
72R5 >>>= 5;
73
74//Dreg <<= uimm5 ; /* logical left shift (a) */
75R0 <<= 0;
76R0 <<= 31;
77R0 <<= 5;
78R5 <<= 0;
79R5 <<= 31;
80R5 <<= 5;
81//Dreg_lo_hi = Dreg_lo_hi >>> uimm4 ; /* arithmetic right shift (b) */
82R0.L = R0.L >>> 0;
83R0.L = R0.L >>> 15;
84R0.L = R0.H >>> 0;
85R0.L = R0.H >>> 15;
86R0.H = R0.L >>> 0;
87R0.H = R0.L >>> 15;
88R0.H = R0.H >>> 0;
89R0.H = R0.H >>> 15;
90
91R0.L = R1.L >>> 0;
92R0.L = R1.L >>> 15;
93R0.L = R1.H >>> 0;
94R0.L = R1.H >>> 15;
95R0.H = R1.L >>> 0;
96R0.H = R1.L >>> 15;
97R0.H = R1.H >>> 0;
98R0.H = R1.H >>> 15;
99
100R0.L = R7.L >>> 0;
101R1.L = R6.L >>> 15;
102R2.L = R5.H >>> 0;
103R3.L = R4.H >>> 15;
104R4.H = R3.L >>> 0;
105R5.H = R2.L >>> 15;
106R6.H = R1.H >>> 0;
107R7.H = R0.H >>> 15;
108
109//Dreg_lo_hi = Dreg_lo_hi << uimm4 (S) ; /* arithmetic left shift (b) */
110R0.L = R0.L << 0(S);
111R0.L = R0.L << 15(S);
112R0.L = R0.H << 0(S);
113R0.L = R0.H << 15(S);
114R0.H = R0.L << 0(S);
115R0.H = R0.L << 15(S);
116R0.H = R0.H << 0(S);
117R0.H = R0.H << 15(S);
118
119R0.L = R1.L << 0(S);
120R0.L = R1.L << 15(S);
121R0.L = R1.H << 0(S);
122R0.L = R1.H << 15(S);
123R0.H = R1.L << 0(S);
124R0.H = R1.L << 15(S);
125R0.H = R1.H << 0(S);
126R0.H = R1.H << 15(S);
127
128R0.L = R7.L << 0(S);
129R1.L = R6.L << 15(S);
130R2.L = R5.H << 0(S);
131R3.L = R4.H << 15(S);
132R4.H = R3.L << 0(S);
133R5.H = R2.L << 15(S);
134R6.H = R1.H << 0(S);
135R7.H = R0.H << 15(S);
136//Dreg = Dreg >>> uimm5 ; /* arithmetic right shift (b) */
137R0 = R0 >>> 0;
138R0 = R0 >>> 31;
139R0 = R1 >>> 0;
140R0 = R1 >>> 31;
141R7 = R0 >>> 0;
142R6 = R1 >>> 31;
143R5 = R2 >>> 0;
144R4 = R3 >>> 31;
145R3 = R4 >>> 0;
146R2 = R5 >>> 31;
147R1 = R6 >>> 0;
148R0 = R7 >>> 31;
149
150//Dreg = Dreg << uimm5 (S) ; /* arithmetic left shift (b) */
151R0 = R0 << 0(S);
152R0 = R0 << 31(S);
153R0 = R1 << 0(S);
154R0 = R1 << 31(S);
155R7 = R0 << 0(S);
156R6 = R1 << 31(S);
157R5 = R2 << 0(S);
158R4 = R3 << 31(S);
159R3 = R4 << 0(S);
160R2 = R5 << 31(S);
161R1 = R6 << 0(S);
162R0 = R7 << 31(S);
163//A0 = A0 >>> uimm5 ; /* arithmetic right shift (b) */
164A0 = A0 >>> 0;
165A0 = A0 >>> 15;
166A0 = A0 >>> 31;
167
168//A0 = A0 << uimm5 ; /* logical left shift (b) */
169A0 = A0 << 0;
170A0 = A0 << 15;
171A0 = A0 << 31;
172
173//A1 = A1 >>> uimm5 ; /* arithmetic right shift (b) */
174A1 = A1 >>> 0;
175A1 = A1 >>> 15;
176A1 = A1 >>> 31;
177
178//A1 = A1 << uimm5 ; /* logical left shift (b) */
179A1 = A1 << 0;
180A1 = A1 << 15;
181A1 = A1 << 31;
182
183//Dreg >>>= Dreg ; /* arithmetic right shift (a) */
184R0 >>>= R0;
185R0 >>>= R1;
186R1 >>>= R0;
187R1 >>>= R7;
188
189//Dreg <<= Dreg ; /* logical left shift (a) */
190R0 <<= R0;
191R0 <<= R1;
192R1 <<= R0;
193R1 <<= R7;
194
195//Dreg_lo_hi = ASHIFT Dreg_lo_hi BY Dreg_lo (opt_sat) ; /* arithmetic right shift (b) */
196r3.l = ashift r0.h by r7.l ; /* shift, half-word */
197r3.h = ashift r0.l by r7.l ;
198r3.h = ashift r0.h by r7.l ;
199r3.l = ashift r0.l by r7.l ;
200r3.l = ashift r0.h by r7.l(s) ; /* shift, half-word, saturated */
201r3.h = ashift r0.l by r7.l(s) ; /* shift, half-word, saturated */
202r3.h = ashift r0.h by r7.l(s) ;
203r3.l = ashift r0.l by r7.l (s) ;
204
205//Dreg = ASHIFT Dreg BY Dreg_lo (opt_sat) ; /* arithmetic right shift (b) */
206r4 = ashift r2 by r7.l ; /* shift, word */
207r4 = ashift r2 by r7.l (s) ; /* shift, word, saturated */
208
209//A0 = ASHIFT A0 BY Dreg_lo ; /* arithmetic right shift (b)*/
210A0 = ashift A0 by r7.l ; /* shift, Accumulator */
211
212//A1 = ASHIFT A1 BY Dreg_lo ; /* arithmetic right shift (b)*/
213A1 = ashift A1 by r7.l ; /* shift, Accumulator */
214
215p3 = p2 >> 1 ; /* pointer right shift by 1 */
216p3 = p3 >> 2 ; /* pointer right shift by 2 */
217p4 = p5 << 1 ; /* pointer left shift by 1 */
218p0 = p1 << 2 ; /* pointer left shift by 2 */
219r3 >>= 17 ; /* data right shift */
220r3 <<= 17 ; /* data left shift */
221r3.l = r0.l >> 4 ; /* data right shift, half-word register */
222r3.l = r0.h >> 4 ; /* same as above; half-word register combinations are arbitrary */
223r3.h = r0.l << 12 ; /* data left shift, half-word register */
224r3.h = r0.h << 14 ; /* same as above; half-word register combinations are arbitrary */
225
226r3 = r6 >> 4 ; /* right shift, 32-bit word */
227r3 = r6 << 4 ; /* left shift, 32-bit word */
228
229a0 = a0 >> 7 ; /* Accumulator right shift */
230a1 = a1 >> 25 ; /* Accumulator right shift */
231a0 = a0 << 7 ; /* Accumulator left shift */
232a1 = a1 << 14 ; /* Accumulator left shift */
233
234r3 >>= r0 ; /* data right shift */
235r3 <<= r1 ; /* data left shift */
236
237r3.l = lshift r0.l by r2.l ; /* shift direction controlled by sign of R2.L */
238r3.h = lshift r0.l by r2.l ;
239
240a0 = lshift a0 by r7.l ;
241a1 = lshift a1 by r7.l ;
242
243r4 = rot r1 by 31 ; /* rotate left */
244r4 = rot r1 by -32 ; /* rotate right */
245r4 = rot r1 by 5 ; /* rotate right */
246
247a0 = rot a0 by 22 ; /* rotate Accumulator left */
248a0 = rot a0 by -32 ; /* rotate Accumulator left */
249a0 = rot a0 by 31 ; /* rotate Accumulator left */
250
251a1 = rot a1 by -32 ; /* rotate Accumulator right */
252a1 = rot a1 by 31 ; /* rotate Accumulator right */
253a1 = rot a1 by 22 ; /* rotate Accumulator right */
254
255r4 = rot r1 by r2.l ;
256a0 = rot a0 by r3.l ;
257a1 = rot a1 by r7.l ;
258
259r0.l = r1.l << 0;
260r0.l = r1.l << 1;
261r0.l = r1.l << 2;
262r0.l = r1.l << 4;
263r0.l = r1.l >> 0;
264r0.l = r1.l >> 1;
265r0.l = r1.l >> 2;
266r0.l = r1.l >> 4;
267r0.l = r1.l >>> 1;
268r0.l = r1.l >>> 2;
269r0.l = r1.l >>> 4;
270
271r0.l = r1.h << 0;
272r0.l = r1.h << 1;
273r0.l = r1.h << 2;
274r0.l = r1.h << 4;
275r0.l = r1.h >> 0;
276r0.l = r1.h >> 1;
277r0.l = r1.h >> 2;
278r0.l = r1.h >> 4;
279r0.l = r1.h >>> 1;
280r0.l = r1.h >>> 2;
281r0.l = r1.h >>> 4;
282
283r0.l = r1.h << 0 (S);
284r0.l = r1.h << 1 (S);
285r0.l = r1.h << 2 (S);
286r0.l = r1.h << 4 (S);
287r0.l = r1.h >>> 1 (S);
288r0.l = r1.h >>> 2 (S);
289r0.l = r1.h >>> 4 (S);
290
GDB Binutils - Deliverables
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