Don't handle lret/iret when -mlfence-before-ret=[or|not|shl|yes] since they are inval...
[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / x86-64-lfence-ret-a.d
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a09f656b 1#source: x86-64-lfence-ret.s
97b4a8f7 2#as: -mlfence-before-ret=or
a09f656b 3#objdump: -dw -Mintel64
97b4a8f7
L
4#name: x86-64 -mlfence-before-ret=or
5
6.*: +file format .*
7
8
9Disassembly of section .text:
10
110+ <_start>:
a09f656b 12 +[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
13 +[a-f0-9]+: 0f ae e8 lfence
14 +[a-f0-9]+: 66 c3 data16 retq
15 +[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
16 +[a-f0-9]+: 0f ae e8 lfence
17 +[a-f0-9]+: 66 c2 14 00 data16 retq \$0x14
97b4a8f7
L
18 +[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
19 +[a-f0-9]+: 0f ae e8 lfence
20 +[a-f0-9]+: c3 retq
21 +[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
22 +[a-f0-9]+: 0f ae e8 lfence
23 +[a-f0-9]+: c2 1e 00 retq \$0x1e
a09f656b 24 +[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
25 +[a-f0-9]+: 0f ae e8 lfence
26 +[a-f0-9]+: 66 48 c3 data16 rex.W retq
27 +[a-f0-9]+: 48 83 0c 24 00 orq \$0x0,\(%rsp\)
28 +[a-f0-9]+: 0f ae e8 lfence
29 +[a-f0-9]+: 66 48 c2 28 00 data16 rex.W retq \$0x28
97b4a8f7 30#pass
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