Fix native follow-exec-mode "new"
[deliverable/binutils-gdb.git] / gdb / aarch64-linux-nat.c
CommitLineData
9d19df75
MS
1/* Native-dependent code for GNU/Linux AArch64.
2
32d0add0 3 Copyright (C) 2011-2015 Free Software Foundation, Inc.
9d19df75
MS
4 Contributed by ARM Ltd.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21#include "defs.h"
22
23#include "inferior.h"
24#include "gdbcore.h"
25#include "regcache.h"
26#include "linux-nat.h"
27#include "target-descriptions.h"
28#include "auxv.h"
29#include "gdbcmd.h"
30#include "aarch64-tdep.h"
31#include "aarch64-linux-tdep.h"
607685ec 32#include "aarch32-linux-nat.h"
db3cb7cb 33#include "nat/aarch64-linux.h"
554717a3 34#include "nat/aarch64-linux-hw-point.h"
607685ec
YQ
35
36#include "elf/external.h"
9d19df75
MS
37#include "elf/common.h"
38
5826e159 39#include "nat/gdb_ptrace.h"
9d19df75 40#include <sys/utsname.h>
036cd381 41#include <asm/ptrace.h>
9d19df75
MS
42
43#include "gregset.h"
44
9d19df75
MS
45/* Defines ps_err_e, struct ps_prochandle. */
46#include "gdb_proc_service.h"
47
48#ifndef TRAP_HWBKPT
49#define TRAP_HWBKPT 0x0004
50#endif
51
d6c44983
YZ
52/* Per-process data. We don't bind this to a per-inferior registry
53 because of targets like x86 GNU/Linux that need to keep track of
54 processes that aren't bound to any inferior (e.g., fork children,
55 checkpoints). */
9d19df75 56
d6c44983 57struct aarch64_process_info
9d19df75 58{
d6c44983
YZ
59 /* Linked list. */
60 struct aarch64_process_info *next;
9d19df75 61
d6c44983
YZ
62 /* The process identifier. */
63 pid_t pid;
9d19df75 64
d6c44983
YZ
65 /* Copy of aarch64 hardware debug registers. */
66 struct aarch64_debug_reg_state state;
67};
68
69static struct aarch64_process_info *aarch64_process_list = NULL;
70
71/* Find process data for process PID. */
72
73static struct aarch64_process_info *
74aarch64_find_process_pid (pid_t pid)
75{
76 struct aarch64_process_info *proc;
77
78 for (proc = aarch64_process_list; proc; proc = proc->next)
79 if (proc->pid == pid)
80 return proc;
81
82 return NULL;
9d19df75
MS
83}
84
d6c44983
YZ
85/* Add process data for process PID. Returns newly allocated info
86 object. */
9d19df75 87
d6c44983
YZ
88static struct aarch64_process_info *
89aarch64_add_process (pid_t pid)
9d19df75 90{
d6c44983 91 struct aarch64_process_info *proc;
9d19df75 92
d6c44983
YZ
93 proc = xcalloc (1, sizeof (*proc));
94 proc->pid = pid;
9d19df75 95
d6c44983
YZ
96 proc->next = aarch64_process_list;
97 aarch64_process_list = proc;
98
99 return proc;
100}
101
102/* Get data specific info for process PID, creating it if necessary.
103 Never returns NULL. */
104
105static struct aarch64_process_info *
106aarch64_process_info_get (pid_t pid)
9d19df75 107{
d6c44983
YZ
108 struct aarch64_process_info *proc;
109
110 proc = aarch64_find_process_pid (pid);
111 if (proc == NULL)
112 proc = aarch64_add_process (pid);
9d19df75 113
d6c44983 114 return proc;
9d19df75
MS
115}
116
d6c44983
YZ
117/* Called whenever GDB is no longer debugging process PID. It deletes
118 data structures that keep track of debug register state. */
9d19df75 119
d6c44983
YZ
120static void
121aarch64_forget_process (pid_t pid)
9d19df75 122{
d6c44983 123 struct aarch64_process_info *proc, **proc_link;
9d19df75 124
d6c44983
YZ
125 proc = aarch64_process_list;
126 proc_link = &aarch64_process_list;
127
128 while (proc != NULL)
9d19df75 129 {
d6c44983
YZ
130 if (proc->pid == pid)
131 {
132 *proc_link = proc->next;
9d19df75 133
d6c44983
YZ
134 xfree (proc);
135 return;
136 }
137
138 proc_link = &proc->next;
139 proc = *proc_link;
140 }
9d19df75
MS
141}
142
d6c44983 143/* Get debug registers state for process PID. */
9d19df75 144
db3cb7cb 145struct aarch64_debug_reg_state *
d6c44983 146aarch64_get_debug_reg_state (pid_t pid)
9d19df75 147{
d6c44983 148 return &aarch64_process_info_get (pid)->state;
9d19df75
MS
149}
150
9d19df75
MS
151/* Fill GDB's register array with the general-purpose register values
152 from the current thread. */
153
154static void
155fetch_gregs_from_thread (struct regcache *regcache)
156{
607685ec
YQ
157 int ret, tid;
158 struct gdbarch *gdbarch = get_regcache_arch (regcache);
9d19df75
MS
159 elf_gregset_t regs;
160 struct iovec iovec;
161
607685ec
YQ
162 /* Make sure REGS can hold all registers contents on both aarch64
163 and arm. */
164 gdb_static_assert (sizeof (regs) >= 18 * 4);
165
d89fa914 166 tid = ptid_get_lwp (inferior_ptid);
9d19df75
MS
167
168 iovec.iov_base = &regs;
607685ec
YQ
169 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
170 iovec.iov_len = 18 * 4;
171 else
172 iovec.iov_len = sizeof (regs);
9d19df75
MS
173
174 ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
175 if (ret < 0)
176 perror_with_name (_("Unable to fetch general registers."));
177
607685ec
YQ
178 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
179 aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1);
180 else
181 {
182 int regno;
183
184 for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
185 regcache_raw_supply (regcache, regno, &regs[regno - AARCH64_X0_REGNUM]);
186 }
9d19df75
MS
187}
188
189/* Store to the current thread the valid general-purpose register
190 values in the GDB's register array. */
191
192static void
193store_gregs_to_thread (const struct regcache *regcache)
194{
607685ec 195 int ret, tid;
9d19df75
MS
196 elf_gregset_t regs;
197 struct iovec iovec;
607685ec 198 struct gdbarch *gdbarch = get_regcache_arch (regcache);
9d19df75 199
607685ec
YQ
200 /* Make sure REGS can hold all registers contents on both aarch64
201 and arm. */
202 gdb_static_assert (sizeof (regs) >= 18 * 4);
d89fa914 203 tid = ptid_get_lwp (inferior_ptid);
9d19df75
MS
204
205 iovec.iov_base = &regs;
607685ec
YQ
206 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
207 iovec.iov_len = 18 * 4;
208 else
209 iovec.iov_len = sizeof (regs);
9d19df75
MS
210
211 ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
212 if (ret < 0)
213 perror_with_name (_("Unable to fetch general registers."));
214
607685ec
YQ
215 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
216 aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1);
217 else
218 {
219 int regno;
220
221 for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
222 if (REG_VALID == regcache_register_status (regcache, regno))
223 regcache_raw_collect (regcache, regno,
224 &regs[regno - AARCH64_X0_REGNUM]);
225 }
9d19df75
MS
226
227 ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec);
228 if (ret < 0)
229 perror_with_name (_("Unable to store general registers."));
230}
231
232/* Fill GDB's register array with the fp/simd register values
233 from the current thread. */
234
235static void
236fetch_fpregs_from_thread (struct regcache *regcache)
237{
607685ec 238 int ret, tid;
9d19df75
MS
239 elf_fpregset_t regs;
240 struct iovec iovec;
607685ec
YQ
241 struct gdbarch *gdbarch = get_regcache_arch (regcache);
242
243 /* Make sure REGS can hold all VFP registers contents on both aarch64
244 and arm. */
245 gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
9d19df75 246
d89fa914 247 tid = ptid_get_lwp (inferior_ptid);
9d19df75
MS
248
249 iovec.iov_base = &regs;
9d19df75 250
607685ec
YQ
251 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
252 {
253 iovec.iov_len = VFP_REGS_SIZE;
254
255 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
256 if (ret < 0)
257 perror_with_name (_("Unable to fetch VFP registers."));
258
259 aarch32_vfp_regcache_supply (regcache, (gdb_byte *) &regs, 32);
260 }
261 else
262 {
263 int regno;
264
265 iovec.iov_len = sizeof (regs);
9d19df75 266
607685ec
YQ
267 ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
268 if (ret < 0)
269 perror_with_name (_("Unable to fetch vFP/SIMD registers."));
9d19df75 270
607685ec
YQ
271 for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
272 regcache_raw_supply (regcache, regno,
273 &regs.vregs[regno - AARCH64_V0_REGNUM]);
274
275 regcache_raw_supply (regcache, AARCH64_FPSR_REGNUM, &regs.fpsr);
276 regcache_raw_supply (regcache, AARCH64_FPCR_REGNUM, &regs.fpcr);
277 }
9d19df75
MS
278}
279
280/* Store to the current thread the valid fp/simd register
281 values in the GDB's register array. */
282
283static void
284store_fpregs_to_thread (const struct regcache *regcache)
285{
607685ec 286 int ret, tid;
9d19df75
MS
287 elf_fpregset_t regs;
288 struct iovec iovec;
607685ec 289 struct gdbarch *gdbarch = get_regcache_arch (regcache);
9d19df75 290
607685ec
YQ
291 /* Make sure REGS can hold all VFP registers contents on both aarch64
292 and arm. */
293 gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
d89fa914 294 tid = ptid_get_lwp (inferior_ptid);
9d19df75
MS
295
296 iovec.iov_base = &regs;
9d19df75 297
607685ec
YQ
298 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
299 {
300 iovec.iov_len = VFP_REGS_SIZE;
9d19df75 301
607685ec
YQ
302 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
303 if (ret < 0)
304 perror_with_name (_("Unable to fetch VFP registers."));
9d19df75 305
607685ec
YQ
306 aarch32_vfp_regcache_collect (regcache, (gdb_byte *) &regs, 32);
307 }
308 else
309 {
310 int regno;
9d19df75 311
607685ec
YQ
312 iovec.iov_len = sizeof (regs);
313
314 ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
315 if (ret < 0)
316 perror_with_name (_("Unable to fetch FP/SIMD registers."));
317
318 for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
319 if (REG_VALID == regcache_register_status (regcache, regno))
320 regcache_raw_collect (regcache, regno,
321 (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
322
323 if (REG_VALID == regcache_register_status (regcache, AARCH64_FPSR_REGNUM))
324 regcache_raw_collect (regcache, AARCH64_FPSR_REGNUM,
325 (char *) &regs.fpsr);
326 if (REG_VALID == regcache_register_status (regcache, AARCH64_FPCR_REGNUM))
327 regcache_raw_collect (regcache, AARCH64_FPCR_REGNUM,
328 (char *) &regs.fpcr);
329 }
330
331 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
332 {
333 ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec);
334 if (ret < 0)
335 perror_with_name (_("Unable to store VFP registers."));
336 }
337 else
338 {
339 ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec);
340 if (ret < 0)
341 perror_with_name (_("Unable to store FP/SIMD registers."));
342 }
9d19df75
MS
343}
344
345/* Implement the "to_fetch_register" target_ops method. */
346
347static void
348aarch64_linux_fetch_inferior_registers (struct target_ops *ops,
349 struct regcache *regcache,
350 int regno)
351{
352 if (regno == -1)
353 {
354 fetch_gregs_from_thread (regcache);
355 fetch_fpregs_from_thread (regcache);
356 }
357 else if (regno < AARCH64_V0_REGNUM)
358 fetch_gregs_from_thread (regcache);
359 else
360 fetch_fpregs_from_thread (regcache);
361}
362
363/* Implement the "to_store_register" target_ops method. */
364
365static void
366aarch64_linux_store_inferior_registers (struct target_ops *ops,
367 struct regcache *regcache,
368 int regno)
369{
370 if (regno == -1)
371 {
372 store_gregs_to_thread (regcache);
373 store_fpregs_to_thread (regcache);
374 }
375 else if (regno < AARCH64_V0_REGNUM)
376 store_gregs_to_thread (regcache);
377 else
378 store_fpregs_to_thread (regcache);
379}
380
381/* Fill register REGNO (if it is a general-purpose register) in
382 *GREGSETPS with the value in GDB's register array. If REGNO is -1,
383 do this for all registers. */
384
385void
386fill_gregset (const struct regcache *regcache,
387 gdb_gregset_t *gregsetp, int regno)
388{
d4d793bf
AA
389 regcache_collect_regset (&aarch64_linux_gregset, regcache,
390 regno, (gdb_byte *) gregsetp,
391 AARCH64_LINUX_SIZEOF_GREGSET);
9d19df75
MS
392}
393
394/* Fill GDB's register array with the general-purpose register values
395 in *GREGSETP. */
396
397void
398supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
399{
d4d793bf
AA
400 regcache_supply_regset (&aarch64_linux_gregset, regcache, -1,
401 (const gdb_byte *) gregsetp,
402 AARCH64_LINUX_SIZEOF_GREGSET);
9d19df75
MS
403}
404
405/* Fill register REGNO (if it is a floating-point register) in
406 *FPREGSETP with the value in GDB's register array. If REGNO is -1,
407 do this for all registers. */
408
409void
410fill_fpregset (const struct regcache *regcache,
411 gdb_fpregset_t *fpregsetp, int regno)
412{
d4d793bf
AA
413 regcache_collect_regset (&aarch64_linux_fpregset, regcache,
414 regno, (gdb_byte *) fpregsetp,
415 AARCH64_LINUX_SIZEOF_FPREGSET);
9d19df75
MS
416}
417
418/* Fill GDB's register array with the floating-point register values
419 in *FPREGSETP. */
420
421void
422supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
423{
d4d793bf
AA
424 regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1,
425 (const gdb_byte *) fpregsetp,
426 AARCH64_LINUX_SIZEOF_FPREGSET);
9d19df75
MS
427}
428
d6c44983
YZ
429/* linux_nat_new_fork hook. */
430
431static void
432aarch64_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
433{
434 pid_t parent_pid;
435 struct aarch64_debug_reg_state *parent_state;
436 struct aarch64_debug_reg_state *child_state;
437
438 /* NULL means no watchpoint has ever been set in the parent. In
439 that case, there's nothing to do. */
440 if (parent->arch_private == NULL)
441 return;
442
443 /* GDB core assumes the child inherits the watchpoints/hw
444 breakpoints of the parent, and will remove them all from the
445 forked off process. Copy the debug registers mirrors into the
446 new process so that all breakpoints and watchpoints can be
447 removed together. */
448
449 parent_pid = ptid_get_pid (parent->ptid);
450 parent_state = aarch64_get_debug_reg_state (parent_pid);
451 child_state = aarch64_get_debug_reg_state (child_pid);
452 *child_state = *parent_state;
453}
9d19df75
MS
454\f
455
456/* Called by libthread_db. Returns a pointer to the thread local
457 storage (or its descriptor). */
458
459ps_err_e
460ps_get_thread_area (const struct ps_prochandle *ph,
461 lwpid_t lwpid, int idx, void **base)
462{
463 struct iovec iovec;
464 uint64_t reg;
465
466 iovec.iov_base = &reg;
467 iovec.iov_len = sizeof (reg);
468
469 if (ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec) != 0)
470 return PS_ERR;
471
472 /* IDX is the bias from the thread pointer to the beginning of the
473 thread descriptor. It has to be subtracted due to implementation
474 quirks in libthread_db. */
475 *base = (void *) (reg - idx);
476
477 return PS_OK;
478}
479\f
480
2e97a79e
TT
481static void (*super_post_startup_inferior) (struct target_ops *self,
482 ptid_t ptid);
9d19df75
MS
483
484/* Implement the "to_post_startup_inferior" target_ops method. */
485
486static void
2e97a79e
TT
487aarch64_linux_child_post_startup_inferior (struct target_ops *self,
488 ptid_t ptid)
9d19df75 489{
d6c44983 490 aarch64_forget_process (ptid_get_pid (ptid));
af1b22f3 491 aarch64_linux_get_debug_reg_capacity (ptid_get_pid (ptid));
2e97a79e 492 super_post_startup_inferior (self, ptid);
9d19df75
MS
493}
494
607685ec
YQ
495extern struct target_desc *tdesc_arm_with_vfpv3;
496extern struct target_desc *tdesc_arm_with_neon;
497
9d19df75
MS
498/* Implement the "to_read_description" target_ops method. */
499
500static const struct target_desc *
501aarch64_linux_read_description (struct target_ops *ops)
502{
607685ec
YQ
503 CORE_ADDR at_phent;
504
505 if (target_auxv_search (ops, AT_PHENT, &at_phent) == 1)
506 {
507 if (at_phent == sizeof (Elf64_External_Phdr))
508 return tdesc_aarch64;
509 else
510 {
511 CORE_ADDR arm_hwcap = 0;
512
513 if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
514 return ops->beneath->to_read_description (ops->beneath);
515
516#ifndef COMPAT_HWCAP_VFP
517#define COMPAT_HWCAP_VFP (1 << 6)
518#endif
519#ifndef COMPAT_HWCAP_NEON
520#define COMPAT_HWCAP_NEON (1 << 12)
521#endif
522#ifndef COMPAT_HWCAP_VFPv3
523#define COMPAT_HWCAP_VFPv3 (1 << 13)
524#endif
525
526 if (arm_hwcap & COMPAT_HWCAP_VFP)
527 {
528 char *buf;
529 const struct target_desc *result = NULL;
530
531 if (arm_hwcap & COMPAT_HWCAP_NEON)
532 result = tdesc_arm_with_neon;
533 else if (arm_hwcap & COMPAT_HWCAP_VFPv3)
534 result = tdesc_arm_with_vfpv3;
535
536 return result;
537 }
538
539 return NULL;
540 }
541 }
542
9d19df75
MS
543 return tdesc_aarch64;
544}
545
9d19df75
MS
546/* Returns the number of hardware watchpoints of type TYPE that we can
547 set. Value is positive if we can set CNT watchpoints, zero if
548 setting watchpoints of type TYPE is not supported, and negative if
549 CNT is more than the maximum number of watchpoints of type TYPE
550 that we can support. TYPE is one of bp_hardware_watchpoint,
551 bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
552 CNT is the number of such watchpoints used so far (including this
553 one). OTHERTYPE is non-zero if other types of watchpoints are
c2fbdc59 554 currently enabled. */
9d19df75
MS
555
556static int
5461485a 557aarch64_linux_can_use_hw_breakpoint (struct target_ops *self,
f486487f
SM
558 enum bptype type,
559 int cnt, int othertype)
9d19df75 560{
c2fbdc59
YQ
561 if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
562 || type == bp_access_watchpoint || type == bp_watchpoint)
563 {
564 if (aarch64_num_wp_regs == 0)
565 return 0;
566 }
567 else if (type == bp_hardware_breakpoint)
568 {
569 if (aarch64_num_bp_regs == 0)
570 return 0;
571 }
572 else
573 gdb_assert_not_reached ("unexpected breakpoint type");
574
575 /* We always return 1 here because we don't have enough information
576 about possible overlap of addresses that they want to watch. As an
577 extreme example, consider the case where all the watchpoints watch
578 the same address and the same region length: then we can handle a
579 virtually unlimited number of watchpoints, due to debug register
580 sharing implemented via reference counts. */
9d19df75
MS
581 return 1;
582}
583
0d5ed153 584/* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
9d19df75
MS
585 Return 0 on success, -1 on failure. */
586
587static int
23a26771
TT
588aarch64_linux_insert_hw_breakpoint (struct target_ops *self,
589 struct gdbarch *gdbarch,
9d19df75
MS
590 struct bp_target_info *bp_tgt)
591{
592 int ret;
0d5ed153 593 CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
9d19df75 594 const int len = 4;
2ecd81c2 595 const enum target_hw_bp_type type = hw_execute;
c67ca4de
YQ
596 struct aarch64_debug_reg_state *state
597 = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
9d19df75 598
c5e92cca 599 if (show_debug_regs)
9d19df75
MS
600 fprintf_unfiltered
601 (gdb_stdlog,
602 "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
603 (unsigned long) addr, len);
604
c67ca4de 605 ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state);
9d19df75 606
c5e92cca 607 if (show_debug_regs)
d6c44983 608 {
d6c44983 609 aarch64_show_debug_reg_state (state,
2fd0f80d 610 "insert_hw_breakpoint", addr, len, type);
d6c44983 611 }
9d19df75
MS
612
613 return ret;
614}
615
616/* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
617 Return 0 on success, -1 on failure. */
618
619static int
a64dc96c
TT
620aarch64_linux_remove_hw_breakpoint (struct target_ops *self,
621 struct gdbarch *gdbarch,
9d19df75
MS
622 struct bp_target_info *bp_tgt)
623{
624 int ret;
625 CORE_ADDR addr = bp_tgt->placed_address;
626 const int len = 4;
2ecd81c2 627 const enum target_hw_bp_type type = hw_execute;
c67ca4de
YQ
628 struct aarch64_debug_reg_state *state
629 = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
9d19df75 630
c5e92cca 631 if (show_debug_regs)
9d19df75
MS
632 fprintf_unfiltered
633 (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
634 (unsigned long) addr, len);
635
c67ca4de 636 ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state);
9d19df75 637
c5e92cca 638 if (show_debug_regs)
d6c44983 639 {
d6c44983
YZ
640 aarch64_show_debug_reg_state (state,
641 "remove_hw_watchpoint", addr, len, type);
642 }
9d19df75
MS
643
644 return ret;
645}
646
9d19df75
MS
647/* Implement the "to_insert_watchpoint" target_ops method.
648
649 Insert a watchpoint to watch a memory region which starts at
650 address ADDR and whose length is LEN bytes. Watch memory accesses
651 of the type TYPE. Return 0 on success, -1 on failure. */
652
653static int
7bb99c53 654aarch64_linux_insert_watchpoint (struct target_ops *self,
f486487f
SM
655 CORE_ADDR addr, int len,
656 enum target_hw_bp_type type,
9d19df75
MS
657 struct expression *cond)
658{
659 int ret;
c67ca4de
YQ
660 struct aarch64_debug_reg_state *state
661 = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
9d19df75 662
c5e92cca 663 if (show_debug_regs)
9d19df75
MS
664 fprintf_unfiltered (gdb_stdlog,
665 "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
666 (unsigned long) addr, len);
667
668 gdb_assert (type != hw_execute);
669
c67ca4de 670 ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state);
9d19df75 671
c5e92cca 672 if (show_debug_regs)
d6c44983 673 {
d6c44983
YZ
674 aarch64_show_debug_reg_state (state,
675 "insert_watchpoint", addr, len, type);
676 }
9d19df75
MS
677
678 return ret;
679}
680
681/* Implement the "to_remove_watchpoint" target_ops method.
682 Remove a watchpoint that watched the memory region which starts at
683 address ADDR, whose length is LEN bytes, and for accesses of the
684 type TYPE. Return 0 on success, -1 on failure. */
685
686static int
11b5219a 687aarch64_linux_remove_watchpoint (struct target_ops *self,
f486487f
SM
688 CORE_ADDR addr, int len,
689 enum target_hw_bp_type type,
9d19df75
MS
690 struct expression *cond)
691{
692 int ret;
c67ca4de
YQ
693 struct aarch64_debug_reg_state *state
694 = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
9d19df75 695
c5e92cca 696 if (show_debug_regs)
9d19df75
MS
697 fprintf_unfiltered (gdb_stdlog,
698 "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
699 (unsigned long) addr, len);
700
701 gdb_assert (type != hw_execute);
702
c67ca4de 703 ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state);
9d19df75 704
c5e92cca 705 if (show_debug_regs)
d6c44983 706 {
d6c44983
YZ
707 aarch64_show_debug_reg_state (state,
708 "remove_watchpoint", addr, len, type);
709 }
9d19df75
MS
710
711 return ret;
712}
713
714/* Implement the "to_region_ok_for_hw_watchpoint" target_ops method. */
715
716static int
31568a15
TT
717aarch64_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
718 CORE_ADDR addr, int len)
9d19df75
MS
719{
720 CORE_ADDR aligned_addr;
721
722 /* Can not set watchpoints for zero or negative lengths. */
723 if (len <= 0)
724 return 0;
725
726 /* Must have hardware watchpoint debug register(s). */
727 if (aarch64_num_wp_regs == 0)
728 return 0;
729
730 /* We support unaligned watchpoint address and arbitrary length,
731 as long as the size of the whole watched area after alignment
732 doesn't exceed size of the total area that all watchpoint debug
733 registers can watch cooperatively.
734
735 This is a very relaxed rule, but unfortunately there are
736 limitations, e.g. false-positive hits, due to limited support of
737 hardware debug registers in the kernel. See comment above
738 aarch64_align_watchpoint for more information. */
739
740 aligned_addr = addr & ~(AARCH64_HWP_MAX_LEN_PER_REG - 1);
741 if (aligned_addr + aarch64_num_wp_regs * AARCH64_HWP_MAX_LEN_PER_REG
742 < addr + len)
743 return 0;
744
745 /* All tests passed so we are likely to be able to set the watchpoint.
746 The reason that it is 'likely' rather than 'must' is because
747 we don't check the current usage of the watchpoint registers, and
748 there may not be enough registers available for this watchpoint.
749 Ideally we should check the cached debug register state, however
750 the checking is costly. */
751 return 1;
752}
753
754/* Implement the "to_stopped_data_address" target_ops method. */
755
756static int
757aarch64_linux_stopped_data_address (struct target_ops *target,
758 CORE_ADDR *addr_p)
759{
760 siginfo_t siginfo;
761 int i, tid;
762 struct aarch64_debug_reg_state *state;
763
764 if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
765 return 0;
766
767 /* This must be a hardware breakpoint. */
768 if (siginfo.si_signo != SIGTRAP
769 || (siginfo.si_code & 0xffff) != TRAP_HWBKPT)
770 return 0;
771
772 /* Check if the address matches any watched address. */
d6c44983 773 state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
9d19df75
MS
774 for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
775 {
776 const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
777 const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
778 const CORE_ADDR addr_watch = state->dr_addr_wp[i];
779
780 if (state->dr_ref_count_wp[i]
781 && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
782 && addr_trap >= addr_watch
783 && addr_trap < addr_watch + len)
784 {
785 *addr_p = addr_trap;
786 return 1;
787 }
788 }
789
790 return 0;
791}
792
793/* Implement the "to_stopped_by_watchpoint" target_ops method. */
794
795static int
6a109b6b 796aarch64_linux_stopped_by_watchpoint (struct target_ops *ops)
9d19df75
MS
797{
798 CORE_ADDR addr;
799
6a109b6b 800 return aarch64_linux_stopped_data_address (ops, &addr);
9d19df75
MS
801}
802
803/* Implement the "to_watchpoint_addr_within_range" target_ops method. */
804
805static int
806aarch64_linux_watchpoint_addr_within_range (struct target_ops *target,
807 CORE_ADDR addr,
808 CORE_ADDR start, int length)
809{
810 return start <= addr && start + length - 1 >= addr;
811}
812
813/* Define AArch64 maintenance commands. */
814
815static void
816add_show_debug_regs_command (void)
817{
818 /* A maintenance command to enable printing the internal DRi mirror
819 variables. */
820 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
c5e92cca 821 &show_debug_regs, _("\
9d19df75
MS
822Set whether to show variables that mirror the AArch64 debug registers."), _("\
823Show whether to show variables that mirror the AArch64 debug registers."), _("\
824Use \"on\" to enable, \"off\" to disable.\n\
825If enabled, the debug registers values are shown when GDB inserts\n\
826or removes a hardware breakpoint or watchpoint, and when the inferior\n\
827triggers a breakpoint or watchpoint."),
828 NULL,
829 NULL,
830 &maintenance_set_cmdlist,
831 &maintenance_show_cmdlist);
832}
833
834/* -Wmissing-prototypes. */
835void _initialize_aarch64_linux_nat (void);
836
837void
838_initialize_aarch64_linux_nat (void)
839{
840 struct target_ops *t;
841
842 /* Fill in the generic GNU/Linux methods. */
843 t = linux_target ();
844
845 add_show_debug_regs_command ();
846
847 /* Add our register access methods. */
848 t->to_fetch_registers = aarch64_linux_fetch_inferior_registers;
849 t->to_store_registers = aarch64_linux_store_inferior_registers;
850
851 t->to_read_description = aarch64_linux_read_description;
852
853 t->to_can_use_hw_breakpoint = aarch64_linux_can_use_hw_breakpoint;
854 t->to_insert_hw_breakpoint = aarch64_linux_insert_hw_breakpoint;
855 t->to_remove_hw_breakpoint = aarch64_linux_remove_hw_breakpoint;
856 t->to_region_ok_for_hw_watchpoint =
857 aarch64_linux_region_ok_for_hw_watchpoint;
858 t->to_insert_watchpoint = aarch64_linux_insert_watchpoint;
859 t->to_remove_watchpoint = aarch64_linux_remove_watchpoint;
860 t->to_stopped_by_watchpoint = aarch64_linux_stopped_by_watchpoint;
861 t->to_stopped_data_address = aarch64_linux_stopped_data_address;
862 t->to_watchpoint_addr_within_range =
863 aarch64_linux_watchpoint_addr_within_range;
9d19df75
MS
864
865 /* Override the GNU/Linux inferior startup hook. */
866 super_post_startup_inferior = t->to_post_startup_inferior;
867 t->to_post_startup_inferior = aarch64_linux_child_post_startup_inferior;
868
869 /* Register the target. */
870 linux_nat_add_target (t);
871 linux_nat_set_new_thread (t, aarch64_linux_new_thread);
d6c44983
YZ
872 linux_nat_set_new_fork (t, aarch64_linux_new_fork);
873 linux_nat_set_forget_process (t, aarch64_forget_process);
9d19df75
MS
874 linux_nat_set_prepare_to_resume (t, aarch64_linux_prepare_to_resume);
875}
This page took 0.247903 seconds and 4 git commands to generate.