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9d19df75 MS |
1 | /* Native-dependent code for GNU/Linux AArch64. |
2 | ||
32d0add0 | 3 | Copyright (C) 2011-2015 Free Software Foundation, Inc. |
9d19df75 MS |
4 | Contributed by ARM Ltd. |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | #include "defs.h" | |
22 | ||
23 | #include "inferior.h" | |
24 | #include "gdbcore.h" | |
25 | #include "regcache.h" | |
26 | #include "linux-nat.h" | |
27 | #include "target-descriptions.h" | |
28 | #include "auxv.h" | |
29 | #include "gdbcmd.h" | |
30 | #include "aarch64-tdep.h" | |
31 | #include "aarch64-linux-tdep.h" | |
607685ec | 32 | #include "aarch32-linux-nat.h" |
554717a3 | 33 | #include "nat/aarch64-linux-hw-point.h" |
607685ec YQ |
34 | |
35 | #include "elf/external.h" | |
9d19df75 MS |
36 | #include "elf/common.h" |
37 | ||
5826e159 | 38 | #include "nat/gdb_ptrace.h" |
9d19df75 | 39 | #include <sys/utsname.h> |
036cd381 | 40 | #include <asm/ptrace.h> |
9d19df75 MS |
41 | |
42 | #include "gregset.h" | |
43 | ||
9d19df75 MS |
44 | /* Defines ps_err_e, struct ps_prochandle. */ |
45 | #include "gdb_proc_service.h" | |
46 | ||
47 | #ifndef TRAP_HWBKPT | |
48 | #define TRAP_HWBKPT 0x0004 | |
49 | #endif | |
50 | ||
d6c44983 YZ |
51 | /* Per-process data. We don't bind this to a per-inferior registry |
52 | because of targets like x86 GNU/Linux that need to keep track of | |
53 | processes that aren't bound to any inferior (e.g., fork children, | |
54 | checkpoints). */ | |
9d19df75 | 55 | |
d6c44983 | 56 | struct aarch64_process_info |
9d19df75 | 57 | { |
d6c44983 YZ |
58 | /* Linked list. */ |
59 | struct aarch64_process_info *next; | |
9d19df75 | 60 | |
d6c44983 YZ |
61 | /* The process identifier. */ |
62 | pid_t pid; | |
9d19df75 | 63 | |
d6c44983 YZ |
64 | /* Copy of aarch64 hardware debug registers. */ |
65 | struct aarch64_debug_reg_state state; | |
66 | }; | |
67 | ||
68 | static struct aarch64_process_info *aarch64_process_list = NULL; | |
69 | ||
70 | /* Find process data for process PID. */ | |
71 | ||
72 | static struct aarch64_process_info * | |
73 | aarch64_find_process_pid (pid_t pid) | |
74 | { | |
75 | struct aarch64_process_info *proc; | |
76 | ||
77 | for (proc = aarch64_process_list; proc; proc = proc->next) | |
78 | if (proc->pid == pid) | |
79 | return proc; | |
80 | ||
81 | return NULL; | |
9d19df75 MS |
82 | } |
83 | ||
d6c44983 YZ |
84 | /* Add process data for process PID. Returns newly allocated info |
85 | object. */ | |
9d19df75 | 86 | |
d6c44983 YZ |
87 | static struct aarch64_process_info * |
88 | aarch64_add_process (pid_t pid) | |
9d19df75 | 89 | { |
d6c44983 | 90 | struct aarch64_process_info *proc; |
9d19df75 | 91 | |
d6c44983 YZ |
92 | proc = xcalloc (1, sizeof (*proc)); |
93 | proc->pid = pid; | |
9d19df75 | 94 | |
d6c44983 YZ |
95 | proc->next = aarch64_process_list; |
96 | aarch64_process_list = proc; | |
97 | ||
98 | return proc; | |
99 | } | |
100 | ||
101 | /* Get data specific info for process PID, creating it if necessary. | |
102 | Never returns NULL. */ | |
103 | ||
104 | static struct aarch64_process_info * | |
105 | aarch64_process_info_get (pid_t pid) | |
9d19df75 | 106 | { |
d6c44983 YZ |
107 | struct aarch64_process_info *proc; |
108 | ||
109 | proc = aarch64_find_process_pid (pid); | |
110 | if (proc == NULL) | |
111 | proc = aarch64_add_process (pid); | |
9d19df75 | 112 | |
d6c44983 | 113 | return proc; |
9d19df75 MS |
114 | } |
115 | ||
d6c44983 YZ |
116 | /* Called whenever GDB is no longer debugging process PID. It deletes |
117 | data structures that keep track of debug register state. */ | |
9d19df75 | 118 | |
d6c44983 YZ |
119 | static void |
120 | aarch64_forget_process (pid_t pid) | |
9d19df75 | 121 | { |
d6c44983 | 122 | struct aarch64_process_info *proc, **proc_link; |
9d19df75 | 123 | |
d6c44983 YZ |
124 | proc = aarch64_process_list; |
125 | proc_link = &aarch64_process_list; | |
126 | ||
127 | while (proc != NULL) | |
9d19df75 | 128 | { |
d6c44983 YZ |
129 | if (proc->pid == pid) |
130 | { | |
131 | *proc_link = proc->next; | |
9d19df75 | 132 | |
d6c44983 YZ |
133 | xfree (proc); |
134 | return; | |
135 | } | |
136 | ||
137 | proc_link = &proc->next; | |
138 | proc = *proc_link; | |
139 | } | |
9d19df75 MS |
140 | } |
141 | ||
d6c44983 | 142 | /* Get debug registers state for process PID. */ |
9d19df75 MS |
143 | |
144 | static struct aarch64_debug_reg_state * | |
d6c44983 | 145 | aarch64_get_debug_reg_state (pid_t pid) |
9d19df75 | 146 | { |
d6c44983 | 147 | return &aarch64_process_info_get (pid)->state; |
9d19df75 MS |
148 | } |
149 | ||
9d19df75 MS |
150 | /* Fill GDB's register array with the general-purpose register values |
151 | from the current thread. */ | |
152 | ||
153 | static void | |
154 | fetch_gregs_from_thread (struct regcache *regcache) | |
155 | { | |
607685ec YQ |
156 | int ret, tid; |
157 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
9d19df75 MS |
158 | elf_gregset_t regs; |
159 | struct iovec iovec; | |
160 | ||
607685ec YQ |
161 | /* Make sure REGS can hold all registers contents on both aarch64 |
162 | and arm. */ | |
163 | gdb_static_assert (sizeof (regs) >= 18 * 4); | |
164 | ||
d89fa914 | 165 | tid = ptid_get_lwp (inferior_ptid); |
9d19df75 MS |
166 | |
167 | iovec.iov_base = ®s; | |
607685ec YQ |
168 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
169 | iovec.iov_len = 18 * 4; | |
170 | else | |
171 | iovec.iov_len = sizeof (regs); | |
9d19df75 MS |
172 | |
173 | ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec); | |
174 | if (ret < 0) | |
175 | perror_with_name (_("Unable to fetch general registers.")); | |
176 | ||
607685ec YQ |
177 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
178 | aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1); | |
179 | else | |
180 | { | |
181 | int regno; | |
182 | ||
183 | for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++) | |
184 | regcache_raw_supply (regcache, regno, ®s[regno - AARCH64_X0_REGNUM]); | |
185 | } | |
9d19df75 MS |
186 | } |
187 | ||
188 | /* Store to the current thread the valid general-purpose register | |
189 | values in the GDB's register array. */ | |
190 | ||
191 | static void | |
192 | store_gregs_to_thread (const struct regcache *regcache) | |
193 | { | |
607685ec | 194 | int ret, tid; |
9d19df75 MS |
195 | elf_gregset_t regs; |
196 | struct iovec iovec; | |
607685ec | 197 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
9d19df75 | 198 | |
607685ec YQ |
199 | /* Make sure REGS can hold all registers contents on both aarch64 |
200 | and arm. */ | |
201 | gdb_static_assert (sizeof (regs) >= 18 * 4); | |
d89fa914 | 202 | tid = ptid_get_lwp (inferior_ptid); |
9d19df75 MS |
203 | |
204 | iovec.iov_base = ®s; | |
607685ec YQ |
205 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
206 | iovec.iov_len = 18 * 4; | |
207 | else | |
208 | iovec.iov_len = sizeof (regs); | |
9d19df75 MS |
209 | |
210 | ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec); | |
211 | if (ret < 0) | |
212 | perror_with_name (_("Unable to fetch general registers.")); | |
213 | ||
607685ec YQ |
214 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
215 | aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1); | |
216 | else | |
217 | { | |
218 | int regno; | |
219 | ||
220 | for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++) | |
221 | if (REG_VALID == regcache_register_status (regcache, regno)) | |
222 | regcache_raw_collect (regcache, regno, | |
223 | ®s[regno - AARCH64_X0_REGNUM]); | |
224 | } | |
9d19df75 MS |
225 | |
226 | ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec); | |
227 | if (ret < 0) | |
228 | perror_with_name (_("Unable to store general registers.")); | |
229 | } | |
230 | ||
231 | /* Fill GDB's register array with the fp/simd register values | |
232 | from the current thread. */ | |
233 | ||
234 | static void | |
235 | fetch_fpregs_from_thread (struct regcache *regcache) | |
236 | { | |
607685ec | 237 | int ret, tid; |
9d19df75 MS |
238 | elf_fpregset_t regs; |
239 | struct iovec iovec; | |
607685ec YQ |
240 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
241 | ||
242 | /* Make sure REGS can hold all VFP registers contents on both aarch64 | |
243 | and arm. */ | |
244 | gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); | |
9d19df75 | 245 | |
d89fa914 | 246 | tid = ptid_get_lwp (inferior_ptid); |
9d19df75 MS |
247 | |
248 | iovec.iov_base = ®s; | |
9d19df75 | 249 | |
607685ec YQ |
250 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
251 | { | |
252 | iovec.iov_len = VFP_REGS_SIZE; | |
253 | ||
254 | ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); | |
255 | if (ret < 0) | |
256 | perror_with_name (_("Unable to fetch VFP registers.")); | |
257 | ||
258 | aarch32_vfp_regcache_supply (regcache, (gdb_byte *) ®s, 32); | |
259 | } | |
260 | else | |
261 | { | |
262 | int regno; | |
263 | ||
264 | iovec.iov_len = sizeof (regs); | |
9d19df75 | 265 | |
607685ec YQ |
266 | ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec); |
267 | if (ret < 0) | |
268 | perror_with_name (_("Unable to fetch vFP/SIMD registers.")); | |
9d19df75 | 269 | |
607685ec YQ |
270 | for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++) |
271 | regcache_raw_supply (regcache, regno, | |
272 | ®s.vregs[regno - AARCH64_V0_REGNUM]); | |
273 | ||
274 | regcache_raw_supply (regcache, AARCH64_FPSR_REGNUM, ®s.fpsr); | |
275 | regcache_raw_supply (regcache, AARCH64_FPCR_REGNUM, ®s.fpcr); | |
276 | } | |
9d19df75 MS |
277 | } |
278 | ||
279 | /* Store to the current thread the valid fp/simd register | |
280 | values in the GDB's register array. */ | |
281 | ||
282 | static void | |
283 | store_fpregs_to_thread (const struct regcache *regcache) | |
284 | { | |
607685ec | 285 | int ret, tid; |
9d19df75 MS |
286 | elf_fpregset_t regs; |
287 | struct iovec iovec; | |
607685ec | 288 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
9d19df75 | 289 | |
607685ec YQ |
290 | /* Make sure REGS can hold all VFP registers contents on both aarch64 |
291 | and arm. */ | |
292 | gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); | |
d89fa914 | 293 | tid = ptid_get_lwp (inferior_ptid); |
9d19df75 MS |
294 | |
295 | iovec.iov_base = ®s; | |
9d19df75 | 296 | |
607685ec YQ |
297 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) |
298 | { | |
299 | iovec.iov_len = VFP_REGS_SIZE; | |
9d19df75 | 300 | |
607685ec YQ |
301 | ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec); |
302 | if (ret < 0) | |
303 | perror_with_name (_("Unable to fetch VFP registers.")); | |
9d19df75 | 304 | |
607685ec YQ |
305 | aarch32_vfp_regcache_collect (regcache, (gdb_byte *) ®s, 32); |
306 | } | |
307 | else | |
308 | { | |
309 | int regno; | |
9d19df75 | 310 | |
607685ec YQ |
311 | iovec.iov_len = sizeof (regs); |
312 | ||
313 | ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec); | |
314 | if (ret < 0) | |
315 | perror_with_name (_("Unable to fetch FP/SIMD registers.")); | |
316 | ||
317 | for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++) | |
318 | if (REG_VALID == regcache_register_status (regcache, regno)) | |
319 | regcache_raw_collect (regcache, regno, | |
320 | (char *) ®s.vregs[regno - AARCH64_V0_REGNUM]); | |
321 | ||
322 | if (REG_VALID == regcache_register_status (regcache, AARCH64_FPSR_REGNUM)) | |
323 | regcache_raw_collect (regcache, AARCH64_FPSR_REGNUM, | |
324 | (char *) ®s.fpsr); | |
325 | if (REG_VALID == regcache_register_status (regcache, AARCH64_FPCR_REGNUM)) | |
326 | regcache_raw_collect (regcache, AARCH64_FPCR_REGNUM, | |
327 | (char *) ®s.fpcr); | |
328 | } | |
329 | ||
330 | if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) | |
331 | { | |
332 | ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec); | |
333 | if (ret < 0) | |
334 | perror_with_name (_("Unable to store VFP registers.")); | |
335 | } | |
336 | else | |
337 | { | |
338 | ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec); | |
339 | if (ret < 0) | |
340 | perror_with_name (_("Unable to store FP/SIMD registers.")); | |
341 | } | |
9d19df75 MS |
342 | } |
343 | ||
344 | /* Implement the "to_fetch_register" target_ops method. */ | |
345 | ||
346 | static void | |
347 | aarch64_linux_fetch_inferior_registers (struct target_ops *ops, | |
348 | struct regcache *regcache, | |
349 | int regno) | |
350 | { | |
351 | if (regno == -1) | |
352 | { | |
353 | fetch_gregs_from_thread (regcache); | |
354 | fetch_fpregs_from_thread (regcache); | |
355 | } | |
356 | else if (regno < AARCH64_V0_REGNUM) | |
357 | fetch_gregs_from_thread (regcache); | |
358 | else | |
359 | fetch_fpregs_from_thread (regcache); | |
360 | } | |
361 | ||
362 | /* Implement the "to_store_register" target_ops method. */ | |
363 | ||
364 | static void | |
365 | aarch64_linux_store_inferior_registers (struct target_ops *ops, | |
366 | struct regcache *regcache, | |
367 | int regno) | |
368 | { | |
369 | if (regno == -1) | |
370 | { | |
371 | store_gregs_to_thread (regcache); | |
372 | store_fpregs_to_thread (regcache); | |
373 | } | |
374 | else if (regno < AARCH64_V0_REGNUM) | |
375 | store_gregs_to_thread (regcache); | |
376 | else | |
377 | store_fpregs_to_thread (regcache); | |
378 | } | |
379 | ||
380 | /* Fill register REGNO (if it is a general-purpose register) in | |
381 | *GREGSETPS with the value in GDB's register array. If REGNO is -1, | |
382 | do this for all registers. */ | |
383 | ||
384 | void | |
385 | fill_gregset (const struct regcache *regcache, | |
386 | gdb_gregset_t *gregsetp, int regno) | |
387 | { | |
d4d793bf AA |
388 | regcache_collect_regset (&aarch64_linux_gregset, regcache, |
389 | regno, (gdb_byte *) gregsetp, | |
390 | AARCH64_LINUX_SIZEOF_GREGSET); | |
9d19df75 MS |
391 | } |
392 | ||
393 | /* Fill GDB's register array with the general-purpose register values | |
394 | in *GREGSETP. */ | |
395 | ||
396 | void | |
397 | supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) | |
398 | { | |
d4d793bf AA |
399 | regcache_supply_regset (&aarch64_linux_gregset, regcache, -1, |
400 | (const gdb_byte *) gregsetp, | |
401 | AARCH64_LINUX_SIZEOF_GREGSET); | |
9d19df75 MS |
402 | } |
403 | ||
404 | /* Fill register REGNO (if it is a floating-point register) in | |
405 | *FPREGSETP with the value in GDB's register array. If REGNO is -1, | |
406 | do this for all registers. */ | |
407 | ||
408 | void | |
409 | fill_fpregset (const struct regcache *regcache, | |
410 | gdb_fpregset_t *fpregsetp, int regno) | |
411 | { | |
d4d793bf AA |
412 | regcache_collect_regset (&aarch64_linux_fpregset, regcache, |
413 | regno, (gdb_byte *) fpregsetp, | |
414 | AARCH64_LINUX_SIZEOF_FPREGSET); | |
9d19df75 MS |
415 | } |
416 | ||
417 | /* Fill GDB's register array with the floating-point register values | |
418 | in *FPREGSETP. */ | |
419 | ||
420 | void | |
421 | supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) | |
422 | { | |
d4d793bf AA |
423 | regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1, |
424 | (const gdb_byte *) fpregsetp, | |
425 | AARCH64_LINUX_SIZEOF_FPREGSET); | |
9d19df75 MS |
426 | } |
427 | ||
428 | /* Called when resuming a thread. | |
429 | The hardware debug registers are updated when there is any change. */ | |
430 | ||
431 | static void | |
432 | aarch64_linux_prepare_to_resume (struct lwp_info *lwp) | |
433 | { | |
f6011a1c | 434 | struct arch_lwp_info *info = lwp_arch_private_info (lwp); |
9d19df75 MS |
435 | |
436 | /* NULL means this is the main thread still going through the shell, | |
437 | or, no watchpoint has been set yet. In that case, there's | |
438 | nothing to do. */ | |
439 | if (info == NULL) | |
440 | return; | |
441 | ||
442 | if (DR_HAS_CHANGED (info->dr_changed_bp) | |
443 | || DR_HAS_CHANGED (info->dr_changed_wp)) | |
444 | { | |
f6011a1c YQ |
445 | ptid_t ptid = ptid_of_lwp (lwp); |
446 | int tid = ptid_get_lwp (ptid); | |
d6c44983 | 447 | struct aarch64_debug_reg_state *state |
f6011a1c | 448 | = aarch64_get_debug_reg_state (ptid_get_pid (ptid)); |
9d19df75 | 449 | |
c5e92cca | 450 | if (show_debug_regs) |
9d19df75 MS |
451 | fprintf_unfiltered (gdb_stdlog, "prepare_to_resume thread %d\n", tid); |
452 | ||
453 | /* Watchpoints. */ | |
454 | if (DR_HAS_CHANGED (info->dr_changed_wp)) | |
455 | { | |
456 | aarch64_linux_set_debug_regs (state, tid, 1); | |
457 | DR_CLEAR_CHANGED (info->dr_changed_wp); | |
458 | } | |
459 | ||
460 | /* Breakpoints. */ | |
461 | if (DR_HAS_CHANGED (info->dr_changed_bp)) | |
462 | { | |
463 | aarch64_linux_set_debug_regs (state, tid, 0); | |
464 | DR_CLEAR_CHANGED (info->dr_changed_bp); | |
465 | } | |
466 | } | |
467 | } | |
468 | ||
469 | static void | |
470 | aarch64_linux_new_thread (struct lwp_info *lp) | |
471 | { | |
472 | struct arch_lwp_info *info = XCNEW (struct arch_lwp_info); | |
473 | ||
474 | /* Mark that all the hardware breakpoint/watchpoint register pairs | |
475 | for this thread need to be initialized. */ | |
476 | DR_MARK_ALL_CHANGED (info->dr_changed_bp, aarch64_num_bp_regs); | |
477 | DR_MARK_ALL_CHANGED (info->dr_changed_wp, aarch64_num_wp_regs); | |
478 | ||
479 | lp->arch_private = info; | |
480 | } | |
d6c44983 YZ |
481 | |
482 | /* linux_nat_new_fork hook. */ | |
483 | ||
484 | static void | |
485 | aarch64_linux_new_fork (struct lwp_info *parent, pid_t child_pid) | |
486 | { | |
487 | pid_t parent_pid; | |
488 | struct aarch64_debug_reg_state *parent_state; | |
489 | struct aarch64_debug_reg_state *child_state; | |
490 | ||
491 | /* NULL means no watchpoint has ever been set in the parent. In | |
492 | that case, there's nothing to do. */ | |
493 | if (parent->arch_private == NULL) | |
494 | return; | |
495 | ||
496 | /* GDB core assumes the child inherits the watchpoints/hw | |
497 | breakpoints of the parent, and will remove them all from the | |
498 | forked off process. Copy the debug registers mirrors into the | |
499 | new process so that all breakpoints and watchpoints can be | |
500 | removed together. */ | |
501 | ||
502 | parent_pid = ptid_get_pid (parent->ptid); | |
503 | parent_state = aarch64_get_debug_reg_state (parent_pid); | |
504 | child_state = aarch64_get_debug_reg_state (child_pid); | |
505 | *child_state = *parent_state; | |
506 | } | |
9d19df75 MS |
507 | \f |
508 | ||
509 | /* Called by libthread_db. Returns a pointer to the thread local | |
510 | storage (or its descriptor). */ | |
511 | ||
512 | ps_err_e | |
513 | ps_get_thread_area (const struct ps_prochandle *ph, | |
514 | lwpid_t lwpid, int idx, void **base) | |
515 | { | |
516 | struct iovec iovec; | |
517 | uint64_t reg; | |
518 | ||
519 | iovec.iov_base = ® | |
520 | iovec.iov_len = sizeof (reg); | |
521 | ||
522 | if (ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec) != 0) | |
523 | return PS_ERR; | |
524 | ||
525 | /* IDX is the bias from the thread pointer to the beginning of the | |
526 | thread descriptor. It has to be subtracted due to implementation | |
527 | quirks in libthread_db. */ | |
528 | *base = (void *) (reg - idx); | |
529 | ||
530 | return PS_OK; | |
531 | } | |
532 | \f | |
533 | ||
2e97a79e TT |
534 | static void (*super_post_startup_inferior) (struct target_ops *self, |
535 | ptid_t ptid); | |
9d19df75 MS |
536 | |
537 | /* Implement the "to_post_startup_inferior" target_ops method. */ | |
538 | ||
539 | static void | |
2e97a79e TT |
540 | aarch64_linux_child_post_startup_inferior (struct target_ops *self, |
541 | ptid_t ptid) | |
9d19df75 | 542 | { |
d6c44983 | 543 | aarch64_forget_process (ptid_get_pid (ptid)); |
af1b22f3 | 544 | aarch64_linux_get_debug_reg_capacity (ptid_get_pid (ptid)); |
2e97a79e | 545 | super_post_startup_inferior (self, ptid); |
9d19df75 MS |
546 | } |
547 | ||
607685ec YQ |
548 | extern struct target_desc *tdesc_arm_with_vfpv3; |
549 | extern struct target_desc *tdesc_arm_with_neon; | |
550 | ||
9d19df75 MS |
551 | /* Implement the "to_read_description" target_ops method. */ |
552 | ||
553 | static const struct target_desc * | |
554 | aarch64_linux_read_description (struct target_ops *ops) | |
555 | { | |
607685ec YQ |
556 | CORE_ADDR at_phent; |
557 | ||
558 | if (target_auxv_search (ops, AT_PHENT, &at_phent) == 1) | |
559 | { | |
560 | if (at_phent == sizeof (Elf64_External_Phdr)) | |
561 | return tdesc_aarch64; | |
562 | else | |
563 | { | |
564 | CORE_ADDR arm_hwcap = 0; | |
565 | ||
566 | if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1) | |
567 | return ops->beneath->to_read_description (ops->beneath); | |
568 | ||
569 | #ifndef COMPAT_HWCAP_VFP | |
570 | #define COMPAT_HWCAP_VFP (1 << 6) | |
571 | #endif | |
572 | #ifndef COMPAT_HWCAP_NEON | |
573 | #define COMPAT_HWCAP_NEON (1 << 12) | |
574 | #endif | |
575 | #ifndef COMPAT_HWCAP_VFPv3 | |
576 | #define COMPAT_HWCAP_VFPv3 (1 << 13) | |
577 | #endif | |
578 | ||
579 | if (arm_hwcap & COMPAT_HWCAP_VFP) | |
580 | { | |
581 | char *buf; | |
582 | const struct target_desc *result = NULL; | |
583 | ||
584 | if (arm_hwcap & COMPAT_HWCAP_NEON) | |
585 | result = tdesc_arm_with_neon; | |
586 | else if (arm_hwcap & COMPAT_HWCAP_VFPv3) | |
587 | result = tdesc_arm_with_vfpv3; | |
588 | ||
589 | return result; | |
590 | } | |
591 | ||
592 | return NULL; | |
593 | } | |
594 | } | |
595 | ||
9d19df75 MS |
596 | return tdesc_aarch64; |
597 | } | |
598 | ||
9d19df75 MS |
599 | /* Returns the number of hardware watchpoints of type TYPE that we can |
600 | set. Value is positive if we can set CNT watchpoints, zero if | |
601 | setting watchpoints of type TYPE is not supported, and negative if | |
602 | CNT is more than the maximum number of watchpoints of type TYPE | |
603 | that we can support. TYPE is one of bp_hardware_watchpoint, | |
604 | bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint. | |
605 | CNT is the number of such watchpoints used so far (including this | |
606 | one). OTHERTYPE is non-zero if other types of watchpoints are | |
c2fbdc59 | 607 | currently enabled. */ |
9d19df75 MS |
608 | |
609 | static int | |
5461485a | 610 | aarch64_linux_can_use_hw_breakpoint (struct target_ops *self, |
f486487f SM |
611 | enum bptype type, |
612 | int cnt, int othertype) | |
9d19df75 | 613 | { |
c2fbdc59 YQ |
614 | if (type == bp_hardware_watchpoint || type == bp_read_watchpoint |
615 | || type == bp_access_watchpoint || type == bp_watchpoint) | |
616 | { | |
617 | if (aarch64_num_wp_regs == 0) | |
618 | return 0; | |
619 | } | |
620 | else if (type == bp_hardware_breakpoint) | |
621 | { | |
622 | if (aarch64_num_bp_regs == 0) | |
623 | return 0; | |
624 | } | |
625 | else | |
626 | gdb_assert_not_reached ("unexpected breakpoint type"); | |
627 | ||
628 | /* We always return 1 here because we don't have enough information | |
629 | about possible overlap of addresses that they want to watch. As an | |
630 | extreme example, consider the case where all the watchpoints watch | |
631 | the same address and the same region length: then we can handle a | |
632 | virtually unlimited number of watchpoints, due to debug register | |
633 | sharing implemented via reference counts. */ | |
9d19df75 MS |
634 | return 1; |
635 | } | |
636 | ||
0d5ed153 | 637 | /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address. |
9d19df75 MS |
638 | Return 0 on success, -1 on failure. */ |
639 | ||
640 | static int | |
23a26771 TT |
641 | aarch64_linux_insert_hw_breakpoint (struct target_ops *self, |
642 | struct gdbarch *gdbarch, | |
9d19df75 MS |
643 | struct bp_target_info *bp_tgt) |
644 | { | |
645 | int ret; | |
0d5ed153 | 646 | CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address; |
9d19df75 | 647 | const int len = 4; |
2ecd81c2 | 648 | const enum target_hw_bp_type type = hw_execute; |
c67ca4de YQ |
649 | struct aarch64_debug_reg_state *state |
650 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 651 | |
c5e92cca | 652 | if (show_debug_regs) |
9d19df75 MS |
653 | fprintf_unfiltered |
654 | (gdb_stdlog, | |
655 | "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n", | |
656 | (unsigned long) addr, len); | |
657 | ||
c67ca4de | 658 | ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state); |
9d19df75 | 659 | |
c5e92cca | 660 | if (show_debug_regs) |
d6c44983 | 661 | { |
d6c44983 | 662 | aarch64_show_debug_reg_state (state, |
2fd0f80d | 663 | "insert_hw_breakpoint", addr, len, type); |
d6c44983 | 664 | } |
9d19df75 MS |
665 | |
666 | return ret; | |
667 | } | |
668 | ||
669 | /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address. | |
670 | Return 0 on success, -1 on failure. */ | |
671 | ||
672 | static int | |
a64dc96c TT |
673 | aarch64_linux_remove_hw_breakpoint (struct target_ops *self, |
674 | struct gdbarch *gdbarch, | |
9d19df75 MS |
675 | struct bp_target_info *bp_tgt) |
676 | { | |
677 | int ret; | |
678 | CORE_ADDR addr = bp_tgt->placed_address; | |
679 | const int len = 4; | |
2ecd81c2 | 680 | const enum target_hw_bp_type type = hw_execute; |
c67ca4de YQ |
681 | struct aarch64_debug_reg_state *state |
682 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 683 | |
c5e92cca | 684 | if (show_debug_regs) |
9d19df75 MS |
685 | fprintf_unfiltered |
686 | (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n", | |
687 | (unsigned long) addr, len); | |
688 | ||
c67ca4de | 689 | ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state); |
9d19df75 | 690 | |
c5e92cca | 691 | if (show_debug_regs) |
d6c44983 | 692 | { |
d6c44983 YZ |
693 | aarch64_show_debug_reg_state (state, |
694 | "remove_hw_watchpoint", addr, len, type); | |
695 | } | |
9d19df75 MS |
696 | |
697 | return ret; | |
698 | } | |
699 | ||
9d19df75 MS |
700 | /* Implement the "to_insert_watchpoint" target_ops method. |
701 | ||
702 | Insert a watchpoint to watch a memory region which starts at | |
703 | address ADDR and whose length is LEN bytes. Watch memory accesses | |
704 | of the type TYPE. Return 0 on success, -1 on failure. */ | |
705 | ||
706 | static int | |
7bb99c53 | 707 | aarch64_linux_insert_watchpoint (struct target_ops *self, |
f486487f SM |
708 | CORE_ADDR addr, int len, |
709 | enum target_hw_bp_type type, | |
9d19df75 MS |
710 | struct expression *cond) |
711 | { | |
712 | int ret; | |
c67ca4de YQ |
713 | struct aarch64_debug_reg_state *state |
714 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 715 | |
c5e92cca | 716 | if (show_debug_regs) |
9d19df75 MS |
717 | fprintf_unfiltered (gdb_stdlog, |
718 | "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n", | |
719 | (unsigned long) addr, len); | |
720 | ||
721 | gdb_assert (type != hw_execute); | |
722 | ||
c67ca4de | 723 | ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state); |
9d19df75 | 724 | |
c5e92cca | 725 | if (show_debug_regs) |
d6c44983 | 726 | { |
d6c44983 YZ |
727 | aarch64_show_debug_reg_state (state, |
728 | "insert_watchpoint", addr, len, type); | |
729 | } | |
9d19df75 MS |
730 | |
731 | return ret; | |
732 | } | |
733 | ||
734 | /* Implement the "to_remove_watchpoint" target_ops method. | |
735 | Remove a watchpoint that watched the memory region which starts at | |
736 | address ADDR, whose length is LEN bytes, and for accesses of the | |
737 | type TYPE. Return 0 on success, -1 on failure. */ | |
738 | ||
739 | static int | |
11b5219a | 740 | aarch64_linux_remove_watchpoint (struct target_ops *self, |
f486487f SM |
741 | CORE_ADDR addr, int len, |
742 | enum target_hw_bp_type type, | |
9d19df75 MS |
743 | struct expression *cond) |
744 | { | |
745 | int ret; | |
c67ca4de YQ |
746 | struct aarch64_debug_reg_state *state |
747 | = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); | |
9d19df75 | 748 | |
c5e92cca | 749 | if (show_debug_regs) |
9d19df75 MS |
750 | fprintf_unfiltered (gdb_stdlog, |
751 | "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n", | |
752 | (unsigned long) addr, len); | |
753 | ||
754 | gdb_assert (type != hw_execute); | |
755 | ||
c67ca4de | 756 | ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state); |
9d19df75 | 757 | |
c5e92cca | 758 | if (show_debug_regs) |
d6c44983 | 759 | { |
d6c44983 YZ |
760 | aarch64_show_debug_reg_state (state, |
761 | "remove_watchpoint", addr, len, type); | |
762 | } | |
9d19df75 MS |
763 | |
764 | return ret; | |
765 | } | |
766 | ||
767 | /* Implement the "to_region_ok_for_hw_watchpoint" target_ops method. */ | |
768 | ||
769 | static int | |
31568a15 TT |
770 | aarch64_linux_region_ok_for_hw_watchpoint (struct target_ops *self, |
771 | CORE_ADDR addr, int len) | |
9d19df75 MS |
772 | { |
773 | CORE_ADDR aligned_addr; | |
774 | ||
775 | /* Can not set watchpoints for zero or negative lengths. */ | |
776 | if (len <= 0) | |
777 | return 0; | |
778 | ||
779 | /* Must have hardware watchpoint debug register(s). */ | |
780 | if (aarch64_num_wp_regs == 0) | |
781 | return 0; | |
782 | ||
783 | /* We support unaligned watchpoint address and arbitrary length, | |
784 | as long as the size of the whole watched area after alignment | |
785 | doesn't exceed size of the total area that all watchpoint debug | |
786 | registers can watch cooperatively. | |
787 | ||
788 | This is a very relaxed rule, but unfortunately there are | |
789 | limitations, e.g. false-positive hits, due to limited support of | |
790 | hardware debug registers in the kernel. See comment above | |
791 | aarch64_align_watchpoint for more information. */ | |
792 | ||
793 | aligned_addr = addr & ~(AARCH64_HWP_MAX_LEN_PER_REG - 1); | |
794 | if (aligned_addr + aarch64_num_wp_regs * AARCH64_HWP_MAX_LEN_PER_REG | |
795 | < addr + len) | |
796 | return 0; | |
797 | ||
798 | /* All tests passed so we are likely to be able to set the watchpoint. | |
799 | The reason that it is 'likely' rather than 'must' is because | |
800 | we don't check the current usage of the watchpoint registers, and | |
801 | there may not be enough registers available for this watchpoint. | |
802 | Ideally we should check the cached debug register state, however | |
803 | the checking is costly. */ | |
804 | return 1; | |
805 | } | |
806 | ||
807 | /* Implement the "to_stopped_data_address" target_ops method. */ | |
808 | ||
809 | static int | |
810 | aarch64_linux_stopped_data_address (struct target_ops *target, | |
811 | CORE_ADDR *addr_p) | |
812 | { | |
813 | siginfo_t siginfo; | |
814 | int i, tid; | |
815 | struct aarch64_debug_reg_state *state; | |
816 | ||
817 | if (!linux_nat_get_siginfo (inferior_ptid, &siginfo)) | |
818 | return 0; | |
819 | ||
820 | /* This must be a hardware breakpoint. */ | |
821 | if (siginfo.si_signo != SIGTRAP | |
822 | || (siginfo.si_code & 0xffff) != TRAP_HWBKPT) | |
823 | return 0; | |
824 | ||
825 | /* Check if the address matches any watched address. */ | |
d6c44983 | 826 | state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); |
9d19df75 MS |
827 | for (i = aarch64_num_wp_regs - 1; i >= 0; --i) |
828 | { | |
829 | const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]); | |
830 | const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr; | |
831 | const CORE_ADDR addr_watch = state->dr_addr_wp[i]; | |
832 | ||
833 | if (state->dr_ref_count_wp[i] | |
834 | && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i]) | |
835 | && addr_trap >= addr_watch | |
836 | && addr_trap < addr_watch + len) | |
837 | { | |
838 | *addr_p = addr_trap; | |
839 | return 1; | |
840 | } | |
841 | } | |
842 | ||
843 | return 0; | |
844 | } | |
845 | ||
846 | /* Implement the "to_stopped_by_watchpoint" target_ops method. */ | |
847 | ||
848 | static int | |
6a109b6b | 849 | aarch64_linux_stopped_by_watchpoint (struct target_ops *ops) |
9d19df75 MS |
850 | { |
851 | CORE_ADDR addr; | |
852 | ||
6a109b6b | 853 | return aarch64_linux_stopped_data_address (ops, &addr); |
9d19df75 MS |
854 | } |
855 | ||
856 | /* Implement the "to_watchpoint_addr_within_range" target_ops method. */ | |
857 | ||
858 | static int | |
859 | aarch64_linux_watchpoint_addr_within_range (struct target_ops *target, | |
860 | CORE_ADDR addr, | |
861 | CORE_ADDR start, int length) | |
862 | { | |
863 | return start <= addr && start + length - 1 >= addr; | |
864 | } | |
865 | ||
866 | /* Define AArch64 maintenance commands. */ | |
867 | ||
868 | static void | |
869 | add_show_debug_regs_command (void) | |
870 | { | |
871 | /* A maintenance command to enable printing the internal DRi mirror | |
872 | variables. */ | |
873 | add_setshow_boolean_cmd ("show-debug-regs", class_maintenance, | |
c5e92cca | 874 | &show_debug_regs, _("\ |
9d19df75 MS |
875 | Set whether to show variables that mirror the AArch64 debug registers."), _("\ |
876 | Show whether to show variables that mirror the AArch64 debug registers."), _("\ | |
877 | Use \"on\" to enable, \"off\" to disable.\n\ | |
878 | If enabled, the debug registers values are shown when GDB inserts\n\ | |
879 | or removes a hardware breakpoint or watchpoint, and when the inferior\n\ | |
880 | triggers a breakpoint or watchpoint."), | |
881 | NULL, | |
882 | NULL, | |
883 | &maintenance_set_cmdlist, | |
884 | &maintenance_show_cmdlist); | |
885 | } | |
886 | ||
887 | /* -Wmissing-prototypes. */ | |
888 | void _initialize_aarch64_linux_nat (void); | |
889 | ||
890 | void | |
891 | _initialize_aarch64_linux_nat (void) | |
892 | { | |
893 | struct target_ops *t; | |
894 | ||
895 | /* Fill in the generic GNU/Linux methods. */ | |
896 | t = linux_target (); | |
897 | ||
898 | add_show_debug_regs_command (); | |
899 | ||
900 | /* Add our register access methods. */ | |
901 | t->to_fetch_registers = aarch64_linux_fetch_inferior_registers; | |
902 | t->to_store_registers = aarch64_linux_store_inferior_registers; | |
903 | ||
904 | t->to_read_description = aarch64_linux_read_description; | |
905 | ||
906 | t->to_can_use_hw_breakpoint = aarch64_linux_can_use_hw_breakpoint; | |
907 | t->to_insert_hw_breakpoint = aarch64_linux_insert_hw_breakpoint; | |
908 | t->to_remove_hw_breakpoint = aarch64_linux_remove_hw_breakpoint; | |
909 | t->to_region_ok_for_hw_watchpoint = | |
910 | aarch64_linux_region_ok_for_hw_watchpoint; | |
911 | t->to_insert_watchpoint = aarch64_linux_insert_watchpoint; | |
912 | t->to_remove_watchpoint = aarch64_linux_remove_watchpoint; | |
913 | t->to_stopped_by_watchpoint = aarch64_linux_stopped_by_watchpoint; | |
914 | t->to_stopped_data_address = aarch64_linux_stopped_data_address; | |
915 | t->to_watchpoint_addr_within_range = | |
916 | aarch64_linux_watchpoint_addr_within_range; | |
9d19df75 MS |
917 | |
918 | /* Override the GNU/Linux inferior startup hook. */ | |
919 | super_post_startup_inferior = t->to_post_startup_inferior; | |
920 | t->to_post_startup_inferior = aarch64_linux_child_post_startup_inferior; | |
921 | ||
922 | /* Register the target. */ | |
923 | linux_nat_add_target (t); | |
924 | linux_nat_set_new_thread (t, aarch64_linux_new_thread); | |
d6c44983 YZ |
925 | linux_nat_set_new_fork (t, aarch64_linux_new_fork); |
926 | linux_nat_set_forget_process (t, aarch64_forget_process); | |
9d19df75 MS |
927 | linux_nat_set_prepare_to_resume (t, aarch64_linux_prepare_to_resume); |
928 | } |