Commit | Line | Data |
---|---|---|
e8bf1ce4 JB |
1 | /* Ravenscar Aarch64 target support. |
2 | ||
42a4f53d | 3 | Copyright (C) 2017-2019 Free Software Foundation, Inc. |
e8bf1ce4 JB |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
19 | ||
20 | #include "defs.h" | |
d55e5aa6 TT |
21 | |
22 | /* Local non-gdb includes. */ | |
23 | #include "aarch64-ravenscar-thread.h" | |
e8bf1ce4 | 24 | #include "aarch64-tdep.h" |
d55e5aa6 | 25 | #include "gdbcore.h" |
e8bf1ce4 JB |
26 | #include "inferior.h" |
27 | #include "ravenscar-thread.h" | |
d55e5aa6 | 28 | #include "regcache.h" |
e8bf1ce4 JB |
29 | |
30 | #define NO_OFFSET -1 | |
31 | ||
32 | /* See aarch64-tdep.h for register numbers. */ | |
33 | ||
34 | static const int aarch64_context_offsets[] = | |
35 | { | |
36 | /* X0 - X28 */ | |
37 | NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET, | |
38 | NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET, | |
39 | NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET, | |
40 | NO_OFFSET, NO_OFFSET, NO_OFFSET, NO_OFFSET, | |
41 | NO_OFFSET, NO_OFFSET, NO_OFFSET, 0, | |
42 | 8, 16, 24, 32, | |
43 | 40, 48, 56, 64, | |
44 | 72, | |
45 | ||
46 | /* FP, LR, SP, PC, CPSR */ | |
47 | /* Note that as task switch is synchronous, PC is in fact the LR here */ | |
48 | 80, 88, 96, 88, | |
49 | NO_OFFSET, | |
50 | ||
51 | /* Q0 - Q31 */ | |
52 | 112, 128, 144, 160, | |
53 | 176, 192, 208, 224, | |
54 | 240, 256, 272, 288, | |
55 | 304, 320, 336, 352, | |
56 | 368, 384, 400, 416, | |
57 | 432, 448, 464, 480, | |
58 | 496, 512, 528, 544, | |
59 | 560, 576, 592, 608, | |
60 | ||
61 | /* FPSR, FPCR */ | |
62 | 104, 108, | |
63 | ||
64 | /* FPU Saved field */ | |
65 | 624 | |
66 | }; | |
67 | ||
68 | /* The register layout info. */ | |
69 | ||
70 | struct ravenscar_reg_info | |
71 | { | |
72 | /* A table providing the offset relative to the context structure | |
73 | where each register is saved. */ | |
74 | const int *context_offsets; | |
75 | ||
76 | /* The number of elements in the context_offsets table above. */ | |
77 | int context_offsets_size; | |
78 | }; | |
79 | ||
80 | /* supply register REGNUM, which has been saved on REGISTER_ADDR, to the | |
81 | regcache. */ | |
82 | ||
83 | static void | |
84 | supply_register_at_address (struct regcache *regcache, int regnum, | |
85 | CORE_ADDR register_addr) | |
86 | { | |
87 | struct gdbarch *gdbarch = regcache->arch (); | |
88 | int buf_size = register_size (gdbarch, regnum); | |
89 | gdb_byte *buf; | |
90 | ||
91 | buf = (gdb_byte *) alloca (buf_size); | |
92 | read_memory (register_addr, buf, buf_size); | |
93 | regcache->raw_supply (regnum, buf); | |
94 | } | |
95 | ||
96 | /* Return true if, for a non-running thread, REGNUM has been saved on the | |
97 | Thread_Descriptor. */ | |
98 | ||
99 | static int | |
100 | register_in_thread_descriptor_p (const struct ravenscar_reg_info *reg_info, | |
101 | int regnum) | |
102 | { | |
103 | /* Check FPU registers */ | |
104 | return (regnum < reg_info->context_offsets_size | |
105 | && reg_info->context_offsets[regnum] != NO_OFFSET); | |
106 | } | |
107 | ||
108 | /* to_fetch_registers when inferior_ptid is different from the running | |
109 | thread. */ | |
110 | ||
111 | static void | |
112 | aarch64_ravenscar_generic_fetch_registers | |
113 | (const struct ravenscar_reg_info *reg_info, | |
114 | struct regcache *regcache, int regnum) | |
115 | { | |
116 | struct gdbarch *gdbarch = regcache->arch (); | |
117 | const int num_regs = gdbarch_num_regs (gdbarch); | |
118 | int current_regnum; | |
119 | CORE_ADDR current_address; | |
120 | CORE_ADDR thread_descriptor_address; | |
121 | ||
122 | /* The tid is the thread_id field, which is a pointer to the thread. */ | |
123 | thread_descriptor_address = (CORE_ADDR) inferior_ptid.tid (); | |
124 | ||
125 | /* Read registers. */ | |
126 | for (current_regnum = 0; current_regnum < num_regs; current_regnum++) | |
127 | { | |
128 | if (register_in_thread_descriptor_p (reg_info, current_regnum)) | |
129 | { | |
130 | current_address = thread_descriptor_address | |
131 | + reg_info->context_offsets[current_regnum]; | |
132 | supply_register_at_address (regcache, current_regnum, | |
133 | current_address); | |
134 | } | |
135 | } | |
136 | } | |
137 | ||
e8bf1ce4 JB |
138 | /* to_store_registers when inferior_ptid is different from the running |
139 | thread. */ | |
140 | ||
141 | static void | |
142 | aarch64_ravenscar_generic_store_registers | |
143 | (const struct ravenscar_reg_info *reg_info, | |
144 | struct regcache *regcache, int regnum) | |
145 | { | |
146 | struct gdbarch *gdbarch = regcache->arch (); | |
147 | int buf_size = register_size (gdbarch, regnum); | |
148 | gdb_byte buf[buf_size]; | |
149 | ULONGEST register_address; | |
150 | ||
151 | if (register_in_thread_descriptor_p (reg_info, regnum)) | |
152 | register_address | |
153 | = inferior_ptid.tid () + reg_info->context_offsets [regnum]; | |
154 | else | |
155 | return; | |
156 | ||
157 | regcache->raw_collect (regnum, buf); | |
158 | write_memory (register_address, | |
159 | buf, | |
160 | buf_size); | |
161 | } | |
162 | ||
163 | /* The ravenscar_reg_info for most Aarch64 targets. */ | |
164 | ||
165 | static const struct ravenscar_reg_info aarch64_reg_info = | |
166 | { | |
167 | aarch64_context_offsets, | |
168 | ARRAY_SIZE (aarch64_context_offsets), | |
169 | }; | |
170 | ||
7657f14d | 171 | struct aarch64_ravenscar_ops : public ravenscar_arch_ops |
e8bf1ce4 | 172 | { |
7657f14d TT |
173 | void fetch_registers (struct regcache *regcache, int regnum) override |
174 | { | |
175 | aarch64_ravenscar_generic_fetch_registers | |
176 | (&aarch64_reg_info, regcache, regnum); | |
177 | } | |
178 | ||
179 | void store_registers (struct regcache *regcache, int regnum) override | |
180 | { | |
181 | aarch64_ravenscar_generic_store_registers | |
182 | (&aarch64_reg_info, regcache, regnum); | |
183 | } | |
184 | }; | |
e8bf1ce4 JB |
185 | |
186 | /* The ravenscar_arch_ops vector for most Aarch64 targets. */ | |
187 | ||
7657f14d | 188 | static struct aarch64_ravenscar_ops aarch64_ravenscar_ops; |
e8bf1ce4 JB |
189 | |
190 | /* Register aarch64_ravenscar_ops in GDBARCH. */ | |
191 | ||
192 | void | |
193 | register_aarch64_ravenscar_ops (struct gdbarch *gdbarch) | |
194 | { | |
195 | set_gdbarch_ravenscar_ops (gdbarch, &aarch64_ravenscar_ops); | |
196 | } |