* alpha-tdep.c (alpha_push_dummy_call): Handle COMPLEX types.
[deliverable/binutils-gdb.git] / gdb / alpha-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
1e698235 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
b6ba6518 3 Free Software Foundation, Inc.
c906108c 4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
615967cb 23#include "doublest.h"
c906108c 24#include "frame.h"
d2427a71
RH
25#include "frame-unwind.h"
26#include "frame-base.h"
c906108c
SS
27#include "inferior.h"
28#include "symtab.h"
29#include "value.h"
30#include "gdbcmd.h"
31#include "gdbcore.h"
32#include "dis-asm.h"
33#include "symfile.h"
34#include "objfiles.h"
35#include "gdb_string.h"
c5f0f3d0 36#include "linespec.h"
4e052eda 37#include "regcache.h"
615967cb 38#include "reggroups.h"
dc129d82 39#include "arch-utils.h"
4be87837 40#include "osabi.h"
fe898f56 41#include "block.h"
dc129d82
JT
42
43#include "elf-bfd.h"
44
45#include "alpha-tdep.h"
46
c906108c 47\f
fa88f677 48static const char *
636a6dfc
JT
49alpha_register_name (int regno)
50{
5ab84872 51 static const char * const register_names[] =
636a6dfc
JT
52 {
53 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
54 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
55 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
56 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
57 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
58 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
59 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
60 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
44d88583 61 "pc", "", "unique"
636a6dfc
JT
62 };
63
64 if (regno < 0)
5ab84872 65 return NULL;
636a6dfc 66 if (regno >= (sizeof(register_names) / sizeof(*register_names)))
5ab84872
RH
67 return NULL;
68 return register_names[regno];
636a6dfc 69}
d734c450 70
dc129d82 71static int
d734c450
JT
72alpha_cannot_fetch_register (int regno)
73{
44d88583 74 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
75}
76
dc129d82 77static int
d734c450
JT
78alpha_cannot_store_register (int regno)
79{
44d88583 80 return regno == ALPHA_ZERO_REGNUM;
d734c450
JT
81}
82
dc129d82 83static int
d734c450
JT
84alpha_register_convertible (int regno)
85{
86 return (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31);
87}
0d056799 88
dc129d82 89static struct type *
0d056799
JT
90alpha_register_virtual_type (int regno)
91{
72667056
RH
92 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
93 return builtin_type_void_data_ptr;
94 if (regno == ALPHA_PC_REGNUM)
95 return builtin_type_void_func_ptr;
96
97 /* Don't need to worry about little vs big endian until
98 some jerk tries to port to alpha-unicosmk. */
99 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 31)
100 return builtin_type_ieee_double_little;
101
102 return builtin_type_int64;
0d056799 103}
f8453e34 104
615967cb
RH
105/* Is REGNUM a member of REGGROUP? */
106
107static int
108alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
109 struct reggroup *group)
110{
111 /* Filter out any registers eliminated, but whose regnum is
112 reserved for backward compatibility, e.g. the vfp. */
113 if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
114 return 0;
115
116 /* Since we implement no pseudo registers, save/restore is equal to all. */
117 if (group == all_reggroup
118 || group == save_reggroup
119 || group == restore_reggroup)
120 return 1;
121
122 /* All other groups are non-overlapping. */
123
124 /* Since this is really a PALcode memory slot... */
125 if (regnum == ALPHA_UNIQUE_REGNUM)
126 return group == system_reggroup;
127
128 /* Force the FPCR to be considered part of the floating point state. */
129 if (regnum == ALPHA_FPCR_REGNUM)
130 return group == float_reggroup;
131
132 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
133 return group == float_reggroup;
134 else
135 return group == general_reggroup;
136}
137
dc129d82 138static int
f8453e34
JT
139alpha_register_byte (int regno)
140{
141 return (regno * 8);
142}
143
dc129d82 144static int
f8453e34
JT
145alpha_register_raw_size (int regno)
146{
147 return 8;
148}
149
dc129d82 150static int
f8453e34
JT
151alpha_register_virtual_size (int regno)
152{
153 return 8;
154}
636a6dfc 155
d2427a71
RH
156/* The alpha needs a conversion between register and memory format if the
157 register is a floating point register and memory format is float, as the
158 register format must be double or memory format is an integer with 4
159 bytes or less, as the representation of integers in floating point
160 registers is different. */
161
14696584
RH
162static void
163alpha_convert_flt_dbl (void *out, const void *in)
164{
165 DOUBLEST d = extract_typed_floating (in, builtin_type_ieee_single_little);
166 store_typed_floating (out, builtin_type_ieee_double_little, d);
167}
168
169static void
170alpha_convert_dbl_flt (void *out, const void *in)
171{
172 DOUBLEST d = extract_typed_floating (in, builtin_type_ieee_double_little);
173 store_typed_floating (out, builtin_type_ieee_single_little, d);
174}
175
d2427a71
RH
176static void
177alpha_register_convert_to_virtual (int regnum, struct type *valtype,
178 char *raw_buffer, char *virtual_buffer)
5868c862 179{
14696584 180 if (TYPE_LENGTH (valtype) >= ALPHA_REGISTER_SIZE)
d2427a71 181 {
14696584 182 memcpy (virtual_buffer, raw_buffer, ALPHA_REGISTER_SIZE);
d2427a71
RH
183 return;
184 }
185
14696584
RH
186 /* Note that everything below is less than 8 bytes long. */
187
d2427a71 188 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
14696584
RH
189 alpha_convert_dbl_flt (virtual_buffer, raw_buffer);
190 else if (TYPE_CODE (valtype) == TYPE_CODE_INT)
d2427a71
RH
191 {
192 ULONGEST l;
14696584 193 l = extract_unsigned_integer (raw_buffer, ALPHA_REGISTER_SIZE);
d2427a71
RH
194 l = ((l >> 32) & 0xc0000000) | ((l >> 29) & 0x3fffffff);
195 store_unsigned_integer (virtual_buffer, TYPE_LENGTH (valtype), l);
196 }
197 else
198 error ("Cannot retrieve value from floating point register");
199}
5868c862 200
d2427a71
RH
201static void
202alpha_register_convert_to_raw (struct type *valtype, int regnum,
203 char *virtual_buffer, char *raw_buffer)
204{
14696584 205 if (TYPE_LENGTH (valtype) >= ALPHA_REGISTER_SIZE)
d2427a71 206 {
14696584 207 memcpy (raw_buffer, virtual_buffer, ALPHA_REGISTER_SIZE);
d2427a71
RH
208 return;
209 }
5868c862 210
14696584
RH
211 /* Note that everything below is less than 8 bytes long. */
212
d2427a71 213 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
14696584
RH
214 alpha_convert_flt_dbl (raw_buffer, virtual_buffer);
215 else if (TYPE_CODE (valtype) == TYPE_CODE_INT)
d2427a71 216 {
14696584 217 ULONGEST l = unpack_long (valtype, virtual_buffer);
d2427a71 218 l = ((l & 0xc0000000) << 32) | ((l & 0x3fffffff) << 29);
14696584 219 store_unsigned_integer (raw_buffer, ALPHA_REGISTER_SIZE, l);
d2427a71
RH
220 }
221 else
222 error ("Cannot store value in floating point register");
5868c862
JT
223}
224
d2427a71
RH
225\f
226/* The alpha passes the first six arguments in the registers, the rest on
c88e30c0
RH
227 the stack. The register arguments are stored in ARG_REG_BUFFER, and
228 then moved into the register file; this simplifies the passing of a
229 large struct which extends from the registers to the stack, plus avoids
230 three ptrace invocations per word.
231
232 We don't bother tracking which register values should go in integer
233 regs or fp regs; we load the same values into both.
234
d2427a71
RH
235 If the called function is returning a structure, the address of the
236 structure to be returned is passed as a hidden first argument. */
c906108c 237
d2427a71 238static CORE_ADDR
c88e30c0
RH
239alpha_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
240 struct regcache *regcache, CORE_ADDR bp_addr,
241 int nargs, struct value **args, CORE_ADDR sp,
242 int struct_return, CORE_ADDR struct_addr)
c906108c 243{
d2427a71
RH
244 int i;
245 int accumulate_size = struct_return ? 8 : 0;
d2427a71 246 struct alpha_arg
c906108c 247 {
d2427a71
RH
248 char *contents;
249 int len;
250 int offset;
251 };
c88e30c0
RH
252 struct alpha_arg *alpha_args
253 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
d2427a71 254 register struct alpha_arg *m_arg;
c88e30c0 255 char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
d2427a71 256 int required_arg_regs;
c906108c 257
c88e30c0
RH
258 /* The ABI places the address of the called function in T12. */
259 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
260
261 /* Set the return address register to point to the entry point
262 of the program, where a breakpoint lies in wait. */
263 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
264
265 /* Lay out the arguments in memory. */
d2427a71
RH
266 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
267 {
268 struct value *arg = args[i];
269 struct type *arg_type = check_typedef (VALUE_TYPE (arg));
c88e30c0 270
d2427a71
RH
271 /* Cast argument to long if necessary as the compiler does it too. */
272 switch (TYPE_CODE (arg_type))
c906108c 273 {
d2427a71
RH
274 case TYPE_CODE_INT:
275 case TYPE_CODE_BOOL:
276 case TYPE_CODE_CHAR:
277 case TYPE_CODE_RANGE:
278 case TYPE_CODE_ENUM:
279 if (TYPE_LENGTH (arg_type) < TYPE_LENGTH (builtin_type_long))
280 {
281 arg_type = builtin_type_long;
282 arg = value_cast (arg_type, arg);
283 }
284 break;
7b5e1cb3 285
c88e30c0
RH
286 case TYPE_CODE_FLT:
287 /* "float" arguments loaded in registers must be passed in
288 register format, aka "double". */
289 if (accumulate_size < sizeof (arg_reg_buffer)
290 && TYPE_LENGTH (arg_type) == 4)
291 {
292 arg_type = builtin_type_double;
293 arg = value_cast (arg_type, arg);
294 }
295 /* Tru64 5.1 has a 128-bit long double, and passes this by
296 invisible reference. No one else uses this data type. */
297 else if (TYPE_LENGTH (arg_type) == 16)
298 {
299 /* Allocate aligned storage. */
300 sp = (sp & -16) - 16;
301
302 /* Write the real data into the stack. */
303 write_memory (sp, VALUE_CONTENTS (arg), 16);
304
305 /* Construct the indirection. */
306 arg_type = lookup_pointer_type (arg_type);
307 arg = value_from_pointer (arg_type, sp);
308 }
309 break;
7b5e1cb3
RH
310
311 case TYPE_CODE_COMPLEX:
312 /* ??? The ABI says that complex values are passed as two
313 separate scalar values. This distinction only matters
314 for complex float. However, GCC does not implement this. */
315
316 /* Tru64 5.1 has a 128-bit long double, and passes this by
317 invisible reference. */
318 if (TYPE_LENGTH (arg_type) == 32)
319 {
320 /* Allocate aligned storage. */
321 sp = (sp & -16) - 16;
322
323 /* Write the real data into the stack. */
324 write_memory (sp, VALUE_CONTENTS (arg), 32);
325
326 /* Construct the indirection. */
327 arg_type = lookup_pointer_type (arg_type);
328 arg = value_from_pointer (arg_type, sp);
329 }
330 break;
331
d2427a71
RH
332 default:
333 break;
c906108c 334 }
d2427a71
RH
335 m_arg->len = TYPE_LENGTH (arg_type);
336 m_arg->offset = accumulate_size;
337 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
338 m_arg->contents = VALUE_CONTENTS (arg);
c906108c
SS
339 }
340
d2427a71
RH
341 /* Determine required argument register loads, loading an argument register
342 is expensive as it uses three ptrace calls. */
343 required_arg_regs = accumulate_size / 8;
344 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
345 required_arg_regs = ALPHA_NUM_ARG_REGS;
c906108c 346
d2427a71 347 /* Make room for the arguments on the stack. */
c88e30c0
RH
348 if (accumulate_size < sizeof(arg_reg_buffer))
349 accumulate_size = 0;
350 else
351 accumulate_size -= sizeof(arg_reg_buffer);
d2427a71 352 sp -= accumulate_size;
c906108c 353
c88e30c0 354 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
d2427a71 355 sp &= ~15;
c906108c 356
d2427a71
RH
357 /* `Push' arguments on the stack. */
358 for (i = nargs; m_arg--, --i >= 0;)
c906108c 359 {
c88e30c0
RH
360 char *contents = m_arg->contents;
361 int offset = m_arg->offset;
362 int len = m_arg->len;
363
364 /* Copy the bytes destined for registers into arg_reg_buffer. */
365 if (offset < sizeof(arg_reg_buffer))
366 {
367 if (offset + len <= sizeof(arg_reg_buffer))
368 {
369 memcpy (arg_reg_buffer + offset, contents, len);
370 continue;
371 }
372 else
373 {
374 int tlen = sizeof(arg_reg_buffer) - offset;
375 memcpy (arg_reg_buffer + offset, contents, tlen);
376 offset += tlen;
377 contents += tlen;
378 len -= tlen;
379 }
380 }
381
382 /* Everything else goes to the stack. */
383 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
c906108c 384 }
c88e30c0
RH
385 if (struct_return)
386 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
c906108c 387
d2427a71
RH
388 /* Load the argument registers. */
389 for (i = 0; i < required_arg_regs; i++)
390 {
09cc52fd
RH
391 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
392 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
393 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i,
394 arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
d2427a71 395 }
c906108c 396
09cc52fd
RH
397 /* Finally, update the stack pointer. */
398 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp);
399
c88e30c0 400 return sp;
c906108c
SS
401}
402
5ec2bb99
RH
403/* Extract from REGCACHE the value about to be returned from a function
404 and copy it into VALBUF. */
d2427a71 405
dc129d82 406static void
5ec2bb99
RH
407alpha_extract_return_value (struct type *valtype, struct regcache *regcache,
408 void *valbuf)
140f9984 409{
7b5e1cb3 410 int length = TYPE_LENGTH (valtype);
5ec2bb99
RH
411 char raw_buffer[ALPHA_REGISTER_SIZE];
412 ULONGEST l;
413
414 switch (TYPE_CODE (valtype))
415 {
416 case TYPE_CODE_FLT:
7b5e1cb3 417 switch (length)
5ec2bb99
RH
418 {
419 case 4:
420 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
421 alpha_convert_dbl_flt (valbuf, raw_buffer);
422 break;
423
424 case 8:
425 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
426 break;
427
24064b5c
RH
428 case 16:
429 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
430 read_memory (l, valbuf, 16);
431 break;
432
5ec2bb99
RH
433 default:
434 abort ();
435 }
436 break;
437
7b5e1cb3
RH
438 case TYPE_CODE_COMPLEX:
439 switch (length)
440 {
441 case 8:
442 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
443 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
444 break;
445
446 case 16:
447 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
448 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM+1,
449 (char *)valbuf + 8);
450 break;
451
452 case 32:
453 regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l);
454 read_memory (l, valbuf, 32);
455 break;
456
457 default:
458 abort ();
459 }
460 break;
461
5ec2bb99
RH
462 default:
463 /* Assume everything else degenerates to an integer. */
464 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
7b5e1cb3 465 store_unsigned_integer (valbuf, length, l);
5ec2bb99
RH
466 break;
467 }
140f9984
JT
468}
469
5ec2bb99
RH
470/* Extract from REGCACHE the address of a structure about to be returned
471 from a function. */
472
473static CORE_ADDR
474alpha_extract_struct_value_address (struct regcache *regcache)
475{
476 ULONGEST addr;
477 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr);
478 return addr;
479}
480
481/* Insert the given value into REGCACHE as if it was being
482 returned by a function. */
0d056799 483
d2427a71 484static void
5ec2bb99
RH
485alpha_store_return_value (struct type *valtype, struct regcache *regcache,
486 const void *valbuf)
c906108c 487{
d2427a71 488 int length = TYPE_LENGTH (valtype);
5ec2bb99
RH
489 char raw_buffer[ALPHA_REGISTER_SIZE];
490 ULONGEST l;
d2427a71 491
5ec2bb99 492 switch (TYPE_CODE (valtype))
c906108c 493 {
5ec2bb99
RH
494 case TYPE_CODE_FLT:
495 switch (length)
496 {
497 case 4:
498 alpha_convert_flt_dbl (raw_buffer, valbuf);
499 valbuf = raw_buffer;
500 /* FALLTHRU */
501
502 case 8:
503 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
504 break;
505
24064b5c
RH
506 case 16:
507 /* FIXME: 128-bit long doubles are returned like structures:
508 by writing into indirect storage provided by the caller
509 as the first argument. */
510 error ("Cannot set a 128-bit long double return value.");
511
5ec2bb99
RH
512 default:
513 abort ();
514 }
515 break;
d2427a71 516
7b5e1cb3
RH
517 case TYPE_CODE_COMPLEX:
518 switch (length)
519 {
520 case 8:
521 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
522 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
523 break;
524
525 case 16:
526 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
527 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM+1,
528 (const char *)valbuf + 8);
529 break;
530
531 case 32:
532 /* FIXME: 128-bit long doubles are returned like structures:
533 by writing into indirect storage provided by the caller
534 as the first argument. */
535 error ("Cannot set a 128-bit long double return value.");
536
537 default:
538 abort ();
539 }
540 break;
541
5ec2bb99
RH
542 default:
543 /* Assume everything else degenerates to an integer. */
544 l = unpack_long (valtype, valbuf);
545 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l);
546 break;
547 }
c906108c
SS
548}
549
d2427a71
RH
550static int
551alpha_use_struct_convention (int gcc_p, struct type *type)
c906108c 552{
d2427a71
RH
553 /* Structures are returned by ref in extra arg0. */
554 return 1;
555}
c906108c 556
d2427a71
RH
557\f
558static const unsigned char *
559alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
c906108c 560{
d2427a71
RH
561 static const unsigned char alpha_breakpoint[] =
562 { 0x80, 0, 0, 0 }; /* call_pal bpt */
c906108c 563
d2427a71
RH
564 *lenptr = sizeof(alpha_breakpoint);
565 return (alpha_breakpoint);
566}
c906108c 567
d2427a71
RH
568\f
569/* This returns the PC of the first insn after the prologue.
570 If we can't find the prologue, then return 0. */
c906108c 571
d2427a71
RH
572CORE_ADDR
573alpha_after_prologue (CORE_ADDR pc)
c906108c 574{
d2427a71
RH
575 struct symtab_and_line sal;
576 CORE_ADDR func_addr, func_end;
c906108c 577
d2427a71 578 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
c5aa993b 579 return 0;
c906108c 580
d2427a71
RH
581 sal = find_pc_line (func_addr, 0);
582 if (sal.end < func_end)
583 return sal.end;
c5aa993b 584
d2427a71
RH
585 /* The line after the prologue is after the end of the function. In this
586 case, tell the caller to find the prologue the hard way. */
587 return 0;
c906108c
SS
588}
589
d2427a71
RH
590/* Read an instruction from memory at PC, looking through breakpoints. */
591
592unsigned int
593alpha_read_insn (CORE_ADDR pc)
c906108c 594{
d2427a71
RH
595 char buf[4];
596 int status;
c5aa993b 597
d2427a71
RH
598 status = read_memory_nobpt (pc, buf, 4);
599 if (status)
600 memory_error (status, pc);
601 return extract_unsigned_integer (buf, 4);
602}
c5aa993b 603
d2427a71
RH
604/* To skip prologues, I use this predicate. Returns either PC itself
605 if the code at PC does not look like a function prologue; otherwise
606 returns an address that (if we're lucky) follows the prologue. If
607 LENIENT, then we must skip everything which is involved in setting
608 up the frame (it's OK to skip more, just so long as we don't skip
609 anything which might clobber the registers which are being saved. */
c906108c 610
d2427a71
RH
611static CORE_ADDR
612alpha_skip_prologue (CORE_ADDR pc)
613{
614 unsigned long inst;
615 int offset;
616 CORE_ADDR post_prologue_pc;
617 char buf[4];
c906108c 618
d2427a71
RH
619 /* Silently return the unaltered pc upon memory errors.
620 This could happen on OSF/1 if decode_line_1 tries to skip the
621 prologue for quickstarted shared library functions when the
622 shared library is not yet mapped in.
623 Reading target memory is slow over serial lines, so we perform
624 this check only if the target has shared libraries (which all
625 Alpha targets do). */
626 if (target_read_memory (pc, buf, 4))
627 return pc;
c906108c 628
d2427a71
RH
629 /* See if we can determine the end of the prologue via the symbol table.
630 If so, then return either PC, or the PC after the prologue, whichever
631 is greater. */
c906108c 632
d2427a71
RH
633 post_prologue_pc = alpha_after_prologue (pc);
634 if (post_prologue_pc != 0)
635 return max (pc, post_prologue_pc);
c906108c 636
d2427a71
RH
637 /* Can't determine prologue from the symbol table, need to examine
638 instructions. */
dc1b0db2 639
d2427a71
RH
640 /* Skip the typical prologue instructions. These are the stack adjustment
641 instruction and the instructions that save registers on the stack
642 or in the gcc frame. */
643 for (offset = 0; offset < 100; offset += 4)
644 {
645 inst = alpha_read_insn (pc + offset);
c906108c 646
d2427a71
RH
647 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
648 continue;
649 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
650 continue;
651 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
652 continue;
653 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
654 continue;
c906108c 655
d2427a71
RH
656 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
657 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
658 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
659 continue;
c906108c 660
d2427a71
RH
661 if (inst == 0x47de040f) /* bis sp,sp,fp */
662 continue;
663 if (inst == 0x47fe040f) /* bis zero,sp,fp */
664 continue;
c906108c 665
d2427a71 666 break;
c906108c 667 }
d2427a71
RH
668 return pc + offset;
669}
c906108c 670
d2427a71
RH
671\f
672/* Figure out where the longjmp will land.
673 We expect the first arg to be a pointer to the jmp_buf structure from
674 which we extract the PC (JB_PC) that we will land at. The PC is copied
675 into the "pc". This routine returns true on success. */
c906108c
SS
676
677static int
d2427a71 678alpha_get_longjmp_target (CORE_ADDR *pc)
c906108c 679{
d2427a71
RH
680 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
681 CORE_ADDR jb_addr;
5ab84872 682 char raw_buffer[ALPHA_REGISTER_SIZE];
c906108c 683
d2427a71 684 jb_addr = read_register (ALPHA_A0_REGNUM);
c906108c 685
d2427a71
RH
686 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
687 raw_buffer, tdep->jb_elt_size))
c906108c 688 return 0;
d2427a71 689
7c0b4a20 690 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
d2427a71 691 return 1;
c906108c
SS
692}
693
d2427a71
RH
694\f
695/* Frame unwinder for signal trampolines. We use alpha tdep bits that
696 describe the location and shape of the sigcontext structure. After
697 that, all registers are in memory, so it's easy. */
698/* ??? Shouldn't we be able to do this generically, rather than with
699 OSABI data specific to Alpha? */
700
701struct alpha_sigtramp_unwind_cache
c906108c 702{
d2427a71
RH
703 CORE_ADDR sigcontext_addr;
704};
c906108c 705
d2427a71
RH
706static struct alpha_sigtramp_unwind_cache *
707alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
708 void **this_prologue_cache)
709{
710 struct alpha_sigtramp_unwind_cache *info;
711 struct gdbarch_tdep *tdep;
c906108c 712
d2427a71
RH
713 if (*this_prologue_cache)
714 return *this_prologue_cache;
c906108c 715
d2427a71
RH
716 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
717 *this_prologue_cache = info;
c906108c 718
d2427a71
RH
719 tdep = gdbarch_tdep (current_gdbarch);
720 info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
c906108c 721
d2427a71 722 return info;
c906108c
SS
723}
724
d2427a71
RH
725/* Return the address of REGNO in a sigtramp frame. Since this is all
726 arithmetic, it doesn't seem worthwhile to cache it. */
c5aa993b 727
d2427a71
RH
728#ifndef SIGFRAME_PC_OFF
729#define SIGFRAME_PC_OFF (2 * 8)
730#define SIGFRAME_REGSAVE_OFF (4 * 8)
731#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_REGSAVE_OFF + 32 * 8 + 8)
732#endif
c5aa993b 733
d2427a71
RH
734static CORE_ADDR
735alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, unsigned int regno)
736{
737 if (regno < 32)
738 return sigcontext_addr + SIGFRAME_REGSAVE_OFF + regno * 8;
739 if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32)
740 return sigcontext_addr + SIGFRAME_FPREGSAVE_OFF + regno * 8;
741 if (regno == PC_REGNUM)
742 return sigcontext_addr + SIGFRAME_PC_OFF;
c5aa993b 743
d2427a71 744 return 0;
c906108c
SS
745}
746
d2427a71
RH
747/* Given a GDB frame, determine the address of the calling function's
748 frame. This will be used to create a new GDB frame struct. */
140f9984 749
dc129d82 750static void
d2427a71
RH
751alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
752 void **this_prologue_cache,
753 struct frame_id *this_id)
c906108c 754{
d2427a71
RH
755 struct alpha_sigtramp_unwind_cache *info
756 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
757 struct gdbarch_tdep *tdep;
758 CORE_ADDR stack_addr, code_addr;
759
760 /* If the OSABI couldn't locate the sigcontext, give up. */
761 if (info->sigcontext_addr == 0)
762 return;
763
764 /* If we have dynamic signal trampolines, find their start.
765 If we do not, then we must assume there is a symbol record
766 that can provide the start address. */
767 tdep = gdbarch_tdep (current_gdbarch);
768 if (tdep->dynamic_sigtramp_offset)
c906108c 769 {
d2427a71
RH
770 int offset;
771 code_addr = frame_pc_unwind (next_frame);
772 offset = tdep->dynamic_sigtramp_offset (code_addr);
773 if (offset >= 0)
774 code_addr -= offset;
c906108c 775 else
d2427a71 776 code_addr = 0;
c906108c 777 }
d2427a71
RH
778 else
779 code_addr = frame_func_unwind (next_frame);
c906108c 780
d2427a71
RH
781 /* The stack address is trivially read from the sigcontext. */
782 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr,
783 ALPHA_SP_REGNUM);
784 stack_addr = read_memory_unsigned_integer (stack_addr, ALPHA_REGISTER_SIZE);
c906108c 785
d2427a71 786 *this_id = frame_id_build (stack_addr, code_addr);
c906108c
SS
787}
788
d2427a71 789/* Retrieve the value of REGNUM in FRAME. Don't give up! */
c906108c 790
d2427a71
RH
791static void
792alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
793 void **this_prologue_cache,
794 int regnum, int *optimizedp,
795 enum lval_type *lvalp, CORE_ADDR *addrp,
796 int *realnump, void *bufferp)
c906108c 797{
d2427a71
RH
798 struct alpha_sigtramp_unwind_cache *info
799 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
800 CORE_ADDR addr;
c906108c 801
d2427a71 802 if (info->sigcontext_addr != 0)
c906108c 803 {
d2427a71
RH
804 /* All integer and fp registers are stored in memory. */
805 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum);
806 if (addr != 0)
c906108c 807 {
d2427a71
RH
808 *optimizedp = 0;
809 *lvalp = lval_memory;
810 *addrp = addr;
811 *realnump = -1;
812 if (bufferp != NULL)
813 read_memory (addr, bufferp, ALPHA_REGISTER_SIZE);
814 return;
c906108c 815 }
c906108c
SS
816 }
817
d2427a71
RH
818 /* This extra register may actually be in the sigcontext, but our
819 current description of it in alpha_sigtramp_frame_unwind_cache
820 doesn't include it. Too bad. Fall back on whatever's in the
821 outer frame. */
822 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
823 realnump, bufferp);
824}
c906108c 825
d2427a71
RH
826static const struct frame_unwind alpha_sigtramp_frame_unwind = {
827 SIGTRAMP_FRAME,
828 alpha_sigtramp_frame_this_id,
829 alpha_sigtramp_frame_prev_register
830};
c906108c 831
d2427a71
RH
832static const struct frame_unwind *
833alpha_sigtramp_frame_p (CORE_ADDR pc)
834{
835 char *name;
c906108c 836
d2427a71
RH
837 /* We shouldn't even bother to try if the OSABI didn't register
838 a sigcontext_addr handler. */
839 if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr)
840 return NULL;
c906108c 841
d2427a71
RH
842 /* Otherwise we should be in a signal frame. */
843 find_pc_partial_function (pc, &name, NULL, NULL);
844 if (PC_IN_SIGTRAMP (pc, name))
845 return &alpha_sigtramp_frame_unwind;
c906108c 846
d2427a71 847 return NULL;
c906108c 848}
d2427a71
RH
849\f
850/* Fallback alpha frame unwinder. Uses instruction scanning and knows
851 something about the traditional layout of alpha stack frames. */
c906108c 852
d2427a71 853struct alpha_heuristic_unwind_cache
c906108c 854{
d2427a71
RH
855 CORE_ADDR *saved_regs;
856 CORE_ADDR vfp;
857 CORE_ADDR start_pc;
858 int return_reg;
859};
c906108c 860
d2427a71
RH
861/* Heuristic_proc_start may hunt through the text section for a long
862 time across a 2400 baud serial line. Allows the user to limit this
863 search. */
864static unsigned int heuristic_fence_post = 0;
c906108c 865
d2427a71
RH
866/* Attempt to locate the start of the function containing PC. We assume that
867 the previous function ends with an about_to_return insn. Not foolproof by
868 any means, since gcc is happy to put the epilogue in the middle of a
869 function. But we're guessing anyway... */
c906108c 870
d2427a71
RH
871static CORE_ADDR
872alpha_heuristic_proc_start (CORE_ADDR pc)
873{
874 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
875 CORE_ADDR last_non_nop = pc;
876 CORE_ADDR fence = pc - heuristic_fence_post;
877 CORE_ADDR orig_pc = pc;
fbe586ae 878 CORE_ADDR func;
9e0b60a8 879
d2427a71
RH
880 if (pc == 0)
881 return 0;
9e0b60a8 882
fbe586ae
RH
883 /* First see if we can find the start of the function from minimal
884 symbol information. This can succeed with a binary that doesn't
885 have debug info, but hasn't been stripped. */
886 func = get_pc_function_start (pc);
887 if (func)
888 return func;
889
d2427a71
RH
890 if (heuristic_fence_post == UINT_MAX
891 || fence < tdep->vm_min_address)
892 fence = tdep->vm_min_address;
c906108c 893
d2427a71
RH
894 /* Search back for previous return; also stop at a 0, which might be
895 seen for instance before the start of a code section. Don't include
896 nops, since this usually indicates padding between functions. */
897 for (pc -= 4; pc >= fence; pc -= 4)
c906108c 898 {
d2427a71
RH
899 unsigned int insn = alpha_read_insn (pc);
900 switch (insn)
c906108c 901 {
d2427a71
RH
902 case 0: /* invalid insn */
903 case 0x6bfa8001: /* ret $31,($26),1 */
904 return last_non_nop;
905
906 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
907 case 0x47ff041f: /* nop: bis $31,$31,$31 */
908 break;
909
910 default:
911 last_non_nop = pc;
912 break;
c906108c 913 }
d2427a71 914 }
c906108c 915
d2427a71
RH
916 /* It's not clear to me why we reach this point when stopping quietly,
917 but with this test, at least we don't print out warnings for every
918 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
919 if (stop_soon == NO_STOP_QUIETLY)
920 {
921 static int blurb_printed = 0;
c906108c 922
d2427a71
RH
923 if (fence == tdep->vm_min_address)
924 warning ("Hit beginning of text section without finding");
c906108c 925 else
d2427a71
RH
926 warning ("Hit heuristic-fence-post without finding");
927 warning ("enclosing function for address 0x%s", paddr_nz (orig_pc));
c906108c 928
d2427a71
RH
929 if (!blurb_printed)
930 {
931 printf_filtered ("\
932This warning occurs if you are debugging a function without any symbols\n\
933(for example, in a stripped executable). In that case, you may wish to\n\
934increase the size of the search with the `set heuristic-fence-post' command.\n\
935\n\
936Otherwise, you told GDB there was a function where there isn't one, or\n\
937(more likely) you have encountered a bug in GDB.\n");
938 blurb_printed = 1;
939 }
940 }
c906108c 941
d2427a71
RH
942 return 0;
943}
c906108c 944
fbe586ae 945static struct alpha_heuristic_unwind_cache *
d2427a71
RH
946alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
947 void **this_prologue_cache,
948 CORE_ADDR start_pc)
949{
950 struct alpha_heuristic_unwind_cache *info;
951 ULONGEST val;
952 CORE_ADDR limit_pc, cur_pc;
953 int frame_reg, frame_size, return_reg, reg;
c906108c 954
d2427a71
RH
955 if (*this_prologue_cache)
956 return *this_prologue_cache;
c906108c 957
d2427a71
RH
958 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
959 *this_prologue_cache = info;
960 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS);
c906108c 961
d2427a71
RH
962 limit_pc = frame_pc_unwind (next_frame);
963 if (start_pc == 0)
964 start_pc = alpha_heuristic_proc_start (limit_pc);
965 info->start_pc = start_pc;
c906108c 966
d2427a71
RH
967 frame_reg = ALPHA_SP_REGNUM;
968 frame_size = 0;
969 return_reg = -1;
c906108c 970
d2427a71
RH
971 /* If we've identified a likely place to start, do code scanning. */
972 if (start_pc != 0)
c5aa993b 973 {
d2427a71
RH
974 /* Limit the forward search to 50 instructions. */
975 if (start_pc + 200 < limit_pc)
976 limit_pc = start_pc + 200;
c5aa993b 977
d2427a71
RH
978 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4)
979 {
980 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 981
d2427a71
RH
982 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
983 {
984 if (word & 0x8000)
985 {
986 /* Consider only the first stack allocation instruction
987 to contain the static size of the frame. */
988 if (frame_size == 0)
989 frame_size = (-word) & 0xffff;
990 }
991 else
992 {
993 /* Exit loop if a positive stack adjustment is found, which
994 usually means that the stack cleanup code in the function
995 epilogue is reached. */
996 break;
997 }
998 }
999 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1000 {
1001 reg = (word & 0x03e00000) >> 21;
1002
1003 if (reg == 31)
1004 continue;
1005
1006 /* Do not compute the address where the register was saved yet,
1007 because we don't know yet if the offset will need to be
1008 relative to $sp or $fp (we can not compute the address
1009 relative to $sp if $sp is updated during the execution of
1010 the current subroutine, for instance when doing some alloca).
1011 So just store the offset for the moment, and compute the
1012 address later when we know whether this frame has a frame
1013 pointer or not. */
1014 /* Hack: temporarily add one, so that the offset is non-zero
1015 and we can tell which registers have save offsets below. */
1016 info->saved_regs[reg] = (word & 0xffff) + 1;
1017
1018 /* Starting with OSF/1-3.2C, the system libraries are shipped
1019 without local symbols, but they still contain procedure
1020 descriptors without a symbol reference. GDB is currently
1021 unable to find these procedure descriptors and uses
1022 heuristic_proc_desc instead.
1023 As some low level compiler support routines (__div*, __add*)
1024 use a non-standard return address register, we have to
1025 add some heuristics to determine the return address register,
1026 or stepping over these routines will fail.
1027 Usually the return address register is the first register
1028 saved on the stack, but assembler optimization might
1029 rearrange the register saves.
1030 So we recognize only a few registers (t7, t9, ra) within
1031 the procedure prologue as valid return address registers.
1032 If we encounter a return instruction, we extract the
1033 the return address register from it.
1034
1035 FIXME: Rewriting GDB to access the procedure descriptors,
1036 e.g. via the minimal symbol table, might obviate this hack. */
1037 if (return_reg == -1
1038 && cur_pc < (start_pc + 80)
1039 && (reg == ALPHA_T7_REGNUM
1040 || reg == ALPHA_T9_REGNUM
1041 || reg == ALPHA_RA_REGNUM))
1042 return_reg = reg;
1043 }
1044 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1045 return_reg = (word >> 16) & 0x1f;
1046 else if (word == 0x47de040f) /* bis sp,sp,fp */
1047 frame_reg = ALPHA_GCC_FP_REGNUM;
1048 else if (word == 0x47fe040f) /* bis zero,sp,fp */
1049 frame_reg = ALPHA_GCC_FP_REGNUM;
1050 }
c5aa993b 1051
d2427a71
RH
1052 /* If we haven't found a valid return address register yet, keep
1053 searching in the procedure prologue. */
1054 if (return_reg == -1)
1055 {
1056 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
1057 {
1058 unsigned int word = alpha_read_insn (cur_pc);
c5aa993b 1059
d2427a71
RH
1060 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1061 {
1062 reg = (word & 0x03e00000) >> 21;
1063 if (reg == ALPHA_T7_REGNUM
1064 || reg == ALPHA_T9_REGNUM
1065 || reg == ALPHA_RA_REGNUM)
1066 {
1067 return_reg = reg;
1068 break;
1069 }
1070 }
1071 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1072 {
1073 return_reg = (word >> 16) & 0x1f;
1074 break;
1075 }
85b32d22
RH
1076
1077 cur_pc += 4;
d2427a71
RH
1078 }
1079 }
c906108c 1080 }
c906108c 1081
d2427a71
RH
1082 /* Failing that, do default to the customary RA. */
1083 if (return_reg == -1)
1084 return_reg = ALPHA_RA_REGNUM;
1085 info->return_reg = return_reg;
f8453e34 1086
d2427a71
RH
1087 frame_unwind_unsigned_register (next_frame, frame_reg, &val);
1088 info->vfp = val + frame_size;
c906108c 1089
d2427a71
RH
1090 /* Convert offsets to absolute addresses. See above about adding
1091 one to the offsets to make all detected offsets non-zero. */
1092 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1093 if (info->saved_regs[reg])
1094 info->saved_regs[reg] += val - 1;
1095
1096 return info;
c906108c 1097}
c906108c 1098
d2427a71
RH
1099/* Given a GDB frame, determine the address of the calling function's
1100 frame. This will be used to create a new GDB frame struct. */
1101
fbe586ae 1102static void
d2427a71
RH
1103alpha_heuristic_frame_this_id (struct frame_info *next_frame,
1104 void **this_prologue_cache,
1105 struct frame_id *this_id)
c906108c 1106{
d2427a71
RH
1107 struct alpha_heuristic_unwind_cache *info
1108 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1109
fbe586ae
RH
1110 /* This is meant to halt the backtrace at "_start". Make sure we
1111 don't halt it at a generic dummy frame. */
1112 if (inside_entry_file (info->start_pc))
1113 return;
1114
d2427a71 1115 *this_id = frame_id_build (info->vfp, info->start_pc);
c906108c
SS
1116}
1117
d2427a71
RH
1118/* Retrieve the value of REGNUM in FRAME. Don't give up! */
1119
fbe586ae 1120static void
d2427a71
RH
1121alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
1122 void **this_prologue_cache,
1123 int regnum, int *optimizedp,
1124 enum lval_type *lvalp, CORE_ADDR *addrp,
1125 int *realnump, void *bufferp)
c906108c 1126{
d2427a71
RH
1127 struct alpha_heuristic_unwind_cache *info
1128 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
1129
1130 /* The PC of the previous frame is stored in the link register of
1131 the current frame. Frob regnum so that we pull the value from
1132 the correct place. */
1133 if (regnum == ALPHA_PC_REGNUM)
1134 regnum = info->return_reg;
1135
1136 /* For all registers known to be saved in the current frame,
1137 do the obvious and pull the value out. */
1138 if (info->saved_regs[regnum])
c906108c 1139 {
d2427a71
RH
1140 *optimizedp = 0;
1141 *lvalp = lval_memory;
1142 *addrp = info->saved_regs[regnum];
1143 *realnump = -1;
1144 if (bufferp != NULL)
1145 read_memory (*addrp, bufferp, ALPHA_REGISTER_SIZE);
c906108c
SS
1146 return;
1147 }
1148
d2427a71
RH
1149 /* The stack pointer of the previous frame is computed by popping
1150 the current stack frame. */
1151 if (regnum == ALPHA_SP_REGNUM)
c906108c 1152 {
d2427a71
RH
1153 *optimizedp = 0;
1154 *lvalp = not_lval;
1155 *addrp = 0;
1156 *realnump = -1;
1157 if (bufferp != NULL)
1158 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp);
1159 return;
c906108c 1160 }
95b80706 1161
d2427a71
RH
1162 /* Otherwise assume the next frame has the same register value. */
1163 frame_register (next_frame, regnum, optimizedp, lvalp, addrp,
1164 realnump, bufferp);
95b80706
JT
1165}
1166
d2427a71
RH
1167static const struct frame_unwind alpha_heuristic_frame_unwind = {
1168 NORMAL_FRAME,
1169 alpha_heuristic_frame_this_id,
1170 alpha_heuristic_frame_prev_register
1171};
c906108c 1172
d2427a71
RH
1173static const struct frame_unwind *
1174alpha_heuristic_frame_p (CORE_ADDR pc)
c906108c 1175{
d2427a71 1176 return &alpha_heuristic_frame_unwind;
c906108c
SS
1177}
1178
fbe586ae 1179static CORE_ADDR
d2427a71
RH
1180alpha_heuristic_frame_base_address (struct frame_info *next_frame,
1181 void **this_prologue_cache)
c906108c 1182{
d2427a71
RH
1183 struct alpha_heuristic_unwind_cache *info
1184 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
c906108c 1185
d2427a71 1186 return info->vfp;
c906108c
SS
1187}
1188
d2427a71
RH
1189static const struct frame_base alpha_heuristic_frame_base = {
1190 &alpha_heuristic_frame_unwind,
1191 alpha_heuristic_frame_base_address,
1192 alpha_heuristic_frame_base_address,
1193 alpha_heuristic_frame_base_address
1194};
1195
c906108c 1196/* Just like reinit_frame_cache, but with the right arguments to be
d2427a71 1197 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
c906108c
SS
1198
1199static void
fba45db2 1200reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
c906108c
SS
1201{
1202 reinit_frame_cache ();
1203}
1204
d2427a71
RH
1205\f
1206/* ALPHA stack frames are almost impenetrable. When execution stops,
1207 we basically have to look at symbol information for the function
1208 that we stopped in, which tells us *which* register (if any) is
1209 the base of the frame pointer, and what offset from that register
1210 the frame itself is at.
c906108c 1211
d2427a71
RH
1212 This presents a problem when trying to examine a stack in memory
1213 (that isn't executing at the moment), using the "frame" command. We
1214 don't have a PC, nor do we have any registers except SP.
c906108c 1215
d2427a71
RH
1216 This routine takes two arguments, SP and PC, and tries to make the
1217 cached frames look as if these two arguments defined a frame on the
1218 cache. This allows the rest of info frame to extract the important
1219 arguments without difficulty. */
ec32e4be 1220
d2427a71
RH
1221struct frame_info *
1222alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv)
0d056799 1223{
d2427a71
RH
1224 if (argc != 2)
1225 error ("ALPHA frame specifications require two arguments: sp and pc");
0d056799 1226
d2427a71 1227 return create_new_frame (argv[0], argv[1]);
0d056799
JT
1228}
1229
d2427a71
RH
1230/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1231 dummy frame. The frame ID's base needs to match the TOS value
1232 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1233 breakpoint. */
d734c450 1234
d2427a71
RH
1235static struct frame_id
1236alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
0d056799 1237{
d2427a71
RH
1238 ULONGEST base;
1239 frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base);
1240 return frame_id_build (base, frame_pc_unwind (next_frame));
0d056799
JT
1241}
1242
dc129d82 1243static CORE_ADDR
d2427a71 1244alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
accc6d1f 1245{
d2427a71
RH
1246 ULONGEST pc;
1247 frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc);
1248 return pc;
accc6d1f
JT
1249}
1250
d2427a71 1251\f
ec32e4be
JT
1252/* alpha_software_single_step() is called just before we want to resume
1253 the inferior, if we want to single-step it but there is no hardware
1254 or kernel single-step support (NetBSD on Alpha, for example). We find
1255 the target of the coming instruction and breakpoint it.
1256
1257 single_step is also called just after the inferior stops. If we had
1258 set up a simulated single-step, we undo our damage. */
1259
1260static CORE_ADDR
1261alpha_next_pc (CORE_ADDR pc)
1262{
1263 unsigned int insn;
1264 unsigned int op;
1265 int offset;
1266 LONGEST rav;
1267
1268 insn = read_memory_unsigned_integer (pc, sizeof (insn));
1269
1270 /* Opcode is top 6 bits. */
1271 op = (insn >> 26) & 0x3f;
1272
1273 if (op == 0x1a)
1274 {
1275 /* Jump format: target PC is:
1276 RB & ~3 */
1277 return (read_register ((insn >> 16) & 0x1f) & ~3);
1278 }
1279
1280 if ((op & 0x30) == 0x30)
1281 {
1282 /* Branch format: target PC is:
1283 (new PC) + (4 * sext(displacement)) */
1284 if (op == 0x30 || /* BR */
1285 op == 0x34) /* BSR */
1286 {
1287 branch_taken:
1288 offset = (insn & 0x001fffff);
1289 if (offset & 0x00100000)
1290 offset |= 0xffe00000;
1291 offset *= 4;
1292 return (pc + 4 + offset);
1293 }
1294
1295 /* Need to determine if branch is taken; read RA. */
1296 rav = (LONGEST) read_register ((insn >> 21) & 0x1f);
1297 switch (op)
1298 {
1299 case 0x38: /* BLBC */
1300 if ((rav & 1) == 0)
1301 goto branch_taken;
1302 break;
1303 case 0x3c: /* BLBS */
1304 if (rav & 1)
1305 goto branch_taken;
1306 break;
1307 case 0x39: /* BEQ */
1308 if (rav == 0)
1309 goto branch_taken;
1310 break;
1311 case 0x3d: /* BNE */
1312 if (rav != 0)
1313 goto branch_taken;
1314 break;
1315 case 0x3a: /* BLT */
1316 if (rav < 0)
1317 goto branch_taken;
1318 break;
1319 case 0x3b: /* BLE */
1320 if (rav <= 0)
1321 goto branch_taken;
1322 break;
1323 case 0x3f: /* BGT */
1324 if (rav > 0)
1325 goto branch_taken;
1326 break;
1327 case 0x3e: /* BGE */
1328 if (rav >= 0)
1329 goto branch_taken;
1330 break;
d2427a71
RH
1331
1332 /* ??? Missing floating-point branches. */
ec32e4be
JT
1333 }
1334 }
1335
1336 /* Not a branch or branch not taken; target PC is:
1337 pc + 4 */
1338 return (pc + 4);
1339}
1340
1341void
1342alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p)
1343{
1344 static CORE_ADDR next_pc;
1345 typedef char binsn_quantum[BREAKPOINT_MAX];
1346 static binsn_quantum break_mem;
1347 CORE_ADDR pc;
1348
1349 if (insert_breakpoints_p)
1350 {
1351 pc = read_pc ();
1352 next_pc = alpha_next_pc (pc);
1353
1354 target_insert_breakpoint (next_pc, break_mem);
1355 }
1356 else
1357 {
1358 target_remove_breakpoint (next_pc, break_mem);
1359 write_pc (next_pc);
1360 }
c906108c
SS
1361}
1362
dc129d82 1363\f
dc129d82
JT
1364/* Initialize the current architecture based on INFO. If possible, re-use an
1365 architecture from ARCHES, which is a list of architectures already created
1366 during this debugging session.
1367
1368 Called e.g. at program startup, when reading a core file, and when reading
1369 a binary file. */
1370
1371static struct gdbarch *
1372alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1373{
1374 struct gdbarch_tdep *tdep;
1375 struct gdbarch *gdbarch;
dc129d82
JT
1376
1377 /* Try to determine the ABI of the object we are loading. */
4be87837 1378 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
dc129d82 1379 {
4be87837
DJ
1380 /* If it's an ECOFF file, assume it's OSF/1. */
1381 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
aff87235 1382 info.osabi = GDB_OSABI_OSF1;
dc129d82
JT
1383 }
1384
1385 /* Find a candidate among extant architectures. */
4be87837
DJ
1386 arches = gdbarch_list_lookup_by_info (arches, &info);
1387 if (arches != NULL)
1388 return arches->gdbarch;
dc129d82
JT
1389
1390 tdep = xmalloc (sizeof (struct gdbarch_tdep));
1391 gdbarch = gdbarch_alloc (&info, tdep);
1392
d2427a71
RH
1393 /* Lowest text address. This is used by heuristic_proc_start()
1394 to decide when to stop looking. */
d9b023cc
JT
1395 tdep->vm_min_address = (CORE_ADDR) 0x120000000;
1396
36a6271d 1397 tdep->dynamic_sigtramp_offset = NULL;
5868c862 1398 tdep->sigcontext_addr = NULL;
36a6271d 1399
accc6d1f
JT
1400 tdep->jb_pc = -1; /* longjmp support not enabled by default */
1401
dc129d82
JT
1402 /* Type sizes */
1403 set_gdbarch_short_bit (gdbarch, 16);
1404 set_gdbarch_int_bit (gdbarch, 32);
1405 set_gdbarch_long_bit (gdbarch, 64);
1406 set_gdbarch_long_long_bit (gdbarch, 64);
1407 set_gdbarch_float_bit (gdbarch, 32);
1408 set_gdbarch_double_bit (gdbarch, 64);
1409 set_gdbarch_long_double_bit (gdbarch, 64);
1410 set_gdbarch_ptr_bit (gdbarch, 64);
1411
1412 /* Register info */
1413 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS);
1414 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM);
dc129d82
JT
1415 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM);
1416 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM);
1417
1418 set_gdbarch_register_name (gdbarch, alpha_register_name);
dc129d82
JT
1419 set_gdbarch_register_byte (gdbarch, alpha_register_byte);
1420 set_gdbarch_register_raw_size (gdbarch, alpha_register_raw_size);
dc129d82 1421 set_gdbarch_register_virtual_size (gdbarch, alpha_register_virtual_size);
dc129d82
JT
1422 set_gdbarch_register_virtual_type (gdbarch, alpha_register_virtual_type);
1423
1424 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register);
1425 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register);
1426
1427 set_gdbarch_register_convertible (gdbarch, alpha_register_convertible);
1428 set_gdbarch_register_convert_to_virtual (gdbarch,
1429 alpha_register_convert_to_virtual);
1430 set_gdbarch_register_convert_to_raw (gdbarch, alpha_register_convert_to_raw);
1431
615967cb
RH
1432 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p);
1433
d2427a71 1434 /* Prologue heuristics. */
dc129d82
JT
1435 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue);
1436
5ef165c2
RH
1437 /* Disassembler. */
1438 set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1439
d2427a71 1440 /* Call info. */
dc129d82
JT
1441 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1442 set_gdbarch_frameless_function_invocation (gdbarch,
1443 generic_frameless_function_invocation_not);
1444
dc129d82 1445 set_gdbarch_use_struct_convention (gdbarch, alpha_use_struct_convention);
5ec2bb99
RH
1446 set_gdbarch_extract_return_value (gdbarch, alpha_extract_return_value);
1447 set_gdbarch_store_return_value (gdbarch, alpha_store_return_value);
1448 set_gdbarch_extract_struct_value_address (gdbarch,
dc129d82
JT
1449 alpha_extract_struct_value_address);
1450
1451 /* Settings for calling functions in the inferior. */
c88e30c0 1452 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
d2427a71
RH
1453
1454 /* Methods for saving / extracting a dummy frame's ID. */
1455 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
1456 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
1457
1458 /* Return the unwound PC value. */
1459 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
dc129d82
JT
1460
1461 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
36a6271d 1462 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
dc129d82 1463
95b80706 1464 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc);
dc129d82 1465 set_gdbarch_decr_pc_after_break (gdbarch, 4);
95b80706
JT
1466
1467 set_gdbarch_function_start_offset (gdbarch, 0);
dc129d82
JT
1468 set_gdbarch_frame_args_skip (gdbarch, 0);
1469
44dffaac 1470 /* Hook in ABI-specific overrides, if they have been registered. */
4be87837 1471 gdbarch_init_osabi (info, gdbarch);
44dffaac 1472
accc6d1f
JT
1473 /* Now that we have tuned the configuration, set a few final things
1474 based on what the OS ABI has told us. */
1475
1476 if (tdep->jb_pc >= 0)
1477 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
1478
d2427a71
RH
1479 frame_unwind_append_predicate (gdbarch, alpha_sigtramp_frame_p);
1480 frame_unwind_append_predicate (gdbarch, alpha_heuristic_frame_p);
dc129d82 1481
d2427a71 1482 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
accc6d1f 1483
d2427a71 1484 return gdbarch;
dc129d82
JT
1485}
1486
c906108c 1487void
fba45db2 1488_initialize_alpha_tdep (void)
c906108c
SS
1489{
1490 struct cmd_list_element *c;
1491
d2427a71 1492 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
c906108c
SS
1493
1494 /* Let the user set the fence post for heuristic_proc_start. */
1495
1496 /* We really would like to have both "0" and "unlimited" work, but
1497 command.c doesn't deal with that. So make it a var_zinteger
1498 because the user can always use "999999" or some such for unlimited. */
1499 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger,
1500 (char *) &heuristic_fence_post,
1501 "\
1502Set the distance searched for the start of a function.\n\
1503If you are debugging a stripped executable, GDB needs to search through the\n\
1504program for the start of a function. This command sets the distance of the\n\
1505search. The only need to set it is when debugging a stripped executable.",
1506 &setlist);
1507 /* We need to throw away the frame cache when we set this, since it
1508 might change our ability to get backtraces. */
9f60d481 1509 set_cmd_sfunc (c, reinit_frame_cache_sfunc);
c906108c
SS
1510 add_show_from_set (c, &showlist);
1511}
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