windows-nat: Don't change current_event.dwThreadId in handle_output_debug_string()
[deliverable/binutils-gdb.git] / gdb / amd64-nat.c
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1/* Native-dependent code for AMD64.
2
32d0add0 3 Copyright (C) 2003-2015 Free Software Foundation, Inc.
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
a9762ec7 9 the Free Software Foundation; either version 3 of the License, or
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10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
a9762ec7 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
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19
20#include "defs.h"
21#include "gdbarch.h"
22#include "regcache.h"
23
2a6d284d 24#include "i386-tdep.h"
85be1ca6 25#include "amd64-tdep.h"
2c0b251b 26#include "amd64-nat.h"
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27
28/* The following bits of code help with implementing debugging 32-bit
29 code natively on AMD64. The idea is to define two mappings between
30 the register number as used by GDB and the register set used by the
31 host to represent the general-purpose registers; one for 32-bit
32 code and one for 64-bit code. The mappings are specified by the
33 follwing variables and consist of an array of offsets within the
34 register set indexed by register number, and the number of
35 registers supported by the mapping. We don't need mappings for the
36 floating-point and SSE registers, since the difference between
37 64-bit and 32-bit variants are negligable. The difference in the
38 number of SSE registers is already handled by the target code. */
39
40/* General-purpose register mapping for native 32-bit code. */
41int *amd64_native_gregset32_reg_offset;
42int amd64_native_gregset32_num_regs = I386_NUM_GREGS;
43
44/* General-purpose register mapping for native 64-bit code. */
45int *amd64_native_gregset64_reg_offset;
90f90721 46int amd64_native_gregset64_num_regs = AMD64_NUM_GREGS;
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47
48/* Return the offset of REGNUM within the appropriate native
49 general-purpose register set. */
50
51static int
f8028488 52amd64_native_gregset_reg_offset (struct gdbarch *gdbarch, int regnum)
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53{
54 int *reg_offset = amd64_native_gregset64_reg_offset;
55 int num_regs = amd64_native_gregset64_num_regs;
56
57 gdb_assert (regnum >= 0);
58
233dfcf0 59 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
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60 {
61 reg_offset = amd64_native_gregset32_reg_offset;
62 num_regs = amd64_native_gregset32_num_regs;
63 }
64
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65 if (num_regs > gdbarch_num_regs (gdbarch))
66 num_regs = gdbarch_num_regs (gdbarch);
2a6d284d 67
f8028488 68 if (regnum < num_regs && regnum < gdbarch_num_regs (gdbarch))
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69 return reg_offset[regnum];
70
71 return -1;
72}
73
74/* Return whether the native general-purpose register set supplies
75 register REGNUM. */
76
77int
f8028488 78amd64_native_gregset_supplies_p (struct gdbarch *gdbarch, int regnum)
2a6d284d 79{
f8028488 80 return (amd64_native_gregset_reg_offset (gdbarch, regnum) != -1);
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81}
82
83
ecba89de 84/* Supply register REGNUM, whose contents are stored in GREGS, to
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85 REGCACHE. If REGNUM is -1, supply all appropriate registers. */
86
87void
88amd64_supply_native_gregset (struct regcache *regcache,
89 const void *gregs, int regnum)
90{
91 const char *regs = gregs;
b053aceb 92 struct gdbarch *gdbarch = get_regcache_arch (regcache);
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93 int num_regs = amd64_native_gregset64_num_regs;
94 int i;
95
233dfcf0 96 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
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97 num_regs = amd64_native_gregset32_num_regs;
98
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99 if (num_regs > gdbarch_num_regs (gdbarch))
100 num_regs = gdbarch_num_regs (gdbarch);
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101
102 for (i = 0; i < num_regs; i++)
103 {
104 if (regnum == -1 || regnum == i)
105 {
f8028488 106 int offset = amd64_native_gregset_reg_offset (gdbarch, i);
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107
108 if (offset != -1)
b053aceb 109 regcache_raw_supply (regcache, i, regs + offset);
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110 }
111 }
112}
113
114/* Collect register REGNUM from REGCACHE and store its contents in
115 GREGS. If REGNUM is -1, collect and store all appropriate
116 registers. */
117
118void
119amd64_collect_native_gregset (const struct regcache *regcache,
120 void *gregs, int regnum)
121{
122 char *regs = gregs;
b053aceb 123 struct gdbarch *gdbarch = get_regcache_arch (regcache);
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124 int num_regs = amd64_native_gregset64_num_regs;
125 int i;
126
233dfcf0 127 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
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128 {
129 num_regs = amd64_native_gregset32_num_regs;
130
131 /* Make sure %eax, %ebx, %ecx, %edx, %esi, %edi, %ebp, %esp and
132 %eip get zero-extended to 64 bits. */
133 for (i = 0; i <= I386_EIP_REGNUM; i++)
134 {
135 if (regnum == -1 || regnum == i)
f8028488 136 memset (regs + amd64_native_gregset_reg_offset (gdbarch, i), 0, 8);
041bd74b 137 }
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138 /* Ditto for %cs, %ss, %ds, %es, %fs, and %gs. */
139 for (i = I386_CS_REGNUM; i <= I386_GS_REGNUM; i++)
140 {
141 if (regnum == -1 || regnum == i)
f8028488 142 memset (regs + amd64_native_gregset_reg_offset (gdbarch, i), 0, 8);
e9ff708b 143 }
041bd74b 144 }
2a6d284d 145
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146 if (num_regs > gdbarch_num_regs (gdbarch))
147 num_regs = gdbarch_num_regs (gdbarch);
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148
149 for (i = 0; i < num_regs; i++)
150 {
151 if (regnum == -1 || regnum == i)
152 {
f8028488 153 int offset = amd64_native_gregset_reg_offset (gdbarch, i);
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154
155 if (offset != -1)
b053aceb 156 regcache_raw_collect (regcache, i, regs + offset);
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157 }
158 }
159}
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